Initial commit

.gitignore

...0-7_change ip/FPGA Bitfiles/FPGA_loadCell_Host_example.vi

..._AJ_V0-7_change ip/FPGA Bitfiles/FPGA_loadCell_example.vi

...g/pad_print_AJ_V0-7_change ip/FPGA Bitfiles/Untitled 2.vi

...ad_print_AJ_V0-7_change ip/FPGA Bitfiles/loadCell_init.vi

...t_AJ_V0-7_change ip/FPGA Bitfiles/loadCell_measurement.vi

...adprintv31_FPGATarget_FPGAloadCellexam_StK4biHTQmA.lvbitx

...tfiles/padprintv31_FPGATarget_testFPGA_D2B7nJrEvgY.lvbitx

...ing/pad_print_AJ_V0-7_change ip/Main_IDD_Pad_Print_V_3.vi

...g/pad_print_AJ_V0-7_change ip/Main_IDD_Pad_Print_V_3_1.vi

...Working/pad_print_AJ_V0-7_change ip/Pad_Print_PC_v3.lvlib

..._Working/pad_print_AJ_V0-7_change ip/Pad_Print_v3_1.lvlib

...ing/pad_print_AJ_V0-7_change ip/Reinitialize with FPGA.vi

...ad_print_AJ_V0-7_change ip/Reinitialize with FPGA_self.vi

..._Real_Working/pad_print_AJ_V0-7_change ip/Reinitialize.vi

...Working/pad_print_AJ_V0-7_change ip/Untitled 4 (SubVI).vi

...orking/pad_print_AJ_V0-7_change ip/actor_dequeue_state.vi

...orking/pad_print_AJ_V0-7_change ip/actor_state_machine.vi

...ng/pad_print_AJ_V0-7_change ip/arrayToCluster_variable.vi

...Real_Working/pad_print_AJ_V0-7_change ip/axis_activate.vi