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Commit 24f2de4a authored by Post, Fabian's avatar Post, Fabian
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Main_IDD_Pad_Print_V_3_1.vi
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Pad_Print_v3_1.lvlib
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......@@ -5,7 +5,6 @@
<Property Name="NI.Lib.Version" Type="Str">1.0.0.0</Property>
<Property Name="NI.LV.All.SourceOnly" Type="Bool">false</Property>
<Item Name="FPGA_Bitfiles" Type="Folder">
<Item Name="FPGA_Bitfile_path.ctl" Type="VI" URL="../FPGA_Bitfile_path.ctl"/>
<Item Name="padprintv31_FPGATarget_FPGAloadCellexam_StK4biHTQmA_copy.lvbitx" Type="Document" URL="../FPGA Bitfiles/padprintv31_FPGATarget_FPGAloadCellexam_StK4biHTQmA_copy.lvbitx"/>
</Item>
<Item Name="network_variables" Type="Folder">
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