diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.cproject b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.cproject
deleted file mode 100644
index f467266e168f94c60bf2e881dd5531ec4321e0bb..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.cproject
+++ /dev/null
@@ -1,187 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
- <storageModule moduleId="org.eclipse.cdt.core.settings">
- <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872">
- <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872" moduleId="org.eclipse.cdt.core.settings" name="Debug">
- <externalSettings/>
- <extensions>
- <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
- <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- </extensions>
- </storageModule>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
- <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872." name="/" resourcePath="">
- <toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.235167590" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
- <option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1708977117" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.652420016" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.392665642" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F401RETx" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1944368236" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1540766663" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1592886591" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1727238378" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.243728990" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-F401RE" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.761846165" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || NUCLEO-F401RE || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy || || || USE_HAL_DRIVER | STM32F401xE || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F401RETX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || " valueType="string"/>
- <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1616465387" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
- <builder buildPath="${workspace_loc:/l5cxv0_f401}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1366828100" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1658460754" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.212150285" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
- <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols.85629515" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols" valueType="definedSymbols">
- <listOptionValue builtIn="false" value="DEBUG"/>
- </option>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.715762895" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.390818132" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2033867599" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1261815686" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
- <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.2072183041" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
- <listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
- <listOptionValue builtIn="false" value="STM32F401xE"/>
- <listOptionValue builtIn="false" value="DEBUG"/>
- </option>
- <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.393012985" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
- <listOptionValue builtIn="false" value="../Core/Inc"/>
- <listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
- <listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
- <listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
- <listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
- <listOptionValue builtIn="false" value="../Drivers/BSP/Components/VL53L5CX_ULD_API/inc"/>
- </option>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.955481205" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.279651522" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1638351499" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.105795892" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1602975544" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1356009236" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F401RETX_FLASH.ld}" valueType="string"/>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1543587533" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
- <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
- <additionalInput kind="additionalinput" paths="$(LIBS)"/>
- </inputType>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1211778355" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1848695811" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1385613926" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.567953246" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.473511500" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.2067736500" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.982367948" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.107743475" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1078651281" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
- </toolChain>
- </folderInfo>
- <sourceEntries>
- <entry excluding="Src/main_multi.c|Src/main_sat.c|Src/main_simple.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
- <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
- </sourceEntries>
- </configuration>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
- </cconfiguration>
- <cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435">
- <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435" moduleId="org.eclipse.cdt.core.settings" name="Release">
- <externalSettings/>
- <extensions>
- <extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
- <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
- <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
- </extensions>
- </storageModule>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
- <folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435." name="/" resourcePath="">
- <toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.1338831274" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
- <option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.145924445" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.984697652" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.822970883" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F401RETx" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.458647871" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1622045620" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1161261855" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.502837139" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.814970315" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-F401RE" valueType="string"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.446336047" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || NUCLEO-F401RE || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy || || || USE_HAL_DRIVER | STM32F401xE || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F401RETX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || " valueType="string"/>
- <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1923282304" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
- <builder buildPath="${workspace_loc:/l5cxv0_f401}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1171287772" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.894424306" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.724671397" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1261725509" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2137692054" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1475109073" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.2089443730" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
- <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.671122775" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
- <listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
- <listOptionValue builtIn="false" value="STM32F401xE"/>
- </option>
- <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.569341146" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
- <listOptionValue builtIn="false" value="../Core/Inc"/>
- <listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
- <listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
- <listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
- <listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
- </option>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.201242836" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.2047649293" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.272983930" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1046837287" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.383013091" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
- <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1491645950" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F401RETX_FLASH.ld}" valueType="string"/>
- <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1485780408" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
- <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
- <additionalInput kind="additionalinput" paths="$(LIBS)"/>
- </inputType>
- </tool>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.410464202" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2142482466" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1190173615" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.429190756" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1655841813" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1336769599" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1831135764" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.283781201" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
- <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1612383039" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
- </toolChain>
- </folderInfo>
- <sourceEntries>
- <entry excluding="Src/main_simple.c|Src/main_multi.c|Src/main.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
- <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
- </sourceEntries>
- </configuration>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
- </cconfiguration>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
- <storageModule moduleId="cdtBuildSystem" version="4.0.0">
- <project id="l5cxv0_f401.null.1045270411" name="l5cxv0_f401"/>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
- <storageModule moduleId="scannerConfiguration">
- <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
- <scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1746552435.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.2137692054;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.201242836">
- <autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
- </scannerConfigBuildInfo>
- <scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.577628872.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.390818132;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.955481205">
- <autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
- </scannerConfigBuildInfo>
- </storageModule>
- <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
- <storageModule moduleId="refreshScope" versionNumber="2">
- <configuration configurationName="Debug">
- <resource resourceType="PROJECT" workspacePath="/l5cxv0_f401"/>
- </configuration>
- <configuration configurationName="Release">
- <resource resourceType="PROJECT" workspacePath="/l5cxv0_f401"/>
- </configuration>
- </storageModule>
-</cproject>
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.mxproject b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.mxproject
deleted file mode 100644
index 7113802e379cd4c9f501d31e3f8473ef04f270b6..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.mxproject
+++ /dev/null
@@ -1,30 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_i2c.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_i2c.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_i2c_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_usart.h;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_i2c.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_i2c.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_i2c_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_rcc_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_bus.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_rcc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_system.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_utils.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_flash_ramfunc.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_gpio_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_gpio.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dma.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_dmamux.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_pwr_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_pwr.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_cortex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal.h;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_def.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_exti.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_tim_ex.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_hal_uart.h;Drivers\STM32F4xx_HAL_Driver\Inc\stm32f4xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f401xe.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Include\system_stm32f4xx.h;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedIarFiles]
-SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f4xx_it.c;..\Core\Src\stm32f4xx_hal_msp.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;..\Core\Src/system_stm32f4xx.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;..\Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;..\Core\Src/system_stm32f4xx.c;..\Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;;
-HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc;
-CDefines=USE_HAL_DRIVER;STM32F401xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Core\Src\main.c;Core\Src\stm32f4xx_it.c;Core\Src\stm32f4xx_hal_msp.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;;;
-HeaderPath=Drivers\STM32F4xx_HAL_Driver\Inc;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F4xx\Include;Drivers\CMSIS\Include;Core\Inc;
-CDefines=USE_HAL_DRIVER;STM32F401xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
-[PreviousGenFiles]
-AdvancedFolderStructure=true
-HeaderFileListSize=3
-HeaderFiles#0=..\Core\Inc\stm32f4xx_it.h
-HeaderFiles#1=..\Core\Inc\stm32f4xx_hal_conf.h
-HeaderFiles#2=..\Core\Inc\main.h
-HeaderFolderListSize=1
-HeaderPath#0=..\Core\Inc
-HeaderFiles=;
-SourceFileListSize=3
-SourceFiles#0=..\Core\Src\stm32f4xx_it.c
-SourceFiles#1=..\Core\Src\stm32f4xx_hal_msp.c
-SourceFiles#2=..\Core\Src\main.c
-SourceFolderListSize=1
-SourcePath#0=..\Core\Src
-SourceFiles=;
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.project b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.project
deleted file mode 100644
index 1af8e03859a4614c1c806cfb2ab50207fc0eaa3d..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/.project
+++ /dev/null
@@ -1,33 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
- <name>VL53L5CX_Example_F401RE</name>
- <comment></comment>
- <projects>
- </projects>
- <buildSpec>
- <buildCommand>
- <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
- <triggers>clean,full,incremental,</triggers>
- <arguments>
- </arguments>
- </buildCommand>
- <buildCommand>
- <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
- <triggers>full,incremental,</triggers>
- <arguments>
- </arguments>
- </buildCommand>
- </buildSpec>
- <natures>
- <nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
- <nature>org.eclipse.cdt.core.cnature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
- <nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
- <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
- <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
- </natures>
-</projectDescription>
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/main.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/main.h
deleted file mode 100644
index 09f4db4e10dc0e96035765392f340461f635100e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/main.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file : main.h
- * @brief : Header for main.c file.
- * This file contains the common defines of the application.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MAIN_H
-#define __MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
-/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
-
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
-
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
-
-/* Private defines -----------------------------------------------------------*/
-#define B1_Pin GPIO_PIN_13
-#define B1_GPIO_Port GPIOC
-#define B1_EXTI_IRQn EXTI15_10_IRQn
-#define PWR_EN_R_Pin GPIO_PIN_0
-#define PWR_EN_R_GPIO_Port GPIOC
-#define PWR_EN_L_Pin GPIO_PIN_0
-#define PWR_EN_L_GPIO_Port GPIOA
-#define USART_TX_Pin GPIO_PIN_2
-#define USART_TX_GPIO_Port GPIOA
-#define USART_RX_Pin GPIO_PIN_3
-#define USART_RX_GPIO_Port GPIOA
-#define INT_C_Pin GPIO_PIN_4
-#define INT_C_GPIO_Port GPIOA
-#define INT_C_EXTI_IRQn EXTI4_IRQn
-#define LD2_Pin GPIO_PIN_5
-#define LD2_GPIO_Port GPIOA
-#define PWR_EN_C_Pin GPIO_PIN_0
-#define PWR_EN_C_GPIO_Port GPIOB
-#define LPn_L_Pin GPIO_PIN_10
-#define LPn_L_GPIO_Port GPIOB
-#define INT_L_Pin GPIO_PIN_7
-#define INT_L_GPIO_Port GPIOC
-#define INT_L_EXTI_IRQn EXTI9_5_IRQn
-#define I2C_RST_L_Pin GPIO_PIN_8
-#define I2C_RST_L_GPIO_Port GPIOA
-#define I2C_RST_R_Pin GPIO_PIN_9
-#define I2C_RST_R_GPIO_Port GPIOA
-#define INT_R_Pin GPIO_PIN_10
-#define INT_R_GPIO_Port GPIOA
-#define INT_R_EXTI_IRQn EXTI15_10_IRQn
-#define TMS_Pin GPIO_PIN_13
-#define TMS_GPIO_Port GPIOA
-#define TCK_Pin GPIO_PIN_14
-#define TCK_GPIO_Port GPIOA
-#define I2C_RST_C_Pin GPIO_PIN_3
-#define I2C_RST_C_GPIO_Port GPIOB
-#define LPn_C_Pin GPIO_PIN_4
-#define LPn_C_GPIO_Port GPIOB
-#define LPn_R_Pin GPIO_PIN_5
-#define LPn_R_GPIO_Port GPIOB
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MAIN_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/platform.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/platform.h
deleted file mode 100644
index 422f6e6c79ab9aa650d9b7ddcee5c21cbdf37735..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/platform.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-#ifndef _PLATFORM_H_
-#define _PLATFORM_H_
-#pragma once
-
-#include <stdint.h>
-#include <string.h>
-#include "stm32f4xx.h"
-
-/**
- * @brief Structure VL53L5CX_Platform needs to be filled by the customer,
- * depending on his platform. At least, it contains the VL53L5CX I2C address.
- * Some additional fields can be added, as descriptors, or platform
- * dependencies. Anything added into this structure is visible into the platform
- * layer.
- */
-
-typedef struct
-{
- /* To be filled with customer's platform. At least an I2C address/descriptor
- * needs to be added */
- /* Example for most standard platform : I2C address of sensor */
- uint16_t address;
-
-} VL53L5CX_Platform;
-
-/*
- * @brief The macro below is used to define the number of target per zone sent
- * through I2C. This value can be changed by user, in order to tune I2C
- * transaction, and also the total memory size (a lower number of target per
- * zone means a lower RAM). The value must be between 1 and 4.
- */
-
-#define VL53L5CX_NB_TARGET_PER_ZONE 1U
-
-/*
- * @brief The macro below can be used to avoid data conversion into the driver.
- * By default there is a conversion between firmware and user data. Using this macro
- * allows to use the firmware format instead of user format. The firmware format allows
- * an increased precision.
- */
-
-// #define VL53L5CX_USE_RAW_FORMAT
-
-/*
- * @brief All macro below are used to configure the sensor output. User can
- * define some macros if he wants to disable selected output, in order to reduce
- * I2C access.
- */
-
-// #define VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-// #define VL53L5CX_DISABLE_NB_SPADS_ENABLED
-// #define VL53L5CX_DISABLE_NB_TARGET_DETECTED
-// #define VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-// #define VL53L5CX_DISABLE_RANGE_SIGMA_MM
-// #define VL53L5CX_DISABLE_DISTANCE_MM
-// #define VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-// #define VL53L5CX_DISABLE_TARGET_STATUS
-// #define VL53L5CX_DISABLE_MOTION_INDICATOR
-
-/**
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) *p_values : Pointer of value to read.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value);
-
-/**
- * @brief Mandatory function used to write one single byte.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) value : Pointer of value to write.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value);
-
-/**
- * @brief Mandatory function used to read multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to read.
- * @param (uint8_t) *p_values : Buffer of bytes to read.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Mandatory function used to write multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to write.
- * @param (uint8_t) *p_values : Buffer of bytes to write.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Optional function, only used to perform an hardware reset of the
- * sensor. This function is not used in the API, but it can be used by the host.
- * This function is not mandatory to fill if user don't want to reset the
- * sensor.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform);
-
-/**
- * @brief Mandatory function, used to swap a buffer. The buffer size is always a
- * multiple of 4 (4, 8, 12, 16, ...).
- * @param (uint8_t*) buffer : Buffer to swap, generally uint32_t
- * @param (uint16_t) size : Buffer size to swap
- */
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size);
-/**
- * @brief Mandatory function, used to wait during an amount of time. It must be
- * filled as it's used into the API.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint32_t) TimeMs : Time to wait in ms.
- * @return (uint8_t) status : 0 if wait is finished.
- */
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs);
-
-#endif // _PLATFORM_H_
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_hal_conf.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_hal_conf.h
deleted file mode 100644
index b8bb7d6d0f11010302a7ff767e55004be4a2397b..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,491 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_conf_template.h
- * @author MCD Application Team
- * @brief HAL configuration template file.
- * This file should be copied to the application folder and renamed
- * to stm32f4xx_hal_conf.h.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
- * @brief This is the list of modules to be used in the HAL driver
- */
-#define HAL_MODULE_ENABLED
-
- /* #define HAL_ADC_MODULE_ENABLED */
-/* #define HAL_CRYP_MODULE_ENABLED */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CRC_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CRYP_MODULE_ENABLED */
-/* #define HAL_DAC_MODULE_ENABLED */
-/* #define HAL_DCMI_MODULE_ENABLED */
-/* #define HAL_DMA2D_MODULE_ENABLED */
-/* #define HAL_ETH_MODULE_ENABLED */
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_PCCARD_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED */
-#define HAL_I2C_MODULE_ENABLED
-/* #define HAL_I2S_MODULE_ENABLED */
-/* #define HAL_IWDG_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED */
-/* #define HAL_RNG_MODULE_ENABLED */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED */
-/* #define HAL_SD_MODULE_ENABLED */
-/* #define HAL_MMC_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED */
-/* #define HAL_TIM_MODULE_ENABLED */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED */
-/* #define HAL_IRDA_MODULE_ENABLED */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_SMBUS_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED */
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_QSPI_MODULE_ENABLED */
-/* #define HAL_QSPI_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED */
-/* #define HAL_FMPI2C_MODULE_ENABLED */
-/* #define HAL_FMPSMBUS_MODULE_ENABLED */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_EXTI_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
- * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
- * This value is used by the RCC HAL module to compute the system frequency
- * (when HSE is used as system clock source, directly or through the PLL).
- */
-#if !defined (HSE_VALUE)
- #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined (HSE_STARTUP_TIMEOUT)
- #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
- * @brief Internal High Speed oscillator (HSI) value.
- * This value is used by the RCC HAL module to compute the system frequency
- * (when HSI is used as system clock source, directly or through the PLL).
- */
-#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
- * @brief Internal Low Speed oscillator (LSI) value.
- */
-#if !defined (LSI_VALUE)
- #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
- The real value may vary depending on the variations
- in voltage and temperature.*/
-/**
- * @brief External Low Speed oscillator (LSE) value.
- */
-#if !defined (LSE_VALUE)
- #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
- * @brief External clock source for I2S peripheral
- * This value is used by the I2S HAL module to compute the I2S clock source
- * frequency, this source is inserted directly through I2S_CKIN pad.
- */
-#if !defined (EXTERNAL_CLOCK_VALUE)
- #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
- === you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
- * @brief This is the HAL system configuration section
- */
-#define VDD_VALUE 3300U /*!< Value of VDD in mv */
-#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
-#define USE_RTOS 0U
-#define PREFETCH_ENABLE 1U
-#define INSTRUCTION_CACHE_ENABLE 1U
-#define DATA_CACHE_ENABLE 1U
-
-#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
-#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
-#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
-#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
-#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
-#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
-#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
-#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
-#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
-#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
-#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
-#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
-#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
-#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
-#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
-#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
-#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
-#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
-#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
-#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
-#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
-#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
-#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
-#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
-#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
-#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
-#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
-#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
-#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
-#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
-#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
-#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
-#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
-#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
-#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
-#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
-#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
-#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
-#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
-
-/* ########################## Assert Selection ############################## */
-/**
- * @brief Uncomment the line below to expanse the "assert_param" macro in the
- * HAL drivers code
- */
-/* #define USE_FULL_ASSERT 1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0 2U
-#define MAC_ADDR1 0U
-#define MAC_ADDR2 0U
-#define MAC_ADDR3 0U
-#define MAC_ADDR4 0U
-#define MAC_ADDR5 0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
-#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
-#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
-#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848_PHY_ADDRESS Address*/
-#define DP83848_PHY_ADDRESS 0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY 0x00000FFFU
-
-#define PHY_READ_TO 0x0000FFFFU
-#define PHY_WRITE_TO 0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
-#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
-
-#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
-#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
-#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
-#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
-#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
-#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
-#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
-
-#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
-#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
-#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
-
-/* Section 4: Extended PHY Registers */
-#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
-
-#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
-#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC 0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
- * @brief Include module's header file
- */
-
-#ifdef HAL_RCC_MODULE_ENABLED
- #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
- #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
- #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
- #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
- #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
- #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
- #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
- #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
- #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
- #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
- #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
- #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
- #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
- #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
- #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
- #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
- #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
- #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
- #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_FMPSMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpsmbus.h"
-#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef USE_FULL_ASSERT
-/**
- * @brief The assert_param macro is used for function's parameters check.
- * @param expr If expr is false, it calls assert_failed function
- * which reports the name of the source file and the source
- * line number of the call that failed.
- * If expr is true, it returns no value.
- * @retval None
- */
- #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
- void assert_failed(uint8_t* file, uint32_t line);
-#else
- #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_it.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_it.h
deleted file mode 100644
index 3071a1b9b21f5aec5829a544f251cb50c1e69778..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Inc/stm32f4xx_it.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f4xx_it.h
- * @brief This file contains the headers of the interrupt handlers.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_IT_H
-#define __STM32F4xx_IT_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
-/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
-
-/* Exported functions prototypes ---------------------------------------------*/
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
-void EXTI9_5_IRQHandler(void);
-void EXTI15_10_IRQHandler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_IT_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/main.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/main.c
deleted file mode 100644
index 0bbd0aa5bae7d51ad9dccf82b1670503bfc0c607..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/main.c
+++ /dev/null
@@ -1,468 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file : main.c
- * @brief : Main program body
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-#define is_interrupt 0 /*is_interrupt = 1 => get data by interrupt, = 0 => get data by polling */
-
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-I2C_HandleTypeDef hi2c1;
-
-UART_HandleTypeDef huart2;
-
-/* USER CODE BEGIN PV */
-int status;
-volatile int IntCount;
-uint8_t p_data_ready;
-VL53L5CX_Configuration Dev;
-VL53L5CX_ResultsData Results;
-uint8_t resolution, isAlive;
-uint16_t idx;
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_I2C1_Init(void);
-static void MX_USART2_UART_Init(void);
-/* USER CODE BEGIN PFP */
-
-void get_data_by_polling(VL53L5CX_Configuration *p_dev);
-void get_data_by_interrupt(VL53L5CX_Configuration *p_dev);
-
-#ifdef __GNUC__
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
-#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-
-#endif
-
-PUTCHAR_PROTOTYPE
-{
- HAL_UART_Transmit(&huart2, (uint8_t *)&ch, 1, 0xFFFF);
- return ch;
-}
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
- if (GPIO_Pin==INT_C_Pin)
- {
- IntCount++;
- }
-}
-/* USER CODE END 0 */
-
-/**
- * @brief The application entry point.
- * @retval int
- */
-int main(void)
-{
- /* USER CODE BEGIN 1 */
-
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
-
- /* USER CODE BEGIN Init */
-
- /* USER CODE END Init */
-
- /* Configure the system clock */
- SystemClock_Config();
-
- /* USER CODE BEGIN SysInit */
-
- /* USER CODE END SysInit */
-
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- MX_I2C1_Init();
- MX_USART2_UART_Init();
- /* USER CODE BEGIN 2 */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-// HAL_GPIO_WritePin(I2C_RST_C_GPIO_Port, I2C_RST_C_Pin, GPIO_PIN_RESET);
-// HAL_Delay(100);
-// HAL_GPIO_WritePin(PWR_EN_C_GPIO_Port, PWR_EN_C_Pin, GPIO_PIN_RESET);
-// HAL_Delay(100);
-// HAL_GPIO_WritePin(LPn_C_GPIO_Port, LPn_C_Pin, GPIO_PIN_RESET);
-// HAL_Delay(200);
-// HAL_GPIO_WritePin(PWR_EN_C_GPIO_Port, PWR_EN_C_Pin, GPIO_PIN_SET);
-// HAL_Delay(100);
-// HAL_GPIO_WritePin(LPn_C_GPIO_Port, LPn_C_Pin, GPIO_PIN_SET);
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive)
- {
- printf("VL53L5CXV0 not detected at requested address (0x%x)\n", Dev.platform.address);
- return 255;
- }
- printf("Sensor initializing, please wait few seconds\n");
- status = vl53l5cx_init(&Dev);
- status = vl53l5cx_set_ranging_frequency_hz(&Dev, 2); // Set 2Hz ranging frequency
- status = vl53l5cx_set_ranging_mode(&Dev, VL53L5CX_RANGING_MODE_CONTINUOUS); // Set mode continuous
-
- printf("Ranging starts\n");
- status = vl53l5cx_start_ranging(&Dev);
- /* USER CODE END 2 */
-
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
-
- if (is_interrupt) {
- get_data_by_interrupt(&Dev);
- }
- else {
- get_data_by_polling(&Dev);
- }
-
-
- /* USER CODE END WHILE */
-
- /* USER CODE BEGIN 3 */
- /* USER CODE END 3 */
-}
-
-/**
- * @brief System Clock Configuration
- * @retval None
- */
-void SystemClock_Config(void)
-{
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
- /** Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
-
- /** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
- RCC_OscInitStruct.PLL.PLLM = 16;
- RCC_OscInitStruct.PLL.PLLN = 336;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
- RCC_OscInitStruct.PLL.PLLQ = 7;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- {
- Error_Handler();
- }
-}
-
-/**
- * @brief I2C1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_I2C1_Init(void)
-{
-
- /* USER CODE BEGIN I2C1_Init 0 */
-
- /* USER CODE END I2C1_Init 0 */
-
- /* USER CODE BEGIN I2C1_Init 1 */
-
- /* USER CODE END I2C1_Init 1 */
- hi2c1.Instance = I2C1;
- hi2c1.Init.ClockSpeed = 1000000;
- hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
- hi2c1.Init.OwnAddress1 = 0;
- hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- hi2c1.Init.OwnAddress2 = 0;
- hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- if (HAL_I2C_Init(&hi2c1) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN I2C1_Init 2 */
-
- /* USER CODE END I2C1_Init 2 */
-
-}
-
-/**
- * @brief USART2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART2_UART_Init(void)
-{
-
- /* USER CODE BEGIN USART2_Init 0 */
-
- /* USER CODE END USART2_Init 0 */
-
- /* USER CODE BEGIN USART2_Init 1 */
-
- /* USER CODE END USART2_Init 1 */
- huart2.Instance = USART2;
- huart2.Init.BaudRate = 460800;
- huart2.Init.WordLength = UART_WORDLENGTH_8B;
- huart2.Init.StopBits = UART_STOPBITS_1;
- huart2.Init.Parity = UART_PARITY_NONE;
- huart2.Init.Mode = UART_MODE_TX_RX;
- huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart2.Init.OverSampling = UART_OVERSAMPLING_16;
- if (HAL_UART_Init(&huart2) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN USART2_Init 2 */
-
- /* USER CODE END USART2_Init 2 */
-
-}
-
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOC_CLK_ENABLE();
- __HAL_RCC_GPIOH_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(PWR_EN_R_GPIO_Port, PWR_EN_R_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(PWR_EN_L_GPIO_Port, PWR_EN_L_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOA, LD2_Pin|I2C_RST_L_Pin|I2C_RST_R_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOB, PWR_EN_C_Pin|LPn_L_Pin|LPn_C_Pin|LPn_R_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(I2C_RST_C_GPIO_Port, I2C_RST_C_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pins : B1_Pin INT_L_Pin */
- GPIO_InitStruct.Pin = B1_Pin|INT_L_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
- /*Configure GPIO pin : PWR_EN_R_Pin */
- GPIO_InitStruct.Pin = PWR_EN_R_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- HAL_GPIO_Init(PWR_EN_R_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pins : PWR_EN_L_Pin I2C_RST_L_Pin I2C_RST_R_Pin */
- GPIO_InitStruct.Pin = PWR_EN_L_Pin|I2C_RST_L_Pin|I2C_RST_R_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /*Configure GPIO pin : INT_C_Pin */
- GPIO_InitStruct.Pin = INT_C_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(INT_C_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pin : LD2_Pin */
- GPIO_InitStruct.Pin = LD2_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pins : PWR_EN_C_Pin LPn_L_Pin I2C_RST_C_Pin LPn_C_Pin
- LPn_R_Pin */
- GPIO_InitStruct.Pin = PWR_EN_C_Pin|LPn_L_Pin|I2C_RST_C_Pin|LPn_C_Pin
- |LPn_R_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /*Configure GPIO pin : INT_R_Pin */
- GPIO_InitStruct.Pin = INT_R_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(INT_R_GPIO_Port, &GPIO_InitStruct);
-
- /* EXTI interrupt init*/
- HAL_NVIC_SetPriority(EXTI4_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(EXTI4_IRQn);
-
- HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
-
- HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
-
-}
-
-/* USER CODE BEGIN 4 */
-
-void get_data_by_interrupt(VL53L5CX_Configuration *p_dev){
- do
- {
- __WFI(); // Wait for interrupt
- if(IntCount !=0 ){
- IntCount=0;
- status = vl53l5cx_get_resolution(p_dev, &resolution);
- status = vl53l5cx_get_ranging_data(p_dev, &Results);
-
- for(int i = 0; i < resolution;i++){
- /* Print per zone results */
- printf("Zone : %2d, Nb targets : %2u, Ambient : %4lu Kcps/spads, ",
- i,
- Results.nb_target_detected[i],
- Results.ambient_per_spad[i]);
-
- /* Print per target results */
- if(Results.nb_target_detected[i] > 0){
- printf("Target status : %3u, Distance : %4d mm\n",
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE * i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE * i]);
- }else{
- printf("Target status : 255, Distance : No target\n");
- }
- }
- printf("\n");
- }
- }while(1);
-}
-
-
-void get_data_by_polling(VL53L5CX_Configuration *p_dev){
- do
- {
- status = vl53l5cx_check_data_ready(&Dev, &p_data_ready);
- if(p_data_ready){
- status = vl53l5cx_get_resolution(p_dev, &resolution);
- status = vl53l5cx_get_ranging_data(p_dev, &Results);
-
- for(int i = 0; i < resolution;i++){
- /* Print per zone results */
- printf("Zone : %2d, Nb targets : %2u, Ambient : %4lu Kcps/spads, ",
- i,
- Results.nb_target_detected[i],
- Results.ambient_per_spad[i]);
-
- /* Print per target results */
- if(Results.nb_target_detected[i] > 0){
- printf("Target status : %3u, Distance : %4d mm\n",
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE * i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE * i]);
- }else{
- printf("Target status : 255, Distance : No target\n");
- }
- }
- printf("\n");
- }else{
- HAL_Delay(5);
- }
- }
- while(1);
-}
-
-/* USER CODE END 4 */
-
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void)
-{
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
- __disable_irq();
- while (1)
- {
- }
- /* USER CODE END Error_Handler_Debug */
-}
-
-#ifdef USE_FULL_ASSERT
-/**
- * @brief Reports the name of the source file and the source line number
- * where the assert_param error has occurred.
- * @param file: pointer to the source file name
- * @param line: assert_param error line source number
- * @retval None
- */
-void assert_failed(uint8_t *file, uint32_t line)
-{
- /* USER CODE BEGIN 6 */
- /* User can add his own implementation to report the file name and line number,
- ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
- /* USER CODE END 6 */
-}
-#endif /* USE_FULL_ASSERT */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/platform.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/platform.c
deleted file mode 100644
index f325440e4c6ed1e8ad56422c3e63b18676bef155..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/platform.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-#include "platform.h"
-
-extern I2C_HandleTypeDef hi2c1;
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value)
-{
- uint8_t status = 0;
- uint8_t data_write[2];
- uint8_t data_read[1];
-
- data_write[0] = (RegisterAdress >> 8) & 0xFF;
- data_write[1] = RegisterAdress & 0xFF;
- status = HAL_I2C_Master_Transmit(&hi2c1, p_platform->address, data_write, 2, 100);
- status = HAL_I2C_Master_Receive(&hi2c1, p_platform->address, data_read, 1, 100);
- *p_value = data_read[0];
-
- return status;
-}
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value)
-{
- uint8_t data_write[3];
- uint8_t status = 0;
-
- data_write[0] = (RegisterAdress >> 8) & 0xFF;
- data_write[1] = RegisterAdress & 0xFF;
- data_write[2] = value & 0xFF;
- status = HAL_I2C_Master_Transmit(&hi2c1,p_platform->address, data_write, 3, 100);
-
- return status;
-}
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = HAL_I2C_Mem_Write(&hi2c1, p_platform->address, RegisterAdress,
- I2C_MEMADD_SIZE_16BIT, p_values, size, 65535);
- return status;
-}
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status;
- uint8_t data_write[2];
- data_write[0] = (RegisterAdress>>8) & 0xFF;
- data_write[1] = RegisterAdress & 0xFF;
- status = HAL_I2C_Master_Transmit(&hi2c1, p_platform->address, data_write, 2, 100);
- status += HAL_I2C_Master_Receive(&hi2c1, p_platform->address, p_values, size, 100);
-
- return status;
-}
-
-uint8_t VL53L5CX_Reset_Sensor(VL53L5CX_Platform *p_platform)
-{
- /* (Optional) Need to be implemented by customer. This function returns 0 if OK */
-
- /* Set pin LPN to LOW */
- /* Set pin AVDD to LOW */
- /* Set pin VDDIO to LOW */
- VL53L5CX_WaitMs(p_platform, 100);
-
- /* Set pin LPN of to HIGH */
- /* Set pin AVDD of to HIGH */
- /* Set pin VDDIO of to HIGH */
- VL53L5CX_WaitMs(p_platform, 100);
-
- return 0;
-}
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size)
-{
- uint32_t i, tmp;
-
- /* Example of possible implementation using <string.h> */
- for(i = 0; i < size; i = i + 4)
- {
- tmp = (
- buffer[i]<<24)
- |(buffer[i+1]<<16)
- |(buffer[i+2]<<8)
- |(buffer[i+3]);
-
- memcpy(&(buffer[i]), &tmp, 4);
- }
-}
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs)
-{
- HAL_Delay(TimeMs);
- return 0;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_hal_msp.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_hal_msp.c
deleted file mode 100644
index 0477f077bd3ca2e4b8e3601213f72ade33b60b2c..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_hal_msp.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_msp.c
- * @brief This file provides code for the MSP Initialization
- * and de-Initialization codes.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
-
-/* USER CODE END TD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN Define */
-
-/* USER CODE END Define */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN Macro */
-
-/* USER CODE END Macro */
-
-/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* External functions --------------------------------------------------------*/
-/* USER CODE BEGIN ExternalFunctions */
-
-/* USER CODE END ExternalFunctions */
-
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-/**
- * Initializes the Global MSP.
- */
-void HAL_MspInit(void)
-{
- /* USER CODE BEGIN MspInit 0 */
-
- /* USER CODE END MspInit 0 */
-
- __HAL_RCC_SYSCFG_CLK_ENABLE();
- __HAL_RCC_PWR_CLK_ENABLE();
-
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
-
- /* System interrupt init*/
-
- /* USER CODE BEGIN MspInit 1 */
-
- /* USER CODE END MspInit 1 */
-}
-
-/**
-* @brief I2C MSP Initialization
-* This function configures the hardware resources used in this example
-* @param hi2c: I2C handle pointer
-* @retval None
-*/
-void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- if(hi2c->Instance==I2C1)
- {
- /* USER CODE BEGIN I2C1_MspInit 0 */
-
- /* USER CODE END I2C1_MspInit 0 */
-
- __HAL_RCC_GPIOB_CLK_ENABLE();
- /**I2C1 GPIO Configuration
- PB8 ------> I2C1_SCL
- PB9 ------> I2C1_SDA
- */
- GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /* Peripheral clock enable */
- __HAL_RCC_I2C1_CLK_ENABLE();
- /* USER CODE BEGIN I2C1_MspInit 1 */
-
- /* USER CODE END I2C1_MspInit 1 */
- }
-
-}
-
-/**
-* @brief I2C MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param hi2c: I2C handle pointer
-* @retval None
-*/
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
-{
- if(hi2c->Instance==I2C1)
- {
- /* USER CODE BEGIN I2C1_MspDeInit 0 */
-
- /* USER CODE END I2C1_MspDeInit 0 */
- /* Peripheral clock disable */
- __HAL_RCC_I2C1_CLK_DISABLE();
-
- /**I2C1 GPIO Configuration
- PB8 ------> I2C1_SCL
- PB9 ------> I2C1_SDA
- */
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8);
-
- HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9);
-
- /* USER CODE BEGIN I2C1_MspDeInit 1 */
-
- /* USER CODE END I2C1_MspDeInit 1 */
- }
-
-}
-
-/**
-* @brief UART MSP Initialization
-* This function configures the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- if(huart->Instance==USART2)
- {
- /* USER CODE BEGIN USART2_MspInit 0 */
-
- /* USER CODE END USART2_MspInit 0 */
- /* Peripheral clock enable */
- __HAL_RCC_USART2_CLK_ENABLE();
-
- __HAL_RCC_GPIOA_CLK_ENABLE();
- /**USART2 GPIO Configuration
- PA2 ------> USART2_TX
- PA3 ------> USART2_RX
- */
- GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /* USER CODE BEGIN USART2_MspInit 1 */
-
- /* USER CODE END USART2_MspInit 1 */
- }
-
-}
-
-/**
-* @brief UART MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
-{
- if(huart->Instance==USART2)
- {
- /* USER CODE BEGIN USART2_MspDeInit 0 */
-
- /* USER CODE END USART2_MspDeInit 0 */
- /* Peripheral clock disable */
- __HAL_RCC_USART2_CLK_DISABLE();
-
- /**USART2 GPIO Configuration
- PA2 ------> USART2_TX
- PA3 ------> USART2_RX
- */
- HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
-
- /* USER CODE BEGIN USART2_MspDeInit 1 */
-
- /* USER CODE END USART2_MspDeInit 1 */
- }
-
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_it.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_it.c
deleted file mode 100644
index 8d5eb1b7ff07d3c2d5d5778453c9072d8dd95bcd..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/stm32f4xx_it.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f4xx_it.c
- * @brief Interrupt Service Routines.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-#include "stm32f4xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
-
-/* USER CODE END TD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
-
-/******************************************************************************/
-/* Cortex-M4 Processor Interruption and Exception Handlers */
-/******************************************************************************/
-/**
- * @brief This function handles Non maskable interrupt.
- */
-void NMI_Handler(void)
-{
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
- while (1)
- {
- }
- /* USER CODE END NonMaskableInt_IRQn 1 */
-}
-
-/**
- * @brief This function handles Hard fault interrupt.
- */
-void HardFault_Handler(void)
-{
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- /* USER CODE END W1_HardFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Memory management fault.
- */
-void MemManage_Handler(void)
-{
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- /* USER CODE END W1_MemoryManagement_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
-void BusFault_Handler(void)
-{
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- /* USER CODE END W1_BusFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Undefined instruction or illegal state.
- */
-void UsageFault_Handler(void)
-{
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- /* USER CODE END W1_UsageFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles System service call via SWI instruction.
- */
-void SVC_Handler(void)
-{
- /* USER CODE BEGIN SVCall_IRQn 0 */
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
-}
-
-/**
- * @brief This function handles Debug monitor.
- */
-void DebugMon_Handler(void)
-{
- /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
-}
-
-/**
- * @brief This function handles Pendable request for system service.
- */
-void PendSV_Handler(void)
-{
- /* USER CODE BEGIN PendSV_IRQn 0 */
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
-}
-
-/**
- * @brief This function handles System tick timer.
- */
-void SysTick_Handler(void)
-{
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
- HAL_IncTick();
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
-}
-
-/******************************************************************************/
-/* STM32F4xx Peripheral Interrupt Handlers */
-/* Add here the Interrupt Handlers for the used peripherals. */
-/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32f4xx.s). */
-/******************************************************************************/
-
-/**
- * @brief This function handles EXTI line4 interrupt.
- */
-void EXTI4_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(INT_C_Pin);
- /* USER CODE BEGIN EXTI4_IRQn 1 */
-
- /* USER CODE END EXTI4_IRQn 1 */
-}
-
-/**
- * @brief This function handles EXTI line[9:5] interrupts.
- */
-void EXTI9_5_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI9_5_IRQn 0 */
-
- /* USER CODE END EXTI9_5_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(INT_L_Pin);
- /* USER CODE BEGIN EXTI9_5_IRQn 1 */
-
- /* USER CODE END EXTI9_5_IRQn 1 */
-}
-
-/**
- * @brief This function handles EXTI line[15:10] interrupts.
- */
-void EXTI15_10_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI15_10_IRQn 0 */
-
- /* USER CODE END EXTI15_10_IRQn 0 */
- HAL_GPIO_EXTI_IRQHandler(INT_R_Pin);
- HAL_GPIO_EXTI_IRQHandler(B1_Pin);
- /* USER CODE BEGIN EXTI15_10_IRQn 1 */
-
- /* USER CODE END EXTI15_10_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/syscalls.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/syscalls.c
deleted file mode 100644
index 4ec95844de85c102ce90521a9583abdbda653e13..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/syscalls.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/**
- ******************************************************************************
- * @file syscalls.c
- * @author Auto-generated by STM32CubeIDE
- * @brief STM32CubeIDE Minimal System calls file
- *
- * For more information about which c-functions
- * need which of these lowlevel functions
- * please consult the Newlib libc-manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <sys/stat.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <stdio.h>
-#include <signal.h>
-#include <time.h>
-#include <sys/time.h>
-#include <sys/times.h>
-
-
-/* Variables */
-//#undef errno
-extern int errno;
-extern int __io_putchar(int ch) __attribute__((weak));
-extern int __io_getchar(void) __attribute__((weak));
-
-register char * stack_ptr asm("sp");
-
-char *__env[1] = { 0 };
-char **environ = __env;
-
-
-/* Functions */
-void initialise_monitor_handles()
-{
-}
-
-int _getpid(void)
-{
- return 1;
-}
-
-int _kill(int pid, int sig)
-{
- errno = EINVAL;
- return -1;
-}
-
-void _exit (int status)
-{
- _kill(status, -1);
- while (1) {} /* Make sure we hang here */
-}
-
-__attribute__((weak)) int _read(int file, char *ptr, int len)
-{
- int DataIdx;
-
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- {
- *ptr++ = __io_getchar();
- }
-
-return len;
-}
-
-__attribute__((weak)) int _write(int file, char *ptr, int len)
-{
- int DataIdx;
-
- for (DataIdx = 0; DataIdx < len; DataIdx++)
- {
- __io_putchar(*ptr++);
- }
- return len;
-}
-
-int _close(int file)
-{
- return -1;
-}
-
-
-int _fstat(int file, struct stat *st)
-{
- st->st_mode = S_IFCHR;
- return 0;
-}
-
-int _isatty(int file)
-{
- return 1;
-}
-
-int _lseek(int file, int ptr, int dir)
-{
- return 0;
-}
-
-int _open(char *path, int flags, ...)
-{
- /* Pretend like we always fail */
- return -1;
-}
-
-int _wait(int *status)
-{
- errno = ECHILD;
- return -1;
-}
-
-int _unlink(char *name)
-{
- errno = ENOENT;
- return -1;
-}
-
-int _times(struct tms *buf)
-{
- return -1;
-}
-
-int _stat(char *file, struct stat *st)
-{
- st->st_mode = S_IFCHR;
- return 0;
-}
-
-int _link(char *old, char *new)
-{
- errno = EMLINK;
- return -1;
-}
-
-int _fork(void)
-{
- errno = EAGAIN;
- return -1;
-}
-
-int _execve(char *name, char **argv, char **env)
-{
- errno = ENOMEM;
- return -1;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/sysmem.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/sysmem.c
deleted file mode 100644
index d7cc52cd4839dcc6a4f10cd5ad0769e499c12bec..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/sysmem.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/**
- ******************************************************************************
- * @file sysmem.c
- * @author Generated by STM32CubeIDE
- * @brief STM32CubeIDE System Memory calls file
- *
- * For more information about which C functions
- * need which of these lowlevel functions
- * please consult the newlib libc manual
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Includes */
-#include <errno.h>
-#include <stdint.h>
-
-/**
- * Pointer to the current high watermark of the heap usage
- */
-static uint8_t *__sbrk_heap_end = NULL;
-
-/**
- * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
- * and others from the C library
- *
- * @verbatim
- * ############################################################################
- * # .data # .bss # newlib heap # MSP stack #
- * # # # # Reserved by _Min_Stack_Size #
- * ############################################################################
- * ^-- RAM start ^-- _end _estack, RAM end --^
- * @endverbatim
- *
- * This implementation starts allocating at the '_end' linker symbol
- * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
- * The implementation considers '_estack' linker symbol to be RAM end
- * NOTE: If the MSP stack, at any point during execution, grows larger than the
- * reserved size, please increase the '_Min_Stack_Size'.
- *
- * @param incr Memory size
- * @return Pointer to allocated memory
- */
-void *_sbrk(ptrdiff_t incr)
-{
- extern uint8_t _end; /* Symbol defined in the linker script */
- extern uint8_t _estack; /* Symbol defined in the linker script */
- extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
- const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
- const uint8_t *max_heap = (uint8_t *)stack_limit;
- uint8_t *prev_heap_end;
-
- /* Initialize heap end at first call */
- if (NULL == __sbrk_heap_end)
- {
- __sbrk_heap_end = &_end;
- }
-
- /* Protect heap from growing into the reserved MSP stack */
- if (__sbrk_heap_end + incr > max_heap)
- {
- errno = ENOMEM;
- return (void *)-1;
- }
-
- prev_heap_end = __sbrk_heap_end;
- __sbrk_heap_end += incr;
-
- return (void *)prev_heap_end;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/system_stm32f4xx.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/system_stm32f4xx.c
deleted file mode 100644
index a9cfc9609b05ab6451678341b10b01e22c0482c7..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Src/system_stm32f4xx.c
+++ /dev/null
@@ -1,727 +0,0 @@
-/**
- ******************************************************************************
- * @file system_stm32f4xx.c
- * @author MCD Application Team
- * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
- *
- * This file provides two functions and one global variable to be called from
- * user application:
- * - SystemInit(): This function is called at startup just after reset and
- * before branch to main program. This call is made inside
- * the "startup_stm32f4xx.s" file.
- *
- * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
- * by the user application to setup the SysTick
- * timer or configure other parameters.
- *
- * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
- * be called whenever the core clock is changed
- * during program execution.
- *
- *
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f4xx_system
- * @{
- */
-
-/** @addtogroup STM32F4xx_System_Private_Includes
- * @{
- */
-
-
-#include "stm32f4xx.h"
-
-#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Defines
- * @{
- */
-
-/************************* Miscellaneous Configuration ************************/
-/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-/* #define DATA_IN_ExtSRAM */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
- STM32F412Zx || STM32F412Vx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/* #define DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
- STM32F479xx */
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-/******************************************************************************/
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Variables
- * @{
- */
- /* This variable is updated in three ways:
- 1) by calling CMSIS function SystemCoreClockUpdate()
- 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
- 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
- Note: If you use this function to configure the system clock; then there
- is no need to call the 2 first functions listed above, since SystemCoreClock
- variable is updated automatically.
- */
-uint32_t SystemCoreClock = 16000000;
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
- * @{
- */
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
- static void SystemInit_ExtMemCtl(void);
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Functions
- * @{
- */
-
-/**
- * @brief Setup the microcontroller system
- * Initialize the FPU setting, vector table location and External memory
- * configuration.
- * @param None
- * @retval None
- */
-void SystemInit(void)
-{
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- #endif
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
- SystemInit_ExtMemCtl();
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
- /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
- SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
- * @brief Update SystemCoreClock variable according to Clock Register Values.
- * The SystemCoreClock variable contains the core clock (HCLK), it can
- * be used by the user application to setup the SysTick timer or configure
- * other parameters.
- *
- * @note Each time the core clock (HCLK) changes, this function must be called
- * to update SystemCoreClock variable value. Otherwise, any configuration
- * based on this variable will be incorrect.
- *
- * @note - The system frequency computed by this function is not the real
- * frequency in the chip. It is calculated based on the predefined
- * constant and the selected clock source:
- *
- * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
- *
- * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
- *
- * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
- * or HSI_VALUE(*) multiplied/divided by the PLL factors.
- *
- * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 16 MHz) but the real value may vary depending on the variations
- * in voltage and temperature.
- *
- * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
- * depends on the application requirements), user has to ensure that HSE_VALUE
- * is same as the real frequency of the crystal used. Otherwise, this function
- * may have wrong result.
- *
- * - The result of this function could be not correct when using fractional
- * value for HSE crystal.
- *
- * @param None
- * @retval None
- */
-void SystemCoreClockUpdate(void)
-{
- uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
-
- /* Get SYSCLK source -------------------------------------------------------*/
- tmp = RCC->CFGR & RCC_CFGR_SWS;
-
- switch (tmp)
- {
- case 0x00: /* HSI used as system clock source */
- SystemCoreClock = HSI_VALUE;
- break;
- case 0x04: /* HSE used as system clock source */
- SystemCoreClock = HSE_VALUE;
- break;
- case 0x08: /* PLL used as system clock source */
-
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
- SYSCLK = PLL_VCO / PLL_P
- */
- pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
-
- if (pllsource != 0)
- {
- /* HSE used as PLL clock source */
- pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
- }
-
- pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
- SystemCoreClock = pllvco/pllp;
- break;
- default:
- SystemCoreClock = HSI_VALUE;
- break;
- }
- /* Compute HCLK frequency --------------------------------------------------*/
- /* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
- /* HCLK frequency */
- SystemCoreClock >>= tmp;
-}
-
-#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Setup the external memory controller.
- * Called in startup_stm32f4xx.s before jump to main.
- * This function configures the external memories (SRAM/SDRAM)
- * This SRAM/SDRAM will be used as program data memory (including heap and stack).
- * @param None
- * @retval None
- */
-void SystemInit_ExtMemCtl(void)
-{
- __IO uint32_t tmp = 0x00;
-
- register uint32_t tmpreg = 0, timeout = 0xFFFF;
- register __IO uint32_t index;
-
- /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
- RCC->AHB1ENR |= 0x000001F8;
-
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x00CCC0CC;
- GPIOD->AFR[1] = 0xCCCCCCCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xAAAA0A8A;
- /* Configure PDx pins speed to 100 MHz */
- GPIOD->OSPEEDR = 0xFFFF0FCF;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00CC0CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA828A;
- /* Configure PEx pins speed to 100 MHz */
- GPIOE->OSPEEDR = 0xFFFFC3CF;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0xCCCCCCCC;
- GPIOF->AFR[1] = 0xCCCCCCCC;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA800AAA;
- /* Configure PFx pins speed to 50 MHz */
- GPIOF->OSPEEDR = 0xAA800AAA;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0xCCCCCCCC;
- GPIOG->AFR[1] = 0xCCCCCCCC;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0xAAAAAAAA;
- /* Configure PGx pins speed to 50 MHz */
- GPIOG->OSPEEDR = 0xAAAAAAAA;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
- /* Connect PHx pins to FMC Alternate function */
- GPIOH->AFR[0] = 0x00C0CC00;
- GPIOH->AFR[1] = 0xCCCCCCCC;
- /* Configure PHx pins in Alternate function mode */
- GPIOH->MODER = 0xAAAA08A0;
- /* Configure PHx pins speed to 50 MHz */
- GPIOH->OSPEEDR = 0xAAAA08A0;
- /* Configure PHx pins Output type to push-pull */
- GPIOH->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PHx pins */
- GPIOH->PUPDR = 0x00000000;
-
- /* Connect PIx pins to FMC Alternate function */
- GPIOI->AFR[0] = 0xCCCCCCCC;
- GPIOI->AFR[1] = 0x00000CC0;
- /* Configure PIx pins in Alternate function mode */
- GPIOI->MODER = 0x0028AAAA;
- /* Configure PIx pins speed to 50 MHz */
- GPIOI->OSPEEDR = 0x0028AAAA;
- /* Configure PIx pins Output type to push-pull */
- GPIOI->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PIx pins */
- GPIOI->PUPDR = 0x00000000;
-
-/*-- FMC Configuration -------------------------------------------------------*/
- /* Enable the FMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
- FMC_Bank5_6->SDCR[0] = 0x000019E4;
- FMC_Bank5_6->SDTR[0] = 0x01115351;
-
- /* SDRAM initialization sequence */
- /* Clock enable command */
- FMC_Bank5_6->SDCMR = 0x00000011;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Delay */
- for (index = 0; index<1000; index++);
-
- /* PALL command */
- FMC_Bank5_6->SDCMR = 0x00000012;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Auto refresh command */
- FMC_Bank5_6->SDCMR = 0x00000073;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* MRD register program */
- FMC_Bank5_6->SDCMR = 0x00046014;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Set refresh count */
- tmpreg = FMC_Bank5_6->SDRTR;
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-
- /* Disable write protection */
- tmpreg = FMC_Bank5_6->SDCR[0];
- FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001011;
- FMC_Bank1->BTCR[3] = 0x00000201;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001091;
- FMC_Bank1->BTCR[3] = 0x00110212;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-
- (void)(tmp);
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-/**
- * @brief Setup the external memory controller.
- * Called in startup_stm32f4xx.s before jump to main.
- * This function configures the external memories (SRAM/SDRAM)
- * This SRAM/SDRAM will be used as program data memory (including heap and stack).
- * @param None
- * @retval None
- */
-void SystemInit_ExtMemCtl(void)
-{
- __IO uint32_t tmp = 0x00;
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#if defined (DATA_IN_ExtSDRAM)
- register uint32_t tmpreg = 0, timeout = 0xFFFF;
- register __IO uint32_t index;
-
-#if defined(STM32F446xx)
- /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
- clock */
- RCC->AHB1ENR |= 0x0000007D;
-#else
- /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
- clock */
- RCC->AHB1ENR |= 0x000001F8;
-#endif /* STM32F446xx */
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-
-#if defined(STM32F446xx)
- /* Connect PAx pins to FMC Alternate function */
- GPIOA->AFR[0] |= 0xC0000000;
- GPIOA->AFR[1] |= 0x00000000;
- /* Configure PDx pins in Alternate function mode */
- GPIOA->MODER |= 0x00008000;
- /* Configure PDx pins speed to 50 MHz */
- GPIOA->OSPEEDR |= 0x00008000;
- /* Configure PDx pins Output type to push-pull */
- GPIOA->OTYPER |= 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOA->PUPDR |= 0x00000000;
-
- /* Connect PCx pins to FMC Alternate function */
- GPIOC->AFR[0] |= 0x00CC0000;
- GPIOC->AFR[1] |= 0x00000000;
- /* Configure PDx pins in Alternate function mode */
- GPIOC->MODER |= 0x00000A00;
- /* Configure PDx pins speed to 50 MHz */
- GPIOC->OSPEEDR |= 0x00000A00;
- /* Configure PDx pins Output type to push-pull */
- GPIOC->OTYPER |= 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOC->PUPDR |= 0x00000000;
-#endif /* STM32F446xx */
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x000000CC;
- GPIOD->AFR[1] = 0xCC000CCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xA02A000A;
- /* Configure PDx pins speed to 50 MHz */
- GPIOD->OSPEEDR = 0xA02A000A;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00000CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA800A;
- /* Configure PEx pins speed to 50 MHz */
- GPIOE->OSPEEDR = 0xAAAA800A;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0xCCCCCCCC;
- GPIOF->AFR[1] = 0xCCCCCCCC;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA800AAA;
- /* Configure PFx pins speed to 50 MHz */
- GPIOF->OSPEEDR = 0xAA800AAA;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0xCCCCCCCC;
- GPIOG->AFR[1] = 0xCCCCCCCC;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0xAAAAAAAA;
- /* Configure PGx pins speed to 50 MHz */
- GPIOG->OSPEEDR = 0xAAAAAAAA;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)
- /* Connect PHx pins to FMC Alternate function */
- GPIOH->AFR[0] = 0x00C0CC00;
- GPIOH->AFR[1] = 0xCCCCCCCC;
- /* Configure PHx pins in Alternate function mode */
- GPIOH->MODER = 0xAAAA08A0;
- /* Configure PHx pins speed to 50 MHz */
- GPIOH->OSPEEDR = 0xAAAA08A0;
- /* Configure PHx pins Output type to push-pull */
- GPIOH->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PHx pins */
- GPIOH->PUPDR = 0x00000000;
-
- /* Connect PIx pins to FMC Alternate function */
- GPIOI->AFR[0] = 0xCCCCCCCC;
- GPIOI->AFR[1] = 0x00000CC0;
- /* Configure PIx pins in Alternate function mode */
- GPIOI->MODER = 0x0028AAAA;
- /* Configure PIx pins speed to 50 MHz */
- GPIOI->OSPEEDR = 0x0028AAAA;
- /* Configure PIx pins Output type to push-pull */
- GPIOI->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PIx pins */
- GPIOI->PUPDR = 0x00000000;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-/*-- FMC Configuration -------------------------------------------------------*/
- /* Enable the FMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
- /* Configure and enable SDRAM bank1 */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCR[0] = 0x00001954;
-#else
- FMC_Bank5_6->SDCR[0] = 0x000019E4;
-#endif /* STM32F446xx */
- FMC_Bank5_6->SDTR[0] = 0x01115351;
-
- /* SDRAM initialization sequence */
- /* Clock enable command */
- FMC_Bank5_6->SDCMR = 0x00000011;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Delay */
- for (index = 0; index<1000; index++);
-
- /* PALL command */
- FMC_Bank5_6->SDCMR = 0x00000012;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Auto refresh command */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCMR = 0x000000F3;
-#else
- FMC_Bank5_6->SDCMR = 0x00000073;
-#endif /* STM32F446xx */
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* MRD register program */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCMR = 0x00044014;
-#else
- FMC_Bank5_6->SDCMR = 0x00046014;
-#endif /* STM32F446xx */
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Set refresh count */
- tmpreg = FMC_Bank5_6->SDRTR;
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
-#else
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-#endif /* STM32F446xx */
-
- /* Disable write protection */
- tmpreg = FMC_Bank5_6->SDCR[0];
- FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-#endif /* DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-
-#if defined(DATA_IN_ExtSRAM)
-/*-- GPIOs Configuration -----------------------------------------------------*/
- /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
- RCC->AHB1ENR |= 0x00000078;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x00CCC0CC;
- GPIOD->AFR[1] = 0xCCCCCCCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xAAAA0A8A;
- /* Configure PDx pins speed to 100 MHz */
- GPIOD->OSPEEDR = 0xFFFF0FCF;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00CC0CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA828A;
- /* Configure PEx pins speed to 100 MHz */
- GPIOE->OSPEEDR = 0xFFFFC3CF;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0x00CCCCCC;
- GPIOF->AFR[1] = 0xCCCC0000;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA000AAA;
- /* Configure PFx pins speed to 100 MHz */
- GPIOF->OSPEEDR = 0xFF000FFF;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0x00CCCCCC;
- GPIOG->AFR[1] = 0x000000C0;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0x00085AAA;
- /* Configure PGx pins speed to 100 MHz */
- GPIOG->OSPEEDR = 0x000CAFFF;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
-/*-- FMC/FSMC Configuration --------------------------------------------------*/
- /* Enable the FMC/FSMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001011;
- FMC_Bank1->BTCR[3] = 0x00000201;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001091;
- FMC_Bank1->BTCR[3] = 0x00110212;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
- || defined(STM32F412Zx) || defined(STM32F412Vx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FSMC_Bank1->BTCR[2] = 0x00001011;
- FSMC_Bank1->BTCR[3] = 0x00000201;
- FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
-
-#endif /* DATA_IN_ExtSRAM */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
- STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
- (void)(tmp);
-}
-#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Startup/startup_stm32f401retx.s b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Startup/startup_stm32f401retx.s
deleted file mode 100644
index 827afd397c1bb2375cc1517fccfb600c52a46b56..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Core/Startup/startup_stm32f401retx.s
+++ /dev/null
@@ -1,432 +0,0 @@
-/**
- ******************************************************************************
- * @file startup_stm32f401xe.s
- * @author MCD Application Team
- * @brief STM32F401xExx Devices vector table for GCC based toolchains.
- * This module performs:
- * - Set the initial SP
- * - Set the initial PC == Reset_Handler,
- * - Set the vector table entries with the exceptions ISR address
- * - Branches to main in the C library (which eventually
- * calls main()).
- * After Reset the Cortex-M4 processor is in Thread mode,
- * priority is Privileged, and the Stack is set to Main.
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
- .syntax unified
- .cpu cortex-m4
- .fpu softvfp
- .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
-
-/**
- * @brief This is the code that gets called when the processor first
- * starts execution following a reset event. Only the absolutely
- * necessary set is performed, after which the application
- * supplied main() routine is called.
- * @param None
- * @retval : None
-*/
-
- .section .text.Reset_Handler
- .weak Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
- ldr sp, =_estack /* set stack pointer */
-
-/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
- b LoopCopyDataInit
-
-CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
-
-LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
- bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
- movs r3, #0
- str r3, [r2], #4
-
-LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
- bcc FillZerobss
-
-/* Call the clock system intitialization function.*/
- bl SystemInit
-/* Call static constructors */
- bl __libc_init_array
-/* Call the application's entry point.*/
- bl main
- bx lr
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief This is the code that gets called when the processor receives an
- * unexpected interrupt. This simply enters an infinite loop, preserving
- * the system state for examination by a debugger.
- * @param None
- * @retval None
-*/
- .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
- b Infinite_Loop
- .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M3. Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-*******************************************************************************/
- .section .isr_vector,"a",%progbits
- .type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
-
-g_pfnVectors:
- .word _estack
- .word Reset_Handler
- .word NMI_Handler
- .word HardFault_Handler
- .word MemManage_Handler
- .word BusFault_Handler
- .word UsageFault_Handler
- .word 0
- .word 0
- .word 0
- .word 0
- .word SVC_Handler
- .word DebugMon_Handler
- .word 0
- .word PendSV_Handler
- .word SysTick_Handler
-
- /* External Interrupts */
- .word WWDG_IRQHandler /* Window WatchDog */
- .word PVD_IRQHandler /* PVD through EXTI Line detection */
- .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
- .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
- .word FLASH_IRQHandler /* FLASH */
- .word RCC_IRQHandler /* RCC */
- .word EXTI0_IRQHandler /* EXTI Line0 */
- .word EXTI1_IRQHandler /* EXTI Line1 */
- .word EXTI2_IRQHandler /* EXTI Line2 */
- .word EXTI3_IRQHandler /* EXTI Line3 */
- .word EXTI4_IRQHandler /* EXTI Line4 */
- .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
- .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
- .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
- .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
- .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
- .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
- .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
- .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word EXTI9_5_IRQHandler /* External Line[9:5]s */
- .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
- .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
- .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
- .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
- .word TIM2_IRQHandler /* TIM2 */
- .word TIM3_IRQHandler /* TIM3 */
- .word TIM4_IRQHandler /* TIM4 */
- .word I2C1_EV_IRQHandler /* I2C1 Event */
- .word I2C1_ER_IRQHandler /* I2C1 Error */
- .word I2C2_EV_IRQHandler /* I2C2 Event */
- .word I2C2_ER_IRQHandler /* I2C2 Error */
- .word SPI1_IRQHandler /* SPI1 */
- .word SPI2_IRQHandler /* SPI2 */
- .word USART1_IRQHandler /* USART1 */
- .word USART2_IRQHandler /* USART2 */
- .word 0 /* Reserved */
- .word EXTI15_10_IRQHandler /* External Line[15:10]s */
- .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
- .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
- .word 0 /* Reserved */
- .word SDIO_IRQHandler /* SDIO */
- .word TIM5_IRQHandler /* TIM5 */
- .word SPI3_IRQHandler /* SPI3 */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
- .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
- .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
- .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
- .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word OTG_FS_IRQHandler /* USB OTG FS */
- .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
- .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
- .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
- .word USART6_IRQHandler /* USART6 */
- .word I2C3_EV_IRQHandler /* I2C3 event */
- .word I2C3_ER_IRQHandler /* I2C3 error */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word FPU_IRQHandler /* FPU */
- .word 0 /* Reserved */
- .word 0 /* Reserved */
- .word SPI4_IRQHandler /* SPI4 */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
- .weak NMI_Handler
- .thumb_set NMI_Handler,Default_Handler
-
- .weak HardFault_Handler
- .thumb_set HardFault_Handler,Default_Handler
-
- .weak MemManage_Handler
- .thumb_set MemManage_Handler,Default_Handler
-
- .weak BusFault_Handler
- .thumb_set BusFault_Handler,Default_Handler
-
- .weak UsageFault_Handler
- .thumb_set UsageFault_Handler,Default_Handler
-
- .weak SVC_Handler
- .thumb_set SVC_Handler,Default_Handler
-
- .weak DebugMon_Handler
- .thumb_set DebugMon_Handler,Default_Handler
-
- .weak PendSV_Handler
- .thumb_set PendSV_Handler,Default_Handler
-
- .weak SysTick_Handler
- .thumb_set SysTick_Handler,Default_Handler
-
- .weak WWDG_IRQHandler
- .thumb_set WWDG_IRQHandler,Default_Handler
-
- .weak PVD_IRQHandler
- .thumb_set PVD_IRQHandler,Default_Handler
-
- .weak TAMP_STAMP_IRQHandler
- .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
-
- .weak RTC_WKUP_IRQHandler
- .thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
- .weak FLASH_IRQHandler
- .thumb_set FLASH_IRQHandler,Default_Handler
-
- .weak RCC_IRQHandler
- .thumb_set RCC_IRQHandler,Default_Handler
-
- .weak EXTI0_IRQHandler
- .thumb_set EXTI0_IRQHandler,Default_Handler
-
- .weak EXTI1_IRQHandler
- .thumb_set EXTI1_IRQHandler,Default_Handler
-
- .weak EXTI2_IRQHandler
- .thumb_set EXTI2_IRQHandler,Default_Handler
-
- .weak EXTI3_IRQHandler
- .thumb_set EXTI3_IRQHandler,Default_Handler
-
- .weak EXTI4_IRQHandler
- .thumb_set EXTI4_IRQHandler,Default_Handler
-
- .weak DMA1_Stream0_IRQHandler
- .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
-
- .weak DMA1_Stream1_IRQHandler
- .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
-
- .weak DMA1_Stream2_IRQHandler
- .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
-
- .weak DMA1_Stream3_IRQHandler
- .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
-
- .weak DMA1_Stream4_IRQHandler
- .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
-
- .weak DMA1_Stream5_IRQHandler
- .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
-
- .weak DMA1_Stream6_IRQHandler
- .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
-
- .weak ADC_IRQHandler
- .thumb_set ADC_IRQHandler,Default_Handler
-
- .weak EXTI9_5_IRQHandler
- .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
- .weak TIM1_BRK_TIM9_IRQHandler
- .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
-
- .weak TIM1_UP_TIM10_IRQHandler
- .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
-
- .weak TIM1_TRG_COM_TIM11_IRQHandler
- .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
-
- .weak TIM1_CC_IRQHandler
- .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
- .weak TIM2_IRQHandler
- .thumb_set TIM2_IRQHandler,Default_Handler
-
- .weak TIM3_IRQHandler
- .thumb_set TIM3_IRQHandler,Default_Handler
-
- .weak TIM4_IRQHandler
- .thumb_set TIM4_IRQHandler,Default_Handler
-
- .weak I2C1_EV_IRQHandler
- .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
- .weak I2C1_ER_IRQHandler
- .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
- .weak I2C2_EV_IRQHandler
- .thumb_set I2C2_EV_IRQHandler,Default_Handler
-
- .weak I2C2_ER_IRQHandler
- .thumb_set I2C2_ER_IRQHandler,Default_Handler
-
- .weak SPI1_IRQHandler
- .thumb_set SPI1_IRQHandler,Default_Handler
-
- .weak SPI2_IRQHandler
- .thumb_set SPI2_IRQHandler,Default_Handler
-
- .weak USART1_IRQHandler
- .thumb_set USART1_IRQHandler,Default_Handler
-
- .weak USART2_IRQHandler
- .thumb_set USART2_IRQHandler,Default_Handler
-
- .weak EXTI15_10_IRQHandler
- .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
- .weak RTC_Alarm_IRQHandler
- .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
- .weak OTG_FS_WKUP_IRQHandler
- .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
-
- .weak DMA1_Stream7_IRQHandler
- .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
-
- .weak SDIO_IRQHandler
- .thumb_set SDIO_IRQHandler,Default_Handler
-
- .weak TIM5_IRQHandler
- .thumb_set TIM5_IRQHandler,Default_Handler
-
- .weak SPI3_IRQHandler
- .thumb_set SPI3_IRQHandler,Default_Handler
-
- .weak DMA2_Stream0_IRQHandler
- .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
-
- .weak DMA2_Stream1_IRQHandler
- .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
-
- .weak DMA2_Stream2_IRQHandler
- .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
-
- .weak DMA2_Stream3_IRQHandler
- .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
-
- .weak DMA2_Stream4_IRQHandler
- .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
-
- .weak OTG_FS_IRQHandler
- .thumb_set OTG_FS_IRQHandler,Default_Handler
-
- .weak DMA2_Stream5_IRQHandler
- .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
-
- .weak DMA2_Stream6_IRQHandler
- .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
-
- .weak DMA2_Stream7_IRQHandler
- .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
-
- .weak USART6_IRQHandler
- .thumb_set USART6_IRQHandler,Default_Handler
-
- .weak I2C3_EV_IRQHandler
- .thumb_set I2C3_EV_IRQHandler,Default_Handler
-
- .weak I2C3_ER_IRQHandler
- .thumb_set I2C3_ER_IRQHandler,Default_Handler
-
- .weak FPU_IRQHandler
- .thumb_set FPU_IRQHandler,Default_Handler
-
- .weak SPI4_IRQHandler
- .thumb_set SPI4_IRQHandler,Default_Handler
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/LICENSE.txt
deleted file mode 100644
index b40364c28f3652a3ef7e5e6450ad4648d711f28a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/LICENSE.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-This software component is provided to you as part of a software package and
-applicable license terms are in the Package_license file. If you received this
-software component outside of a package or without applicable license terms,
-the terms of the BSD-3-Clause license shall apply.
-You may obtain a copy of the BSD-3-Clause at:
-https://opensource.org/licenses/BSD-3-Clause
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_api.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_api.h
deleted file mode 100644
index 0e870ac0b4a620dbc9c473db4e2919db875d2db8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_api.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_API_H_
-#define VL53L5CX_API_H_
-
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-#pragma anon_unions
-#endif
-
-
-
-#include "platform.h"
-
-/**
- * @brief Current driver version.
- */
-
-#define VL53L5CX_API_REVISION "VL53L5CX_2.0.0"
-
-/**
- * @brief Default I2C address of VL53L5CX sensor. Can be changed using function
- * vl53l5cx_set_i2c_address() function is called.
- */
-
-#define VL53L5CX_DEFAULT_I2C_ADDRESS ((uint16_t)0x52)
-
-/**
- * @brief Macro VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8 allows
- * setting sensor in 4x4 mode or 8x8 mode, using function
- * vl53l5cx_set_resolution().
- */
-
-#define VL53L5CX_RESOLUTION_4X4 ((uint8_t) 16U)
-#define VL53L5CX_RESOLUTION_8X8 ((uint8_t) 64U)
-
-
-/**
- * @brief Macro VL53L5CX_TARGET_ORDER_STRONGEST or VL53L5CX_TARGET_ORDER_CLOSEST
- * are used to select the target order for data output.
- */
-
-#define VL53L5CX_TARGET_ORDER_CLOSEST ((uint8_t) 1U)
-#define VL53L5CX_TARGET_ORDER_STRONGEST ((uint8_t) 2U)
-
-/**
- * @brief Macro VL53L5CX_RANGING_MODE_CONTINUOUS and
- * VL53L5CX_RANGING_MODE_AUTONOMOUS are used to change the ranging mode.
- * Autonomous mode can be used to set a precise integration time, whereas
- * continuous is always maximum.
- */
-
-#define VL53L5CX_RANGING_MODE_CONTINUOUS ((uint8_t) 1U)
-#define VL53L5CX_RANGING_MODE_AUTONOMOUS ((uint8_t) 3U)
-
-/**
- * @brief The default power mode is VL53L5CX_POWER_MODE_WAKEUP. User can choose
- * the mode VL53L5CX_POWER_MODE_SLEEP to save power consumption is the device
- * is not used. The low power mode retains the firmware and the configuration.
- * Both modes can be changed using function vl53l5cx_set_power_mode().
- */
-
-#define VL53L5CX_POWER_MODE_SLEEP ((uint8_t) 0U)
-#define VL53L5CX_POWER_MODE_WAKEUP ((uint8_t) 1U)
-
-/**
- * @brief Macro VL53L5CX_STATUS_OK indicates that VL53L5 sensor has no error.
- * Macro VL53L5CX_STATUS_ERROR indicates that something is wrong (value,
- * I2C access, ...). Macro VL53L5CX_MCU_ERROR is used to indicate a MCU issue.
- */
-
-#define VL53L5CX_STATUS_OK ((uint8_t) 0U)
-#define VL53L5CX_STATUS_TIMEOUT_ERROR ((uint8_t) 1U)
-#define VL53L5CX_STATUS_CORRUPTED_FRAME ((uint8_t) 2U)
-#define VL53L5CX_STATUS_CRC_CSUM_FAILED ((uint8_t) 3U)
-#define VL53L5CX_STATUS_XTALK_FAILED ((uint8_t) 4U)
-#define VL53L5CX_MCU_ERROR ((uint8_t) 66U)
-#define VL53L5CX_STATUS_INVALID_PARAM ((uint8_t) 127U)
-#define VL53L5CX_STATUS_ERROR ((uint8_t) 255U)
-
-/**
- * @brief Definitions for Range results block headers
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0xDB840401U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0xDBC40404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0xDEC40402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0xDF440402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0xE0440401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0xE0840401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xD85808C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0xDB84U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0xDBC4U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0xDEC4U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0xDF44U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0xE044U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0xE084U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xD858U)
-
-#else
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0x57D00401U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0x58900404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0x64900402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0x66900402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0x6A900401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0x6B900401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xCC5008C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0x57D0U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0x5890U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0x6490U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0x6690U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0x6A90U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0x6B90U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xCC50U)
-#endif
-
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_NVM_DATA_SIZE ((uint16_t)492U)
-#define VL53L5CX_CONFIGURATION_SIZE ((uint16_t)972U)
-#define VL53L5CX_OFFSET_BUFFER_SIZE ((uint16_t)488U)
-#define VL53L5CX_XTALK_BUFFER_SIZE ((uint16_t)776U)
-
-#define VL53L5CX_DCI_ZONE_CONFIG ((uint16_t)0x5450U)
-#define VL53L5CX_DCI_FREQ_HZ ((uint16_t)0x5458U)
-#define VL53L5CX_DCI_INT_TIME ((uint16_t)0x545CU)
-#define VL53L5CX_DCI_FW_NB_TARGET ((uint16_t)0x5478)
-#define VL53L5CX_DCI_RANGING_MODE ((uint16_t)0xAD30U)
-#define VL53L5CX_DCI_DSS_CONFIG ((uint16_t)0xAD38U)
-#define VL53L5CX_DCI_VHV_CONFIG ((uint16_t)0xAD60U)
-#define VL53L5CX_DCI_TARGET_ORDER ((uint16_t)0xAE64U)
-#define VL53L5CX_DCI_SHARPENER ((uint16_t)0xAED8U)
-#define VL53L5CX_DCI_INTERNAL_CP ((uint16_t)0xB39CU)
-#define VL53L5CX_DCI_SYNC_PIN ((uint16_t)0xB5F0U)
-#define VL53L5CX_DCI_MOTION_DETECTOR_CFG ((uint16_t)0xBFACU)
-#define VL53L5CX_DCI_SINGLE_RANGE ((uint16_t)0xD964U)
-#define VL53L5CX_DCI_OUTPUT_CONFIG ((uint16_t)0xD968U)
-#define VL53L5CX_DCI_OUTPUT_ENABLES ((uint16_t)0xD970U)
-#define VL53L5CX_DCI_OUTPUT_LIST ((uint16_t)0xD980U)
-#define VL53L5CX_DCI_PIPE_CONTROL ((uint16_t)0xDB80U)
-#define VL53L5CX_GLARE_FILTER ((uint16_t)0xE108U)
-
-
-#define VL53L5CX_UI_CMD_STATUS ((uint16_t)0x2C00U)
-#define VL53L5CX_UI_CMD_START ((uint16_t)0x2C04U)
-#define VL53L5CX_UI_CMD_END ((uint16_t)0x2FFFU)
-
-/**
- * @brief Inner values for API. Max buffer size depends of the selected output.
- */
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-#define L5CX_AMB_SIZE 260U
-#else
-#define L5CX_AMB_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
-#define L5CX_SPAD_SIZE 260U
-#else
-#define L5CX_SPAD_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
-#define L5CX_NTAR_SIZE 68U
-#else
-#define L5CX_NTAR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-#define L5CX_SPS_SIZE ((256U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SPS_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
-#define L5CX_SIGR_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SIGR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
-#define L5CX_DIST_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_DIST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-#define L5CX_RFLEST_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_RFLEST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
-#define L5CX_STA_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_STA_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
-#define L5CX_MOT_SIZE 144U
-#else
-#define L5CX_MOT_SIZE 0U
-#endif
-
-/**
- * @brief Macro VL53L5CX_MAX_RESULTS_SIZE indicates the maximum size used by
- * output through I2C. Value 40 corresponds to headers + meta-data + common-data
- * and 20 corresponds to the footer.
- */
-
-#define VL53L5CX_MAX_RESULTS_SIZE ( 40U \
- + L5CX_AMB_SIZE + L5CX_SPAD_SIZE + L5CX_NTAR_SIZE + L5CX_SPS_SIZE \
- + L5CX_SIGR_SIZE + L5CX_DIST_SIZE + L5CX_RFLEST_SIZE + L5CX_STA_SIZE \
- + L5CX_MOT_SIZE + 20U)
-
-/**
- * @brief Macro VL53L5CX_TEMPORARY_BUFFER_SIZE can be used to know the size of
- * the temporary buffer. The minimum size is 1024, and the maximum depends of
- * the output configuration.
- */
-
-#if VL53L5CX_MAX_RESULTS_SIZE < 1024U
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) 1024U)
-#else
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) VL53L5CX_MAX_RESULTS_SIZE)
-#endif
-
-
-/**
- * @brief Structure VL53L5CX_Configuration contains the sensor configuration.
- * User MUST not manually change these field, except for the sensor address.
- */
-
-typedef struct
-{
- /* Platform, filled by customer into the 'platform.h' file */
- VL53L5CX_Platform platform;
- /* Results streamcount, value auto-incremented at each range */
- uint8_t streamcount;
- /* Size of data read though I2C */
- uint32_t data_read_size;
- /* Address of default configuration buffer */
- uint8_t *default_configuration;
- /* Address of default Xtalk buffer */
- uint8_t *default_xtalk;
- /* Offset buffer */
- uint8_t offset_data[VL53L5CX_OFFSET_BUFFER_SIZE];
- /* Xtalk buffer */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
- /* Temporary buffer used for internal driver processing */
- uint8_t temp_buffer[VL53L5CX_TEMPORARY_BUFFER_SIZE];
- /* Auto-stop flag for stopping the sensor */
- uint8_t is_auto_stop_enabled;
-} VL53L5CX_Configuration;
-
-
-/**
- * @brief Structure VL53L5CX_ResultsData contains the ranging results of
- * VL53L5CX. If user wants more than 1 target per zone, the results can be split
- * into 2 sub-groups :
- * - Per zone results. These results are common to all targets (ambient_per_spad
- * , nb_target_detected and nb_spads_enabled).
- * - Per target results : These results are different relative to the detected
- * target (signal_per_spad, range_sigma_mm, distance_mm, reflectance,
- * target_status).
- */
-
-typedef struct
-{
- /* Internal sensor silicon temperature */
- int8_t silicon_temp_degc;
-
- /* Ambient noise in kcps/spads */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- uint32_t ambient_per_spad[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of valid target detected for 1 zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- uint8_t nb_target_detected[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of spads enabled for this ranging */
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- uint32_t nb_spads_enabled[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Signal returned to the sensor in kcps/spads */
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- uint32_t signal_per_spad[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Sigma of the current distance in mm */
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- uint16_t range_sigma_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Measured distance in mm */
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- int16_t distance_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Estimated reflectance in percent */
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- uint8_t reflectance[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Status indicating the measurement validity (5 & 9 means ranging OK)*/
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- uint8_t target_status[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Motion detector results */
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- struct
- {
- uint32_t global_indicator_1;
- uint32_t global_indicator_2;
- uint8_t status;
- uint8_t nb_of_detected_aggregates;
- uint8_t nb_of_aggregates;
- uint8_t spare;
- uint32_t motion[32];
- } motion_indicator;
-#endif
-
-} VL53L5CX_ResultsData;
-
-
-union Block_header {
- uint32_t bytes;
- struct {
- uint32_t type : 4;
- uint32_t size : 12;
- uint32_t idx : 16;
- };
-};
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive);
-
-/**
- * @brief Mandatory function used to initialize the sensor. This function must
- * be called after a power on, to load the firmware into the VL53L5CX. It takes
- * a few hundred milliseconds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if initialization is OK.
- */
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to change the I2C address of the sensor. If
- * multiple VL53L5 sensors are connected to the same I2C line, all other LPn
- * pins needs to be set to Low. The default sensor address is 0x52.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) i2c_address : New I2C address.
- * @return (uint8_t) status : 0 if new address is OK
- */
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address);
-
-/**
- * @brief This function is used to get the current sensor power mode.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_power_mode : Current power mode. The value of this
- * pointer is equal to 0 if the sensor is in low power,
- * (VL53L5CX_POWER_MODE_SLEEP), or 1 if sensor is in standard mode
- * (VL53L5CX_POWER_MODE_WAKEUP).
- * @return (uint8_t) status : 0 if power mode is OK
- */
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode);
-
-/**
- * @brief This function is used to set the sensor in Low Power mode, for
- * example if the sensor is not used during a long time. The macro
- * VL53L5CX_POWER_MODE_SLEEP can be used to enable the low power mode. When user
- * want to restart the sensor, he can use macro VL53L5CX_POWER_MODE_WAKEUP.
- * Please ensure that the device is not streaming before calling the function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) power_mode : Selected power mode (VL53L5CX_POWER_MODE_SLEEP
- * or VL53L5CX_POWER_MODE_WAKEUP)
- * @return (uint8_t) status : 0 if power mode is OK, or 127 if power mode
- * requested by user is not valid.
- */
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode);
-
-/**
- * @brief This function starts a ranging session. When the sensor streams, host
- * cannot change settings 'on-the-fly'.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if start is OK.
- */
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function stops the ranging session. It must be used when the
- * sensor streams, after calling vl53l5cx_start_ranging().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if stop is OK
- */
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function checks if a new data is ready by polling I2C. If a new
- * data is ready, a flag will be raised.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_isReady : Value of this pointer be updated to 0 if data
- * is not ready, or 1 if a new data is ready.
- * @return (uint8_t) status : 0 if I2C reading is OK
- */
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady);
-
-/**
- * @brief This function gets the ranging data, using the selected output and the
- * resolution.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_ResultsData) *p_results : VL53L5 results structure.
- * @return (uint8_t) status : 0 data are successfully get.
- */
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results);
-
-/**
- * @brief This function gets the current resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_resolution : Value of this pointer will be equal to 16
- * for 4x4 mode, and 64 for 8x8 mode.
- * @return (uint8_t) status : 0 if resolution is OK.
- */
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution);
-
-/**
- * @brief This function sets a new resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) resolution : Use macro VL53L5CX_RESOLUTION_4X4 or
- * VL53L5CX_RESOLUTION_8X8 to set the resolution.
- * @return (uint8_t) status : 0 if set resolution is OK.
- */
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution);
-
-/**
- * @brief This function gets the current ranging frequency in Hz. Ranging
- * frequency corresponds to the time between each measurement.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_frequency_hz: Contains the ranging frequency in Hz.
- * @return (uint8_t) status : 0 if ranging frequency is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz);
-
-/**
- * @brief This function sets a new ranging frequency in Hz. Ranging frequency
- * corresponds to the measurements frequency. This setting depends of
- * the resolution, so please select your resolution before using this function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) frequency_hz : Contains the ranging frequency in Hz.
- * - For 4x4, min and max allowed values are : [1;60]
- * - For 8x8, min and max allowed values are : [1;15]
- * @return (uint8_t) status : 0 if ranging frequency is OK, or 127 if the value
- * is not correct.
- */
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz);
-
-/**
- * @brief This function gets the current integration time in ms.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_time_ms: Contains integration time in ms.
- * @return (uint8_t) status : 0 if integration time is OK.
- */
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms);
-
-/**
- * @brief This function sets a new integration time in ms. Integration time must
- * be computed to be lower than the ranging period, for a selected resolution.
- * Please note that this function has no impact on ranging mode continous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) time_ms : Contains the integration time in ms. For all
- * resolutions and frequency, the minimum value is 2ms, and the maximum is
- * 1000ms.
- * @return (uint8_t) status : 0 if set integration time is OK.
- */
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms);
-
-/**
- * @brief This function gets the current sharpener in percent. Sharpener can be
- * changed to blur more or less zones depending of the application.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_sharpener_percent: Contains the sharpener in percent.
- * @return (uint8_t) status : 0 if get sharpener is OK.
- */
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent);
-
-/**
- * @brief This function sets a new sharpener value in percent. Sharpener can be
- * changed to blur more or less zones depending of the application. Min value is
- * 0 (disabled), and max is 99.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) sharpener_percent : Value between 0 (disabled) and 99%.
- * @return (uint8_t) status : 0 if set sharpener is OK.
- */
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent);
-
-/**
- * @brief This function gets the current target order (closest or strongest).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_target_order: Contains the target order.
- * @return (uint8_t) status : 0 if get target order is OK.
- */
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order);
-
-/**
- * @brief This function sets a new target order. Please use macros
- * VL53L5CX_TARGET_ORDER_STRONGEST and VL53L5CX_TARGET_ORDER_CLOSEST to define
- * the new output order. By default, the sensor is configured with the strongest
- * output.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) target_order : Required target order.
- * @return (uint8_t) status : 0 if set target order is OK, or 127 if target
- * order is unknown.
- */
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order);
-
-/**
- * @brief This function is used to get the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_ranging_mode : current ranging mode
- * @return (uint8_t) status : 0 if get ranging mode is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode);
-
-/**
- * @brief This function is used to set the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) ranging_mode : Use macros VL53L5CX_RANGING_MODE_CONTINUOUS,
- * VL53L5CX_RANGING_MODE_CONTINUOUS.
- * @return (uint8_t) status : 0 if set ranging mode is OK.
- */
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode);
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to get the number of frames between 2 temperature
- * compensation.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_repeat_count : Number of frames before next temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count);
-
-/**
- * @brief This function is used to set a periodic temperature compensation. By
- * setting a repeat count different to 0 the firmware automatically runs a
- * temperature calibration every N frames.
- * default the repeat count is set to 0
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) repeat_count : Number of frames between temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count);
-
-/**
- * @brief This function can be used to read 'extra data' from DCI. Using a known
- * index, the function fills the casted structure passed in argument.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ....
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to write 'extra data' to DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to replace 'extra data' in DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @param (uint8_t) *new_data : Contains the new fields.
- * @param (uint16_t) new_data_size : New data size.
- * @param (uint16_t) new_data_pos : New data position into the buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos);
-
-#endif //VL53L5CX_API_H_
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h
deleted file mode 100644
index 35eaff8b0efc6ee9eaebd24338d2a214c986fdea..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h
+++ /dev/null
@@ -1,22012 +0,0 @@
-
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef VL53L5CX_BUFFERS_H_
-#define VL53L5CX_BUFFERS_H_
-
-#include "platform.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_RANGING 2
-#else
-#define VL53L5CX_FW_NBTAR_RANGING VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief This buffer contains the VL53L5CX firmware (MM1.8)
- */
-
-const uint8_t VL53L5CX_FIRMWARE[] = {
-
- 0xe0, 0x00, 0x03, 0x08,
- 0xe0, 0x00, 0x0a, 0xc8,
- 0xe0, 0x00, 0x05, 0x08,
- 0xe0, 0x64, 0x08, 0x48,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x64, 0x2e, 0x28,
- 0xe0, 0x64, 0x31, 0xe8,
- 0xe0, 0x64, 0x35, 0x48,
- 0xe0, 0x64, 0x3b, 0x88,
- 0xe0, 0x68, 0x04, 0x68,
- 0xe0, 0x68, 0x17, 0x68,
- 0xe0, 0x68, 0x1b, 0x48,
- 0xe0, 0x68, 0x1e, 0xc8,
- 0xe0, 0x68, 0x25, 0x28,
- 0xe0, 0x68, 0x28, 0x48,
- 0xe0, 0x00, 0x09, 0xe8,
- 0xe0, 0x00, 0x09, 0xc8,
- 0xe0, 0x00, 0x09, 0xa8,
- 0xe0, 0x00, 0x09, 0x88,
- 0xe0, 0x00, 0x09, 0x68,
- 0xe0, 0x00, 0x09, 0x48,
- 0xf8, 0x02, 0x00, 0x06,
- 0xc1, 0xc3, 0x81, 0x01,
- 0x1e, 0x06, 0xa1, 0x0b,
- 0x1a, 0x06, 0x81, 0x00,
- 0x99, 0x23, 0xe1, 0x00,
- 0x97, 0xb3, 0x97, 0xe3,
- 0x06, 0x2c, 0x97, 0x73,
- 0x06, 0x34, 0xe2, 0xc0,
- 0x06, 0x2c, 0xfc, 0x80,
- 0xc1, 0x83, 0xe3, 0x40,
- 0xe2, 0xc0, 0x06, 0x1c,
- 0xfc, 0x98, 0x06, 0x34,
- 0xfc, 0x9c, 0x06, 0x34,
- 0xe3, 0x40, 0x06, 0x1c,
- 0x69, 0x38, 0xc1, 0x83,
- 0xc1, 0x43, 0xe8, 0x00,
- 0xc1, 0xc3, 0x81, 0x05,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0xf4, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xff, 0x84, 0x07, 0xfc,
- 0x9a, 0x14, 0xd8, 0x04,
- 0xe4, 0x30, 0x04, 0x60,
- 0xfc, 0x12, 0x4c, 0x06,
- 0xe0, 0xd0, 0x4c, 0x4a,
- 0xc1, 0xc3, 0x82, 0x15,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf8, 0x04, 0x17, 0x0c,
- 0x81, 0x93, 0x81, 0x83,
- 0xe2, 0xc0, 0x0c, 0x2c,
- 0x1c, 0x8c, 0xd1, 0x67,
- 0xe3, 0x6b, 0xe4, 0x04,
- 0xe5, 0x6b, 0x8e, 0x05,
- 0x80, 0x64, 0x03, 0x88,
- 0x04, 0xd8, 0xe7, 0x6b,
- 0xe9, 0x6b, 0x80, 0x64,
- 0xeb, 0x6b, 0x8a, 0xc5,
- 0x80, 0x64, 0x06, 0x08,
- 0x0a, 0x58, 0xed, 0x6b,
- 0xf1, 0x6b, 0x80, 0x64,
- 0x80, 0x64, 0x07, 0x28,
- 0x08, 0x78, 0xf3, 0x6b,
- 0xf5, 0x6b, 0x80, 0x64,
- 0xf7, 0x6b, 0x8a, 0xc5,
- 0xf9, 0x6b, 0x8c, 0x05,
- 0xfb, 0x6b, 0x8c, 0x45,
- 0x0c, 0x0a, 0x8a, 0x45,
- 0x8a, 0x65, 0xe4, 0xb4,
- 0xe4, 0xb8, 0x0c, 0x0a,
- 0x0a, 0x78, 0x84, 0x45,
- 0x40, 0x06, 0xe0, 0x64,
- 0x40, 0x4a, 0xfc, 0x12,
- 0x80, 0xd5, 0xe0, 0xd0,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x1f, 0x0c, 0xc1, 0xc3,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf7, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xc1, 0xc3, 0xc1, 0x43,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x60, 0x00, 0x06, 0xda,
- 0x0a, 0x20, 0xa1, 0x0b,
- 0x18, 0x30, 0x64, 0x00,
- 0x0e, 0x24, 0xe4, 0x00,
- 0x02, 0x0a, 0x37, 0x80,
- 0x0c, 0x06, 0x80, 0x00,
- 0x08, 0x34, 0x20, 0x00,
- 0x0a, 0x70, 0xb7, 0x80,
- 0x58, 0x42, 0xa4, 0x04,
- 0x81, 0x61, 0x32, 0x98,
- 0x21, 0x2b, 0xaa, 0x45,
- 0x06, 0x0a, 0x8c, 0xbb,
- 0x0c, 0x10, 0x00, 0x00,
- 0x04, 0x00, 0xe4, 0x00,
- 0x18, 0x1a, 0x64, 0x00,
- 0xa8, 0x25, 0xe0, 0x00,
- 0x08, 0x04, 0xa1, 0x1d,
- 0x0e, 0x14, 0x57, 0x80,
- 0x10, 0x06, 0xd7, 0x80,
- 0x04, 0x40, 0x40, 0x00,
- 0x08, 0x54, 0xc4, 0x04,
- 0x4c, 0x72, 0x76, 0x80,
- 0x10, 0xc4, 0xd2, 0xa0,
- 0x14, 0x40, 0x76, 0x80,
- 0x0e, 0x64, 0xa4, 0x80,
- 0x12, 0x24, 0xf6, 0x80,
- 0xa1, 0x6b, 0x76, 0x80,
- 0x3c, 0x01, 0x54, 0x80,
- 0x8c, 0x8b, 0x40, 0x00,
- 0x04, 0x80, 0x08, 0x90,
- 0xdc, 0x00, 0x48, 0x70,
- 0x84, 0x9b, 0x28, 0xa3,
- 0xec, 0x04, 0x0e, 0xa0,
- 0x9e, 0xe5, 0xa0, 0x7d,
- 0x96, 0x4b, 0x21, 0x7b,
- 0x0e, 0x8a, 0x86, 0x45,
- 0x0e, 0x9a, 0xe5, 0x00,
- 0x00, 0x06, 0x44, 0x80,
- 0x16, 0xa0, 0x80, 0x00,
- 0x08, 0x54, 0x2c, 0x84,
- 0xc0, 0x00, 0x28, 0x9c,
- 0x20, 0x01, 0x0e, 0x4a,
- 0x00, 0x54, 0x40, 0x00,
- 0x00, 0xc4, 0xa8, 0xac,
- 0xc0, 0x00, 0x28, 0x9d,
- 0x0f, 0x9c, 0x14, 0x54,
- 0x40, 0x02, 0x88, 0x5b,
- 0x80, 0xcb, 0x99, 0xa8,
- 0x61, 0x84, 0x00, 0x84,
- 0xe1, 0x84, 0x08, 0x94,
- 0x12, 0x84, 0x01, 0xcb,
- 0x32, 0x4f, 0xe0, 0xfc,
- 0xe4, 0x04, 0x1c, 0x70,
- 0x4b, 0x0a, 0x01, 0xa1,
- 0x58, 0xda, 0x84, 0x10,
- 0x94, 0xbb, 0x64, 0x00,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x1c, 0x70, 0xc6, 0x1f,
- 0x00, 0xc4, 0x24, 0x08,
- 0x0e, 0x54, 0xa0, 0x84,
- 0x08, 0x54, 0x21, 0xfc,
- 0x40, 0x02, 0xa0, 0x84,
- 0xa1, 0xeb, 0x39, 0x9c,
- 0x3c, 0x00, 0x58, 0x00,
- 0xbc, 0x00, 0x4a, 0x40,
- 0x1d, 0x5a, 0x08, 0xc5,
- 0x0e, 0xe0, 0xe0, 0x04,
- 0x0d, 0xcb, 0xec, 0x04,
- 0xe1, 0xfc, 0x00, 0xa4,
- 0x4b, 0x0a, 0x42, 0xb7,
- 0x58, 0xfa, 0x84, 0x08,
- 0x08, 0xc4, 0x64, 0x18,
- 0x10, 0xa4, 0xe0, 0xfc,
- 0x40, 0x0a, 0x60, 0x84,
- 0x20, 0xbf, 0xed, 0x8c,
- 0x00, 0x54, 0x90, 0xab,
- 0x14, 0x84, 0x61, 0x84,
- 0x28, 0x0f, 0x9c, 0x80,
- 0x91, 0x94, 0x48, 0x22,
- 0x13, 0xb0, 0x4a, 0x62,
- 0x4c, 0x50, 0xc3, 0xc7,
- 0x80, 0x5b, 0x1c, 0x00,
- 0x27, 0xf0, 0x4e, 0xd8,
- 0x9c, 0x00, 0x44, 0x40,
- 0x96, 0x0b, 0x21, 0x1d,
- 0x57, 0x80, 0x04, 0xa4,
- 0xd7, 0x80, 0x02, 0xb4,
- 0x40, 0x00, 0x06, 0x06,
- 0xc4, 0x04, 0x04, 0x20,
- 0x52, 0x8c, 0x42, 0x12,
- 0x40, 0x10, 0x94, 0x6b,
- 0x4c, 0x20, 0x5c, 0x00,
- 0x80, 0x1b, 0xdc, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x8c, 0x1b, 0x7f, 0xc5,
- 0x80, 0x6b, 0x7f, 0xa5,
- 0x96, 0x7b, 0x73, 0xe5,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0xc1, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0xa0, 0x85, 0x98, 0x6b,
- 0x76, 0x80, 0x0a, 0x14,
- 0x08, 0x24, 0xa1, 0x2b,
- 0x06, 0x0a, 0x76, 0x80,
- 0x0c, 0x04, 0x80, 0x00,
- 0x98, 0x8b, 0x76, 0x80,
- 0x06, 0x1a, 0x1e, 0xc5,
- 0x18, 0x34, 0xe0, 0x00,
- 0xa1, 0x1b, 0x76, 0x80,
- 0xa4, 0x80, 0x0e, 0x40,
- 0x3c, 0x01, 0x4e, 0xc0,
- 0x08, 0x60, 0xc0, 0x00,
- 0x48, 0x50, 0x04, 0x80,
- 0xa8, 0x73, 0xdc, 0x00,
- 0xec, 0x04, 0x0a, 0x70,
- 0x9a, 0xc5, 0xa0, 0x5d,
- 0x90, 0xcb, 0x21, 0x5b,
- 0x0a, 0x8a, 0x86, 0x45,
- 0x0a, 0x9a, 0xe5, 0x00,
- 0x08, 0x06, 0x44, 0x80,
- 0x10, 0x70, 0x80, 0x00,
- 0x0a, 0x4a, 0x2c, 0x84,
- 0xc0, 0x00, 0x20, 0x00,
- 0x28, 0x95, 0x08, 0x34,
- 0x0c, 0x24, 0x40, 0x00,
- 0x08, 0x24, 0x8f, 0x94,
- 0x18, 0x24, 0x28, 0xa0,
- 0xc0, 0x00, 0x28, 0x94,
- 0x19, 0x98, 0x48, 0x42,
- 0x88, 0x3b, 0x98, 0x2b,
- 0x61, 0x84, 0x08, 0x14,
- 0xe0, 0xfc, 0x0c, 0x14,
- 0x61, 0x84, 0x18, 0x04,
- 0x2c, 0xcf, 0x89, 0x3b,
- 0xe4, 0x10, 0x46, 0xda,
- 0x04, 0x30, 0x45, 0x0a,
- 0xe4, 0x04, 0x12, 0x50,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x12, 0x50, 0x81, 0xc1,
- 0x0c, 0x24, 0x24, 0x08,
- 0x08, 0x34, 0xa1, 0xfc,
- 0x0a, 0x24, 0x20, 0x84,
- 0x48, 0x42, 0xa0, 0x84,
- 0xa1, 0x9b, 0x39, 0x98,
- 0x3c, 0x00, 0x46, 0x40,
- 0xbc, 0x00, 0x44, 0x50,
- 0x13, 0x5a, 0x18, 0x6b,
- 0x88, 0xc5, 0xe0, 0x04,
- 0xec, 0x04, 0x0e, 0x90,
- 0x46, 0xfa, 0x03, 0x3b,
- 0x45, 0x0a, 0xe4, 0x04,
- 0x0a, 0x24, 0x04, 0x00,
- 0x10, 0x34, 0xe1, 0x84,
- 0xc2, 0x67, 0x60, 0xfc,
- 0x60, 0x84, 0x1c, 0xc4,
- 0xed, 0x8c, 0x40, 0x0a,
- 0x61, 0x84, 0x08, 0x34,
- 0x10, 0xc4, 0xb0, 0x5f,
- 0x9c, 0xcb, 0x61, 0xfc,
- 0x50, 0x02, 0x30, 0x6f,
- 0x44, 0x12, 0x91, 0x88,
- 0x88, 0x3b, 0x13, 0x8c,
- 0x1c, 0x00, 0x42, 0x20,
- 0x40, 0x80, 0x8a, 0x2b,
- 0x18, 0xe4, 0x1c, 0x00,
- 0x4f, 0xd8, 0x9c, 0x80,
- 0x18, 0x0b, 0xa7, 0xec,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x75, 0xf5, 0xff, 0x95,
- 0xc1, 0xc3, 0x90, 0x5b,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x80, 0x8b, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0x04, 0x6b, 0x82, 0x9b,
- 0x80, 0xe5, 0x86, 0x7b,
- 0x06, 0x0a, 0xa1, 0x2b,
- 0x40, 0x0a, 0x80, 0x00,
- 0x80, 0xe5, 0xe5, 0x9c,
- 0x84, 0x1b, 0x81, 0x21,
- 0x0c, 0x0c, 0x84, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x68, 0x00, 0x41, 0x88,
- 0x00, 0xbb, 0x84, 0x1b,
- 0x02, 0xab, 0x90, 0x0b,
- 0x41, 0x18, 0x8e, 0x1b,
- 0x00, 0x7b, 0xe8, 0x00,
- 0x40, 0xd8, 0x92, 0x0b,
- 0x8c, 0x1b, 0x68, 0x00,
- 0x44, 0xb2, 0x81, 0x31,
- 0x42, 0xa2, 0xf0, 0x8c,
- 0x86, 0x23, 0xf2, 0x9c,
- 0x42, 0x12, 0x7d, 0x85,
- 0xc1, 0xc3, 0xf2, 0x80,
- 0xe6, 0x86, 0x4a, 0x0e,
- 0xe7, 0x06, 0x58, 0x0e,
- 0x66, 0x06, 0x46, 0x0e,
- 0xe1, 0xc0, 0x08, 0x54,
- 0x67, 0x86, 0x44, 0x0e,
- 0xe0, 0xc0, 0x00, 0xc4,
- 0x02, 0xc4, 0x60, 0x57,
- 0x8a, 0x03, 0xe1, 0xc0,
- 0xf2, 0x90, 0x42, 0x12,
- 0x5d, 0x93, 0x86, 0x03,
- 0xf2, 0x88, 0x42, 0x12,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc1, 0x7c, 0x02, 0x14,
- 0xdc, 0x00, 0x40, 0x10,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x08, 0x00, 0x14,
- 0xc1, 0x7c, 0x02, 0x14,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x08,
- 0xdd, 0x93, 0x99, 0x8c,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x00, 0x06,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x88, 0x00, 0x14,
- 0xc0, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x88,
- 0xdd, 0x93, 0x99, 0x8c,
- 0x81, 0x41, 0x61, 0x0b,
- 0x06, 0x14, 0x8a, 0x25,
- 0xe1, 0x1b, 0x76, 0x80,
- 0x76, 0x80, 0x04, 0x04,
- 0x08, 0x85, 0x81, 0x41,
- 0x06, 0x30, 0xa4, 0x33,
- 0x04, 0x04, 0x6c, 0x04,
- 0xa0, 0x3d, 0xe1, 0x84,
- 0xa1, 0x3b, 0x86, 0xe5,
- 0xc8, 0x8c, 0x02, 0x14,
- 0x64, 0x04, 0x18, 0x30,
- 0xe4, 0x08, 0x43, 0x1a,
- 0x24, 0x08, 0x18, 0x30,
- 0xa0, 0x84, 0x02, 0x14,
- 0x0a, 0xc0, 0x21, 0xcb,
- 0x19, 0x5a, 0xec, 0x04,
- 0x82, 0x45, 0xe0, 0x04,
- 0xc2, 0x47, 0x40, 0x1d,
- 0x1c, 0x80, 0x08, 0x44,
- 0x91, 0x84, 0x40, 0x02,
- 0x27, 0xfc, 0x4a, 0x98,
- 0x5d, 0x93, 0xc3, 0x17,
- 0x7f, 0xe5, 0x88, 0x0b,
- 0x7d, 0x55, 0x80, 0x4b,
- 0xc1, 0xc3, 0x88, 0x3b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x00, 0x6b,
- 0xe8, 0x04, 0x50, 0x48,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x00, 0x15, 0x80, 0x04,
- 0xa1, 0x1b, 0xe0, 0x3c,
- 0xdc, 0x38, 0x42, 0x08,
- 0x68, 0x04, 0x57, 0xc8,
- 0xc1, 0xc3, 0x8c, 0x0b,
- 0xfa, 0x04, 0x04, 0x7c,
- 0x74, 0xa9, 0x46, 0x4e,
- 0x49, 0x0e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x88, 0x25, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x84, 0x25, 0xf0, 0x0c,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0x60, 0x01, 0x00, 0x98,
- 0x04, 0x20, 0x80, 0x00,
- 0xc1, 0x16, 0xec, 0x04,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x04, 0x20, 0xfe, 0x65,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x85, 0xc1, 0x1e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x48,
- 0x45, 0xc8, 0xc1, 0x16,
- 0xfb, 0xf5, 0x87, 0xfc,
- 0xe1, 0x98, 0x41, 0x46,
- 0x61, 0x91, 0x43, 0x06,
- 0x80, 0x1e, 0xc0, 0x00,
- 0x81, 0x11, 0x9b, 0x01,
- 0x81, 0x31, 0x81, 0x21,
- 0xe8, 0x04, 0x4a, 0x88,
- 0x8c, 0x45, 0xa1, 0x0b,
- 0x74, 0xa9, 0x06, 0xce,
- 0x48, 0x4e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x8a, 0x45, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x86, 0x25, 0xf0, 0x0c,
- 0xf0, 0x0c, 0x4c, 0x10,
- 0xe4, 0x18, 0x4a, 0x5a,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0xa0, 0x00, 0x01, 0x28,
- 0x60, 0x01, 0x00, 0xa8,
- 0xc5, 0x50, 0x80, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x00, 0x4a, 0xc1, 0x56,
- 0xfe, 0x45, 0xf8, 0x0c,
- 0x04, 0x20, 0xc5, 0x54,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x65, 0xc1, 0x5e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x88,
- 0xc1, 0x56, 0xc5, 0x50,
- 0x87, 0xfc, 0x45, 0x88,
- 0x47, 0x86, 0xfb, 0x65,
- 0x08, 0xf0, 0xe1, 0x90,
- 0x8c, 0x4e, 0xe4, 0x30,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x81, 0x61, 0xff, 0x65,
- 0x00, 0x46, 0xe1, 0x6b,
- 0x4c, 0x08, 0xe1, 0xa4,
- 0x8b, 0x04, 0xdc, 0x38,
- 0xfe, 0x24, 0x89, 0x14,
- 0xe8, 0x6c, 0x65, 0x68,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x75, 0x78, 0xff, 0x65,
- 0x0c, 0x7c, 0xef, 0xfc,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x80, 0x55, 0xa1, 0x1b,
- 0x0a, 0x00, 0x83, 0x11,
- 0x40, 0x06, 0xe5, 0x50,
- 0x40, 0x4a, 0xfc, 0x12,
- 0xd7, 0xf4, 0xe0, 0xd0,
- 0xc1, 0xc3, 0x82, 0xb5,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0x3f,
- 0xf4, 0x04, 0x0b, 0x2f,
- 0xf4, 0x04, 0x0b, 0x1f,
- 0xf4, 0x04, 0x0b, 0x0f,
- 0x0a, 0x50, 0x81, 0x35,
- 0x40, 0x5a, 0xec, 0x40,
- 0x44, 0x06, 0xe0, 0xbc,
- 0x44, 0x6a, 0xbc, 0x22,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x98,
- 0x0a, 0xff, 0xc0, 0x00,
- 0xc1, 0xc3, 0xf4, 0x04,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0xf5,
- 0xf4, 0x04, 0x0b, 0xe5,
- 0xf4, 0x04, 0x0b, 0xd5,
- 0xf4, 0x04, 0x0b, 0xc5,
- 0xf4, 0x04, 0x0b, 0xb5,
- 0xf4, 0x04, 0x0b, 0xa5,
- 0xf4, 0x04, 0x0b, 0x95,
- 0xf4, 0x04, 0x0b, 0x85,
- 0x0a, 0xff, 0x81, 0x55,
- 0x0a, 0x50, 0xf4, 0x04,
- 0xd7, 0xe4, 0xec, 0x80,
- 0xd7, 0xb4, 0xd7, 0xd4,
- 0xd7, 0x94, 0xd7, 0xa4,
- 0xd7, 0x74, 0xd7, 0x84,
- 0x82, 0x0b, 0x94, 0x64,
- 0xfa, 0x00, 0x5c, 0x08,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0xe4, 0x40, 0x04, 0x8a,
- 0x21, 0x2b, 0x80, 0xa5,
- 0x82, 0x15, 0x80, 0x3b,
- 0x46, 0x12, 0x81, 0xf5,
- 0x06, 0x4a, 0xf9, 0x80,
- 0x82, 0xb5, 0xf8, 0x0c,
- 0x04, 0x20, 0x80, 0x3b,
- 0x04, 0x4a, 0xec, 0x04,
- 0xc5, 0x48, 0xe4, 0x00,
- 0x45, 0x88, 0xcd, 0x46,
- 0x0c, 0x4c, 0x87, 0xfc,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x6c, 0x40, 0x0a, 0x20,
- 0x49, 0x27, 0xe1, 0xc1,
- 0x04, 0x20, 0x8a, 0xcf,
- 0x06, 0xc0, 0x6c, 0x04,
- 0x04, 0x4a, 0xe4, 0x40,
- 0x48, 0x12, 0x64, 0x00,
- 0x00, 0x33, 0xf0, 0x8c,
- 0x02, 0x75, 0x80, 0x6b,
- 0x02, 0x85, 0xf0, 0x10,
- 0x02, 0x95, 0xf8, 0x0c,
- 0x02, 0xa5, 0xf8, 0x08,
- 0x4c, 0x75, 0xf8, 0x04,
- 0x4c, 0x85, 0xf0, 0x10,
- 0x4c, 0x95, 0xf8, 0x0c,
- 0x4c, 0xa5, 0xf8, 0x08,
- 0x44, 0x08, 0xf8, 0x04,
- 0x44, 0x52, 0x87, 0xf8,
- 0xe9, 0x2d, 0xf1, 0xb0,
- 0x0a, 0x20, 0x86, 0x95,
- 0xc5, 0x27, 0x6c, 0x10,
- 0x61, 0x88, 0x0e, 0x54,
- 0xec, 0x04, 0x0c, 0x20,
- 0x64, 0x04, 0x18, 0x70,
- 0xe4, 0x00, 0x0c, 0x4a,
- 0x04, 0x74, 0x44, 0xc7,
- 0x42, 0x42, 0xe0, 0x88,
- 0x86, 0x7b, 0x70, 0xb0,
- 0xdd, 0x8e, 0xd1, 0x84,
- 0x87, 0xfc, 0x4d, 0x88,
- 0x71, 0x88, 0x44, 0x52,
- 0xa1, 0x2b, 0x98, 0x33,
- 0xf7, 0xe5, 0xec, 0xf5,
- 0x88, 0x1b, 0x21, 0x2b,
- 0xf7, 0xa5, 0xec, 0x75,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x78, 0x0c, 0x00, 0x0a,
- 0x82, 0x25, 0x80, 0x3b,
- 0x94, 0xa5, 0xa1, 0x2b,
- 0x04, 0x20, 0x4d, 0x16,
- 0x06, 0x4a, 0xec, 0x04,
- 0xfe, 0x25, 0xf8, 0x0c,
- 0x90, 0x95, 0xe9, 0x2d,
- 0x7a, 0x80, 0x08, 0x14,
- 0xe4, 0x40, 0x04, 0x8a,
- 0xe0, 0xa0, 0x0a, 0x44,
- 0x08, 0x54, 0xa8, 0x5f,
- 0x06, 0xf5, 0xe0, 0xc0,
- 0x0c, 0x24, 0xaa, 0x4f,
- 0x0a, 0x20, 0x61, 0x90,
- 0x61, 0xc1, 0xec, 0x40,
- 0xec, 0x04, 0x0c, 0x60,
- 0x0c, 0x4a, 0x0a, 0xcf,
- 0x4e, 0x32, 0xe4, 0x00,
- 0x86, 0x2b, 0x70, 0xb0,
- 0xe4, 0x40, 0x06, 0x70,
- 0xf0, 0x10, 0x44, 0x45,
- 0xf8, 0x0c, 0x44, 0x45,
- 0xf8, 0x08, 0x44, 0x45,
- 0xf8, 0x04, 0x44, 0x45,
- 0x87, 0xfc, 0x4c, 0x08,
- 0xf1, 0xb0, 0x44, 0x52,
- 0x86, 0x95, 0xe9, 0x2d,
- 0xf9, 0xc1, 0x07, 0x51,
- 0x4a, 0x52, 0xa4, 0x53,
- 0x04, 0x53, 0xfa, 0xb0,
- 0xec, 0x10, 0x04, 0x20,
- 0x0e, 0x24, 0x08, 0x51,
- 0x45, 0x57, 0xe1, 0x88,
- 0xe4, 0x04, 0x18, 0x70,
- 0x6c, 0x04, 0x0c, 0x50,
- 0xe0, 0x88, 0x0a, 0x74,
- 0x64, 0x00, 0x0c, 0x4a,
- 0xdd, 0x4e, 0x86, 0x7b,
- 0x87, 0xfc, 0x4d, 0xc8,
- 0xaa, 0x23, 0x44, 0xc7,
- 0xa1, 0x2b, 0x98, 0x33,
- 0x04, 0x20, 0x82, 0x05,
- 0x04, 0x4a, 0xec, 0x04,
- 0xcd, 0x16, 0xe4, 0x00,
- 0x87, 0xfc, 0x45, 0xc8,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x04, 0x4a, 0x00, 0x7b,
- 0x40, 0x72, 0xe0, 0x10,
- 0x1e, 0xf0, 0x79, 0x88,
- 0x00, 0x0c, 0xed, 0x20,
- 0x00, 0x1a, 0x62, 0x00,
- 0x11, 0x0e, 0xf8, 0x0c,
- 0x1b, 0x0e, 0x82, 0x8b,
- 0x20, 0x01, 0x00, 0x26,
- 0x5e, 0x05, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x35,
- 0x23, 0x3e, 0xef, 0x8d,
- 0x5e, 0x17, 0xa4, 0x0b,
- 0x9d, 0x2e, 0xe0, 0xfc,
- 0x23, 0x88, 0xa1, 0x0e,
- 0x00, 0x24, 0xc0, 0x00,
- 0xc4, 0x1b, 0x61, 0x88,
- 0xc0, 0x3b, 0x7d, 0x41,
- 0x7a, 0x10, 0x42, 0x12,
- 0xfa, 0x10, 0x46, 0x32,
- 0x84, 0x13, 0x00, 0x33,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x82, 0x31, 0x7c, 0x3e,
- 0x00, 0x20, 0x19, 0x1e,
- 0x97, 0x3e, 0xec, 0x04,
- 0x00, 0x84, 0xfe, 0x0e,
- 0xaf, 0x8b, 0x61, 0x84,
- 0x54, 0x0a, 0x15, 0x8e,
- 0x2e, 0xa5, 0xe6, 0x8a,
- 0x00, 0x80, 0x8e, 0xa3,
- 0x10, 0x8a, 0x6c, 0x04,
- 0x40, 0x0a, 0xe4, 0xa4,
- 0x56, 0x72, 0xe6, 0x8a,
- 0x40, 0x70, 0x70, 0x80,
- 0xa2, 0xb5, 0xdc, 0x00,
- 0x00, 0x84, 0x0f, 0xbe,
- 0x23, 0xb4, 0xe1, 0x8c,
- 0xe6, 0x8a, 0x4c, 0x0a,
- 0x60, 0x84, 0x00, 0x64,
- 0xf0, 0x98, 0x50, 0x72,
- 0x8e, 0x03, 0x0d, 0x0e,
- 0x8e, 0x0b, 0x0b, 0x0e,
- 0x56, 0x08, 0x90, 0x1b,
- 0x13, 0x8e, 0xfc, 0x38,
- 0x0b, 0x84, 0x80, 0x9b,
- 0x90, 0x1b, 0x90, 0x0b,
- 0xfc, 0x38, 0x56, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x0e, 0x0b, 0x84, 0xd5,
- 0xa3, 0x24, 0x90, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0x8e, 0x0b, 0x21, 0x0d,
- 0x81, 0xc5, 0x82, 0x85,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x90, 0x1b, 0x0e, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0x21, 0x0d, 0xfc, 0x38,
- 0x80, 0x45, 0x8e, 0x0b,
- 0x93, 0x0e, 0x90, 0x0b,
- 0x50, 0xa2, 0x2c, 0x0b,
- 0x23, 0x64, 0xf1, 0x98,
- 0xf0, 0x98, 0x56, 0xa2,
- 0x90, 0x0b, 0x0b, 0x0e,
- 0x4c, 0x08, 0x94, 0x1b,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x09, 0xbe, 0x94, 0x0b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xa5, 0x82, 0x9d,
- 0x84, 0xd5, 0xa0, 0x0d,
- 0x90, 0x0b, 0x09, 0x64,
- 0x8c, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x01, 0xd5, 0xa1, 0x0d,
- 0x9c, 0x00, 0x50, 0x60,
- 0x82, 0x55, 0xa1, 0x0d,
- 0x90, 0x0b, 0x09, 0xa4,
- 0x94, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x55, 0xa1, 0x0d,
- 0x8f, 0xb4, 0x90, 0xab,
- 0x8d, 0x14, 0x8b, 0x94,
- 0x96, 0x93, 0xa3, 0x64,
- 0x71, 0x84, 0x40, 0xb2,
- 0x8d, 0x0e, 0x92, 0x1b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x92, 0x0b, 0x00, 0x8b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xc5, 0x82, 0x8d,
- 0xa0, 0x0d, 0x15, 0x84,
- 0x0d, 0x64, 0x86, 0x15,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x8c, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x4c, 0xb0, 0x01, 0xe5,
- 0x15, 0x84, 0x9c, 0x00,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x0d, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x95, 0xa1, 0x0d,
- 0x8c, 0xbb, 0x01, 0x35,
- 0x93, 0x04, 0x92, 0xbb,
- 0x94, 0x1b, 0x23, 0x64,
- 0x4c, 0x08, 0x93, 0x0e,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x96, 0x1b, 0x94, 0x0b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x13, 0xa4, 0x84, 0xd5,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x94, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x81, 0xd5, 0x82, 0xa5,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x13, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x56, 0x60, 0xa1, 0x0d,
- 0x96, 0xab, 0x9c, 0x00,
- 0x00, 0x2a, 0x9b, 0x04,
- 0x01, 0x18, 0xe0, 0x00,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x14, 0x84, 0x35,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x24, 0xe4, 0x00,
- 0xc1, 0x3e, 0xa8, 0x34,
- 0x43, 0x08, 0xe9, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa8, 0x14, 0x9c, 0x04,
- 0xa8, 0x0e, 0x9c, 0x1e,
- 0x19, 0x14, 0x81, 0xb5,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x28, 0xe4, 0x00,
- 0xc1, 0x36, 0xa8, 0x38,
- 0x43, 0x08, 0xe9, 0x26,
- 0x1d, 0x14, 0x87, 0xfc,
- 0xec, 0x04, 0x00, 0x80,
- 0x50, 0x0a, 0x81, 0x61,
- 0x40, 0x72, 0x66, 0x86,
- 0x1b, 0x0e, 0xf0, 0x84,
- 0x0e, 0x83, 0x80, 0xab,
- 0x90, 0xbb, 0x80, 0x9b,
- 0x8c, 0xd5, 0xd6, 0xad,
- 0x8e, 0x1b, 0x14, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0xa0, 0x0d, 0xfc, 0x38,
- 0xa1, 0x0b, 0x8a, 0xf5,
- 0x9d, 0x04, 0x92, 0x05,
- 0xa1, 0x0b, 0x8d, 0xb5,
- 0xc0, 0x40, 0x1e, 0x05,
- 0x01, 0x28, 0x88, 0xd5,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x24, 0x84, 0x55,
- 0x96, 0x1b, 0x90, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x80, 0x44, 0x84, 0x34,
- 0xc1, 0x3e, 0xc5, 0x4e,
- 0x87, 0xfc, 0x45, 0x08,
- 0xac, 0x04, 0x83, 0x15,
- 0xac, 0x1e, 0xa0, 0x14,
- 0x81, 0xc5, 0xa0, 0x0e,
- 0x96, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x90, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x21, 0x04, 0x87, 0xfc,
- 0x80, 0x83, 0x83, 0x61,
- 0xd6, 0xad, 0x80, 0xb3,
- 0x16, 0x0b, 0x94, 0xf5,
- 0xa3, 0x24, 0x8e, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0xf2, 0xc5, 0xa1, 0x0d,
- 0x40, 0x01, 0x03, 0x98,
- 0x1e, 0x07, 0x80, 0x00,
- 0x8e, 0x35, 0xe0, 0xfc,
- 0x96, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x94, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x87, 0x85, 0x87, 0xfc,
- 0x40, 0x01, 0x01, 0x28,
- 0x1e, 0x07, 0x80, 0x00,
- 0x84, 0x55, 0xe0, 0xfc,
- 0x94, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x92, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x83, 0x15, 0x87, 0xfc,
- 0xa8, 0x14, 0xa4, 0x04,
- 0xa8, 0x0e, 0xa4, 0x1e,
- 0x19, 0x24, 0x81, 0xc5,
- 0x94, 0x1b, 0x92, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x48, 0x80, 0x38,
- 0xc5, 0x36, 0xc1, 0x46,
- 0x87, 0xfc, 0x45, 0x08,
- 0x83, 0x61, 0x1d, 0x04,
- 0x71, 0x95, 0x80, 0x93,
- 0xa8, 0x04, 0x80, 0xa3,
- 0xa8, 0x1e, 0xac, 0x14,
- 0x81, 0xc5, 0xac, 0x0e,
- 0x94, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x96, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x1d, 0x04, 0x87, 0xfc,
- 0x21, 0x04, 0x83, 0x61,
- 0x6f, 0x35, 0x80, 0xa3,
- 0x1d, 0x14, 0x80, 0xb3,
- 0x95, 0x04, 0xa1, 0x6b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0x00, 0x0e, 0x88,
- 0xf0, 0x80, 0x58, 0x72,
- 0x71, 0x9c, 0x42, 0x92,
- 0xf1, 0xa4, 0x40, 0xa2,
- 0x92, 0x2b, 0x01, 0x1d,
- 0x44, 0xa0, 0x0e, 0x3b,
- 0x46, 0x90, 0x9c, 0x00,
- 0x48, 0x22, 0x9c, 0x00,
- 0xa1, 0x4b, 0xf1, 0x8c,
- 0x1e, 0x07, 0x8a, 0x25,
- 0x42, 0xa2, 0x60, 0xfc,
- 0x84, 0x55, 0xf1, 0x90,
- 0xfd, 0x31, 0x45, 0x47,
- 0x44, 0x22, 0xc8, 0x2b,
- 0x8e, 0x3b, 0x7a, 0x0c,
- 0x82, 0x21, 0x88, 0x23,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x54, 0x8c, 0x44,
- 0xc5, 0x4e, 0xcd, 0x5e,
- 0x87, 0xfc, 0x45, 0x08,
- 0x08, 0x30, 0x83, 0x35,
- 0xfd, 0x51, 0x6c, 0x04,
- 0x82, 0x21, 0x24, 0x43,
- 0xfa, 0x14, 0x48, 0x42,
- 0x26, 0x23, 0x88, 0x23,
- 0x04, 0x4a, 0x8e, 0x3b,
- 0x8c, 0x48, 0xe4, 0x00,
- 0xcd, 0x56, 0x84, 0x58,
- 0x45, 0x08, 0xc5, 0x46,
- 0x1d, 0x24, 0x87, 0xfc,
- 0xf1, 0xa0, 0x42, 0xc2,
- 0xf1, 0xac, 0x52, 0x82,
- 0x44, 0x92, 0xa4, 0x13,
- 0xa1, 0x2b, 0xfb, 0x84,
- 0x1e, 0x07, 0x8c, 0x45,
- 0x84, 0xb5, 0xe0, 0xfc,
- 0x61, 0x88, 0x02, 0x24,
- 0x42, 0x3b, 0xfd, 0x41,
- 0xf1, 0x88, 0x44, 0xc2,
- 0xfa, 0x10, 0x46, 0x32,
- 0x02, 0x30, 0x82, 0x33,
- 0x02, 0x4a, 0xe4, 0x04,
- 0xa8, 0x34, 0xe4, 0x00,
- 0xe9, 0x4e, 0x88, 0x44,
- 0x43, 0x08, 0xc9, 0x3e,
- 0x83, 0xb5, 0x87, 0xfc,
- 0x06, 0xb0, 0x7e, 0x14,
- 0x30, 0x33, 0xec, 0x04,
- 0x90, 0x13, 0x82, 0x21,
- 0x42, 0x12, 0xb8, 0x13,
- 0xfd, 0x31, 0x7a, 0x8c,
- 0xfa, 0x0c, 0x46, 0x12,
- 0xf1, 0x84, 0x42, 0x32,
- 0xe4, 0x00, 0x02, 0x4a,
- 0x46, 0xc2, 0x28, 0x58,
- 0x0e, 0x48, 0xf1, 0x88,
- 0xec, 0x04, 0x04, 0x20,
- 0x8e, 0x56, 0xe9, 0x46,
- 0x87, 0xfc, 0x42, 0x08,
- 0x98, 0x6b, 0x1d, 0x14,
- 0x82, 0x45, 0xc2, 0x0d,
- 0xef, 0xf8, 0x7e, 0x08,
- 0x8e, 0x0b, 0x00, 0x1b,
- 0xa3, 0x34, 0x9d, 0x24,
- 0xef, 0xfc, 0x5c, 0x68,
- 0xc2, 0x9d, 0x9d, 0x14,
- 0x7d, 0x58, 0xa8, 0x05,
- 0x92, 0x0b, 0x6f, 0xf8,
- 0xf1, 0xa4, 0x4e, 0x62,
- 0x80, 0x8b, 0x1d, 0x24,
- 0xf9, 0x88, 0x40, 0x72,
- 0x00, 0x0a, 0x11, 0x04,
- 0x5e, 0x07, 0xf8, 0x0c,
- 0x1b, 0x0e, 0xe0, 0xfc,
- 0xc0, 0x00, 0x00, 0x26,
- 0x40, 0x34, 0x5e, 0x05,
- 0x1e, 0x08, 0xef, 0x8d,
- 0x40, 0x8a, 0x9f, 0xfc,
- 0x84, 0x0d, 0xe6, 0x8a,
- 0x0e, 0x03, 0xa0, 0xc5,
- 0xf0, 0x88, 0x50, 0x72,
- 0x00, 0x24, 0x19, 0x0e,
- 0x44, 0x1b, 0xe1, 0x88,
- 0x40, 0x3b, 0xfd, 0x21,
- 0xfa, 0x08, 0x42, 0x12,
- 0x44, 0x32, 0x1d, 0x34,
- 0x80, 0x23, 0xfa, 0x08,
- 0xe4, 0x04, 0x16, 0x20,
- 0x0c, 0x10, 0x86, 0x13,
- 0xce, 0x8d, 0xe4, 0x04,
- 0x90, 0x9b, 0x8a, 0xc5,
- 0x92, 0xab, 0x21, 0x94,
- 0x94, 0x1b, 0x23, 0x24,
- 0x92, 0x0b, 0x94, 0x93,
- 0xfc, 0x38, 0x44, 0x08,
- 0x88, 0x75, 0xa3, 0x0d,
- 0xa1, 0x0b, 0x9b, 0x04,
- 0x1e, 0x07, 0x82, 0xe5,
- 0x84, 0x35, 0xe0, 0xfc,
- 0x64, 0x00, 0x16, 0x4a,
- 0x96, 0x1b, 0x92, 0x0b,
- 0x80, 0x34, 0xa8, 0x24,
- 0xc1, 0x2e, 0xe9, 0x3e,
- 0x87, 0xfc, 0x43, 0x08,
- 0xa8, 0x04, 0x83, 0x05,
- 0xa8, 0x1e, 0xa4, 0x14,
- 0x81, 0xb5, 0xa4, 0x0e,
- 0x64, 0x00, 0x0c, 0x4a,
- 0x8c, 0x1b, 0x92, 0x0b,
- 0x80, 0x38, 0xa8, 0x28,
- 0xc1, 0x26, 0xe9, 0x36,
- 0x87, 0xfc, 0x43, 0x08,
- 0xf4, 0xb5, 0xce, 0x9d,
- 0x19, 0x04, 0x9d, 0x04,
- 0xc1, 0x8d, 0x80, 0x83,
- 0x87, 0xd5, 0xf2, 0xb5,
- 0x82, 0x0d, 0x1b, 0xb4,
- 0x8e, 0x25, 0x99, 0xce,
- 0xfc, 0x84, 0xbe, 0x64,
- 0x82, 0x81, 0x82, 0x61,
- 0x8a, 0xc5, 0xce, 0xbd,
- 0x21, 0x94, 0x96, 0x9b,
- 0x23, 0x24, 0x92, 0xab,
- 0x94, 0x93, 0x94, 0x1b,
- 0x44, 0x08, 0x92, 0x0b,
- 0xa3, 0x0d, 0xfc, 0x38,
- 0x01, 0x18, 0x88, 0x75,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x10, 0x4a, 0x84, 0x35,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x24, 0x90, 0x1b,
- 0xe9, 0x3e, 0x80, 0x34,
- 0x43, 0x08, 0xc1, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa4, 0x14, 0xa8, 0x04,
- 0xa4, 0x0e, 0xa8, 0x1e,
- 0x0c, 0x4a, 0x81, 0xb5,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x28, 0x8c, 0x1b,
- 0xe9, 0x36, 0x80, 0x38,
- 0x43, 0x08, 0xc1, 0x26,
- 0xce, 0x9d, 0x87, 0xfc,
- 0x9d, 0x04, 0xf4, 0xb5,
- 0x80, 0xb3, 0x19, 0x04,
- 0xf2, 0xb5, 0xc1, 0xbd,
- 0xe5, 0x20, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0xfc, 0x80, 0x5b,
- 0x40, 0x06, 0xe2, 0xc0,
- 0xd5, 0x6e, 0xfc, 0x12,
- 0xd5, 0x8e, 0xd5, 0x7e,
- 0x40, 0x5a, 0xd5, 0x9e,
- 0x42, 0x06, 0xe0, 0xbc,
- 0xd5, 0xae, 0xbc, 0x22,
- 0xd5, 0xde, 0xd5, 0xbe,
- 0x42, 0x6a, 0xd5, 0xee,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x78,
- 0xc1, 0xc3, 0xc0, 0x00,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf0, 0x04, 0x4b, 0x85,
- 0xf0, 0x04, 0x4b, 0x95,
- 0xf0, 0x04, 0x4b, 0xa5,
- 0xf0, 0x04, 0x4b, 0xb5,
- 0xf0, 0x04, 0x4b, 0xc5,
- 0xf0, 0x04, 0x4b, 0xd5,
- 0xf0, 0x04, 0x4b, 0xe5,
- 0xf0, 0x04, 0x4b, 0xf5,
- 0xc2, 0x1f, 0x81, 0xa5,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xe0, 0xd0, 0x40, 0x4a,
- 0x82, 0xb5, 0xd5, 0x2e,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x4b, 0x0f, 0xc1, 0xc3,
- 0x4b, 0x1f, 0xf0, 0x04,
- 0x4b, 0x2f, 0xf0, 0x04,
- 0x4b, 0x3f, 0xf0, 0x04,
- 0x81, 0x65, 0xf0, 0x04,
- 0xd5, 0x1e, 0xc2, 0x1f,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0x94, 0xfe, 0xd5, 0x1e,
- 0xdd, 0x93, 0x81, 0x01,
- 0xe0, 0x04, 0x19, 0x86,
- 0xa3, 0xcd, 0xc1, 0xc3,
- 0x18, 0x4a, 0x82, 0xa5,
- 0x43, 0x46, 0xe0, 0x00,
- 0x02, 0x15, 0xe1, 0x98,
- 0x42, 0x05, 0x80, 0x00,
- 0x41, 0xfe, 0x80, 0x00,
- 0xbf, 0xff, 0x1f, 0xfd,
- 0x43, 0x46, 0xdd, 0x93,
- 0x84, 0x14, 0xe1, 0x98,
- 0x41, 0xfe, 0x84, 0xce,
- 0xff, 0xff, 0x7f, 0xfd,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0x7c, 0x0e, 0x82, 0x6b,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x02, 0x05, 0x80, 0x14,
- 0xa1, 0x0b, 0xe1, 0x48,
- 0x02, 0x10, 0x9a, 0xe5,
- 0xc0, 0x01, 0x65, 0x21,
- 0xbe, 0x14, 0xbe, 0x1e,
- 0x80, 0x8b, 0xfe, 0x1e,
- 0xa3, 0x0d, 0xa2, 0x04,
- 0x40, 0x1b, 0x92, 0x55,
- 0x14, 0x00, 0xfd, 0x21,
- 0x4e, 0x12, 0x64, 0x04,
- 0x44, 0x07, 0xfa, 0x08,
- 0x10, 0x03, 0x94, 0x73,
- 0xe4, 0x00, 0x0e, 0x6a,
- 0xe6, 0x10, 0x16, 0x00,
- 0xa1, 0x6b, 0x14, 0x0b,
- 0x14, 0x00, 0x00, 0xe5,
- 0x16, 0x15, 0xec, 0x04,
- 0x8d, 0x1b, 0xe0, 0x80,
- 0x22, 0x14, 0x8a, 0xf5,
- 0xec, 0x08, 0x00, 0x00,
- 0xf8, 0x80, 0x16, 0x25,
- 0x50, 0x05, 0x83, 0xab,
- 0x02, 0x06, 0x00, 0x04,
- 0x56, 0x15, 0xc0, 0x00,
- 0xa1, 0x2b, 0x58, 0x80,
- 0x10, 0x15, 0x88, 0x25,
- 0x83, 0x31, 0x61, 0x88,
- 0x00, 0x34, 0x22, 0x94,
- 0x80, 0x1f, 0xe8, 0x80,
- 0x82, 0x65, 0xa1, 0x1b,
- 0xe1, 0x8c, 0x10, 0x15,
- 0x2c, 0x14, 0x80, 0x1f,
- 0x82, 0x05, 0xa1, 0x1b,
- 0x44, 0x08, 0x82, 0x0b,
- 0x81, 0x75, 0xfc, 0x38,
- 0xfc, 0x38, 0x44, 0x08,
- 0xfc, 0x04, 0x81, 0x45,
- 0xfc, 0x38, 0x44, 0x08,
- 0x81, 0x9b, 0xa2, 0x04,
- 0xfe, 0x04, 0x88, 0x35,
- 0x91, 0x0b, 0x80, 0x04,
- 0x4e, 0x68, 0x86, 0xb5,
- 0x3f, 0xff, 0x47, 0xe5,
- 0xec, 0x10, 0x16, 0xb0,
- 0xa1, 0x0b, 0x81, 0x01,
- 0xa2, 0x04, 0x86, 0x25,
- 0xa1, 0x0b, 0x20, 0x04,
- 0xa1, 0x0b, 0x82, 0xb5,
- 0xfe, 0x74, 0x84, 0x65,
- 0x90, 0x0b, 0x1c, 0x0e,
- 0x68, 0x01, 0x40, 0x08,
- 0x9c, 0x84, 0xc0, 0x00,
- 0xe8, 0x75, 0xa1, 0x8b,
- 0x7e, 0x8e, 0x81, 0x95,
- 0xe6, 0xd5, 0xa1, 0x0b,
- 0xbe, 0x04, 0x81, 0x55,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xa0, 0xf1, 0xe4, 0xf5,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x83, 0x01, 0x00, 0x1b,
- 0xef, 0xfc, 0x76, 0x08,
- 0x81, 0x05, 0xc1, 0x43,
- 0xfa, 0x80, 0x02, 0x14,
- 0x00, 0x06, 0xe1, 0x1b,
- 0x00, 0x06, 0x94, 0x22,
- 0xdd, 0x93, 0xd4, 0x62,
- 0xf8, 0x00, 0x04, 0x0c,
- 0x6c, 0x50, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x03, 0x4a,
- 0x82, 0x6b, 0x3c, 0x5e,
- 0xfc, 0x1e, 0xbe, 0x5e,
- 0x42, 0x66, 0x8e, 0x05,
- 0x0c, 0x4a, 0xf0, 0x02,
- 0x06, 0x34, 0x64, 0x7c,
- 0x5e, 0x15, 0xfa, 0x80,
- 0x4a, 0x0e, 0x00, 0x04,
- 0x5e, 0x25, 0x9f, 0xfc,
- 0x06, 0x1a, 0x00, 0x08,
- 0x1e, 0x25, 0xe4, 0x00,
- 0x44, 0x22, 0x80, 0x04,
- 0x5e, 0x25, 0x98, 0x14,
- 0x1e, 0x25, 0x80, 0x00,
- 0x1e, 0x55, 0x80, 0x00,
- 0x4a, 0x50, 0x80, 0x08,
- 0x44, 0x22, 0x90, 0x7c,
- 0x5e, 0x25, 0x99, 0x94,
- 0x1e, 0x25, 0x80, 0x04,
- 0x42, 0x20, 0x80, 0x04,
- 0x18, 0x14, 0x9c, 0x00,
- 0x40, 0x00, 0x3c, 0xb5,
- 0xbc, 0x34, 0x18, 0x14,
- 0x02, 0x44, 0x00, 0xd5,
- 0xe1, 0x1b, 0xfa, 0x80,
- 0xdc, 0x3c, 0x18, 0xc4,
- 0xe2, 0x32, 0x00, 0x66,
- 0x42, 0x0e, 0x28, 0xf1,
- 0xc0, 0x10, 0x60, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x87, 0x75, 0xf0, 0x00,
- 0x01, 0x7e, 0x28, 0xf1,
- 0x0c, 0x0c, 0xff, 0xf8,
- 0xdd, 0x93, 0xf0, 0x00,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x01, 0x4a,
- 0xbe, 0x2e, 0xbc, 0x2e,
- 0x86, 0x85, 0xfc, 0x2e,
- 0xe4, 0x7c, 0x00, 0x0a,
- 0x44, 0x06, 0x84, 0x45,
- 0x3e, 0x2e, 0xf0, 0x02,
- 0xfc, 0x1e, 0xc1, 0x21,
- 0x84, 0x1f, 0xbe, 0x14,
- 0xbc, 0x14, 0xbc, 0x1e,
- 0xbe, 0x29, 0xfc, 0x24,
- 0xbe, 0x1e, 0xa4, 0x1f,
- 0x00, 0x06, 0xbe, 0x14,
- 0x81, 0x55, 0xe2, 0x06,
- 0xf8, 0x7e, 0x40, 0x06,
- 0xf0, 0xfe, 0x00, 0x06,
- 0x5d, 0x93, 0x81, 0x01,
- 0x7f, 0xe5, 0xa0, 0xf1,
- 0xff, 0xf8, 0x01, 0xae,
- 0xe2, 0xc0, 0x04, 0x1c,
- 0x04, 0x1f, 0xc1, 0x11,
- 0xf0, 0x7c, 0x44, 0x00,
- 0x02, 0x1c, 0xa4, 0x1f,
- 0xdd, 0x93, 0xe3, 0x40,
- 0xe4, 0x7c, 0x04, 0x0a,
- 0x40, 0x88, 0x04, 0x24,
- 0x00, 0x00, 0x06, 0x0e,
- 0x08, 0x30, 0x80, 0x10,
- 0x48, 0x12, 0x04, 0x10,
- 0x58, 0x02, 0xd0, 0x88,
- 0x02, 0x06, 0x71, 0x90,
- 0xff, 0xfc, 0x60, 0x00,
- 0x00, 0xc4, 0x83, 0xc7,
- 0x02, 0x0f, 0xf0, 0x80,
- 0x70, 0x01, 0x42, 0xc0,
- 0x61, 0x0b, 0xdf, 0xfc,
- 0x73, 0xfd, 0x40, 0xc0,
- 0x48, 0x07, 0xc0, 0x03,
- 0x00, 0xa5, 0xd0, 0x17,
- 0x5d, 0x93, 0xa2, 0x0f,
- 0xff, 0xf8, 0x01, 0x8e,
- 0x60, 0x01, 0x02, 0x86,
- 0xa2, 0x0f, 0xf8, 0x00,
- 0x40, 0x06, 0x90, 0x0e,
- 0xa1, 0x0d, 0xfc, 0x12,
- 0x40, 0x06, 0x82, 0xc5,
- 0xa1, 0x0d, 0xfc, 0x1a,
- 0x40, 0x06, 0x82, 0x15,
- 0x02, 0x06, 0xfc, 0x0a,
- 0xc0, 0x20, 0x60, 0x01,
- 0x80, 0x75, 0x83, 0x0d,
- 0xf3, 0x72, 0x00, 0x46,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x86, 0x4b, 0x08, 0x8b,
- 0x81, 0x71, 0x3e, 0x2e,
- 0x40, 0x5a, 0x00, 0x6b,
- 0x7c, 0x7e, 0xe5, 0x06,
- 0x42, 0x5a, 0x81, 0x31,
- 0x88, 0x2b, 0x65, 0x86,
- 0xef, 0xf8, 0x4f, 0x68,
- 0x67, 0xd1, 0x00, 0x00,
- 0x44, 0x86, 0x40, 0x01,
- 0x42, 0x12, 0xe0, 0x3c,
- 0x81, 0x31, 0x72, 0x9c,
- 0xef, 0xf8, 0x45, 0x68,
- 0x00, 0x00, 0x17, 0xa4,
- 0xc0, 0x04, 0x64, 0x01,
- 0x72, 0x9c, 0x42, 0x12,
- 0x19, 0x74, 0xd7, 0x07,
- 0xe0, 0xd4, 0x16, 0x14,
- 0xff, 0x01, 0x20, 0xbf,
- 0x00, 0x14, 0x01, 0xbb,
- 0x57, 0xfe, 0xe1, 0xac,
- 0xa1, 0x0b, 0x1f, 0xfc,
- 0x60, 0x38, 0x14, 0x09,
- 0xdf, 0xfc, 0x57, 0xfe,
- 0x81, 0x11, 0x1b, 0x94,
- 0x0a, 0xf0, 0x1c, 0x24,
- 0x15, 0x04, 0xe4, 0x20,
- 0xbe, 0x44, 0xa1, 0x0b,
- 0x80, 0x08, 0x00, 0x1b,
- 0x06, 0x14, 0x80, 0x04,
- 0x90, 0x1b, 0x7b, 0x00,
- 0xe8, 0x00, 0x43, 0xc8,
- 0xfc, 0x04, 0xbc, 0x0e,
- 0xe0, 0x18, 0x0e, 0x49,
- 0x68, 0x34, 0xaa, 0x24,
- 0x50, 0x82, 0xa0, 0x1b,
- 0x8e, 0x0b, 0x7b, 0x90,
- 0x68, 0x38, 0x4a, 0x68,
- 0x3e, 0x0e, 0x8c, 0x4b,
- 0x85, 0x05, 0x81, 0xa1,
- 0x0e, 0x29, 0xd9, 0x0a,
- 0x42, 0xba, 0xe0, 0x1c,
- 0x48, 0xba, 0xe5, 0x02,
- 0x06, 0x20, 0x65, 0x82,
- 0x83, 0x01, 0xe4, 0x1c,
- 0x02, 0x03, 0xa7, 0x0f,
- 0x42, 0x42, 0x81, 0x11,
- 0x90, 0x21, 0x72, 0x84,
- 0xef, 0xf8, 0x50, 0x48,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x82, 0xa1, 0x40, 0x3f,
- 0x41, 0xfe, 0xc5, 0x0d,
- 0x00, 0x3f, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x3f, 0x1f, 0xfd,
- 0x91, 0xad, 0xe5, 0x0e,
- 0xbe, 0x04, 0xf8, 0x15,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x98, 0xf1, 0x00, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x58, 0x96, 0x21, 0x1b,
- 0x02, 0x14, 0xe0, 0x08,
- 0x18, 0x06, 0x40, 0xac,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xa1, 0x4b, 0x41, 0x06,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x08, 0x58, 0x96,
- 0xff, 0x11, 0x82, 0x65,
- 0x02, 0x44, 0x02, 0x3d,
- 0x60, 0x37, 0xe1, 0x04,
- 0x91, 0x80, 0x02, 0x14,
- 0x42, 0x1a, 0x86, 0x13,
- 0x20, 0x23, 0xe0, 0x92,
- 0x82, 0x23, 0x98, 0x0b,
- 0xdd, 0x93, 0x94, 0x2e,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x11, 0x02, 0x6b,
- 0x60, 0x00, 0x45, 0x06,
- 0x66, 0xd8, 0x8c, 0x0b,
- 0x81, 0x71, 0x6f, 0xf8,
- 0x66, 0x00, 0x00, 0x60,
- 0xe4, 0xc0, 0x02, 0x60,
- 0x91, 0x21, 0x01, 0xa5,
- 0x04, 0x20, 0x06, 0x7e,
- 0x40, 0x73, 0xec, 0x04,
- 0x42, 0x75, 0xf8, 0x20,
- 0xc1, 0x7c, 0xf0, 0x08,
- 0xfc, 0xf5, 0xa1, 0x2b,
- 0x7f, 0xf4, 0x41, 0x0e,
- 0xe0, 0x38, 0x03, 0x06,
- 0x60, 0x28, 0x05, 0x06,
- 0xff, 0xd4, 0x47, 0x0e,
- 0x48, 0x62, 0x81, 0xf5,
- 0x00, 0x00, 0x71, 0x80,
- 0x92, 0x7e, 0xec, 0x20,
- 0x48, 0x62, 0x10, 0x7e,
- 0x10, 0x7e, 0xf0, 0x88,
- 0xf0, 0x84, 0x48, 0x62,
- 0x82, 0x11, 0x10, 0x76,
- 0x87, 0x0b, 0x88, 0x21,
- 0x41, 0xf6, 0xfc, 0x35,
- 0x81, 0x11, 0x60, 0x0c,
- 0x6f, 0x40, 0x4c, 0x01,
- 0x67, 0x44, 0x00, 0x60,
- 0x63, 0x98, 0xc0, 0x03,
- 0x8f, 0x21, 0x6f, 0xf8,
- 0x65, 0x61, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0x08,
- 0xc0, 0x03, 0x67, 0x61,
- 0x05, 0x06, 0x01, 0x95,
- 0x06, 0x7e, 0xe0, 0x08,
- 0xec, 0x04, 0x04, 0x20,
- 0xf0, 0x08, 0x42, 0x75,
- 0xa1, 0x2b, 0xc1, 0x7c,
- 0x0c, 0x4c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6f, 0xd1, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x00, 0x09, 0x82, 0x45,
- 0xc0, 0x06, 0x60, 0x2d,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xf0, 0x80, 0x44, 0x12,
- 0xec, 0x70, 0x04, 0x29,
- 0x84, 0x05, 0xa1, 0x2b,
- 0xe0, 0x3c, 0x02, 0x29,
- 0xe6, 0x82, 0x40, 0x2a,
- 0x02, 0x09, 0x80, 0x13,
- 0xc0, 0x05, 0x6b, 0x71,
- 0xec, 0x14, 0x00, 0x00,
- 0xe4, 0x08, 0x00, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x3c, 0x02, 0x39,
- 0x67, 0x70, 0x02, 0x10,
- 0x0a, 0x04, 0xc0, 0x03,
- 0x04, 0x20, 0x60, 0x8c,
- 0x04, 0x55, 0xe6, 0x40,
- 0x58, 0x22, 0x7c, 0x14,
- 0x46, 0x3a, 0xf0, 0x94,
- 0x81, 0x71, 0x66, 0x82,
- 0x08, 0x34, 0xb2, 0x64,
- 0xc2, 0x37, 0x60, 0x88,
- 0xfc, 0x10, 0x02, 0x45,
- 0x48, 0x62, 0x88, 0x53,
- 0x86, 0x13, 0x72, 0x9c,
- 0x08, 0x04, 0x32, 0x4e,
- 0x30, 0x5e, 0xe0, 0x88,
- 0x02, 0x13, 0x84, 0x43,
- 0x40, 0x01, 0x6c, 0x01,
- 0x08, 0x35, 0x80, 0x23,
- 0x82, 0x33, 0xe2, 0x00,
- 0xe2, 0x00, 0x48, 0x35,
- 0xec, 0x00, 0x04, 0x09,
- 0x44, 0x01, 0x82, 0x01,
- 0x0c, 0x0c, 0xec, 0x00,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfe, 0x04, 0x04, 0x0c,
- 0x48, 0x22, 0x08, 0x6b,
- 0x21, 0x4b, 0xf9, 0x8c,
- 0x08, 0x65, 0x8a, 0x7b,
- 0xe0, 0x08, 0x48, 0x96,
- 0x61, 0x84, 0x08, 0x24,
- 0xe0, 0xfc, 0x0a, 0x34,
- 0x0a, 0x34, 0x2a, 0x4f,
- 0x88, 0x03, 0xe1, 0x84,
- 0x6f, 0xf4, 0x71, 0x88,
- 0xf2, 0x84, 0x42, 0x52,
- 0x64, 0x1c, 0x43, 0x4a,
- 0x42, 0x1a, 0x81, 0x41,
- 0x41, 0x6a, 0xe0, 0x1c,
- 0x42, 0x0a, 0xe4, 0x18,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x09, 0x04, 0xed, 0x80,
- 0xdc, 0x00, 0x4c, 0x00,
- 0xdc, 0x00, 0x4e, 0x10,
- 0x80, 0x6e, 0x82, 0x7e,
- 0x0c, 0x0c, 0x88, 0x0b,
- 0xdd, 0x93, 0xf6, 0x04,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x67, 0xfd, 0x00, 0x25,
- 0x81, 0x51, 0x40, 0x01,
- 0x86, 0x44, 0x84, 0x34,
- 0xe0, 0x18, 0x02, 0xc5,
- 0x6f, 0xc9, 0x00, 0x21,
- 0x84, 0x33, 0x40, 0x05,
- 0x60, 0x50, 0x02, 0x6b,
- 0xf2, 0x94, 0x48, 0x42,
- 0x6f, 0xcd, 0x00, 0x01,
- 0x02, 0x55, 0xc0, 0x05,
- 0x84, 0xc3, 0x60, 0x1c,
- 0x82, 0x61, 0x06, 0x4e,
- 0x42, 0xc5, 0x84, 0x3e,
- 0x80, 0x53, 0x60, 0x18,
- 0xe0, 0x1c, 0x42, 0x55,
- 0xe0, 0x50, 0x42, 0x63,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x39,
- 0xc8, 0x44, 0x81, 0xc1,
- 0x46, 0x3a, 0xca, 0x54,
- 0xc4, 0x37, 0xe6, 0x82,
- 0x06, 0x35, 0x82, 0x33,
- 0x86, 0x43, 0xe7, 0xdc,
- 0x72, 0xb0, 0x46, 0x52,
- 0xca, 0x3e, 0x80, 0x13,
- 0x02, 0x01, 0xc8, 0x4e,
- 0x04, 0x35, 0xea, 0x70,
- 0x80, 0x33, 0xe0, 0x20,
- 0xe0, 0x20, 0x44, 0x35,
- 0xe0, 0x54, 0x04, 0x3b,
- 0xeb, 0x70, 0x02, 0x01,
- 0xe0, 0x24, 0x04, 0x15,
- 0x44, 0x33, 0x82, 0x31,
- 0x80, 0x13, 0xe0, 0x54,
- 0xe0, 0x24, 0x44, 0x15,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x3c, 0x02, 0x39,
- 0xe0, 0x58, 0x04, 0x4b,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xe0, 0x14, 0x04, 0x35,
- 0x80, 0x13, 0xc4, 0x07,
- 0xe7, 0xdc, 0x02, 0x05,
- 0xe0, 0x10, 0x04, 0x15,
- 0x81, 0x01, 0x00, 0x13,
- 0x72, 0x80, 0x40, 0x32,
- 0x44, 0x05, 0x82, 0x41,
- 0x44, 0x15, 0xe0, 0x14,
- 0x44, 0x43, 0xe0, 0x10,
- 0xdd, 0x93, 0xe0, 0x58,
- 0x60, 0x58, 0x00, 0x29,
- 0x0a, 0x39, 0x84, 0x5b,
- 0x0a, 0x49, 0xef, 0x40,
- 0x02, 0x39, 0xef, 0x44,
- 0x40, 0x01, 0x60, 0x51,
- 0x4a, 0x21, 0xc7, 0x2d,
- 0xc8, 0x2d, 0x4f, 0x40,
- 0x6f, 0x48, 0x4a, 0x21,
- 0xe4, 0xa0, 0x08, 0x00,
- 0x4f, 0x44, 0x4a, 0x21,
- 0x00, 0x35, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x20,
- 0x60, 0x30, 0x02, 0xc3,
- 0x67, 0x60, 0x0a, 0x50,
- 0x02, 0x13, 0xc0, 0x03,
- 0x98, 0x0b, 0xe0, 0xc0,
- 0xe0, 0x00, 0x24, 0x68,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x02, 0x7b,
- 0x60, 0x50, 0x0e, 0x2b,
- 0x0e, 0xab, 0x81, 0x81,
- 0x0e, 0x9b, 0xe0, 0x54,
- 0x18, 0x8e, 0xe0, 0x58,
- 0x9a, 0x8e, 0xa1, 0x2b,
- 0x4c, 0x23, 0xd8, 0x8e,
- 0x4c, 0xa3, 0xe0, 0x18,
- 0x4c, 0x93, 0xe0, 0x1c,
- 0x84, 0xc5, 0xe0, 0x20,
- 0x06, 0x24, 0x1c, 0x04,
- 0x9e, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x65, 0x88,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x14, 0x0a, 0x98, 0x0e,
- 0x04, 0xa4, 0x68, 0x00,
- 0x84, 0xc5, 0xfb, 0x80,
- 0x06, 0x24, 0x5c, 0x04,
- 0xde, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x63, 0xe8,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x12, 0x0a, 0x9a, 0x0e,
- 0x04, 0x94, 0x68, 0x00,
- 0x86, 0x05, 0xfb, 0x80,
- 0x60, 0x10, 0x0e, 0x05,
- 0xe1, 0x84, 0x06, 0x24,
- 0xe0, 0x14, 0x0e, 0x15,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x62, 0x28,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x84, 0x3b, 0x01, 0x01,
- 0x46, 0x01, 0x8a, 0x06,
- 0x8e, 0x06, 0xf0, 0x08,
- 0x02, 0x0b, 0x8c, 0x06,
- 0xa1, 0x0b, 0xe0, 0x50,
- 0x02, 0xc5, 0x88, 0x45,
- 0x06, 0x04, 0x60, 0x18,
- 0x7f, 0x51, 0xe1, 0x84,
- 0x86, 0x6b, 0xa6, 0x4b,
- 0x4c, 0x40, 0x8a, 0xcd,
- 0x18, 0x63, 0x9c, 0x00,
- 0xff, 0xf8, 0x18, 0x0e,
- 0xe0, 0x82, 0x4e, 0x6a,
- 0xe0, 0x1c, 0x02, 0x65,
- 0x4a, 0x72, 0x0a, 0x6d,
- 0x46, 0x40, 0xfa, 0x30,
- 0x0a, 0x52, 0x1c, 0x00,
- 0x08, 0x56, 0xe9, 0xfc,
- 0x40, 0x3a, 0x8c, 0x33,
- 0x40, 0x02, 0xe0, 0x82,
- 0x00, 0x02, 0xfa, 0x30,
- 0x8a, 0x06, 0xe9, 0xfc,
- 0xe0, 0x54, 0x02, 0x0b,
- 0x88, 0x45, 0xa1, 0x0b,
- 0x60, 0x20, 0x02, 0xc5,
- 0xe1, 0x84, 0x06, 0x04,
- 0xa6, 0x4b, 0x7f, 0x51,
- 0x8a, 0xcd, 0x86, 0x6b,
- 0x9c, 0x00, 0x4c, 0x40,
- 0x60, 0x24, 0x02, 0xc5,
- 0x4c, 0x6a, 0x98, 0x63,
- 0x02, 0x0e, 0x60, 0x82,
- 0x8a, 0xcd, 0xff, 0xf8,
- 0x1c, 0x00, 0x46, 0x40,
- 0xfa, 0x04, 0x4c, 0x62,
- 0x0a, 0x62, 0x18, 0x33,
- 0x40, 0x3a, 0xe9, 0xfc,
- 0xc8, 0x56, 0xe0, 0x82,
- 0xfa, 0x04, 0x40, 0x02,
- 0xe9, 0xfc, 0x00, 0x02,
- 0x0c, 0x0c, 0xca, 0x06,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x89, 0x04, 0x84, 0x7a,
- 0x04, 0x89, 0x86, 0x1a,
- 0xd6, 0x58, 0xe0, 0x10,
- 0x80, 0x7c, 0x88, 0x98,
- 0xc8, 0xc8, 0x8a, 0x78,
- 0x04, 0x29, 0xca, 0x68,
- 0x02, 0x1c, 0xe0, 0x14,
- 0xe1, 0x84, 0x02, 0x84,
- 0x60, 0x10, 0x40, 0x51,
- 0x0a, 0x24, 0x98, 0x13,
- 0xc2, 0x17, 0x61, 0x84,
- 0x02, 0x10, 0x0c, 0x53,
- 0x40, 0x11, 0xec, 0x04,
- 0xc2, 0x57, 0x60, 0x1c,
- 0x6c, 0x04, 0x02, 0x50,
- 0x40, 0x11, 0xc2, 0x87,
- 0xc2, 0x27, 0x60, 0x20,
- 0x60, 0x28, 0x40, 0x21,
- 0x66, 0x40, 0x04, 0x40,
- 0x06, 0x19, 0xc0, 0x03,
- 0x81, 0x31, 0x60, 0x38,
- 0xe0, 0x14, 0x40, 0x91,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x24, 0x40, 0x81,
- 0x49, 0x48, 0x81, 0x95,
- 0xec, 0x04, 0x0a, 0x30,
- 0xec, 0x04, 0x02, 0x10,
- 0x46, 0x40, 0xc9, 0x5d,
- 0xa1, 0x1b, 0x9c, 0x00,
- 0x40, 0x31, 0xfc, 0xf5,
- 0x81, 0x01, 0x60, 0x2c,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf0, 0x80, 0x46, 0x22,
- 0xec, 0x70, 0x06, 0x39,
- 0x86, 0xa5, 0xa1, 0x3b,
- 0xe0, 0x3c, 0x04, 0x39,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xf0, 0x80, 0x46, 0x22,
- 0x6b, 0x71, 0x06, 0x39,
- 0x06, 0x30, 0xc0, 0x05,
- 0xe2, 0x3d, 0xec, 0x14,
- 0xc2, 0x07, 0x84, 0x15,
- 0x04, 0x03, 0x80, 0x23,
- 0xc0, 0x02, 0x63, 0xb9,
- 0x86, 0x12, 0x84, 0x22,
- 0x41, 0x1a, 0x85, 0x0d,
- 0x40, 0x0a, 0xe0, 0x04,
- 0x00, 0x0c, 0xe1, 0x84,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x1d, 0x04,
- 0x88, 0x8b, 0x7c, 0x5e,
- 0x90, 0x1b, 0x7e, 0x1e,
- 0x00, 0x06, 0x3e, 0x0e,
- 0x8b, 0x6e, 0xe0, 0x04,
- 0xe0, 0x38, 0x04, 0xb9,
- 0x81, 0x45, 0x89, 0x6e,
- 0x00, 0x00, 0x45, 0x6e,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x7c, 0x04, 0xfe, 0x95,
- 0x12, 0x20, 0x87, 0x41,
- 0x40, 0x03, 0x65, 0x71,
- 0xe6, 0x40, 0x14, 0x30,
- 0x66, 0x41, 0x0e, 0x30,
- 0x80, 0x6e, 0xc0, 0x03,
- 0xc2, 0x6e, 0x82, 0x4e,
- 0x00, 0x06, 0x40, 0x6e,
- 0xbe, 0x14, 0xe0, 0x08,
- 0x86, 0x4e, 0x84, 0x0e,
- 0xc4, 0x6e, 0xc6, 0x6e,
- 0x9c, 0x28, 0x85, 0xe5,
- 0x86, 0xa5, 0xa1, 0x2b,
- 0x00, 0x09, 0xfe, 0x04,
- 0xc1, 0x2d, 0xe0, 0x10,
- 0x3e, 0x14, 0x82, 0x45,
- 0xe0, 0x08, 0x00, 0x46,
- 0x87, 0x01, 0x04, 0x0e,
- 0xa4, 0x08, 0x86, 0x0e,
- 0xc6, 0x0e, 0xc4, 0x6e,
- 0x06, 0xf0, 0x2a, 0x14,
- 0x28, 0x04, 0xe4, 0x40,
- 0x7f, 0xfd, 0x49, 0xfe,
- 0x3c, 0x3e, 0xcf, 0xff,
- 0x5e, 0x18, 0x81, 0x31,
- 0x81, 0x51, 0x6f, 0xfc,
- 0x81, 0x95, 0x89, 0x04,
- 0x83, 0x01, 0x7c, 0x24,
- 0x88, 0x0e, 0x87, 0x11,
- 0xa4, 0x18, 0x8a, 0x1e,
- 0xca, 0x1e, 0xc8, 0x6e,
- 0x16, 0xb0, 0x61, 0x0e,
- 0x02, 0x91, 0xec, 0x04,
- 0x82, 0x71, 0x90, 0xa1,
- 0xf4, 0x55, 0xa1, 0xbb,
- 0xb8, 0xf1, 0x7c, 0x04,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xc0, 0x08, 0x4c, 0x96,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x6b, 0x0a, 0x9b,
- 0x80, 0xbb, 0x06, 0x7b,
- 0x64, 0xd1, 0x00, 0x90,
- 0x84, 0x8b, 0x40, 0x01,
- 0x08, 0x90, 0x02, 0xab,
- 0x3c, 0x0e, 0xe4, 0x90,
- 0x64, 0x91, 0x0a, 0x90,
- 0x0e, 0x2b, 0xc0, 0x01,
- 0x78, 0x58, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x98, 0xf1, 0x80, 0xa5,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x04, 0x90, 0xdd, 0x93,
- 0x96, 0x0b, 0x64, 0x30,
- 0x6f, 0xfc, 0x65, 0x88,
- 0x7c, 0x8e, 0x8c, 0x1b,
- 0xe4, 0x80, 0x10, 0x90,
- 0x8c, 0x1b, 0x16, 0x0b,
- 0x6f, 0xfc, 0x6b, 0x48,
- 0x3c, 0x9e, 0x90, 0x2b,
- 0x7c, 0x24, 0x96, 0x0b,
- 0x0e, 0x3b, 0x94, 0x1b,
- 0x70, 0x18, 0x8c, 0x4b,
- 0x90, 0x5b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x82, 0x9b, 0x04, 0x8b,
- 0x86, 0x7b, 0x08, 0x6b,
- 0x6f, 0x48, 0x10, 0x19,
- 0x67, 0x60, 0x04, 0x80,
- 0x12, 0x09, 0xc0, 0x03,
- 0x8c, 0x3b, 0x60, 0x10,
- 0xe8, 0x04, 0x59, 0x68,
- 0xe0, 0x10, 0x0e, 0x05,
- 0xe0, 0x34, 0x0e, 0x1b,
- 0xef, 0x48, 0x10, 0x29,
- 0xe0, 0x10, 0x12, 0x39,
- 0xe0, 0x8c, 0x0e, 0x49,
- 0x81, 0x01, 0x18, 0x0e,
- 0x4c, 0x21, 0xd8, 0x1c,
- 0x4c, 0x31, 0xe0, 0x18,
- 0x4c, 0x41, 0xe0, 0x1c,
- 0x0c, 0x4c, 0xe0, 0x20,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x81, 0xb1, 0x13, 0xa4,
- 0x6e, 0x40, 0x02, 0x22,
- 0x11, 0x74, 0x88, 0x8b,
- 0x28, 0x5e, 0x86, 0x6b,
- 0x0f, 0xbe, 0x81, 0x91,
- 0x81, 0x55, 0x81, 0x21,
- 0x82, 0x21, 0x41, 0x34,
- 0xfa, 0x24, 0x52, 0x32,
- 0xfe, 0x75, 0xc3, 0x2d,
- 0x41, 0xfe, 0xa0, 0x9d,
- 0x80, 0x3f, 0x1f, 0xfd,
- 0x80, 0x00, 0x54, 0x05,
- 0x06, 0xf0, 0x90, 0x05,
- 0x92, 0x0b, 0x64, 0x70,
- 0x90, 0x2b, 0x0a, 0x1b,
- 0xe8, 0x34, 0x5e, 0x48,
- 0x8e, 0x15, 0xa1, 0x0b,
- 0x90, 0x1b, 0x12, 0x0b,
- 0x68, 0x34, 0x61, 0x48,
- 0xa1, 0x0b, 0x8e, 0x2b,
- 0x8f, 0x84, 0x8c, 0x35,
- 0x54, 0xb5, 0xa1, 0x8b,
- 0x40, 0x96, 0x00, 0x00,
- 0x8a, 0x45, 0x80, 0x08,
- 0x98, 0x1a, 0x9c, 0x04,
- 0xc7, 0x07, 0x9a, 0x2a,
- 0x80, 0x95, 0xc3, 0x0d,
- 0x81, 0x01, 0x44, 0x0d,
- 0x40, 0x12, 0x88, 0x25,
- 0x04, 0x06, 0x70, 0x88,
- 0x42, 0xb2, 0xff, 0x40,
- 0x81, 0x31, 0x72, 0xac,
- 0xef, 0xf4, 0x4e, 0x28,
- 0x60, 0xfc, 0x04, 0x14,
- 0x24, 0x0f, 0xc3, 0x07,
- 0x01, 0x31, 0xc3, 0x17,
- 0x44, 0x38, 0x90, 0x2b,
- 0x04, 0x04, 0xef, 0xf4,
- 0xff, 0x31, 0x60, 0xa0,
- 0xd0, 0x17, 0x71, 0x07,
- 0xa2, 0x0f, 0x07, 0x2b,
- 0x1f, 0xfc, 0x45, 0xfe,
- 0x45, 0xfe, 0xa1, 0x0b,
- 0xa8, 0x2e, 0xdf, 0xfc,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x84, 0x03, 0x04, 0x13,
- 0x61, 0x8a, 0x40, 0x0a,
- 0x42, 0x1a, 0x82, 0x11,
- 0x04, 0x20, 0x61, 0x8a,
- 0x18, 0x04, 0xec, 0x04,
- 0x0c, 0x04, 0x60, 0x88,
- 0x08, 0xc5, 0xe0, 0x8c,
- 0x4e, 0x52, 0x7c, 0x30,
- 0x0a, 0x65, 0xf0, 0x98,
- 0x85, 0x0d, 0x7c, 0x18,
- 0xca, 0xc7, 0x9e, 0x84,
- 0x12, 0xc4, 0xa6, 0xc3,
- 0x8c, 0xc3, 0x61, 0x7c,
- 0xf2, 0xa0, 0x4c, 0x92,
- 0x0c, 0x04, 0x1e, 0x6e,
- 0x1c, 0xce, 0xe0, 0x84,
- 0x0c, 0xcb, 0x8a, 0x63,
- 0x00, 0x06, 0x69, 0x00,
- 0x00, 0x00, 0x80, 0x00,
- 0x83, 0x0b, 0xc4, 0x04,
- 0x4c, 0xc3, 0x82, 0xc1,
- 0xf6, 0xd5, 0xe9, 0x00,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0xfc, 0x18, 0x24,
- 0x04, 0xc3, 0xa2, 0x03,
- 0x03, 0xc7, 0x86, 0x03,
- 0x0b, 0xc4, 0x81, 0x81,
- 0x4c, 0x0a, 0xb8, 0x03,
- 0x00, 0x34, 0x61, 0x8e,
- 0x09, 0x04, 0xe0, 0x88,
- 0xf0, 0x80, 0x4e, 0x42,
- 0x0c, 0x13, 0x94, 0x8e,
- 0x42, 0x1a, 0xc4, 0x67,
- 0x88, 0x63, 0x61, 0x8e,
- 0xb0, 0x8e, 0x80, 0x8e,
- 0xc4, 0x17, 0x02, 0x23,
- 0x61, 0x8e, 0x46, 0x2a,
- 0xf0, 0x84, 0x44, 0x42,
- 0x42, 0x42, 0xc4, 0x37,
- 0x06, 0x70, 0x70, 0x8c,
- 0x82, 0x7b, 0xec, 0x10,
- 0x14, 0x94, 0xd9, 0x84,
- 0x10, 0x93, 0xc6, 0x6d,
- 0xdc, 0x00, 0x4c, 0x40,
- 0xdd, 0x84, 0x94, 0x9e,
- 0xc6, 0x7d, 0x30, 0x94,
- 0x4e, 0x40, 0x10, 0x93,
- 0x30, 0x9e, 0xdc, 0x00,
- 0xfc, 0x35, 0x85, 0x6b,
- 0xc9, 0xc4, 0x80, 0x54,
- 0x98, 0x53, 0xc6, 0x2d,
- 0x44, 0x40, 0x00, 0x5e,
- 0x83, 0x2b, 0xdc, 0x00,
- 0x0c, 0x0c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x4c, 0x42, 0x08, 0x13,
- 0x4c, 0x6a, 0xf0, 0x80,
- 0x82, 0x11, 0x61, 0x92,
- 0x61, 0x92, 0x42, 0x1a,
- 0xe0, 0x88, 0x18, 0x44,
- 0xd6, 0x07, 0x7e, 0x3e,
- 0xc4, 0x67, 0x19, 0x34,
- 0x4f, 0xfe, 0x44, 0x17,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x52, 0x52, 0x0a, 0xc3,
- 0x3e, 0x3e, 0xf0, 0x84,
- 0xf0, 0x98, 0x54, 0x52,
- 0x06, 0xc0, 0x0c, 0x7e,
- 0x7c, 0x5e, 0xec, 0x10,
- 0xfc, 0xa8, 0x16, 0x04,
- 0x81, 0xc1, 0x01, 0x41,
- 0x81, 0x11, 0x01, 0x81,
- 0xe9, 0x64, 0x83, 0xf5,
- 0xc6, 0xad, 0x7e, 0x04,
- 0x1e, 0xa5, 0xca, 0x67,
- 0x4e, 0x62, 0x40, 0x08,
- 0x21, 0x7d, 0xf1, 0x80,
- 0x0c, 0x06, 0x8e, 0x6b,
- 0xa0, 0x2d, 0x40, 0x00,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x61, 0x7c, 0x0e, 0x64,
- 0x40, 0x6a, 0x8c, 0x43,
- 0x58, 0x72, 0x64, 0x2e,
- 0x4c, 0x6a, 0xf2, 0xb0,
- 0x80, 0x83, 0xe4, 0xae,
- 0x72, 0x84, 0x42, 0x62,
- 0x64, 0x00, 0x16, 0xb0,
- 0x93, 0xab, 0xc0, 0x08,
- 0x18, 0xca, 0xf8, 0x35,
- 0x18, 0x1a, 0xe0, 0x00,
- 0x08, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x08, 0x45, 0xed, 0x80,
- 0x80, 0x08, 0x40, 0x96,
- 0x61, 0x84, 0x00, 0x44,
- 0xe0, 0xfc, 0x04, 0xc4,
- 0x04, 0xc4, 0x24, 0x0f,
- 0x10, 0x03, 0xe1, 0x84,
- 0x42, 0x12, 0x98, 0x3b,
- 0x88, 0x2b, 0x72, 0x88,
- 0xef, 0xf0, 0x69, 0x48,
- 0xe0, 0x00, 0x03, 0x4a,
- 0x02, 0x1a, 0x3e, 0x14,
- 0x00, 0x6a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x00, 0x06, 0xed, 0x80,
- 0x04, 0x0e, 0xc0, 0x00,
- 0xa0, 0xf1, 0x81, 0x01,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x4c, 0x52, 0x0d, 0x04,
- 0x0c, 0x23, 0xf0, 0x80,
- 0xf0, 0x94, 0x4e, 0x12,
- 0x61, 0x96, 0x58, 0x2a,
- 0xec, 0x04, 0x10, 0x50,
- 0xc4, 0x87, 0x02, 0x71,
- 0x18, 0x33, 0x8f, 0x24,
- 0x46, 0x3a, 0xc4, 0xc7,
- 0x42, 0x02, 0x61, 0x96,
- 0x4c, 0x6a, 0xf0, 0xb0,
- 0x82, 0x9b, 0x61, 0x96,
- 0x61, 0x96, 0x4e, 0x7a,
- 0xc4, 0x37, 0x81, 0x51,
- 0x70, 0x8c, 0x58, 0x02,
- 0xf0, 0xa0, 0x46, 0x02,
- 0xe5, 0xa4, 0x81, 0x65,
- 0x94, 0x53, 0xc6, 0x9d,
- 0xdc, 0x00, 0x52, 0x00,
- 0xfe, 0x55, 0x99, 0x9b,
- 0xa3, 0x4d, 0x44, 0x67,
- 0xc4, 0x77, 0x04, 0x63,
- 0x80, 0x00, 0x0c, 0x95,
- 0x52, 0x92, 0x02, 0x65,
- 0xff, 0x91, 0x90, 0x94,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0x95, 0x8a, 0x9b,
- 0x52, 0x92, 0xa0, 0x00,
- 0x18, 0x9e, 0xb1, 0x94,
- 0x04, 0x83, 0x84, 0x73,
- 0x83, 0xd5, 0xff, 0x91,
- 0xc5, 0xb4, 0xf1, 0xa4,
- 0x4a, 0xa2, 0x8a, 0xa3,
- 0x0c, 0xa5, 0xf1, 0xac,
- 0x02, 0x45, 0x80, 0x00,
- 0x90, 0x94, 0x54, 0xa2,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0xa5, 0x8a, 0xab,
- 0x54, 0xa2, 0xa0, 0x00,
- 0x18, 0xae, 0xb1, 0x94,
- 0xe4, 0x0c, 0x59, 0x1a,
- 0x3c, 0x01, 0x58, 0x00,
- 0x43, 0x1a, 0x40, 0x00,
- 0x42, 0x00, 0xe4, 0x0c,
- 0xc0, 0x00, 0x3c, 0x01,
- 0x64, 0x10, 0x14, 0x60,
- 0x55, 0x1a, 0x84, 0x6b,
- 0x4c, 0xa0, 0xe4, 0x20,
- 0x4c, 0x1a, 0xbc, 0x00,
- 0x3d, 0xb8, 0xe0, 0x1c,
- 0xc3, 0xff, 0x3f, 0xfd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0xca, 0x37, 0x00, 0x8b,
- 0xe1, 0xfc, 0x14, 0x84,
- 0x00, 0xa4, 0x90, 0xa3,
- 0x80, 0x33, 0xe1, 0x04,
- 0x60, 0xa2, 0x40, 0x3a,
- 0xe1, 0x7c, 0x06, 0x54,
- 0x61, 0x7c, 0x18, 0x04,
- 0x56, 0xc2, 0xaa, 0x03,
- 0x46, 0x02, 0xf3, 0x8c,
- 0x17, 0x34, 0xf9, 0xac,
- 0x41, 0xfe, 0xa1, 0x3b,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x80, 0x08, 0x4e, 0x96,
- 0x0a, 0x44, 0x90, 0x05,
- 0xa4, 0x43, 0x61, 0x7c,
- 0x61, 0x7c, 0x18, 0x24,
- 0x4a, 0x52, 0xff, 0x21,
- 0x81, 0x71, 0x73, 0xb0,
- 0x44, 0x72, 0x04, 0x5d,
- 0x3e, 0x1e, 0xf1, 0x80,
- 0x12, 0x44, 0x80, 0xcb,
- 0xe0, 0x57, 0x61, 0xc0,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf3, 0xac, 0x42, 0x72,
- 0xe0, 0x47, 0x7c, 0x3e,
- 0x60, 0x84, 0x06, 0xb4,
- 0xe1, 0xfc, 0x0c, 0x04,
- 0x60, 0x84, 0x04, 0x04,
- 0x56, 0x10, 0xb2, 0x5f,
- 0x40, 0xc2, 0x1c, 0x00,
- 0x42, 0xb2, 0xf0, 0x90,
- 0xac, 0x3f, 0x72, 0x94,
- 0xef, 0xf0, 0x5c, 0xe8,
- 0x02, 0xa4, 0x95, 0xb4,
- 0xd6, 0xb7, 0x7c, 0x00,
- 0xa2, 0x83, 0x3e, 0x14,
- 0xa3, 0x8b, 0x7c, 0x34,
- 0x04, 0x01, 0x00, 0x00,
- 0xd6, 0x17, 0x80, 0x04,
- 0x02, 0x04, 0x82, 0x03,
- 0x96, 0x1f, 0xe1, 0x7c,
- 0x40, 0x1a, 0x80, 0x13,
- 0x00, 0x02, 0xe1, 0xae,
- 0x00, 0x02, 0xe0, 0x00,
- 0xc7, 0xff, 0x6b, 0xfd,
- 0x8e, 0x0b, 0x0c, 0x0e,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0xa4, 0x13, 0x1b, 0x74,
- 0xa4, 0x03, 0x09, 0x3e,
- 0x8a, 0x9b, 0x1f, 0x64,
- 0x46, 0x72, 0x1d, 0x84,
- 0x56, 0x3a, 0xf0, 0x88,
- 0x88, 0x2b, 0x61, 0x9e,
- 0x7c, 0x4e, 0x99, 0xa4,
- 0x16, 0x13, 0x8e, 0x4b,
- 0x7e, 0x1e, 0x96, 0x03,
- 0x21, 0xb4, 0xa0, 0x13,
- 0x3c, 0x6e, 0x93, 0x1d,
- 0xc4, 0x04, 0x12, 0x10,
- 0x70, 0xa4, 0x42, 0x02,
- 0x02, 0x10, 0x94, 0x3b,
- 0x90, 0x5b, 0x6c, 0x04,
- 0xef, 0xfc, 0x69, 0x68,
- 0x86, 0x15, 0xa1, 0x0b,
- 0x94, 0x3b, 0x7e, 0x14,
- 0x8e, 0x4b, 0x3c, 0xbe,
- 0x90, 0x5b, 0x7c, 0x24,
- 0xe4, 0x04, 0x00, 0x10,
- 0x6f, 0xfc, 0x68, 0xa8,
- 0xa1, 0x0b, 0xb2, 0x03,
- 0x18, 0x04, 0x82, 0x75,
- 0x40, 0x0a, 0xd6, 0x77,
- 0x98, 0x0e, 0xe1, 0x1e,
- 0x40, 0x0a, 0xac, 0x04,
- 0x2c, 0x0e, 0xe1, 0x1e,
- 0x98, 0x24, 0x81, 0x01,
- 0xc2, 0x2d, 0xac, 0x14,
- 0x40, 0x00, 0x4c, 0x15,
- 0xdc, 0x00, 0x42, 0x20,
- 0xc0, 0x00, 0x56, 0x25,
- 0xc0, 0x00, 0x0c, 0x35,
- 0x44, 0x30, 0x09, 0x34,
- 0xa8, 0xf1, 0xdc, 0x00,
- 0x4c, 0x35, 0xc6, 0x2d,
- 0x16, 0x15, 0xc0, 0x00,
- 0xc7, 0x1d, 0xc0, 0x00,
- 0xc0, 0x00, 0x56, 0x35,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x84, 0x9b, 0x11, 0x1e,
- 0x93, 0x4e, 0x95, 0x5e,
- 0x97, 0x3e, 0x8f, 0x0e,
- 0xb3, 0x14, 0x8c, 0x08,
- 0x19, 0x1e, 0xa1, 0x0b,
- 0x9d, 0x1e, 0x81, 0x11,
- 0x84, 0x45, 0x9b, 0x1e,
- 0xe0, 0x04, 0x00, 0x02,
- 0x85, 0xb3, 0x81, 0x13,
- 0x8b, 0xf3, 0x99, 0x04,
- 0xe5, 0x80, 0x00, 0x00,
- 0xf8, 0x60, 0x40, 0x15,
- 0xf8, 0x30, 0x40, 0x15,
- 0x40, 0x15, 0xc1, 0x1e,
- 0x40, 0x15, 0xe0, 0x2c,
- 0x97, 0x04, 0xe0, 0x5c,
- 0xa1, 0x0b, 0x82, 0x08,
- 0x31, 0xb4, 0xa2, 0x25,
- 0xaf, 0x84, 0x81, 0x71,
- 0x13, 0x24, 0xad, 0xa4,
- 0xe0, 0x84, 0x00, 0x74,
- 0x7c, 0x00, 0x04, 0x43,
- 0xf0, 0x80, 0x42, 0x22,
- 0xe0, 0x90, 0x02, 0x23,
- 0x82, 0x45, 0x84, 0x4d,
- 0x06, 0x74, 0x19, 0x04,
- 0x80, 0x33, 0xe0, 0x88,
- 0x02, 0x55, 0x86, 0x1b,
- 0x84, 0x04, 0xf0, 0x30,
- 0x19, 0x04, 0x85, 0xf5,
- 0xe0, 0x88, 0x06, 0x74,
- 0x44, 0x42, 0x09, 0x2e,
- 0x0d, 0x7e, 0xfa, 0x08,
- 0x00, 0x33, 0x82, 0x21,
- 0x06, 0x1b, 0xa8, 0x23,
- 0xe6, 0x40, 0x0c, 0x30,
- 0xf0, 0x30, 0x02, 0x55,
- 0x02, 0xc5, 0x84, 0x04,
- 0x05, 0x13, 0xe0, 0x60,
- 0xec, 0x04, 0x04, 0x40,
- 0x8b, 0x4e, 0x85, 0x33,
- 0xe8, 0x00, 0x31, 0x3c,
- 0x70, 0x88, 0x4e, 0xa2,
- 0x82, 0x71, 0x82, 0x21,
- 0xe1, 0xaa, 0x4e, 0x7a,
- 0x10, 0x45, 0xc4, 0x77,
- 0x88, 0x03, 0xfc, 0x1c,
- 0xe4, 0x44, 0x84, 0x0e,
- 0x8c, 0x5e, 0x88, 0x53,
- 0xfc, 0x1c, 0x16, 0x45,
- 0x98, 0xce, 0x88, 0xc3,
- 0x8b, 0x44, 0x8d, 0x74,
- 0x20, 0x51, 0x89, 0x24,
- 0xe0, 0x88, 0x0c, 0x74,
- 0x08, 0x44, 0x4b, 0x57,
- 0x0c, 0x5e, 0xfb, 0x80,
- 0x1e, 0x55, 0xca, 0x0d,
- 0x40, 0x02, 0x40, 0x30,
- 0x06, 0x74, 0xd1, 0x94,
- 0x82, 0x21, 0x40, 0x88,
- 0xfa, 0x80, 0x18, 0xa4,
- 0xd0, 0x94, 0x46, 0x32,
- 0x40, 0x60, 0x46, 0x05,
- 0xf1, 0x90, 0x46, 0x22,
- 0x06, 0x34, 0x0f, 0x04,
- 0x00, 0x09, 0xfb, 0x00,
- 0x19, 0x04, 0xe0, 0x30,
- 0x80, 0x63, 0xa1, 0x0b,
- 0xe6, 0x40, 0x00, 0x60,
- 0xc0, 0x00, 0x00, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0x00, 0x00, 0x40, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0xa6, 0x04, 0x91, 0x44,
- 0x50, 0x58, 0x84, 0x14,
- 0xe4, 0xd0, 0x08, 0xf0,
- 0x08, 0xf0, 0x7c, 0x4e,
- 0xbe, 0x4e, 0xe4, 0xe0,
- 0x95, 0x44, 0xbc, 0xce,
- 0xe8, 0x00, 0x62, 0x08,
- 0x82, 0x71, 0x21, 0x0b,
- 0x80, 0x34, 0x1e, 0x15,
- 0x80, 0xc0, 0x4c, 0x15,
- 0x86, 0x18, 0x97, 0x14,
- 0xde, 0xd5, 0x83, 0x7d,
- 0x02, 0x0b, 0x80, 0x1b,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x1e, 0x05, 0xa9, 0x0e,
- 0x97, 0x2e, 0xe0, 0xac,
- 0xe0, 0xb4, 0x1e, 0x25,
- 0x1e, 0x05, 0x9d, 0x0e,
- 0x19, 0x5e, 0xe0, 0xa0,
- 0xe6, 0x40, 0x18, 0x20,
- 0x99, 0x51, 0x15, 0x1e,
- 0x1e, 0x05, 0xa3, 0x0e,
- 0x1e, 0x15, 0xe0, 0x9c,
- 0x1e, 0x65, 0xe0, 0xb0,
- 0x13, 0x0e, 0xe0, 0xa8,
- 0x1e, 0xb5, 0x81, 0x01,
- 0x1e, 0x75, 0xe0, 0xa4,
- 0xbd, 0x0e, 0xe0, 0x98,
- 0xb9, 0x0e, 0xbb, 0x0e,
- 0xb5, 0x0e, 0xb7, 0x0e,
- 0xb1, 0x0e, 0xb3, 0x0e,
- 0x81, 0x45, 0xaf, 0x0e,
- 0x0a, 0x50, 0x71, 0x0c,
- 0xa1, 0x5b, 0xec, 0x04,
- 0x29, 0x54, 0xfe, 0x95,
- 0xe6, 0x40, 0x14, 0x20,
- 0x12, 0x10, 0x1b, 0x7e,
- 0x25, 0x6e, 0xe4, 0xc0,
- 0xe5, 0x80, 0x0c, 0x40,
- 0x65, 0x01, 0x18, 0x50,
- 0x0a, 0x50, 0x40, 0x02,
- 0xc0, 0x04, 0x66, 0x01,
- 0x10, 0x10, 0x21, 0xce,
- 0x1f, 0x5e, 0xe6, 0x40,
- 0xe0, 0x08, 0x44, 0x96,
- 0x81, 0x71, 0x27, 0x3e,
- 0x93, 0x95, 0xab, 0xbe,
- 0x02, 0x0a, 0xa4, 0x14,
- 0xc7, 0xff, 0x63, 0xfd,
- 0xa1, 0x0b, 0x8a, 0x05,
- 0x25, 0xb4, 0x86, 0xd5,
- 0xad, 0x2e, 0x96, 0x3b,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0x78, 0x30, 0x0c, 0x13,
- 0xa3, 0x24, 0x96, 0x4b,
- 0x6b, 0x58, 0xa9, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x03, 0x82, 0xb5,
- 0x81, 0x21, 0x78, 0xc0,
- 0x78, 0x30, 0x0c, 0x13,
- 0xab, 0x34, 0x96, 0x4b,
- 0x6a, 0x98, 0xa1, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xa7, 0x34, 0x84, 0x45,
- 0xad, 0x24, 0xab, 0xb4,
- 0xe2, 0xa4, 0x04, 0x0a,
- 0x0f, 0xfc, 0x43, 0xf6,
- 0x80, 0x08, 0x44, 0x96,
- 0x80, 0x00, 0x54, 0x13,
- 0x88, 0x91, 0x02, 0x71,
- 0x84, 0x61, 0x04, 0xa1,
- 0x84, 0x81, 0x0d, 0x85,
- 0x81, 0x21, 0x2b, 0xb4,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0xf8, 0x30, 0x0c, 0x13,
- 0x96, 0x3b, 0x1d, 0x44,
- 0x68, 0xb8, 0x9f, 0x54,
- 0x27, 0x34, 0xe8, 0x00,
- 0xad, 0x24, 0xa1, 0x0b,
- 0x20, 0x02, 0xf8, 0x95,
- 0xe5, 0xa0, 0x04, 0xf0,
- 0x06, 0xf0, 0x18, 0x12,
- 0x3e, 0x2e, 0xe5, 0xd0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0x96, 0x03, 0x11, 0x3e,
- 0xe1, 0xae, 0x40, 0x0a,
- 0xbc, 0x3e, 0x9b, 0xb4,
- 0x2b, 0x34, 0xad, 0x0e,
- 0xa1, 0x44, 0x96, 0x2b,
- 0xef, 0xfc, 0x4c, 0xe8,
- 0x00, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0xc0,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x96, 0x2b, 0x11, 0x04,
- 0xa9, 0x44, 0xab, 0x34,
- 0x2d, 0x04, 0xbc, 0x0e,
- 0x4b, 0xf8, 0x86, 0xbb,
- 0x97, 0x04, 0xef, 0xfc,
- 0xe0, 0x30, 0x00, 0x09,
- 0x84, 0x05, 0xa1, 0x0b,
- 0x65, 0x70, 0x00, 0xf0,
- 0xe5, 0x80, 0x04, 0xf0,
- 0x0a, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0x90,
- 0xbc, 0x2e, 0x96, 0x3b,
- 0x9b, 0x24, 0xad, 0x04,
- 0x4a, 0xb8, 0x9f, 0x44,
- 0xbd, 0x04, 0xef, 0xfc,
- 0x99, 0x24, 0x95, 0x14,
- 0xbb, 0x04, 0xad, 0x0e,
- 0xb5, 0x34, 0xb3, 0xb4,
- 0x84, 0x1a, 0x91, 0x0e,
- 0x8b, 0x2e, 0x8d, 0xae,
- 0xaf, 0x04, 0x93, 0x24,
- 0x89, 0x2e, 0xb1, 0xc4,
- 0xfc, 0xbe, 0xfe, 0x0e,
- 0xbe, 0xce, 0xab, 0xb4,
- 0xb9, 0x44, 0xbc, 0x3e,
- 0x9b, 0x04, 0xb7, 0x54,
- 0x91, 0x34, 0xad, 0x24,
- 0xe8, 0x18, 0x75, 0x68,
- 0x81, 0x01, 0x00, 0x2b,
- 0xf1, 0xd5, 0xa7, 0x34,
- 0x83, 0x7d, 0x8e, 0x18,
- 0x1e, 0xf0, 0xd8, 0xd5,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x3e, 0x2e,
- 0x00, 0x50, 0x00, 0x9b,
- 0x19, 0x11, 0xe7, 0x60,
- 0x81, 0x85, 0x81, 0x21,
- 0x78, 0x60, 0x40, 0x23,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x30, 0x40, 0x23,
- 0xa1, 0x1b, 0xc1, 0x2c,
- 0x0c, 0x50, 0xfe, 0x15,
- 0x0e, 0x40, 0x67, 0x60,
- 0x7c, 0x3e, 0xe4, 0xc0,
- 0xbe, 0xb4, 0x81, 0xa1,
- 0x9c, 0x04, 0x85, 0xd5,
- 0x63, 0xfd, 0x00, 0x0a,
- 0x88, 0xa5, 0xc7, 0xff,
- 0x78, 0x30, 0x0e, 0x15,
- 0xa0, 0x24, 0x96, 0x0b,
- 0xe0, 0x42, 0xa4, 0x3a,
- 0x42, 0x98, 0xe4, 0x58,
- 0x09, 0x0e, 0xe8, 0x00,
- 0x9c, 0x14, 0x96, 0x0b,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x42, 0x08,
- 0x96, 0x0b, 0x7e, 0x0e,
- 0xe0, 0x30, 0x0e, 0x15,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x41, 0x68,
- 0xfc, 0x34, 0xfe, 0x14,
- 0xf8, 0x60, 0x4c, 0x13,
- 0x98, 0x0c, 0x89, 0x14,
- 0xf8, 0x30, 0x4c, 0x13,
- 0x84, 0x61, 0x02, 0xa1,
- 0x8e, 0x08, 0x88, 0x71,
- 0xf4, 0x55, 0x81, 0xad,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x18, 0x0e, 0x24, 0x13,
- 0x44, 0x1a, 0xf0, 0x00,
- 0x40, 0x1a, 0xe4, 0x82,
- 0x02, 0x24, 0xe4, 0x02,
- 0x82, 0xcf, 0xe1, 0x7c,
- 0x81, 0x01, 0x00, 0xc3,
- 0xf2, 0x84, 0x42, 0x22,
- 0x64, 0x01, 0x04, 0xc0,
- 0x42, 0x12, 0xc0, 0x80,
- 0x18, 0x14, 0xf2, 0x80,
- 0xe1, 0xc7, 0xe1, 0x7c,
- 0x42, 0x12, 0x98, 0x23,
- 0xe1, 0x27, 0x72, 0x80,
- 0xa2, 0x2f, 0xe0, 0x17,
- 0x08, 0x0e, 0x08, 0x23,
- 0x42, 0x2a, 0xff, 0x00,
- 0x44, 0x2a, 0xe4, 0x8e,
- 0x06, 0x14, 0xe4, 0x0e,
- 0x86, 0x4f, 0xe1, 0x7c,
- 0x42, 0x12, 0x88, 0x23,
- 0x04, 0x20, 0xf2, 0x8c,
- 0xc0, 0x08, 0x64, 0x01,
- 0xf2, 0x80, 0x42, 0x12,
- 0xe1, 0x7c, 0x06, 0x14,
- 0x86, 0x23, 0xe9, 0x37,
- 0x72, 0x80, 0x42, 0x12,
- 0xe8, 0x17, 0xd9, 0x27,
- 0x02, 0x0e, 0x22, 0x2f,
- 0x42, 0x22, 0xf8, 0x00,
- 0x02, 0x12, 0xfa, 0x04,
- 0xc0, 0x7f, 0x6b, 0xfd,
- 0x40, 0x10, 0xa1, 0x1d,
- 0xa0, 0x5d, 0x1c, 0x00,
- 0x40, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0x9c, 0x00,
- 0xfa, 0x3c, 0x04, 0xcc,
- 0x88, 0x6b, 0x00, 0x8b,
- 0x60, 0x2c, 0x10, 0x09,
- 0x01, 0xa1, 0x83, 0x41,
- 0x20, 0x34, 0xc8, 0x27,
- 0x21, 0x4f, 0x86, 0x7b,
- 0x0f, 0xae, 0x82, 0x0b,
- 0x0d, 0xae, 0x84, 0x1b,
- 0x52, 0x98, 0x88, 0x2b,
- 0x58, 0xae, 0xe8, 0x30,
- 0x1a, 0xae, 0x80, 0x9b,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x92, 0x1b, 0x0e, 0x0b,
- 0xe8, 0x30, 0x57, 0xa8,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x06, 0xf0, 0x0f, 0x04,
- 0x22, 0x14, 0xe4, 0x60,
- 0x58, 0x0e, 0x92, 0x2b,
- 0x53, 0x98, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x18, 0x1e, 0x05,
- 0x00, 0x04, 0x4c, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0xf2, 0x3c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x9b, 0x00, 0x7b,
- 0x60, 0x2c, 0x0e, 0x09,
- 0x0e, 0x29, 0x84, 0x6b,
- 0x83, 0x51, 0x60, 0x30,
- 0x60, 0x10, 0x0e, 0x4b,
- 0x21, 0x5f, 0x81, 0xb1,
- 0x1c, 0x34, 0x86, 0xab,
- 0x7c, 0xbe, 0x82, 0x0b,
- 0xe8, 0x88, 0x04, 0x54,
- 0x88, 0x1b, 0x3e, 0xbe,
- 0xe8, 0x30, 0x4f, 0x08,
- 0x00, 0x90, 0x00, 0x8b,
- 0x01, 0x95, 0xe4, 0xc0,
- 0x41, 0xbe, 0x99, 0x11,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x34, 0x40, 0xb5,
- 0xe0, 0x2c, 0x40, 0xb5,
- 0xfe, 0x15, 0xa1, 0x1b,
- 0x65, 0x80, 0x14, 0xa0,
- 0x05, 0xc5, 0xe0, 0x91,
- 0xa1, 0x0b, 0x81, 0x01,
- 0x28, 0x04, 0x88, 0xd5,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x68, 0x30, 0x53, 0x08,
- 0xa1, 0x0b, 0x90, 0x1b,
- 0x7c, 0x04, 0x86, 0xd5,
- 0xe4, 0x10, 0x06, 0xf0,
- 0xa4, 0x0e, 0x90, 0x2b,
- 0x9e, 0x14, 0xa8, 0x04,
- 0xe8, 0x30, 0x4e, 0xe8,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x06, 0xf0, 0x3e, 0x04,
- 0x90, 0x2b, 0xe4, 0x10,
- 0xf8, 0x30, 0x52, 0x05,
- 0xe0, 0x60, 0x14, 0x05,
- 0x4e, 0x18, 0x9e, 0x14,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x04, 0x1e, 0x05,
- 0x00, 0x30, 0x52, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0x88, 0xa1, 0x02, 0xb1,
- 0x9a, 0x18, 0x88, 0x91,
- 0xf4, 0x95, 0x83, 0xbd,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x7b, 0x11, 0x24,
- 0x88, 0x9b, 0x15, 0xa4,
- 0xff, 0x81, 0x13, 0xb4,
- 0x41, 0xf6, 0xa1, 0x2b,
- 0x4c, 0x96, 0x0f, 0xfc,
- 0x8a, 0x05, 0x80, 0x08,
- 0x44, 0x2a, 0x2b, 0x3f,
- 0x46, 0x3a, 0xe6, 0x8a,
- 0x81, 0x61, 0x66, 0x8e,
- 0x42, 0x3a, 0x8f, 0x1e,
- 0x46, 0x3a, 0xe5, 0x02,
- 0x00, 0x24, 0x65, 0x82,
- 0x82, 0x03, 0xe1, 0x84,
- 0x72, 0x98, 0x42, 0x32,
- 0x73, 0x98, 0x81, 0x31,
- 0x0f, 0x24, 0xef, 0xec,
- 0x41, 0xfe, 0x91, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0x5f, 0xfc, 0x41, 0xfe,
- 0x02, 0x94, 0xa1, 0x9b,
- 0x81, 0x81, 0x41, 0x84,
- 0x50, 0x9c, 0x42, 0x12,
- 0x50, 0x1a, 0x84, 0x73,
- 0x80, 0x73, 0x40, 0x26,
- 0x40, 0x8a, 0x8e, 0x83,
- 0xac, 0x8e, 0xf0, 0x0a,
- 0x8c, 0x0b, 0x28, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe6, 0x82, 0x40, 0x1a,
- 0x64, 0x01, 0x00, 0x00,
- 0xdf, 0x07, 0xc0, 0x40,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x5d, 0x93, 0xc0, 0x3f,
- 0xfb, 0x80, 0x00, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x7b, 0x04, 0x9b,
- 0x81, 0x61, 0x00, 0x5b,
- 0x81, 0x11, 0x12, 0x0b,
- 0x81, 0xb1, 0x01, 0xa1,
- 0x03, 0x0a, 0x81, 0xc5,
- 0x82, 0x75, 0xe2, 0x3c,
- 0xf0, 0x08, 0x00, 0x25,
- 0xf8, 0x04, 0x00, 0x45,
- 0x56, 0x42, 0x84, 0xa3,
- 0x82, 0x11, 0x72, 0xac,
- 0xfc, 0x95, 0x8f, 0x1d,
- 0x60, 0x00, 0x17, 0x4a,
- 0xe1, 0x84, 0x00, 0xa4,
- 0x60, 0x00, 0x16, 0x1a,
- 0xe0, 0xfc, 0x02, 0xb4,
- 0x60, 0x00, 0x14, 0x6a,
- 0x7e, 0x0e, 0xa2, 0x0f,
- 0xe5, 0x80, 0x42, 0x0a,
- 0x61, 0x88, 0x42, 0x1a,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x42, 0x2a, 0x7c, 0x0e,
- 0x3e, 0x3e, 0xed, 0x80,
- 0xe4, 0x30, 0x10, 0x30,
- 0x5e, 0x27, 0x89, 0x5e,
- 0x89, 0xa5, 0xe0, 0x5c,
- 0x60, 0x1c, 0x4c, 0xca,
- 0x44, 0x0a, 0x81, 0x01,
- 0x40, 0x0a, 0xe1, 0x80,
- 0x8e, 0xe5, 0xe9, 0x9c,
- 0x81, 0x01, 0x26, 0x24,
- 0x04, 0xca, 0xa4, 0x14,
- 0x04, 0x1a, 0xe0, 0x00,
- 0x02, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x1e, 0x27, 0xe1, 0x88,
- 0x42, 0x0a, 0xe0, 0x5c,
- 0x8a, 0xa5, 0xed, 0x80,
- 0x64, 0x7c, 0x0b, 0x0a,
- 0x00, 0x50, 0x82, 0x3b,
- 0x46, 0x20, 0x6c, 0x80,
- 0x44, 0x52, 0x9c, 0x00,
- 0x02, 0x06, 0x7b, 0x80,
- 0x00, 0x22, 0xc0, 0x00,
- 0x20, 0x23, 0xec, 0x7c,
- 0xef, 0x80, 0x08, 0x14,
- 0x6c, 0x00, 0x0a, 0x04,
- 0x7e, 0x04, 0xa1, 0x3f,
- 0x48, 0x52, 0xa1, 0x1f,
- 0x04, 0x22, 0x78, 0x90,
- 0xa8, 0x3f, 0xec, 0x04,
- 0x82, 0x03, 0x7c, 0x14,
- 0x94, 0x2b, 0x25, 0x3f,
- 0x72, 0x84, 0x42, 0x32,
- 0x69, 0xf8, 0x96, 0x3b,
- 0x09, 0x54, 0xef, 0xec,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x82, 0x61, 0x61, 0x0c,
- 0x0c, 0x0a, 0x90, 0x91,
- 0xec, 0xb5, 0xe2, 0x40,
- 0xb0, 0xf1, 0x3e, 0x04,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x1c, 0x40, 0x51,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x02, 0x10, 0x0a, 0x28,
- 0x08, 0x14, 0xec, 0x04,
- 0xe0, 0x31, 0x61, 0xfc,
- 0x83, 0x41, 0x08, 0x13,
- 0x83, 0x17, 0x03, 0xa5,
- 0x78, 0x30, 0x06, 0x5b,
- 0xec, 0x04, 0x04, 0x20,
- 0x82, 0x60, 0x80, 0xc0,
- 0x46, 0xc3, 0x8a, 0xc3,
- 0xcd, 0x5a, 0xf8, 0x60,
- 0x0a, 0xc4, 0x0a, 0x63,
- 0x18, 0x64, 0xfb, 0x00,
- 0x4a, 0x42, 0x7b, 0x00,
- 0x46, 0x63, 0xf1, 0x94,
- 0x98, 0x53, 0x60, 0x2c,
- 0xfb, 0x14, 0x4a, 0x12,
- 0xe0, 0x5c, 0x46, 0x53,
- 0xf8, 0xf5, 0xa1, 0x2b,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x88, 0x0c, 0x34,
- 0x01, 0x45, 0x8a, 0x7b,
- 0xf0, 0x98, 0x58, 0x52,
- 0xd9, 0x7d, 0xdd, 0x2e,
- 0x06, 0x13, 0xfe, 0xd5,
- 0x44, 0x0a, 0x86, 0x03,
- 0x82, 0x11, 0x61, 0x8e,
- 0x61, 0x8e, 0x46, 0x1a,
- 0xf0, 0x98, 0x40, 0x42,
- 0x0c, 0x34, 0xc4, 0x27,
- 0x42, 0x42, 0x60, 0x88,
- 0x46, 0x52, 0xf0, 0x88,
- 0x44, 0x42, 0x70, 0x88,
- 0x81, 0x95, 0xf0, 0x98,
- 0xc1, 0x1d, 0xc5, 0x64,
- 0x42, 0x40, 0xcd, 0x6e,
- 0xd9, 0x3d, 0x1c, 0x00,
- 0x9c, 0x00, 0x46, 0x50,
- 0xfc, 0xf5, 0x85, 0x1b,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x00, 0x34, 0x00, 0x8b,
- 0x06, 0x03, 0xe1, 0xfc,
- 0x1f, 0x14, 0x82, 0xbb,
- 0x0d, 0x3e, 0x83, 0x07,
- 0x1d, 0x34, 0x8a, 0x6b,
- 0x23, 0x74, 0x84, 0x5b,
- 0x21, 0xa4, 0xa0, 0x2b,
- 0x3e, 0x1e, 0x82, 0x9b,
- 0x0b, 0x4e, 0x90, 0x0b,
- 0x7e, 0x2e, 0x81, 0x41,
- 0x09, 0x3e, 0xaa, 0x23,
- 0x3c, 0x3e, 0x96, 0x1b,
- 0x7c, 0x5e, 0x8a, 0x3b,
- 0x6c, 0xd8, 0x8c, 0x5b,
- 0xa1, 0x0b, 0xef, 0xf8,
- 0x09, 0x04, 0x86, 0x75,
- 0x3e, 0xae, 0x81, 0x41,
- 0x7e, 0x24, 0x96, 0x1b,
- 0x3c, 0x0e, 0x8c, 0x5b,
- 0x8d, 0x34, 0x90, 0x0b,
- 0xef, 0xf8, 0x6c, 0x08,
- 0x82, 0xd5, 0xa1, 0x0b,
- 0x81, 0x41, 0x0d, 0x24,
- 0x96, 0x1b, 0x7e, 0x04,
- 0x8c, 0x5b, 0x3e, 0x7e,
- 0x09, 0x04, 0xfc, 0x34,
- 0x3c, 0x0e, 0x80, 0x23,
- 0x6b, 0x18, 0x90, 0x0b,
- 0x16, 0x1b, 0xef, 0xf8,
- 0x0b, 0x64, 0x96, 0x8d,
- 0x09, 0x0e, 0x8c, 0xbb,
- 0x0a, 0x55, 0x94, 0x4b,
- 0x25, 0x94, 0x92, 0x0b,
- 0xfa, 0x20, 0x42, 0x12,
- 0xb0, 0x13, 0x82, 0x11,
- 0xa7, 0x14, 0x83, 0x13,
- 0x83, 0xb3, 0x8d, 0x1e,
- 0xe8, 0x00, 0x31, 0xec,
- 0x70, 0xa0, 0x46, 0xb2,
- 0x46, 0x3a, 0x80, 0x1b,
- 0x82, 0x81, 0x61, 0xae,
- 0x00, 0xa5, 0xc4, 0x37,
- 0x88, 0x0b, 0x7c, 0x0c,
- 0x7c, 0x0c, 0x08, 0x55,
- 0xf0, 0x8c, 0x44, 0x92,
- 0xfc, 0x0c, 0x0e, 0xc5,
- 0x71, 0x98, 0x48, 0xa2,
- 0x0a, 0x43, 0x8c, 0xa3,
- 0x38, 0x43, 0xb4, 0x53,
- 0x08, 0x4e, 0x98, 0x53,
- 0x0d, 0x14, 0x80, 0x4b,
- 0x82, 0x33, 0x82, 0x0b,
- 0x09, 0x04, 0x8c, 0x5e,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x80, 0xbb, 0x29, 0x04,
- 0x82, 0x8b, 0x2f, 0x74,
- 0x43, 0xfe, 0x13, 0x4e,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x8a, 0x6b, 0x0f, 0x2e,
- 0xb1, 0x44, 0xb3, 0x24,
- 0x81, 0x01, 0x7e, 0x0e,
- 0x9c, 0x0e, 0x91, 0x3e,
- 0x97, 0x0e, 0x99, 0x0e,
- 0x41, 0xf6, 0x15, 0x0e,
- 0x8b, 0x4e, 0xe0, 0x0c,
- 0x8d, 0x2e, 0x90, 0x0c,
- 0xad, 0x94, 0x88, 0x1e,
- 0x91, 0xa4, 0xab, 0x54,
- 0x40, 0x62, 0x89, 0x7e,
- 0x42, 0x0a, 0xf0, 0xac,
- 0xc4, 0x17, 0xe1, 0x9a,
- 0xfc, 0x04, 0x0a, 0x25,
- 0x84, 0xa5, 0xa1, 0x2b,
- 0x84, 0xe5, 0xa1, 0x2d,
- 0xfc, 0x04, 0x12, 0x15,
- 0x8e, 0x95, 0xa1, 0x1d,
- 0x40, 0x0a, 0x82, 0x01,
- 0xc4, 0x07, 0xe1, 0x9a,
- 0xfc, 0x00, 0x0a, 0x15,
- 0x8c, 0x95, 0xa1, 0x1d,
- 0x7c, 0x00, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x81, 0xa5, 0x8a, 0xf5,
- 0xfc, 0x04, 0x12, 0x05,
- 0x8a, 0x45, 0xa1, 0x0b,
- 0x7c, 0x04, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x03, 0x01, 0x88, 0xa5,
- 0xe4, 0xb0, 0x02, 0xf0,
- 0x8a, 0x7b, 0x1c, 0x0e,
- 0x0a, 0xf0, 0x0b, 0x04,
- 0x14, 0x2b, 0xe4, 0xc0,
- 0x00, 0xbc, 0x8c, 0x3b,
- 0xe4, 0xa0, 0x00, 0xf0,
- 0x96, 0x0b, 0x3e, 0x0e,
- 0x8f, 0x14, 0xbc, 0x1e,
- 0x56, 0x58, 0xfe, 0x44,
- 0x0d, 0x04, 0xef, 0xf8,
- 0x99, 0x24, 0x96, 0x1b,
- 0x3e, 0x0e, 0x97, 0x34,
- 0x95, 0x44, 0x94, 0x0b,
- 0x93, 0x54, 0xbc, 0x6e,
- 0xef, 0xf8, 0x68, 0x08,
- 0x8e, 0x5b, 0x09, 0x74,
- 0xe2, 0xa4, 0x00, 0x0a,
- 0x81, 0x01, 0x80, 0x75,
- 0x82, 0xb1, 0x9c, 0x0e,
- 0x80, 0x85, 0x91, 0xbd,
- 0xa1, 0x0b, 0x9c, 0x04,
- 0x01, 0x01, 0xea, 0xe5,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x60, 0x14, 0x0c, 0x19,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x94, 0x75, 0xf4, 0x1d,
- 0xe0, 0x18, 0x0c, 0x29,
- 0x92, 0xf5, 0xf0, 0x2d,
- 0xe6, 0x86, 0x50, 0x2a,
- 0xe5, 0x00, 0x11, 0x0a,
- 0x19, 0x21, 0x92, 0x55,
- 0x76, 0xd8, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xec,
- 0x64, 0x30, 0x00, 0x70,
- 0xe0, 0x04, 0x02, 0x06,
- 0x81, 0x91, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0x60, 0xfe, 0x95,
- 0x81, 0xb1, 0x64, 0x90,
- 0x81, 0x11, 0x01, 0x95,
- 0xe5, 0x00, 0x02, 0x8a,
- 0x41, 0x24, 0x80, 0xe5,
- 0x56, 0x22, 0x82, 0x11,
- 0xd1, 0x1d, 0xfa, 0xac,
- 0x00, 0xb4, 0xfe, 0x15,
- 0xd8, 0xb7, 0x61, 0xd0,
- 0x98, 0x71, 0x0f, 0x0e,
- 0x81, 0xa1, 0x48, 0x61,
- 0x81, 0x01, 0x03, 0xd5,
- 0x40, 0x96, 0x18, 0x24,
- 0xa1, 0x2b, 0xe0, 0x08,
- 0x0f, 0x14, 0x84, 0x85,
- 0xe1, 0x84, 0x00, 0x24,
- 0x81, 0x31, 0x16, 0x03,
- 0x6f, 0xec, 0x50, 0x08,
- 0xf2, 0xa4, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x81, 0x01, 0x1c, 0x0c,
- 0x84, 0x71, 0x02, 0xa1,
- 0xd1, 0xad, 0x88, 0x61,
- 0x15, 0x0a, 0x80, 0xc5,
- 0x80, 0x75, 0xe4, 0xfc,
- 0xf6, 0xe5, 0xa1, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x86, 0x6b, 0x04, 0x88,
- 0x60, 0x10, 0x02, 0x19,
- 0x00, 0xa9, 0x81, 0x91,
- 0x06, 0x0e, 0x60, 0x10,
- 0xc0, 0x00, 0x72, 0xc0,
- 0x88, 0xbb, 0x1d, 0x9e,
- 0x42, 0x96, 0x7e, 0x1e,
- 0xc0, 0x01, 0x67, 0xb9,
- 0x8b, 0x1e, 0x80, 0x04,
- 0x11, 0x0e, 0x8d, 0x1e,
- 0x63, 0x21, 0x41, 0x56,
- 0x15, 0x0e, 0xc0, 0x01,
- 0x6e, 0xa1, 0x00, 0x06,
- 0x1b, 0x0e, 0xc0, 0x01,
- 0x8f, 0x1e, 0x84, 0x0b,
- 0x19, 0x1e, 0x93, 0x1e,
- 0x97, 0x3e, 0x8c, 0x1b,
- 0xe8, 0x00, 0x48, 0xc8,
- 0x6c, 0x04, 0x00, 0xa0,
- 0xe0, 0x08, 0x42, 0xc6,
- 0x74, 0x1c, 0x01, 0x0a,
- 0x09, 0x0e, 0x81, 0x01,
- 0x80, 0x88, 0x00, 0xa4,
- 0x04, 0x50, 0x02, 0xf0,
- 0xe0, 0x10, 0x10, 0x1a,
- 0x1c, 0x00, 0x02, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x00, 0x10, 0x5e, 0x05,
- 0x09, 0x04, 0xb1, 0x8b,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x08, 0x42, 0xc6,
- 0x42, 0xc6, 0xa1, 0x0b,
- 0xe5, 0xad, 0x00, 0x08,
- 0x8a, 0x95, 0xfc, 0x1e,
- 0xa1, 0x0b, 0xfc, 0x04,
- 0x7e, 0x14, 0x8a, 0x35,
- 0x0e, 0x0b, 0x90, 0x7b,
- 0x49, 0x98, 0x96, 0x2b,
- 0x18, 0xb1, 0xe8, 0x00,
- 0x04, 0x06, 0x81, 0x11,
- 0x96, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x72, 0xc8,
- 0xe6, 0x9e, 0x4e, 0x7a,
- 0x00, 0x06, 0x83, 0x75,
- 0xe7, 0xad, 0x61, 0x00,
- 0x84, 0x15, 0x9d, 0x0e,
- 0x00, 0xf0, 0x18, 0x34,
- 0x1a, 0x44, 0xe4, 0xe0,
- 0xe1, 0xec, 0x0b, 0x76,
- 0x90, 0x1b, 0x3e, 0x0e,
- 0xfe, 0x24, 0x89, 0x04,
- 0x92, 0x0b, 0x3c, 0x0e,
- 0xe8, 0x00, 0x40, 0xc8,
- 0x6d, 0x0c, 0x9d, 0x04,
- 0x93, 0x7b, 0x82, 0x91,
- 0x7c, 0x04, 0xfa, 0x35,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x61, 0x06, 0x4e, 0x0a,
- 0xe0, 0x88, 0x12, 0x24,
- 0x60, 0x06, 0x50, 0x0a,
- 0x0f, 0x44, 0x88, 0xcb,
- 0x4e, 0x9a, 0x86, 0x6b,
- 0x81, 0x11, 0x66, 0x9e,
- 0xe6, 0xa2, 0x50, 0x9a,
- 0x8e, 0x63, 0x0d, 0x34,
- 0x40, 0x2a, 0x10, 0xc3,
- 0x10, 0x1e, 0xe6, 0x8a,
- 0xf0, 0xa4, 0x4e, 0x62,
- 0x65, 0x0e, 0x44, 0x3a,
- 0xf0, 0xa4, 0x50, 0xc2,
- 0xe5, 0x8e, 0x46, 0x3a,
- 0x8f, 0xad, 0x81, 0xc5,
- 0x46, 0xaa, 0x56, 0xaa,
- 0xc4, 0x10, 0x14, 0xa0,
- 0xd0, 0xa4, 0x56, 0xb2,
- 0x42, 0x12, 0x7e, 0x35,
- 0x88, 0xc1, 0xd0, 0xac,
- 0x52, 0xca, 0x91, 0xcd,
- 0x54, 0x60, 0x46, 0xb2,
- 0xfc, 0x15, 0xdc, 0x00,
- 0xe1, 0x84, 0x18, 0x04,
- 0x42, 0x5a, 0x02, 0xc3,
- 0x40, 0xca, 0xe6, 0x96,
- 0x0c, 0x0c, 0xe0, 0x02,
- 0x81, 0x35, 0xf0, 0x7c,
- 0xc1, 0xc3, 0x8b, 0x45,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x48, 0x0a, 0x08, 0x6b,
- 0x40, 0x0a, 0xe5, 0x06,
- 0x0a, 0x24, 0x65, 0x86,
- 0x02, 0x44, 0xe1, 0x84,
- 0xe8, 0x47, 0x61, 0xb0,
- 0x18, 0x34, 0x68, 0x07,
- 0x20, 0x1f, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x34,
- 0x40, 0x42, 0xa0, 0x5f,
- 0x41, 0xb8, 0xf0, 0x94,
- 0x42, 0x12, 0x6f, 0xec,
- 0x04, 0x06, 0xf2, 0xb0,
- 0x40, 0x40, 0x60, 0x01,
- 0x84, 0x03, 0xff, 0x31,
- 0x81, 0x31, 0x07, 0x0b,
- 0x72, 0x8c, 0x42, 0x12,
- 0x9f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x40, 0x0a, 0xdf, 0xfc,
- 0x02, 0x04, 0xf0, 0x0a,
- 0x84, 0x13, 0xe1, 0x84,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x14, 0x44, 0x01,
- 0x08, 0x3c, 0x81, 0x31,
- 0x0a, 0x3c, 0xaf, 0x41,
- 0xfc, 0x00, 0x06, 0x14,
- 0x60, 0x18, 0x44, 0x01,
- 0xe4, 0x1c, 0x00, 0x30,
- 0x60, 0x1c, 0x44, 0x01,
- 0xec, 0x04, 0x00, 0x30,
- 0x60, 0x20, 0x44, 0x01,
- 0x44, 0x41, 0xc2, 0x17,
- 0x83, 0x01, 0x60, 0x10,
- 0xe0, 0x24, 0x44, 0x11,
- 0xe0, 0x28, 0x44, 0x11,
- 0xe0, 0x2c, 0x44, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0x2e, 0x00, 0x38,
- 0xa1, 0x3b, 0xff, 0xfc,
- 0x82, 0x08, 0x84, 0x45,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x71, 0x80, 0x48, 0x22,
- 0x26, 0x23, 0x90, 0x01,
- 0x40, 0x00, 0x90, 0x31,
- 0x40, 0x01, 0x73, 0xc1,
- 0x73, 0xc1, 0x46, 0x30,
- 0x06, 0x23, 0xc0, 0x01,
- 0x81, 0x35, 0x88, 0x03,
- 0xff, 0xfc, 0x00, 0x2e,
- 0x86, 0x0e, 0x84, 0x2e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x86, 0x7b, 0x09, 0x0e,
- 0x61, 0x84, 0x00, 0x14,
- 0xe0, 0xac, 0x06, 0x74,
- 0x88, 0x6b, 0x20, 0x23,
- 0x84, 0x13, 0x86, 0x23,
- 0xe1, 0x0e, 0x40, 0x1a,
- 0xe1, 0x0e, 0x42, 0x2a,
- 0xe1, 0xac, 0x04, 0x04,
- 0x61, 0x1e, 0x56, 0x2a,
- 0xe1, 0xac, 0x04, 0x14,
- 0xe1, 0x1e, 0x50, 0x2a,
- 0xe4, 0x04, 0x04, 0xb0,
- 0x61, 0x1e, 0x54, 0x2a,
- 0xe0, 0x80, 0x04, 0x06,
- 0x06, 0x84, 0x22, 0x23,
- 0x06, 0x23, 0xe0, 0xac,
- 0xf1, 0x84, 0x42, 0x02,
- 0x04, 0xb4, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xe0, 0xac,
- 0x3e, 0x0e, 0xa4, 0x03,
- 0x85, 0xb5, 0x90, 0x9b,
- 0x82, 0x35, 0x91, 0x9b,
- 0xe0, 0x2c, 0x52, 0x1a,
- 0xa0, 0x10, 0x1e, 0x05,
- 0xa0, 0x0c, 0x1e, 0x15,
- 0xa0, 0x00, 0x01, 0x68,
- 0xe0, 0x20, 0x52, 0x1a,
- 0xa0, 0x00, 0x00, 0x88,
- 0x52, 0x1a, 0x09, 0x04,
- 0x00, 0xf8, 0xe0, 0x2c,
- 0xc0, 0x00, 0x20, 0x01,
- 0x80, 0x10, 0x1e, 0x05,
- 0x80, 0x08, 0x1e, 0x15,
- 0x17, 0x9b, 0x80, 0xc5,
- 0x80, 0xb5, 0x81, 0x01,
- 0xbe, 0x14, 0x89, 0x04,
- 0xe8, 0x00, 0x4b, 0x08,
- 0x60, 0x88, 0x02, 0x94,
- 0x0c, 0x25, 0x82, 0x91,
- 0x8c, 0x13, 0x7c, 0x04,
- 0xe1, 0x1e, 0x52, 0x9a,
- 0x84, 0x2e, 0x80, 0x23,
- 0xf4, 0xb5, 0x95, 0x9b,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x84, 0x7b, 0x02, 0x8b,
- 0x86, 0x6b, 0x00, 0x9b,
- 0x00, 0x06, 0x1c, 0x14,
- 0xe0, 0x24, 0xe0, 0x80,
- 0x43, 0x38, 0xa4, 0x34,
- 0xa0, 0x44, 0xe8, 0x00,
- 0x9e, 0x14, 0x98, 0x0e,
- 0x88, 0x0b, 0x60, 0x24,
- 0x42, 0xb8, 0xa4, 0x34,
- 0x9a, 0x0e, 0xe8, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x60, 0x24, 0x0e, 0x19,
- 0x10, 0x49, 0x83, 0x21,
- 0x86, 0x6b, 0x60, 0x24,
- 0x60, 0x28, 0x0e, 0x59,
- 0x1c, 0x04, 0x80, 0x9b,
- 0x22, 0x34, 0xa3, 0x2f,
- 0xe0, 0x90, 0x02, 0x44,
- 0x68, 0x2c, 0x48, 0x88,
- 0xe8, 0x94, 0x14, 0x24,
- 0x9c, 0x24, 0xa4, 0x14,
- 0x22, 0x34, 0x98, 0x0e,
- 0x04, 0x0b, 0xcf, 0x17,
- 0x47, 0xd8, 0x94, 0x2b,
- 0x1a, 0x0e, 0xe8, 0x2c,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x40, 0x3a, 0x00, 0x6b,
- 0x02, 0x7b, 0xe5, 0x0a,
- 0xe5, 0x8a, 0x42, 0x3a,
- 0x00, 0x00, 0x01, 0x81,
- 0xc0, 0x01, 0x67, 0xd1,
- 0x72, 0xa0, 0x42, 0x12,
- 0xe0, 0x3c, 0x44, 0x86,
- 0x6f, 0xe8, 0x71, 0x48,
- 0x7f, 0x21, 0x81, 0x31,
- 0x85, 0x0b, 0x81, 0x31,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x42, 0x7a, 0xdf, 0xfc,
- 0x44, 0x7a, 0xe5, 0x02,
- 0x00, 0x64, 0x65, 0x82,
- 0x82, 0x03, 0xe0, 0x9c,
- 0x72, 0xa0, 0x42, 0x22,
- 0xe0, 0xa0, 0x04, 0x64,
- 0xef, 0xe8, 0x6f, 0xe8,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0xc5, 0x0d, 0xc0, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0xa1, 0x1b, 0x00, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x0c, 0xc0, 0x3f,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xa1, 0x1b, 0x00, 0x5b,
- 0x60, 0x08, 0x40, 0x96,
- 0x64, 0x00, 0x18, 0x50,
- 0x00, 0x06, 0xc0, 0x80,
- 0x07, 0x0a, 0x40, 0x00,
- 0x40, 0xc6, 0xe6, 0x40,
- 0x19, 0x0a, 0x40, 0x00,
- 0xc0, 0xff, 0x67, 0xfc,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x5c, 0x08, 0xa1, 0x0b,
- 0x18, 0x14, 0xda, 0x00,
- 0xa1, 0x5d, 0x61, 0xfc,
- 0xe0, 0x57, 0x02, 0xc3,
- 0xd6, 0x37, 0x03, 0xc7,
- 0xd1, 0x80, 0x18, 0xc4,
- 0x42, 0xca, 0x8a, 0xc3,
- 0x84, 0x13, 0xe0, 0x86,
- 0xe0, 0x00, 0x02, 0x12,
- 0xe1, 0x0e, 0x42, 0x1a,
- 0xdd, 0x93, 0x90, 0x1e,
- 0x65, 0x06, 0x44, 0x0a,
- 0x42, 0x0a, 0x81, 0x31,
- 0x00, 0x20, 0xe5, 0x86,
- 0xc0, 0x04, 0x64, 0x01,
- 0xf2, 0x8c, 0x42, 0x12,
- 0x5c, 0x08, 0xee, 0x1d,
- 0x41, 0xfe, 0x5a, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0xd7, 0x07, 0x6a, 0x17,
- 0xa2, 0x0f, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x7e, 0x3e,
- 0x88, 0xbb, 0x09, 0x2e,
- 0xe0, 0x34, 0x04, 0x09,
- 0x8d, 0x6e, 0xfc, 0x1e,
- 0xe8, 0x0d, 0x3e, 0x0e,
- 0x60, 0x24, 0x02, 0xa9,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x15, 0x0a, 0x98, 0x15,
- 0x96, 0xb5, 0xe6, 0x40,
- 0x89, 0x04, 0xfc, 0x14,
- 0x75, 0x18, 0xfe, 0x34,
- 0x04, 0x10, 0x6f, 0xfc,
- 0xa1, 0x0b, 0xe4, 0x30,
- 0x7c, 0x04, 0x94, 0x95,
- 0x89, 0x14, 0x96, 0x3b,
- 0x72, 0xd8, 0xfe, 0x24,
- 0x00, 0xb0, 0xef, 0xfc,
- 0x81, 0x11, 0x64, 0x20,
- 0x55, 0x1d, 0x81, 0x75,
- 0x16, 0x25, 0x81, 0x21,
- 0x82, 0x11, 0x40, 0x04,
- 0x02, 0x0a, 0xc1, 0x2e,
- 0xfe, 0x15, 0xe2, 0x40,
- 0x89, 0x11, 0x7e, 0x04,
- 0xb0, 0x01, 0x01, 0x75,
- 0x78, 0x10, 0x40, 0x65,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc1, 0x6e,
- 0x09, 0x74, 0xfe, 0x55,
- 0x7e, 0x84, 0x90, 0xb1,
- 0xbc, 0xbe, 0x81, 0x01,
- 0xc0, 0x71, 0x7c, 0x94,
- 0xb0, 0x81, 0x05, 0xb5,
- 0x8a, 0x75, 0xa1, 0x0b,
- 0x90, 0x6b, 0x0b, 0x6e,
- 0x89, 0x84, 0xfe, 0x14,
- 0xf8, 0x10, 0x0e, 0x25,
- 0xa0, 0x04, 0x86, 0x14,
- 0x73, 0xd8, 0xa4, 0x34,
- 0x22, 0x24, 0xef, 0xfc,
- 0x1c, 0x04, 0x80, 0xbb,
- 0xe4, 0x60, 0x08, 0xf0,
- 0x60, 0x10, 0x12, 0x15,
- 0x76, 0x98, 0x94, 0x3b,
- 0x8c, 0x8b, 0x6f, 0xfc,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x78, 0x10, 0x50, 0xb5,
- 0x8d, 0x24, 0x94, 0x3b,
- 0x89, 0x04, 0xa0, 0x2e,
- 0x00, 0x14, 0xbc, 0x44,
- 0x68, 0x78, 0x96, 0x0b,
- 0x0b, 0x64, 0xef, 0xfc,
- 0x88, 0x81, 0x88, 0x71,
- 0xbe, 0x14, 0x82, 0x61,
- 0xf4, 0xb5, 0xc3, 0x6d,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x80, 0x6b, 0x06, 0x4a,
- 0x04, 0xc9, 0x84, 0x0a,
- 0x4c, 0x45, 0xe0, 0xc0,
- 0x02, 0x49, 0xed, 0xac,
- 0x4c, 0x05, 0xe0, 0x20,
- 0xc4, 0x0a, 0xed, 0xa8,
- 0xee, 0x24, 0x4c, 0x45,
- 0xe0, 0xcc, 0x04, 0x49,
- 0xed, 0xb0, 0x4c, 0x05,
- 0xe0, 0xc8, 0x04, 0x09,
- 0xe0, 0xc4, 0x04, 0x79,
- 0xed, 0xc0, 0x4c, 0x45,
- 0xe0, 0xd0, 0x04, 0x41,
- 0xed, 0xbc, 0x4c, 0x05,
- 0xe0, 0x2c, 0x04, 0x05,
- 0xed, 0xb4, 0x4c, 0xc5,
- 0xed, 0xb8, 0x4c, 0x75,
- 0xe0, 0xd4, 0x04, 0xc1,
- 0xe0, 0xd8, 0x04, 0x71,
- 0xed, 0xc4, 0x4c, 0x45,
- 0xe0, 0xe0, 0x04, 0x49,
- 0xee, 0x28, 0x4c, 0x05,
- 0xe0, 0xdc, 0x04, 0x01,
- 0xed, 0xc8, 0x4c, 0xc5,
- 0xed, 0xcc, 0x4c, 0x75,
- 0xed, 0xd4, 0x4c, 0x45,
- 0xe0, 0xf0, 0x04, 0x49,
- 0xe0, 0xe4, 0x04, 0xc9,
- 0xe0, 0xec, 0x04, 0x79,
- 0xed, 0xd0, 0x4c, 0x05,
- 0xe0, 0xe8, 0x04, 0x09,
- 0xed, 0xe4, 0x4c, 0x45,
- 0xed, 0xd8, 0x4c, 0xc5,
- 0xed, 0xe0, 0x4c, 0x75,
- 0x8a, 0xc4, 0x88, 0x44,
- 0xca, 0x84, 0xc8, 0x74,
- 0xe0, 0xf8, 0x04, 0x91,
- 0xe0, 0xfc, 0x04, 0xa1,
- 0x6d, 0xdc, 0x4c, 0x05,
- 0x4c, 0xc5, 0x81, 0x01,
- 0x4c, 0x75, 0xed, 0xf0,
- 0x4c, 0x85, 0xed, 0xf4,
- 0x4c, 0x95, 0xed, 0xf8,
- 0x4c, 0xa5, 0xee, 0x48,
- 0x4c, 0x05, 0xee, 0x4c,
- 0x4c, 0x45, 0xed, 0xe8,
- 0x06, 0x45, 0xed, 0xec,
- 0x04, 0xc5, 0xe0, 0x34,
- 0x04, 0x75, 0xe0, 0x10,
- 0x4c, 0x45, 0xe0, 0x14,
- 0x06, 0x45, 0xee, 0x50,
- 0x04, 0x85, 0xe0, 0x38,
- 0x04, 0x95, 0xe0, 0x18,
- 0x04, 0xa5, 0xe0, 0x1c,
- 0x4c, 0xc5, 0xe0, 0x20,
- 0x4c, 0x75, 0xee, 0x70,
- 0x4c, 0x95, 0xee, 0x74,
- 0x4c, 0xa5, 0xee, 0x7c,
- 0x83, 0xa1, 0x6e, 0x80,
- 0xee, 0x54, 0x4c, 0x45,
- 0xee, 0x78, 0x4c, 0x85,
- 0x04, 0xc5, 0x8c, 0x44,
- 0xa1, 0x94, 0xe0, 0x24,
- 0xee, 0x84, 0x4c, 0x45,
- 0xa4, 0x88, 0x8e, 0x44,
- 0x4c, 0x45, 0x9b, 0x74,
- 0xcc, 0x44, 0xee, 0x88,
- 0x4c, 0x45, 0xa7, 0xb4,
- 0xce, 0x44, 0xee, 0x8c,
- 0xee, 0x90, 0x4c, 0x45,
- 0xe0, 0x10, 0x06, 0x45,
- 0xee, 0x94, 0x4c, 0x45,
- 0xe0, 0x14, 0x06, 0x45,
- 0xee, 0x98, 0x4c, 0x45,
- 0xe0, 0x18, 0x06, 0x45,
- 0xee, 0x9c, 0x4c, 0x45,
- 0xe0, 0x1c, 0x06, 0x45,
- 0xee, 0xa0, 0x4c, 0x45,
- 0xe0, 0x20, 0x06, 0x45,
- 0xee, 0xa4, 0x4c, 0x45,
- 0xe0, 0x24, 0x06, 0x45,
- 0xee, 0xa8, 0x4c, 0x45,
- 0xe0, 0x28, 0x06, 0x45,
- 0xee, 0xac, 0x4c, 0x45,
- 0xe0, 0x2c, 0x06, 0x45,
- 0xee, 0xb0, 0x4c, 0x45,
- 0xe0, 0x30, 0x06, 0x35,
- 0xee, 0xb8, 0x4c, 0xc5,
- 0x4c, 0x35, 0x99, 0xc4,
- 0x97, 0x34, 0xee, 0xb4,
- 0x6d, 0x88, 0x4c, 0xc5,
- 0x7f, 0xfc, 0x59, 0xe6,
- 0x9f, 0x44, 0xc0, 0x20,
- 0xed, 0x84, 0x4c, 0x35,
- 0x4c, 0x85, 0xc8, 0x34,
- 0x9d, 0x84, 0xed, 0x80,
- 0x6d, 0x8c, 0x4c, 0x45,
- 0x67, 0xfc, 0x04, 0x30,
- 0x58, 0x2d, 0xc0, 0xff,
- 0xe0, 0x08, 0x18, 0x06,
- 0x01, 0x7c, 0x18, 0x34,
- 0x23, 0x44, 0xff, 0x21,
- 0x81, 0xc0, 0x18, 0xc4,
- 0x6d, 0x94, 0x4c, 0x75,
- 0x90, 0xb0, 0x46, 0x32,
- 0x18, 0x34, 0x25, 0x34,
- 0x4c, 0x85, 0x81, 0x40,
- 0x0e, 0x60, 0x6d, 0x90,
- 0xc0, 0x0d, 0x66, 0x00,
- 0xee, 0x34, 0x4c, 0x55,
- 0xee, 0x04, 0x4c, 0x25,
- 0x95, 0x34, 0xfc, 0x3e,
- 0x6d, 0xa4, 0x4c, 0xc5,
- 0xff, 0xf4, 0x59, 0xce,
- 0x6d, 0x9c, 0x4c, 0x45,
- 0xff, 0xf8, 0x08, 0x8e,
- 0x0c, 0x85, 0x99, 0x4b,
- 0x50, 0x82, 0xcd, 0x9c,
- 0x08, 0x40, 0x51, 0x90,
- 0x50, 0xa1, 0xcc, 0x04,
- 0xfc, 0xf5, 0xc0, 0x00,
- 0x6e, 0x3c, 0x4c, 0x05,
- 0x67, 0x00, 0x00, 0x60,
- 0x4c, 0x05, 0xc0, 0x06,
- 0x00, 0x60, 0x6d, 0x98,
- 0xc0, 0x02, 0x65, 0x00,
- 0x6e, 0x20, 0x4c, 0x35,
- 0xe0, 0x80, 0x06, 0x8a,
- 0x66, 0x01, 0x06, 0x60,
- 0x50, 0xc6, 0x40, 0x04,
- 0x4c, 0x65, 0xe0, 0x00,
- 0x4c, 0x05, 0xed, 0xa0,
- 0x4c, 0x35, 0xee, 0x2c,
- 0x4c, 0x25, 0xee, 0x30,
- 0x88, 0x75, 0xee, 0x14,
- 0xed, 0xf8, 0x0c, 0x35,
- 0xee, 0x28, 0x0c, 0x45,
- 0x86, 0xb5, 0x87, 0x4d,
- 0xed, 0xb4, 0x0c, 0x25,
- 0xe4, 0x08, 0x00, 0x20,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x61, 0x08, 0x18, 0x04,
- 0x58, 0x02, 0xa1, 0x01,
- 0xa9, 0xcd, 0xf1, 0xb0,
- 0xbe, 0xbe, 0x82, 0xd5,
- 0xed, 0xc4, 0x0c, 0xc5,
- 0xed, 0xc8, 0x0c, 0xb5,
- 0x80, 0xf5, 0x96, 0xcd,
- 0xee, 0x7c, 0x0c, 0xc5,
- 0xee, 0x80, 0x0c, 0xb5,
- 0x80, 0xc5, 0x96, 0xcd,
- 0x98, 0xf1, 0x10, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0xc5, 0xdd, 0x93,
- 0xaa, 0xcd, 0xed, 0xcc,
- 0x20, 0x41, 0xfe, 0x15,
- 0xa6, 0x43, 0x98, 0x33,
- 0xfc, 0x75, 0xa9, 0x4d,
- 0xed, 0xd0, 0x0c, 0x35,
- 0xfa, 0xf5, 0xac, 0x3d,
- 0xe4, 0x04, 0x06, 0x20,
- 0xe1, 0xfc, 0x08, 0x34,
- 0x46, 0x02, 0x06, 0x43,
- 0x83, 0x47, 0xf1, 0xb0,
- 0xf8, 0xb5, 0x89, 0x3d,
- 0xed, 0xb8, 0x0c, 0x45,
- 0xee, 0x24, 0x0c, 0xc5,
- 0x98, 0x43, 0x86, 0x43,
- 0xf6, 0xb5, 0x85, 0x4d,
- 0x6d, 0xd8, 0x0c, 0x45,
- 0x51, 0xf6, 0x91, 0x31,
- 0xa2, 0x4d, 0xe0, 0x0c,
- 0x3e, 0xb4, 0x82, 0xf5,
- 0x09, 0x06, 0xa1, 0x4b,
- 0x18, 0x86, 0x00, 0x00,
- 0x86, 0x05, 0x80, 0x00,
- 0x49, 0xf6, 0x23, 0x4b,
- 0x11, 0xc1, 0xe0, 0x0c,
- 0x84, 0x65, 0x89, 0x21,
- 0x3e, 0xb4, 0x83, 0x85,
- 0x49, 0xf6, 0xa5, 0x4b,
- 0x59, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x49, 0xf6,
- 0xe0, 0x0c, 0x59, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x58, 0x4c, 0x45,
- 0xee, 0x5c, 0x4c, 0xc5,
- 0xee, 0x60, 0x4c, 0x25,
- 0xed, 0xe0, 0x0c, 0x45,
- 0x82, 0x35, 0xa2, 0x4d,
- 0x84, 0xc5, 0xa1, 0x4b,
- 0x41, 0xf6, 0x23, 0x4b,
- 0x04, 0x65, 0xe0, 0x0c,
- 0x83, 0x75, 0x89, 0x21,
- 0x41, 0xf6, 0xa5, 0x4b,
- 0x47, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x64, 0x4c, 0x05,
- 0xee, 0x68, 0x4c, 0x35,
- 0xee, 0x6c, 0x4c, 0x25,
- 0x4c, 0x55, 0xc6, 0x0a,
- 0x40, 0x02, 0xee, 0x34,
- 0x4c, 0x05, 0xfa, 0x14,
- 0x8e, 0x0b, 0x6e, 0x34,
- 0xe8, 0x0c, 0x54, 0x48,
- 0x68, 0x0c, 0x46, 0xe8,
- 0x53, 0xb8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x68, 0x04,
- 0x68, 0x08, 0x72, 0x28,
- 0x0c, 0x05, 0x8e, 0x0b,
- 0x0c, 0x15, 0xee, 0x38,
- 0x4c, 0xa5, 0xee, 0x20,
- 0x4c, 0x05, 0xee, 0x18,
- 0xbe, 0x0d, 0x6e, 0x3c,
- 0x6e, 0x1c, 0x4c, 0xa5,
- 0x90, 0x84, 0x40, 0x02,
- 0x0e, 0x3c, 0x4c, 0x05,
- 0x00, 0x00, 0x82, 0x03,
- 0x81, 0x11, 0x6c, 0x04,
- 0xee, 0x40, 0x4c, 0x05,
- 0x6e, 0x44, 0x4c, 0x05,
- 0xbe, 0x1e, 0x81, 0x01,
- 0xbe, 0x04, 0x8f, 0x55,
- 0xe3, 0x1c, 0x01, 0x0a,
- 0xa1, 0xab, 0xd6, 0xd5,
- 0x0c, 0x05, 0x84, 0xd5,
- 0xa7, 0x0b, 0xee, 0x1c,
- 0xa5, 0x0b, 0x82, 0x25,
- 0xa3, 0x0b, 0x82, 0x65,
- 0x4a, 0xf8, 0x82, 0x95,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x6c, 0x18, 0x81, 0x85,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x55, 0x18, 0x81, 0x45,
- 0x8e, 0x0b, 0x68, 0x00,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x80, 0xf5, 0xa3, 0xab,
- 0x8e, 0x0b, 0x7c, 0x14,
- 0xfc, 0x38, 0x42, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x8a, 0x35, 0xa5, 0xab,
- 0x6e, 0x08, 0x0c, 0x15,
- 0x0c, 0x05, 0x87, 0x21,
- 0x84, 0x11, 0xee, 0x40,
- 0x4c, 0x15, 0x83, 0x0d,
- 0x40, 0x10, 0x4e, 0x40,
- 0x0c, 0x15, 0xdc, 0x00,
- 0x01, 0x0a, 0x6e, 0x28,
- 0x01, 0x16, 0xe0, 0x40,
- 0x4c, 0x05, 0x80, 0x00,
- 0x0c, 0x05, 0x8e, 0x40,
- 0x82, 0x0d, 0x6e, 0x20,
- 0x84, 0x04, 0x02, 0x10,
- 0x8e, 0x40, 0x4c, 0x15,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0xee, 0x3c, 0x0c, 0x15,
- 0xec, 0x38, 0x00, 0x00,
- 0x4c, 0x05, 0x80, 0x1d,
- 0x8e, 0x0b, 0x4e, 0x3c,
- 0xfc, 0x38, 0x56, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x88, 0x15, 0xa7, 0xab,
- 0x6e, 0x40, 0x0c, 0x05,
- 0x0c, 0x15, 0x87, 0x21,
- 0x01, 0x0a, 0xee, 0x08,
- 0x01, 0x16, 0xe0, 0x40,
- 0x84, 0x11, 0x00, 0x00,
- 0x0e, 0x40, 0x4c, 0x05,
- 0x0c, 0x05, 0x83, 0x0d,
- 0x4c, 0x15, 0xee, 0x20,
- 0x0c, 0x15, 0xce, 0x40,
- 0x40, 0x0a, 0xee, 0x3c,
- 0x00, 0x00, 0xe6, 0x8a,
- 0x80, 0x1d, 0xec, 0x18,
- 0x4e, 0x3c, 0x4c, 0x05,
- 0x50, 0x38, 0x8e, 0x0b,
- 0x0c, 0xa5, 0xe8, 0x08,
- 0x3e, 0x04, 0xee, 0x18,
- 0x82, 0x01, 0xaf, 0xab,
- 0x00, 0x0c, 0xbe, 0x0e,
- 0xa1, 0x0b, 0xe2, 0x00,
- 0x0c, 0x05, 0xe2, 0x65,
- 0x81, 0x11, 0x6e, 0x04,
- 0x26, 0x06, 0x82, 0x01,
- 0xfa, 0x80, 0x00, 0x04,
- 0x0c, 0x25, 0x83, 0x95,
- 0x00, 0x00, 0x6d, 0x9c,
- 0x0c, 0x45, 0xec, 0x04,
- 0x02, 0x23, 0xee, 0x20,
- 0x04, 0x33, 0x84, 0x11,
- 0x04, 0x53, 0xe0, 0x30,
- 0x58, 0x3a, 0xe0, 0x60,
- 0x46, 0x5a, 0xe1, 0x92,
- 0x44, 0xc3, 0xe1, 0x92,
- 0x46, 0x8a, 0xe0, 0x30,
- 0x46, 0x32, 0xe8, 0x30,
- 0x44, 0x33, 0xd0, 0x90,
- 0xa1, 0x0b, 0xe0, 0x60,
- 0x59, 0x95, 0xf8, 0xf5,
- 0xc1, 0xc3, 0x81, 0x81,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x54, 0x8e, 0x2d, 0x84,
- 0xc0, 0x10, 0x64, 0x11,
- 0x13, 0xae, 0xaf, 0x94,
- 0x63, 0xd1, 0x14, 0x4e,
- 0x91, 0xae, 0xc0, 0x10,
- 0x8d, 0x8e, 0x8f, 0x9e,
- 0xa1, 0xc4, 0xab, 0xa4,
- 0xa9, 0x74, 0xa5, 0x64,
- 0xa3, 0x84, 0xa7, 0x94,
- 0x89, 0x7e, 0x8b, 0xae,
- 0xfc, 0x6e, 0xfe, 0x9e,
- 0xbc, 0xce, 0xbe, 0x8e,
- 0xef, 0xfc, 0x57, 0x68,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xa1, 0x0d, 0xe0, 0x88,
- 0x0c, 0x15, 0x80, 0xb5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xa5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x0c, 0x15, 0x8b, 0xc5,
- 0x0c, 0x25, 0xe1, 0x40,
- 0x0c, 0x75, 0xe0, 0xa8,
- 0x46, 0x22, 0xe0, 0x18,
- 0x87, 0x0b, 0xf0, 0x84,
- 0x0c, 0x35, 0x82, 0x55,
- 0xa1, 0x3b, 0xe0, 0x7c,
- 0x0c, 0x35, 0x80, 0xd5,
- 0x46, 0x0a, 0xe0, 0x74,
- 0x92, 0x95, 0xe0, 0x80,
- 0xe1, 0xd0, 0x0c, 0x19,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x03, 0x21, 0x82, 0x25,
- 0x63, 0x38, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe8, 0x08,
- 0x4c, 0x05, 0xe0, 0xa8,
- 0x0c, 0x15, 0xe0, 0x88,
- 0x87, 0x51, 0x60, 0xc4,
- 0xe0, 0x34, 0x0c, 0x35,
- 0xe0, 0xa0, 0x0c, 0x45,
- 0xe0, 0xbc, 0x4c, 0x15,
- 0x48, 0x4a, 0x82, 0x33,
- 0x4a, 0x32, 0x66, 0x96,
- 0x09, 0x5d, 0xf1, 0x88,
- 0x4c, 0x55, 0x85, 0x51,
- 0x48, 0x42, 0x60, 0x98,
- 0x4c, 0x55, 0x90, 0x88,
- 0x06, 0x40, 0x60, 0x9c,
- 0x48, 0x32, 0x8c, 0x04,
- 0xc4, 0x2b, 0x71, 0x88,
- 0x18, 0x24, 0x44, 0x47,
- 0x0e, 0x55, 0xe0, 0x88,
- 0x98, 0x73, 0x7c, 0x10,
- 0xe0, 0xac, 0x0c, 0x45,
- 0x08, 0x25, 0xc4, 0x57,
- 0x0a, 0x34, 0xfc, 0x14,
- 0x8e, 0x53, 0xe0, 0x88,
- 0x00, 0x00, 0x82, 0x3d,
- 0x4c, 0x05, 0x84, 0x08,
- 0x82, 0xa5, 0x80, 0xc0,
- 0x06, 0x30, 0x57, 0xc4,
- 0xc4, 0xc7, 0xec, 0x04,
- 0xfc, 0x30, 0x08, 0xc5,
- 0xfc, 0x75, 0x84, 0xcd,
- 0x60, 0xbc, 0x4c, 0x35,
- 0xfd, 0xc5, 0x98, 0x2b,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x0c, 0x25, 0xdd, 0x93,
- 0x06, 0x14, 0x60, 0x84,
- 0x0c, 0x45, 0xe0, 0x88,
- 0x86, 0x73, 0x60, 0x78,
- 0x82, 0x3b, 0x01, 0x51,
- 0x4c, 0x25, 0x82, 0x21,
- 0x82, 0x43, 0x60, 0x84,
- 0x0e, 0xc5, 0x83, 0x45,
- 0xdd, 0x84, 0xf8, 0x10,
- 0xe0, 0x20, 0x0c, 0x95,
- 0xc4, 0x87, 0xc4, 0xc7,
- 0xfc, 0x30, 0x12, 0xc5,
- 0xfc, 0x20, 0x12, 0x85,
- 0xf1, 0xb0, 0x58, 0x82,
- 0x4a, 0xc2, 0x0a, 0xcd,
- 0x46, 0x10, 0xfa, 0x14,
- 0x82, 0x11, 0x5c, 0x00,
- 0xfa, 0x85, 0x88, 0x1d,
- 0x0c, 0x55, 0x98, 0x14,
- 0x0c, 0x45, 0xe0, 0x3c,
- 0x02, 0x10, 0xe0, 0x1c,
- 0x03, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0x48, 0x33, 0x86, 0x53,
- 0x48, 0x53, 0xe0, 0x30,
- 0xda, 0x85, 0xe0, 0x60,
- 0x82, 0x01, 0x03, 0x11,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xe0, 0x9c, 0x4c, 0x15,
- 0xe0, 0xbc, 0x4c, 0x05,
- 0xc1, 0xc3, 0xf9, 0x25,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x0c, 0x15, 0x80, 0x6b,
- 0xa1, 0x1d, 0xe0, 0x8c,
- 0x0c, 0x05, 0x82, 0x35,
- 0x80, 0x1d, 0xe0, 0x88,
- 0x0c, 0x05, 0x80, 0xa5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xe5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x0c, 0x55, 0xdd, 0x93,
- 0x0c, 0x25, 0xe1, 0x44,
- 0x0c, 0xc5, 0xe0, 0xa8,
- 0x0c, 0x35, 0xe0, 0x18,
- 0x0c, 0x4b, 0xe0, 0xb4,
- 0x44, 0x52, 0x60, 0x48,
- 0x0c, 0x2b, 0xf1, 0x88,
- 0x85, 0x1b, 0x60, 0x50,
- 0xe0, 0xc8, 0x0c, 0x85,
- 0xe0, 0xcc, 0x0c, 0x75,
- 0x0c, 0x95, 0x82, 0x75,
- 0xa1, 0x9b, 0xe0, 0x80,
- 0x0c, 0x95, 0x80, 0xf5,
- 0x52, 0x0a, 0xe0, 0x74,
- 0x0f, 0xb8, 0xe0, 0x80,
- 0x0c, 0x55, 0xc0, 0x00,
- 0x54, 0x86, 0x60, 0x70,
- 0x52, 0x02, 0xe0, 0x3c,
- 0xaa, 0xa3, 0xf1, 0x84,
- 0x96, 0x45, 0x94, 0x9d,
- 0x60, 0x94, 0x0c, 0x55,
- 0x95, 0x5b, 0xfd, 0xa1,
- 0x0c, 0x55, 0x94, 0xa5,
- 0x14, 0x50, 0xe0, 0x34,
- 0x16, 0xa4, 0xe4, 0x04,
- 0x96, 0xa3, 0xe1, 0xfc,
- 0x8a, 0xa3, 0x83, 0xa7,
- 0x92, 0x45, 0x95, 0x9d,
- 0x70, 0x84, 0x52, 0x02,
- 0x02, 0x91, 0xc6, 0x37,
- 0x14, 0x94, 0xa0, 0x31,
- 0xcb, 0x37, 0x61, 0xfc,
- 0xf9, 0xa1, 0x14, 0x93,
- 0x0c, 0xa5, 0xc2, 0x97,
- 0x94, 0x9f, 0x60, 0x10,
- 0x18, 0x95, 0x92, 0xc3,
- 0xb2, 0xc4, 0xf8, 0x0c,
- 0x14, 0xa5, 0xc4, 0x97,
- 0xc4, 0xc7, 0x7c, 0x24,
- 0x64, 0x10, 0x16, 0xa0,
- 0xc7, 0xb7, 0x86, 0xa3,
- 0x66, 0x92, 0x48, 0xba,
- 0x7f, 0xfc, 0x57, 0x8e,
- 0x08, 0x40, 0xc3, 0xff,
- 0xc9, 0x47, 0xe5, 0x00,
- 0x60, 0x20, 0x0c, 0xb5,
- 0x88, 0xa3, 0x96, 0x4f,
- 0xf0, 0x0a, 0x48, 0xaa,
- 0xfc, 0x24, 0x16, 0x95,
- 0xfc, 0x30, 0x16, 0xc5,
- 0xe6, 0x8a, 0x44, 0x4a,
- 0x04, 0x20, 0xa6, 0x93,
- 0x98, 0x93, 0x66, 0x00,
- 0x84, 0x9d, 0xd1, 0x27,
- 0x0c, 0x25, 0x84, 0xa5,
- 0x98, 0x34, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x45,
- 0x4c, 0x25, 0x82, 0x21,
- 0x06, 0x30, 0x60, 0x84,
- 0x07, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0xf1, 0x94, 0x46, 0x02,
- 0xe0, 0x30, 0x48, 0x33,
- 0xe0, 0x60, 0x48, 0x03,
- 0x0c, 0x05, 0xde, 0x65,
- 0xff, 0x91, 0x61, 0x34,
- 0x60, 0x94, 0x4c, 0x95,
- 0x73, 0x58, 0x8c, 0x2b,
- 0x0c, 0x35, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x8c,
- 0x48, 0x32, 0xe0, 0x88,
- 0x86, 0x1b, 0x71, 0x80,
- 0x61, 0x3c, 0x4c, 0x45,
- 0x42, 0x40, 0x85, 0x4d,
- 0xab, 0x0d, 0x1c, 0x00,
- 0xe1, 0x3c, 0x4c, 0x15,
- 0x0c, 0x09, 0x82, 0xd5,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x00, 0x26, 0xe0, 0x90,
- 0x4c, 0x05, 0xc0, 0x00,
- 0x4c, 0x05, 0xc0, 0x98,
- 0x00, 0x30, 0x40, 0x9c,
- 0x94, 0x35, 0xcc, 0x10,
- 0x60, 0x34, 0x0c, 0x05,
- 0xf1, 0x88, 0x48, 0x32,
- 0x86, 0xe5, 0x88, 0x0d,
- 0xe4, 0x04, 0x02, 0x00,
- 0x06, 0x14, 0xa8, 0x13,
- 0x0c, 0x35, 0xe1, 0xfc,
- 0x86, 0x13, 0x60, 0x84,
- 0x0c, 0x15, 0x83, 0x17,
- 0xa2, 0x23, 0x60, 0x1c,
- 0x84, 0x03, 0x02, 0x31,
- 0x60, 0x84, 0x4c, 0x35,
- 0x4c, 0x25, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x88,
- 0x60, 0x30, 0x42, 0x23,
- 0x4c, 0x05, 0x8f, 0x21,
- 0x42, 0x03, 0xe0, 0x8c,
- 0x4c, 0x25, 0xe0, 0x60,
- 0xe7, 0x55, 0xe0, 0x98,
- 0x60, 0x38, 0x0c, 0x05,
- 0xf1, 0x88, 0x4a, 0x12,
- 0xe0, 0xa4, 0x0c, 0x45,
- 0x89, 0x5d, 0x80, 0x43,
- 0x30, 0x23, 0x8a, 0x45,
- 0xf0, 0x9c, 0x40, 0x32,
- 0x60, 0x88, 0x4c, 0x25,
- 0x4c, 0x05, 0x8c, 0x1b,
- 0x68, 0xb8, 0xe0, 0x8c,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x1c,
- 0x4c, 0x05, 0xe0, 0x88,
- 0x82, 0x11, 0x60, 0x8c,
- 0x60, 0x84, 0x4c, 0x15,
- 0x02, 0x23, 0xc2, 0x17,
- 0x44, 0x03, 0x8f, 0x11,
- 0x8c, 0x0b, 0x60, 0x60,
- 0xe0, 0x30, 0x44, 0x33,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x08, 0x10, 0xa8,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x15, 0xfd, 0x11,
- 0xe1, 0x35, 0xe0, 0x94,
- 0x60, 0xa0, 0x0c, 0x05,
- 0x0c, 0x35, 0x87, 0x21,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x40, 0x0a, 0xe0, 0x48,
- 0x4c, 0x25, 0xe6, 0x8a,
- 0x46, 0x12, 0x60, 0x98,
- 0x00, 0x00, 0xf1, 0x8c,
- 0xa8, 0x13, 0x6c, 0x18,
- 0x60, 0xbc, 0x4c, 0x35,
- 0x4c, 0x25, 0x80, 0x3d,
- 0x4c, 0x95, 0xe0, 0x9c,
- 0x4c, 0x15, 0xe0, 0x94,
- 0x4c, 0x05, 0xe0, 0xc0,
- 0xdd, 0x75, 0xc0, 0xbc,
- 0x60, 0x78, 0x0c, 0x05,
- 0x44, 0x52, 0x81, 0x31,
- 0x00, 0x54, 0x71, 0x80,
- 0x00, 0xc3, 0xe0, 0x88,
- 0x83, 0x55, 0x8a, 0x0b,
- 0x18, 0x75, 0xf3, 0x44,
- 0x0c, 0x85, 0xf8, 0x0c,
- 0xc4, 0x47, 0xe0, 0x20,
- 0x10, 0x45, 0xc4, 0x77,
- 0x10, 0x75, 0xfc, 0x10,
- 0x48, 0x72, 0xfc, 0x1c,
- 0x06, 0x4d, 0xf1, 0x90,
- 0xfa, 0x0c, 0x46, 0x42,
- 0x5c, 0x00, 0x40, 0x50,
- 0xec, 0x04, 0x0a, 0x50,
- 0xfa, 0x65, 0x85, 0x5d,
- 0xe0, 0x84, 0x0c, 0x25,
- 0x0c, 0x45, 0x98, 0x34,
- 0x0c, 0x55, 0xe0, 0x3c,
- 0x82, 0x21, 0x60, 0x1c,
- 0x60, 0x84, 0x4c, 0x25,
- 0xec, 0x04, 0x06, 0x30,
- 0xc2, 0x27, 0x07, 0x2d,
- 0x46, 0x02, 0x04, 0x53,
- 0x4a, 0x33, 0xf1, 0x90,
- 0x4a, 0x03, 0xe0, 0x30,
- 0x2a, 0xe8, 0xe0, 0x60,
- 0x85, 0x01, 0x9f, 0xfc,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x60, 0x9c, 0x4c, 0x05,
- 0xec, 0x04, 0x00, 0x10,
- 0xc1, 0xc3, 0xf5, 0x05,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x87, 0x81, 0x00, 0x6b,
- 0xe0, 0x90, 0x0c, 0x05,
- 0xe0, 0x18, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x60, 0x98, 0x4c, 0x85,
- 0xac, 0xd5, 0xa1, 0x0d,
- 0xe0, 0x8c, 0x0c, 0x25,
- 0xac, 0x45, 0x85, 0x0d,
- 0x60, 0x20, 0x0c, 0x55,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x25,
- 0xf0, 0x88, 0x46, 0x12,
- 0xf8, 0x10, 0x06, 0x45,
- 0xf8, 0x08, 0x06, 0xc5,
- 0x78, 0x18, 0x06, 0x35,
- 0x0a, 0x25, 0xc4, 0x27,
- 0xc4, 0x47, 0x7c, 0x08,
- 0x7c, 0x10, 0x0a, 0x45,
- 0x0a, 0xc5, 0xc4, 0xc7,
- 0xc4, 0x37, 0x7c, 0x30,
- 0xfc, 0x0c, 0x0a, 0x35,
- 0xa6, 0xc3, 0xa8, 0x23,
- 0x90, 0x65, 0x84, 0xcd,
- 0xe0, 0x34, 0x0c, 0x25,
- 0x06, 0x24, 0x84, 0x21,
- 0xfd, 0x37, 0xe1, 0x7c,
- 0x85, 0x27, 0x86, 0x23,
- 0x4c, 0x05, 0xa4, 0x03,
- 0x04, 0x04, 0x60, 0x90,
- 0x02, 0x45, 0xe0, 0x88,
- 0x46, 0x12, 0x7c, 0x08,
- 0x8e, 0x34, 0xf0, 0x88,
- 0xc4, 0x47, 0x9a, 0x24,
- 0x04, 0x35, 0xc4, 0x37,
- 0x04, 0x45, 0xfc, 0x0c,
- 0x48, 0x32, 0xfc, 0x10,
- 0x89, 0x31, 0x71, 0x90,
- 0x0a, 0x00, 0x85, 0x45,
- 0x18, 0x04, 0x6c, 0x04,
- 0x02, 0xc5, 0xe0, 0x88,
- 0x12, 0x54, 0x7c, 0x30,
- 0x02, 0x95, 0xe0, 0x88,
- 0xc4, 0xc7, 0xfc, 0x24,
- 0x7c, 0x30, 0x04, 0xc5,
- 0x04, 0x95, 0xc4, 0x97,
- 0xb2, 0xc3, 0xfc, 0x24,
- 0x82, 0xf5, 0xa3, 0xcd,
- 0xe4, 0x08, 0x12, 0x40,
- 0xe1, 0x7c, 0x14, 0x94,
- 0x94, 0x93, 0xfd, 0xa7,
- 0x93, 0xcd, 0x85, 0x97,
- 0x00, 0x90, 0x4c, 0x55,
- 0x9c, 0x00, 0x40, 0x50,
- 0x9c, 0x00, 0x48, 0xc0,
- 0xec, 0x04, 0x06, 0x30,
- 0xf6, 0x95, 0xa1, 0x3b,
- 0x8c, 0x1b, 0x03, 0x21,
- 0xe8, 0x04, 0x7d, 0x28,
- 0x61, 0x3c, 0x0c, 0x45,
- 0x0c, 0x35, 0xff, 0xc1,
- 0x12, 0x60, 0x60, 0x34,
- 0x0c, 0x15, 0xe6, 0x20,
- 0x0c, 0x25, 0xe0, 0x94,
- 0x4a, 0x42, 0xe0, 0x88,
- 0x40, 0x52, 0xf1, 0x8c,
- 0x99, 0x1b, 0x7b, 0x00,
- 0xfa, 0x00, 0x44, 0x22,
- 0xe0, 0x90, 0x4c, 0x25,
- 0x0c, 0x15, 0xb0, 0x45,
- 0x98, 0x1d, 0xe0, 0x84,
- 0x0c, 0x05, 0xae, 0x05,
- 0x14, 0x14, 0x60, 0x1c,
- 0x0c, 0xc5, 0xe0, 0x84,
- 0x80, 0xa3, 0xe0, 0xa4,
- 0xe0, 0x30, 0x14, 0x53,
- 0xf1, 0xb0, 0x56, 0x52,
- 0x0f, 0x38, 0x97, 0x2d,
- 0x02, 0x11, 0x80, 0x00,
- 0x4c, 0x15, 0x84, 0x33,
- 0x08, 0x14, 0x60, 0x84,
- 0x08, 0x03, 0xe0, 0x84,
- 0x0c, 0xa5, 0x91, 0x11,
- 0x4c, 0x15, 0xe0, 0x50,
- 0x8c, 0x1b, 0x60, 0x50,
- 0xe0, 0x30, 0x40, 0x23,
- 0x60, 0x60, 0x40, 0x33,
- 0xfb, 0x00, 0x00, 0x34,
- 0xe8, 0x08, 0x55, 0xe8,
- 0x0c, 0x15, 0x98, 0x24,
- 0x0c, 0x35, 0xe0, 0x84,
- 0x4c, 0xa5, 0xe0, 0x1c,
- 0x04, 0x20, 0x60, 0x50,
- 0x05, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x04, 0x14,
- 0x46, 0x03, 0x84, 0x33,
- 0xa0, 0xa5, 0xe0, 0x60,
- 0x0c, 0x25, 0xa5, 0x35,
- 0xff, 0x11, 0x60, 0x94,
- 0x86, 0xb5, 0x83, 0x2b,
- 0x61, 0x3c, 0x0c, 0x25,
- 0x0c, 0x05, 0x82, 0x71,
- 0x0a, 0x74, 0x60, 0x34,
- 0x98, 0x44, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0x60, 0x8c, 0x0c, 0x05,
- 0x4c, 0x25, 0xa0, 0x23,
- 0x08, 0x40, 0x60, 0x90,
- 0x0a, 0x33, 0xec, 0x04,
- 0x4c, 0x25, 0x89, 0x7d,
- 0x4c, 0x75, 0xe0, 0x94,
- 0x46, 0x23, 0xe0, 0x84,
- 0x46, 0x03, 0xe0, 0x30,
- 0x98, 0x65, 0xe0, 0x60,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x4c, 0x25,
- 0xf1, 0x80, 0x48, 0x22,
- 0x8e, 0x25, 0x86, 0x4d,
- 0x60, 0x34, 0x0c, 0x35,
- 0xec, 0x04, 0x04, 0x20,
- 0x60, 0xbc, 0x4c, 0x25,
- 0x4c, 0x45, 0x85, 0x41,
- 0x4c, 0x45, 0xe0, 0x98,
- 0x80, 0x33, 0x60, 0x9c,
- 0x60, 0x94, 0x4c, 0x15,
- 0xec, 0x0c, 0x06, 0x30,
- 0x60, 0xc0, 0x4c, 0x35,
- 0x92, 0x15, 0x86, 0x2d,
- 0x60, 0x3c, 0x0c, 0x15,
- 0x0c, 0x25, 0x82, 0x71,
- 0x06, 0x74, 0x60, 0x1c,
- 0x4c, 0x75, 0xe0, 0x84,
- 0x80, 0x13, 0xe0, 0x84,
- 0x60, 0x8c, 0x4c, 0x15,
- 0x44, 0x03, 0x86, 0x23,
- 0x44, 0x13, 0xe0, 0x30,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x8a, 0xe5, 0xe0, 0x84,
- 0x7b, 0x00, 0x00, 0x14,
- 0x4f, 0x38, 0x8c, 0x1b,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0xc2, 0x17, 0xe0, 0x1c,
- 0x44, 0x03, 0x82, 0x23,
- 0x85, 0x15, 0xe0, 0x60,
- 0x86, 0xf5, 0xa1, 0x7d,
- 0x60, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x04, 0x74,
- 0xe0, 0x40, 0x0c, 0x35,
- 0x04, 0x23, 0x82, 0x23,
- 0x46, 0x3a, 0xe0, 0x30,
- 0xa0, 0x23, 0xe0, 0xa2,
- 0x82, 0xa5, 0x86, 0x2d,
- 0x02, 0x09, 0x8e, 0x13,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x42, 0x01,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x8e, 0x13, 0xc2, 0x77,
- 0xe0, 0x30, 0x42, 0x03,
- 0x4c, 0x05, 0x8f, 0x01,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0xe0, 0xa4, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xf1, 0x80, 0x40, 0x52,
- 0x81, 0x2d, 0x02, 0x11,
- 0xe0, 0x84, 0x4c, 0x15,
- 0x98, 0x44, 0x94, 0x25,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0xe0, 0x8c, 0x0c, 0x05,
- 0xec, 0x04, 0x18, 0x40,
- 0x18, 0x14, 0x19, 0x1d,
- 0x86, 0xc3, 0xe0, 0x84,
- 0xe0, 0x30, 0x58, 0x53,
- 0xe0, 0x60, 0x58, 0x03,
- 0x0c, 0x09, 0xf8, 0x05,
- 0x0c, 0x55, 0xe1, 0xd0,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x02, 0xa5, 0xe0, 0x84,
- 0xf0, 0x88, 0x40, 0x52,
- 0x68, 0x08, 0x49, 0xe8,
- 0x0c, 0x15, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x90,
- 0x98, 0x44, 0xe0, 0x1c,
- 0x08, 0x40, 0x02, 0x11,
- 0x0a, 0x14, 0xec, 0x04,
- 0x89, 0x1d, 0x60, 0x84,
- 0x60, 0x84, 0x4c, 0x15,
- 0x46, 0x03, 0x8a, 0x33,
- 0x87, 0x01, 0x60, 0x60,
- 0x60, 0x30, 0x46, 0x23,
- 0x80, 0x00, 0x00, 0x76,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x8b, 0xa5, 0xee, 0xa5,
- 0x60, 0x60, 0x14, 0xa3,
- 0x48, 0xa2, 0x86, 0xc3,
- 0xa4, 0x43, 0xfb, 0x10,
- 0x8e, 0x05, 0x98, 0x4d,
- 0x82, 0x11, 0x18, 0x44,
- 0x60, 0x84, 0x4c, 0x15,
- 0x08, 0x40, 0x84, 0x33,
- 0x09, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x08, 0x14,
- 0x40, 0x23, 0x88, 0x03,
- 0x40, 0x33, 0xe0, 0x30,
- 0xe8, 0x25, 0xe0, 0x60,
- 0x0c, 0x35, 0x87, 0xf5,
- 0x08, 0x14, 0x60, 0x1c,
- 0x0c, 0x05, 0xe0, 0x84,
- 0x88, 0x33, 0xe0, 0x8c,
- 0xe0, 0x30, 0x46, 0x23,
- 0xe0, 0x60, 0x46, 0x03,
- 0xe1, 0xd0, 0x0c, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x00, 0x04, 0x82, 0xe5,
- 0x8c, 0x1b, 0x7b, 0x00,
- 0xe8, 0x08, 0x45, 0x48,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0x44, 0x03, 0x86, 0x23,
- 0x98, 0x04, 0xe0, 0x60,
- 0xe0, 0x98, 0x4c, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0xde, 0x65, 0x81, 0x1d,
- 0x0c, 0x35, 0x83, 0xb5,
- 0xa4, 0x53, 0x60, 0x40,
- 0xe0, 0xa2, 0x46, 0x3a,
- 0x82, 0xa5, 0x86, 0x5d,
- 0x00, 0x19, 0x82, 0x03,
- 0x82, 0x11, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x40, 0x11,
- 0xe0, 0x90, 0x0c, 0x25,
- 0xe0, 0x1c, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x84, 0x06, 0x14,
- 0x40, 0x23, 0x86, 0x03,
- 0x4c, 0x85, 0xe0, 0x30,
- 0xa4, 0x04, 0xe0, 0x98,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x0c, 0x25,
- 0x86, 0x2d, 0x80, 0x33,
- 0x0c, 0x35, 0x86, 0xc5,
- 0x80, 0x33, 0xe0, 0x34,
- 0x90, 0xa5, 0x87, 0x2d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe4, 0x04, 0x08, 0x10,
- 0x60, 0x3c, 0x0c, 0x35,
- 0xe0, 0x84, 0x02, 0x44,
- 0xe0, 0x84, 0x4c, 0x45,
- 0x44, 0x03, 0x82, 0x23,
- 0x42, 0x32, 0x60, 0x30,
- 0x44, 0x13, 0xf0, 0x80,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x30, 0xf8, 0xe0, 0x84,
- 0xe7, 0xb5, 0xdf, 0xfc,
- 0x86, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0xe0, 0x40, 0x0c, 0x45,
- 0x06, 0x33, 0x84, 0x33,
- 0x48, 0x4a, 0xe0, 0x30,
- 0xa0, 0x33, 0xe0, 0xa2,
- 0x82, 0x85, 0x88, 0x3d,
- 0x04, 0x09, 0x82, 0x23,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x44, 0x01,
- 0x0c, 0x25, 0xa4, 0x04,
- 0x0c, 0x15, 0xe0, 0x1c,
- 0x06, 0x14, 0xe0, 0x84,
- 0x86, 0x23, 0xe0, 0x84,
- 0xe0, 0x30, 0x44, 0x03,
- 0x8f, 0x01, 0x02, 0x71,
- 0x60, 0x98, 0x4c, 0x05,
- 0x31, 0x88, 0x8f, 0x1b,
- 0x8c, 0x0b, 0xdf, 0xfc,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x04, 0x27, 0x08,
- 0xe0, 0xfc, 0x0c, 0x05,
- 0xe1, 0x00, 0x0c, 0x15,
- 0xe0, 0x94, 0x4c, 0x25,
- 0x60, 0x98, 0x4c, 0x85,
- 0xf1, 0x80, 0x40, 0x22,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x25, 0xa2, 0x23,
- 0xe1, 0x25, 0xe0, 0xc0,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0x24,
- 0x60, 0x20, 0x00, 0x15,
- 0x00, 0x45, 0x81, 0x71,
- 0x88, 0x34, 0xe0, 0xa0,
- 0xc8, 0xc4, 0x8a, 0x54,
- 0x00, 0x35, 0xca, 0x24,
- 0x86, 0x53, 0x60, 0x18,
- 0x58, 0x52, 0x98, 0x53,
- 0x82, 0x5b, 0x70, 0x88,
- 0x04, 0x40, 0x55, 0xce,
- 0x81, 0xd5, 0xec, 0x10,
- 0x82, 0x71, 0x02, 0x84,
- 0x7c, 0x18, 0x10, 0x85,
- 0xf0, 0x98, 0x52, 0x82,
- 0x60, 0x10, 0x12, 0x95,
- 0xb0, 0xc3, 0x88, 0x61,
- 0xd5, 0xce, 0x92, 0xc3,
- 0xfc, 0x75, 0x85, 0x7d,
- 0x60, 0x88, 0x18, 0x44,
- 0xec, 0x04, 0x08, 0x40,
- 0x70, 0xb0, 0x4a, 0x12,
- 0x0a, 0x50, 0x98, 0x33,
- 0x18, 0xc0, 0x6c, 0x30,
- 0x81, 0xf5, 0xec, 0x40,
- 0x82, 0x21, 0x4d, 0x74,
- 0x02, 0x85, 0x82, 0x64,
- 0xc4, 0x77, 0xfc, 0x30,
- 0x7c, 0x30, 0x0c, 0x95,
- 0x0c, 0x65, 0x88, 0xc1,
- 0xb2, 0x83, 0xfc, 0x1c,
- 0xd5, 0x8e, 0x8c, 0x83,
- 0xfc, 0x35, 0x89, 0x2d,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x75,
- 0x00, 0x35, 0xff, 0x61,
- 0x81, 0x11, 0x60, 0xc0,
- 0x60, 0x18, 0x00, 0x25,
- 0x40, 0x15, 0x81, 0x81,
- 0x40, 0x65, 0xe0, 0x7c,
- 0x00, 0x15, 0xe0, 0x88,
- 0x00, 0xc5, 0xe0, 0xb4,
- 0x40, 0x65, 0xe0, 0xa8,
- 0x25, 0x3e, 0xe1, 0x40,
- 0xe0, 0x88, 0x06, 0x74,
- 0x60, 0xd8, 0x00, 0x35,
- 0x00, 0x45, 0x86, 0x23,
- 0x16, 0x20, 0x60, 0x6c,
- 0x4a, 0xca, 0xec, 0x40,
- 0x81, 0x21, 0x66, 0x86,
- 0x46, 0x86, 0x21, 0x3e,
- 0x28, 0x33, 0xe0, 0x3c,
- 0x1b, 0x3e, 0xa0, 0x51,
- 0xe4, 0x40, 0x06, 0x10,
- 0x08, 0x10, 0x0b, 0x37,
- 0x7c, 0x3e, 0xe4, 0x10,
- 0xe4, 0x08, 0x06, 0x10,
- 0xcb, 0x57, 0x02, 0x11,
- 0x85, 0x37, 0x07, 0x47,
- 0x83, 0x17, 0x19, 0x5e,
- 0x81, 0x51, 0x3e, 0x4e,
- 0x81, 0x41, 0x09, 0x3e,
- 0x00, 0x15, 0x95, 0x1e,
- 0x93, 0x1e, 0xe0, 0xdc,
- 0xe0, 0xe0, 0x00, 0x15,
- 0x00, 0x15, 0xfe, 0x1e,
- 0x8d, 0x1e, 0xe0, 0x28,
- 0xe0, 0x2c, 0x00, 0x15,
- 0x00, 0x15, 0x91, 0x1e,
- 0x8f, 0xce, 0xe0, 0x24,
- 0x1d, 0x1e, 0xa3, 0x7e,
- 0xe0, 0x84, 0x02, 0xc4,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x8e, 0xc3, 0x2b, 0x1e,
- 0x81, 0x11, 0x3c, 0xce,
- 0x1a, 0x38, 0x97, 0x1e,
- 0x0a, 0xa0, 0xe0, 0x00,
- 0x0b, 0x0a, 0xe4, 0x04,
- 0x1a, 0x48, 0xe7, 0x20,
- 0x16, 0x15, 0xc0, 0x00,
- 0xa2, 0x4d, 0x60, 0x10,
- 0x5e, 0x45, 0xad, 0x6e,
- 0x5e, 0x25, 0xc0, 0x5c,
- 0x98, 0xf5, 0xc0, 0x4c,
- 0xc4, 0x17, 0x27, 0xbe,
- 0x60, 0xac, 0x00, 0x35,
- 0x19, 0x74, 0x8c, 0xbb,
- 0x06, 0xc5, 0x8e, 0x6b,
- 0xab, 0x34, 0xfc, 0x04,
- 0x04, 0xcd, 0xae, 0xc3,
- 0x2b, 0x3e, 0x88, 0x33,
- 0x9c, 0x00, 0x58, 0x20,
- 0x4e, 0x60, 0x0e, 0x05,
- 0x29, 0x8e, 0x9c, 0x00,
- 0xaf, 0x4e, 0x98, 0x8b,
- 0xe0, 0xb0, 0x00, 0x35,
- 0x8b, 0xc4, 0x8f, 0x44,
- 0xfc, 0x04, 0x06, 0x15,
- 0x60, 0x84, 0x06, 0x14,
- 0x88, 0x33, 0x8e, 0x13,
- 0xe0, 0x32, 0x46, 0x3a,
- 0x46, 0x3a, 0x9d, 0xc4,
- 0x90, 0xcb, 0x66, 0xb2,
- 0xe5, 0x00, 0x06, 0x30,
- 0x46, 0x3a, 0xcf, 0x37,
- 0x0d, 0x34, 0xe6, 0x92,
- 0x42, 0x1a, 0x86, 0x13,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8e,
- 0xd1, 0x17, 0xe6, 0x00,
- 0x1e, 0x45, 0x82, 0xcd,
- 0x58, 0x20, 0x00, 0x5c,
- 0x1e, 0x85, 0x9c, 0x00,
- 0x1e, 0x75, 0x80, 0x50,
- 0x82, 0x65, 0x80, 0x44,
- 0x96, 0x6b, 0x2f, 0x44,
- 0xe0, 0x88, 0x40, 0x95,
- 0xa1, 0x4b, 0xa9, 0x84,
- 0x81, 0x11, 0x80, 0xc5,
- 0x81, 0xe5, 0xab, 0x1e,
- 0x96, 0x6b, 0x01, 0xe5,
- 0x83, 0x41, 0x3c, 0x14,
- 0xe1, 0x40, 0x40, 0x95,
- 0x94, 0x13, 0xa5, 0x24,
- 0x7b, 0x08, 0x44, 0x12,
- 0xa5, 0x2e, 0x81, 0x11,
- 0xa3, 0x74, 0xab, 0x1e,
- 0xab, 0x24, 0x9b, 0x14,
- 0x82, 0x2d, 0xa7, 0xb4,
- 0xc0, 0x00, 0x13, 0xf8,
- 0x12, 0x78, 0xa3, 0x4d,
- 0x4c, 0x80, 0x40, 0x00,
- 0x27, 0xce, 0xdc, 0x00,
- 0x16, 0x15, 0x83, 0x21,
- 0xaf, 0x2e, 0xe0, 0x10,
- 0x60, 0x20, 0x16, 0x25,
- 0xe0, 0x88, 0x08, 0x14,
- 0xe0, 0x20, 0x00, 0x35,
- 0xe0, 0x10, 0x00, 0x15,
- 0xc4, 0x27, 0x21, 0xc4,
- 0xfc, 0x10, 0x06, 0x65,
- 0xfc, 0x08, 0x06, 0x25,
- 0x7c, 0x10, 0x02, 0x45,
- 0x10, 0x05, 0x99, 0xad,
- 0x93, 0xc4, 0x8c, 0x23,
- 0x9e, 0x65, 0x99, 0xad,
- 0x83, 0xad, 0xfe, 0x14,
- 0xee, 0x34, 0xaa, 0x85,
- 0xfc, 0xc4, 0x82, 0x14,
- 0x02, 0x15, 0xc4, 0x37,
- 0x42, 0xc2, 0xfc, 0x0c,
- 0x18, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x8c,
- 0xc2, 0x67, 0xf1, 0xb0,
- 0x1e, 0x95, 0x90, 0x6d,
- 0x4c, 0x80, 0x00, 0x58,
- 0x0f, 0xb8, 0x9c, 0x00,
- 0x29, 0x8e, 0x80, 0x00,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x40, 0xc4,
- 0xb3, 0x11, 0x1f, 0x1e,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x18, 0x25, 0x9d, 0x14,
- 0x10, 0x20, 0x7c, 0x0c,
- 0x1f, 0x34, 0xe4, 0x08,
- 0x4e, 0x7a, 0xc5, 0x87,
- 0x82, 0xcb, 0x66, 0x86,
- 0xad, 0x11, 0x08, 0x83,
- 0x48, 0x3a, 0x10, 0x71,
- 0x49, 0x77, 0xe6, 0x86,
- 0xe0, 0x98, 0x02, 0x24,
- 0x06, 0x06, 0x0e, 0x83,
- 0x02, 0x83, 0xe0, 0x04,
- 0x10, 0x43, 0x83, 0x11,
- 0x13, 0xe5, 0x8f, 0x81,
- 0x1f, 0x5e, 0x83, 0x71,
- 0x16, 0x15, 0x80, 0x5b,
- 0x16, 0x65, 0xf8, 0x30,
- 0x16, 0x75, 0xf8, 0x20,
- 0x29, 0x8e, 0xf8, 0x10,
- 0x2c, 0x84, 0xc4, 0x17,
- 0x06, 0xc5, 0xc4, 0x67,
- 0xc4, 0x77, 0x7c, 0x04,
- 0xfc, 0x18, 0x06, 0x65,
- 0x7c, 0x1c, 0x06, 0x75,
- 0x06, 0x35, 0xc4, 0x87,
- 0x29, 0x04, 0xfc, 0x20,
- 0x8e, 0x63, 0x98, 0x63,
- 0x86, 0x63, 0x15, 0x34,
- 0x7a, 0x18, 0x46, 0x32,
- 0xe0, 0x84, 0x0c, 0x24,
- 0x80, 0x6d, 0xa6, 0x63,
- 0x1d, 0x84, 0x92, 0x45,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x0a, 0x0b,
- 0x84, 0x43, 0x42, 0xc4,
- 0x66, 0xa2, 0x4e, 0x7a,
- 0x9f, 0x54, 0xc4, 0x47,
- 0x7c, 0x04, 0x18, 0x15,
- 0x45, 0x77, 0x84, 0x71,
- 0x08, 0x73, 0x90, 0xcb,
- 0x02, 0x73, 0x91, 0x81,
- 0x48, 0x72, 0x90, 0x11,
- 0x04, 0x14, 0x70, 0x8c,
- 0x06, 0x06, 0xe1, 0x90,
- 0x89, 0x11, 0x60, 0x08,
- 0x87, 0x71, 0x0b, 0xf5,
- 0xf8, 0x10, 0x16, 0x75,
- 0xc4, 0x77, 0xac, 0xc4,
- 0x7c, 0x1c, 0x06, 0x65,
- 0x06, 0x35, 0xc4, 0xc7,
- 0x89, 0xc4, 0xfc, 0x30,
- 0x46, 0xc2, 0x8c, 0x33,
- 0x4c, 0x22, 0xfa, 0x0c,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x9e, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x02, 0x15, 0xe4, 0x10,
- 0xc7, 0xc7, 0x7c, 0x1c,
- 0x84, 0x43, 0x1d, 0x74,
- 0x02, 0x43, 0x91, 0x81,
- 0x44, 0xca, 0x88, 0x11,
- 0x86, 0x43, 0x66, 0x9e,
- 0x8e, 0xcb, 0x44, 0x47,
- 0x06, 0x06, 0x04, 0x21,
- 0x45, 0x27, 0xe0, 0x08,
- 0x04, 0x43, 0x85, 0x71,
- 0xe1, 0x8c, 0x04, 0x14,
- 0x85, 0x11, 0x07, 0x35,
- 0x8a, 0x0b, 0x00, 0x6b,
- 0xa3, 0x74, 0xad, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x8d, 0x55, 0x9f, 0x54,
- 0xc4, 0x77, 0xac, 0x74,
- 0xfc, 0x1c, 0x06, 0x15,
- 0x42, 0x32, 0xbe, 0x34,
- 0x06, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x84,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x92, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x00, 0x35, 0xe4, 0x10,
- 0xc7, 0xc7, 0x60, 0x14,
- 0x84, 0x43, 0x1d, 0x84,
- 0x7c, 0x1c, 0x06, 0x35,
- 0x58, 0xca, 0x87, 0x71,
- 0x10, 0xc1, 0xe6, 0xa2,
- 0x49, 0xc7, 0x86, 0x13,
- 0x18, 0x43, 0x84, 0x31,
- 0x10, 0xcb, 0xc4, 0x17,
- 0x04, 0x34, 0x82, 0x43,
- 0x8f, 0x81, 0x61, 0x88,
- 0x60, 0x04, 0x06, 0x06,
- 0x44, 0x2a, 0x89, 0x11,
- 0x82, 0x23, 0xe6, 0xb2,
- 0x11, 0x24, 0xef, 0x2f,
- 0x42, 0x4a, 0x84, 0x43,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x86, 0x13, 0xe6, 0x8a,
- 0x82, 0x6d, 0xf1, 0x1f,
- 0x80, 0x50, 0x1e, 0x65,
- 0x80, 0x58, 0x1e, 0x95,
- 0x80, 0x44, 0x1e, 0x75,
- 0xaf, 0x44, 0x88, 0xc5,
- 0xe0, 0x88, 0x40, 0x95,
- 0x23, 0x74, 0x97, 0x14,
- 0xa7, 0xc4, 0xa3, 0x4b,
- 0x97, 0x1e, 0x82, 0x11,
- 0x00, 0x15, 0x84, 0x95,
- 0x8e, 0xa3, 0x60, 0xf0,
- 0x60, 0xa0, 0x00, 0x25,
- 0x85, 0x41, 0x87, 0x31,
- 0x44, 0x2a, 0x94, 0x13,
- 0x06, 0x10, 0x66, 0x8e,
- 0x85, 0x3d, 0xe4, 0x10,
- 0x40, 0x48, 0x5e, 0x15,
- 0x40, 0x15, 0x83, 0x11,
- 0x81, 0xb5, 0xe0, 0x7c,
- 0x81, 0x95, 0xad, 0x94,
- 0x90, 0x6b, 0x2d, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x81, 0x35, 0xa3, 0x74,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x88, 0xb1, 0x0c, 0x8b,
- 0x92, 0x6b, 0x18, 0x2b,
- 0x8a, 0xab, 0x25, 0x14,
- 0xf0, 0xa8, 0x52, 0x72,
- 0x25, 0xa8, 0x82, 0x9d,
- 0xa1, 0x6d, 0x9f, 0xfc,
- 0x97, 0x24, 0x82, 0x15,
- 0xe0, 0xf0, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x88, 0x40, 0x65,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0xff, 0x31, 0x01, 0x21,
- 0x60, 0x80, 0x40, 0x25,
- 0xe0, 0x3c, 0x4a, 0x86,
- 0x60, 0x6c, 0x00, 0x25,
- 0x00, 0x15, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0xb4,
- 0x60, 0x8c, 0x40, 0x35,
- 0x40, 0x35, 0x81, 0x91,
- 0xa4, 0x53, 0x61, 0x44,
- 0x60, 0xc0, 0x00, 0x35,
- 0xe4, 0x40, 0x04, 0x10,
- 0x60, 0xa8, 0x00, 0xc5,
- 0x00, 0x45, 0x8b, 0x27,
- 0xa9, 0x3e, 0xe0, 0xbc,
- 0xe0, 0x18, 0x00, 0xa5,
- 0x04, 0x10, 0x09, 0x2e,
- 0x07, 0x27, 0xe4, 0x10,
- 0xe6, 0x86, 0x46, 0xca,
- 0x44, 0x42, 0x7e, 0x2e,
- 0x44, 0x27, 0xf1, 0xb0,
- 0x50, 0xa2, 0xa0, 0x31,
- 0x04, 0x10, 0x70, 0x88,
- 0x02, 0x11, 0xe4, 0x08,
- 0x05, 0x27, 0xcb, 0x37,
- 0x1f, 0x3e, 0x83, 0x17,
- 0xe0, 0x88, 0x06, 0x44,
- 0x86, 0xa3, 0x21, 0x5e,
- 0x81, 0x31, 0x0f, 0x2e,
- 0x00, 0x15, 0x9b, 0x1e,
- 0xa5, 0x1e, 0xe0, 0xe4,
- 0xe0, 0xe8, 0x00, 0x15,
- 0x00, 0x15, 0x99, 0x1e,
- 0x8d, 0x1e, 0xe0, 0xec,
- 0xe0, 0x28, 0x00, 0x15,
- 0x00, 0x15, 0x93, 0x1e,
- 0x97, 0x1e, 0xe0, 0x2c,
- 0xe0, 0x24, 0x00, 0x15,
- 0x23, 0x1e, 0x95, 0xce,
- 0xe0, 0x84, 0x02, 0xc4,
- 0xb8, 0x1b, 0x11, 0x1e,
- 0xff, 0x11, 0x7c, 0x1e,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x81, 0xc1, 0x1d, 0x1e,
- 0x0d, 0x0a, 0xb1, 0xa5,
- 0x18, 0xb8, 0xe3, 0x1c,
- 0xa2, 0xcd, 0xc0, 0x00,
- 0x5c, 0x00, 0x4e, 0x30,
- 0xdc, 0x00, 0x46, 0xc0,
- 0x2d, 0xae, 0x96, 0x55,
- 0x20, 0x24, 0x8c, 0xab,
- 0x00, 0x15, 0x88, 0x6b,
- 0x98, 0xb3, 0x60, 0xac,
- 0xc4, 0x27, 0x9f, 0x44,
- 0xfc, 0x08, 0x02, 0x15,
- 0xf1, 0x90, 0x4e, 0x12,
- 0x0c, 0x05, 0x86, 0x7d,
- 0x9c, 0x00, 0x4e, 0x30,
- 0x8e, 0x9b, 0x2f, 0x9e,
- 0xe0, 0xb0, 0x00, 0x55,
- 0x91, 0x74, 0x95, 0x14,
- 0xfc, 0x08, 0x0a, 0x25,
- 0x60, 0x84, 0x0a, 0x24,
- 0x82, 0x53, 0x88, 0x23,
- 0xe0, 0x1e, 0x4a, 0x5a,
- 0x4a, 0x5a, 0xa3, 0x74,
- 0x92, 0x7b, 0x66, 0x9e,
- 0xe5, 0x00, 0x0a, 0x50,
- 0x4a, 0x5a, 0xcf, 0x57,
- 0x93, 0x14, 0xe6, 0x86,
- 0x44, 0x2a, 0x8a, 0x23,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x86,
- 0xd1, 0x27, 0xe6, 0x00,
- 0x1e, 0x95, 0x84, 0x7d,
- 0x4e, 0x30, 0x00, 0x5c,
- 0x82, 0x05, 0x9c, 0x00,
- 0xa1, 0xcb, 0x0c, 0x4b,
- 0xe0, 0x8c, 0x40, 0x45,
- 0x01, 0xe5, 0x80, 0xa5,
- 0x01, 0xd5, 0x81, 0xb1,
- 0x7c, 0x24, 0x8c, 0x4b,
- 0x40, 0x45, 0x81, 0xb1,
- 0x83, 0xc1, 0x61, 0x44,
- 0x88, 0x23, 0xa9, 0x14,
- 0xfa, 0x04, 0x42, 0x22,
- 0xaf, 0x94, 0xa9, 0x1e,
- 0x94, 0x6b, 0x21, 0x14,
- 0x82, 0xbd, 0xad, 0xa4,
- 0xc0, 0x00, 0x13, 0x48,
- 0x83, 0x31, 0x23, 0xcd,
- 0x5c, 0x00, 0x46, 0xc0,
- 0xdc, 0x00, 0x4a, 0x90,
- 0xc0, 0x00, 0x11, 0xb8,
- 0xad, 0xbe, 0xab, 0x7e,
- 0xf8, 0x10, 0x14, 0x25,
- 0xe0, 0x20, 0x00, 0x55,
- 0xf8, 0x20, 0x14, 0xc5,
- 0xc4, 0x27, 0x25, 0x14,
- 0xfc, 0x08, 0x0a, 0xb5,
- 0x60, 0x10, 0x00, 0x25,
- 0x0a, 0x75, 0xc4, 0xc7,
- 0x83, 0x6d, 0x7c, 0x30,
- 0xfc, 0x30, 0x04, 0xc5,
- 0x8e, 0xb3, 0x0e, 0x65,
- 0x83, 0x6d, 0x99, 0x14,
- 0x8d, 0x14, 0x9c, 0x25,
- 0x83, 0x6d, 0xa8, 0x74,
- 0x02, 0x14, 0xa6, 0x85,
- 0x89, 0x24, 0xc4, 0x77,
- 0xfc, 0x1c, 0x02, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x8c, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0x80, 0x00, 0x0f, 0xa8,
- 0x12, 0xc0, 0x2f, 0x9e,
- 0x27, 0x8e, 0xe4, 0x10,
- 0xc0, 0x14, 0xc7, 0x97,
- 0xb3, 0x11, 0x3e, 0x1e,
- 0xe6, 0x86, 0x50, 0xba,
- 0x3e, 0xb4, 0xa3, 0x14,
- 0xc5, 0x87, 0x84, 0x81,
- 0x66, 0x86, 0x52, 0x9a,
- 0x16, 0xb5, 0x98, 0x83,
- 0xad, 0xc1, 0x7c, 0x1c,
- 0x58, 0x2a, 0x10, 0x91,
- 0x49, 0x97, 0xe6, 0xb2,
- 0xe0, 0x04, 0x0e, 0x06,
- 0x04, 0xb4, 0x12, 0x83,
- 0x04, 0x83, 0xe0, 0x98,
- 0x10, 0xc3, 0x83, 0x91,
- 0x13, 0x45, 0x8f, 0x81,
- 0xa7, 0x8e, 0x83, 0x21,
- 0x14, 0x75, 0xa8, 0x24,
- 0x14, 0x85, 0xe0, 0x10,
- 0x2f, 0x9e, 0xe0, 0x20,
- 0x14, 0x95, 0xc4, 0x27,
- 0xc4, 0x77, 0x60, 0x30,
- 0x7c, 0x08, 0x0a, 0x15,
- 0x0a, 0x75, 0xc4, 0x87,
- 0x0a, 0x85, 0xfc, 0x1c,
- 0xc4, 0x97, 0x7c, 0x20,
- 0xfc, 0x24, 0x0a, 0x55,
- 0x82, 0x73, 0x1b, 0x14,
- 0x90, 0x73, 0x2f, 0x94,
- 0x0a, 0xb4, 0x0a, 0x73,
- 0x4e, 0x12, 0xe0, 0x84,
- 0xae, 0x53, 0xfa, 0x1c,
- 0x90, 0xe5, 0x92, 0x5d,
- 0x10, 0xc0, 0x23, 0x94,
- 0x42, 0x14, 0xe4, 0x10,
- 0x96, 0xc3, 0xc7, 0x87,
- 0x66, 0xa6, 0x50, 0x8a,
- 0x02, 0x15, 0xc4, 0xc7,
- 0x84, 0x81, 0xfc, 0x08,
- 0x98, 0x83, 0xc5, 0x87,
- 0x90, 0x11, 0x02, 0x83,
- 0x70, 0x9c, 0x58, 0x82,
- 0xe1, 0x90, 0x16, 0x14,
- 0x91, 0x81, 0x12, 0x1b,
- 0x0e, 0x06, 0x0b, 0x95,
- 0xa7, 0x8e, 0xe0, 0x08,
- 0x14, 0x15, 0xa8, 0x84,
- 0xc4, 0x87, 0xe0, 0x10,
- 0x7c, 0x20, 0x0a, 0x75,
- 0x0a, 0x15, 0xc4, 0x17,
- 0x8f, 0x54, 0xfc, 0x04,
- 0x4e, 0x52, 0x8e, 0x13,
- 0x4a, 0xb2, 0xfa, 0x04,
- 0xc2, 0x57, 0xf1, 0x9c,
- 0x86, 0x65, 0x92, 0x5d,
- 0x85, 0x91, 0x2f, 0x9e,
- 0x7c, 0x20, 0x04, 0x15,
- 0xe4, 0x10, 0x04, 0xc0,
- 0xc7, 0x27, 0x23, 0x84,
- 0x02, 0xc3, 0x96, 0xc3,
- 0x44, 0x2a, 0x88, 0x11,
- 0x8e, 0xc3, 0x66, 0xa2,
- 0x16, 0x14, 0x44, 0xc7,
- 0x04, 0x21, 0xe1, 0x8c,
- 0x45, 0x27, 0x90, 0x1b,
- 0x04, 0xc3, 0x91, 0x81,
- 0xe0, 0x08, 0x0e, 0x06,
- 0x85, 0x21, 0x05, 0xd5,
- 0x92, 0x5b, 0x0d, 0x05,
- 0xc4, 0x77, 0x7e, 0x24,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x84, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0xaf, 0x9e, 0x98, 0x05,
- 0x10, 0xc0, 0x27, 0x8e,
- 0x00, 0x15, 0xe4, 0x10,
- 0xc7, 0x87, 0x60, 0x14,
- 0x96, 0xc3, 0x23, 0x94,
- 0x7c, 0x1c, 0x02, 0x15,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xe6, 0xa6, 0x50, 0x8a,
- 0x82, 0x23, 0x10, 0x81,
- 0x84, 0x11, 0x49, 0x87,
- 0xc4, 0x27, 0x10, 0xc3,
- 0x61, 0x88, 0x16, 0x14,
- 0x12, 0x1b, 0x84, 0xc3,
- 0x07, 0x21, 0x8f, 0x81,
- 0x42, 0xba, 0x89, 0x91,
- 0x92, 0x13, 0xe6, 0x86,
- 0xe5, 0x1f, 0x17, 0x24,
- 0x42, 0xca, 0x82, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x8e, 0x13, 0xe6, 0x8a,
- 0x82, 0x5d, 0xf1, 0x1f,
- 0x80, 0x5c, 0x1e, 0x55,
- 0x40, 0x45, 0x88, 0xc5,
- 0xa3, 0x3b, 0x60, 0x8c,
- 0x88, 0x2b, 0x1d, 0x14,
- 0x48, 0x20, 0x27, 0x84,
- 0xad, 0xb4, 0xdc, 0x00,
- 0x82, 0x11, 0x2b, 0x74,
- 0x86, 0x95, 0x9d, 0x1e,
- 0x60, 0xf4, 0x00, 0x15,
- 0x98, 0x4b, 0x84, 0xcb,
- 0x71, 0x84, 0x46, 0x22,
- 0x02, 0x30, 0xff, 0x21,
- 0x29, 0x24, 0xec, 0x40,
- 0x95, 0x14, 0x84, 0x1d,
- 0x5c, 0x00, 0x44, 0x30,
- 0x1e, 0x25, 0x83, 0x3d,
- 0x83, 0x11, 0x40, 0x50,
- 0x60, 0x80, 0x40, 0x15,
- 0x8b, 0x4e, 0x85, 0x31,
- 0x81, 0x45, 0xa9, 0x2e,
- 0xad, 0xb4, 0xa7, 0x84,
- 0x06, 0xcb, 0xab, 0x74,
- 0x08, 0x40, 0x82, 0x61,
- 0x10, 0x80, 0x6c, 0x04,
- 0x14, 0xa0, 0xec, 0x10,
- 0x8a, 0x9b, 0x6c, 0x10,
- 0x8e, 0x3b, 0x01, 0x45,
- 0x92, 0x5b, 0x7f, 0x35,
- 0x83, 0x4d, 0xa9, 0x14,
- 0x9f, 0xfc, 0x27, 0x58,
- 0xa1, 0x3d, 0x8b, 0x34,
- 0x9d, 0x24, 0x82, 0x15,
- 0xe0, 0xf4, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x8c, 0x40, 0x35,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x85,
- 0x40, 0x15, 0xff, 0x11,
- 0x00, 0x15, 0xe0, 0x90,
- 0x91, 0x1e, 0xe0, 0xc0,
- 0xe0, 0x30, 0x00, 0x15,
- 0xe0, 0x18, 0x00, 0xb5,
- 0x00, 0x15, 0x8d, 0x1e,
- 0x8b, 0x1e, 0xe0, 0x24,
- 0xe0, 0x64, 0x00, 0x15,
- 0x89, 0xbe, 0xfe, 0x8e,
- 0x81, 0x11, 0x0f, 0x1e,
- 0x81, 0x11, 0x13, 0x1e,
- 0x81, 0x11, 0x3e, 0x1e,
- 0xad, 0xb5, 0xfc, 0x1e,
- 0xe3, 0x1c, 0x05, 0x0a,
- 0xc0, 0x00, 0x16, 0xe8,
- 0x60, 0x20, 0x00, 0x75,
- 0xe0, 0x88, 0x06, 0xa4,
- 0x7c, 0x0c, 0x16, 0x85,
- 0x8f, 0x14, 0x82, 0x21,
- 0x0e, 0x95, 0xc4, 0x87,
- 0xa1, 0x1b, 0x7c, 0x20,
- 0x96, 0xc5, 0x93, 0x2e,
- 0xb4, 0x13, 0xfe, 0x14,
- 0x96, 0x45, 0xb0, 0x1d,
- 0x60, 0xb4, 0x00, 0x15,
- 0x06, 0x55, 0x96, 0x33,
- 0x06, 0x25, 0xfa, 0x10,
- 0xc4, 0x57, 0xe0, 0x20,
- 0x7c, 0x14, 0x0e, 0x45,
- 0x0e, 0xc5, 0xc4, 0x27,
- 0x04, 0x10, 0x7c, 0x08,
- 0x87, 0x27, 0xe4, 0x10,
- 0xfa, 0x10, 0x44, 0x22,
- 0x60, 0x10, 0x00, 0x95,
- 0x08, 0x24, 0x92, 0xc3,
- 0x4c, 0xc2, 0xe0, 0x84,
- 0x12, 0x85, 0xf1, 0x90,
- 0xa3, 0x6d, 0x7c, 0x20,
- 0xa4, 0xb5, 0xbc, 0x8e,
- 0x60, 0x14, 0x00, 0x45,
- 0x8b, 0x94, 0xc2, 0x67,
- 0x7c, 0x14, 0x08, 0x45,
- 0xe4, 0x10, 0x0a, 0x80,
- 0x98, 0x83, 0x47, 0x57,
- 0xe6, 0xa6, 0x4a, 0x5a,
- 0x64, 0x08, 0x16, 0x40,
- 0x45, 0xb7, 0x88, 0x23,
- 0x56, 0xba, 0x90, 0x51,
- 0xc9, 0x57, 0x66, 0xa6,
- 0xc4, 0x27, 0x0a, 0x83,
- 0x84, 0x83, 0x08, 0xb1,
- 0xc7, 0xb7, 0x0d, 0x44,
- 0x44, 0x8a, 0x96, 0x83,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x92,
- 0xcf, 0x27, 0xe5, 0x00,
- 0x1e, 0xb5, 0x84, 0x6d,
- 0x9a, 0xe5, 0x80, 0x10,
- 0x84, 0x6d, 0xfc, 0x24,
- 0xc0, 0x90, 0x40, 0xa5,
- 0x89, 0xb4, 0xbe, 0x24,
- 0xc0, 0x08, 0x5e, 0x65,
- 0x98, 0xb5, 0xa1, 0x2b,
- 0xe0, 0xf8, 0x00, 0x25,
- 0x44, 0xa2, 0x91, 0x44,
- 0x48, 0x22, 0xf1, 0x88,
- 0x83, 0x21, 0x7a, 0x10,
- 0xbe, 0x2e, 0x91, 0x4e,
- 0x00, 0x65, 0x8b, 0xa5,
- 0x42, 0xb2, 0x60, 0xb4,
- 0x02, 0x45, 0xf0, 0x8c,
- 0x00, 0xb5, 0xfa, 0x10,
- 0x06, 0x60, 0xe0, 0x14,
- 0x44, 0x47, 0xe4, 0x10,
- 0x0e, 0x25, 0x87, 0x37,
- 0x16, 0xc5, 0xfc, 0x10,
- 0x4a, 0x32, 0xfc, 0x20,
- 0x04, 0x94, 0x7a, 0x08,
- 0x06, 0x54, 0xe0, 0x84,
- 0x46, 0x22, 0xe0, 0x84,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0xc0, 0x10, 0x1e, 0xb5,
- 0x16, 0x45, 0xa2, 0x55,
- 0x50, 0xc2, 0x7c, 0x10,
- 0x3c, 0xce, 0xf0, 0xa4,
- 0xe4, 0x08, 0x16, 0xc0,
- 0xc5, 0xb7, 0x0b, 0xc4,
- 0x84, 0x41, 0x08, 0x83,
- 0x8a, 0x83, 0x45, 0x47,
- 0x66, 0xb2, 0x56, 0xba,
- 0x48, 0x4a, 0xc4, 0x87,
- 0xc2, 0x37, 0x66, 0xb2,
- 0x88, 0xb1, 0x0d, 0x54,
- 0xc7, 0xb7, 0x08, 0x41,
- 0x96, 0x43, 0xc7, 0x47,
- 0x48, 0x4a, 0x90, 0x43,
- 0x48, 0x4a, 0xf0, 0x0a,
- 0x08, 0x40, 0xe6, 0x96,
- 0xcf, 0x47, 0xe5, 0x00,
- 0x1e, 0xb5, 0x88, 0x3d,
- 0x1e, 0xc5, 0x80, 0x10,
- 0x98, 0x65, 0x80, 0x00,
- 0x89, 0xb4, 0xfc, 0x44,
- 0x40, 0xa5, 0x88, 0x3d,
- 0x5e, 0x35, 0xc0, 0x90,
- 0xbe, 0x34, 0xc0, 0x08,
- 0xa1, 0x3b, 0xbc, 0xc4,
- 0x00, 0x35, 0x96, 0x15,
- 0x91, 0x44, 0xe0, 0xf8,
- 0xf1, 0x8c, 0x46, 0xa2,
- 0x7a, 0x10, 0x48, 0x32,
- 0x91, 0x4e, 0x83, 0x31,
- 0x89, 0xd5, 0xbe, 0x3e,
- 0x10, 0xa0, 0x0c, 0x34,
- 0x04, 0x84, 0xec, 0x04,
- 0xa0, 0x11, 0x60, 0x88,
- 0x7c, 0x08, 0x16, 0x65,
- 0x02, 0x24, 0x8b, 0x17,
- 0x0e, 0x45, 0xc4, 0x37,
- 0xc4, 0x67, 0xfc, 0x0c,
- 0xfc, 0x18, 0x04, 0x25,
- 0xfa, 0x08, 0x46, 0x12,
- 0xe0, 0x88, 0x02, 0x34,
- 0xa2, 0xa5, 0x89, 0x1d,
- 0xe0, 0x8c, 0x02, 0x34,
- 0xf1, 0x84, 0x42, 0xc2,
- 0xa0, 0xf5, 0xa3, 0x1d,
- 0xb3, 0x41, 0x40, 0x24,
- 0x66, 0x92, 0x48, 0xca,
- 0x8b, 0xc4, 0xc2, 0x17,
- 0x7c, 0x18, 0x04, 0x25,
- 0x3c, 0x64, 0x84, 0x41,
- 0x0a, 0x60, 0xc5, 0x47,
- 0x8c, 0x43, 0x64, 0x10,
- 0xad, 0x61, 0x47, 0x57,
- 0xe6, 0xb2, 0x4a, 0x5a,
- 0x66, 0xb2, 0x58, 0x2a,
- 0x10, 0x51, 0xcc, 0x27,
- 0xe6, 0x9a, 0x46, 0x3a,
- 0x82, 0xc1, 0x49, 0x57,
- 0xc3, 0xc7, 0x0a, 0x43,
- 0x86, 0x43, 0x0d, 0x34,
- 0x98, 0x43, 0x84, 0x43,
- 0xf0, 0x0a, 0x44, 0x4a,
- 0xe6, 0x8e, 0x44, 0x2a,
- 0xe5, 0x00, 0x04, 0x20,
- 0x84, 0x1d, 0xcf, 0x27,
- 0xfc, 0x24, 0x96, 0xc5,
- 0x40, 0xa5, 0x84, 0x1d,
- 0x5e, 0x15, 0xc0, 0x90,
- 0x89, 0xb5, 0xc0, 0x08,
- 0x10, 0xa0, 0x02, 0x44,
- 0x04, 0x54, 0xec, 0x04,
- 0xe0, 0x88, 0x06, 0x84,
- 0x7c, 0x0c, 0x16, 0x35,
- 0x8b, 0x67, 0xa0, 0x61,
- 0x02, 0x34, 0xc4, 0x57,
- 0x08, 0x35, 0xe0, 0x88,
- 0x0e, 0x45, 0xfc, 0x04,
- 0x4c, 0x62, 0xfc, 0x14,
- 0x06, 0x64, 0xfa, 0x0c,
- 0x89, 0x3d, 0xe0, 0x88,
- 0x06, 0x64, 0x90, 0x05,
- 0x46, 0x22, 0xe0, 0x8c,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0x40, 0x24, 0x8e, 0x55,
- 0xe4, 0x08, 0x08, 0xc0,
- 0xc5, 0x47, 0x0b, 0x74,
- 0xc4, 0xc7, 0x39, 0x51,
- 0x7c, 0x04, 0x04, 0x15,
- 0x48, 0x4a, 0x9b, 0x21,
- 0xc2, 0x37, 0x66, 0x9e,
- 0xe6, 0x8a, 0x44, 0x9a,
- 0x4a, 0x6a, 0x08, 0x41,
- 0x04, 0xc3, 0xe6, 0x96,
- 0xe6, 0x9e, 0x44, 0x1a,
- 0xcc, 0x17, 0x47, 0x47,
- 0x82, 0x21, 0x08, 0xc3,
- 0xc3, 0x27, 0x0a, 0xc3,
- 0x0d, 0x24, 0x82, 0xc3,
- 0x42, 0xca, 0x84, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8a,
- 0xcf, 0x17, 0xe5, 0x00,
- 0x84, 0x65, 0x82, 0x3d,
- 0x82, 0x3d, 0xfc, 0x14,
- 0xc0, 0x90, 0x40, 0xa5,
- 0xc0, 0x08, 0x5e, 0x35,
- 0xa1, 0x1b, 0xbe, 0x14,
- 0x00, 0x15, 0x82, 0x55,
- 0x11, 0x14, 0xe0, 0xf8,
- 0x42, 0xa2, 0xa2, 0xa3,
- 0x11, 0x1e, 0xfa, 0x04,
- 0xbe, 0x1e, 0x83, 0x11,
- 0x90, 0xab, 0x11, 0x14,
- 0x83, 0xad, 0x93, 0x24,
- 0x9f, 0xfc, 0x29, 0x28,
- 0xd0, 0xf1, 0x01, 0x11,
- 0xe0, 0x98, 0x40, 0x15,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0xac, 0x00, 0x15,
- 0x00, 0x25, 0x81, 0x41,
- 0x81, 0x51, 0x60, 0xa0,
- 0x81, 0x85, 0x84, 0x34,
- 0x06, 0xcd, 0xc5, 0xc4,
- 0xfb, 0x30, 0x46, 0x32,
- 0x1c, 0x00, 0x48, 0x50,
- 0x85, 0x5d, 0x82, 0x51,
- 0x40, 0x45, 0xfe, 0x15,
- 0xdd, 0x93, 0xe0, 0xb8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x18, 0x02, 0x65,
- 0x8e, 0x35, 0xa3, 0x2b,
- 0xe0, 0x4c, 0x02, 0x55,
- 0x94, 0x65, 0x81, 0x5d,
- 0x08, 0x04, 0x06, 0xc4,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x88, 0x63, 0x7c, 0x10,
- 0x6c, 0x04, 0x0e, 0x00,
- 0x80, 0x4b, 0x83, 0x81,
- 0xe0, 0x88, 0x06, 0x24,
- 0xfc, 0x0c, 0x18, 0x35,
- 0x86, 0xab, 0x03, 0xf5,
- 0xf8, 0x04, 0x0c, 0x95,
- 0x18, 0x95, 0xc4, 0x97,
- 0x95, 0x9d, 0xfc, 0x24,
- 0x87, 0x9d, 0x82, 0xa5,
- 0x02, 0xa5, 0x82, 0x65,
- 0x16, 0xa4, 0xe0, 0xb4,
- 0xf7, 0xb7, 0xe1, 0x7c,
- 0x8e, 0xbb, 0x16, 0xa3,
- 0x94, 0x9d, 0x8b, 0xa7,
- 0xa3, 0x8b, 0x80, 0x95,
- 0x88, 0xbb, 0x82, 0x75,
- 0x0c, 0x60, 0x02, 0x81,
- 0x0e, 0x70, 0xec, 0x10,
- 0x92, 0xab, 0x6c, 0x04,
- 0x8a, 0x8d, 0x96, 0x4b,
- 0x98, 0x54, 0xf8, 0x45,
- 0x18, 0x55, 0xc4, 0x57,
- 0x81, 0xc5, 0xfc, 0x14,
- 0x04, 0x04, 0x06, 0x34,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x08, 0x24, 0xfc, 0x08,
- 0x06, 0x55, 0xe0, 0x88,
- 0x80, 0x4b, 0x7c, 0x10,
- 0x02, 0xc5, 0x8a, 0x3b,
- 0xc4, 0x27, 0x60, 0x20,
- 0xe3, 0x40, 0x02, 0x19,
- 0xfc, 0x08, 0x18, 0x25,
- 0xe6, 0x86, 0x46, 0x3a,
- 0xe6, 0x86, 0x42, 0x5a,
- 0x86, 0x53, 0x04, 0x21,
- 0x82, 0x23, 0x85, 0x27,
- 0x48, 0x00, 0x85, 0x5d,
- 0x88, 0x0b, 0xdc, 0x00,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x80, 0x1e, 0xf0,
- 0xe0, 0x84, 0x00, 0x15,
- 0xb0, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x00, 0x25,
- 0xe0, 0x84, 0x12, 0x14,
- 0x12, 0x73, 0x84, 0x93,
- 0xa1, 0x7d, 0xe0, 0x30,
- 0x00, 0x45, 0xae, 0xd5,
- 0x87, 0x51, 0x60, 0xa0,
- 0xe0, 0x60, 0x12, 0x33,
- 0xe6, 0x96, 0x50, 0x4a,
- 0xac, 0xa5, 0x91, 0x3d,
- 0xac, 0x75, 0xa1, 0x3d,
- 0xac, 0x25, 0x91, 0x7d,
- 0x0c, 0x70, 0x09, 0x2e,
- 0x00, 0x45, 0xe4, 0x0c,
- 0x00, 0xa5, 0xe0, 0xb4,
- 0xa0, 0x41, 0xe0, 0xd4,
- 0x61, 0x7c, 0x0a, 0x44,
- 0xfa, 0x80, 0x04, 0xa4,
- 0xf7, 0x57, 0x0f, 0x2e,
- 0x04, 0xa4, 0x0a, 0x43,
- 0x0b, 0x47, 0xe1, 0xa0,
- 0x0d, 0x4e, 0xe1, 0xa7,
- 0xe0, 0x88, 0x08, 0x64,
- 0x60, 0x18, 0x00, 0x55,
- 0xfa, 0x80, 0x16, 0x24,
- 0xfe, 0x2e, 0xfc, 0xae,
- 0x54, 0x52, 0x0b, 0x5e,
- 0x01, 0x51, 0xf0, 0x90,
- 0x81, 0xc5, 0x81, 0x41,
- 0x82, 0x61, 0x69, 0x24,
- 0xe0, 0x20, 0x00, 0xc5,
- 0x18, 0x25, 0xc4, 0x27,
- 0x84, 0x21, 0xfc, 0x08,
- 0x48, 0x22, 0x85, 0x27,
- 0x86, 0x6d, 0xfa, 0x10,
- 0x0f, 0xc4, 0xfc, 0x85,
- 0x12, 0x23, 0xa0, 0x1d,
- 0x8e, 0xc3, 0xc0, 0x2c,
- 0xf0, 0xac, 0x4e, 0xc2,
- 0x5b, 0x1c, 0x4e, 0x22,
- 0x9c, 0xf5, 0xa3, 0xcd,
- 0x89, 0x2d, 0x8d, 0x24,
- 0x04, 0xb0, 0x9c, 0x85,
- 0xfa, 0x2d, 0xec, 0x04,
- 0x91, 0x7d, 0x9c, 0x15,
- 0x0d, 0x24, 0x9a, 0xc5,
- 0xe1, 0x84, 0x06, 0xb4,
- 0x0c, 0xc0, 0x0b, 0xa4,
- 0x3e, 0x1e, 0xe4, 0x04,
- 0xe0, 0x88, 0x02, 0x64,
- 0xa8, 0x23, 0x0f, 0x1e,
- 0x82, 0xa3, 0x44, 0x27,
- 0x81, 0x91, 0x26, 0x23,
- 0x60, 0xae, 0x46, 0x2a,
- 0xe0, 0x88, 0x04, 0x44,
- 0x8c, 0x8b, 0x01, 0xb1,
- 0x03, 0x15, 0xa6, 0xcb,
- 0x69, 0x24, 0xa4, 0xc3,
- 0x82, 0x14, 0x82, 0x81,
- 0x02, 0x15, 0xc4, 0x27,
- 0xc4, 0x17, 0xfc, 0x08,
- 0xa6, 0xc3, 0x18, 0x13,
- 0x60, 0x00, 0x04, 0x12,
- 0xe8, 0x00, 0x02, 0x12,
- 0xa2, 0x93, 0x04, 0xb3,
- 0xfc, 0x05, 0x8e, 0x8d,
- 0x18, 0x90, 0x0b, 0x84,
- 0x0f, 0x14, 0xe4, 0x08,
- 0xe4, 0x08, 0x06, 0xb0,
- 0x03, 0x25, 0x89, 0x94,
- 0x61, 0x14, 0x82, 0x83,
- 0xc0, 0x24, 0x82, 0x61,
- 0x04, 0x15, 0xc4, 0x17,
- 0x00, 0x25, 0xfc, 0x04,
- 0x44, 0x2a, 0xe0, 0x24,
- 0x8a, 0x13, 0x66, 0x86,
- 0xe5, 0x00, 0x04, 0x20,
- 0x4a, 0x12, 0xcf, 0x27,
- 0x8e, 0x6d, 0xf0, 0x88,
- 0xfe, 0x14, 0xfa, 0xe5,
- 0xf4, 0x20, 0x02, 0x8a,
- 0x0c, 0x34, 0x88, 0xd5,
- 0x85, 0xc7, 0x61, 0x08,
- 0xf1, 0xb0, 0x46, 0x62,
- 0x86, 0xe5, 0xa0, 0x3d,
- 0x60, 0xd0, 0x00, 0x05,
- 0x7c, 0x24, 0x8c, 0xc3,
- 0x42, 0xca, 0x8a, 0xc3,
- 0xd1, 0x07, 0xf0, 0x0a,
- 0xfa, 0x80, 0x00, 0x04,
- 0xe6, 0x92, 0x40, 0x0a,
- 0xe6, 0x8a, 0x42, 0x1a,
- 0x05, 0x07, 0x84, 0x01,
- 0xe6, 0x00, 0x02, 0x10,
- 0x91, 0x17, 0x06, 0x03,
- 0x82, 0x0d, 0x3e, 0x04,
- 0xd0, 0xa4, 0x40, 0x02,
- 0xc1, 0xe0, 0x00, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0xc1, 0xe0, 0x40, 0x11,
- 0x0c, 0x0c, 0xc0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0xa8, 0x00, 0x15,
- 0x00, 0x75, 0x81, 0x41,
- 0x00, 0x25, 0xe0, 0xac,
- 0x00, 0xa5, 0xe0, 0xb0,
- 0xa3, 0x1d, 0x60, 0xa0,
- 0x88, 0x4e, 0x9c, 0x4e,
- 0x83, 0x13, 0x84, 0x35,
- 0x8d, 0xf3, 0x83, 0x33,
- 0x9c, 0xc4, 0x82, 0x54,
- 0xfc, 0x10, 0x0a, 0x55,
- 0x9c, 0x5e, 0x98, 0x53,
- 0x88, 0xc4, 0xc0, 0x54,
- 0x7c, 0x10, 0x0a, 0x55,
- 0x98, 0x53, 0x88, 0x41,
- 0x02, 0x54, 0x88, 0x5e,
- 0xf1, 0x84, 0x48, 0xa2,
- 0x18, 0x70, 0x23, 0x4d,
- 0x4c, 0x70, 0xe4, 0x10,
- 0x08, 0x55, 0xdc, 0x00,
- 0xdc, 0x00, 0x50, 0x50,
- 0x60, 0x88, 0x06, 0x44,
- 0x7c, 0x3e, 0x8e, 0x6b,
- 0xe0, 0x88, 0x16, 0x14,
- 0xfe, 0x0c, 0x0c, 0x95,
- 0x82, 0xa1, 0x7e, 0xae,
- 0xa2, 0xa3, 0x09, 0x13,
- 0x8a, 0xab, 0x3e, 0xae,
- 0x89, 0x73, 0x83, 0x33,
- 0x7c, 0x2c, 0x14, 0xa5,
- 0xcd, 0x84, 0x94, 0x3b,
- 0x14, 0x93, 0xb0, 0x93,
- 0xf1, 0x9e, 0x86, 0xab,
- 0xbe, 0xc4, 0xfc, 0x84,
- 0x02, 0x54, 0xfe, 0xa4,
- 0xc4, 0xc7, 0x8a, 0x83,
- 0x0e, 0xa0, 0x8e, 0xc3,
- 0x48, 0x9a, 0xec, 0x04,
- 0x00, 0xd8, 0xe0, 0x1c,
- 0x0e, 0x10, 0xa0, 0x00,
- 0x8f, 0x13, 0xec, 0x04,
- 0x87, 0x73, 0x83, 0x33,
- 0xe1, 0x74, 0xd9, 0x34,
- 0xae, 0x33, 0xd5, 0x94,
- 0xf1, 0x3e, 0x92, 0x33,
- 0x18, 0x20, 0x40, 0x54,
- 0x88, 0x75, 0xe4, 0x10,
- 0x60, 0x88, 0x0e, 0x44,
- 0x0c, 0x85, 0x84, 0x6b,
- 0x06, 0xa0, 0x7e, 0x1c,
- 0x09, 0x13, 0xe4, 0x04,
- 0xf1, 0x84, 0x48, 0x32,
- 0x06, 0x14, 0x07, 0x33,
- 0x30, 0xac, 0xe0, 0x88,
- 0x8a, 0x9b, 0x68, 0x00,
- 0x7c, 0x0c, 0x12, 0x95,
- 0xe9, 0xb4, 0x92, 0xab,
- 0x12, 0x83, 0xb6, 0x83,
- 0xf1, 0x8e, 0x94, 0x9b,
- 0x46, 0x52, 0x40, 0x54,
- 0xc4, 0x47, 0xf0, 0x9c,
- 0x20, 0x01, 0x00, 0xa8,
- 0x58, 0x22, 0x40, 0x00,
- 0x83, 0x05, 0xf0, 0x90,
- 0x8a, 0x3b, 0x04, 0x6b,
- 0xa0, 0x00, 0x00, 0xd8,
- 0xec, 0x04, 0x00, 0x10,
- 0x83, 0x33, 0x81, 0x13,
- 0xd9, 0x04, 0x87, 0x73,
- 0xd5, 0x24, 0xcd, 0x14,
- 0x84, 0x03, 0xa2, 0x03,
- 0xa0, 0xf1, 0xf1, 0x0e,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x60, 0xa0, 0x02, 0x35,
- 0x02, 0x25, 0x87, 0x41,
- 0x46, 0x3a, 0xe0, 0x50,
- 0x48, 0x22, 0xe6, 0x92,
- 0x06, 0x30, 0xf0, 0x80,
- 0x87, 0x4d, 0xec, 0x04,
- 0x02, 0x35, 0x8a, 0xa5,
- 0x08, 0x04, 0x60, 0x18,
- 0x83, 0xc1, 0xe0, 0x88,
- 0xfc, 0x10, 0x06, 0x55,
- 0xc4, 0x57, 0x86, 0x44,
- 0xfc, 0x14, 0x08, 0x55,
- 0x0c, 0x00, 0x83, 0xf5,
- 0x0e, 0x04, 0x64, 0x04,
- 0x06, 0x75, 0xe0, 0x88,
- 0x10, 0x64, 0x7c, 0x1c,
- 0x06, 0x85, 0xe0, 0x88,
- 0xc4, 0x77, 0xfc, 0x20,
- 0x7c, 0x1c, 0x08, 0x95,
- 0x08, 0x75, 0xc4, 0x87,
- 0x93, 0x7d, 0xfc, 0x20,
- 0x8b, 0x7d, 0x82, 0x05,
- 0x02, 0x85, 0x80, 0xc5,
- 0xca, 0x77, 0x60, 0xb4,
- 0x80, 0x95, 0x90, 0x7d,
- 0x80, 0x6b, 0x23, 0xcb,
- 0x02, 0xc1, 0x80, 0xb5,
- 0x84, 0xcd, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xf8, 0x25,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0x60, 0xa0, 0x00, 0x55,
- 0x00, 0x45, 0x81, 0x31,
- 0x02, 0x54, 0xe0, 0x18,
- 0x04, 0x54, 0x60, 0x88,
- 0x81, 0xc5, 0xe0, 0x8c,
- 0x4a, 0x42, 0x08, 0xcb,
- 0x71, 0x3e, 0xf0, 0x84,
- 0x94, 0x3e, 0x84, 0x43,
- 0x82, 0x31, 0x10, 0x3e,
- 0x60, 0xa0, 0x00, 0x55,
- 0x8b, 0x3d, 0x98, 0x4b,
- 0xdd, 0x93, 0xfc, 0x95,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x81, 0x31, 0x2d, 0x0d,
- 0x04, 0x55, 0xac, 0x35,
- 0x04, 0x45, 0xe1, 0x04,
- 0x04, 0xa5, 0xe1, 0x08,
- 0x13, 0x5e, 0xe1, 0x0c,
- 0xf1, 0x94, 0x56, 0x12,
- 0x4a, 0x12, 0x11, 0x4e,
- 0x04, 0x95, 0xf1, 0x90,
- 0x40, 0x12, 0x61, 0x10,
- 0x04, 0x85, 0xf1, 0xa8,
- 0x58, 0x52, 0x61, 0x14,
- 0x04, 0x45, 0xf9, 0xac,
- 0x4c, 0xc2, 0x61, 0x18,
- 0x0f, 0x1e, 0xf9, 0x80,
- 0xf1, 0xa4, 0x4e, 0x12,
- 0x58, 0x12, 0x0d, 0x7e,
- 0x2c, 0x7f, 0xf1, 0xa0,
- 0xf1, 0x90, 0x48, 0x12,
- 0xb8, 0x7f, 0x0b, 0xce,
- 0xa1, 0x7d, 0xa8, 0x7f,
- 0x7c, 0x4e, 0xa2, 0x75,
- 0xe0, 0x88, 0x02, 0xb4,
- 0xc4, 0x57, 0x09, 0xae,
- 0xfe, 0x8e, 0xbe, 0x9e,
- 0xe0, 0x18, 0x04, 0x95,
- 0xe1, 0x1c, 0x04, 0x85,
- 0xe0, 0xb4, 0x04, 0xa5,
- 0xfc, 0x14, 0x12, 0x75,
- 0xfc, 0x04, 0x12, 0x15,
- 0xe0, 0x20, 0x04, 0x55,
- 0xc4, 0x17, 0xc4, 0x77,
- 0xfc, 0x04, 0x0a, 0x45,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xe1, 0x20, 0x04, 0x75,
- 0xe6, 0xa2, 0x50, 0x4a,
- 0xf1, 0x90, 0x48, 0x12,
- 0x66, 0x9e, 0x4e, 0x4a,
- 0x90, 0x7d, 0xb4, 0x83,
- 0x04, 0x45, 0x98, 0xe5,
- 0x0c, 0x04, 0x61, 0x24,
- 0x12, 0x35, 0xe0, 0x88,
- 0x93, 0x04, 0xfc, 0x18,
- 0x0a, 0x35, 0xc4, 0x37,
- 0x42, 0x32, 0xfc, 0x0c,
- 0x42, 0x1a, 0xf1, 0x84,
- 0x92, 0x4b, 0x66, 0x92,
- 0x8c, 0x25, 0x8e, 0x1d,
- 0xc4, 0xb7, 0x8d, 0xb4,
- 0xfc, 0x2c, 0x08, 0x05,
- 0x0a, 0x65, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x46, 0x62, 0xe1, 0x28,
- 0x46, 0x3a, 0xf1, 0x8c,
- 0x91, 0x04, 0xe6, 0x82,
- 0x88, 0x25, 0x82, 0x3d,
- 0xc4, 0xa7, 0x8b, 0xa4,
- 0xfc, 0x28, 0x08, 0x05,
- 0x0a, 0x95, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x42, 0x92, 0xe1, 0x2c,
- 0x42, 0x1a, 0xf1, 0x98,
- 0x89, 0x04, 0xe6, 0x82,
- 0x84, 0x25, 0x86, 0x1d,
- 0x04, 0x35, 0xfc, 0x04,
- 0xc4, 0x07, 0xe1, 0x30,
- 0xfc, 0x00, 0x08, 0x05,
- 0x0a, 0x05, 0xc4, 0x07,
- 0xb2, 0x03, 0xfc, 0x00,
- 0xe6, 0x8e, 0x40, 0x0a,
- 0x82, 0x0d, 0x7e, 0x04,
- 0x80, 0x04, 0x1e, 0x05,
- 0x88, 0x75, 0xa9, 0x0d,
- 0xe0, 0x74, 0x04, 0x15,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x8f, 0xc4, 0x86, 0xc5,
- 0xaf, 0xcd, 0xa0, 0xc3,
- 0xc4, 0xc7, 0x86, 0x55,
- 0x18, 0x15, 0x88, 0xc3,
- 0x18, 0x25, 0xf8, 0x18,
- 0xf0, 0x34, 0xf8, 0x08,
- 0x0a, 0x15, 0xc4, 0x17,
- 0xc4, 0x27, 0x7c, 0x04,
- 0x7c, 0x08, 0x0a, 0x25,
- 0x0a, 0x35, 0xc4, 0x37,
- 0xa4, 0x13, 0xfc, 0x0c,
- 0x84, 0x1d, 0xa6, 0x23,
- 0x8c, 0x10, 0x00, 0x00,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x06, 0x0b, 0x80, 0x3b,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x7b, 0x0b, 0x2e,
- 0x02, 0x40, 0x09, 0x0e,
- 0x00, 0x08, 0xe4, 0xc0,
- 0xe7, 0x00, 0x04, 0x40,
- 0x66, 0x40, 0x0a, 0x40,
- 0x01, 0xf5, 0x99, 0xc1,
- 0x42, 0x65, 0x81, 0x61,
- 0x18, 0xc0, 0x78, 0x30,
- 0xc5, 0x6e, 0xec, 0x04,
- 0x42, 0x65, 0xd5, 0x6c,
- 0x4a, 0x63, 0xe0, 0x2c,
- 0xc9, 0x66, 0xe0, 0x2c,
- 0xe0, 0x2c, 0x44, 0x61,
- 0xfc, 0x55, 0xa1, 0xcb,
- 0x60, 0x88, 0x02, 0x04,
- 0x7c, 0x0e, 0xc2, 0x07,
- 0xe7, 0x00, 0x00, 0x40,
- 0x00, 0x40, 0x3e, 0x0e,
- 0x7e, 0x1e, 0xe6, 0x40,
- 0xe4, 0xc0, 0x12, 0x30,
- 0x64, 0xc0, 0x14, 0x40,
- 0xe6, 0x40, 0x0c, 0x30,
- 0x81, 0x81, 0x11, 0x0e,
- 0x12, 0x05, 0x8d, 0x45,
- 0x99, 0x21, 0x78, 0x30,
- 0x43, 0x38, 0x9c, 0x1a,
- 0x1c, 0x1a, 0xe8, 0x1c,
- 0x7f, 0xfd, 0x57, 0xfe,
- 0x40, 0x02, 0xcf, 0xff,
- 0x99, 0x21, 0x7b, 0xac,
- 0xf8, 0x30, 0x54, 0x05,
- 0x42, 0x78, 0xe5, 0x04,
- 0x69, 0x0e, 0xe8, 0x1c,
- 0x8f, 0x9e, 0x99, 0x21,
- 0xe0, 0x2c, 0x12, 0x05,
- 0x41, 0xf8, 0x9c, 0x1a,
- 0x59, 0x3a, 0xe8, 0x1c,
- 0xfb, 0xac, 0x40, 0x02,
- 0x99, 0x21, 0x1e, 0x1a,
- 0x54, 0x05, 0x8d, 0xae,
- 0x86, 0x0b, 0x60, 0x2c,
- 0xe8, 0x1c, 0x41, 0x48,
- 0x99, 0x21, 0x11, 0xb4,
- 0x0c, 0x03, 0xed, 0x0c,
- 0x9e, 0x1a, 0xe0, 0x5c,
- 0xe8, 0x1c, 0x42, 0xa8,
- 0x60, 0x2c, 0x0c, 0x03,
- 0x1e, 0x1a, 0x80, 0xab,
- 0x42, 0x38, 0x99, 0x21,
- 0x0c, 0x03, 0xe8, 0x1c,
- 0x80, 0x9b, 0x60, 0x8c,
- 0x99, 0x21, 0x1e, 0x1a,
- 0xe8, 0x1c, 0x41, 0xc8,
- 0x89, 0x34, 0xfc, 0x24,
- 0x42, 0x22, 0xfe, 0x44,
- 0xb4, 0x23, 0x71, 0xa4,
- 0x92, 0x23, 0x00, 0x13,
- 0x40, 0x2a, 0x8e, 0x38,
- 0x44, 0x1a, 0xe0, 0x92,
- 0x11, 0x44, 0xe0, 0x92,
- 0x02, 0x02, 0xa1, 0x3b,
- 0x92, 0x0b, 0x60, 0x00,
- 0x60, 0x00, 0x06, 0x22,
- 0xeb, 0xfc, 0x04, 0x12,
- 0x02, 0x32, 0x3e, 0x34,
- 0x00, 0x06, 0xeb, 0xfc,
- 0xa1, 0x9d, 0x40, 0x00,
- 0x9c, 0x00, 0x40, 0x90,
- 0x60, 0x30, 0x48, 0x03,
- 0x0c, 0x26, 0x90, 0x33,
- 0x46, 0x11, 0x82, 0x81,
- 0x8f, 0x94, 0xe0, 0x30,
- 0x91, 0xbe, 0x8d, 0xa4,
- 0x82, 0x08, 0x8b, 0x04,
- 0xe6, 0x55, 0x81, 0x8d,
- 0xc8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x84, 0x00, 0x44,
- 0x7c, 0x00, 0x0a, 0x03,
- 0xf0, 0x80, 0x58, 0x52,
- 0xe0, 0x90, 0x18, 0xc3,
- 0xfd, 0x01, 0x20, 0xc3,
- 0x80, 0xcd, 0x3c, 0x04,
- 0x97, 0x80, 0x18, 0xc4,
- 0x44, 0x04, 0x18, 0xc0,
- 0x86, 0x15, 0xa3, 0x1d,
- 0xe6, 0x8a, 0x44, 0xca,
- 0xe5, 0x0e, 0x58, 0x2a,
- 0x65, 0x8e, 0x44, 0x2a,
- 0x18, 0xc0, 0x81, 0x31,
- 0xc1, 0x00, 0x64, 0x01,
- 0x72, 0x8c, 0x44, 0x22,
- 0xde, 0x27, 0xe3, 0xc7,
- 0x02, 0xcd, 0xa4, 0xcf,
- 0x80, 0xf5, 0x93, 0x11,
- 0x0a, 0x29, 0x88, 0x53,
- 0xe2, 0x2d, 0xe1, 0xe0,
- 0x8b, 0x11, 0x80, 0x55,
- 0x40, 0x11, 0x88, 0x03,
- 0xdd, 0x93, 0xe3, 0x90,
- 0x18, 0x24, 0x42, 0x5a,
- 0x98, 0x33, 0xe0, 0x88,
- 0xe0, 0x30, 0x06, 0x35,
- 0xc3, 0x5d, 0xc6, 0x57,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0x94, 0x4a, 0x12,
- 0x82, 0x15, 0xcb, 0x3d,
- 0xe0, 0x10, 0x00, 0x0b,
- 0x82, 0x03, 0xc6, 0x07,
- 0x5c, 0x08, 0xc0, 0x3d,
- 0x04, 0x43, 0x9a, 0x00,
- 0x48, 0x01, 0x85, 0x01,
- 0xdd, 0x93, 0xe3, 0x90,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x30, 0x1e, 0xf0,
- 0x1e, 0x25, 0x9b, 0x2e,
- 0xb7, 0xc4, 0xe0, 0x88,
- 0x99, 0x41, 0x1d, 0x4e,
- 0x1e, 0x25, 0x95, 0x2e,
- 0x0c, 0xc0, 0x60, 0x84,
- 0xb5, 0xb4, 0xe7, 0x90,
- 0x1e, 0x25, 0x97, 0x2e,
- 0x99, 0x2e, 0xe0, 0x80,
- 0xa3, 0x2e, 0xbf, 0x24,
- 0x91, 0x2e, 0xbd, 0x24,
- 0x93, 0x2e, 0xbb, 0x24,
- 0x0f, 0x2e, 0xb9, 0x24,
- 0x81, 0x45, 0x81, 0x21,
- 0x08, 0x40, 0x59, 0x26,
- 0xa1, 0x4b, 0xec, 0x04,
- 0x1f, 0x1e, 0xfe, 0x95,
- 0xe5, 0x80, 0x0a, 0x50,
- 0x60, 0x00, 0x4f, 0x06,
- 0xe0, 0x08, 0x11, 0x06,
- 0x81, 0x91, 0x21, 0x3e,
- 0x16, 0x15, 0x87, 0xd5,
- 0x02, 0x0a, 0xfc, 0x1c,
- 0xc7, 0xff, 0x63, 0xfd,
- 0x48, 0xc2, 0x8c, 0x65,
- 0x8d, 0x11, 0x70, 0xa4,
- 0xe3, 0x90, 0x48, 0x11,
- 0xa1, 0x1b, 0x80, 0x1a,
- 0x94, 0x24, 0x80, 0xe5,
- 0x02, 0x86, 0xc3, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x82, 0x1a, 0xc3, 0x90,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x70, 0x9c, 0x44, 0xc2,
- 0x04, 0x25, 0xce, 0x17,
- 0xc2, 0x2d, 0xe0, 0x30,
- 0xc0, 0x00, 0x02, 0x36,
- 0xc3, 0x90, 0x48, 0x11,
- 0xc0, 0x1a, 0xa5, 0x5e,
- 0x82, 0x05, 0xa1, 0x1b,
- 0xfc, 0x20, 0x18, 0x2b,
- 0x02, 0x36, 0xc2, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x23, 0x14, 0xc3, 0x90,
- 0x16, 0x3b, 0x92, 0x2b,
- 0x00, 0x6b, 0x98, 0x4b,
- 0x78, 0x78, 0x98, 0xab,
- 0x21, 0x34, 0xef, 0xfc,
- 0x25, 0x54, 0x94, 0xcb,
- 0x02, 0x91, 0x8c, 0x0b,
- 0x08, 0x71, 0x88, 0x51,
- 0x8e, 0x18, 0x84, 0x81,
- 0xf0, 0x55, 0x83, 0x9d,
- 0x02, 0x29, 0x9f, 0x14,
- 0x04, 0x0a, 0xe0, 0x34,
- 0x84, 0x85, 0xe3, 0xfc,
- 0x98, 0x5b, 0x15, 0x24,
- 0x0d, 0x2e, 0x9d, 0x44,
- 0x8b, 0x2e, 0x89, 0x21,
- 0x89, 0x2e, 0x97, 0x24,
- 0xfe, 0x2e, 0x8f, 0x24,
- 0xfc, 0x2e, 0x99, 0x24,
- 0xbe, 0x2e, 0x91, 0x24,
- 0xbc, 0x2e, 0x93, 0x24,
- 0x40, 0x98, 0x9b, 0x24,
- 0x01, 0x01, 0xe8, 0x00,
- 0xe5, 0x30, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x00, 0x1e, 0xf0,
- 0x84, 0x8b, 0x7c, 0x0e,
- 0x95, 0x5e, 0xbb, 0x04,
- 0x11, 0x0e, 0xfe, 0x4e,
- 0xb7, 0x04, 0xa3, 0x0b,
- 0xb3, 0x04, 0xbe, 0x0e,
- 0xb1, 0x04, 0x8b, 0x0e,
- 0x8e, 0x28, 0x89, 0x0e,
- 0x86, 0x75, 0x97, 0x2e,
- 0x81, 0x71, 0x03, 0x65,
- 0x8e, 0x03, 0x95, 0x04,
- 0xe3, 0x90, 0x00, 0x09,
- 0x82, 0xd5, 0xad, 0x0b,
- 0x8e, 0x4b, 0x7c, 0x04,
- 0x8b, 0x34, 0x89, 0x24,
- 0xe0, 0x20, 0x00, 0x13,
- 0xfe, 0x54, 0x95, 0x04,
- 0xbe, 0x04, 0xbc, 0x0e,
- 0xef, 0xfc, 0x70, 0x68,
- 0x82, 0x71, 0x97, 0x24,
- 0xfa, 0x75, 0x8f, 0x2b,
- 0xe0, 0x00, 0x39, 0x98,
- 0xe0, 0x30, 0x02, 0x09,
- 0xb5, 0xb4, 0x95, 0x14,
- 0xa1, 0x0b, 0x1f, 0x0e,
- 0x02, 0x10, 0x15, 0x01,
- 0x1d, 0x0e, 0xe7, 0x90,
- 0xc0, 0x00, 0x00, 0x46,
- 0xc0, 0x38, 0x5e, 0x05,
- 0x9b, 0x0e, 0xbd, 0x04,
- 0x81, 0xa5, 0xb9, 0x04,
- 0x04, 0x20, 0x04, 0x38,
- 0xad, 0x3b, 0xec, 0x04,
- 0x80, 0x38, 0x1e, 0x35,
- 0x00, 0x00, 0x42, 0x31,
- 0xa1, 0x2b, 0x82, 0x11,
- 0x09, 0x94, 0xfc, 0xd5,
- 0xe2, 0x00, 0x00, 0x2a,
- 0x81, 0xa1, 0x0b, 0x74,
- 0x60, 0x08, 0x0d, 0x06,
- 0x40, 0x0a, 0x81, 0x31,
- 0x96, 0x2b, 0x66, 0xa6,
- 0x40, 0x09, 0x0c, 0x06,
- 0x42, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe5, 0x1e,
- 0x02, 0x10, 0xe5, 0x9e,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0xa8, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x17,
- 0x81, 0x11, 0x22, 0x0f,
- 0xef, 0xd8, 0x53, 0x28,
- 0x66, 0xa6, 0x44, 0x6a,
- 0x64, 0x00, 0x00, 0x00,
- 0x42, 0x12, 0xc1, 0x00,
- 0xe3, 0x07, 0x72, 0xa8,
- 0x65, 0x1e, 0x46, 0x2a,
- 0x44, 0x2a, 0xde, 0x17,
- 0x4c, 0x02, 0x65, 0x9e,
- 0x06, 0x30, 0xf9, 0x84,
- 0x40, 0x08, 0x64, 0x01,
- 0x40, 0x22, 0x81, 0x11,
- 0xd9, 0x37, 0x72, 0xa8,
- 0x96, 0x2b, 0x68, 0x07,
- 0x81, 0x31, 0x26, 0x0f,
- 0xef, 0xd8, 0x51, 0x68,
- 0x00, 0x00, 0x17, 0x34,
- 0xc1, 0x00, 0x64, 0x01,
- 0x42, 0x12, 0x1b, 0x44,
- 0x5e, 0x17, 0xf2, 0xa8,
- 0x04, 0x34, 0xe3, 0x07,
- 0xa2, 0x0f, 0x60, 0x88,
- 0xa6, 0x1b, 0x08, 0x23,
- 0x64, 0x01, 0x06, 0x40,
- 0x04, 0x20, 0x40, 0x09,
- 0xc0, 0x09, 0x64, 0x01,
- 0x60, 0x08, 0x48, 0x86,
- 0x11, 0xb4, 0x81, 0x51,
- 0x85, 0x25, 0x81, 0xc1,
- 0xa9, 0xbb, 0x15, 0xa4,
- 0xfc, 0x10, 0x14, 0x73,
- 0x14, 0x95, 0x8c, 0x7e,
- 0x46, 0x95, 0xfc, 0x14,
- 0x52, 0xa2, 0x60, 0xc0,
- 0x12, 0xa9, 0xf1, 0xb0,
- 0x46, 0xa5, 0xe3, 0x90,
- 0x82, 0x95, 0xe1, 0x80,
- 0x88, 0x7e, 0x8c, 0x73,
- 0x0e, 0x75, 0x95, 0x74,
- 0x44, 0x75, 0xfc, 0x14,
- 0x12, 0x79, 0xe0, 0xc0,
- 0x44, 0x75, 0xe3, 0x90,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x41, 0x6c, 0x04,
- 0x88, 0x31, 0x08, 0x21,
- 0x99, 0x1b, 0x88, 0x51,
- 0x1f, 0x24, 0xf6, 0xd5,
- 0x1b, 0x44, 0x81, 0x51,
- 0x91, 0xb4, 0x81, 0xc1,
- 0x60, 0x88, 0x06, 0x24,
- 0x19, 0x3e, 0xa4, 0x1b,
- 0x0f, 0x3e, 0x88, 0x33,
- 0xe5, 0xe0, 0x04, 0x80,
- 0x65, 0x81, 0x06, 0x30,
- 0x08, 0x40, 0x40, 0x09,
- 0xc0, 0x0a, 0x67, 0x81,
- 0x08, 0x62, 0x85, 0x15,
- 0xf0, 0x94, 0x52, 0x42,
- 0x52, 0x65, 0xa9, 0xbb,
- 0x10, 0x75, 0xf9, 0x80,
- 0x52, 0x75, 0xfc, 0x14,
- 0x4e, 0x82, 0x78, 0xc0,
- 0x0e, 0xa9, 0xf1, 0xb0,
- 0xa4, 0xae, 0xe2, 0x40,
- 0x00, 0x63, 0x82, 0xb5,
- 0xf0, 0x94, 0x52, 0x32,
- 0x10, 0x65, 0xa4, 0x6e,
- 0x52, 0x65, 0xfc, 0x14,
- 0x0e, 0x69, 0xe0, 0xc0,
- 0x52, 0x65, 0xe2, 0x40,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x21, 0x6c, 0x04,
- 0x99, 0x1b, 0x88, 0x51,
- 0x11, 0x04, 0xf6, 0xf5,
- 0x17, 0x54, 0xff, 0x81,
- 0x9f, 0x14, 0x81, 0x41,
- 0x00, 0x4a, 0x1b, 0x34,
- 0x00, 0x0c, 0xe0, 0x0c,
- 0x04, 0x54, 0xe2, 0x00,
- 0x00, 0x14, 0x68, 0x80,
- 0x42, 0x0a, 0xe8, 0x80,
- 0x81, 0x35, 0xe6, 0x8a,
- 0x82, 0x41, 0x4d, 0x8e,
- 0xfe, 0xb5, 0x83, 0x4d,
- 0x0e, 0x04, 0x1b, 0x14,
- 0x81, 0x41, 0xe0, 0x88,
- 0x65, 0x81, 0x06, 0x10,
- 0x93, 0x3e, 0xc0, 0x09,
- 0x1b, 0xc4, 0x85, 0x95,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x82, 0x9b, 0x13, 0x64,
- 0x8a, 0xc3, 0x9f, 0xa4,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x91, 0x14, 0xf4, 0xf5,
- 0x0a, 0x48, 0xa9, 0x1b,
- 0x03, 0x68, 0xc0, 0x00,
- 0xc0, 0x00, 0x40, 0x01,
- 0x66, 0x96, 0x42, 0x0a,
- 0x9b, 0x34, 0x81, 0x41,
- 0x05, 0xb5, 0xc4, 0x17,
- 0x1b, 0x54, 0x86, 0x13,
- 0xf0, 0x94, 0x46, 0x42,
- 0xc4, 0x37, 0x13, 0x64,
- 0x82, 0x9b, 0x1f, 0xa4,
- 0x0a, 0x30, 0x8a, 0x33,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0x30,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0x3b, 0x94, 0x34,
- 0x0c, 0x35, 0x82, 0xe5,
- 0xa1, 0x3b, 0xe1, 0x80,
- 0xb0, 0x34, 0x82, 0x65,
- 0xb6, 0x33, 0x98, 0xb4,
- 0xf0, 0x80, 0x16, 0x34,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xd5, 0x8b, 0x4b,
- 0x1b, 0x14, 0x87, 0x45,
- 0x99, 0x34, 0x81, 0x41,
- 0x06, 0x10, 0x86, 0x13,
- 0xc0, 0x09, 0x65, 0x81,
- 0x85, 0x95, 0x93, 0x3e,
- 0x0a, 0x44, 0x1b, 0xc4,
- 0x13, 0x64, 0xe0, 0x88,
- 0x9f, 0xa4, 0x82, 0x9b,
- 0x0a, 0xc0, 0x8a, 0xc3,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0xc0,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0xbb, 0x94, 0xb4,
- 0x0c, 0xb5, 0x82, 0xe5,
- 0xa1, 0xbb, 0xe1, 0x80,
- 0xb0, 0xb4, 0x82, 0x65,
- 0xa6, 0xb3, 0x98, 0x34,
- 0xf0, 0x80, 0x16, 0xb4,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xf5, 0x8b, 0x4b,
- 0x42, 0x0a, 0x9f, 0x34,
- 0x99, 0x44, 0xe6, 0x96,
- 0x86, 0x13, 0x1b, 0x34,
- 0x06, 0x13, 0xc4, 0x17,
- 0x06, 0x30, 0x88, 0x33,
- 0x40, 0x09, 0x65, 0x81,
- 0x93, 0x3e, 0x81, 0x41,
- 0x1b, 0xc4, 0x85, 0x95,
- 0x13, 0x64, 0x88, 0x53,
- 0x1f, 0xa4, 0xc4, 0x57,
- 0x8a, 0xc3, 0x82, 0x9b,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x1b, 0x94, 0xf4, 0xf5,
- 0x8d, 0x05, 0x81, 0x41,
- 0x66, 0x82, 0x42, 0x4a,
- 0x7f, 0xfc, 0x55, 0xfe,
- 0x13, 0x9e, 0xdf, 0xff,
- 0x0d, 0x1e, 0x92, 0x3b,
- 0x59, 0xfe, 0xff, 0x51,
- 0x5f, 0xff, 0x7f, 0xfd,
- 0x03, 0x85, 0xff, 0x61,
- 0x8c, 0x14, 0x81, 0x91,
- 0x84, 0x05, 0x91, 0x1b,
- 0x4a, 0x60, 0x95, 0x1d,
- 0x58, 0xa0, 0x5c, 0x00,
- 0x02, 0x75, 0xdc, 0x00,
- 0xdc, 0x00, 0x4c, 0x90,
- 0x92, 0xbb, 0x19, 0x1d,
- 0x1c, 0x00, 0x56, 0x50,
- 0xfb, 0x30, 0x58, 0x12,
- 0x94, 0x1b, 0x96, 0x5b,
- 0x88, 0x31, 0x02, 0x91,
- 0x81, 0x9d, 0x82, 0xab,
- 0x13, 0x94, 0xfa, 0x35,
- 0x8c, 0x85, 0x91, 0x5b,
- 0xf1, 0xa8, 0x42, 0xc2,
- 0xe1, 0xdc, 0x03, 0x0a,
- 0x58, 0xa0, 0x08, 0x55,
- 0x1b, 0x94, 0xdc, 0x00,
- 0xe0, 0x88, 0x02, 0x44,
- 0x60, 0x88, 0x06, 0x64,
- 0xe0, 0x88, 0x16, 0x54,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x0c, 0x12, 0x35,
- 0xe9, 0xc0, 0x02, 0x15,
- 0xfc, 0x2c, 0x12, 0x95,
- 0xf1, 0x8c, 0x46, 0x12,
- 0x06, 0x34, 0x32, 0x13,
- 0x13, 0x94, 0xf0, 0x80,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4a, 0x60, 0x87, 0x1d,
- 0x58, 0xa0, 0x1c, 0x00,
- 0x8a, 0x6b, 0x9c, 0x00,
- 0x81, 0x31, 0x12, 0x1b,
- 0x45, 0x8e, 0x81, 0x35,
- 0x81, 0x3d, 0x82, 0x31,
- 0x8d, 0x14, 0xfe, 0xb5,
- 0x82, 0x63, 0x1b, 0x14,
- 0x82, 0x63, 0xc4, 0x67,
- 0x02, 0x41, 0x98, 0xce,
- 0x85, 0x4d, 0x8e, 0x93,
- 0x1b, 0x34, 0xe8, 0x15,
- 0x8d, 0x35, 0x81, 0x91,
- 0x43, 0xfe, 0x13, 0x9e,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0xff, 0x41, 0x06, 0xbb,
- 0x7f, 0xfd, 0x4b, 0xfe,
- 0xff, 0xc1, 0x5f, 0xff,
- 0x81, 0x91, 0x03, 0x85,
- 0x91, 0xab, 0xac, 0xa4,
- 0x83, 0xad, 0x84, 0x05,
- 0x5c, 0x00, 0x48, 0xc0,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x58, 0x90, 0x02, 0x75,
- 0x0b, 0xad, 0xdc, 0x00,
- 0x4c, 0x40, 0x92, 0x6b,
- 0x4a, 0xa2, 0x1c, 0x00,
- 0x8c, 0x4b, 0xfb, 0x14,
- 0x02, 0x91, 0x82, 0xab,
- 0x94, 0x1b, 0x8e, 0xb3,
- 0xfa, 0x35, 0x85, 0x9d,
- 0x91, 0x4b, 0x13, 0x94,
- 0x4c, 0x52, 0x8e, 0x45,
- 0x0d, 0x0a, 0xf1, 0x84,
- 0x08, 0x55, 0xe1, 0xdc,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x0c, 0x94, 0x1b, 0xa4,
- 0x12, 0xc4, 0xe0, 0x88,
- 0x16, 0x44, 0x60, 0x88,
- 0x14, 0x63, 0xe0, 0x88,
- 0x67, 0x01, 0x14, 0xa0,
- 0x14, 0x95, 0xc0, 0x09,
- 0x0c, 0x65, 0xfc, 0x24,
- 0x14, 0xa5, 0xea, 0x20,
- 0x52, 0x62, 0xfc, 0x2c,
- 0x34, 0x63, 0xf1, 0xa4,
- 0xf0, 0x80, 0x12, 0x94,
- 0xf0, 0x80, 0x0c, 0x64,
- 0x93, 0x6d, 0x13, 0x94,
- 0x1c, 0x00, 0x48, 0xc0,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x01, 0x11, 0x88, 0xcb,
- 0x85, 0x6d, 0x81, 0x61,
- 0x50, 0x84, 0x48, 0x32,
- 0xc4, 0x04, 0x0c, 0x60,
- 0x40, 0x00, 0x48, 0x85,
- 0xd0, 0x9c, 0x42, 0x12,
- 0x42, 0xca, 0xfc, 0xf5,
- 0x9b, 0x44, 0xe6, 0x82,
- 0xc4, 0x17, 0x92, 0x13,
- 0x84, 0x5e, 0x88, 0x13,
- 0x88, 0x31, 0x02, 0x91,
- 0xe6, 0xb5, 0x81, 0x9d,
- 0x02, 0x2a, 0x91, 0x14,
- 0x0c, 0x28, 0xe0, 0x10,
- 0xc0, 0x00, 0x40, 0x01,
- 0xff, 0x31, 0x1b, 0x64,
- 0x81, 0xc1, 0x7f, 0x41,
- 0x13, 0x6e, 0x8b, 0x75,
- 0x7f, 0xb1, 0x8c, 0x5b,
- 0x03, 0x45, 0xff, 0x61,
- 0x8a, 0x9b, 0x81, 0x11,
- 0xfe, 0x1c, 0x12, 0xa5,
- 0x19, 0xa4, 0x91, 0xab,
- 0xdc, 0x00, 0x46, 0xa0,
- 0xdc, 0x00, 0x56, 0x10,
- 0xfc, 0x28, 0x0a, 0x55,
- 0x48, 0x50, 0x91, 0x5b,
- 0x4c, 0x10, 0x5c, 0x00,
- 0x02, 0x11, 0xdc, 0x00,
- 0x85, 0x1d, 0x92, 0x5b,
- 0x91, 0xbb, 0x80, 0xa5,
- 0x91, 0x6b, 0xfa, 0x65,
- 0x91, 0xbb, 0xfa, 0x25,
- 0x91, 0x6b, 0x8c, 0x85,
- 0x42, 0x32, 0x8c, 0x45,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0x95, 0xe1, 0xdc,
- 0x02, 0xc4, 0x1b, 0x94,
- 0x0a, 0xb4, 0xe0, 0x88,
- 0x14, 0x64, 0x60, 0x88,
- 0x12, 0x13, 0xe0, 0x88,
- 0x67, 0x01, 0x12, 0x90,
- 0x12, 0x55, 0xc0, 0x09,
- 0x02, 0x15, 0xfc, 0x14,
- 0x12, 0x95, 0xea, 0x20,
- 0x4a, 0x12, 0xfc, 0x28,
- 0x32, 0x13, 0xf1, 0x94,
- 0xf0, 0x80, 0x0a, 0x54,
- 0xf0, 0x80, 0x02, 0x14,
- 0x80, 0x95, 0x83, 0x5d,
- 0x89, 0x3d, 0x81, 0x85,
- 0x9f, 0x14, 0x80, 0xc5,
- 0xe6, 0x82, 0x4a, 0x6a,
- 0x98, 0x13, 0x01, 0x55,
- 0x66, 0x82, 0x42, 0xba,
- 0x1b, 0x54, 0x98, 0x5b,
- 0xc4, 0x17, 0x8a, 0x13,
- 0x84, 0x8e, 0x8a, 0x13,
- 0x82, 0xc1, 0x13, 0x64,
- 0x9f, 0x54, 0x88, 0x61,
- 0x8b, 0xcb, 0x97, 0x14,
- 0x42, 0x0a, 0xe8, 0xf5,
- 0x81, 0x51, 0x66, 0x86,
- 0xc4, 0x17, 0x9b, 0x24,
- 0x54, 0x22, 0x0b, 0x85,
- 0x19, 0x2e, 0xf0, 0x84,
- 0x14, 0x1b, 0x84, 0xbb,
- 0x7f, 0xc1, 0xff, 0x21,
- 0x81, 0xe5, 0x81, 0x61,
- 0x91, 0x9b, 0xed, 0x94,
- 0x46, 0x90, 0x45, 0x94,
- 0x44, 0x60, 0xdc, 0x00,
- 0x91, 0x9b, 0xdc, 0x00,
- 0x5c, 0x00, 0x58, 0x60,
- 0xdc, 0x00, 0x48, 0x90,
- 0x81, 0x6d, 0x82, 0x61,
- 0x91, 0x2b, 0x80, 0xa5,
- 0x91, 0xcb, 0xfc, 0x05,
- 0x91, 0x2b, 0xfa, 0xc5,
- 0x91, 0xcb, 0x8c, 0xc5,
- 0x42, 0x32, 0x8c, 0x85,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0xd5, 0xe1, 0xdc,
- 0x02, 0x54, 0x1b, 0x94,
- 0x14, 0xbb, 0xe0, 0x88,
- 0xe0, 0x88, 0x0c, 0x24,
- 0xe0, 0x88, 0x14, 0xc4,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x18, 0x12, 0x65,
- 0xe9, 0xc0, 0x02, 0x15,
- 0x7c, 0x28, 0x12, 0x95,
- 0x4c, 0x12, 0x96, 0xab,
- 0x32, 0x13, 0xf1, 0x98,
- 0xf0, 0x80, 0x0c, 0x64,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4c, 0xca, 0x01, 0x55,
- 0x46, 0xca, 0xe0, 0x04,
- 0x17, 0x14, 0xe0, 0x10,
- 0xdc, 0x00, 0x58, 0x20,
- 0x02, 0x06, 0x9b, 0x24,
- 0x8a, 0x13, 0xc0, 0x00,
- 0xe6, 0x82, 0x42, 0x1a,
- 0xc4, 0x17, 0x98, 0x13,
- 0x84, 0x8e, 0x84, 0x13,
- 0x82, 0x51, 0x19, 0x24,
- 0x8e, 0x23, 0x8e, 0xa3,
- 0x83, 0x5b, 0x97, 0x14,
- 0x97, 0x24, 0xea, 0x35,
- 0x9b, 0xb4, 0x9f, 0x14,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0x00, 0x13, 0x8f, 0x34,
- 0x1d, 0x94, 0xc4, 0x07,
- 0x4c, 0xb2, 0xc4, 0x17,
- 0x80, 0xb3, 0x70, 0x84,
- 0x81, 0x11, 0x09, 0x15,
- 0x82, 0xab, 0x15, 0x04,
- 0x86, 0x2b, 0x0f, 0x3e,
- 0x8c, 0x4b, 0x16, 0x3b,
- 0x82, 0x03, 0x1b, 0x14,
- 0x67, 0x90, 0x00, 0x00,
- 0x81, 0x65, 0x81, 0x51,
- 0x88, 0x41, 0x02, 0x51,
- 0x88, 0x21, 0x08, 0x31,
- 0x9f, 0xc4, 0x88, 0x11,
- 0x88, 0x45, 0x99, 0x5d,
- 0x93, 0xcb, 0x80, 0xc8,
- 0x84, 0xc4, 0xfc, 0xd5,
- 0x84, 0x15, 0x91, 0xcb,
- 0x5f, 0xfd, 0x3f, 0x28,
- 0x88, 0xc4, 0xc3, 0xff,
- 0x80, 0xf5, 0x91, 0xcb,
- 0x91, 0xcb, 0x8c, 0xc4,
- 0x90, 0xc4, 0x80, 0x95,
- 0xf8, 0xe5, 0x91, 0xcb,
- 0x80, 0x16, 0x89, 0x11,
- 0x7c, 0x04, 0x81, 0xd5,
- 0x89, 0x24, 0x94, 0x4b,
- 0x00, 0x13, 0x8b, 0x34,
- 0x95, 0x04, 0xe0, 0x20,
- 0xbc, 0x0e, 0xfe, 0x54,
- 0x77, 0x58, 0xbe, 0x04,
- 0x1b, 0x04, 0xef, 0xf8,
- 0x0f, 0x34, 0x94, 0x1b,
- 0x17, 0x24, 0x82, 0x11,
- 0x0e, 0x03, 0x8e, 0x63,
- 0x1b, 0x0e, 0x8e, 0xb3,
- 0x85, 0x1b, 0x8e, 0x33,
- 0x1e, 0xf0, 0xf0, 0x15,
- 0x0c, 0x0c, 0xe5, 0x00,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0xab,
- 0x60, 0x94, 0x00, 0x34,
- 0xe1, 0x84, 0x02, 0xa4,
- 0x82, 0x03, 0x25, 0xc4,
- 0x60, 0x2a, 0x40, 0x0a,
- 0x29, 0x84, 0xa1, 0x71,
- 0x42, 0x02, 0x81, 0x61,
- 0x40, 0xc2, 0x7b, 0xb0,
- 0xa2, 0x73, 0xfa, 0x80,
- 0xf3, 0x98, 0x42, 0x62,
- 0x40, 0x12, 0x80, 0x73,
- 0xcb, 0x77, 0x72, 0x98,
- 0xe0, 0xec, 0x02, 0x04,
- 0x0e, 0x04, 0x2e, 0x1f,
- 0x0b, 0x1e, 0xe1, 0x94,
- 0xfa, 0x90, 0x40, 0x22,
- 0x44, 0x42, 0x2e, 0x1f,
- 0x21, 0x1b, 0xfb, 0x88,
- 0xef, 0xfc, 0x43, 0xf6,
- 0xa4, 0x03, 0x20, 0x1c,
- 0x73, 0x98, 0x42, 0x62,
- 0x80, 0x08, 0x4c, 0x96,
- 0x80, 0x00, 0x10, 0x18,
- 0x48, 0xaa, 0x9f, 0x24,
- 0x89, 0x7e, 0xe6, 0xaa,
- 0x06, 0x44, 0x06, 0x23,
- 0x3e, 0x5e, 0xe1, 0x84,
- 0x06, 0x23, 0xca, 0x27,
- 0x44, 0x2a, 0x82, 0x3b,
- 0x84, 0xc3, 0xe0, 0x12,
- 0xf2, 0x98, 0x44, 0x62,
- 0x4e, 0x22, 0xa0, 0xc1,
- 0xcb, 0xc7, 0x72, 0x98,
- 0x60, 0xec, 0x16, 0x74,
- 0x38, 0xbf, 0xcb, 0x77,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x56, 0xca, 0xc0, 0x3f,
- 0x80, 0x2b, 0x64, 0x08,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0xe1, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x57, 0xfe,
- 0x0e, 0x06, 0x40, 0x3f,
- 0x57, 0x58, 0xc0, 0x00,
- 0x04, 0x04, 0xef, 0xd4,
- 0xd0, 0x17, 0x61, 0xe0,
- 0x45, 0xfe, 0x24, 0x1f,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xff, 0xa1, 0x50, 0x07,
- 0x42, 0xca, 0x7c, 0x9e,
- 0x7e, 0x8e, 0xe4, 0x08,
- 0xe0, 0x08, 0x42, 0x1a,
- 0x40, 0x6a, 0x0b, 0x94,
- 0x09, 0x84, 0xe0, 0x28,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0x6d, 0x80, 0x42, 0x0a,
- 0x41, 0xfe, 0x92, 0x2b,
- 0x43, 0xfe, 0x5f, 0xfc,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x6f, 0xd4, 0x4b, 0xe8,
- 0x12, 0x2b, 0x90, 0x3b,
- 0x4b, 0x98, 0x90, 0x3b,
- 0x02, 0x3b, 0xef, 0xd4,
- 0x23, 0xa4, 0x80, 0x2b,
- 0xe0, 0x28, 0x44, 0x6a,
- 0x06, 0xca, 0x21, 0x84,
- 0x1d, 0x94, 0xe5, 0xfc,
- 0xe1, 0xfc, 0x06, 0x1a,
- 0x65, 0x80, 0x42, 0x0a,
- 0x42, 0x1a, 0x96, 0x0b,
- 0x8e, 0x1b, 0x61, 0x88,
- 0xed, 0x80, 0x42, 0x0a,
- 0x5f, 0xfc, 0x45, 0xfe,
- 0xc0, 0x04, 0x47, 0xf6,
- 0xef, 0xd4, 0x53, 0x68,
- 0x47, 0xfe, 0x3e, 0x24,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x89, 0xb4, 0xa7, 0x74,
- 0x44, 0x62, 0x84, 0x93,
- 0x7e, 0x84, 0xf2, 0x98,
- 0x44, 0x22, 0x90, 0x93,
- 0x7c, 0x94, 0xf2, 0x98,
- 0x44, 0x22, 0x92, 0xa3,
- 0x54, 0xca, 0x72, 0x98,
- 0x04, 0x1a, 0xe4, 0x0c,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x04, 0x06, 0xe1, 0x80,
- 0x55, 0xfe, 0x40, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x61, 0xe0, 0x06, 0xa4,
- 0x50, 0xa7, 0xd0, 0x27,
- 0x14, 0x03, 0xa6, 0x2f,
- 0x42, 0x12, 0xff, 0xa1,
- 0x45, 0xfe, 0x72, 0x88,
- 0xdf, 0xff, 0x7f, 0xfc,
- 0x64, 0x08, 0x42, 0xca,
- 0x42, 0x1a, 0x84, 0x71,
- 0xc7, 0x77, 0x60, 0x08,
- 0xe0, 0x28, 0x40, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0xa1, 0x1b, 0xdf, 0xfc,
- 0x0b, 0x24, 0x82, 0x45,
- 0x45, 0xf8, 0x96, 0x3b,
- 0x01, 0x31, 0xef, 0xd4,
- 0x4f, 0x18, 0x8e, 0x2b,
- 0x81, 0x95, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4e, 0xc8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x45, 0x28,
- 0x43, 0xfe, 0xa1, 0x1d,
- 0x5f, 0xff, 0x1f, 0xfd,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x44, 0x68,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x01, 0x31, 0xc5, 0x17,
- 0x4d, 0x38, 0x8e, 0x2b,
- 0x81, 0xe5, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4c, 0xe8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x43, 0x48,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x21, 0x1d, 0xc5, 0x17,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x04, 0x14, 0xc7, 0xff,
- 0xff, 0x31, 0x01, 0x88,
- 0x01, 0x88, 0x00, 0x04,
- 0x80, 0xf8, 0x02, 0x14,
- 0x19, 0x84, 0x46, 0x02,
- 0x46, 0x5a, 0xa1, 0x2b,
- 0x40, 0x9a, 0x60, 0x28,
- 0x40, 0x0a, 0xe5, 0x26,
- 0x47, 0xfe, 0xe1, 0x84,
- 0x04, 0x06, 0x5f, 0xfc,
- 0x00, 0x33, 0xc0, 0x00,
- 0xe5, 0xa6, 0x40, 0x9a,
- 0x40, 0x22, 0x95, 0x3b,
- 0x47, 0xfe, 0x72, 0x80,
- 0xa1, 0x0b, 0x9f, 0xfc,
- 0xdf, 0xfc, 0x47, 0xfe,
- 0xf0, 0x0a, 0x40, 0x3a,
- 0x0c, 0x0b, 0xa0, 0x0c,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x81, 0x41, 0x01, 0xb5,
- 0x82, 0x41, 0x49, 0x54,
- 0x98, 0x5d, 0xc5, 0xc4,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0xb0, 0x4a, 0x52,
- 0x81, 0x4d, 0xcd, 0x5e,
- 0x5d, 0x93, 0xfc, 0xd5,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x67, 0x90, 0x0a, 0x30,
- 0xe6, 0xa0, 0x18, 0x30,
- 0x81, 0x61, 0x0f, 0x4e,
- 0x48, 0x06, 0x08, 0x8b,
- 0x03, 0xa5, 0xe0, 0x24,
- 0x20, 0x66, 0x80, 0x9b,
- 0x18, 0xa3, 0xa5, 0x1b,
- 0x16, 0x0e, 0x40, 0x00,
- 0x14, 0x78, 0xd0, 0x00,
- 0x00, 0x01, 0x16, 0x06,
- 0x06, 0xa5, 0x90, 0x00,
- 0xf2, 0x7d, 0x00, 0x00,
- 0x48, 0x4a, 0x80, 0xb5,
- 0x54, 0xa2, 0xe4, 0x9c,
- 0x65, 0xae, 0x90, 0xac,
- 0x08, 0x31, 0x82, 0x61,
- 0x04, 0xc1, 0x82, 0x51,
- 0x8a, 0xa8, 0x82, 0x81,
- 0xf8, 0xd5, 0x95, 0x6d,
- 0x88, 0xd5, 0xe5, 0xad,
- 0x82, 0x41, 0x8f, 0x44,
- 0x88, 0x5b, 0x03, 0x31,
- 0x81, 0xc1, 0x03, 0xb5,
- 0x78, 0x04, 0x0a, 0x69,
- 0x94, 0x78, 0xa5, 0x1b,
- 0xe0, 0x88, 0x10, 0x64,
- 0x7c, 0x20, 0x00, 0x85,
- 0xe0, 0x88, 0x12, 0x74,
- 0xfc, 0x24, 0x00, 0x95,
- 0x93, 0x8d, 0x80, 0x95,
- 0x81, 0x75, 0x80, 0x95,
- 0x80, 0xa5, 0x92, 0x8d,
- 0x78, 0x04, 0x4a, 0x71,
- 0x94, 0x66, 0x83, 0xc1,
- 0x82, 0x31, 0x0a, 0xa8,
- 0x0c, 0xa4, 0x82, 0x51,
- 0x8d, 0x3d, 0xfa, 0x80,
- 0xa3, 0xcd, 0xf8, 0x95,
- 0x81, 0x01, 0xf6, 0xc5,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x90, 0x1e, 0xf0,
- 0xe0, 0x84, 0x1e, 0x75,
- 0xa7, 0x4e, 0x9d, 0x5e,
- 0xaf, 0x2e, 0xa1, 0x3e,
- 0x9e, 0x14, 0xa9, 0x1e,
- 0xe0, 0x20, 0x0e, 0x05,
- 0xe0, 0x8c, 0x1e, 0x85,
- 0xe0, 0x88, 0x1e, 0x65,
- 0xe0, 0x80, 0x1e, 0xa5,
- 0x82, 0x0b, 0x25, 0x0e,
- 0x47, 0xf8, 0xad, 0x1e,
- 0x1f, 0x0e, 0xe8, 0x14,
- 0x0e, 0x05, 0x83, 0xc1,
- 0x4c, 0x05, 0xe0, 0x18,
- 0x0e, 0x09, 0xeb, 0x54,
- 0xdc, 0x34, 0xe0, 0x58,
- 0x00, 0x60, 0x31, 0x0e,
- 0xc0, 0x0b, 0x65, 0x41,
- 0x9e, 0x48, 0xab, 0x0e,
- 0xe0, 0x20, 0x0e, 0x1b,
- 0x5c, 0x58, 0x9c, 0x28,
- 0x4c, 0x35, 0xa9, 0xcf,
- 0x4c, 0x21, 0xeb, 0x50,
- 0xc0, 0x02, 0x6d, 0x69,
- 0x04, 0xc4, 0x1e, 0x04,
- 0x4c, 0x13, 0xe8, 0x94,
- 0xc0, 0x01, 0x66, 0xb1,
- 0x6d, 0x6d, 0x4c, 0x41,
- 0x4c, 0x51, 0xc0, 0x02,
- 0xc0, 0x02, 0x6d, 0x71,
- 0xe8, 0x14, 0x4b, 0x28,
- 0x60, 0x18, 0x0e, 0x05,
- 0x0e, 0x29, 0x80, 0x9b,
- 0x90, 0xbb, 0x60, 0x4c,
- 0xf0, 0x14, 0x56, 0x05,
- 0xe0, 0x48, 0x0e, 0x09,
- 0x14, 0x19, 0x9b, 0xae,
- 0x81, 0xa1, 0x60, 0x34,
- 0xe0, 0x90, 0x0e, 0x39,
- 0xe0, 0x94, 0x0e, 0x49,
- 0x78, 0x18, 0x56, 0x01,
- 0xe7, 0xf4, 0x03, 0x0a,
- 0x78, 0x10, 0x56, 0x31,
- 0x00, 0x10, 0x81, 0x01,
- 0x02, 0x70, 0x04, 0x04,
- 0x56, 0x41, 0xe4, 0x60,
- 0x90, 0x4b, 0x78, 0x0c,
- 0xf8, 0x14, 0x56, 0x21,
- 0xe0, 0x1c, 0x0e, 0x35,
- 0x50, 0x01, 0xa3, 0x1e,
- 0x99, 0x01, 0x60, 0x48,
- 0x50, 0xa1, 0xac, 0x06,
- 0x50, 0xa1, 0xe0, 0x54,
- 0xab, 0x04, 0xe0, 0x58,
- 0xb1, 0x24, 0xad, 0x14,
- 0xef, 0xe0, 0x74, 0x68,
- 0x8d, 0x51, 0x21, 0x0b,
- 0x2f, 0xc4, 0x90, 0xa5,
- 0xb1, 0x14, 0x80, 0xab,
- 0x64, 0x01, 0x00, 0x60,
- 0x04, 0x70, 0x40, 0x09,
- 0x01, 0x65, 0xe4, 0xa0,
- 0x49, 0x44, 0x82, 0x3b,
- 0xec, 0x04, 0x06, 0x30,
- 0xa1, 0x3b, 0xc1, 0x4e,
- 0x1e, 0x05, 0xfe, 0x75,
- 0xa1, 0xab, 0x60, 0x90,
- 0x9d, 0x0e, 0x96, 0xd5,
- 0xe0, 0xa4, 0x18, 0x09,
- 0x12, 0xc5, 0xa1, 0x0b,
- 0x84, 0x60, 0x12, 0x80,
- 0x64, 0x60, 0x12, 0x80,
- 0xe4, 0x80, 0x02, 0xc0,
- 0x64, 0xe0, 0x04, 0xc0,
- 0xe5, 0xf0, 0x06, 0xc0,
- 0x64, 0x01, 0x00, 0x60,
- 0x08, 0x60, 0x40, 0x09,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0x01, 0x0a, 0x60,
- 0x18, 0x60, 0x40, 0x04,
- 0xc0, 0x06, 0x67, 0x01,
- 0x8d, 0xbe, 0x8f, 0x9e,
- 0x89, 0x5e, 0x8b, 0xce,
- 0xfc, 0x6e, 0xfe, 0x4e,
- 0xb1, 0x04, 0xbe, 0x0e,
- 0xa5, 0x54, 0xa7, 0x44,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xef, 0xe8, 0x72, 0x08,
- 0x80, 0xab, 0x31, 0x14,
- 0xa1, 0xab, 0x2f, 0xc4,
- 0x05, 0xe5, 0x88, 0xa5,
- 0xaf, 0xc4, 0x95, 0x51,
- 0xe0, 0x70, 0x18, 0x09,
- 0xee, 0x45, 0xa1, 0x0b,
- 0xe0, 0x74, 0x18, 0x09,
- 0x96, 0xf5, 0xa3, 0x0b,
- 0xa1, 0x14, 0xa3, 0x04,
- 0x00, 0x34, 0x9d, 0x24,
- 0xe4, 0x40, 0x00, 0xc0,
- 0xa0, 0x11, 0x46, 0x54,
- 0xfc, 0x2e, 0xfe, 0x6e,
- 0x3c, 0x1e, 0xbe, 0x0e,
- 0x29, 0x04, 0x92, 0x1b,
- 0x9f, 0x24, 0x98, 0x9b,
- 0x65, 0xb8, 0xb1, 0x44,
- 0x21, 0x0b, 0xef, 0xd8,
- 0x90, 0x85, 0x8f, 0x51,
- 0x92, 0xcb, 0x00, 0xab,
- 0x00, 0xc0, 0xf3, 0xd5,
- 0x96, 0x2b, 0x66, 0xf0,
- 0x6f, 0xe4, 0x43, 0xc8,
- 0x80, 0xab, 0x92, 0x3b,
- 0x82, 0x65, 0xa1, 0xab,
- 0x9d, 0x04, 0x97, 0x51,
- 0x1e, 0xf0, 0x00, 0xae,
- 0x02, 0x5e, 0xe5, 0x90,
- 0x0c, 0x0c, 0x94, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x02, 0x80, 0x27, 0x04,
- 0x04, 0x60, 0xe6, 0x70,
- 0x40, 0x09, 0x64, 0x01,
- 0x92, 0x4b, 0x96, 0x3b,
- 0xe0, 0x2c, 0x00, 0x59,
- 0xfe, 0x1e, 0xaf, 0x04,
- 0x31, 0x14, 0xa7, 0x1e,
- 0xfc, 0x6e, 0xa0, 0x01,
- 0x99, 0x2e, 0xbe, 0x2e,
- 0x8e, 0x1b, 0x3c, 0x1e,
- 0xa3, 0x24, 0x97, 0x0e,
- 0xef, 0xe0, 0x48, 0x08,
- 0x80, 0xab, 0x1d, 0x04,
- 0x99, 0x51, 0x21, 0xab,
- 0x23, 0x9e, 0xf6, 0x95,
- 0x64, 0xd1, 0x0e, 0x80,
- 0x2b, 0x04, 0xc0, 0x02,
- 0x2d, 0x14, 0x96, 0x2b,
- 0xa7, 0x34, 0x8e, 0x4b,
- 0xef, 0xe0, 0x6d, 0x48,
- 0xa1, 0xab, 0x80, 0xab,
- 0x79, 0xc5, 0x8a, 0xa5,
- 0x12, 0x09, 0x9d, 0x51,
- 0x92, 0xcb, 0x60, 0x70,
- 0xd6, 0x05, 0xa1, 0x0b,
- 0x60, 0x58, 0x0e, 0x09,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x02,
- 0x40, 0x04, 0x66, 0x01,
- 0x67, 0x01, 0x08, 0x60,
- 0x5b, 0x78, 0xc0, 0x06,
- 0x8c, 0x1b, 0x68, 0x10,
- 0x91, 0x51, 0x21, 0x0b,
- 0xaf, 0xc4, 0xd0, 0xb5,
- 0x18, 0x09, 0xb1, 0x14,
- 0xa1, 0x0b, 0xe0, 0x70,
- 0x02, 0x0b, 0xd0, 0x45,
- 0xe4, 0xa0, 0x04, 0x70,
- 0x64, 0x01, 0x06, 0x60,
- 0x8c, 0x1b, 0x40, 0x09,
- 0xef, 0xfc, 0x65, 0xe8,
- 0x80, 0xab, 0x31, 0x14,
- 0x93, 0x51, 0x2f, 0xc4,
- 0x2d, 0x7e, 0xe9, 0x15,
- 0x66, 0x31, 0x04, 0x80,
- 0xa5, 0x74, 0xc0, 0x01,
- 0xfc, 0x2e, 0x99, 0x94,
- 0x00, 0x70, 0x2b, 0x2e,
- 0x3e, 0x9e, 0xe4, 0x40,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x96, 0x2b, 0x77, 0x17,
- 0x82, 0x03, 0x23, 0x34,
- 0x0a, 0x04, 0x2f, 0x04,
- 0x15, 0x5e, 0xe1, 0x14,
- 0x31, 0x04, 0x8e, 0x4b,
- 0xe7, 0x00, 0x02, 0x00,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xe8, 0x04, 0x48, 0x08,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0a, 0xf6, 0x60, 0x35,
- 0x2f, 0x04, 0xc0, 0x00,
- 0xad, 0x24, 0x96, 0x3b,
- 0x00, 0x09, 0xa1, 0x14,
- 0x8f, 0x2e, 0xe3, 0x04,
- 0xb0, 0x11, 0x2b, 0x24,
- 0x8d, 0x2e, 0xa3, 0x44,
- 0x8b, 0x6e, 0xb1, 0x24,
- 0xfe, 0x2e, 0x89, 0x9e,
- 0x9f, 0x64, 0x95, 0x24,
- 0x3e, 0x7e, 0xfc, 0x2e,
- 0xbc, 0x0e, 0x8c, 0x5b,
- 0x97, 0x24, 0xa9, 0x04,
- 0xef, 0xe0, 0x4b, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0x46, 0x58, 0x75,
- 0x2f, 0x04, 0xc0, 0x00,
- 0x21, 0x74, 0x8c, 0x2b,
- 0xab, 0x64, 0x96, 0x3b,
- 0x00, 0x00, 0x2d, 0x94,
- 0x02, 0x70, 0xe7, 0x10,
- 0x8c, 0x4b, 0xe4, 0x40,
- 0x6f, 0xe0, 0x58, 0xe8,
- 0x00, 0xab, 0x92, 0x5b,
- 0x21, 0xab, 0x8e, 0x2b,
- 0x52, 0xd5, 0x92, 0x7b,
- 0xc0, 0x00, 0x0b, 0xc6,
- 0x08, 0x80, 0x2f, 0x04,
- 0xc0, 0x03, 0x64, 0x91,
- 0x64, 0x70, 0x02, 0x20,
- 0x16, 0x2b, 0x84, 0x9b,
- 0x25, 0x4e, 0x8e, 0x3b,
- 0xe7, 0x20, 0x00, 0x00,
- 0xef, 0xf4, 0x78, 0x28,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0xd6, 0x4e, 0x75,
- 0x12, 0x0b, 0xc0, 0x00,
- 0x25, 0x34, 0x96, 0x1b,
- 0x4c, 0xb8, 0x8e, 0x2b,
- 0x80, 0xab, 0xe8, 0x04,
- 0x4c, 0x15, 0xa1, 0xab,
- 0xc0, 0x00, 0x0b, 0xe6,
- 0x12, 0x15, 0xaf, 0x74,
- 0x12, 0x2b, 0xe0, 0x10,
- 0xa9, 0x94, 0xe0, 0x3c,
- 0x0e, 0x0b, 0xb1, 0x44,
- 0x0e, 0x39, 0xe1, 0x88,
- 0x91, 0x9e, 0xe3, 0x20,
- 0x8d, 0x2e, 0x8f, 0x4e,
- 0x9f, 0x14, 0x8b, 0x1e,
- 0x00, 0x70, 0x09, 0x0e,
- 0xa3, 0x44, 0xe7, 0x30,
- 0x9b, 0x14, 0xfe, 0x1e,
- 0xa5, 0x34, 0xfc, 0x3e,
- 0x04, 0x10, 0x27, 0x54,
- 0x3e, 0x3e, 0xe4, 0x40,
- 0xbc, 0x6e, 0x96, 0x3b,
- 0xef, 0xf8, 0x43, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x5f, 0xfc, 0x30, 0xb8,
- 0xc0, 0x00, 0x0b, 0xf6,
- 0x63, 0x80, 0x0e, 0x19,
- 0x64, 0x50, 0x08, 0x80,
- 0x12, 0x0b, 0xc0, 0x04,
- 0xa5, 0x34, 0x96, 0x2b,
- 0xef, 0xfc, 0x5c, 0x68,
- 0x4a, 0x06, 0x00, 0xab,
- 0xdf, 0xa5, 0xe0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xab, 0x19, 0x14,
- 0x84, 0x9b, 0x15, 0x74,
- 0x86, 0x6b, 0x3e, 0x5e,
- 0x88, 0xbb, 0x7c, 0x1e,
- 0x60, 0x40, 0x12, 0x89,
- 0x47, 0xf8, 0x94, 0x1b,
- 0x8e, 0x3b, 0x68, 0x00,
- 0xe0, 0x44, 0x12, 0x09,
- 0x82, 0xe5, 0xa6, 0x0d,
- 0x86, 0x65, 0xa9, 0x0b,
- 0x8c, 0x25, 0xad, 0x0b,
- 0xaf, 0x0b, 0x7c, 0xb4,
- 0x10, 0x0b, 0x9a, 0x15,
- 0x61, 0xf8, 0x8e, 0x1b,
- 0xa3, 0x0d, 0xef, 0xd8,
- 0x8d, 0x15, 0x8c, 0x25,
- 0x8e, 0x45, 0xa5, 0x0b,
- 0xa7, 0x0b, 0x7c, 0xb4,
- 0x02, 0x60, 0x96, 0x95,
- 0x90, 0x0b, 0x64, 0x20,
- 0x6f, 0xdc, 0x41, 0x08,
- 0xa3, 0x0d, 0x8e, 0x2b,
- 0x8b, 0x35, 0x82, 0x25,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xd8, 0x60, 0xa8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x92, 0x95,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x61, 0xa8,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x69, 0xb8, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x92, 0x1b, 0x14, 0x0b,
- 0x6f, 0xd8, 0x6d, 0x68,
- 0x87, 0xb5, 0x8c, 0x2b,
- 0x64, 0x20, 0x02, 0x60,
- 0x7e, 0xf8, 0x90, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xd8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x8c, 0x55,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x60, 0x08,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x6a, 0x78, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x0e, 0x09, 0x85, 0x65,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x84, 0xe5, 0xa1, 0x0b,
- 0x67, 0xfd, 0x0e, 0x15,
- 0x97, 0x04, 0xc0, 0x01,
- 0x6f, 0xc9, 0x0e, 0x29,
- 0x0e, 0x39, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x60, 0x09, 0x0e, 0x4b,
- 0xc2, 0x1e, 0xc0, 0x03,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x58, 0x56, 0x21,
- 0xe0, 0x5c, 0x56, 0x31,
- 0xe0, 0x30, 0x56, 0x43,
- 0x6f, 0xd8, 0x5b, 0x48,
- 0x7c, 0xb4, 0x8e, 0x0b,
- 0x80, 0xb5, 0xa3, 0x0d,
- 0x8e, 0x0b, 0x3e, 0x14,
- 0xef, 0xd8, 0x63, 0x48,
- 0x98, 0xf1, 0x01, 0x01,
- 0x40, 0x16, 0x2c, 0x0e,
- 0x2e, 0x0e, 0xe0, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x6b, 0x02, 0x8b,
- 0x86, 0x7b, 0x60, 0x28,
- 0xa0, 0x08, 0xa2, 0x18,
- 0xe8, 0x10, 0x62, 0x68,
- 0x60, 0x58, 0x10, 0x19,
- 0xa2, 0x04, 0x80, 0x2b,
- 0x66, 0x78, 0xe0, 0x34,
- 0xc8, 0x17, 0x68, 0x10,
- 0xe0, 0x44, 0x0c, 0x19,
- 0x9c, 0x55, 0xa5, 0x1b,
- 0x4e, 0x05, 0xe0, 0x14,
- 0xc0, 0x01, 0x67, 0xdd,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0x98, 0x34, 0x9a, 0x24,
- 0x67, 0xe1, 0x4e, 0x15,
- 0x0c, 0x19, 0xc0, 0x01,
- 0x4e, 0x03, 0xe0, 0x38,
- 0xc0, 0x02, 0x6f, 0xe1,
- 0xe0, 0x54, 0x0c, 0x09,
- 0x67, 0xe9, 0x4e, 0x25,
- 0x4e, 0x35, 0xc0, 0x01,
- 0xc0, 0x01, 0x67, 0xed,
- 0x6f, 0xc9, 0x4e, 0x11,
- 0xa1, 0x0b, 0x40, 0x05,
- 0x60, 0x3c, 0x0c, 0x19,
- 0x0c, 0x29, 0x81, 0x01,
- 0x0c, 0x39, 0xe0, 0x40,
- 0x4e, 0x11, 0xe0, 0x48,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x6f, 0xd1, 0x4e, 0x01,
- 0x4e, 0x21, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd5,
- 0x6f, 0xd9, 0x4e, 0x31,
- 0xb0, 0xa5, 0xc0, 0x05,
- 0x60, 0x51, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x01,
- 0xc0, 0x03, 0x64, 0x91,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x35,
- 0xf0, 0x88, 0x48, 0x12,
- 0x4e, 0x35, 0x84, 0x63,
- 0x40, 0x01, 0x67, 0xf9,
- 0xe0, 0x84, 0x06, 0x04,
- 0x60, 0x60, 0x08, 0x45,
- 0x06, 0x5b, 0x82, 0x33,
- 0x80, 0x13, 0x61, 0x20,
- 0x68, 0x01, 0x4e, 0x45,
- 0x83, 0x41, 0x40, 0x01,
- 0x60, 0x09, 0x4e, 0x53,
- 0x0c, 0x25, 0xc0, 0x03,
- 0x06, 0x3b, 0xe1, 0xbc,
- 0x4e, 0x41, 0xe1, 0x50,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x67, 0xfd, 0x4e, 0x25,
- 0x4e, 0x33, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x0d,
- 0xe3, 0x00, 0x02, 0x09,
- 0x60, 0x21, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x30,
- 0xc0, 0x06, 0x60, 0x25,
- 0xe3, 0x60, 0x02, 0x09,
- 0x60, 0x29, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x90,
- 0xc0, 0x06, 0x60, 0x2d,
- 0x0c, 0x29, 0x91, 0x45,
- 0x06, 0x70, 0x60, 0x40,
- 0xe0, 0x14, 0xe4, 0x70,
- 0xe0, 0x10, 0x4e, 0x05,
- 0x08, 0x24, 0x1a, 0x04,
- 0x4e, 0x15, 0xe0, 0x88,
- 0x86, 0x43, 0x60, 0x14,
- 0x60, 0x3c, 0x0e, 0x59,
- 0xe0, 0x84, 0x10, 0x24,
- 0x8c, 0x0b, 0x10, 0x0e,
- 0x70, 0x15, 0x00, 0x15,
- 0x86, 0x83, 0x40, 0x02,
- 0x60, 0x54, 0x0c, 0xc9,
- 0x44, 0x5a, 0x84, 0x33,
- 0x48, 0x15, 0xe6, 0x8a,
- 0x00, 0x1b, 0xe1, 0x00,
- 0xc0, 0x04, 0x78, 0x11,
- 0x78, 0x19, 0x00, 0x49,
- 0x50, 0x13, 0xc0, 0x08,
- 0x42, 0x52, 0x64, 0x00,
- 0x46, 0x41, 0xfb, 0xb0,
- 0x58, 0x72, 0x6a, 0x00,
- 0x00, 0x49, 0xf0, 0x88,
- 0xc0, 0x08, 0x78, 0x15,
- 0xec, 0x00, 0x46, 0x11,
- 0xeb, 0x00, 0x46, 0x41,
- 0x78, 0x11, 0x00, 0x49,
- 0x46, 0x41, 0xc0, 0x08,
- 0x08, 0x24, 0x6d, 0x00,
- 0x00, 0x59, 0xe0, 0x84,
- 0x40, 0x08, 0x78, 0x09,
- 0x0e, 0x43, 0xc4, 0x27,
- 0x04, 0x70, 0x84, 0x73,
- 0x40, 0x07, 0x67, 0x71,
- 0x67, 0x71, 0x08, 0x40,
- 0x46, 0x51, 0xc0, 0x11,
- 0x06, 0xc0, 0x6e, 0x00,
- 0xc0, 0x13, 0x67, 0x70,
- 0x81, 0x51, 0x07, 0x65,
- 0x7c, 0x14, 0x00, 0xc9,
- 0x64, 0x90, 0x10, 0x60,
- 0x0e, 0xc4, 0xc0, 0x03,
- 0x10, 0x95, 0xe0, 0x88,
- 0x54, 0x82, 0x7c, 0x1c,
- 0x8c, 0x73, 0xf0, 0x9c,
- 0x78, 0x01, 0x44, 0x95,
- 0x12, 0xc4, 0x40, 0x02,
- 0x14, 0xa5, 0xe0, 0x84,
- 0x90, 0x93, 0x60, 0x60,
- 0x61, 0x20, 0x12, 0xbb,
- 0x44, 0xa5, 0x98, 0x83,
- 0x48, 0xb3, 0xe4, 0x00,
- 0xc0, 0x02, 0x78, 0x01,
- 0xe1, 0xbc, 0x0e, 0x75,
- 0xe1, 0x50, 0x12, 0x9b,
- 0x4e, 0x32, 0x49, 0x7e,
- 0x51, 0x9c, 0xf0, 0x94,
- 0x10, 0xc9, 0x82, 0x51,
- 0x9c, 0xc6, 0xe3, 0x00,
- 0xe3, 0x30, 0x10, 0xc9,
- 0xe4, 0x00, 0x4e, 0xc1,
- 0xe3, 0x60, 0x10, 0xc9,
- 0xe8, 0x00, 0x4e, 0xc1,
- 0xe3, 0x90, 0x10, 0xc9,
- 0xec, 0x00, 0x4e, 0xc1,
- 0xf2, 0x75, 0x83, 0x5d,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x84, 0xbb, 0x0b, 0x1e,
- 0x80, 0xab, 0x2b, 0x14,
- 0x81, 0x81, 0x3c, 0x5e,
- 0x86, 0x6b, 0x3e, 0x4e,
- 0x8d, 0x1e, 0xae, 0x04,
- 0xaf, 0x74, 0xa5, 0x14,
- 0xfe, 0x1e, 0xa7, 0x94,
- 0x4f, 0xb8, 0x8f, 0x8e,
- 0x16, 0x39, 0xe8, 0x10,
- 0x98, 0x1a, 0xe0, 0x94,
- 0xa5, 0x3b, 0x9a, 0x2a,
- 0xe0, 0x10, 0x52, 0x13,
- 0xe0, 0x14, 0x52, 0x23,
- 0x09, 0x0e, 0x8a, 0x55,
- 0x74, 0x01, 0x00, 0x0e,
- 0xbe, 0x7e, 0xc0, 0x07,
- 0x83, 0x01, 0x26, 0x0e,
- 0x85, 0x01, 0x7c, 0x0e,
- 0x2d, 0x64, 0xa1, 0x8c,
- 0xfa, 0x80, 0x02, 0x04,
- 0x94, 0x0b, 0x29, 0x74,
- 0x8d, 0x34, 0xfe, 0x24,
- 0xe8, 0x00, 0x4d, 0x28,
- 0x60, 0x94, 0x16, 0x19,
- 0x12, 0x2b, 0x94, 0x0b,
- 0x49, 0x98, 0x8c, 0x3b,
- 0x0b, 0x64, 0xe8, 0x00,
- 0x16, 0x29, 0x94, 0x0b,
- 0x8e, 0x4b, 0x60, 0x90,
- 0xe0, 0x94, 0x16, 0x19,
- 0x68, 0x00, 0x4e, 0x88,
- 0x8d, 0x14, 0x8c, 0x3b,
- 0x89, 0x04, 0xbe, 0x74,
- 0x8f, 0x05, 0xfc, 0x94,
- 0x16, 0x19, 0xa3, 0x34,
- 0xcc, 0x28, 0xe0, 0x90,
- 0x82, 0x95, 0xc5, 0x1d,
- 0xc5, 0x1d, 0xce, 0x28,
- 0x00, 0x14, 0x1e, 0x65,
- 0x80, 0x00, 0x12, 0x26,
- 0x00, 0x18, 0x1e, 0x15,
- 0x80, 0x00, 0x50, 0xc6,
- 0x09, 0x0e, 0x96, 0xe5,
- 0xf0, 0x84, 0x40, 0x32,
- 0x60, 0x20, 0x00, 0x19,
- 0xe4, 0x70, 0x04, 0xf0,
- 0xe1, 0x20, 0x00, 0x09,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x80, 0x02, 0xf0,
- 0x60, 0x84, 0x5e, 0x01,
- 0x59, 0x78, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x00, 0x8b, 0x80, 0xe5,
- 0x8b, 0x64, 0x87, 0x91,
- 0x89, 0x04, 0x8d, 0x14,
- 0x0f, 0x04, 0x89, 0x55,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x04,
- 0x0c, 0x13, 0xc4, 0x07,
- 0x02, 0x1b, 0x80, 0x63,
- 0x0c, 0x05, 0xe2, 0x48,
- 0x52, 0x13, 0xe0, 0x24,
- 0x02, 0xf0, 0x60, 0x28,
- 0xa6, 0x0e, 0xe4, 0x80,
- 0x57, 0xb8, 0xbe, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x8b, 0x11, 0x21, 0x0b,
- 0x88, 0xf5, 0xfc, 0x1e,
- 0x04, 0xf0, 0x0f, 0x04,
- 0xfe, 0x14, 0xe4, 0x70,
- 0x02, 0x15, 0xc4, 0x07,
- 0x8c, 0x03, 0x60, 0x10,
- 0xe0, 0x24, 0x00, 0x05,
- 0x02, 0xf0, 0x02, 0x03,
- 0xe6, 0x0e, 0xe4, 0x80,
- 0x56, 0x58, 0xbc, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x8c, 0x1b, 0x0f, 0x04,
- 0x04, 0xf0, 0x21, 0x64,
- 0xc2, 0x07, 0xe4, 0x70,
- 0x02, 0xf0, 0x02, 0x03,
- 0x00, 0x0b, 0xe4, 0x80,
- 0x52, 0x03, 0xe0, 0x18,
- 0x8c, 0x0b, 0x60, 0x3c,
- 0xe8, 0x00, 0x55, 0x28,
- 0x84, 0x65, 0xa1, 0x0b,
- 0x80, 0x8b, 0x0b, 0x64,
- 0x8b, 0x91, 0x0d, 0x14,
- 0x02, 0x1b, 0x89, 0x04,
- 0x44, 0x18, 0xe1, 0xa8,
- 0x4c, 0x03, 0xef, 0xe0,
- 0x90, 0x0b, 0x60, 0x18,
- 0xc8, 0xf1, 0x1c, 0x8e,
- 0x0c, 0x0c, 0x9e, 0x9e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xbe, 0x7e, 0x8f, 0x04,
- 0x80, 0x63, 0xc2, 0x07,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0xe0, 0x38, 0x52, 0x03,
- 0xe0, 0x94, 0x16, 0x09,
- 0xc1, 0xc3, 0xeb, 0xb5,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x3b, 0x06, 0x6b,
- 0x44, 0x06, 0x02, 0x7b,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x57, 0xb8, 0x86, 0x1b,
- 0xa6, 0x7d, 0xef, 0xd0,
- 0xa9, 0x7b, 0x82, 0x25,
- 0xad, 0x7b, 0x80, 0xa5,
- 0xaf, 0x7b, 0x82, 0x25,
- 0x01, 0x85, 0x86, 0x95,
- 0xa5, 0x7b, 0x81, 0x01,
- 0xa7, 0x7b, 0x82, 0x85,
- 0x81, 0x01, 0x84, 0xd5,
- 0x4c, 0x03, 0xda, 0x0e,
- 0x02, 0x06, 0x60, 0x28,
- 0x4c, 0x13, 0xe1, 0x00,
- 0x81, 0xd5, 0xe0, 0x38,
- 0xda, 0x0e, 0x81, 0x01,
- 0xe0, 0x28, 0x4c, 0x03,
- 0x60, 0x30, 0x4c, 0x03,
- 0xe1, 0x00, 0x00, 0x06,
- 0xe0, 0x38, 0x4c, 0x03,
- 0xe0, 0x3c, 0x4c, 0x03,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0x44, 0x46, 0x02, 0x8b,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x54, 0x98, 0x8e, 0x1b,
- 0xad, 0x8b, 0xef, 0xd0,
- 0xe0, 0x0c, 0x10, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x80, 0x00, 0x00, 0x06,
- 0x80, 0x70, 0x4c, 0x01,
- 0xa5, 0x8b, 0x82, 0xe5,
- 0x01, 0x21, 0x82, 0xb5,
- 0xe4, 0x80, 0x00, 0x60,
- 0x60, 0x70, 0x4c, 0x21,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x0c, 0x0c, 0x99, 0x21,
- 0x13, 0x18, 0xf2, 0x0c,
- 0x0c, 0x0c, 0xff, 0xd0,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x8c, 0x35, 0xa5, 0x1b,
- 0x6f, 0xd1, 0x06, 0x09,
- 0x06, 0x19, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd9,
- 0x6f, 0xc9, 0x06, 0x29,
- 0x06, 0x59, 0xc0, 0x05,
- 0x40, 0x05, 0x6f, 0xcd,
- 0x48, 0x11, 0xa1, 0x0b,
- 0x48, 0x21, 0xe0, 0x34,
- 0x48, 0x51, 0xe0, 0x20,
- 0x48, 0x01, 0xe0, 0x24,
- 0x9a, 0xc5, 0xe0, 0x30,
- 0x67, 0xf9, 0x06, 0x05,
- 0x06, 0x1b, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x09,
- 0x60, 0x2d, 0x06, 0x29,
- 0x48, 0x05, 0xc0, 0x06,
- 0x48, 0x13, 0xe0, 0x10,
- 0x06, 0x05, 0xe0, 0xe0,
- 0xc0, 0x01, 0x68, 0x01,
- 0x60, 0x0d, 0x06, 0x1b,
- 0x48, 0x21, 0xc0, 0x03,
- 0x48, 0x05, 0xe2, 0x80,
- 0x48, 0x13, 0xe0, 0x40,
- 0x8b, 0x45, 0xe1, 0x10,
- 0x60, 0x3c, 0x06, 0x59,
- 0xf0, 0x88, 0x40, 0x32,
- 0x6e, 0x70, 0x00, 0x19,
- 0xe6, 0x80, 0x18, 0x40,
- 0x81, 0x71, 0x01, 0x61,
- 0xe0, 0x34, 0x48, 0x11,
- 0xea, 0x70, 0x00, 0x19,
- 0xe0, 0x20, 0x48, 0x11,
- 0xeb, 0x70, 0x00, 0x19,
- 0xe0, 0x24, 0x48, 0x11,
- 0xe6, 0x8a, 0x42, 0x5a,
- 0xec, 0x70, 0x00, 0x09,
- 0x60, 0x84, 0x04, 0x14,
- 0xe0, 0x88, 0x0a, 0x14,
- 0x10, 0x02, 0x86, 0x23,
- 0x00, 0x10, 0x6c, 0x30,
- 0xc0, 0x16, 0x67, 0x70,
- 0x67, 0x71, 0x02, 0x20,
- 0x04, 0x50, 0x40, 0x0f,
- 0xc0, 0x0b, 0x67, 0x71,
- 0x60, 0x30, 0x48, 0x81,
- 0xe5, 0x00, 0x0a, 0x40,
- 0x02, 0x9b, 0x85, 0x35,
- 0x50, 0x32, 0x7c, 0x18,
- 0x10, 0x85, 0xf0, 0x88,
- 0x40, 0x04, 0x78, 0x01,
- 0xf0, 0x98, 0x54, 0xc2,
- 0x78, 0x60, 0x54, 0x93,
- 0xf0, 0x98, 0x52, 0x12,
- 0x78, 0x30, 0x4a, 0x85,
- 0x06, 0x85, 0x84, 0x61,
- 0x88, 0x21, 0x7c, 0x08,
- 0xe4, 0x00, 0x12, 0x9b,
- 0x50, 0x32, 0x55, 0x8e,
- 0x54, 0x93, 0xf0, 0x9c,
- 0x52, 0xc2, 0x78, 0x30,
- 0x10, 0x89, 0xf0, 0x9c,
- 0x82, 0x71, 0x7c, 0x00,
- 0x08, 0x89, 0xa4, 0x86,
- 0x10, 0x84, 0xe0, 0x30,
- 0x91, 0x7d, 0xfa, 0x80,
- 0x0c, 0x4c, 0xf6, 0x75,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x8c, 0x04, 0x0c,
- 0x60, 0x38, 0x46, 0x11,
- 0x46, 0x21, 0x81, 0x51,
- 0x04, 0x30, 0x60, 0x3c,
- 0xc0, 0x01, 0x64, 0x70,
- 0x60, 0x18, 0x46, 0x53,
- 0x64, 0x70, 0x18, 0x30,
- 0x0c, 0x30, 0xc0, 0x02,
- 0x40, 0x02, 0x66, 0x71,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x81, 0x71, 0x03, 0x25,
- 0x79, 0x00, 0x44, 0x55,
- 0xf0, 0x9c, 0x50, 0x62,
- 0xf1, 0x5c, 0xc9, 0x5e,
- 0x63, 0x00, 0x50, 0x71,
- 0xa0, 0x56, 0x82, 0x71,
- 0xe1, 0x00, 0x50, 0x51,
- 0xe2, 0x00, 0x50, 0x51,
- 0xe4, 0x00, 0x50, 0x11,
- 0xe1, 0x00, 0x0e, 0x0a,
- 0x04, 0x30, 0xfa, 0xd5,
- 0x40, 0x16, 0x67, 0x71,
- 0xe0, 0x10, 0x18, 0x06,
- 0x49, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x18, 0xc0,
- 0xfe, 0x95, 0xa1, 0xcb,
- 0x67, 0xf1, 0x46, 0x55,
- 0x04, 0x06, 0x40, 0x01,
- 0x46, 0x55, 0xef, 0xf0,
- 0xc0, 0x01, 0x67, 0xed,
- 0x67, 0xe9, 0x46, 0x55,
- 0x46, 0x11, 0xc0, 0x01,
- 0x40, 0x05, 0x6f, 0xd9,
- 0x46, 0x23, 0x88, 0x1b,
- 0xc0, 0x02, 0x6f, 0xe9,
- 0x60, 0x2d, 0x46, 0x51,
- 0x0c, 0x0c, 0xc0, 0x06,
- 0x24, 0x38, 0xf0, 0x8c,
- 0xc1, 0xc3, 0xff, 0xd4,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0xe0, 0x18, 0x00, 0x79,
- 0xe0, 0x28, 0x00, 0x39,
- 0xe0, 0x20, 0x00, 0xc9,
- 0x08, 0x70, 0x06, 0x68,
- 0x4a, 0x3a, 0xec, 0x04,
- 0x00, 0x49, 0xe6, 0x92,
- 0x00, 0x89, 0xe0, 0x14,
- 0x52, 0x52, 0x60, 0x1c,
- 0x00, 0x59, 0xf0, 0xb0,
- 0x81, 0x01, 0x60, 0x24,
- 0xd2, 0x6d, 0x04, 0x18,
- 0x40, 0xc6, 0x08, 0x0e,
- 0x8e, 0x55, 0xe0, 0x00,
- 0xec, 0x04, 0x12, 0x40,
- 0xe6, 0xa6, 0x52, 0x5a,
- 0xd2, 0x1d, 0x90, 0x93,
- 0xd9, 0x6d, 0x8c, 0x75,
- 0xd1, 0x1d, 0x8c, 0x35,
- 0xa1, 0x3b, 0x8a, 0xf5,
- 0xa1, 0x5b, 0x8a, 0xa5,
- 0x52, 0xc2, 0x8a, 0x65,
- 0x12, 0x8a, 0xf9, 0xa0,
- 0x88, 0xd5, 0xf0, 0x00,
- 0x88, 0x95, 0xf0, 0x7d,
- 0x88, 0x55, 0xf4, 0x4d,
- 0xec, 0x08, 0x12, 0x40,
- 0xf4, 0xf4, 0x13, 0x0a,
- 0xe5, 0x7d, 0x86, 0xb5,
- 0x4e, 0x32, 0x86, 0x75,
- 0xa2, 0x7f, 0xf9, 0x94,
- 0x0e, 0x8a, 0xac, 0x7f,
- 0x84, 0x95, 0xf0, 0x00,
- 0x4e, 0x1a, 0xb0, 0x13,
- 0xa1, 0x7b, 0xe1, 0x16,
- 0xb8, 0x63, 0x82, 0xf5,
- 0xe1, 0x0e, 0x58, 0x6a,
- 0x82, 0x55, 0xa1, 0xcb,
- 0xe0, 0x0e, 0x40, 0x6a,
- 0xe0, 0x16, 0x42, 0x1a,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x08, 0x0e, 0x82, 0x03,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x80, 0xab, 0x3d, 0x04,
- 0x81, 0x91, 0x25, 0x5e,
- 0x84, 0x8b, 0x15, 0x4e,
- 0x16, 0x30, 0x13, 0x0e,
- 0x3b, 0x04, 0xe5, 0x20,
- 0xe0, 0x08, 0x0d, 0x06,
- 0x81, 0x71, 0x21, 0x1e,
- 0xa3, 0x0e, 0xa9, 0x9e,
- 0x27, 0x0e, 0xb9, 0x04,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1b, 0x0e, 0xc0, 0x02,
- 0x66, 0x01, 0x00, 0xa0,
- 0x19, 0x0e, 0xc0, 0x04,
- 0x67, 0x01, 0x00, 0xa0,
- 0x17, 0x0e, 0xc0, 0x06,
- 0x64, 0x01, 0x00, 0xa0,
- 0x1f, 0x0e, 0xc0, 0x09,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1d, 0x0e, 0xc0, 0x0b,
- 0x8d, 0x85, 0x81, 0x01,
- 0x98, 0x55, 0xa1, 0x0b,
- 0x78, 0x90, 0x16, 0x03,
- 0xac, 0x12, 0x94, 0x5b,
- 0xa7, 0x34, 0xa5, 0x24,
- 0x72, 0xf8, 0xa3, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa1, 0x34, 0x94, 0xf5,
- 0x16, 0x03, 0x9d, 0x44,
- 0xac, 0x12, 0xf8, 0x90,
- 0xe0, 0x30, 0x16, 0x23,
- 0x8b, 0x4e, 0x8c, 0x38,
- 0xa7, 0x54, 0x9f, 0x44,
- 0x97, 0x44, 0x89, 0x4e,
- 0x99, 0x44, 0xfe, 0x4e,
- 0x9b, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x74, 0x38, 0xa5, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0x93, 0x44, 0x8e, 0xf5,
- 0x16, 0x03, 0xa1, 0x34,
- 0x2c, 0x12, 0xf8, 0x90,
- 0xf0, 0xa4, 0x4a, 0x42,
- 0x60, 0x30, 0x16, 0x23,
- 0x8e, 0x38, 0x8c, 0x43,
- 0xe0, 0x51, 0x0f, 0x5e,
- 0x09, 0x4e, 0x8b, 0x5e,
- 0xe5, 0x40, 0x08, 0xf0,
- 0x9d, 0x44, 0xfe, 0x4e,
- 0xa7, 0x54, 0x91, 0x5e,
- 0x9f, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x79, 0x78, 0x95, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa9, 0x04, 0x88, 0x35,
- 0x11, 0x04, 0x8f, 0xc4,
- 0x00, 0x34, 0xa3, 0x0b,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x58, 0x35,
- 0xc0, 0x60, 0x58, 0x35,
- 0xa1, 0x44, 0x84, 0xb5,
- 0x16, 0x03, 0x93, 0x24,
- 0x50, 0x58, 0xf8, 0x90,
- 0xe5, 0x80, 0x08, 0xc0,
- 0x04, 0x23, 0xac, 0x12,
- 0x89, 0x4e, 0xfc, 0x18,
- 0xfe, 0xce, 0xa7, 0x44,
- 0xbe, 0x4e, 0xfc, 0xae,
- 0x3c, 0x4e, 0x95, 0x44,
- 0x6b, 0xd8, 0x83, 0x41,
- 0x02, 0x71, 0xef, 0xd8,
- 0x04, 0xb1, 0x88, 0x91,
- 0xa2, 0x18, 0x84, 0x61,
- 0xe4, 0xf5, 0x83, 0x7d,
- 0xe5, 0x50, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x84, 0xab, 0x06, 0xb8,
- 0x60, 0x10, 0x00, 0x23,
- 0x02, 0x14, 0x99, 0x41,
- 0x00, 0x0b, 0x81, 0x51,
- 0x3e, 0x0e, 0xe0, 0x14,
- 0xe7, 0x60, 0x00, 0x30,
- 0x41, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x08, 0x40,
- 0xfe, 0x95, 0xa1, 0x4b,
- 0x6c, 0x04, 0x00, 0x10,
- 0x7f, 0xfc, 0x49, 0xee,
- 0x3e, 0x04, 0xcf, 0xff,
- 0xe4, 0x10, 0x41, 0x4a,
- 0xe0, 0x04, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xec, 0x04, 0x00, 0x00,
- 0x6f, 0xf9, 0x01, 0x5a,
- 0x40, 0xc6, 0x40, 0x0f,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x17, 0x5a, 0xed, 0x80,
- 0x42, 0x0a, 0xe4, 0x30,
- 0x00, 0x06, 0xed, 0x80,
- 0xbc, 0x0e, 0xc0, 0x00,
- 0x80, 0x00, 0x13, 0xc8,
- 0x60, 0x0a, 0x40, 0x2e,
- 0xe7, 0x60, 0x12, 0x30,
- 0xe6, 0xa0, 0x10, 0x30,
- 0xe5, 0x02, 0x44, 0x1a,
- 0xe5, 0x82, 0x48, 0x1a,
- 0x02, 0x24, 0x09, 0x2e,
- 0x7e, 0x4e, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x44,
- 0xc3, 0x47, 0x20, 0x1f,
- 0x8b, 0x4e, 0xfc, 0x1e,
- 0x20, 0x12, 0xa5, 0x35,
- 0xa8, 0x34, 0x81, 0x01,
- 0x40, 0x1a, 0xa0, 0x1d,
- 0x42, 0x3a, 0xc6, 0x86,
- 0x40, 0x3a, 0xe5, 0x82,
- 0x04, 0x14, 0xe5, 0x02,
- 0x06, 0x20, 0xf6, 0x80,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x00, 0x5b, 0xe4, 0x7c,
- 0xfb, 0x8c, 0x48, 0x22,
- 0x6c, 0x7c, 0x06, 0x42,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x68, 0x8c, 0x18, 0x54,
- 0x4a, 0x00, 0x81, 0x51,
- 0x0c, 0x34, 0x1c, 0x00,
- 0x0e, 0x54, 0xec, 0x00,
- 0xa6, 0x43, 0x6f, 0x8c,
- 0x78, 0x9c, 0x4c, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xac, 0xcf, 0x0b, 0x64,
- 0x68, 0x90, 0x08, 0xc4,
- 0x48, 0x3b, 0xa7, 0x5f,
- 0x4d, 0x4a, 0xca, 0xcb,
- 0x4c, 0x1a, 0xe4, 0x0c,
- 0x8c, 0x3b, 0x60, 0x0c,
- 0x42, 0x0a, 0x7c, 0x64,
- 0x4d, 0x6a, 0xe5, 0x80,
- 0x42, 0x1a, 0xe4, 0x30,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x40, 0x52, 0xed, 0x80,
- 0x4e, 0x20, 0x50, 0x98,
- 0x08, 0xf5, 0xdc, 0x00,
- 0xd2, 0x8c, 0x42, 0x42,
- 0x08, 0x65, 0xa1, 0x2b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x6c, 0x04, 0x0e, 0x20,
- 0x0f, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0x02, 0x20, 0x1c, 0x00,
- 0x44, 0x72, 0xec, 0x84,
- 0x00, 0x06, 0x7b, 0x84,
- 0x02, 0x22, 0xc0, 0x00,
- 0x08, 0x04, 0xec, 0x7c,
- 0x0a, 0x14, 0x6f, 0x84,
- 0x22, 0x23, 0xec, 0x00,
- 0x23, 0x3f, 0xa3, 0x0f,
- 0xf8, 0x90, 0x48, 0x52,
- 0xa8, 0x3f, 0x0b, 0x14,
- 0x6c, 0x04, 0x04, 0x22,
- 0xa5, 0x3f, 0x8c, 0x03,
- 0xf2, 0x84, 0x42, 0x32,
- 0xfe, 0x34, 0x89, 0x24,
- 0xef, 0xcc, 0x47, 0x28,
- 0x00, 0x70, 0x00, 0x2b,
- 0x08, 0x70, 0xe4, 0x2c,
- 0x01, 0x0a, 0x6c, 0x54,
- 0x03, 0x31, 0xe4, 0x7c,
- 0xfb, 0x90, 0x48, 0x02,
- 0x00, 0x00, 0x06, 0x06,
- 0xe4, 0x80, 0x00, 0xca,
- 0x62, 0x00, 0x00, 0x0c,
- 0xec, 0x7c, 0x0a, 0x42,
- 0x6f, 0x94, 0x18, 0x04,
- 0xec, 0x00, 0x0c, 0x54,
- 0xab, 0x3f, 0x2a, 0x43,
- 0x78, 0xb0, 0x58, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xab, 0x0f, 0x38, 0x3f,
- 0x44, 0xaa, 0x29, 0x3f,
- 0x47, 0x1d, 0xe4, 0x00,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x42, 0x1a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xa1, 0x1b, 0x9e, 0xc5,
- 0xbe, 0x44, 0x8e, 0xf5,
- 0xf6, 0x80, 0x00, 0x24,
- 0xf6, 0x80, 0x02, 0x44,
- 0x02, 0x8a, 0x80, 0x13,
- 0x90, 0x75, 0xe4, 0x80,
- 0x64, 0x74, 0x0f, 0x0a,
- 0x9c, 0x15, 0x83, 0x41,
- 0xbd, 0x11, 0x3e, 0x04,
- 0x40, 0x2a, 0xae, 0x13,
- 0x04, 0x44, 0x66, 0x82,
- 0x02, 0x70, 0xe8, 0x84,
- 0x04, 0x20, 0x64, 0x08,
- 0xa3, 0x2f, 0xec, 0x04,
- 0xf8, 0x08, 0x46, 0x02,
- 0x98, 0xd5, 0x85, 0x3b,
- 0x6c, 0x80, 0x06, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x46, 0x12, 0x01, 0x21,
- 0x04, 0x16, 0xfb, 0x8c,
- 0x02, 0xca, 0x40, 0x00,
- 0x08, 0x0c, 0xe4, 0x80,
- 0x02, 0x32, 0x62, 0x00,
- 0x0a, 0x44, 0xec, 0x7c,
- 0x18, 0x14, 0x6f, 0x84,
- 0x22, 0x33, 0xec, 0x00,
- 0x4a, 0xc2, 0xa3, 0x2f,
- 0xa3, 0x4f, 0x78, 0x94,
- 0x06, 0x32, 0x2a, 0x2f,
- 0x27, 0x2f, 0xec, 0x04,
- 0x81, 0x11, 0x88, 0x03,
- 0x42, 0x22, 0x07, 0x55,
- 0x04, 0x0b, 0xf2, 0x84,
- 0xbe, 0x24, 0x81, 0x31,
- 0xef, 0xcc, 0x49, 0x68,
- 0x64, 0x08, 0x06, 0x70,
- 0x07, 0x0a, 0x81, 0x21,
- 0x01, 0xe5, 0xe4, 0x7c,
- 0xc0, 0x00, 0x04, 0x16,
- 0x64, 0x08, 0x06, 0x70,
- 0xe5, 0x12, 0x40, 0x2a,
- 0x65, 0x92, 0x42, 0x2a,
- 0xe4, 0x7c, 0x07, 0x0a,
- 0x04, 0x06, 0x83, 0x21,
- 0x08, 0x70, 0x80, 0x00,
- 0x06, 0xca, 0x6c, 0x78,
- 0x0a, 0x0c, 0xe4, 0x80,
- 0x48, 0x32, 0x62, 0x00,
- 0x06, 0x42, 0xfb, 0x90,
- 0x18, 0x54, 0xec, 0x7c,
- 0x0c, 0x34, 0x6f, 0x8c,
- 0x26, 0x43, 0xec, 0x00,
- 0x58, 0x62, 0xa7, 0x2f,
- 0xa7, 0x5f, 0x78, 0xb0,
- 0x08, 0x42, 0x38, 0x2f,
- 0x29, 0x2f, 0xec, 0x04,
- 0x42, 0x12, 0x8a, 0x03,
- 0x4c, 0x78, 0xf2, 0x88,
- 0x04, 0x70, 0x6f, 0xcc,
- 0x00, 0x8a, 0xe4, 0x0c,
- 0x41, 0xf6, 0xe7, 0xfc,
- 0xa1, 0x1b, 0x00, 0x0c,
- 0xc0, 0x0c, 0x41, 0xf6,
- 0x16, 0xb0, 0xa4, 0x06,
- 0x82, 0x91, 0x6c, 0x04,
- 0x84, 0x81, 0x08, 0xa1,
- 0x02, 0x44, 0x81, 0x95,
- 0x86, 0x71, 0x68, 0x84,
- 0xef, 0x0f, 0x82, 0x03,
- 0x00, 0x02, 0x7f, 0x45,
- 0xa1, 0xbb, 0xef, 0xfc,
- 0xdf, 0xfc, 0x2d, 0xd8,
- 0xb0, 0xf1, 0x3c, 0x04,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x80, 0xcb, 0x06, 0x1d,
- 0x7a, 0x0c, 0x4c, 0x12,
- 0xfb, 0x04, 0x42, 0x32,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf1, 0x84, 0x46, 0x62,
- 0x1c, 0x00, 0x44, 0x00,
- 0x67, 0x0f, 0xff, 0x01,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x69, 0x8c, 0x0e, 0xc4,
- 0xf8, 0x98, 0x40, 0x02,
- 0x84, 0x03, 0xae, 0x0f,
- 0x79, 0x08, 0x4c, 0x02,
- 0xf9, 0x30, 0x4e, 0x02,
- 0xa1, 0x6d, 0x8e, 0x6f,
- 0x04, 0x04, 0x84, 0xf5,
- 0xbf, 0x61, 0x70, 0x80,
- 0x46, 0x62, 0x63, 0x2f,
- 0x42, 0x29, 0xf1, 0x8c,
- 0x04, 0x24, 0xa7, 0xcf,
- 0x06, 0xc4, 0x76, 0x80,
- 0x04, 0x20, 0xfc, 0x7c,
- 0x42, 0x22, 0xec, 0x04,
- 0x22, 0x63, 0xf1, 0x84,
- 0x6d, 0x3f, 0xa3, 0x0f,
- 0x03, 0x35, 0x84, 0x1b,
- 0xa3, 0x1d, 0x86, 0x03,
- 0x41, 0xfc, 0x04, 0x24,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x02, 0x75, 0xdf, 0xff,
- 0xd0, 0x88, 0x40, 0x02,
- 0x60, 0x01, 0x06, 0x06,
- 0xc3, 0x07, 0x60, 0x00,
- 0x02, 0x10, 0x06, 0x2f,
- 0xa4, 0x0f, 0xec, 0x04,
- 0x94, 0x1e, 0x90, 0x0e,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x88, 0x9b, 0x1d, 0x34,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x50, 0x22, 0x06, 0x2d,
- 0x58, 0x90, 0xfa, 0x0c,
- 0x52, 0x00, 0x1c, 0x00,
- 0x21, 0x04, 0x9c, 0x00,
- 0xfb, 0x08, 0x46, 0x32,
- 0x71, 0x8c, 0x54, 0x82,
- 0x9c, 0x00, 0x4c, 0x50,
- 0x4a, 0x10, 0x7e, 0xce,
- 0x0d, 0x0e, 0x9c, 0x00,
- 0x1f, 0x04, 0x8c, 0x1b,
- 0x09, 0x5e, 0x94, 0x2b,
- 0x0b, 0x0e, 0x86, 0x8b,
- 0x43, 0x78, 0x98, 0x0b,
- 0x00, 0x7b, 0xef, 0xcc,
- 0x7f, 0x01, 0x82, 0xbb,
- 0x7c, 0xae, 0xff, 0x11,
- 0x42, 0xf8, 0x94, 0x2b,
- 0x09, 0xa4, 0xef, 0xcc,
- 0xe1, 0x7c, 0x04, 0x64,
- 0x78, 0x88, 0x40, 0x02,
- 0xf8, 0x88, 0x42, 0x12,
- 0xb6, 0x1f, 0x2e, 0x0f,
- 0x56, 0x02, 0x3e, 0x6e,
- 0x4e, 0x12, 0xf0, 0xa4,
- 0x40, 0x72, 0xf2, 0xa8,
- 0x42, 0x72, 0x79, 0x28,
- 0x82, 0x0f, 0xf9, 0x18,
- 0x98, 0x35, 0xa1, 0x0d,
- 0xe1, 0x7c, 0x02, 0x74,
- 0xf0, 0x84, 0x40, 0xb2,
- 0x72, 0x84, 0x44, 0x72,
- 0x44, 0x1f, 0xc2, 0x0f,
- 0x40, 0xf8, 0x90, 0x2b,
- 0x21, 0x1b, 0xef, 0xcc,
- 0x00, 0x14, 0xbf, 0xc1,
- 0x81, 0x11, 0x56, 0x80,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0xec, 0x04, 0x0c, 0x00,
- 0x44, 0x62, 0x7c, 0x84,
- 0x00, 0x20, 0xf1, 0xa0,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x48, 0x22, 0xe4, 0x7c,
- 0x42, 0xb0, 0x7b, 0x80,
- 0x00, 0x42, 0x9c, 0x00,
- 0x56, 0x70, 0x6c, 0x7c,
- 0x06, 0x14, 0x9c, 0x00,
- 0x0a, 0x04, 0x6f, 0x80,
- 0x46, 0x52, 0xec, 0x00,
- 0xa1, 0xbf, 0x78, 0x8c,
- 0x4e, 0xb2, 0x7e, 0xb4,
- 0x47, 0xf6, 0xf9, 0x8c,
- 0xb0, 0xc3, 0x60, 0x00,
- 0x71, 0xa0, 0x4a, 0x32,
- 0x0b, 0x0a, 0xa0, 0x43,
- 0x58, 0x52, 0x64, 0x7c,
- 0x1e, 0xb5, 0xfb, 0xb0,
- 0x96, 0x5b, 0x00, 0x04,
- 0x6c, 0x04, 0x10, 0x42,
- 0xec, 0x7c, 0x08, 0xc2,
- 0x40, 0x00, 0x0a, 0x06,
- 0xec, 0x00, 0x14, 0x44,
- 0x6f, 0x90, 0x12, 0x54,
- 0x10, 0x14, 0xb1, 0x7f,
- 0x40, 0xa2, 0x68, 0x80,
- 0x02, 0xb4, 0xf8, 0xa4,
- 0xa8, 0xc3, 0x68, 0x90,
- 0x00, 0xc2, 0x20, 0x1f,
- 0x21, 0x1f, 0xec, 0x04,
- 0xe8, 0x90, 0x00, 0x54,
- 0x7c, 0x7c, 0x02, 0x14,
- 0xf1, 0x88, 0x44, 0x32,
- 0xef, 0xc8, 0x7b, 0xe8,
- 0x03, 0xd5, 0x90, 0x03,
- 0xf2, 0x9c, 0x42, 0x12,
- 0xff, 0x01, 0x23, 0x8d,
- 0x02, 0x06, 0x82, 0xf5,
- 0x60, 0x00, 0x60, 0x01,
- 0xe0, 0xfc, 0x00, 0x74,
- 0xc3, 0x77, 0x43, 0xb7,
- 0xb6, 0x0f, 0x02, 0xaf,
- 0x79, 0xa8, 0x42, 0x72,
- 0xec, 0x04, 0x0c, 0x80,
- 0x7f, 0xa7, 0x81, 0xa5,
- 0x7f, 0xfd, 0x43, 0xfe,
- 0x01, 0x21, 0xdf, 0xff,
- 0x42, 0x22, 0x94, 0x03,
- 0x90, 0x6b, 0x72, 0x84,
- 0x88, 0x0e, 0x8b, 0x24,
- 0x0d, 0x04, 0x8a, 0x1e,
- 0x80, 0x6e, 0xb8, 0xf1,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x76, 0x80, 0x14, 0x24,
- 0xe0, 0x00, 0x48, 0xc6,
- 0xb4, 0x43, 0x19, 0x51,
- 0x09, 0x0a, 0x34, 0x53,
- 0x4a, 0x42, 0xe4, 0x7c,
- 0x81, 0xc1, 0x7b, 0x94,
- 0x6c, 0x7c, 0x08, 0x52,
- 0x9c, 0x00, 0x58, 0x00,
- 0x00, 0x00, 0x00, 0x06,
- 0xe4, 0xb0, 0x12, 0x10,
- 0x6f, 0x90, 0x02, 0xc4,
- 0xec, 0x00, 0x16, 0x44,
- 0x78, 0x84, 0x42, 0xb2,
- 0x28, 0x53, 0xa9, 0x0f,
- 0x02, 0x52, 0xa2, 0x0f,
- 0x86, 0xa3, 0x6c, 0x04,
- 0x68, 0x84, 0x02, 0x04,
- 0xe8, 0x90, 0x00, 0xc4,
- 0x6f, 0xc8, 0x5b, 0x08,
- 0x81, 0x81, 0x81, 0x31,
- 0xff, 0x21, 0x34, 0x93,
- 0x84, 0x9d, 0x1e, 0x1e,
- 0x82, 0x85, 0x9c, 0x0e,
- 0x12, 0x8a, 0x18, 0x9e,
- 0x8a, 0x55, 0xe0, 0xfc,
- 0x6f, 0xc8, 0x74, 0x28,
- 0xec, 0xf8, 0x04, 0x90,
- 0x51, 0xe6, 0x05, 0x25,
- 0x32, 0x2b, 0xe0, 0x00,
- 0x05, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0xc1, 0x11, 0x1c, 0x00,
- 0x42, 0x22, 0xb2, 0x13,
- 0x04, 0x12, 0xfb, 0x84,
- 0x08, 0x34, 0xec, 0x7c,
- 0x81, 0x31, 0x68, 0x88,
- 0x1c, 0x00, 0x46, 0x00,
- 0xec, 0x00, 0x0a, 0x24,
- 0x6f, 0x88, 0x00, 0x34,
- 0x40, 0x52, 0xa4, 0x13,
- 0x20, 0x4f, 0xf8, 0x80,
- 0xec, 0x04, 0x00, 0x12,
- 0x68, 0x80, 0x02, 0x44,
- 0xe8, 0x88, 0x00, 0x34,
- 0x9e, 0x1e, 0x9c, 0x0e,
- 0x0c, 0x4c, 0x98, 0x8e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x88, 0x7b, 0x52, 0xc4,
- 0xf0, 0x14, 0x0e, 0x65,
- 0xe6, 0x82, 0x52, 0x1a,
- 0x60, 0x90, 0x58, 0x0a,
- 0x04, 0x16, 0x83, 0xc1,
- 0xa1, 0x6b, 0x40, 0x00,
- 0x44, 0xc2, 0x0d, 0xb4,
- 0x12, 0x24, 0x91, 0x88,
- 0x42, 0x3a, 0xa3, 0x2b,
- 0x8f, 0xa4, 0xe6, 0x86,
- 0x08, 0x24, 0x11, 0x84,
- 0x19, 0xc4, 0x9b, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x10, 0x90, 0x4e, 0x72,
- 0xe0, 0x88, 0x08, 0x14,
- 0x0a, 0x70, 0x14, 0x7e,
- 0x2c, 0x5e, 0xe4, 0x10,
- 0x17, 0x64, 0x90, 0x71,
- 0xf0, 0x90, 0x4a, 0x72,
- 0x14, 0x90, 0x28, 0x5e,
- 0x0a, 0x94, 0xe4, 0x0c,
- 0x12, 0xa4, 0x60, 0x88,
- 0x7d, 0x97, 0xe1, 0x7c,
- 0xf0, 0x94, 0x56, 0x72,
- 0xf9, 0x71, 0x12, 0xa3,
- 0x70, 0x84, 0x52, 0xb2,
- 0x20, 0x9e, 0x8e, 0xaf,
- 0x10, 0x34, 0x94, 0xb3,
- 0x12, 0x04, 0x60, 0x88,
- 0x54, 0xb2, 0xe0, 0x88,
- 0x50, 0xb2, 0x70, 0xa0,
- 0x18, 0xae, 0xf0, 0xa4,
- 0x30, 0x3e, 0x90, 0x33,
- 0xe0, 0xe0, 0x44, 0x0a,
- 0x02, 0x06, 0x13, 0x34,
- 0x95, 0x24, 0xc0, 0x00,
- 0xc0, 0x00, 0x46, 0x15,
- 0x86, 0x01, 0x82, 0x95,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x80, 0x83, 0x8e, 0x0f,
- 0x8a, 0x83, 0x10, 0x43,
- 0x90, 0x13, 0x0c, 0x4e,
- 0x0c, 0x0c, 0x88, 0x1e,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0xab, 0x02, 0x7b,
- 0x61, 0x7c, 0x10, 0x74,
- 0x10, 0x03, 0x86, 0x6b,
- 0x52, 0x72, 0x84, 0xbb,
- 0x50, 0x9f, 0xf2, 0xa0,
- 0x10, 0x0b, 0xc0, 0x8f,
- 0x6c, 0x78, 0x92, 0x1b,
- 0xa1, 0x1b, 0xef, 0xc8,
- 0xd6, 0x80, 0x00, 0x14,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0x60, 0x80, 0x01, 0x0a,
- 0xec, 0x84, 0x02, 0x00,
- 0x82, 0x55, 0xa8, 0x1e,
- 0x41, 0xfe, 0x7f, 0x77,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0x81, 0x01, 0x00, 0x73,
- 0xa8, 0x0e, 0x98, 0x7e,
- 0x56, 0x1b, 0x85, 0x15,
- 0x82, 0x03, 0x90, 0x2b,
- 0x6c, 0x80, 0x02, 0x00,
- 0xe4, 0x7c, 0x01, 0x0a,
- 0x7b, 0x84, 0x40, 0x02,
- 0xc0, 0x00, 0x04, 0x06,
- 0x6c, 0x7c, 0x02, 0x02,
- 0x9c, 0x00, 0x50, 0x90,
- 0x6f, 0x84, 0x04, 0x24,
- 0xec, 0x00, 0x06, 0x14,
- 0x44, 0x32, 0x22, 0x03,
- 0x23, 0x8f, 0xf8, 0x88,
- 0xec, 0x04, 0x00, 0x02,
- 0xa1, 0x7d, 0x24, 0x8f,
- 0xe8, 0x80, 0x00, 0x84,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0c, 0x4c, 0x98, 0x0e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x0a, 0x6b,
- 0x61, 0x7c, 0x02, 0x64,
- 0xe1, 0x7c, 0x06, 0x74,
- 0x81, 0xa1, 0x02, 0x43,
- 0x58, 0x62, 0x11, 0xb4,
- 0x06, 0x03, 0xf2, 0x84,
- 0xf9, 0x04, 0x50, 0xc2,
- 0x72, 0x8c, 0x4a, 0x72,
- 0x58, 0x42, 0xc6, 0x0f,
- 0xc6, 0x5f, 0x79, 0x04,
- 0xe5, 0xb2, 0x42, 0x0a,
- 0xe5, 0x32, 0x46, 0x5a,
- 0xe5, 0xb2, 0x48, 0x5a,
- 0x42, 0x8a, 0x02, 0x33,
- 0x48, 0x42, 0xe5, 0x02,
- 0x52, 0x8a, 0x72, 0xa8,
- 0x06, 0x13, 0xe5, 0x82,
- 0xe5, 0x22, 0x46, 0x5a,
- 0x72, 0xa4, 0x48, 0x42,
- 0xe5, 0xa2, 0x4a, 0x5a,
- 0x70, 0x8c, 0x50, 0x42,
- 0xe5, 0x32, 0x40, 0x0a,
- 0xf2, 0xa8, 0x48, 0x52,
- 0xf9, 0x90, 0x46, 0x82,
- 0x8e, 0x85, 0xa1, 0x3b,
- 0x06, 0x44, 0x0f, 0x2e,
- 0x4a, 0x82, 0xe1, 0x7c,
- 0x58, 0x42, 0xf0, 0x8c,
- 0x07, 0xcb, 0xf2, 0x8c,
- 0x06, 0xc4, 0xc6, 0xcf,
- 0x90, 0xcb, 0x56, 0x80,
- 0x99, 0x0c, 0x4a, 0x52,
- 0x96, 0x80, 0x06, 0x54,
- 0x84, 0x80, 0x06, 0x30,
- 0xec, 0x04, 0x0a, 0x30,
- 0xe4, 0x7c, 0x0b, 0x0a,
- 0x1c, 0x00, 0x58, 0x40,
- 0xec, 0x84, 0x08, 0x30,
- 0x7b, 0x90, 0x4a, 0x52,
- 0xc0, 0x00, 0x10, 0x06,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6f, 0x90, 0x12, 0x84,
- 0xec, 0x00, 0x14, 0x44,
- 0x52, 0xa2, 0x29, 0xcf,
- 0x28, 0x53, 0xf8, 0xa4,
- 0x12, 0x16, 0xb2, 0xcf,
- 0x0a, 0x52, 0x60, 0x04,
- 0x26, 0x93, 0xec, 0x04,
- 0xe8, 0x94, 0x14, 0xc4,
- 0x92, 0x2b, 0x29, 0x8f,
- 0xef, 0xc8, 0x62, 0x48,
- 0xb4, 0x1f, 0x0f, 0x24,
- 0x81, 0xa1, 0x30, 0x0f,
- 0x01, 0xe5, 0x84, 0xb3,
- 0xa1, 0x1d, 0xb2, 0xb3,
- 0x56, 0xb2, 0x02, 0x65,
- 0x04, 0xb3, 0x90, 0x88,
- 0xe0, 0xfc, 0x06, 0x14,
- 0xc3, 0x17, 0x43, 0x07,
- 0x16, 0xb0, 0x26, 0x0f,
- 0x21, 0xbd, 0xec, 0x04,
- 0xe0, 0x00, 0x04, 0xb2,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0x04, 0x8a, 0xdf, 0xfc,
- 0xff, 0x81, 0x60, 0xfc,
- 0x60, 0x38, 0x80, 0xf5,
- 0x04, 0x20, 0x6f, 0xc8,
- 0x45, 0xe6, 0xec, 0xf8,
- 0x4e, 0x6f, 0xe0, 0x00,
- 0xf1, 0x80, 0x48, 0xa2,
- 0x90, 0x6d, 0x13, 0x54,
- 0x40, 0x40, 0x15, 0x44,
- 0x46, 0xa2, 0x9c, 0x00,
- 0x42, 0x30, 0xf3, 0x84,
- 0x96, 0x1e, 0x9c, 0x00,
- 0x90, 0x2e, 0x94, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x11, 0x58, 0x04,
- 0x6b, 0xc8, 0x04, 0xf6,
- 0x58, 0x18, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xc8,
- 0xc2, 0x17, 0x61, 0xfc,
- 0x7c, 0x7c, 0x00, 0x04,
- 0x84, 0x03, 0xa2, 0x2f,
- 0x7c, 0x7c, 0x02, 0x04,
- 0x00, 0x13, 0xff, 0x07,
- 0x70, 0x01, 0x00, 0x0e,
- 0x41, 0x1d, 0xcf, 0xff,
- 0xe1, 0xc0, 0x00, 0x14,
- 0x00, 0x00, 0x58, 0x1e,
- 0x80, 0x3f, 0x0f, 0xfd,
- 0x45, 0xf6, 0x5c, 0x14,
- 0x40, 0x22, 0xc3, 0xfc,
- 0x00, 0x9a, 0xd1, 0x80,
- 0xc0, 0x3f, 0x63, 0x4d,
- 0x20, 0x01, 0x00, 0xf8,
- 0xdd, 0x17, 0x40, 0x00,
- 0x6d, 0x8d, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x3e,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x14, 0x43, 0x06,
- 0x00, 0x9a, 0x8f, 0xa5,
- 0xc0, 0x3f, 0x61, 0xc9,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x3c, 0x6f, 0x2d,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x86, 0x66, 0x86,
- 0x8d, 0x95, 0xe0, 0x30,
- 0x61, 0xbd, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x3e,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x75, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x38,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x80, 0x03, 0x86,
- 0x00, 0x9a, 0x8b, 0x85,
- 0xc0, 0x3c, 0x60, 0x71,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x30, 0x6d, 0xf5,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x03, 0x86, 0x66, 0x86,
- 0x89, 0x75, 0xe1, 0x28,
- 0x61, 0xc9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x37,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6f, 0x29, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x24,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe2, 0x54, 0x03, 0x06,
- 0x00, 0x9a, 0x87, 0x65,
- 0xc0, 0x2f, 0x61, 0x49,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x16, 0x6f, 0xc9,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x06, 0x66, 0x86,
- 0x85, 0x55, 0xe4, 0x10,
- 0x63, 0xf9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x22,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x59, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x0a,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe6, 0x28, 0x42, 0x06,
- 0x07, 0x21, 0x83, 0x45,
- 0x62, 0xd9, 0x00, 0x9a,
- 0x42, 0x1a, 0xc0, 0x12,
- 0x40, 0x0a, 0xe6, 0x8a,
- 0x40, 0x00, 0x26, 0x87,
- 0x29, 0x59, 0x43, 0x06,
- 0x00, 0x00, 0xc0, 0x00,
- 0x80, 0x02, 0x2d, 0xb9,
- 0x26, 0x86, 0x40, 0x0a,
- 0xa8, 0x24, 0x02, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0xd1, 0x80, 0x00, 0x04,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0xe0, 0x30, 0x02, 0x29,
- 0xe0, 0x90, 0x44, 0x0a,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x42, 0x05,
- 0x84, 0x24, 0x80, 0xf5,
- 0x04, 0x16, 0xa1, 0x2b,
- 0x40, 0x22, 0x80, 0x00,
- 0x44, 0x2a, 0x91, 0x80,
- 0xe4, 0x50, 0x0c, 0x10,
- 0x81, 0x71, 0x23, 0x0b,
- 0xc4, 0x27, 0x81, 0x11,
- 0x90, 0x88, 0x4c, 0x62,
- 0x6f, 0xc8, 0x6c, 0x08,
- 0x98, 0x7e, 0x8c, 0x0b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x61, 0x1e, 0xf0,
- 0x13, 0x3e, 0xc0, 0x01,
- 0x0e, 0x09, 0x80, 0x7b,
- 0x81, 0x21, 0x60, 0x4c,
- 0x60, 0xbc, 0x5e, 0x25,
- 0x5e, 0x25, 0x88, 0x6b,
- 0x81, 0xa1, 0x60, 0xb4,
- 0x0a, 0xf0, 0x1d, 0x0e,
- 0xc0, 0x01, 0x64, 0x51,
- 0x5e, 0x25, 0xdc, 0x34,
- 0x5e, 0x25, 0xe0, 0xac,
- 0x5e, 0x25, 0xe0, 0x9c,
- 0xa1, 0x3b, 0x60, 0x8c,
- 0x06, 0x34, 0x3f, 0x2e,
- 0x5e, 0x25, 0xc1, 0x54,
- 0x5e, 0x25, 0xe1, 0x04,
- 0x5e, 0x25, 0xe1, 0x00,
- 0x5e, 0x25, 0xe0, 0xfc,
- 0x5e, 0x25, 0xe0, 0xf8,
- 0x5e, 0x25, 0xe0, 0xf4,
- 0x5e, 0x25, 0xe0, 0xf0,
- 0x5e, 0x25, 0xe0, 0xec,
- 0x5e, 0x25, 0xe0, 0xe8,
- 0x5e, 0x25, 0xe0, 0xe4,
- 0x5e, 0x25, 0xe0, 0xe0,
- 0x5e, 0x25, 0xe0, 0xdc,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x5e, 0x25, 0xe0, 0xd4,
- 0x5e, 0x25, 0xe0, 0xd0,
- 0x5e, 0x25, 0xe0, 0xcc,
- 0x5e, 0x25, 0xe0, 0xc8,
- 0x5e, 0x25, 0xe0, 0xc4,
- 0x5e, 0x25, 0xe0, 0xc0,
- 0x5e, 0x25, 0xe0, 0xb8,
- 0x5e, 0x25, 0xe0, 0xb0,
- 0x5e, 0x25, 0xe0, 0xa8,
- 0x5e, 0x25, 0xe0, 0xa4,
- 0x5e, 0x25, 0xe0, 0x98,
- 0x5e, 0x25, 0xe0, 0x94,
- 0x5e, 0x25, 0xe0, 0x88,
- 0xbd, 0x2e, 0xe0, 0x84,
- 0x44, 0x3a, 0xbb, 0x2e,
- 0x87, 0x31, 0x46, 0x8e,
- 0x80, 0x0c, 0x0e, 0x25,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x04, 0x24, 0x97, 0x1e,
- 0xa3, 0x2d, 0x81, 0x38,
- 0xc4, 0x00, 0x04, 0x06,
- 0x81, 0x21, 0x19, 0x2e,
- 0x93, 0x14, 0x98, 0x2e,
- 0x60, 0x20, 0x42, 0x31,
- 0x04, 0x2e, 0x81, 0x31,
- 0xe7, 0xc0, 0x02, 0xf0,
- 0x04, 0xf0, 0x0d, 0x1e,
- 0x0b, 0x2e, 0xe7, 0xd0,
- 0xe7, 0xe0, 0x02, 0xf0,
- 0x04, 0xf0, 0x09, 0x1e,
- 0x7e, 0x2e, 0xe7, 0xf0,
- 0x64, 0x01, 0x02, 0xf0,
- 0x7c, 0x1e, 0xc0, 0x01,
- 0x64, 0x11, 0x04, 0xf0,
- 0x3e, 0x2e, 0xc0, 0x01,
- 0x64, 0x31, 0x02, 0xf0,
- 0x3c, 0x1e, 0xc0, 0x01,
- 0x91, 0x0e, 0x83, 0x21,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x55, 0x88,
- 0xe1, 0x14, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x00, 0x3c, 0x58,
- 0xe1, 0x0c, 0x1e, 0x05,
- 0xa1, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x00, 0xb6,
- 0x80, 0x00, 0x4c, 0x05,
- 0x80, 0x00, 0x3b, 0xb8,
- 0x67, 0x60, 0x00, 0xf0,
- 0x64, 0x40, 0x0a, 0xf0,
- 0x0d, 0x0e, 0xc0, 0x01,
- 0xe7, 0x70, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe7, 0x80,
- 0xe7, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe7, 0xa0,
- 0xe7, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0xc0, 0x01, 0x64, 0x21,
- 0x81, 0x21, 0x3c, 0x0e,
- 0x81, 0x31, 0x11, 0x04,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x52, 0x48,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc1, 0x14, 0x1e, 0x05,
- 0xc0, 0x00, 0x00, 0x05,
- 0xc0, 0x00, 0x34, 0x28,
- 0x61, 0x08, 0x1e, 0x05,
- 0xe5, 0x80, 0x08, 0xf0,
- 0x61, 0x0c, 0x1e, 0x15,
- 0xe5, 0x70, 0x0a, 0xf0,
- 0x80, 0x04, 0x81, 0x31,
- 0x81, 0x11, 0x04, 0x24,
- 0xef, 0xfc, 0x4a, 0x68,
- 0x06, 0xf0, 0x33, 0x14,
- 0xb1, 0x04, 0xe5, 0x30,
- 0x7c, 0x3e, 0xaf, 0x24,
- 0xe5, 0x40, 0x06, 0xf0,
- 0x80, 0x4b, 0x3e, 0x3e,
- 0x82, 0x5b, 0x3c, 0x2e,
- 0xef, 0xfc, 0x5a, 0x28,
- 0x81, 0x61, 0x1b, 0x7e,
- 0x2f, 0xb8, 0x91, 0x54,
- 0x0e, 0x09, 0xe0, 0x00,
- 0x81, 0x11, 0x60, 0x40,
- 0xe0, 0x9c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x15,
- 0x40, 0x00, 0x3d, 0x1e,
- 0x1e, 0x05, 0xf3, 0xf8,
- 0xad, 0x0b, 0x60, 0xf4,
- 0xe0, 0x98, 0x5e, 0x15,
- 0xe0, 0x94, 0x5e, 0x15,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x84, 0x5e, 0x15,
- 0xbb, 0x1e, 0xbf, 0x1e,
- 0x88, 0xf5, 0x95, 0x6e,
- 0x60, 0xf0, 0x1e, 0x35,
- 0xe7, 0x10, 0x0c, 0xf0,
- 0x18, 0xf0, 0x00, 0x44,
- 0xab, 0x14, 0xe6, 0xc0,
- 0x7c, 0x6e, 0x8c, 0x30,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0xa9, 0x04, 0xbe, 0xce,
- 0xbc, 0x3e, 0xa7, 0x24,
- 0xef, 0xfc, 0x57, 0x28,
- 0x60, 0xb4, 0x1e, 0x15,
- 0xe7, 0x00, 0x06, 0xf0,
- 0x60, 0xb0, 0x1e, 0x05,
- 0x1e, 0x25, 0x8c, 0x4b,
- 0x51, 0xb8, 0xe0, 0xc4,
- 0x1e, 0x25, 0xef, 0xfc,
- 0x1e, 0x35, 0xe0, 0xdc,
- 0x1e, 0x05, 0xe0, 0xd8,
- 0x1e, 0x15, 0xe0, 0xc0,
- 0x81, 0x95, 0xe0, 0xc4,
- 0xe0, 0xf0, 0x1e, 0x15,
- 0xe0, 0xdc, 0x1e, 0x25,
- 0xe0, 0xd8, 0x1e, 0x35,
- 0x84, 0x10, 0x80, 0x04,
- 0x08, 0xf0, 0x08, 0x24,
- 0x0c, 0x30, 0xe5, 0xc0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0xef, 0xf8, 0x73, 0x48,
- 0x81, 0x91, 0x01, 0x81,
- 0x0e, 0x09, 0xa9, 0xd5,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0x75,
- 0x0c, 0xf0, 0x60, 0xf8,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x60, 0xfc,
- 0xab, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x29, 0x04,
- 0xa7, 0x24, 0xe1, 0x7c,
- 0x52, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x4d, 0x88,
- 0xe0, 0xe4, 0x1e, 0x25,
- 0xe0, 0xe0, 0x1e, 0x35,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0x1e, 0x05, 0x81, 0xd5,
- 0x1e, 0x15, 0xe0, 0xfc,
- 0x1e, 0x25, 0xe0, 0xf8,
- 0x1e, 0x35, 0xe0, 0xe4,
- 0x00, 0x05, 0xe0, 0xe0,
- 0x02, 0x11, 0xfc, 0x20,
- 0x04, 0x25, 0xfc, 0x24,
- 0x08, 0xf0, 0x7c, 0x20,
- 0x06, 0x31, 0xe7, 0x50,
- 0x0a, 0xf0, 0x7c, 0x24,
- 0x6e, 0xb8, 0xe7, 0x40,
- 0x1e, 0x25, 0xef, 0xf8,
- 0xa3, 0x2d, 0xe0, 0xd4,
- 0xdc, 0x04, 0x80, 0x95,
- 0x82, 0xc5, 0xa1, 0x0b,
- 0x60, 0xd0, 0x1e, 0x15,
- 0x08, 0xf0, 0x84, 0x0b,
- 0x0a, 0xf0, 0x67, 0x50,
- 0x19, 0x24, 0xe7, 0x40,
- 0x6d, 0x98, 0x9d, 0x31,
- 0x1e, 0x25, 0xef, 0xf8,
- 0x1e, 0x35, 0xe0, 0xd4,
- 0x08, 0xf0, 0x60, 0xd0,
- 0x0a, 0xf0, 0xe6, 0xa0,
- 0x83, 0x01, 0x66, 0x90,
- 0x6f, 0xf8, 0x7d, 0xe8,
- 0x0e, 0x09, 0x81, 0x11,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0xf5,
- 0x0c, 0xf0, 0x61, 0x00,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x61, 0x04,
- 0xb3, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x31, 0x04,
- 0xaf, 0x24, 0xe1, 0x7c,
- 0x4c, 0xb8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x47, 0x48,
- 0xe0, 0xec, 0x1e, 0x15,
- 0xe0, 0xe8, 0x1e, 0x25,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xfc, 0x20, 0x02, 0x45,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0xfc, 0x24, 0x04, 0x31,
- 0x1e, 0x05, 0x83, 0x15,
- 0x1e, 0x35, 0xe1, 0x04,
- 0x1e, 0x15, 0xe0, 0xe8,
- 0x1e, 0x25, 0xe0, 0xec,
- 0x00, 0x05, 0xe1, 0x00,
- 0x02, 0x45, 0xfc, 0x20,
- 0x04, 0x11, 0xfc, 0x20,
- 0x06, 0x31, 0xfc, 0x24,
- 0x28, 0x2b, 0xfc, 0x24,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x6f, 0xf8, 0x68, 0x48,
- 0xe7, 0x20, 0x0a, 0xf0,
- 0xa5, 0x8e, 0xa3, 0x9e,
- 0xa1, 0x0b, 0xdc, 0x04,
- 0x17, 0x14, 0x84, 0x25,
- 0x53, 0x38, 0x8e, 0x0b,
- 0x1e, 0x05, 0xef, 0xfc,
- 0x80, 0x2b, 0x60, 0xcc,
- 0x60, 0xc8, 0x1e, 0x15,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x67, 0x20, 0x0a, 0xf0,
- 0x66, 0xd8, 0x9d, 0x31,
- 0x1e, 0x65, 0xef, 0xf8,
- 0x12, 0xf0, 0x60, 0xcc,
- 0x1e, 0x35, 0xe7, 0x40,
- 0x0e, 0xf0, 0x60, 0xc8,
- 0xfc, 0x9e, 0xe6, 0xe0,
- 0x0a, 0x64, 0x3e, 0x7e,
- 0x1e, 0x15, 0xe1, 0x7c,
- 0x8c, 0x4b, 0x60, 0xac,
- 0xe0, 0xa8, 0x1e, 0x05,
- 0xe0, 0xa4, 0x1e, 0x25,
- 0xbc, 0x3e, 0x9f, 0x3e,
- 0x46, 0xf8, 0xa1, 0x5e,
- 0x1e, 0xb5, 0xef, 0xfc,
- 0x1e, 0x85, 0xe0, 0xbc,
- 0x1e, 0xa5, 0xe0, 0xb8,
- 0x96, 0x1b, 0xe0, 0xd0,
- 0x6d, 0x38, 0x90, 0x0b,
- 0x94, 0x2b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x67, 0x05, 0x00, 0xea,
- 0x42, 0x0a, 0xc9, 0x27,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0xa5, 0xed, 0x80,
- 0x72, 0x7d, 0x10, 0x06,
- 0x81, 0x01, 0x40, 0x02,
- 0x60, 0xb8, 0x5e, 0x85,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x81, 0xb1, 0x60, 0xbc,
- 0xe0, 0xd0, 0x5e, 0x05,
- 0x60, 0x9c, 0x1e, 0x15,
- 0xe6, 0x50, 0x06, 0xf0,
- 0x06, 0xf0, 0x7c, 0x3e,
- 0x3e, 0x3e, 0xe6, 0x60,
- 0x1e, 0x05, 0x90, 0x4b,
- 0x96, 0x5b, 0x60, 0x98,
- 0xe0, 0x94, 0x1e, 0x25,
- 0x66, 0xb8, 0xbc, 0xae,
- 0x1f, 0x34, 0xef, 0xf8,
- 0xfc, 0x9e, 0x8c, 0x4b,
- 0x1e, 0x15, 0xbe, 0x7e,
- 0x1e, 0x05, 0xe0, 0xbc,
- 0x1e, 0x25, 0xe0, 0xb8,
- 0xbc, 0x3e, 0xe0, 0xd0,
- 0x42, 0xb8, 0xa1, 0x54,
- 0x1e, 0x35, 0xef, 0xfc,
- 0x18, 0xf0, 0x60, 0xd0,
- 0x7c, 0xce, 0xe6, 0x10,
- 0xe6, 0x20, 0x18, 0xf0,
- 0x1e, 0x15, 0xbe, 0xce,
- 0x1e, 0x05, 0xe0, 0x8c,
- 0x1e, 0x25, 0xe0, 0x88,
- 0x1e, 0x55, 0xe0, 0x84,
- 0x1e, 0x45, 0xe0, 0xbc,
- 0xbc, 0x3e, 0xe0, 0xb8,
- 0xef, 0xf8, 0x64, 0x88,
- 0x60, 0xa4, 0x1e, 0x35,
- 0xe5, 0xd0, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe5, 0xe0,
- 0xbd, 0x04, 0xbf, 0x14,
- 0x1e, 0x55, 0xbb, 0x24,
- 0x1e, 0x45, 0xe0, 0xac,
- 0xbc, 0x3e, 0xe0, 0xa8,
- 0xef, 0xf8, 0x63, 0x68,
- 0xa5, 0x84, 0xa3, 0x94,
- 0x82, 0x91, 0x9b, 0x74,
- 0x9d, 0x04, 0x88, 0x81,
- 0x2b, 0x28, 0x93, 0x0b,
- 0x39, 0x44, 0xdf, 0xfc,
- 0xe5, 0xd0, 0x0c, 0xf0,
- 0x0e, 0xf0, 0x37, 0x34,
- 0xfc, 0x6e, 0xe5, 0xe0,
- 0x0a, 0x44, 0x3e, 0x7e,
- 0xbf, 0x14, 0xe1, 0x7c,
- 0xbb, 0x24, 0xbd, 0x04,
- 0x7e, 0xb8, 0xbc, 0x3e,
- 0x7c, 0x6e, 0xef, 0xf8,
- 0x3e, 0x7e, 0x81, 0x31,
- 0x3f, 0x14, 0x83, 0x41,
- 0xbd, 0x04, 0x81, 0x51,
- 0xbc, 0x3e, 0xbb, 0x24,
- 0xef, 0xf8, 0x61, 0x28,
- 0x81, 0x51, 0x39, 0x04,
- 0xbb, 0x94, 0xb7, 0x14,
- 0x3d, 0x44, 0xbf, 0x34,
- 0xe9, 0x84, 0x04, 0x04,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x37, 0x6e, 0xbe, 0x61,
- 0xf1, 0x84, 0x42, 0x62,
- 0x6c, 0x80, 0x04, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x7b, 0x88, 0x50, 0x12,
- 0x9c, 0x00, 0x4a, 0x00,
- 0x6c, 0x7c, 0x0e, 0x82,
- 0x81, 0x7c, 0x00, 0x04,
- 0x6f, 0x9c, 0x02, 0x54,
- 0xec, 0x00, 0x04, 0x74,
- 0x54, 0x22, 0x0c, 0x9d,
- 0x16, 0x04, 0xf8, 0x84,
- 0xae, 0x83, 0x68, 0x9c,
- 0x82, 0xa5, 0xa5, 0x5e,
- 0x71, 0x98, 0x44, 0x92,
- 0x62, 0x38, 0x88, 0x0b,
- 0x86, 0x1b, 0x6f, 0xc4,
- 0x82, 0x3b, 0x00, 0x4b,
- 0x8c, 0x9b, 0x3d, 0x4e,
- 0xbb, 0x6e, 0xbf, 0x3e,
- 0xb4, 0xbf, 0x37, 0x9d,
- 0x14, 0x82, 0x02, 0xf5,
- 0x04, 0x90, 0xec, 0x04,
- 0x88, 0x0b, 0x6c, 0x28,
- 0x6f, 0xc4, 0x61, 0x28,
- 0x00, 0x4b, 0x86, 0x1b,
- 0x3d, 0x4e, 0x95, 0x91,
- 0xbf, 0x3e, 0x82, 0x3b,
- 0x25, 0x24, 0xbb, 0x9e,
- 0xf9, 0x8c, 0x40, 0x42,
- 0x02, 0xb4, 0x21, 0x0b,
- 0x02, 0x35, 0xe8, 0xa8,
- 0xe8, 0x9c, 0x00, 0x24,
- 0x83, 0x41, 0x01, 0x21,
- 0x83, 0x21, 0x3f, 0x2e,
- 0x81, 0x31, 0x3d, 0x2e,
- 0x6f, 0xc4, 0x45, 0xa8,
- 0x3f, 0x1e, 0x88, 0x2b,
- 0x1e, 0x15, 0xb2, 0x63,
- 0x0e, 0xf0, 0x60, 0x9c,
- 0x1e, 0x35, 0xe6, 0x60,
- 0x1e, 0x25, 0xe0, 0x98,
- 0x3b, 0x6e, 0xe0, 0x94,
- 0xe6, 0x50, 0x0c, 0xf0,
- 0x86, 0x0b, 0x3d, 0x0e,
- 0x86, 0x4b, 0x7c, 0x6e,
- 0x82, 0x5b, 0x3e, 0x7e,
- 0x77, 0x58, 0xbc, 0x2e,
- 0xbb, 0x34, 0xef, 0xf8,
- 0xbe, 0x7e, 0xfc, 0x6e,
- 0xe0, 0x9c, 0x1e, 0x15,
- 0xe0, 0x98, 0x1e, 0x05,
- 0xe0, 0x94, 0x1e, 0x25,
- 0xbd, 0x44, 0xbf, 0x54,
- 0x76, 0x78, 0xbc, 0x3e,
- 0x1e, 0x35, 0xef, 0xf8,
- 0x81, 0x71, 0x60, 0x98,
- 0xe0, 0x9c, 0x1e, 0x55,
- 0xe0, 0x8c, 0x1e, 0x15,
- 0x60, 0x94, 0x1e, 0x35,
- 0xf1, 0x8c, 0x48, 0x72,
- 0x73, 0x94, 0x4a, 0x72,
- 0xe6, 0x10, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe6, 0x20,
- 0xe0, 0x88, 0x1e, 0x05,
- 0xe0, 0x84, 0x1e, 0x25,
- 0x57, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x65, 0xef, 0xf8,
- 0xff, 0x01, 0x60, 0x8c,
- 0xe0, 0x84, 0x1e, 0x85,
- 0x1e, 0x95, 0x80, 0x6d,
- 0x0c, 0x06, 0x40, 0x88,
- 0x5e, 0x75, 0x80, 0x00,
- 0x8c, 0x1b, 0x00, 0x8c,
- 0x00, 0x88, 0x5e, 0x75,
- 0x12, 0x06, 0x90, 0x2b,
- 0x5a, 0x78, 0x80, 0x00,
- 0x92, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x64, 0x01, 0x00, 0xea,
- 0x42, 0x0a, 0xc1, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0x25, 0xed, 0x80,
- 0x60, 0x8c, 0x5e, 0x75,
- 0x5e, 0x05, 0xff, 0x01,
- 0x81, 0xa1, 0x60, 0x88,
- 0xff, 0x01, 0x03, 0x05,
- 0xe0, 0x44, 0x10, 0x8a,
- 0x04, 0x80, 0x82, 0xf5,
- 0x92, 0x0b, 0x6c, 0x40,
- 0x6f, 0xc4, 0x58, 0x88,
- 0x81, 0xa1, 0x8c, 0x1b,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x05,
- 0x91, 0x54, 0x9b, 0x74,
- 0x21, 0x01, 0x85, 0x55,
- 0x30, 0x03, 0xe1, 0x11,
- 0x44, 0x02, 0xb0, 0x13,
- 0x01, 0x0a, 0x7b, 0x84,
- 0x12, 0x1b, 0xe4, 0x7c,
- 0xec, 0x7c, 0x00, 0x22,
- 0x40, 0x00, 0x02, 0x06,
- 0x9c, 0x00, 0x52, 0x60,
- 0x6f, 0x80, 0x06, 0x14,
- 0xec, 0x00, 0x08, 0x04,
- 0xa1, 0x9f, 0x20, 0x23,
- 0x46, 0x42, 0x11, 0x54,
- 0x26, 0x9f, 0xf8, 0x8c,
- 0xec, 0x04, 0x04, 0x22,
- 0x00, 0x14, 0x1b, 0x74,
- 0x25, 0x9f, 0xe8, 0x80,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x5e, 0x95, 0xe0, 0x88,
- 0x95, 0x64, 0xe0, 0x8c,
- 0x1e, 0x25, 0x93, 0x34,
- 0x1e, 0x45, 0xe1, 0x04,
- 0x02, 0x64, 0x60, 0xf8,
- 0x1e, 0x35, 0xe0, 0x88,
- 0x86, 0x13, 0x61, 0x00,
- 0x82, 0x61, 0x46, 0x0e,
- 0x1e, 0x15, 0x9d, 0xc4,
- 0x00, 0xc4, 0xe0, 0xfc,
- 0x98, 0x33, 0x60, 0x88,
- 0x80, 0x13, 0x00, 0x23,
- 0x61, 0x04, 0x5e, 0x25,
- 0x1e, 0x25, 0x98, 0x43,
- 0x5e, 0x35, 0xe0, 0xf4,
- 0x1e, 0x35, 0xe1, 0x00,
- 0x5e, 0x15, 0xe0, 0xf0,
- 0x88, 0x21, 0x60, 0xfc,
- 0xe0, 0xec, 0x1e, 0x15,
- 0x60, 0xf4, 0x5e, 0x25,
- 0x1e, 0x25, 0x82, 0x31,
- 0x5e, 0x45, 0xe0, 0xe4,
- 0x80, 0x13, 0x60, 0xf8,
- 0xe0, 0xe8, 0x1e, 0x45,
- 0x60, 0xdc, 0x1e, 0x05,
- 0x5e, 0x35, 0x80, 0x23,
- 0x1e, 0x35, 0xe0, 0xf0,
- 0x98, 0x43, 0x60, 0xe0,
- 0x60, 0xec, 0x5e, 0x15,
- 0x1e, 0x15, 0x88, 0x01,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x98, 0x33, 0x60, 0xe4,
- 0x60, 0xe8, 0x5e, 0x45,
- 0x5e, 0x35, 0xa1, 0x21,
- 0x82, 0x11, 0x60, 0xe0,
- 0xe0, 0x84, 0x5e, 0x25,
- 0xe0, 0xdc, 0x5e, 0x05,
- 0xe0, 0xd8, 0x5e, 0x15,
- 0x10, 0x68, 0x8b, 0x6b,
- 0x13, 0x04, 0xdf, 0xfc,
- 0x01, 0xb5, 0x81, 0x11,
- 0x41, 0x24, 0x98, 0x01,
- 0xec, 0x04, 0x0a, 0x50,
- 0x45, 0x4a, 0x9e, 0x34,
- 0x04, 0x0c, 0xe4, 0x0c,
- 0x84, 0x13, 0xe2, 0x00,
- 0xfc, 0xd5, 0xa1, 0x5b,
- 0xe0, 0x58, 0x0e, 0x09,
- 0x1e, 0x05, 0x93, 0x34,
- 0x81, 0x1d, 0x61, 0x14,
- 0xe2, 0x00, 0x04, 0x0c,
- 0x8e, 0xae, 0x8c, 0x2e,
- 0x46, 0x11, 0x80, 0x04,
- 0x89, 0x11, 0x60, 0x24,
- 0xa5, 0x0b, 0x93, 0x24,
- 0xc0, 0x00, 0x02, 0x66,
- 0xe0, 0x20, 0x44, 0x11,
- 0xa5, 0x0b, 0x17, 0x34,
- 0x93, 0x14, 0x86, 0x45,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xce, 0x14, 0x80, 0xe5,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x00, 0x30, 0x0e, 0x25,
- 0x0e, 0x19, 0x84, 0x30,
- 0xad, 0x1b, 0xe0, 0x40,
- 0x40, 0x0c, 0x06, 0x15,
- 0xc4, 0x30, 0x00, 0x30,
- 0xab, 0x0b, 0x8a, 0xf5,
- 0x80, 0x0c, 0x06, 0x05,
- 0x9c, 0x94, 0x00, 0x04,
- 0x80, 0x0c, 0x46, 0x05,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xa5, 0x1b, 0x80, 0x14,
- 0x0e, 0x19, 0x82, 0x75,
- 0x04, 0x10, 0xe0, 0x40,
- 0xa1, 0x1b, 0x6c, 0x18,
- 0xe4, 0x08, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xce, 0x14, 0x88, 0xf5,
- 0xe0, 0x44, 0x0e, 0x29,
- 0xf0, 0xc0, 0x42, 0x10,
- 0x44, 0x10, 0x29, 0x2b,
- 0xce, 0x2e, 0xfc, 0x04,
- 0x80, 0x04, 0x80, 0xf5,
- 0x42, 0x10, 0xa5, 0x0b,
- 0x46, 0x15, 0x9c, 0x0c,
- 0xce, 0x14, 0x80, 0x0c,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x00, 0x30, 0x82, 0x05,
- 0x89, 0x21, 0x64, 0x30,
- 0x91, 0x21, 0x81, 0x25,
- 0x80, 0x1e, 0xa4, 0x1f,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x42, 0x01, 0x93, 0x14,
- 0x1e, 0xf0, 0xe0, 0x28,
- 0xc0, 0x01, 0x64, 0x61,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xa3, 0x1b, 0xdd, 0x93,
- 0x93, 0x14, 0xfa, 0x35,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xfd, 0x45, 0xf4, 0xa5,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x82, 0x9b, 0x23, 0x3e,
- 0xe0, 0x98, 0x1e, 0x35,
- 0xa5, 0x0e, 0xab, 0x4e,
- 0x06, 0x19, 0xa7, 0x3e,
- 0x1e, 0xb5, 0xe0, 0x90,
- 0x00, 0x89, 0xe0, 0xa8,
- 0x80, 0x13, 0xe0, 0x48,
- 0x60, 0x70, 0x02, 0x61,
- 0xac, 0x1e, 0x81, 0x11,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x4c, 0x00, 0x19,
- 0xa9, 0x1e, 0xe6, 0x24,
- 0x60, 0x50, 0x00, 0xa9,
- 0xe0, 0x80, 0x44, 0x0a,
- 0x97, 0x5e, 0xce, 0x78,
- 0x24, 0x14, 0x82, 0xe5,
- 0xe0, 0x84, 0x44, 0x1a,
- 0x02, 0x0c, 0xa1, 0x1b,
- 0xa4, 0x1e, 0xe2, 0x00,
- 0xa0, 0x00, 0x00, 0x78,
- 0x92, 0x1b, 0x01, 0x01,
- 0xef, 0xf8, 0x74, 0xe8,
- 0x44, 0x0a, 0xe6, 0x24,
- 0x00, 0x16, 0xe0, 0x88,
- 0x42, 0x90, 0x40, 0x00,
- 0x74, 0x58, 0xdc, 0x00,
- 0x00, 0xf0, 0xcf, 0xf8,
- 0x0a, 0xf0, 0x65, 0x60,
- 0x0d, 0x0e, 0xe5, 0xd0,
- 0xe5, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe5, 0x70,
- 0xe5, 0xa0, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe5, 0x80,
- 0xe5, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0x3c, 0x0e, 0xe5, 0xc0,
- 0x29, 0x14, 0x83, 0x21,
- 0x0c, 0x3b, 0x94, 0x0b,
- 0x52, 0x78, 0x92, 0x4b,
- 0x66, 0x04, 0xef, 0xf8,
- 0xe1, 0x31, 0x81, 0x11,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0xc0, 0x74, 0x1e, 0x05,
- 0xc0, 0x00, 0x40, 0x15,
- 0x12, 0x05, 0xa7, 0x44,
- 0x08, 0x19, 0xc0, 0x0c,
- 0x86, 0x0f, 0xe0, 0x94,
- 0x25, 0x54, 0xe6, 0x0e,
- 0xfc, 0x10, 0x44, 0x10,
- 0x1f, 0xe8, 0xab, 0x2b,
- 0x15, 0x9e, 0xc0, 0x00,
- 0x1c, 0x08, 0xa1, 0x6d,
- 0xbb, 0x04, 0xc0, 0x00,
- 0xa5, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x1f, 0x58,
- 0x60, 0xa0, 0x1e, 0x05,
- 0x14, 0x70, 0xc8, 0x77,
- 0x00, 0x25, 0xe4, 0x40,
- 0x94, 0x04, 0xe0, 0x10,
- 0xff, 0x01, 0x00, 0x23,
- 0x00, 0x24, 0x80, 0x2d,
- 0x52, 0x0a, 0xc1, 0xac,
- 0x82, 0x15, 0xc1, 0x2a,
- 0xd7, 0x07, 0xa4, 0x0b,
- 0x40, 0x0a, 0xa0, 0x0b,
- 0x12, 0x00, 0xe1, 0xaa,
- 0x0a, 0x09, 0xec, 0x04,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x44, 0x20, 0xe0, 0x94,
- 0x40, 0x07, 0x13, 0xfd,
- 0xc0, 0xc0, 0x06, 0x94,
- 0x40, 0x28, 0x1e, 0x25,
- 0xd9, 0x88, 0x46, 0x32,
- 0x40, 0x08, 0x44, 0x35,
- 0x0a, 0x19, 0xab, 0x1b,
- 0x08, 0x25, 0x80, 0x68,
- 0xab, 0x34, 0xe0, 0x18,
- 0x52, 0x92, 0x23, 0x14,
- 0x0c, 0x24, 0x90, 0x84,
- 0x84, 0x18, 0xe1, 0x20,
- 0xa7, 0x1b, 0x52, 0x18,
- 0x06, 0x29, 0x82, 0x15,
- 0x85, 0x1b, 0xe0, 0x2c,
- 0x06, 0x29, 0x84, 0x15,
- 0x81, 0x75, 0xe0, 0x28,
- 0xe0, 0x24, 0x06, 0x29,
- 0x82, 0x35, 0x85, 0x1b,
- 0xe0, 0x20, 0x06, 0x29,
- 0x82, 0x11, 0x02, 0x21,
- 0x4c, 0x2a, 0x9f, 0x1e,
- 0x81, 0x35, 0xe6, 0x9a,
- 0x9f, 0x1e, 0x83, 0x11,
- 0x88, 0x25, 0xa1, 0x6b,
- 0x02, 0x64, 0x1f, 0x24,
- 0x83, 0x2d, 0xe0, 0x84,
- 0x08, 0x15, 0x86, 0x85,
- 0x40, 0x0a, 0x60, 0x20,
- 0x9d, 0x6e, 0xe0, 0x88,
- 0xe6, 0xa2, 0x46, 0x1a,
- 0x84, 0xd5, 0x9b, 0x3e,
- 0x40, 0x3a, 0x9f, 0x24,
- 0x81, 0x31, 0x66, 0xa2,
- 0x60, 0x0a, 0x44, 0x2e,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x77, 0x58, 0x93, 0x2e,
- 0x04, 0x14, 0xef, 0xc0,
- 0xa1, 0x2b, 0xe1, 0x94,
- 0x0c, 0x24, 0x8e, 0x25,
- 0x87, 0xe5, 0xf6, 0x80,
- 0xac, 0x0e, 0x89, 0x01,
- 0x1f, 0x04, 0xb1, 0x55,
- 0xe1, 0x94, 0x02, 0x34,
- 0x76, 0x80, 0x02, 0x14,
- 0xe0, 0x00, 0x44, 0x06,
- 0x8e, 0xbb, 0x1f, 0x74,
- 0x76, 0x80, 0x00, 0x04,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x00, 0x10, 0x20, 0x23,
- 0x19, 0x2e, 0xec, 0x18,
- 0x33, 0x44, 0x80, 0x2d,
- 0x91, 0x88, 0x42, 0x02,
- 0x08, 0x84, 0x00, 0x34,
- 0x84, 0x14, 0x02, 0x10,
- 0x51, 0x80, 0x42, 0x22,
- 0xc0, 0x00, 0x04, 0x56,
- 0x00, 0x34, 0x2d, 0x34,
- 0x40, 0x0a, 0xc9, 0x04,
- 0x42, 0x22, 0x66, 0x9e,
- 0xbd, 0x1e, 0xd1, 0x84,
- 0x8c, 0x30, 0x90, 0x24,
- 0xe0, 0x9a, 0x40, 0x0a,
- 0xef, 0xf4, 0x6f, 0xc8,
- 0xad, 0x14, 0xbd, 0x04,
- 0x40, 0x7e, 0x84, 0x06,
- 0x93, 0x0e, 0xe0, 0x1e,
- 0x04, 0x04, 0x8d, 0xa5,
- 0x06, 0x14, 0x61, 0x94,
- 0xa6, 0x2f, 0xe0, 0xec,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x04, 0x60, 0xc0, 0x61,
- 0x80, 0x4b, 0x6c, 0x14,
- 0x64, 0x7c, 0x05, 0x0a,
- 0x48, 0x10, 0x8e, 0xbb,
- 0x02, 0x60, 0x1c, 0x00,
- 0x1d, 0x74, 0xec, 0x94,
- 0xfb, 0x84, 0x42, 0x22,
- 0xec, 0x7c, 0x06, 0x12,
- 0x68, 0x8c, 0x0a, 0x44,
- 0x48, 0x00, 0x81, 0x41,
- 0x18, 0x34, 0x1c, 0x00,
- 0x00, 0x44, 0xec, 0x00,
- 0x44, 0x7a, 0x6f, 0x8c,
- 0x40, 0xc2, 0xe6, 0xaa,
- 0xa6, 0x13, 0x78, 0x80,
- 0x00, 0x12, 0x20, 0x5f,
- 0x02, 0x54, 0xec, 0x04,
- 0x00, 0x44, 0x68, 0x80,
- 0x44, 0x2a, 0xe8, 0x8c,
- 0x81, 0x31, 0x66, 0x9e,
- 0xef, 0xc0, 0x67, 0x28,
- 0x80, 0x2b, 0x27, 0x04,
- 0xab, 0x2e, 0xc0, 0x08,
- 0x4e, 0x62, 0xa3, 0x1e,
- 0x84, 0x0b, 0x71, 0x80,
- 0x6f, 0xc0, 0x75, 0xe8,
- 0x1d, 0x64, 0x8e, 0x2b,
- 0x00, 0x14, 0xa1, 0x1b,
- 0x00, 0x04, 0xd6, 0x80,
- 0x00, 0x00, 0x96, 0x80,
- 0xae, 0x03, 0x84, 0x80,
- 0xe0, 0x80, 0x01, 0x0a,
- 0xc0, 0x54, 0x1e, 0x05,
- 0x42, 0x16, 0x82, 0x95,
- 0x2b, 0x04, 0xe0, 0x00,
- 0xf1, 0x80, 0x44, 0x12,
- 0xa3, 0x14, 0xa1, 0x2e,
- 0xef, 0xc0, 0x74, 0x68,
- 0xa2, 0x73, 0xa1, 0x14,
- 0x0a, 0xf0, 0x33, 0x44,
- 0xad, 0x14, 0xe5, 0xe0,
- 0x90, 0x24, 0xbd, 0x7e,
- 0x8e, 0x1b, 0x04, 0x30,
- 0xef, 0xf4, 0x69, 0x68,
- 0x46, 0x06, 0x1f, 0x24,
- 0xbd, 0x04, 0xe0, 0x00,
- 0x04, 0x24, 0xad, 0x14,
- 0xa4, 0x33, 0xf6, 0x80,
- 0x99, 0x3e, 0x84, 0x06,
- 0x60, 0x9c, 0x1e, 0x05,
- 0x25, 0x54, 0x9e, 0xb1,
- 0xa7, 0x44, 0x81, 0xc1,
- 0x40, 0x6a, 0xab, 0x0e,
- 0x92, 0x6b, 0x66, 0x9a,
- 0x93, 0xb5, 0x91, 0x0e,
- 0xf0, 0x84, 0x44, 0x92,
- 0x04, 0x0c, 0xd5, 0x2d,
- 0x0a, 0x29, 0xe2, 0x00,
- 0xa4, 0x0f, 0x60, 0x64,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x44, 0x4a, 0x80, 0x85,
- 0x86, 0x65, 0xe0, 0x90,
- 0xe1, 0x7c, 0x06, 0x64,
- 0x06, 0x63, 0x96, 0x3f,
- 0x95, 0x6d, 0x94, 0x3b,
- 0x40, 0x00, 0x06, 0x06,
- 0xe0, 0x8c, 0x44, 0x0a,
- 0x40, 0x54, 0x1e, 0x35,
- 0x04, 0x64, 0xa6, 0x63,
- 0x44, 0x22, 0xe0, 0x88,
- 0x04, 0x20, 0xd0, 0x8c,
- 0xc0, 0x09, 0x04, 0x01,
- 0x90, 0x90, 0x44, 0x22,
- 0x84, 0xa0, 0x04, 0x20,
- 0x84, 0x73, 0x88, 0x24,
- 0x82, 0x11, 0x02, 0x61,
- 0xf4, 0xb5, 0x83, 0x8b,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x0a, 0x09, 0x80, 0xc5,
- 0x40, 0x4a, 0xe0, 0x64,
- 0x98, 0xa5, 0xe0, 0x90,
- 0x00, 0x74, 0x1b, 0x14,
- 0x19, 0x34, 0xe0, 0x94,
- 0xe0, 0x88, 0x0a, 0xc4,
- 0xa2, 0x03, 0xb7, 0x44,
- 0xf0, 0x80, 0x04, 0x04,
- 0xe1, 0x94, 0x02, 0x24,
- 0xf6, 0x80, 0x02, 0x14,
- 0xec, 0x18, 0x02, 0x10,
- 0x42, 0x12, 0x82, 0x3d,
- 0x04, 0x24, 0x91, 0x8c,
- 0x02, 0x10, 0x08, 0x84,
- 0x42, 0x32, 0x84, 0x14,
- 0x06, 0x56, 0x51, 0x84,
- 0x04, 0x24, 0xc0, 0x00,
- 0x42, 0x32, 0x49, 0x04,
- 0x1f, 0x34, 0xd1, 0x84,
- 0x9d, 0x04, 0xa1, 0x0d,
- 0x44, 0x2a, 0xbd, 0x1e,
- 0xb1, 0x34, 0xe6, 0x8e,
- 0xe0, 0x82, 0x40, 0x2a,
- 0x7c, 0x14, 0x08, 0x25,
- 0x06, 0x31, 0x8a, 0x43,
- 0x21, 0x5e, 0xfc, 0x30,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0a, 0xf0, 0x23, 0xce,
- 0x61, 0x78, 0xe5, 0xe0,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xb1, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0xe0, 0x64, 0x0a, 0x09,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x93, 0x04, 0x88, 0x85,
- 0xb5, 0x44, 0xa1, 0x24,
- 0xe6, 0x9e, 0x40, 0x0a,
- 0x84, 0x7b, 0x2f, 0x34,
- 0xf6, 0x80, 0x02, 0x04,
- 0xa4, 0x1d, 0x11, 0x54,
- 0x80, 0x00, 0x02, 0x06,
- 0xcc, 0x08, 0x02, 0x10,
- 0xa3, 0x0f, 0x3d, 0x1e,
- 0x7c, 0x1c, 0x08, 0x25,
- 0x40, 0x0a, 0x8e, 0x43,
- 0x0a, 0xf0, 0x60, 0x16,
- 0x06, 0x31, 0xe5, 0xe0,
- 0x5e, 0xf8, 0xfc, 0x30,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xaf, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0x90, 0x93, 0x02, 0xc1,
- 0x81, 0xcb, 0xa9, 0x04,
- 0x40, 0x00, 0x0e, 0x06,
- 0xc0, 0x00, 0x02, 0x06,
- 0x00, 0x06, 0x62, 0x55,
- 0x97, 0x14, 0xc0, 0x00,
- 0x0a, 0x49, 0xb9, 0x34,
- 0x84, 0x08, 0xe0, 0x54,
- 0x8c, 0x24, 0x86, 0x18,
- 0xe6, 0x82, 0x40, 0x1a,
- 0xe4, 0x04, 0x02, 0x20,
- 0xe6, 0x92, 0x48, 0x0a,
- 0x89, 0x1b, 0x8c, 0x1e,
- 0x3b, 0x04, 0x80, 0xd5,
- 0x80, 0x1e, 0x85, 0x11,
- 0x83, 0x65, 0x95, 0x34,
- 0xa1, 0x2d, 0x15, 0x34,
- 0xa1, 0x0b, 0x84, 0x75,
- 0x0a, 0x29, 0x84, 0x25,
- 0x04, 0x24, 0xe0, 0x40,
- 0x04, 0x0a, 0xfc, 0x00,
- 0x82, 0x55, 0xf0, 0x18,
- 0xe1, 0x82, 0x40, 0x1a,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x02, 0x56, 0x00, 0x74,
- 0x40, 0x15, 0x80, 0x00,
- 0x0a, 0x09, 0x80, 0x00,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x82, 0x85, 0xe0, 0x80,
- 0x80, 0x14, 0xbb, 0x04,
- 0x06, 0x15, 0xa5, 0x1b,
- 0x42, 0x10, 0x80, 0x0c,
- 0x46, 0x15, 0x9c, 0x10,
- 0x83, 0x11, 0x00, 0x0c,
- 0x1e, 0xf0, 0x80, 0x1e,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x60, 0x50, 0x00, 0x19,
- 0x00, 0x29, 0x82, 0x6b,
- 0x81, 0xc1, 0x60, 0x4c,
- 0x0a, 0x10, 0x90, 0xce,
- 0x0e, 0x14, 0x64, 0x0c,
- 0x00, 0x59, 0xe0, 0x88,
- 0x52, 0x50, 0x60, 0x64,
- 0xc0, 0x01, 0x73, 0xf0,
- 0x66, 0x86, 0x50, 0x2a,
- 0x48, 0xc5, 0x92, 0x73,
- 0x12, 0x80, 0xe0, 0x10,
- 0xc4, 0x87, 0x64, 0x0c,
- 0x73, 0xf1, 0x52, 0x90,
- 0x90, 0x73, 0x41, 0xff,
- 0x60, 0x84, 0x4a, 0x0a,
- 0x10, 0x06, 0x92, 0x73,
- 0x40, 0x40, 0x00, 0x01,
- 0x4c, 0x85, 0x90, 0x71,
- 0x52, 0x92, 0x40, 0x04,
- 0x4e, 0x72, 0x90, 0xa0,
- 0x10, 0x06, 0x10, 0xa4,
- 0x4c, 0xc5, 0x80, 0x00,
- 0x12, 0x74, 0x00, 0x04,
- 0x4a, 0x0a, 0xe1, 0x88,
- 0xb2, 0x8f, 0x60, 0x80,
- 0x0e, 0x74, 0x1a, 0x8e,
- 0x10, 0x84, 0x80, 0x84,
- 0xa8, 0x71, 0x1c, 0xc4,
- 0x00, 0x04, 0x4c, 0x85,
- 0xdc, 0xc0, 0x10, 0x84,
- 0x40, 0x04, 0x4c, 0x85,
- 0x60, 0x44, 0x0e, 0x8a,
- 0x08, 0xa5, 0xc0, 0x18,
- 0x80, 0x00, 0x00, 0x66,
- 0xe0, 0x40, 0x00, 0x79,
- 0x86, 0xd5, 0xee, 0x7d,
- 0xe0, 0x0c, 0x10, 0x36,
- 0xe4, 0x9c, 0x50, 0x4a,
- 0x00, 0x89, 0x86, 0x35,
- 0xf3, 0x8d, 0xe0, 0x48,
- 0x00, 0x76, 0x04, 0xc5,
- 0x06, 0x89, 0x80, 0x00,
- 0xfc, 0x8d, 0xe0, 0x2c,
- 0x06, 0x89, 0x82, 0xb5,
- 0xfc, 0x8d, 0xe0, 0x24,
- 0x06, 0x89, 0x82, 0x35,
- 0xfc, 0x8d, 0xe0, 0x28,
- 0x06, 0x39, 0x80, 0xb5,
- 0xff, 0x3d, 0xe0, 0x20,
- 0x01, 0x35, 0x82, 0x15,
- 0x93, 0x01, 0x91, 0x01,
- 0x0c, 0x0c, 0x90, 0x0e,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x60, 0x44, 0x00, 0x09,
- 0x18, 0xce, 0xe0, 0x27,
- 0x4c, 0x25, 0xa2, 0x2f,
- 0x2b, 0x0b, 0xe0, 0x10,
- 0xfe, 0xac, 0x01, 0xf6,
- 0x81, 0x01, 0x58, 0x0e,
- 0x00, 0x00, 0x01, 0x06,
- 0x5a, 0x0e, 0xad, 0x7b,
- 0xdc, 0x94, 0x00, 0x04,
- 0x40, 0x0c, 0x4c, 0x05,
- 0xe0, 0x80, 0x4a, 0x4a,
- 0x40, 0x00, 0x00, 0x06,
- 0xdc, 0x00, 0x42, 0x60,
- 0xcf, 0xf8, 0x48, 0x88,
- 0x8c, 0x1b, 0x03, 0x01,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xf8, 0x08, 0x28,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0x6b,
- 0x0e, 0x60, 0x3e, 0x2e,
- 0x08, 0x8b, 0xec, 0x04,
- 0x3c, 0x9e, 0x86, 0xab,
- 0x01, 0x21, 0x81, 0x01,
- 0x01, 0x41, 0x89, 0x31,
- 0x56, 0x98, 0x8e, 0x1b,
- 0x8c, 0x5b, 0x6f, 0xcc,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x81, 0x01, 0x3e, 0xae,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x11, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x55, 0xc8,
- 0x80, 0xa5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x81, 0x01, 0x3e, 0x8e,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x21, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x54, 0xc8,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x86, 0x05, 0xa1, 0x1b,
- 0x88, 0x0d, 0xff, 0x41,
- 0xc1, 0xac, 0x08, 0x04,
- 0xc1, 0x06, 0x48, 0x4a,
- 0xd1, 0x90, 0x48, 0x12,
- 0x17, 0x80, 0x08, 0x04,
- 0x73, 0xfc, 0x40, 0x00,
- 0x08, 0x44, 0xc0, 0x07,
- 0x08, 0x40, 0x81, 0x2c,
- 0x42, 0x4a, 0x84, 0x04,
- 0x88, 0x16, 0xe1, 0x86,
- 0x81, 0x01, 0x0c, 0x0e,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xe0, 0x08, 0x40, 0x96,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0xe0, 0x1e, 0xf0,
- 0x88, 0x6b, 0x00, 0xbb,
- 0x60, 0x18, 0x16, 0x89,
- 0x06, 0x7b, 0x84, 0x4b,
- 0x04, 0xf0, 0x82, 0xab,
- 0x06, 0xf0, 0x64, 0xd0,
- 0x09, 0x4e, 0xe4, 0xa0,
- 0x7d, 0x38, 0x88, 0x0b,
- 0x90, 0x1b, 0x6f, 0xfc,
- 0x64, 0xc0, 0x04, 0xf0,
- 0xe4, 0x90, 0x06, 0xf0,
- 0x90, 0x1b, 0x14, 0x0b,
- 0xef, 0xfc, 0x7c, 0xa8,
- 0x64, 0xb0, 0x04, 0xf0,
- 0xe4, 0x80, 0x06, 0xf0,
- 0x8e, 0x0b, 0x0b, 0x7e,
- 0x6f, 0xfc, 0x7c, 0x28,
- 0x1e, 0x09, 0x90, 0x1b,
- 0x98, 0xb1, 0x60, 0xd0,
- 0x60, 0xc0, 0x1e, 0x39,
- 0xe0, 0x84, 0x04, 0x84,
- 0x60, 0xb0, 0x1e, 0x59,
- 0x42, 0x07, 0x96, 0x23,
- 0xec, 0x08, 0x04, 0x20,
- 0x70, 0x80, 0x42, 0xb2,
- 0x00, 0x10, 0xc2, 0x37,
- 0x4e, 0xb2, 0x6c, 0x08,
- 0x57, 0x0d, 0xf0, 0x8c,
- 0x42, 0x57, 0x84, 0x9b,
- 0x9c, 0x00, 0x52, 0x00,
- 0x6c, 0x08, 0x00, 0x70,
- 0xf0, 0x94, 0x46, 0xb2,
- 0x84, 0x5b, 0x57, 0x0d,
- 0x1c, 0x00, 0x4a, 0x00,
- 0xec, 0x08, 0x00, 0x30,
- 0x84, 0xcb, 0x57, 0x0d,
- 0x58, 0x00, 0x15, 0x04,
- 0xfc, 0x0e, 0x9c, 0x00,
- 0x0b, 0x04, 0x89, 0x04,
- 0x13, 0x04, 0x81, 0xab,
- 0xe0, 0x00, 0x54, 0x1a,
- 0xed, 0x84, 0x40, 0x0a,
- 0x91, 0x04, 0xbe, 0x0e,
- 0x81, 0x01, 0x3c, 0x0e,
- 0x91, 0x95, 0xfe, 0x0e,
- 0x8a, 0xab, 0x0f, 0x8e,
- 0x8e, 0x5b, 0x04, 0x8a,
- 0xa4, 0x0a, 0x8d, 0x9e,
- 0x89, 0x94, 0xfc, 0x74,
- 0x40, 0x0a, 0xb0, 0x03,
- 0x0f, 0x2a, 0x66, 0x9e,
- 0xc0, 0x08, 0x64, 0x00,
- 0x52, 0x1a, 0x8b, 0x74,
- 0x0e, 0x00, 0x60, 0x1c,
- 0xc0, 0x04, 0x64, 0x00,
- 0x40, 0x0d, 0x41, 0x26,
- 0xd7, 0x77, 0x40, 0x00,
- 0x40, 0x0d, 0x5e, 0x05,
- 0x8c, 0x9b, 0x40, 0x00,
- 0x20, 0x00, 0x01, 0x88,
- 0xa0, 0x00, 0x0c, 0x06,
- 0xb0, 0x0a, 0x8c, 0x6a,
- 0xac, 0x03, 0xbc, 0x44,
- 0x66, 0x92, 0x40, 0x0a,
- 0x64, 0x00, 0x09, 0x1a,
- 0x49, 0x26, 0xc0, 0x08,
- 0xc0, 0x00, 0x20, 0x0d,
- 0x20, 0x0d, 0x5e, 0x45,
- 0x00, 0x00, 0x40, 0x00,
- 0xc0, 0x04, 0x64, 0x01,
- 0x80, 0x63, 0xd7, 0x07,
- 0x06, 0x25, 0x8e, 0x83,
- 0x80, 0x00, 0x0e, 0x06,
- 0x82, 0x4b, 0x14, 0x7a,
- 0xbe, 0x14, 0xa8, 0x0a,
- 0x40, 0x0a, 0xae, 0x03,
- 0x03, 0x1a, 0x66, 0x86,
- 0xc0, 0x08, 0x64, 0x00,
- 0x20, 0x0d, 0x43, 0x26,
- 0x5e, 0x15, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x0d,
- 0x64, 0x01, 0x00, 0x00,
- 0x57, 0x07, 0xc0, 0x04,
- 0x80, 0x73, 0x88, 0x1b,
- 0x7b, 0x80, 0x00, 0x64,
- 0xfb, 0x80, 0x0c, 0x84,
- 0x7a, 0x80, 0x4c, 0x62,
- 0xe4, 0x08, 0x00, 0x10,
- 0x7b, 0x80, 0x02, 0x74,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x7a, 0x98, 0x42, 0x12,
- 0x59, 0x1c, 0x92, 0x6b,
- 0x42, 0x00, 0x96, 0x1b,
- 0x00, 0x50, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0x7b, 0x64, 0x08,
- 0x4e, 0x00, 0x0d, 0x44,
- 0x00, 0x30, 0xbc, 0x00,
- 0x96, 0x3b, 0x64, 0x08,
- 0x64, 0x08, 0x41, 0x1a,
- 0x46, 0x00, 0x96, 0x9b,
- 0x00, 0x40, 0x3c, 0x00,
- 0x0f, 0x84, 0xe4, 0x08,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x3c, 0x00, 0x52, 0x00,
- 0xe4, 0x08, 0x00, 0xa0,
- 0x64, 0x08, 0x41, 0x1a,
- 0x4a, 0x00, 0x96, 0x5b,
- 0x00, 0xc0, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0xcb, 0x64, 0x08,
- 0x3c, 0x00, 0x58, 0x00,
- 0xec, 0x04, 0x10, 0x80,
- 0xe0, 0x00, 0x10, 0x1a,
- 0x3f, 0xfd, 0x37, 0x68,
- 0x7e, 0x04, 0xc3, 0xff,
- 0x0c, 0x0c, 0xf0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x71, 0x88, 0x44, 0x12,
- 0xe1, 0xf5, 0x82, 0x33,
- 0x84, 0x01, 0xc2, 0x07,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe1, 0xcc, 0x08, 0x24,
- 0x60, 0xb8, 0x02, 0x04,
- 0x06, 0x24, 0xda, 0x07,
- 0xa0, 0x4f, 0x61, 0xc8,
- 0x79, 0x84, 0x44, 0x32,
- 0xfc, 0x7c, 0x00, 0x44,
- 0x60, 0x10, 0x02, 0x06,
- 0x75, 0x98, 0x81, 0x31,
- 0x08, 0x4c, 0xef, 0xbc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x2b, 0x04, 0x6b,
- 0x4e, 0x96, 0x21, 0x2b,
- 0x82, 0xc5, 0xe0, 0x08,
- 0x60, 0xc8, 0x00, 0x14,
- 0xe1, 0x84, 0x06, 0x24,
- 0xdd, 0x17, 0x06, 0x03,
- 0x81, 0x31, 0x01, 0x71,
- 0x6f, 0xbc, 0x74, 0x48,
- 0xf2, 0x9c, 0x42, 0x12,
- 0x8e, 0x0b, 0x98, 0x0e,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xdc, 0x07, 0xe5, 0x27,
- 0xa4, 0x0f, 0x5d, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x82, 0x2b, 0x42, 0x07,
- 0x81, 0x11, 0x04, 0x01,
- 0x7a, 0x80, 0x00, 0x04,
- 0x7b, 0x98, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xbc,
- 0xa2, 0x2f, 0xe1, 0xa0,
- 0x41, 0xfe, 0xa1, 0x2b,
- 0x00, 0x04, 0xdf, 0xfc,
- 0x08, 0x4c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x7a, 0x08,
- 0x02, 0x64, 0x84, 0x6b,
- 0x82, 0x03, 0xe1, 0x84,
- 0xe0, 0x1a, 0x40, 0x0a,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x69, 0x29, 0x43, 0x86,
- 0x44, 0x1a, 0xc0, 0x01,
- 0x40, 0x1a, 0xe5, 0x02,
- 0x81, 0x11, 0x65, 0x82,
- 0x64, 0x01, 0x04, 0x20,
- 0x40, 0x02, 0xc2, 0x00,
- 0xe5, 0x27, 0x72, 0x84,
- 0x5d, 0x93, 0xdc, 0x07,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x04, 0x34, 0x83, 0x31,
- 0xa3, 0x3f, 0x68, 0x88,
- 0x42, 0x2a, 0x82, 0x21,
- 0x80, 0x13, 0xe6, 0x8e,
- 0x00, 0x14, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0xef, 0xfc, 0x77, 0x28,
- 0x84, 0x61, 0xc2, 0x67,
- 0xfa, 0x80, 0x02, 0x64,
- 0xe6, 0x9e, 0x42, 0x1a,
- 0xe5, 0x02, 0x44, 0x1a,
- 0x65, 0x82, 0x40, 0x1a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x27,
- 0x0c, 0x4c, 0xa4, 0x0f,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x81, 0x11, 0x21, 0x0b,
- 0x00, 0x00, 0x84, 0x65,
- 0x04, 0x0e, 0x6c, 0x04,
- 0x46, 0x02, 0xff, 0xf0,
- 0xa1, 0x3b, 0xf8, 0x08,
- 0x41, 0x84, 0x00, 0x04,
- 0xc4, 0x04, 0x02, 0x10,
- 0x02, 0x14, 0xfe, 0x35,
- 0x00, 0x04, 0x7b, 0x80,
- 0xd0, 0x17, 0xfa, 0x80,
- 0x5d, 0x93, 0xa0, 0x1f,
- 0xfb, 0x80, 0x00, 0x14,
- 0x7a, 0x80, 0x02, 0x04,
- 0xa1, 0x1f, 0xd1, 0x07,
- 0x00, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0xe4, 0x04,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x02, 0x48, 0x2a,
- 0xe5, 0x82, 0x4a, 0x2a,
- 0x65, 0x06, 0x40, 0x3a,
- 0x42, 0x3a, 0x88, 0x2b,
- 0x8a, 0x3b, 0x65, 0x86,
- 0xef, 0xbc, 0x73, 0x88,
- 0x60, 0x01, 0x04, 0x06,
- 0x81, 0x31, 0x42, 0x00,
- 0x42, 0x12, 0x84, 0x03,
- 0xf9, 0x07, 0x72, 0x8c,
- 0x60, 0x90, 0x04, 0x14,
- 0x24, 0x0f, 0xf9, 0x17,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x08, 0x4c, 0xdf, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x21, 0x1b,
- 0x81, 0x71, 0x0a, 0x45,
- 0x88, 0xe5, 0xa1, 0x2b,
- 0x7e, 0x81, 0x06, 0x0e,
- 0x48, 0x1a, 0x40, 0x00,
- 0x4a, 0x0a, 0xe5, 0x0a,
- 0x40, 0x0a, 0xe5, 0x0e,
- 0x46, 0x1a, 0xe5, 0x8e,
- 0x18, 0x54, 0x65, 0x8a,
- 0x56, 0x07, 0xe1, 0xd4,
- 0xe1, 0x84, 0x02, 0x44,
- 0x00, 0x34, 0x20, 0xcf,
- 0x56, 0x57, 0xe0, 0xfc,
- 0x04, 0x34, 0xa0, 0x1f,
- 0x40, 0x12, 0x61, 0x84,
- 0x42, 0x22, 0xf0, 0x94,
- 0x88, 0x2b, 0x72, 0xb0,
- 0xef, 0xbc, 0x66, 0x68,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x01, 0x65, 0xa1, 0x1b,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x4e, 0x96, 0x01, 0x01,
- 0x18, 0x0e, 0xe0, 0x08,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x7f, 0xfd, 0x47, 0xfe,
- 0x86, 0x0d, 0xc0, 0x3f,
- 0x00, 0x00, 0x06, 0x02,
- 0x08, 0x3e, 0xa1, 0x1b,
- 0x80, 0x00, 0x02, 0x06,
- 0x40, 0x9c, 0x06, 0x34,
- 0xc1, 0x84, 0x08, 0x14,
- 0x50, 0x90, 0x46, 0x32,
- 0x42, 0x3a, 0x81, 0x01,
- 0x40, 0x96, 0x40, 0x06,
- 0x88, 0x1e, 0x80, 0x08,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8a, 0x25, 0xa1, 0x2b,
- 0x0a, 0x02, 0x06, 0x13,
- 0x06, 0x14, 0xe0, 0x00,
- 0x03, 0x0a, 0x7a, 0x80,
- 0x08, 0x30, 0xf4, 0x7c,
- 0x81, 0x11, 0x6c, 0x80,
- 0x7b, 0x90, 0x46, 0x32,
- 0x00, 0x32, 0x81, 0x41,
- 0x48, 0x50, 0x6c, 0x7c,
- 0x0a, 0x06, 0x9c, 0x00,
- 0x18, 0x44, 0x00, 0x00,
- 0x0c, 0x04, 0xef, 0x80,
- 0xa0, 0x33, 0x6c, 0x00,
- 0x78, 0xb0, 0x58, 0x62,
- 0x21, 0x4f, 0xa1, 0x5f,
- 0xe1, 0x84, 0x00, 0x24,
- 0x06, 0x32, 0x38, 0x5f,
- 0x27, 0x5f, 0xec, 0x04,
- 0x42, 0x52, 0x88, 0x03,
- 0x81, 0x31, 0x72, 0x84,
- 0xef, 0xbc, 0x61, 0x28,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xa1, 0x2b, 0x00, 0x3b,
- 0xe5, 0x06, 0x40, 0x3a,
- 0xe5, 0x86, 0x42, 0x3a,
- 0x06, 0x20, 0x82, 0x65,
- 0x83, 0x41, 0x6c, 0x04,
- 0x81, 0x31, 0x27, 0x4f,
- 0x6f, 0x38, 0x88, 0x03,
- 0x42, 0x12, 0x6f, 0xbc,
- 0xff, 0x21, 0xf2, 0x8c,
- 0x41, 0xfe, 0x85, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x00, 0x04, 0x4c,
- 0xa3, 0x2d, 0x00, 0x3b,
- 0xe4, 0x06, 0x40, 0x3a,
- 0xe4, 0x86, 0x42, 0x3a,
- 0x08, 0x20, 0x86, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x90, 0x08, 0x34,
- 0x21, 0x1d, 0x81, 0xc1,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0x71, 0x90, 0x4c, 0xc2,
- 0xe8, 0x88, 0x04, 0x34,
- 0x73, 0x94, 0x58, 0xc2,
- 0xdc, 0x00, 0x48, 0x60,
- 0x5c, 0x00, 0x4a, 0xc0,
- 0x42, 0x52, 0x88, 0x03,
- 0x06, 0x24, 0x72, 0x84,
- 0x50, 0x78, 0xe1, 0x7c,
- 0x03, 0x4a, 0xef, 0xbc,
- 0x02, 0x1a, 0xe0, 0x00,
- 0x00, 0xea, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x80, 0xf5, 0xed, 0x80,
- 0x7f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x4c, 0xdf, 0xff,
- 0xdd, 0x93, 0xf6, 0x00,
- 0x06, 0x06, 0x7f, 0x21,
- 0xe0, 0x00, 0x60, 0x01,
- 0xe0, 0x08, 0x43, 0x4a,
- 0xe0, 0x08, 0x42, 0x1a,
- 0xe4, 0x0c, 0x41, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x00, 0x01, 0x00, 0x06,
- 0x0c, 0x4c, 0xe0, 0x00,
- 0xdd, 0x93, 0xf6, 0x00,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x86, 0x6b, 0x04, 0x4b,
- 0x70, 0x90, 0x08, 0x09,
- 0x08, 0x29, 0x81, 0x51,
- 0x12, 0x10, 0x78, 0x8c,
- 0x08, 0x39, 0xe6, 0x00,
- 0x14, 0x10, 0x78, 0x84,
- 0x18, 0x06, 0xe4, 0xc0,
- 0xff, 0xf8, 0x57, 0xce,
- 0x4e, 0x46, 0x1a, 0x26,
- 0x58, 0x56, 0xe0, 0x00,
- 0xda, 0x36, 0x81, 0x81,
- 0x89, 0xa5, 0x8f, 0x4e,
- 0xf0, 0xa0, 0x40, 0x42,
- 0xe0, 0x40, 0x00, 0x19,
- 0x8a, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x60, 0x00, 0x19,
- 0x8a, 0x25, 0xa1, 0x1b,
- 0xa1, 0x1b, 0xa4, 0x1a,
- 0x08, 0x19, 0x88, 0xc5,
- 0x44, 0x62, 0x7c, 0x20,
- 0x44, 0x11, 0xf0, 0xa0,
- 0x00, 0x19, 0xe0, 0x10,
- 0x44, 0x11, 0xe0, 0x20,
- 0x00, 0x19, 0xe0, 0x30,
- 0x44, 0x11, 0xe0, 0x40,
- 0x00, 0x09, 0xe0, 0x50,
- 0x44, 0x01, 0xe0, 0x60,
- 0xa4, 0x2a, 0xe0, 0x70,
- 0xaa, 0x14, 0xa8, 0x04,
- 0xe1, 0x84, 0x06, 0x24,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xbc, 0x56, 0x28,
- 0xf2, 0x94, 0x42, 0x12,
- 0x42, 0x62, 0x0f, 0x44,
- 0x04, 0x0e, 0xf0, 0x9c,
- 0x12, 0x0b, 0x81, 0x51,
- 0x81, 0xf5, 0xf8, 0x20,
- 0xf0, 0xa0, 0x40, 0x62,
- 0xe0, 0x10, 0x40, 0x51,
- 0xe0, 0x30, 0x40, 0x51,
- 0xe0, 0x50, 0x40, 0x51,
- 0x60, 0x70, 0x40, 0x51,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x81, 0x01, 0x00, 0x5e,
- 0x71, 0xac, 0x42, 0x62,
- 0x04, 0x0c, 0x82, 0x81,
- 0xec, 0x08, 0x16, 0xb0,
- 0x88, 0x71, 0x04, 0x91,
- 0xb1, 0x8b, 0x90, 0xa1,
- 0x81, 0x01, 0xec, 0xd5,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x06, 0x00, 0x06, 0x28,
- 0x60, 0x01, 0xe6, 0x00,
- 0xe6, 0x10, 0x08, 0x10,
- 0x65, 0x10, 0x0a, 0x10,
- 0x59, 0xc6, 0xf8, 0x11,
- 0x81, 0x61, 0x60, 0x00,
- 0x02, 0x79, 0x83, 0xf5,
- 0xa1, 0x7b, 0xf8, 0x20,
- 0x84, 0x78, 0x84, 0xa5,
- 0x84, 0x45, 0xa1, 0x7b,
- 0x80, 0x84, 0x94, 0x74,
- 0x06, 0xab, 0x82, 0x94,
- 0x10, 0x7a, 0xf8, 0x20,
- 0x0c, 0xba, 0x8e, 0x83,
- 0xf2, 0x98, 0x52, 0x92,
- 0x00, 0x8e, 0x82, 0x9e,
- 0x46, 0xa3, 0x8e, 0xa3,
- 0x82, 0xb1, 0x78, 0x20,
- 0x02, 0xc1, 0x8c, 0xbc,
- 0x04, 0x41, 0x84, 0x31,
- 0x08, 0x51, 0x90, 0x01,
- 0x0e, 0xc0, 0x82, 0x11,
- 0x85, 0x7d, 0xec, 0xf0,
- 0x0c, 0x0c, 0xf6, 0xf5,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x06, 0x28,
- 0x83, 0x81, 0x44, 0x38,
- 0x80, 0x7b, 0x46, 0x08,
- 0x91, 0x11, 0x25, 0x8f,
- 0x6f, 0xfc, 0x5c, 0xe8,
- 0xe8, 0x8c, 0x12, 0x84,
- 0x14, 0x04, 0x1c, 0x14,
- 0x1e, 0x34, 0xe0, 0x90,
- 0x02, 0x0b, 0x90, 0x2b,
- 0x64, 0x18, 0x94, 0x1b,
- 0x1c, 0x14, 0xef, 0xfc,
- 0x98, 0x0e, 0x92, 0x2b,
- 0x02, 0x0b, 0x9e, 0x34,
- 0x63, 0x98, 0x94, 0x1b,
- 0x9c, 0x24, 0xef, 0xfc,
- 0x0e, 0x1b, 0x9a, 0x0e,
- 0x1e, 0x34, 0xe0, 0x10,
- 0x63, 0x18, 0x84, 0x0b,
- 0x92, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x88, 0x7b, 0x44, 0x48,
- 0x81, 0x01, 0x00, 0x9b,
- 0x84, 0x6b, 0x0a, 0x8b,
- 0x86, 0x0b, 0x0b, 0x0e,
- 0x90, 0x2b, 0x0e, 0x1b,
- 0x68, 0x00, 0x43, 0x48,
- 0xab, 0x9b, 0x88, 0x3b,
- 0xa5, 0x9b, 0x84, 0x05,
- 0x0c, 0x60, 0x02, 0xe5,
- 0xa7, 0x9b, 0x84, 0x10,
- 0xa9, 0x9b, 0x82, 0x45,
- 0x40, 0x80, 0x02, 0x25,
- 0xa3, 0x9b, 0x9c, 0x00,
- 0x08, 0x61, 0x86, 0x75,
- 0x81, 0x25, 0x8e, 0x0b,
- 0x0d, 0x14, 0x90, 0x61,
- 0xe4, 0x50, 0x06, 0xf0,
- 0x62, 0x98, 0x98, 0x24,
- 0x0b, 0x14, 0xef, 0xfc,
- 0xe0, 0x00, 0x00, 0x1a,
- 0x61, 0x9c, 0x4e, 0x0a,
- 0x0f, 0x24, 0x81, 0x01,
- 0x20, 0x01, 0x02, 0x06,
- 0x02, 0x06, 0xc0, 0x00,
- 0x88, 0x1e, 0xc0, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x40, 0xc6, 0xdd, 0x93,
- 0x4e, 0x0a, 0x60, 0x08,
- 0x4e, 0x1a, 0xe9, 0x9c,
- 0x81, 0x11, 0x61, 0x9c,
- 0xc1, 0xc3, 0xfd, 0xf5,
- 0x84, 0x03, 0xa7, 0x2f,
- 0x5c, 0x08, 0xc3, 0x0d,
- 0x00, 0x06, 0x1a, 0x00,
- 0x5d, 0x93, 0x80, 0x00,
- 0xf1, 0x80, 0x40, 0x12,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x64, 0x61, 0x00, 0x00,
- 0x81, 0x41, 0x40, 0x03,
- 0xfc, 0x1e, 0xbe, 0x0e,
- 0x06, 0x08, 0x8b, 0xf5,
- 0x01, 0xb1, 0x81, 0xa1,
- 0x81, 0x4d, 0x81, 0x71,
- 0x7e, 0x4e, 0x92, 0x65,
- 0x02, 0x09, 0x88, 0x13,
- 0x81, 0xa1, 0x60, 0xb0,
- 0x60, 0xf0, 0x02, 0x39,
- 0x02, 0x49, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0x90,
- 0x60, 0xd0, 0x02, 0x29,
- 0x42, 0x0a, 0x9d, 0x11,
- 0x80, 0x33, 0x66, 0x86,
- 0x81, 0x71, 0x3e, 0x54,
- 0x88, 0x23, 0x08, 0x13,
- 0xc4, 0x17, 0x09, 0x4e,
- 0x81, 0x41, 0x02, 0x53,
- 0x18, 0x85, 0x83, 0x25,
- 0xc0, 0x01, 0x78, 0x31,
- 0x10, 0xa3, 0xf1, 0x94,
- 0x48, 0x42, 0x81, 0x81,
- 0x92, 0xb3, 0xf2, 0xa0,
- 0x72, 0xa0, 0x4c, 0x62,
- 0x82, 0x11, 0x82, 0x71,
- 0xfc, 0x55, 0x85, 0x1d,
- 0xf0, 0x51, 0x02, 0x01,
- 0x1e, 0x15, 0x87, 0x0d,
- 0x58, 0x50, 0x40, 0x10,
- 0xfc, 0xf5, 0xdc, 0x00,
- 0x84, 0xd5, 0xe5, 0x7d,
- 0x61, 0x84, 0x10, 0x74,
- 0x40, 0x82, 0x81, 0x91,
- 0x81, 0x31, 0x70, 0xa8,
- 0x72, 0xa4, 0x42, 0x42,
- 0x44, 0x18, 0x8e, 0x2b,
- 0x00, 0xab, 0xef, 0xbc,
- 0xf0, 0xac, 0x40, 0x82,
- 0x72, 0xa4, 0x42, 0x62,
- 0x43, 0x98, 0x81, 0x31,
- 0x8e, 0x2b, 0x6f, 0xbc,
- 0xfc, 0x14, 0x80, 0xbb,
- 0x00, 0x44, 0xfe, 0x44,
- 0x06, 0x10, 0x60, 0x88,
- 0x04, 0x44, 0xe5, 0x10,
- 0x86, 0x03, 0x60, 0x84,
- 0x82, 0x41, 0x04, 0x33,
- 0x40, 0xb5, 0x80, 0xae,
- 0x46, 0x73, 0xe0, 0x20,
- 0x84, 0x08, 0xe0, 0x80,
- 0xe8, 0x15, 0x81, 0x4d,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0xc1, 0x30, 0x01,
- 0x82, 0x7b, 0x7c, 0x0e,
- 0x0c, 0x70, 0x0d, 0xce,
- 0x0b, 0xce, 0xe4, 0xf0,
- 0x89, 0xce, 0x81, 0xa1,
- 0xfc, 0x94, 0xfe, 0xce,
- 0x1e, 0x08, 0x89, 0x55,
- 0x8d, 0xce, 0x81, 0x11,
- 0x01, 0xad, 0xfe, 0xce,
- 0x89, 0xce, 0x81, 0x01,
- 0x8c, 0x05, 0x8b, 0xce,
- 0x70, 0xa8, 0x56, 0x62,
- 0xf0, 0xa8, 0x50, 0x92,
- 0x78, 0xe0, 0x16, 0x09,
- 0xe4, 0x30, 0x04, 0xf0,
- 0x78, 0xa0, 0x16, 0x19,
- 0xe4, 0x60, 0x0a, 0xf0,
- 0xf8, 0x20, 0x10, 0x39,
- 0xe0, 0x20, 0x10, 0x49,
- 0x9b, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x43, 0x08,
- 0x78, 0xc0, 0x16, 0x09,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x78, 0x80, 0x16, 0x19,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0xfc, 0x28, 0x12, 0x39,
- 0xe0, 0x40, 0x10, 0x49,
- 0x93, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x42, 0x08,
- 0x81, 0xc1, 0x7e, 0x04,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xa1, 0x1b, 0x8b, 0x14,
- 0x7e, 0xce, 0x80, 0xb5,
- 0x0b, 0xce, 0x81, 0x11,
- 0x0d, 0x24, 0x81, 0x01,
- 0xf0, 0xa8, 0x48, 0x62,
- 0x82, 0xa1, 0x09, 0x34,
- 0xf8, 0x20, 0x48, 0x01,
- 0xf8, 0x60, 0x48, 0x21,
- 0xf8, 0x40, 0x48, 0x31,
- 0x9c, 0x08, 0x90, 0x16,
- 0xee, 0x55, 0x81, 0xad,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x58, 0x12, 0x00, 0x33,
- 0x14, 0x3e, 0xf0, 0x80,
- 0xf0, 0x90, 0x40, 0x32,
- 0x00, 0x00, 0x19, 0x0d,
- 0x00, 0x1b, 0xec, 0x04,
- 0x02, 0xc0, 0x81, 0x51,
- 0x3c, 0x14, 0x8c, 0x04,
- 0xfb, 0x04, 0x44, 0x22,
- 0x82, 0x35, 0x84, 0x3d,
- 0x88, 0x5b, 0x04, 0x0d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xd1, 0x8c, 0x40, 0x02,
- 0xd0, 0x88, 0x4a, 0x02,
- 0xdd, 0x93, 0x84, 0x5e,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x8b, 0x0a, 0x6b,
- 0x84, 0x7b, 0x11, 0x94,
- 0x8c, 0x1b, 0x08, 0x0b,
- 0x6f, 0xfc, 0x69, 0x88,
- 0x01, 0x01, 0x90, 0x2b,
- 0x85, 0x65, 0x91, 0xa1,
- 0x88, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0x12, 0x45, 0x81, 0x31,
- 0x90, 0x2b, 0x60, 0x40,
- 0xe0, 0x60, 0x12, 0x55,
- 0xbe, 0x9e, 0x9c, 0x08,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0xe4, 0x80, 0x04, 0x90,
- 0x60, 0x40, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9e, 0x08, 0xe0, 0x60,
- 0x90, 0x2b, 0x3e, 0x2e,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x69, 0xe8,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x55,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x7b, 0x15, 0x84,
- 0x84, 0x6b, 0x17, 0x94,
- 0x8e, 0x2b, 0x13, 0x04,
- 0x6f, 0xfc, 0x65, 0xc8,
- 0x01, 0x01, 0x90, 0x1b,
- 0xe0, 0x08, 0x14, 0xc6,
- 0xa1, 0x0b, 0x85, 0x75,
- 0x12, 0x15, 0x88, 0x55,
- 0x81, 0x31, 0x68, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x8e, 0x2b,
- 0x98, 0x08, 0xe6, 0x90,
- 0x3c, 0x1e, 0xbe, 0x9e,
- 0x67, 0x38, 0x90, 0x1b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x12, 0x15, 0x84, 0x55,
- 0x04, 0x90, 0x68, 0xc0,
- 0xc0, 0x02, 0x64, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9a, 0x08, 0xe6, 0x90,
- 0x8e, 0x2b, 0x3e, 0x2e,
- 0x90, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x66, 0x08,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x35,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x80, 0x9b, 0x15, 0x84,
- 0x84, 0x7b, 0x0a, 0x6b,
- 0x00, 0x80, 0x82, 0xab,
- 0x08, 0x80, 0x64, 0x50,
- 0x3c, 0x0e, 0xe4, 0x10,
- 0xe4, 0x40, 0x0a, 0x80,
- 0xef, 0xfc, 0x77, 0x68,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x67, 0xa0, 0x02, 0x80,
- 0xe7, 0x60, 0x00, 0x80,
- 0x04, 0x80, 0x7e, 0x1e,
- 0x7c, 0x2e, 0xe7, 0x90,
- 0x3e, 0x0e, 0x94, 0x1b,
- 0x7a, 0x38, 0x8e, 0x2b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0xa0, 0xf1, 0x80, 0xa5,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x17, 0x44, 0xdd, 0x93,
- 0x0e, 0x1b, 0x92, 0x0b,
- 0x10, 0x3b, 0x8c, 0x2b,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0x81, 0x15, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x86, 0x8b, 0x08, 0x6b,
- 0x84, 0x7b, 0x02, 0x0b,
- 0x6f, 0xfc, 0x6d, 0x88,
- 0x10, 0x0b, 0x8c, 0x1b,
- 0x66, 0x38, 0x8c, 0x1b,
- 0x10, 0x09, 0xef, 0xfc,
- 0x00, 0x00, 0xe3, 0x58,
- 0xe2, 0x0d, 0xec, 0x0c,
- 0x1c, 0x00, 0x40, 0x70,
- 0x9c, 0x00, 0x42, 0x60,
- 0x8f, 0xfc, 0x5a, 0xe8,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x62, 0x01, 0x02, 0x5b,
- 0x81, 0xc1, 0x40, 0x01,
- 0x0c, 0xc4, 0x85, 0x95,
- 0x0e, 0x64, 0xfb, 0x80,
- 0x82, 0x63, 0x60, 0x84,
- 0x60, 0x01, 0x0c, 0x89,
- 0x82, 0x73, 0x40, 0x02,
- 0xe8, 0x00, 0x0e, 0x7b,
- 0x06, 0xa5, 0xc4, 0x87,
- 0xc4, 0x77, 0x7c, 0x20,
- 0xfc, 0x1c, 0x00, 0x95,
- 0x50, 0x82, 0xd3, 0xad,
- 0x50, 0x95, 0xd0, 0x8c,
- 0x04, 0x89, 0xc0, 0x00,
- 0xa1, 0x8b, 0xe0, 0x30,
- 0x0c, 0x60, 0x82, 0xc5,
- 0x40, 0x08, 0x64, 0x01,
- 0x98, 0x68, 0x80, 0x73,
- 0xc4, 0x67, 0x9c, 0x74,
- 0x7c, 0x18, 0x08, 0x85,
- 0x88, 0x63, 0xcf, 0x77,
- 0x98, 0x8e, 0x8e, 0x83,
- 0x58, 0x8a, 0x82, 0xc1,
- 0xf4, 0xd5, 0xec, 0x14,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x81, 0xc1, 0x0f, 0x4e,
- 0x81, 0x61, 0x0d, 0x3e,
- 0x64, 0x09, 0x00, 0x39,
- 0x87, 0x45, 0xc0, 0x02,
- 0x60, 0x34, 0x02, 0x99,
- 0xfa, 0x80, 0x0e, 0xc4,
- 0x60, 0x30, 0x02, 0xb9,
- 0x04, 0x85, 0xc4, 0x77,
- 0xa1, 0xbb, 0xfc, 0x1c,
- 0xe5, 0xa6, 0x54, 0x8a,
- 0x65, 0x26, 0x50, 0x8a,
- 0xf0, 0x9c, 0x52, 0x22,
- 0xd1, 0x87, 0xf0, 0xa7,
- 0x56, 0x82, 0x0f, 0x84,
- 0x8e, 0x83, 0xf9, 0xa8,
- 0x8d, 0xa4, 0xa0, 0xbe,
- 0x8e, 0xa3, 0x02, 0xc5,
- 0xc6, 0x5a, 0xa8, 0x64,
- 0xe5, 0x16, 0x48, 0x6a,
- 0xe5, 0x96, 0x4a, 0x6a,
- 0xee, 0x57, 0xd3, 0x47,
- 0xf9, 0x94, 0x4c, 0x42,
- 0xa0, 0xbe, 0x8c, 0xb3,
- 0x80, 0x73, 0x24, 0x44,
- 0x4e, 0x45, 0x82, 0xc1,
- 0xa8, 0x44, 0xe9, 0x04,
- 0xe9, 0x44, 0x4e, 0x45,
- 0x4e, 0x65, 0xa0, 0x44,
- 0x4e, 0x45, 0xe9, 0xc4,
- 0x58, 0x8a, 0xe9, 0x84,
- 0xf2, 0x75, 0xf4, 0x0c,
- 0x0c, 0xcc, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x81, 0x41, 0x19, 0x31,
- 0x18, 0x54, 0x83, 0x95,
- 0x4c, 0x12, 0x60, 0x84,
- 0x02, 0xc3, 0xf0, 0x94,
- 0x18, 0x5b, 0x82, 0x41,
- 0x0c, 0xc9, 0xe8, 0x00,
- 0xc0, 0x02, 0x60, 0x01,
- 0xe0, 0x88, 0x0c, 0x54,
- 0x7c, 0x18, 0x00, 0x65,
- 0x04, 0xc5, 0xc4, 0xc7,
- 0xd9, 0x6d, 0xfc, 0x30,
- 0xd0, 0x80, 0x4a, 0x52,
- 0x0c, 0x01, 0x4a, 0x31,
- 0x02, 0xcb, 0xc0, 0x04,
- 0x40, 0x01, 0x62, 0x01,
- 0xfb, 0x80, 0x0a, 0x44,
- 0xf8, 0x55, 0xd9, 0x5d,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xef, 0x10, 0x1e, 0xf0,
- 0x84, 0x8b, 0x02, 0x6b,
- 0x64, 0x09, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x02,
- 0x65, 0x10, 0x02, 0xf0,
- 0xe6, 0x10, 0x04, 0xf0,
- 0x81, 0x31, 0x01, 0x65,
- 0x00, 0x00, 0x49, 0x3e,
- 0xc5, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x66, 0x10, 0x12, 0xf0,
- 0xe5, 0x10, 0x14, 0xf0,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x92, 0x3b, 0x10, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x16, 0xf0, 0x94, 0x4b,
- 0x8c, 0x0b, 0x64, 0x10,
- 0x92, 0x2b, 0x10, 0x1b,
- 0x96, 0x4b, 0x14, 0x3b,
- 0xef, 0xfc, 0x76, 0xc8,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x6f, 0xfc, 0x7a, 0xc8,
- 0x01, 0x01, 0x96, 0x2b,
- 0xe7, 0x10, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xff, 0x01, 0x00, 0x24,
- 0x83, 0x2d, 0x84, 0x14,
- 0x00, 0x00, 0x00, 0x06,
- 0x5d, 0x93, 0x82, 0x2d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x9b, 0x7e, 0x2e,
- 0x02, 0x06, 0x3e, 0x0e,
- 0x09, 0x21, 0xe0, 0x10,
- 0x68, 0xf1, 0x06, 0x4e,
- 0x4e, 0xf8, 0xc0, 0x10,
- 0x92, 0x0b, 0x6f, 0xbc,
- 0x81, 0x11, 0x01, 0x01,
- 0x81, 0x01, 0x09, 0x0e,
- 0x83, 0x81, 0x11, 0x1e,
- 0x81, 0xa1, 0x0f, 0x1e,
- 0x81, 0x31, 0x7c, 0x0e,
- 0x0d, 0x3e, 0x91, 0xa5,
- 0xe0, 0x88, 0x00, 0x74,
- 0x12, 0x05, 0x8b, 0x1e,
- 0x4c, 0x78, 0xfc, 0x00,
- 0x0c, 0x74, 0xe8, 0x00,
- 0x01, 0x0a, 0x60, 0x84,
- 0xc0, 0x01, 0x64, 0x00,
- 0x4c, 0x03, 0x92, 0x63,
- 0x00, 0x04, 0x68, 0x00,
- 0x1e, 0x15, 0x80, 0x84,
- 0x40, 0x02, 0x80, 0x04,
- 0x00, 0xb3, 0x90, 0x84,
- 0x00, 0x01, 0x0c, 0x01,
- 0xc0, 0x0c, 0x41, 0x26,
- 0xc0, 0x08, 0x5e, 0x05,
- 0x47, 0xfc, 0x57, 0xf6,
- 0xfb, 0xfc, 0x10, 0x0a,
- 0x7e, 0xa4, 0x86, 0xc5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x64, 0x70, 0x06, 0xf0,
- 0x14, 0x19, 0x96, 0x0b,
- 0x47, 0xb8, 0xe0, 0x28,
- 0x14, 0x09, 0xe8, 0x00,
- 0x80, 0x8b, 0x60, 0x2c,
- 0xa1, 0x0b, 0x28, 0x02,
- 0x40, 0x0e, 0x82, 0x45,
- 0x42, 0x06, 0x60, 0x2e,
- 0x40, 0x0a, 0xe0, 0xf8,
- 0xaa, 0x12, 0xe0, 0x86,
- 0xfa, 0x04, 0x40, 0x02,
- 0x81, 0x11, 0x09, 0x0e,
- 0x81, 0xa1, 0x09, 0x05,
- 0x00, 0x8a, 0x8b, 0x04,
- 0x14, 0xa0, 0xf4, 0x3c,
- 0x02, 0xf6, 0x04, 0x04,
- 0x0c, 0xe5, 0x80, 0x00,
- 0x80, 0x00, 0x10, 0x06,
- 0x89, 0x14, 0x8f, 0x04,
- 0xf1, 0x80, 0x40, 0xb2,
- 0xf0, 0x80, 0x00, 0x04,
- 0x82, 0xc5, 0x83, 0x0d,
- 0x04, 0xf0, 0x7e, 0x04,
- 0x06, 0xf0, 0xe4, 0x80,
- 0x00, 0x19, 0xe4, 0x70,
- 0x96, 0x0b, 0x60, 0x28,
- 0xe8, 0x00, 0x44, 0x28,
- 0x81, 0x81, 0x02, 0xa1,
- 0x0b, 0x04, 0x83, 0xf5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x06, 0xf0, 0x7e, 0xa4,
- 0x82, 0x01, 0xe4, 0x70,
- 0xe0, 0x28, 0x14, 0x19,
- 0x96, 0x0b, 0x0b, 0x0e,
- 0xe8, 0x00, 0x43, 0xc8,
- 0x60, 0x2c, 0x14, 0x09,
- 0x28, 0x02, 0x80, 0x8b,
- 0x82, 0x45, 0xa1, 0x0b,
- 0x60, 0x2e, 0x40, 0x0e,
- 0xe0, 0xf8, 0x42, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0x40, 0x02, 0xaa, 0x12,
- 0x09, 0x0e, 0xfa, 0x04,
- 0x8b, 0x14, 0x81, 0xa1,
- 0x92, 0x73, 0x0d, 0x34,
- 0x4e, 0x11, 0x8f, 0x04,
- 0xc0, 0x02, 0x60, 0x01,
- 0x6c, 0x00, 0x4c, 0xa3,
- 0x4c, 0x03, 0x82, 0x31,
- 0xc0, 0x01, 0x64, 0x09,
- 0x62, 0x01, 0x12, 0x0b,
- 0x0e, 0x34, 0x40, 0x01,
- 0xc1, 0x7d, 0xfb, 0x80,
- 0x00, 0x10, 0xdc, 0x35,
- 0x52, 0x01, 0xe4, 0x04,
- 0xc0, 0x02, 0x64, 0x09,
- 0xc8, 0xf1, 0x7c, 0x04,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x0a, 0x44, 0x88, 0x44,
- 0xaa, 0x43, 0xe9, 0x04,
- 0x81, 0x01, 0x00, 0x43,
- 0xc3, 0x4f, 0x08, 0x4e,
- 0xdd, 0x93, 0x8c, 0x4e,
- 0xa3, 0x0f, 0x0c, 0x0e,
- 0x81, 0x01, 0x08, 0x0e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x09,
- 0xa1, 0x0b, 0x80, 0x3b,
- 0x40, 0x96, 0x06, 0x65,
- 0x48, 0x3a, 0x80, 0x08,
- 0x40, 0x3a, 0xe0, 0x02,
- 0x08, 0x44, 0xe1, 0x02,
- 0x82, 0x43, 0xfa, 0x80,
- 0xec, 0x70, 0x08, 0x49,
- 0x81, 0x01, 0x49, 0x0d,
- 0x86, 0x13, 0x82, 0xa5,
- 0x6b, 0x71, 0x02, 0x19,
- 0xf4, 0x1d, 0xc0, 0x05,
- 0x46, 0x06, 0x80, 0xf5,
- 0x46, 0x4a, 0xe0, 0x64,
- 0x83, 0x11, 0x64, 0x84,
- 0x81, 0x11, 0x80, 0x45,
- 0xdd, 0x93, 0x88, 0x16,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x7b,
- 0x67, 0x71, 0x10, 0x70,
- 0x12, 0x70, 0x40, 0x11,
- 0xc0, 0x03, 0x67, 0x71,
- 0x81, 0xa1, 0x3e, 0xbe,
- 0x81, 0x01, 0x01, 0x61,
- 0x00, 0xa4, 0x85, 0x25,
- 0x04, 0xf0, 0x7b, 0x80,
- 0x7c, 0x58, 0xe4, 0x20,
- 0x8e, 0x1b, 0x6f, 0xfc,
- 0xa1, 0x1b, 0x91, 0x18,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x56, 0x15, 0x9f, 0xff,
- 0x82, 0xe5, 0x80, 0x00,
- 0x45, 0xfe, 0x20, 0x1a,
- 0xcf, 0xff, 0x7f, 0xfd,
- 0xfb, 0x80, 0x0c, 0x64,
- 0xe0, 0x17, 0x82, 0x61,
- 0xac, 0x1e, 0xb4, 0x1f,
- 0xc4, 0x1d, 0xa4, 0x14,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x88, 0xb1, 0x02, 0xa1,
- 0x88, 0x91, 0x04, 0x81,
- 0x60, 0x01, 0x14, 0x0a,
- 0xf6, 0x95, 0xc0, 0x01,
- 0x98, 0xf1, 0x3e, 0x14,
- 0x62, 0x01, 0x42, 0x63,
- 0x0c, 0x0c, 0xc0, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x81, 0x01, 0x5d, 0x93,
- 0x60, 0x38, 0x00, 0x19,
- 0xa1, 0x1b, 0x81, 0x21,
- 0x00, 0x00, 0x02, 0x16,
- 0x80, 0x08, 0x40, 0x96,
- 0xcc, 0x2a, 0x86, 0x25,
- 0xe0, 0x28, 0x06, 0x09,
- 0x7c, 0xc0, 0x08, 0x24,
- 0x48, 0x4a, 0xe2, 0x27,
- 0x02, 0x10, 0x66, 0x86,
- 0x01, 0x0a, 0xec, 0x04,
- 0x40, 0xc6, 0x64, 0x40,
- 0x44, 0x2a, 0xe0, 0x00,
- 0x08, 0x06, 0x60, 0x12,
- 0x00, 0x06, 0xf0, 0x00,
- 0x42, 0x2a, 0x80, 0x00,
- 0x42, 0x42, 0xe6, 0x86,
- 0xce, 0x2c, 0xf1, 0x84,
- 0xe0, 0x10, 0x46, 0x13,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x80, 0x8b, 0x06, 0x6b,
- 0x60, 0x38, 0x0c, 0x09,
- 0x21, 0x0b, 0x84, 0x7b,
- 0x86, 0x95, 0x81, 0x01,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xfc, 0x78, 0xe8,
- 0x40, 0x96, 0x00, 0xab,
- 0x14, 0x0a, 0xe0, 0x08,
- 0x84, 0x45, 0xe2, 0xa4,
- 0x67, 0x71, 0x12, 0x80,
- 0x8e, 0x1b, 0x40, 0x03,
- 0x8c, 0x2b, 0x12, 0x0b,
- 0xef, 0xfc, 0x69, 0x48,
- 0x41, 0x26, 0x00, 0x8b,
- 0xa1, 0x8b, 0xe0, 0x0c,
- 0x9c, 0x00, 0x50, 0xa0,
- 0xe3, 0xc8, 0x10, 0x0a,
- 0x0c, 0x0c, 0x80, 0x95,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x8e, 0x1b, 0x12, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xa1, 0x0b, 0x8c, 0x2b,
- 0xdc, 0x00, 0x50, 0x00,
- 0x0c, 0x0c, 0x90, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe1, 0x00, 0x1e, 0x06,
- 0x61, 0x9c, 0x00, 0x46,
- 0x66, 0x38, 0x83, 0x11,
- 0xc1, 0xc3, 0xef, 0xb8,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x73, 0xd8, 0x81, 0x11,
- 0x81, 0x81, 0x6f, 0xbc,
- 0x60, 0x00, 0x42, 0x76,
- 0x62, 0x98, 0x8c, 0x0b,
- 0x7e, 0xd8, 0xe8, 0x24,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x01, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x0c, 0x2b, 0xef, 0xdc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xf5, 0x42, 0x20,
- 0x44, 0x4a, 0x40, 0xff,
- 0x4c, 0x13, 0xe0, 0x98,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x70, 0x00, 0x39,
- 0xf3, 0xec, 0x44, 0x30,
- 0xf8, 0x70, 0x40, 0x21,
- 0x4c, 0x81, 0x84, 0x45,
- 0x40, 0x2b, 0x6c, 0x21,
- 0x73, 0xf9, 0x42, 0x10,
- 0x4c, 0x13, 0xc0, 0xff,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x20, 0x40, 0x81,
- 0xf8, 0x10, 0x00, 0x19,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xf8, 0x10, 0x40, 0x11,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf8, 0x30, 0x00, 0x19,
- 0x40, 0x11, 0xc8, 0x19,
- 0x40, 0x81, 0xf8, 0x30,
- 0x00, 0x09, 0xe0, 0x30,
- 0x40, 0x0a, 0xf8, 0x30,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x43, 0xf6, 0x1c, 0x04,
- 0xff, 0xc0, 0x6f, 0xfd,
- 0x02, 0x0e, 0x02, 0x0f,
- 0x40, 0x00, 0xf0, 0x00,
- 0xc3, 0x00, 0x7c, 0x01,
- 0x9c, 0x04, 0x9c, 0x0e,
- 0x9c, 0x0e, 0x82, 0x0f,
- 0x6e, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x38, 0x63, 0x11,
- 0x41, 0xc6, 0xa3, 0x0b,
- 0x00, 0x20, 0x12, 0xfd,
- 0x00, 0x01, 0x02, 0x06,
- 0x4c, 0x81, 0xbf, 0xc1,
- 0x80, 0x38, 0x03, 0x11,
- 0x80, 0x00, 0x40, 0x15,
- 0x68, 0x00, 0x5f, 0xa8,
- 0x42, 0x86, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x24, 0x5b, 0x08,
- 0xef, 0xfc, 0x76, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8b, 0x11, 0x00, 0x6b,
- 0xe8, 0x28, 0x56, 0x88,
- 0x61, 0x24, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x06,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x16, 0x81, 0x11,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x08, 0xef, 0xdc,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x0c, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x13, 0x7d,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x5c, 0xa8,
- 0xe8, 0x00, 0x5c, 0x08,
- 0x61, 0x44, 0x40, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0xec, 0x04, 0x02, 0x00,
- 0x84, 0x95, 0xe7, 0x1d,
- 0xec, 0x2c, 0x02, 0x00,
- 0x84, 0xb5, 0xe7, 0x1d,
- 0xec, 0x10, 0x02, 0x00,
- 0x84, 0xd5, 0xe5, 0x1d,
- 0x86, 0x25, 0xad, 0x0b,
- 0x86, 0x65, 0xb3, 0x0b,
- 0x86, 0xb5, 0xb5, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x20, 0x58, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x58,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x40, 0x35, 0x48,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x08, 0x38, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x54,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x4c, 0x10, 0xc8,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0xb5, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0x75, 0xf2, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x01, 0x01,
- 0x68, 0x20, 0x7d, 0xa8,
- 0x03, 0x46, 0x81, 0x61,
- 0x83, 0x31, 0x61, 0x4c,
- 0x08, 0x36, 0x84, 0x24,
- 0xe1, 0x14, 0x44, 0xc6,
- 0x90, 0x36, 0x88, 0x44,
- 0x08, 0x66, 0x88, 0x24,
- 0x84, 0x14, 0x87, 0x21,
- 0x83, 0x11, 0x04, 0x26,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x20, 0x3c, 0x68,
- 0x61, 0x14, 0x40, 0xc6,
- 0x80, 0x04, 0x83, 0x11,
- 0xc1, 0x83, 0x80, 0x16,
- 0xdd, 0x93, 0xc7, 0x13,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x40, 0x96, 0xb3, 0x0b,
- 0x4c, 0x01, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0x40, 0x66, 0x82, 0x25,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x40, 0xf8, 0xe8, 0x50,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0xd1, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x15,
- 0x6c, 0x79, 0x0c, 0x19,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0x01, 0xe6, 0x86,
- 0x67, 0xf9, 0x00, 0x8a,
- 0x41, 0xd6, 0xc0, 0x03,
- 0x0e, 0x66, 0x00, 0x3c,
- 0x00, 0x04, 0x80, 0x04,
- 0xa1, 0x7b, 0x5a, 0x80,
- 0x66, 0x31, 0x4c, 0x03,
- 0x82, 0x45, 0xc0, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x68, 0x0c, 0x70, 0x48,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x47, 0xb8, 0x98, 0x75,
- 0x8c, 0x0b, 0x68, 0x44,
- 0x6c, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2b,
- 0x88, 0x55, 0xb3, 0x0b,
- 0x92, 0xd5, 0xa1, 0x7b,
- 0x68, 0x3c, 0x72, 0xc8,
- 0x00, 0x7b, 0x8c, 0x0b,
- 0xe1, 0x34, 0x41, 0x06,
- 0x02, 0x96, 0x00, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x0e, 0x00, 0x16,
- 0x0c, 0x19, 0xff, 0xf8,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xe3, 0xf0, 0x02, 0x0a,
- 0xc4, 0x04, 0x00, 0x10,
- 0x6c, 0xfd, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xe8, 0x04, 0x4b, 0xe8,
- 0x8c, 0x15, 0xa1, 0x7b,
- 0x21, 0x7b, 0x87, 0x85,
- 0xe0, 0x00, 0x40, 0x66,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8a, 0x15, 0xc0, 0x2b,
- 0x61, 0x4c, 0x55, 0x46,
- 0x66, 0xe0, 0x10, 0x60,
- 0x28, 0x04, 0xc0, 0xa3,
- 0x67, 0x61, 0x12, 0x60,
- 0x02, 0x60, 0xc0, 0x9f,
- 0x40, 0x54, 0x65, 0xc1,
- 0x65, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x54,
- 0x40, 0x54, 0x66, 0xd1,
- 0x5e, 0xd8, 0x90, 0x4b,
- 0x92, 0x5b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x28, 0x04, 0x82, 0xf5,
- 0x66, 0x31, 0x02, 0x60,
- 0x08, 0x60, 0xc0, 0xad,
- 0x40, 0xa1, 0x64, 0x71,
- 0x61, 0x78, 0x90, 0x2b,
- 0x92, 0x3b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x38, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x0c,
- 0x80, 0x55, 0xa1, 0x0b,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x28, 0x04, 0xdd, 0x93,
- 0x64, 0x81, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x99,
- 0x40, 0xa2, 0x65, 0x21,
- 0x50, 0xd8, 0x90, 0x1b,
- 0x73, 0x95, 0xef, 0xf8,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0x64, 0x51, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x03,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x87, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x64, 0x39, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x02,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x18, 0x03, 0x46,
- 0x64, 0x18, 0x01, 0x4a,
- 0x84, 0x14, 0xc0, 0x01,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xdd, 0x93, 0x84, 0x06,
- 0x66, 0x61, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x66, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x86, 0xc5, 0x80, 0x00,
- 0x64, 0x99, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x56, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x84, 0x85, 0x80, 0x00,
- 0x66, 0xc9, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x02,
- 0x04, 0x46, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x82, 0x45, 0x80, 0x00,
- 0x64, 0x95, 0x03, 0x0a,
- 0x03, 0x06, 0x40, 0x02,
- 0x04, 0x14, 0xe1, 0x04,
- 0x04, 0x26, 0x87, 0x21,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x04, 0x03, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x79, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x03, 0x0a, 0xc4, 0x17,
- 0xc0, 0x0f, 0x66, 0x81,
- 0x02, 0x8a, 0x86, 0xf5,
- 0xc0, 0x0f, 0x64, 0xf5,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x06,
- 0x80, 0x00, 0x02, 0x15,
- 0x02, 0x8a, 0x84, 0x85,
- 0xc0, 0x0c, 0x66, 0xcd,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x16,
- 0x80, 0x00, 0x02, 0x15,
- 0x03, 0x0a, 0x82, 0x45,
- 0x40, 0x0a, 0x64, 0xa1,
- 0xe1, 0x04, 0x02, 0xc6,
- 0x85, 0x21, 0x04, 0x14,
- 0x80, 0x00, 0x04, 0x36,
- 0x02, 0xc6, 0x84, 0x26,
- 0x84, 0x14, 0xe1, 0x04,
- 0x40, 0x11, 0x84, 0x18,
- 0xc0, 0x2b, 0x65, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x05, 0x86,
- 0x88, 0x28, 0x88, 0x24,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x09, 0x0e, 0x0d,
- 0xc1, 0x18, 0x05, 0x46,
- 0xc0, 0x00, 0x04, 0x25,
- 0x81, 0xb0, 0x02, 0x14,
- 0x40, 0x00, 0x04, 0x29,
- 0x84, 0x04, 0x02, 0x10,
- 0xc4, 0x04, 0x04, 0x20,
- 0xc0, 0x0a, 0x42, 0x1a,
- 0x6e, 0x01, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xe1, 0x24, 0x01, 0x46,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x06, 0x04, 0x26,
- 0x84, 0x14, 0xe1, 0x14,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x94,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x24, 0x01, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x26, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x18, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0x25, 0x1b, 0xc0, 0x0b,
- 0xe1, 0x24, 0x03, 0x46,
- 0x82, 0x45, 0x84, 0x24,
- 0x42, 0x4a, 0x88, 0x18,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x0c, 0x0c, 0x83, 0x11,
- 0x23, 0xf8, 0xf2, 0xfc,
- 0x3e, 0x0e, 0xe0, 0x20,
- 0x88, 0x18, 0x8c, 0x0b,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x86, 0x08, 0x16,
- 0x75, 0x78, 0xe0, 0x0c,
- 0x81, 0x21, 0x68, 0x50,
- 0x61, 0x44, 0x10, 0xc6,
- 0xe1, 0x48, 0x53, 0x86,
- 0xff, 0xa1, 0x20, 0x04,
- 0xe1, 0x24, 0x57, 0x46,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x4e, 0x00,
- 0x80, 0xc5, 0xa1, 0x7b,
- 0x6f, 0xa9, 0x0c, 0x05,
- 0xa5, 0x0b, 0xc0, 0x0b,
- 0xa4, 0x04, 0x82, 0xd5,
- 0x94, 0x0d, 0x80, 0x00,
- 0x0c, 0x29, 0x84, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x02, 0x96,
- 0x68, 0x0c, 0x59, 0x28,
- 0x81, 0x95, 0x8c, 0x0b,
- 0x80, 0x08, 0xa0, 0x04,
- 0x01, 0x55, 0xc7, 0x07,
- 0xf0, 0x04, 0x4e, 0x00,
- 0xef, 0xfc, 0x52, 0xe8,
- 0x80, 0x04, 0xac, 0x04,
- 0xf8, 0x35, 0xa1, 0x0b,
- 0x83, 0x11, 0x3e, 0x04,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x20, 0x28,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x36, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0x78, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x3e, 0x0e, 0x81, 0x81,
- 0xe1, 0x24, 0x01, 0xc6,
- 0x55, 0x46, 0x00, 0x04,
- 0x80, 0x86, 0xe1, 0x24,
- 0x80, 0x64, 0xa8, 0x04,
- 0x8e, 0x0b, 0x00, 0x14,
- 0xe8, 0x20, 0x74, 0xa8,
- 0x43, 0xa6, 0x03, 0x91,
- 0x03, 0x21, 0xe0, 0x0c,
- 0x70, 0x38, 0x8e, 0x0b,
- 0x41, 0x86, 0xe8, 0x50,
- 0x80, 0x14, 0xe1, 0x14,
- 0x03, 0x46, 0x04, 0x8c,
- 0x84, 0x14, 0xe1, 0x24,
- 0xc4, 0x29, 0x84, 0x28,
- 0x43, 0x46, 0x04, 0x26,
- 0x04, 0x14, 0xe1, 0x18,
- 0x84, 0xb8, 0x83, 0x21,
- 0x02, 0xc6, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x24,
- 0x02, 0x86, 0x04, 0x96,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x00, 0x9c,
- 0xe8, 0x50, 0x6e, 0x88,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0xa9, 0x11,
- 0x8e, 0x0b, 0x00, 0x96,
- 0xe8, 0x20, 0x72, 0x08,
- 0x60, 0x0c, 0x02, 0x86,
- 0x6d, 0xb8, 0x81, 0x21,
- 0x8e, 0x0b, 0x68, 0x50,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0x52, 0x00, 0xc7, 0x07,
- 0x12, 0x0a, 0xf0, 0x04,
- 0x80, 0xc5, 0xfb, 0xfc,
- 0x6f, 0xa9, 0x0e, 0x05,
- 0xa3, 0x0b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x86, 0xb5,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x02, 0xa6,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0xe8, 0x0c, 0x50, 0xa8,
- 0x00, 0xc6, 0x81, 0x85,
- 0x80, 0x04, 0xe1, 0x44,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x52, 0x00,
- 0x80, 0x04, 0xa8, 0x04,
- 0xf4, 0x45, 0x81, 0x6b,
- 0x8e, 0x0b, 0x2b, 0x11,
- 0xe8, 0x20, 0x6e, 0x08,
- 0x00, 0x14, 0xa8, 0x04,
- 0x6d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xc6, 0xe8, 0x20,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xbe, 0x04, 0x83, 0x11,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x16, 0x08,
- 0x70, 0x01, 0x00, 0x06,
- 0x02, 0x06, 0x40, 0x20,
- 0xff, 0xc0, 0x60, 0x01,
- 0xdd, 0x93, 0x80, 0x1e,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x81, 0x01, 0x04, 0x6b,
- 0x68, 0x20, 0x55, 0x08,
- 0x43, 0x86, 0x81, 0x11,
- 0x49, 0xc6, 0x61, 0x48,
- 0x04, 0x24, 0xe1, 0x48,
- 0x70, 0x01, 0x02, 0x06,
- 0x04, 0x34, 0xc0, 0x20,
- 0x88, 0x58, 0xa1, 0x8b,
- 0x08, 0x48, 0x90, 0x24,
- 0x60, 0x01, 0x04, 0x06,
- 0x0c, 0xc9, 0xff, 0xc0,
- 0x40, 0x2b, 0x6c, 0x19,
- 0xa6, 0x5f, 0x84, 0x3f,
- 0x60, 0xc7, 0xd0, 0x47,
- 0x46, 0x52, 0xa8, 0x5f,
- 0x0c, 0x49, 0xf9, 0xb0,
- 0xc0, 0x2c, 0x0c, 0xfd,
- 0xc0, 0xe0, 0x08, 0x44,
- 0x44, 0x22, 0x00, 0xb5,
- 0xa1, 0x7b, 0xd0, 0x90,
- 0x49, 0xfe, 0x80, 0xc5,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xa4, 0x3f, 0x88, 0x3f,
- 0x83, 0x11, 0x04, 0x3e,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x20, 0x12, 0x08,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x50, 0x06, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0xa0,
- 0x40, 0x2d, 0x67, 0xcd,
- 0x20, 0x9e, 0x81, 0x91,
- 0xe1, 0x4c, 0x05, 0xc6,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xc0, 0x00, 0x00, 0x16,
- 0x0c, 0xf5, 0x4c, 0x01,
- 0x40, 0x06, 0x40, 0x2c,
- 0x80, 0x04, 0xe1, 0x4c,
- 0x88, 0x04, 0x80, 0x74,
- 0xe1, 0xe0, 0x16, 0x74,
- 0xe0, 0xe0, 0x14, 0xb4,
- 0xfc, 0xc0, 0x02, 0xa4,
- 0x00, 0x74, 0x00, 0x1e,
- 0x08, 0x14, 0xe1, 0xc0,
- 0xfc, 0xc4, 0x04, 0xa4,
- 0xf0, 0x10, 0x00, 0x0a,
- 0x94, 0x05, 0x84, 0x2e,
- 0xf0, 0x08, 0x00, 0x0a,
- 0x00, 0x0a, 0x98, 0x85,
- 0xaa, 0x65, 0xf0, 0x0c,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x40, 0x00, 0x13, 0x68,
- 0xc1, 0x4c, 0x17, 0xc6,
- 0x02, 0x56, 0x04, 0xab,
- 0x6e, 0xd8, 0xe0, 0x10,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x61, 0x98, 0x05, 0x46,
- 0xfb, 0x80, 0x00, 0x74,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x02, 0x06, 0x40, 0x20,
- 0xc0, 0x20, 0x73, 0x01,
- 0x40, 0x12, 0x20, 0x43,
- 0x20, 0x14, 0xf1, 0x80,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x84,
- 0xd5, 0x8e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x1f, 0x15, 0xf6, 0x15,
- 0x02, 0x56, 0x94, 0x2b,
- 0x8c, 0x0b, 0x60, 0x80,
- 0x68, 0x20, 0x6a, 0xa8,
- 0x0c, 0x0b, 0x84, 0x7b,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x40, 0x00, 0xac, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xef, 0xf8, 0x7c, 0x08,
- 0x8e, 0x2b, 0x1b, 0xa5,
- 0x02, 0x56, 0x3e, 0x2e,
- 0x69, 0x38, 0xe0, 0x20,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x7b, 0x80, 0x00, 0x74,
- 0x72, 0xfc, 0x43, 0xc6,
- 0x40, 0x12, 0xc0, 0x20,
- 0x02, 0x46, 0x71, 0x80,
- 0xc0, 0x20, 0x72, 0xc0,
- 0x04, 0x10, 0x00, 0x34,
- 0x09, 0x91, 0xe4, 0x00,
- 0x17, 0xc6, 0x88, 0x11,
- 0x08, 0x3e, 0xe1, 0x4c,
- 0xe1, 0x98, 0x05, 0x46,
- 0x08, 0xca, 0x85, 0xa5,
- 0xec, 0x08, 0x0a, 0x40,
- 0x0a, 0x34, 0x77, 0x5d,
- 0x4a, 0x50, 0xe1, 0x90,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x80, 0x00, 0x08, 0x16,
- 0x66, 0x96, 0x48, 0x4a,
- 0x20, 0x74, 0xe1, 0x37,
- 0x46, 0xc0, 0x86, 0xc3,
- 0x41, 0xff, 0x73, 0xf1,
- 0xe1, 0x88, 0x0a, 0x44,
- 0x8a, 0xcb, 0x08, 0x01,
- 0x82, 0x7b, 0x0e, 0x33,
- 0x4d, 0xa4, 0x81, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xa1, 0xcb, 0xdd, 0xae,
- 0x00, 0x34, 0xfe, 0x75,
- 0xfb, 0x80, 0x18, 0x94,
- 0x88, 0xc3, 0x44, 0x57,
- 0x12, 0xc0, 0x0a, 0x13,
- 0xc5, 0x3e, 0xe4, 0x10,
- 0xf0, 0x3c, 0x48, 0x30,
- 0xf4, 0x95, 0xbf, 0x4b,
- 0x91, 0xf5, 0xbe, 0x24,
- 0x60, 0x40, 0x02, 0x56,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x4c, 0x91, 0xe8, 0x20,
- 0x40, 0x38, 0x64, 0xc5,
- 0x4a, 0x58, 0x8c, 0x0b,
- 0x45, 0xd8, 0xe8, 0x00,
- 0x0c, 0x0b, 0xef, 0xfc,
- 0x40, 0x15, 0x6e, 0x09,
- 0xff, 0xfc, 0x03, 0xee,
- 0xe8, 0x00, 0x0e, 0x0a,
- 0x42, 0x00, 0x82, 0x0f,
- 0x40, 0x00, 0x7c, 0x04,
- 0x4c, 0x13, 0xfd, 0x04,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x98, 0x03, 0x86,
- 0x4c, 0x03, 0x84, 0x9e,
- 0x40, 0x15, 0x6e, 0x09,
- 0xfb, 0x80, 0x00, 0x74,
- 0x62, 0xe5, 0x4c, 0xb1,
- 0x17, 0xc6, 0x40, 0x15,
- 0x8e, 0x05, 0xe1, 0x4c,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x05, 0x46, 0x40, 0x20,
- 0x02, 0x06, 0xe1, 0x98,
- 0x40, 0x20, 0x73, 0x01,
- 0x20, 0x14, 0xa0, 0x43,
- 0xf1, 0x80, 0x40, 0x12,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x94,
- 0xd5, 0x9e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x0c, 0x19, 0xf6, 0x15,
- 0x40, 0x15, 0x62, 0x65,
- 0xe1, 0x4c, 0x00, 0x46,
- 0x88, 0x19, 0x80, 0x04,
- 0x44, 0x20, 0x80, 0x28,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x0c, 0x09, 0x80, 0x26,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x6c, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x45, 0x88,
- 0x00, 0x60, 0x20, 0x44,
- 0xc0, 0x54, 0x65, 0x01,
- 0x7b, 0x80, 0x04, 0x04,
- 0x19, 0x11, 0x81, 0x01,
- 0x72, 0xc1, 0x06, 0x46,
- 0x4f, 0x58, 0xc0, 0x20,
- 0x2c, 0x14, 0xe8, 0x00,
- 0x00, 0x2e, 0x9f, 0x21,
- 0x7c, 0x51, 0x4e, 0xa0,
- 0x84, 0x7e, 0xc3, 0x00,
- 0xef, 0xf8, 0x6d, 0xe8,
- 0xa9, 0x91, 0x0e, 0x2b,
- 0x60, 0x01, 0x02, 0x06,
- 0x00, 0x94, 0x7f, 0xc0,
- 0x2c, 0x24, 0xfb, 0x80,
- 0xa0, 0x1f, 0x84, 0x1f,
- 0x7c, 0x01, 0x40, 0x10,
- 0x88, 0x0e, 0xc3, 0x00,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x80, 0x95, 0xe0, 0x98,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x8c, 0x0b, 0xdd, 0x93,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0xa5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0x86, 0x00, 0x6b,
- 0x80, 0x14, 0xe1, 0x48,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xbc,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0x7c, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0xef, 0xf8, 0x7a, 0x68,
- 0x83, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x22, 0x78, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0x08, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x61, 0x45, 0x00, 0x29,
- 0x0a, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x65, 0xc1,
- 0x62, 0x11, 0x00, 0x39,
- 0x91, 0xc1, 0x40, 0x15,
- 0x81, 0x71, 0x01, 0x61,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x1d, 0x00, 0x19,
- 0x40, 0x21, 0xc0, 0x15,
- 0x40, 0x15, 0x63, 0x09,
- 0x40, 0x31, 0x81, 0x21,
- 0xc0, 0x15, 0x63, 0x0d,
- 0x06, 0x10, 0x07, 0xc5,
- 0x0c, 0x4a, 0xe4, 0x40,
- 0x0c, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x0e, 0x06, 0x04, 0x10,
- 0x94, 0x84, 0x80, 0x00,
- 0x50, 0x0a, 0x51, 0x84,
- 0x82, 0x25, 0xe4, 0x9c,
- 0x6c, 0x34, 0x12, 0x80,
- 0x12, 0xda, 0xa1, 0x8b,
- 0x42, 0x0a, 0xe4, 0x08,
- 0x80, 0x95, 0xed, 0x80,
- 0x82, 0x61, 0x02, 0x71,
- 0xbf, 0x8b, 0x85, 0x05,
- 0xa1, 0x6b, 0x88, 0x25,
- 0x00, 0x95, 0x82, 0x45,
- 0xc0, 0x0d, 0x69, 0x6d,
- 0x12, 0xc0, 0x93, 0x6b,
- 0x40, 0x93, 0x84, 0x20,
- 0x80, 0x16, 0x0b, 0xe1,
- 0xf0, 0x3c, 0x52, 0x80,
- 0x02, 0xa5, 0xb9, 0x9b,
- 0x9b, 0x80, 0x18, 0xc4,
- 0xa1, 0x9b, 0x49, 0x87,
- 0x73, 0xfd, 0x50, 0x80,
- 0x18, 0xc4, 0x40, 0x0f,
- 0x50, 0x8a, 0xfb, 0x80,
- 0x90, 0xc3, 0xc6, 0xa6,
- 0x88, 0xc1, 0x7d, 0x05,
- 0xe5, 0xfc, 0x0d, 0x0a,
- 0x40, 0x23, 0xf0, 0xa5,
- 0x40, 0x0a, 0x68, 0x95,
- 0xfb, 0x80, 0x08, 0xc4,
- 0x68, 0x89, 0x40, 0x13,
- 0x88, 0x33, 0x40, 0x0a,
- 0x6f, 0xf1, 0x06, 0x8a,
- 0x0a, 0x34, 0x40, 0x2b,
- 0x00, 0x49, 0xfb, 0x80,
- 0x00, 0x2d, 0x07, 0xcd,
- 0x40, 0x13, 0x88, 0x11,
- 0x40, 0x0a, 0x68, 0x8d,
- 0xec, 0x04, 0x02, 0x30,
- 0x68, 0x91, 0x40, 0x33,
- 0x06, 0x06, 0x40, 0x0a,
- 0xc0, 0x20, 0x70, 0x01,
- 0x68, 0x85, 0x40, 0x13,
- 0x02, 0x14, 0x40, 0x0a,
- 0x48, 0x40, 0xfb, 0x80,
- 0xa6, 0x1f, 0x1c, 0x20,
- 0x07, 0xcd, 0x40, 0x41,
- 0x00, 0x45, 0x80, 0x2d,
- 0xc0, 0x0d, 0x69, 0x69,
- 0x64, 0xf9, 0x40, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x89, 0x41, 0x09, 0x5b,
- 0x0e, 0x09, 0x00, 0x2b,
- 0x40, 0x43, 0xc0, 0x15,
- 0xc0, 0x0a, 0x68, 0x81,
- 0x12, 0xfd, 0x44, 0x20,
- 0x40, 0x23, 0xc0, 0xff,
- 0x40, 0x15, 0x0e, 0x09,
- 0xe1, 0x40, 0x04, 0x46,
- 0x00, 0x86, 0x08, 0x24,
- 0x88, 0x1e, 0xe1, 0x40,
- 0x80, 0x1e, 0x80, 0x04,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x98, 0x0b, 0x46,
- 0xe0, 0x90, 0x0c, 0x14,
- 0x4e, 0x00, 0x14, 0xca,
- 0x0c, 0x64, 0xf0, 0x3c,
- 0xa1, 0x0b, 0x7b, 0x80,
- 0x00, 0x16, 0x2e, 0x6f,
- 0x58, 0x22, 0x80, 0x00,
- 0x40, 0x1a, 0x71, 0xb0,
- 0x04, 0xc4, 0xe6, 0x82,
- 0x02, 0xc4, 0x60, 0xc0,
- 0x24, 0x6f, 0xfb, 0x80,
- 0x49, 0x6e, 0x86, 0x2b,
- 0x94, 0x5a, 0xc5, 0x07,
- 0x02, 0x00, 0x02, 0x53,
- 0x4a, 0x50, 0xe4, 0x04,
- 0xc1, 0xff, 0x73, 0xf1,
- 0x8a, 0x43, 0x01, 0x65,
- 0x00, 0x00, 0x51, 0x54,
- 0xc9, 0x5e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x40, 0x32, 0xc4, 0x17,
- 0x0c, 0x0c, 0xf0, 0x84,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x36, 0x6e, 0x01,
- 0x40, 0x60, 0xa3, 0x0b,
- 0x4f, 0x78, 0x9c, 0x00,
- 0x41, 0x06, 0x88, 0x00,
- 0x02, 0x96, 0x61, 0x34,
- 0x00, 0x04, 0xe0, 0x04,
- 0xe1, 0xa0, 0x50, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x71, 0x40, 0x2b,
- 0x00, 0x16, 0xa0, 0x7e,
- 0x0c, 0x0b, 0x81, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x67, 0xb8, 0x81, 0x01,
- 0x7e, 0x0e, 0xe8, 0x1c,
- 0xe1, 0x48, 0x41, 0x86,
- 0x41, 0xc6, 0x00, 0x14,
- 0xfc, 0x1e, 0xe1, 0x48,
- 0x80, 0x04, 0x84, 0x18,
- 0x0c, 0x29, 0x80, 0x08,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x68, 0x89, 0x0c, 0x0b,
- 0x06, 0x04, 0x40, 0x0a,
- 0x02, 0x29, 0xe0, 0xa0,
- 0x3e, 0x3e, 0xa6, 0x1f,
- 0x24, 0x1f, 0xf0, 0x27,
- 0x4c, 0x15, 0xc5, 0x07,
- 0x40, 0x02, 0x68, 0x01,
- 0x64, 0x31, 0x06, 0x60,
- 0x83, 0x11, 0xc0, 0x28,
- 0x46, 0x75, 0xc1, 0x1d,
- 0x02, 0x10, 0x58, 0x04,
- 0x7e, 0x75, 0xc4, 0x04,
- 0xc4, 0x10, 0x06, 0x30,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x08, 0x60, 0x40, 0x1c,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x65, 0xc1, 0x0a, 0x60,
- 0x81, 0xb1, 0x40, 0xd9,
- 0xbc, 0x0e, 0x81, 0xa1,
- 0xf8, 0x04, 0x46, 0x05,
- 0x09, 0x0e, 0xa0, 0x04,
- 0xe1, 0x98, 0x01, 0x46,
- 0x81, 0x01, 0x00, 0x9a,
- 0x14, 0x4a, 0x8b, 0x85,
- 0x14, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x16, 0x06, 0x04, 0x10,
- 0x94, 0x14, 0x80, 0x00,
- 0x42, 0x0a, 0x51, 0x14,
- 0x90, 0xe5, 0xe4, 0xac,
- 0x84, 0x25, 0xa1, 0xab,
- 0x69, 0x6d, 0x0c, 0x25,
- 0x85, 0xab, 0xc0, 0x0d,
- 0x08, 0x91, 0x0c, 0x0b,
- 0x40, 0x00, 0x80, 0x0a,
- 0x80, 0xff, 0x13, 0xf1,
- 0x90, 0x98, 0x40, 0x02,
- 0x06, 0x00, 0x0e, 0xa5,
- 0x80, 0x28, 0x04, 0x01,
- 0xec, 0x34, 0x04, 0x10,
- 0x80, 0xb5, 0xe4, 0x2d,
- 0xbf, 0x1b, 0x4d, 0x1e,
- 0x87, 0x25, 0x8a, 0xd5,
- 0x8a, 0x65, 0xa1, 0x1b,
- 0x70, 0x3c, 0x58, 0x10,
- 0xe1, 0xc0, 0x04, 0x14,
- 0xb9, 0xcb, 0x0c, 0x1e,
- 0x84, 0x8b, 0x01, 0x71,
- 0x49, 0x17, 0x82, 0x45,
- 0x4e, 0x10, 0xa1, 0xcb,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x4e, 0x7a, 0x80, 0x8b,
- 0xc5, 0x77, 0xc6, 0xb2,
- 0x92, 0x23, 0x09, 0x14,
- 0x73, 0xf1, 0x40, 0x20,
- 0x88, 0x31, 0x41, 0xff,
- 0x02, 0x03, 0x86, 0x2b,
- 0x81, 0xa5, 0x8e, 0x1b,
- 0x02, 0x10, 0x21, 0x8b,
- 0x00, 0xc5, 0xec, 0x04,
- 0x88, 0x01, 0x00, 0x00,
- 0x00, 0x00, 0x44, 0xc5,
- 0xa1, 0x1b, 0x88, 0x21,
- 0x44, 0x77, 0xfc, 0xd5,
- 0x8e, 0x33, 0x90, 0x0b,
- 0x82, 0xa1, 0x02, 0xb1,
- 0xe5, 0xfc, 0x15, 0x0a,
- 0x9d, 0x01, 0xe8, 0xe5,
- 0x9f, 0x01, 0x0c, 0x0e,
- 0xbc, 0x04, 0x8e, 0x0e,
- 0xfc, 0x04, 0xcc, 0x0e,
- 0x0c, 0x19, 0x80, 0x08,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf0, 0x17, 0xbe, 0x24,
- 0xa2, 0x0f, 0xa4, 0x0f,
- 0x68, 0x01, 0x4c, 0x05,
- 0x8c, 0x0b, 0x40, 0x02,
- 0xe8, 0x10, 0x4a, 0xc8,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x80, 0x18, 0x82, 0x65,
- 0x42, 0x10, 0x80, 0x28,
- 0x44, 0x20, 0xf0, 0x80,
- 0xa2, 0x2f, 0xf3, 0x7c,
- 0xf8, 0x80, 0x42, 0x20,
- 0x7e, 0x04, 0x80, 0x16,
- 0x5b, 0xb8, 0x83, 0x11,
- 0x01, 0x86, 0xe8, 0x1c,
- 0x80, 0x04, 0xe1, 0x98,
- 0x0c, 0x0b, 0xa3, 0x0b,
- 0x80, 0x15, 0x0e, 0x09,
- 0x9c, 0xa4, 0x00, 0x04,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x80, 0x85, 0x80, 0x15,
- 0x68, 0x00, 0x49, 0xc8,
- 0x03, 0x01, 0x8c, 0x0b,
- 0x45, 0x18, 0x81, 0x11,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0x1c, 0x38, 0xf2, 0x7c,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x63, 0x09, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x15,
- 0x00, 0xc9, 0x91, 0x15,
- 0x40, 0x36, 0x6e, 0x09,
- 0xfa, 0x80, 0x08, 0x24,
- 0x63, 0x0d, 0x00, 0x69,
- 0x46, 0x02, 0x40, 0x15,
- 0x06, 0x59, 0xf0, 0x90,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x58, 0x6a, 0xa1, 0xcb,
- 0x0c, 0x30, 0x66, 0x92,
- 0xc0, 0xdb, 0x66, 0x10,
- 0x6e, 0x11, 0x46, 0x51,
- 0x86, 0x45, 0xc0, 0x36,
- 0x7a, 0x80, 0x0e, 0xc4,
- 0x12, 0x84, 0x81, 0x81,
- 0xcb, 0x9d, 0xfa, 0x80,
- 0x54, 0x92, 0x84, 0x05,
- 0x56, 0x02, 0xf0, 0x9c,
- 0x16, 0xb9, 0xf0, 0xa8,
- 0xc0, 0x1a, 0x6e, 0x41,
- 0x7c, 0x85, 0xb9, 0xbb,
- 0x84, 0x04, 0x10, 0x80,
- 0x94, 0xcb, 0x32, 0x53,
- 0x81, 0x45, 0x98, 0x56,
- 0x81, 0x71, 0x0b, 0x9b,
- 0x0a, 0x8a, 0x80, 0xa5,
- 0x83, 0x71, 0x74, 0x08,
- 0x18, 0x76, 0x80, 0x75,
- 0x18, 0xc4, 0x8e, 0x5b,
- 0x0c, 0x00, 0x7a, 0x80,
- 0xc0, 0x58, 0x66, 0x40,
- 0x60, 0x88, 0x0e, 0xc4,
- 0xe0, 0x88, 0x12, 0x44,
- 0x7c, 0x1c, 0x0c, 0x85,
- 0x66, 0x10, 0x14, 0x00,
- 0x14, 0x93, 0xc0, 0xdb,
- 0x0a, 0x0a, 0x8c, 0x73,
- 0x82, 0x21, 0x7b, 0xfc,
- 0xe0, 0x40, 0x52, 0x85,
- 0xe8, 0x00, 0x0e, 0x85,
- 0x62, 0x40, 0x52, 0x85,
- 0xe0, 0x84, 0x10, 0xc4,
- 0x64, 0x00, 0x0e, 0x75,
- 0x18, 0x63, 0x8c, 0x83,
- 0xd0, 0x80, 0x58, 0xc2,
- 0x61, 0x40, 0x52, 0x75,
- 0xe0, 0x84, 0x12, 0x44,
- 0x68, 0x01, 0x10, 0x7b,
- 0x94, 0x93, 0x40, 0x01,
- 0x52, 0x73, 0x88, 0xa3,
- 0x10, 0x7b, 0xe6, 0x80,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xe7, 0x80, 0x52, 0x73,
- 0x60, 0x01, 0x0c, 0x79,
- 0x54, 0x71, 0xc0, 0x04,
- 0xc0, 0x01, 0x61, 0x01,
- 0x64, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0xc0, 0x01, 0x62, 0x01,
- 0x68, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0x40, 0x01, 0x63, 0x01,
- 0x18, 0x49, 0x81, 0x41,
- 0xc0, 0x1a, 0x0e, 0x41,
- 0x62, 0x11, 0x46, 0x41,
- 0x44, 0x8a, 0xc0, 0x38,
- 0xde, 0xd5, 0xf4, 0x04,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x1c, 0x50, 0xc8,
- 0x0c, 0x1b, 0x81, 0x11,
- 0x40, 0x0a, 0x68, 0x91,
- 0x00, 0x60, 0x80, 0x7b,
- 0x40, 0x28, 0x64, 0x01,
- 0x70, 0x01, 0x04, 0x06,
- 0x88, 0x11, 0xc0, 0x20,
- 0xc5, 0x17, 0x01, 0x65,
- 0x02, 0x10, 0x41, 0x34,
- 0xc9, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x1b,
- 0x61, 0x48, 0x41, 0x86,
- 0x80, 0x04, 0x8c, 0x2b,
- 0xe0, 0x19, 0x80, 0x18,
- 0x83, 0x01, 0x00, 0x16,
- 0x6f, 0xf8, 0x79, 0x88,
- 0x50, 0xd8, 0x81, 0x11,
- 0x7d, 0x18, 0xef, 0xf8,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x83, 0x11, 0x40, 0x1c,
- 0x4c, 0x03, 0x82, 0x01,
- 0x40, 0x1c, 0x61, 0x8d,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x0d, 0xb8, 0xf2, 0x84,
- 0xc1, 0xc3, 0xe0, 0x1c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x43, 0x86, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x48,
- 0xe0, 0x98, 0x06, 0x04,
- 0xf1, 0x00, 0x46, 0x30,
- 0x44, 0x20, 0x84, 0x28,
- 0x26, 0x2f, 0xf2, 0xfc,
- 0xe1, 0x98, 0x07, 0x86,
- 0x0c, 0x0e, 0x84, 0x26,
- 0x0c, 0x1b, 0x82, 0x09,
- 0x40, 0x15, 0x6e, 0x09,
- 0x42, 0x10, 0xd0, 0x07,
- 0xc0, 0xfe, 0x73, 0xfd,
- 0x4c, 0x13, 0xa0, 0x1f,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xef, 0xf8, 0x4d, 0xc8,
- 0x81, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x35, 0xd8, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xe1, 0x00, 0x01, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xc7, 0x13, 0xc1, 0x83,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x65, 0x39, 0x4c, 0x01,
- 0x04, 0x60, 0x40, 0x2c,
- 0xc0, 0xb1, 0x65, 0x41,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x42, 0x88,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x4e, 0x28,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x68, 0x48, 0x59, 0x88,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x45, 0x76, 0x01, 0x11,
- 0x09, 0x31, 0xe0, 0x00,
- 0x5d, 0x58, 0x8c, 0x0b,
- 0xa3, 0x8b, 0xe8, 0x48,
- 0xa1, 0x0b, 0xfc, 0xb5,
- 0x0c, 0x0b, 0xfc, 0x75,
- 0x52, 0x38, 0x8e, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x01, 0x11, 0xfa, 0xb5,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xb1, 0x45,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xc0, 0x1e, 0xf0,
- 0x60, 0x04, 0x46, 0x86,
- 0x40, 0x31, 0xa5, 0x1b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xa1, 0x81, 0x0e, 0xa5,
- 0xaa, 0x35, 0xa3, 0x1b,
- 0x60, 0x0c, 0x41, 0xe6,
- 0xe0, 0x0c, 0x59, 0xe6,
- 0x01, 0xa6, 0x17, 0x0e,
- 0x11, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0x26,
- 0x01, 0x86, 0x0f, 0x0e,
- 0x15, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x00, 0x06,
- 0xa1, 0x01, 0x0b, 0x0e,
- 0x00, 0x06, 0x09, 0x0e,
- 0x7e, 0x0e, 0xe0, 0x04,
- 0x7c, 0x0e, 0xa1, 0x01,
- 0xe0, 0x04, 0x01, 0x86,
- 0x01, 0x86, 0x0d, 0x0e,
- 0x3e, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0xa6,
- 0x49, 0xf6, 0x3c, 0x0e,
- 0x4b, 0xa6, 0xe0, 0x0c,
- 0x03, 0xa6, 0x60, 0x0c,
- 0x07, 0x06, 0xe0, 0x0c,
- 0x11, 0x06, 0x60, 0x04,
- 0x0d, 0xa6, 0xe0, 0x04,
- 0x13, 0xa6, 0x60, 0x04,
- 0x0f, 0xa6, 0xe0, 0x0c,
- 0x55, 0xa6, 0x60, 0x0c,
- 0x13, 0xce, 0xe0, 0x0c,
- 0xe0, 0x0c, 0x41, 0xe6,
- 0x57, 0xf6, 0x05, 0x95,
- 0x00, 0x06, 0xe0, 0x0c,
- 0x89, 0x11, 0x60, 0x08,
- 0x91, 0x01, 0x13, 0x0e,
- 0x40, 0x06, 0x17, 0x0e,
- 0x0d, 0x0e, 0xe0, 0x00,
- 0x15, 0x0e, 0x85, 0x01,
- 0x0b, 0x0e, 0x83, 0x01,
- 0x09, 0x0e, 0x81, 0x01,
- 0x7e, 0x0e, 0xa1, 0x01,
- 0x7c, 0x0e, 0x83, 0x01,
- 0x0f, 0x0e, 0x81, 0x01,
- 0x11, 0x0e, 0x85, 0x01,
- 0x3e, 0x0e, 0x81, 0x01,
- 0xe0, 0x00, 0x40, 0x06,
- 0x81, 0x31, 0x3c, 0x0e,
- 0x81, 0x91, 0x01, 0x61,
- 0x14, 0x06, 0x01, 0x51,
- 0x01, 0x01, 0xe0, 0x04,
- 0x16, 0x06, 0x81, 0x41,
- 0x81, 0xc1, 0xe0, 0x08,
- 0x8b, 0xc4, 0x88, 0xc6,
- 0x89, 0xc4, 0x8a, 0xc6,
- 0xfe, 0xc4, 0xc8, 0xc6,
- 0xfc, 0xc4, 0xca, 0xc6,
- 0xe0, 0x18, 0x44, 0x81,
- 0xe0, 0x14, 0x44, 0x31,
- 0xe0, 0x10, 0x44, 0xc1,
- 0xe0, 0x1c, 0x44, 0x31,
- 0xe0, 0x20, 0x44, 0x31,
- 0x44, 0x31, 0x95, 0x34,
- 0x8f, 0x34, 0xe0, 0x24,
- 0xe0, 0x28, 0x44, 0x31,
- 0x44, 0x31, 0x8d, 0x34,
- 0x91, 0x34, 0xe0, 0x2c,
- 0xe0, 0x30, 0x44, 0x31,
- 0x44, 0x31, 0xbe, 0x34,
- 0xbc, 0x34, 0xe0, 0x34,
- 0xe0, 0x3c, 0x44, 0x61,
- 0xe0, 0x40, 0x44, 0x61,
- 0xe0, 0x38, 0x44, 0x31,
- 0xe0, 0x48, 0x44, 0x91,
- 0xe0, 0x4c, 0x44, 0x71,
- 0xe0, 0x44, 0x44, 0x11,
- 0xe0, 0x50, 0x44, 0x11,
- 0xe0, 0x58, 0x44, 0xa1,
- 0xe0, 0x54, 0x44, 0x51,
- 0xe0, 0x5c, 0x44, 0x51,
- 0xe0, 0x60, 0x44, 0x51,
- 0xe0, 0x68, 0x44, 0x01,
- 0x44, 0x01, 0x93, 0x04,
- 0x97, 0x04, 0xe0, 0x6c,
- 0xe0, 0x78, 0x44, 0xb1,
- 0xe0, 0x74, 0x44, 0x41,
- 0xe0, 0x64, 0x44, 0x01,
- 0xe0, 0x70, 0x44, 0x01,
- 0xe0, 0x7c, 0x44, 0x41,
- 0xe0, 0xf1, 0x01, 0x01,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x80, 0x6b, 0x25, 0x1b,
- 0x81, 0x01, 0x04, 0x25,
- 0x92, 0x95, 0xa3, 0x1b,
- 0x65, 0x41, 0x02, 0x60,
- 0x8c, 0x0b, 0x40, 0xb1,
- 0xe8, 0x48, 0x62, 0xe8,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x4c, 0x01, 0x83, 0x01,
- 0xc0, 0x2c, 0x65, 0x39,
- 0x42, 0x86, 0x87, 0xe5,
- 0x04, 0x06, 0x60, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x60, 0x11, 0x02, 0x06,
- 0x3e, 0x1e, 0xc4, 0x00,
- 0x09, 0x1c, 0x83, 0x11,
- 0x15, 0x16, 0xa1, 0x11,
- 0xe0, 0x00, 0x42, 0x06,
- 0x85, 0x71, 0x1f, 0x16,
- 0x89, 0x11, 0x25, 0x16,
- 0x31, 0x16, 0xab, 0x16,
- 0xaf, 0x26, 0x91, 0x11,
- 0x04, 0x06, 0x35, 0x26,
- 0x97, 0x06, 0xe0, 0x08,
- 0x9b, 0x76, 0x99, 0x06,
- 0xa1, 0x76, 0x9d, 0x06,
- 0xa7, 0x06, 0xa3, 0x06,
- 0xad, 0x06, 0xa9, 0x06,
- 0xb7, 0x06, 0xb3, 0x06,
- 0xbb, 0x16, 0xb9, 0x06,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x10, 0x02, 0xf0,
- 0xbf, 0x26, 0xbd, 0x06,
- 0xe0, 0x84, 0x5e, 0x01,
- 0x60, 0x8c, 0x5e, 0x01,
- 0x5e, 0x21, 0x8c, 0x0b,
- 0x5e, 0xf8, 0xe0, 0x88,
- 0xa1, 0x0b, 0xe8, 0x48,
- 0x4c, 0x71, 0x80, 0xb5,
- 0xc0, 0x2c, 0x65, 0x39,
- 0xc8, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0xcc,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x64, 0x90, 0x02, 0xf0,
- 0xe4, 0x80, 0x04, 0xf0,
- 0xe8, 0x10, 0x49, 0x68,
- 0x60, 0x90, 0x1e, 0x89,
- 0xe0, 0x04, 0x0e, 0x2a,
- 0xe0, 0x80, 0x1e, 0x79,
- 0x40, 0x01, 0x01, 0x88,
- 0x04, 0x60, 0xc0, 0x00,
- 0x40, 0xb1, 0x65, 0xc1,
- 0x01, 0x55, 0x99, 0x31,
- 0x49, 0x16, 0x81, 0x11,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x65, 0xf1, 0x04, 0x60,
- 0x9d, 0x31, 0x40, 0xb1,
- 0x49, 0x1c, 0x81, 0x45,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x15, 0xc6, 0x01, 0x91,
- 0x07, 0x85, 0xea, 0xf0,
- 0xa1, 0x0b, 0x81, 0xb1,
- 0x40, 0x62, 0x8e, 0x15,
- 0x04, 0x74, 0x70, 0xa8,
- 0x00, 0x9c, 0xfa, 0x80,
- 0xe0, 0x90, 0x00, 0x84,
- 0x79, 0x9c, 0x42, 0x02,
- 0xf0, 0xac, 0x40, 0x62,
- 0x6e, 0xf1, 0x40, 0x11,
- 0x43, 0xf6, 0x40, 0x2b,
- 0x80, 0x00, 0x40, 0x0d,
- 0x60, 0x31, 0x40, 0x91,
- 0x40, 0x11, 0xc0, 0x2c,
- 0x80, 0x2c, 0x42, 0xb1,
- 0x43, 0xf1, 0x40, 0x11,
- 0x02, 0xb4, 0x00, 0x2c,
- 0x40, 0x91, 0xfa, 0x80,
- 0x00, 0x2c, 0x41, 0x71,
- 0x4f, 0x58, 0x8c, 0x0b,
- 0x1e, 0x89, 0xe8, 0x00,
- 0x00, 0x80, 0x60, 0x90,
- 0x02, 0x04, 0xe4, 0x04,
- 0x82, 0xb1, 0x7a, 0x80,
- 0x04, 0x80, 0x84, 0xa1,
- 0x43, 0x4a, 0xe4, 0x24,
- 0x02, 0x0c, 0xe4, 0x08,
- 0x50, 0x00, 0x62, 0x00,
- 0x02, 0x73, 0xdc, 0x00,
- 0x17, 0x0a, 0x81, 0x01,
- 0xf2, 0x05, 0xe5, 0x3c,
- 0xf6, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xee, 0x50, 0x1e, 0xf0,
- 0xa1, 0x1b, 0x00, 0x6b,
- 0x65, 0x39, 0x0c, 0x09,
- 0x84, 0x8b, 0x40, 0x2c,
- 0x42, 0x66, 0x8a, 0x25,
- 0xa5, 0x0b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x91, 0x40, 0x2b,
- 0x81, 0xb1, 0x02, 0xc5,
- 0x8c, 0x0b, 0x05, 0x11,
- 0xef, 0xfc, 0x72, 0x68,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0xc0, 0x00, 0x0b, 0xa8,
- 0x68, 0x04, 0x54, 0x48,
- 0x80, 0xbb, 0x8c, 0x0b,
- 0xe4, 0x40, 0x10, 0x8a,
- 0xa1, 0xbb, 0xa2, 0x75,
- 0x0c, 0x29, 0xa2, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x04, 0x63, 0xe8,
- 0x56, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x9e, 0xd5, 0x81, 0x81,
- 0x23, 0x0b, 0x95, 0x25,
- 0xe0, 0x04, 0x40, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x82, 0x05, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xfc, 0x70, 0x08,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x00, 0xc6, 0xa4, 0x95,
- 0x02, 0xf0, 0x60, 0x08,
- 0x01, 0x55, 0xe4, 0x20,
- 0x45, 0xb6, 0x81, 0xb1,
- 0xec, 0x04, 0x00, 0x00,
- 0xfe, 0x95, 0xa1, 0x0b,
- 0x10, 0x60, 0x01, 0x01,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x15, 0x06, 0x3c, 0x0e,
- 0x89, 0x55, 0xe0, 0x04,
- 0x78, 0x81, 0x10, 0x09,
- 0x95, 0x11, 0x40, 0x01,
- 0x61, 0x90, 0x12, 0x04,
- 0x42, 0x9a, 0x9e, 0x09,
- 0x82, 0x03, 0xe6, 0x86,
- 0xe6, 0x30, 0x01, 0x0a,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xb7, 0x1b, 0x84, 0x14,
- 0x0c, 0x29, 0x82, 0xf5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x03, 0x36,
- 0x68, 0x04, 0x5f, 0xa8,
- 0x0f, 0x36, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xe0, 0x08, 0x00, 0xc6,
- 0xa1, 0xbb, 0x88, 0x05,
- 0x4e, 0xb0, 0x06, 0xd5,
- 0x20, 0x18, 0xdc, 0x00,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x61, 0x40, 0x14, 0x0a,
- 0x88, 0x16, 0x80, 0x23,
- 0x00, 0x04, 0x5e, 0x95,
- 0x80, 0x00, 0x0e, 0x06,
- 0x80, 0x00, 0x5e, 0x95,
- 0x3e, 0x04, 0x82, 0xc5,
- 0x00, 0x04, 0x81, 0x71,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbe, 0x0e, 0xfb, 0x80,
- 0x00, 0x04, 0xbc, 0x04,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbc, 0x0e, 0xfa, 0x80,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x8e, 0xbb, 0x82, 0x81,
- 0xee, 0x75, 0xa1, 0xab,
- 0x8c, 0xf5, 0xa1, 0xbb,
- 0x00, 0x04, 0xbc, 0x04,
- 0xc4, 0x07, 0xfa, 0x80,
- 0x0e, 0x00, 0x3e, 0x04,
- 0x12, 0x04, 0xe4, 0x10,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0x68, 0x00, 0x54, 0xa8,
- 0x03, 0xd5, 0xc4, 0x97,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x40, 0xf6, 0x88, 0xd5,
- 0x40, 0x00, 0x61, 0xa1,
- 0x81, 0xb5, 0x81, 0x11,
- 0x60, 0x80, 0x42, 0x0a,
- 0x10, 0x29, 0x90, 0x2b,
- 0x06, 0xf0, 0x5c, 0x00,
- 0x02, 0x33, 0xe4, 0x20,
- 0x8c, 0x26, 0x82, 0x11,
- 0xe2, 0x30, 0x02, 0x0a,
- 0x0c, 0x0b, 0xfc, 0x95,
- 0x4b, 0x58, 0x90, 0x1b,
- 0x00, 0xbb, 0xe8, 0x04,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x82, 0x75, 0xa1, 0xbb,
- 0x7a, 0x80, 0x02, 0x94,
- 0xfa, 0x80, 0x04, 0x74,
- 0x64, 0x20, 0x06, 0xf0,
- 0x49, 0x98, 0x8c, 0x0b,
- 0x80, 0xbb, 0xe8, 0x48,
- 0x1e, 0xf0, 0x16, 0x0b,
- 0x0c, 0x0c, 0xe6, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0x8b, 0x00, 0x9b,
- 0x0c, 0x90, 0x7c, 0x2e,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xf0, 0xa0, 0x54, 0x62,
- 0xe2, 0x80, 0x14, 0x19,
- 0xe8, 0x00, 0x4c, 0x88,
- 0x80, 0x7b, 0x42, 0x87,
- 0x67, 0xc0, 0x00, 0xa0,
- 0x3c, 0x6e, 0x90, 0x63,
- 0x65, 0x45, 0x12, 0x90,
- 0x3e, 0x0e, 0xc0, 0xb1,
- 0x01, 0xa1, 0x81, 0xb1,
- 0x05, 0x55, 0x81, 0x81,
- 0xfc, 0x24, 0x81, 0x61,
- 0xf8, 0x04, 0x12, 0x09,
- 0x44, 0x0a, 0xa4, 0x18,
- 0xd0, 0x07, 0xe0, 0x80,
- 0x48, 0x00, 0x4d, 0x08,
- 0x0e, 0x0f, 0xa2, 0x0f,
- 0xfb, 0x80, 0x02, 0x64,
- 0x82, 0x45, 0x83, 0x0b,
- 0x10, 0x84, 0x03, 0x11,
- 0x14, 0xa4, 0xfa, 0x80,
- 0xb7, 0x1f, 0x7b, 0x80,
- 0x82, 0x81, 0x22, 0xaf,
- 0x3f, 0xbb, 0x80, 0x6b,
- 0x1e, 0x05, 0x82, 0xb1,
- 0x84, 0x91, 0x00, 0x04,
- 0x80, 0x00, 0x40, 0x81,
- 0x80, 0x00, 0x1e, 0x05,
- 0x80, 0x00, 0x40, 0xa3,
- 0xe0, 0x40, 0x16, 0x0a,
- 0x01, 0x01, 0xf6, 0x75,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xe5, 0x7c, 0x03, 0x0a,
- 0x04, 0x14, 0x82, 0xb5,
- 0x8e, 0x19, 0x61, 0x8c,
- 0x00, 0x09, 0x84, 0x03,
- 0xc0, 0x2c, 0x65, 0xc1,
- 0xe4, 0x84, 0x40, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x64, 0x71, 0x00, 0x00,
- 0x04, 0x14, 0x40, 0xaf,
- 0x00, 0x0b, 0xe0, 0x84,
- 0x80, 0x13, 0x7c, 0x08,
- 0xe5, 0x00, 0x02, 0x19,
- 0x68, 0x4c, 0x68, 0x28,
- 0xd0, 0x07, 0x82, 0x11,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0x9b, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0xab, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0x9b, 0x88, 0x25,
- 0xa1, 0xab, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x50, 0x68,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x45, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe0, 0x2a, 0x40, 0x0a,
- 0xe0, 0x26, 0x42, 0x1a,
- 0xe6, 0xa2, 0x40, 0x0a,
- 0xe0, 0x26, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0xab, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0x9b, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0xab, 0x86, 0xe5,
- 0xa1, 0x9b, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x4d, 0x28,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x05, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe1, 0x26, 0x40, 0x0a,
- 0xe1, 0x2a, 0x42, 0x1a,
- 0xe6, 0xaa, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x90, 0x04, 0x14,
- 0x44, 0x2a, 0xa9, 0x31,
- 0x06, 0x14, 0x66, 0x8e,
- 0x8e, 0x39, 0xe1, 0x84,
- 0x81, 0x21, 0x04, 0x03,
- 0x81, 0x31, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0xe5,
- 0xc0, 0x9c, 0x67, 0x81,
- 0x70, 0x14, 0x00, 0x49,
- 0xe0, 0x80, 0x42, 0x0a,
- 0xc1, 0x90, 0x08, 0x44,
- 0x25, 0x4f, 0x9e, 0x49,
- 0xa8, 0x3f, 0x88, 0x21,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x5d, 0x93, 0xfc, 0x95,
- 0xfb, 0x80, 0x00, 0x34,
- 0x9f, 0x21, 0x01, 0x11,
- 0x81, 0x31, 0x03, 0x95,
- 0x68, 0x84, 0x08, 0x24,
- 0xfb, 0x80, 0x06, 0x34,
- 0xe3, 0x4f, 0x80, 0x4f,
- 0x61, 0x8c, 0x0a, 0x44,
- 0xe1, 0x84, 0x18, 0x44,
- 0x84, 0xc9, 0x02, 0x59,
- 0x18, 0x44, 0x38, 0x5f,
- 0x46, 0x47, 0xe0, 0x84,
- 0x38, 0x5f, 0x88, 0xc9,
- 0xa8, 0x5f, 0x90, 0x49,
- 0x88, 0x11, 0x23, 0x5f,
- 0x02, 0x0a, 0xaa, 0x3f,
- 0xf8, 0xf5, 0xe0, 0x40,
- 0x00, 0x34, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x9d, 0x81, 0x00, 0xab,
- 0x81, 0x91, 0x1e, 0x0b,
- 0x9d, 0x11, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0xa0, 0xfe, 0x95,
- 0x40, 0xb1, 0x65, 0xf1,
- 0x81, 0x45, 0x9d, 0x11,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x85, 0xc5, 0xfe, 0x95,
- 0x70, 0xa4, 0x4c, 0xa2,
- 0xfa, 0x80, 0x0e, 0x94,
- 0x6e, 0xf1, 0x0c, 0xb9,
- 0x94, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x71, 0x08,
- 0x00, 0x0a, 0x8e, 0x1b,
- 0x86, 0xb5, 0xf0, 0x04,
- 0x6c, 0xe9, 0x14, 0x09,
- 0x0c, 0x19, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfa, 0x80, 0x02, 0x14,
- 0x84, 0x35, 0x83, 0x0b,
- 0x73, 0xc0, 0x40, 0xb0,
- 0x47, 0x07, 0x9e, 0x1b,
- 0x02, 0x2b, 0x9e, 0xb9,
- 0x83, 0x31, 0x7c, 0x00,
- 0x80, 0x13, 0x37, 0x3f,
- 0xa6, 0x2f, 0x94, 0x0b,
- 0x8e, 0x1b, 0x04, 0x2c,
- 0xe8, 0x00, 0x42, 0x48,
- 0x12, 0x0a, 0x82, 0x91,
- 0xf4, 0x75, 0xe1, 0x40,
- 0x64, 0x8d, 0x00, 0xe6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x9d, 0x21, 0x01, 0x65,
- 0x04, 0x20, 0x45, 0x3a,
- 0xc1, 0x3c, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x2b,
- 0x64, 0x8d, 0x40, 0xa6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x45, 0x2a, 0x81, 0x55,
- 0xec, 0x04, 0x10, 0x80,
- 0xa1, 0x8b, 0xc1, 0x2c,
- 0x77, 0x58, 0xfe, 0x75,
- 0x94, 0x0b, 0x68, 0x44,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x83, 0x31, 0x00, 0x13,
- 0x6e, 0xf1, 0x02, 0x19,
- 0x04, 0x14, 0xc0, 0x2b,
- 0x9e, 0x19, 0x61, 0x8c,
- 0xa3, 0x3f, 0x3c, 0x29,
- 0x00, 0x2b, 0x84, 0x03,
- 0xc0, 0x16, 0x62, 0xf9,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x62, 0xf9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x02, 0xf0, 0x00, 0x9b,
- 0x5c, 0x18, 0xe4, 0xc0,
- 0x04, 0xf0, 0x68, 0x0c,
- 0x12, 0x39, 0xe4, 0xb0,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x12, 0x09,
- 0x12, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x4d, 0x12, 0x89,
- 0x12, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x39,
- 0x40, 0x3a, 0x8d, 0x3e,
- 0x12, 0x39, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x66, 0x86, 0x54, 0x8a,
- 0xe1, 0x88, 0x02, 0x04,
- 0x52, 0x01, 0x91, 0x01,
- 0x40, 0x26, 0x64, 0x81,
- 0x0f, 0x2e, 0xc5, 0xa7,
- 0x52, 0x21, 0x92, 0x0b,
- 0xc0, 0x26, 0x64, 0x91,
- 0x52, 0x31, 0x89, 0x3e,
- 0xc0, 0x26, 0x64, 0xb1,
- 0x12, 0xb9, 0x8b, 0x1e,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x12, 0x69,
- 0x52, 0x11, 0xc0, 0x2b,
- 0x40, 0x26, 0x64, 0xd1,
- 0xe4, 0xa0, 0x02, 0xf0,
- 0x64, 0xf1, 0x52, 0xa1,
- 0x67, 0xd8, 0xc0, 0x26,
- 0x80, 0x7b, 0xe8, 0x0c,
- 0xa6, 0x55, 0xa1, 0x7b,
- 0x06, 0x64, 0x45, 0xb7,
- 0x7c, 0xbe, 0xe1, 0x88,
- 0x80, 0x65, 0xa1, 0xbb,
- 0x82, 0xf5, 0xa1, 0x3b,
- 0x6c, 0x1d, 0x12, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x12, 0x0b, 0xe0, 0x08,
- 0x7a, 0x78, 0x86, 0x6b,
- 0x4e, 0x96, 0x68, 0x00,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xa0, 0x85, 0x8c, 0x3b,
- 0xc5, 0x87, 0x0d, 0x04,
- 0x4b, 0xf6, 0x7c, 0x14,
- 0x48, 0x8a, 0xe0, 0x0c,
- 0x81, 0xb1, 0x60, 0x0e,
- 0x44, 0x0a, 0xc5, 0x07,
- 0x8f, 0x04, 0xe0, 0x06,
- 0xbe, 0x2e, 0x8b, 0x14,
- 0x02, 0x03, 0xbc, 0x4e,
- 0xe6, 0x8a, 0x42, 0x4a,
- 0x00, 0x00, 0x09, 0x24,
- 0xfe, 0x0e, 0xec, 0x04,
- 0x00, 0xa0, 0x84, 0xa3,
- 0x81, 0xa1, 0x6c, 0x04,
- 0x52, 0x11, 0x8d, 0x0e,
- 0xc0, 0x2c, 0x65, 0x3d,
- 0x4c, 0x92, 0x8b, 0xe5,
- 0x0c, 0x09, 0xf0, 0xac,
- 0xc0, 0x2b, 0x6e, 0xf1,
- 0x62, 0xb1, 0x4c, 0x51,
- 0x4c, 0x51, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xf0, 0x3c, 0x42, 0x00,
- 0x92, 0xd5, 0xc5, 0x1d,
- 0xc8, 0x1d, 0x8d, 0x44,
- 0x7e, 0x14, 0x92, 0x75,
- 0xc2, 0x0d, 0xc9, 0x07,
- 0x8f, 0x14, 0x90, 0xf5,
- 0x90, 0x95, 0xc3, 0x0d,
- 0x61, 0x8c, 0x00, 0xb4,
- 0xf0, 0x1c, 0x44, 0xb0,
- 0x83, 0x41, 0x3e, 0x09,
- 0x04, 0x44, 0x12, 0x03,
- 0x00, 0x19, 0xe8, 0x88,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x08, 0xa4, 0x86, 0x8b,
- 0x0a, 0xf0, 0x7a, 0x80,
- 0x7c, 0x14, 0xe4, 0x90,
- 0xf9, 0x88, 0x58, 0x12,
- 0x04, 0x34, 0x0b, 0x34,
- 0x40, 0xc1, 0xfa, 0x80,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x02, 0x14, 0x92, 0x0b,
- 0x62, 0xd8, 0xfa, 0x80,
- 0x06, 0x34, 0x6f, 0xfc,
- 0x80, 0x7b, 0xfa, 0x80,
- 0x8a, 0x15, 0xa1, 0x7b,
- 0x0a, 0xf0, 0x3e, 0x04,
- 0x1e, 0x49, 0xe4, 0x80,
- 0x1e, 0x39, 0xe0, 0x90,
- 0x3c, 0x04, 0xe0, 0xa0,
- 0xfa, 0x80, 0x02, 0x04,
- 0x63, 0xf1, 0x4c, 0x41,
- 0x04, 0x04, 0xc0, 0x2c,
- 0x92, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x64, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x1e, 0x09, 0x84, 0x75,
- 0x82, 0xa1, 0x60, 0x80,
- 0x4b, 0xf6, 0x10, 0x3b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0x82, 0xb1, 0x89, 0x24,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0x40, 0x98, 0xe8, 0x25,
- 0x92, 0x0b, 0x68, 0x00,
- 0x0e, 0x0b, 0x80, 0x7b,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x81, 0x00, 0x6b,
- 0x6c, 0x59, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x02, 0xf0, 0x8a, 0x85,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x0c, 0x5d, 0x88,
- 0x88, 0xd5, 0xa1, 0x0b,
- 0x6f, 0xdc, 0x40, 0x06,
- 0x80, 0x08, 0x81, 0x91,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x04, 0xf1, 0x00, 0x60,
- 0x00, 0x60, 0xc0, 0xad,
- 0x80, 0xad, 0x04, 0xf9,
- 0x03, 0x15, 0x80, 0x0a,
- 0xfb, 0x80, 0x0e, 0x04,
- 0x7a, 0x80, 0x02, 0x84,
- 0xe4, 0x10, 0x08, 0xf0,
- 0x8c, 0x0b, 0x01, 0x21,
- 0x68, 0x00, 0x42, 0x88,
- 0x7c, 0x0a, 0x8e, 0x3b,
- 0xfb, 0x80, 0x12, 0x94,
- 0x80, 0x93, 0x82, 0x81,
- 0xc1, 0x8d, 0xfc, 0x04,
- 0x4c, 0x93, 0xfc, 0x15,
- 0xc0, 0x16, 0x62, 0x99,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x82, 0xf5, 0xfc, 0x1d,
- 0x02, 0x14, 0x83, 0x31,
- 0x82, 0x11, 0xfa, 0x80,
- 0xf4, 0x38, 0x03, 0x0a,
- 0x08, 0x14, 0x82, 0x15,
- 0x08, 0x34, 0xfa, 0x80,
- 0x80, 0x4f, 0xe8, 0x90,
- 0xfc, 0x85, 0xa1, 0x4b,
- 0x81, 0x01, 0x08, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xf8, 0x00, 0x10, 0xfc,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x80, 0x5b, 0x02, 0x9b,
- 0x63, 0xfc, 0x12, 0x0a,
- 0xfc, 0x2e, 0x81, 0x01,
- 0x90, 0x0c, 0xbe, 0x4e,
- 0x80, 0x00, 0x0b, 0x98,
- 0x10, 0x50, 0x49, 0x37,
- 0xc0, 0xb0, 0x66, 0xb1,
- 0x0e, 0x50, 0x3c, 0x3e,
- 0xc0, 0xb0, 0x64, 0x31,
- 0x81, 0xa1, 0x01, 0xb1,
- 0x81, 0x61, 0x7e, 0x5e,
- 0x0e, 0x09, 0x85, 0x85,
- 0x93, 0x0b, 0xe3, 0xc0,
- 0xfc, 0x04, 0x88, 0x35,
- 0x80, 0xf5, 0xa3, 0x0b,
- 0x6c, 0xe9, 0x0a, 0x09,
- 0xa0, 0x18, 0xc0, 0x2c,
- 0x86, 0x15, 0x83, 0x0b,
- 0x7a, 0x80, 0x02, 0xb4,
- 0x55, 0x78, 0x8a, 0x0b,
- 0x00, 0x0a, 0xef, 0xfc,
- 0x1e, 0x55, 0xf0, 0x04,
- 0x82, 0xd5, 0xc0, 0x0c,
- 0x02, 0xa4, 0x1c, 0x08,
- 0x04, 0xf0, 0xe0, 0x88,
- 0x82, 0xa1, 0x64, 0x50,
- 0x82, 0x23, 0x7e, 0x54,
- 0x80, 0x63, 0x70, 0xad,
- 0x80, 0x45, 0x88, 0xbe,
- 0x02, 0xb1, 0x81, 0x95,
- 0x82, 0x71, 0x82, 0x81,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0xa1, 0xab, 0xf4, 0xe5,
- 0x0a, 0x8b, 0x9e, 0xe5,
- 0xc0, 0x15, 0x6a, 0x7d,
- 0xc9, 0x87, 0xbc, 0x14,
- 0xfb, 0x80, 0x00, 0x14,
- 0x6a, 0x81, 0x0a, 0x0b,
- 0xd1, 0x0d, 0x40, 0x15,
- 0x9c, 0x00, 0x50, 0x10,
- 0xfb, 0x80, 0x02, 0x84,
- 0xc0, 0x1d, 0xc9, 0x07,
- 0xdc, 0x00, 0x50, 0x00,
- 0xec, 0x18, 0x51, 0x0a,
- 0x3e, 0x14, 0x84, 0x65,
- 0xe0, 0x90, 0x00, 0x64,
- 0x00, 0xf0, 0x04, 0x0c,
- 0x01, 0x95, 0xe4, 0x50,
- 0x41, 0x24, 0x9f, 0x11,
- 0xec, 0x04, 0x14, 0xa0,
- 0x44, 0x11, 0x8a, 0x23,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xfe, 0x15, 0xa1, 0xab,
- 0x81, 0x31, 0x8b, 0x75,
- 0x00, 0x34, 0x85, 0x05,
- 0x02, 0xf0, 0x60, 0x88,
- 0x02, 0x15, 0xe4, 0x50,
- 0x00, 0x14, 0xfc, 0x00,
- 0x8a, 0x03, 0xe0, 0x84,
- 0x6e, 0x39, 0x00, 0x2b,
- 0x81, 0x01, 0x40, 0x15,
- 0x82, 0x85, 0xa1, 0x2b,
- 0x44, 0x4a, 0x81, 0x01,
- 0x44, 0x20, 0xe0, 0x80,
- 0x40, 0xff, 0x13, 0xf9,
- 0xc4, 0x04, 0x00, 0x00,
- 0x04, 0x24, 0x7e, 0x35,
- 0x0a, 0x13, 0xc1, 0x84,
- 0x42, 0x01, 0x82, 0x31,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xf8, 0x15, 0x95, 0x3b,
- 0x94, 0x7b, 0x21, 0x06,
- 0x83, 0x23, 0xa1, 0x43,
- 0x4e, 0x8a, 0xab, 0xe3,
- 0x8a, 0x25, 0xec, 0x20,
- 0x64, 0x50, 0x12, 0xf0,
- 0x82, 0xb1, 0xff, 0xb1,
- 0x88, 0x45, 0xd5, 0xbd,
- 0x00, 0x50, 0x24, 0x64,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xe4, 0x40, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x64,
- 0x00, 0x0b, 0x80, 0x63,
- 0x0c, 0x19, 0xfc, 0x04,
- 0x73, 0xd8, 0xe5, 0x00,
- 0x21, 0x08, 0xef, 0xfc,
- 0x0c, 0x19, 0x88, 0x91,
- 0x83, 0x0b, 0xe5, 0x00,
- 0x05, 0x01, 0x02, 0x60,
- 0x0e, 0x74, 0x40, 0x01,
- 0x42, 0x01, 0xdb, 0x80,
- 0x0e, 0x70, 0x40, 0x00,
- 0x7e, 0x54, 0xc4, 0x04,
- 0xec, 0x20, 0x4e, 0x8a,
- 0xc1, 0xc3, 0xf6, 0xb5,
- 0xc8, 0x77, 0x3e, 0x04,
- 0x01, 0x01, 0x80, 0x7c,
- 0x18, 0xfc, 0xf8, 0xf1,
- 0x0c, 0x0c, 0xf0, 0x00,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x46, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x28,
- 0x84, 0x34, 0x83, 0x21,
- 0x65, 0x75, 0x00, 0x19,
- 0x00, 0x45, 0xc0, 0x1b,
- 0xc0, 0x06, 0x6d, 0x49,
- 0x65, 0x79, 0x00, 0x09,
- 0x82, 0x31, 0x40, 0x1b,
- 0xa1, 0x11, 0x23, 0x2f,
- 0x88, 0x0b, 0x21, 0x2f,
- 0xef, 0xe8, 0x75, 0x48,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x88, 0x7b, 0x00, 0x8b,
- 0x65, 0x0d, 0x10, 0x09,
- 0x82, 0x6b, 0x40, 0x2b,
- 0x60, 0x88, 0x02, 0x74,
- 0x10, 0x13, 0x84, 0xab,
- 0x23, 0x0b, 0x81, 0x21,
- 0x42, 0x25, 0x86, 0x9b,
- 0xc0, 0x0b, 0x61, 0xa5,
- 0xa7, 0x0b, 0x82, 0x25,
- 0x10, 0x0b, 0x8c, 0x75,
- 0x40, 0x15, 0x6a, 0x79,
- 0x91, 0x0c, 0x81, 0xb1,
- 0x3e, 0x5e, 0x85, 0x05,
- 0x66, 0x91, 0x00, 0x10,
- 0x7c, 0x0e, 0xc0, 0xb1,
- 0x42, 0xb8, 0x90, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x02, 0xf0, 0x49, 0x07,
- 0x3c, 0x1e, 0xe4, 0x40,
- 0xfb, 0x80, 0x16, 0x04,
- 0x64, 0x30, 0x0a, 0xf0,
- 0x0c, 0x1b, 0x90, 0x0b,
- 0x12, 0x3b, 0x94, 0x2b,
- 0x43, 0xb8, 0x96, 0x4b,
- 0x7e, 0x14, 0xe8, 0x00,
- 0xfc, 0x24, 0xa1, 0x0b,
- 0x84, 0x35, 0x88, 0x1e,
- 0xbe, 0x54, 0x91, 0x0a,
- 0xfb, 0x80, 0x06, 0x04,
- 0x04, 0x16, 0x97, 0x3b,
- 0x40, 0x80, 0x40, 0x00,
- 0x42, 0x70, 0xdc, 0x00,
- 0x48, 0x50, 0x5c, 0x00,
- 0x6c, 0xd8, 0xdc, 0x00,
- 0x81, 0x01, 0xcf, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x81, 0x01, 0x91,
- 0x40, 0x72, 0x83, 0x25,
- 0x00, 0x09, 0xf0, 0xa4,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x8d, 0x0b, 0x82, 0x25,
- 0x02, 0x94, 0x80, 0xf5,
- 0x8e, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x44, 0x88,
- 0x82, 0x91, 0x80, 0x83,
- 0xe1, 0x40, 0x12, 0x0a,
- 0x90, 0x0b, 0xfa, 0xb5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x40, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0x19, 0x14, 0x82, 0xbb,
- 0x08, 0x8b, 0x8a, 0x7b,
- 0x00, 0x08, 0x86, 0x9b,
- 0x7e, 0x1e, 0x84, 0xab,
- 0x64, 0xf8, 0x91, 0x11,
- 0x00, 0x2b, 0xef, 0xe8,
- 0xe4, 0x40, 0x00, 0xf0,
- 0x0a, 0x84, 0x3e, 0x0e,
- 0x3c, 0x7e, 0xe0, 0x90,
- 0x64, 0xe1, 0x06, 0x60,
- 0x16, 0x0b, 0xc0, 0xad,
- 0x4d, 0xf8, 0x94, 0x1b,
- 0x92, 0x4b, 0x6f, 0xb4,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0x58, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x81, 0x01, 0x23, 0x0b,
- 0x09, 0x04, 0x80, 0xe5,
- 0xc9, 0x07, 0x81, 0x71,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x7e, 0x14, 0xc0, 0xff,
- 0x04, 0x0c, 0xa8, 0xf1,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0e, 0x00, 0x02, 0x6b,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x64, 0x71, 0x10, 0x00,
- 0x81, 0x01, 0x40, 0xaf,
- 0x60, 0x04, 0x13, 0x06,
- 0x83, 0x75, 0x9d, 0xa1,
- 0x78, 0x81, 0x0e, 0x19,
- 0x44, 0x10, 0xc0, 0x01,
- 0xc9, 0x17, 0x70, 0x3c,
- 0xe6, 0xaa, 0x44, 0x2a,
- 0x8d, 0x2b, 0x82, 0x23,
- 0x80, 0x00, 0x0e, 0x19,
- 0x80, 0x00, 0x10, 0x0b,
- 0x08, 0x48, 0x67, 0x28,
- 0x84, 0x04, 0x02, 0x10,
- 0x6c, 0x04, 0x12, 0x90,
- 0x84, 0x81, 0x82, 0x71,
- 0xfa, 0x35, 0xa1, 0x9b,
- 0x0c, 0x0c, 0xd0, 0x07,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x5d, 0xf8, 0xe2, 0x80,
- 0x43, 0xf6, 0xe8, 0x48,
- 0x05, 0x86, 0x60, 0x0c,
- 0x7b, 0x98, 0xe0, 0x10,
- 0x8c, 0x0b, 0x6f, 0xa8,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0x3e, 0x38, 0xf2, 0x00,
- 0xc1, 0xc3, 0xe0, 0x40,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x40, 0x96, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x06, 0x82, 0x7b,
- 0x8c, 0x0b, 0x62, 0x80,
- 0xe8, 0x48, 0x5c, 0x08,
- 0xe4, 0x40, 0x0e, 0x8a,
- 0x0c, 0x29, 0x82, 0xd5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x00, 0x4d, 0xa8,
- 0x50, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x8c, 0x85, 0x81, 0x71,
- 0x61, 0x88, 0x00, 0x74,
- 0x06, 0x09, 0x91, 0x91,
- 0x04, 0x94, 0x83, 0x11,
- 0xa1, 0x1f, 0x69, 0x80,
- 0x40, 0x22, 0xc8, 0x27,
- 0x81, 0x11, 0x79, 0x84,
- 0x44, 0x12, 0x81, 0xa5,
- 0x04, 0x4a, 0xf9, 0x1c,
- 0x44, 0x62, 0xf8, 0x0c,
- 0x82, 0x11, 0x50, 0x84,
- 0xc0, 0x00, 0x44, 0x01,
- 0xe0, 0x40, 0x02, 0x0a,
- 0x01, 0x11, 0xfc, 0xb5,
- 0x0c, 0x0b, 0x9f, 0x21,
- 0x67, 0xb8, 0x8c, 0x3b,
- 0x80, 0x8b, 0xe8, 0x40,
- 0x84, 0x55, 0xa1, 0x8b,
- 0x6a, 0xa9, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x00, 0x60, 0x84, 0x35,
- 0x40, 0x8b, 0x66, 0xb1,
- 0xe0, 0x10, 0x02, 0x06,
- 0x41, 0x1e, 0x81, 0x45,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x95, 0xa1, 0x9b,
- 0x90, 0x0b, 0x81, 0x81,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0x0c, 0x0b, 0xdd, 0x93,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x1c, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x00, 0x4c, 0x46,
- 0xe0, 0x04, 0x45, 0x36,
- 0x40, 0x21, 0x98, 0x14,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x98, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x46, 0x04, 0x26,
- 0x62, 0x58, 0xe0, 0x1c,
- 0x83, 0x21, 0x68, 0x44,
- 0x80, 0x18, 0x98, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x0c, 0x0c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x41, 0x86, 0x00, 0x3b,
- 0x00, 0x04, 0xe1, 0x48,
- 0xe0, 0x04, 0x09, 0x46,
- 0x6c, 0x1d, 0x46, 0x41,
- 0x80, 0x48, 0xc0, 0x2b,
- 0xfc, 0x9c, 0x08, 0x44,
- 0x41, 0xc6, 0x00, 0x46,
- 0x80, 0x04, 0xe1, 0x48,
- 0x83, 0x01, 0x00, 0x16,
- 0x6c, 0x25, 0x46, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x6f, 0xf0, 0x78, 0xa8,
- 0x08, 0x0c, 0x86, 0x2b,
- 0x0f, 0xd8, 0xf2, 0x80,
- 0xc1, 0xc3, 0xff, 0xf0,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x14, 0x4d, 0x48,
- 0x81, 0x81, 0x81, 0x11,
- 0x68, 0x28, 0x6f, 0xc8,
- 0x12, 0x86, 0x80, 0x7b,
- 0xa4, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xbc,
- 0xe8, 0x30, 0x72, 0xc8,
- 0x95, 0x11, 0x03, 0xa1,
- 0x8c, 0x0b, 0x03, 0x21,
- 0xe8, 0x44, 0x5e, 0x28,
- 0xe1, 0x10, 0x41, 0x46,
- 0x84, 0x86, 0x80, 0x14,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0x00, 0x16, 0xe0, 0x19,
- 0x79, 0xb8, 0x8c, 0x0b,
- 0x00, 0xc6, 0xef, 0xfc,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x18, 0x41, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x14, 0x41, 0x06,
- 0x80, 0x18, 0x80, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0x41, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x14,
- 0x00, 0x86, 0x83, 0x11,
- 0xe1, 0x14, 0x41, 0x86,
- 0x00, 0x8c, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x00, 0x86, 0x80, 0x04,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x08, 0x78, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0xab,
- 0x80, 0x7b, 0x21, 0xab,
- 0x41, 0x9c, 0x0c, 0xa4,
- 0xe0, 0x04, 0x01, 0x16,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x84, 0x9b, 0x40, 0x2b,
- 0x50, 0x04, 0x4c, 0x60,
- 0x47, 0x38, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x14,
- 0x42, 0x56, 0x00, 0x8b,
- 0x5c, 0xf8, 0xe0, 0x00,
- 0x8e, 0x0b, 0x68, 0x14,
- 0x01, 0x06, 0x21, 0x6b,
- 0x4e, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x01, 0x26, 0x88, 0xa5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x76, 0x48,
- 0x41, 0xc6, 0x92, 0x2b,
- 0x40, 0x20, 0x72, 0xfd,
- 0x60, 0x01, 0x02, 0x06,
- 0x80, 0x04, 0xff, 0xc0,
- 0x02, 0x06, 0x02, 0x0f,
- 0xc0, 0x20, 0x72, 0xc1,
- 0xfc, 0xc4, 0x00, 0x04,
- 0x01, 0xc6, 0x04, 0x0e,
- 0x80, 0x04, 0xe1, 0x98,
- 0x84, 0x75, 0xa3, 0x0b,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8e, 0x0b, 0x40, 0x20,
- 0xef, 0xec, 0x76, 0xe8,
- 0x01, 0x36, 0x81, 0xf5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x81, 0x95, 0x92, 0x2b,
- 0x68, 0x00, 0x41, 0x68,
- 0x42, 0x96, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x60, 0x00,
- 0xe8, 0x14, 0x59, 0x08,
- 0x60, 0x00, 0x42, 0x66,
- 0x58, 0xb8, 0x8e, 0x0b,
- 0x03, 0x11, 0xe8, 0x14,
- 0x42, 0x58, 0x90, 0x0b,
- 0x8c, 0x0b, 0xe8, 0x14,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x72, 0xf9, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xff,
- 0x40, 0x15, 0x6e, 0x09,
- 0x4c, 0x01, 0x81, 0x01,
- 0xc0, 0x2b, 0x64, 0xd5,
- 0xe8, 0x00, 0x7d, 0x68,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xe8, 0x18, 0x5e, 0x48,
- 0x68, 0x00, 0x7c, 0x88,
- 0x47, 0xf8, 0x8c, 0x0b,
- 0xa1, 0x7b, 0xe8, 0x0c,
- 0x49, 0xf8, 0x86, 0x25,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x68, 0x00, 0x41, 0x88,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xf0, 0x69, 0x28,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0a, 0x78, 0xf2, 0x84,
- 0x0c, 0x0c, 0xe0, 0x0c,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x63, 0x49, 0x00, 0x19,
- 0x06, 0x56, 0x40, 0x2d,
- 0xc0, 0x01, 0x60, 0x01,
- 0x64, 0x01, 0x40, 0x35,
- 0x83, 0x31, 0x40, 0x05,
- 0x68, 0x15, 0x40, 0x33,
- 0x81, 0x21, 0x40, 0x0a,
- 0x65, 0x45, 0x40, 0x31,
- 0x07, 0x06, 0x40, 0x22,
- 0x40, 0x31, 0xe0, 0x08,
- 0x40, 0x1b, 0x65, 0x6d,
- 0x40, 0x31, 0xe0, 0x19,
- 0x40, 0x22, 0x65, 0x4d,
- 0x40, 0x31, 0xa1, 0x41,
- 0x40, 0x28, 0x64, 0x89,
- 0x40, 0x11, 0xaf, 0x31,
- 0x40, 0x2d, 0x63, 0x49,
- 0x60, 0x11, 0x02, 0x26,
- 0x40, 0x31, 0xc0, 0xc0,
- 0x40, 0x28, 0x64, 0x91,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x63, 0x29, 0x40, 0x15,
- 0x91, 0x11, 0x40, 0x0b,
- 0x67, 0xc9, 0x40, 0x31,
- 0x06, 0x06, 0x40, 0x2d,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x13, 0x69, 0x85,
- 0xe0, 0x8c, 0x06, 0x06,
- 0x68, 0x11, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x0a,
- 0x40, 0x27, 0x63, 0x15,
- 0xe0, 0x10, 0x03, 0x86,
- 0x69, 0x91, 0x40, 0x13,
- 0x43, 0x86, 0x40, 0x13,
- 0x40, 0x33, 0xe0, 0x00,
- 0x40, 0x13, 0x69, 0x95,
- 0xe0, 0x00, 0x46, 0x86,
- 0x63, 0x31, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x27,
- 0x63, 0x35, 0x40, 0x31,
- 0x00, 0x3b, 0xc0, 0x27,
- 0xc0, 0x0a, 0x69, 0x31,
- 0x6c, 0x61, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x22,
- 0x6c, 0x65, 0x40, 0x11,
- 0x9d, 0x11, 0x40, 0x22,
- 0x6f, 0xb1, 0x40, 0x11,
- 0x02, 0x34, 0x40, 0x22,
- 0x40, 0x21, 0xfc, 0xa8,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x68, 0x09, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x0d,
- 0x61, 0x1d, 0x40, 0x25,
- 0x95, 0x21, 0x40, 0x0a,
- 0x65, 0x65, 0x40, 0x41,
- 0x40, 0x43, 0xc0, 0x1b,
- 0xc0, 0x14, 0x62, 0x41,
- 0x64, 0x8d, 0x40, 0x21,
- 0x40, 0x43, 0xc0, 0x28,
- 0xc0, 0x13, 0x69, 0x81,
- 0x63, 0x11, 0x40, 0x41,
- 0x40, 0x21, 0xc0, 0x27,
- 0xc0, 0x22, 0x6f, 0xb5,
- 0x69, 0x31, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x0a,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x0c, 0x14, 0x86,
- 0x63, 0xc0, 0x04, 0x0e,
- 0x40, 0xa3, 0xc0, 0xbb,
- 0x40, 0x15, 0x6d, 0xb5,
- 0xef, 0xfc, 0x55, 0xf6,
- 0x6d, 0xc1, 0x40, 0xa3,
- 0x55, 0xf6, 0x40, 0x15,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xe0, 0x7c, 0x07, 0x06,
- 0x63, 0x69, 0x40, 0xa1,
- 0x55, 0xf6, 0x40, 0x2d,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x64, 0x59, 0x40, 0x25,
- 0x05, 0x06, 0x40, 0x05,
- 0x40, 0xa5, 0xe0, 0x08,
- 0x40, 0x0b, 0x64, 0xe1,
- 0xe0, 0x04, 0x57, 0xc6,
- 0x64, 0xe5, 0x40, 0xa5,
- 0xbd, 0xa1, 0x40, 0x0b,
- 0x6e, 0x25, 0x40, 0x21,
- 0x83, 0x21, 0x40, 0x29,
- 0x6e, 0x81, 0x40, 0xb1,
- 0xb7, 0xb1, 0x40, 0x2c,
- 0x63, 0xa9, 0x40, 0xa1,
- 0x14, 0x56, 0x40, 0x2d,
- 0xc0, 0x20, 0x70, 0x01,
- 0x6a, 0xe1, 0x40, 0x33,
- 0x12, 0x06, 0x40, 0x15,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x1c, 0x62, 0x6d,
- 0xe0, 0x00, 0x46, 0x86,
- 0x60, 0x24, 0x0d, 0x86,
- 0xe0, 0x5c, 0x11, 0xc6,
- 0x6e, 0x89, 0x40, 0xb1,
- 0xab, 0xb1, 0x40, 0x2c,
- 0x62, 0x25, 0x40, 0x33,
- 0x46, 0xc6, 0x40, 0x1c,
- 0x40, 0x21, 0xe0, 0x00,
- 0x40, 0x2b, 0x65, 0x11,
- 0x40, 0x21, 0xa3, 0x51,
- 0x40, 0x2b, 0x65, 0xd1,
- 0xe0, 0x40, 0x0e, 0x06,
- 0x66, 0x81, 0x40, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x66, 0x85, 0x40, 0x21,
- 0x91, 0xc1, 0x40, 0x2b,
- 0x6b, 0x8d, 0x40, 0x21,
- 0x85, 0x41, 0x40, 0x2b,
- 0x6b, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x61,
- 0x6e, 0x5d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x61,
- 0x6e, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x99,
- 0x63, 0x31, 0x40, 0x21,
- 0x40, 0xa5, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x64, 0xed,
- 0x64, 0xf1, 0x40, 0xa5,
- 0x8d, 0xa1, 0x40, 0x0b,
- 0x68, 0x1d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x69, 0xd9,
- 0x69, 0xdd, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x7d,
- 0x64, 0xd5, 0x40, 0x21,
- 0xa9, 0x21, 0x40, 0x38,
- 0x6b, 0x1d, 0x40, 0x63,
- 0x0c, 0x06, 0x40, 0x15,
- 0x40, 0x83, 0xf9, 0x00,
- 0x40, 0x15, 0x6d, 0xb1,
- 0xe0, 0xcc, 0x10, 0xd6,
- 0x6e, 0x95, 0x40, 0xb1,
- 0x16, 0xc6, 0x40, 0x2c,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2d, 0x63, 0xd1,
- 0x72, 0xbd, 0x55, 0xf6,
- 0x40, 0x23, 0xc0, 0x20,
- 0x40, 0x1c, 0x62, 0x11,
- 0xe0, 0x10, 0x44, 0xc6,
- 0x62, 0x29, 0x40, 0x33,
- 0x07, 0x06, 0x40, 0x1c,
- 0x40, 0x91, 0xe0, 0x18,
- 0xc0, 0x29, 0x6e, 0x21,
- 0x6e, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x29,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0x40, 0x51, 0xb5, 0x91,
- 0x40, 0x2b, 0x65, 0xc9,
- 0xef, 0xf0, 0x4b, 0x86,
- 0x6d, 0x95, 0x40, 0x65,
- 0x0c, 0x0e, 0x40, 0x0a,
- 0x40, 0x83, 0xff, 0xc0,
- 0x40, 0x15, 0x6d, 0xb9,
- 0xe0, 0x00, 0x50, 0x66,
- 0x63, 0x49, 0x40, 0xb1,
- 0x17, 0x86, 0x40, 0x2d,
- 0x40, 0x23, 0xe0, 0x60,
- 0x40, 0x1c, 0x62, 0x15,
- 0x40, 0x33, 0xa1, 0x21,
- 0x40, 0x1c, 0x62, 0x2d,
- 0xe0, 0xf8, 0x46, 0x06,
- 0x63, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x39,
- 0x63, 0xd9, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0x40, 0x2d, 0x64, 0x09,
- 0x60, 0x01, 0x12, 0x06,
- 0x40, 0xa5, 0xc0, 0x20,
- 0xc0, 0x0b, 0x64, 0xf9,
- 0x64, 0xfd, 0x40, 0xa5,
- 0x14, 0x66, 0x40, 0x0b,
- 0xc0, 0x20, 0x68, 0x01,
- 0x6b, 0x19, 0x40, 0x53,
- 0x99, 0x51, 0x40, 0x15,
- 0x6d, 0x99, 0x40, 0x65,
- 0x89, 0x61, 0x40, 0x0a,
- 0x6d, 0x9d, 0x40, 0x75,
- 0x8b, 0x71, 0x40, 0x0a,
- 0x6b, 0x95, 0x40, 0x81,
- 0x8f, 0x81, 0x40, 0x2b,
- 0x69, 0xa9, 0x40, 0xb3,
- 0x87, 0xb1, 0x40, 0x16,
- 0x62, 0x31, 0x40, 0x33,
- 0x46, 0x46, 0x40, 0x1c,
- 0x40, 0x95, 0xe0, 0xf8,
- 0xc0, 0x0b, 0x65, 0x05,
- 0x65, 0x09, 0x40, 0x95,
- 0xb9, 0x91, 0x40, 0x0b,
- 0x65, 0x11, 0x40, 0xa5,
- 0x40, 0xa5, 0xc0, 0x0b,
- 0x40, 0x0b, 0x65, 0x15,
- 0x40, 0x23, 0x93, 0xa1,
- 0xc0, 0x1c, 0x62, 0x21,
- 0x62, 0x41, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0x40, 0x1c, 0x62, 0x45,
- 0xe0, 0x18, 0x04, 0x06,
- 0x62, 0x05, 0x40, 0x11,
- 0x40, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x65, 0x31,
- 0x65, 0xcd, 0x40, 0xc1,
- 0x40, 0x51, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x66, 0x41,
- 0x6a, 0xa1, 0x40, 0x71,
- 0x40, 0x61, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6a, 0xa5,
- 0x6b, 0x89, 0x40, 0x61,
- 0x40, 0x81, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x6e, 0x59, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x6e, 0x69, 0x40, 0x61,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x6e, 0x8d, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0xa5,
- 0x63, 0x25, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x35,
- 0x63, 0x41, 0x40, 0x41,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x63, 0x59, 0x40, 0xb1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x5d,
- 0x63, 0x61, 0x40, 0x61,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x63, 0x6d, 0x40, 0x11,
- 0x40, 0xb1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x71,
- 0x63, 0xa1, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xa5,
- 0x63, 0xd5, 0x40, 0x71,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x40, 0x71,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x40, 0x71,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x39,
- 0x64, 0x61, 0x40, 0xa1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0x64, 0x69, 0x40, 0x91,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x65, 0x31,
- 0x65, 0x35, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x68, 0x11,
- 0x6a, 0x31, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x6a, 0x39, 0x40, 0xb1,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x71,
- 0x64, 0xd1, 0x40, 0x11,
- 0x40, 0x13, 0xc0, 0x38,
- 0xc0, 0x1c, 0x62, 0x19,
- 0x62, 0x1d, 0x40, 0x53,
- 0x40, 0x33, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x35,
- 0x62, 0x39, 0x40, 0x13,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x3d,
- 0x62, 0x49, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x4d,
- 0x62, 0x51, 0x40, 0x23,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x55,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x4c, 0x44, 0x46,
- 0xe4, 0x50, 0x0a, 0x00,
- 0x91, 0xc1, 0x0a, 0x14,
- 0x0c, 0x86, 0x48, 0x34,
- 0xc0, 0x00, 0x61, 0x95,
- 0x4e, 0x86, 0x08, 0x44,
- 0xc0, 0x00, 0x61, 0x95,
- 0xe6, 0x86, 0x44, 0x3a,
- 0x61, 0x90, 0x06, 0x44,
- 0xe4, 0x10, 0x08, 0x00,
- 0x55, 0x8a, 0x83, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xc9, 0x87, 0xd1, 0x92,
- 0x66, 0xa2, 0x50, 0x2a,
- 0xe1, 0xf4, 0x14, 0x94,
- 0x50, 0x8a, 0x86, 0xa9,
- 0x94, 0x93, 0x60, 0x0e,
- 0xfb, 0x00, 0x12, 0x94,
- 0x50, 0x8a, 0x85, 0x97,
- 0xd9, 0x9e, 0xe6, 0x86,
- 0xa1, 0xcb, 0xdd, 0x8e,
- 0x00, 0x12, 0xfa, 0x75,
- 0x61, 0x99, 0x04, 0x86,
- 0x02, 0x02, 0xc0, 0x00,
- 0x61, 0x99, 0x06, 0xc6,
- 0x88, 0x1e, 0xc0, 0x00,
- 0x0c, 0x4c, 0x8c, 0x0e,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x04, 0xc6, 0x00, 0x02,
- 0xc0, 0x00, 0x61, 0x99,
- 0x84, 0x0d, 0x88, 0x24,
- 0x5a, 0x00, 0x5c, 0x08,
- 0xc0, 0x00, 0x00, 0x06,
- 0x61, 0x95, 0x04, 0x86,
- 0x88, 0x34, 0xc0, 0x00,
- 0x44, 0x86, 0x87, 0x0d,
- 0xc0, 0x00, 0x01, 0x95,
- 0xc0, 0x00, 0x04, 0x25,
- 0x04, 0x35, 0x8e, 0xb5,
- 0x87, 0x0d, 0xe0, 0x1c,
- 0x01, 0x99, 0x04, 0x46,
- 0x04, 0x25, 0x80, 0x00,
- 0x8c, 0x85, 0x80, 0x00,
- 0x83, 0x31, 0x01, 0xa5,
- 0xfa, 0x80, 0x08, 0x34,
- 0x08, 0x45, 0xc4, 0x47,
- 0x80, 0x4d, 0xfc, 0x08,
- 0x82, 0x31, 0x80, 0xb5,
- 0xf4, 0x18, 0x07, 0x0a,
- 0x06, 0x30, 0xfc, 0xc5,
- 0x0a, 0x34, 0xec, 0x04,
- 0x08, 0x50, 0xfa, 0x80,
- 0xc4, 0x57, 0x64, 0x04,
- 0x7c, 0x08, 0x0a, 0x35,
- 0x08, 0x25, 0xc4, 0x47,
- 0xa6, 0x23, 0xfc, 0x08,
- 0x06, 0x05, 0xa1, 0x2b,
- 0x80, 0x00, 0x04, 0x06,
- 0x61, 0x95, 0x58, 0x86,
- 0x46, 0x02, 0x40, 0x00,
- 0x0a, 0x55, 0xf1, 0x8c,
- 0x08, 0x45, 0xfc, 0x30,
- 0xaa, 0x43, 0xfc, 0x30,
- 0xe1, 0x7c, 0x18, 0x44,
- 0x98, 0x43, 0xf5, 0xc7,
- 0x46, 0x3a, 0x8d, 0x47,
- 0x44, 0x3a, 0xe6, 0x92,
- 0xcc, 0x27, 0xe0, 0x8a,
- 0x04, 0x14, 0x8a, 0x23,
- 0x61, 0x99, 0x06, 0x86,
- 0x8c, 0x34, 0xc0, 0x00,
- 0xfa, 0x00, 0x40, 0x32,
- 0xe6, 0x82, 0x40, 0x0a,
- 0xe0, 0x82, 0x40, 0x2a,
- 0xe4, 0x00, 0x42, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x7c, 0x2e,
- 0x86, 0x6b, 0x62, 0x18,
- 0x75, 0xb8, 0xbe, 0x1e,
- 0x60, 0x08, 0xef, 0xfc,
- 0x81, 0xa1, 0x91, 0x81,
- 0xe1, 0x00, 0x00, 0x0a,
- 0x10, 0x46, 0x09, 0x15,
- 0x7c, 0x14, 0xc0, 0x00,
- 0x00, 0x04, 0x96, 0x03,
- 0x80, 0x13, 0xfa, 0x80,
- 0xec, 0x00, 0x02, 0x19,
- 0x88, 0x85, 0xc3, 0xad,
- 0x40, 0x0a, 0xbe, 0x14,
- 0x94, 0x03, 0xe6, 0x86,
- 0xfa, 0x80, 0x0e, 0x04,
- 0x60, 0x84, 0x00, 0x74,
- 0xe0, 0x88, 0x02, 0x74,
- 0x7c, 0x04, 0x0c, 0x15,
- 0x00, 0x03, 0x8c, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0x61, 0x9c, 0x04, 0x14,
- 0xe4, 0x30, 0x02, 0xf0,
- 0xc5, 0x07, 0x7e, 0x2e,
- 0x00, 0xf0, 0x11, 0x0c,
- 0x76, 0x98, 0xe4, 0x40,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x50, 0x98, 0x4e, 0x72,
- 0xc0, 0x00, 0x00, 0xe6,
- 0x0c, 0x01, 0x4e, 0x01,
- 0x82, 0x91, 0xc0, 0x04,
- 0xfa, 0x80, 0x00, 0x94,
- 0xf4, 0x15, 0xd1, 0x0d,
- 0x82, 0x11, 0xbc, 0x14,
- 0xfa, 0x80, 0x00, 0x14,
- 0x56, 0x0a, 0xd1, 0x0d,
- 0x12, 0x06, 0x46, 0xa2,
- 0x5e, 0x15, 0xc0, 0x00,
- 0xfc, 0x35, 0xc0, 0x00,
- 0xbe, 0x04, 0x82, 0xa1,
- 0x7c, 0x75, 0x81, 0xab,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0xe4, 0x5d, 0xc2, 0x58,
- 0x40, 0x08, 0x98, 0x95,
- 0x8f, 0x5e, 0x81, 0x41,
- 0x61, 0x00, 0x00, 0x0a,
- 0x0b, 0x95, 0x91, 0x01,
- 0xc0, 0x00, 0x00, 0x46,
- 0x10, 0x74, 0x98, 0x73,
- 0x4e, 0x12, 0xfa, 0x80,
- 0x0e, 0x99, 0xf0, 0xa0,
- 0xd3, 0x4d, 0xec, 0x00,
- 0x50, 0x8a, 0x8e, 0x85,
- 0x88, 0x83, 0xe6, 0x96,
- 0xfa, 0x80, 0x10, 0x84,
- 0xf0, 0xa0, 0x54, 0x22,
- 0x6c, 0x01, 0x14, 0xb9,
- 0xbd, 0xbb, 0xc0, 0x04,
- 0x21, 0x4b, 0x8c, 0x15,
- 0x64, 0x01, 0x0e, 0x70,
- 0x8a, 0x15, 0xc0, 0x03,
- 0x88, 0xd5, 0xa5, 0x9b,
- 0x64, 0x04, 0x12, 0x80,
- 0x64, 0x00, 0x14, 0xa0,
- 0x56, 0x22, 0xc0, 0x13,
- 0x06, 0x84, 0x70, 0xa4,
- 0x16, 0xb9, 0xe0, 0x84,
- 0x40, 0x04, 0x6c, 0x01,
- 0x84, 0x83, 0xc4, 0x87,
- 0x16, 0x94, 0x28, 0xb6,
- 0x14, 0x20, 0xe0, 0x84,
- 0x40, 0x0e, 0x64, 0x01,
- 0x14, 0x5b, 0xc4, 0x97,
- 0x86, 0xa3, 0x7c, 0x2c,
- 0x04, 0x55, 0xa8, 0x5c,
- 0x20, 0x5e, 0xfc, 0x24,
- 0x64, 0x01, 0x0a, 0x20,
- 0x0a, 0x8b, 0xc0, 0x0c,
- 0x86, 0x53, 0x7c, 0x2c,
- 0x8f, 0x54, 0x94, 0x8c,
- 0x06, 0x90, 0x9c, 0x98,
- 0x9c, 0x36, 0xec, 0x04,
- 0x0e, 0x64, 0x82, 0x61,
- 0xc1, 0x7d, 0xfa, 0x80,
- 0x8d, 0x34, 0xee, 0x15,
- 0x18, 0x34, 0x82, 0x31,
- 0xc1, 0xcd, 0xfa, 0x80,
- 0x46, 0x82, 0x58, 0xca,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xc0, 0x18, 0x5e, 0x35,
- 0x82, 0x41, 0xfc, 0x35,
- 0x7c, 0x95, 0x8b, 0x4b,
- 0xc0, 0x00, 0x06, 0x06,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x14, 0x42, 0x46,
- 0x84, 0x18, 0x84, 0x14,
- 0x6b, 0xf1, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0xe1, 0x4c, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x00, 0x00, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x4c, 0x00, 0x06,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x83, 0x31, 0x00, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0x88, 0x3e, 0x80, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x81, 0x31, 0x00, 0x04,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0xdd, 0x93, 0x88, 0x3e,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x04,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x08,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xf4,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x10,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xec,
- 0xdd, 0x93, 0x80, 0x00,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x0c, 0x7b, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x61, 0x34, 0x56, 0x86,
- 0x2c, 0x04, 0x80, 0x7b,
- 0xe1, 0x4c, 0x13, 0x06,
- 0x83, 0x21, 0x03, 0xa1,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x0c, 0x15, 0x80, 0x86,
- 0xc0, 0x0b, 0x69, 0xf9,
- 0x40, 0x86, 0xa1, 0x1b,
- 0x00, 0x15, 0x8f, 0xdc,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xe8, 0x40, 0x4d, 0xc8,
- 0x83, 0x11, 0x2c, 0x04,
- 0x40, 0x46, 0x00, 0xa6,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa4, 0x04, 0x80, 0xa6,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x8c, 0x0b, 0x00, 0x86,
- 0xe8, 0x10, 0x67, 0xa8,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xe8, 0x0c, 0x78, 0xc8,
- 0x67, 0xcd, 0x0c, 0x09,
- 0xa4, 0x09, 0xc0, 0x2d,
- 0x82, 0x75, 0xa5, 0x0b,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x80, 0xd5,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x2c, 0x12, 0x28,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x97, 0x11, 0x00, 0x6b,
- 0xe8, 0x10, 0x4d, 0x28,
- 0xef, 0xdc, 0x42, 0x46,
- 0x40, 0x00, 0x84, 0x08,
- 0x84, 0x06, 0xf3, 0xf8,
- 0x62, 0x65, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x15,
- 0x22, 0x58, 0xe0, 0x8c,
- 0x0c, 0x09, 0x80, 0x00,
- 0xc0, 0x2d, 0x6b, 0x85,
- 0x21, 0xf8, 0xa1, 0x0b,
- 0x06, 0x60, 0x80, 0x00,
- 0x40, 0xb6, 0x67, 0xa1,
- 0xe0, 0x04, 0x00, 0x06,
- 0x64, 0x50, 0x04, 0xf0,
- 0x81, 0x45, 0x81, 0x11,
- 0x00, 0x00, 0x49, 0x16,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x19, 0x21, 0xfe, 0x95,
- 0x3e, 0x3e, 0x81, 0x51,
- 0x1b, 0x48, 0x81, 0x01,
- 0x00, 0x0a, 0xe0, 0x00,
- 0x1b, 0x48, 0xf0, 0x00,
- 0x52, 0x5a, 0xc0, 0x00,
- 0x86, 0x93, 0xe6, 0x8a,
- 0xe0, 0x20, 0x12, 0xa9,
- 0x12, 0x49, 0xa1, 0xab,
- 0x15, 0xf8, 0x80, 0x28,
- 0x12, 0xb9, 0x80, 0x00,
- 0xb1, 0xab, 0x60, 0x2c,
- 0xe0, 0x28, 0x12, 0x49,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x40, 0x40, 0x7c, 0x0e,
- 0x89, 0x0e, 0xf0, 0xfc,
- 0xac, 0x05, 0xfe, 0x4e,
- 0x1e, 0x05, 0xb3, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x49, 0x90, 0x98,
- 0x80, 0x15, 0x0f, 0x41,
- 0x80, 0x00, 0x0b, 0xa8,
- 0x8e, 0xe5, 0xb5, 0xab,
- 0x1e, 0x05, 0xb7, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x41, 0x90, 0x98,
- 0x80, 0x15, 0x0e, 0x41,
- 0x0c, 0x09, 0xaa, 0xc5,
- 0x40, 0x15, 0x62, 0x11,
- 0x89, 0xc4, 0xb9, 0xab,
- 0xe6, 0x82, 0x40, 0xca,
- 0x9a, 0x80, 0x00, 0x04,
- 0x90, 0x98, 0x40, 0x02,
- 0x0e, 0x41, 0x00, 0x49,
- 0xa6, 0xe5, 0x80, 0x1a,
- 0xa4, 0x25, 0xbb, 0xab,
- 0x8a, 0x45, 0xbd, 0xab,
- 0x81, 0x41, 0x3f, 0xab,
- 0x14, 0x0a, 0xa6, 0x05,
- 0x0c, 0x45, 0xe0, 0x40,
- 0x80, 0x0d, 0x08, 0x59,
- 0x14, 0x0a, 0xa2, 0x85,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x80, 0x0d, 0x08, 0x5d,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x0c, 0x49, 0xe0, 0x48,
- 0x80, 0x36, 0x01, 0x85,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x86, 0x85, 0xe0, 0x4c,
- 0xe0, 0x50, 0x14, 0x0a,
- 0x89, 0x04, 0x88, 0x15,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0xe5, 0x00, 0x45,
- 0x8f, 0x35, 0xc0, 0x0d,
- 0xc2, 0x07, 0x89, 0x04,
- 0x00, 0x4b, 0x8c, 0x03,
- 0xc0, 0x0a, 0x6d, 0xa1,
- 0x89, 0x04, 0x8f, 0x25,
- 0x00, 0x41, 0x8c, 0x03,
- 0xc0, 0x15, 0x6e, 0x41,
- 0x6d, 0x41, 0x00, 0x01,
- 0x0d, 0x35, 0xc0, 0x15,
- 0x89, 0x04, 0xa0, 0x43,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0x65, 0x00, 0x45,
- 0x8b, 0xb5, 0xc0, 0x0d,
- 0x08, 0x04, 0x09, 0x24,
- 0x3c, 0x5e, 0xfa, 0x80,
- 0x8c, 0x23, 0x89, 0x01,
- 0x6f, 0x41, 0x04, 0x39,
- 0x81, 0x21, 0x40, 0x15,
- 0x0e, 0x24, 0x85, 0x45,
- 0x88, 0x73, 0xfa, 0x80,
- 0x0e, 0x70, 0x8c, 0x73,
- 0xc0, 0x6b, 0x66, 0x41,
- 0x11, 0x0a, 0x98, 0x8b,
- 0x06, 0x35, 0xf4, 0x1c,
- 0xc4, 0x04, 0x04, 0x20,
- 0x70, 0x10, 0x00, 0x0a,
- 0xe4, 0x04, 0x18, 0x80,
- 0x1c, 0x58, 0xfc, 0xd5,
- 0xfa, 0x80, 0x10, 0x84,
- 0x10, 0x89, 0x8c, 0x83,
- 0xc0, 0x2e, 0x67, 0xc1,
- 0xfa, 0x80, 0x0a, 0x54,
- 0xfa, 0x80, 0x10, 0x84,
- 0xfa, 0x35, 0x91, 0x5b,
- 0x93, 0xc1, 0x04, 0x0b,
- 0x89, 0x21, 0x7b, 0xf5,
- 0xf4, 0x0c, 0x44, 0x8a,
- 0x18, 0x06, 0x76, 0x75,
- 0x00, 0x0a, 0xc0, 0x00,
- 0x04, 0x04, 0x70, 0x10,
- 0xa2, 0x15, 0xfa, 0x80,
- 0xe0, 0x80, 0x56, 0x1a,
- 0xa0, 0x00, 0x08, 0x58,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0x44, 0xe4, 0x50,
- 0xbc, 0x54, 0x83, 0x21,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x5c, 0x10, 0x06, 0x29,
- 0xf0, 0x90, 0x40, 0x32,
- 0x44, 0x20, 0xbe, 0x34,
- 0x80, 0x26, 0xd0, 0x04,
- 0x89, 0x04, 0x95, 0x05,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x64, 0xd1, 0x00, 0x45,
- 0x81, 0x75, 0xc0, 0x05,
- 0xc4, 0x07, 0x89, 0x04,
- 0x00, 0x45, 0x8c, 0x03,
- 0xc0, 0x05, 0x65, 0xd1,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x4b, 0xfc, 0x00,
- 0x80, 0x00, 0x08, 0xf8,
- 0xe0, 0x24, 0x12, 0x09,
- 0x84, 0x45, 0xab, 0x0b,
- 0x84, 0x65, 0xa3, 0x0b,
- 0x88, 0x65, 0xa5, 0x0b,
- 0x88, 0x85, 0xa7, 0x0b,
- 0x8a, 0x85, 0xa9, 0x0b,
- 0xa0, 0x15, 0xa1, 0x0b,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x90, 0x35,
- 0x82, 0x65, 0x80, 0x4d,
- 0xa4, 0x04, 0x87, 0xd5,
- 0x81, 0x4b, 0x03, 0x95,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x95,
- 0x8c, 0x85, 0x80, 0x4d,
- 0x04, 0xf0, 0x7c, 0x04,
- 0x89, 0x44, 0xe4, 0x50,
- 0x60, 0x80, 0x40, 0x0a,
- 0x04, 0x09, 0x83, 0x01,
- 0x07, 0x35, 0xdc, 0x10,
- 0xd0, 0x04, 0x40, 0x00,
- 0x01, 0xe5, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x4d,
- 0x09, 0xc4, 0x80, 0x4d,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x65, 0xfc, 0x30,
- 0xa4, 0x04, 0x83, 0x15,
- 0x09, 0xc4, 0x81, 0x4b,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x05, 0xfc, 0x30,
- 0x46, 0x4a, 0x7e, 0x44,
- 0x04, 0x06, 0xe0, 0x80,
- 0x01, 0x85, 0x80, 0x00,
- 0x7e, 0x44, 0x84, 0x3b,
- 0xe0, 0x80, 0x46, 0x0a,
- 0x46, 0x20, 0x83, 0x31,
- 0x98, 0x03, 0xd0, 0x04,
- 0xbe, 0x34, 0x80, 0x36,
- 0x7c, 0x04, 0x81, 0xd5,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x40, 0x4a, 0x89, 0x44,
- 0x81, 0x01, 0x60, 0x80,
- 0xdc, 0x10, 0x04, 0x09,
- 0x88, 0x23, 0x7e, 0x44,
- 0x07, 0x15, 0x88, 0x06,
- 0xbc, 0x54, 0x99, 0x21,
- 0x56, 0x4a, 0x84, 0x55,
- 0x82, 0xe5, 0xe0, 0x80,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0xc4, 0xe4, 0x50,
- 0xfe, 0x44, 0x81, 0x21,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x5c, 0x30, 0x06, 0x29,
- 0xf0, 0xb0, 0x40, 0x32,
- 0xfb, 0xe5, 0x80, 0x26,
- 0x01, 0x0a, 0x3e, 0x34,
- 0x84, 0xf5, 0xf4, 0x0c,
- 0x86, 0x85, 0xaf, 0xab,
- 0x8a, 0x85, 0xa5, 0xab,
- 0x8c, 0x25, 0xa7, 0xab,
- 0x8c, 0xc5, 0xa9, 0xab,
- 0x8e, 0x85, 0xab, 0xab,
- 0x90, 0x25, 0xad, 0xab,
- 0x82, 0x35, 0xa3, 0xab,
- 0xc2, 0x27, 0x88, 0x23,
- 0x04, 0x43, 0x8c, 0x23,
- 0x40, 0x0c, 0x6d, 0x21,
- 0xef, 0x55, 0x99, 0x21,
- 0xfe, 0x44, 0x99, 0x21,
- 0x72, 0x00, 0x40, 0x40,
- 0x09, 0x45, 0x82, 0x51,
- 0x08, 0x23, 0xcf, 0x07,
- 0x66, 0x41, 0x00, 0x60,
- 0x06, 0x24, 0xc0, 0x58,
- 0x80, 0x23, 0x60, 0x84,
- 0x64, 0x01, 0x04, 0x29,
- 0x86, 0x03, 0x40, 0x04,
- 0x6c, 0x01, 0x00, 0x43,
- 0xbe, 0x34, 0xc0, 0x01,
- 0x07, 0x05, 0xc8, 0x27,
- 0x88, 0x23, 0x84, 0x43,
- 0x8c, 0x23, 0xc4, 0x27,
- 0x68, 0x91, 0x04, 0x45,
- 0x85, 0x85, 0xc0, 0x05,
- 0xc4, 0x27, 0x88, 0x23,
- 0x04, 0x45, 0x8c, 0x23,
- 0xc0, 0x06, 0x60, 0x91,
- 0x88, 0x23, 0x85, 0x15,
- 0x8c, 0x23, 0xc2, 0x27,
- 0x69, 0x21, 0x04, 0x4b,
- 0x99, 0x21, 0x40, 0x0c,
- 0x88, 0x23, 0xe9, 0x65,
- 0x04, 0x49, 0x8c, 0x23,
- 0x40, 0x1a, 0x6a, 0x41,
- 0xe7, 0xf5, 0x99, 0x21,
- 0x00, 0x60, 0x08, 0x23,
- 0xc0, 0x58, 0x66, 0x41,
- 0x60, 0x84, 0x06, 0x24,
- 0x04, 0x29, 0x80, 0x23,
- 0x40, 0x04, 0x60, 0x01,
- 0x00, 0x43, 0x86, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xc8, 0x27, 0xbe, 0x34,
- 0x65, 0x75, 0xa4, 0x43,
- 0x0b, 0x0a, 0x99, 0x21,
- 0x24, 0xc8, 0xe4, 0xfc,
- 0x4c, 0x15, 0x9f, 0xfc,
- 0x40, 0x0b, 0x69, 0xed,
- 0x4c, 0x15, 0x81, 0x01,
- 0x40, 0x0b, 0x69, 0xe9,
- 0x85, 0xa5, 0x81, 0x21,
- 0x64, 0x50, 0x06, 0xf0,
- 0xec, 0x80, 0x08, 0x10,
- 0x7c, 0x04, 0x06, 0x39,
- 0xfb, 0x90, 0x4a, 0x12,
- 0x64, 0x7c, 0x03, 0x0a,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6c, 0x00, 0x10, 0x44,
- 0x06, 0xcb, 0xa8, 0x53,
- 0x18, 0x06, 0x82, 0x11,
- 0x0e, 0xc4, 0x80, 0x00,
- 0x81, 0xc1, 0x68, 0x90,
- 0x9c, 0x00, 0x58, 0x30,
- 0x6f, 0x90, 0x06, 0xc4,
- 0x46, 0x82, 0xa9, 0xcf,
- 0xb8, 0x0f, 0x78, 0x8c,
- 0x06, 0x52, 0x26, 0x7f,
- 0x4c, 0x05, 0xec, 0x04,
- 0x40, 0x0b, 0x69, 0xe9,
- 0xae, 0x2f, 0xa7, 0x7f,
- 0x69, 0xed, 0x4c, 0x25,
- 0x02, 0x0a, 0xc0, 0x0b,
- 0xf4, 0xb5, 0xe1, 0x00,
- 0xa1, 0x0b, 0xa4, 0x0f,
- 0x0c, 0x09, 0x88, 0x05,
- 0xc0, 0x38, 0x64, 0xc5,
- 0x64, 0xc1, 0x0c, 0x19,
- 0x43, 0x0d, 0xc0, 0x38,
- 0x64, 0xc5, 0x00, 0x60,
- 0x86, 0xf5, 0xc0, 0xe1,
- 0xef, 0xdc, 0x42, 0x46,
- 0x88, 0x18, 0x82, 0x2b,
- 0x88, 0x16, 0xc2, 0x19,
- 0x6e, 0x0d, 0x0c, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0x80, 0x00, 0x02, 0x16,
- 0x03, 0x11, 0x4c, 0x11,
- 0x81, 0xf5, 0x80, 0x38,
- 0xc2, 0x09, 0x84, 0x08,
- 0x83, 0x25, 0x84, 0x06,
- 0xef, 0xdc, 0x40, 0x46,
- 0x84, 0x08, 0x80, 0x1b,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x00, 0x60, 0x04, 0x06,
- 0xc0, 0xe1, 0x64, 0xc5,
- 0x02, 0x0a, 0x80, 0x18,
- 0x02, 0x10, 0xe3, 0xfc,
- 0x40, 0x11, 0xc4, 0x04,
- 0x1e, 0xf0, 0xc0, 0x00,
- 0x0c, 0x0c, 0xe5, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xef, 0xdc, 0x40, 0x46,
- 0x80, 0x28, 0x80, 0x18,
- 0x04, 0x19, 0xc2, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x26, 0xa2, 0x2f,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xef, 0xdc, 0x02, 0x86,
- 0xe0, 0x70, 0x02, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x64, 0xd5, 0x00, 0x29,
- 0xa7, 0x2b, 0xc0, 0x2b,
- 0x80, 0x00, 0x02, 0x29,
- 0x9c, 0x20, 0x44, 0x20,
- 0x80, 0x00, 0x42, 0x21,
- 0xff, 0xfc, 0x14, 0x68,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x51, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x49, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x45, 0xe8,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x55, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x4d, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x43, 0x08,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xec, 0x04, 0x02, 0x00,
- 0xf4, 0x1c, 0x03, 0x0a,
- 0x0c, 0x19, 0x82, 0xd5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xec, 0x04, 0x04, 0x10,
- 0xf4, 0x24, 0x05, 0x0a,
- 0x40, 0x0a, 0x80, 0xd5,
- 0x00, 0x8a, 0xe6, 0x86,
- 0x84, 0x35, 0xe5, 0x44,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0f, 0xf6, 0x40, 0x2b,
- 0x03, 0xf6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf8, 0x40, 0x48,
- 0x0d, 0x78, 0xa3, 0x0b,
- 0x0c, 0x19, 0x80, 0x00,
- 0xc0, 0x15, 0x61, 0x41,
- 0x61, 0x51, 0x0c, 0x09,
- 0x04, 0x14, 0x40, 0x15,
- 0x44, 0x0a, 0xfa, 0x80,
- 0x05, 0x0a, 0xe6, 0x8a,
- 0x82, 0x95, 0xe4, 0xa0,
- 0x61, 0x45, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xe6, 0x8a, 0x44, 0x3a,
- 0xe4, 0x84, 0x04, 0x8a,
- 0x0c, 0x29, 0x84, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x76,
- 0x60, 0x08, 0x42, 0x76,
- 0x7d, 0xf8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x80, 0x00, 0x0b, 0x28,
- 0x61, 0x41, 0x0c, 0x19,
- 0x0c, 0x09, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x04,
- 0x61, 0x49, 0x0c, 0x39,
- 0x42, 0x2a, 0xc0, 0x15,
- 0x86, 0x13, 0xe6, 0x86,
- 0xe4, 0xa0, 0x03, 0x0a,
- 0x0c, 0x19, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x45,
- 0x61, 0x55, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x02, 0x8a, 0x86, 0x13,
- 0x84, 0x15, 0xe4, 0x84,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x76, 0x40, 0x2b,
- 0x42, 0x76, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x7b, 0x08,
- 0xa0, 0x65, 0xa3, 0x0b,
- 0x61, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x15,
- 0x86, 0xd5, 0xf0, 0x10,
- 0x61, 0x55, 0x0c, 0x09,
- 0xa9, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x86, 0x35,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x06,
- 0x60, 0x08, 0x42, 0x06,
- 0x78, 0xd8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x98, 0x05,
- 0xc0, 0x15, 0x61, 0x49,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x84, 0x65,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x82, 0xa5,
- 0xc0, 0x15, 0x61, 0x51,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x55,
- 0xf8, 0x0c, 0x00, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x16,
- 0x60, 0x08, 0x42, 0x16,
- 0x76, 0x98, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x8e, 0x85,
- 0xc0, 0x15, 0x61, 0x41,
- 0x88, 0xb5, 0xa3, 0x0b,
- 0x61, 0x45, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x88, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0xec, 0x10, 0x00, 0x00,
- 0xf4, 0x30, 0x01, 0x0a,
- 0x0c, 0x09, 0x82, 0x55,
- 0x40, 0x15, 0x61, 0x55,
- 0x00, 0x00, 0x81, 0x71,
- 0x00, 0x8a, 0xec, 0x10,
- 0x88, 0x35, 0xf4, 0x34,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x36, 0x40, 0x2b,
- 0x42, 0x36, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x74, 0x28,
- 0x03, 0x55, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x61, 0x51, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0xa9, 0x0b, 0x82, 0x05,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xa9, 0x0b, 0x01, 0x65,
- 0x61, 0x55, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0x81, 0x71, 0x00, 0xd5,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x26, 0x40, 0x2b,
- 0x42, 0x26, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x71, 0xe8,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0xcc,
- 0x81, 0x01, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x99, 0x06, 0xc0, 0x16,
- 0x42, 0x4a, 0x91, 0x06,
- 0x42, 0x06, 0x60, 0x80,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x80, 0x00, 0x0c, 0x58,
- 0x6f, 0xfc, 0x6d, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0xc0, 0x00, 0x0b, 0xf8,
- 0x61, 0x41, 0x0c, 0x09,
- 0x04, 0xf0, 0x40, 0x15,
- 0x0c, 0x19, 0xe4, 0x20,
- 0xc0, 0x15, 0x61, 0x45,
- 0x66, 0x82, 0x40, 0x1a,
- 0xe4, 0x30, 0x02, 0xf0,
- 0x63, 0x09, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x4b, 0x88,
- 0x61, 0x49, 0x0c, 0x09,
- 0x99, 0x18, 0xc0, 0x15,
- 0x61, 0x4d, 0x0c, 0x29,
- 0x11, 0x38, 0xc0, 0x15,
- 0x0c, 0x09, 0xc5, 0x07,
- 0x40, 0x15, 0x61, 0x41,
- 0x4c, 0x11, 0x80, 0x13,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe1, 0x88, 0x08, 0x24,
- 0x61, 0x51, 0x0c, 0x19,
- 0x86, 0x43, 0x40, 0x15,
- 0x61, 0x55, 0x0c, 0x29,
- 0xa3, 0x0b, 0x40, 0x15,
- 0x61, 0x45, 0x0c, 0x39,
- 0x4c, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x6c, 0x51, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x06, 0x0a, 0x80, 0x95,
- 0x9c, 0x45, 0xf0, 0x04,
- 0xf4, 0x0c, 0x07, 0x0a,
- 0x4c, 0x21, 0x84, 0x55,
- 0x40, 0x2b, 0x6c, 0x4d,
- 0x4c, 0x31, 0xea, 0x0d,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x63, 0x58, 0x8c, 0x25,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x9c, 0x55, 0xa1, 0x0b,
- 0x6c, 0x41, 0x0c, 0x09,
- 0x85, 0xe5, 0xc0, 0x2b,
- 0xf0, 0x10, 0x06, 0x0a,
- 0x68, 0x0d, 0x86, 0x15,
- 0x4c, 0x21, 0x89, 0x31,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x45, 0x4c, 0x31,
- 0x86, 0x85, 0xc0, 0x2b,
- 0x6f, 0xfc, 0x62, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x96, 0xb5,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x86, 0x15, 0xab, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xfd, 0x15, 0x8c, 0x0b,
- 0x6f, 0xfc, 0x64, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x92, 0xf5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xf4, 0x95, 0xe8, 0x0d,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x4c, 0x01,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x00, 0x04,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0x40, 0x1a, 0xc0, 0x2b,
- 0x0c, 0x19, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0x40, 0x2b,
- 0x04, 0x16, 0xe0, 0x40,
- 0x4c, 0x21, 0x80, 0x00,
- 0x80, 0x2c, 0x0c, 0x81,
- 0x6c, 0x49, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0x00, 0x2b, 0x0c, 0x6d,
- 0xfa, 0x80, 0x02, 0x14,
- 0x0c, 0x69, 0x4c, 0x01,
- 0x44, 0x3a, 0x80, 0x2b,
- 0x40, 0x1a, 0xe6, 0x8a,
- 0x40, 0x2a, 0xe6, 0x82,
- 0x4c, 0x01, 0xe0, 0x02,
- 0x40, 0x2c, 0x6c, 0x79,
- 0xfa, 0x80, 0x02, 0x04,
- 0x66, 0x31, 0x4c, 0x13,
- 0x44, 0x98, 0xc0, 0x16,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x6f, 0xf0, 0x64, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x73, 0xb8, 0x80, 0xf5,
- 0x8c, 0x0b, 0x68, 0x24,
- 0x68, 0x30, 0x4f, 0x08,
- 0x21, 0x11, 0x8c, 0x0b,
- 0x4c, 0x11, 0x83, 0x21,
- 0xc0, 0x1b, 0x65, 0x61,
- 0x65, 0x41, 0x4c, 0x21,
- 0x0c, 0xcc, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x68, 0x11, 0x00, 0x49,
- 0x00, 0x39, 0xc0, 0x27,
- 0x40, 0x27, 0x68, 0x15,
- 0x08, 0x8a, 0x81, 0x01,
- 0x08, 0x44, 0xe5, 0x40,
- 0x00, 0x40, 0x81, 0x88,
- 0x06, 0x8a, 0x0c, 0x50,
- 0x04, 0x06, 0xe5, 0x00,
- 0x06, 0x34, 0x81, 0x01,
- 0x00, 0x34, 0x81, 0x88,
- 0x00, 0x00, 0x9a, 0x80,
- 0x88, 0x06, 0x8c, 0x40,
- 0xa1, 0x3b, 0x84, 0x38,
- 0xc4, 0x08, 0x06, 0x30,
- 0xc1, 0x88, 0x06, 0x34,
- 0xc0, 0x00, 0x42, 0x31,
- 0xc0, 0x00, 0x04, 0x09,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0xda, 0x80, 0x00, 0x04,
- 0xc4, 0x08, 0x00, 0x00,
- 0xc1, 0x88, 0x00, 0x04,
- 0x40, 0x00, 0x44, 0x01,
- 0xdd, 0x93, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x40, 0xc8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x8b, 0x55, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x44, 0x1a, 0xc0, 0x2b,
- 0xa1, 0x2b, 0xe5, 0x02,
- 0x0c, 0x39, 0x86, 0x05,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x49, 0x0c, 0x49,
- 0x0c, 0x59, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x41, 0x0c, 0xc9,
- 0x46, 0x4a, 0xc0, 0x2b,
- 0x48, 0xca, 0xe5, 0x0e,
- 0x46, 0x4a, 0xe5, 0x16,
- 0x44, 0x3a, 0xe5, 0x0e,
- 0x03, 0x65, 0xe0, 0x0a,
- 0xef, 0xfc, 0x04, 0x22,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x56, 0x40, 0x2b,
- 0x42, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x5c, 0xc8,
- 0x88, 0x05, 0xa3, 0x0b,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2b,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x04, 0x24, 0xc0, 0x2b,
- 0xc2, 0x07, 0x7a, 0x80,
- 0x04, 0x22, 0x01, 0x71,
- 0x4c, 0x01, 0xed, 0x00,
- 0x40, 0x1b, 0x63, 0x05,
- 0x4c, 0x11, 0xc2, 0x17,
- 0x40, 0x1b, 0x63, 0x01,
- 0xe0, 0x04, 0x00, 0x06,
- 0x63, 0x09, 0x4c, 0x01,
- 0x4c, 0x21, 0xc0, 0x1b,
- 0xc0, 0x1b, 0x63, 0x0d,
- 0x63, 0x11, 0x4c, 0x71,
- 0x8e, 0x0b, 0xc0, 0x1b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x6b,
- 0x63, 0x0d, 0x0c, 0x79,
- 0x02, 0xf0, 0x40, 0x1b,
- 0x0c, 0x99, 0xe4, 0x20,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0xa9,
- 0xfc, 0x0e, 0xc0, 0x2b,
- 0x3c, 0x06, 0x89, 0x06,
- 0x45, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xc0, 0x00, 0x10, 0x06,
- 0x00, 0x08, 0x1e, 0x85,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x74, 0xf8, 0x9e, 0x2b,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8e, 0x65, 0xa1, 0x8b,
- 0x6c, 0x3d, 0x0c, 0x39,
- 0x02, 0x90, 0x40, 0x2b,
- 0x3c, 0x48, 0xec, 0x04,
- 0xec, 0x04, 0x04, 0xa0,
- 0x6c, 0x39, 0x0c, 0x59,
- 0x81, 0xc1, 0x40, 0x2b,
- 0xa8, 0x33, 0x89, 0x08,
- 0x60, 0x8c, 0x08, 0x34,
- 0x64, 0x20, 0x06, 0x60,
- 0xa0, 0x53, 0xc0, 0x6d,
- 0xc6, 0x57, 0x05, 0x45,
- 0x12, 0x44, 0x02, 0xc1,
- 0x51, 0xcd, 0xfa, 0x80,
- 0xf0, 0x94, 0x54, 0x12,
- 0x79, 0x00, 0x46, 0xa1,
- 0xf0, 0xa4, 0x56, 0x22,
- 0x82, 0x25, 0x8c, 0xb6,
- 0x6c, 0x51, 0x0c, 0x99,
- 0x0a, 0x54, 0x40, 0x2b,
- 0xc2, 0x97, 0xfa, 0x80,
- 0x92, 0x53, 0x01, 0xd5,
- 0x6c, 0x55, 0x0c, 0x49,
- 0x81, 0xc1, 0x40, 0x2b,
- 0x6c, 0x39, 0x0c, 0x59,
- 0xc2, 0x47, 0xc0, 0x2b,
- 0x92, 0x43, 0x20, 0x53,
- 0x0e, 0x70, 0xc6, 0x57,
- 0x82, 0x31, 0x6c, 0x04,
- 0xf6, 0xb5, 0xa1, 0x7b,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x51, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0xc1, 0xc3, 0x87, 0x25,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x7b,
- 0x82, 0x6b, 0x7c, 0x0e,
- 0x02, 0xf0, 0x3e, 0x0e,
- 0x7e, 0x98, 0xe4, 0x20,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x41, 0x18, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xfc, 0x04, 0x82, 0x35,
- 0x40, 0x1a, 0xbe, 0x14,
- 0x00, 0x02, 0xe6, 0x82,
- 0x18, 0x0e, 0xef, 0xfc,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x55, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x4d, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0xc1, 0xc3, 0x81, 0x25,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x85, 0xa1, 0x3b,
- 0xe5, 0x0a, 0x40, 0x1a,
- 0xe0, 0x0e, 0x40, 0x0a,
- 0xef, 0xfc, 0x00, 0x02,
- 0x81, 0x01, 0x10, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x56,
- 0x6f, 0xf4, 0x4e, 0xe8,
- 0xe0, 0x08, 0x4c, 0x56,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xc6, 0xc1, 0x83,
- 0x43, 0x26, 0x61, 0x48,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x48,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x9c,
- 0xef, 0xe4, 0x56, 0xa8,
- 0x6f, 0x9c, 0x62, 0x48,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x36,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x55, 0x18, 0x80, 0x16,
- 0x60, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x53, 0x98, 0x80, 0x16,
- 0x5f, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x76,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x52, 0x18, 0x80, 0x16,
- 0x5d, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x96,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x50, 0x98, 0x80, 0x16,
- 0x5c, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xa6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4f, 0x18, 0x80, 0x16,
- 0x5a, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xe6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4d, 0x98, 0x80, 0x16,
- 0x59, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe2, 0xc0, 0x00, 0x2c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4c, 0x38, 0x80, 0x16,
- 0x57, 0xd8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfe, 0x1c, 0x04, 0xcc,
- 0x6f, 0xf8, 0x46, 0x28,
- 0x80, 0x7b, 0x80, 0x6b,
- 0xe0, 0x00, 0x0e, 0x2a,
- 0x40, 0x01, 0x05, 0xf8,
- 0x05, 0x01, 0x80, 0x00,
- 0x4c, 0x01, 0x81, 0x91,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x94, 0x00, 0x06,
- 0x10, 0x60, 0x00, 0x9e,
- 0xc0, 0xaf, 0x64, 0x1d,
- 0xef, 0xe8, 0x7d, 0x68,
- 0x82, 0x65, 0xa1, 0x0b,
- 0xa0, 0x06, 0x87, 0x01,
- 0xef, 0xf8, 0x45, 0x28,
- 0xef, 0xf8, 0x45, 0x68,
- 0xef, 0xe4, 0x49, 0xe8,
- 0xef, 0xe8, 0x7d, 0x08,
- 0x45, 0x86, 0x01, 0x11,
- 0x6a, 0xd8, 0xee, 0x10,
- 0x8c, 0x0b, 0x6f, 0x9c,
- 0x6f, 0xdc, 0x00, 0x86,
- 0x6a, 0x78, 0x81, 0x11,
- 0x44, 0xc6, 0x6f, 0x9c,
- 0x00, 0x86, 0xe0, 0x00,
- 0x42, 0x86, 0x60, 0x0c,
- 0x4c, 0x15, 0xe0, 0x3c,
- 0x40, 0x0e, 0x60, 0xd9,
- 0x60, 0x01, 0x02, 0x06,
- 0x4c, 0x05, 0xc0, 0x7d,
- 0xc0, 0x0e, 0x60, 0xcd,
- 0x60, 0xd1, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x0e,
- 0x40, 0x0e, 0x60, 0xd5,
- 0x4c, 0x05, 0x8b, 0x01,
- 0x40, 0x0e, 0x60, 0xdd,
- 0x4c, 0x15, 0x83, 0x01,
- 0x40, 0x0a, 0x6d, 0x49,
- 0xe0, 0x50, 0x03, 0xe6,
- 0x6e, 0x91, 0x4c, 0x01,
- 0x00, 0x06, 0x40, 0x2c,
- 0x4c, 0x13, 0xe4, 0x00,
- 0x40, 0x16, 0x67, 0x39,
- 0xe0, 0x00, 0x42, 0x16,
- 0x67, 0x3d, 0x4c, 0x03,
- 0x00, 0x76, 0x40, 0x16,
- 0xc0, 0x20, 0x60, 0x09,
- 0x6e, 0x01, 0x4c, 0x13,
- 0x87, 0x11, 0x40, 0x15,
- 0x4c, 0x11, 0x80, 0x96,
- 0xc0, 0x38, 0x64, 0xc1,
- 0x00, 0x06, 0x83, 0x05,
- 0x10, 0x60, 0x61, 0x94,
- 0xc0, 0xaf, 0x64, 0x1c,
- 0x23, 0x1b, 0x80, 0x14,
- 0x4c, 0x11, 0x83, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x15,
- 0xef, 0xe4, 0x5a, 0xa8,
- 0x64, 0x60, 0x18, 0xf0,
- 0x60, 0x18, 0x8c, 0x0b,
- 0x8d, 0x04, 0xe8, 0x10,
- 0x82, 0x55, 0xa1, 0x0b,
- 0xa1, 0x9b, 0x8f, 0x94,
- 0x01, 0x46, 0x80, 0xe5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa3, 0x0b, 0x80, 0x04,
- 0x5e, 0xd8, 0x88, 0x95,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x10, 0xb6, 0x20, 0x28,
- 0x02, 0xb6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf0, 0x78, 0x68,
- 0x68, 0x38, 0x4a, 0xc8,
- 0x51, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x7d, 0x38, 0xa1, 0x8b,
- 0x50, 0x00, 0x6f, 0xf4,
- 0x7d, 0x58, 0x9c, 0x00,
- 0x41, 0xd8, 0xef, 0xf4,
- 0x01, 0x01, 0xef, 0xe4,
- 0x6a, 0x18, 0x83, 0x11,
- 0x8c, 0x2b, 0x6f, 0xe4,
- 0x0c, 0xcc, 0x90, 0x0b,
- 0xdd, 0x93, 0xf6, 0x1c,
- 0x68, 0x0c, 0x7a, 0x48,
- 0x00, 0x8b, 0x8c, 0x0b,
- 0xa1, 0x8b, 0x8c, 0x0b,
- 0x48, 0x78, 0x80, 0x85,
- 0xfb, 0xf5, 0xef, 0xf4,
- 0xe8, 0x14, 0x64, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x7a, 0x18, 0xf6, 0x55,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0xe8, 0x00, 0x45, 0x88,
- 0x40, 0x01, 0x04, 0x48,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xef, 0xf4, 0x47, 0x68,
- 0x6f, 0xf0, 0x7f, 0x08,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xe4, 0x66, 0xa8,
- 0x68, 0x00, 0x48, 0x28,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x97, 0x11, 0x61, 0x4c,
- 0xa3, 0x9b, 0x00, 0x04,
- 0x81, 0x81, 0x01, 0x91,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x4c,
- 0x80, 0x16, 0x9d, 0x11,
- 0x74, 0x58, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x02, 0x0e, 0x80, 0x8b,
- 0x40, 0x10, 0x60, 0x01,
- 0xe5, 0x40, 0x00, 0x06,
- 0x02, 0x2b, 0x81, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0x02, 0x33, 0xc9, 0x34,
- 0xc6, 0x9f, 0x84, 0x1b,
- 0xfe, 0x15, 0xa1, 0x0b,
- 0x72, 0xfd, 0x41, 0xc6,
- 0x00, 0x9e, 0xc0, 0x20,
- 0x44, 0x18, 0x8c, 0x0b,
- 0xa1, 0x8b, 0xe8, 0x38,
- 0x81, 0x35, 0xe4, 0xb5,
- 0xe8, 0x38, 0x43, 0xc8,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0x6f, 0xe8, 0x6f, 0x08,
- 0x80, 0x8b, 0x8e, 0x2b,
- 0xe2, 0x55, 0xa1, 0x8b,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x0b, 0x03, 0x31,
- 0xe8, 0x34, 0x4d, 0xe8,
- 0x80, 0x8b, 0x71, 0x35,
- 0x61, 0x20, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0x01, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0xdd, 0x93, 0x80, 0x16,
- 0x62, 0x65, 0x00, 0x09,
- 0x02, 0x46, 0x40, 0x15,
- 0x04, 0x14, 0xe1, 0x4c,
- 0x88, 0x09, 0x81, 0x31,
- 0x44, 0x20, 0x84, 0x28,
- 0x20, 0x2f, 0xf3, 0xec,
- 0xe1, 0x34, 0x40, 0x86,
- 0x83, 0x11, 0x04, 0x26,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x01, 0x06,
- 0x88, 0x36, 0x80, 0x24,
- 0x88, 0x16, 0x80, 0x24,
- 0x00, 0x36, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x06,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x00, 0x86,
- 0x43, 0x06, 0x00, 0x04,
- 0x80, 0x16, 0xe0, 0x00,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x68, 0x05, 0x00, 0x1b,
- 0x00, 0x2b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x01,
- 0x68, 0x15, 0x00, 0x3b,
- 0x00, 0x4b, 0xc0, 0x0a,
- 0x40, 0x0a, 0x68, 0x09,
- 0x00, 0x2b, 0xe0, 0x17,
- 0x40, 0x0a, 0x68, 0x0d,
- 0x00, 0x5b, 0xa4, 0x1f,
- 0x40, 0x0a, 0x68, 0x11,
- 0x80, 0x1e, 0xe0, 0x37,
- 0x28, 0x2f, 0xe0, 0x27,
- 0x82, 0x2e, 0xaa, 0x3f,
- 0xdd, 0x93, 0xc0, 0x3e,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0xa0, 0x55, 0xa8,
- 0x01, 0x06, 0x81, 0x11,
- 0x4f, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x44, 0x06,
- 0x88, 0x44, 0x9c, 0x34,
- 0x00, 0x1c, 0xc2, 0x19,
- 0x46, 0x01, 0xa1, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x10, 0x16, 0x83, 0x11,
- 0x88, 0x04, 0x83, 0x11,
- 0x41, 0xf6, 0x00, 0x66,
- 0x54, 0x18, 0xe0, 0x3c,
- 0x7b, 0xd8, 0xef, 0xa0,
- 0x1c, 0x04, 0xe8, 0x14,
- 0x4d, 0x18, 0x81, 0x11,
- 0xa8, 0xf1, 0xe8, 0x08,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x06, 0xc1, 0x83,
- 0x45, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x46, 0x86,
- 0x8c, 0x54, 0x88, 0x44,
- 0x00, 0x1c, 0xc4, 0x19,
- 0x48, 0x01, 0xa3, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x16, 0x83, 0x11,
- 0x8c, 0x04, 0x81, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x67, 0xcd, 0x00, 0x19,
- 0xc8, 0x19, 0xc0, 0x2d,
- 0x67, 0xcd, 0x40, 0x11,
- 0x83, 0x11, 0x40, 0x2d,
- 0xe8, 0x08, 0x49, 0x88,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x4e, 0x48,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa5, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x47, 0x08,
- 0xe1, 0x38, 0x4f, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x45,
- 0x45, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x38,
- 0xc8, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x98, 0x04, 0x80, 0x16,
- 0xe8, 0x34, 0x75, 0x68,
- 0x02, 0x26, 0x18, 0x04,
- 0x45, 0x18, 0xe0, 0x10,
- 0x9c, 0x04, 0xe8, 0x08,
- 0x40, 0x0a, 0x80, 0x08,
- 0x84, 0xc5, 0xe0, 0x84,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x38, 0x45, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0x80, 0x1c, 0xd0, 0x19,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x26,
- 0x43, 0x78, 0x98, 0x04,
- 0x41, 0xf6, 0xe8, 0x08,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x49, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x47, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa7, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x87, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x40, 0xa8,
- 0xe1, 0x3c, 0x0e, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x84, 0xe5,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0xe0, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x36, 0x00, 0x16,
- 0x98, 0x04, 0xe0, 0x10,
- 0xe8, 0x04, 0x7e, 0xe8,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x05,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x94,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x36,
- 0x7d, 0x38, 0x98, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x40, 0x0a, 0x80, 0x08,
- 0x8a, 0x05, 0xe0, 0x88,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0x98, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc8, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x38,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x00, 0x1b, 0x98, 0x04,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x02, 0x14,
- 0x6e, 0x09, 0x40, 0x13,
- 0x02, 0x36, 0x40, 0x15,
- 0x7a, 0x98, 0xe0, 0x40,
- 0x4c, 0x38, 0xe8, 0x04,
- 0x41, 0xf6, 0xef, 0xe0,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x40, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x7e, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa9, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x2b,
- 0xe8, 0x04, 0x77, 0xa8,
- 0xe1, 0x3c, 0x0f, 0x06,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x9c,
- 0xc2, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x10, 0x02, 0x46,
- 0x75, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0x96,
- 0xe8, 0x04, 0x4c, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa0,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x42, 0xa6,
- 0x4a, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x20, 0x02, 0x46,
- 0xe8, 0x04, 0x73, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa4,
- 0xc8, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xec,
- 0xe0, 0x0c, 0x42, 0xb6,
- 0x48, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x40, 0x02, 0x46,
- 0xe8, 0x04, 0x71, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x8c, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa8,
- 0xd0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xdc,
- 0xe0, 0x80, 0x02, 0x46,
- 0x6f, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xc6,
- 0xe8, 0x04, 0x46, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xac,
- 0xe0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x00, 0x02, 0x46,
- 0x6d, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xd6,
- 0xe8, 0x04, 0x44, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xc5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xb0,
- 0x00, 0x04, 0x8c, 0x08,
- 0x8c, 0x06, 0xfc, 0x94,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0x7c, 0x42, 0x10,
- 0x02, 0x46, 0x00, 0x16,
- 0x98, 0x04, 0xe2, 0x00,
- 0xe8, 0x04, 0x6b, 0xc8,
- 0x42, 0xe6, 0x18, 0x04,
- 0x42, 0x58, 0xe0, 0x0c,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x42, 0x0a, 0x80, 0x18,
- 0x86, 0xc5, 0xe0, 0x98,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0xc6,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0xb4, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0xfc, 0x98, 0x00, 0x04,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf2, 0xfc,
- 0xe4, 0x00, 0x02, 0x46,
- 0x69, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xf6,
- 0xe8, 0x04, 0x40, 0x48,
- 0x00, 0x00, 0x9c, 0x04,
- 0x82, 0x0d, 0xff, 0x11,
- 0x00, 0xc6, 0x86, 0xb5,
- 0x80, 0x14, 0xe1, 0x3c,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x9c,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x03, 0x06, 0x00, 0x16,
- 0x84, 0x2a, 0xe1, 0x98,
- 0x04, 0x24, 0x98, 0x04,
- 0x04, 0x2c, 0xfc, 0xb8,
- 0xe8, 0x00, 0x02, 0x46,
- 0xe8, 0x04, 0x67, 0xa8,
- 0x43, 0x06, 0x18, 0x04,
- 0x7f, 0x98, 0xe0, 0x0c,
- 0x41, 0xf6, 0xe8, 0x00,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x6d, 0xa8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x6b, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0x03, 0x06, 0x61, 0x4c,
- 0x1c, 0x04, 0xe1, 0x98,
- 0xe1, 0x3c, 0x46, 0x46,
- 0xab, 0x41, 0x04, 0x2a,
- 0x40, 0x41, 0x8c, 0x54,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x7c, 0xbc, 0x00, 0x24,
- 0x04, 0x0c, 0x83, 0x21,
- 0x94, 0x26, 0x8b, 0x11,
- 0x80, 0x66, 0x8c, 0x04,
- 0x63, 0x98, 0x9c, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0xef, 0xe0, 0x71, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x69, 0xb8, 0x83, 0x11,
- 0xa8, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x8c, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x67, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0xad, 0x01, 0x61, 0x4c,
- 0x83, 0x81, 0x1c, 0x14,
- 0x6c, 0x1d, 0x42, 0x01,
- 0x83, 0x01, 0x40, 0x2b,
- 0xef, 0xe4, 0x72, 0x88,
- 0xe1, 0x3c, 0x41, 0xc6,
- 0x04, 0x86, 0x80, 0x14,
- 0x80, 0x04, 0x8d, 0x11,
- 0x9c, 0x04, 0x80, 0x66,
- 0xe8, 0x04, 0x5f, 0xc8,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x66, 0x18, 0x83, 0x11,
- 0xa0, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x8c, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0x6f, 0x9c, 0x64, 0x28,
- 0x4f, 0x06, 0x81, 0x61,
- 0xaf, 0x01, 0x61, 0x4c,
- 0x42, 0x01, 0x9c, 0x14,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6e, 0xf8, 0x81, 0x01,
- 0x1c, 0x04, 0xef, 0xe4,
- 0x5c, 0x98, 0x8f, 0x11,
- 0x00, 0x86, 0xe8, 0x04,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf8, 0xc0, 0x02, 0x0a,
- 0x80, 0x18, 0x80, 0xe5,
- 0xf0, 0xc0, 0x42, 0x10,
- 0xe0, 0x80, 0x02, 0x0a,
- 0x9c, 0x14, 0x82, 0xb5,
- 0x6c, 0x15, 0x02, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x00, 0x19, 0xe0, 0x84,
- 0x80, 0x18, 0xc0, 0x70,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x9c, 0x04, 0x80, 0x16,
- 0x6c, 0x15, 0x00, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x84, 0x45, 0xe0, 0x84,
- 0x68, 0x04, 0x5a, 0x88,
- 0xe0, 0x10, 0x02, 0x76,
- 0x68, 0xd8, 0x9c, 0x04,
- 0x9c, 0x04, 0xef, 0xe4,
- 0x6e, 0x09, 0x00, 0x1b,
- 0x42, 0x10, 0xc0, 0x15,
- 0xc0, 0xfd, 0x73, 0xfd,
- 0x6e, 0x09, 0x40, 0x13,
- 0x01, 0x46, 0xc0, 0x15,
- 0x83, 0x11, 0x61, 0x40,
- 0x00, 0x16, 0x80, 0x04,
- 0x00, 0x66, 0x83, 0x11,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0xef, 0x9c, 0x5f, 0x88,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x41, 0x06,
- 0xe1, 0x40, 0x42, 0xc6,
- 0xb1, 0x31, 0x00, 0x04,
- 0x83, 0x41, 0x04, 0x24,
- 0x6c, 0x1d, 0x40, 0x31,
- 0x08, 0x46, 0xc0, 0x2b,
- 0x84, 0x14, 0x81, 0x21,
- 0x91, 0x11, 0x04, 0x26,
- 0xe8, 0x04, 0x55, 0xa8,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x4f, 0x06,
- 0xe1, 0x34, 0x42, 0xc6,
- 0xb3, 0x21, 0x1c, 0x04,
- 0x4d, 0xc6, 0x04, 0x14,
- 0x40, 0x21, 0xe1, 0x98,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x18, 0x16, 0x84, 0x18,
- 0x52, 0x78, 0x93, 0x11,
- 0x98, 0x08, 0xe8, 0x04,
- 0x82, 0xe5, 0xa7, 0x0b,
- 0x84, 0xa5, 0xa3, 0x0b,
- 0x86, 0x65, 0xa5, 0x0b,
- 0x88, 0x55, 0xa1, 0x0b,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x98, 0xe0, 0x10,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x85, 0xc1, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x18, 0xe0, 0x80,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x05, 0xc7, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x98, 0xe0, 0x20,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x85, 0xc3, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x18, 0xe0, 0x40,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x01, 0xc5, 0x13,
- 0x00, 0x46, 0x98, 0x06,
- 0x83, 0x11, 0x61, 0x44,
- 0x81, 0x21, 0x00, 0x04,
- 0x80, 0x16, 0xa8, 0xf1,
- 0x1f, 0x0c, 0x80, 0x26,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x00, 0x5e, 0xe8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0xc0, 0x00, 0x1d, 0x48,
- 0x63, 0x29, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xdd,
- 0x63, 0x21, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x25,
- 0x61, 0x84, 0x08, 0x34,
- 0x54, 0x78, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x1b, 0xf8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0x39,
- 0x6c, 0xe5, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x53, 0x28,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x1a, 0xa8,
- 0x63, 0x49, 0x0c, 0x39,
- 0x01, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xed,
- 0x63, 0x41, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x61, 0x84, 0x08, 0x34,
- 0x51, 0xd8, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x19, 0x58, 0xa1, 0x0b,
- 0x0c, 0x3b, 0xc0, 0x00,
- 0x40, 0x16, 0x69, 0xa9,
- 0x6c, 0xf9, 0x01, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x50, 0x88,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x18, 0x08,
- 0x63, 0x71, 0x0c, 0x39,
- 0x41, 0xce, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x09,
- 0x63, 0x61, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x61, 0x84, 0x08, 0x34,
- 0x4f, 0x38, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x16, 0xb8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0xa9,
- 0x6d, 0x31, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4d, 0xe8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x15, 0x68,
- 0x63, 0xd9, 0x0c, 0x39,
- 0x40, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x39,
- 0x63, 0xd1, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xd5,
- 0x61, 0x84, 0x08, 0x34,
- 0x4c, 0x98, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x14, 0x18, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x09,
- 0x6d, 0x41, 0x01, 0x4e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4b, 0x48,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x12, 0xc8,
- 0x64, 0x39, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x4d,
- 0x64, 0x31, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x35,
- 0x4a, 0x18, 0x82, 0x39,
- 0x86, 0x4b, 0x6f, 0x9c,
- 0x11, 0x98, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x69,
- 0x6d, 0x55, 0x00, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x61,
- 0x64, 0x65, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x48, 0xc8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x10, 0x48,
- 0x6f, 0x9c, 0x4f, 0x48,
- 0x41, 0xf6, 0x81, 0x01,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x47, 0x88,
- 0x63, 0x29, 0x0c, 0x09,
- 0x03, 0xc6, 0x40, 0x2d,
- 0x84, 0x14, 0xe1, 0x38,
- 0x82, 0x09, 0xc7, 0x07,
- 0x42, 0x46, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x38,
- 0xc0, 0x2d, 0x63, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x38, 0x40, 0xc6,
- 0x0c, 0x29, 0x80, 0x14,
- 0xc0, 0x2d, 0x63, 0x49,
- 0xc9, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x04, 0x84, 0x36,
- 0x63, 0x49, 0x0c, 0x19,
- 0x80, 0x28, 0xc0, 0x2d,
- 0x84, 0x19, 0xc9, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x00, 0x26, 0xa2, 0x2f,
- 0xe1, 0x38, 0x41, 0xc6,
- 0x0c, 0x2b, 0x80, 0x14,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x14, 0x84, 0x36,
- 0x69, 0xa9, 0x0c, 0x2b,
- 0x84, 0x38, 0xc0, 0x16,
- 0x84, 0x29, 0xcb, 0x27,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x84, 0x36, 0xa4, 0x3f,
- 0x0c, 0x1b, 0x80, 0x04,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x17, 0x80, 0x28,
- 0x44, 0x20, 0x88, 0x19,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x00, 0x86, 0x00, 0x26,
- 0x0c, 0x19, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x3c, 0x01, 0x46,
- 0x64, 0xe1, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x01, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xe5,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x03, 0xc6,
- 0x63, 0xa9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xa9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x3c, 0x40, 0xc6,
- 0x64, 0xed, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xf1,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x43, 0x46,
- 0x63, 0xd9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x43, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xd9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x00, 0x46,
- 0x64, 0xf9, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x00, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x02, 0xc6,
- 0x64, 0x09, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x03, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x09,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x01, 0xc6,
- 0x65, 0x05, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x40, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x09,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x42, 0x46,
- 0x64, 0x39, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x41, 0x46,
- 0x65, 0x11, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x15,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x43, 0xc6,
- 0x64, 0x69, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x02, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x44,
- 0xc0, 0x2d, 0x64, 0x69,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x84, 0x55, 0xbf, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0xa6, 0x40, 0x2b,
- 0x02, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x48, 0x08,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x63, 0x21,
- 0x63, 0x25, 0x0c, 0x19,
- 0x7a, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x94, 0x35,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x19,
- 0x7a, 0x38, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x90, 0xf5,
- 0xc0, 0x2d, 0x63, 0x41,
- 0x63, 0x45, 0x0c, 0x19,
- 0x79, 0x98, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8e, 0xb5,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x19,
- 0x78, 0xf8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8c, 0x75,
- 0xc0, 0x2d, 0x63, 0x61,
- 0x63, 0x65, 0x0c, 0x19,
- 0x78, 0x58, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8a, 0x35,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x19,
- 0x77, 0xb8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x86, 0xf5,
- 0xc0, 0x2d, 0x63, 0xd1,
- 0x63, 0xd5, 0x0c, 0x19,
- 0x77, 0x18, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x84, 0xb5,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x19,
- 0x76, 0x78, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x82, 0x75,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x0c, 0x19,
- 0x75, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x64, 0x61, 0x0c, 0x09,
- 0x0c, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0x98, 0x34, 0xe8,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x40, 0x38, 0xc0, 0x2b,
- 0xa3, 0x0b, 0xef, 0xec,
- 0x41, 0xf6, 0x82, 0x55,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x98, 0x6f, 0x08,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xff, 0xd8, 0x39, 0xe8,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x3e, 0x38, 0xf2, 0x0c,
- 0x4e, 0x46, 0xff, 0xe8,
- 0x0e, 0x09, 0xef, 0xdc,
- 0xc2, 0x09, 0xf8, 0x10,
- 0xf8, 0x10, 0x4e, 0x01,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x42, 0x36, 0x8c, 0xf5,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x5b, 0x88,
- 0x60, 0x04, 0x42, 0x46,
- 0x57, 0x38, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x81, 0x81, 0x1c, 0x08,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x9c, 0x08, 0x9c, 0x06,
- 0xf3, 0xf4, 0x40, 0x00,
- 0x4e, 0x81, 0x9c, 0x06,
- 0x0c, 0x0b, 0xe0, 0x30,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0xf8, 0x8c, 0x0b,
- 0x75, 0xf8, 0xe8, 0x20,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x44, 0x01, 0x86,
- 0x00, 0x86, 0x80, 0x04,
- 0x58, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xe8, 0x00,
- 0x34, 0x78, 0xf2, 0x0c,
- 0x42, 0x56, 0xff, 0xd8,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x58, 0x28,
- 0x6e, 0x09, 0x0c, 0x0b,
- 0x02, 0x06, 0x40, 0x15,
- 0xff, 0xc0, 0x60, 0x01,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x41, 0xc6, 0x40, 0x15,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x02, 0x0f, 0x80, 0x04,
- 0x72, 0xc1, 0x02, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0x04, 0x0e, 0xfc, 0xc4,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8c, 0x0b, 0xc0, 0x20,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xff, 0xd8, 0x32, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x25, 0xa1, 0x1b,
- 0x6f, 0x98, 0x66, 0xc8,
- 0x40, 0x06, 0x83, 0x11,
- 0x0c, 0x0c, 0xfa, 0x02,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x7a, 0x02, 0x4c, 0x06,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x98, 0x66, 0x08,
- 0x8c, 0x0b, 0x81, 0x11,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x12, 0x06, 0x00, 0x6b,
- 0x14, 0xc6, 0xe0, 0x08,
- 0x57, 0x46, 0x61, 0x14,
- 0x10, 0x86, 0xe1, 0x10,
- 0x81, 0x01, 0x61, 0x3c,
- 0x81, 0x71, 0x09, 0x95,
- 0x6c, 0x1d, 0x4c, 0x91,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x44, 0x88,
- 0x14, 0x15, 0xa1, 0x0b,
- 0x02, 0x19, 0xc0, 0x00,
- 0x8e, 0x75, 0xc0, 0x00,
- 0x68, 0x00, 0x48, 0xc8,
- 0x28, 0x14, 0x8c, 0x0b,
- 0x84, 0x18, 0xa1, 0x0b,
- 0x42, 0x0a, 0x8c, 0x95,
- 0x8c, 0x25, 0xe0, 0x84,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x00, 0x4d, 0x08,
- 0xe0, 0xc8, 0x00, 0x0a,
- 0x62, 0x38, 0x8a, 0xb5,
- 0x2c, 0x04, 0xe8, 0x1c,
- 0x83, 0x21, 0x81, 0x11,
- 0x95, 0x11, 0x00, 0x16,
- 0x68, 0x30, 0x4d, 0x88,
- 0x2c, 0x04, 0x8c, 0x0b,
- 0x80, 0x16, 0x83, 0x11,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x16, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0xa0, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0xa0, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x00, 0x41, 0x26,
- 0xe8, 0x7d, 0x82, 0x71,
- 0x0c, 0x4c, 0xee, 0x05,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x7a, 0xc8,
- 0x0e, 0x16, 0x80, 0x6b,
- 0x42, 0xc6, 0x60, 0x08,
- 0x4c, 0x71, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x86,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0x65,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x7a, 0x08,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x02, 0x16, 0x40, 0x2b,
- 0x6e, 0x58, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4f, 0x48,
- 0x4f, 0x18, 0x81, 0x95,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xd5, 0xe0, 0x84,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x78, 0x58, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x26,
- 0x60, 0x08, 0x02, 0x26,
- 0x6c, 0x78, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x76, 0x08,
- 0x00, 0x26, 0x80, 0x6b,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x45, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x46,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0xa5,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x75, 0x48,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x69, 0x68,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4a, 0x68,
- 0x4a, 0x38, 0x83, 0x75,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xe5, 0xe0, 0x84,
- 0xef, 0xec, 0x73, 0xc8,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x67, 0xe8,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x00, 0x86, 0x81, 0x71,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0xef, 0xec, 0x70, 0xe8,
- 0x60, 0x08, 0x00, 0x36,
- 0xe0, 0x04, 0x42, 0x26,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x30, 0x40, 0x68,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x52, 0xc6, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x24,
- 0x80, 0x28, 0xa4, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0xa5, 0xe0, 0x80,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x70, 0x38, 0xfe, 0x25,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x10, 0x66,
- 0x60, 0x08, 0x02, 0x66,
- 0x64, 0x58, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0x45, 0x58, 0x80, 0x95,
- 0x81, 0xe5, 0xe8, 0x30,
- 0xe8, 0x30, 0x45, 0x28,
- 0x80, 0x08, 0xa4, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x10, 0x06, 0x00, 0xe5,
- 0x69, 0x7d, 0x80, 0x00,
- 0xe0, 0x00, 0x51, 0x26,
- 0x90, 0x0b, 0x80, 0xa5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x6e, 0x18, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x76,
- 0x60, 0x08, 0x02, 0x76,
- 0x62, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xe0, 0x6c, 0x02, 0x0a,
- 0x04, 0xcd, 0x00, 0x25,
- 0x9a, 0xa5, 0x80, 0x05,
- 0x00, 0x25, 0xa5, 0x1b,
- 0x80, 0x0b, 0x0a, 0x0d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x0d, 0x40, 0x25,
- 0x98, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xa7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x15,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x15, 0x40, 0x25,
- 0x96, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa9, 0x1b,
- 0x80, 0x0b, 0x0a, 0x11,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x11, 0x40, 0x25,
- 0x94, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xab, 0x1b,
- 0x80, 0x0b, 0x0a, 0x19,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x19, 0x40, 0x25,
- 0x92, 0x05, 0x80, 0x0b,
- 0x00, 0x25, 0xad, 0x1b,
- 0x80, 0x0b, 0x0a, 0x1d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x1d, 0x40, 0x25,
- 0x8e, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xaf, 0x1b,
- 0x80, 0x0b, 0x0a, 0x21,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x21, 0x40, 0x25,
- 0x8c, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xb1, 0x1b,
- 0x80, 0x0b, 0x0a, 0x25,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x25, 0x40, 0x25,
- 0x8a, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xb3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x29,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x29, 0x40, 0x25,
- 0x88, 0x05, 0x80, 0x0b,
- 0x86, 0xc5, 0xb5, 0x1b,
- 0x00, 0x25, 0xb7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x2d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x2d, 0x40, 0x25,
- 0x84, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x09,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x09, 0x40, 0x25,
- 0x82, 0x45, 0x80, 0x0b,
- 0xfc, 0x04, 0x44, 0x10,
- 0xe0, 0x74, 0x04, 0x0a,
- 0x83, 0x21, 0x80, 0xb5,
- 0x6a, 0x31, 0x40, 0x25,
- 0x00, 0x25, 0xc0, 0x0b,
- 0x40, 0x0b, 0x6a, 0x01,
- 0x64, 0x01, 0x06, 0x00,
- 0xc6, 0x27, 0xc0, 0xba,
- 0x44, 0x86, 0x04, 0x33,
- 0x46, 0x15, 0xe0, 0x00,
- 0x42, 0x06, 0xe0, 0x34,
- 0x46, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x38,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0a, 0x05,
- 0x80, 0x00, 0x04, 0x06,
- 0x0a, 0x01, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0a, 0x05,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6b, 0x75, 0x00, 0x25,
- 0x06, 0x00, 0x40, 0x0b,
- 0xc0, 0xbb, 0x65, 0xd1,
- 0xe0, 0x00, 0x4a, 0x86,
- 0x86, 0x23, 0xc6, 0x27,
- 0x46, 0x06, 0xc8, 0x1e,
- 0x00, 0x45, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x98, 0x21, 0x4a, 0x3e,
- 0x4a, 0x4a, 0x82, 0x41,
- 0x40, 0x45, 0xe1, 0x16,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x00, 0x35, 0xa1, 0x5b,
- 0x00, 0x0b, 0x0b, 0x79,
- 0x80, 0x00, 0x08, 0x06,
- 0x0b, 0x75, 0x40, 0x45,
- 0x06, 0x30, 0x80, 0x0b,
- 0x40, 0x35, 0x84, 0x04,
- 0x00, 0x0b, 0x0b, 0x79,
- 0xf0, 0x24, 0x02, 0x0a,
- 0x02, 0x0a, 0x98, 0xa5,
- 0x88, 0xc5, 0xf0, 0x04,
- 0xf0, 0x08, 0x02, 0x0a,
- 0x02, 0x0a, 0x9a, 0x65,
- 0x8a, 0x85, 0xf0, 0x0c,
- 0xf0, 0x10, 0x02, 0x0a,
- 0x02, 0x0a, 0x9c, 0x25,
- 0x9e, 0x45, 0xf0, 0x14,
- 0xf0, 0x18, 0x02, 0x0a,
- 0x02, 0x0a, 0x8a, 0xe5,
- 0x8e, 0x05, 0xf0, 0x1c,
- 0xf0, 0x20, 0x02, 0x0a,
- 0x02, 0x0a, 0x90, 0x25,
- 0x5c, 0x08, 0xf0, 0x00,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6c, 0xbd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xbd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xe5,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xe9,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xf1,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xd5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xfd,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x01,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xdd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xdd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x05,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x09,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xc5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xed,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xcd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xcd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xf5,
- 0x00, 0x35, 0xdd, 0x93,
- 0x40, 0x0b, 0x6c, 0xd1,
- 0x60, 0x15, 0x02, 0x0a,
- 0x82, 0x31, 0xc0, 0x08,
- 0x6c, 0xd1, 0x40, 0x35,
- 0x88, 0x34, 0xc0, 0x0b,
- 0x6c, 0xf9, 0x40, 0x35,
- 0x84, 0x45, 0xc0, 0x0b,
- 0x60, 0x15, 0x02, 0x0a,
- 0x5c, 0x08, 0xc0, 0x04,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6d, 0x0d,
- 0x82, 0x11, 0x88, 0x24,
- 0x6d, 0x0d, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x15,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6d, 0x1d, 0x00, 0x35,
- 0x08, 0x00, 0x40, 0x0b,
- 0xc0, 0xbd, 0x64, 0x71,
- 0x6d, 0x25, 0x00, 0x25,
- 0xc6, 0x37, 0xc0, 0x0b,
- 0x86, 0x43, 0x02, 0x21,
- 0x6d, 0x25, 0x40, 0x25,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x42, 0x06, 0xd2, 0x1e,
- 0x48, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x10,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0d, 0x21,
- 0x80, 0x00, 0x04, 0x06,
- 0x0d, 0x1d, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0d, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0b, 0x6f, 0xa5,
- 0x8a, 0xa5, 0xa1, 0x0b,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x66, 0x8a, 0x44, 0x0a,
- 0xe0, 0x88, 0x06, 0x04,
- 0xf0, 0x8c, 0x4e, 0x62,
- 0x00, 0x20, 0x8c, 0x23,
- 0x40, 0xbd, 0x67, 0xc1,
- 0x6a, 0x38, 0xa9, 0x21,
- 0x40, 0x06, 0xef, 0x90,
- 0x4e, 0x05, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6d, 0xc9,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0x82, 0x01, 0xc0, 0x0b,
- 0x6d, 0xe9, 0x4c, 0x05,
- 0x00, 0x4a, 0x40, 0x0b,
- 0x0c, 0x05, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0d, 0xed,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0d, 0xe9, 0x4c, 0x15,
- 0x00, 0x00, 0xc0, 0x0b,
- 0x4c, 0x05, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0d, 0xed,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6e, 0xb1, 0x00, 0x25,
- 0x86, 0x3a, 0xc0, 0x0b,
- 0xf0, 0x08, 0x02, 0x4b,
- 0x18, 0x24, 0x06, 0x5a,
- 0x04, 0x1a, 0xe0, 0x8c,
- 0x00, 0xc3, 0xc4, 0x27,
- 0x58, 0x53, 0x80, 0x23,
- 0xc0, 0x17, 0x6d, 0x7d,
- 0x6d, 0x79, 0x58, 0x13,
- 0x58, 0x33, 0xc0, 0x17,
- 0xc0, 0x17, 0x6d, 0x75,
- 0x6d, 0x71, 0x58, 0x43,
- 0x42, 0x06, 0xc0, 0x17,
- 0x44, 0x15, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6e, 0x91,
- 0x6e, 0xb1, 0x00, 0x15,
- 0x82, 0x11, 0xc0, 0x0b,
- 0x6e, 0xb1, 0x40, 0x15,
- 0x02, 0x4a, 0x40, 0x0b,
- 0x00, 0x15, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0e, 0xb5,
- 0xc0, 0x00, 0x04, 0x06,
- 0x0e, 0xb1, 0x40, 0x25,
- 0x02, 0x10, 0xc0, 0x0b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0e, 0xb5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6f, 0x19, 0x00, 0x25,
- 0xc6, 0x34, 0xc0, 0x0b,
- 0x60, 0x90, 0x08, 0x24,
- 0x00, 0x43, 0xc4, 0x27,
- 0x48, 0x35, 0x80, 0x23,
- 0xc0, 0x0b, 0x6f, 0x2d,
- 0x48, 0x35, 0xc4, 0x34,
- 0xc0, 0x0b, 0x6f, 0x29,
- 0x48, 0x35, 0x86, 0x34,
- 0xc0, 0x0b, 0x6f, 0x25,
- 0x48, 0x15, 0x84, 0x14,
- 0xc0, 0x0b, 0x6f, 0x21,
- 0xfc, 0x06, 0x42, 0x06,
- 0x6e, 0xf9, 0x44, 0x15,
- 0x00, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6f, 0x19,
- 0x40, 0x15, 0x82, 0x11,
- 0x40, 0x0b, 0x6f, 0x19,
- 0xf8, 0x1c, 0x02, 0x4a,
- 0x0f, 0x1d, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x0b,
- 0x40, 0x25, 0xc0, 0x00,
- 0xc0, 0x0b, 0x0f, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0x0f, 0x1d, 0x40, 0x15,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x61, 0x4c, 0x4d, 0x06,
- 0xe1, 0x98, 0x03, 0x46,
- 0x81, 0x21, 0x18, 0x04,
- 0x6e, 0x10, 0x47, 0x86,
- 0xe1, 0x00, 0x0a, 0xc6,
- 0x03, 0x86, 0x04, 0x0c,
- 0x04, 0x2e, 0xe1, 0x98,
- 0xe1, 0x98, 0x03, 0xc6,
- 0x02, 0x86, 0x04, 0x2e,
- 0x40, 0x25, 0xe1, 0xa4,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x00, 0x00, 0x46,
- 0x04, 0x86, 0x00, 0x1e,
- 0x08, 0x3e, 0xe1, 0x00,
- 0x66, 0xa1, 0x08, 0x10,
- 0x02, 0x10, 0xc0, 0xbf,
- 0x40, 0xb9, 0x67, 0xf1,
- 0xe1, 0x00, 0x05, 0x06,
- 0x94, 0x4e, 0x98, 0x04,
- 0x76, 0xf8, 0x88, 0x1e,
- 0x18, 0x04, 0xef, 0xf0,
- 0x40, 0x71, 0xb5, 0x71,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xf4, 0x4e, 0xa8,
- 0x42, 0xc6, 0x18, 0x04,
- 0x84, 0x0e, 0xe1, 0x98,
- 0xe8, 0x2c, 0x49, 0xa8,
- 0x45, 0x86, 0x18, 0x14,
- 0x88, 0x0e, 0xe1, 0x98,
- 0x68, 0x2c, 0x49, 0x88,
- 0x42, 0x86, 0x82, 0x0b,
- 0x04, 0x0e, 0xe1, 0x98,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x94, 0x66, 0x08,
- 0x00, 0x1c, 0x81, 0x11,
- 0x50, 0x06, 0xe2, 0xc0,
- 0xc0, 0x00, 0x61, 0x99,
- 0x00, 0x46, 0x20, 0x0e,
- 0x56, 0x18, 0xe1, 0x9c,
- 0xa0, 0x04, 0xef, 0x94,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x64, 0xd8, 0x83, 0x11,
- 0x83, 0x81, 0x6f, 0x94,
- 0x43, 0x86, 0x18, 0x04,
- 0xc4, 0x80, 0x60, 0x15,
- 0x69, 0xfd, 0x40, 0x15,
- 0x03, 0x96, 0x40, 0x0b,
- 0xd9, 0x84, 0x63, 0x09,
- 0x6c, 0x1d, 0x40, 0x71,
- 0x40, 0x15, 0xc0, 0x2b,
- 0xc0, 0x0b, 0x6f, 0xa1,
- 0x6f, 0xa5, 0x40, 0x85,
- 0x40, 0x58, 0xc0, 0x0b,
- 0x98, 0x04, 0xe8, 0x00,
- 0xc1, 0xc3, 0xff, 0xd5,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x7b,
- 0x62, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x94,
- 0x09, 0x01, 0x81, 0x61,
- 0x4e, 0x01, 0xb7, 0x11,
- 0x40, 0x2b, 0x6c, 0x19,
- 0x4e, 0x11, 0x8e, 0x0b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x51, 0x18, 0x83, 0x11,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0e, 0x19, 0x82, 0xe5,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x8a, 0xf5, 0xa7, 0x1b,
- 0xef, 0xdc, 0x02, 0x86,
- 0x42, 0x0a, 0x84, 0x18,
- 0x8a, 0x25, 0xe0, 0x80,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x11, 0x88, 0xc5,
- 0x4f, 0x98, 0x8e, 0x0b,
- 0x5f, 0x78, 0xef, 0xfc,
- 0xa1, 0x0b, 0xe8, 0x08,
- 0x5f, 0x98, 0x80, 0xb5,
- 0x8e, 0x0b, 0x68, 0x08,
- 0x0e, 0x0b, 0x80, 0x6b,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0x00, 0x83, 0x11,
- 0xc0, 0xff, 0x72, 0xfd,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x5f, 0x18, 0xe0, 0x3c,
- 0xa1, 0x6b, 0xef, 0x94,
- 0x07, 0x11, 0xa4, 0xd5,
- 0x4d, 0xd8, 0x8e, 0x0b,
- 0x72, 0xf8, 0xef, 0xfc,
- 0x8e, 0x0b, 0x6f, 0xd4,
- 0x80, 0x6b, 0x11, 0xe5,
- 0x8e, 0x0b, 0x09, 0x11,
- 0xef, 0xfc, 0x4d, 0x48,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x10, 0x86, 0x92, 0xd5,
- 0xa0, 0x08, 0xef, 0xdc,
- 0xf8, 0xc0, 0x00, 0x0a,
- 0xa0, 0x08, 0x80, 0xe5,
- 0xf0, 0xc0, 0x40, 0x00,
- 0xe0, 0x80, 0x00, 0x0a,
- 0x0e, 0x0b, 0x90, 0x55,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x8e, 0x05,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x8c, 0x75, 0xa7, 0x0b,
- 0x40, 0x4a, 0xa0, 0x08,
- 0x8a, 0xe5, 0xe0, 0x8c,
- 0x8e, 0x0b, 0x1b, 0x11,
- 0xef, 0xfc, 0x4b, 0x08,
- 0x6f, 0xd8, 0x54, 0xc8,
- 0x1d, 0x11, 0x8e, 0x0b,
- 0x4a, 0x98, 0x8e, 0x0b,
- 0x7c, 0x18, 0xef, 0xfc,
- 0x8e, 0x0b, 0x68, 0x18,
- 0x64, 0xcd, 0x0e, 0x05,
- 0xe2, 0x14, 0xc0, 0x05,
- 0x86, 0xe5, 0xc2, 0x0d,
- 0xc8, 0x09, 0xa0, 0x08,
- 0x8e, 0x0b, 0x20, 0x06,
- 0xe8, 0x18, 0x7f, 0x28,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x83, 0x11, 0x40, 0x15,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x59, 0xb8, 0xe0, 0x3c,
- 0x0b, 0x11, 0xef, 0x94,
- 0x48, 0x98, 0x8e, 0x0b,
- 0x41, 0x38, 0xef, 0xfc,
- 0x81, 0x55, 0xe8, 0x0c,
- 0x8e, 0x0b, 0x1f, 0x11,
- 0xef, 0xfc, 0x48, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x58, 0xb8, 0x83, 0x11,
- 0x0e, 0x09, 0xef, 0x94,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x11, 0x11, 0x8a, 0x85,
- 0x47, 0x38, 0x8e, 0x0b,
- 0x0e, 0x05, 0xef, 0xfc,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x40, 0x06, 0x85, 0x05,
- 0x4e, 0x05, 0xfc, 0x06,
- 0x40, 0x0e, 0x60, 0xfd,
- 0x6f, 0x58, 0x8e, 0x0b,
- 0x56, 0xb8, 0xe8, 0x08,
- 0x8e, 0x0b, 0x68, 0x08,
- 0xfc, 0x06, 0x40, 0x06,
- 0x60, 0xf9, 0x0e, 0x25,
- 0x0e, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x61, 0x01, 0x4e, 0x05,
- 0x82, 0x21, 0xc0, 0x0e,
- 0x60, 0xf9, 0x4e, 0x25,
- 0x00, 0x10, 0x40, 0x0e,
- 0x4e, 0x05, 0xec, 0x04,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0xf8, 0x15, 0xa1, 0x0b,
- 0xc3, 0x13, 0xc1, 0x83,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x55, 0x58, 0x83, 0x11,
- 0x00, 0x64, 0xef, 0x94,
- 0x0c, 0x0c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x6c, 0x19, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x6e, 0x0d, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0xda, 0x00, 0x5c, 0x08,
- 0x63, 0x11, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x38,
- 0x00, 0x2b, 0x82, 0xf5,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x03, 0xc6,
- 0x44, 0x20, 0x84, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x40, 0x23,
- 0x1e, 0xf8, 0xc0, 0x15,
- 0xdd, 0x93, 0xff, 0xd4,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x83, 0x21, 0x83, 0x71,
- 0xc4, 0x19, 0x80, 0x18,
- 0x41, 0x06, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x28,
- 0x00, 0x76, 0x85, 0x11,
- 0xe1, 0x28, 0x40, 0x06,
- 0x00, 0x76, 0x80, 0x04,
- 0x7c, 0xd8, 0x8c, 0x0b,
- 0x40, 0x46, 0xe8, 0x28,
- 0xbd, 0x11, 0x61, 0x28,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x76,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x28, 0x3c, 0x28,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x86, 0x00, 0x8b,
- 0x00, 0x04, 0xe1, 0x28,
- 0x03, 0x11, 0x82, 0x7b,
- 0x56, 0x72, 0x86, 0x6b,
- 0x15, 0x46, 0x70, 0x88,
- 0x80, 0x16, 0xe1, 0x34,
- 0x40, 0x86, 0x8d, 0x25,
- 0x83, 0x11, 0x61, 0x28,
- 0x81, 0x21, 0x00, 0x04,
- 0x41, 0xc6, 0x00, 0x76,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x7a, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa1, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa5, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa5, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5e, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x8c, 0xd5, 0xa1, 0x0b,
- 0x61, 0x2c, 0x00, 0x86,
- 0x00, 0x04, 0x81, 0x11,
- 0x80, 0x04, 0x81, 0x21,
- 0x41, 0xc6, 0x18, 0x0e,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x77, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa3, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa7, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa7, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5b, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x82, 0x71, 0x08, 0x61,
- 0xe6, 0xc5, 0xd6, 0x7d,
- 0x92, 0x0b, 0x81, 0x91,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x28, 0x42, 0x46,
- 0x04, 0x14, 0x81, 0x61,
- 0x04, 0x66, 0x83, 0x21,
- 0x73, 0xf8, 0x83, 0x11,
- 0x40, 0x06, 0xe8, 0x28,
- 0x80, 0x04, 0xe1, 0x28,
- 0x41, 0x06, 0x00, 0x66,
- 0x80, 0x04, 0xe1, 0x14,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x18, 0x00, 0x15,
- 0xe0, 0x50, 0x00, 0x25,
- 0x61, 0x27, 0xe0, 0x17,
- 0x70, 0x01, 0x42, 0x10,
- 0x40, 0x25, 0xc3, 0x00,
- 0xc0, 0x09, 0x6e, 0x09,
- 0xe0, 0x50, 0x00, 0x25,
- 0xfb, 0x80, 0x04, 0x24,
- 0x04, 0x06, 0x24, 0x1f,
- 0xc3, 0xc0, 0x60, 0x01,
- 0x6e, 0x0d, 0x40, 0x15,
- 0x00, 0x15, 0xc0, 0x09,
- 0xed, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x41, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xdd, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x45, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe0, 0x58,
- 0xc0, 0x38, 0x63, 0x15,
- 0xe0, 0x58, 0x00, 0x15,
- 0x04, 0x06, 0x04, 0x1f,
- 0xc3, 0x00, 0x60, 0x01,
- 0x81, 0x21, 0x05, 0x1b,
- 0x80, 0x00, 0x02, 0x26,
- 0x03, 0x15, 0x40, 0x11,
- 0x02, 0x00, 0x00, 0x38,
- 0x83, 0x95, 0xe5, 0x70,
- 0x88, 0x21, 0x04, 0x34,
- 0xc6, 0x3b, 0xf1, 0x37,
- 0x62, 0x11, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xe1, 0x37,
- 0x62, 0x15, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xd1, 0x37,
- 0x62, 0x19, 0x42, 0x31,
- 0xc5, 0x34, 0xc0, 0x27,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x27, 0x62, 0x0d,
- 0x60, 0x61, 0x04, 0x8a,
- 0xf8, 0xb5, 0xc0, 0x01,
- 0x65, 0xd1, 0x02, 0x00,
- 0x81, 0x21, 0x40, 0x01,
- 0x46, 0x3b, 0x83, 0x75,
- 0x42, 0x31, 0x88, 0x21,
- 0xc0, 0x26, 0x6d, 0x71,
- 0xe1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x75,
- 0xd1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x79,
- 0xc6, 0x3b, 0xc5, 0x34,
- 0x6d, 0x6d, 0x42, 0x31,
- 0x04, 0x34, 0xc0, 0x26,
- 0xe0, 0x40, 0x04, 0x8a,
- 0xf1, 0x37, 0x78, 0xf5,
- 0x68, 0x01, 0x40, 0x31,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x84,
- 0x68, 0x05, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x88,
- 0x68, 0x11, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x88,
- 0x68, 0x15, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xff, 0x17, 0xe1, 0x8c,
- 0x67, 0xf1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x8c,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x67, 0xe1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe9, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x47, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xed, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe1, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x45, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xe9, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xd1, 0x17, 0xe1, 0x8c,
- 0x44, 0x20, 0x3e, 0x19,
- 0x24, 0x1f, 0xf0, 0x80,
- 0xe0, 0x04, 0x04, 0x06,
- 0x67, 0xe5, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x15, 0xe1, 0x90,
- 0xc0, 0x0a, 0x6e, 0xe9,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x40, 0x13, 0xe1, 0x17,
- 0xc0, 0x13, 0x6c, 0x29,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x6c, 0x2d, 0x40, 0x13,
- 0x00, 0x15, 0xc0, 0x13,
- 0xd1, 0x17, 0xe2, 0x00,
- 0x68, 0x65, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe2, 0x00,
- 0xc0, 0x27, 0x68, 0x69,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xf1, 0x17,
- 0xc0, 0x27, 0x68, 0x6d,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xe1, 0x17,
- 0xc0, 0x27, 0x68, 0x71,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xd1, 0x17,
- 0xc0, 0x27, 0x68, 0x75,
- 0xe2, 0x04, 0x00, 0x15,
- 0x68, 0x79, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe2, 0x08,
- 0x68, 0x7d, 0x40, 0x11,
- 0x02, 0x00, 0x40, 0x27,
- 0xc0, 0x02, 0x64, 0x31,
- 0x45, 0x34, 0x81, 0x75,
- 0xec, 0x04, 0x04, 0x20,
- 0x6c, 0x29, 0x42, 0x35,
- 0xa1, 0x2b, 0xc0, 0x09,
- 0x02, 0x00, 0xfe, 0x35,
- 0x40, 0x03, 0x64, 0x31,
- 0x81, 0xb5, 0x81, 0x21,
- 0x84, 0x21, 0x04, 0x34,
- 0x42, 0x33, 0xe1, 0x37,
- 0xc0, 0x13, 0x68, 0x59,
- 0x42, 0x33, 0xc5, 0x34,
- 0xc0, 0x13, 0x68, 0x55,
- 0xe5, 0x00, 0x04, 0x8a,
- 0x02, 0x00, 0xfc, 0x95,
- 0x40, 0x03, 0x67, 0x31,
- 0x81, 0x75, 0x89, 0x21,
- 0x04, 0x20, 0x45, 0x34,
- 0x42, 0x35, 0xec, 0x04,
- 0xc0, 0x0a, 0x6b, 0x1d,
- 0xfe, 0x35, 0xa1, 0x2b,
- 0x67, 0x71, 0x00, 0x00,
- 0x93, 0x11, 0x40, 0x03,
- 0x41, 0x24, 0x81, 0x75,
- 0xec, 0x04, 0x02, 0x10,
- 0x60, 0x3d, 0x40, 0x25,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x5d, 0x93, 0xfe, 0x35,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xef, 0x4c, 0x02, 0x29,
- 0x80, 0xb5, 0xa1, 0x2b,
- 0xef, 0x3c, 0x02, 0x29,
- 0x96, 0x25, 0xa1, 0x2b,
- 0xf9, 0x31, 0x01, 0x21,
- 0x81, 0x51, 0x07, 0x41,
- 0x58, 0x52, 0x83, 0x85,
- 0x4c, 0x52, 0x78, 0x0c,
- 0x82, 0xc3, 0xf8, 0x90,
- 0xfc, 0x18, 0x18, 0xc9,
- 0x91, 0xc1, 0x58, 0x2f,
- 0x44, 0x0a, 0x81, 0xb5,
- 0xc2, 0x27, 0x60, 0x9c,
- 0x73, 0xf9, 0x44, 0x20,
- 0x18, 0xc0, 0x40, 0x01,
- 0x44, 0x20, 0xec, 0x04,
- 0xa1, 0xcb, 0xd8, 0x74,
- 0x82, 0x51, 0xfc, 0xb5,
- 0xe1, 0x40, 0x0a, 0x0a,
- 0x07, 0x06, 0xf8, 0xf5,
- 0x04, 0x0a, 0x61, 0x38,
- 0x0c, 0x34, 0xfb, 0xfc,
- 0x9f, 0xf8, 0x05, 0x9e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x02, 0x39, 0x8c, 0x2e,
- 0x87, 0x2b, 0xef, 0x4c,
- 0x07, 0x46, 0x80, 0xf5,
- 0x8c, 0x34, 0xe1, 0x34,
- 0xaf, 0x3b, 0x8c, 0x34,
- 0x02, 0x19, 0x86, 0xf5,
- 0x83, 0x2b, 0xef, 0x3c,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xaf, 0x1b, 0x84, 0x14,
- 0x02, 0x46, 0x84, 0xb5,
- 0x0c, 0xe6, 0x61, 0x94,
- 0x86, 0x38, 0xe0, 0x08,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x84, 0x66, 0xc0, 0x2b,
- 0xf3, 0xf0, 0x46, 0x30,
- 0x06, 0x36, 0xc4, 0x39,
- 0xe0, 0x08, 0x02, 0xe6,
- 0xef, 0xe0, 0x7f, 0xe8,
- 0x82, 0x55, 0xa1, 0x0b,
- 0x00, 0x56, 0x81, 0x85,
- 0x80, 0x18, 0xe1, 0x94,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x80, 0x16, 0xc2, 0x19,
- 0x8c, 0x0b, 0x81, 0x61,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x4c, 0x38, 0xe2, 0x80,
- 0x5a, 0x98, 0xe8, 0x2c,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x45, 0xf6, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x5c, 0x38, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x63, 0x78, 0x82, 0xd5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x78, 0x08,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x6f, 0xfc, 0x64, 0x88,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xb9, 0x11, 0x00, 0x6b,
- 0x68, 0x2c, 0x4a, 0x08,
- 0xe4, 0x10, 0x0e, 0x60,
- 0x81, 0x21, 0x29, 0x11,
- 0x8e, 0x3b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x5a, 0x28,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x61, 0x58, 0x80, 0xc5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0xe0, 0x00, 0x1e, 0x08,
- 0x64, 0x20, 0x10, 0x60,
- 0x09, 0x21, 0x85, 0x11,
- 0x59, 0x38, 0x8c, 0x0b,
- 0x90, 0x3b, 0x6f, 0xfc,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xef, 0xfc, 0x60, 0x68,
- 0x1d, 0x18, 0xa1, 0x7b,
- 0x20, 0x14, 0xc0, 0x00,
- 0xe1, 0x08, 0x0e, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xd1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x14,
- 0xfa, 0x80, 0x04, 0x24,
- 0xa1, 0x39, 0x1f, 0x29,
- 0x68, 0x00, 0x5c, 0x68,
- 0x1c, 0x04, 0x89, 0x11,
- 0xe1, 0x14, 0x03, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x1a, 0xe8,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x1a, 0x78, 0xa9, 0x0b,
- 0x5a, 0x14, 0x80, 0x00,
- 0xe1, 0x44, 0x4f, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xf1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x24,
- 0xf8, 0x7c, 0x44, 0x10,
- 0x78, 0x80, 0x46, 0x30,
- 0x5a, 0x58, 0x8b, 0x11,
- 0x1c, 0x04, 0xe8, 0x00,
- 0xe1, 0x48, 0x42, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x18, 0xe8,
- 0x4f, 0x46, 0x5a, 0x14,
- 0x9c, 0x04, 0xe1, 0x44,
- 0x61, 0xa0, 0x04, 0x14,
- 0xfa, 0x80, 0x02, 0x14,
- 0x7a, 0x80, 0x04, 0x24,
- 0xf8, 0x80, 0x46, 0x10,
- 0x8b, 0x11, 0x3f, 0x29,
- 0xe8, 0x00, 0x58, 0xc8,
- 0x43, 0x06, 0x1c, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x17, 0x58, 0x83, 0x0b,
- 0x0c, 0x45, 0xc0, 0x00,
- 0x02, 0x86, 0x60, 0x10,
- 0x84, 0x04, 0xe1, 0x48,
- 0xe1, 0xe0, 0x04, 0x44,
- 0x44, 0x20, 0x00, 0x38,
- 0xc4, 0x3d, 0xfb, 0xfc,
- 0xe1, 0x47, 0x80, 0xd5,
- 0xfa, 0x80, 0x04, 0x44,
- 0x80, 0x65, 0xc5, 0x3d,
- 0x84, 0x04, 0x80, 0x26,
- 0x03, 0x86, 0x00, 0x08,
- 0x84, 0x14, 0xe1, 0x48,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x15, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb8, 0x40, 0x0a,
- 0x02, 0x46, 0x84, 0x85,
- 0xd5, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xcb, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x14, 0x48,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x02, 0x06, 0x84, 0x85,
- 0xd1, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc7, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x12, 0xe8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb0, 0x40, 0x0a,
- 0x43, 0xc6, 0x84, 0x45,
- 0x8e, 0x09, 0x61, 0x44,
- 0x88, 0x06, 0x84, 0x24,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x83, 0x0b, 0x8e, 0x19,
- 0xc0, 0x00, 0x11, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x42, 0x06, 0x84, 0x05,
- 0xc7, 0x07, 0x61, 0x08,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x14, 0x03, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x10, 0x68,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf8, 0x40, 0x0a,
- 0x02, 0xc6, 0x84, 0x45,
- 0xf1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0f, 0x28,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x03, 0x06, 0x84, 0x45,
- 0xe9, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0d, 0xe8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf0, 0x40, 0x0a,
- 0x03, 0x46, 0x84, 0x45,
- 0xe1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0c, 0xa8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x43, 0x86, 0x86, 0x25,
- 0xc9, 0x07, 0x61, 0x00,
- 0x84, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf4,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x84, 0x18, 0xc3, 0x07,
- 0xc0, 0x1f, 0xcd, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xaa, 0xc5,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x05, 0xe0, 0xb0,
- 0x61, 0x00, 0x43, 0x86,
- 0x04, 0x24, 0xc9, 0x07,
- 0x88, 0x38, 0x82, 0x09,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0xc0, 0x1f, 0xcb, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xa4, 0x85,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x25, 0xe0, 0xac,
- 0x61, 0x00, 0x43, 0x46,
- 0x04, 0x24, 0xc5, 0x07,
- 0x88, 0x38, 0x84, 0x09,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0xc3, 0x07, 0x84, 0x14,
- 0xc7, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x9e, 0x25, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa8, 0x40, 0x0a,
- 0x43, 0x46, 0x86, 0x05,
- 0xc5, 0x07, 0x61, 0x00,
- 0x82, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf8,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc5, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x96, 0xe5, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa4, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0xc5,
- 0x84, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x90, 0xe5, 0xe0, 0x84,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa0, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0x85,
- 0x82, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x0a, 0xc0, 0x1f,
- 0x8a, 0xf5, 0xe0, 0x80,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x02, 0x46, 0x86, 0x05,
- 0xeb, 0x07, 0x61, 0x04,
- 0x87, 0x31, 0x04, 0x14,
- 0x78, 0x8c, 0x46, 0x02,
- 0x84, 0x28, 0x86, 0x09,
- 0xf3, 0xf0, 0x44, 0x20,
- 0x04, 0x26, 0xa6, 0x2f,
- 0xe1, 0x14, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x86, 0x19, 0xcb, 0x17,
- 0x84, 0xb5, 0x81, 0x1b,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0x07, 0x1a, 0x14,
- 0x70, 0x01, 0x40, 0x00,
- 0x81, 0x71, 0x43, 0x00,
- 0x61, 0xc0, 0x04, 0x14,
- 0xfb, 0x80, 0x02, 0x14,
- 0x6e, 0x09, 0x4c, 0x25,
- 0xa2, 0x0f, 0x40, 0x09,
- 0x6e, 0x0d, 0x4c, 0x05,
- 0x81, 0xb5, 0xc0, 0x09,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x66, 0x40, 0x2b,
- 0x42, 0x66, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xe0, 0x5d, 0x68,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x69, 0x84, 0x08, 0x24,
- 0xe9, 0x84, 0x0a, 0x34,
- 0x18, 0x44, 0x00, 0x48,
- 0xb8, 0x5f, 0xe0, 0x84,
- 0x04, 0x25, 0xa7, 0x5b,
- 0xe9, 0x84, 0x02, 0x44,
- 0x86, 0x25, 0xa3, 0x5b,
- 0x86, 0xa5, 0xa5, 0x5b,
- 0x5c, 0x08, 0xa1, 0x5b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xa1, 0x1b, 0x80, 0x65,
- 0xa1, 0x1b, 0x84, 0x85,
- 0x81, 0x85, 0x86, 0x35,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x5c, 0x08, 0xa3, 0x1b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xc7, 0x4d, 0x82, 0x55,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xdd, 0x93, 0x80, 0x36,
- 0x82, 0x05, 0xc4, 0x4d,
- 0x80, 0xd5, 0xa1, 0x1b,
- 0xdd, 0x93, 0x80, 0x26,
- 0x80, 0x16, 0x81, 0x11,
- 0xc7, 0x4d, 0xdd, 0x93,
- 0xa3, 0x1b, 0x80, 0x65,
- 0xdd, 0x93, 0xfc, 0x45,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x98, 0x6b, 0x00, 0x8b,
- 0xef, 0xf8, 0x75, 0xc8,
- 0x67, 0xc1, 0x0e, 0x80,
- 0x43, 0x46, 0x40, 0xae,
- 0x01, 0x21, 0xe0, 0x0c,
- 0x77, 0x58, 0x90, 0x0b,
- 0x8e, 0x3b, 0x6f, 0xf8,
- 0xa1, 0x0b, 0x81, 0x91,
- 0x1c, 0x14, 0x82, 0x35,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x43, 0x4a, 0xc0, 0x3f,
- 0x12, 0x0c, 0xe4, 0x08,
- 0x98, 0x0e, 0xe2, 0x00,
- 0x0c, 0x4c, 0x9a, 0x9e,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x61, 0x98, 0x4f, 0x06,
- 0x1c, 0x6e, 0x80, 0x6b,
- 0xe1, 0x00, 0x02, 0x06,
- 0xe8, 0x28, 0x65, 0x08,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xe8, 0x00, 0x40, 0x88,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x87, 0x65,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x60, 0x08, 0x40, 0x26,
- 0x65, 0x50, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0x89,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x60,
- 0x09, 0x21, 0xc0, 0x11,
- 0x6a, 0x98, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x21,
- 0x65, 0x01, 0x02, 0x70,
- 0x29, 0x21, 0xc0, 0x89,
- 0x69, 0xf8, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x71,
- 0x65, 0x61, 0x02, 0x70,
- 0x21, 0x21, 0xc0, 0x89,
- 0x69, 0x58, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0xb1,
- 0x65, 0xa1, 0x02, 0x70,
- 0x45, 0x06, 0xc0, 0x89,
- 0x89, 0x31, 0x60, 0x18,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x18, 0x28, 0x88,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x6b,
- 0x6e, 0x05, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x16, 0x09, 0x96, 0x75,
- 0xc0, 0x04, 0x64, 0xa1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x09, 0x94, 0xa5,
- 0x40, 0x38, 0x63, 0x21,
- 0xe1, 0x9c, 0x4e, 0x0a,
- 0x00, 0x1a, 0x81, 0x81,
- 0x0b, 0x38, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x56,
- 0x4c, 0x01, 0x96, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0xb1, 0x12, 0x60,
- 0x14, 0x60, 0xc0, 0xbf,
- 0x40, 0xc0, 0x65, 0x21,
- 0x64, 0x11, 0x00, 0xb0,
- 0x02, 0xb0, 0xc0, 0x11,
- 0x40, 0x14, 0x64, 0x61,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x60, 0xc0, 0xae,
- 0x40, 0xae, 0x65, 0xa1,
- 0x65, 0xe1, 0x18, 0x70,
- 0x09, 0xbe, 0xc0, 0x1f,
- 0x64, 0xc1, 0x06, 0x60,
- 0x7e, 0xce, 0xc0, 0xad,
- 0x65, 0x21, 0x08, 0x60,
- 0x7c, 0x2e, 0xc0, 0xad,
- 0x65, 0x41, 0x0a, 0x60,
- 0x3e, 0x1e, 0xc0, 0x54,
- 0x3c, 0x0e, 0x94, 0x1b,
- 0x55, 0x38, 0x92, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xc4,
- 0x63, 0x21, 0x0c, 0x09,
- 0x4e, 0x0a, 0x40, 0x38,
- 0x00, 0x1a, 0xe1, 0x9c,
- 0x07, 0xb8, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x66,
- 0x65, 0x60, 0x06, 0x60,
- 0x4c, 0x01, 0xc0, 0xd8,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x1b, 0x92, 0x0b,
- 0x4d, 0x98, 0x8e, 0x2b,
- 0x96, 0x4b, 0x6f, 0xc0,
- 0x4e, 0x0a, 0x0d, 0xa5,
- 0x40, 0x46, 0xe1, 0x9c,
- 0x43, 0x46, 0x60, 0x08,
- 0x4c, 0x01, 0xe1, 0x4c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x04, 0xb0,
- 0x18, 0x60, 0xc0, 0x11,
- 0x40, 0xae, 0x65, 0xa1,
- 0x64, 0x01, 0x10, 0xb0,
- 0x0e, 0x60, 0xc0, 0x10,
- 0x40, 0x9f, 0x67, 0x61,
- 0x66, 0x11, 0x08, 0x60,
- 0x14, 0xb0, 0xc0, 0xad,
- 0x40, 0x13, 0x65, 0xb1,
- 0x67, 0x91, 0x12, 0xb0,
- 0x17, 0xbe, 0xc0, 0x10,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x04, 0xc0, 0xae,
- 0x66, 0xd1, 0x02, 0x60,
- 0x0f, 0xbe, 0xc0, 0x54,
- 0x64, 0x51, 0x06, 0x60,
- 0x19, 0xbe, 0xc0, 0x9e,
- 0x0d, 0x9e, 0x8e, 0xbb,
- 0x66, 0x71, 0x0a, 0x60,
- 0x8b, 0x8e, 0xc0, 0xa2,
- 0xfe, 0xce, 0x89, 0xae,
- 0x18, 0x60, 0x13, 0xce,
- 0xc0, 0xa3, 0x64, 0xa1,
- 0x08, 0x60, 0x7c, 0x4e,
- 0xc0, 0x6c, 0x67, 0x01,
- 0x96, 0x4b, 0x3e, 0x4e,
- 0xbc, 0xce, 0x9b, 0x8e,
- 0x9d, 0x2e, 0x95, 0x1e,
- 0xef, 0xb8, 0x49, 0x88,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x40, 0x56, 0x88, 0x75,
- 0x0a, 0x60, 0x60, 0x08,
- 0xc0, 0xa1, 0x64, 0x70,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x41, 0x46, 0x40, 0x2b,
- 0x17, 0x34, 0xe1, 0x4c,
- 0x99, 0x24, 0x96, 0x4b,
- 0x02, 0x30, 0x80, 0x04,
- 0x40, 0x14, 0x64, 0x61,
- 0x65, 0xe1, 0x0e, 0x30,
- 0x89, 0x2e, 0xc0, 0x1f,
- 0xfc, 0x1e, 0xfe, 0x7e,
- 0x9b, 0x24, 0x9d, 0x14,
- 0x86, 0x1b, 0x3e, 0x1e,
- 0x92, 0x3b, 0x3c, 0xae,
- 0xef, 0xb4, 0x4e, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0xa1, 0x8b, 0x8a, 0x45,
- 0x6e, 0x89, 0x0c, 0x05,
- 0x10, 0x56, 0x40, 0x0a,
- 0x0c, 0x15, 0xc0, 0x0c,
- 0xc0, 0x0a, 0x6e, 0x8d,
- 0x6e, 0x91, 0x0c, 0x25,
- 0x0c, 0x35, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x6e, 0x95,
- 0x69, 0x3d, 0x4c, 0x03,
- 0x40, 0x60, 0x40, 0x0a,
- 0x4c, 0x13, 0xdc, 0x00,
- 0x40, 0x0a, 0x69, 0x41,
- 0xc0, 0x0c, 0x02, 0x56,
- 0x69, 0x45, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x49,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x44, 0x78, 0xc0, 0x2b,
- 0x10, 0x0b, 0xcf, 0xe0,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x60, 0x08, 0x42, 0x66,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x02, 0x60, 0x40, 0x2b,
- 0xc0, 0xb6, 0x67, 0x01,
- 0x0a, 0x60, 0x19, 0x24,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x9b, 0x34, 0x80, 0x04,
- 0x8e, 0x2b, 0x7c, 0x2e,
- 0x95, 0x14, 0xbe, 0x1e,
- 0xbc, 0x1e, 0x93, 0x44,
- 0x69, 0x58, 0x9d, 0x14,
- 0x17, 0xb4, 0xef, 0xb4,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x9f, 0xfc, 0x30, 0x18,
- 0x4e, 0x0a, 0x77, 0xa5,
- 0xc1, 0xc3, 0xe9, 0x9c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x8b,
- 0x00, 0x8e, 0xe1, 0x98,
- 0xe1, 0x00, 0x02, 0x06,
- 0x68, 0x28, 0x4f, 0x28,
- 0x01, 0x91, 0x90, 0x0b,
- 0xe6, 0xd4, 0x54, 0x06,
- 0x83, 0x61, 0x17, 0xb1,
- 0x81, 0x71, 0x09, 0xc5,
- 0x6e, 0x19, 0x10, 0x1b,
- 0x00, 0x64, 0x40, 0x15,
- 0x80, 0x1f, 0xe8, 0xa4,
- 0x90, 0x05, 0xa1, 0x1b,
- 0xe1, 0x34, 0x43, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x80, 0xa5, 0xa1, 0x2b,
- 0x80, 0x1f, 0x84, 0x18,
- 0x8c, 0xc5, 0xa1, 0x1b,
- 0xf0, 0xa4, 0x4c, 0x82,
- 0x68, 0x81, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x1b,
- 0x41, 0x06, 0x63, 0xfc,
- 0x80, 0x14, 0xe1, 0x98,
- 0x04, 0x94, 0x80, 0xe5,
- 0x90, 0x0b, 0x7a, 0x80,
- 0xe8, 0x00, 0x43, 0x28,
- 0x68, 0x18, 0x81, 0x45,
- 0x90, 0x0b, 0x6f, 0xfc,
- 0x68, 0x81, 0x0c, 0x09,
- 0x06, 0x06, 0x40, 0x1b,
- 0x0c, 0x14, 0xe1, 0x38,
- 0xec, 0x04, 0x04, 0xb0,
- 0x00, 0x0a, 0x83, 0x61,
- 0x10, 0x05, 0xe3, 0xfc,
- 0x10, 0x09, 0xdc, 0x28,
- 0x00, 0x27, 0x07, 0xe5,
- 0x50, 0x05, 0xa1, 0x7b,
- 0xc0, 0x0a, 0x6e, 0x69,
- 0x82, 0x55, 0x84, 0x2c,
- 0xe1, 0x98, 0x41, 0x06,
- 0x90, 0x0b, 0x00, 0x14,
- 0xef, 0xfc, 0x69, 0x88,
- 0x61, 0x38, 0x06, 0x06,
- 0x8c, 0x04, 0x80, 0x7b,
- 0x02, 0x91, 0x80, 0xbc,
- 0x84, 0xb1, 0x88, 0xa1,
- 0xe0, 0x40, 0x12, 0x0a,
- 0x8e, 0x0b, 0xec, 0x95,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x60, 0x08, 0x40, 0x36,
- 0x50, 0x01, 0x84, 0x6b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x70,
- 0x02, 0x80, 0xc0, 0x11,
- 0x40, 0x6d, 0x65, 0x71,
- 0x4f, 0xb8, 0x89, 0x21,
- 0x81, 0x31, 0x68, 0x18,
- 0x64, 0x21, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6d, 0x65, 0x21,
- 0x81, 0x31, 0x29, 0x21,
- 0xe8, 0x18, 0x4f, 0x08,
- 0x60, 0x88, 0x00, 0x64,
- 0x65, 0x80, 0x02, 0x80,
- 0x02, 0x25, 0xc0, 0x6d,
- 0x82, 0x03, 0x7c, 0x00,
- 0x89, 0x31, 0x0c, 0x13,
- 0x61, 0x1d, 0x4e, 0x25,
- 0x00, 0x25, 0xc0, 0x01,
- 0x4e, 0x25, 0xe0, 0x40,
- 0x40, 0x01, 0x61, 0x21,
- 0xe0, 0x18, 0x45, 0x06,
- 0xe0, 0x80, 0x00, 0x05,
- 0x61, 0x25, 0x4e, 0x05,
- 0x02, 0x09, 0xc0, 0x01,
- 0x4e, 0x01, 0xe3, 0x00,
- 0xc0, 0x04, 0x64, 0xa1,
- 0x63, 0x40, 0x02, 0x09,
- 0xe0, 0x18, 0x43, 0x06,
- 0xe6, 0x86, 0x42, 0x6a,
- 0x64, 0xa5, 0x4e, 0x01,
- 0x82, 0x83, 0x40, 0x04,
- 0x64, 0xb1, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6e, 0x65, 0x01,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x18, 0x0b, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x15, 0xc6, 0x00, 0x6b,
- 0x10, 0x60, 0xe1, 0xa0,
- 0x40, 0x54, 0x66, 0xd1,
- 0x65, 0x41, 0x12, 0x60,
- 0x28, 0x6e, 0xc0, 0x54,
- 0x67, 0x61, 0x0e, 0x60,
- 0x10, 0x0b, 0xc0, 0xae,
- 0x0c, 0x2b, 0x92, 0x1b,
- 0x6a, 0x38, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x28, 0x24, 0x84, 0x55,
- 0x12, 0x1b, 0x90, 0x0b,
- 0x6c, 0x18, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x00, 0x00, 0x14, 0x25,
- 0x9c, 0x00, 0x40, 0x80,
- 0x1c, 0x00, 0x42, 0x90,
- 0x9c, 0x00, 0x46, 0x70,
- 0x8f, 0xcc, 0x68, 0xe8,
- 0x6e, 0x89, 0x0c, 0x15,
- 0xa1, 0x0b, 0x40, 0x0a,
- 0x6e, 0x8d, 0x0c, 0x25,
- 0x0e, 0x06, 0x40, 0x0a,
- 0x0c, 0x35, 0x80, 0x00,
- 0xc0, 0x0a, 0x6e, 0x91,
- 0x6e, 0x95, 0x0c, 0x45,
- 0x4c, 0x13, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x3d,
- 0x69, 0x41, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x45,
- 0x69, 0x49, 0x4c, 0x43,
- 0x82, 0x65, 0xc0, 0x0a,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xdc, 0x71, 0xe8,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x61, 0x41, 0x00, 0x19,
- 0x15, 0xc6, 0x40, 0x15,
- 0x00, 0x29, 0xe0, 0x10,
- 0x40, 0x15, 0x61, 0x45,
- 0x42, 0x2a, 0x81, 0xb1,
- 0x00, 0x29, 0xe6, 0x86,
- 0xc0, 0x15, 0x62, 0x11,
- 0xfa, 0x80, 0x02, 0x14,
- 0x04, 0x00, 0x0b, 0x2e,
- 0xc0, 0x66, 0x66, 0x49,
- 0x04, 0x00, 0x7e, 0x2e,
- 0xc0, 0x58, 0x66, 0x51,
- 0x04, 0x00, 0x7c, 0x2e,
- 0xc0, 0x6b, 0x66, 0x45,
- 0x97, 0xc5, 0xbe, 0x2e,
- 0xf0, 0x8c, 0x44, 0x02,
- 0x6f, 0x41, 0x04, 0x79,
- 0xe5, 0x7d, 0xc0, 0x15,
- 0x8b, 0x24, 0x82, 0xd5,
- 0xe6, 0x8a, 0x48, 0x3a,
- 0xf0, 0x90, 0x44, 0x02,
- 0x6e, 0x41, 0x04, 0x29,
- 0xf0, 0x2d, 0xc0, 0x1a,
- 0x54, 0x4a, 0x80, 0xd5,
- 0x80, 0x75, 0xe4, 0x88,
- 0x82, 0xb1, 0x15, 0x75,
- 0x69, 0x91, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x2b,
- 0x40, 0x88, 0x04, 0x44,
- 0xc0, 0x00, 0x0a, 0x16,
- 0xd0, 0x80, 0x44, 0x22,
- 0x08, 0x91, 0x04, 0x95,
- 0x86, 0xb5, 0xc0, 0x05,
- 0x60, 0x84, 0x04, 0x44,
- 0x80, 0x23, 0x83, 0x51,
- 0x6d, 0x21, 0x04, 0x63,
- 0x04, 0x54, 0xc0, 0x0c,
- 0xcf, 0x2d, 0xfa, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x90, 0x80, 0x48, 0x42,
- 0x08, 0x91, 0x08, 0x95,
- 0x88, 0x05, 0x80, 0x05,
- 0x82, 0x51, 0x08, 0x23,
- 0x80, 0x23, 0xc2, 0x27,
- 0x6d, 0x21, 0x04, 0x23,
- 0x8d, 0x2d, 0xc0, 0x0c,
- 0xfb, 0x55, 0xfa, 0xa5,
- 0xfa, 0x80, 0x04, 0x54,
- 0x08, 0x44, 0xcf, 0x2d,
- 0x48, 0x42, 0x80, 0x84,
- 0x08, 0x6b, 0x90, 0x80,
- 0x80, 0x0c, 0x0d, 0x21,
- 0x08, 0x23, 0x82, 0x65,
- 0xc4, 0x27, 0x82, 0x51,
- 0x04, 0x25, 0x80, 0x23,
- 0xc0, 0x05, 0x68, 0x91,
- 0xfa, 0xa5, 0xd2, 0x2d,
- 0x0b, 0x24, 0xf9, 0x05,
- 0xfc, 0xc4, 0xd5, 0x97,
- 0x4a, 0x2a, 0x89, 0x9e,
- 0xfe, 0x24, 0xe6, 0x8e,
- 0x60, 0x84, 0x06, 0x54,
- 0xe0, 0x88, 0x08, 0x54,
- 0x98, 0x43, 0x3e, 0xc4,
- 0x04, 0x64, 0x04, 0x33,
- 0xfb, 0x27, 0xfb, 0x00,
- 0x98, 0x53, 0x06, 0x29,
- 0x10, 0x64, 0x84, 0x63,
- 0x83, 0x61, 0x7b, 0x00,
- 0x85, 0x87, 0x09, 0xc5,
- 0xf0, 0x2d, 0x94, 0x28,
- 0x54, 0x4a, 0x80, 0x95,
- 0x90, 0x25, 0xe4, 0x88,
- 0x18, 0x24, 0x8c, 0x22,
- 0x86, 0xc9, 0xe1, 0xf4,
- 0x04, 0x24, 0x98, 0x23,
- 0x85, 0x27, 0xfb, 0x00,
- 0x58, 0x22, 0x10, 0x24,
- 0x12, 0xc0, 0xf1, 0xa0,
- 0x13, 0x0a, 0xed, 0xb0,
- 0xc0, 0x04, 0x64, 0x75,
- 0xd5, 0x27, 0x02, 0xe5,
- 0x6d, 0x40, 0x18, 0xc0,
- 0xe0, 0x04, 0x52, 0x46,
- 0x60, 0xa6, 0x58, 0xca,
- 0x89, 0x94, 0x82, 0x21,
- 0xec, 0x08, 0x18, 0xc0,
- 0xe0, 0x0a, 0x44, 0x9a,
- 0x09, 0x94, 0x83, 0xd5,
- 0x19, 0x0a, 0x82, 0x21,
- 0xc0, 0x02, 0x60, 0x45,
- 0x60, 0x0a, 0x44, 0x9a,
- 0xc0, 0x00, 0x13, 0xe6,
- 0x40, 0x26, 0x58, 0xca,
- 0xc0, 0x04, 0x13, 0x06,
- 0x58, 0x92, 0x02, 0xf5,
- 0x9f, 0x91, 0xd1, 0xb0,
- 0x66, 0xa6, 0x58, 0xca,
- 0xe0, 0x04, 0x52, 0x46,
- 0x6e, 0xc1, 0x18, 0xc0,
- 0x58, 0xca, 0xc0, 0x04,
- 0x18, 0xc0, 0xe0, 0xa6,
- 0xd8, 0x2d, 0xec, 0x14,
- 0xc0, 0x00, 0x04, 0xd6,
- 0xc0, 0x00, 0x4a, 0x21,
- 0x84, 0x31, 0x02, 0x61,
- 0x82, 0x51, 0x08, 0x41,
- 0xec, 0xb5, 0xcf, 0x6d,
- 0x06, 0xb4, 0xeb, 0xa5,
- 0xc3, 0x3d, 0xfa, 0x80,
- 0x01, 0x01, 0xd0, 0x55,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x00, 0x19, 0x94, 0x15,
- 0xc0, 0x38, 0x64, 0xd1,
- 0x92, 0x75, 0xa1, 0x1b,
- 0x61, 0x41, 0x00, 0x19,
- 0x81, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x89, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x11, 0x00, 0x19,
- 0x07, 0x95, 0xc0, 0x15,
- 0xfa, 0x80, 0x04, 0x24,
- 0x70, 0xb0, 0x4a, 0x02,
- 0xe6, 0x86, 0x58, 0xca,
- 0x67, 0x41, 0x0a, 0x50,
- 0x81, 0x61, 0x40, 0x57,
- 0x98, 0x83, 0x85, 0x85,
- 0xf0, 0xa0, 0x4e, 0x02,
- 0x6e, 0x41, 0x0e, 0x99,
- 0xab, 0x9b, 0xc0, 0x1a,
- 0xc2, 0x87, 0x86, 0xf5,
- 0x10, 0x83, 0x80, 0x83,
- 0xc0, 0x0c, 0x6d, 0x21,
- 0xe1, 0xf4, 0x12, 0x84,
- 0x00, 0x93, 0x86, 0x99,
- 0x40, 0x1c, 0x62, 0x6d,
- 0x10, 0x84, 0x92, 0x83,
- 0x85, 0x87, 0xfb, 0x00,
- 0x82, 0xd5, 0x92, 0x8d,
- 0x6a, 0x41, 0x0e, 0x89,
- 0x00, 0x99, 0xc0, 0x1a,
- 0xc0, 0x38, 0x64, 0xd5,
- 0xd2, 0x8d, 0xc3, 0x87,
- 0x06, 0x41, 0x0e, 0x70,
- 0x4e, 0x41, 0x80, 0x6b,
- 0x82, 0x61, 0x80, 0x00,
- 0x10, 0x64, 0x14, 0x78,
- 0xcf, 0x8d, 0xfa, 0x80,
- 0x82, 0x31, 0xf4, 0xb5,
- 0xfa, 0x80, 0x18, 0x34,
- 0xf0, 0xf5, 0xc5, 0xcd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0xfb, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x81, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x62, 0x11, 0x00, 0x29,
- 0x09, 0xf5, 0xc0, 0x15,
- 0xfa, 0x80, 0x02, 0x14,
- 0x66, 0x8a, 0x4a, 0x7a,
- 0x66, 0x40, 0x0c, 0x00,
- 0x58, 0x62, 0xc0, 0x58,
- 0x18, 0xc9, 0xf0, 0x94,
- 0xc0, 0x04, 0x6c, 0x01,
- 0x18, 0x06, 0x2b, 0xcb,
- 0x86, 0x75, 0xe0, 0x80,
- 0x0e, 0x79, 0x80, 0x73,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x84, 0xa5, 0xa1, 0x7b,
- 0xe0, 0x84, 0x18, 0x54,
- 0x81, 0xc1, 0x18, 0x63,
- 0x6c, 0x01, 0x0c, 0x63,
- 0x87, 0x6d, 0xc0, 0x01,
- 0x0c, 0xc4, 0x80, 0xc5,
- 0x8c, 0xc3, 0xe1, 0xfc,
- 0x83, 0xc7, 0x01, 0xf5,
- 0x60, 0x0d, 0x0d, 0x0a,
- 0x59, 0xf6, 0x40, 0x20,
- 0x82, 0xc5, 0xe0, 0x7c,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xf9, 0x67,
- 0x18, 0xc0, 0x89, 0xc7,
- 0x00, 0x53, 0xe5, 0xc8,
- 0x4a, 0xc1, 0x82, 0x41,
- 0xc0, 0x1a, 0x62, 0x41,
- 0x18, 0x64, 0x83, 0x85,
- 0x0d, 0x0a, 0x61, 0xf4,
- 0xc0, 0x03, 0x60, 0x7c,
- 0x8c, 0xc3, 0x86, 0xc9,
- 0xfb, 0x00, 0x18, 0xc4,
- 0x85, 0xc7, 0x76, 0xe5,
- 0x61, 0x7d, 0x0d, 0x0a,
- 0xf8, 0xb5, 0xc0, 0x09,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xfb, 0x67,
- 0x7d, 0x65, 0x87, 0xc7,
- 0xe5, 0x30, 0x18, 0xc0,
- 0xfa, 0x80, 0x0e, 0x44,
- 0xec, 0x35, 0xc3, 0x7d,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x51, 0x06, 0x00, 0x6b,
- 0x20, 0x6e, 0xe1, 0x98,
- 0x67, 0x01, 0x12, 0x60,
- 0x03, 0x15, 0xc0, 0x94,
- 0x0c, 0x0b, 0x81, 0x71,
- 0xc0, 0x16, 0x66, 0x35,
- 0x60, 0x80, 0x40, 0x4a,
- 0xe0, 0x10, 0x00, 0x06,
- 0x5c, 0x00, 0x40, 0x60,
- 0xdc, 0x00, 0x42, 0x70,
- 0xcf, 0xdc, 0x42, 0xa8,
- 0x82, 0x71, 0x65, 0x0e,
- 0xe2, 0x30, 0x0e, 0x0a,
- 0x20, 0x14, 0xfa, 0xf5,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x81, 0x15, 0xf2, 0x9c,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x00, 0x06, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x64, 0x81, 0x0e, 0x60,
- 0x18, 0x60, 0x40, 0x99,
- 0xc0, 0x8b, 0x64, 0x61,
- 0x04, 0x60, 0x3e, 0x7e,
- 0xc0, 0xae, 0x66, 0xa1,
- 0x06, 0x60, 0x00, 0x04,
- 0xc0, 0x9f, 0x67, 0x61,
- 0x65, 0x21, 0x08, 0x60,
- 0x0a, 0x60, 0x40, 0xa2,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x62, 0x18, 0xbc, 0xce,
- 0xa1, 0x0b, 0xef, 0xc8,
- 0x0e, 0x06, 0x02, 0xa5,
- 0x0c, 0x29, 0x80, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x0e, 0x56,
- 0x60, 0x0c, 0x02, 0x56,
- 0x52, 0x18, 0x8c, 0x0b,
- 0x0e, 0x0b, 0xef, 0xdc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xf0, 0x59, 0x28,
- 0x81, 0x71, 0x81, 0x11,
- 0x60, 0x04, 0x47, 0xc6,
- 0x10, 0x05, 0x80, 0x6b,
- 0x40, 0x09, 0x6e, 0x0d,
- 0x65, 0x61, 0x04, 0x80,
- 0x10, 0x15, 0xc0, 0xad,
- 0xc0, 0x0a, 0x6d, 0x49,
- 0x6c, 0x1d, 0x50, 0x31,
- 0x5c, 0x58, 0xc0, 0x2b,
- 0x80, 0x9b, 0xef, 0xc4,
- 0x82, 0xc5, 0xa1, 0x9b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x90, 0x0b, 0x40, 0x2b,
- 0x6f, 0xdc, 0x4f, 0x28,
- 0x03, 0x11, 0x92, 0x1b,
- 0x57, 0x18, 0x8c, 0x0b,
- 0x15, 0x75, 0xef, 0xf0,
- 0x7c, 0x6e, 0x92, 0x7b,
- 0xe1, 0x04, 0x01, 0x46,
- 0x6d, 0x59, 0x10, 0x15,
- 0x80, 0x04, 0xc0, 0x0a,
- 0x10, 0x05, 0x80, 0x1e,
- 0xc0, 0x0a, 0x6d, 0x59,
- 0x6e, 0x0d, 0x10, 0x15,
- 0x5b, 0xf8, 0xc0, 0x09,
- 0x00, 0x00, 0xef, 0xc4,
- 0xc0, 0x80, 0x64, 0x01,
- 0xe1, 0xc0, 0x12, 0x04,
- 0x6f, 0xcc, 0x64, 0x88,
- 0x10, 0x0b, 0x92, 0x0b,
- 0x6b, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x65, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x68, 0x98, 0x92, 0x1b,
- 0x01, 0x46, 0xef, 0xcc,
- 0x02, 0x86, 0x61, 0x18,
- 0x80, 0x04, 0xe1, 0x18,
- 0x84, 0x24, 0x80, 0x08,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x04, 0x03, 0x86,
- 0x10, 0x2b, 0x80, 0x08,
- 0xc0, 0x16, 0x67, 0x39,
- 0x50, 0x01, 0x84, 0x14,
- 0x40, 0x2b, 0x65, 0x7d,
- 0xe1, 0x04, 0x01, 0xc6,
- 0x83, 0x21, 0x04, 0x2c,
- 0x67, 0x3d, 0x10, 0x1b,
- 0x80, 0x04, 0xc0, 0x16,
- 0x41, 0xc6, 0x00, 0x1c,
- 0x80, 0x04, 0xe1, 0x00,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x04,
- 0xd0, 0x19, 0x80, 0x18,
- 0x90, 0x0b, 0x00, 0x16,
- 0x60, 0xcd, 0x10, 0x15,
- 0x63, 0xf8, 0xc0, 0x0e,
- 0x10, 0x09, 0xe8, 0x20,
- 0x40, 0x38, 0x63, 0x15,
- 0xe1, 0x04, 0x14, 0x06,
- 0xa5, 0x0b, 0x83, 0x21,
- 0x0e, 0x91, 0x10, 0x19,
- 0x41, 0x06, 0x40, 0x2c,
- 0x00, 0x05, 0xc1, 0x10,
- 0x40, 0x11, 0xc0, 0x00,
- 0x89, 0x11, 0x40, 0x00,
- 0x00, 0x16, 0xa8, 0x04,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd1,
- 0xe8, 0x20, 0x62, 0x68,
- 0x8f, 0x61, 0x28, 0x04,
- 0x00, 0x66, 0x83, 0x21,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd5,
- 0xe8, 0x20, 0x61, 0xc8,
- 0x16, 0x76, 0x28, 0x04,
- 0x00, 0xb6, 0xe0, 0x04,
- 0x4c, 0x58, 0x90, 0x0b,
- 0x50, 0x75, 0xe8, 0x00,
- 0x40, 0x0e, 0x60, 0xed,
- 0x50, 0x75, 0xa1, 0x0b,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0x60, 0xf1, 0x50, 0x75,
- 0x88, 0x85, 0xc0, 0x0e,
- 0x03, 0x46, 0xfc, 0x64,
- 0x01, 0x86, 0xe1, 0x18,
- 0x83, 0xa1, 0x61, 0x18,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x08, 0x84, 0x04,
- 0x40, 0x9a, 0x82, 0x01,
- 0x50, 0x03, 0xe0, 0x02,
- 0xc0, 0x15, 0x6e, 0x01,
- 0xef, 0xe0, 0x4d, 0x68,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0xa6, 0x80, 0x04,
- 0xe8, 0x20, 0x66, 0x08,
- 0xef, 0xcc, 0x4f, 0x08,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xf0, 0x4c, 0xa8,
- 0x98, 0xf1, 0x0e, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x10, 0x15, 0xdd, 0x93,
- 0xc0, 0x0e, 0x60, 0xe5,
- 0x60, 0xdd, 0x10, 0x05,
- 0x82, 0x11, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x15,
- 0xa1, 0x0b, 0x40, 0x0e,
- 0x50, 0x15, 0x83, 0x11,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x60, 0xf1, 0x50, 0x15,
- 0x96, 0x85, 0xc0, 0x0e,
- 0x83, 0x91, 0x3e, 0x9e,
- 0xa8, 0x04, 0x89, 0x05,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x83, 0x21, 0x00, 0x26,
- 0x60, 0xd1, 0x10, 0x15,
- 0x90, 0x0b, 0x40, 0x0e,
- 0xe8, 0x20, 0x5b, 0x48,
- 0x83, 0x21, 0x28, 0x04,
- 0x90, 0x0b, 0x00, 0x66,
- 0x60, 0xd5, 0x10, 0x15,
- 0x5a, 0xb8, 0xc0, 0x0e,
- 0xa8, 0x04, 0xe8, 0x20,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xe8, 0x00, 0x45, 0x68,
- 0x90, 0x15, 0xa1, 0x0b,
- 0x60, 0xe5, 0x10, 0x05,
- 0x82, 0x91, 0x40, 0x0e,
- 0x60, 0xed, 0x10, 0x15,
- 0x82, 0x01, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x05,
- 0x82, 0x11, 0x40, 0x0e,
- 0x60, 0xdd, 0x10, 0x05,
- 0x50, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x89, 0x21, 0x02, 0x01,
- 0xee, 0xd5, 0xc1, 0x9d,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0x36, 0x40, 0x2b,
- 0x7e, 0x18, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xd8,
- 0xe0, 0x08, 0x0e, 0x36,
- 0x83, 0x11, 0x00, 0xab,
- 0x45, 0xd8, 0xfc, 0x04,
- 0x21, 0xab, 0xef, 0xf0,
- 0x3e, 0x94, 0x80, 0x6b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x10, 0x29, 0xef, 0x15,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x02, 0x36,
- 0x6f, 0xd8, 0x7c, 0xc8,
- 0x0e, 0x36, 0x90, 0x0b,
- 0x00, 0xab, 0xe0, 0x08,
- 0xfc, 0x04, 0x83, 0x11,
- 0xef, 0xf0, 0x44, 0x88,
- 0x80, 0x6b, 0x21, 0xab,
- 0x0e, 0x06, 0x6b, 0xf5,
- 0x10, 0x05, 0x80, 0x00,
- 0x40, 0x0e, 0x61, 0x05,
- 0xe1, 0x18, 0x03, 0x46,
- 0x60, 0xe1, 0x50, 0x95,
- 0x50, 0x95, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0xd3, 0x0d, 0x7c, 0x64,
- 0x01, 0x05, 0x50, 0x95,
- 0xbe, 0x94, 0xc0, 0x0e,
- 0xc1, 0xc3, 0xe9, 0xd5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x60, 0xd9, 0x00, 0x15,
- 0x81, 0x21, 0x40, 0x0e,
- 0x68, 0x20, 0x54, 0xa8,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x00, 0xc5, 0xe0, 0x90,
- 0x80, 0x00, 0x0c, 0x16,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x8c, 0x0b, 0xfc, 0xe5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xf0, 0x40, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x01, 0x86, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x12, 0x86, 0x40, 0x2b,
- 0x80, 0x86, 0xe1, 0x3c,
- 0x6e, 0x0d, 0x0c, 0x05,
- 0xa4, 0x14, 0xc0, 0x09,
- 0x82, 0x01, 0xd9, 0x07,
- 0x6e, 0x01, 0x4c, 0x03,
- 0x84, 0x08, 0xc0, 0x15,
- 0xf3, 0x7c, 0x40, 0x00,
- 0x00, 0x06, 0x04, 0x06,
- 0x80, 0x14, 0xe1, 0x04,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x80, 0x14,
- 0xf2, 0xfc, 0x44, 0x20,
- 0x80, 0x14, 0x84, 0x26,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xf4,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x00,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x04, 0x00, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x7d, 0xb8, 0x80, 0x16,
- 0xa4, 0x04, 0xef, 0xdc,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x94,
- 0xef, 0xc8, 0x7e, 0x68,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xec, 0x7c, 0x08,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0x86, 0x80, 0x04,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x43, 0x26, 0x00, 0x6b,
- 0x0c, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x0c, 0x09, 0xe0, 0x84,
- 0xc0, 0x2b, 0x05, 0xa9,
- 0x43, 0x06, 0x8c, 0x95,
- 0x84, 0x18, 0xef, 0xdc,
- 0x80, 0xb5, 0xa3, 0x1b,
- 0x66, 0xe9, 0x0c, 0x09,
- 0x85, 0xb5, 0xc0, 0x26,
- 0xf7, 0x00, 0x00, 0x8a,
- 0x0c, 0x19, 0x80, 0xd5,
- 0xc0, 0x26, 0x66, 0xed,
- 0xfc, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0c, 0x19, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x82, 0x0d, 0xff, 0x11,
- 0x0c, 0x19, 0x82, 0x15,
- 0xc0, 0x26, 0x66, 0xed,
- 0x04, 0x65, 0xa1, 0x1b,
- 0x80, 0x00, 0x40, 0x46,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x09,
- 0x02, 0x60, 0x00, 0x2b,
- 0x80, 0xad, 0x05, 0xb1,
- 0x04, 0x41, 0x02, 0x60,
- 0x84, 0x18, 0xc0, 0x9e,
- 0x08, 0x45, 0x0c, 0x09,
- 0x82, 0x03, 0xc0, 0x27,
- 0xe1, 0x00, 0x42, 0x86,
- 0x84, 0x06, 0x84, 0x14,
- 0xa1, 0x0b, 0x84, 0x08,
- 0x84, 0x08, 0x80, 0xa5,
- 0xe5, 0x04, 0x00, 0x8a,
- 0x40, 0x46, 0x80, 0x95,
- 0x84, 0x06, 0xe0, 0x00,
- 0x61, 0x00, 0x4e, 0x46,
- 0x9c, 0x04, 0x83, 0x21,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x9c, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0x47, 0x98, 0x87, 0x11,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x83, 0x21, 0x1c, 0x04,
- 0xc4, 0x19, 0x80, 0x18,
- 0x99, 0x11, 0x00, 0x16,
- 0x68, 0x20, 0x47, 0x08,
- 0x9c, 0x04, 0x8c, 0x0b,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x4c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x41, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x46, 0x00, 0x7b,
- 0x45, 0x98, 0xe0, 0x04,
- 0x81, 0x21, 0x68, 0x20,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0x25, 0xe0, 0x98,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x0e, 0x29, 0xfe, 0x25,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0c, 0x86,
- 0x60, 0x08, 0x02, 0x86,
- 0x69, 0x98, 0x8e, 0x0b,
- 0xa3, 0x0b, 0xef, 0xd8,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xe8, 0x20, 0x4a, 0x88,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x01, 0x61,
- 0x57, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x88,
- 0xe1, 0x44, 0x41, 0xc6,
- 0x80, 0x66, 0x80, 0x04,
- 0xef, 0xdc, 0x6e, 0xa8,
- 0xef, 0xdc, 0x71, 0x48,
- 0xef, 0xdc, 0x73, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x56, 0xd8, 0x83, 0x11,
- 0x0c, 0x0c, 0xef, 0x88,
- 0x33, 0x58, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xc8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xc6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6d, 0x49, 0x0c, 0x05,
- 0x4c, 0x05, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x85,
- 0x66, 0x85, 0x0c, 0x05,
- 0x77, 0x78, 0xc0, 0x0b,
- 0x00, 0x04, 0xef, 0xc0,
- 0x4c, 0x05, 0xfb, 0x80,
- 0xc0, 0x0b, 0x66, 0x89,
- 0x65, 0x39, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x65, 0x3d, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x39,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xd6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x05, 0x91, 0x11,
- 0xc0, 0x08, 0x69, 0x59,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2b, 0x65, 0xcd,
- 0xef, 0xc0, 0x72, 0xa8,
- 0x6a, 0x05, 0x4c, 0x01,
- 0x0c, 0x05, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x63, 0x7d,
- 0x66, 0x7d, 0x4c, 0x05,
- 0x0c, 0x0c, 0xc0, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xc4, 0x17, 0x00, 0x6b,
- 0x60, 0x08, 0x40, 0xe6,
- 0x4c, 0x01, 0x8c, 0x13,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x05, 0x84, 0x7b,
- 0xc0, 0x06, 0x6d, 0x61,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6e, 0x31,
- 0x6d, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0x40, 0x2c,
- 0x40, 0x4a, 0x84, 0x15,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x00, 0xad, 0x05, 0x4d,
- 0x05, 0xa1, 0x02, 0x60,
- 0x00, 0x60, 0x80, 0xb3,
- 0x40, 0xad, 0x05, 0x49,
- 0x05, 0x91, 0x02, 0x60,
- 0x81, 0xc5, 0xc0, 0xb3,
- 0x60, 0x8c, 0x40, 0x4a,
- 0x65, 0xc0, 0x02, 0x60,
- 0x00, 0x60, 0xc0, 0xb3,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x08, 0xc0, 0xad,
- 0x91, 0x11, 0x04, 0x84,
- 0xef, 0xc0, 0x6e, 0x68,
- 0x6a, 0x05, 0x4c, 0x01,
- 0xa3, 0x7b, 0x40, 0x2d,
- 0x03, 0x89, 0x0c, 0x85,
- 0x4c, 0x85, 0x80, 0x0b,
- 0xc0, 0x0b, 0x66, 0x7d,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x48, 0xf6,
- 0x40, 0x41, 0x82, 0x31,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x66, 0x71, 0x00, 0x45,
- 0xa1, 0x4b, 0xc0, 0x0b,
- 0x06, 0x71, 0x00, 0x45,
- 0x46, 0x3a, 0xc0, 0x0b,
- 0x40, 0x35, 0xc0, 0x12,
- 0xc0, 0x0b, 0x66, 0x69,
- 0x66, 0x69, 0x00, 0x35,
- 0x00, 0x45, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x6d,
- 0xe1, 0x92, 0x46, 0x3a,
- 0x66, 0x69, 0x40, 0x35,
- 0x40, 0x21, 0xc0, 0x0b,
- 0xc0, 0x2d, 0x69, 0xd1,
- 0x69, 0xd5, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2d,
- 0x60, 0x08, 0x43, 0x06,
- 0x40, 0x11, 0x89, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x71, 0x40, 0x21,
- 0x00, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x40, 0x15, 0xd6, 0x17,
- 0xc0, 0x0b, 0x66, 0x91,
- 0x6d, 0x51, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x95,
- 0x69, 0xd1, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x2d,
- 0x03, 0x11, 0x84, 0xd5,
- 0x40, 0x11, 0x81, 0x21,
- 0xc0, 0x2d, 0x6a, 0x75,
- 0x65, 0xf5, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x99,
- 0x65, 0xf9, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0xa1,
- 0x66, 0xb1, 0x40, 0x25,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0x68, 0x15, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x2d,
- 0x6a, 0x75, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x65, 0xfd,
- 0x66, 0x99, 0x40, 0x15,
- 0x02, 0x00, 0x40, 0x0b,
- 0xc0, 0xb6, 0x66, 0xc1,
- 0x68, 0x15, 0x00, 0x39,
- 0x87, 0x2d, 0xc0, 0x2d,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x78, 0xa8, 0x02, 0x35,
- 0x02, 0x45, 0x82, 0x21,
- 0x00, 0x55, 0xf8, 0x98,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x42, 0x45, 0x86, 0x43,
- 0x02, 0x35, 0xf8, 0x10,
- 0xc2, 0x37, 0xf8, 0x10,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x66, 0x69,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x42, 0x35, 0xc3, 0x37,
- 0x02, 0x35, 0xf8, 0x10,
- 0x02, 0x45, 0xf8, 0x88,
- 0x00, 0x55, 0xf8, 0x78,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x84, 0x4e, 0x86, 0x43,
- 0xc2, 0x37, 0x84, 0x34,
- 0x84, 0x34, 0x84, 0x3e,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x65, 0x51,
- 0xe0, 0x92, 0x46, 0x3a,
- 0x84, 0x34, 0x84, 0x3e,
- 0xc5, 0x3e, 0x83, 0x37,
- 0xc1, 0xc3, 0xf7, 0x85,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x69, 0x45,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x22, 0x65, 0x49,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x1b, 0x65, 0x69,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x28, 0x02, 0x25,
- 0xe0, 0x2c, 0x02, 0x15,
- 0x69, 0x5d, 0x40, 0x25,
- 0x45, 0xf6, 0x40, 0x08,
- 0x40, 0x15, 0xe0, 0x2c,
- 0xc0, 0x08, 0x69, 0x61,
- 0x62, 0xc9, 0x40, 0x23,
- 0xdd, 0x93, 0xc0, 0x11,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x80, 0x8b, 0x04, 0x6b,
- 0x60, 0x88, 0x00, 0x64,
- 0x52, 0x82, 0x82, 0x7b,
- 0x43, 0x36, 0x70, 0x80,
- 0x50, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0x81, 0x00, 0x90,
- 0x02, 0x70, 0xc0, 0x6d,
- 0x89, 0x21, 0x64, 0xa0,
- 0x68, 0x10, 0x64, 0x88,
- 0x00, 0x90, 0x81, 0x31,
- 0x40, 0x6d, 0x67, 0x81,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x81, 0x31, 0x09, 0x21,
- 0xe8, 0x10, 0x63, 0xe8,
- 0x60, 0x18, 0x41, 0x06,
- 0xe4, 0xc0, 0x02, 0x70,
- 0x66, 0x82, 0x40, 0x6a,
- 0xe0, 0x24, 0x04, 0x06,
- 0x80, 0x83, 0x85, 0x31,
- 0x65, 0x01, 0x00, 0x80,
- 0x0c, 0x0c, 0xc0, 0x6e,
- 0x22, 0xd8, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6c, 0xfd, 0x0e, 0x39,
- 0x43, 0xf6, 0x40, 0x2c,
- 0x6e, 0xb8, 0xe0, 0x0c,
- 0x85, 0x21, 0x6f, 0xfc,
- 0x6f, 0xfc, 0x70, 0xc8,
- 0x67, 0xf8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xa6,
- 0x65, 0xe0, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x70, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x60,
- 0x62, 0x18, 0x8c, 0x3b,
- 0x00, 0x8b, 0xef, 0x94,
- 0xe0, 0x08, 0x41, 0x26,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x00, 0x70, 0x40, 0x2b,
- 0xc0, 0x89, 0x65, 0xa1,
- 0x64, 0xc0, 0x02, 0x60,
- 0xe0, 0x24, 0x04, 0x06,
- 0x68, 0x10, 0x5f, 0x88,
- 0x90, 0x0b, 0x85, 0x31,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x86, 0x6b, 0x00, 0x8b,
- 0x70, 0x88, 0x52, 0x82,
- 0x12, 0x19, 0x82, 0x7b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x39, 0x83, 0x21,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xef, 0xfc, 0x6a, 0xc8,
- 0x6f, 0xfc, 0x6c, 0xe8,
- 0x12, 0x19, 0x90, 0x0b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x65, 0xd8, 0x90, 0x0b,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xb6,
- 0x65, 0xe0, 0x02, 0x80,
- 0x50, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x80, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x70,
- 0x5d, 0xf8, 0x8e, 0x3b,
- 0x12, 0x29, 0xef, 0x94,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x0b, 0x80, 0x6b,
- 0x76, 0x18, 0x8e, 0x1b,
- 0x8c, 0x0b, 0xef, 0xfc,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x03, 0x06,
- 0x05, 0x46, 0x00, 0x04,
- 0x07, 0x86, 0xe1, 0x30,
- 0x09, 0xc6, 0x61, 0x30,
- 0x4a, 0x06, 0xe1, 0x30,
- 0x58, 0x46, 0x61, 0x30,
- 0x80, 0x04, 0xe1, 0x30,
- 0x84, 0x14, 0x84, 0x14,
- 0x00, 0x13, 0x88, 0x24,
- 0xe1, 0x30, 0x40, 0x86,
- 0x8c, 0x34, 0x88, 0x24,
- 0x8c, 0x34, 0x84, 0x13,
- 0x86, 0x13, 0x90, 0x44,
- 0x94, 0x54, 0x90, 0x44,
- 0x94, 0x54, 0x88, 0x13,
- 0x8a, 0x13, 0xb0, 0xc4,
- 0x80, 0x04, 0xb0, 0xc4,
- 0x80, 0x04, 0x98, 0x13,
- 0x82, 0x03, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe1, 0x24, 0x45, 0x46,
- 0x6e, 0x09, 0x0c, 0x15,
- 0x80, 0x08, 0xc0, 0x09,
- 0xc5, 0x07, 0x88, 0x24,
- 0x44, 0x00, 0x08, 0x34,
- 0x4d, 0xb8, 0xf0, 0x0c,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2c,
- 0x64, 0xb5, 0x4c, 0x05,
- 0x4c, 0x21, 0xc0, 0x05,
- 0xc0, 0x15, 0x62, 0xe1,
- 0x62, 0xe9, 0x4c, 0x21,
- 0x4c, 0x11, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x5d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x7d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x08, 0x69, 0x45,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4e, 0x68,
- 0x65, 0x49, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4c, 0xe8,
- 0x6d, 0x01, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x5d, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x1b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0xc6, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x34,
- 0x80, 0x04, 0x8b, 0x31,
- 0x65, 0x49, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x22,
- 0xc0, 0x22, 0x65, 0x59,
- 0x69, 0x5d, 0x4c, 0x05,
- 0x59, 0xf8, 0xc0, 0x08,
- 0x4c, 0x05, 0xef, 0xc0,
- 0x40, 0x08, 0x69, 0x61,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x65, 0x91, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x68, 0x20, 0x6d, 0xc8,
- 0x42, 0x78, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x81, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x6d,
- 0xc0, 0x20, 0x63, 0x41,
- 0x60, 0x04, 0x04, 0x06,
- 0x4f, 0x18, 0x81, 0x31,
- 0x0e, 0x60, 0xe8, 0x10,
- 0x40, 0x6d, 0x67, 0x81,
- 0x81, 0xf5, 0xa1, 0x81,
- 0x78, 0x40, 0x0e, 0x05,
- 0x0c, 0x29, 0x8b, 0x31,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x79, 0x0c, 0x19,
- 0x57, 0x18, 0xc0, 0x1b,
- 0x5d, 0x0e, 0xef, 0xc0,
- 0xec, 0x04, 0x10, 0x80,
- 0xfc, 0x35, 0xa1, 0x8b,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x45, 0xb8, 0xe0, 0x04,
- 0x0e, 0x60, 0xe8, 0x20,
- 0x40, 0x6e, 0x64, 0x81,
- 0x01, 0x95, 0xa1, 0x81,
- 0x5d, 0x18, 0x8c, 0x9b,
- 0x5e, 0x78, 0x8c, 0x0b,
- 0x65, 0x0e, 0xef, 0xd4,
- 0xec, 0x04, 0x10, 0x80,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x65, 0x81, 0x00, 0x60,
- 0x04, 0x06, 0x40, 0x6d,
- 0x01, 0x31, 0xe0, 0x04,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x0b, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0xa1, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x89,
- 0xc0, 0x20, 0x63, 0x1d,
- 0x60, 0x24, 0x04, 0x06,
- 0x0a, 0xb8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0x01, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x6e,
- 0xc0, 0x20, 0x61, 0x01,
- 0x62, 0x40, 0x04, 0x06,
- 0x09, 0xf8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0x6d, 0x91, 0x1e, 0xf0,
- 0x00, 0x6b, 0xc0, 0x04,
- 0xe1, 0x30, 0x41, 0x46,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x42, 0xc6, 0x40, 0x22,
- 0x0c, 0x39, 0xe1, 0x30,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x4c, 0x41, 0x85, 0x41,
- 0x40, 0x22, 0x6c, 0x69,
- 0x00, 0x04, 0x81, 0x71,
- 0x4c, 0x21, 0x82, 0x21,
- 0x40, 0x22, 0x6c, 0x6d,
- 0x4c, 0x31, 0x82, 0x31,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x64, 0xd1, 0x04, 0xf0,
- 0x04, 0x14, 0xc0, 0x02,
- 0xe4, 0x10, 0x06, 0xf0,
- 0x95, 0x51, 0x1d, 0x41,
- 0x81, 0x81, 0x01, 0xc1,
- 0x12, 0xc4, 0x83, 0x65,
- 0x82, 0xc1, 0x7a, 0x80,
- 0xe1, 0x12, 0x52, 0x9a,
- 0x66, 0x96, 0x54, 0x9a,
- 0x12, 0x0c, 0xbb, 0x9b,
- 0x10, 0xa3, 0xe2, 0x00,
- 0x14, 0xa4, 0x92, 0x83,
- 0xc4, 0xa7, 0xfa, 0x80,
- 0xfc, 0x28, 0x00, 0xb5,
- 0x02, 0xa5, 0xc9, 0xbe,
- 0xcd, 0xae, 0xfc, 0x28,
- 0xe2, 0x30, 0x18, 0x0a,
- 0x00, 0x60, 0xfa, 0x35,
- 0x40, 0x90, 0x65, 0x81,
- 0x64, 0xd1, 0x02, 0xf0,
- 0x45, 0x06, 0xc0, 0x02,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x45, 0x28,
- 0x66, 0x41, 0x00, 0x60,
- 0x02, 0xf0, 0x40, 0x92,
- 0x45, 0x06, 0xe4, 0x10,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x44, 0x88,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x02, 0x46,
- 0x04, 0xc6, 0x00, 0x04,
- 0x04, 0x14, 0xe1, 0x38,
- 0x66, 0x31, 0x06, 0x60,
- 0x08, 0x24, 0xc0, 0x8b,
- 0x83, 0x65, 0x81, 0x41,
- 0x70, 0x0c, 0x4a, 0x40,
- 0x18, 0x54, 0x82, 0x41,
- 0xa7, 0x5b, 0x60, 0x84,
- 0x62, 0x00, 0x0a, 0x0c,
- 0x18, 0xc4, 0x8e, 0xc3,
- 0x8a, 0x73, 0x7a, 0x80,
- 0xc4, 0xc7, 0x08, 0xce,
- 0xfc, 0x30, 0x00, 0x65,
- 0xf8, 0x20, 0x46, 0x65,
- 0xfc, 0x30, 0x02, 0xc5,
- 0xb1, 0x4b, 0xcd, 0xce,
- 0x1e, 0xf0, 0xfa, 0x55,
- 0xc0, 0x04, 0x65, 0x91,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6c, 0xad, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6f, 0xfd, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0xf5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xe8, 0x72, 0x88,
- 0x81, 0x61, 0x81, 0x11,
- 0x00, 0x06, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x10,
- 0xe0, 0x04, 0x43, 0x16,
- 0x6c, 0x1d, 0x50, 0x11,
- 0x83, 0x91, 0x40, 0x2b,
- 0x00, 0x46, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x7c, 0x98, 0x80, 0x16,
- 0x7c, 0xf8, 0xef, 0xf8,
- 0x90, 0x0b, 0x6f, 0xf8,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x0c, 0x86, 0x40, 0x2b,
- 0x02, 0x86, 0xe0, 0x08,
- 0x90, 0x0b, 0x60, 0x08,
- 0xef, 0xd4, 0x67, 0xa8,
- 0x0b, 0x45, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xef, 0xd8, 0x6e, 0x88,
- 0x6f, 0xf8, 0x74, 0x08,
- 0x45, 0x58, 0x90, 0x0b,
- 0x90, 0x0b, 0x68, 0x00,
- 0x61, 0x14, 0x41, 0x06,
- 0xe0, 0x04, 0x45, 0x66,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe1, 0x04, 0x40, 0x86,
- 0x43, 0x56, 0x00, 0x04,
- 0x00, 0x96, 0xe0, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x50, 0x11, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x18,
- 0x01, 0x06, 0x00, 0x96,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x5d,
- 0x50, 0x21, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x40, 0x86,
- 0x6e, 0x61, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x40, 0x46, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x08,
- 0xc0, 0x2c, 0x6e, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x44, 0x41, 0x86,
- 0x6e, 0x59, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x41, 0x76, 0x00, 0x16,
- 0x50, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xfc, 0x41, 0xf6,
- 0x68, 0x00, 0x49, 0x08,
- 0x03, 0x11, 0x81, 0x11,
- 0x6a, 0x58, 0x8e, 0x0b,
- 0x8c, 0x0b, 0xef, 0xe8,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x81, 0x00, 0x29,
- 0x03, 0x46, 0x40, 0x2c,
- 0x84, 0x14, 0xe1, 0x10,
- 0x03, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x42, 0xc6,
- 0x6e, 0x89, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x42, 0x06, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x05, 0xc6,
- 0x6b, 0xad, 0x00, 0x19,
- 0x88, 0x24, 0xc0, 0x2b,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x43, 0xc6, 0x08, 0x16,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0xa1,
- 0x84, 0x26, 0x84, 0x14,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x0e, 0xa5, 0x00, 0x29,
- 0x02, 0x46, 0x40, 0x2c,
- 0x02, 0x15, 0xc1, 0x14,
- 0x04, 0x16, 0xc0, 0x00,
- 0x43, 0x06, 0x80, 0x00,
- 0x02, 0x15, 0x81, 0x10,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x14, 0x02, 0x06,
- 0x6e, 0x55, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x02, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x14,
- 0xc0, 0x2c, 0x6e, 0x8d,
- 0x84, 0x26, 0x84, 0x14,
- 0x6e, 0xa9, 0x00, 0x19,
- 0x21, 0x1b, 0xc0, 0x2c,
- 0xe1, 0x10, 0x43, 0x86,
- 0x84, 0x25, 0x84, 0x24,
- 0x08, 0x16, 0x81, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x03, 0x06, 0x84, 0xe5,
- 0x83, 0x21, 0x61, 0x10,
- 0x83, 0x75, 0x84, 0x14,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x41, 0x10, 0x03, 0x06,
- 0xc0, 0x00, 0x04, 0x06,
- 0xc0, 0x00, 0x02, 0x15,
- 0x05, 0x06, 0x80, 0xd5,
- 0x88, 0x24, 0xe1, 0x14,
- 0x81, 0x25, 0x88, 0x16,
- 0x00, 0x09, 0x84, 0x26,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xe1, 0x10, 0x02, 0x46,
- 0x84, 0x06, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x1c, 0x04, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x14, 0x43, 0x86,
- 0x84, 0x0c, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x14, 0xe1, 0x18,
- 0xe0, 0x08, 0x04, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x21,
- 0x81, 0x21, 0x40, 0x2b,
- 0x11, 0xc6, 0x03, 0x71,
- 0x04, 0x26, 0xe1, 0x24,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x04, 0x26, 0x84, 0x14,
- 0x80, 0x04, 0x85, 0x11,
- 0xa0, 0x04, 0x80, 0x76,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x18, 0x52, 0x48,
- 0x02, 0x76, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x80, 0x76,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x04, 0x3b,
- 0x86, 0x1b, 0x01, 0x21,
- 0x68, 0x18, 0x6c, 0x48,
- 0x00, 0x06, 0x81, 0x61,
- 0x43, 0x46, 0x61, 0x28,
- 0x00, 0x04, 0xe1, 0x2c,
- 0xe1, 0x44, 0x04, 0xc6,
- 0x81, 0x31, 0x04, 0x14,
- 0x80, 0xc8, 0x88, 0x24,
- 0x84, 0x48, 0x84, 0x58,
- 0x50, 0x0a, 0x88, 0x88,
- 0x04, 0x05, 0xe0, 0x8c,
- 0x80, 0x08, 0x0d, 0x56,
- 0xc7, 0x57, 0x45, 0xc7,
- 0xc4, 0x47, 0x02, 0xc9,
- 0xa6, 0xcf, 0x04, 0x59,
- 0xaa, 0xcf, 0x08, 0x49,
- 0x46, 0xc2, 0xa8, 0xcf,
- 0x87, 0x7b, 0xf8, 0x1c,
- 0x70, 0xf8, 0xfa, 0x75,
- 0x8c, 0x0b, 0xe8, 0x18,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x02, 0x86, 0x02, 0x2b,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xf9, 0x95, 0x8f, 0x11,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x79, 0x98, 0x82, 0x6b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x00, 0x86,
- 0x4e, 0x01, 0x8f, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x2b, 0x8e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0x25,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x61, 0x38, 0x11, 0x46,
- 0x20, 0x04, 0x80, 0x6b,
- 0x70, 0x01, 0x02, 0x56,
- 0x0e, 0x86, 0xf7, 0xab,
- 0x12, 0x46, 0x61, 0x3c,
- 0x03, 0x21, 0xe1, 0x14,
- 0x80, 0x1e, 0x8b, 0xa1,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x89, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x66, 0x18, 0x8b, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x14, 0x16, 0xc6,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x0a,
- 0xa6, 0x05, 0x99, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa3, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0xa4, 0x65,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9b, 0x01, 0x60, 0x84,
- 0xa5, 0x1b, 0xa2, 0x65,
- 0x0b, 0x11, 0xa2, 0x25,
- 0x64, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x9e, 0x85, 0x9f, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa7, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x9c, 0xe5,
- 0x83, 0x21, 0x8b, 0x11,
- 0x8c, 0x0b, 0x00, 0xa6,
- 0xe8, 0x18, 0x63, 0x08,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x4a,
- 0x9a, 0x45, 0xa1, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa9, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x98, 0xa5,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x0a, 0x80, 0x08,
- 0xa3, 0x01, 0x60, 0x84,
- 0x2b, 0x1b, 0x96, 0xa5,
- 0xe1, 0x00, 0x15, 0xc6,
- 0x0b, 0x11, 0x96, 0x25,
- 0x61, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x92, 0x85, 0xa5, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xaf, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x90, 0xe5,
- 0x83, 0x21, 0x85, 0x11,
- 0x8b, 0x11, 0x00, 0x16,
- 0x68, 0x18, 0x60, 0x08,
- 0xac, 0x04, 0x8c, 0x0b,
- 0x40, 0x4a, 0x80, 0x08,
- 0xa7, 0x01, 0x60, 0x80,
- 0x0c, 0x15, 0x8e, 0x25,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x10, 0x44, 0x46,
- 0x8c, 0x45, 0xb1, 0x1b,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x84, 0x40, 0x0a,
- 0x8a, 0x85, 0xa9, 0x01,
- 0x8a, 0x45, 0xb3, 0x1b,
- 0x61, 0x00, 0x41, 0x06,
- 0x80, 0x04, 0x85, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9d, 0x01, 0x60, 0x90,
- 0x0c, 0x15, 0x86, 0xe5,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x86, 0x45, 0xad, 0x1b,
- 0x81, 0xb1, 0x24, 0x04,
- 0x83, 0x21, 0x0b, 0x11,
- 0xe1, 0x10, 0x54, 0x46,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x10,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xe8, 0x18, 0x5c, 0xc8,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x80, 0xc5, 0x97, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xb5, 0x1b, 0xc0, 0x0b,
- 0x20, 0x14, 0x82, 0x95,
- 0x70, 0x01, 0x04, 0x76,
- 0x06, 0x04, 0xf7, 0xab,
- 0x80, 0xbb, 0x7a, 0x80,
- 0x4c, 0x35, 0x84, 0x2e,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x61, 0x10, 0x41, 0x06,
- 0x00, 0x04, 0x83, 0x11,
- 0x00, 0x16, 0x83, 0x21,
- 0xe1, 0x00, 0x41, 0x06,
- 0x81, 0x11, 0x00, 0x04,
- 0x91, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x5a, 0x58, 0x8d, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x02, 0x66, 0x20, 0x04,
- 0xf7, 0xab, 0x70, 0x01,
- 0x9c, 0x04, 0x80, 0x1e,
- 0xc4, 0x19, 0x80, 0x18,
- 0x9c, 0x14, 0x80, 0x16,
- 0x44, 0x00, 0x84, 0x08,
- 0x00, 0xb4, 0x7c, 0x40,
- 0x84, 0x26, 0xfa, 0x80,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x61, 0x38, 0x53, 0x06,
- 0x24, 0x04, 0x80, 0x6b,
- 0xe0, 0x04, 0x02, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x54, 0xc6, 0x40, 0x2b,
- 0x51, 0x06, 0xe1, 0x38,
- 0x80, 0x18, 0xe1, 0x34,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x04, 0x02, 0x16,
- 0x4c, 0x11, 0xa0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x18, 0x7b, 0x68,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x0a, 0x82, 0x45,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x6d, 0x21, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0x25, 0xe0, 0x88,
- 0x61, 0x38, 0x00, 0x46,
- 0x80, 0x04, 0x89, 0x11,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf8, 0x1c, 0x00, 0x4a,
- 0x01, 0x75, 0x80, 0x95,
- 0xe9, 0x9c, 0x4e, 0x0a,
- 0x6d, 0x11, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0x20, 0x01, 0x02, 0x58,
- 0x40, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe9, 0x9c,
- 0x86, 0xc5, 0xe9, 0x9c,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x0c, 0x09, 0x88, 0x65,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x86, 0xd5, 0xa1, 0x0b,
- 0x02, 0x26, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x10, 0x16, 0x46,
- 0xa3, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x64, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xac, 0x14, 0x80, 0x7b,
- 0xa1, 0x7b, 0x84, 0x06,
- 0x00, 0x06, 0x80, 0xe5,
- 0x87, 0x11, 0x61, 0x38,
- 0x80, 0x1c, 0x80, 0x04,
- 0x40, 0x46, 0x9b, 0x95,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x04, 0x87, 0x11,
- 0x0c, 0x09, 0x80, 0x1c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8e, 0x75,
- 0xc0, 0x2c, 0x6d, 0x11,
- 0x28, 0xc5, 0xa1, 0x0b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x02, 0x66, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xa1, 0x21, 0xa1, 0xb1,
- 0x00, 0x60, 0x00, 0x16,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x41, 0x38, 0xe4, 0x10,
- 0xec, 0x04, 0x04, 0x20,
- 0xa1, 0x2b, 0xc5, 0x36,
- 0x65, 0x38, 0xfe, 0x75,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x43, 0x28,
- 0x00, 0x60, 0x00, 0x7b,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x45, 0x28, 0xe4, 0x10,
- 0xec, 0x04, 0x16, 0xb0,
- 0xa1, 0xbb, 0xc1, 0x26,
- 0x0c, 0x09, 0xfe, 0x75,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x9c, 0xd5, 0xa5, 0x0b,
- 0x68, 0x00, 0x74, 0x48,
- 0x0f, 0x25, 0x8c, 0x0b,
- 0x20, 0x04, 0x80, 0x7b,
- 0xe0, 0x04, 0x02, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x85, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x28,
- 0x80, 0x7b, 0x8c, 0x1b,
- 0x8c, 0x05, 0xa1, 0x7b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x14, 0x89, 0x21,
- 0x03, 0x36, 0x04, 0x2c,
- 0x00, 0x04, 0xe0, 0x08,
- 0x4c, 0x11, 0x8b, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8b, 0x05, 0x80, 0x2c,
- 0x02, 0x36, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0x16, 0x83, 0x11,
- 0x44, 0x58, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x1c,
- 0x40, 0x2d, 0x67, 0xc9,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x70, 0x98, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x00, 0x06, 0x80, 0x7b,
- 0xa1, 0x7b, 0x61, 0x38,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x15, 0x80, 0x1c,
- 0x6b, 0x18, 0xef, 0x95,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x82, 0x75, 0xe0, 0x80,
- 0x6f, 0xf8, 0x75, 0xa8,
- 0x6b, 0x58, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6e, 0x88,
- 0x81, 0x85, 0x8c, 0x0b,
- 0x6f, 0xf8, 0x57, 0xc8,
- 0x0c, 0x0b, 0x8c, 0x0b,
- 0x59, 0x38, 0x8c, 0x1b,
- 0x16, 0x06, 0xef, 0xf8,
- 0x89, 0x11, 0x61, 0x38,
- 0x00, 0x1c, 0xac, 0x04,
- 0xe0, 0x08, 0x01, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xef, 0xf0, 0x52, 0x48,
- 0x80, 0x7b, 0x2c, 0x04,
- 0x8b, 0x11, 0x21, 0x7b,
- 0x11, 0xe8, 0x80, 0x1c,
- 0x28, 0x04, 0x80, 0x00,
- 0x80, 0x18, 0xa1, 0x7b,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x92, 0xc5, 0x80, 0x16,
- 0xa1, 0x7b, 0x24, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x8a, 0x95, 0x80, 0x16,
- 0x6f, 0xf8, 0x63, 0xc8,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0xb6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0xef, 0xfc, 0x51, 0xe8,
- 0x61, 0x3c, 0x10, 0x86,
- 0x20, 0x04, 0x83, 0x91,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0x40, 0x18, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0x10, 0x41, 0x46,
- 0x80, 0x14, 0x81, 0x21,
- 0x80, 0x04, 0x84, 0x26,
- 0xa0, 0x04, 0x80, 0x96,
- 0xe0, 0x19, 0x80, 0x18,
- 0x00, 0x06, 0x80, 0x16,
- 0x42, 0xe6, 0x61, 0x38,
- 0x00, 0x04, 0xe0, 0x00,
- 0x00, 0x1c, 0xa8, 0xf1,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0x09, 0xdd, 0x93,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x88, 0x40, 0x0a,
- 0x0c, 0x19, 0x8c, 0x25,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x20, 0x04, 0x8a, 0x65,
- 0xe0, 0x04, 0x02, 0x76,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x7b, 0xa8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x81, 0x71, 0x40, 0x2d,
- 0x80, 0xb5, 0xa7, 0x0b,
- 0x68, 0x00, 0x65, 0x28,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6f, 0xfc, 0x4c, 0x68,
- 0x77, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe0, 0x35, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x86, 0x45, 0xe0, 0x8c,
- 0x02, 0x86, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x79, 0xc8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2d,
- 0x80, 0xb5, 0xa9, 0x0b,
- 0x68, 0x00, 0x62, 0xa8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xd8, 0xb5, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x90,
- 0x6f, 0xd4, 0x6f, 0x48,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0x96,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0x7b, 0xf8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xc4,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x60, 0x88, 0x40, 0x0a,
- 0xd2, 0x65, 0x81, 0x71,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0xd0, 0xa5, 0xe0, 0x88,
- 0x02, 0xa6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x70, 0xf8, 0x84, 0x25,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x70, 0x48,
- 0x6f, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6f, 0x68,
- 0x79, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x4d, 0xd8, 0x83, 0x35,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x6f, 0xf8, 0x62, 0x88,
- 0x01, 0x95, 0x8c, 0x0b,
- 0x01, 0x31, 0x81, 0x01,
- 0x0c, 0x1b, 0x8c, 0x0b,
- 0x50, 0x58, 0x8e, 0x2b,
- 0x82, 0x71, 0xef, 0xf8,
- 0xe0, 0x40, 0x0e, 0x0a,
- 0x21, 0x0b, 0xfc, 0xf5,
- 0x31, 0x38, 0x80, 0x7b,
- 0x7c, 0x38, 0xdf, 0xfc,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x81, 0x71, 0x40, 0x16,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x9f, 0xfc, 0x30, 0x88,
- 0x6f, 0xf8, 0x58, 0x28,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x62, 0xf8, 0x8e, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x59, 0x68,
- 0x5c, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x0c, 0x09, 0x87, 0x65,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x15, 0xa3, 0x0b,
- 0x68, 0x00, 0x5a, 0xe8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x2d, 0xa8, 0xa1, 0x7b,
- 0x20, 0x04, 0xdf, 0xfc,
- 0xe0, 0x04, 0x02, 0x56,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0x6c, 0x81, 0x0c, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xc5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xff, 0xfc, 0x21, 0x58,
- 0x40, 0xc6, 0xa1, 0x0b,
- 0x02, 0x06, 0x01, 0x04,
- 0x00, 0x05, 0x80, 0x00,
- 0x40, 0x11, 0x80, 0x00,
- 0x20, 0xa8, 0x80, 0x00,
- 0x42, 0x18, 0xff, 0xfc,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x43, 0xb6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x83, 0x11, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x48,
- 0x57, 0x35, 0x8c, 0x0b,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x04, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x38, 0x63, 0x15,
- 0x0c, 0x19, 0xa5, 0x0b,
- 0x40, 0x2c, 0x0e, 0x99,
- 0xc1, 0x14, 0x01, 0x06,
- 0xc0, 0x00, 0x00, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x81, 0x10, 0x01, 0x06,
- 0x80, 0x00, 0x00, 0x05,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x14,
- 0xe0, 0x19, 0x80, 0x18,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0xc2, 0x19, 0x80, 0x18,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xef, 0xe4, 0x5a, 0x48,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x50, 0x86, 0x3c, 0x0e,
- 0x03, 0x91, 0xe1, 0x24,
- 0xe1, 0x24, 0x4e, 0x46,
- 0x61, 0x24, 0x54, 0xc6,
- 0xa1, 0x85, 0x81, 0x01,
- 0x00, 0x06, 0x7c, 0x0e,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xd4, 0x59, 0x88,
- 0x60, 0x08, 0x00, 0x16,
- 0xe0, 0x10, 0x42, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x14, 0x69, 0x08,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x80, 0x04, 0xe1, 0x44,
- 0x81, 0x65, 0x80, 0xb8,
- 0xef, 0xd4, 0x59, 0x68,
- 0x63, 0x29, 0x4c, 0x91,
- 0xa0, 0x04, 0xc0, 0x38,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfa, 0xe5, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x45, 0xfa, 0x55,
- 0xe8, 0x14, 0x6d, 0xe8,
- 0x80, 0x08, 0xa0, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0xef, 0xd4, 0x57, 0x28,
- 0x63, 0x29, 0x4c, 0x91,
- 0x55, 0xf8, 0xc0, 0x38,
- 0x55, 0xb8, 0xef, 0xc0,
- 0x00, 0x26, 0xef, 0xd4,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x55, 0x98, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x6a, 0x68,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x82, 0x85, 0xa1, 0x0b,
- 0xef, 0xd4, 0x53, 0xa8,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xd0, 0x19,
- 0x63, 0x29, 0x4c, 0x91,
- 0x00, 0x86, 0xc0, 0x38,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x51, 0xb8, 0x80, 0x16,
- 0x0c, 0x09, 0xef, 0xc0,
- 0xc0, 0x2c, 0x6e, 0xa9,
- 0x01, 0x06, 0xa3, 0x0b,
- 0x00, 0x05, 0x81, 0x10,
- 0x40, 0x91, 0x80, 0x00,
- 0x9e, 0x25, 0x80, 0x00,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x50, 0x58, 0x9a, 0xa5,
- 0x00, 0x36, 0xef, 0xd4,
- 0x42, 0x26, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0xd8, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x50, 0x38, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x65, 0x08,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x92, 0x25, 0xa1, 0x0b,
- 0xe9, 0x0d, 0xfc, 0x04,
- 0x4d, 0x38, 0x90, 0x25,
- 0x00, 0xc6, 0xef, 0xc0,
- 0x57, 0x46, 0x61, 0x10,
- 0x00, 0x04, 0xe1, 0x10,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x81, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x5c, 0x38, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x43, 0x46, 0x2c, 0x04,
- 0x04, 0x86, 0xe1, 0x10,
- 0x00, 0x96, 0xe1, 0x3c,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x02, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xfc, 0x04, 0xbe, 0x0e,
- 0xe8, 0x0d, 0x82, 0x01,
- 0x9f, 0xfc, 0x2f, 0x88,
- 0xbc, 0x0e, 0xbe, 0x04,
- 0x4a, 0x18, 0x81, 0x85,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0xef, 0xc0, 0x48, 0xe8,
- 0x63, 0x15, 0x0c, 0x09,
- 0x4f, 0x06, 0x40, 0x38,
- 0xa5, 0x0b, 0xe1, 0x14,
- 0x70, 0xb8, 0x82, 0x15,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x4c, 0x01, 0xbc, 0x0e,
- 0xc0, 0x38, 0x63, 0x29,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xe0, 0x19,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x3c, 0x04, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x08, 0x09, 0x80, 0x4b,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0x08, 0x0b, 0x96, 0xd5,
- 0x40, 0x16, 0x6b, 0xe1,
- 0x66, 0x81, 0x12, 0x40,
- 0x14, 0x40, 0xc0, 0xb5,
- 0x40, 0xb5, 0x65, 0x41,
- 0xbc, 0x4e, 0x81, 0x71,
- 0x73, 0xf1, 0x40, 0x00,
- 0x88, 0x03, 0xc0, 0xff,
- 0x64, 0x01, 0x10, 0x00,
- 0x00, 0x40, 0x40, 0x28,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x00, 0x40, 0x7c, 0x0e,
- 0xc0, 0x9c, 0x67, 0x41,
- 0x87, 0xb5, 0xbe, 0x0e,
- 0x7c, 0x04, 0xa8, 0x0a,
- 0x73, 0xf1, 0x4c, 0x00,
- 0x28, 0xba, 0xc0, 0xff,
- 0x81, 0x6b, 0x88, 0x63,
- 0x6d, 0x98, 0x80, 0xf5,
- 0x88, 0x0b, 0x68, 0x10,
- 0xa1, 0x0b, 0x3c, 0x44,
- 0xbe, 0x04, 0x8c, 0x15,
- 0x80, 0xf5, 0x81, 0x6b,
- 0x68, 0x10, 0x6b, 0x28,
- 0x3c, 0x44, 0x88, 0x0b,
- 0x88, 0xf5, 0xa1, 0x0b,
- 0xa1, 0x0b, 0xa4, 0x0a,
- 0x24, 0x0a, 0x86, 0xa5,
- 0xa4, 0x1a, 0xe0, 0xb7,
- 0x21, 0x0b, 0x9e, 0x09,
- 0x73, 0xc1, 0x44, 0x10,
- 0x20, 0xbf, 0xc0, 0xff,
- 0x00, 0x16, 0xc9, 0x17,
- 0xa4, 0xbf, 0x00, 0x00,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x45, 0x07, 0xe1, 0xbe,
- 0x01, 0x65, 0x90, 0x2b,
- 0x59, 0x34, 0x80, 0x1b,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc9, 0x3e,
- 0xc4, 0x07, 0xfe, 0x75,
- 0x04, 0x91, 0x80, 0x83,
- 0x82, 0x71, 0x84, 0xa1,
- 0xe4, 0x9c, 0x0f, 0x0a,
- 0x81, 0x01, 0xf0, 0x85,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x6c, 0x1d, 0x08, 0x29,
- 0x40, 0x00, 0x40, 0x2b,
- 0x48, 0x01, 0xf3, 0xf4,
- 0x40, 0x2d, 0x67, 0xcd,
- 0xe0, 0x0c, 0x0e, 0x36,
- 0x60, 0x0c, 0x02, 0x36,
- 0x75, 0x38, 0x88, 0x0b,
- 0x23, 0x0b, 0xef, 0xcc,
- 0x0e, 0x06, 0x98, 0xf1,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x40, 0xc6, 0x8a, 0xe5,
- 0x85, 0x31, 0x61, 0x04,
- 0x83, 0x41, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x86,
- 0x63, 0x7d, 0x0c, 0x15,
- 0x79, 0x78, 0xc0, 0x0b,
- 0x82, 0x2b, 0x68, 0x14,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x6f, 0xf8, 0x5e, 0x08,
- 0x48, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x79, 0x41, 0x02, 0x06,
- 0x8c, 0x0b, 0x5d, 0xcd,
- 0xef, 0xf8, 0x62, 0xc8,
- 0x0c, 0x0b, 0x81, 0x55,
- 0x64, 0x38, 0x8e, 0x1b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x46, 0x38, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x14,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x65, 0x3d, 0x4c, 0x01,
- 0x90, 0x0b, 0xc0, 0x22,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x81, 0x00, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xa5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xa1, 0x0b, 0xdd, 0x93,
- 0xda, 0x00, 0x5c, 0x08,
- 0x61, 0x04, 0x40, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6d, 0x39, 0x0e, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x9c, 0xe5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x6d, 0x41, 0x4e, 0x81,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x40, 0x70, 0xe0, 0x80,
- 0x5e, 0x38, 0xdc, 0x00,
- 0x14, 0x06, 0xc8, 0x00,
- 0x91, 0xb1, 0x61, 0x38,
- 0x0e, 0x09, 0x8b, 0xf5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x12, 0x06, 0x04, 0x75,
- 0x02, 0x06, 0xc0, 0x00,
- 0x5d, 0xcd, 0x79, 0x41,
- 0x5d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xd5, 0xef, 0xf8,
- 0x03, 0x31, 0x80, 0x8b,
- 0x0c, 0x1b, 0x8e, 0x0b,
- 0x62, 0x18, 0x92, 0x2b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x12, 0x0a, 0x82, 0x91,
- 0xfc, 0xd5, 0xe0, 0x40,
- 0x6d, 0x41, 0x0e, 0x09,
- 0xa1, 0x0b, 0xc0, 0x2c,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x66,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x40, 0xb3, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x01, 0x11, 0x8a, 0xf5,
- 0x51, 0x78, 0x8e, 0x0b,
- 0x0e, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6d, 0x41,
- 0xa1, 0x0b, 0x80, 0x8b,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x76,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x02, 0x96, 0x00, 0x00,
- 0x40, 0x13, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x0e, 0x1b, 0x82, 0x95,
- 0x40, 0x16, 0x66, 0x35,
- 0x0e, 0x29, 0x8e, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x6f, 0xc8, 0x41, 0x88,
- 0x80, 0x8b, 0x82, 0x19,
- 0x6d, 0x41, 0x0e, 0x09,
- 0x82, 0x01, 0xc0, 0x2c,
- 0x6d, 0x41, 0x4e, 0x01,
- 0x0e, 0x09, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x41,
- 0x6d, 0x11, 0x0e, 0x19,
- 0xc3, 0x0d, 0xc0, 0x2c,
- 0x90, 0x0b, 0xe6, 0x75,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x81, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x63, 0x85, 0x00, 0x25,
- 0x81, 0x41, 0x40, 0x0b,
- 0xe0, 0x14, 0x2c, 0x48,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x60, 0x80, 0x40, 0x0a,
- 0x82, 0x85, 0x81, 0x01,
- 0x68, 0x00, 0x56, 0x88,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x40, 0x60, 0xab, 0x1b,
- 0x68, 0x38, 0x9c, 0x00,
- 0x0c, 0x19, 0x8f, 0xfc,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x62, 0x58, 0x82, 0x85,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x67, 0xc9, 0x0c, 0x19,
- 0xb1, 0x1b, 0xc0, 0x2d,
- 0x9c, 0x00, 0x40, 0x60,
- 0x8f, 0xfc, 0x67, 0x28,
- 0x6d, 0x51, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0xa5, 0xe0, 0x88,
- 0x68, 0x00, 0x56, 0x28,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x80, 0xb5, 0xb3, 0x1b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xcb, 0xf5, 0xf2, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2d, 0x65, 0x35,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0d, 0x11, 0x8c, 0x85,
- 0x79, 0x41, 0x04, 0x06,
- 0x4e, 0xb8, 0xdd, 0xcd,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0x6b, 0xd8, 0xdd, 0x93,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0x6a, 0xad, 0x0c, 0x09,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x1e, 0x79, 0xa3, 0x0b,
- 0x9c, 0x00, 0x40, 0x60,
- 0x08, 0x10, 0x6b, 0xa8,
- 0x9a, 0x80, 0x02, 0x74,
- 0x6d, 0x51, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x8c,
- 0x61, 0x34, 0x41, 0x06,
- 0xe0, 0x08, 0x45, 0xa6,
- 0x02, 0x74, 0x00, 0x04,
- 0x4c, 0x21, 0xfa, 0x80,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x00, 0x4d, 0x68,
- 0xf4, 0xf5, 0xa1, 0x0b,
- 0x04, 0x06, 0x0f, 0x11,
- 0xdd, 0xcd, 0x79, 0x41,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0b, 0x58, 0xf2, 0x84,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xe0, 0x65, 0x68,
- 0x00, 0x7b, 0x81, 0x11,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0xc5,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0x05,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x90, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x88, 0xb5, 0xa1, 0x0b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x4a, 0x78, 0x83, 0x11,
- 0x42, 0x06, 0xef, 0x7c,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x79, 0x48,
- 0x61, 0x38, 0x01, 0x06,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x0c, 0x29, 0x80, 0x04,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x88, 0x44, 0x4a,
- 0xc0, 0x00, 0x40, 0x15,
- 0x42, 0x16, 0xfe, 0x35,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x78, 0x28,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2d,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xe0, 0x61, 0x48,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x80, 0x6b, 0x3e, 0x1e,
- 0x65, 0x0d, 0x0c, 0x09,
- 0x81, 0x11, 0x40, 0x2b,
- 0x81, 0xa1, 0x0b, 0x1e,
- 0x00, 0x2a, 0x91, 0x1c,
- 0x81, 0x01, 0x60, 0x04,
- 0x00, 0x98, 0xfe, 0x0e,
- 0xc0, 0x00, 0x40, 0x01,
- 0x64, 0x50, 0x02, 0xf0,
- 0x77, 0x98, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xc8,
- 0x60, 0x48, 0x02, 0x06,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x00, 0x60, 0xe8, 0x14,
- 0x40, 0x09, 0x64, 0x01,
- 0x61, 0x01, 0x12, 0x06,
- 0x7c, 0x0e, 0xc0, 0x20,
- 0xe6, 0xe4, 0x10, 0x06,
- 0x81, 0x71, 0x09, 0x15,
- 0x6e, 0x19, 0x0c, 0x0b,
- 0x40, 0x0a, 0xc0, 0x15,
- 0x8c, 0x65, 0xe4, 0x9c,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x68, 0x81, 0x00, 0xb9,
- 0x16, 0x0a, 0xc0, 0x1b,
- 0x8a, 0x65, 0xe3, 0xfc,
- 0x40, 0x01, 0x01, 0x78,
- 0xbe, 0x04, 0xc0, 0x00,
- 0x04, 0x06, 0xa1, 0x0b,
- 0x06, 0x16, 0x00, 0x24,
- 0x40, 0x60, 0x80, 0x00,
- 0x42, 0x90, 0x1c, 0x00,
- 0x42, 0x62, 0x9c, 0x00,
- 0x45, 0x06, 0x50, 0xa0,
- 0x06, 0x46, 0xc0, 0x18,
- 0x40, 0x60, 0x40, 0x00,
- 0x68, 0xf8, 0xdc, 0x00,
- 0x0b, 0x34, 0xe8, 0x04,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0x96, 0x4b, 0x7c, 0x24,
- 0xef, 0xc8, 0x75, 0x88,
- 0xa1, 0xab, 0x80, 0xab,
- 0x7e, 0x14, 0x84, 0xb5,
- 0x91, 0x0a, 0x81, 0xa1,
- 0xfb, 0x80, 0x02, 0x14,
- 0xfe, 0x0e, 0x82, 0x03,
- 0x12, 0x90, 0x02, 0x71,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0xc1, 0x10, 0x80,
- 0xfe, 0x7d, 0xc0, 0x01,
- 0xfe, 0x04, 0xf0, 0x05,
- 0x62, 0x99, 0x4c, 0x03,
- 0x14, 0x0b, 0xc0, 0x16,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0xef, 0xec, 0x79, 0x88,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x66, 0x35, 0x0e, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x10, 0x16, 0xe8,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x89, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x04, 0x10, 0x83, 0x41,
- 0x15, 0x38, 0xec, 0x28,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x35, 0xad, 0x0b,
- 0x6f, 0xfc, 0x51, 0xc8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x82, 0xb5,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x70, 0x1c, 0x00, 0x0a,
- 0x80, 0xd5, 0x81, 0x01,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x10, 0xd8, 0xf2, 0x00,
- 0x0c, 0x0c, 0xff, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x8c, 0xc5, 0xe0, 0x90,
- 0x6f, 0xec, 0x55, 0xc8,
- 0x5a, 0xb8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x6f, 0xec, 0x68, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0x40, 0x38, 0x64, 0xb5,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x04, 0x21, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0xe1,
- 0x80, 0x54, 0x07, 0x01,
- 0x07, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0x00, 0x54,
- 0x80, 0x58, 0x06, 0x41,
- 0x8f, 0xd0, 0x42, 0xa8,
- 0x64, 0xb9, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x07, 0x01, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0x54,
- 0x80, 0x54, 0x07, 0x41,
- 0x0f, 0xd0, 0x47, 0x88,
- 0x06, 0x40, 0x04, 0x60,
- 0x0c, 0x09, 0x80, 0x58,
- 0xc0, 0x38, 0x63, 0x21,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x2b, 0xb8, 0xf2, 0x84,
- 0x8e, 0x0b, 0xff, 0xec,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0a, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xef, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x0c, 0x2b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x6c, 0xed, 0x0c, 0x79,
- 0x40, 0x4a, 0x40, 0x2c,
- 0x0c, 0x89, 0xe0, 0x80,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x6c, 0xf1, 0x0c, 0x49,
- 0x42, 0x10, 0x40, 0x2c,
- 0x02, 0x14, 0xdc, 0x20,
- 0x40, 0x0a, 0x1c, 0x0c,
- 0x06, 0x60, 0xe0, 0x90,
- 0xc0, 0xb3, 0x05, 0x31,
- 0x05, 0x35, 0x06, 0x60,
- 0x8c, 0x38, 0x80, 0xb3,
- 0x6d, 0x11, 0x4c, 0x31,
- 0x46, 0x10, 0x40, 0x2c,
- 0x4c, 0x31, 0xfc, 0x10,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x4a, 0x0a, 0x94, 0x58,
- 0x04, 0x24, 0xe0, 0x84,
- 0x04, 0x24, 0xc0, 0x84,
- 0x85, 0x4b, 0xfa, 0x80,
- 0xdc, 0x10, 0x02, 0x34,
- 0x1c, 0x50, 0x42, 0x10,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x6d, 0x15, 0x4c, 0x11,
- 0x40, 0x10, 0x40, 0x2c,
- 0x4c, 0x01, 0x93, 0xf0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x54, 0x78, 0x80, 0x85,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x0c, 0x09, 0xe0, 0x80,
- 0xc0, 0x2c, 0x0d, 0x15,
- 0xd3, 0xf8, 0x40, 0x00,
- 0x0d, 0x15, 0x4c, 0x01,
- 0x10, 0x0a, 0x40, 0x2c,
- 0x84, 0x65, 0xff, 0xfc,
- 0x7a, 0x80, 0x00, 0x84,
- 0xfa, 0x80, 0x02, 0x74,
- 0x0c, 0x09, 0x81, 0x1b,
- 0x00, 0x2c, 0x0d, 0x15,
- 0x80, 0x00, 0x02, 0x06,
- 0x0d, 0x11, 0x4c, 0x11,
- 0x40, 0x00, 0x80, 0x2c,
- 0x4c, 0x01, 0x93, 0xe0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x43, 0x08,
- 0x48, 0x98, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0xef, 0xdc, 0x40, 0x06,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x4f, 0xb8, 0x82, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x68, 0x04, 0x6b, 0x08,
- 0x81, 0x45, 0x8c, 0x0b,
- 0x6f, 0xd4, 0x4e, 0xa8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x57, 0x58, 0x82, 0x55,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x68, 0x00, 0x44, 0xe8,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x21, 0x00, 0x19,
- 0x45, 0xc6, 0x40, 0x2b,
- 0x40, 0x21, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x42, 0x26, 0xa3, 0x1b,
- 0x40, 0x11, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0xa7, 0x1b, 0x8a, 0x45,
- 0xa5, 0x1b, 0x82, 0x05,
- 0x80, 0x00, 0x42, 0x36,
- 0x0c, 0x1d, 0x40, 0x11,
- 0x85, 0x15, 0x80, 0x2b,
- 0xe0, 0x00, 0x42, 0x46,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x02, 0x86, 0x40, 0x2b,
- 0x84, 0x28, 0xef, 0xdc,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xe5,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x80, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xb5,
- 0xf3, 0xdc, 0x44, 0x20,
- 0x00, 0x29, 0x84, 0x26,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x0a,
- 0xc0, 0x00, 0x04, 0x16,
- 0xc0, 0xa0, 0x42, 0x21,
- 0x6e, 0x09, 0x00, 0x1b,
- 0xc4, 0x19, 0xc0, 0x15,
- 0x6e, 0x09, 0x40, 0x13,
- 0x00, 0x86, 0x40, 0x15,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x7b,
- 0x6f, 0xe0, 0x42, 0x68,
- 0x81, 0x81, 0x81, 0x11,
- 0x6c, 0x21, 0x0e, 0x09,
- 0x80, 0x6b, 0x40, 0x2b,
- 0xe0, 0x08, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4e, 0x11,
- 0xa5, 0x0b, 0xc0, 0x2b,
- 0xa7, 0x0b, 0x88, 0x45,
- 0x0e, 0x0b, 0xa2, 0x75,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0x75, 0x40, 0x00,
- 0x00, 0x04, 0xc0, 0xff,
- 0x4e, 0x03, 0xfc, 0x94,
- 0x40, 0x15, 0x6e, 0x09,
- 0x60, 0x98, 0x8e, 0x0b,
- 0x48, 0x38, 0xef, 0xbc,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0xa5, 0x0b, 0x86, 0x05,
- 0x00, 0x86, 0x08, 0xc5,
- 0xa3, 0x0b, 0x8f, 0xdc,
- 0x03, 0xd5, 0x88, 0xf5,
- 0xef, 0xdc, 0x00, 0x86,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x73, 0x71,
- 0xfc, 0x94, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x0c, 0x0c, 0xc0, 0x15,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0xef, 0xdc, 0x00, 0x86,
- 0x42, 0x4a, 0x80, 0x18,
- 0x80, 0xe5, 0xe0, 0x8c,
- 0x6c, 0x15, 0x0e, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x80, 0xa5, 0xe0, 0x84,
- 0x01, 0x55, 0x80, 0x08,
- 0xfc, 0x08, 0x00, 0x04,
- 0xc8, 0x09, 0x80, 0x08,
- 0xef, 0xdc, 0x02, 0x86,
- 0x4f, 0x98, 0x84, 0x06,
- 0x8e, 0x0b, 0x6f, 0xe4,
- 0xef, 0xdc, 0x12, 0x86,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xf5, 0xe0, 0x88,
- 0x8e, 0x0b, 0x3d, 0x11,
- 0xef, 0xe0, 0x52, 0x68,
- 0x68, 0x00, 0x49, 0x68,
- 0x87, 0x25, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x3f, 0x11,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xe0, 0x11, 0xc8,
- 0x6e, 0x09, 0x0e, 0x05,
- 0x02, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x64, 0xcd, 0x0e, 0x15,
- 0x04, 0x04, 0xc0, 0x05,
- 0xd0, 0x17, 0xe1, 0x84,
- 0xc2, 0x0d, 0x84, 0x13,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x02, 0x40, 0x1a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x04, 0x0e, 0x84, 0x14,
- 0x0e, 0x0b, 0x95, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x8e, 0x0b, 0x40, 0x15,
- 0xef, 0xe0, 0x4f, 0x88,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x60, 0x18, 0x83, 0x11,
- 0x47, 0xd8, 0xef, 0x78,
- 0x52, 0x81, 0xef, 0xf0,
- 0x03, 0x11, 0xe0, 0xa0,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x38, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xff, 0xdc,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe0, 0x08, 0x43, 0xe6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x45, 0x46, 0x40, 0x2b,
- 0x0c, 0x15, 0xe1, 0x24,
- 0xc0, 0x09, 0x6e, 0x09,
- 0x88, 0x24, 0x80, 0x08,
- 0x08, 0x34, 0xc5, 0x07,
- 0xf0, 0x0c, 0x44, 0x00,
- 0x68, 0x10, 0x79, 0xa8,
- 0x02, 0x86, 0x8c, 0x0b,
- 0x48, 0x86, 0x6f, 0xdc,
- 0x86, 0x0e, 0xe0, 0x3c,
- 0xc4, 0x24, 0x86, 0x04,
- 0x68, 0xb1, 0x0c, 0x3b,
- 0x48, 0x0a, 0xc0, 0x0a,
- 0x00, 0x0e, 0x66, 0x92,
- 0xc3, 0xd0, 0x64, 0x00,
- 0x60, 0x0e, 0x40, 0x0a,
- 0x88, 0x23, 0xc9, 0x47,
- 0x40, 0x02, 0xc5, 0x0d,
- 0x02, 0x09, 0x91, 0x88,
- 0x40, 0x00, 0xc0, 0x00,
- 0x42, 0x01, 0xdc, 0x04,
- 0x00, 0x06, 0x40, 0x00,
- 0x4c, 0x05, 0xc0, 0x00,
- 0xc0, 0x05, 0x64, 0xcd,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x09, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0x64, 0xcd, 0x00, 0x05,
- 0x42, 0x2a, 0xc0, 0x05,
- 0xd0, 0x07, 0xe0, 0x06,
- 0xe1, 0x84, 0x04, 0x14,
- 0xc0, 0x1d, 0x84, 0x03,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x06, 0x40, 0x0a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x84, 0x0e, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x48, 0x58, 0xb7, 0x11,
- 0x8c, 0x0b, 0x6f, 0xe0,
- 0x64, 0xcd, 0x0c, 0x15,
- 0x02, 0x8a, 0xc0, 0x05,
- 0x80, 0xf5, 0xe5, 0x94,
- 0x8c, 0x0b, 0x01, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0xc8,
- 0x8c, 0x0b, 0x3b, 0x11,
- 0xef, 0xe0, 0x47, 0x48,
- 0x60, 0x04, 0x42, 0x46,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0x08,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0xbc, 0x83, 0xb1,
- 0xe1, 0x94, 0x00, 0x46,
- 0xa1, 0xab, 0x80, 0xa8,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x67, 0x38, 0x8c, 0x0b,
- 0x94, 0x1b, 0x6f, 0xc8,
- 0x0e, 0x08, 0xa1, 0x0b,
- 0x0e, 0x60, 0xc0, 0x00,
- 0x40, 0xb3, 0x64, 0x51,
- 0x60, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xe0,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x02, 0x04, 0xc0, 0x2d,
- 0x42, 0x0a, 0xe1, 0x90,
- 0x82, 0x19, 0x60, 0x80,
- 0x06, 0x31, 0x4c, 0x13,
- 0x40, 0x0a, 0x40, 0x16,
- 0x86, 0x25, 0xe0, 0x84,
- 0x6c, 0x11, 0x0c, 0x19,
- 0x42, 0x4a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0x61, 0x38, 0x03, 0x06,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x40, 0x4a, 0x84, 0x14,
- 0x42, 0x25, 0xe0, 0x88,
- 0x0c, 0x09, 0xc0, 0x00,
- 0xc0, 0x2d, 0x07, 0xcd,
- 0x40, 0x00, 0xfe, 0x35,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x64, 0xd1, 0x00, 0x60,
- 0x10, 0x60, 0x40, 0xb3,
- 0xc0, 0xaf, 0x64, 0x11,
- 0x81, 0xa1, 0x0f, 0x0e,
- 0x81, 0x91, 0x13, 0xa5,
- 0xfb, 0xfc, 0x16, 0x0a,
- 0x13, 0x11, 0xa6, 0x05,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x12, 0x0a, 0xef, 0xe0,
- 0x41, 0x06, 0x7b, 0xfc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x41, 0x26, 0x9c, 0xa5,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5d, 0xd8, 0x8c, 0x0b,
- 0x0f, 0x14, 0xe8, 0x00,
- 0x63, 0x38, 0x8c, 0x0b,
- 0x19, 0x11, 0xef, 0xe0,
- 0x7f, 0xf8, 0x8c, 0x0b,
- 0x41, 0x66, 0xef, 0xdc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6f, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x00,
- 0x98, 0xf5, 0xa1, 0xab,
- 0xe0, 0x00, 0x41, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x10, 0x59, 0x68,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x46, 0x96, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x78, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x14,
- 0x94, 0x35, 0xa1, 0xab,
- 0x6d, 0x09, 0x0c, 0x09,
- 0x0c, 0x1b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6c, 0x04, 0x04, 0x00,
- 0xe0, 0x00, 0x41, 0x56,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x9e, 0x29, 0x40, 0x2b,
- 0x8c, 0x0b, 0x02, 0x19,
- 0xef, 0xc0, 0x77, 0xe8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x76, 0x8e, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0xf8, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xfc,
- 0x8c, 0x35, 0xa1, 0xab,
- 0x61, 0x38, 0x00, 0x06,
- 0xe0, 0x00, 0x43, 0x86,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x1c, 0x85, 0x11,
- 0x5e, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xf4,
- 0x88, 0x35, 0xa1, 0xab,
- 0x6c, 0x71, 0x0c, 0x09,
- 0x43, 0x96, 0x40, 0x2c,
- 0x4c, 0x11, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x19, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x16, 0x06, 0x81, 0x1b,
- 0x01, 0xf5, 0x80, 0x00,
- 0x41, 0x16, 0x81, 0xa1,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x42, 0x38, 0x8c, 0x0b,
- 0x00, 0xab, 0xe8, 0x00,
- 0xa1, 0xab, 0x83, 0x91,
- 0x83, 0x91, 0xe4, 0x25,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x54, 0x68,
- 0x90, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x57, 0xa8,
- 0xd8, 0xe5, 0xa1, 0xab,
- 0x6c, 0x91, 0x0c, 0x09,
- 0x21, 0x0b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x41, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x40, 0x60, 0x40, 0x2b,
- 0x53, 0xd8, 0x9c, 0x00,
- 0x94, 0x0b, 0x8f, 0xc8,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x03, 0x06, 0x00, 0x6b,
- 0x0c, 0x0b, 0xe0, 0x08,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0x11, 0x40, 0x2b,
- 0x6d, 0x09, 0x4c, 0x11,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x81, 0x01, 0x60, 0x94,
- 0x0d, 0x0d, 0x0c, 0x19,
- 0x4c, 0x03, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x71,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x42, 0x10, 0xc0, 0x2c,
- 0x4c, 0x11, 0xdc, 0x40,
- 0xc0, 0x2c, 0x0d, 0x0d,
- 0x69, 0x65, 0x0c, 0x15,
- 0x0c, 0x29, 0xc0, 0x0d,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x00, 0x02, 0x1a,
- 0xa0, 0x00, 0x00, 0x38,
- 0x44, 0x20, 0x80, 0xc5,
- 0x4c, 0x21, 0xf3, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x44, 0x20, 0x40, 0x16,
- 0x4c, 0x01, 0xf3, 0xe0,
- 0x40, 0x2c, 0x6c, 0xed,
- 0x4c, 0x21, 0xc2, 0x29,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x6c, 0xf1, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x03, 0xe0, 0x94,
- 0x40, 0x16, 0x06, 0x81,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x0c, 0xf9, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x01, 0xe0, 0x8c,
- 0x40, 0x2c, 0x0c, 0xfd,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x03, 0x35, 0x4c, 0x05,
- 0x42, 0x0a, 0x40, 0x0b,
- 0x4c, 0x21, 0xe0, 0x9c,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x68, 0x58, 0x80, 0xe5,
- 0x8c, 0x0b, 0x6f, 0xf0,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x86, 0x25, 0xe0, 0xa0,
- 0x67, 0xf1, 0x0c, 0x59,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x67, 0xed, 0x0c, 0x49,
- 0x0c, 0x39, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xe5, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe1,
- 0xe8, 0x04, 0x41, 0x88,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9e, 0xf5,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xa4, 0x42, 0x0a,
- 0x03, 0x11, 0x82, 0x85,
- 0x4e, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9c, 0x35,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xb8, 0x42, 0x0a,
- 0x7b, 0xf8, 0x80, 0xe5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x09, 0x98, 0xb5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xdc, 0x00, 0x40, 0x60,
- 0xcf, 0xec, 0x67, 0xc8,
- 0x65, 0x51, 0x0c, 0x09,
- 0x43, 0x46, 0x40, 0x2b,
- 0x04, 0x14, 0xe1, 0x04,
- 0x00, 0x00, 0x85, 0x51,
- 0x8e, 0x09, 0xec, 0x04,
- 0x0c, 0x09, 0x84, 0x06,
- 0xc0, 0x38, 0x63, 0x2d,
- 0x40, 0x06, 0x21, 0x0b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x82, 0xf5,
- 0xc0, 0x38, 0x63, 0x15,
- 0x02, 0x45, 0xa5, 0x0b,
- 0x80, 0x00, 0x0a, 0x86,
- 0x00, 0xc5, 0xa3, 0x0b,
- 0x80, 0x00, 0x0a, 0x66,
- 0x0a, 0x46, 0xa1, 0x0b,
- 0x02, 0x60, 0x80, 0x00,
- 0x40, 0x54, 0x65, 0x41,
- 0x64, 0x11, 0x04, 0x60,
- 0x08, 0x60, 0xc0, 0x9e,
- 0x40, 0xa2, 0x66, 0x71,
- 0xe4, 0x30, 0x00, 0xf0,
- 0x06, 0xf0, 0x21, 0x56,
- 0x7f, 0x58, 0xe4, 0x10,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x02, 0x06, 0x40, 0x2b,
- 0x84, 0xb5, 0xc0, 0x04,
- 0x60, 0x08, 0x44, 0x16,
- 0x64, 0x50, 0x00, 0x60,
- 0x4c, 0x21, 0xc0, 0x9e,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0xa1, 0x02, 0x60,
- 0x78, 0x18, 0xc0, 0xa3,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x29, 0x86, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x02, 0x16,
- 0x6e, 0x8d, 0x4c, 0x15,
- 0x0e, 0x56, 0x40, 0x0a,
- 0x4c, 0x05, 0xe0, 0x0c,
- 0x40, 0x0a, 0x6e, 0x89,
- 0xe0, 0x0c, 0x02, 0x56,
- 0x6f, 0xc8, 0x49, 0x48,
- 0x0e, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x69, 0x65, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0d,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x41, 0x46, 0x84, 0xe5,
- 0x4b, 0xe6, 0x61, 0x4c,
- 0x00, 0x04, 0xe0, 0x0c,
- 0x66, 0xd1, 0x06, 0x60,
- 0x0c, 0x29, 0xc0, 0x54,
- 0x40, 0x15, 0x63, 0x0d,
- 0x66, 0xe1, 0x08, 0x60,
- 0x0c, 0x19, 0xc0, 0xa3,
- 0xc0, 0x15, 0x63, 0x09,
- 0x6c, 0x1d, 0x4c, 0x51,
- 0x62, 0x78, 0xc0, 0x2b,
- 0x0c, 0x09, 0xef, 0xa0,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0x60, 0x94, 0x40, 0x4a,
- 0xe0, 0x0c, 0x00, 0x46,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x86, 0x45, 0xc0, 0x2b,
- 0x66, 0xb1, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0xbf,
- 0xc0, 0xc0, 0x65, 0x21,
- 0x64, 0xc1, 0x04, 0x60,
- 0x06, 0x60, 0x40, 0xad,
- 0xc0, 0xad, 0x65, 0x21,
- 0x6f, 0xac, 0x72, 0x88,
- 0x66, 0x20, 0x08, 0x60,
- 0x00, 0x60, 0xc0, 0xae,
- 0x40, 0xd8, 0x65, 0x61,
- 0x70, 0x78, 0x81, 0x11,
- 0x04, 0xc6, 0x6f, 0x70,
- 0x77, 0x65, 0xe0, 0x10,
- 0xc1, 0xc3, 0x81, 0x71,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x03, 0x16, 0x40, 0x2c,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6c, 0x79, 0x00, 0x19,
- 0x00, 0x79, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0x75,
- 0xfc, 0x00, 0x10, 0xc4,
- 0x6d, 0x0d, 0x40, 0x81,
- 0x00, 0xab, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x00, 0x19, 0x8d, 0x1e,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x63, 0x15, 0x00, 0xb5,
- 0x00, 0x69, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6c, 0xf9,
- 0x00, 0x19, 0x8f, 0x1e,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x66, 0x35, 0x00, 0x5b,
- 0x00, 0x99, 0xc0, 0x16,
- 0xc0, 0x2c, 0x6c, 0xf1,
- 0xf8, 0x60, 0x08, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x0f, 0x1b, 0x86, 0x55,
- 0x06, 0x10, 0x83, 0x31,
- 0x02, 0x0a, 0x44, 0x04,
- 0x06, 0x16, 0xe3, 0xfc,
- 0x12, 0x0a, 0x00, 0x00,
- 0x40, 0x31, 0xe3, 0xfc,
- 0x40, 0x2c, 0x6c, 0xf5,
- 0x80, 0x85, 0x83, 0x21,
- 0x04, 0x90, 0x95, 0x9b,
- 0x40, 0x21, 0xc4, 0x04,
- 0x40, 0x2c, 0x6c, 0xf1,
- 0x82, 0xcf, 0xf1, 0x11,
- 0xc4, 0xc9, 0x07, 0x65,
- 0x63, 0xfc, 0x02, 0x0a,
- 0x16, 0x54, 0x96, 0x4b,
- 0x83, 0x21, 0x61, 0xb4,
- 0x83, 0x31, 0x02, 0x45,
- 0xe0, 0x84, 0x06, 0x74,
- 0xfa, 0x80, 0x06, 0x34,
- 0x83, 0x31, 0x07, 0x1b,
- 0xc4, 0x04, 0x06, 0x10,
- 0x6c, 0xf5, 0x40, 0x31,
- 0x12, 0x0a, 0x40, 0x2c,
- 0x80, 0xe5, 0xe3, 0xfc,
- 0x02, 0xa4, 0xc2, 0xa7,
- 0x83, 0x9b, 0xfa, 0x80,
- 0xc4, 0x04, 0x04, 0x90,
- 0x6c, 0xf1, 0x40, 0x21,
- 0x56, 0x0a, 0x40, 0x2c,
- 0x80, 0xa5, 0xe0, 0x80,
- 0xfa, 0x80, 0x02, 0x34,
- 0x80, 0xf5, 0xce, 0x1d,
- 0xe0, 0x80, 0x56, 0x4a,
- 0x46, 0x4a, 0x80, 0xe5,
- 0x80, 0x85, 0xe0, 0x80,
- 0x58, 0x80, 0x01, 0x55,
- 0x58, 0xc0, 0xfc, 0x18,
- 0x08, 0xbb, 0xf3, 0xe0,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6d, 0x0d, 0x40, 0xc1,
- 0x58, 0x0a, 0x40, 0x2c,
- 0x82, 0xc5, 0xe0, 0x84,
- 0xfa, 0x80, 0x02, 0x64,
- 0x83, 0x11, 0x0f, 0x1b,
- 0x44, 0x04, 0x02, 0x60,
- 0xf3, 0xfc, 0x0c, 0x0a,
- 0x80, 0x00, 0x02, 0x16,
- 0x6c, 0xf9, 0x40, 0x11,
- 0x00, 0x29, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xff, 0xf8, 0x02, 0x0e,
- 0xff, 0xf8, 0x0c, 0x0e,
- 0xe3, 0xfc, 0x04, 0x0a,
- 0x44, 0x04, 0x02, 0x20,
- 0xe0, 0xb4, 0x4a, 0x0a,
- 0x6c, 0xfd, 0x40, 0x11,
- 0x88, 0x55, 0xc0, 0x2c,
- 0x42, 0xc2, 0x91, 0x11,
- 0x18, 0xc4, 0x78, 0x84,
- 0x22, 0xcf, 0xfc, 0x0c,
- 0x40, 0xc1, 0xa1, 0x1b,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x8d, 0x14, 0x90, 0x15,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x80, 0xe5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x84, 0xf5, 0x83, 0x2b,
- 0x6c, 0xed, 0x00, 0x19,
- 0x83, 0x21, 0x40, 0x2c,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0xc0, 0x2c,
- 0x88, 0xd5, 0xe3, 0xf0,
- 0x8d, 0x14, 0x85, 0x75,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x82, 0xa5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x80, 0xe5, 0x83, 0x2b,
- 0xe4, 0x04, 0x02, 0x30,
- 0x6d, 0x09, 0x40, 0x11,
- 0x83, 0x95, 0xc0, 0x2c,
- 0x6c, 0xed, 0x00, 0x19,
- 0x91, 0x21, 0x40, 0x2c,
- 0x78, 0x88, 0x44, 0xc2,
- 0xfc, 0x0c, 0x18, 0xc4,
- 0x83, 0x21, 0x24, 0xcf,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0x40, 0x2c,
- 0x40, 0xc1, 0xe3, 0xf0,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x0c, 0x10, 0x80, 0x65,
- 0x40, 0x61, 0xe4, 0x04,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x6c, 0xed, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0x42, 0xc0, 0x82, 0xc5,
- 0x40, 0x11, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x42, 0x10, 0x90, 0x18,
- 0x90, 0x16, 0xf3, 0xf8,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x83, 0x15, 0xc0, 0x2c,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x19, 0x82, 0x25,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x58, 0xc0, 0x00, 0xb5,
- 0x58, 0xc0, 0xdc, 0x40,
- 0x40, 0xc1, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x15, 0x84, 0x05,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x63, 0x35, 0x00, 0x25,
- 0x83, 0x11, 0x40, 0x0b,
- 0x02, 0x20, 0x97, 0x2b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x63, 0x35,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x0c, 0x46, 0x88,
- 0x0e, 0x01, 0x80, 0x7b,
- 0x40, 0x2c, 0x6d, 0x01,
- 0x00, 0x8a, 0x81, 0x61,
- 0x82, 0xd5, 0xe1, 0xb8,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x0c, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x60, 0x0c,
- 0xef, 0xc4, 0x70, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0x6c, 0x6d, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x82, 0x65, 0xe0, 0x8c,
- 0x63, 0x35, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0b,
- 0x0c, 0x15, 0x82, 0x65,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x80, 0xd5, 0x83, 0x0b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x05, 0x55, 0xc0, 0x2c,
- 0x0c, 0x09, 0xc6, 0x09,
- 0xc0, 0x2c, 0x6c, 0x6d,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x86, 0x25,
- 0xc0, 0x2c, 0x6c, 0x89,
- 0x84, 0x85, 0xa1, 0x0b,
- 0x68, 0x0c, 0x42, 0x48,
- 0x0c, 0x11, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x6c, 0x89, 0x0c, 0x29,
- 0x0c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xf1, 0x88, 0x46, 0x12,
- 0x82, 0xf5, 0x87, 0x0d,
- 0x84, 0x0d, 0x82, 0x23,
- 0x0c, 0x09, 0x82, 0x95,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x6d, 0x15, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x2c,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x4c, 0x11, 0xc6, 0x19,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xc1, 0xc3, 0xff, 0x35,
- 0x82, 0xc5, 0xa9, 0x3b,
- 0x02, 0xa5, 0xa3, 0x3b,
- 0x81, 0x88, 0x04, 0x24,
- 0x84, 0x85, 0xa5, 0x3b,
- 0x84, 0x85, 0xa7, 0x3b,
- 0x5c, 0x08, 0xa1, 0x3b,
- 0x0f, 0xd8, 0xda, 0x00,
- 0x89, 0x75, 0xff, 0x70,
- 0x5c, 0x08, 0xa1, 0x2b,
- 0x45, 0x34, 0x9a, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x7b, 0xfd, 0x46, 0x30,
- 0xc1, 0x3e, 0xdf, 0xff,
- 0x81, 0x31, 0xff, 0x65,
- 0x83, 0x31, 0x81, 0x45,
- 0xdd, 0x93, 0x81, 0x25,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x4b, 0xfe, 0x01, 0x41,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x04, 0x84, 0x85, 0x95,
- 0x06, 0x74, 0xa3, 0x3b,
- 0xc4, 0xc4, 0x88, 0x41,
- 0xa0, 0x11, 0x46, 0x64,
- 0x1b, 0xfd, 0x50, 0x80,
- 0x4e, 0x70, 0x9f, 0xff,
- 0x1f, 0xff, 0x1b, 0xfd,
- 0x12, 0x74, 0x8a, 0x8f,
- 0x58, 0xc0, 0x60, 0xe0,
- 0x9f, 0xff, 0x1b, 0xfc,
- 0x1b, 0xfd, 0x4c, 0x60,
- 0xb0, 0x9f, 0x1f, 0xff,
- 0x10, 0xc4, 0x51, 0x77,
- 0x61, 0xc7, 0xe0, 0xc0,
- 0xfb, 0x80, 0x0e, 0x74,
- 0x18, 0xc4, 0x50, 0x67,
- 0x2e, 0x8f, 0xfa, 0x80,
- 0x40, 0x95, 0xb8, 0x6f,
- 0x40, 0x85, 0xf8, 0x08,
- 0x40, 0x65, 0xf8, 0x04,
- 0xc5, 0x4d, 0xf0, 0x0c,
- 0x0c, 0x0c, 0xf4, 0xf5,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x49, 0xfe, 0x01, 0x31,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x7f, 0xf1, 0x0a, 0x0e,
- 0x18, 0x0e, 0x40, 0x3f,
- 0xc0, 0x3f, 0x70, 0x01,
- 0x02, 0x65, 0x83, 0xd5,
- 0x86, 0x31, 0x70, 0x0c,
- 0xf8, 0x08, 0x02, 0x75,
- 0xf8, 0x04, 0x02, 0x85,
- 0x78, 0x10, 0x52, 0x62,
- 0x40, 0x95, 0xf1, 0x67,
- 0x12, 0x74, 0x78, 0x08,
- 0x0a, 0x9f, 0xe0, 0xa0,
- 0x2c, 0x9f, 0xe1, 0x77,
- 0xe0, 0xc0, 0x0c, 0x84,
- 0x78, 0x04, 0x40, 0x95,
- 0x2e, 0x6f, 0x98, 0x6f,
- 0x40, 0x65, 0xd1, 0x87,
- 0x40, 0x85, 0xf0, 0x10,
- 0xc5, 0x3d, 0xf8, 0x0c,
- 0x0c, 0x0c, 0xf8, 0x75,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x18, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0xbe, 0x3e, 0xe0, 0x10,
- 0xc5, 0x27, 0x7c, 0x3e,
- 0xa7, 0x2b, 0x7e, 0x3e,
- 0x66, 0x8a, 0x46, 0x4a,
- 0x0a, 0x26, 0x83, 0x41,
- 0x18, 0x06, 0x00, 0x00,
- 0x82, 0x65, 0x80, 0x00,
- 0x81, 0x51, 0x25, 0x2b,
- 0x81, 0x41, 0x03, 0xc1,
- 0xa3, 0x2b, 0x80, 0xc5,
- 0x01, 0x51, 0x80, 0xf5,
- 0x81, 0x41, 0x81, 0xc1,
- 0xfc, 0xce, 0xbe, 0x5e,
- 0xc0, 0x08, 0xfe, 0x4e,
- 0x00, 0x34, 0x00, 0x13,
- 0x01, 0xb5, 0xfa, 0x80,
- 0x48, 0x4a, 0x81, 0x31,
- 0x0a, 0xf0, 0x61, 0x0a,
- 0x82, 0x31, 0xe4, 0x10,
- 0x0a, 0x45, 0xc4, 0x47,
- 0xc5, 0x46, 0xfc, 0x10,
- 0xfa, 0x80, 0x08, 0x34,
- 0xfc, 0x95, 0xc1, 0x4d,
- 0xa0, 0xf1, 0x01, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x1c, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0x85, 0x51, 0x60, 0x14,
- 0x7c, 0x3e, 0xbe, 0x3e,
- 0x27, 0x2b, 0xc5, 0x27,
- 0xe6, 0x8a, 0x48, 0x4a,
- 0x18, 0x16, 0x7e, 0x3e,
- 0x82, 0x05, 0x80, 0x00,
- 0x81, 0xc1, 0x25, 0x2b,
- 0xa3, 0x2b, 0x80, 0xa5,
- 0x01, 0x51, 0x80, 0xd5,
- 0xbe, 0x5e, 0x81, 0xc1,
- 0xfe, 0xce, 0xfc, 0x3e,
- 0x81, 0x31, 0x42, 0x08,
- 0x00, 0x44, 0x00, 0x13,
- 0x81, 0xa5, 0xfa, 0x80,
- 0x61, 0x0a, 0x48, 0x4a,
- 0xe4, 0x10, 0x0a, 0xf0,
- 0xc4, 0x47, 0x82, 0x31,
- 0xfc, 0x10, 0x0a, 0x45,
- 0x08, 0x34, 0xc5, 0x46,
- 0xc1, 0x4d, 0xfa, 0x80,
- 0x01, 0x01, 0xfc, 0x95,
- 0xdd, 0x93, 0xa0, 0xf1,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x0c, 0x07, 0xc6,
- 0xe1, 0x0c, 0x49, 0x06,
- 0x46, 0x06, 0x0c, 0xc4,
- 0x0c, 0x64, 0xe1, 0x0c,
- 0xe1, 0x0c, 0x46, 0x86,
- 0x4f, 0x86, 0x10, 0x54,
- 0x0c, 0x44, 0xe1, 0x0c,
- 0x1c, 0x34, 0x8b, 0x81,
- 0xe4, 0x60, 0x0e, 0x00,
- 0x1c, 0x98, 0x81, 0x75,
- 0xec, 0x04, 0x10, 0x80,
- 0xdd, 0x98, 0xf1, 0x96,
- 0xa1, 0x8b, 0xd9, 0x96,
- 0x18, 0x00, 0xfe, 0x35,
- 0x89, 0x61, 0x64, 0x74,
- 0x71, 0x78, 0x81, 0x55,
- 0xec, 0x04, 0x0c, 0x60,
- 0xa1, 0x6b, 0xd5, 0x76,
- 0x1d, 0x51, 0xfe, 0x75,
- 0x81, 0x55, 0x80, 0xcb,
- 0x0a, 0x50, 0x71, 0x68,
- 0xd1, 0x66, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x5b,
- 0x95, 0x41, 0x1c, 0x01,
- 0x41, 0x58, 0x81, 0x55,
- 0xec, 0x04, 0x08, 0x40,
- 0xa1, 0x4b, 0xcd, 0x56,
- 0x00, 0x20, 0xfe, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x80, 0x00, 0x34,
- 0x08, 0x00, 0x81, 0xc1,
- 0x00, 0x34, 0x6c, 0x04,
- 0x0a, 0x00, 0xe8, 0x88,
- 0x81, 0x01, 0x6c, 0x04,
- 0x81, 0x61, 0x03, 0x45,
- 0x0e, 0x54, 0xe9, 0x2d,
- 0x00, 0x04, 0x48, 0xb0,
- 0x82, 0x55, 0xdb, 0x80,
- 0xe8, 0xb0, 0x0e, 0x44,
- 0x00, 0x60, 0x00, 0x73,
- 0x00, 0x34, 0xe4, 0x30,
- 0x0e, 0x74, 0x68, 0x80,
- 0x0e, 0x03, 0xfb, 0x80,
- 0x86, 0xc1, 0x82, 0x61,
- 0xfa, 0xb5, 0x8d, 0x1b,
- 0x61, 0x04, 0x42, 0x06,
- 0x6b, 0xfc, 0x01, 0x0a,
- 0x04, 0x14, 0xc0, 0xff,
- 0xdb, 0x80, 0x00, 0x04,
- 0x04, 0x01, 0x00, 0x00,
- 0x04, 0x0c, 0xc0, 0x80,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x16, 0x00, 0x6b,
- 0x62, 0x98, 0xe0, 0x00,
- 0x0c, 0x09, 0xe8, 0x0c,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xe1, 0x0c, 0x42, 0x46,
- 0x0e, 0x60, 0x04, 0x14,
- 0xc0, 0xaf, 0x64, 0x31,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0x04, 0x06, 0xe2, 0x00,
- 0x71, 0x58, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xfc,
- 0x64, 0x38, 0x02, 0x60,
- 0x74, 0x78, 0x8e, 0x0b,
- 0x0c, 0x19, 0xef, 0xfc,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe4, 0x60, 0x00, 0x60,
- 0x6c, 0x41, 0x0c, 0x29,
- 0x81, 0x31, 0x40, 0x2b,
- 0x0c, 0x49, 0x81, 0x85,
- 0xa1, 0x4b, 0xfc, 0x04,
- 0x41, 0x16, 0x80, 0x75,
- 0x82, 0x11, 0x82, 0x31,
- 0xfe, 0x15, 0xc5, 0x3d,
- 0x6c, 0x3d, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x2b,
- 0x0c, 0x39, 0xe4, 0x74,
- 0x40, 0x2b, 0x6c, 0x45,
- 0x44, 0x62, 0x81, 0x41,
- 0x01, 0x95, 0xf0, 0x80,
- 0x88, 0x58, 0x9c, 0x21,
- 0x80, 0x75, 0xa1, 0x5b,
- 0x82, 0x41, 0x45, 0x06,
- 0x82, 0x21, 0x02, 0x01,
- 0xfe, 0x15, 0xc7, 0x4d,
- 0x6c, 0x45, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6c, 0x41, 0x0c, 0x19,
- 0x74, 0x78, 0xc0, 0x2b,
- 0x42, 0x98, 0xef, 0xfc,
- 0x8c, 0x0b, 0x68, 0x10,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x40, 0x1e, 0xf0,
- 0x40, 0x16, 0x00, 0x6b,
- 0x08, 0x9b, 0xe0, 0x04,
- 0x4c, 0x01, 0x86, 0xab,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x01, 0x01, 0x84, 0xbb,
- 0x5e, 0xb1, 0x82, 0x8b,
- 0x8a, 0x7b, 0x61, 0x30,
- 0x61, 0x20, 0x5e, 0xa1,
- 0xe2, 0x80, 0x02, 0x06,
- 0xe1, 0x10, 0x5e, 0x91,
- 0x9f, 0x0e, 0xa1, 0x0e,
- 0x5e, 0x01, 0x9d, 0x0e,
- 0x5e, 0x01, 0xe0, 0xd0,
- 0x5e, 0x01, 0xe0, 0xc0,
- 0x8c, 0x0b, 0x60, 0xb0,
- 0xe8, 0x0c, 0x5b, 0x68,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x3b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x69, 0xa8,
- 0x60, 0x90, 0x00, 0x84,
- 0xe1, 0x8c, 0x02, 0x84,
- 0x40, 0x00, 0x0d, 0x8e,
- 0x4e, 0x09, 0xf1, 0xc0,
- 0xe0, 0x04, 0x0e, 0x6a,
- 0x71, 0x84, 0x50, 0x02,
- 0x93, 0x7e, 0x8f, 0x01,
- 0x00, 0xb8, 0x95, 0x8e,
- 0x80, 0x00, 0x40, 0x01,
- 0xfa, 0x80, 0x00, 0x84,
- 0x15, 0x0e, 0x90, 0x01,
- 0x5e, 0x01, 0x91, 0x01,
- 0x9f, 0x01, 0x60, 0xb0,
- 0x40, 0xa2, 0x0f, 0x0e,
- 0xb2, 0x0f, 0xf9, 0xac,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x4f, 0x76, 0x1e, 0x89,
- 0x11, 0x8e, 0xe0, 0x00,
- 0xf0, 0xac, 0x50, 0xa2,
- 0x92, 0x83, 0x07, 0x65,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x4a, 0x58, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0x5e, 0xb1, 0xa1, 0x0b,
- 0x5e, 0xa1, 0xc1, 0x30,
- 0x5e, 0x91, 0xc1, 0x20,
- 0x15, 0x48, 0xc1, 0x10,
- 0x16, 0x0a, 0xc0, 0x00,
- 0x81, 0x01, 0x70, 0x00,
- 0x44, 0x04, 0x00, 0xb0,
- 0xf0, 0x00, 0x16, 0x4a,
- 0x62, 0x00, 0x02, 0x0c,
- 0xf0, 0x00, 0x14, 0x4a,
- 0x62, 0x00, 0x04, 0x0c,
- 0x14, 0x1a, 0x82, 0x83,
- 0x81, 0x11, 0x70, 0x00,
- 0x24, 0x05, 0x02, 0xa0,
- 0x84, 0x83, 0x40, 0x00,
- 0x70, 0x00, 0x12, 0x4a,
- 0x06, 0x0c, 0x81, 0x21,
- 0x12, 0x1a, 0x62, 0x00,
- 0x04, 0x90, 0xf0, 0x00,
- 0x40, 0x00, 0x24, 0x05,
- 0x04, 0x9b, 0x86, 0x83,
- 0x80, 0xbb, 0x82, 0xab,
- 0xf2, 0x65, 0xe8, 0x8d,
- 0x5e, 0xb1, 0x93, 0x04,
- 0x5e, 0xa1, 0xe1, 0x30,
- 0x11, 0x04, 0xe1, 0x20,
- 0x5e, 0x91, 0xa3, 0x0b,
- 0x5e, 0x07, 0xe1, 0x10,
- 0x15, 0x04, 0xe0, 0x3c,
- 0xe4, 0x20, 0x0e, 0x00,
- 0x1e, 0x75, 0x89, 0x7e,
- 0x16, 0x0a, 0x40, 0x20,
- 0x10, 0x74, 0xfb, 0xfc,
- 0xb0, 0x03, 0xfa, 0x80,
- 0x44, 0x00, 0x0c, 0x25,
- 0x15, 0x04, 0xf0, 0x7c,
- 0xe0, 0x80, 0x50, 0x0a,
- 0xa1, 0x2b, 0x88, 0x75,
- 0xa0, 0x01, 0x88, 0x85,
- 0x60, 0xd0, 0x5e, 0x01,
- 0xf3, 0xc0, 0x42, 0x00,
- 0x65, 0xc4, 0x02, 0x8a,
- 0x02, 0x80, 0x8e, 0x0b,
- 0x00, 0x80, 0x04, 0x3c,
- 0x5e, 0x11, 0x8c, 0x04,
- 0x83, 0x85, 0x80, 0xd0,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x44, 0x18, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x0f, 0x48, 0xa1, 0x0b,
- 0x9b, 0xa1, 0xc0, 0x00,
- 0xe1, 0x20, 0x5e, 0xa1,
- 0xa1, 0x2b, 0xf1, 0x45,
- 0x84, 0x40, 0x00, 0x00,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x16, 0xf0, 0x65, 0x00,
- 0x3e, 0x0e, 0xe4, 0xd0,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x04, 0xf0, 0x0b, 0x2e,
- 0x3c, 0xbe, 0xe5, 0x30,
- 0xe4, 0xb0, 0x0a, 0xf0,
- 0x8c, 0x0b, 0x01, 0x11,
- 0x68, 0x00, 0x4d, 0xe8,
- 0x1e, 0xa9, 0x8c, 0x3b,
- 0x14, 0x0a, 0x60, 0xc0,
- 0x86, 0x05, 0xfb, 0xfc,
- 0xe0, 0x80, 0x4e, 0x0a,
- 0x44, 0x3c, 0x02, 0x70,
- 0xcc, 0x04, 0x00, 0x70,
- 0xc0, 0xd0, 0x5e, 0x11,
- 0x8b, 0x04, 0x82, 0xb5,
- 0xe0, 0x40, 0x00, 0x0a,
- 0xc0, 0x28, 0x1e, 0x05,
- 0xc4, 0x40, 0x00, 0x00,
- 0x80, 0x28, 0x1e, 0x05,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xf0,
- 0x3e, 0x0e, 0xe5, 0x20,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x03, 0x11, 0xe4, 0xb0,
- 0x4b, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x60, 0xc0, 0x1e, 0x99,
- 0xfb, 0xfc, 0x12, 0x0a,
- 0x50, 0x4a, 0x86, 0xa5,
- 0x0e, 0x70, 0xe0, 0x80,
- 0x5e, 0x71, 0xcc, 0x04,
- 0x84, 0x95, 0xc0, 0xd0,
- 0xa1, 0x0b, 0x8b, 0x04,
- 0x80, 0x28, 0x1e, 0x05,
- 0x80, 0xd0, 0x5e, 0x01,
- 0x95, 0x04, 0x82, 0xa5,
- 0x5e, 0x01, 0xa0, 0x01,
- 0x42, 0x00, 0x60, 0xd0,
- 0x02, 0x8a, 0xf3, 0xc0,
- 0x0e, 0x80, 0xe5, 0xc4,
- 0x5e, 0x71, 0x8c, 0x08,
- 0x5e, 0x71, 0x80, 0xd0,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xe0,
- 0x3e, 0x0e, 0xe5, 0x10,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x05, 0x11, 0xe4, 0xb0,
- 0x48, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x80, 0x7b, 0x85, 0x81,
- 0x96, 0xd5, 0xa1, 0x7b,
- 0x8c, 0x3b, 0x13, 0x14,
- 0x1e, 0x19, 0x8f, 0x04,
- 0xa1, 0x1b, 0x60, 0xc0,
- 0x40, 0x10, 0x1e, 0x25,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfb, 0x80, 0x40, 0xa2,
- 0x7b, 0x80, 0x40, 0x92,
- 0xfa, 0x80, 0x02, 0x14,
- 0x40, 0x20, 0x5e, 0x25,
- 0xfb, 0x80, 0x42, 0x12,
- 0x04, 0x04, 0x91, 0x04,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0xe8, 0x04, 0x56, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x0b, 0x90, 0x35,
- 0x4c, 0xd8, 0x8c, 0x1b,
- 0x1e, 0x07, 0xe8, 0x00,
- 0x40, 0xc6, 0x60, 0x3c,
- 0x00, 0x04, 0xe1, 0x08,
- 0x01, 0x21, 0x85, 0x11,
- 0x02, 0x06, 0x81, 0x71,
- 0x00, 0x16, 0xc0, 0x00,
- 0xe1, 0x08, 0x41, 0x06,
- 0x02, 0x2c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x41, 0x86,
- 0x02, 0x0c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0xc6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x00, 0x06,
- 0x83, 0x11, 0x00, 0x04,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x00, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x8d, 0x34, 0x80, 0x26,
- 0x9f, 0x14, 0xa1, 0x04,
- 0x4c, 0x31, 0x9d, 0x24,
- 0xc0, 0x27, 0x67, 0xe1,
- 0x67, 0xe5, 0x4c, 0x01,
- 0x4c, 0x11, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xed, 0x4c, 0x21,
- 0x4c, 0x71, 0xc0, 0x27,
- 0x40, 0x27, 0x67, 0xf5,
- 0x13, 0x04, 0xa9, 0x31,
- 0x9f, 0x24, 0x8b, 0x41,
- 0x1d, 0x04, 0xa1, 0x14,
- 0x46, 0x16, 0xa1, 0x0b,
- 0x08, 0xf6, 0x40, 0x00,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xd0, 0x17, 0x66, 0x8e,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x80, 0x23, 0x82, 0x23,
- 0x69, 0x59, 0x4c, 0x25,
- 0x0e, 0x0b, 0xc0, 0x08,
- 0xe5, 0x40, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x93, 0x34, 0x8f, 0x3e,
- 0x8b, 0x75, 0x91, 0x64,
- 0x94, 0x88, 0x90, 0x98,
- 0x94, 0xf5, 0xd1, 0x9d,
- 0x50, 0x02, 0x18, 0xa8,
- 0x10, 0x79, 0xf0, 0xa4,
- 0x40, 0x27, 0x63, 0x41,
- 0x56, 0xa2, 0x83, 0xc1,
- 0x10, 0xb4, 0xf1, 0xa4,
- 0x4e, 0x70, 0x61, 0x90,
- 0x16, 0x84, 0xfb, 0xfc,
- 0x16, 0xc4, 0xfa, 0x80,
- 0x96, 0x7f, 0xe8, 0xac,
- 0x86, 0x75, 0xa1, 0x7b,
- 0x10, 0x8a, 0x0f, 0xc4,
- 0x0e, 0xb6, 0xf4, 0x10,
- 0x16, 0x16, 0x00, 0x00,
- 0x4e, 0x72, 0x80, 0x00,
- 0x0e, 0x74, 0x91, 0xa0,
- 0x18, 0x79, 0x9a, 0x80,
- 0x16, 0xb4, 0x7c, 0x24,
- 0x98, 0x93, 0x88, 0x9c,
- 0xa4, 0x76, 0xb6, 0x7f,
- 0x0e, 0x70, 0x88, 0x78,
- 0x88, 0x76, 0xec, 0x04,
- 0x82, 0x71, 0x8c, 0x74,
- 0x98, 0xa8, 0x8c, 0x7e,
- 0x7a, 0x80, 0x12, 0xa4,
- 0xec, 0x04, 0x0e, 0x10,
- 0x64, 0x80, 0x14, 0x90,
- 0x98, 0xa6, 0xe5, 0x7d,
- 0xa1, 0x1b, 0x84, 0x55,
- 0x14, 0x8a, 0x86, 0x55,
- 0x84, 0xf5, 0xf6, 0x00,
- 0x0e, 0x90, 0x4a, 0xa7,
- 0x50, 0xa0, 0xed, 0x44,
- 0xb0, 0x73, 0xf0, 0x80,
- 0x90, 0x78, 0x98, 0x76,
- 0xec, 0x04, 0x0e, 0x70,
- 0x81, 0xb5, 0x90, 0x76,
- 0xf3, 0xfc, 0x15, 0x0a,
- 0x0e, 0x90, 0x82, 0x15,
- 0x98, 0x76, 0xed, 0x88,
- 0x0e, 0x70, 0x90, 0x78,
- 0x90, 0x76, 0xec, 0x08,
- 0xa1, 0x8b, 0x88, 0x88,
- 0x81, 0xc5, 0xea, 0x15,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x43, 0x66, 0x40, 0x2b,
- 0x6d, 0xb8, 0xe0, 0x08,
- 0x4d, 0x66, 0x6f, 0xc0,
- 0xa1, 0x0b, 0xe0, 0x08,
- 0x81, 0x61, 0x80, 0x55,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x66, 0xb1, 0x04, 0x00,
- 0x91, 0x31, 0x40, 0x8b,
- 0x81, 0x41, 0x01, 0x55,
- 0x06, 0x30, 0x49, 0x4e,
- 0xa1, 0x3b, 0xec, 0x04,
- 0x01, 0x21, 0xfe, 0x95,
- 0x01, 0x51, 0x81, 0x31,
- 0x8b, 0x95, 0x81, 0x41,
- 0x10, 0x44, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xfa, 0x80,
- 0xf4, 0x08, 0x08, 0x8a,
- 0x88, 0x81, 0x04, 0x28,
- 0x81, 0x91, 0x3e, 0x4e,
- 0x0c, 0x24, 0x88, 0xab,
- 0x0e, 0x24, 0x61, 0x94,
- 0x04, 0x69, 0xe1, 0x9c,
- 0xe1, 0x84, 0x18, 0x24,
- 0x0e, 0x24, 0x2e, 0x6f,
- 0x08, 0x79, 0xe1, 0x8c,
- 0x2e, 0x6f, 0x90, 0xc9,
- 0x38, 0x6f, 0x9e, 0x29,
- 0x48, 0x67, 0xa9, 0xc1,
- 0x80, 0x00, 0x58, 0x16,
- 0x8b, 0x61, 0x2c, 0x2f,
- 0x00, 0x00, 0x0c, 0xf6,
- 0xfa, 0x80, 0x0e, 0x24,
- 0x4e, 0x0a, 0x85, 0x75,
- 0x86, 0x65, 0xe4, 0xa4,
- 0x7a, 0x80, 0x08, 0xa4,
- 0xf0, 0x00, 0x06, 0x5a,
- 0x70, 0x00, 0x06, 0x0a,
- 0x04, 0x1c, 0x98, 0xbb,
- 0x02, 0x54, 0x62, 0x00,
- 0x44, 0x47, 0xfa, 0x80,
- 0xdc, 0x00, 0x56, 0x60,
- 0x44, 0x02, 0x05, 0x1b,
- 0x04, 0x15, 0xf0, 0x90,
- 0x40, 0x08, 0x6b, 0xad,
- 0x80, 0x10, 0x16, 0x06,
- 0x44, 0x15, 0x96, 0x13,
- 0xc0, 0x08, 0x6b, 0xad,
- 0x60, 0x0c, 0x12, 0x1a,
- 0x0a, 0x0a, 0x82, 0x91,
- 0x54, 0x80, 0x7b, 0xfc,
- 0x0a, 0x0c, 0xbc, 0x00,
- 0xb1, 0x9b, 0xe2, 0x00,
- 0x7c, 0x24, 0xf6, 0x35,
- 0xbe, 0x44, 0x83, 0x39,
- 0x7c, 0x0c, 0x04, 0x0a,
- 0x02, 0x0c, 0x82, 0x21,
- 0x7e, 0x14, 0xe2, 0x00,
- 0x82, 0x11, 0x82, 0x43,
- 0xf4, 0x3c, 0x05, 0x0a,
- 0x01, 0x01, 0xe8, 0xc5,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x40, 0x56, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7c, 0x0e, 0x81, 0x01,
- 0x71, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0xc0, 0x2b, 0x65, 0xf9,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x01, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x9b,
- 0x4f, 0xf8, 0xc0, 0x00,
- 0x04, 0x06, 0x4f, 0x6c,
- 0x0c, 0x09, 0xc0, 0x18,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x88, 0xf5, 0xab, 0x0b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2c,
- 0xc2, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xef, 0xf4, 0x7a, 0xc8,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0x43, 0x06, 0x21, 0x7b,
- 0x83, 0x21, 0xef, 0xdc,
- 0x40, 0x00, 0x04, 0x26,
- 0xc4, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x82, 0x65, 0xc0, 0x2c,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x61, 0xa8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0xc0, 0x00, 0x0c, 0x38,
- 0x81, 0x11, 0x01, 0x71,
- 0x81, 0xa1, 0x13, 0x55,
- 0x12, 0xb4, 0x3e, 0x34,
- 0xd0, 0x9d, 0xfa, 0x80,
- 0x00, 0x4a, 0x9c, 0x35,
- 0x9a, 0xc5, 0xfb, 0xfc,
- 0x70, 0x00, 0x06, 0x0a,
- 0x01, 0x11, 0x96, 0x0b,
- 0x84, 0x05, 0x81, 0x21,
- 0xf0, 0x04, 0x06, 0x0a,
- 0x00, 0x00, 0x00, 0x06,
- 0x9c, 0x00, 0x42, 0xb0,
- 0x04, 0x06, 0x02, 0x25,
- 0x06, 0x0a, 0x80, 0x00,
- 0x82, 0xb5, 0xf0, 0x08,
- 0x81, 0x11, 0x01, 0x01,
- 0x4c, 0x01, 0x96, 0x2b,
- 0xc0, 0x27, 0x67, 0xe5,
- 0x67, 0xe9, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xed,
- 0x80, 0xf5, 0xa1, 0x7b,
- 0x6f, 0xf4, 0x76, 0x48,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x82, 0x45, 0xa1, 0x7b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x5d, 0xe8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x02, 0xf0, 0xa0, 0xf5,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x00, 0x4e, 0x88,
- 0x80, 0x7b, 0x7c, 0x04,
- 0x65, 0xf9, 0x0c, 0x19,
- 0x44, 0x86, 0x40, 0x2b,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x42, 0x0a, 0xe0, 0x0a,
- 0xcf, 0x07, 0xe0, 0x80,
- 0x84, 0x05, 0xfc, 0x0e,
- 0x7a, 0x80, 0x02, 0xa4,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x14, 0xc0, 0x9b,
- 0x04, 0x33, 0xe0, 0x88,
- 0x8c, 0x0e, 0x82, 0x23,
- 0xe4, 0x00, 0x44, 0xb1,
- 0x44, 0x11, 0xbc, 0x14,
- 0x0c, 0x1b, 0xe5, 0x00,
- 0x40, 0x15, 0x6a, 0xf9,
- 0xc3, 0x0d, 0x82, 0xa1,
- 0xd1, 0x9d, 0x86, 0x25,
- 0x07, 0xf5, 0x0c, 0x09,
- 0x16, 0xb0, 0x40, 0x27,
- 0xe6, 0x75, 0xc4, 0x04,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x88, 0x55, 0xe0, 0x0c,
- 0x41, 0x56, 0x03, 0xc5,
- 0xbc, 0x14, 0xe0, 0x00,
- 0x16, 0x0a, 0x83, 0xd5,
- 0x43, 0xf6, 0x70, 0x14,
- 0x86, 0x15, 0xe0, 0x0c,
- 0x02, 0x0a, 0xbc, 0x14,
- 0x84, 0x95, 0xf0, 0x0c,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x82, 0x15, 0xe0, 0x0c,
- 0xe0, 0x00, 0x41, 0x46,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x43, 0xf6, 0x40, 0x27,
- 0x03, 0x0a, 0xe0, 0x0c,
- 0x86, 0xd5, 0xf4, 0x0c,
- 0x67, 0xf5, 0x0c, 0x09,
- 0x00, 0x4a, 0xc0, 0x27,
- 0x86, 0x05, 0xfb, 0xfc,
- 0x67, 0xe1, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x02, 0x14, 0x3c, 0x1e,
- 0x41, 0xd8, 0xfa, 0x80,
- 0x80, 0x8b, 0xe8, 0x00,
- 0x16, 0x56, 0xeb, 0x8d,
- 0x00, 0x06, 0x00, 0x00,
- 0xd4, 0x65, 0x80, 0x00,
- 0xe0, 0x00, 0x41, 0x36,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x4c, 0xa1, 0xc0, 0x27,
- 0x40, 0x26, 0x6c, 0xf1,
- 0x73, 0xd8, 0x8c, 0x0b,
- 0x41, 0x06, 0xef, 0xb4,
- 0x81, 0x11, 0x6f, 0xdc,
- 0x0e, 0x0b, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0xcc,
- 0x67, 0xf1, 0x00, 0x59,
- 0xa7, 0x1b, 0x40, 0x27,
- 0x18, 0x24, 0x01, 0x31,
- 0x15, 0x3c, 0xe1, 0x8c,
- 0x05, 0x41, 0x8f, 0x61,
- 0x80, 0x04, 0x0f, 0x56,
- 0x02, 0x16, 0x04, 0x85,
- 0x25, 0x1b, 0x80, 0x00,
- 0xe0, 0x08, 0x4e, 0xa6,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x10, 0x06,
- 0x23, 0x1b, 0x82, 0x65,
- 0x02, 0x95, 0x81, 0x41,
- 0x03, 0x56, 0x81, 0x11,
- 0x83, 0x41, 0x60, 0x04,
- 0x81, 0x11, 0x29, 0x16,
- 0x12, 0xf0, 0x83, 0x81,
- 0xb0, 0x9f, 0xe4, 0x50,
- 0x38, 0x63, 0xa4, 0x76,
- 0xfb, 0xfc, 0x0a, 0x4a,
- 0x70, 0x1c, 0x58, 0x20,
- 0x0a, 0x64, 0x81, 0x21,
- 0xff, 0x61, 0x7a, 0x80,
- 0x00, 0x00, 0x04, 0x86,
- 0xe8, 0xb0, 0x18, 0x64,
- 0x08, 0x44, 0x05, 0x55,
- 0x4c, 0x12, 0xfa, 0x80,
- 0x10, 0xf0, 0x70, 0x88,
- 0x00, 0x63, 0xe4, 0x50,
- 0x0c, 0x79, 0x8b, 0x1b,
- 0x40, 0x27, 0x63, 0x41,
- 0xe1, 0xfc, 0x0c, 0x14,
- 0x0c, 0x64, 0x82, 0x63,
- 0x4c, 0x12, 0xfc, 0x00,
- 0x10, 0x69, 0xf1, 0x98,
- 0x4e, 0x72, 0x7c, 0x18,
- 0x0c, 0x7f, 0x98, 0x30,
- 0xa1, 0x7b, 0x81, 0x61,
- 0x50, 0x04, 0x50, 0x70,
- 0xc1, 0x84, 0x0e, 0x74,
- 0x4c, 0x62, 0x7e, 0x75,
- 0x06, 0x34, 0xd0, 0xa0,
- 0x88, 0x13, 0x7a, 0x80,
- 0x8a, 0x1d, 0x8c, 0x33,
- 0x00, 0x34, 0xf6, 0xa5,
- 0x0c, 0xcc, 0xfa, 0x80,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x59, 0x0c, 0x05,
- 0x91, 0x21, 0x40, 0x0a,
- 0x6e, 0x0d, 0x0c, 0x15,
- 0x5e, 0xb8, 0xc0, 0x09,
- 0x0c, 0x29, 0xef, 0xa8,
- 0x40, 0x2b, 0x65, 0x51,
- 0xe1, 0x18, 0x43, 0x46,
- 0x83, 0x51, 0x04, 0x14,
- 0x84, 0x18, 0x84, 0x48,
- 0x63, 0x7d, 0x0c, 0x35,
- 0x9e, 0x49, 0xc0, 0x0b,
- 0x8e, 0x19, 0xc9, 0x17,
- 0x02, 0x24, 0x23, 0x5f,
- 0x63, 0xf8, 0xe0, 0x90,
- 0x04, 0x54, 0x6f, 0xa8,
- 0x46, 0x78, 0xe8, 0x90,
- 0x80, 0x8b, 0x6f, 0xe8,
- 0x60, 0x10, 0x02, 0x06,
- 0x65, 0x98, 0x90, 0x2b,
- 0x8e, 0x3b, 0x6f, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4b, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xc0,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x64, 0xc1, 0x00, 0x39,
- 0x02, 0x16, 0x40, 0x2b,
- 0x40, 0x11, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x19, 0x83, 0x41,
- 0xc0, 0x15, 0x62, 0x19,
- 0x66, 0x35, 0x00, 0x2b,
- 0x00, 0x59, 0xc0, 0x16,
- 0xc0, 0x2b, 0x65, 0x0d,
- 0x6c, 0x75, 0x40, 0x11,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2b, 0x6c, 0x11,
- 0x70, 0x05, 0x44, 0x20,
- 0x40, 0x31, 0xc0, 0x80,
- 0x40, 0x2c, 0x6c, 0x7d,
- 0x7e, 0xf9, 0x44, 0x20,
- 0x00, 0x39, 0xc0, 0x79,
- 0xc0, 0x2b, 0x65, 0x09,
- 0x60, 0x94, 0x42, 0x4a,
- 0x40, 0x11, 0x85, 0x11,
- 0xc0, 0x22, 0x65, 0x95,
- 0x6d, 0x31, 0x40, 0x11,
- 0x02, 0x06, 0x40, 0x2c,
- 0x40, 0x41, 0xc0, 0x00,
- 0xc0, 0x2c, 0x6c, 0x8d,
- 0x6c, 0x85, 0x40, 0x51,
- 0x40, 0x23, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6d, 0x35, 0x40, 0x31,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x0c, 0x81,
- 0x0e, 0x19, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x2b, 0x0c, 0x59,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x14, 0x02, 0x29,
- 0x66, 0x35, 0x00, 0x3b,
- 0x84, 0x44, 0xc0, 0x16,
- 0x06, 0x34, 0x82, 0x29,
- 0x40, 0x45, 0xfc, 0x00,
- 0x40, 0x0b, 0x63, 0x15,
- 0x40, 0x33, 0xa4, 0x3f,
- 0x40, 0x16, 0x66, 0x35,
- 0xef, 0xdc, 0x08, 0x86,
- 0x60, 0x24, 0x02, 0x29,
- 0xfc, 0x0c, 0x06, 0x34,
- 0xc2, 0x27, 0x90, 0x58,
- 0x4a, 0x50, 0x04, 0x29,
- 0xa4, 0x5f, 0xf3, 0xf4,
- 0x02, 0x29, 0x90, 0x56,
- 0xc6, 0x27, 0xe0, 0x28,
- 0xa6, 0x2f, 0x90, 0x29,
- 0x66, 0x35, 0x40, 0x23,
- 0x04, 0x24, 0x40, 0x16,
- 0x02, 0x39, 0xfc, 0x10,
- 0xc8, 0x37, 0xe0, 0x2c,
- 0xa4, 0x3f, 0xa0, 0x39,
- 0x66, 0x35, 0x40, 0x33,
- 0x46, 0x30, 0x40, 0x16,
- 0xc0, 0xff, 0x73, 0x7d,
- 0xe0, 0x30, 0x02, 0x29,
- 0x44, 0x20, 0xca, 0x27,
- 0x00, 0x29, 0xf0, 0x80,
- 0x40, 0x2b, 0x64, 0xc5,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0x10, 0x02, 0x39,
- 0x40, 0x31, 0xa7, 0x2b,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x00, 0x29, 0x80, 0xf5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x4a,
- 0x02, 0x29, 0x82, 0x65,
- 0x02, 0x39, 0xe0, 0x18,
- 0x40, 0x21, 0xe0, 0x20,
- 0xc0, 0x2c, 0x6c, 0x79,
- 0x66, 0x31, 0x40, 0x33,
- 0x02, 0x29, 0xc0, 0x16,
- 0x00, 0x39, 0xe0, 0x3c,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0x6d, 0x39, 0x00, 0x59,
- 0x82, 0x29, 0xc0, 0x2c,
- 0xfc, 0x00, 0x06, 0x34,
- 0x60, 0x1c, 0x02, 0x29,
- 0x40, 0x31, 0xa4, 0x3f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xfc, 0x04, 0x06, 0x34,
- 0x60, 0x40, 0x02, 0x49,
- 0xf3, 0xf8, 0x4a, 0x50,
- 0x6c, 0x89, 0x40, 0x21,
- 0x04, 0x00, 0x40, 0x2c,
- 0xc0, 0x6e, 0x64, 0xc1,
- 0x84, 0x49, 0xc2, 0x47,
- 0x40, 0x41, 0xa6, 0x4f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xf3, 0xec, 0x48, 0x40,
- 0xe0, 0x44, 0x02, 0x39,
- 0xa6, 0x5f, 0x82, 0x39,
- 0x6d, 0x39, 0x40, 0x51,
- 0x02, 0x39, 0xc0, 0x2c,
- 0xc4, 0x37, 0xe0, 0x48,
- 0xa6, 0x4f, 0x88, 0x39,
- 0x6d, 0x21, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x4c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x46, 0x30, 0xca, 0x37,
- 0x48, 0x40, 0x70, 0x80,
- 0xa6, 0x4f, 0xf3, 0x7c,
- 0x6d, 0x15, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x50,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x08, 0x44, 0x82, 0x39,
- 0xa6, 0x4f, 0xfc, 0x00,
- 0x6d, 0x51, 0x40, 0x41,
- 0x08, 0x44, 0x40, 0x2c,
- 0x02, 0x39, 0xfc, 0x04,
- 0xc2, 0x37, 0xe0, 0x54,
- 0xa8, 0x3f, 0x84, 0x39,
- 0x6d, 0x51, 0x40, 0x31,
- 0x06, 0x34, 0x40, 0x2c,
- 0x02, 0x49, 0xfc, 0x08,
- 0xc4, 0x47, 0xe0, 0x58,
- 0xa8, 0x3f, 0x88, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x46, 0x30, 0x40, 0x2c,
- 0x02, 0x49, 0xf3, 0xdc,
- 0xc6, 0x47, 0xe0, 0x5c,
- 0xa8, 0x3f, 0x90, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x9f, 0x31, 0x40, 0x2c,
- 0x02, 0x49, 0x81, 0x65,
- 0x06, 0x30, 0x60, 0x34,
- 0xc9, 0x46, 0xec, 0x04,
- 0xfe, 0x55, 0xa1, 0x3b,
- 0xe0, 0x38, 0x02, 0x29,
- 0x68, 0xfd, 0x40, 0x21,
- 0x02, 0x19, 0xc0, 0x1b,
- 0x40, 0x11, 0xe0, 0x34,
- 0xc0, 0x22, 0x6f, 0xb9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0a, 0x6d, 0x65,
- 0x62, 0x19, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x65, 0xb9, 0x0c, 0x39,
- 0x3c, 0x0e, 0xc0, 0x2b,
- 0x11, 0x16, 0x81, 0x01,
- 0x0f, 0x36, 0x83, 0x11,
- 0x8b, 0x06, 0xa3, 0x2b,
- 0x82, 0x25, 0x8d, 0x16,
- 0x82, 0x85, 0xa7, 0x2b,
- 0x5e, 0x11, 0xa5, 0x2b,
- 0x04, 0x26, 0x00, 0x24,
- 0x80, 0x85, 0x80, 0x00,
- 0x45, 0xf6, 0x13, 0x06,
- 0x03, 0x45, 0xe0, 0x0c,
- 0x0c, 0x4b, 0x83, 0x31,
- 0x40, 0x15, 0x6e, 0x09,
- 0x0c, 0x25, 0xfd, 0x51,
- 0xc0, 0x0d, 0x69, 0x65,
- 0x21, 0x2b, 0xcb, 0x47,
- 0x06, 0x0c, 0x85, 0x21,
- 0xc8, 0x4b, 0x62, 0x00,
- 0x04, 0x16, 0x13, 0x36,
- 0x46, 0x42, 0xc0, 0x00,
- 0x0c, 0x49, 0xf9, 0x94,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x8b, 0x21, 0x09, 0x26,
- 0x00, 0x16, 0x27, 0x06,
- 0xc0, 0x40, 0x70, 0x11,
- 0x82, 0x49, 0x0b, 0x0e,
- 0x8c, 0x0b, 0x15, 0x36,
- 0x99, 0x36, 0x97, 0x36,
- 0x9d, 0x26, 0x9b, 0x16,
- 0xa1, 0x16, 0x9f, 0x46,
- 0xa5, 0x16, 0xa3, 0x16,
- 0xef, 0xfc, 0x69, 0x68,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x6d, 0x88,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x70, 0x00, 0x02, 0x16,
- 0xe0, 0x04, 0x04, 0x06,
- 0x81, 0x01, 0x00, 0x6b,
- 0x83, 0x11, 0x3e, 0x1e,
- 0x8b, 0x21, 0x11, 0x26,
- 0x9b, 0x16, 0xbc, 0x0e,
- 0x9f, 0x06, 0x9d, 0x26,
- 0xa3, 0x06, 0xa1, 0x16,
- 0xa7, 0x06, 0xa5, 0x06,
- 0xab, 0x16, 0xa9, 0x16,
- 0xaf, 0x06, 0xad, 0x16,
- 0x8c, 0x0b, 0x13, 0x06,
- 0x97, 0x16, 0x95, 0x16,
- 0x66, 0xd8, 0x99, 0x16,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x6a, 0xf8, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x61, 0xd1, 0x0c, 0x19,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0x19,
- 0x6d, 0x65, 0x0c, 0x05,
- 0x89, 0x16, 0xc0, 0x0a,
- 0x65, 0xb9, 0x0c, 0x19,
- 0x11, 0x36, 0xc0, 0x2b,
- 0x3c, 0x0e, 0x87, 0x31,
- 0x8f, 0x16, 0x81, 0x01,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x1b, 0x36, 0xc0, 0x2b,
- 0x8b, 0x06, 0x8d, 0x31,
- 0x82, 0x19, 0x0d, 0x26,
- 0x02, 0x16, 0x1f, 0x16,
- 0xc0, 0x40, 0x70, 0x11,
- 0xa1, 0x26, 0x9d, 0x36,
- 0xa5, 0x26, 0xa3, 0x26,
- 0x13, 0x06, 0xa7, 0x06,
- 0x8b, 0x1e, 0x8c, 0x0b,
- 0x97, 0x26, 0x95, 0x26,
- 0x63, 0x38, 0x99, 0x26,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x67, 0x58, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x81, 0x41, 0x40, 0x2b,
- 0x62, 0x19, 0x0c, 0x39,
- 0x0a, 0x16, 0x40, 0x15,
- 0xbc, 0x4e, 0xf0, 0x00,
- 0x61, 0x8c, 0x02, 0x04,
- 0x11, 0x36, 0x82, 0x09,
- 0xf8, 0x88, 0x42, 0x12,
- 0x8b, 0x31, 0x1f, 0x06,
- 0x8c, 0x0b, 0x3e, 0x5e,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa3, 0x46, 0xa1, 0x46,
- 0xa7, 0x16, 0xa5, 0x46,
- 0xab, 0x46, 0xa9, 0x26,
- 0xaf, 0x46, 0xad, 0x26,
- 0x95, 0x26, 0x93, 0x46,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x60, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x64, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x04, 0x16, 0x00, 0x6b,
- 0xc0, 0x04, 0x60, 0x11,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa1, 0x31, 0x40, 0x2b,
- 0x83, 0x21, 0x3e, 0x2e,
- 0x8b, 0x31, 0x11, 0x36,
- 0x60, 0x34, 0x00, 0x4a,
- 0x02, 0x0c, 0x81, 0x01,
- 0xbc, 0x0e, 0xe2, 0x00,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa1, 0x06, 0x9f, 0x06,
- 0xa5, 0x26, 0xa3, 0x06,
- 0xa9, 0x26, 0xa7, 0x16,
- 0x13, 0x06, 0xab, 0x06,
- 0xad, 0x26, 0x8c, 0x0b,
- 0x95, 0x26, 0xaf, 0x26,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x5d, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x61, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x74, 0x98, 0xe2, 0x80,
- 0x40, 0x46, 0xe8, 0x04,
- 0x0f, 0x86, 0x60, 0x04,
- 0x4c, 0x01, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x81, 0x95, 0x8c, 0x8b,
- 0x63, 0x81, 0x10, 0x09,
- 0x40, 0xf8, 0xc0, 0x27,
- 0x61, 0x06, 0xe8, 0x00,
- 0xec, 0x04, 0x0e, 0x70,
- 0xfc, 0xf5, 0xa1, 0x7b,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0xa9, 0x15, 0xf2, 0x0c,
- 0x61, 0x84, 0x04, 0x04,
- 0xe1, 0x8c, 0x02, 0x04,
- 0x70, 0x80, 0x44, 0x20,
- 0xf0, 0x3c, 0x48, 0x00,
- 0x60, 0x84, 0x06, 0x04,
- 0x28, 0x2f, 0xa0, 0x19,
- 0x46, 0x30, 0xc6, 0x07,
- 0xa2, 0x2f, 0x71, 0x00,
- 0x72, 0x00, 0x40, 0x00,
- 0x5d, 0x93, 0xa6, 0x2f,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x60, 0x04, 0x48, 0x26,
- 0x64, 0x0c, 0x4b, 0x06,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x0d, 0x48, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0x81, 0x15, 0x85, 0x31,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x47, 0x86, 0x86, 0x7b,
- 0x52, 0x46, 0x60, 0x04,
- 0x4c, 0x31, 0xe1, 0x2c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x38, 0xad, 0x7b,
- 0xe0, 0x39, 0x81, 0xb1,
- 0x00, 0x06, 0x00, 0x36,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x47, 0x96,
- 0x6c, 0x1d, 0x4c, 0x31,
- 0x83, 0x31, 0x40, 0x2b,
- 0xa4, 0x04, 0x80, 0x36,
- 0x86, 0x85, 0x80, 0xb6,
- 0x8a, 0x05, 0xa3, 0x7b,
- 0x8c, 0xc5, 0xa5, 0x7b,
- 0x90, 0x25, 0xa7, 0x7b,
- 0x92, 0xe5, 0xa9, 0x7b,
- 0x84, 0x45, 0xab, 0x7b,
- 0x96, 0xb5, 0xa1, 0x7b,
- 0x61, 0x2c, 0x01, 0x06,
- 0x80, 0x04, 0x9f, 0x11,
- 0x01, 0x46, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xe4,
- 0x01, 0x86, 0x8b, 0xa5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xfd, 0x80,
- 0x01, 0x06, 0x89, 0xc5,
- 0x9f, 0x11, 0x61, 0x2c,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0x46,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xe4, 0x42, 0x10,
- 0x80, 0x16, 0xc4, 0x19,
- 0x01, 0x06, 0x87, 0xc5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0xcc, 0x19, 0x80, 0x18,
- 0x85, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0x83, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0xfc, 0x94, 0x02, 0x14,
- 0x81, 0xd5, 0x80, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x59, 0x88,
- 0x9a, 0x85, 0xa3, 0x0b,
- 0xe1, 0x2c, 0x54, 0xc6,
- 0x80, 0x08, 0xa8, 0x04,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x82, 0xb5, 0xb1, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x58, 0x08,
- 0x94, 0x85, 0xa3, 0x0b,
- 0xe4, 0x7d, 0x24, 0x04,
- 0x88, 0xd5, 0x80, 0x18,
- 0x81, 0x21, 0x42, 0x19,
- 0x42, 0x86, 0x00, 0x16,
- 0x71, 0x98, 0xe0, 0x3c,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x34, 0x05, 0x46,
- 0xa8, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0x88, 0x24,
- 0x48, 0x0a, 0x84, 0x48,
- 0x80, 0x85, 0xe0, 0x80,
- 0xb5, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x8e, 0x15,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xb5, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x75,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x11, 0xb6,
- 0x03, 0xb6, 0x05, 0x75,
- 0x60, 0x19, 0xe0, 0x08,
- 0x00, 0x16, 0x81, 0x21,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x68, 0x00, 0x6f, 0x48,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa8, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0xe0, 0x90, 0x48, 0x0a,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xb3, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x75, 0xb3, 0x3b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xc6, 0x40, 0x2b,
- 0x03, 0xc6, 0xe0, 0x08,
- 0x52, 0xf8, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xbc,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x73, 0xd8, 0x81, 0x81,
- 0x24, 0x04, 0xe8, 0x00,
- 0xe0, 0x08, 0x02, 0xf6,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x14,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x18, 0xc0, 0x2b,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x18,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x04, 0x48, 0x56,
- 0x64, 0x20, 0x0b, 0x86,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x08, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0xdb, 0x75, 0x8d, 0x31,
- 0x64, 0x31, 0x49, 0x06,
- 0x4b, 0xc6, 0x40, 0x20,
- 0xc0, 0x20, 0x64, 0x39,
- 0xcd, 0xc8, 0x81, 0x35,
- 0x8b, 0x4b, 0xd1, 0xc6,
- 0x8b, 0x31, 0xfe, 0xb5,
- 0xc1, 0xc3, 0xd9, 0xa5,
- 0xe0, 0x04, 0x44, 0x76,
- 0x6c, 0x1d, 0x40, 0x21,
- 0x41, 0xc6, 0x40, 0x2b,
- 0xc0, 0x20, 0x64, 0x39,
- 0x05, 0xc6, 0x01, 0x65,
- 0xc0, 0x20, 0x64, 0x3d,
- 0xc1, 0x36, 0xc5, 0x38,
- 0xfe, 0xb5, 0x85, 0x0b,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x81, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0x9a, 0x66, 0xf1,
- 0x64, 0x0d, 0x51, 0x06,
- 0xa1, 0x91, 0x40, 0x20,
- 0xe1, 0x08, 0x81, 0x75,
- 0xef, 0xfc, 0x67, 0xc8,
- 0x12, 0x90, 0x5d, 0x06,
- 0xa1, 0x9b, 0xec, 0x04,
- 0x8c, 0x0b, 0xfe, 0x35,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x87, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x69, 0x28,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x64, 0x21, 0x11, 0x86,
- 0x13, 0x86, 0x40, 0x20,
- 0x81, 0x75, 0xe0, 0x10,
- 0x65, 0xd8, 0xe1, 0x08,
- 0x5d, 0x06, 0xef, 0xfc,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x35, 0xa1, 0x9b,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x42, 0x36,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0xb1, 0x40, 0x2b,
- 0x61, 0x30, 0x55, 0xc6,
- 0x00, 0xb6, 0x81, 0x91,
- 0xe1, 0x34, 0x10, 0xc6,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x34, 0x00, 0x06,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x9e, 0x19, 0x80, 0x18,
- 0xff, 0x40, 0x42, 0x10,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa0, 0x04, 0x80, 0x96,
- 0xa1, 0x0b, 0x80, 0x08,
- 0x01, 0x46, 0x80, 0xf5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xbb, 0x0b, 0x80, 0x04,
- 0x0c, 0x29, 0x82, 0xb5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xa6,
- 0x60, 0x08, 0x03, 0xa6,
- 0x46, 0xb8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x28, 0x04, 0x8a, 0x45,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x00, 0xb6, 0x81, 0x21,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x00, 0xc6, 0xe8, 0x00,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa0, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0x80, 0x85, 0xa1, 0x4b,
- 0xbd, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x84, 0x75,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xbd, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xc6,
- 0x60, 0x08, 0x03, 0xc6,
- 0x44, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x81, 0x71, 0x80, 0x45,
- 0xe8, 0x00, 0x65, 0x28,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x96, 0x80, 0x04,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x00, 0x25, 0xa1, 0x1b,
- 0x00, 0x0b, 0x05, 0x21,
- 0x81, 0x2c, 0x43, 0xc6,
- 0x80, 0x00, 0x02, 0x15,
- 0x80, 0x00, 0x42, 0x25,
- 0xa3, 0x1b, 0x80, 0xc5,
- 0xa5, 0x1b, 0x80, 0x85,
- 0x83, 0x65, 0x82, 0x25,
- 0x65, 0x31, 0x00, 0x25,
- 0x02, 0x06, 0x40, 0x0b,
- 0x84, 0x14, 0xe1, 0x30,
- 0x00, 0x25, 0x84, 0x2e,
- 0x40, 0x0b, 0x65, 0x21,
- 0xe1, 0x2c, 0x43, 0xc6,
- 0x04, 0x2e, 0x84, 0x14,
- 0xe1, 0x30, 0x02, 0x06,
- 0x65, 0x31, 0x00, 0x05,
- 0x84, 0x14, 0xc0, 0x0b,
- 0xdd, 0x93, 0x84, 0x0e,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x18, 0x04, 0x46,
- 0x08, 0x34, 0xa5, 0x1b,
- 0x8c, 0x46, 0x81, 0x41,
- 0xa3, 0x1b, 0x88, 0x25,
- 0x43, 0x06, 0x10, 0x25,
- 0xa1, 0x1b, 0x81, 0x2c,
- 0x00, 0x39, 0x9a, 0x35,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x4b, 0xb6, 0x04, 0x14,
- 0x89, 0xc1, 0xe0, 0x0c,
- 0x84, 0x48, 0x82, 0x39,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x87, 0x31, 0x26, 0x4f,
- 0x43, 0x76, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x0c,
- 0x40, 0x2d, 0x65, 0x31,
- 0x65, 0x31, 0x00, 0x00,
- 0x07, 0xd5, 0xc0, 0xb5,
- 0x00, 0x49, 0xc2, 0x47,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x82, 0x49, 0x84, 0x34,
- 0x4a, 0x50, 0x8c, 0x58,
- 0xa8, 0x5f, 0xf3, 0xf8,
- 0x84, 0x34, 0x8c, 0x56,
- 0x65, 0x31, 0x00, 0x49,
- 0x8c, 0x58, 0xc0, 0x2d,
- 0x88, 0x49, 0xc2, 0x47,
- 0xf3, 0xec, 0x4a, 0x50,
- 0x8c, 0x56, 0xa8, 0x5f,
- 0x00, 0x49, 0x84, 0x34,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xc2, 0x47, 0x8c, 0x58,
- 0x4a, 0x50, 0x90, 0x49,
- 0xa8, 0x5f, 0xf3, 0xdc,
- 0x04, 0x14, 0x8c, 0x56,
- 0xe0, 0x08, 0x4b, 0xf6,
- 0x65, 0x35, 0x00, 0x39,
- 0x18, 0x06, 0x40, 0x2d,
- 0x84, 0x48, 0xe0, 0x04,
- 0xa0, 0x39, 0xc8, 0x37,
- 0xf3, 0xbc, 0x48, 0x40,
- 0x8f, 0x31, 0x26, 0x4f,
- 0x43, 0xf6, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x04,
- 0x40, 0x2d, 0x65, 0x35,
- 0x65, 0x35, 0x00, 0x00,
- 0xca, 0x47, 0xc0, 0xb5,
- 0x61, 0x2c, 0x4d, 0x06,
- 0x18, 0x74, 0x98, 0x4f,
- 0xfa, 0x80, 0x06, 0x34,
- 0x8a, 0x8f, 0x9c, 0x88,
- 0x9c, 0x86, 0xa8, 0x8f,
- 0x80, 0x08, 0x98, 0x44,
- 0xc5, 0x07, 0x90, 0x58,
- 0x27, 0x0f, 0x82, 0x09,
- 0xa0, 0x5f, 0x82, 0x5f,
- 0x08, 0x04, 0x90, 0x56,
- 0x80, 0x16, 0x83, 0x11,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x88, 0x04, 0x14,
- 0xe1, 0x98, 0x47, 0x86,
- 0x86, 0x19, 0x0c, 0x54,
- 0x60, 0x90, 0x08, 0x24,
- 0x64, 0xb0, 0x06, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x0a, 0x43, 0xc4, 0x47,
- 0x81, 0xd5, 0x81, 0x51,
- 0x18, 0xc0, 0x5d, 0x84,
- 0x4c, 0x85, 0xec, 0x04,
- 0xa1, 0xcb, 0xf0, 0x10,
- 0x20, 0x31, 0xfe, 0x55,
- 0x08, 0x40, 0x82, 0x51,
- 0xc0, 0x01, 0x64, 0x01,
- 0x18, 0x46, 0xa5, 0x5b,
- 0x4c, 0x40, 0x40, 0x00,
- 0x7c, 0x95, 0xdc, 0x00,
- 0xdc, 0x00, 0x4e, 0x30,
- 0x61, 0x98, 0x46, 0x86,
- 0xe0, 0x00, 0x4b, 0x86,
- 0x65, 0x16, 0x44, 0x2a,
- 0x64, 0x00, 0x00, 0x00,
- 0x0c, 0x34, 0xc0, 0x8c,
- 0xe0, 0x0c, 0x48, 0x06,
- 0x81, 0x51, 0x03, 0x35,
- 0x65, 0x12, 0x4c, 0x5a,
- 0xf0, 0xb0, 0x4e, 0x12,
- 0x00, 0x65, 0x84, 0x63,
- 0x8c, 0x73, 0x7c, 0x30,
- 0x88, 0xc1, 0x44, 0x77,
- 0x9c, 0x6e, 0x86, 0x73,
- 0xe0, 0xe0, 0x18, 0x0a,
- 0x70, 0x01, 0xfc, 0x55,
- 0xb5, 0x5b, 0x82, 0x51,
- 0x18, 0x06, 0x7e, 0x55,
- 0x81, 0x01, 0xc0, 0x00,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x88, 0x06, 0x14,
- 0xe0, 0x08, 0x0b, 0x06,
- 0x93, 0x21, 0x06, 0x19,
- 0x66, 0x96, 0x4a, 0x3a,
- 0xe0, 0x90, 0x08, 0x34,
- 0x66, 0x8a, 0x58, 0x1a,
- 0x65, 0xb0, 0x0c, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x81, 0xc1, 0x18, 0x53,
- 0x0e, 0x60, 0x83, 0x75,
- 0x89, 0x81, 0x64, 0x40,
- 0x8a, 0xab, 0x08, 0x9b,
- 0x59, 0xae, 0x81, 0x85,
- 0xec, 0x04, 0x10, 0x80,
- 0x60, 0x1c, 0x4c, 0x95,
- 0x88, 0x91, 0xc8, 0xa1,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x0a, 0x50, 0x02, 0xc1,
- 0xc0, 0x02, 0x65, 0x01,
- 0x65, 0x00, 0x08, 0x40,
- 0xa5, 0xcb, 0x8e, 0x6b,
- 0x4b, 0x86, 0xfa, 0x35,
- 0x08, 0x00, 0x60, 0x00,
- 0xc0, 0x90, 0x65, 0x80,
- 0x65, 0x16, 0x46, 0x3a,
- 0xe0, 0x0c, 0x40, 0x06,
- 0x81, 0x51, 0x03, 0x55,
- 0x65, 0x02, 0x4e, 0x5a,
- 0xf0, 0x98, 0x50, 0x12,
- 0x70, 0x98, 0x52, 0x42,
- 0x86, 0x73, 0x88, 0x61,
- 0x4e, 0x8a, 0x8e, 0x83,
- 0xa4, 0x7e, 0xe6, 0x8a,
- 0xe2, 0x30, 0x52, 0x85,
- 0xe0, 0xe0, 0x0c, 0x0a,
- 0x02, 0x51, 0xfc, 0x15,
- 0xb5, 0x5b, 0x98, 0x4b,
- 0x44, 0xe0, 0x18, 0x40,
- 0xc0, 0x00, 0x0c, 0x06,
- 0x81, 0x01, 0xfc, 0xd5,
- 0xf0, 0x3c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x44, 0x68,
- 0x8c, 0x0b, 0x80, 0x6b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0xf0, 0x05, 0xe8,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x28, 0x65, 0x41,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x2b, 0x66, 0x11,
- 0x61, 0x08, 0x03, 0x86,
- 0x84, 0x14, 0x9d, 0x21,
- 0x03, 0x06, 0x04, 0x26,
- 0x04, 0x24, 0xe1, 0x08,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x14, 0x45, 0x06,
- 0x88, 0x38, 0x88, 0x24,
- 0x08, 0x36, 0xc8, 0x39,
- 0x60, 0x01, 0x06, 0x06,
- 0x00, 0x25, 0xc0, 0x40,
- 0xc0, 0x0a, 0x6e, 0xf1,
- 0xa1, 0x21, 0x47, 0x2d,
- 0x08, 0x05, 0x00, 0x29,
- 0x01, 0x46, 0x00, 0x27,
- 0x80, 0x04, 0xe1, 0x28,
- 0x01, 0x06, 0x00, 0x26,
- 0x80, 0x04, 0xe1, 0x28,
- 0xdd, 0x93, 0x80, 0x16,
- 0xe1, 0x28, 0x03, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x87, 0x2b, 0x84, 0x38,
- 0x02, 0x20, 0xfe, 0xb5,
- 0x40, 0x11, 0xed, 0x5c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x43, 0x56,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x39, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x60, 0x08, 0x43, 0x66,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x59, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0x60, 0x08, 0x43, 0x96,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x35,
- 0x62, 0xf1, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x1b, 0x65, 0x5d,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0x06, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0xc6, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0xc6, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x01, 0x86, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x61, 0x38, 0x4b, 0xc6,
- 0x14, 0x34, 0x85, 0x61,
- 0x8c, 0x48, 0xa1, 0x2b,
- 0xf3, 0xec, 0x48, 0x40,
- 0x48, 0x46, 0x0c, 0x46,
- 0x10, 0xc4, 0xe1, 0x44,
- 0xb0, 0x36, 0x81, 0x31,
- 0xb0, 0x66, 0x90, 0xc4,
- 0x30, 0x36, 0x90, 0xc4,
- 0xe1, 0x44, 0x58, 0x86,
- 0x6e, 0x01, 0x00, 0x0b,
- 0xb0, 0xc4, 0xc0, 0x15,
- 0x66, 0x86, 0x40, 0x0a,
- 0xb0, 0x0e, 0x87, 0x11,
- 0x00, 0x16, 0x90, 0x04,
- 0xe1, 0x3c, 0x00, 0x06,
- 0x84, 0xc8, 0x80, 0x14,
- 0x84, 0xc6, 0xc8, 0xc9,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x94, 0x04, 0x80, 0x16,
- 0xc8, 0x19, 0x80, 0x18,
- 0x80, 0xe5, 0x80, 0x16,
- 0x80, 0x18, 0x90, 0x04,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x80, 0x36, 0xfe, 0xa5,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x44, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x43, 0xe6, 0x02, 0x9b,
- 0x08, 0x6b, 0xe0, 0x04,
- 0x40, 0x11, 0x86, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0xb8, 0x84, 0x8b,
- 0x42, 0x06, 0xe8, 0x00,
- 0xc2, 0x67, 0x61, 0x18,
- 0x84, 0x69, 0x04, 0x14,
- 0x42, 0x46, 0x04, 0x96,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x86, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x06, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x10,
- 0x44, 0x20, 0x84, 0x28,
- 0xac, 0x2f, 0xf3, 0xf4,
- 0x0c, 0x0c, 0x84, 0x26,
- 0x83, 0xf5, 0xf2, 0x9c,
- 0x61, 0x14, 0x41, 0x06,
- 0xe1, 0x14, 0x47, 0x86,
- 0x81, 0x41, 0x00, 0x14,
- 0x84, 0x18, 0x84, 0x28,
- 0xcb, 0x27, 0x8c, 0x34,
- 0x82, 0x19, 0x04, 0x29,
- 0xa4, 0x1f, 0x0c, 0x5a,
- 0x80, 0x34, 0x8c, 0x4c,
- 0x8c, 0x48, 0xe0, 0x57,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x00, 0x34, 0x8c, 0x46,
- 0xf9, 0x84, 0x40, 0x52,
- 0x42, 0x40, 0x8c, 0x48,
- 0x8c, 0x16, 0xf2, 0xfc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x14, 0x43, 0x86,
- 0xe1, 0xc0, 0x04, 0x04,
- 0x48, 0x00, 0x04, 0x14,
- 0xca, 0x07, 0xf0, 0x04,
- 0xf1, 0x00, 0x40, 0x00,
- 0x43, 0x06, 0x04, 0x2c,
- 0x84, 0x24, 0xe1, 0x14,
- 0x46, 0x30, 0x88, 0x38,
- 0xa8, 0x3f, 0xf3, 0xf8,
- 0x84, 0x14, 0x88, 0x36,
- 0x44, 0x20, 0x84, 0x28,
- 0xa0, 0x2f, 0xf2, 0xfc,
- 0xdd, 0x93, 0x84, 0x26,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x9b,
- 0x06, 0x6b, 0xe0, 0x04,
- 0x52, 0x01, 0x84, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7b, 0xd8, 0x82, 0x8b,
- 0x12, 0x29, 0xef, 0xfc,
- 0x40, 0x2c, 0x6e, 0x95,
- 0xe1, 0x1c, 0x02, 0x46,
- 0xc8, 0x87, 0x04, 0x14,
- 0x71, 0xc0, 0x48, 0x80,
- 0x04, 0x26, 0x9e, 0x79,
- 0xe1, 0x18, 0x43, 0x46,
- 0x88, 0x38, 0x84, 0x24,
- 0xf2, 0x3c, 0x46, 0x30,
- 0x88, 0x36, 0xa8, 0x3f,
- 0x84, 0x28, 0x84, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x04, 0x26, 0xae, 0x2f,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x84, 0x66, 0x84, 0x14,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0xa5,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x65, 0x35, 0x0e, 0x39,
- 0x0e, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x3d, 0x0e, 0x19,
- 0x7c, 0x58, 0xc0, 0x2b,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0x66, 0xb8, 0x8c, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x00, 0x27, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x41, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x43, 0xa6,
- 0x6f, 0xfc, 0x7d, 0x88,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xa4, 0xd5, 0xa1, 0x7b,
- 0x65, 0x3d, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x35, 0x0c, 0x09,
- 0x64, 0xb8, 0xc0, 0x2b,
- 0x00, 0x8b, 0xef, 0xa0,
- 0xe1, 0x04, 0x01, 0x46,
- 0x90, 0x2b, 0x00, 0x04,
- 0x0c, 0xa5, 0x80, 0x94,
- 0xc0, 0x09, 0x6e, 0x0d,
- 0x65, 0x41, 0x0c, 0x39,
- 0x92, 0x0b, 0xc0, 0x2b,
- 0x6f, 0xa0, 0x64, 0x88,
- 0x4c, 0x05, 0x94, 0x1b,
- 0x40, 0x0b, 0x63, 0x6d,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x49,
- 0x63, 0xd8, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x63, 0x65, 0x4c, 0x05,
- 0x92, 0x0b, 0x40, 0x0b,
- 0x65, 0x45, 0x0c, 0x39,
- 0x94, 0x1b, 0x40, 0x2b,
- 0x6f, 0xa0, 0x63, 0x28,
- 0x4c, 0x05, 0x90, 0x2b,
- 0x40, 0x0b, 0x63, 0x71,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x4d,
- 0x62, 0x78, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x6d, 0x59, 0x0c, 0x15,
- 0x91, 0x21, 0x40, 0x0a,
- 0x63, 0x69, 0x4c, 0x05,
- 0x02, 0x0b, 0xc0, 0x0b,
- 0x5e, 0xf8, 0x94, 0x1b,
- 0x4c, 0x05, 0xef, 0xa0,
- 0x40, 0x06, 0x6d, 0x49,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x4c, 0x05, 0x84, 0x14,
- 0xc0, 0x08, 0x69, 0x41,
- 0x6b, 0x1d, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x08,
- 0xc0, 0x08, 0x6b, 0xf1,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x1b, 0x65, 0x71,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x65, 0x51,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x6c, 0xa1,
- 0x43, 0x46, 0x04, 0x08,
- 0x84, 0x14, 0xe1, 0x18,
- 0x6f, 0xf1, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x1b, 0x65, 0x75,
- 0x9e, 0x09, 0x84, 0x08,
- 0x65, 0x55, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x22, 0x6c, 0xa5,
- 0x9e, 0x09, 0x84, 0x08,
- 0x6f, 0xf5, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x79, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x1b,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x59, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6c, 0xa9, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6f, 0xf9, 0x4c, 0x01,
- 0x40, 0x78, 0xc0, 0x22,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x68, 0xb1, 0x00, 0x1b,
- 0x06, 0x0e, 0x40, 0x0a,
- 0xc3, 0xd0, 0x64, 0x01,
- 0xe1, 0x84, 0x04, 0x14,
- 0x6c, 0x79, 0x00, 0x39,
- 0x86, 0x23, 0x40, 0x2c,
- 0xe0, 0x06, 0x42, 0x2a,
- 0xe1, 0x84, 0x04, 0x34,
- 0x42, 0x2a, 0x82, 0x23,
- 0x00, 0x2b, 0xe0, 0x0e,
- 0xc0, 0x0a, 0x68, 0xb5,
- 0x02, 0x06, 0xc4, 0x1d,
- 0x42, 0x12, 0x80, 0x00,
- 0x40, 0x15, 0xd1, 0x88,
- 0xc0, 0x0b, 0x63, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x64, 0xc1,
- 0x65, 0x51, 0x0c, 0x99,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0xc9,
- 0xec, 0x04, 0x00, 0x10,
- 0xc7, 0x97, 0x65, 0x0d,
- 0x81, 0x01, 0x02, 0x15,
- 0x0c, 0x09, 0xa7, 0x1b,
- 0xc0, 0x2c, 0x0e, 0x31,
- 0x83, 0x01, 0x80, 0xb5,
- 0x6e, 0x31, 0x4c, 0x01,
- 0x0c, 0x09, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x8e, 0x93, 0x02, 0x75,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x05, 0x4d, 0x00, 0x60,
- 0x01, 0xc5, 0x80, 0xad,
- 0x05, 0x49, 0x00, 0x60,
- 0x40, 0x4a, 0xc0, 0xad,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x88, 0xc0, 0xad,
- 0x6f, 0xa0, 0x4e, 0x08,
- 0x02, 0x94, 0x90, 0x0b,
- 0x81, 0x41, 0x7a, 0x80,
- 0x61, 0x02, 0x46, 0x1a,
- 0x10, 0x1b, 0x8c, 0x0b,
- 0x64, 0xb8, 0x8e, 0x2b,
- 0x0c, 0x09, 0xef, 0xfc,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0xc8, 0x07, 0xc0, 0x2b,
- 0x6a, 0xa9, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x0d,
- 0xc0, 0x11, 0x62, 0x99,
- 0x66, 0x49, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x11,
- 0x40, 0x11, 0x67, 0xf1,
- 0x52, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0x85,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x6e, 0x31, 0x00, 0x19,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0x82, 0x45, 0xa1, 0x1b,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x05, 0xa1, 0x04, 0x00,
- 0x01, 0xc5, 0x80, 0xb3,
- 0x05, 0x91, 0x04, 0x00,
- 0x42, 0x4a, 0xc0, 0xb3,
- 0x04, 0x00, 0xe0, 0x8c,
- 0x80, 0xb3, 0x05, 0xc1,
- 0x05, 0xb1, 0x04, 0x00,
- 0x00, 0x69, 0xc0, 0xb3,
- 0xc0, 0x2b, 0x64, 0xcd,
- 0x00, 0x5b, 0x88, 0x24,
- 0xc0, 0x15, 0x6a, 0xd1,
- 0x6a, 0xe1, 0x00, 0x4b,
- 0xa3, 0x6b, 0x40, 0x15,
- 0x68, 0xc9, 0x00, 0xcb,
- 0x00, 0x3b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0xcd,
- 0x04, 0x61, 0x00, 0x65,
- 0x84, 0xc5, 0x80, 0x05,
- 0x00, 0x65, 0xa5, 0x6b,
- 0x80, 0x05, 0x04, 0x5d,
- 0x00, 0x75, 0x84, 0x25,
- 0x40, 0x0b, 0x63, 0x75,
- 0x02, 0x85, 0xa7, 0x6b,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x64, 0x5d, 0x00, 0x65,
- 0xcc, 0x7d, 0xc0, 0x05,
- 0x04, 0x61, 0x00, 0x65,
- 0x4c, 0x62, 0x80, 0x05,
- 0x42, 0x4a, 0x9a, 0x9c,
- 0xd8, 0xc7, 0x60, 0x8c,
- 0x02, 0x64, 0x02, 0xe5,
- 0x58, 0x57, 0xe0, 0xb0,
- 0x4a, 0x5a, 0xd8, 0x47,
- 0x48, 0x4a, 0xe0, 0x0a,
- 0x40, 0x55, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x79,
- 0x63, 0x7d, 0x40, 0x45,
- 0x48, 0x1a, 0xc0, 0x0b,
- 0xd8, 0x1d, 0x60, 0x0a,
- 0x42, 0x12, 0x58, 0x37,
- 0x40, 0x45, 0xd1, 0xb0,
- 0x40, 0x0b, 0x63, 0x81,
- 0x48, 0x1a, 0x81, 0x41,
- 0x42, 0x3a, 0xc0, 0x0a,
- 0x40, 0x45, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x85,
- 0x63, 0x89, 0x40, 0x15,
- 0x81, 0x01, 0x40, 0x0b,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x00, 0xb6, 0x00, 0x8b,
- 0x50, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x06, 0x7b, 0x88, 0xab,
- 0x4e, 0x18, 0x84, 0x9b,
- 0x82, 0x0b, 0x6f, 0xa0,
- 0x6f, 0xa0, 0x4f, 0x68,
- 0x21, 0x0b, 0x80, 0x6b,
- 0x02, 0x06, 0xff, 0x11,
- 0xa3, 0xab, 0x00, 0x00,
- 0x82, 0x03, 0x02, 0xe5,
- 0x82, 0x95, 0xd3, 0x0d,
- 0x84, 0xa5, 0xa3, 0x7b,
- 0x50, 0x95, 0xa1, 0x7b,
- 0xc0, 0x0b, 0x05, 0x21,
- 0x50, 0x95, 0x84, 0x15,
- 0xc0, 0x0b, 0x65, 0x21,
- 0xa3, 0x7b, 0x83, 0x35,
- 0xa1, 0x7b, 0x82, 0xc5,
- 0x05, 0x21, 0x50, 0x05,
- 0x82, 0x35, 0xc0, 0x0b,
- 0x65, 0x21, 0x50, 0x05,
- 0x81, 0x85, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x95,
- 0x81, 0x45, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x05,
- 0x10, 0x0b, 0xc0, 0x0b,
- 0x73, 0x18, 0x8e, 0x1b,
- 0x5a, 0x18, 0xef, 0xf8,
- 0x0e, 0x64, 0x6f, 0xfc,
- 0x43, 0x86, 0xe1, 0xa0,
- 0x84, 0x14, 0xe1, 0x18,
- 0x43, 0xc6, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x18,
- 0x0c, 0x0c, 0x84, 0x66,
- 0x1b, 0x18, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x42, 0x27,
- 0x04, 0x24, 0x84, 0x21,
- 0x06, 0x24, 0xfa, 0x80,
- 0x82, 0x33, 0xe1, 0x84,
- 0x60, 0x0a, 0x4e, 0x3a,
- 0x00, 0x29, 0xc6, 0x2d,
- 0x40, 0x2b, 0x0c, 0x1d,
- 0xc0, 0x08, 0x42, 0x96,
- 0xcf, 0xb4, 0x73, 0xe8,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x31, 0x7d, 0x09,
- 0xe0, 0x1e, 0x40, 0x0a,
- 0xe5, 0x1a, 0x42, 0x0a,
- 0xe5, 0x9a, 0x44, 0x0a,
- 0x64, 0x81, 0x00, 0x10,
- 0x42, 0x22, 0xc7, 0xa1,
- 0x04, 0x0e, 0x72, 0x8c,
- 0xc0, 0x03, 0x74, 0x24,
- 0x6f, 0x5c, 0x74, 0x88,
- 0x0c, 0x4c, 0x81, 0x31,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x01, 0x0c, 0x12,
- 0x81, 0x11, 0x40, 0x28,
- 0x6f, 0x60, 0x5d, 0xa8,
- 0x8c, 0x0b, 0x8c, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x06, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0x86,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x66,
- 0xe0, 0x08, 0x0d, 0x66,
- 0xef, 0xb4, 0x70, 0x48,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0xc6,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x76,
- 0xe0, 0x08, 0x0d, 0x76,
- 0xef, 0xb4, 0x6e, 0x88,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0xc6, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x8e, 0x39, 0xc9, 0x37,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x86,
- 0xe0, 0x08, 0x0d, 0x86,
- 0xef, 0xb4, 0x6c, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x87, 0x1b, 0x9e, 0x39,
- 0x03, 0x96, 0x82, 0x45,
- 0x0d, 0x96, 0x60, 0x08,
- 0x6a, 0xd8, 0xe0, 0x08,
- 0xa1, 0x0b, 0xef, 0xb4,
- 0x80, 0x00, 0x0c, 0x06,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6c, 0x80, 0x04, 0x12,
- 0x81, 0x31, 0x81, 0x11,
- 0x48, 0x00, 0xc5, 0x3d,
- 0x00, 0x04, 0x50, 0x04,
- 0x42, 0x12, 0xc1, 0x84,
- 0x06, 0x30, 0x50, 0x90,
- 0xfc, 0xf5, 0xc4, 0x04,
- 0x82, 0x0b, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x19,
- 0x40, 0x86, 0x40, 0x2b,
- 0x00, 0x05, 0xc1, 0x00,
- 0x40, 0x11, 0xc0, 0x00,
- 0x84, 0x95, 0xc0, 0x00,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x63, 0x79, 0x0c, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x8c, 0x0b, 0x03, 0x41,
- 0x6f, 0xfc, 0x6d, 0xa8,
- 0x8c, 0x0b, 0x82, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x81, 0x01, 0x81, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x86, 0x00, 0x6b,
- 0x80, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2b,
- 0x00, 0x04, 0x60, 0x98,
- 0x80, 0xc5, 0xfa, 0x00,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xff, 0x11, 0x82, 0x85,
- 0x82, 0x35, 0x82, 0x0d,
- 0x66, 0xed, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x26,
- 0x02, 0x60, 0x02, 0x85,
- 0x80, 0x99, 0x06, 0xe5,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x04, 0x45, 0x02, 0x60,
- 0x02, 0x60, 0xc0, 0x9e,
- 0x80, 0xad, 0x05, 0xa9,
- 0x53, 0xf6, 0x04, 0x18,
- 0x0c, 0x39, 0xe0, 0x00,
- 0xc0, 0x2b, 0x65, 0xad,
- 0x70, 0x84, 0x44, 0x32,
- 0x05, 0x0a, 0xa6, 0x13,
- 0x16, 0x12, 0x64, 0xfc,
- 0x12, 0x24, 0xe0, 0x00,
- 0x40, 0x0a, 0x1a, 0x80,
- 0x00, 0x60, 0xe0, 0x90,
- 0x40, 0x99, 0x06, 0xf1,
- 0xc0, 0x00, 0x02, 0x06,
- 0x4f, 0x60, 0x4e, 0x68,
- 0xc0, 0x18, 0x04, 0x06,
- 0x15, 0x86, 0x0f, 0xbe,
- 0x01, 0x01, 0xe1, 0x00,
- 0x89, 0x75, 0x81, 0x71,
- 0x61, 0x00, 0x40, 0x86,
- 0xe0, 0x08, 0x42, 0x06,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xef, 0xf8, 0x7b, 0xe8,
- 0x60, 0x3c, 0x42, 0x86,
- 0x52, 0x78, 0x8c, 0x0b,
- 0x00, 0x7b, 0xef, 0xe0,
- 0x75, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xf8,
- 0x40, 0x2c, 0x6d, 0x01,
- 0xf0, 0xa0, 0x44, 0x62,
- 0xa1, 0x7b, 0x28, 0x14,
- 0x6b, 0xf1, 0x44, 0x01,
- 0x84, 0x08, 0xc0, 0x26,
- 0x41, 0xf6, 0x82, 0x65,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x64, 0x4f, 0x28,
- 0x60, 0x0c, 0x43, 0x06,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x59, 0x38, 0xef, 0xc8,
- 0x0c, 0x19, 0xef, 0xdc,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x02, 0x84, 0x82, 0x65,
- 0x04, 0x60, 0x60, 0x88,
- 0xc0, 0x99, 0x66, 0xf0,
- 0x90, 0x23, 0x04, 0x13,
- 0x44, 0xb1, 0x84, 0x0e,
- 0x0c, 0x15, 0xe4, 0x00,
- 0xc0, 0x0a, 0x6d, 0x61,
- 0x02, 0x06, 0xc2, 0x0d,
- 0x4c, 0x11, 0xc0, 0x00,
- 0xc0, 0x26, 0x06, 0xed,
- 0x82, 0xb1, 0x80, 0xd5,
- 0xfa, 0x80, 0x10, 0xb4,
- 0xec, 0xe5, 0xd2, 0x8d,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x82, 0x91, 0x40, 0x2b,
- 0xe0, 0x90, 0x42, 0x0a,
- 0xc0, 0x1c, 0x1e, 0x25,
- 0xd1, 0x88, 0x44, 0x82,
- 0x06, 0xe1, 0x4c, 0x21,
- 0x93, 0x8b, 0x40, 0x26,
- 0x0c, 0x09, 0x84, 0xf5,
- 0x40, 0x26, 0x66, 0xe5,
- 0xe1, 0x00, 0x42, 0x86,
- 0x83, 0x21, 0x04, 0x14,
- 0x66, 0xed, 0x4c, 0x21,
- 0x04, 0x06, 0xc0, 0x26,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x64, 0x4a, 0xe8,
- 0x43, 0x06, 0x81, 0x11,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xc8, 0x5c, 0x28,
- 0x42, 0x0a, 0x85, 0x95,
- 0x44, 0x86, 0x60, 0x94,
- 0x08, 0x24, 0xe1, 0x00,
- 0x04, 0x41, 0x02, 0x60,
- 0x4c, 0xb1, 0xc0, 0x9e,
- 0x40, 0x26, 0x66, 0xe5,
- 0x05, 0xb1, 0x02, 0x60,
- 0x84, 0x18, 0x80, 0xad,
- 0x02, 0x12, 0x90, 0x13,
- 0x88, 0x16, 0xec, 0xfc,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2c,
- 0xc0, 0x26, 0x66, 0xe9,
- 0x69, 0xb5, 0x4c, 0x05,
- 0x44, 0x0a, 0xc0, 0x09,
- 0x82, 0x45, 0xe0, 0x90,
- 0x6f, 0xf8, 0x6d, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x6d, 0x05, 0x4c, 0x01,
- 0x40, 0x46, 0xc0, 0x2c,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x69, 0x58, 0x8c, 0x0b,
- 0x6e, 0x38, 0xef, 0xf4,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x0c, 0x19, 0xa1, 0x0b,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x93, 0x7c, 0x42, 0x10,
- 0x0d, 0x15, 0x4c, 0x11,
- 0x81, 0x11, 0x00, 0x2c,
- 0x6c, 0x21, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x2b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x43, 0xf6, 0x40, 0x16,
- 0x4c, 0x73, 0xef, 0xfc,
- 0xc0, 0x16, 0x66, 0x71,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x19, 0x98, 0x85,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x51, 0x0c, 0x89,
- 0x0c, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0xc5, 0x17, 0x40, 0x2b,
- 0xc5, 0x27, 0xc5, 0x87,
- 0x48, 0x2a, 0x45, 0x37,
- 0x4a, 0x3a, 0xe6, 0xa2,
- 0x06, 0x44, 0xe6, 0x86,
- 0x08, 0x54, 0xfa, 0x80,
- 0x89, 0x3b, 0xfa, 0x80,
- 0x80, 0x00, 0x00, 0x16,
- 0x88, 0x8c, 0x00, 0x04,
- 0x02, 0x00, 0x10, 0xc5,
- 0x0c, 0x39, 0x8c, 0x04,
- 0x40, 0x2c, 0x6d, 0x09,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x66, 0x86, 0x44, 0x2a,
- 0xfa, 0x80, 0x08, 0x14,
- 0x81, 0x51, 0x01, 0x11,
- 0x6c, 0x04, 0x00, 0x30,
- 0x40, 0x02, 0x83, 0x31,
- 0x00, 0x09, 0xd0, 0x98,
- 0xc0, 0x2c, 0x0c, 0xa1,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x83, 0x05, 0xc0, 0x2c,
- 0x84, 0x25, 0xa1, 0x8b,
- 0x7a, 0x80, 0x18, 0x84,
- 0xe8, 0x94, 0x12, 0x34,
- 0x60, 0x32, 0x58, 0x4a,
- 0xfb, 0x80, 0x02, 0x14,
- 0x4c, 0x13, 0xb2, 0x1f,
- 0xc0, 0x16, 0x66, 0x71,
- 0x85, 0x5d, 0x98, 0x53,
- 0x83, 0x45, 0xfc, 0x15,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x4f, 0x78, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xb4,
- 0xe0, 0x08, 0x4e, 0x96,
- 0x66, 0x71, 0x0c, 0x1b,
- 0xa3, 0x0b, 0x40, 0x16,
- 0x6c, 0xe9, 0x0c, 0x09,
- 0x0e, 0x06, 0x40, 0x2c,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x7a, 0x80,
- 0x40, 0x0a, 0xfb, 0x80,
- 0xa1, 0x1f, 0xe6, 0xa2,
- 0x66, 0x71, 0x4c, 0x13,
- 0x8e, 0x0b, 0x40, 0x16,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x04, 0x42, 0x06,
- 0x84, 0x1a, 0x84, 0x14,
- 0x6e, 0x19, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x6c, 0x41, 0x00, 0x69,
- 0x9f, 0x71, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x39,
- 0x81, 0x81, 0x40, 0x2b,
- 0x6c, 0x51, 0x00, 0x49,
- 0x81, 0x91, 0x40, 0x2b,
- 0x42, 0x3a, 0xaf, 0x76,
- 0x42, 0x1a, 0xe6, 0x9a,
- 0xbe, 0x1e, 0xe0, 0x12,
- 0x6c, 0x4d, 0x00, 0x19,
- 0x3c, 0x1e, 0xc0, 0x2b,
- 0x60, 0x31, 0x02, 0x0e,
- 0x7c, 0x1e, 0xc2, 0x41,
- 0xe0, 0x40, 0x02, 0x16,
- 0x8f, 0x11, 0x0d, 0x1c,
- 0x95, 0x11, 0x1d, 0x16,
- 0x85, 0x11, 0x1f, 0x16,
- 0x8b, 0x11, 0x21, 0x16,
- 0x91, 0x11, 0x23, 0x16,
- 0x97, 0x11, 0x25, 0x16,
- 0x99, 0x11, 0x27, 0x16,
- 0x9b, 0x11, 0x29, 0x16,
- 0x9d, 0x11, 0x2b, 0x16,
- 0x81, 0x11, 0x2d, 0x16,
- 0x6c, 0x55, 0x00, 0xc9,
- 0x83, 0x65, 0xc0, 0x2b,
- 0x64, 0x20, 0x0a, 0xf0,
- 0x0a, 0x29, 0x82, 0xb1,
- 0x80, 0x23, 0xfc, 0x08,
- 0x68, 0x81, 0x44, 0x81,
- 0x82, 0x81, 0x40, 0x1b,
- 0x6c, 0x41, 0x00, 0x69,
- 0x0a, 0x64, 0xc0, 0x2b,
- 0x04, 0xb4, 0x7a, 0x80,
- 0x94, 0x53, 0xfa, 0x80,
- 0xfa, 0xb5, 0xcb, 0x2d,
- 0x00, 0x29, 0x82, 0x91,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x14, 0x94,
- 0x04, 0x94, 0xc5, 0xad,
- 0x54, 0x20, 0xc0, 0x88,
- 0xc0, 0x03, 0x13, 0xf1,
- 0x56, 0xa0, 0x7a, 0xb5,
- 0x00, 0x29, 0xdc, 0x00,
- 0x40, 0x2c, 0x6c, 0x81,
- 0xfa, 0x80, 0x18, 0xc4,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xa3, 0x2b, 0x3c, 0x24,
- 0xdf, 0xfc, 0x4f, 0xee,
- 0x68, 0xbd, 0x40, 0x71,
- 0x3e, 0x24, 0xc0, 0x1b,
- 0xfa, 0x80, 0x0a, 0x24,
- 0x60, 0x32, 0x48, 0x5a,
- 0x64, 0x80, 0x0a, 0x00,
- 0x07, 0x45, 0xc0, 0x6e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x6e, 0x19, 0x00, 0xcb,
- 0x58, 0x0a, 0xc0, 0x15,
- 0x59, 0xe6, 0xe4, 0x84,
- 0x4c, 0x50, 0x00, 0x0c,
- 0x88, 0xa5, 0x9c, 0x00,
- 0x6c, 0x79, 0x00, 0xc9,
- 0xe5, 0xcd, 0xc0, 0x2c,
- 0x94, 0xc8, 0x88, 0x35,
- 0x6c, 0x41, 0x00, 0x69,
- 0x00, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xe9,
- 0xe0, 0x1a, 0x50, 0xca,
- 0xe0, 0x0e, 0x52, 0x7a,
- 0xe1, 0x1a, 0x58, 0xca,
- 0xe6, 0x92, 0x50, 0x8a,
- 0xe1, 0x0e, 0x4c, 0x7a,
- 0x58, 0xca, 0x10, 0x93,
- 0x0e, 0x94, 0xe6, 0x8e,
- 0x50, 0x02, 0x7a, 0x80,
- 0x4e, 0x7a, 0xf0, 0x84,
- 0x8c, 0xc3, 0x66, 0x8a,
- 0x64, 0x81, 0x0c, 0x80,
- 0x8e, 0xc3, 0xc0, 0x6e,
- 0x02, 0x11, 0x98, 0xc6,
- 0x02, 0x0a, 0x82, 0x51,
- 0xf2, 0xb5, 0xe0, 0x40,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x00, 0x00, 0x10, 0x14,
- 0x00, 0x43, 0x4a, 0xb0,
- 0x00, 0x00, 0x09, 0x2c,
- 0x00, 0x00, 0x1a, 0x24,
- 0x00, 0x43, 0x54, 0xc0,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x19, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xe0,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x00,
- 0x00, 0x80, 0x02, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x11,
- 0x00, 0x80, 0x02, 0x12,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x16,
- 0x00, 0x80, 0x02, 0x17,
- 0x00, 0x80, 0x02, 0x18,
- 0x00, 0x80, 0x02, 0x19,
- 0x00, 0x80, 0x02, 0x1a,
- 0x00, 0x80, 0x02, 0x1b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x1d,
- 0x00, 0x80, 0x02, 0x1e,
- 0x00, 0x80, 0x02, 0x20,
- 0x00, 0x80, 0x02, 0x24,
- 0x00, 0x80, 0x02, 0x26,
- 0x00, 0x80, 0x02, 0x2c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x2f,
- 0x00, 0x80, 0x02, 0x46,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4c,
- 0x00, 0x80, 0x02, 0x4d,
- 0x00, 0x80, 0x02, 0x4e,
- 0x00, 0x80, 0x02, 0x51,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x53,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x57,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x59,
- 0x00, 0x80, 0x02, 0x5a,
- 0x00, 0x80, 0x02, 0x5f,
- 0x00, 0x80, 0x02, 0x60,
- 0x00, 0x80, 0x02, 0x61,
- 0x00, 0x80, 0x02, 0x62,
- 0x00, 0x80, 0x02, 0x63,
- 0x00, 0x80, 0x02, 0x64,
- 0x00, 0x80, 0x02, 0x65,
- 0x00, 0x80, 0x02, 0x66,
- 0x00, 0x80, 0x02, 0x67,
- 0x00, 0x80, 0x02, 0x68,
- 0x00, 0x80, 0x02, 0x73,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x78,
- 0x00, 0x80, 0x02, 0x7c,
- 0x00, 0x80, 0x02, 0x81,
- 0x00, 0x80, 0x02, 0x86,
- 0x00, 0x80, 0x02, 0x87,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x95,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xa3,
- 0x00, 0x80, 0x02, 0xa8,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xaa,
- 0x00, 0x80, 0x02, 0xab,
- 0x00, 0x80, 0x02, 0xac,
- 0x00, 0x80, 0x02, 0xad,
- 0x00, 0x80, 0x02, 0xae,
- 0x00, 0x80, 0x02, 0xb1,
- 0x00, 0x80, 0x02, 0xb2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xb6,
- 0x00, 0x80, 0x02, 0xb7,
- 0x00, 0x80, 0x02, 0xb8,
- 0x00, 0x80, 0x02, 0xb9,
- 0x00, 0x80, 0x02, 0xba,
- 0x00, 0x80, 0x02, 0xbb,
- 0x00, 0x80, 0x02, 0xbc,
- 0x00, 0x80, 0x02, 0xbd,
- 0x00, 0x80, 0x02, 0xbe,
- 0x00, 0x80, 0x02, 0xbf,
- 0x00, 0x80, 0x02, 0xc2,
- 0x00, 0x80, 0x02, 0xc3,
- 0x00, 0x80, 0x02, 0xc4,
- 0x00, 0x80, 0x02, 0xc5,
- 0x00, 0x80, 0x40, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x02,
- 0x00, 0x80, 0x40, 0x03,
- 0x00, 0x80, 0x40, 0x04,
- 0x00, 0x80, 0x40, 0x06,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x09,
- 0x00, 0x80, 0x40, 0x0a,
- 0x00, 0x80, 0x40, 0x0b,
- 0x00, 0x80, 0x40, 0x0c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x0e,
- 0x00, 0x80, 0x40, 0x0f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x13,
- 0x00, 0x80, 0x40, 0x14,
- 0x00, 0x80, 0x40, 0x15,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x19,
- 0x00, 0x80, 0x40, 0x1e,
- 0x00, 0x80, 0x40, 0x1f,
- 0x00, 0x80, 0x40, 0x20,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x24,
- 0x00, 0x80, 0x40, 0x25,
- 0x00, 0x80, 0x40, 0x3c,
- 0x00, 0x80, 0x40, 0x3d,
- 0x00, 0x80, 0x40, 0x3e,
- 0x00, 0x80, 0x40, 0x3f,
- 0x00, 0x80, 0x40, 0x40,
- 0x00, 0x80, 0x40, 0x41,
- 0x00, 0x80, 0x40, 0x42,
- 0x00, 0x80, 0x40, 0x43,
- 0x00, 0x80, 0x40, 0x44,
- 0x00, 0x80, 0x40, 0x45,
- 0x00, 0x80, 0x40, 0x46,
- 0x00, 0x80, 0x40, 0x47,
- 0x00, 0x80, 0x40, 0x48,
- 0x00, 0x80, 0x40, 0x49,
- 0x00, 0x80, 0x40, 0x4a,
- 0x00, 0x80, 0x40, 0x4b,
- 0x00, 0x80, 0x40, 0x4c,
- 0x00, 0x80, 0x40, 0x4d,
- 0x00, 0x80, 0x40, 0x4e,
- 0x00, 0x80, 0x40, 0x4f,
- 0x00, 0x80, 0x40, 0x50,
- 0x00, 0x80, 0x40, 0x51,
- 0x00, 0x80, 0x40, 0x52,
- 0x00, 0x80, 0x40, 0x53,
- 0x00, 0x80, 0x40, 0x54,
- 0x00, 0x80, 0x40, 0x55,
- 0x00, 0x80, 0x40, 0x56,
- 0x00, 0x80, 0x40, 0x57,
- 0x00, 0x80, 0x40, 0x58,
- 0x00, 0x80, 0x40, 0x59,
- 0x00, 0x80, 0x40, 0x5a,
- 0x00, 0x80, 0x40, 0x5b,
- 0x00, 0x80, 0x40, 0x5c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x5e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x60,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x69,
- 0x00, 0x80, 0x40, 0x6a,
- 0x00, 0x80, 0x40, 0x6b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x74,
- 0x00, 0x80, 0x40, 0x78,
- 0x00, 0x80, 0x40, 0x79,
- 0x00, 0x80, 0x40, 0x7a,
- 0x00, 0x80, 0x40, 0x7c,
- 0x00, 0x80, 0x40, 0x84,
- 0x00, 0x80, 0x40, 0x85,
- 0x00, 0x80, 0x40, 0x88,
- 0x00, 0x80, 0x40, 0x89,
- 0x00, 0x80, 0x40, 0x8e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x90,
- 0x00, 0x80, 0x40, 0x91,
- 0x00, 0x80, 0x40, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x9f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa1,
- 0x00, 0x80, 0x40, 0xa2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa8,
- 0x00, 0x80, 0x40, 0xb0,
- 0x00, 0x80, 0x40, 0xb6,
- 0x00, 0x80, 0x40, 0xd0,
- 0x00, 0x80, 0x40, 0xd1,
- 0x00, 0x80, 0x40, 0xd4,
- 0x00, 0x80, 0x40, 0xd5,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdf,
- 0x00, 0x80, 0x43, 0xdc,
- 0x00, 0x80, 0x43, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x43, 0xe4,
- 0x00, 0x80, 0x44, 0x04,
- 0x00, 0x80, 0x44, 0x28,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x44, 0x48,
- 0x00, 0x80, 0x44, 0x4c,
- 0x00, 0x80, 0x44, 0x50,
- 0x00, 0x80, 0x44, 0x54,
- 0x00, 0x80, 0x44, 0x58,
- 0x00, 0x80, 0x44, 0x5c,
- 0x00, 0x80, 0x44, 0x60,
- 0x00, 0x80, 0x44, 0x64,
- 0x00, 0x80, 0x44, 0x68,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x46, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xc8,
- 0x00, 0x80, 0x48, 0xc9,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xcb,
- 0x00, 0x80, 0x48, 0xcc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x49, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x34, 0x3c,
- 0x00, 0x80, 0x80, 0x00,
- 0x00, 0x80, 0x80, 0x01,
- 0x00, 0x80, 0x80, 0x02,
- 0x00, 0x80, 0x80, 0x06,
- 0x00, 0x80, 0x80, 0x07,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x09,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x0e,
- 0x00, 0x80, 0x80, 0x10,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x14,
- 0x00, 0x80, 0x80, 0x18,
- 0x00, 0x80, 0x80, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x2d,
- 0x00, 0x80, 0x80, 0x2e,
- 0x00, 0x80, 0x80, 0x31,
- 0x00, 0x80, 0x80, 0x32,
- 0x00, 0x80, 0x80, 0x35,
- 0x00, 0x80, 0x80, 0x36,
- 0x00, 0x80, 0x80, 0x37,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x39,
- 0x00, 0x80, 0x80, 0x3a,
- 0x00, 0x80, 0x80, 0x3b,
- 0x00, 0x80, 0x80, 0x3c,
- 0x00, 0x80, 0x80, 0x3d,
- 0x00, 0x80, 0x80, 0x3e,
- 0x00, 0x80, 0x80, 0x40,
- 0x00, 0x80, 0x80, 0x44,
- 0x00, 0x80, 0x80, 0x48,
- 0x00, 0x80, 0x80, 0x49,
- 0x00, 0x80, 0x80, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x4c,
- 0x00, 0x80, 0x80, 0x50,
- 0x00, 0x80, 0x80, 0x54,
- 0x00, 0x80, 0x80, 0x55,
- 0x00, 0x80, 0x80, 0x56,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x58,
- 0x00, 0x80, 0x80, 0x5c,
- 0x00, 0x80, 0x80, 0x60,
- 0x00, 0x80, 0x80, 0x61,
- 0x00, 0x80, 0x80, 0x62,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x64,
- 0x00, 0x80, 0x80, 0x68,
- 0x00, 0x80, 0x80, 0x6c,
- 0x00, 0x80, 0x80, 0x6d,
- 0x00, 0x80, 0x80, 0x6e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x70,
- 0x00, 0x80, 0x80, 0x74,
- 0x00, 0x80, 0x80, 0x78,
- 0x00, 0x80, 0x80, 0x79,
- 0x00, 0x80, 0x80, 0x7a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x7c,
- 0x00, 0x80, 0x80, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x88,
- 0x00, 0x80, 0x80, 0x8c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x94,
- 0x00, 0x80, 0x80, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x00, 0x80,
- 0x00, 0x80, 0x00, 0x81,
- 0x00, 0x80, 0x00, 0x82,
- 0x00, 0x80, 0x00, 0x83,
- 0x00, 0x80, 0x00, 0x84,
- 0x00, 0x80, 0x00, 0x85,
- 0x00, 0x80, 0x00, 0x86,
- 0x00, 0x80, 0x00, 0x87,
- 0x00, 0x80, 0x00, 0x88,
- 0x00, 0x80, 0x00, 0x89,
- 0x00, 0x80, 0x00, 0x8a,
- 0x00, 0x80, 0x00, 0x8b,
- 0x00, 0x80, 0x00, 0x8c,
- 0x00, 0x80, 0x00, 0x8d,
- 0x00, 0x80, 0x00, 0x8e,
- 0x00, 0x80, 0x00, 0x8f,
- 0x00, 0x80, 0x00, 0x90,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x01, 0x01,
- 0x00, 0x80, 0x01, 0x02,
- 0x00, 0x80, 0x01, 0x03,
- 0x00, 0x80, 0x01, 0x04,
- 0x00, 0x80, 0x01, 0x05,
- 0x00, 0x80, 0x01, 0x06,
- 0x00, 0x80, 0x01, 0x07,
- 0x00, 0x80, 0x01, 0x0a,
- 0x00, 0x80, 0x01, 0x0c,
- 0x00, 0x81, 0x2c, 0x00,
- 0x00, 0x81, 0x2f, 0xfc,
- 0x00, 0x00, 0x0d, 0x00,
- 0x00, 0x00, 0x00, 0x64,
- 0x00, 0x00, 0xbb, 0x80,
- 0x00, 0x00, 0x1a, 0x48,
- 0x00, 0x00, 0xfb, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x17, 0xec,
- 0x00, 0x00, 0x18, 0x54,
- 0x00, 0x00, 0x18, 0xbc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x1a, 0x3f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
-
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default configuration.
- */
-
-const uint8_t VL53L5CX_DEFAULT_CONFIGURATION[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x04, 0x04,
- 0x00, 0x00, 0x08, 0x08,
- 0xAD, 0x30, 0x00, 0x80,
- 0x02, 0x01, 0x03, 0x03,
- 0x00, 0x00, 0x03, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x40, 0x00, 0x40,
- 0x01, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x01, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x00, 0x27, 0x10,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x13, 0x00, 0x29,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_RANGING,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x0C, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x07, 0x08, 0x07,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x01,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x40, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x01, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x25, 0x80,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x02,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x00, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0xFF, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x34, 0x9B, 0x04, 0x35,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xc8
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default Xtalk data.
- */
-
-const uint8_t VL53L5CX_DEFAULT_XTALK[] = {
- 0x9f, 0xd8, 0x00, 0xc0,
- 0x03, 0x20, 0x09, 0x60,
- 0x0b, 0x08, 0x08, 0x17,
- 0x08, 0x08, 0x08, 0x03,
- 0x9f, 0xe4, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x01, 0xe0, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x9f, 0xf8, 0x00, 0x40,
- 0x17, 0x17, 0x17, 0x17,
- 0x9f, 0xfc, 0x04, 0x04,
- 0x00, 0x00, 0x46, 0xa4,
- 0x00, 0x00, 0x37, 0x66,
- 0x00, 0x00, 0x26, 0x60,
- 0x00, 0x00, 0x1c, 0xbc,
- 0x00, 0x00, 0x17, 0x73,
- 0x00, 0x00, 0x11, 0x25,
- 0x00, 0x00, 0x11, 0x07,
- 0x00, 0x00, 0x0e, 0x63,
- 0x00, 0x00, 0x8b, 0x4c,
- 0x00, 0x00, 0x60, 0xa2,
- 0x00, 0x00, 0x3d, 0xc0,
- 0x00, 0x00, 0x26, 0xaa,
- 0x00, 0x00, 0x1b, 0xc2,
- 0x00, 0x00, 0x18, 0x04,
- 0x00, 0x00, 0x14, 0x97,
- 0x00, 0x00, 0x10, 0xed,
- 0x00, 0x01, 0x28, 0x1b,
- 0x00, 0x00, 0x93, 0xf0,
- 0x00, 0x00, 0x57, 0x61,
- 0x00, 0x00, 0x30, 0x2b,
- 0x00, 0x00, 0x20, 0xaa,
- 0x00, 0x00, 0x1a, 0xb6,
- 0x00, 0x00, 0x15, 0xc3,
- 0x00, 0x00, 0x16, 0x0e,
- 0x00, 0x01, 0x7f, 0xbb,
- 0x00, 0x00, 0xad, 0x58,
- 0x00, 0x00, 0x71, 0xaf,
- 0x00, 0x00, 0x36, 0xd9,
- 0x00, 0x00, 0x22, 0xfb,
- 0x00, 0x00, 0x1c, 0x96,
- 0x00, 0x00, 0x18, 0x83,
- 0x00, 0x00, 0x17, 0x96,
- 0x00, 0x01, 0x90, 0x00,
- 0x00, 0x00, 0x97, 0xd6,
- 0x00, 0x00, 0x66, 0x3b,
- 0x00, 0x00, 0x33, 0x0a,
- 0x00, 0x00, 0x20, 0xcd,
- 0x00, 0x00, 0x19, 0x38,
- 0x00, 0x00, 0x16, 0xa5,
- 0x00, 0x00, 0x14, 0xbb,
- 0x00, 0x00, 0xaf, 0xcf,
- 0x00, 0x00, 0x65, 0x7d,
- 0x00, 0x00, 0x3d, 0x93,
- 0x00, 0x00, 0x29, 0xd1,
- 0x00, 0x00, 0x19, 0x4e,
- 0x00, 0x00, 0x15, 0xba,
- 0x00, 0x00, 0x11, 0xc6,
- 0x00, 0x00, 0x12, 0x7f,
- 0x00, 0x00, 0x73, 0x1d,
- 0x00, 0x00, 0x42, 0x2c,
- 0x00, 0x00, 0x2e, 0x82,
- 0x00, 0x00, 0x1e, 0x80,
- 0x00, 0x00, 0x18, 0x1c,
- 0x00, 0x00, 0x13, 0x2d,
- 0x00, 0x00, 0x0f, 0xc6,
- 0x00, 0x00, 0x0f, 0x85,
- 0x00, 0x00, 0x4f, 0x04,
- 0x00, 0x00, 0x33, 0xe9,
- 0x00, 0x00, 0x1f, 0x06,
- 0x00, 0x00, 0x18, 0x40,
- 0x00, 0x00, 0x13, 0x2c,
- 0x00, 0x00, 0x12, 0x97,
- 0x00, 0x00, 0x0e, 0x01,
- 0x00, 0x00, 0x0d, 0xac,
- 0xa0, 0xfc, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x0c, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x1c, 0x00, 0xc0,
- 0x00, 0x00, 0x70, 0xeb,
- 0x0c, 0x80, 0x01, 0xe0,
- 0x00, 0x00, 0x00, 0x26,
- 0xa1, 0x28, 0x09, 0x02,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x00, 0x00,
- 0x00, 0x36, 0x00, 0x03,
- 0x01, 0xd9, 0x01, 0x43,
- 0x02, 0x33, 0x02, 0x17,
- 0x02, 0x4b, 0x02, 0x41,
- 0x01, 0x17, 0x02, 0x22,
- 0x00, 0x27, 0x00, 0x5d,
- 0x00, 0x05, 0x00, 0x11,
- 0x00, 0x00, 0x00, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x4c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x54, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x5c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x64, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x6c, 0x00, 0x84,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x8c, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x05, 0x01, 0x03, 0x04
-};
-
-/**
- * @brief This buffer is used to get NVM data.
- */
-
-const uint8_t VL53L5CX_GET_NVM_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9E, 0x14, 0x00, 0xC0,
- 0x9E, 0x20, 0x01, 0x40,
- 0x9E, 0x34, 0x00, 0x40,
- 0x9E, 0x38, 0x04, 0x04,
- 0x9F, 0x38, 0x04, 0x02,
- 0x9F, 0xB8, 0x01, 0x00,
- 0x9F, 0xC8, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x02, 0x02, 0x00, 0x24
-};
-
-#endif /* VL53L5CX_BUFFERS_H_ */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h
deleted file mode 100644
index 73d44b61bdc91d1018072c8b82241e6b00cef907..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-#define VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Macro VL53L5CX_NB_THRESHOLDS indicates the number of checkers. This
- * value cannot be changed.
- */
-
-#define VL53L5CX_NB_THRESHOLDS ((uint8_t)64U)
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_DET_THRESH_CONFIG ((uint16_t)0x5488U)
-#define VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG ((uint16_t)0xB6E0U)
-#define VL53L5CX_DCI_DET_THRESH_START ((uint16_t)0xB6E8U)
-#define VL53L5CX_DCI_DET_THRESH_VALID_STATUS ((uint16_t)0xB9F0U)
-
-/**
- * @brief Macro VL53L5CX_LAST_THRESHOLD is used to indicate the end of checkers
- * programming.
- */
-
-#define VL53L5CX_LAST_THRESHOLD ((uint8_t)128U)
-
-/**
- * @brief The following macro are used to define the 'param_type' of a checker.
- * They indicate what is the measurement to catch.
- */
-
-#define VL53L5CX_DISTANCE_MM ((uint8_t)1U)
-#define VL53L5CX_SIGNAL_PER_SPAD_KCPS ((uint8_t)2U)
-#define VL53L5CX_RANGE_SIGMA_MM ((uint8_t)4U)
-#define VL53L5CX_AMBIENT_PER_SPAD_KCPS ((uint8_t)8U)
-#define VL53L5CX_NB_TARGET_DETECTED ((uint8_t)9U)
-#define VL53L5CX_TARGET_STATUS ((uint8_t)12U)
-#define VL53L5CX_NB_SPADS_ENABLED ((uint8_t)13U)
-#define VL53L5CX_MOTION_INDICATOR ((uint8_t)19U)
-
-/**
- * @brief The following macro are used to define the 'type' of a checker.
- * They indicate the window of measurements, defined by low and a high
- * thresholds.
- */
-
-#define VL53L5CX_IN_WINDOW ((uint8_t)0U)
-#define VL53L5CX_OUT_OF_WINDOW ((uint8_t)1U)
-#define VL53L5CX_LESS_THAN_EQUAL_MIN_CHECKER ((uint8_t)2U)
-#define VL53L5CX_GREATER_THAN_MAX_CHECKER ((uint8_t)3U)
-#define VL53L5CX_EQUAL_MIN_CHECKER ((uint8_t)4U)
-#define VL53L5CX_NOT_EQUAL_MIN_CHECKER ((uint8_t)5U)
-
-/**
- * @brief The following macro are used to define multiple checkers in the same
- * zone, using operators. Please note that the first checker MUST always be a OR
- * operation.
- */
-
-#define VL53L5CX_OPERATION_NONE ((uint8_t)0U)
-#define VL53L5CX_OPERATION_OR ((uint8_t)0U)
-#define VL53L5CX_OPERATION_AND ((uint8_t)2U)
-
-/**
- * @brief Structure VL53L5CX_DetectionThresholds contains a single threshold.
- * This structure is never used alone, it must be used as an array of 64
- * thresholds (defined by macro VL53L5CX_NB_THRESHOLDS).
- */
-
-typedef struct {
-
- /* Low threshold */
- int32_t param_low_thresh;
- /* High threshold */
- int32_t param_high_thresh;
- /* Measurement to catch (VL53L5CX_MEDIAN_RANGE_MM,...)*/
- uint8_t measurement;
- /* Windows type (VL53L5CX_IN_WINDOW, VL53L5CX_OUT_WINDOW, ...) */
- uint8_t type;
- /* Zone id. Please read VL53L5 user manual to find the zone id.Set macro
- * VL53L5CX_LAST_THRESHOLD to indicates the end of checkers */
- uint8_t zone_num;
- /* Mathematics operation (AND/OR). The first threshold is always OR.*/
- uint8_t mathematic_operation;
-}VL53L5CX_DetectionThresholds;
-
-/**
- * @brief This function allows indicating if the detection thresholds are
- * enabled.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_enabled : Set to 1 if enabled, or 0 if disable.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled);
-
-/**
- * @brief This function allows enable the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) enabled : Set to 1 to enable, or 0 to disable thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled);
-
-/**
- * @brief This function allows getting the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-/**
- * @brief This function allows programming the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-#endif /* VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h
deleted file mode 100644
index ea413290a3873ea37e4b0e30849d7af755f8a136..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-#define VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Motion indicator internal configuration structure.
- */
-
-typedef struct {
- int32_t ref_bin_offset;
- uint32_t detection_threshold;
- uint32_t extra_noise_sigma;
- uint32_t null_den_clip_value;
- uint8_t mem_update_mode;
- uint8_t mem_update_choice;
- uint8_t sum_span;
- uint8_t feature_length;
- uint8_t nb_of_aggregates;
- uint8_t nb_of_temporal_accumulations;
- uint8_t min_nb_for_global_detection;
- uint8_t global_indicator_format_1;
- uint8_t global_indicator_format_2;
- uint8_t spare_1;
- uint8_t spare_2;
- uint8_t spare_3;
- int8_t map_id[64];
- uint8_t indicator_format_1[32];
- uint8_t indicator_format_2[32];
-}VL53L5CX_Motion_Configuration;
-
-/**
- * @brief This function is used to initialized the motion indicator. By default,
- * indicator is programmed to monitor movements between 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-/**
- * @brief This function can be used to change the working distance of motion
- * indicator. By default, indicator is programmed to monitor movements between
- * 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint16_t) distance_min_mm : Minimum distance for indicator (min value
- * 400mm, max 4000mm).
- * @param (uint16_t) distance_max_mm : Maximum distance for indicator (min value
- * 400mm, max 4000mm).
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 if an argument is invalid.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm);
-
-/**
- * @brief This function is used to update the internal motion indicator map.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted SCI resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-#endif /* VL53L5CX_PLUGIN_MOTION_INDICATOR_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h
deleted file mode 100644
index be63e73ed5bf2a11eb8d4c8be7adda11ae7becaf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_XTALK_H_
-#define VL53L5CX_PLUGIN_XTALK_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_XTALK 2
-#else
-#define VL53L5CX_FW_NBTAR_XTALK VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief Inner Macro for plugin. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_CAL_CFG ((uint16_t)0x5470U)
-#define VL53L5CX_DCI_XTALK_CFG ((uint16_t)0xAD94U)
-
-
-/**
- * @brief This function starts the VL53L5CX sensor in order to calibrate Xtalk.
- * This calibration is recommended is user wants to use a coverglass.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) reflectance_percent : Target reflectance in percent. This
- * value is include between 1 and 99%. For a better efficiency, ST recommends a
- * 3% target reflectance.
- * @param (uint8_t) nb_samples : Nb of samples used for calibration. A higher
- * number of samples means a higher accuracy, but it increases the calibration
- * time. Minimum is 1 and maximum is 16.
- * @param (uint16_t) distance_mm : Target distance in mm. The minimum allowed
- * distance is 600mm, and maximum is 3000mm. The target must stay in Full FOV,
- * so short distance are easier for calibration.
- * @return (uint8_t) status : 0 if calibration OK, 127 if an argument has an
- * incorrect value, or 255 is something failed.
- */
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm);
-
-/**
- * @brief This function gets the Xtalk buffer. The buffer is available after
- * using the function vl53l5cx_calibrate_xtalk().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer reading OK
- */
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function sets the Xtalk buffer. This function can be used to
- * override default Xtalk buffer.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer OK
- */
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function gets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_xtalk_margin : Xtalk margin in kcps/spads.
- * @return (uint8_t) status : 0 if reading OK
- */
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin);
-
-/**
- * @brief This function sets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) xtalk_margin : New Xtalk margin in kcps/spads. Min value is
- * 0 kcps/spads, and max is 10.000 kcps/spads
- * @return (uint8_t) status : 0 if set margin is OK, or 127 is the margin is
- * invalid.
- */
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin);
-
-/**
- * @brief Command used to get Xtalk calibration data
- */
-
-static const uint8_t VL53L5CX_GET_XTALK_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9F, 0xD8, 0x00, 0xC0,
- 0x9F, 0xE4, 0x01, 0x40,
- 0x9F, 0xF8, 0x00, 0x40,
- 0x9F, 0xFC, 0x04, 0x04,
- 0xA0, 0xFC, 0x01, 0x00,
- 0xA1, 0x0C, 0x01, 0x00,
- 0xA1, 0x1C, 0x00, 0xC0,
- 0xA1, 0x28, 0x09, 0x02,
- 0xA2, 0x48, 0x00, 0x40,
- 0xA2, 0x4C, 0x00, 0x81,
- 0xA2, 0x54, 0x00, 0x81,
- 0xA2, 0x5C, 0x00, 0x81,
- 0xA2, 0x64, 0x00, 0x81,
- 0xA2, 0x6C, 0x00, 0x84,
- 0xA2, 0x8C, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x0F,
- 0x07, 0x02, 0x00, 0x44
-};
-
-/**
- * @brief Command used to get run Xtalk calibration
- */
-
-static const uint8_t VL53L5CX_CALIBRATE_XTALK[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x08, 0x08,
- 0x00, 0x00, 0x04, 0x04,
- 0xAD, 0x30, 0x00, 0x80,
- 0x03, 0x01, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x10, 0x00, 0x10,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x02, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x01, 0x00, 0x51,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x1B, 0x00, 0x21,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_XTALK,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x80, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x01, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0xA3, 0xE8, 0xA3, 0xB8,
- 0xA4, 0x38, 0xA4, 0x28,
- 0xA6, 0x48, 0xA4, 0x48,
- 0xA7, 0x88, 0xA7, 0x48,
- 0xAC, 0x10, 0xA7, 0x90,
- 0x99, 0xBC, 0x99, 0xB4,
- 0x9A, 0xFC, 0x9A, 0xBC,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x88, 0x03, 0x00,
- 0x00, 0x82, 0x00, 0x82,
- 0x04, 0x04, 0x04, 0x08,
- 0x00, 0x80, 0x04, 0x01,
- 0x09, 0x02, 0x09, 0x08,
- 0x04, 0x04, 0x00, 0x80,
- 0x04, 0x01, 0x04, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0x04, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x40, 0x00, 0x05, 0x1E,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x02,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xD4
-};
-
-#endif /* VL53L5CX_PLUGIN_XTALK_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_api.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_api.c
deleted file mode 100644
index f92ec505aaa80e6fb558a4ce4fb29e5ce9c38c7e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_api.c
+++ /dev/null
@@ -1,1333 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_buffers.h"
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to wait for an answer from VL53L5CX sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint8_t size,
- uint8_t pos,
- uint16_t address,
- uint8_t mask,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform), address,
- p_dev->temp_buffer, size);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- if(timeout >= (uint8_t)200) /* 2s timeout */
- {
- status |= (uint8_t)VL53L5CX_STATUS_TIMEOUT_ERROR;
- break;
- }else if((size >= (uint8_t)4)
- && (p_dev->temp_buffer[2] >= (uint8_t)0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[pos] & mask) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for the MCU to boot.
- */
-static uint8_t _vl53l5cx_poll_for_mcu_boot(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t go2_status0, go2_status1, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x06, &go2_status0);
- if((go2_status0 & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x07, &go2_status1);
- status |= go2_status1;
- break;
- }
- (void)VL53L5CX_WaitMs(&(p_dev->platform), 1);
- timeout++;
-
- if((go2_status0 & (uint8_t)0x1) != (uint8_t)0){
- break;
- }
-
- }while (timeout < (uint16_t)500);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the offset data gathered from NVM.
- */
-
-static uint8_t _vl53l5cx_send_offset_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t signal_grid[64];
- int16_t range_grid[64];
- uint8_t dss_4x4[] = {0x0F, 0x04, 0x04, 0x00, 0x08, 0x10, 0x10, 0x07};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x03, 0x01, 0x01, 0xE4};
- int8_t i, j;
- uint16_t k;
-
- (void)memcpy(p_dev->temp_buffer,
- p_dev->offset_data, VL53L5CX_OFFSET_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 offset */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4){
- (void)memcpy(&(p_dev->temp_buffer[0x10]), dss_4x4, sizeof(dss_4x4));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- (void)memcpy(signal_grid,&(p_dev->temp_buffer[0x3C]),
- sizeof(signal_grid));
- (void)memcpy(range_grid,&(p_dev->temp_buffer[0x140]),
- sizeof(range_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+ (int8_t)0]
- + signal_grid[(2*i)+(16*j)+(int8_t)1]
- + signal_grid[(2*i)+(16*j)+(int8_t)8]
- + signal_grid[(2*i)+(16*j)+(int8_t)9])
- /(uint32_t)4;
- range_grid[i+(4*j)] =
- (range_grid[(2*i)+(16*j)]
- + range_grid[(2*i)+(16*j)+1]
- + range_grid[(2*i)+(16*j)+8]
- + range_grid[(2*i)+(16*j)+9])
- /(int16_t)4;
- }
- }
- (void)memset(&range_grid[0x10], 0, (uint16_t)96);
- (void)memset(&signal_grid[0x10], 0, (uint16_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x3C]),
- signal_grid, sizeof(signal_grid));
- (void)memcpy(&(p_dev->temp_buffer[0x140]),
- range_grid, sizeof(range_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- }
-
- for(k = 0; k < (VL53L5CX_OFFSET_BUFFER_SIZE - (uint16_t)4); k++)
- {
- p_dev->temp_buffer[k] = p_dev->temp_buffer[k + (uint16_t)8];
- }
-
- (void)memcpy(&(p_dev->temp_buffer[0x1E0]), footer, 8);
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2e18, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the Xtalk data from generic configuration, or user's calibration.
- */
-
-static uint8_t _vl53l5cx_send_xtalk_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t res4x4[] = {0x0F, 0x04, 0x04, 0x17, 0x08, 0x10, 0x10, 0x07};
- uint8_t dss_4x4[] = {0x00, 0x78, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08};
- uint8_t profile_4x4[] = {0xA0, 0xFC, 0x01, 0x00};
- uint32_t signal_grid[64];
- int8_t i, j;
-
- (void)memcpy(p_dev->temp_buffer, &(p_dev->xtalk_data[0]),
- VL53L5CX_XTALK_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 Xtalk */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4)
- {
- (void)memcpy(&(p_dev->temp_buffer[0x8]),
- res4x4, sizeof(res4x4));
- (void)memcpy(&(p_dev->temp_buffer[0x020]),
- dss_4x4, sizeof(dss_4x4));
-
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(signal_grid, &(p_dev->temp_buffer[0x34]),
- sizeof(signal_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+0]
- + signal_grid[(2*i)+(16*j)+1]
- + signal_grid[(2*i)+(16*j)+8]
- + signal_grid[(2*i)+(16*j)+9])/(uint32_t)4;
- }
- }
- (void)memset(&signal_grid[0x10], 0, (uint32_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x34]),
- signal_grid, sizeof(signal_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(&(p_dev->temp_buffer[0x134]),
- profile_4x4, sizeof(profile_4x4));
- (void)memset(&(p_dev->temp_buffer[0x078]),0 ,
- (uint32_t)4*sizeof(uint8_t));
- }
-
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2cf8,
- p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t device_id, revision_id;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0, &device_id);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 1, &revision_id);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- if((device_id == (uint8_t)0xF0) && (revision_id == (uint8_t)0x02))
- {
- *p_is_alive = 1;
- }
- else
- {
- *p_is_alive = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t pipe_ctrl[] = {VL53L5CX_NB_TARGET_PER_ZONE, 0x00, 0x01, 0x00};
- uint32_t single_range = 0x01;
-
- p_dev->default_xtalk = (uint8_t*)VL53L5CX_DEFAULT_XTALK;
- p_dev->default_configuration = (uint8_t*)VL53L5CX_DEFAULT_CONFIGURATION;
- p_dev->is_auto_stop_enabled = (uint8_t)0x0;
-
- /* SW reboot sequence */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0009, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x03);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7FFF, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x01);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x43);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 1);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x01);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 100);
-
- /* Wait for sensor booted (several ms required to get sensor ready ) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x06, 0xff, 1);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000E, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Enable FW access */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Enable host access to GO1 */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Power ON status */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x400F, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x43);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x219, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21B, 0x00);
-
- /* Wake up MCU */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x07);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x06);
-
- /* Download FW into VL53L5 */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x09);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0a);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x8000],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0b);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x10000],0x5000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
-
- /* Check if FW correctly downloaded */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Reset MCU and wait boot */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x114, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x115, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x116, 0x42);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x117, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x01);
- status |= _vl53l5cx_poll_for_mcu_boot(p_dev);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Get offset NVM data and store them into the offset buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fd8,
- (uint8_t*)VL53L5CX_GET_NVM_CMD, sizeof(VL53L5CX_GET_NVM_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 0,
- VL53L5CX_UI_CMD_STATUS, 0xff, 2);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, VL53L5CX_NVM_DATA_SIZE);
- (void)memcpy(p_dev->offset_data, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |= _vl53l5cx_send_offset_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Set default Xtalk shape. Send Xtalk to sensor */
- (void)memcpy(p_dev->xtalk_data, (uint8_t*)VL53L5CX_DEFAULT_XTALK,
- VL53L5CX_XTALK_BUFFER_SIZE);
- status |= _vl53l5cx_send_xtalk_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Send default configuration to VL53L5CX firmware */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- sizeof(VL53L5CX_DEFAULT_CONFIGURATION));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&pipe_ctrl,
- VL53L5CX_DCI_PIPE_CONTROL, (uint16_t)sizeof(pipe_ctrl));
-#if VL53L5CX_NB_TARGET_PER_ZONE != 1
- tmp = VL53L5CX_NB_TARGET_PER_ZONE;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FW_NB_TARGET, 16,
- (uint8_t*)&tmp, 1, 0x0C);
-#endif
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- tmp = (uint8_t)1;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x26);
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x25);
-
-exit:
- return status;
-}
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4, (uint8_t)(i2c_address >> 1));
- p_dev->platform.address = i2c_address;
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x009, &tmp);
-
- switch(tmp)
- {
- case 0x4:
- *p_power_mode = VL53L5CX_POWER_MODE_WAKEUP;
- break;
- case 0x2:
- *p_power_mode = VL53L5CX_POWER_MODE_SLEEP;
-
- break;
- default:
- *p_power_mode = 0;
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode)
-{
- uint8_t current_power_mode, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_power_mode(p_dev, ¤t_power_mode);
- if(power_mode != current_power_mode)
- {
- switch(power_mode)
- {
- case VL53L5CX_POWER_MODE_WAKEUP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 1);
- break;
-
- case VL53L5CX_POWER_MODE_SLEEP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x02);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 0);
- break;
-
- default:
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint16_t tmp;
- uint32_t i;
- uint32_t header_config[2] = {0, 0};
-
- union Block_header *bh_ptr;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
- p_dev->streamcount = 255;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x00000007U,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={VL53L5CX_START_BH,
- VL53L5CX_METADATA_BH,
- VL53L5CX_COMMONDATA_BH,
- VL53L5CX_AMBIENT_RATE_BH,
- VL53L5CX_SPAD_COUNT_BH,
- VL53L5CX_NB_TARGET_DETECTED_BH,
- VL53L5CX_SIGNAL_RATE_BH,
- VL53L5CX_RANGE_SIGMA_MM_BH,
- VL53L5CX_DISTANCE_BH,
- VL53L5CX_REFLECTANCE_BH,
- VL53L5CX_TARGET_STATUS_BH,
- VL53L5CX_MOTION_DETECT_BH};
-
- /* Enable selected outputs in the 'platform.h' file */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- output_bh_enable[0] += (uint32_t)8;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- output_bh_enable[0] += (uint32_t)16;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- output_bh_enable[0] += (uint32_t)32;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- output_bh_enable[0] += (uint32_t)64;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- output_bh_enable[0] += (uint32_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- output_bh_enable[0] += (uint32_t)256;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- output_bh_enable[0] += (uint32_t)512;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- output_bh_enable[0] += (uint32_t)1024;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- output_bh_enable[0] += (uint32_t)2048;
-#endif
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint16_t)((uint16_t)resolution
- * (uint16_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output), VL53L5CX_DCI_OUTPUT_LIST,
- (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output_bh_enable), VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- /* Start xshut bypass (interrupt mode) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x05);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), VL53L5CX_UI_CMD_END -
- (uint16_t)(4 - 1), (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- /* Read ui range data content and compare if data size is the correct one */
- status |= vl53l5cx_dci_read_data(p_dev,
- (uint8_t*)p_dev->temp_buffer, 0x5440, 12);
- (void)memcpy(&tmp, &(p_dev->temp_buffer[0x8]), sizeof(tmp));
- if(tmp != p_dev->data_read_size)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp = 0, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
- uint32_t auto_stop_flag = 0;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x2FFC, (uint8_t*)&auto_stop_flag, 4);
- if((auto_stop_flag != (uint32_t)0x4FF)
- && (p_dev->is_auto_stop_enabled == (uint8_t)0))
- {
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Provoke MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x16);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x01);
-
- /* Poll for G02 status 0 MCU stop */
- while(((tmp & (uint8_t)0x80) >> 7) == (uint8_t)0x00)
- {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
- timeout++; /* Timeout reached after 5 seconds */
-
- if(timeout > (uint16_t)500)
- {
- status |= tmp;
- break;
- }
- }
- }
-
- /* Check GO2 status 1 if status is still OK */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- if((tmp & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7, &tmp);
- if((tmp != (uint8_t)0x84) && (tmp != (uint8_t)0x85)){
- status |= tmp;
- }
- }
-
- /* Undo MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x00);
-
- /* Stop xshut bypass */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0, p_dev->temp_buffer, 4);
-
- if((p_dev->temp_buffer[0] != p_dev->streamcount)
- && (p_dev->temp_buffer[0] != (uint8_t)255)
- && (p_dev->temp_buffer[1] == (uint8_t)0x5)
- && ((p_dev->temp_buffer[2] & (uint8_t)0x5) == (uint8_t)0x5)
- && ((p_dev->temp_buffer[3] & (uint8_t)0x10) ==(uint8_t)0x10)
- )
- {
- *p_isReady = (uint8_t)1;
- p_dev->streamcount = p_dev->temp_buffer[0];
- }
- else
- {
- if ((p_dev->temp_buffer[3] & (uint8_t)0x80) != (uint8_t)0)
- {
- status |= p_dev->temp_buffer[2]; /* Return GO2 error status */
- }
-
- *p_isReady = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- union Block_header *bh_ptr;
- uint16_t header_id, footer_id;
- uint32_t i, j, msize;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0,
- p_dev->temp_buffer, p_dev->data_read_size);
- p_dev->streamcount = p_dev->temp_buffer[0];
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, (uint16_t)p_dev->data_read_size);
-
- /* Start conversion at position 16 to avoid headers */
- for (i = (uint32_t)16; i
- < (uint32_t)p_dev->data_read_size; i+=(uint32_t)4)
- {
- bh_ptr = (union Block_header *)&(p_dev->temp_buffer[i]);
- if ((bh_ptr->type > (uint32_t)0x1)
- && (bh_ptr->type < (uint32_t)0xd))
- {
- msize = bh_ptr->type * bh_ptr->size;
- }
- else
- {
- msize = bh_ptr->size;
- }
-
- switch(bh_ptr->idx){
- case VL53L5CX_METADATA_IDX:
- p_results->silicon_temp_degc =
- (int8_t)p_dev->temp_buffer[i + (uint32_t)12];
- break;
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- case VL53L5CX_AMBIENT_RATE_IDX:
- (void)memcpy(p_results->ambient_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- case VL53L5CX_SPAD_COUNT_IDX:
- (void)memcpy(p_results->nb_spads_enabled,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- case VL53L5CX_NB_TARGET_DETECTED_IDX:
- (void)memcpy(p_results->nb_target_detected,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- case VL53L5CX_SIGNAL_RATE_IDX:
- (void)memcpy(p_results->signal_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- case VL53L5CX_RANGE_SIGMA_MM_IDX:
- (void)memcpy(p_results->range_sigma_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- case VL53L5CX_DISTANCE_IDX:
- (void)memcpy(p_results->distance_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- case VL53L5CX_REFLECTANCE_EST_PC_IDX:
- (void)memcpy(p_results->reflectance,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- case VL53L5CX_TARGET_STATUS_IDX:
- (void)memcpy(p_results->target_status,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- case VL53L5CX_MOTION_DETEC_IDX:
- (void)memcpy(&p_results->motion_indicator,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
- default:
- break;
- }
- i += msize;
- }
-
-#ifndef VL53L5CX_USE_RAW_FORMAT
-
- /* Convert data into their real format */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_results->ambient_per_spad[i] /= (uint32_t)2048;
- }
-#endif
-
- for(i = 0; i < (uint32_t)(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE); i++)
- {
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- p_results->distance_mm[i] /= 4;
- if(p_results->distance_mm[i] < 0)
- {
- p_results->distance_mm[i] = 0;
- }
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- p_results->reflectance[i] /= (uint8_t)2;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- p_results->range_sigma_mm[i] /= (uint16_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- p_results->signal_per_spad[i] /= (uint32_t)2048;
-#endif
- }
-
- /* Set target status to 255 if no target is detected for this zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- if(p_results->nb_target_detected[i] == (uint8_t)0){
- for(j = 0; j < (uint32_t)
- VL53L5CX_NB_TARGET_PER_ZONE; j++)
- {
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- p_results->target_status
- [((uint32_t)VL53L5CX_NB_TARGET_PER_ZONE
- *(uint32_t)i) + j]=(uint8_t)255;
-#endif
- }
- }
- }
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- for(i = 0; i < (uint32_t)32; i++)
- {
- p_results->motion_indicator.motion[i] /= (uint32_t)65535;
- }
-#endif
-
-#endif
-
- /* Check if footer id and header id are matching. This allows to detect
- * corrupted frames */
- header_id = ((uint16_t)(p_dev->temp_buffer[0x8])<<8) & 0xFF00U;
- header_id |= ((uint16_t)(p_dev->temp_buffer[0x9])) & 0x00FFU;
-
- footer_id = ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)4]) << 8) & 0xFF00U;
- footer_id |= ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)3])) & 0xFFU;
-
- if(header_id != footer_id)
- {
- status |= VL53L5CX_STATUS_CORRUPTED_FRAME;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- *p_resolution = p_dev->temp_buffer[0x00]*p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- switch(resolution){
- case VL53L5CX_RESOLUTION_4X4:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 64;
- p_dev->temp_buffer[0x06] = 64;
- p_dev->temp_buffer[0x09] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 4;
- p_dev->temp_buffer[0x01] = 4;
- p_dev->temp_buffer[0x04] = 8;
- p_dev->temp_buffer[0x05] = 8;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 16;
- p_dev->temp_buffer[0x06] = 16;
- p_dev->temp_buffer[0x09] = 1;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 8;
- p_dev->temp_buffer[0x01] = 8;
- p_dev->temp_buffer[0x04] = 4;
- p_dev->temp_buffer[0x05] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
-
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= _vl53l5cx_send_offset_data(p_dev, resolution);
- status |= _vl53l5cx_send_xtalk_data(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4);
- *p_frequency_hz = p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4,
- (uint8_t*)&frequency_hz, 1, 0x01);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20);
-
- (void)memcpy(p_time_ms, &(p_dev->temp_buffer[0x0]), 4);
- *p_time_ms /= (uint32_t)1000;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t integration = integration_time_ms;
-
- /* Integration time must be between 2ms and 1000ms */
- if((integration < (uint32_t)2)
- || (integration > (uint32_t)1000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }else
- {
- integration *= (uint32_t)1000;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20,
- (uint8_t*)&integration, 4, 0x00);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev,p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16);
-
- *p_sharpener_percent = (p_dev->temp_buffer[0xD]
- *(uint8_t)100)/(uint8_t)255;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t sharpener;
-
- if(sharpener_percent >= (uint8_t)100)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- sharpener = (sharpener_percent*(uint8_t)255)/(uint8_t)100;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16,
- (uint8_t*)&sharpener, 1, 0xD);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4);
- *p_target_order = (uint8_t)p_dev->temp_buffer[0x0];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- if((target_order == (uint8_t)VL53L5CX_TARGET_ORDER_CLOSEST)
- || (target_order == (uint8_t)VL53L5CX_TARGET_ORDER_STRONGEST))
- {
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4,
- (uint8_t*)&target_order, 1, 0x0);
- }else
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- if(p_dev->temp_buffer[0x01] == (uint8_t)0x1)
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_CONTINUOUS;
- }
- else
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_AUTONOMOUS;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t single_range = 0x00;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- switch(ranging_mode)
- {
- case VL53L5CX_RANGING_MODE_CONTINUOUS:
- p_dev->temp_buffer[0x01] = 0x1;
- p_dev->temp_buffer[0x03] = 0x3;
- single_range = 0x00;
- break;
-
- case VL53L5CX_RANGING_MODE_AUTONOMOUS:
- p_dev->temp_buffer[0x01] = 0x3;
- p_dev->temp_buffer[0x03] = 0x2;
- single_range = 0x01;
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= vl53l5cx_dci_write_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, (uint16_t)8);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- return status;
-}
-
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 1;
- uint8_t analog_dynamic_pad_0 = 0;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 0;
- uint8_t analog_dynamic_pad_0 = 1;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16);
-
- *p_repeat_count = ((uint32_t)p_dev->temp_buffer[7] << 24)
- | ((uint32_t)p_dev->temp_buffer[6] << 16)
- | ((uint32_t)p_dev->temp_buffer[5] << 8)
- | (uint32_t)p_dev->temp_buffer[4];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16, (uint8_t*)&repeat_count, 4, 0x4);
- return status;
-}
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- int16_t i;
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t rd_size = (uint32_t) data_size + (uint32_t)12;
- uint8_t cmd[] = {0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0f,
- 0x00, 0x02, 0x00, 0x08};
-
- /* Check if tmp buffer is large enough */
- if((data_size + (uint16_t)12)>(uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- cmd[0] = (uint8_t)(index >> 8);
- cmd[1] = (uint8_t)(index & (uint32_t)0xff);
- cmd[2] = (uint8_t)((data_size & (uint16_t)0xff0) >> 4);
- cmd[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Request data reading from FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- (VL53L5CX_UI_CMD_END-(uint16_t)11),cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS,
- 0xff, 0x03);
-
- /* Read new data sent (4 bytes header + data_size + 8 bytes footer) */
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, rd_size);
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, data_size + (uint16_t)12);
-
- /* Copy data from FW into input structure (-4 bytes to remove header) */
- for(i = 0 ; i < (int16_t)data_size;i++){
- data[i] = p_dev->temp_buffer[i + 4];
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- int16_t i;
-
- uint8_t headers[] = {0x00, 0x00, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0f, 0x05, 0x01,
- (uint8_t)((data_size + (uint16_t)8) >> 8),
- (uint8_t)((data_size + (uint16_t)8) & (uint8_t)0xFF)};
-
- uint16_t address = (uint16_t)VL53L5CX_UI_CMD_END -
- (data_size + (uint16_t)12) + (uint16_t)1;
-
- /* Check if cmd buffer is large enough */
- if((data_size + (uint16_t)12)
- > (uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- headers[0] = (uint8_t)(index >> 8);
- headers[1] = (uint8_t)(index & (uint32_t)0xff);
- headers[2] = (uint8_t)(((data_size & (uint16_t)0xff0) >> 4));
- headers[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Copy data from structure to FW format (+4 bytes to add header) */
- VL53L5CX_SwapBuffer(data, data_size);
- for(i = (int16_t)data_size - (int16_t)1 ; i >= 0; i--)
- {
- p_dev->temp_buffer[i + 4] = data[i];
- }
-
- /* Add headers and footer */
- (void)memcpy(&p_dev->temp_buffer[0], headers, sizeof(headers));
- (void)memcpy(&p_dev->temp_buffer[data_size + (uint16_t)4],
- footer, sizeof(footer));
-
- /* Send data to FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),address,
- p_dev->temp_buffer,
- (uint32_t)((uint32_t)data_size + (uint32_t)12));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- VL53L5CX_SwapBuffer(data, data_size);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, data, index, data_size);
- (void)memcpy(&(data[new_data_pos]), new_data, new_data_size);
- status |= vl53l5cx_dci_write_data(p_dev, data, index, data_size);
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c
deleted file mode 100644
index 1f2c7d2a4b61b93ad8d7af14bfba5695744d21e8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_detection_thresholds.h"
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8);
- *p_enabled = p_dev->temp_buffer[0x1];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t grp_global_config[] = {0x01, 0x00, 0x01, 0x00};
-
- if(enabled == (uint8_t)1)
- {
- grp_global_config[0x01] = 0x01;
- tmp = 0x04;
- }
- else
- {
- grp_global_config[0x01] = 0x00;
- tmp = 0x0C;
- }
-
- /* Set global interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8,
- (uint8_t*)&grp_global_config, 4, 0x00);
-
- /* Update interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_CONFIG, 20,
- (uint8_t*)&tmp, 1, 0x11);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- /* Get thresholds configuration */
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)VL53L5CX_NB_THRESHOLDS
- *(uint16_t)sizeof(VL53L5CX_DetectionThresholds));
-
- for(i = 0; i < (uint8_t)VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh /= 4;
- p_thresholds[i].param_high_thresh /= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh /= 128;
- p_thresholds[i].param_high_thresh /= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh /= 256;
- p_thresholds[i].param_high_thresh /= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh /= 65535;
- p_thresholds[i].param_high_thresh /= 65535;
- break;
- default:
- break;
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
- uint8_t grp_valid_target_cfg[] = {0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05};
-
- for(i = 0; i < (uint8_t) VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh *= 4;
- p_thresholds[i].param_high_thresh *= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh *= 128;
- p_thresholds[i].param_high_thresh *= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh *= 256;
- p_thresholds[i].param_high_thresh *= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh *= 65535;
- p_thresholds[i].param_high_thresh *= 65535;
- break;
- default:
- break;
- }
- }
-
- /* Set valid target list */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)grp_valid_target_cfg,
- VL53L5CX_DCI_DET_THRESH_VALID_STATUS,
- (uint16_t)sizeof(grp_valid_target_cfg));
-
- /* Set thresholds configuration */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)(VL53L5CX_NB_THRESHOLDS
- *sizeof(VL53L5CX_DetectionThresholds)));
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c
deleted file mode 100644
index 5b114ee38790b2f7cfc14527bed208b947f64c4a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <math.h>
-#include "vl53l5cx_plugin_motion_indicator.h"
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- (void)memset(p_motion_config, 0, sizeof(VL53L5CX_Motion_Configuration));
-
- p_motion_config->ref_bin_offset = 13633;
- p_motion_config->detection_threshold = 2883584;
- p_motion_config->extra_noise_sigma = 0;
- p_motion_config->null_den_clip_value = 0;
- p_motion_config->mem_update_mode = 6;
- p_motion_config->mem_update_choice = 2;
- p_motion_config->sum_span = 4;
- p_motion_config->feature_length = 9;
- p_motion_config->nb_of_aggregates = 16;
- p_motion_config->nb_of_temporal_accumulations = 16;
- p_motion_config->min_nb_for_global_detection = 1;
- p_motion_config->global_indicator_format_1 = 8;
- p_motion_config->global_indicator_format_2 = 0;
- p_motion_config->spare_1 = 0;
- p_motion_config->spare_2 = 0;
- p_motion_config->spare_3 = 0;
-
- status |= vl53l5cx_motion_indicator_set_resolution(p_dev,
- p_motion_config, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- float_t tmp;
-
- if(((distance_max_mm - distance_min_mm) > (uint16_t)1500)
- || (distance_min_mm < (uint16_t)400)
- || (distance_max_mm > (uint16_t)4000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- tmp = (float_t)((((float_t)distance_min_mm/(float_t)37.5348)
- -(float_t)4.0)*(float_t)2048.5);
- p_motion_config->ref_bin_offset = (int32_t)tmp;
-
- tmp = (float_t)((((((float_t)distance_max_mm-
- (float_t)distance_min_mm)/(float_t)10.0)+(float_t)30.02784)
- /((float_t)15.01392))+(float_t)0.5);
- p_motion_config->feature_length = (uint8_t)tmp;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- switch(resolution)
- {
- case VL53L5CX_RESOLUTION_4X4:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_4X4; i++)
- {
- p_motion_config->map_id[i] = (int8_t)i;
- }
- (void)memset(p_motion_config->map_id + 16, -1, 48);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_motion_config->map_id[i] = (int8_t)((((int8_t)
- i % 8)/2) + (4*((int8_t)i/16)));
- }
- break;
-
- default:
- status |= VL53L5CX_STATUS_ERROR;
- break;
- }
-
- if (status == VL53L5CX_STATUS_OK)
- {
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c
deleted file mode 100644
index fa42fe097283fc3c986c9af076f018a321b881c7..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/BSP/Components/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_xtalk.h"
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for an answer from VL53L5 sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint16_t address,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- address, p_dev->temp_buffer, 4);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- /* 2s timeout or FW error*/
- if((timeout >= (uint8_t)200)
- || (p_dev->temp_buffer[2] >= (uint8_t) 0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[0x1]) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * program the output using the macro defined into the 'platform.h' file.
- */
-
-static uint8_t _vl53l5cx_program_output_config(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint32_t i;
- union Block_header *bh_ptr;
- uint32_t header_config[2] = {0, 0};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x0001FFFFU,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={
- 0x0000000DU,
- 0x54000040U,
- 0x9FD800C0U,
- 0x9FE40140U,
- 0x9FF80040U,
- 0x9FFC0404U,
- 0xA0FC0100U,
- 0xA10C0100U,
- 0xA11C00C0U,
- 0xA1280902U,
- 0xA2480040U,
- 0xA24C0081U,
- 0xA2540081U,
- 0xA25C0081U,
- 0xA2640081U,
- 0xA26C0084U,
- 0xA28C0082U};
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint8_t)(resolution
- * (uint8_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
-
-
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output),
- VL53L5CX_DCI_OUTPUT_LIST, (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&(output_bh_enable),
- VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- return status;
-}
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm)
-{
- uint16_t timeout = 0;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
- uint8_t continue_loop = 1, status = VL53L5CX_STATUS_OK;
-
- uint8_t resolution, frequency, target_order, sharp_prct, ranging_mode;
- uint32_t integration_time_ms, xtalk_margin;
-
- uint16_t reflectance = reflectance_percent;
- uint8_t samples = nb_samples;
- uint16_t distance = distance_mm;
-
- /* Get initial configuration */
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_get_ranging_frequency_hz(p_dev, &frequency);
- status |= vl53l5cx_get_integration_time_ms(p_dev, &integration_time_ms);
- status |= vl53l5cx_get_sharpener_percent(p_dev, &sharp_prct);
- status |= vl53l5cx_get_target_order(p_dev, &target_order);
- status |= vl53l5cx_get_xtalk_margin(p_dev, &xtalk_margin);
- status |= vl53l5cx_get_ranging_mode(p_dev, &ranging_mode);
-
- /* Check input arguments validity */
- if(((reflectance < (uint16_t)1) || (reflectance > (uint16_t)99))
- || ((distance < (uint16_t)600) || (distance > (uint16_t)3000))
- || ((samples < (uint8_t)1) || (samples > (uint8_t)16)))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- status |= vl53l5cx_set_resolution(p_dev,
- VL53L5CX_RESOLUTION_8X8);
-
- /* Send Xtalk calibration buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_CALIBRATE_XTALK,
- sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c28,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Format input argument */
- reflectance = reflectance * (uint16_t)16;
- distance = distance * (uint16_t)4;
-
- /* Update required fields */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&distance, 2, 0x00);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&reflectance, 2, 0x02);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&samples, 1, 0x04);
-
- /* Program output for Xtalk calibration */
- status |= _vl53l5cx_program_output_config(p_dev);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- VL53L5CX_UI_CMD_END - (uint16_t)(4 - 1),
- (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Wait for end of calibration */
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x0, p_dev->temp_buffer, 4);
-
- if(p_dev->temp_buffer[0] != VL53L5CX_STATUS_ERROR)
- {
- /* Coverglass too good for Xtalk calibration */
- if((p_dev->temp_buffer[2] >= (uint8_t)0x7f) &&
- (((uint16_t)(p_dev->temp_buffer[3] &
- (uint16_t)0x80) >> 7) == (uint16_t)1))
- {
- (void)memcpy(p_dev->xtalk_data,
- p_dev->default_xtalk,
- VL53L5CX_XTALK_BUFFER_SIZE);
- status |= VL53L5CX_STATUS_XTALK_FAILED;
- }
- continue_loop = (uint8_t)0;
- }
- else if(timeout >= (uint16_t)400)
- {
- status |= VL53L5CX_STATUS_ERROR;
- continue_loop = (uint8_t)0;
- }
- else
- {
- timeout++;
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 50);
- }
-
- }while (continue_loop == (uint8_t)1);
- }
-
- /* Save Xtalk data into the Xtalk buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_dev->xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8);
- (void)memcpy(&(p_dev->xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE
- - (uint16_t)8]), footer, sizeof(footer));
-
- /* Reset default buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- VL53L5CX_CONFIGURATION_SIZE);
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
-
- /* Reset initial configuration */
- status |= vl53l5cx_set_resolution(p_dev, resolution);
- status |= vl53l5cx_set_ranging_frequency_hz(p_dev, frequency);
- status |= vl53l5cx_set_integration_time_ms(p_dev, integration_time_ms);
- status |= vl53l5cx_set_sharpener_percent(p_dev, sharp_prct);
- status |= vl53l5cx_set_target_order(p_dev, target_order);
- status |= vl53l5cx_set_xtalk_margin(p_dev, xtalk_margin);
- status |= vl53l5cx_set_ranging_mode(p_dev, ranging_mode);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t status = VL53L5CX_STATUS_OK, resolution;
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_set_resolution(p_dev, VL53L5CX_RESOLUTION_8X8);
-
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer, sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE-(uint16_t)8);
- (void)memcpy(&(p_xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8]),
- footer, sizeof(footer));
-
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- (void)memcpy(p_dev->xtalk_data, p_xtalk_data, VL53L5CX_XTALK_BUFFER_SIZE);
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16);
-
- (void)memcpy(p_xtalk_margin, p_dev->temp_buffer, 4);
- *p_xtalk_margin = *p_xtalk_margin/(uint32_t)2048;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t margin_kcps = xtalk_margin;
-
- if(margin_kcps > (uint32_t)10000)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- margin_kcps = margin_kcps*(uint32_t)2048;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16,
- (uint8_t*)&margin_kcps, 4, 0x00);
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h
deleted file mode 100644
index c6eef73eddbb24c5d5e080dd38e2baf173daa04b..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h
+++ /dev/null
@@ -1,8641 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f401xe.h
- * @author MCD Application Team
- * @brief CMSIS STM32F401xE Device Peripheral Access Layer Header File.
- *
- * This file contains:
- * - Data structures and the address mapping for all peripherals
- * - peripherals registers declarations and bits definition
- * - Macros to access peripheral’s registers hardware
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS_Device
- * @{
- */
-
-/** @addtogroup stm32f401xe
- * @{
- */
-
-#ifndef __STM32F401xE_H
-#define __STM32F401xE_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-
-/** @addtogroup Configuration_section_for_CMSIS
- * @{
- */
-
-/**
- * @brief Configuration of the Cortex-M4 Processor and Core Peripherals
- */
-#define __CM4_REV 0x0001U /*!< Core revision r0p1 */
-#define __MPU_PRESENT 1U /*!< STM32F4XX provides an MPU */
-#define __NVIC_PRIO_BITS 4U /*!< STM32F4XX uses 4 Bits for the Priority Levels */
-#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
-#define __FPU_PRESENT 1U /*!< FPU present */
-
-/**
- * @}
- */
-
-/** @addtogroup Peripheral_interrupt_number_definition
- * @{
- */
-
-/**
- * @brief STM32F4XX Interrupt Number Definition, according to the selected device
- * in @ref Library_configuration_section
- */
-typedef enum
-{
-/****** Cortex-M4 Processor Exceptions Numbers ****************************************************************/
- NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
- MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */
- BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */
- UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */
- SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */
- DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */
- PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */
- SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */
-/****** STM32 specific Interrupt Numbers **********************************************************************/
- WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
- PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
- TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line */
- RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */
- FLASH_IRQn = 4, /*!< FLASH global Interrupt */
- RCC_IRQn = 5, /*!< RCC global Interrupt */
- EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
- EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
- EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */
- EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
- EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
- DMA1_Stream0_IRQn = 11, /*!< DMA1 Stream 0 global Interrupt */
- DMA1_Stream1_IRQn = 12, /*!< DMA1 Stream 1 global Interrupt */
- DMA1_Stream2_IRQn = 13, /*!< DMA1 Stream 2 global Interrupt */
- DMA1_Stream3_IRQn = 14, /*!< DMA1 Stream 3 global Interrupt */
- DMA1_Stream4_IRQn = 15, /*!< DMA1 Stream 4 global Interrupt */
- DMA1_Stream5_IRQn = 16, /*!< DMA1 Stream 5 global Interrupt */
- DMA1_Stream6_IRQn = 17, /*!< DMA1 Stream 6 global Interrupt */
- ADC_IRQn = 18, /*!< ADC1, ADC2 and ADC3 global Interrupts */
- EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
- TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break interrupt and TIM9 global interrupt */
- TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global interrupt */
- TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
- TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
- TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
- TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
- TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
- I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
- I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
- I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
- I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
- SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
- SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
- USART1_IRQn = 37, /*!< USART1 global Interrupt */
- USART2_IRQn = 38, /*!< USART2 global Interrupt */
- EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
- RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */
- OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS Wakeup through EXTI line interrupt */
- DMA1_Stream7_IRQn = 47, /*!< DMA1 Stream7 Interrupt */
- SDIO_IRQn = 49, /*!< SDIO global Interrupt */
- TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
- SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
- DMA2_Stream0_IRQn = 56, /*!< DMA2 Stream 0 global Interrupt */
- DMA2_Stream1_IRQn = 57, /*!< DMA2 Stream 1 global Interrupt */
- DMA2_Stream2_IRQn = 58, /*!< DMA2 Stream 2 global Interrupt */
- DMA2_Stream3_IRQn = 59, /*!< DMA2 Stream 3 global Interrupt */
- DMA2_Stream4_IRQn = 60, /*!< DMA2 Stream 4 global Interrupt */
- OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */
- DMA2_Stream5_IRQn = 68, /*!< DMA2 Stream 5 global interrupt */
- DMA2_Stream6_IRQn = 69, /*!< DMA2 Stream 6 global interrupt */
- DMA2_Stream7_IRQn = 70, /*!< DMA2 Stream 7 global interrupt */
- USART6_IRQn = 71, /*!< USART6 global interrupt */
- I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */
- I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */
- FPU_IRQn = 81, /*!< FPU global interrupt */
- SPI4_IRQn = 84 /*!< SPI4 global Interrupt */
-} IRQn_Type;
-
-/**
- * @}
- */
-
-#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
-#include "system_stm32f4xx.h"
-#include <stdint.h>
-
-/** @addtogroup Peripheral_registers_structures
- * @{
- */
-
-/**
- * @brief Analog to Digital Converter
- */
-
-typedef struct
-{
- __IO uint32_t SR; /*!< ADC status register, Address offset: 0x00 */
- __IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */
- __IO uint32_t CR2; /*!< ADC control register 2, Address offset: 0x08 */
- __IO uint32_t SMPR1; /*!< ADC sample time register 1, Address offset: 0x0C */
- __IO uint32_t SMPR2; /*!< ADC sample time register 2, Address offset: 0x10 */
- __IO uint32_t JOFR1; /*!< ADC injected channel data offset register 1, Address offset: 0x14 */
- __IO uint32_t JOFR2; /*!< ADC injected channel data offset register 2, Address offset: 0x18 */
- __IO uint32_t JOFR3; /*!< ADC injected channel data offset register 3, Address offset: 0x1C */
- __IO uint32_t JOFR4; /*!< ADC injected channel data offset register 4, Address offset: 0x20 */
- __IO uint32_t HTR; /*!< ADC watchdog higher threshold register, Address offset: 0x24 */
- __IO uint32_t LTR; /*!< ADC watchdog lower threshold register, Address offset: 0x28 */
- __IO uint32_t SQR1; /*!< ADC regular sequence register 1, Address offset: 0x2C */
- __IO uint32_t SQR2; /*!< ADC regular sequence register 2, Address offset: 0x30 */
- __IO uint32_t SQR3; /*!< ADC regular sequence register 3, Address offset: 0x34 */
- __IO uint32_t JSQR; /*!< ADC injected sequence register, Address offset: 0x38*/
- __IO uint32_t JDR1; /*!< ADC injected data register 1, Address offset: 0x3C */
- __IO uint32_t JDR2; /*!< ADC injected data register 2, Address offset: 0x40 */
- __IO uint32_t JDR3; /*!< ADC injected data register 3, Address offset: 0x44 */
- __IO uint32_t JDR4; /*!< ADC injected data register 4, Address offset: 0x48 */
- __IO uint32_t DR; /*!< ADC regular data register, Address offset: 0x4C */
-} ADC_TypeDef;
-
-typedef struct
-{
- __IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base address + 0x300 */
- __IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1 base address + 0x304 */
- __IO uint32_t CDR; /*!< ADC common regular data register for dual
- AND triple modes, Address offset: ADC1 base address + 0x308 */
-} ADC_Common_TypeDef;
-
-/**
- * @brief CRC calculation unit
- */
-
-typedef struct
-{
- __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */
- __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */
- uint8_t RESERVED0; /*!< Reserved, 0x05 */
- uint16_t RESERVED1; /*!< Reserved, 0x06 */
- __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */
-} CRC_TypeDef;
-
-/**
- * @brief Debug MCU
- */
-
-typedef struct
-{
- __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */
- __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */
- __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */
- __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */
-}DBGMCU_TypeDef;
-
-
-/**
- * @brief DMA Controller
- */
-
-typedef struct
-{
- __IO uint32_t CR; /*!< DMA stream x configuration register */
- __IO uint32_t NDTR; /*!< DMA stream x number of data register */
- __IO uint32_t PAR; /*!< DMA stream x peripheral address register */
- __IO uint32_t M0AR; /*!< DMA stream x memory 0 address register */
- __IO uint32_t M1AR; /*!< DMA stream x memory 1 address register */
- __IO uint32_t FCR; /*!< DMA stream x FIFO control register */
-} DMA_Stream_TypeDef;
-
-typedef struct
-{
- __IO uint32_t LISR; /*!< DMA low interrupt status register, Address offset: 0x00 */
- __IO uint32_t HISR; /*!< DMA high interrupt status register, Address offset: 0x04 */
- __IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */
- __IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
-} DMA_TypeDef;
-
-/**
- * @brief External Interrupt/Event Controller
- */
-
-typedef struct
-{
- __IO uint32_t IMR; /*!< EXTI Interrupt mask register, Address offset: 0x00 */
- __IO uint32_t EMR; /*!< EXTI Event mask register, Address offset: 0x04 */
- __IO uint32_t RTSR; /*!< EXTI Rising trigger selection register, Address offset: 0x08 */
- __IO uint32_t FTSR; /*!< EXTI Falling trigger selection register, Address offset: 0x0C */
- __IO uint32_t SWIER; /*!< EXTI Software interrupt event register, Address offset: 0x10 */
- __IO uint32_t PR; /*!< EXTI Pending register, Address offset: 0x14 */
-} EXTI_TypeDef;
-
-/**
- * @brief FLASH Registers
- */
-
-typedef struct
-{
- __IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */
- __IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x04 */
- __IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x08 */
- __IO uint32_t SR; /*!< FLASH status register, Address offset: 0x0C */
- __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */
- __IO uint32_t OPTCR; /*!< FLASH option control register , Address offset: 0x14 */
- __IO uint32_t OPTCR1; /*!< FLASH option control register 1, Address offset: 0x18 */
-} FLASH_TypeDef;
-
-/**
- * @brief General Purpose I/O
- */
-
-typedef struct
-{
- __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
- __IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */
- __IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */
- __IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
- __IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
- __IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
- __IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */
- __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
- __IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */
-} GPIO_TypeDef;
-
-/**
- * @brief System configuration controller
- */
-
-typedef struct
-{
- __IO uint32_t MEMRMP; /*!< SYSCFG memory remap register, Address offset: 0x00 */
- __IO uint32_t PMC; /*!< SYSCFG peripheral mode configuration register, Address offset: 0x04 */
- __IO uint32_t EXTICR[4]; /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */
- uint32_t RESERVED[2]; /*!< Reserved, 0x18-0x1C */
- __IO uint32_t CMPCR; /*!< SYSCFG Compensation cell control register, Address offset: 0x20 */
-} SYSCFG_TypeDef;
-
-/**
- * @brief Inter-integrated Circuit Interface
- */
-
-typedef struct
-{
- __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */
- __IO uint32_t CR2; /*!< I2C Control register 2, Address offset: 0x04 */
- __IO uint32_t OAR1; /*!< I2C Own address register 1, Address offset: 0x08 */
- __IO uint32_t OAR2; /*!< I2C Own address register 2, Address offset: 0x0C */
- __IO uint32_t DR; /*!< I2C Data register, Address offset: 0x10 */
- __IO uint32_t SR1; /*!< I2C Status register 1, Address offset: 0x14 */
- __IO uint32_t SR2; /*!< I2C Status register 2, Address offset: 0x18 */
- __IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C */
- __IO uint32_t TRISE; /*!< I2C TRISE register, Address offset: 0x20 */
- __IO uint32_t FLTR; /*!< I2C FLTR register, Address offset: 0x24 */
-} I2C_TypeDef;
-
-/**
- * @brief Independent WATCHDOG
- */
-
-typedef struct
-{
- __IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */
- __IO uint32_t PR; /*!< IWDG Prescaler register, Address offset: 0x04 */
- __IO uint32_t RLR; /*!< IWDG Reload register, Address offset: 0x08 */
- __IO uint32_t SR; /*!< IWDG Status register, Address offset: 0x0C */
-} IWDG_TypeDef;
-
-
-/**
- * @brief Power Control
- */
-
-typedef struct
-{
- __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */
- __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */
-} PWR_TypeDef;
-
-/**
- * @brief Reset and Clock Control
- */
-
-typedef struct
-{
- __IO uint32_t CR; /*!< RCC clock control register, Address offset: 0x00 */
- __IO uint32_t PLLCFGR; /*!< RCC PLL configuration register, Address offset: 0x04 */
- __IO uint32_t CFGR; /*!< RCC clock configuration register, Address offset: 0x08 */
- __IO uint32_t CIR; /*!< RCC clock interrupt register, Address offset: 0x0C */
- __IO uint32_t AHB1RSTR; /*!< RCC AHB1 peripheral reset register, Address offset: 0x10 */
- __IO uint32_t AHB2RSTR; /*!< RCC AHB2 peripheral reset register, Address offset: 0x14 */
- __IO uint32_t AHB3RSTR; /*!< RCC AHB3 peripheral reset register, Address offset: 0x18 */
- uint32_t RESERVED0; /*!< Reserved, 0x1C */
- __IO uint32_t APB1RSTR; /*!< RCC APB1 peripheral reset register, Address offset: 0x20 */
- __IO uint32_t APB2RSTR; /*!< RCC APB2 peripheral reset register, Address offset: 0x24 */
- uint32_t RESERVED1[2]; /*!< Reserved, 0x28-0x2C */
- __IO uint32_t AHB1ENR; /*!< RCC AHB1 peripheral clock register, Address offset: 0x30 */
- __IO uint32_t AHB2ENR; /*!< RCC AHB2 peripheral clock register, Address offset: 0x34 */
- __IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clock register, Address offset: 0x38 */
- uint32_t RESERVED2; /*!< Reserved, 0x3C */
- __IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
- __IO uint32_t APB2ENR; /*!< RCC APB2 peripheral clock enable register, Address offset: 0x44 */
- uint32_t RESERVED3[2]; /*!< Reserved, 0x48-0x4C */
- __IO uint32_t AHB1LPENR; /*!< RCC AHB1 peripheral clock enable in low power mode register, Address offset: 0x50 */
- __IO uint32_t AHB2LPENR; /*!< RCC AHB2 peripheral clock enable in low power mode register, Address offset: 0x54 */
- __IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Address offset: 0x58 */
- uint32_t RESERVED4; /*!< Reserved, 0x5C */
- __IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
- __IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
- uint32_t RESERVED5[2]; /*!< Reserved, 0x68-0x6C */
- __IO uint32_t BDCR; /*!< RCC Backup domain control register, Address offset: 0x70 */
- __IO uint32_t CSR; /*!< RCC clock control & status register, Address offset: 0x74 */
- uint32_t RESERVED6[2]; /*!< Reserved, 0x78-0x7C */
- __IO uint32_t SSCGR; /*!< RCC spread spectrum clock generation register, Address offset: 0x80 */
- __IO uint32_t PLLI2SCFGR; /*!< RCC PLLI2S configuration register, Address offset: 0x84 */
- uint32_t RESERVED7[1]; /*!< Reserved, 0x88 */
- __IO uint32_t DCKCFGR; /*!< RCC Dedicated Clocks configuration register, Address offset: 0x8C */
-} RCC_TypeDef;
-
-/**
- * @brief Real-Time Clock
- */
-
-typedef struct
-{
- __IO uint32_t TR; /*!< RTC time register, Address offset: 0x00 */
- __IO uint32_t DR; /*!< RTC date register, Address offset: 0x04 */
- __IO uint32_t CR; /*!< RTC control register, Address offset: 0x08 */
- __IO uint32_t ISR; /*!< RTC initialization and status register, Address offset: 0x0C */
- __IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */
- __IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */
- __IO uint32_t CALIBR; /*!< RTC calibration register, Address offset: 0x18 */
- __IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x1C */
- __IO uint32_t ALRMBR; /*!< RTC alarm B register, Address offset: 0x20 */
- __IO uint32_t WPR; /*!< RTC write protection register, Address offset: 0x24 */
- __IO uint32_t SSR; /*!< RTC sub second register, Address offset: 0x28 */
- __IO uint32_t SHIFTR; /*!< RTC shift control register, Address offset: 0x2C */
- __IO uint32_t TSTR; /*!< RTC time stamp time register, Address offset: 0x30 */
- __IO uint32_t TSDR; /*!< RTC time stamp date register, Address offset: 0x34 */
- __IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */
- __IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x3C */
- __IO uint32_t TAFCR; /*!< RTC tamper and alternate function configuration register, Address offset: 0x40 */
- __IO uint32_t ALRMASSR;/*!< RTC alarm A sub second register, Address offset: 0x44 */
- __IO uint32_t ALRMBSSR;/*!< RTC alarm B sub second register, Address offset: 0x48 */
- uint32_t RESERVED7; /*!< Reserved, 0x4C */
- __IO uint32_t BKP0R; /*!< RTC backup register 1, Address offset: 0x50 */
- __IO uint32_t BKP1R; /*!< RTC backup register 1, Address offset: 0x54 */
- __IO uint32_t BKP2R; /*!< RTC backup register 2, Address offset: 0x58 */
- __IO uint32_t BKP3R; /*!< RTC backup register 3, Address offset: 0x5C */
- __IO uint32_t BKP4R; /*!< RTC backup register 4, Address offset: 0x60 */
- __IO uint32_t BKP5R; /*!< RTC backup register 5, Address offset: 0x64 */
- __IO uint32_t BKP6R; /*!< RTC backup register 6, Address offset: 0x68 */
- __IO uint32_t BKP7R; /*!< RTC backup register 7, Address offset: 0x6C */
- __IO uint32_t BKP8R; /*!< RTC backup register 8, Address offset: 0x70 */
- __IO uint32_t BKP9R; /*!< RTC backup register 9, Address offset: 0x74 */
- __IO uint32_t BKP10R; /*!< RTC backup register 10, Address offset: 0x78 */
- __IO uint32_t BKP11R; /*!< RTC backup register 11, Address offset: 0x7C */
- __IO uint32_t BKP12R; /*!< RTC backup register 12, Address offset: 0x80 */
- __IO uint32_t BKP13R; /*!< RTC backup register 13, Address offset: 0x84 */
- __IO uint32_t BKP14R; /*!< RTC backup register 14, Address offset: 0x88 */
- __IO uint32_t BKP15R; /*!< RTC backup register 15, Address offset: 0x8C */
- __IO uint32_t BKP16R; /*!< RTC backup register 16, Address offset: 0x90 */
- __IO uint32_t BKP17R; /*!< RTC backup register 17, Address offset: 0x94 */
- __IO uint32_t BKP18R; /*!< RTC backup register 18, Address offset: 0x98 */
- __IO uint32_t BKP19R; /*!< RTC backup register 19, Address offset: 0x9C */
-} RTC_TypeDef;
-
-/**
- * @brief SD host Interface
- */
-
-typedef struct
-{
- __IO uint32_t POWER; /*!< SDIO power control register, Address offset: 0x00 */
- __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */
- __IO uint32_t ARG; /*!< SDIO argument register, Address offset: 0x08 */
- __IO uint32_t CMD; /*!< SDIO command register, Address offset: 0x0C */
- __IO const uint32_t RESPCMD; /*!< SDIO command response register, Address offset: 0x10 */
- __IO const uint32_t RESP1; /*!< SDIO response 1 register, Address offset: 0x14 */
- __IO const uint32_t RESP2; /*!< SDIO response 2 register, Address offset: 0x18 */
- __IO const uint32_t RESP3; /*!< SDIO response 3 register, Address offset: 0x1C */
- __IO const uint32_t RESP4; /*!< SDIO response 4 register, Address offset: 0x20 */
- __IO uint32_t DTIMER; /*!< SDIO data timer register, Address offset: 0x24 */
- __IO uint32_t DLEN; /*!< SDIO data length register, Address offset: 0x28 */
- __IO uint32_t DCTRL; /*!< SDIO data control register, Address offset: 0x2C */
- __IO const uint32_t DCOUNT; /*!< SDIO data counter register, Address offset: 0x30 */
- __IO const uint32_t STA; /*!< SDIO status register, Address offset: 0x34 */
- __IO uint32_t ICR; /*!< SDIO interrupt clear register, Address offset: 0x38 */
- __IO uint32_t MASK; /*!< SDIO mask register, Address offset: 0x3C */
- uint32_t RESERVED0[2]; /*!< Reserved, 0x40-0x44 */
- __IO const uint32_t FIFOCNT; /*!< SDIO FIFO counter register, Address offset: 0x48 */
- uint32_t RESERVED1[13]; /*!< Reserved, 0x4C-0x7C */
- __IO uint32_t FIFO; /*!< SDIO data FIFO register, Address offset: 0x80 */
-} SDIO_TypeDef;
-
-/**
- * @brief Serial Peripheral Interface
- */
-
-typedef struct
-{
- __IO uint32_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset: 0x00 */
- __IO uint32_t CR2; /*!< SPI control register 2, Address offset: 0x04 */
- __IO uint32_t SR; /*!< SPI status register, Address offset: 0x08 */
- __IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
- __IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
- __IO uint32_t RXCRCR; /*!< SPI RX CRC register (not used in I2S mode), Address offset: 0x14 */
- __IO uint32_t TXCRCR; /*!< SPI TX CRC register (not used in I2S mode), Address offset: 0x18 */
- __IO uint32_t I2SCFGR; /*!< SPI_I2S configuration register, Address offset: 0x1C */
- __IO uint32_t I2SPR; /*!< SPI_I2S prescaler register, Address offset: 0x20 */
-} SPI_TypeDef;
-
-
-/**
- * @brief TIM
- */
-
-typedef struct
-{
- __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */
- __IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */
- __IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */
- __IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */
- __IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */
- __IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */
- __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */
- __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */
- __IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */
- __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */
- __IO uint32_t PSC; /*!< TIM prescaler, Address offset: 0x28 */
- __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */
- __IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */
- __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */
- __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */
- __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */
- __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */
- __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
- __IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
- __IO uint32_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */
- __IO uint32_t OR; /*!< TIM option register, Address offset: 0x50 */
-} TIM_TypeDef;
-
-/**
- * @brief Universal Synchronous Asynchronous Receiver Transmitter
- */
-
-typedef struct
-{
- __IO uint32_t SR; /*!< USART Status register, Address offset: 0x00 */
- __IO uint32_t DR; /*!< USART Data register, Address offset: 0x04 */
- __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x08 */
- __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x0C */
- __IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x10 */
- __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x14 */
- __IO uint32_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x18 */
-} USART_TypeDef;
-
-/**
- * @brief Window WATCHDOG
- */
-
-typedef struct
-{
- __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */
- __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */
- __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
-} WWDG_TypeDef;
-/**
- * @brief USB_OTG_Core_Registers
- */
-typedef struct
-{
- __IO uint32_t GOTGCTL; /*!< USB_OTG Control and Status Register 000h */
- __IO uint32_t GOTGINT; /*!< USB_OTG Interrupt Register 004h */
- __IO uint32_t GAHBCFG; /*!< Core AHB Configuration Register 008h */
- __IO uint32_t GUSBCFG; /*!< Core USB Configuration Register 00Ch */
- __IO uint32_t GRSTCTL; /*!< Core Reset Register 010h */
- __IO uint32_t GINTSTS; /*!< Core Interrupt Register 014h */
- __IO uint32_t GINTMSK; /*!< Core Interrupt Mask Register 018h */
- __IO uint32_t GRXSTSR; /*!< Receive Sts Q Read Register 01Ch */
- __IO uint32_t GRXSTSP; /*!< Receive Sts Q Read & POP Register 020h */
- __IO uint32_t GRXFSIZ; /*!< Receive FIFO Size Register 024h */
- __IO uint32_t DIEPTXF0_HNPTXFSIZ; /*!< EP0 / Non Periodic Tx FIFO Size Register 028h */
- __IO uint32_t HNPTXSTS; /*!< Non Periodic Tx FIFO/Queue Sts reg 02Ch */
- uint32_t Reserved30[2]; /*!< Reserved 030h */
- __IO uint32_t GCCFG; /*!< General Purpose IO Register 038h */
- __IO uint32_t CID; /*!< User ID Register 03Ch */
- uint32_t Reserved40[48]; /*!< Reserved 0x40-0xFF */
- __IO uint32_t HPTXFSIZ; /*!< Host Periodic Tx FIFO Size Reg 100h */
- __IO uint32_t DIEPTXF[0x0F]; /*!< dev Periodic Transmit FIFO */
-} USB_OTG_GlobalTypeDef;
-
-/**
- * @brief USB_OTG_device_Registers
- */
-typedef struct
-{
- __IO uint32_t DCFG; /*!< dev Configuration Register 800h */
- __IO uint32_t DCTL; /*!< dev Control Register 804h */
- __IO uint32_t DSTS; /*!< dev Status Register (RO) 808h */
- uint32_t Reserved0C; /*!< Reserved 80Ch */
- __IO uint32_t DIEPMSK; /*!< dev IN Endpoint Mask 810h */
- __IO uint32_t DOEPMSK; /*!< dev OUT Endpoint Mask 814h */
- __IO uint32_t DAINT; /*!< dev All Endpoints Itr Reg 818h */
- __IO uint32_t DAINTMSK; /*!< dev All Endpoints Itr Mask 81Ch */
- uint32_t Reserved20; /*!< Reserved 820h */
- uint32_t Reserved9; /*!< Reserved 824h */
- __IO uint32_t DVBUSDIS; /*!< dev VBUS discharge Register 828h */
- __IO uint32_t DVBUSPULSE; /*!< dev VBUS Pulse Register 82Ch */
- __IO uint32_t DTHRCTL; /*!< dev threshold 830h */
- __IO uint32_t DIEPEMPMSK; /*!< dev empty msk 834h */
- __IO uint32_t DEACHINT; /*!< dedicated EP interrupt 838h */
- __IO uint32_t DEACHMSK; /*!< dedicated EP msk 83Ch */
- uint32_t Reserved40; /*!< dedicated EP mask 840h */
- __IO uint32_t DINEP1MSK; /*!< dedicated EP mask 844h */
- uint32_t Reserved44[15]; /*!< Reserved 844-87Ch */
- __IO uint32_t DOUTEP1MSK; /*!< dedicated EP msk 884h */
-} USB_OTG_DeviceTypeDef;
-
-/**
- * @brief USB_OTG_IN_Endpoint-Specific_Register
- */
-typedef struct
-{
- __IO uint32_t DIEPCTL; /*!< dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h */
- uint32_t Reserved04; /*!< Reserved 900h + (ep_num * 20h) + 04h */
- __IO uint32_t DIEPINT; /*!< dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h */
- uint32_t Reserved0C; /*!< Reserved 900h + (ep_num * 20h) + 0Ch */
- __IO uint32_t DIEPTSIZ; /*!< IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h */
- __IO uint32_t DIEPDMA; /*!< IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h */
- __IO uint32_t DTXFSTS; /*!< IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h */
- uint32_t Reserved18; /*!< Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch */
-} USB_OTG_INEndpointTypeDef;
-
-/**
- * @brief USB_OTG_OUT_Endpoint-Specific_Registers
- */
-typedef struct
-{
- __IO uint32_t DOEPCTL; /*!< dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h */
- uint32_t Reserved04; /*!< Reserved B00h + (ep_num * 20h) + 04h */
- __IO uint32_t DOEPINT; /*!< dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h */
- uint32_t Reserved0C; /*!< Reserved B00h + (ep_num * 20h) + 0Ch */
- __IO uint32_t DOEPTSIZ; /*!< dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h */
- __IO uint32_t DOEPDMA; /*!< dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h */
- uint32_t Reserved18[2]; /*!< Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch */
-} USB_OTG_OUTEndpointTypeDef;
-
-/**
- * @brief USB_OTG_Host_Mode_Register_Structures
- */
-typedef struct
-{
- __IO uint32_t HCFG; /*!< Host Configuration Register 400h */
- __IO uint32_t HFIR; /*!< Host Frame Interval Register 404h */
- __IO uint32_t HFNUM; /*!< Host Frame Nbr/Frame Remaining 408h */
- uint32_t Reserved40C; /*!< Reserved 40Ch */
- __IO uint32_t HPTXSTS; /*!< Host Periodic Tx FIFO/ Queue Status 410h */
- __IO uint32_t HAINT; /*!< Host All Channels Interrupt Register 414h */
- __IO uint32_t HAINTMSK; /*!< Host All Channels Interrupt Mask 418h */
-} USB_OTG_HostTypeDef;
-
-/**
- * @brief USB_OTG_Host_Channel_Specific_Registers
- */
-typedef struct
-{
- __IO uint32_t HCCHAR; /*!< Host Channel Characteristics Register 500h */
- __IO uint32_t HCSPLT; /*!< Host Channel Split Control Register 504h */
- __IO uint32_t HCINT; /*!< Host Channel Interrupt Register 508h */
- __IO uint32_t HCINTMSK; /*!< Host Channel Interrupt Mask Register 50Ch */
- __IO uint32_t HCTSIZ; /*!< Host Channel Transfer Size Register 510h */
- __IO uint32_t HCDMA; /*!< Host Channel DMA Address Register 514h */
- uint32_t Reserved[2]; /*!< Reserved */
-} USB_OTG_HostChannelTypeDef;
-
-/**
- * @}
- */
-
-/** @addtogroup Peripheral_memory_map
- * @{
- */
-#define FLASH_BASE 0x08000000UL /*!< FLASH(up to 1 MB) base address in the alias region */
-#define SRAM1_BASE 0x20000000UL /*!< SRAM1(96 KB) base address in the alias region */
-#define PERIPH_BASE 0x40000000UL /*!< Peripheral base address in the alias region */
-#define SRAM1_BB_BASE 0x22000000UL /*!< SRAM1(96 KB) base address in the bit-band region */
-#define PERIPH_BB_BASE 0x42000000UL /*!< Peripheral base address in the bit-band region */
-#define BKPSRAM_BB_BASE 0x42480000UL /*!< Backup SRAM(4 KB) base address in the bit-band region */
-#define FLASH_END 0x0807FFFFUL /*!< FLASH end address */
-#define FLASH_OTP_BASE 0x1FFF7800UL /*!< Base address of : (up to 528 Bytes) embedded FLASH OTP Area */
-#define FLASH_OTP_END 0x1FFF7A0FUL /*!< End address of : (up to 528 Bytes) embedded FLASH OTP Area */
-
-/* Legacy defines */
-#define SRAM_BASE SRAM1_BASE
-#define SRAM_BB_BASE SRAM1_BB_BASE
-
-/*!< Peripheral memory map */
-#define APB1PERIPH_BASE PERIPH_BASE
-#define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL)
-#define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000UL)
-#define AHB2PERIPH_BASE (PERIPH_BASE + 0x10000000UL)
-
-/*!< APB1 peripherals */
-#define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL)
-#define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL)
-#define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL)
-#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL)
-#define RTC_BASE (APB1PERIPH_BASE + 0x2800UL)
-#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00UL)
-#define IWDG_BASE (APB1PERIPH_BASE + 0x3000UL)
-#define I2S2ext_BASE (APB1PERIPH_BASE + 0x3400UL)
-#define SPI2_BASE (APB1PERIPH_BASE + 0x3800UL)
-#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00UL)
-#define I2S3ext_BASE (APB1PERIPH_BASE + 0x4000UL)
-#define USART2_BASE (APB1PERIPH_BASE + 0x4400UL)
-#define I2C1_BASE (APB1PERIPH_BASE + 0x5400UL)
-#define I2C2_BASE (APB1PERIPH_BASE + 0x5800UL)
-#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00UL)
-#define PWR_BASE (APB1PERIPH_BASE + 0x7000UL)
-
-/*!< APB2 peripherals */
-#define TIM1_BASE (APB2PERIPH_BASE + 0x0000UL)
-#define USART1_BASE (APB2PERIPH_BASE + 0x1000UL)
-#define USART6_BASE (APB2PERIPH_BASE + 0x1400UL)
-#define ADC1_BASE (APB2PERIPH_BASE + 0x2000UL)
-#define ADC1_COMMON_BASE (APB2PERIPH_BASE + 0x2300UL)
-/* Legacy define */
-#define ADC_BASE ADC1_COMMON_BASE
-#define SDIO_BASE (APB2PERIPH_BASE + 0x2C00UL)
-#define SPI1_BASE (APB2PERIPH_BASE + 0x3000UL)
-#define SPI4_BASE (APB2PERIPH_BASE + 0x3400UL)
-#define SYSCFG_BASE (APB2PERIPH_BASE + 0x3800UL)
-#define EXTI_BASE (APB2PERIPH_BASE + 0x3C00UL)
-#define TIM9_BASE (APB2PERIPH_BASE + 0x4000UL)
-#define TIM10_BASE (APB2PERIPH_BASE + 0x4400UL)
-#define TIM11_BASE (APB2PERIPH_BASE + 0x4800UL)
-
-/*!< AHB1 peripherals */
-#define GPIOA_BASE (AHB1PERIPH_BASE + 0x0000UL)
-#define GPIOB_BASE (AHB1PERIPH_BASE + 0x0400UL)
-#define GPIOC_BASE (AHB1PERIPH_BASE + 0x0800UL)
-#define GPIOD_BASE (AHB1PERIPH_BASE + 0x0C00UL)
-#define GPIOE_BASE (AHB1PERIPH_BASE + 0x1000UL)
-#define GPIOH_BASE (AHB1PERIPH_BASE + 0x1C00UL)
-#define CRC_BASE (AHB1PERIPH_BASE + 0x3000UL)
-#define RCC_BASE (AHB1PERIPH_BASE + 0x3800UL)
-#define FLASH_R_BASE (AHB1PERIPH_BASE + 0x3C00UL)
-#define DMA1_BASE (AHB1PERIPH_BASE + 0x6000UL)
-#define DMA1_Stream0_BASE (DMA1_BASE + 0x010UL)
-#define DMA1_Stream1_BASE (DMA1_BASE + 0x028UL)
-#define DMA1_Stream2_BASE (DMA1_BASE + 0x040UL)
-#define DMA1_Stream3_BASE (DMA1_BASE + 0x058UL)
-#define DMA1_Stream4_BASE (DMA1_BASE + 0x070UL)
-#define DMA1_Stream5_BASE (DMA1_BASE + 0x088UL)
-#define DMA1_Stream6_BASE (DMA1_BASE + 0x0A0UL)
-#define DMA1_Stream7_BASE (DMA1_BASE + 0x0B8UL)
-#define DMA2_BASE (AHB1PERIPH_BASE + 0x6400UL)
-#define DMA2_Stream0_BASE (DMA2_BASE + 0x010UL)
-#define DMA2_Stream1_BASE (DMA2_BASE + 0x028UL)
-#define DMA2_Stream2_BASE (DMA2_BASE + 0x040UL)
-#define DMA2_Stream3_BASE (DMA2_BASE + 0x058UL)
-#define DMA2_Stream4_BASE (DMA2_BASE + 0x070UL)
-#define DMA2_Stream5_BASE (DMA2_BASE + 0x088UL)
-#define DMA2_Stream6_BASE (DMA2_BASE + 0x0A0UL)
-#define DMA2_Stream7_BASE (DMA2_BASE + 0x0B8UL)
-
-
-/*!< Debug MCU registers base address */
-#define DBGMCU_BASE 0xE0042000UL
-/*!< USB registers base address */
-#define USB_OTG_FS_PERIPH_BASE 0x50000000UL
-
-#define USB_OTG_GLOBAL_BASE 0x000UL
-#define USB_OTG_DEVICE_BASE 0x800UL
-#define USB_OTG_IN_ENDPOINT_BASE 0x900UL
-#define USB_OTG_OUT_ENDPOINT_BASE 0xB00UL
-#define USB_OTG_EP_REG_SIZE 0x20UL
-#define USB_OTG_HOST_BASE 0x400UL
-#define USB_OTG_HOST_PORT_BASE 0x440UL
-#define USB_OTG_HOST_CHANNEL_BASE 0x500UL
-#define USB_OTG_HOST_CHANNEL_SIZE 0x20UL
-#define USB_OTG_PCGCCTL_BASE 0xE00UL
-#define USB_OTG_FIFO_BASE 0x1000UL
-#define USB_OTG_FIFO_SIZE 0x1000UL
-
-#define UID_BASE 0x1FFF7A10UL /*!< Unique device ID register base address */
-#define FLASHSIZE_BASE 0x1FFF7A22UL /*!< FLASH Size register base address */
-#define PACKAGE_BASE 0x1FFF7BF0UL /*!< Package size register base address */
-/**
- * @}
- */
-
-/** @addtogroup Peripheral_declaration
- * @{
- */
-#define TIM2 ((TIM_TypeDef *) TIM2_BASE)
-#define TIM3 ((TIM_TypeDef *) TIM3_BASE)
-#define TIM4 ((TIM_TypeDef *) TIM4_BASE)
-#define TIM5 ((TIM_TypeDef *) TIM5_BASE)
-#define RTC ((RTC_TypeDef *) RTC_BASE)
-#define WWDG ((WWDG_TypeDef *) WWDG_BASE)
-#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
-#define I2S2ext ((SPI_TypeDef *) I2S2ext_BASE)
-#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
-#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
-#define I2S3ext ((SPI_TypeDef *) I2S3ext_BASE)
-#define USART2 ((USART_TypeDef *) USART2_BASE)
-#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
-#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
-#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
-#define PWR ((PWR_TypeDef *) PWR_BASE)
-#define TIM1 ((TIM_TypeDef *) TIM1_BASE)
-#define USART1 ((USART_TypeDef *) USART1_BASE)
-#define USART6 ((USART_TypeDef *) USART6_BASE)
-#define ADC1 ((ADC_TypeDef *) ADC1_BASE)
-#define ADC1_COMMON ((ADC_Common_TypeDef *) ADC1_COMMON_BASE)
-/* Legacy define */
-#define ADC ADC1_COMMON
-#define SDIO ((SDIO_TypeDef *) SDIO_BASE)
-#define SPI1 ((SPI_TypeDef *) SPI1_BASE)
-#define SPI4 ((SPI_TypeDef *) SPI4_BASE)
-#define SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE)
-#define EXTI ((EXTI_TypeDef *) EXTI_BASE)
-#define TIM9 ((TIM_TypeDef *) TIM9_BASE)
-#define TIM10 ((TIM_TypeDef *) TIM10_BASE)
-#define TIM11 ((TIM_TypeDef *) TIM11_BASE)
-#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
-#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE)
-#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
-#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE)
-#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE)
-#define GPIOH ((GPIO_TypeDef *) GPIOH_BASE)
-#define CRC ((CRC_TypeDef *) CRC_BASE)
-#define RCC ((RCC_TypeDef *) RCC_BASE)
-#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE)
-#define DMA1 ((DMA_TypeDef *) DMA1_BASE)
-#define DMA1_Stream0 ((DMA_Stream_TypeDef *) DMA1_Stream0_BASE)
-#define DMA1_Stream1 ((DMA_Stream_TypeDef *) DMA1_Stream1_BASE)
-#define DMA1_Stream2 ((DMA_Stream_TypeDef *) DMA1_Stream2_BASE)
-#define DMA1_Stream3 ((DMA_Stream_TypeDef *) DMA1_Stream3_BASE)
-#define DMA1_Stream4 ((DMA_Stream_TypeDef *) DMA1_Stream4_BASE)
-#define DMA1_Stream5 ((DMA_Stream_TypeDef *) DMA1_Stream5_BASE)
-#define DMA1_Stream6 ((DMA_Stream_TypeDef *) DMA1_Stream6_BASE)
-#define DMA1_Stream7 ((DMA_Stream_TypeDef *) DMA1_Stream7_BASE)
-#define DMA2 ((DMA_TypeDef *) DMA2_BASE)
-#define DMA2_Stream0 ((DMA_Stream_TypeDef *) DMA2_Stream0_BASE)
-#define DMA2_Stream1 ((DMA_Stream_TypeDef *) DMA2_Stream1_BASE)
-#define DMA2_Stream2 ((DMA_Stream_TypeDef *) DMA2_Stream2_BASE)
-#define DMA2_Stream3 ((DMA_Stream_TypeDef *) DMA2_Stream3_BASE)
-#define DMA2_Stream4 ((DMA_Stream_TypeDef *) DMA2_Stream4_BASE)
-#define DMA2_Stream5 ((DMA_Stream_TypeDef *) DMA2_Stream5_BASE)
-#define DMA2_Stream6 ((DMA_Stream_TypeDef *) DMA2_Stream6_BASE)
-#define DMA2_Stream7 ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)
-#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)
-#define USB_OTG_FS ((USB_OTG_GlobalTypeDef *) USB_OTG_FS_PERIPH_BASE)
-
-/**
- * @}
- */
-
-/** @addtogroup Exported_constants
- * @{
- */
-
-/** @addtogroup Hardware_Constant_Definition
- * @{
- */
-#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
-/**
- * @}
- */
-
- /** @addtogroup Peripheral_Registers_Bits_Definition
- * @{
- */
-
-/******************************************************************************/
-/* Peripheral Registers_Bits_Definition */
-/******************************************************************************/
-
-/******************************************************************************/
-/* */
-/* Analog to Digital Converter */
-/* */
-/******************************************************************************/
-
-/******************** Bit definition for ADC_SR register ********************/
-#define ADC_SR_AWD_Pos (0U)
-#define ADC_SR_AWD_Msk (0x1UL << ADC_SR_AWD_Pos) /*!< 0x00000001 */
-#define ADC_SR_AWD ADC_SR_AWD_Msk /*!<Analog watchdog flag */
-#define ADC_SR_EOC_Pos (1U)
-#define ADC_SR_EOC_Msk (0x1UL << ADC_SR_EOC_Pos) /*!< 0x00000002 */
-#define ADC_SR_EOC ADC_SR_EOC_Msk /*!<End of conversion */
-#define ADC_SR_JEOC_Pos (2U)
-#define ADC_SR_JEOC_Msk (0x1UL << ADC_SR_JEOC_Pos) /*!< 0x00000004 */
-#define ADC_SR_JEOC ADC_SR_JEOC_Msk /*!<Injected channel end of conversion */
-#define ADC_SR_JSTRT_Pos (3U)
-#define ADC_SR_JSTRT_Msk (0x1UL << ADC_SR_JSTRT_Pos) /*!< 0x00000008 */
-#define ADC_SR_JSTRT ADC_SR_JSTRT_Msk /*!<Injected channel Start flag */
-#define ADC_SR_STRT_Pos (4U)
-#define ADC_SR_STRT_Msk (0x1UL << ADC_SR_STRT_Pos) /*!< 0x00000010 */
-#define ADC_SR_STRT ADC_SR_STRT_Msk /*!<Regular channel Start flag */
-#define ADC_SR_OVR_Pos (5U)
-#define ADC_SR_OVR_Msk (0x1UL << ADC_SR_OVR_Pos) /*!< 0x00000020 */
-#define ADC_SR_OVR ADC_SR_OVR_Msk /*!<Overrun flag */
-
-/******************* Bit definition for ADC_CR1 register ********************/
-#define ADC_CR1_AWDCH_Pos (0U)
-#define ADC_CR1_AWDCH_Msk (0x1FUL << ADC_CR1_AWDCH_Pos) /*!< 0x0000001F */
-#define ADC_CR1_AWDCH ADC_CR1_AWDCH_Msk /*!<AWDCH[4:0] bits (Analog watchdog channel select bits) */
-#define ADC_CR1_AWDCH_0 (0x01UL << ADC_CR1_AWDCH_Pos) /*!< 0x00000001 */
-#define ADC_CR1_AWDCH_1 (0x02UL << ADC_CR1_AWDCH_Pos) /*!< 0x00000002 */
-#define ADC_CR1_AWDCH_2 (0x04UL << ADC_CR1_AWDCH_Pos) /*!< 0x00000004 */
-#define ADC_CR1_AWDCH_3 (0x08UL << ADC_CR1_AWDCH_Pos) /*!< 0x00000008 */
-#define ADC_CR1_AWDCH_4 (0x10UL << ADC_CR1_AWDCH_Pos) /*!< 0x00000010 */
-#define ADC_CR1_EOCIE_Pos (5U)
-#define ADC_CR1_EOCIE_Msk (0x1UL << ADC_CR1_EOCIE_Pos) /*!< 0x00000020 */
-#define ADC_CR1_EOCIE ADC_CR1_EOCIE_Msk /*!<Interrupt enable for EOC */
-#define ADC_CR1_AWDIE_Pos (6U)
-#define ADC_CR1_AWDIE_Msk (0x1UL << ADC_CR1_AWDIE_Pos) /*!< 0x00000040 */
-#define ADC_CR1_AWDIE ADC_CR1_AWDIE_Msk /*!<AAnalog Watchdog interrupt enable */
-#define ADC_CR1_JEOCIE_Pos (7U)
-#define ADC_CR1_JEOCIE_Msk (0x1UL << ADC_CR1_JEOCIE_Pos) /*!< 0x00000080 */
-#define ADC_CR1_JEOCIE ADC_CR1_JEOCIE_Msk /*!<Interrupt enable for injected channels */
-#define ADC_CR1_SCAN_Pos (8U)
-#define ADC_CR1_SCAN_Msk (0x1UL << ADC_CR1_SCAN_Pos) /*!< 0x00000100 */
-#define ADC_CR1_SCAN ADC_CR1_SCAN_Msk /*!<Scan mode */
-#define ADC_CR1_AWDSGL_Pos (9U)
-#define ADC_CR1_AWDSGL_Msk (0x1UL << ADC_CR1_AWDSGL_Pos) /*!< 0x00000200 */
-#define ADC_CR1_AWDSGL ADC_CR1_AWDSGL_Msk /*!<Enable the watchdog on a single channel in scan mode */
-#define ADC_CR1_JAUTO_Pos (10U)
-#define ADC_CR1_JAUTO_Msk (0x1UL << ADC_CR1_JAUTO_Pos) /*!< 0x00000400 */
-#define ADC_CR1_JAUTO ADC_CR1_JAUTO_Msk /*!<Automatic injected group conversion */
-#define ADC_CR1_DISCEN_Pos (11U)
-#define ADC_CR1_DISCEN_Msk (0x1UL << ADC_CR1_DISCEN_Pos) /*!< 0x00000800 */
-#define ADC_CR1_DISCEN ADC_CR1_DISCEN_Msk /*!<Discontinuous mode on regular channels */
-#define ADC_CR1_JDISCEN_Pos (12U)
-#define ADC_CR1_JDISCEN_Msk (0x1UL << ADC_CR1_JDISCEN_Pos) /*!< 0x00001000 */
-#define ADC_CR1_JDISCEN ADC_CR1_JDISCEN_Msk /*!<Discontinuous mode on injected channels */
-#define ADC_CR1_DISCNUM_Pos (13U)
-#define ADC_CR1_DISCNUM_Msk (0x7UL << ADC_CR1_DISCNUM_Pos) /*!< 0x0000E000 */
-#define ADC_CR1_DISCNUM ADC_CR1_DISCNUM_Msk /*!<DISCNUM[2:0] bits (Discontinuous mode channel count) */
-#define ADC_CR1_DISCNUM_0 (0x1UL << ADC_CR1_DISCNUM_Pos) /*!< 0x00002000 */
-#define ADC_CR1_DISCNUM_1 (0x2UL << ADC_CR1_DISCNUM_Pos) /*!< 0x00004000 */
-#define ADC_CR1_DISCNUM_2 (0x4UL << ADC_CR1_DISCNUM_Pos) /*!< 0x00008000 */
-#define ADC_CR1_JAWDEN_Pos (22U)
-#define ADC_CR1_JAWDEN_Msk (0x1UL << ADC_CR1_JAWDEN_Pos) /*!< 0x00400000 */
-#define ADC_CR1_JAWDEN ADC_CR1_JAWDEN_Msk /*!<Analog watchdog enable on injected channels */
-#define ADC_CR1_AWDEN_Pos (23U)
-#define ADC_CR1_AWDEN_Msk (0x1UL << ADC_CR1_AWDEN_Pos) /*!< 0x00800000 */
-#define ADC_CR1_AWDEN ADC_CR1_AWDEN_Msk /*!<Analog watchdog enable on regular channels */
-#define ADC_CR1_RES_Pos (24U)
-#define ADC_CR1_RES_Msk (0x3UL << ADC_CR1_RES_Pos) /*!< 0x03000000 */
-#define ADC_CR1_RES ADC_CR1_RES_Msk /*!<RES[2:0] bits (Resolution) */
-#define ADC_CR1_RES_0 (0x1UL << ADC_CR1_RES_Pos) /*!< 0x01000000 */
-#define ADC_CR1_RES_1 (0x2UL << ADC_CR1_RES_Pos) /*!< 0x02000000 */
-#define ADC_CR1_OVRIE_Pos (26U)
-#define ADC_CR1_OVRIE_Msk (0x1UL << ADC_CR1_OVRIE_Pos) /*!< 0x04000000 */
-#define ADC_CR1_OVRIE ADC_CR1_OVRIE_Msk /*!<overrun interrupt enable */
-
-/******************* Bit definition for ADC_CR2 register ********************/
-#define ADC_CR2_ADON_Pos (0U)
-#define ADC_CR2_ADON_Msk (0x1UL << ADC_CR2_ADON_Pos) /*!< 0x00000001 */
-#define ADC_CR2_ADON ADC_CR2_ADON_Msk /*!<A/D Converter ON / OFF */
-#define ADC_CR2_CONT_Pos (1U)
-#define ADC_CR2_CONT_Msk (0x1UL << ADC_CR2_CONT_Pos) /*!< 0x00000002 */
-#define ADC_CR2_CONT ADC_CR2_CONT_Msk /*!<Continuous Conversion */
-#define ADC_CR2_DMA_Pos (8U)
-#define ADC_CR2_DMA_Msk (0x1UL << ADC_CR2_DMA_Pos) /*!< 0x00000100 */
-#define ADC_CR2_DMA ADC_CR2_DMA_Msk /*!<Direct Memory access mode */
-#define ADC_CR2_DDS_Pos (9U)
-#define ADC_CR2_DDS_Msk (0x1UL << ADC_CR2_DDS_Pos) /*!< 0x00000200 */
-#define ADC_CR2_DDS ADC_CR2_DDS_Msk /*!<DMA disable selection (Single ADC) */
-#define ADC_CR2_EOCS_Pos (10U)
-#define ADC_CR2_EOCS_Msk (0x1UL << ADC_CR2_EOCS_Pos) /*!< 0x00000400 */
-#define ADC_CR2_EOCS ADC_CR2_EOCS_Msk /*!<End of conversion selection */
-#define ADC_CR2_ALIGN_Pos (11U)
-#define ADC_CR2_ALIGN_Msk (0x1UL << ADC_CR2_ALIGN_Pos) /*!< 0x00000800 */
-#define ADC_CR2_ALIGN ADC_CR2_ALIGN_Msk /*!<Data Alignment */
-#define ADC_CR2_JEXTSEL_Pos (16U)
-#define ADC_CR2_JEXTSEL_Msk (0xFUL << ADC_CR2_JEXTSEL_Pos) /*!< 0x000F0000 */
-#define ADC_CR2_JEXTSEL ADC_CR2_JEXTSEL_Msk /*!<JEXTSEL[3:0] bits (External event select for injected group) */
-#define ADC_CR2_JEXTSEL_0 (0x1UL << ADC_CR2_JEXTSEL_Pos) /*!< 0x00010000 */
-#define ADC_CR2_JEXTSEL_1 (0x2UL << ADC_CR2_JEXTSEL_Pos) /*!< 0x00020000 */
-#define ADC_CR2_JEXTSEL_2 (0x4UL << ADC_CR2_JEXTSEL_Pos) /*!< 0x00040000 */
-#define ADC_CR2_JEXTSEL_3 (0x8UL << ADC_CR2_JEXTSEL_Pos) /*!< 0x00080000 */
-#define ADC_CR2_JEXTEN_Pos (20U)
-#define ADC_CR2_JEXTEN_Msk (0x3UL << ADC_CR2_JEXTEN_Pos) /*!< 0x00300000 */
-#define ADC_CR2_JEXTEN ADC_CR2_JEXTEN_Msk /*!<JEXTEN[1:0] bits (External Trigger Conversion mode for injected channelsp) */
-#define ADC_CR2_JEXTEN_0 (0x1UL << ADC_CR2_JEXTEN_Pos) /*!< 0x00100000 */
-#define ADC_CR2_JEXTEN_1 (0x2UL << ADC_CR2_JEXTEN_Pos) /*!< 0x00200000 */
-#define ADC_CR2_JSWSTART_Pos (22U)
-#define ADC_CR2_JSWSTART_Msk (0x1UL << ADC_CR2_JSWSTART_Pos) /*!< 0x00400000 */
-#define ADC_CR2_JSWSTART ADC_CR2_JSWSTART_Msk /*!<Start Conversion of injected channels */
-#define ADC_CR2_EXTSEL_Pos (24U)
-#define ADC_CR2_EXTSEL_Msk (0xFUL << ADC_CR2_EXTSEL_Pos) /*!< 0x0F000000 */
-#define ADC_CR2_EXTSEL ADC_CR2_EXTSEL_Msk /*!<EXTSEL[3:0] bits (External Event Select for regular group) */
-#define ADC_CR2_EXTSEL_0 (0x1UL << ADC_CR2_EXTSEL_Pos) /*!< 0x01000000 */
-#define ADC_CR2_EXTSEL_1 (0x2UL << ADC_CR2_EXTSEL_Pos) /*!< 0x02000000 */
-#define ADC_CR2_EXTSEL_2 (0x4UL << ADC_CR2_EXTSEL_Pos) /*!< 0x04000000 */
-#define ADC_CR2_EXTSEL_3 (0x8UL << ADC_CR2_EXTSEL_Pos) /*!< 0x08000000 */
-#define ADC_CR2_EXTEN_Pos (28U)
-#define ADC_CR2_EXTEN_Msk (0x3UL << ADC_CR2_EXTEN_Pos) /*!< 0x30000000 */
-#define ADC_CR2_EXTEN ADC_CR2_EXTEN_Msk /*!<EXTEN[1:0] bits (External Trigger Conversion mode for regular channelsp) */
-#define ADC_CR2_EXTEN_0 (0x1UL << ADC_CR2_EXTEN_Pos) /*!< 0x10000000 */
-#define ADC_CR2_EXTEN_1 (0x2UL << ADC_CR2_EXTEN_Pos) /*!< 0x20000000 */
-#define ADC_CR2_SWSTART_Pos (30U)
-#define ADC_CR2_SWSTART_Msk (0x1UL << ADC_CR2_SWSTART_Pos) /*!< 0x40000000 */
-#define ADC_CR2_SWSTART ADC_CR2_SWSTART_Msk /*!<Start Conversion of regular channels */
-
-/****************** Bit definition for ADC_SMPR1 register *******************/
-#define ADC_SMPR1_SMP10_Pos (0U)
-#define ADC_SMPR1_SMP10_Msk (0x7UL << ADC_SMPR1_SMP10_Pos) /*!< 0x00000007 */
-#define ADC_SMPR1_SMP10 ADC_SMPR1_SMP10_Msk /*!<SMP10[2:0] bits (Channel 10 Sample time selection) */
-#define ADC_SMPR1_SMP10_0 (0x1UL << ADC_SMPR1_SMP10_Pos) /*!< 0x00000001 */
-#define ADC_SMPR1_SMP10_1 (0x2UL << ADC_SMPR1_SMP10_Pos) /*!< 0x00000002 */
-#define ADC_SMPR1_SMP10_2 (0x4UL << ADC_SMPR1_SMP10_Pos) /*!< 0x00000004 */
-#define ADC_SMPR1_SMP11_Pos (3U)
-#define ADC_SMPR1_SMP11_Msk (0x7UL << ADC_SMPR1_SMP11_Pos) /*!< 0x00000038 */
-#define ADC_SMPR1_SMP11 ADC_SMPR1_SMP11_Msk /*!<SMP11[2:0] bits (Channel 11 Sample time selection) */
-#define ADC_SMPR1_SMP11_0 (0x1UL << ADC_SMPR1_SMP11_Pos) /*!< 0x00000008 */
-#define ADC_SMPR1_SMP11_1 (0x2UL << ADC_SMPR1_SMP11_Pos) /*!< 0x00000010 */
-#define ADC_SMPR1_SMP11_2 (0x4UL << ADC_SMPR1_SMP11_Pos) /*!< 0x00000020 */
-#define ADC_SMPR1_SMP12_Pos (6U)
-#define ADC_SMPR1_SMP12_Msk (0x7UL << ADC_SMPR1_SMP12_Pos) /*!< 0x000001C0 */
-#define ADC_SMPR1_SMP12 ADC_SMPR1_SMP12_Msk /*!<SMP12[2:0] bits (Channel 12 Sample time selection) */
-#define ADC_SMPR1_SMP12_0 (0x1UL << ADC_SMPR1_SMP12_Pos) /*!< 0x00000040 */
-#define ADC_SMPR1_SMP12_1 (0x2UL << ADC_SMPR1_SMP12_Pos) /*!< 0x00000080 */
-#define ADC_SMPR1_SMP12_2 (0x4UL << ADC_SMPR1_SMP12_Pos) /*!< 0x00000100 */
-#define ADC_SMPR1_SMP13_Pos (9U)
-#define ADC_SMPR1_SMP13_Msk (0x7UL << ADC_SMPR1_SMP13_Pos) /*!< 0x00000E00 */
-#define ADC_SMPR1_SMP13 ADC_SMPR1_SMP13_Msk /*!<SMP13[2:0] bits (Channel 13 Sample time selection) */
-#define ADC_SMPR1_SMP13_0 (0x1UL << ADC_SMPR1_SMP13_Pos) /*!< 0x00000200 */
-#define ADC_SMPR1_SMP13_1 (0x2UL << ADC_SMPR1_SMP13_Pos) /*!< 0x00000400 */
-#define ADC_SMPR1_SMP13_2 (0x4UL << ADC_SMPR1_SMP13_Pos) /*!< 0x00000800 */
-#define ADC_SMPR1_SMP14_Pos (12U)
-#define ADC_SMPR1_SMP14_Msk (0x7UL << ADC_SMPR1_SMP14_Pos) /*!< 0x00007000 */
-#define ADC_SMPR1_SMP14 ADC_SMPR1_SMP14_Msk /*!<SMP14[2:0] bits (Channel 14 Sample time selection) */
-#define ADC_SMPR1_SMP14_0 (0x1UL << ADC_SMPR1_SMP14_Pos) /*!< 0x00001000 */
-#define ADC_SMPR1_SMP14_1 (0x2UL << ADC_SMPR1_SMP14_Pos) /*!< 0x00002000 */
-#define ADC_SMPR1_SMP14_2 (0x4UL << ADC_SMPR1_SMP14_Pos) /*!< 0x00004000 */
-#define ADC_SMPR1_SMP15_Pos (15U)
-#define ADC_SMPR1_SMP15_Msk (0x7UL << ADC_SMPR1_SMP15_Pos) /*!< 0x00038000 */
-#define ADC_SMPR1_SMP15 ADC_SMPR1_SMP15_Msk /*!<SMP15[2:0] bits (Channel 15 Sample time selection) */
-#define ADC_SMPR1_SMP15_0 (0x1UL << ADC_SMPR1_SMP15_Pos) /*!< 0x00008000 */
-#define ADC_SMPR1_SMP15_1 (0x2UL << ADC_SMPR1_SMP15_Pos) /*!< 0x00010000 */
-#define ADC_SMPR1_SMP15_2 (0x4UL << ADC_SMPR1_SMP15_Pos) /*!< 0x00020000 */
-#define ADC_SMPR1_SMP16_Pos (18U)
-#define ADC_SMPR1_SMP16_Msk (0x7UL << ADC_SMPR1_SMP16_Pos) /*!< 0x001C0000 */
-#define ADC_SMPR1_SMP16 ADC_SMPR1_SMP16_Msk /*!<SMP16[2:0] bits (Channel 16 Sample time selection) */
-#define ADC_SMPR1_SMP16_0 (0x1UL << ADC_SMPR1_SMP16_Pos) /*!< 0x00040000 */
-#define ADC_SMPR1_SMP16_1 (0x2UL << ADC_SMPR1_SMP16_Pos) /*!< 0x00080000 */
-#define ADC_SMPR1_SMP16_2 (0x4UL << ADC_SMPR1_SMP16_Pos) /*!< 0x00100000 */
-#define ADC_SMPR1_SMP17_Pos (21U)
-#define ADC_SMPR1_SMP17_Msk (0x7UL << ADC_SMPR1_SMP17_Pos) /*!< 0x00E00000 */
-#define ADC_SMPR1_SMP17 ADC_SMPR1_SMP17_Msk /*!<SMP17[2:0] bits (Channel 17 Sample time selection) */
-#define ADC_SMPR1_SMP17_0 (0x1UL << ADC_SMPR1_SMP17_Pos) /*!< 0x00200000 */
-#define ADC_SMPR1_SMP17_1 (0x2UL << ADC_SMPR1_SMP17_Pos) /*!< 0x00400000 */
-#define ADC_SMPR1_SMP17_2 (0x4UL << ADC_SMPR1_SMP17_Pos) /*!< 0x00800000 */
-#define ADC_SMPR1_SMP18_Pos (24U)
-#define ADC_SMPR1_SMP18_Msk (0x7UL << ADC_SMPR1_SMP18_Pos) /*!< 0x07000000 */
-#define ADC_SMPR1_SMP18 ADC_SMPR1_SMP18_Msk /*!<SMP18[2:0] bits (Channel 18 Sample time selection) */
-#define ADC_SMPR1_SMP18_0 (0x1UL << ADC_SMPR1_SMP18_Pos) /*!< 0x01000000 */
-#define ADC_SMPR1_SMP18_1 (0x2UL << ADC_SMPR1_SMP18_Pos) /*!< 0x02000000 */
-#define ADC_SMPR1_SMP18_2 (0x4UL << ADC_SMPR1_SMP18_Pos) /*!< 0x04000000 */
-
-/****************** Bit definition for ADC_SMPR2 register *******************/
-#define ADC_SMPR2_SMP0_Pos (0U)
-#define ADC_SMPR2_SMP0_Msk (0x7UL << ADC_SMPR2_SMP0_Pos) /*!< 0x00000007 */
-#define ADC_SMPR2_SMP0 ADC_SMPR2_SMP0_Msk /*!<SMP0[2:0] bits (Channel 0 Sample time selection) */
-#define ADC_SMPR2_SMP0_0 (0x1UL << ADC_SMPR2_SMP0_Pos) /*!< 0x00000001 */
-#define ADC_SMPR2_SMP0_1 (0x2UL << ADC_SMPR2_SMP0_Pos) /*!< 0x00000002 */
-#define ADC_SMPR2_SMP0_2 (0x4UL << ADC_SMPR2_SMP0_Pos) /*!< 0x00000004 */
-#define ADC_SMPR2_SMP1_Pos (3U)
-#define ADC_SMPR2_SMP1_Msk (0x7UL << ADC_SMPR2_SMP1_Pos) /*!< 0x00000038 */
-#define ADC_SMPR2_SMP1 ADC_SMPR2_SMP1_Msk /*!<SMP1[2:0] bits (Channel 1 Sample time selection) */
-#define ADC_SMPR2_SMP1_0 (0x1UL << ADC_SMPR2_SMP1_Pos) /*!< 0x00000008 */
-#define ADC_SMPR2_SMP1_1 (0x2UL << ADC_SMPR2_SMP1_Pos) /*!< 0x00000010 */
-#define ADC_SMPR2_SMP1_2 (0x4UL << ADC_SMPR2_SMP1_Pos) /*!< 0x00000020 */
-#define ADC_SMPR2_SMP2_Pos (6U)
-#define ADC_SMPR2_SMP2_Msk (0x7UL << ADC_SMPR2_SMP2_Pos) /*!< 0x000001C0 */
-#define ADC_SMPR2_SMP2 ADC_SMPR2_SMP2_Msk /*!<SMP2[2:0] bits (Channel 2 Sample time selection) */
-#define ADC_SMPR2_SMP2_0 (0x1UL << ADC_SMPR2_SMP2_Pos) /*!< 0x00000040 */
-#define ADC_SMPR2_SMP2_1 (0x2UL << ADC_SMPR2_SMP2_Pos) /*!< 0x00000080 */
-#define ADC_SMPR2_SMP2_2 (0x4UL << ADC_SMPR2_SMP2_Pos) /*!< 0x00000100 */
-#define ADC_SMPR2_SMP3_Pos (9U)
-#define ADC_SMPR2_SMP3_Msk (0x7UL << ADC_SMPR2_SMP3_Pos) /*!< 0x00000E00 */
-#define ADC_SMPR2_SMP3 ADC_SMPR2_SMP3_Msk /*!<SMP3[2:0] bits (Channel 3 Sample time selection) */
-#define ADC_SMPR2_SMP3_0 (0x1UL << ADC_SMPR2_SMP3_Pos) /*!< 0x00000200 */
-#define ADC_SMPR2_SMP3_1 (0x2UL << ADC_SMPR2_SMP3_Pos) /*!< 0x00000400 */
-#define ADC_SMPR2_SMP3_2 (0x4UL << ADC_SMPR2_SMP3_Pos) /*!< 0x00000800 */
-#define ADC_SMPR2_SMP4_Pos (12U)
-#define ADC_SMPR2_SMP4_Msk (0x7UL << ADC_SMPR2_SMP4_Pos) /*!< 0x00007000 */
-#define ADC_SMPR2_SMP4 ADC_SMPR2_SMP4_Msk /*!<SMP4[2:0] bits (Channel 4 Sample time selection) */
-#define ADC_SMPR2_SMP4_0 (0x1UL << ADC_SMPR2_SMP4_Pos) /*!< 0x00001000 */
-#define ADC_SMPR2_SMP4_1 (0x2UL << ADC_SMPR2_SMP4_Pos) /*!< 0x00002000 */
-#define ADC_SMPR2_SMP4_2 (0x4UL << ADC_SMPR2_SMP4_Pos) /*!< 0x00004000 */
-#define ADC_SMPR2_SMP5_Pos (15U)
-#define ADC_SMPR2_SMP5_Msk (0x7UL << ADC_SMPR2_SMP5_Pos) /*!< 0x00038000 */
-#define ADC_SMPR2_SMP5 ADC_SMPR2_SMP5_Msk /*!<SMP5[2:0] bits (Channel 5 Sample time selection) */
-#define ADC_SMPR2_SMP5_0 (0x1UL << ADC_SMPR2_SMP5_Pos) /*!< 0x00008000 */
-#define ADC_SMPR2_SMP5_1 (0x2UL << ADC_SMPR2_SMP5_Pos) /*!< 0x00010000 */
-#define ADC_SMPR2_SMP5_2 (0x4UL << ADC_SMPR2_SMP5_Pos) /*!< 0x00020000 */
-#define ADC_SMPR2_SMP6_Pos (18U)
-#define ADC_SMPR2_SMP6_Msk (0x7UL << ADC_SMPR2_SMP6_Pos) /*!< 0x001C0000 */
-#define ADC_SMPR2_SMP6 ADC_SMPR2_SMP6_Msk /*!<SMP6[2:0] bits (Channel 6 Sample time selection) */
-#define ADC_SMPR2_SMP6_0 (0x1UL << ADC_SMPR2_SMP6_Pos) /*!< 0x00040000 */
-#define ADC_SMPR2_SMP6_1 (0x2UL << ADC_SMPR2_SMP6_Pos) /*!< 0x00080000 */
-#define ADC_SMPR2_SMP6_2 (0x4UL << ADC_SMPR2_SMP6_Pos) /*!< 0x00100000 */
-#define ADC_SMPR2_SMP7_Pos (21U)
-#define ADC_SMPR2_SMP7_Msk (0x7UL << ADC_SMPR2_SMP7_Pos) /*!< 0x00E00000 */
-#define ADC_SMPR2_SMP7 ADC_SMPR2_SMP7_Msk /*!<SMP7[2:0] bits (Channel 7 Sample time selection) */
-#define ADC_SMPR2_SMP7_0 (0x1UL << ADC_SMPR2_SMP7_Pos) /*!< 0x00200000 */
-#define ADC_SMPR2_SMP7_1 (0x2UL << ADC_SMPR2_SMP7_Pos) /*!< 0x00400000 */
-#define ADC_SMPR2_SMP7_2 (0x4UL << ADC_SMPR2_SMP7_Pos) /*!< 0x00800000 */
-#define ADC_SMPR2_SMP8_Pos (24U)
-#define ADC_SMPR2_SMP8_Msk (0x7UL << ADC_SMPR2_SMP8_Pos) /*!< 0x07000000 */
-#define ADC_SMPR2_SMP8 ADC_SMPR2_SMP8_Msk /*!<SMP8[2:0] bits (Channel 8 Sample time selection) */
-#define ADC_SMPR2_SMP8_0 (0x1UL << ADC_SMPR2_SMP8_Pos) /*!< 0x01000000 */
-#define ADC_SMPR2_SMP8_1 (0x2UL << ADC_SMPR2_SMP8_Pos) /*!< 0x02000000 */
-#define ADC_SMPR2_SMP8_2 (0x4UL << ADC_SMPR2_SMP8_Pos) /*!< 0x04000000 */
-#define ADC_SMPR2_SMP9_Pos (27U)
-#define ADC_SMPR2_SMP9_Msk (0x7UL << ADC_SMPR2_SMP9_Pos) /*!< 0x38000000 */
-#define ADC_SMPR2_SMP9 ADC_SMPR2_SMP9_Msk /*!<SMP9[2:0] bits (Channel 9 Sample time selection) */
-#define ADC_SMPR2_SMP9_0 (0x1UL << ADC_SMPR2_SMP9_Pos) /*!< 0x08000000 */
-#define ADC_SMPR2_SMP9_1 (0x2UL << ADC_SMPR2_SMP9_Pos) /*!< 0x10000000 */
-#define ADC_SMPR2_SMP9_2 (0x4UL << ADC_SMPR2_SMP9_Pos) /*!< 0x20000000 */
-
-/****************** Bit definition for ADC_JOFR1 register *******************/
-#define ADC_JOFR1_JOFFSET1_Pos (0U)
-#define ADC_JOFR1_JOFFSET1_Msk (0xFFFUL << ADC_JOFR1_JOFFSET1_Pos) /*!< 0x00000FFF */
-#define ADC_JOFR1_JOFFSET1 ADC_JOFR1_JOFFSET1_Msk /*!<Data offset for injected channel 1 */
-
-/****************** Bit definition for ADC_JOFR2 register *******************/
-#define ADC_JOFR2_JOFFSET2_Pos (0U)
-#define ADC_JOFR2_JOFFSET2_Msk (0xFFFUL << ADC_JOFR2_JOFFSET2_Pos) /*!< 0x00000FFF */
-#define ADC_JOFR2_JOFFSET2 ADC_JOFR2_JOFFSET2_Msk /*!<Data offset for injected channel 2 */
-
-/****************** Bit definition for ADC_JOFR3 register *******************/
-#define ADC_JOFR3_JOFFSET3_Pos (0U)
-#define ADC_JOFR3_JOFFSET3_Msk (0xFFFUL << ADC_JOFR3_JOFFSET3_Pos) /*!< 0x00000FFF */
-#define ADC_JOFR3_JOFFSET3 ADC_JOFR3_JOFFSET3_Msk /*!<Data offset for injected channel 3 */
-
-/****************** Bit definition for ADC_JOFR4 register *******************/
-#define ADC_JOFR4_JOFFSET4_Pos (0U)
-#define ADC_JOFR4_JOFFSET4_Msk (0xFFFUL << ADC_JOFR4_JOFFSET4_Pos) /*!< 0x00000FFF */
-#define ADC_JOFR4_JOFFSET4 ADC_JOFR4_JOFFSET4_Msk /*!<Data offset for injected channel 4 */
-
-/******************* Bit definition for ADC_HTR register ********************/
-#define ADC_HTR_HT_Pos (0U)
-#define ADC_HTR_HT_Msk (0xFFFUL << ADC_HTR_HT_Pos) /*!< 0x00000FFF */
-#define ADC_HTR_HT ADC_HTR_HT_Msk /*!<Analog watchdog high threshold */
-
-/******************* Bit definition for ADC_LTR register ********************/
-#define ADC_LTR_LT_Pos (0U)
-#define ADC_LTR_LT_Msk (0xFFFUL << ADC_LTR_LT_Pos) /*!< 0x00000FFF */
-#define ADC_LTR_LT ADC_LTR_LT_Msk /*!<Analog watchdog low threshold */
-
-/******************* Bit definition for ADC_SQR1 register *******************/
-#define ADC_SQR1_SQ13_Pos (0U)
-#define ADC_SQR1_SQ13_Msk (0x1FUL << ADC_SQR1_SQ13_Pos) /*!< 0x0000001F */
-#define ADC_SQR1_SQ13 ADC_SQR1_SQ13_Msk /*!<SQ13[4:0] bits (13th conversion in regular sequence) */
-#define ADC_SQR1_SQ13_0 (0x01UL << ADC_SQR1_SQ13_Pos) /*!< 0x00000001 */
-#define ADC_SQR1_SQ13_1 (0x02UL << ADC_SQR1_SQ13_Pos) /*!< 0x00000002 */
-#define ADC_SQR1_SQ13_2 (0x04UL << ADC_SQR1_SQ13_Pos) /*!< 0x00000004 */
-#define ADC_SQR1_SQ13_3 (0x08UL << ADC_SQR1_SQ13_Pos) /*!< 0x00000008 */
-#define ADC_SQR1_SQ13_4 (0x10UL << ADC_SQR1_SQ13_Pos) /*!< 0x00000010 */
-#define ADC_SQR1_SQ14_Pos (5U)
-#define ADC_SQR1_SQ14_Msk (0x1FUL << ADC_SQR1_SQ14_Pos) /*!< 0x000003E0 */
-#define ADC_SQR1_SQ14 ADC_SQR1_SQ14_Msk /*!<SQ14[4:0] bits (14th conversion in regular sequence) */
-#define ADC_SQR1_SQ14_0 (0x01UL << ADC_SQR1_SQ14_Pos) /*!< 0x00000020 */
-#define ADC_SQR1_SQ14_1 (0x02UL << ADC_SQR1_SQ14_Pos) /*!< 0x00000040 */
-#define ADC_SQR1_SQ14_2 (0x04UL << ADC_SQR1_SQ14_Pos) /*!< 0x00000080 */
-#define ADC_SQR1_SQ14_3 (0x08UL << ADC_SQR1_SQ14_Pos) /*!< 0x00000100 */
-#define ADC_SQR1_SQ14_4 (0x10UL << ADC_SQR1_SQ14_Pos) /*!< 0x00000200 */
-#define ADC_SQR1_SQ15_Pos (10U)
-#define ADC_SQR1_SQ15_Msk (0x1FUL << ADC_SQR1_SQ15_Pos) /*!< 0x00007C00 */
-#define ADC_SQR1_SQ15 ADC_SQR1_SQ15_Msk /*!<SQ15[4:0] bits (15th conversion in regular sequence) */
-#define ADC_SQR1_SQ15_0 (0x01UL << ADC_SQR1_SQ15_Pos) /*!< 0x00000400 */
-#define ADC_SQR1_SQ15_1 (0x02UL << ADC_SQR1_SQ15_Pos) /*!< 0x00000800 */
-#define ADC_SQR1_SQ15_2 (0x04UL << ADC_SQR1_SQ15_Pos) /*!< 0x00001000 */
-#define ADC_SQR1_SQ15_3 (0x08UL << ADC_SQR1_SQ15_Pos) /*!< 0x00002000 */
-#define ADC_SQR1_SQ15_4 (0x10UL << ADC_SQR1_SQ15_Pos) /*!< 0x00004000 */
-#define ADC_SQR1_SQ16_Pos (15U)
-#define ADC_SQR1_SQ16_Msk (0x1FUL << ADC_SQR1_SQ16_Pos) /*!< 0x000F8000 */
-#define ADC_SQR1_SQ16 ADC_SQR1_SQ16_Msk /*!<SQ16[4:0] bits (16th conversion in regular sequence) */
-#define ADC_SQR1_SQ16_0 (0x01UL << ADC_SQR1_SQ16_Pos) /*!< 0x00008000 */
-#define ADC_SQR1_SQ16_1 (0x02UL << ADC_SQR1_SQ16_Pos) /*!< 0x00010000 */
-#define ADC_SQR1_SQ16_2 (0x04UL << ADC_SQR1_SQ16_Pos) /*!< 0x00020000 */
-#define ADC_SQR1_SQ16_3 (0x08UL << ADC_SQR1_SQ16_Pos) /*!< 0x00040000 */
-#define ADC_SQR1_SQ16_4 (0x10UL << ADC_SQR1_SQ16_Pos) /*!< 0x00080000 */
-#define ADC_SQR1_L_Pos (20U)
-#define ADC_SQR1_L_Msk (0xFUL << ADC_SQR1_L_Pos) /*!< 0x00F00000 */
-#define ADC_SQR1_L ADC_SQR1_L_Msk /*!<L[3:0] bits (Regular channel sequence length) */
-#define ADC_SQR1_L_0 (0x1UL << ADC_SQR1_L_Pos) /*!< 0x00100000 */
-#define ADC_SQR1_L_1 (0x2UL << ADC_SQR1_L_Pos) /*!< 0x00200000 */
-#define ADC_SQR1_L_2 (0x4UL << ADC_SQR1_L_Pos) /*!< 0x00400000 */
-#define ADC_SQR1_L_3 (0x8UL << ADC_SQR1_L_Pos) /*!< 0x00800000 */
-
-/******************* Bit definition for ADC_SQR2 register *******************/
-#define ADC_SQR2_SQ7_Pos (0U)
-#define ADC_SQR2_SQ7_Msk (0x1FUL << ADC_SQR2_SQ7_Pos) /*!< 0x0000001F */
-#define ADC_SQR2_SQ7 ADC_SQR2_SQ7_Msk /*!<SQ7[4:0] bits (7th conversion in regular sequence) */
-#define ADC_SQR2_SQ7_0 (0x01UL << ADC_SQR2_SQ7_Pos) /*!< 0x00000001 */
-#define ADC_SQR2_SQ7_1 (0x02UL << ADC_SQR2_SQ7_Pos) /*!< 0x00000002 */
-#define ADC_SQR2_SQ7_2 (0x04UL << ADC_SQR2_SQ7_Pos) /*!< 0x00000004 */
-#define ADC_SQR2_SQ7_3 (0x08UL << ADC_SQR2_SQ7_Pos) /*!< 0x00000008 */
-#define ADC_SQR2_SQ7_4 (0x10UL << ADC_SQR2_SQ7_Pos) /*!< 0x00000010 */
-#define ADC_SQR2_SQ8_Pos (5U)
-#define ADC_SQR2_SQ8_Msk (0x1FUL << ADC_SQR2_SQ8_Pos) /*!< 0x000003E0 */
-#define ADC_SQR2_SQ8 ADC_SQR2_SQ8_Msk /*!<SQ8[4:0] bits (8th conversion in regular sequence) */
-#define ADC_SQR2_SQ8_0 (0x01UL << ADC_SQR2_SQ8_Pos) /*!< 0x00000020 */
-#define ADC_SQR2_SQ8_1 (0x02UL << ADC_SQR2_SQ8_Pos) /*!< 0x00000040 */
-#define ADC_SQR2_SQ8_2 (0x04UL << ADC_SQR2_SQ8_Pos) /*!< 0x00000080 */
-#define ADC_SQR2_SQ8_3 (0x08UL << ADC_SQR2_SQ8_Pos) /*!< 0x00000100 */
-#define ADC_SQR2_SQ8_4 (0x10UL << ADC_SQR2_SQ8_Pos) /*!< 0x00000200 */
-#define ADC_SQR2_SQ9_Pos (10U)
-#define ADC_SQR2_SQ9_Msk (0x1FUL << ADC_SQR2_SQ9_Pos) /*!< 0x00007C00 */
-#define ADC_SQR2_SQ9 ADC_SQR2_SQ9_Msk /*!<SQ9[4:0] bits (9th conversion in regular sequence) */
-#define ADC_SQR2_SQ9_0 (0x01UL << ADC_SQR2_SQ9_Pos) /*!< 0x00000400 */
-#define ADC_SQR2_SQ9_1 (0x02UL << ADC_SQR2_SQ9_Pos) /*!< 0x00000800 */
-#define ADC_SQR2_SQ9_2 (0x04UL << ADC_SQR2_SQ9_Pos) /*!< 0x00001000 */
-#define ADC_SQR2_SQ9_3 (0x08UL << ADC_SQR2_SQ9_Pos) /*!< 0x00002000 */
-#define ADC_SQR2_SQ9_4 (0x10UL << ADC_SQR2_SQ9_Pos) /*!< 0x00004000 */
-#define ADC_SQR2_SQ10_Pos (15U)
-#define ADC_SQR2_SQ10_Msk (0x1FUL << ADC_SQR2_SQ10_Pos) /*!< 0x000F8000 */
-#define ADC_SQR2_SQ10 ADC_SQR2_SQ10_Msk /*!<SQ10[4:0] bits (10th conversion in regular sequence) */
-#define ADC_SQR2_SQ10_0 (0x01UL << ADC_SQR2_SQ10_Pos) /*!< 0x00008000 */
-#define ADC_SQR2_SQ10_1 (0x02UL << ADC_SQR2_SQ10_Pos) /*!< 0x00010000 */
-#define ADC_SQR2_SQ10_2 (0x04UL << ADC_SQR2_SQ10_Pos) /*!< 0x00020000 */
-#define ADC_SQR2_SQ10_3 (0x08UL << ADC_SQR2_SQ10_Pos) /*!< 0x00040000 */
-#define ADC_SQR2_SQ10_4 (0x10UL << ADC_SQR2_SQ10_Pos) /*!< 0x00080000 */
-#define ADC_SQR2_SQ11_Pos (20U)
-#define ADC_SQR2_SQ11_Msk (0x1FUL << ADC_SQR2_SQ11_Pos) /*!< 0x01F00000 */
-#define ADC_SQR2_SQ11 ADC_SQR2_SQ11_Msk /*!<SQ11[4:0] bits (11th conversion in regular sequence) */
-#define ADC_SQR2_SQ11_0 (0x01UL << ADC_SQR2_SQ11_Pos) /*!< 0x00100000 */
-#define ADC_SQR2_SQ11_1 (0x02UL << ADC_SQR2_SQ11_Pos) /*!< 0x00200000 */
-#define ADC_SQR2_SQ11_2 (0x04UL << ADC_SQR2_SQ11_Pos) /*!< 0x00400000 */
-#define ADC_SQR2_SQ11_3 (0x08UL << ADC_SQR2_SQ11_Pos) /*!< 0x00800000 */
-#define ADC_SQR2_SQ11_4 (0x10UL << ADC_SQR2_SQ11_Pos) /*!< 0x01000000 */
-#define ADC_SQR2_SQ12_Pos (25U)
-#define ADC_SQR2_SQ12_Msk (0x1FUL << ADC_SQR2_SQ12_Pos) /*!< 0x3E000000 */
-#define ADC_SQR2_SQ12 ADC_SQR2_SQ12_Msk /*!<SQ12[4:0] bits (12th conversion in regular sequence) */
-#define ADC_SQR2_SQ12_0 (0x01UL << ADC_SQR2_SQ12_Pos) /*!< 0x02000000 */
-#define ADC_SQR2_SQ12_1 (0x02UL << ADC_SQR2_SQ12_Pos) /*!< 0x04000000 */
-#define ADC_SQR2_SQ12_2 (0x04UL << ADC_SQR2_SQ12_Pos) /*!< 0x08000000 */
-#define ADC_SQR2_SQ12_3 (0x08UL << ADC_SQR2_SQ12_Pos) /*!< 0x10000000 */
-#define ADC_SQR2_SQ12_4 (0x10UL << ADC_SQR2_SQ12_Pos) /*!< 0x20000000 */
-
-/******************* Bit definition for ADC_SQR3 register *******************/
-#define ADC_SQR3_SQ1_Pos (0U)
-#define ADC_SQR3_SQ1_Msk (0x1FUL << ADC_SQR3_SQ1_Pos) /*!< 0x0000001F */
-#define ADC_SQR3_SQ1 ADC_SQR3_SQ1_Msk /*!<SQ1[4:0] bits (1st conversion in regular sequence) */
-#define ADC_SQR3_SQ1_0 (0x01UL << ADC_SQR3_SQ1_Pos) /*!< 0x00000001 */
-#define ADC_SQR3_SQ1_1 (0x02UL << ADC_SQR3_SQ1_Pos) /*!< 0x00000002 */
-#define ADC_SQR3_SQ1_2 (0x04UL << ADC_SQR3_SQ1_Pos) /*!< 0x00000004 */
-#define ADC_SQR3_SQ1_3 (0x08UL << ADC_SQR3_SQ1_Pos) /*!< 0x00000008 */
-#define ADC_SQR3_SQ1_4 (0x10UL << ADC_SQR3_SQ1_Pos) /*!< 0x00000010 */
-#define ADC_SQR3_SQ2_Pos (5U)
-#define ADC_SQR3_SQ2_Msk (0x1FUL << ADC_SQR3_SQ2_Pos) /*!< 0x000003E0 */
-#define ADC_SQR3_SQ2 ADC_SQR3_SQ2_Msk /*!<SQ2[4:0] bits (2nd conversion in regular sequence) */
-#define ADC_SQR3_SQ2_0 (0x01UL << ADC_SQR3_SQ2_Pos) /*!< 0x00000020 */
-#define ADC_SQR3_SQ2_1 (0x02UL << ADC_SQR3_SQ2_Pos) /*!< 0x00000040 */
-#define ADC_SQR3_SQ2_2 (0x04UL << ADC_SQR3_SQ2_Pos) /*!< 0x00000080 */
-#define ADC_SQR3_SQ2_3 (0x08UL << ADC_SQR3_SQ2_Pos) /*!< 0x00000100 */
-#define ADC_SQR3_SQ2_4 (0x10UL << ADC_SQR3_SQ2_Pos) /*!< 0x00000200 */
-#define ADC_SQR3_SQ3_Pos (10U)
-#define ADC_SQR3_SQ3_Msk (0x1FUL << ADC_SQR3_SQ3_Pos) /*!< 0x00007C00 */
-#define ADC_SQR3_SQ3 ADC_SQR3_SQ3_Msk /*!<SQ3[4:0] bits (3rd conversion in regular sequence) */
-#define ADC_SQR3_SQ3_0 (0x01UL << ADC_SQR3_SQ3_Pos) /*!< 0x00000400 */
-#define ADC_SQR3_SQ3_1 (0x02UL << ADC_SQR3_SQ3_Pos) /*!< 0x00000800 */
-#define ADC_SQR3_SQ3_2 (0x04UL << ADC_SQR3_SQ3_Pos) /*!< 0x00001000 */
-#define ADC_SQR3_SQ3_3 (0x08UL << ADC_SQR3_SQ3_Pos) /*!< 0x00002000 */
-#define ADC_SQR3_SQ3_4 (0x10UL << ADC_SQR3_SQ3_Pos) /*!< 0x00004000 */
-#define ADC_SQR3_SQ4_Pos (15U)
-#define ADC_SQR3_SQ4_Msk (0x1FUL << ADC_SQR3_SQ4_Pos) /*!< 0x000F8000 */
-#define ADC_SQR3_SQ4 ADC_SQR3_SQ4_Msk /*!<SQ4[4:0] bits (4th conversion in regular sequence) */
-#define ADC_SQR3_SQ4_0 (0x01UL << ADC_SQR3_SQ4_Pos) /*!< 0x00008000 */
-#define ADC_SQR3_SQ4_1 (0x02UL << ADC_SQR3_SQ4_Pos) /*!< 0x00010000 */
-#define ADC_SQR3_SQ4_2 (0x04UL << ADC_SQR3_SQ4_Pos) /*!< 0x00020000 */
-#define ADC_SQR3_SQ4_3 (0x08UL << ADC_SQR3_SQ4_Pos) /*!< 0x00040000 */
-#define ADC_SQR3_SQ4_4 (0x10UL << ADC_SQR3_SQ4_Pos) /*!< 0x00080000 */
-#define ADC_SQR3_SQ5_Pos (20U)
-#define ADC_SQR3_SQ5_Msk (0x1FUL << ADC_SQR3_SQ5_Pos) /*!< 0x01F00000 */
-#define ADC_SQR3_SQ5 ADC_SQR3_SQ5_Msk /*!<SQ5[4:0] bits (5th conversion in regular sequence) */
-#define ADC_SQR3_SQ5_0 (0x01UL << ADC_SQR3_SQ5_Pos) /*!< 0x00100000 */
-#define ADC_SQR3_SQ5_1 (0x02UL << ADC_SQR3_SQ5_Pos) /*!< 0x00200000 */
-#define ADC_SQR3_SQ5_2 (0x04UL << ADC_SQR3_SQ5_Pos) /*!< 0x00400000 */
-#define ADC_SQR3_SQ5_3 (0x08UL << ADC_SQR3_SQ5_Pos) /*!< 0x00800000 */
-#define ADC_SQR3_SQ5_4 (0x10UL << ADC_SQR3_SQ5_Pos) /*!< 0x01000000 */
-#define ADC_SQR3_SQ6_Pos (25U)
-#define ADC_SQR3_SQ6_Msk (0x1FUL << ADC_SQR3_SQ6_Pos) /*!< 0x3E000000 */
-#define ADC_SQR3_SQ6 ADC_SQR3_SQ6_Msk /*!<SQ6[4:0] bits (6th conversion in regular sequence) */
-#define ADC_SQR3_SQ6_0 (0x01UL << ADC_SQR3_SQ6_Pos) /*!< 0x02000000 */
-#define ADC_SQR3_SQ6_1 (0x02UL << ADC_SQR3_SQ6_Pos) /*!< 0x04000000 */
-#define ADC_SQR3_SQ6_2 (0x04UL << ADC_SQR3_SQ6_Pos) /*!< 0x08000000 */
-#define ADC_SQR3_SQ6_3 (0x08UL << ADC_SQR3_SQ6_Pos) /*!< 0x10000000 */
-#define ADC_SQR3_SQ6_4 (0x10UL << ADC_SQR3_SQ6_Pos) /*!< 0x20000000 */
-
-/******************* Bit definition for ADC_JSQR register *******************/
-#define ADC_JSQR_JSQ1_Pos (0U)
-#define ADC_JSQR_JSQ1_Msk (0x1FUL << ADC_JSQR_JSQ1_Pos) /*!< 0x0000001F */
-#define ADC_JSQR_JSQ1 ADC_JSQR_JSQ1_Msk /*!<JSQ1[4:0] bits (1st conversion in injected sequence) */
-#define ADC_JSQR_JSQ1_0 (0x01UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000001 */
-#define ADC_JSQR_JSQ1_1 (0x02UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000002 */
-#define ADC_JSQR_JSQ1_2 (0x04UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000004 */
-#define ADC_JSQR_JSQ1_3 (0x08UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000008 */
-#define ADC_JSQR_JSQ1_4 (0x10UL << ADC_JSQR_JSQ1_Pos) /*!< 0x00000010 */
-#define ADC_JSQR_JSQ2_Pos (5U)
-#define ADC_JSQR_JSQ2_Msk (0x1FUL << ADC_JSQR_JSQ2_Pos) /*!< 0x000003E0 */
-#define ADC_JSQR_JSQ2 ADC_JSQR_JSQ2_Msk /*!<JSQ2[4:0] bits (2nd conversion in injected sequence) */
-#define ADC_JSQR_JSQ2_0 (0x01UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00000020 */
-#define ADC_JSQR_JSQ2_1 (0x02UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00000040 */
-#define ADC_JSQR_JSQ2_2 (0x04UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00000080 */
-#define ADC_JSQR_JSQ2_3 (0x08UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00000100 */
-#define ADC_JSQR_JSQ2_4 (0x10UL << ADC_JSQR_JSQ2_Pos) /*!< 0x00000200 */
-#define ADC_JSQR_JSQ3_Pos (10U)
-#define ADC_JSQR_JSQ3_Msk (0x1FUL << ADC_JSQR_JSQ3_Pos) /*!< 0x00007C00 */
-#define ADC_JSQR_JSQ3 ADC_JSQR_JSQ3_Msk /*!<JSQ3[4:0] bits (3rd conversion in injected sequence) */
-#define ADC_JSQR_JSQ3_0 (0x01UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00000400 */
-#define ADC_JSQR_JSQ3_1 (0x02UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00000800 */
-#define ADC_JSQR_JSQ3_2 (0x04UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00001000 */
-#define ADC_JSQR_JSQ3_3 (0x08UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00002000 */
-#define ADC_JSQR_JSQ3_4 (0x10UL << ADC_JSQR_JSQ3_Pos) /*!< 0x00004000 */
-#define ADC_JSQR_JSQ4_Pos (15U)
-#define ADC_JSQR_JSQ4_Msk (0x1FUL << ADC_JSQR_JSQ4_Pos) /*!< 0x000F8000 */
-#define ADC_JSQR_JSQ4 ADC_JSQR_JSQ4_Msk /*!<JSQ4[4:0] bits (4th conversion in injected sequence) */
-#define ADC_JSQR_JSQ4_0 (0x01UL << ADC_JSQR_JSQ4_Pos) /*!< 0x00008000 */
-#define ADC_JSQR_JSQ4_1 (0x02UL << ADC_JSQR_JSQ4_Pos) /*!< 0x00010000 */
-#define ADC_JSQR_JSQ4_2 (0x04UL << ADC_JSQR_JSQ4_Pos) /*!< 0x00020000 */
-#define ADC_JSQR_JSQ4_3 (0x08UL << ADC_JSQR_JSQ4_Pos) /*!< 0x00040000 */
-#define ADC_JSQR_JSQ4_4 (0x10UL << ADC_JSQR_JSQ4_Pos) /*!< 0x00080000 */
-#define ADC_JSQR_JL_Pos (20U)
-#define ADC_JSQR_JL_Msk (0x3UL << ADC_JSQR_JL_Pos) /*!< 0x00300000 */
-#define ADC_JSQR_JL ADC_JSQR_JL_Msk /*!<JL[1:0] bits (Injected Sequence length) */
-#define ADC_JSQR_JL_0 (0x1UL << ADC_JSQR_JL_Pos) /*!< 0x00100000 */
-#define ADC_JSQR_JL_1 (0x2UL << ADC_JSQR_JL_Pos) /*!< 0x00200000 */
-
-/******************* Bit definition for ADC_JDR1 register *******************/
-#define ADC_JDR1_JDATA_Pos (0U)
-#define ADC_JDR1_JDATA_Msk (0xFFFFUL << ADC_JDR1_JDATA_Pos) /*!< 0x0000FFFF */
-#define ADC_JDR1_JDATA ADC_JDR1_JDATA_Msk /*!<Injected data */
-
-/******************* Bit definition for ADC_JDR2 register *******************/
-#define ADC_JDR2_JDATA_Pos (0U)
-#define ADC_JDR2_JDATA_Msk (0xFFFFUL << ADC_JDR2_JDATA_Pos) /*!< 0x0000FFFF */
-#define ADC_JDR2_JDATA ADC_JDR2_JDATA_Msk /*!<Injected data */
-
-/******************* Bit definition for ADC_JDR3 register *******************/
-#define ADC_JDR3_JDATA_Pos (0U)
-#define ADC_JDR3_JDATA_Msk (0xFFFFUL << ADC_JDR3_JDATA_Pos) /*!< 0x0000FFFF */
-#define ADC_JDR3_JDATA ADC_JDR3_JDATA_Msk /*!<Injected data */
-
-/******************* Bit definition for ADC_JDR4 register *******************/
-#define ADC_JDR4_JDATA_Pos (0U)
-#define ADC_JDR4_JDATA_Msk (0xFFFFUL << ADC_JDR4_JDATA_Pos) /*!< 0x0000FFFF */
-#define ADC_JDR4_JDATA ADC_JDR4_JDATA_Msk /*!<Injected data */
-
-/******************** Bit definition for ADC_DR register ********************/
-#define ADC_DR_DATA_Pos (0U)
-#define ADC_DR_DATA_Msk (0xFFFFUL << ADC_DR_DATA_Pos) /*!< 0x0000FFFF */
-#define ADC_DR_DATA ADC_DR_DATA_Msk /*!<Regular data */
-#define ADC_DR_ADC2DATA_Pos (16U)
-#define ADC_DR_ADC2DATA_Msk (0xFFFFUL << ADC_DR_ADC2DATA_Pos) /*!< 0xFFFF0000 */
-#define ADC_DR_ADC2DATA ADC_DR_ADC2DATA_Msk /*!<ADC2 data */
-
-/******************* Bit definition for ADC_CSR register ********************/
-#define ADC_CSR_AWD1_Pos (0U)
-#define ADC_CSR_AWD1_Msk (0x1UL << ADC_CSR_AWD1_Pos) /*!< 0x00000001 */
-#define ADC_CSR_AWD1 ADC_CSR_AWD1_Msk /*!<ADC1 Analog watchdog flag */
-#define ADC_CSR_EOC1_Pos (1U)
-#define ADC_CSR_EOC1_Msk (0x1UL << ADC_CSR_EOC1_Pos) /*!< 0x00000002 */
-#define ADC_CSR_EOC1 ADC_CSR_EOC1_Msk /*!<ADC1 End of conversion */
-#define ADC_CSR_JEOC1_Pos (2U)
-#define ADC_CSR_JEOC1_Msk (0x1UL << ADC_CSR_JEOC1_Pos) /*!< 0x00000004 */
-#define ADC_CSR_JEOC1 ADC_CSR_JEOC1_Msk /*!<ADC1 Injected channel end of conversion */
-#define ADC_CSR_JSTRT1_Pos (3U)
-#define ADC_CSR_JSTRT1_Msk (0x1UL << ADC_CSR_JSTRT1_Pos) /*!< 0x00000008 */
-#define ADC_CSR_JSTRT1 ADC_CSR_JSTRT1_Msk /*!<ADC1 Injected channel Start flag */
-#define ADC_CSR_STRT1_Pos (4U)
-#define ADC_CSR_STRT1_Msk (0x1UL << ADC_CSR_STRT1_Pos) /*!< 0x00000010 */
-#define ADC_CSR_STRT1 ADC_CSR_STRT1_Msk /*!<ADC1 Regular channel Start flag */
-#define ADC_CSR_OVR1_Pos (5U)
-#define ADC_CSR_OVR1_Msk (0x1UL << ADC_CSR_OVR1_Pos) /*!< 0x00000020 */
-#define ADC_CSR_OVR1 ADC_CSR_OVR1_Msk /*!<ADC1 DMA overrun flag */
-
-/* Legacy defines */
-#define ADC_CSR_DOVR1 ADC_CSR_OVR1
-
-/******************* Bit definition for ADC_CCR register ********************/
-#define ADC_CCR_MULTI_Pos (0U)
-#define ADC_CCR_MULTI_Msk (0x1FUL << ADC_CCR_MULTI_Pos) /*!< 0x0000001F */
-#define ADC_CCR_MULTI ADC_CCR_MULTI_Msk /*!<MULTI[4:0] bits (Multi-ADC mode selection) */
-#define ADC_CCR_MULTI_0 (0x01UL << ADC_CCR_MULTI_Pos) /*!< 0x00000001 */
-#define ADC_CCR_MULTI_1 (0x02UL << ADC_CCR_MULTI_Pos) /*!< 0x00000002 */
-#define ADC_CCR_MULTI_2 (0x04UL << ADC_CCR_MULTI_Pos) /*!< 0x00000004 */
-#define ADC_CCR_MULTI_3 (0x08UL << ADC_CCR_MULTI_Pos) /*!< 0x00000008 */
-#define ADC_CCR_MULTI_4 (0x10UL << ADC_CCR_MULTI_Pos) /*!< 0x00000010 */
-#define ADC_CCR_DELAY_Pos (8U)
-#define ADC_CCR_DELAY_Msk (0xFUL << ADC_CCR_DELAY_Pos) /*!< 0x00000F00 */
-#define ADC_CCR_DELAY ADC_CCR_DELAY_Msk /*!<DELAY[3:0] bits (Delay between 2 sampling phases) */
-#define ADC_CCR_DELAY_0 (0x1UL << ADC_CCR_DELAY_Pos) /*!< 0x00000100 */
-#define ADC_CCR_DELAY_1 (0x2UL << ADC_CCR_DELAY_Pos) /*!< 0x00000200 */
-#define ADC_CCR_DELAY_2 (0x4UL << ADC_CCR_DELAY_Pos) /*!< 0x00000400 */
-#define ADC_CCR_DELAY_3 (0x8UL << ADC_CCR_DELAY_Pos) /*!< 0x00000800 */
-#define ADC_CCR_DDS_Pos (13U)
-#define ADC_CCR_DDS_Msk (0x1UL << ADC_CCR_DDS_Pos) /*!< 0x00002000 */
-#define ADC_CCR_DDS ADC_CCR_DDS_Msk /*!<DMA disable selection (Multi-ADC mode) */
-#define ADC_CCR_DMA_Pos (14U)
-#define ADC_CCR_DMA_Msk (0x3UL << ADC_CCR_DMA_Pos) /*!< 0x0000C000 */
-#define ADC_CCR_DMA ADC_CCR_DMA_Msk /*!<DMA[1:0] bits (Direct Memory Access mode for multimode) */
-#define ADC_CCR_DMA_0 (0x1UL << ADC_CCR_DMA_Pos) /*!< 0x00004000 */
-#define ADC_CCR_DMA_1 (0x2UL << ADC_CCR_DMA_Pos) /*!< 0x00008000 */
-#define ADC_CCR_ADCPRE_Pos (16U)
-#define ADC_CCR_ADCPRE_Msk (0x3UL << ADC_CCR_ADCPRE_Pos) /*!< 0x00030000 */
-#define ADC_CCR_ADCPRE ADC_CCR_ADCPRE_Msk /*!<ADCPRE[1:0] bits (ADC prescaler) */
-#define ADC_CCR_ADCPRE_0 (0x1UL << ADC_CCR_ADCPRE_Pos) /*!< 0x00010000 */
-#define ADC_CCR_ADCPRE_1 (0x2UL << ADC_CCR_ADCPRE_Pos) /*!< 0x00020000 */
-#define ADC_CCR_VBATE_Pos (22U)
-#define ADC_CCR_VBATE_Msk (0x1UL << ADC_CCR_VBATE_Pos) /*!< 0x00400000 */
-#define ADC_CCR_VBATE ADC_CCR_VBATE_Msk /*!<VBAT Enable */
-#define ADC_CCR_TSVREFE_Pos (23U)
-#define ADC_CCR_TSVREFE_Msk (0x1UL << ADC_CCR_TSVREFE_Pos) /*!< 0x00800000 */
-#define ADC_CCR_TSVREFE ADC_CCR_TSVREFE_Msk /*!<Temperature Sensor and VREFINT Enable */
-
-/******************* Bit definition for ADC_CDR register ********************/
-#define ADC_CDR_DATA1_Pos (0U)
-#define ADC_CDR_DATA1_Msk (0xFFFFUL << ADC_CDR_DATA1_Pos) /*!< 0x0000FFFF */
-#define ADC_CDR_DATA1 ADC_CDR_DATA1_Msk /*!<1st data of a pair of regular conversions */
-#define ADC_CDR_DATA2_Pos (16U)
-#define ADC_CDR_DATA2_Msk (0xFFFFUL << ADC_CDR_DATA2_Pos) /*!< 0xFFFF0000 */
-#define ADC_CDR_DATA2 ADC_CDR_DATA2_Msk /*!<2nd data of a pair of regular conversions */
-
-/* Legacy defines */
-#define ADC_CDR_RDATA_MST ADC_CDR_DATA1
-#define ADC_CDR_RDATA_SLV ADC_CDR_DATA2
-
-/******************************************************************************/
-/* */
-/* CRC calculation unit */
-/* */
-/******************************************************************************/
-/******************* Bit definition for CRC_DR register *********************/
-#define CRC_DR_DR_Pos (0U)
-#define CRC_DR_DR_Msk (0xFFFFFFFFUL << CRC_DR_DR_Pos) /*!< 0xFFFFFFFF */
-#define CRC_DR_DR CRC_DR_DR_Msk /*!< Data register bits */
-
-
-/******************* Bit definition for CRC_IDR register ********************/
-#define CRC_IDR_IDR_Pos (0U)
-#define CRC_IDR_IDR_Msk (0xFFUL << CRC_IDR_IDR_Pos) /*!< 0x000000FF */
-#define CRC_IDR_IDR CRC_IDR_IDR_Msk /*!< General-purpose 8-bit data register bits */
-
-
-/******************** Bit definition for CRC_CR register ********************/
-#define CRC_CR_RESET_Pos (0U)
-#define CRC_CR_RESET_Msk (0x1UL << CRC_CR_RESET_Pos) /*!< 0x00000001 */
-#define CRC_CR_RESET CRC_CR_RESET_Msk /*!< RESET bit */
-
-
-/******************************************************************************/
-/* */
-/* DMA Controller */
-/* */
-/******************************************************************************/
-/******************** Bits definition for DMA_SxCR register *****************/
-#define DMA_SxCR_CHSEL_Pos (25U)
-#define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */
-#define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk
-#define DMA_SxCR_CHSEL_0 0x02000000U
-#define DMA_SxCR_CHSEL_1 0x04000000U
-#define DMA_SxCR_CHSEL_2 0x08000000U
-#define DMA_SxCR_MBURST_Pos (23U)
-#define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */
-#define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
-#define DMA_SxCR_MBURST_0 (0x1UL << DMA_SxCR_MBURST_Pos) /*!< 0x00800000 */
-#define DMA_SxCR_MBURST_1 (0x2UL << DMA_SxCR_MBURST_Pos) /*!< 0x01000000 */
-#define DMA_SxCR_PBURST_Pos (21U)
-#define DMA_SxCR_PBURST_Msk (0x3UL << DMA_SxCR_PBURST_Pos) /*!< 0x00600000 */
-#define DMA_SxCR_PBURST DMA_SxCR_PBURST_Msk
-#define DMA_SxCR_PBURST_0 (0x1UL << DMA_SxCR_PBURST_Pos) /*!< 0x00200000 */
-#define DMA_SxCR_PBURST_1 (0x2UL << DMA_SxCR_PBURST_Pos) /*!< 0x00400000 */
-#define DMA_SxCR_CT_Pos (19U)
-#define DMA_SxCR_CT_Msk (0x1UL << DMA_SxCR_CT_Pos) /*!< 0x00080000 */
-#define DMA_SxCR_CT DMA_SxCR_CT_Msk
-#define DMA_SxCR_DBM_Pos (18U)
-#define DMA_SxCR_DBM_Msk (0x1UL << DMA_SxCR_DBM_Pos) /*!< 0x00040000 */
-#define DMA_SxCR_DBM DMA_SxCR_DBM_Msk
-#define DMA_SxCR_PL_Pos (16U)
-#define DMA_SxCR_PL_Msk (0x3UL << DMA_SxCR_PL_Pos) /*!< 0x00030000 */
-#define DMA_SxCR_PL DMA_SxCR_PL_Msk
-#define DMA_SxCR_PL_0 (0x1UL << DMA_SxCR_PL_Pos) /*!< 0x00010000 */
-#define DMA_SxCR_PL_1 (0x2UL << DMA_SxCR_PL_Pos) /*!< 0x00020000 */
-#define DMA_SxCR_PINCOS_Pos (15U)
-#define DMA_SxCR_PINCOS_Msk (0x1UL << DMA_SxCR_PINCOS_Pos) /*!< 0x00008000 */
-#define DMA_SxCR_PINCOS DMA_SxCR_PINCOS_Msk
-#define DMA_SxCR_MSIZE_Pos (13U)
-#define DMA_SxCR_MSIZE_Msk (0x3UL << DMA_SxCR_MSIZE_Pos) /*!< 0x00006000 */
-#define DMA_SxCR_MSIZE DMA_SxCR_MSIZE_Msk
-#define DMA_SxCR_MSIZE_0 (0x1UL << DMA_SxCR_MSIZE_Pos) /*!< 0x00002000 */
-#define DMA_SxCR_MSIZE_1 (0x2UL << DMA_SxCR_MSIZE_Pos) /*!< 0x00004000 */
-#define DMA_SxCR_PSIZE_Pos (11U)
-#define DMA_SxCR_PSIZE_Msk (0x3UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001800 */
-#define DMA_SxCR_PSIZE DMA_SxCR_PSIZE_Msk
-#define DMA_SxCR_PSIZE_0 (0x1UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00000800 */
-#define DMA_SxCR_PSIZE_1 (0x2UL << DMA_SxCR_PSIZE_Pos) /*!< 0x00001000 */
-#define DMA_SxCR_MINC_Pos (10U)
-#define DMA_SxCR_MINC_Msk (0x1UL << DMA_SxCR_MINC_Pos) /*!< 0x00000400 */
-#define DMA_SxCR_MINC DMA_SxCR_MINC_Msk
-#define DMA_SxCR_PINC_Pos (9U)
-#define DMA_SxCR_PINC_Msk (0x1UL << DMA_SxCR_PINC_Pos) /*!< 0x00000200 */
-#define DMA_SxCR_PINC DMA_SxCR_PINC_Msk
-#define DMA_SxCR_CIRC_Pos (8U)
-#define DMA_SxCR_CIRC_Msk (0x1UL << DMA_SxCR_CIRC_Pos) /*!< 0x00000100 */
-#define DMA_SxCR_CIRC DMA_SxCR_CIRC_Msk
-#define DMA_SxCR_DIR_Pos (6U)
-#define DMA_SxCR_DIR_Msk (0x3UL << DMA_SxCR_DIR_Pos) /*!< 0x000000C0 */
-#define DMA_SxCR_DIR DMA_SxCR_DIR_Msk
-#define DMA_SxCR_DIR_0 (0x1UL << DMA_SxCR_DIR_Pos) /*!< 0x00000040 */
-#define DMA_SxCR_DIR_1 (0x2UL << DMA_SxCR_DIR_Pos) /*!< 0x00000080 */
-#define DMA_SxCR_PFCTRL_Pos (5U)
-#define DMA_SxCR_PFCTRL_Msk (0x1UL << DMA_SxCR_PFCTRL_Pos) /*!< 0x00000020 */
-#define DMA_SxCR_PFCTRL DMA_SxCR_PFCTRL_Msk
-#define DMA_SxCR_TCIE_Pos (4U)
-#define DMA_SxCR_TCIE_Msk (0x1UL << DMA_SxCR_TCIE_Pos) /*!< 0x00000010 */
-#define DMA_SxCR_TCIE DMA_SxCR_TCIE_Msk
-#define DMA_SxCR_HTIE_Pos (3U)
-#define DMA_SxCR_HTIE_Msk (0x1UL << DMA_SxCR_HTIE_Pos) /*!< 0x00000008 */
-#define DMA_SxCR_HTIE DMA_SxCR_HTIE_Msk
-#define DMA_SxCR_TEIE_Pos (2U)
-#define DMA_SxCR_TEIE_Msk (0x1UL << DMA_SxCR_TEIE_Pos) /*!< 0x00000004 */
-#define DMA_SxCR_TEIE DMA_SxCR_TEIE_Msk
-#define DMA_SxCR_DMEIE_Pos (1U)
-#define DMA_SxCR_DMEIE_Msk (0x1UL << DMA_SxCR_DMEIE_Pos) /*!< 0x00000002 */
-#define DMA_SxCR_DMEIE DMA_SxCR_DMEIE_Msk
-#define DMA_SxCR_EN_Pos (0U)
-#define DMA_SxCR_EN_Msk (0x1UL << DMA_SxCR_EN_Pos) /*!< 0x00000001 */
-#define DMA_SxCR_EN DMA_SxCR_EN_Msk
-
-/* Legacy defines */
-#define DMA_SxCR_ACK_Pos (20U)
-#define DMA_SxCR_ACK_Msk (0x1UL << DMA_SxCR_ACK_Pos) /*!< 0x00100000 */
-#define DMA_SxCR_ACK DMA_SxCR_ACK_Msk
-
-/******************** Bits definition for DMA_SxCNDTR register **************/
-#define DMA_SxNDT_Pos (0U)
-#define DMA_SxNDT_Msk (0xFFFFUL << DMA_SxNDT_Pos) /*!< 0x0000FFFF */
-#define DMA_SxNDT DMA_SxNDT_Msk
-#define DMA_SxNDT_0 (0x0001UL << DMA_SxNDT_Pos) /*!< 0x00000001 */
-#define DMA_SxNDT_1 (0x0002UL << DMA_SxNDT_Pos) /*!< 0x00000002 */
-#define DMA_SxNDT_2 (0x0004UL << DMA_SxNDT_Pos) /*!< 0x00000004 */
-#define DMA_SxNDT_3 (0x0008UL << DMA_SxNDT_Pos) /*!< 0x00000008 */
-#define DMA_SxNDT_4 (0x0010UL << DMA_SxNDT_Pos) /*!< 0x00000010 */
-#define DMA_SxNDT_5 (0x0020UL << DMA_SxNDT_Pos) /*!< 0x00000020 */
-#define DMA_SxNDT_6 (0x0040UL << DMA_SxNDT_Pos) /*!< 0x00000040 */
-#define DMA_SxNDT_7 (0x0080UL << DMA_SxNDT_Pos) /*!< 0x00000080 */
-#define DMA_SxNDT_8 (0x0100UL << DMA_SxNDT_Pos) /*!< 0x00000100 */
-#define DMA_SxNDT_9 (0x0200UL << DMA_SxNDT_Pos) /*!< 0x00000200 */
-#define DMA_SxNDT_10 (0x0400UL << DMA_SxNDT_Pos) /*!< 0x00000400 */
-#define DMA_SxNDT_11 (0x0800UL << DMA_SxNDT_Pos) /*!< 0x00000800 */
-#define DMA_SxNDT_12 (0x1000UL << DMA_SxNDT_Pos) /*!< 0x00001000 */
-#define DMA_SxNDT_13 (0x2000UL << DMA_SxNDT_Pos) /*!< 0x00002000 */
-#define DMA_SxNDT_14 (0x4000UL << DMA_SxNDT_Pos) /*!< 0x00004000 */
-#define DMA_SxNDT_15 (0x8000UL << DMA_SxNDT_Pos) /*!< 0x00008000 */
-
-/******************** Bits definition for DMA_SxFCR register ****************/
-#define DMA_SxFCR_FEIE_Pos (7U)
-#define DMA_SxFCR_FEIE_Msk (0x1UL << DMA_SxFCR_FEIE_Pos) /*!< 0x00000080 */
-#define DMA_SxFCR_FEIE DMA_SxFCR_FEIE_Msk
-#define DMA_SxFCR_FS_Pos (3U)
-#define DMA_SxFCR_FS_Msk (0x7UL << DMA_SxFCR_FS_Pos) /*!< 0x00000038 */
-#define DMA_SxFCR_FS DMA_SxFCR_FS_Msk
-#define DMA_SxFCR_FS_0 (0x1UL << DMA_SxFCR_FS_Pos) /*!< 0x00000008 */
-#define DMA_SxFCR_FS_1 (0x2UL << DMA_SxFCR_FS_Pos) /*!< 0x00000010 */
-#define DMA_SxFCR_FS_2 (0x4UL << DMA_SxFCR_FS_Pos) /*!< 0x00000020 */
-#define DMA_SxFCR_DMDIS_Pos (2U)
-#define DMA_SxFCR_DMDIS_Msk (0x1UL << DMA_SxFCR_DMDIS_Pos) /*!< 0x00000004 */
-#define DMA_SxFCR_DMDIS DMA_SxFCR_DMDIS_Msk
-#define DMA_SxFCR_FTH_Pos (0U)
-#define DMA_SxFCR_FTH_Msk (0x3UL << DMA_SxFCR_FTH_Pos) /*!< 0x00000003 */
-#define DMA_SxFCR_FTH DMA_SxFCR_FTH_Msk
-#define DMA_SxFCR_FTH_0 (0x1UL << DMA_SxFCR_FTH_Pos) /*!< 0x00000001 */
-#define DMA_SxFCR_FTH_1 (0x2UL << DMA_SxFCR_FTH_Pos) /*!< 0x00000002 */
-
-/******************** Bits definition for DMA_LISR register *****************/
-#define DMA_LISR_TCIF3_Pos (27U)
-#define DMA_LISR_TCIF3_Msk (0x1UL << DMA_LISR_TCIF3_Pos) /*!< 0x08000000 */
-#define DMA_LISR_TCIF3 DMA_LISR_TCIF3_Msk
-#define DMA_LISR_HTIF3_Pos (26U)
-#define DMA_LISR_HTIF3_Msk (0x1UL << DMA_LISR_HTIF3_Pos) /*!< 0x04000000 */
-#define DMA_LISR_HTIF3 DMA_LISR_HTIF3_Msk
-#define DMA_LISR_TEIF3_Pos (25U)
-#define DMA_LISR_TEIF3_Msk (0x1UL << DMA_LISR_TEIF3_Pos) /*!< 0x02000000 */
-#define DMA_LISR_TEIF3 DMA_LISR_TEIF3_Msk
-#define DMA_LISR_DMEIF3_Pos (24U)
-#define DMA_LISR_DMEIF3_Msk (0x1UL << DMA_LISR_DMEIF3_Pos) /*!< 0x01000000 */
-#define DMA_LISR_DMEIF3 DMA_LISR_DMEIF3_Msk
-#define DMA_LISR_FEIF3_Pos (22U)
-#define DMA_LISR_FEIF3_Msk (0x1UL << DMA_LISR_FEIF3_Pos) /*!< 0x00400000 */
-#define DMA_LISR_FEIF3 DMA_LISR_FEIF3_Msk
-#define DMA_LISR_TCIF2_Pos (21U)
-#define DMA_LISR_TCIF2_Msk (0x1UL << DMA_LISR_TCIF2_Pos) /*!< 0x00200000 */
-#define DMA_LISR_TCIF2 DMA_LISR_TCIF2_Msk
-#define DMA_LISR_HTIF2_Pos (20U)
-#define DMA_LISR_HTIF2_Msk (0x1UL << DMA_LISR_HTIF2_Pos) /*!< 0x00100000 */
-#define DMA_LISR_HTIF2 DMA_LISR_HTIF2_Msk
-#define DMA_LISR_TEIF2_Pos (19U)
-#define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
-#define DMA_LISR_TEIF2 DMA_LISR_TEIF2_Msk
-#define DMA_LISR_DMEIF2_Pos (18U)
-#define DMA_LISR_DMEIF2_Msk (0x1UL << DMA_LISR_DMEIF2_Pos) /*!< 0x00040000 */
-#define DMA_LISR_DMEIF2 DMA_LISR_DMEIF2_Msk
-#define DMA_LISR_FEIF2_Pos (16U)
-#define DMA_LISR_FEIF2_Msk (0x1UL << DMA_LISR_FEIF2_Pos) /*!< 0x00010000 */
-#define DMA_LISR_FEIF2 DMA_LISR_FEIF2_Msk
-#define DMA_LISR_TCIF1_Pos (11U)
-#define DMA_LISR_TCIF1_Msk (0x1UL << DMA_LISR_TCIF1_Pos) /*!< 0x00000800 */
-#define DMA_LISR_TCIF1 DMA_LISR_TCIF1_Msk
-#define DMA_LISR_HTIF1_Pos (10U)
-#define DMA_LISR_HTIF1_Msk (0x1UL << DMA_LISR_HTIF1_Pos) /*!< 0x00000400 */
-#define DMA_LISR_HTIF1 DMA_LISR_HTIF1_Msk
-#define DMA_LISR_TEIF1_Pos (9U)
-#define DMA_LISR_TEIF1_Msk (0x1UL << DMA_LISR_TEIF1_Pos) /*!< 0x00000200 */
-#define DMA_LISR_TEIF1 DMA_LISR_TEIF1_Msk
-#define DMA_LISR_DMEIF1_Pos (8U)
-#define DMA_LISR_DMEIF1_Msk (0x1UL << DMA_LISR_DMEIF1_Pos) /*!< 0x00000100 */
-#define DMA_LISR_DMEIF1 DMA_LISR_DMEIF1_Msk
-#define DMA_LISR_FEIF1_Pos (6U)
-#define DMA_LISR_FEIF1_Msk (0x1UL << DMA_LISR_FEIF1_Pos) /*!< 0x00000040 */
-#define DMA_LISR_FEIF1 DMA_LISR_FEIF1_Msk
-#define DMA_LISR_TCIF0_Pos (5U)
-#define DMA_LISR_TCIF0_Msk (0x1UL << DMA_LISR_TCIF0_Pos) /*!< 0x00000020 */
-#define DMA_LISR_TCIF0 DMA_LISR_TCIF0_Msk
-#define DMA_LISR_HTIF0_Pos (4U)
-#define DMA_LISR_HTIF0_Msk (0x1UL << DMA_LISR_HTIF0_Pos) /*!< 0x00000010 */
-#define DMA_LISR_HTIF0 DMA_LISR_HTIF0_Msk
-#define DMA_LISR_TEIF0_Pos (3U)
-#define DMA_LISR_TEIF0_Msk (0x1UL << DMA_LISR_TEIF0_Pos) /*!< 0x00000008 */
-#define DMA_LISR_TEIF0 DMA_LISR_TEIF0_Msk
-#define DMA_LISR_DMEIF0_Pos (2U)
-#define DMA_LISR_DMEIF0_Msk (0x1UL << DMA_LISR_DMEIF0_Pos) /*!< 0x00000004 */
-#define DMA_LISR_DMEIF0 DMA_LISR_DMEIF0_Msk
-#define DMA_LISR_FEIF0_Pos (0U)
-#define DMA_LISR_FEIF0_Msk (0x1UL << DMA_LISR_FEIF0_Pos) /*!< 0x00000001 */
-#define DMA_LISR_FEIF0 DMA_LISR_FEIF0_Msk
-
-/******************** Bits definition for DMA_HISR register *****************/
-#define DMA_HISR_TCIF7_Pos (27U)
-#define DMA_HISR_TCIF7_Msk (0x1UL << DMA_HISR_TCIF7_Pos) /*!< 0x08000000 */
-#define DMA_HISR_TCIF7 DMA_HISR_TCIF7_Msk
-#define DMA_HISR_HTIF7_Pos (26U)
-#define DMA_HISR_HTIF7_Msk (0x1UL << DMA_HISR_HTIF7_Pos) /*!< 0x04000000 */
-#define DMA_HISR_HTIF7 DMA_HISR_HTIF7_Msk
-#define DMA_HISR_TEIF7_Pos (25U)
-#define DMA_HISR_TEIF7_Msk (0x1UL << DMA_HISR_TEIF7_Pos) /*!< 0x02000000 */
-#define DMA_HISR_TEIF7 DMA_HISR_TEIF7_Msk
-#define DMA_HISR_DMEIF7_Pos (24U)
-#define DMA_HISR_DMEIF7_Msk (0x1UL << DMA_HISR_DMEIF7_Pos) /*!< 0x01000000 */
-#define DMA_HISR_DMEIF7 DMA_HISR_DMEIF7_Msk
-#define DMA_HISR_FEIF7_Pos (22U)
-#define DMA_HISR_FEIF7_Msk (0x1UL << DMA_HISR_FEIF7_Pos) /*!< 0x00400000 */
-#define DMA_HISR_FEIF7 DMA_HISR_FEIF7_Msk
-#define DMA_HISR_TCIF6_Pos (21U)
-#define DMA_HISR_TCIF6_Msk (0x1UL << DMA_HISR_TCIF6_Pos) /*!< 0x00200000 */
-#define DMA_HISR_TCIF6 DMA_HISR_TCIF6_Msk
-#define DMA_HISR_HTIF6_Pos (20U)
-#define DMA_HISR_HTIF6_Msk (0x1UL << DMA_HISR_HTIF6_Pos) /*!< 0x00100000 */
-#define DMA_HISR_HTIF6 DMA_HISR_HTIF6_Msk
-#define DMA_HISR_TEIF6_Pos (19U)
-#define DMA_HISR_TEIF6_Msk (0x1UL << DMA_HISR_TEIF6_Pos) /*!< 0x00080000 */
-#define DMA_HISR_TEIF6 DMA_HISR_TEIF6_Msk
-#define DMA_HISR_DMEIF6_Pos (18U)
-#define DMA_HISR_DMEIF6_Msk (0x1UL << DMA_HISR_DMEIF6_Pos) /*!< 0x00040000 */
-#define DMA_HISR_DMEIF6 DMA_HISR_DMEIF6_Msk
-#define DMA_HISR_FEIF6_Pos (16U)
-#define DMA_HISR_FEIF6_Msk (0x1UL << DMA_HISR_FEIF6_Pos) /*!< 0x00010000 */
-#define DMA_HISR_FEIF6 DMA_HISR_FEIF6_Msk
-#define DMA_HISR_TCIF5_Pos (11U)
-#define DMA_HISR_TCIF5_Msk (0x1UL << DMA_HISR_TCIF5_Pos) /*!< 0x00000800 */
-#define DMA_HISR_TCIF5 DMA_HISR_TCIF5_Msk
-#define DMA_HISR_HTIF5_Pos (10U)
-#define DMA_HISR_HTIF5_Msk (0x1UL << DMA_HISR_HTIF5_Pos) /*!< 0x00000400 */
-#define DMA_HISR_HTIF5 DMA_HISR_HTIF5_Msk
-#define DMA_HISR_TEIF5_Pos (9U)
-#define DMA_HISR_TEIF5_Msk (0x1UL << DMA_HISR_TEIF5_Pos) /*!< 0x00000200 */
-#define DMA_HISR_TEIF5 DMA_HISR_TEIF5_Msk
-#define DMA_HISR_DMEIF5_Pos (8U)
-#define DMA_HISR_DMEIF5_Msk (0x1UL << DMA_HISR_DMEIF5_Pos) /*!< 0x00000100 */
-#define DMA_HISR_DMEIF5 DMA_HISR_DMEIF5_Msk
-#define DMA_HISR_FEIF5_Pos (6U)
-#define DMA_HISR_FEIF5_Msk (0x1UL << DMA_HISR_FEIF5_Pos) /*!< 0x00000040 */
-#define DMA_HISR_FEIF5 DMA_HISR_FEIF5_Msk
-#define DMA_HISR_TCIF4_Pos (5U)
-#define DMA_HISR_TCIF4_Msk (0x1UL << DMA_HISR_TCIF4_Pos) /*!< 0x00000020 */
-#define DMA_HISR_TCIF4 DMA_HISR_TCIF4_Msk
-#define DMA_HISR_HTIF4_Pos (4U)
-#define DMA_HISR_HTIF4_Msk (0x1UL << DMA_HISR_HTIF4_Pos) /*!< 0x00000010 */
-#define DMA_HISR_HTIF4 DMA_HISR_HTIF4_Msk
-#define DMA_HISR_TEIF4_Pos (3U)
-#define DMA_HISR_TEIF4_Msk (0x1UL << DMA_HISR_TEIF4_Pos) /*!< 0x00000008 */
-#define DMA_HISR_TEIF4 DMA_HISR_TEIF4_Msk
-#define DMA_HISR_DMEIF4_Pos (2U)
-#define DMA_HISR_DMEIF4_Msk (0x1UL << DMA_HISR_DMEIF4_Pos) /*!< 0x00000004 */
-#define DMA_HISR_DMEIF4 DMA_HISR_DMEIF4_Msk
-#define DMA_HISR_FEIF4_Pos (0U)
-#define DMA_HISR_FEIF4_Msk (0x1UL << DMA_HISR_FEIF4_Pos) /*!< 0x00000001 */
-#define DMA_HISR_FEIF4 DMA_HISR_FEIF4_Msk
-
-/******************** Bits definition for DMA_LIFCR register ****************/
-#define DMA_LIFCR_CTCIF3_Pos (27U)
-#define DMA_LIFCR_CTCIF3_Msk (0x1UL << DMA_LIFCR_CTCIF3_Pos) /*!< 0x08000000 */
-#define DMA_LIFCR_CTCIF3 DMA_LIFCR_CTCIF3_Msk
-#define DMA_LIFCR_CHTIF3_Pos (26U)
-#define DMA_LIFCR_CHTIF3_Msk (0x1UL << DMA_LIFCR_CHTIF3_Pos) /*!< 0x04000000 */
-#define DMA_LIFCR_CHTIF3 DMA_LIFCR_CHTIF3_Msk
-#define DMA_LIFCR_CTEIF3_Pos (25U)
-#define DMA_LIFCR_CTEIF3_Msk (0x1UL << DMA_LIFCR_CTEIF3_Pos) /*!< 0x02000000 */
-#define DMA_LIFCR_CTEIF3 DMA_LIFCR_CTEIF3_Msk
-#define DMA_LIFCR_CDMEIF3_Pos (24U)
-#define DMA_LIFCR_CDMEIF3_Msk (0x1UL << DMA_LIFCR_CDMEIF3_Pos) /*!< 0x01000000 */
-#define DMA_LIFCR_CDMEIF3 DMA_LIFCR_CDMEIF3_Msk
-#define DMA_LIFCR_CFEIF3_Pos (22U)
-#define DMA_LIFCR_CFEIF3_Msk (0x1UL << DMA_LIFCR_CFEIF3_Pos) /*!< 0x00400000 */
-#define DMA_LIFCR_CFEIF3 DMA_LIFCR_CFEIF3_Msk
-#define DMA_LIFCR_CTCIF2_Pos (21U)
-#define DMA_LIFCR_CTCIF2_Msk (0x1UL << DMA_LIFCR_CTCIF2_Pos) /*!< 0x00200000 */
-#define DMA_LIFCR_CTCIF2 DMA_LIFCR_CTCIF2_Msk
-#define DMA_LIFCR_CHTIF2_Pos (20U)
-#define DMA_LIFCR_CHTIF2_Msk (0x1UL << DMA_LIFCR_CHTIF2_Pos) /*!< 0x00100000 */
-#define DMA_LIFCR_CHTIF2 DMA_LIFCR_CHTIF2_Msk
-#define DMA_LIFCR_CTEIF2_Pos (19U)
-#define DMA_LIFCR_CTEIF2_Msk (0x1UL << DMA_LIFCR_CTEIF2_Pos) /*!< 0x00080000 */
-#define DMA_LIFCR_CTEIF2 DMA_LIFCR_CTEIF2_Msk
-#define DMA_LIFCR_CDMEIF2_Pos (18U)
-#define DMA_LIFCR_CDMEIF2_Msk (0x1UL << DMA_LIFCR_CDMEIF2_Pos) /*!< 0x00040000 */
-#define DMA_LIFCR_CDMEIF2 DMA_LIFCR_CDMEIF2_Msk
-#define DMA_LIFCR_CFEIF2_Pos (16U)
-#define DMA_LIFCR_CFEIF2_Msk (0x1UL << DMA_LIFCR_CFEIF2_Pos) /*!< 0x00010000 */
-#define DMA_LIFCR_CFEIF2 DMA_LIFCR_CFEIF2_Msk
-#define DMA_LIFCR_CTCIF1_Pos (11U)
-#define DMA_LIFCR_CTCIF1_Msk (0x1UL << DMA_LIFCR_CTCIF1_Pos) /*!< 0x00000800 */
-#define DMA_LIFCR_CTCIF1 DMA_LIFCR_CTCIF1_Msk
-#define DMA_LIFCR_CHTIF1_Pos (10U)
-#define DMA_LIFCR_CHTIF1_Msk (0x1UL << DMA_LIFCR_CHTIF1_Pos) /*!< 0x00000400 */
-#define DMA_LIFCR_CHTIF1 DMA_LIFCR_CHTIF1_Msk
-#define DMA_LIFCR_CTEIF1_Pos (9U)
-#define DMA_LIFCR_CTEIF1_Msk (0x1UL << DMA_LIFCR_CTEIF1_Pos) /*!< 0x00000200 */
-#define DMA_LIFCR_CTEIF1 DMA_LIFCR_CTEIF1_Msk
-#define DMA_LIFCR_CDMEIF1_Pos (8U)
-#define DMA_LIFCR_CDMEIF1_Msk (0x1UL << DMA_LIFCR_CDMEIF1_Pos) /*!< 0x00000100 */
-#define DMA_LIFCR_CDMEIF1 DMA_LIFCR_CDMEIF1_Msk
-#define DMA_LIFCR_CFEIF1_Pos (6U)
-#define DMA_LIFCR_CFEIF1_Msk (0x1UL << DMA_LIFCR_CFEIF1_Pos) /*!< 0x00000040 */
-#define DMA_LIFCR_CFEIF1 DMA_LIFCR_CFEIF1_Msk
-#define DMA_LIFCR_CTCIF0_Pos (5U)
-#define DMA_LIFCR_CTCIF0_Msk (0x1UL << DMA_LIFCR_CTCIF0_Pos) /*!< 0x00000020 */
-#define DMA_LIFCR_CTCIF0 DMA_LIFCR_CTCIF0_Msk
-#define DMA_LIFCR_CHTIF0_Pos (4U)
-#define DMA_LIFCR_CHTIF0_Msk (0x1UL << DMA_LIFCR_CHTIF0_Pos) /*!< 0x00000010 */
-#define DMA_LIFCR_CHTIF0 DMA_LIFCR_CHTIF0_Msk
-#define DMA_LIFCR_CTEIF0_Pos (3U)
-#define DMA_LIFCR_CTEIF0_Msk (0x1UL << DMA_LIFCR_CTEIF0_Pos) /*!< 0x00000008 */
-#define DMA_LIFCR_CTEIF0 DMA_LIFCR_CTEIF0_Msk
-#define DMA_LIFCR_CDMEIF0_Pos (2U)
-#define DMA_LIFCR_CDMEIF0_Msk (0x1UL << DMA_LIFCR_CDMEIF0_Pos) /*!< 0x00000004 */
-#define DMA_LIFCR_CDMEIF0 DMA_LIFCR_CDMEIF0_Msk
-#define DMA_LIFCR_CFEIF0_Pos (0U)
-#define DMA_LIFCR_CFEIF0_Msk (0x1UL << DMA_LIFCR_CFEIF0_Pos) /*!< 0x00000001 */
-#define DMA_LIFCR_CFEIF0 DMA_LIFCR_CFEIF0_Msk
-
-/******************** Bits definition for DMA_HIFCR register ****************/
-#define DMA_HIFCR_CTCIF7_Pos (27U)
-#define DMA_HIFCR_CTCIF7_Msk (0x1UL << DMA_HIFCR_CTCIF7_Pos) /*!< 0x08000000 */
-#define DMA_HIFCR_CTCIF7 DMA_HIFCR_CTCIF7_Msk
-#define DMA_HIFCR_CHTIF7_Pos (26U)
-#define DMA_HIFCR_CHTIF7_Msk (0x1UL << DMA_HIFCR_CHTIF7_Pos) /*!< 0x04000000 */
-#define DMA_HIFCR_CHTIF7 DMA_HIFCR_CHTIF7_Msk
-#define DMA_HIFCR_CTEIF7_Pos (25U)
-#define DMA_HIFCR_CTEIF7_Msk (0x1UL << DMA_HIFCR_CTEIF7_Pos) /*!< 0x02000000 */
-#define DMA_HIFCR_CTEIF7 DMA_HIFCR_CTEIF7_Msk
-#define DMA_HIFCR_CDMEIF7_Pos (24U)
-#define DMA_HIFCR_CDMEIF7_Msk (0x1UL << DMA_HIFCR_CDMEIF7_Pos) /*!< 0x01000000 */
-#define DMA_HIFCR_CDMEIF7 DMA_HIFCR_CDMEIF7_Msk
-#define DMA_HIFCR_CFEIF7_Pos (22U)
-#define DMA_HIFCR_CFEIF7_Msk (0x1UL << DMA_HIFCR_CFEIF7_Pos) /*!< 0x00400000 */
-#define DMA_HIFCR_CFEIF7 DMA_HIFCR_CFEIF7_Msk
-#define DMA_HIFCR_CTCIF6_Pos (21U)
-#define DMA_HIFCR_CTCIF6_Msk (0x1UL << DMA_HIFCR_CTCIF6_Pos) /*!< 0x00200000 */
-#define DMA_HIFCR_CTCIF6 DMA_HIFCR_CTCIF6_Msk
-#define DMA_HIFCR_CHTIF6_Pos (20U)
-#define DMA_HIFCR_CHTIF6_Msk (0x1UL << DMA_HIFCR_CHTIF6_Pos) /*!< 0x00100000 */
-#define DMA_HIFCR_CHTIF6 DMA_HIFCR_CHTIF6_Msk
-#define DMA_HIFCR_CTEIF6_Pos (19U)
-#define DMA_HIFCR_CTEIF6_Msk (0x1UL << DMA_HIFCR_CTEIF6_Pos) /*!< 0x00080000 */
-#define DMA_HIFCR_CTEIF6 DMA_HIFCR_CTEIF6_Msk
-#define DMA_HIFCR_CDMEIF6_Pos (18U)
-#define DMA_HIFCR_CDMEIF6_Msk (0x1UL << DMA_HIFCR_CDMEIF6_Pos) /*!< 0x00040000 */
-#define DMA_HIFCR_CDMEIF6 DMA_HIFCR_CDMEIF6_Msk
-#define DMA_HIFCR_CFEIF6_Pos (16U)
-#define DMA_HIFCR_CFEIF6_Msk (0x1UL << DMA_HIFCR_CFEIF6_Pos) /*!< 0x00010000 */
-#define DMA_HIFCR_CFEIF6 DMA_HIFCR_CFEIF6_Msk
-#define DMA_HIFCR_CTCIF5_Pos (11U)
-#define DMA_HIFCR_CTCIF5_Msk (0x1UL << DMA_HIFCR_CTCIF5_Pos) /*!< 0x00000800 */
-#define DMA_HIFCR_CTCIF5 DMA_HIFCR_CTCIF5_Msk
-#define DMA_HIFCR_CHTIF5_Pos (10U)
-#define DMA_HIFCR_CHTIF5_Msk (0x1UL << DMA_HIFCR_CHTIF5_Pos) /*!< 0x00000400 */
-#define DMA_HIFCR_CHTIF5 DMA_HIFCR_CHTIF5_Msk
-#define DMA_HIFCR_CTEIF5_Pos (9U)
-#define DMA_HIFCR_CTEIF5_Msk (0x1UL << DMA_HIFCR_CTEIF5_Pos) /*!< 0x00000200 */
-#define DMA_HIFCR_CTEIF5 DMA_HIFCR_CTEIF5_Msk
-#define DMA_HIFCR_CDMEIF5_Pos (8U)
-#define DMA_HIFCR_CDMEIF5_Msk (0x1UL << DMA_HIFCR_CDMEIF5_Pos) /*!< 0x00000100 */
-#define DMA_HIFCR_CDMEIF5 DMA_HIFCR_CDMEIF5_Msk
-#define DMA_HIFCR_CFEIF5_Pos (6U)
-#define DMA_HIFCR_CFEIF5_Msk (0x1UL << DMA_HIFCR_CFEIF5_Pos) /*!< 0x00000040 */
-#define DMA_HIFCR_CFEIF5 DMA_HIFCR_CFEIF5_Msk
-#define DMA_HIFCR_CTCIF4_Pos (5U)
-#define DMA_HIFCR_CTCIF4_Msk (0x1UL << DMA_HIFCR_CTCIF4_Pos) /*!< 0x00000020 */
-#define DMA_HIFCR_CTCIF4 DMA_HIFCR_CTCIF4_Msk
-#define DMA_HIFCR_CHTIF4_Pos (4U)
-#define DMA_HIFCR_CHTIF4_Msk (0x1UL << DMA_HIFCR_CHTIF4_Pos) /*!< 0x00000010 */
-#define DMA_HIFCR_CHTIF4 DMA_HIFCR_CHTIF4_Msk
-#define DMA_HIFCR_CTEIF4_Pos (3U)
-#define DMA_HIFCR_CTEIF4_Msk (0x1UL << DMA_HIFCR_CTEIF4_Pos) /*!< 0x00000008 */
-#define DMA_HIFCR_CTEIF4 DMA_HIFCR_CTEIF4_Msk
-#define DMA_HIFCR_CDMEIF4_Pos (2U)
-#define DMA_HIFCR_CDMEIF4_Msk (0x1UL << DMA_HIFCR_CDMEIF4_Pos) /*!< 0x00000004 */
-#define DMA_HIFCR_CDMEIF4 DMA_HIFCR_CDMEIF4_Msk
-#define DMA_HIFCR_CFEIF4_Pos (0U)
-#define DMA_HIFCR_CFEIF4_Msk (0x1UL << DMA_HIFCR_CFEIF4_Pos) /*!< 0x00000001 */
-#define DMA_HIFCR_CFEIF4 DMA_HIFCR_CFEIF4_Msk
-
-/****************** Bit definition for DMA_SxPAR register ********************/
-#define DMA_SxPAR_PA_Pos (0U)
-#define DMA_SxPAR_PA_Msk (0xFFFFFFFFUL << DMA_SxPAR_PA_Pos) /*!< 0xFFFFFFFF */
-#define DMA_SxPAR_PA DMA_SxPAR_PA_Msk /*!< Peripheral Address */
-
-/****************** Bit definition for DMA_SxM0AR register ********************/
-#define DMA_SxM0AR_M0A_Pos (0U)
-#define DMA_SxM0AR_M0A_Msk (0xFFFFFFFFUL << DMA_SxM0AR_M0A_Pos) /*!< 0xFFFFFFFF */
-#define DMA_SxM0AR_M0A DMA_SxM0AR_M0A_Msk /*!< Memory Address */
-
-/****************** Bit definition for DMA_SxM1AR register ********************/
-#define DMA_SxM1AR_M1A_Pos (0U)
-#define DMA_SxM1AR_M1A_Msk (0xFFFFFFFFUL << DMA_SxM1AR_M1A_Pos) /*!< 0xFFFFFFFF */
-#define DMA_SxM1AR_M1A DMA_SxM1AR_M1A_Msk /*!< Memory Address */
-
-
-/******************************************************************************/
-/* */
-/* External Interrupt/Event Controller */
-/* */
-/******************************************************************************/
-/******************* Bit definition for EXTI_IMR register *******************/
-#define EXTI_IMR_MR0_Pos (0U)
-#define EXTI_IMR_MR0_Msk (0x1UL << EXTI_IMR_MR0_Pos) /*!< 0x00000001 */
-#define EXTI_IMR_MR0 EXTI_IMR_MR0_Msk /*!< Interrupt Mask on line 0 */
-#define EXTI_IMR_MR1_Pos (1U)
-#define EXTI_IMR_MR1_Msk (0x1UL << EXTI_IMR_MR1_Pos) /*!< 0x00000002 */
-#define EXTI_IMR_MR1 EXTI_IMR_MR1_Msk /*!< Interrupt Mask on line 1 */
-#define EXTI_IMR_MR2_Pos (2U)
-#define EXTI_IMR_MR2_Msk (0x1UL << EXTI_IMR_MR2_Pos) /*!< 0x00000004 */
-#define EXTI_IMR_MR2 EXTI_IMR_MR2_Msk /*!< Interrupt Mask on line 2 */
-#define EXTI_IMR_MR3_Pos (3U)
-#define EXTI_IMR_MR3_Msk (0x1UL << EXTI_IMR_MR3_Pos) /*!< 0x00000008 */
-#define EXTI_IMR_MR3 EXTI_IMR_MR3_Msk /*!< Interrupt Mask on line 3 */
-#define EXTI_IMR_MR4_Pos (4U)
-#define EXTI_IMR_MR4_Msk (0x1UL << EXTI_IMR_MR4_Pos) /*!< 0x00000010 */
-#define EXTI_IMR_MR4 EXTI_IMR_MR4_Msk /*!< Interrupt Mask on line 4 */
-#define EXTI_IMR_MR5_Pos (5U)
-#define EXTI_IMR_MR5_Msk (0x1UL << EXTI_IMR_MR5_Pos) /*!< 0x00000020 */
-#define EXTI_IMR_MR5 EXTI_IMR_MR5_Msk /*!< Interrupt Mask on line 5 */
-#define EXTI_IMR_MR6_Pos (6U)
-#define EXTI_IMR_MR6_Msk (0x1UL << EXTI_IMR_MR6_Pos) /*!< 0x00000040 */
-#define EXTI_IMR_MR6 EXTI_IMR_MR6_Msk /*!< Interrupt Mask on line 6 */
-#define EXTI_IMR_MR7_Pos (7U)
-#define EXTI_IMR_MR7_Msk (0x1UL << EXTI_IMR_MR7_Pos) /*!< 0x00000080 */
-#define EXTI_IMR_MR7 EXTI_IMR_MR7_Msk /*!< Interrupt Mask on line 7 */
-#define EXTI_IMR_MR8_Pos (8U)
-#define EXTI_IMR_MR8_Msk (0x1UL << EXTI_IMR_MR8_Pos) /*!< 0x00000100 */
-#define EXTI_IMR_MR8 EXTI_IMR_MR8_Msk /*!< Interrupt Mask on line 8 */
-#define EXTI_IMR_MR9_Pos (9U)
-#define EXTI_IMR_MR9_Msk (0x1UL << EXTI_IMR_MR9_Pos) /*!< 0x00000200 */
-#define EXTI_IMR_MR9 EXTI_IMR_MR9_Msk /*!< Interrupt Mask on line 9 */
-#define EXTI_IMR_MR10_Pos (10U)
-#define EXTI_IMR_MR10_Msk (0x1UL << EXTI_IMR_MR10_Pos) /*!< 0x00000400 */
-#define EXTI_IMR_MR10 EXTI_IMR_MR10_Msk /*!< Interrupt Mask on line 10 */
-#define EXTI_IMR_MR11_Pos (11U)
-#define EXTI_IMR_MR11_Msk (0x1UL << EXTI_IMR_MR11_Pos) /*!< 0x00000800 */
-#define EXTI_IMR_MR11 EXTI_IMR_MR11_Msk /*!< Interrupt Mask on line 11 */
-#define EXTI_IMR_MR12_Pos (12U)
-#define EXTI_IMR_MR12_Msk (0x1UL << EXTI_IMR_MR12_Pos) /*!< 0x00001000 */
-#define EXTI_IMR_MR12 EXTI_IMR_MR12_Msk /*!< Interrupt Mask on line 12 */
-#define EXTI_IMR_MR13_Pos (13U)
-#define EXTI_IMR_MR13_Msk (0x1UL << EXTI_IMR_MR13_Pos) /*!< 0x00002000 */
-#define EXTI_IMR_MR13 EXTI_IMR_MR13_Msk /*!< Interrupt Mask on line 13 */
-#define EXTI_IMR_MR14_Pos (14U)
-#define EXTI_IMR_MR14_Msk (0x1UL << EXTI_IMR_MR14_Pos) /*!< 0x00004000 */
-#define EXTI_IMR_MR14 EXTI_IMR_MR14_Msk /*!< Interrupt Mask on line 14 */
-#define EXTI_IMR_MR15_Pos (15U)
-#define EXTI_IMR_MR15_Msk (0x1UL << EXTI_IMR_MR15_Pos) /*!< 0x00008000 */
-#define EXTI_IMR_MR15 EXTI_IMR_MR15_Msk /*!< Interrupt Mask on line 15 */
-#define EXTI_IMR_MR16_Pos (16U)
-#define EXTI_IMR_MR16_Msk (0x1UL << EXTI_IMR_MR16_Pos) /*!< 0x00010000 */
-#define EXTI_IMR_MR16 EXTI_IMR_MR16_Msk /*!< Interrupt Mask on line 16 */
-#define EXTI_IMR_MR17_Pos (17U)
-#define EXTI_IMR_MR17_Msk (0x1UL << EXTI_IMR_MR17_Pos) /*!< 0x00020000 */
-#define EXTI_IMR_MR17 EXTI_IMR_MR17_Msk /*!< Interrupt Mask on line 17 */
-#define EXTI_IMR_MR18_Pos (18U)
-#define EXTI_IMR_MR18_Msk (0x1UL << EXTI_IMR_MR18_Pos) /*!< 0x00040000 */
-#define EXTI_IMR_MR18 EXTI_IMR_MR18_Msk /*!< Interrupt Mask on line 18 */
-#define EXTI_IMR_MR19_Pos (19U)
-#define EXTI_IMR_MR19_Msk (0x1UL << EXTI_IMR_MR19_Pos) /*!< 0x00080000 */
-#define EXTI_IMR_MR19 EXTI_IMR_MR19_Msk /*!< Interrupt Mask on line 19 */
-#define EXTI_IMR_MR20_Pos (20U)
-#define EXTI_IMR_MR20_Msk (0x1UL << EXTI_IMR_MR20_Pos) /*!< 0x00100000 */
-#define EXTI_IMR_MR20 EXTI_IMR_MR20_Msk /*!< Interrupt Mask on line 20 */
-#define EXTI_IMR_MR21_Pos (21U)
-#define EXTI_IMR_MR21_Msk (0x1UL << EXTI_IMR_MR21_Pos) /*!< 0x00200000 */
-#define EXTI_IMR_MR21 EXTI_IMR_MR21_Msk /*!< Interrupt Mask on line 21 */
-#define EXTI_IMR_MR22_Pos (22U)
-#define EXTI_IMR_MR22_Msk (0x1UL << EXTI_IMR_MR22_Pos) /*!< 0x00400000 */
-#define EXTI_IMR_MR22 EXTI_IMR_MR22_Msk /*!< Interrupt Mask on line 22 */
-
-/* Reference Defines */
-#define EXTI_IMR_IM0 EXTI_IMR_MR0
-#define EXTI_IMR_IM1 EXTI_IMR_MR1
-#define EXTI_IMR_IM2 EXTI_IMR_MR2
-#define EXTI_IMR_IM3 EXTI_IMR_MR3
-#define EXTI_IMR_IM4 EXTI_IMR_MR4
-#define EXTI_IMR_IM5 EXTI_IMR_MR5
-#define EXTI_IMR_IM6 EXTI_IMR_MR6
-#define EXTI_IMR_IM7 EXTI_IMR_MR7
-#define EXTI_IMR_IM8 EXTI_IMR_MR8
-#define EXTI_IMR_IM9 EXTI_IMR_MR9
-#define EXTI_IMR_IM10 EXTI_IMR_MR10
-#define EXTI_IMR_IM11 EXTI_IMR_MR11
-#define EXTI_IMR_IM12 EXTI_IMR_MR12
-#define EXTI_IMR_IM13 EXTI_IMR_MR13
-#define EXTI_IMR_IM14 EXTI_IMR_MR14
-#define EXTI_IMR_IM15 EXTI_IMR_MR15
-#define EXTI_IMR_IM16 EXTI_IMR_MR16
-#define EXTI_IMR_IM17 EXTI_IMR_MR17
-#define EXTI_IMR_IM18 EXTI_IMR_MR18
-#define EXTI_IMR_IM19 EXTI_IMR_MR19
-#define EXTI_IMR_IM20 EXTI_IMR_MR20
-#define EXTI_IMR_IM21 EXTI_IMR_MR21
-#define EXTI_IMR_IM22 EXTI_IMR_MR22
-#define EXTI_IMR_IM_Pos (0U)
-#define EXTI_IMR_IM_Msk (0x7FFFFFUL << EXTI_IMR_IM_Pos) /*!< 0x007FFFFF */
-#define EXTI_IMR_IM EXTI_IMR_IM_Msk /*!< Interrupt Mask All */
-
-/******************* Bit definition for EXTI_EMR register *******************/
-#define EXTI_EMR_MR0_Pos (0U)
-#define EXTI_EMR_MR0_Msk (0x1UL << EXTI_EMR_MR0_Pos) /*!< 0x00000001 */
-#define EXTI_EMR_MR0 EXTI_EMR_MR0_Msk /*!< Event Mask on line 0 */
-#define EXTI_EMR_MR1_Pos (1U)
-#define EXTI_EMR_MR1_Msk (0x1UL << EXTI_EMR_MR1_Pos) /*!< 0x00000002 */
-#define EXTI_EMR_MR1 EXTI_EMR_MR1_Msk /*!< Event Mask on line 1 */
-#define EXTI_EMR_MR2_Pos (2U)
-#define EXTI_EMR_MR2_Msk (0x1UL << EXTI_EMR_MR2_Pos) /*!< 0x00000004 */
-#define EXTI_EMR_MR2 EXTI_EMR_MR2_Msk /*!< Event Mask on line 2 */
-#define EXTI_EMR_MR3_Pos (3U)
-#define EXTI_EMR_MR3_Msk (0x1UL << EXTI_EMR_MR3_Pos) /*!< 0x00000008 */
-#define EXTI_EMR_MR3 EXTI_EMR_MR3_Msk /*!< Event Mask on line 3 */
-#define EXTI_EMR_MR4_Pos (4U)
-#define EXTI_EMR_MR4_Msk (0x1UL << EXTI_EMR_MR4_Pos) /*!< 0x00000010 */
-#define EXTI_EMR_MR4 EXTI_EMR_MR4_Msk /*!< Event Mask on line 4 */
-#define EXTI_EMR_MR5_Pos (5U)
-#define EXTI_EMR_MR5_Msk (0x1UL << EXTI_EMR_MR5_Pos) /*!< 0x00000020 */
-#define EXTI_EMR_MR5 EXTI_EMR_MR5_Msk /*!< Event Mask on line 5 */
-#define EXTI_EMR_MR6_Pos (6U)
-#define EXTI_EMR_MR6_Msk (0x1UL << EXTI_EMR_MR6_Pos) /*!< 0x00000040 */
-#define EXTI_EMR_MR6 EXTI_EMR_MR6_Msk /*!< Event Mask on line 6 */
-#define EXTI_EMR_MR7_Pos (7U)
-#define EXTI_EMR_MR7_Msk (0x1UL << EXTI_EMR_MR7_Pos) /*!< 0x00000080 */
-#define EXTI_EMR_MR7 EXTI_EMR_MR7_Msk /*!< Event Mask on line 7 */
-#define EXTI_EMR_MR8_Pos (8U)
-#define EXTI_EMR_MR8_Msk (0x1UL << EXTI_EMR_MR8_Pos) /*!< 0x00000100 */
-#define EXTI_EMR_MR8 EXTI_EMR_MR8_Msk /*!< Event Mask on line 8 */
-#define EXTI_EMR_MR9_Pos (9U)
-#define EXTI_EMR_MR9_Msk (0x1UL << EXTI_EMR_MR9_Pos) /*!< 0x00000200 */
-#define EXTI_EMR_MR9 EXTI_EMR_MR9_Msk /*!< Event Mask on line 9 */
-#define EXTI_EMR_MR10_Pos (10U)
-#define EXTI_EMR_MR10_Msk (0x1UL << EXTI_EMR_MR10_Pos) /*!< 0x00000400 */
-#define EXTI_EMR_MR10 EXTI_EMR_MR10_Msk /*!< Event Mask on line 10 */
-#define EXTI_EMR_MR11_Pos (11U)
-#define EXTI_EMR_MR11_Msk (0x1UL << EXTI_EMR_MR11_Pos) /*!< 0x00000800 */
-#define EXTI_EMR_MR11 EXTI_EMR_MR11_Msk /*!< Event Mask on line 11 */
-#define EXTI_EMR_MR12_Pos (12U)
-#define EXTI_EMR_MR12_Msk (0x1UL << EXTI_EMR_MR12_Pos) /*!< 0x00001000 */
-#define EXTI_EMR_MR12 EXTI_EMR_MR12_Msk /*!< Event Mask on line 12 */
-#define EXTI_EMR_MR13_Pos (13U)
-#define EXTI_EMR_MR13_Msk (0x1UL << EXTI_EMR_MR13_Pos) /*!< 0x00002000 */
-#define EXTI_EMR_MR13 EXTI_EMR_MR13_Msk /*!< Event Mask on line 13 */
-#define EXTI_EMR_MR14_Pos (14U)
-#define EXTI_EMR_MR14_Msk (0x1UL << EXTI_EMR_MR14_Pos) /*!< 0x00004000 */
-#define EXTI_EMR_MR14 EXTI_EMR_MR14_Msk /*!< Event Mask on line 14 */
-#define EXTI_EMR_MR15_Pos (15U)
-#define EXTI_EMR_MR15_Msk (0x1UL << EXTI_EMR_MR15_Pos) /*!< 0x00008000 */
-#define EXTI_EMR_MR15 EXTI_EMR_MR15_Msk /*!< Event Mask on line 15 */
-#define EXTI_EMR_MR16_Pos (16U)
-#define EXTI_EMR_MR16_Msk (0x1UL << EXTI_EMR_MR16_Pos) /*!< 0x00010000 */
-#define EXTI_EMR_MR16 EXTI_EMR_MR16_Msk /*!< Event Mask on line 16 */
-#define EXTI_EMR_MR17_Pos (17U)
-#define EXTI_EMR_MR17_Msk (0x1UL << EXTI_EMR_MR17_Pos) /*!< 0x00020000 */
-#define EXTI_EMR_MR17 EXTI_EMR_MR17_Msk /*!< Event Mask on line 17 */
-#define EXTI_EMR_MR18_Pos (18U)
-#define EXTI_EMR_MR18_Msk (0x1UL << EXTI_EMR_MR18_Pos) /*!< 0x00040000 */
-#define EXTI_EMR_MR18 EXTI_EMR_MR18_Msk /*!< Event Mask on line 18 */
-#define EXTI_EMR_MR19_Pos (19U)
-#define EXTI_EMR_MR19_Msk (0x1UL << EXTI_EMR_MR19_Pos) /*!< 0x00080000 */
-#define EXTI_EMR_MR19 EXTI_EMR_MR19_Msk /*!< Event Mask on line 19 */
-#define EXTI_EMR_MR20_Pos (20U)
-#define EXTI_EMR_MR20_Msk (0x1UL << EXTI_EMR_MR20_Pos) /*!< 0x00100000 */
-#define EXTI_EMR_MR20 EXTI_EMR_MR20_Msk /*!< Event Mask on line 20 */
-#define EXTI_EMR_MR21_Pos (21U)
-#define EXTI_EMR_MR21_Msk (0x1UL << EXTI_EMR_MR21_Pos) /*!< 0x00200000 */
-#define EXTI_EMR_MR21 EXTI_EMR_MR21_Msk /*!< Event Mask on line 21 */
-#define EXTI_EMR_MR22_Pos (22U)
-#define EXTI_EMR_MR22_Msk (0x1UL << EXTI_EMR_MR22_Pos) /*!< 0x00400000 */
-#define EXTI_EMR_MR22 EXTI_EMR_MR22_Msk /*!< Event Mask on line 22 */
-
-/* Reference Defines */
-#define EXTI_EMR_EM0 EXTI_EMR_MR0
-#define EXTI_EMR_EM1 EXTI_EMR_MR1
-#define EXTI_EMR_EM2 EXTI_EMR_MR2
-#define EXTI_EMR_EM3 EXTI_EMR_MR3
-#define EXTI_EMR_EM4 EXTI_EMR_MR4
-#define EXTI_EMR_EM5 EXTI_EMR_MR5
-#define EXTI_EMR_EM6 EXTI_EMR_MR6
-#define EXTI_EMR_EM7 EXTI_EMR_MR7
-#define EXTI_EMR_EM8 EXTI_EMR_MR8
-#define EXTI_EMR_EM9 EXTI_EMR_MR9
-#define EXTI_EMR_EM10 EXTI_EMR_MR10
-#define EXTI_EMR_EM11 EXTI_EMR_MR11
-#define EXTI_EMR_EM12 EXTI_EMR_MR12
-#define EXTI_EMR_EM13 EXTI_EMR_MR13
-#define EXTI_EMR_EM14 EXTI_EMR_MR14
-#define EXTI_EMR_EM15 EXTI_EMR_MR15
-#define EXTI_EMR_EM16 EXTI_EMR_MR16
-#define EXTI_EMR_EM17 EXTI_EMR_MR17
-#define EXTI_EMR_EM18 EXTI_EMR_MR18
-#define EXTI_EMR_EM19 EXTI_EMR_MR19
-#define EXTI_EMR_EM20 EXTI_EMR_MR20
-#define EXTI_EMR_EM21 EXTI_EMR_MR21
-#define EXTI_EMR_EM22 EXTI_EMR_MR22
-
-/****************** Bit definition for EXTI_RTSR register *******************/
-#define EXTI_RTSR_TR0_Pos (0U)
-#define EXTI_RTSR_TR0_Msk (0x1UL << EXTI_RTSR_TR0_Pos) /*!< 0x00000001 */
-#define EXTI_RTSR_TR0 EXTI_RTSR_TR0_Msk /*!< Rising trigger event configuration bit of line 0 */
-#define EXTI_RTSR_TR1_Pos (1U)
-#define EXTI_RTSR_TR1_Msk (0x1UL << EXTI_RTSR_TR1_Pos) /*!< 0x00000002 */
-#define EXTI_RTSR_TR1 EXTI_RTSR_TR1_Msk /*!< Rising trigger event configuration bit of line 1 */
-#define EXTI_RTSR_TR2_Pos (2U)
-#define EXTI_RTSR_TR2_Msk (0x1UL << EXTI_RTSR_TR2_Pos) /*!< 0x00000004 */
-#define EXTI_RTSR_TR2 EXTI_RTSR_TR2_Msk /*!< Rising trigger event configuration bit of line 2 */
-#define EXTI_RTSR_TR3_Pos (3U)
-#define EXTI_RTSR_TR3_Msk (0x1UL << EXTI_RTSR_TR3_Pos) /*!< 0x00000008 */
-#define EXTI_RTSR_TR3 EXTI_RTSR_TR3_Msk /*!< Rising trigger event configuration bit of line 3 */
-#define EXTI_RTSR_TR4_Pos (4U)
-#define EXTI_RTSR_TR4_Msk (0x1UL << EXTI_RTSR_TR4_Pos) /*!< 0x00000010 */
-#define EXTI_RTSR_TR4 EXTI_RTSR_TR4_Msk /*!< Rising trigger event configuration bit of line 4 */
-#define EXTI_RTSR_TR5_Pos (5U)
-#define EXTI_RTSR_TR5_Msk (0x1UL << EXTI_RTSR_TR5_Pos) /*!< 0x00000020 */
-#define EXTI_RTSR_TR5 EXTI_RTSR_TR5_Msk /*!< Rising trigger event configuration bit of line 5 */
-#define EXTI_RTSR_TR6_Pos (6U)
-#define EXTI_RTSR_TR6_Msk (0x1UL << EXTI_RTSR_TR6_Pos) /*!< 0x00000040 */
-#define EXTI_RTSR_TR6 EXTI_RTSR_TR6_Msk /*!< Rising trigger event configuration bit of line 6 */
-#define EXTI_RTSR_TR7_Pos (7U)
-#define EXTI_RTSR_TR7_Msk (0x1UL << EXTI_RTSR_TR7_Pos) /*!< 0x00000080 */
-#define EXTI_RTSR_TR7 EXTI_RTSR_TR7_Msk /*!< Rising trigger event configuration bit of line 7 */
-#define EXTI_RTSR_TR8_Pos (8U)
-#define EXTI_RTSR_TR8_Msk (0x1UL << EXTI_RTSR_TR8_Pos) /*!< 0x00000100 */
-#define EXTI_RTSR_TR8 EXTI_RTSR_TR8_Msk /*!< Rising trigger event configuration bit of line 8 */
-#define EXTI_RTSR_TR9_Pos (9U)
-#define EXTI_RTSR_TR9_Msk (0x1UL << EXTI_RTSR_TR9_Pos) /*!< 0x00000200 */
-#define EXTI_RTSR_TR9 EXTI_RTSR_TR9_Msk /*!< Rising trigger event configuration bit of line 9 */
-#define EXTI_RTSR_TR10_Pos (10U)
-#define EXTI_RTSR_TR10_Msk (0x1UL << EXTI_RTSR_TR10_Pos) /*!< 0x00000400 */
-#define EXTI_RTSR_TR10 EXTI_RTSR_TR10_Msk /*!< Rising trigger event configuration bit of line 10 */
-#define EXTI_RTSR_TR11_Pos (11U)
-#define EXTI_RTSR_TR11_Msk (0x1UL << EXTI_RTSR_TR11_Pos) /*!< 0x00000800 */
-#define EXTI_RTSR_TR11 EXTI_RTSR_TR11_Msk /*!< Rising trigger event configuration bit of line 11 */
-#define EXTI_RTSR_TR12_Pos (12U)
-#define EXTI_RTSR_TR12_Msk (0x1UL << EXTI_RTSR_TR12_Pos) /*!< 0x00001000 */
-#define EXTI_RTSR_TR12 EXTI_RTSR_TR12_Msk /*!< Rising trigger event configuration bit of line 12 */
-#define EXTI_RTSR_TR13_Pos (13U)
-#define EXTI_RTSR_TR13_Msk (0x1UL << EXTI_RTSR_TR13_Pos) /*!< 0x00002000 */
-#define EXTI_RTSR_TR13 EXTI_RTSR_TR13_Msk /*!< Rising trigger event configuration bit of line 13 */
-#define EXTI_RTSR_TR14_Pos (14U)
-#define EXTI_RTSR_TR14_Msk (0x1UL << EXTI_RTSR_TR14_Pos) /*!< 0x00004000 */
-#define EXTI_RTSR_TR14 EXTI_RTSR_TR14_Msk /*!< Rising trigger event configuration bit of line 14 */
-#define EXTI_RTSR_TR15_Pos (15U)
-#define EXTI_RTSR_TR15_Msk (0x1UL << EXTI_RTSR_TR15_Pos) /*!< 0x00008000 */
-#define EXTI_RTSR_TR15 EXTI_RTSR_TR15_Msk /*!< Rising trigger event configuration bit of line 15 */
-#define EXTI_RTSR_TR16_Pos (16U)
-#define EXTI_RTSR_TR16_Msk (0x1UL << EXTI_RTSR_TR16_Pos) /*!< 0x00010000 */
-#define EXTI_RTSR_TR16 EXTI_RTSR_TR16_Msk /*!< Rising trigger event configuration bit of line 16 */
-#define EXTI_RTSR_TR17_Pos (17U)
-#define EXTI_RTSR_TR17_Msk (0x1UL << EXTI_RTSR_TR17_Pos) /*!< 0x00020000 */
-#define EXTI_RTSR_TR17 EXTI_RTSR_TR17_Msk /*!< Rising trigger event configuration bit of line 17 */
-#define EXTI_RTSR_TR18_Pos (18U)
-#define EXTI_RTSR_TR18_Msk (0x1UL << EXTI_RTSR_TR18_Pos) /*!< 0x00040000 */
-#define EXTI_RTSR_TR18 EXTI_RTSR_TR18_Msk /*!< Rising trigger event configuration bit of line 18 */
-#define EXTI_RTSR_TR19_Pos (19U)
-#define EXTI_RTSR_TR19_Msk (0x1UL << EXTI_RTSR_TR19_Pos) /*!< 0x00080000 */
-#define EXTI_RTSR_TR19 EXTI_RTSR_TR19_Msk /*!< Rising trigger event configuration bit of line 19 */
-#define EXTI_RTSR_TR20_Pos (20U)
-#define EXTI_RTSR_TR20_Msk (0x1UL << EXTI_RTSR_TR20_Pos) /*!< 0x00100000 */
-#define EXTI_RTSR_TR20 EXTI_RTSR_TR20_Msk /*!< Rising trigger event configuration bit of line 20 */
-#define EXTI_RTSR_TR21_Pos (21U)
-#define EXTI_RTSR_TR21_Msk (0x1UL << EXTI_RTSR_TR21_Pos) /*!< 0x00200000 */
-#define EXTI_RTSR_TR21 EXTI_RTSR_TR21_Msk /*!< Rising trigger event configuration bit of line 21 */
-#define EXTI_RTSR_TR22_Pos (22U)
-#define EXTI_RTSR_TR22_Msk (0x1UL << EXTI_RTSR_TR22_Pos) /*!< 0x00400000 */
-#define EXTI_RTSR_TR22 EXTI_RTSR_TR22_Msk /*!< Rising trigger event configuration bit of line 22 */
-
-/****************** Bit definition for EXTI_FTSR register *******************/
-#define EXTI_FTSR_TR0_Pos (0U)
-#define EXTI_FTSR_TR0_Msk (0x1UL << EXTI_FTSR_TR0_Pos) /*!< 0x00000001 */
-#define EXTI_FTSR_TR0 EXTI_FTSR_TR0_Msk /*!< Falling trigger event configuration bit of line 0 */
-#define EXTI_FTSR_TR1_Pos (1U)
-#define EXTI_FTSR_TR1_Msk (0x1UL << EXTI_FTSR_TR1_Pos) /*!< 0x00000002 */
-#define EXTI_FTSR_TR1 EXTI_FTSR_TR1_Msk /*!< Falling trigger event configuration bit of line 1 */
-#define EXTI_FTSR_TR2_Pos (2U)
-#define EXTI_FTSR_TR2_Msk (0x1UL << EXTI_FTSR_TR2_Pos) /*!< 0x00000004 */
-#define EXTI_FTSR_TR2 EXTI_FTSR_TR2_Msk /*!< Falling trigger event configuration bit of line 2 */
-#define EXTI_FTSR_TR3_Pos (3U)
-#define EXTI_FTSR_TR3_Msk (0x1UL << EXTI_FTSR_TR3_Pos) /*!< 0x00000008 */
-#define EXTI_FTSR_TR3 EXTI_FTSR_TR3_Msk /*!< Falling trigger event configuration bit of line 3 */
-#define EXTI_FTSR_TR4_Pos (4U)
-#define EXTI_FTSR_TR4_Msk (0x1UL << EXTI_FTSR_TR4_Pos) /*!< 0x00000010 */
-#define EXTI_FTSR_TR4 EXTI_FTSR_TR4_Msk /*!< Falling trigger event configuration bit of line 4 */
-#define EXTI_FTSR_TR5_Pos (5U)
-#define EXTI_FTSR_TR5_Msk (0x1UL << EXTI_FTSR_TR5_Pos) /*!< 0x00000020 */
-#define EXTI_FTSR_TR5 EXTI_FTSR_TR5_Msk /*!< Falling trigger event configuration bit of line 5 */
-#define EXTI_FTSR_TR6_Pos (6U)
-#define EXTI_FTSR_TR6_Msk (0x1UL << EXTI_FTSR_TR6_Pos) /*!< 0x00000040 */
-#define EXTI_FTSR_TR6 EXTI_FTSR_TR6_Msk /*!< Falling trigger event configuration bit of line 6 */
-#define EXTI_FTSR_TR7_Pos (7U)
-#define EXTI_FTSR_TR7_Msk (0x1UL << EXTI_FTSR_TR7_Pos) /*!< 0x00000080 */
-#define EXTI_FTSR_TR7 EXTI_FTSR_TR7_Msk /*!< Falling trigger event configuration bit of line 7 */
-#define EXTI_FTSR_TR8_Pos (8U)
-#define EXTI_FTSR_TR8_Msk (0x1UL << EXTI_FTSR_TR8_Pos) /*!< 0x00000100 */
-#define EXTI_FTSR_TR8 EXTI_FTSR_TR8_Msk /*!< Falling trigger event configuration bit of line 8 */
-#define EXTI_FTSR_TR9_Pos (9U)
-#define EXTI_FTSR_TR9_Msk (0x1UL << EXTI_FTSR_TR9_Pos) /*!< 0x00000200 */
-#define EXTI_FTSR_TR9 EXTI_FTSR_TR9_Msk /*!< Falling trigger event configuration bit of line 9 */
-#define EXTI_FTSR_TR10_Pos (10U)
-#define EXTI_FTSR_TR10_Msk (0x1UL << EXTI_FTSR_TR10_Pos) /*!< 0x00000400 */
-#define EXTI_FTSR_TR10 EXTI_FTSR_TR10_Msk /*!< Falling trigger event configuration bit of line 10 */
-#define EXTI_FTSR_TR11_Pos (11U)
-#define EXTI_FTSR_TR11_Msk (0x1UL << EXTI_FTSR_TR11_Pos) /*!< 0x00000800 */
-#define EXTI_FTSR_TR11 EXTI_FTSR_TR11_Msk /*!< Falling trigger event configuration bit of line 11 */
-#define EXTI_FTSR_TR12_Pos (12U)
-#define EXTI_FTSR_TR12_Msk (0x1UL << EXTI_FTSR_TR12_Pos) /*!< 0x00001000 */
-#define EXTI_FTSR_TR12 EXTI_FTSR_TR12_Msk /*!< Falling trigger event configuration bit of line 12 */
-#define EXTI_FTSR_TR13_Pos (13U)
-#define EXTI_FTSR_TR13_Msk (0x1UL << EXTI_FTSR_TR13_Pos) /*!< 0x00002000 */
-#define EXTI_FTSR_TR13 EXTI_FTSR_TR13_Msk /*!< Falling trigger event configuration bit of line 13 */
-#define EXTI_FTSR_TR14_Pos (14U)
-#define EXTI_FTSR_TR14_Msk (0x1UL << EXTI_FTSR_TR14_Pos) /*!< 0x00004000 */
-#define EXTI_FTSR_TR14 EXTI_FTSR_TR14_Msk /*!< Falling trigger event configuration bit of line 14 */
-#define EXTI_FTSR_TR15_Pos (15U)
-#define EXTI_FTSR_TR15_Msk (0x1UL << EXTI_FTSR_TR15_Pos) /*!< 0x00008000 */
-#define EXTI_FTSR_TR15 EXTI_FTSR_TR15_Msk /*!< Falling trigger event configuration bit of line 15 */
-#define EXTI_FTSR_TR16_Pos (16U)
-#define EXTI_FTSR_TR16_Msk (0x1UL << EXTI_FTSR_TR16_Pos) /*!< 0x00010000 */
-#define EXTI_FTSR_TR16 EXTI_FTSR_TR16_Msk /*!< Falling trigger event configuration bit of line 16 */
-#define EXTI_FTSR_TR17_Pos (17U)
-#define EXTI_FTSR_TR17_Msk (0x1UL << EXTI_FTSR_TR17_Pos) /*!< 0x00020000 */
-#define EXTI_FTSR_TR17 EXTI_FTSR_TR17_Msk /*!< Falling trigger event configuration bit of line 17 */
-#define EXTI_FTSR_TR18_Pos (18U)
-#define EXTI_FTSR_TR18_Msk (0x1UL << EXTI_FTSR_TR18_Pos) /*!< 0x00040000 */
-#define EXTI_FTSR_TR18 EXTI_FTSR_TR18_Msk /*!< Falling trigger event configuration bit of line 18 */
-#define EXTI_FTSR_TR19_Pos (19U)
-#define EXTI_FTSR_TR19_Msk (0x1UL << EXTI_FTSR_TR19_Pos) /*!< 0x00080000 */
-#define EXTI_FTSR_TR19 EXTI_FTSR_TR19_Msk /*!< Falling trigger event configuration bit of line 19 */
-#define EXTI_FTSR_TR20_Pos (20U)
-#define EXTI_FTSR_TR20_Msk (0x1UL << EXTI_FTSR_TR20_Pos) /*!< 0x00100000 */
-#define EXTI_FTSR_TR20 EXTI_FTSR_TR20_Msk /*!< Falling trigger event configuration bit of line 20 */
-#define EXTI_FTSR_TR21_Pos (21U)
-#define EXTI_FTSR_TR21_Msk (0x1UL << EXTI_FTSR_TR21_Pos) /*!< 0x00200000 */
-#define EXTI_FTSR_TR21 EXTI_FTSR_TR21_Msk /*!< Falling trigger event configuration bit of line 21 */
-#define EXTI_FTSR_TR22_Pos (22U)
-#define EXTI_FTSR_TR22_Msk (0x1UL << EXTI_FTSR_TR22_Pos) /*!< 0x00400000 */
-#define EXTI_FTSR_TR22 EXTI_FTSR_TR22_Msk /*!< Falling trigger event configuration bit of line 22 */
-
-/****************** Bit definition for EXTI_SWIER register ******************/
-#define EXTI_SWIER_SWIER0_Pos (0U)
-#define EXTI_SWIER_SWIER0_Msk (0x1UL << EXTI_SWIER_SWIER0_Pos) /*!< 0x00000001 */
-#define EXTI_SWIER_SWIER0 EXTI_SWIER_SWIER0_Msk /*!< Software Interrupt on line 0 */
-#define EXTI_SWIER_SWIER1_Pos (1U)
-#define EXTI_SWIER_SWIER1_Msk (0x1UL << EXTI_SWIER_SWIER1_Pos) /*!< 0x00000002 */
-#define EXTI_SWIER_SWIER1 EXTI_SWIER_SWIER1_Msk /*!< Software Interrupt on line 1 */
-#define EXTI_SWIER_SWIER2_Pos (2U)
-#define EXTI_SWIER_SWIER2_Msk (0x1UL << EXTI_SWIER_SWIER2_Pos) /*!< 0x00000004 */
-#define EXTI_SWIER_SWIER2 EXTI_SWIER_SWIER2_Msk /*!< Software Interrupt on line 2 */
-#define EXTI_SWIER_SWIER3_Pos (3U)
-#define EXTI_SWIER_SWIER3_Msk (0x1UL << EXTI_SWIER_SWIER3_Pos) /*!< 0x00000008 */
-#define EXTI_SWIER_SWIER3 EXTI_SWIER_SWIER3_Msk /*!< Software Interrupt on line 3 */
-#define EXTI_SWIER_SWIER4_Pos (4U)
-#define EXTI_SWIER_SWIER4_Msk (0x1UL << EXTI_SWIER_SWIER4_Pos) /*!< 0x00000010 */
-#define EXTI_SWIER_SWIER4 EXTI_SWIER_SWIER4_Msk /*!< Software Interrupt on line 4 */
-#define EXTI_SWIER_SWIER5_Pos (5U)
-#define EXTI_SWIER_SWIER5_Msk (0x1UL << EXTI_SWIER_SWIER5_Pos) /*!< 0x00000020 */
-#define EXTI_SWIER_SWIER5 EXTI_SWIER_SWIER5_Msk /*!< Software Interrupt on line 5 */
-#define EXTI_SWIER_SWIER6_Pos (6U)
-#define EXTI_SWIER_SWIER6_Msk (0x1UL << EXTI_SWIER_SWIER6_Pos) /*!< 0x00000040 */
-#define EXTI_SWIER_SWIER6 EXTI_SWIER_SWIER6_Msk /*!< Software Interrupt on line 6 */
-#define EXTI_SWIER_SWIER7_Pos (7U)
-#define EXTI_SWIER_SWIER7_Msk (0x1UL << EXTI_SWIER_SWIER7_Pos) /*!< 0x00000080 */
-#define EXTI_SWIER_SWIER7 EXTI_SWIER_SWIER7_Msk /*!< Software Interrupt on line 7 */
-#define EXTI_SWIER_SWIER8_Pos (8U)
-#define EXTI_SWIER_SWIER8_Msk (0x1UL << EXTI_SWIER_SWIER8_Pos) /*!< 0x00000100 */
-#define EXTI_SWIER_SWIER8 EXTI_SWIER_SWIER8_Msk /*!< Software Interrupt on line 8 */
-#define EXTI_SWIER_SWIER9_Pos (9U)
-#define EXTI_SWIER_SWIER9_Msk (0x1UL << EXTI_SWIER_SWIER9_Pos) /*!< 0x00000200 */
-#define EXTI_SWIER_SWIER9 EXTI_SWIER_SWIER9_Msk /*!< Software Interrupt on line 9 */
-#define EXTI_SWIER_SWIER10_Pos (10U)
-#define EXTI_SWIER_SWIER10_Msk (0x1UL << EXTI_SWIER_SWIER10_Pos) /*!< 0x00000400 */
-#define EXTI_SWIER_SWIER10 EXTI_SWIER_SWIER10_Msk /*!< Software Interrupt on line 10 */
-#define EXTI_SWIER_SWIER11_Pos (11U)
-#define EXTI_SWIER_SWIER11_Msk (0x1UL << EXTI_SWIER_SWIER11_Pos) /*!< 0x00000800 */
-#define EXTI_SWIER_SWIER11 EXTI_SWIER_SWIER11_Msk /*!< Software Interrupt on line 11 */
-#define EXTI_SWIER_SWIER12_Pos (12U)
-#define EXTI_SWIER_SWIER12_Msk (0x1UL << EXTI_SWIER_SWIER12_Pos) /*!< 0x00001000 */
-#define EXTI_SWIER_SWIER12 EXTI_SWIER_SWIER12_Msk /*!< Software Interrupt on line 12 */
-#define EXTI_SWIER_SWIER13_Pos (13U)
-#define EXTI_SWIER_SWIER13_Msk (0x1UL << EXTI_SWIER_SWIER13_Pos) /*!< 0x00002000 */
-#define EXTI_SWIER_SWIER13 EXTI_SWIER_SWIER13_Msk /*!< Software Interrupt on line 13 */
-#define EXTI_SWIER_SWIER14_Pos (14U)
-#define EXTI_SWIER_SWIER14_Msk (0x1UL << EXTI_SWIER_SWIER14_Pos) /*!< 0x00004000 */
-#define EXTI_SWIER_SWIER14 EXTI_SWIER_SWIER14_Msk /*!< Software Interrupt on line 14 */
-#define EXTI_SWIER_SWIER15_Pos (15U)
-#define EXTI_SWIER_SWIER15_Msk (0x1UL << EXTI_SWIER_SWIER15_Pos) /*!< 0x00008000 */
-#define EXTI_SWIER_SWIER15 EXTI_SWIER_SWIER15_Msk /*!< Software Interrupt on line 15 */
-#define EXTI_SWIER_SWIER16_Pos (16U)
-#define EXTI_SWIER_SWIER16_Msk (0x1UL << EXTI_SWIER_SWIER16_Pos) /*!< 0x00010000 */
-#define EXTI_SWIER_SWIER16 EXTI_SWIER_SWIER16_Msk /*!< Software Interrupt on line 16 */
-#define EXTI_SWIER_SWIER17_Pos (17U)
-#define EXTI_SWIER_SWIER17_Msk (0x1UL << EXTI_SWIER_SWIER17_Pos) /*!< 0x00020000 */
-#define EXTI_SWIER_SWIER17 EXTI_SWIER_SWIER17_Msk /*!< Software Interrupt on line 17 */
-#define EXTI_SWIER_SWIER18_Pos (18U)
-#define EXTI_SWIER_SWIER18_Msk (0x1UL << EXTI_SWIER_SWIER18_Pos) /*!< 0x00040000 */
-#define EXTI_SWIER_SWIER18 EXTI_SWIER_SWIER18_Msk /*!< Software Interrupt on line 18 */
-#define EXTI_SWIER_SWIER19_Pos (19U)
-#define EXTI_SWIER_SWIER19_Msk (0x1UL << EXTI_SWIER_SWIER19_Pos) /*!< 0x00080000 */
-#define EXTI_SWIER_SWIER19 EXTI_SWIER_SWIER19_Msk /*!< Software Interrupt on line 19 */
-#define EXTI_SWIER_SWIER20_Pos (20U)
-#define EXTI_SWIER_SWIER20_Msk (0x1UL << EXTI_SWIER_SWIER20_Pos) /*!< 0x00100000 */
-#define EXTI_SWIER_SWIER20 EXTI_SWIER_SWIER20_Msk /*!< Software Interrupt on line 20 */
-#define EXTI_SWIER_SWIER21_Pos (21U)
-#define EXTI_SWIER_SWIER21_Msk (0x1UL << EXTI_SWIER_SWIER21_Pos) /*!< 0x00200000 */
-#define EXTI_SWIER_SWIER21 EXTI_SWIER_SWIER21_Msk /*!< Software Interrupt on line 21 */
-#define EXTI_SWIER_SWIER22_Pos (22U)
-#define EXTI_SWIER_SWIER22_Msk (0x1UL << EXTI_SWIER_SWIER22_Pos) /*!< 0x00400000 */
-#define EXTI_SWIER_SWIER22 EXTI_SWIER_SWIER22_Msk /*!< Software Interrupt on line 22 */
-
-/******************* Bit definition for EXTI_PR register ********************/
-#define EXTI_PR_PR0_Pos (0U)
-#define EXTI_PR_PR0_Msk (0x1UL << EXTI_PR_PR0_Pos) /*!< 0x00000001 */
-#define EXTI_PR_PR0 EXTI_PR_PR0_Msk /*!< Pending bit for line 0 */
-#define EXTI_PR_PR1_Pos (1U)
-#define EXTI_PR_PR1_Msk (0x1UL << EXTI_PR_PR1_Pos) /*!< 0x00000002 */
-#define EXTI_PR_PR1 EXTI_PR_PR1_Msk /*!< Pending bit for line 1 */
-#define EXTI_PR_PR2_Pos (2U)
-#define EXTI_PR_PR2_Msk (0x1UL << EXTI_PR_PR2_Pos) /*!< 0x00000004 */
-#define EXTI_PR_PR2 EXTI_PR_PR2_Msk /*!< Pending bit for line 2 */
-#define EXTI_PR_PR3_Pos (3U)
-#define EXTI_PR_PR3_Msk (0x1UL << EXTI_PR_PR3_Pos) /*!< 0x00000008 */
-#define EXTI_PR_PR3 EXTI_PR_PR3_Msk /*!< Pending bit for line 3 */
-#define EXTI_PR_PR4_Pos (4U)
-#define EXTI_PR_PR4_Msk (0x1UL << EXTI_PR_PR4_Pos) /*!< 0x00000010 */
-#define EXTI_PR_PR4 EXTI_PR_PR4_Msk /*!< Pending bit for line 4 */
-#define EXTI_PR_PR5_Pos (5U)
-#define EXTI_PR_PR5_Msk (0x1UL << EXTI_PR_PR5_Pos) /*!< 0x00000020 */
-#define EXTI_PR_PR5 EXTI_PR_PR5_Msk /*!< Pending bit for line 5 */
-#define EXTI_PR_PR6_Pos (6U)
-#define EXTI_PR_PR6_Msk (0x1UL << EXTI_PR_PR6_Pos) /*!< 0x00000040 */
-#define EXTI_PR_PR6 EXTI_PR_PR6_Msk /*!< Pending bit for line 6 */
-#define EXTI_PR_PR7_Pos (7U)
-#define EXTI_PR_PR7_Msk (0x1UL << EXTI_PR_PR7_Pos) /*!< 0x00000080 */
-#define EXTI_PR_PR7 EXTI_PR_PR7_Msk /*!< Pending bit for line 7 */
-#define EXTI_PR_PR8_Pos (8U)
-#define EXTI_PR_PR8_Msk (0x1UL << EXTI_PR_PR8_Pos) /*!< 0x00000100 */
-#define EXTI_PR_PR8 EXTI_PR_PR8_Msk /*!< Pending bit for line 8 */
-#define EXTI_PR_PR9_Pos (9U)
-#define EXTI_PR_PR9_Msk (0x1UL << EXTI_PR_PR9_Pos) /*!< 0x00000200 */
-#define EXTI_PR_PR9 EXTI_PR_PR9_Msk /*!< Pending bit for line 9 */
-#define EXTI_PR_PR10_Pos (10U)
-#define EXTI_PR_PR10_Msk (0x1UL << EXTI_PR_PR10_Pos) /*!< 0x00000400 */
-#define EXTI_PR_PR10 EXTI_PR_PR10_Msk /*!< Pending bit for line 10 */
-#define EXTI_PR_PR11_Pos (11U)
-#define EXTI_PR_PR11_Msk (0x1UL << EXTI_PR_PR11_Pos) /*!< 0x00000800 */
-#define EXTI_PR_PR11 EXTI_PR_PR11_Msk /*!< Pending bit for line 11 */
-#define EXTI_PR_PR12_Pos (12U)
-#define EXTI_PR_PR12_Msk (0x1UL << EXTI_PR_PR12_Pos) /*!< 0x00001000 */
-#define EXTI_PR_PR12 EXTI_PR_PR12_Msk /*!< Pending bit for line 12 */
-#define EXTI_PR_PR13_Pos (13U)
-#define EXTI_PR_PR13_Msk (0x1UL << EXTI_PR_PR13_Pos) /*!< 0x00002000 */
-#define EXTI_PR_PR13 EXTI_PR_PR13_Msk /*!< Pending bit for line 13 */
-#define EXTI_PR_PR14_Pos (14U)
-#define EXTI_PR_PR14_Msk (0x1UL << EXTI_PR_PR14_Pos) /*!< 0x00004000 */
-#define EXTI_PR_PR14 EXTI_PR_PR14_Msk /*!< Pending bit for line 14 */
-#define EXTI_PR_PR15_Pos (15U)
-#define EXTI_PR_PR15_Msk (0x1UL << EXTI_PR_PR15_Pos) /*!< 0x00008000 */
-#define EXTI_PR_PR15 EXTI_PR_PR15_Msk /*!< Pending bit for line 15 */
-#define EXTI_PR_PR16_Pos (16U)
-#define EXTI_PR_PR16_Msk (0x1UL << EXTI_PR_PR16_Pos) /*!< 0x00010000 */
-#define EXTI_PR_PR16 EXTI_PR_PR16_Msk /*!< Pending bit for line 16 */
-#define EXTI_PR_PR17_Pos (17U)
-#define EXTI_PR_PR17_Msk (0x1UL << EXTI_PR_PR17_Pos) /*!< 0x00020000 */
-#define EXTI_PR_PR17 EXTI_PR_PR17_Msk /*!< Pending bit for line 17 */
-#define EXTI_PR_PR18_Pos (18U)
-#define EXTI_PR_PR18_Msk (0x1UL << EXTI_PR_PR18_Pos) /*!< 0x00040000 */
-#define EXTI_PR_PR18 EXTI_PR_PR18_Msk /*!< Pending bit for line 18 */
-#define EXTI_PR_PR19_Pos (19U)
-#define EXTI_PR_PR19_Msk (0x1UL << EXTI_PR_PR19_Pos) /*!< 0x00080000 */
-#define EXTI_PR_PR19 EXTI_PR_PR19_Msk /*!< Pending bit for line 19 */
-#define EXTI_PR_PR20_Pos (20U)
-#define EXTI_PR_PR20_Msk (0x1UL << EXTI_PR_PR20_Pos) /*!< 0x00100000 */
-#define EXTI_PR_PR20 EXTI_PR_PR20_Msk /*!< Pending bit for line 20 */
-#define EXTI_PR_PR21_Pos (21U)
-#define EXTI_PR_PR21_Msk (0x1UL << EXTI_PR_PR21_Pos) /*!< 0x00200000 */
-#define EXTI_PR_PR21 EXTI_PR_PR21_Msk /*!< Pending bit for line 21 */
-#define EXTI_PR_PR22_Pos (22U)
-#define EXTI_PR_PR22_Msk (0x1UL << EXTI_PR_PR22_Pos) /*!< 0x00400000 */
-#define EXTI_PR_PR22 EXTI_PR_PR22_Msk /*!< Pending bit for line 22 */
-
-/******************************************************************************/
-/* */
-/* FLASH */
-/* */
-/******************************************************************************/
-/******************* Bits definition for FLASH_ACR register *****************/
-#define FLASH_ACR_LATENCY_Pos (0U)
-#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
-#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
-#define FLASH_ACR_LATENCY_0WS 0x00000000U
-#define FLASH_ACR_LATENCY_1WS 0x00000001U
-#define FLASH_ACR_LATENCY_2WS 0x00000002U
-#define FLASH_ACR_LATENCY_3WS 0x00000003U
-#define FLASH_ACR_LATENCY_4WS 0x00000004U
-#define FLASH_ACR_LATENCY_5WS 0x00000005U
-#define FLASH_ACR_LATENCY_6WS 0x00000006U
-#define FLASH_ACR_LATENCY_7WS 0x00000007U
-
-
-#define FLASH_ACR_PRFTEN_Pos (8U)
-#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
-#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
-#define FLASH_ACR_ICEN_Pos (9U)
-#define FLASH_ACR_ICEN_Msk (0x1UL << FLASH_ACR_ICEN_Pos) /*!< 0x00000200 */
-#define FLASH_ACR_ICEN FLASH_ACR_ICEN_Msk
-#define FLASH_ACR_DCEN_Pos (10U)
-#define FLASH_ACR_DCEN_Msk (0x1UL << FLASH_ACR_DCEN_Pos) /*!< 0x00000400 */
-#define FLASH_ACR_DCEN FLASH_ACR_DCEN_Msk
-#define FLASH_ACR_ICRST_Pos (11U)
-#define FLASH_ACR_ICRST_Msk (0x1UL << FLASH_ACR_ICRST_Pos) /*!< 0x00000800 */
-#define FLASH_ACR_ICRST FLASH_ACR_ICRST_Msk
-#define FLASH_ACR_DCRST_Pos (12U)
-#define FLASH_ACR_DCRST_Msk (0x1UL << FLASH_ACR_DCRST_Pos) /*!< 0x00001000 */
-#define FLASH_ACR_DCRST FLASH_ACR_DCRST_Msk
-#define FLASH_ACR_BYTE0_ADDRESS_Pos (10U)
-#define FLASH_ACR_BYTE0_ADDRESS_Msk (0x10008FUL << FLASH_ACR_BYTE0_ADDRESS_Pos) /*!< 0x40023C00 */
-#define FLASH_ACR_BYTE0_ADDRESS FLASH_ACR_BYTE0_ADDRESS_Msk
-#define FLASH_ACR_BYTE2_ADDRESS_Pos (0U)
-#define FLASH_ACR_BYTE2_ADDRESS_Msk (0x40023C03UL << FLASH_ACR_BYTE2_ADDRESS_Pos) /*!< 0x40023C03 */
-#define FLASH_ACR_BYTE2_ADDRESS FLASH_ACR_BYTE2_ADDRESS_Msk
-
-/******************* Bits definition for FLASH_SR register ******************/
-#define FLASH_SR_EOP_Pos (0U)
-#define FLASH_SR_EOP_Msk (0x1UL << FLASH_SR_EOP_Pos) /*!< 0x00000001 */
-#define FLASH_SR_EOP FLASH_SR_EOP_Msk
-#define FLASH_SR_SOP_Pos (1U)
-#define FLASH_SR_SOP_Msk (0x1UL << FLASH_SR_SOP_Pos) /*!< 0x00000002 */
-#define FLASH_SR_SOP FLASH_SR_SOP_Msk
-#define FLASH_SR_WRPERR_Pos (4U)
-#define FLASH_SR_WRPERR_Msk (0x1UL << FLASH_SR_WRPERR_Pos) /*!< 0x00000010 */
-#define FLASH_SR_WRPERR FLASH_SR_WRPERR_Msk
-#define FLASH_SR_PGAERR_Pos (5U)
-#define FLASH_SR_PGAERR_Msk (0x1UL << FLASH_SR_PGAERR_Pos) /*!< 0x00000020 */
-#define FLASH_SR_PGAERR FLASH_SR_PGAERR_Msk
-#define FLASH_SR_PGPERR_Pos (6U)
-#define FLASH_SR_PGPERR_Msk (0x1UL << FLASH_SR_PGPERR_Pos) /*!< 0x00000040 */
-#define FLASH_SR_PGPERR FLASH_SR_PGPERR_Msk
-#define FLASH_SR_PGSERR_Pos (7U)
-#define FLASH_SR_PGSERR_Msk (0x1UL << FLASH_SR_PGSERR_Pos) /*!< 0x00000080 */
-#define FLASH_SR_PGSERR FLASH_SR_PGSERR_Msk
-#define FLASH_SR_RDERR_Pos (8U)
-#define FLASH_SR_RDERR_Msk (0x1UL << FLASH_SR_RDERR_Pos) /*!< 0x00000100 */
-#define FLASH_SR_RDERR FLASH_SR_RDERR_Msk
-#define FLASH_SR_BSY_Pos (16U)
-#define FLASH_SR_BSY_Msk (0x1UL << FLASH_SR_BSY_Pos) /*!< 0x00010000 */
-#define FLASH_SR_BSY FLASH_SR_BSY_Msk
-
-/******************* Bits definition for FLASH_CR register ******************/
-#define FLASH_CR_PG_Pos (0U)
-#define FLASH_CR_PG_Msk (0x1UL << FLASH_CR_PG_Pos) /*!< 0x00000001 */
-#define FLASH_CR_PG FLASH_CR_PG_Msk
-#define FLASH_CR_SER_Pos (1U)
-#define FLASH_CR_SER_Msk (0x1UL << FLASH_CR_SER_Pos) /*!< 0x00000002 */
-#define FLASH_CR_SER FLASH_CR_SER_Msk
-#define FLASH_CR_MER_Pos (2U)
-#define FLASH_CR_MER_Msk (0x1UL << FLASH_CR_MER_Pos) /*!< 0x00000004 */
-#define FLASH_CR_MER FLASH_CR_MER_Msk
-#define FLASH_CR_SNB_Pos (3U)
-#define FLASH_CR_SNB_Msk (0x1FUL << FLASH_CR_SNB_Pos) /*!< 0x000000F8 */
-#define FLASH_CR_SNB FLASH_CR_SNB_Msk
-#define FLASH_CR_SNB_0 (0x01UL << FLASH_CR_SNB_Pos) /*!< 0x00000008 */
-#define FLASH_CR_SNB_1 (0x02UL << FLASH_CR_SNB_Pos) /*!< 0x00000010 */
-#define FLASH_CR_SNB_2 (0x04UL << FLASH_CR_SNB_Pos) /*!< 0x00000020 */
-#define FLASH_CR_SNB_3 (0x08UL << FLASH_CR_SNB_Pos) /*!< 0x00000040 */
-#define FLASH_CR_SNB_4 (0x10UL << FLASH_CR_SNB_Pos) /*!< 0x00000080 */
-#define FLASH_CR_PSIZE_Pos (8U)
-#define FLASH_CR_PSIZE_Msk (0x3UL << FLASH_CR_PSIZE_Pos) /*!< 0x00000300 */
-#define FLASH_CR_PSIZE FLASH_CR_PSIZE_Msk
-#define FLASH_CR_PSIZE_0 (0x1UL << FLASH_CR_PSIZE_Pos) /*!< 0x00000100 */
-#define FLASH_CR_PSIZE_1 (0x2UL << FLASH_CR_PSIZE_Pos) /*!< 0x00000200 */
-#define FLASH_CR_STRT_Pos (16U)
-#define FLASH_CR_STRT_Msk (0x1UL << FLASH_CR_STRT_Pos) /*!< 0x00010000 */
-#define FLASH_CR_STRT FLASH_CR_STRT_Msk
-#define FLASH_CR_EOPIE_Pos (24U)
-#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
-#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
-#define FLASH_CR_ERRIE_Pos (25U)
-#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
-#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
-#define FLASH_CR_LOCK_Pos (31U)
-#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
-#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk
-
-/******************* Bits definition for FLASH_OPTCR register ***************/
-#define FLASH_OPTCR_OPTLOCK_Pos (0U)
-#define FLASH_OPTCR_OPTLOCK_Msk (0x1UL << FLASH_OPTCR_OPTLOCK_Pos) /*!< 0x00000001 */
-#define FLASH_OPTCR_OPTLOCK FLASH_OPTCR_OPTLOCK_Msk
-#define FLASH_OPTCR_OPTSTRT_Pos (1U)
-#define FLASH_OPTCR_OPTSTRT_Msk (0x1UL << FLASH_OPTCR_OPTSTRT_Pos) /*!< 0x00000002 */
-#define FLASH_OPTCR_OPTSTRT FLASH_OPTCR_OPTSTRT_Msk
-
-#define FLASH_OPTCR_BOR_LEV_0 0x00000004U
-#define FLASH_OPTCR_BOR_LEV_1 0x00000008U
-#define FLASH_OPTCR_BOR_LEV_Pos (2U)
-#define FLASH_OPTCR_BOR_LEV_Msk (0x3UL << FLASH_OPTCR_BOR_LEV_Pos) /*!< 0x0000000C */
-#define FLASH_OPTCR_BOR_LEV FLASH_OPTCR_BOR_LEV_Msk
-#define FLASH_OPTCR_WDG_SW_Pos (5U)
-#define FLASH_OPTCR_WDG_SW_Msk (0x1UL << FLASH_OPTCR_WDG_SW_Pos) /*!< 0x00000020 */
-#define FLASH_OPTCR_WDG_SW FLASH_OPTCR_WDG_SW_Msk
-#define FLASH_OPTCR_nRST_STOP_Pos (6U)
-#define FLASH_OPTCR_nRST_STOP_Msk (0x1UL << FLASH_OPTCR_nRST_STOP_Pos) /*!< 0x00000040 */
-#define FLASH_OPTCR_nRST_STOP FLASH_OPTCR_nRST_STOP_Msk
-#define FLASH_OPTCR_nRST_STDBY_Pos (7U)
-#define FLASH_OPTCR_nRST_STDBY_Msk (0x1UL << FLASH_OPTCR_nRST_STDBY_Pos) /*!< 0x00000080 */
-#define FLASH_OPTCR_nRST_STDBY FLASH_OPTCR_nRST_STDBY_Msk
-#define FLASH_OPTCR_RDP_Pos (8U)
-#define FLASH_OPTCR_RDP_Msk (0xFFUL << FLASH_OPTCR_RDP_Pos) /*!< 0x0000FF00 */
-#define FLASH_OPTCR_RDP FLASH_OPTCR_RDP_Msk
-#define FLASH_OPTCR_RDP_0 (0x01UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00000100 */
-#define FLASH_OPTCR_RDP_1 (0x02UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00000200 */
-#define FLASH_OPTCR_RDP_2 (0x04UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00000400 */
-#define FLASH_OPTCR_RDP_3 (0x08UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00000800 */
-#define FLASH_OPTCR_RDP_4 (0x10UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00001000 */
-#define FLASH_OPTCR_RDP_5 (0x20UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00002000 */
-#define FLASH_OPTCR_RDP_6 (0x40UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00004000 */
-#define FLASH_OPTCR_RDP_7 (0x80UL << FLASH_OPTCR_RDP_Pos) /*!< 0x00008000 */
-#define FLASH_OPTCR_nWRP_Pos (16U)
-#define FLASH_OPTCR_nWRP_Msk (0xFFFUL << FLASH_OPTCR_nWRP_Pos) /*!< 0x0FFF0000 */
-#define FLASH_OPTCR_nWRP FLASH_OPTCR_nWRP_Msk
-#define FLASH_OPTCR_nWRP_0 0x00010000U
-#define FLASH_OPTCR_nWRP_1 0x00020000U
-#define FLASH_OPTCR_nWRP_2 0x00040000U
-#define FLASH_OPTCR_nWRP_3 0x00080000U
-#define FLASH_OPTCR_nWRP_4 0x00100000U
-#define FLASH_OPTCR_nWRP_5 0x00200000U
-#define FLASH_OPTCR_nWRP_6 0x00400000U
-#define FLASH_OPTCR_nWRP_7 0x00800000U
-#define FLASH_OPTCR_nWRP_8 0x01000000U
-#define FLASH_OPTCR_nWRP_9 0x02000000U
-#define FLASH_OPTCR_nWRP_10 0x04000000U
-#define FLASH_OPTCR_nWRP_11 0x08000000U
-
-/****************** Bits definition for FLASH_OPTCR1 register ***************/
-#define FLASH_OPTCR1_nWRP_Pos (16U)
-#define FLASH_OPTCR1_nWRP_Msk (0xFFFUL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x0FFF0000 */
-#define FLASH_OPTCR1_nWRP FLASH_OPTCR1_nWRP_Msk
-#define FLASH_OPTCR1_nWRP_0 (0x001UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00010000 */
-#define FLASH_OPTCR1_nWRP_1 (0x002UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00020000 */
-#define FLASH_OPTCR1_nWRP_2 (0x004UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00040000 */
-#define FLASH_OPTCR1_nWRP_3 (0x008UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00080000 */
-#define FLASH_OPTCR1_nWRP_4 (0x010UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00100000 */
-#define FLASH_OPTCR1_nWRP_5 (0x020UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00200000 */
-#define FLASH_OPTCR1_nWRP_6 (0x040UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00400000 */
-#define FLASH_OPTCR1_nWRP_7 (0x080UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x00800000 */
-#define FLASH_OPTCR1_nWRP_8 (0x100UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x01000000 */
-#define FLASH_OPTCR1_nWRP_9 (0x200UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x02000000 */
-#define FLASH_OPTCR1_nWRP_10 (0x400UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x04000000 */
-#define FLASH_OPTCR1_nWRP_11 (0x800UL << FLASH_OPTCR1_nWRP_Pos) /*!< 0x08000000 */
-
-/******************************************************************************/
-/* */
-/* General Purpose I/O */
-/* */
-/******************************************************************************/
-/****************** Bits definition for GPIO_MODER register *****************/
-#define GPIO_MODER_MODER0_Pos (0U)
-#define GPIO_MODER_MODER0_Msk (0x3UL << GPIO_MODER_MODER0_Pos) /*!< 0x00000003 */
-#define GPIO_MODER_MODER0 GPIO_MODER_MODER0_Msk
-#define GPIO_MODER_MODER0_0 (0x1UL << GPIO_MODER_MODER0_Pos) /*!< 0x00000001 */
-#define GPIO_MODER_MODER0_1 (0x2UL << GPIO_MODER_MODER0_Pos) /*!< 0x00000002 */
-#define GPIO_MODER_MODER1_Pos (2U)
-#define GPIO_MODER_MODER1_Msk (0x3UL << GPIO_MODER_MODER1_Pos) /*!< 0x0000000C */
-#define GPIO_MODER_MODER1 GPIO_MODER_MODER1_Msk
-#define GPIO_MODER_MODER1_0 (0x1UL << GPIO_MODER_MODER1_Pos) /*!< 0x00000004 */
-#define GPIO_MODER_MODER1_1 (0x2UL << GPIO_MODER_MODER1_Pos) /*!< 0x00000008 */
-#define GPIO_MODER_MODER2_Pos (4U)
-#define GPIO_MODER_MODER2_Msk (0x3UL << GPIO_MODER_MODER2_Pos) /*!< 0x00000030 */
-#define GPIO_MODER_MODER2 GPIO_MODER_MODER2_Msk
-#define GPIO_MODER_MODER2_0 (0x1UL << GPIO_MODER_MODER2_Pos) /*!< 0x00000010 */
-#define GPIO_MODER_MODER2_1 (0x2UL << GPIO_MODER_MODER2_Pos) /*!< 0x00000020 */
-#define GPIO_MODER_MODER3_Pos (6U)
-#define GPIO_MODER_MODER3_Msk (0x3UL << GPIO_MODER_MODER3_Pos) /*!< 0x000000C0 */
-#define GPIO_MODER_MODER3 GPIO_MODER_MODER3_Msk
-#define GPIO_MODER_MODER3_0 (0x1UL << GPIO_MODER_MODER3_Pos) /*!< 0x00000040 */
-#define GPIO_MODER_MODER3_1 (0x2UL << GPIO_MODER_MODER3_Pos) /*!< 0x00000080 */
-#define GPIO_MODER_MODER4_Pos (8U)
-#define GPIO_MODER_MODER4_Msk (0x3UL << GPIO_MODER_MODER4_Pos) /*!< 0x00000300 */
-#define GPIO_MODER_MODER4 GPIO_MODER_MODER4_Msk
-#define GPIO_MODER_MODER4_0 (0x1UL << GPIO_MODER_MODER4_Pos) /*!< 0x00000100 */
-#define GPIO_MODER_MODER4_1 (0x2UL << GPIO_MODER_MODER4_Pos) /*!< 0x00000200 */
-#define GPIO_MODER_MODER5_Pos (10U)
-#define GPIO_MODER_MODER5_Msk (0x3UL << GPIO_MODER_MODER5_Pos) /*!< 0x00000C00 */
-#define GPIO_MODER_MODER5 GPIO_MODER_MODER5_Msk
-#define GPIO_MODER_MODER5_0 (0x1UL << GPIO_MODER_MODER5_Pos) /*!< 0x00000400 */
-#define GPIO_MODER_MODER5_1 (0x2UL << GPIO_MODER_MODER5_Pos) /*!< 0x00000800 */
-#define GPIO_MODER_MODER6_Pos (12U)
-#define GPIO_MODER_MODER6_Msk (0x3UL << GPIO_MODER_MODER6_Pos) /*!< 0x00003000 */
-#define GPIO_MODER_MODER6 GPIO_MODER_MODER6_Msk
-#define GPIO_MODER_MODER6_0 (0x1UL << GPIO_MODER_MODER6_Pos) /*!< 0x00001000 */
-#define GPIO_MODER_MODER6_1 (0x2UL << GPIO_MODER_MODER6_Pos) /*!< 0x00002000 */
-#define GPIO_MODER_MODER7_Pos (14U)
-#define GPIO_MODER_MODER7_Msk (0x3UL << GPIO_MODER_MODER7_Pos) /*!< 0x0000C000 */
-#define GPIO_MODER_MODER7 GPIO_MODER_MODER7_Msk
-#define GPIO_MODER_MODER7_0 (0x1UL << GPIO_MODER_MODER7_Pos) /*!< 0x00004000 */
-#define GPIO_MODER_MODER7_1 (0x2UL << GPIO_MODER_MODER7_Pos) /*!< 0x00008000 */
-#define GPIO_MODER_MODER8_Pos (16U)
-#define GPIO_MODER_MODER8_Msk (0x3UL << GPIO_MODER_MODER8_Pos) /*!< 0x00030000 */
-#define GPIO_MODER_MODER8 GPIO_MODER_MODER8_Msk
-#define GPIO_MODER_MODER8_0 (0x1UL << GPIO_MODER_MODER8_Pos) /*!< 0x00010000 */
-#define GPIO_MODER_MODER8_1 (0x2UL << GPIO_MODER_MODER8_Pos) /*!< 0x00020000 */
-#define GPIO_MODER_MODER9_Pos (18U)
-#define GPIO_MODER_MODER9_Msk (0x3UL << GPIO_MODER_MODER9_Pos) /*!< 0x000C0000 */
-#define GPIO_MODER_MODER9 GPIO_MODER_MODER9_Msk
-#define GPIO_MODER_MODER9_0 (0x1UL << GPIO_MODER_MODER9_Pos) /*!< 0x00040000 */
-#define GPIO_MODER_MODER9_1 (0x2UL << GPIO_MODER_MODER9_Pos) /*!< 0x00080000 */
-#define GPIO_MODER_MODER10_Pos (20U)
-#define GPIO_MODER_MODER10_Msk (0x3UL << GPIO_MODER_MODER10_Pos) /*!< 0x00300000 */
-#define GPIO_MODER_MODER10 GPIO_MODER_MODER10_Msk
-#define GPIO_MODER_MODER10_0 (0x1UL << GPIO_MODER_MODER10_Pos) /*!< 0x00100000 */
-#define GPIO_MODER_MODER10_1 (0x2UL << GPIO_MODER_MODER10_Pos) /*!< 0x00200000 */
-#define GPIO_MODER_MODER11_Pos (22U)
-#define GPIO_MODER_MODER11_Msk (0x3UL << GPIO_MODER_MODER11_Pos) /*!< 0x00C00000 */
-#define GPIO_MODER_MODER11 GPIO_MODER_MODER11_Msk
-#define GPIO_MODER_MODER11_0 (0x1UL << GPIO_MODER_MODER11_Pos) /*!< 0x00400000 */
-#define GPIO_MODER_MODER11_1 (0x2UL << GPIO_MODER_MODER11_Pos) /*!< 0x00800000 */
-#define GPIO_MODER_MODER12_Pos (24U)
-#define GPIO_MODER_MODER12_Msk (0x3UL << GPIO_MODER_MODER12_Pos) /*!< 0x03000000 */
-#define GPIO_MODER_MODER12 GPIO_MODER_MODER12_Msk
-#define GPIO_MODER_MODER12_0 (0x1UL << GPIO_MODER_MODER12_Pos) /*!< 0x01000000 */
-#define GPIO_MODER_MODER12_1 (0x2UL << GPIO_MODER_MODER12_Pos) /*!< 0x02000000 */
-#define GPIO_MODER_MODER13_Pos (26U)
-#define GPIO_MODER_MODER13_Msk (0x3UL << GPIO_MODER_MODER13_Pos) /*!< 0x0C000000 */
-#define GPIO_MODER_MODER13 GPIO_MODER_MODER13_Msk
-#define GPIO_MODER_MODER13_0 (0x1UL << GPIO_MODER_MODER13_Pos) /*!< 0x04000000 */
-#define GPIO_MODER_MODER13_1 (0x2UL << GPIO_MODER_MODER13_Pos) /*!< 0x08000000 */
-#define GPIO_MODER_MODER14_Pos (28U)
-#define GPIO_MODER_MODER14_Msk (0x3UL << GPIO_MODER_MODER14_Pos) /*!< 0x30000000 */
-#define GPIO_MODER_MODER14 GPIO_MODER_MODER14_Msk
-#define GPIO_MODER_MODER14_0 (0x1UL << GPIO_MODER_MODER14_Pos) /*!< 0x10000000 */
-#define GPIO_MODER_MODER14_1 (0x2UL << GPIO_MODER_MODER14_Pos) /*!< 0x20000000 */
-#define GPIO_MODER_MODER15_Pos (30U)
-#define GPIO_MODER_MODER15_Msk (0x3UL << GPIO_MODER_MODER15_Pos) /*!< 0xC0000000 */
-#define GPIO_MODER_MODER15 GPIO_MODER_MODER15_Msk
-#define GPIO_MODER_MODER15_0 (0x1UL << GPIO_MODER_MODER15_Pos) /*!< 0x40000000 */
-#define GPIO_MODER_MODER15_1 (0x2UL << GPIO_MODER_MODER15_Pos) /*!< 0x80000000 */
-
-/* Legacy defines */
-#define GPIO_MODER_MODE0_Pos GPIO_MODER_MODER0_Pos
-#define GPIO_MODER_MODE0_Msk GPIO_MODER_MODER0_Msk
-#define GPIO_MODER_MODE0 GPIO_MODER_MODER0
-#define GPIO_MODER_MODE0_0 GPIO_MODER_MODER0_0
-#define GPIO_MODER_MODE0_1 GPIO_MODER_MODER0_1
-#define GPIO_MODER_MODE1_Pos GPIO_MODER_MODER1_Pos
-#define GPIO_MODER_MODE1_Msk GPIO_MODER_MODER1_Msk
-#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
-#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
-#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
-#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
-#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
-#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
-#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
-#define GPIO_MODER_MODE2_1 GPIO_MODER_MODER2_1
-#define GPIO_MODER_MODE3_Pos GPIO_MODER_MODER3_Pos
-#define GPIO_MODER_MODE3_Msk GPIO_MODER_MODER3_Msk
-#define GPIO_MODER_MODE3 GPIO_MODER_MODER3
-#define GPIO_MODER_MODE3_0 GPIO_MODER_MODER3_0
-#define GPIO_MODER_MODE3_1 GPIO_MODER_MODER3_1
-#define GPIO_MODER_MODE4_Pos GPIO_MODER_MODER4_Pos
-#define GPIO_MODER_MODE4_Msk GPIO_MODER_MODER4_Msk
-#define GPIO_MODER_MODE4 GPIO_MODER_MODER4
-#define GPIO_MODER_MODE4_0 GPIO_MODER_MODER4_0
-#define GPIO_MODER_MODE4_1 GPIO_MODER_MODER4_1
-#define GPIO_MODER_MODE5_Pos GPIO_MODER_MODER5_Pos
-#define GPIO_MODER_MODE5_Msk GPIO_MODER_MODER5_Msk
-#define GPIO_MODER_MODE5 GPIO_MODER_MODER5
-#define GPIO_MODER_MODE5_0 GPIO_MODER_MODER5_0
-#define GPIO_MODER_MODE5_1 GPIO_MODER_MODER5_1
-#define GPIO_MODER_MODE6_Pos GPIO_MODER_MODER6_Pos
-#define GPIO_MODER_MODE6_Msk GPIO_MODER_MODER6_Msk
-#define GPIO_MODER_MODE6 GPIO_MODER_MODER6
-#define GPIO_MODER_MODE6_0 GPIO_MODER_MODER6_0
-#define GPIO_MODER_MODE6_1 GPIO_MODER_MODER6_1
-#define GPIO_MODER_MODE7_Pos GPIO_MODER_MODER7_Pos
-#define GPIO_MODER_MODE7_Msk GPIO_MODER_MODER7_Msk
-#define GPIO_MODER_MODE7 GPIO_MODER_MODER7
-#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
-#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
-#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
-#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
-#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
-#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
-#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1
-#define GPIO_MODER_MODE9_Pos GPIO_MODER_MODER9_Pos
-#define GPIO_MODER_MODE9_Msk GPIO_MODER_MODER9_Msk
-#define GPIO_MODER_MODE9 GPIO_MODER_MODER9
-#define GPIO_MODER_MODE9_0 GPIO_MODER_MODER9_0
-#define GPIO_MODER_MODE9_1 GPIO_MODER_MODER9_1
-#define GPIO_MODER_MODE10_Pos GPIO_MODER_MODER10_Pos
-#define GPIO_MODER_MODE10_Msk GPIO_MODER_MODER10_Msk
-#define GPIO_MODER_MODE10 GPIO_MODER_MODER10
-#define GPIO_MODER_MODE10_0 GPIO_MODER_MODER10_0
-#define GPIO_MODER_MODE10_1 GPIO_MODER_MODER10_1
-#define GPIO_MODER_MODE11_Pos GPIO_MODER_MODER11_Pos
-#define GPIO_MODER_MODE11_Msk GPIO_MODER_MODER11_Msk
-#define GPIO_MODER_MODE11 GPIO_MODER_MODER11
-#define GPIO_MODER_MODE11_0 GPIO_MODER_MODER11_0
-#define GPIO_MODER_MODE11_1 GPIO_MODER_MODER11_1
-#define GPIO_MODER_MODE12_Pos GPIO_MODER_MODER12_Pos
-#define GPIO_MODER_MODE12_Msk GPIO_MODER_MODER12_Msk
-#define GPIO_MODER_MODE12 GPIO_MODER_MODER12
-#define GPIO_MODER_MODE12_0 GPIO_MODER_MODER12_0
-#define GPIO_MODER_MODE12_1 GPIO_MODER_MODER12_1
-#define GPIO_MODER_MODE13_Pos GPIO_MODER_MODER13_Pos
-#define GPIO_MODER_MODE13_Msk GPIO_MODER_MODER13_Msk
-#define GPIO_MODER_MODE13 GPIO_MODER_MODER13
-#define GPIO_MODER_MODE13_0 GPIO_MODER_MODER13_0
-#define GPIO_MODER_MODE13_1 GPIO_MODER_MODER13_1
-#define GPIO_MODER_MODE14_Pos GPIO_MODER_MODER14_Pos
-#define GPIO_MODER_MODE14_Msk GPIO_MODER_MODER14_Msk
-#define GPIO_MODER_MODE14 GPIO_MODER_MODER14
-#define GPIO_MODER_MODE14_0 GPIO_MODER_MODER14_0
-#define GPIO_MODER_MODE14_1 GPIO_MODER_MODER14_1
-#define GPIO_MODER_MODE15_Pos GPIO_MODER_MODER15_Pos
-#define GPIO_MODER_MODE15_Msk GPIO_MODER_MODER15_Msk
-#define GPIO_MODER_MODE15 GPIO_MODER_MODER15
-#define GPIO_MODER_MODE15_0 GPIO_MODER_MODER15_0
-#define GPIO_MODER_MODE15_1 GPIO_MODER_MODER15_1
-
-/****************** Bits definition for GPIO_OTYPER register ****************/
-#define GPIO_OTYPER_OT0_Pos (0U)
-#define GPIO_OTYPER_OT0_Msk (0x1UL << GPIO_OTYPER_OT0_Pos) /*!< 0x00000001 */
-#define GPIO_OTYPER_OT0 GPIO_OTYPER_OT0_Msk
-#define GPIO_OTYPER_OT1_Pos (1U)
-#define GPIO_OTYPER_OT1_Msk (0x1UL << GPIO_OTYPER_OT1_Pos) /*!< 0x00000002 */
-#define GPIO_OTYPER_OT1 GPIO_OTYPER_OT1_Msk
-#define GPIO_OTYPER_OT2_Pos (2U)
-#define GPIO_OTYPER_OT2_Msk (0x1UL << GPIO_OTYPER_OT2_Pos) /*!< 0x00000004 */
-#define GPIO_OTYPER_OT2 GPIO_OTYPER_OT2_Msk
-#define GPIO_OTYPER_OT3_Pos (3U)
-#define GPIO_OTYPER_OT3_Msk (0x1UL << GPIO_OTYPER_OT3_Pos) /*!< 0x00000008 */
-#define GPIO_OTYPER_OT3 GPIO_OTYPER_OT3_Msk
-#define GPIO_OTYPER_OT4_Pos (4U)
-#define GPIO_OTYPER_OT4_Msk (0x1UL << GPIO_OTYPER_OT4_Pos) /*!< 0x00000010 */
-#define GPIO_OTYPER_OT4 GPIO_OTYPER_OT4_Msk
-#define GPIO_OTYPER_OT5_Pos (5U)
-#define GPIO_OTYPER_OT5_Msk (0x1UL << GPIO_OTYPER_OT5_Pos) /*!< 0x00000020 */
-#define GPIO_OTYPER_OT5 GPIO_OTYPER_OT5_Msk
-#define GPIO_OTYPER_OT6_Pos (6U)
-#define GPIO_OTYPER_OT6_Msk (0x1UL << GPIO_OTYPER_OT6_Pos) /*!< 0x00000040 */
-#define GPIO_OTYPER_OT6 GPIO_OTYPER_OT6_Msk
-#define GPIO_OTYPER_OT7_Pos (7U)
-#define GPIO_OTYPER_OT7_Msk (0x1UL << GPIO_OTYPER_OT7_Pos) /*!< 0x00000080 */
-#define GPIO_OTYPER_OT7 GPIO_OTYPER_OT7_Msk
-#define GPIO_OTYPER_OT8_Pos (8U)
-#define GPIO_OTYPER_OT8_Msk (0x1UL << GPIO_OTYPER_OT8_Pos) /*!< 0x00000100 */
-#define GPIO_OTYPER_OT8 GPIO_OTYPER_OT8_Msk
-#define GPIO_OTYPER_OT9_Pos (9U)
-#define GPIO_OTYPER_OT9_Msk (0x1UL << GPIO_OTYPER_OT9_Pos) /*!< 0x00000200 */
-#define GPIO_OTYPER_OT9 GPIO_OTYPER_OT9_Msk
-#define GPIO_OTYPER_OT10_Pos (10U)
-#define GPIO_OTYPER_OT10_Msk (0x1UL << GPIO_OTYPER_OT10_Pos) /*!< 0x00000400 */
-#define GPIO_OTYPER_OT10 GPIO_OTYPER_OT10_Msk
-#define GPIO_OTYPER_OT11_Pos (11U)
-#define GPIO_OTYPER_OT11_Msk (0x1UL << GPIO_OTYPER_OT11_Pos) /*!< 0x00000800 */
-#define GPIO_OTYPER_OT11 GPIO_OTYPER_OT11_Msk
-#define GPIO_OTYPER_OT12_Pos (12U)
-#define GPIO_OTYPER_OT12_Msk (0x1UL << GPIO_OTYPER_OT12_Pos) /*!< 0x00001000 */
-#define GPIO_OTYPER_OT12 GPIO_OTYPER_OT12_Msk
-#define GPIO_OTYPER_OT13_Pos (13U)
-#define GPIO_OTYPER_OT13_Msk (0x1UL << GPIO_OTYPER_OT13_Pos) /*!< 0x00002000 */
-#define GPIO_OTYPER_OT13 GPIO_OTYPER_OT13_Msk
-#define GPIO_OTYPER_OT14_Pos (14U)
-#define GPIO_OTYPER_OT14_Msk (0x1UL << GPIO_OTYPER_OT14_Pos) /*!< 0x00004000 */
-#define GPIO_OTYPER_OT14 GPIO_OTYPER_OT14_Msk
-#define GPIO_OTYPER_OT15_Pos (15U)
-#define GPIO_OTYPER_OT15_Msk (0x1UL << GPIO_OTYPER_OT15_Pos) /*!< 0x00008000 */
-#define GPIO_OTYPER_OT15 GPIO_OTYPER_OT15_Msk
-
-/* Legacy defines */
-#define GPIO_OTYPER_OT_0 GPIO_OTYPER_OT0
-#define GPIO_OTYPER_OT_1 GPIO_OTYPER_OT1
-#define GPIO_OTYPER_OT_2 GPIO_OTYPER_OT2
-#define GPIO_OTYPER_OT_3 GPIO_OTYPER_OT3
-#define GPIO_OTYPER_OT_4 GPIO_OTYPER_OT4
-#define GPIO_OTYPER_OT_5 GPIO_OTYPER_OT5
-#define GPIO_OTYPER_OT_6 GPIO_OTYPER_OT6
-#define GPIO_OTYPER_OT_7 GPIO_OTYPER_OT7
-#define GPIO_OTYPER_OT_8 GPIO_OTYPER_OT8
-#define GPIO_OTYPER_OT_9 GPIO_OTYPER_OT9
-#define GPIO_OTYPER_OT_10 GPIO_OTYPER_OT10
-#define GPIO_OTYPER_OT_11 GPIO_OTYPER_OT11
-#define GPIO_OTYPER_OT_12 GPIO_OTYPER_OT12
-#define GPIO_OTYPER_OT_13 GPIO_OTYPER_OT13
-#define GPIO_OTYPER_OT_14 GPIO_OTYPER_OT14
-#define GPIO_OTYPER_OT_15 GPIO_OTYPER_OT15
-
-/****************** Bits definition for GPIO_OSPEEDR register ***************/
-#define GPIO_OSPEEDR_OSPEED0_Pos (0U)
-#define GPIO_OSPEEDR_OSPEED0_Msk (0x3UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000003 */
-#define GPIO_OSPEEDR_OSPEED0 GPIO_OSPEEDR_OSPEED0_Msk
-#define GPIO_OSPEEDR_OSPEED0_0 (0x1UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000001 */
-#define GPIO_OSPEEDR_OSPEED0_1 (0x2UL << GPIO_OSPEEDR_OSPEED0_Pos) /*!< 0x00000002 */
-#define GPIO_OSPEEDR_OSPEED1_Pos (2U)
-#define GPIO_OSPEEDR_OSPEED1_Msk (0x3UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x0000000C */
-#define GPIO_OSPEEDR_OSPEED1 GPIO_OSPEEDR_OSPEED1_Msk
-#define GPIO_OSPEEDR_OSPEED1_0 (0x1UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000004 */
-#define GPIO_OSPEEDR_OSPEED1_1 (0x2UL << GPIO_OSPEEDR_OSPEED1_Pos) /*!< 0x00000008 */
-#define GPIO_OSPEEDR_OSPEED2_Pos (4U)
-#define GPIO_OSPEEDR_OSPEED2_Msk (0x3UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000030 */
-#define GPIO_OSPEEDR_OSPEED2 GPIO_OSPEEDR_OSPEED2_Msk
-#define GPIO_OSPEEDR_OSPEED2_0 (0x1UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000010 */
-#define GPIO_OSPEEDR_OSPEED2_1 (0x2UL << GPIO_OSPEEDR_OSPEED2_Pos) /*!< 0x00000020 */
-#define GPIO_OSPEEDR_OSPEED3_Pos (6U)
-#define GPIO_OSPEEDR_OSPEED3_Msk (0x3UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x000000C0 */
-#define GPIO_OSPEEDR_OSPEED3 GPIO_OSPEEDR_OSPEED3_Msk
-#define GPIO_OSPEEDR_OSPEED3_0 (0x1UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000040 */
-#define GPIO_OSPEEDR_OSPEED3_1 (0x2UL << GPIO_OSPEEDR_OSPEED3_Pos) /*!< 0x00000080 */
-#define GPIO_OSPEEDR_OSPEED4_Pos (8U)
-#define GPIO_OSPEEDR_OSPEED4_Msk (0x3UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000300 */
-#define GPIO_OSPEEDR_OSPEED4 GPIO_OSPEEDR_OSPEED4_Msk
-#define GPIO_OSPEEDR_OSPEED4_0 (0x1UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000100 */
-#define GPIO_OSPEEDR_OSPEED4_1 (0x2UL << GPIO_OSPEEDR_OSPEED4_Pos) /*!< 0x00000200 */
-#define GPIO_OSPEEDR_OSPEED5_Pos (10U)
-#define GPIO_OSPEEDR_OSPEED5_Msk (0x3UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000C00 */
-#define GPIO_OSPEEDR_OSPEED5 GPIO_OSPEEDR_OSPEED5_Msk
-#define GPIO_OSPEEDR_OSPEED5_0 (0x1UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000400 */
-#define GPIO_OSPEEDR_OSPEED5_1 (0x2UL << GPIO_OSPEEDR_OSPEED5_Pos) /*!< 0x00000800 */
-#define GPIO_OSPEEDR_OSPEED6_Pos (12U)
-#define GPIO_OSPEEDR_OSPEED6_Msk (0x3UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00003000 */
-#define GPIO_OSPEEDR_OSPEED6 GPIO_OSPEEDR_OSPEED6_Msk
-#define GPIO_OSPEEDR_OSPEED6_0 (0x1UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00001000 */
-#define GPIO_OSPEEDR_OSPEED6_1 (0x2UL << GPIO_OSPEEDR_OSPEED6_Pos) /*!< 0x00002000 */
-#define GPIO_OSPEEDR_OSPEED7_Pos (14U)
-#define GPIO_OSPEEDR_OSPEED7_Msk (0x3UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x0000C000 */
-#define GPIO_OSPEEDR_OSPEED7 GPIO_OSPEEDR_OSPEED7_Msk
-#define GPIO_OSPEEDR_OSPEED7_0 (0x1UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00004000 */
-#define GPIO_OSPEEDR_OSPEED7_1 (0x2UL << GPIO_OSPEEDR_OSPEED7_Pos) /*!< 0x00008000 */
-#define GPIO_OSPEEDR_OSPEED8_Pos (16U)
-#define GPIO_OSPEEDR_OSPEED8_Msk (0x3UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00030000 */
-#define GPIO_OSPEEDR_OSPEED8 GPIO_OSPEEDR_OSPEED8_Msk
-#define GPIO_OSPEEDR_OSPEED8_0 (0x1UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00010000 */
-#define GPIO_OSPEEDR_OSPEED8_1 (0x2UL << GPIO_OSPEEDR_OSPEED8_Pos) /*!< 0x00020000 */
-#define GPIO_OSPEEDR_OSPEED9_Pos (18U)
-#define GPIO_OSPEEDR_OSPEED9_Msk (0x3UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x000C0000 */
-#define GPIO_OSPEEDR_OSPEED9 GPIO_OSPEEDR_OSPEED9_Msk
-#define GPIO_OSPEEDR_OSPEED9_0 (0x1UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00040000 */
-#define GPIO_OSPEEDR_OSPEED9_1 (0x2UL << GPIO_OSPEEDR_OSPEED9_Pos) /*!< 0x00080000 */
-#define GPIO_OSPEEDR_OSPEED10_Pos (20U)
-#define GPIO_OSPEEDR_OSPEED10_Msk (0x3UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00300000 */
-#define GPIO_OSPEEDR_OSPEED10 GPIO_OSPEEDR_OSPEED10_Msk
-#define GPIO_OSPEEDR_OSPEED10_0 (0x1UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00100000 */
-#define GPIO_OSPEEDR_OSPEED10_1 (0x2UL << GPIO_OSPEEDR_OSPEED10_Pos) /*!< 0x00200000 */
-#define GPIO_OSPEEDR_OSPEED11_Pos (22U)
-#define GPIO_OSPEEDR_OSPEED11_Msk (0x3UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00C00000 */
-#define GPIO_OSPEEDR_OSPEED11 GPIO_OSPEEDR_OSPEED11_Msk
-#define GPIO_OSPEEDR_OSPEED11_0 (0x1UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00400000 */
-#define GPIO_OSPEEDR_OSPEED11_1 (0x2UL << GPIO_OSPEEDR_OSPEED11_Pos) /*!< 0x00800000 */
-#define GPIO_OSPEEDR_OSPEED12_Pos (24U)
-#define GPIO_OSPEEDR_OSPEED12_Msk (0x3UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x03000000 */
-#define GPIO_OSPEEDR_OSPEED12 GPIO_OSPEEDR_OSPEED12_Msk
-#define GPIO_OSPEEDR_OSPEED12_0 (0x1UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x01000000 */
-#define GPIO_OSPEEDR_OSPEED12_1 (0x2UL << GPIO_OSPEEDR_OSPEED12_Pos) /*!< 0x02000000 */
-#define GPIO_OSPEEDR_OSPEED13_Pos (26U)
-#define GPIO_OSPEEDR_OSPEED13_Msk (0x3UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x0C000000 */
-#define GPIO_OSPEEDR_OSPEED13 GPIO_OSPEEDR_OSPEED13_Msk
-#define GPIO_OSPEEDR_OSPEED13_0 (0x1UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x04000000 */
-#define GPIO_OSPEEDR_OSPEED13_1 (0x2UL << GPIO_OSPEEDR_OSPEED13_Pos) /*!< 0x08000000 */
-#define GPIO_OSPEEDR_OSPEED14_Pos (28U)
-#define GPIO_OSPEEDR_OSPEED14_Msk (0x3UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x30000000 */
-#define GPIO_OSPEEDR_OSPEED14 GPIO_OSPEEDR_OSPEED14_Msk
-#define GPIO_OSPEEDR_OSPEED14_0 (0x1UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x10000000 */
-#define GPIO_OSPEEDR_OSPEED14_1 (0x2UL << GPIO_OSPEEDR_OSPEED14_Pos) /*!< 0x20000000 */
-#define GPIO_OSPEEDR_OSPEED15_Pos (30U)
-#define GPIO_OSPEEDR_OSPEED15_Msk (0x3UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0xC0000000 */
-#define GPIO_OSPEEDR_OSPEED15 GPIO_OSPEEDR_OSPEED15_Msk
-#define GPIO_OSPEEDR_OSPEED15_0 (0x1UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x40000000 */
-#define GPIO_OSPEEDR_OSPEED15_1 (0x2UL << GPIO_OSPEEDR_OSPEED15_Pos) /*!< 0x80000000 */
-
-/* Legacy defines */
-#define GPIO_OSPEEDER_OSPEEDR0 GPIO_OSPEEDR_OSPEED0
-#define GPIO_OSPEEDER_OSPEEDR0_0 GPIO_OSPEEDR_OSPEED0_0
-#define GPIO_OSPEEDER_OSPEEDR0_1 GPIO_OSPEEDR_OSPEED0_1
-#define GPIO_OSPEEDER_OSPEEDR1 GPIO_OSPEEDR_OSPEED1
-#define GPIO_OSPEEDER_OSPEEDR1_0 GPIO_OSPEEDR_OSPEED1_0
-#define GPIO_OSPEEDER_OSPEEDR1_1 GPIO_OSPEEDR_OSPEED1_1
-#define GPIO_OSPEEDER_OSPEEDR2 GPIO_OSPEEDR_OSPEED2
-#define GPIO_OSPEEDER_OSPEEDR2_0 GPIO_OSPEEDR_OSPEED2_0
-#define GPIO_OSPEEDER_OSPEEDR2_1 GPIO_OSPEEDR_OSPEED2_1
-#define GPIO_OSPEEDER_OSPEEDR3 GPIO_OSPEEDR_OSPEED3
-#define GPIO_OSPEEDER_OSPEEDR3_0 GPIO_OSPEEDR_OSPEED3_0
-#define GPIO_OSPEEDER_OSPEEDR3_1 GPIO_OSPEEDR_OSPEED3_1
-#define GPIO_OSPEEDER_OSPEEDR4 GPIO_OSPEEDR_OSPEED4
-#define GPIO_OSPEEDER_OSPEEDR4_0 GPIO_OSPEEDR_OSPEED4_0
-#define GPIO_OSPEEDER_OSPEEDR4_1 GPIO_OSPEEDR_OSPEED4_1
-#define GPIO_OSPEEDER_OSPEEDR5 GPIO_OSPEEDR_OSPEED5
-#define GPIO_OSPEEDER_OSPEEDR5_0 GPIO_OSPEEDR_OSPEED5_0
-#define GPIO_OSPEEDER_OSPEEDR5_1 GPIO_OSPEEDR_OSPEED5_1
-#define GPIO_OSPEEDER_OSPEEDR6 GPIO_OSPEEDR_OSPEED6
-#define GPIO_OSPEEDER_OSPEEDR6_0 GPIO_OSPEEDR_OSPEED6_0
-#define GPIO_OSPEEDER_OSPEEDR6_1 GPIO_OSPEEDR_OSPEED6_1
-#define GPIO_OSPEEDER_OSPEEDR7 GPIO_OSPEEDR_OSPEED7
-#define GPIO_OSPEEDER_OSPEEDR7_0 GPIO_OSPEEDR_OSPEED7_0
-#define GPIO_OSPEEDER_OSPEEDR7_1 GPIO_OSPEEDR_OSPEED7_1
-#define GPIO_OSPEEDER_OSPEEDR8 GPIO_OSPEEDR_OSPEED8
-#define GPIO_OSPEEDER_OSPEEDR8_0 GPIO_OSPEEDR_OSPEED8_0
-#define GPIO_OSPEEDER_OSPEEDR8_1 GPIO_OSPEEDR_OSPEED8_1
-#define GPIO_OSPEEDER_OSPEEDR9 GPIO_OSPEEDR_OSPEED9
-#define GPIO_OSPEEDER_OSPEEDR9_0 GPIO_OSPEEDR_OSPEED9_0
-#define GPIO_OSPEEDER_OSPEEDR9_1 GPIO_OSPEEDR_OSPEED9_1
-#define GPIO_OSPEEDER_OSPEEDR10 GPIO_OSPEEDR_OSPEED10
-#define GPIO_OSPEEDER_OSPEEDR10_0 GPIO_OSPEEDR_OSPEED10_0
-#define GPIO_OSPEEDER_OSPEEDR10_1 GPIO_OSPEEDR_OSPEED10_1
-#define GPIO_OSPEEDER_OSPEEDR11 GPIO_OSPEEDR_OSPEED11
-#define GPIO_OSPEEDER_OSPEEDR11_0 GPIO_OSPEEDR_OSPEED11_0
-#define GPIO_OSPEEDER_OSPEEDR11_1 GPIO_OSPEEDR_OSPEED11_1
-#define GPIO_OSPEEDER_OSPEEDR12 GPIO_OSPEEDR_OSPEED12
-#define GPIO_OSPEEDER_OSPEEDR12_0 GPIO_OSPEEDR_OSPEED12_0
-#define GPIO_OSPEEDER_OSPEEDR12_1 GPIO_OSPEEDR_OSPEED12_1
-#define GPIO_OSPEEDER_OSPEEDR13 GPIO_OSPEEDR_OSPEED13
-#define GPIO_OSPEEDER_OSPEEDR13_0 GPIO_OSPEEDR_OSPEED13_0
-#define GPIO_OSPEEDER_OSPEEDR13_1 GPIO_OSPEEDR_OSPEED13_1
-#define GPIO_OSPEEDER_OSPEEDR14 GPIO_OSPEEDR_OSPEED14
-#define GPIO_OSPEEDER_OSPEEDR14_0 GPIO_OSPEEDR_OSPEED14_0
-#define GPIO_OSPEEDER_OSPEEDR14_1 GPIO_OSPEEDR_OSPEED14_1
-#define GPIO_OSPEEDER_OSPEEDR15 GPIO_OSPEEDR_OSPEED15
-#define GPIO_OSPEEDER_OSPEEDR15_0 GPIO_OSPEEDR_OSPEED15_0
-#define GPIO_OSPEEDER_OSPEEDR15_1 GPIO_OSPEEDR_OSPEED15_1
-
-/****************** Bits definition for GPIO_PUPDR register *****************/
-#define GPIO_PUPDR_PUPD0_Pos (0U)
-#define GPIO_PUPDR_PUPD0_Msk (0x3UL << GPIO_PUPDR_PUPD0_Pos) /*!< 0x00000003 */
-#define GPIO_PUPDR_PUPD0 GPIO_PUPDR_PUPD0_Msk
-#define GPIO_PUPDR_PUPD0_0 (0x1UL << GPIO_PUPDR_PUPD0_Pos) /*!< 0x00000001 */
-#define GPIO_PUPDR_PUPD0_1 (0x2UL << GPIO_PUPDR_PUPD0_Pos) /*!< 0x00000002 */
-#define GPIO_PUPDR_PUPD1_Pos (2U)
-#define GPIO_PUPDR_PUPD1_Msk (0x3UL << GPIO_PUPDR_PUPD1_Pos) /*!< 0x0000000C */
-#define GPIO_PUPDR_PUPD1 GPIO_PUPDR_PUPD1_Msk
-#define GPIO_PUPDR_PUPD1_0 (0x1UL << GPIO_PUPDR_PUPD1_Pos) /*!< 0x00000004 */
-#define GPIO_PUPDR_PUPD1_1 (0x2UL << GPIO_PUPDR_PUPD1_Pos) /*!< 0x00000008 */
-#define GPIO_PUPDR_PUPD2_Pos (4U)
-#define GPIO_PUPDR_PUPD2_Msk (0x3UL << GPIO_PUPDR_PUPD2_Pos) /*!< 0x00000030 */
-#define GPIO_PUPDR_PUPD2 GPIO_PUPDR_PUPD2_Msk
-#define GPIO_PUPDR_PUPD2_0 (0x1UL << GPIO_PUPDR_PUPD2_Pos) /*!< 0x00000010 */
-#define GPIO_PUPDR_PUPD2_1 (0x2UL << GPIO_PUPDR_PUPD2_Pos) /*!< 0x00000020 */
-#define GPIO_PUPDR_PUPD3_Pos (6U)
-#define GPIO_PUPDR_PUPD3_Msk (0x3UL << GPIO_PUPDR_PUPD3_Pos) /*!< 0x000000C0 */
-#define GPIO_PUPDR_PUPD3 GPIO_PUPDR_PUPD3_Msk
-#define GPIO_PUPDR_PUPD3_0 (0x1UL << GPIO_PUPDR_PUPD3_Pos) /*!< 0x00000040 */
-#define GPIO_PUPDR_PUPD3_1 (0x2UL << GPIO_PUPDR_PUPD3_Pos) /*!< 0x00000080 */
-#define GPIO_PUPDR_PUPD4_Pos (8U)
-#define GPIO_PUPDR_PUPD4_Msk (0x3UL << GPIO_PUPDR_PUPD4_Pos) /*!< 0x00000300 */
-#define GPIO_PUPDR_PUPD4 GPIO_PUPDR_PUPD4_Msk
-#define GPIO_PUPDR_PUPD4_0 (0x1UL << GPIO_PUPDR_PUPD4_Pos) /*!< 0x00000100 */
-#define GPIO_PUPDR_PUPD4_1 (0x2UL << GPIO_PUPDR_PUPD4_Pos) /*!< 0x00000200 */
-#define GPIO_PUPDR_PUPD5_Pos (10U)
-#define GPIO_PUPDR_PUPD5_Msk (0x3UL << GPIO_PUPDR_PUPD5_Pos) /*!< 0x00000C00 */
-#define GPIO_PUPDR_PUPD5 GPIO_PUPDR_PUPD5_Msk
-#define GPIO_PUPDR_PUPD5_0 (0x1UL << GPIO_PUPDR_PUPD5_Pos) /*!< 0x00000400 */
-#define GPIO_PUPDR_PUPD5_1 (0x2UL << GPIO_PUPDR_PUPD5_Pos) /*!< 0x00000800 */
-#define GPIO_PUPDR_PUPD6_Pos (12U)
-#define GPIO_PUPDR_PUPD6_Msk (0x3UL << GPIO_PUPDR_PUPD6_Pos) /*!< 0x00003000 */
-#define GPIO_PUPDR_PUPD6 GPIO_PUPDR_PUPD6_Msk
-#define GPIO_PUPDR_PUPD6_0 (0x1UL << GPIO_PUPDR_PUPD6_Pos) /*!< 0x00001000 */
-#define GPIO_PUPDR_PUPD6_1 (0x2UL << GPIO_PUPDR_PUPD6_Pos) /*!< 0x00002000 */
-#define GPIO_PUPDR_PUPD7_Pos (14U)
-#define GPIO_PUPDR_PUPD7_Msk (0x3UL << GPIO_PUPDR_PUPD7_Pos) /*!< 0x0000C000 */
-#define GPIO_PUPDR_PUPD7 GPIO_PUPDR_PUPD7_Msk
-#define GPIO_PUPDR_PUPD7_0 (0x1UL << GPIO_PUPDR_PUPD7_Pos) /*!< 0x00004000 */
-#define GPIO_PUPDR_PUPD7_1 (0x2UL << GPIO_PUPDR_PUPD7_Pos) /*!< 0x00008000 */
-#define GPIO_PUPDR_PUPD8_Pos (16U)
-#define GPIO_PUPDR_PUPD8_Msk (0x3UL << GPIO_PUPDR_PUPD8_Pos) /*!< 0x00030000 */
-#define GPIO_PUPDR_PUPD8 GPIO_PUPDR_PUPD8_Msk
-#define GPIO_PUPDR_PUPD8_0 (0x1UL << GPIO_PUPDR_PUPD8_Pos) /*!< 0x00010000 */
-#define GPIO_PUPDR_PUPD8_1 (0x2UL << GPIO_PUPDR_PUPD8_Pos) /*!< 0x00020000 */
-#define GPIO_PUPDR_PUPD9_Pos (18U)
-#define GPIO_PUPDR_PUPD9_Msk (0x3UL << GPIO_PUPDR_PUPD9_Pos) /*!< 0x000C0000 */
-#define GPIO_PUPDR_PUPD9 GPIO_PUPDR_PUPD9_Msk
-#define GPIO_PUPDR_PUPD9_0 (0x1UL << GPIO_PUPDR_PUPD9_Pos) /*!< 0x00040000 */
-#define GPIO_PUPDR_PUPD9_1 (0x2UL << GPIO_PUPDR_PUPD9_Pos) /*!< 0x00080000 */
-#define GPIO_PUPDR_PUPD10_Pos (20U)
-#define GPIO_PUPDR_PUPD10_Msk (0x3UL << GPIO_PUPDR_PUPD10_Pos) /*!< 0x00300000 */
-#define GPIO_PUPDR_PUPD10 GPIO_PUPDR_PUPD10_Msk
-#define GPIO_PUPDR_PUPD10_0 (0x1UL << GPIO_PUPDR_PUPD10_Pos) /*!< 0x00100000 */
-#define GPIO_PUPDR_PUPD10_1 (0x2UL << GPIO_PUPDR_PUPD10_Pos) /*!< 0x00200000 */
-#define GPIO_PUPDR_PUPD11_Pos (22U)
-#define GPIO_PUPDR_PUPD11_Msk (0x3UL << GPIO_PUPDR_PUPD11_Pos) /*!< 0x00C00000 */
-#define GPIO_PUPDR_PUPD11 GPIO_PUPDR_PUPD11_Msk
-#define GPIO_PUPDR_PUPD11_0 (0x1UL << GPIO_PUPDR_PUPD11_Pos) /*!< 0x00400000 */
-#define GPIO_PUPDR_PUPD11_1 (0x2UL << GPIO_PUPDR_PUPD11_Pos) /*!< 0x00800000 */
-#define GPIO_PUPDR_PUPD12_Pos (24U)
-#define GPIO_PUPDR_PUPD12_Msk (0x3UL << GPIO_PUPDR_PUPD12_Pos) /*!< 0x03000000 */
-#define GPIO_PUPDR_PUPD12 GPIO_PUPDR_PUPD12_Msk
-#define GPIO_PUPDR_PUPD12_0 (0x1UL << GPIO_PUPDR_PUPD12_Pos) /*!< 0x01000000 */
-#define GPIO_PUPDR_PUPD12_1 (0x2UL << GPIO_PUPDR_PUPD12_Pos) /*!< 0x02000000 */
-#define GPIO_PUPDR_PUPD13_Pos (26U)
-#define GPIO_PUPDR_PUPD13_Msk (0x3UL << GPIO_PUPDR_PUPD13_Pos) /*!< 0x0C000000 */
-#define GPIO_PUPDR_PUPD13 GPIO_PUPDR_PUPD13_Msk
-#define GPIO_PUPDR_PUPD13_0 (0x1UL << GPIO_PUPDR_PUPD13_Pos) /*!< 0x04000000 */
-#define GPIO_PUPDR_PUPD13_1 (0x2UL << GPIO_PUPDR_PUPD13_Pos) /*!< 0x08000000 */
-#define GPIO_PUPDR_PUPD14_Pos (28U)
-#define GPIO_PUPDR_PUPD14_Msk (0x3UL << GPIO_PUPDR_PUPD14_Pos) /*!< 0x30000000 */
-#define GPIO_PUPDR_PUPD14 GPIO_PUPDR_PUPD14_Msk
-#define GPIO_PUPDR_PUPD14_0 (0x1UL << GPIO_PUPDR_PUPD14_Pos) /*!< 0x10000000 */
-#define GPIO_PUPDR_PUPD14_1 (0x2UL << GPIO_PUPDR_PUPD14_Pos) /*!< 0x20000000 */
-#define GPIO_PUPDR_PUPD15_Pos (30U)
-#define GPIO_PUPDR_PUPD15_Msk (0x3UL << GPIO_PUPDR_PUPD15_Pos) /*!< 0xC0000000 */
-#define GPIO_PUPDR_PUPD15 GPIO_PUPDR_PUPD15_Msk
-#define GPIO_PUPDR_PUPD15_0 (0x1UL << GPIO_PUPDR_PUPD15_Pos) /*!< 0x40000000 */
-#define GPIO_PUPDR_PUPD15_1 (0x2UL << GPIO_PUPDR_PUPD15_Pos) /*!< 0x80000000 */
-
-/* Legacy defines */
-#define GPIO_PUPDR_PUPDR0 GPIO_PUPDR_PUPD0
-#define GPIO_PUPDR_PUPDR0_0 GPIO_PUPDR_PUPD0_0
-#define GPIO_PUPDR_PUPDR0_1 GPIO_PUPDR_PUPD0_1
-#define GPIO_PUPDR_PUPDR1 GPIO_PUPDR_PUPD1
-#define GPIO_PUPDR_PUPDR1_0 GPIO_PUPDR_PUPD1_0
-#define GPIO_PUPDR_PUPDR1_1 GPIO_PUPDR_PUPD1_1
-#define GPIO_PUPDR_PUPDR2 GPIO_PUPDR_PUPD2
-#define GPIO_PUPDR_PUPDR2_0 GPIO_PUPDR_PUPD2_0
-#define GPIO_PUPDR_PUPDR2_1 GPIO_PUPDR_PUPD2_1
-#define GPIO_PUPDR_PUPDR3 GPIO_PUPDR_PUPD3
-#define GPIO_PUPDR_PUPDR3_0 GPIO_PUPDR_PUPD3_0
-#define GPIO_PUPDR_PUPDR3_1 GPIO_PUPDR_PUPD3_1
-#define GPIO_PUPDR_PUPDR4 GPIO_PUPDR_PUPD4
-#define GPIO_PUPDR_PUPDR4_0 GPIO_PUPDR_PUPD4_0
-#define GPIO_PUPDR_PUPDR4_1 GPIO_PUPDR_PUPD4_1
-#define GPIO_PUPDR_PUPDR5 GPIO_PUPDR_PUPD5
-#define GPIO_PUPDR_PUPDR5_0 GPIO_PUPDR_PUPD5_0
-#define GPIO_PUPDR_PUPDR5_1 GPIO_PUPDR_PUPD5_1
-#define GPIO_PUPDR_PUPDR6 GPIO_PUPDR_PUPD6
-#define GPIO_PUPDR_PUPDR6_0 GPIO_PUPDR_PUPD6_0
-#define GPIO_PUPDR_PUPDR6_1 GPIO_PUPDR_PUPD6_1
-#define GPIO_PUPDR_PUPDR7 GPIO_PUPDR_PUPD7
-#define GPIO_PUPDR_PUPDR7_0 GPIO_PUPDR_PUPD7_0
-#define GPIO_PUPDR_PUPDR7_1 GPIO_PUPDR_PUPD7_1
-#define GPIO_PUPDR_PUPDR8 GPIO_PUPDR_PUPD8
-#define GPIO_PUPDR_PUPDR8_0 GPIO_PUPDR_PUPD8_0
-#define GPIO_PUPDR_PUPDR8_1 GPIO_PUPDR_PUPD8_1
-#define GPIO_PUPDR_PUPDR9 GPIO_PUPDR_PUPD9
-#define GPIO_PUPDR_PUPDR9_0 GPIO_PUPDR_PUPD9_0
-#define GPIO_PUPDR_PUPDR9_1 GPIO_PUPDR_PUPD9_1
-#define GPIO_PUPDR_PUPDR10 GPIO_PUPDR_PUPD10
-#define GPIO_PUPDR_PUPDR10_0 GPIO_PUPDR_PUPD10_0
-#define GPIO_PUPDR_PUPDR10_1 GPIO_PUPDR_PUPD10_1
-#define GPIO_PUPDR_PUPDR11 GPIO_PUPDR_PUPD11
-#define GPIO_PUPDR_PUPDR11_0 GPIO_PUPDR_PUPD11_0
-#define GPIO_PUPDR_PUPDR11_1 GPIO_PUPDR_PUPD11_1
-#define GPIO_PUPDR_PUPDR12 GPIO_PUPDR_PUPD12
-#define GPIO_PUPDR_PUPDR12_0 GPIO_PUPDR_PUPD12_0
-#define GPIO_PUPDR_PUPDR12_1 GPIO_PUPDR_PUPD12_1
-#define GPIO_PUPDR_PUPDR13 GPIO_PUPDR_PUPD13
-#define GPIO_PUPDR_PUPDR13_0 GPIO_PUPDR_PUPD13_0
-#define GPIO_PUPDR_PUPDR13_1 GPIO_PUPDR_PUPD13_1
-#define GPIO_PUPDR_PUPDR14 GPIO_PUPDR_PUPD14
-#define GPIO_PUPDR_PUPDR14_0 GPIO_PUPDR_PUPD14_0
-#define GPIO_PUPDR_PUPDR14_1 GPIO_PUPDR_PUPD14_1
-#define GPIO_PUPDR_PUPDR15 GPIO_PUPDR_PUPD15
-#define GPIO_PUPDR_PUPDR15_0 GPIO_PUPDR_PUPD15_0
-#define GPIO_PUPDR_PUPDR15_1 GPIO_PUPDR_PUPD15_1
-
-/****************** Bits definition for GPIO_IDR register *******************/
-#define GPIO_IDR_ID0_Pos (0U)
-#define GPIO_IDR_ID0_Msk (0x1UL << GPIO_IDR_ID0_Pos) /*!< 0x00000001 */
-#define GPIO_IDR_ID0 GPIO_IDR_ID0_Msk
-#define GPIO_IDR_ID1_Pos (1U)
-#define GPIO_IDR_ID1_Msk (0x1UL << GPIO_IDR_ID1_Pos) /*!< 0x00000002 */
-#define GPIO_IDR_ID1 GPIO_IDR_ID1_Msk
-#define GPIO_IDR_ID2_Pos (2U)
-#define GPIO_IDR_ID2_Msk (0x1UL << GPIO_IDR_ID2_Pos) /*!< 0x00000004 */
-#define GPIO_IDR_ID2 GPIO_IDR_ID2_Msk
-#define GPIO_IDR_ID3_Pos (3U)
-#define GPIO_IDR_ID3_Msk (0x1UL << GPIO_IDR_ID3_Pos) /*!< 0x00000008 */
-#define GPIO_IDR_ID3 GPIO_IDR_ID3_Msk
-#define GPIO_IDR_ID4_Pos (4U)
-#define GPIO_IDR_ID4_Msk (0x1UL << GPIO_IDR_ID4_Pos) /*!< 0x00000010 */
-#define GPIO_IDR_ID4 GPIO_IDR_ID4_Msk
-#define GPIO_IDR_ID5_Pos (5U)
-#define GPIO_IDR_ID5_Msk (0x1UL << GPIO_IDR_ID5_Pos) /*!< 0x00000020 */
-#define GPIO_IDR_ID5 GPIO_IDR_ID5_Msk
-#define GPIO_IDR_ID6_Pos (6U)
-#define GPIO_IDR_ID6_Msk (0x1UL << GPIO_IDR_ID6_Pos) /*!< 0x00000040 */
-#define GPIO_IDR_ID6 GPIO_IDR_ID6_Msk
-#define GPIO_IDR_ID7_Pos (7U)
-#define GPIO_IDR_ID7_Msk (0x1UL << GPIO_IDR_ID7_Pos) /*!< 0x00000080 */
-#define GPIO_IDR_ID7 GPIO_IDR_ID7_Msk
-#define GPIO_IDR_ID8_Pos (8U)
-#define GPIO_IDR_ID8_Msk (0x1UL << GPIO_IDR_ID8_Pos) /*!< 0x00000100 */
-#define GPIO_IDR_ID8 GPIO_IDR_ID8_Msk
-#define GPIO_IDR_ID9_Pos (9U)
-#define GPIO_IDR_ID9_Msk (0x1UL << GPIO_IDR_ID9_Pos) /*!< 0x00000200 */
-#define GPIO_IDR_ID9 GPIO_IDR_ID9_Msk
-#define GPIO_IDR_ID10_Pos (10U)
-#define GPIO_IDR_ID10_Msk (0x1UL << GPIO_IDR_ID10_Pos) /*!< 0x00000400 */
-#define GPIO_IDR_ID10 GPIO_IDR_ID10_Msk
-#define GPIO_IDR_ID11_Pos (11U)
-#define GPIO_IDR_ID11_Msk (0x1UL << GPIO_IDR_ID11_Pos) /*!< 0x00000800 */
-#define GPIO_IDR_ID11 GPIO_IDR_ID11_Msk
-#define GPIO_IDR_ID12_Pos (12U)
-#define GPIO_IDR_ID12_Msk (0x1UL << GPIO_IDR_ID12_Pos) /*!< 0x00001000 */
-#define GPIO_IDR_ID12 GPIO_IDR_ID12_Msk
-#define GPIO_IDR_ID13_Pos (13U)
-#define GPIO_IDR_ID13_Msk (0x1UL << GPIO_IDR_ID13_Pos) /*!< 0x00002000 */
-#define GPIO_IDR_ID13 GPIO_IDR_ID13_Msk
-#define GPIO_IDR_ID14_Pos (14U)
-#define GPIO_IDR_ID14_Msk (0x1UL << GPIO_IDR_ID14_Pos) /*!< 0x00004000 */
-#define GPIO_IDR_ID14 GPIO_IDR_ID14_Msk
-#define GPIO_IDR_ID15_Pos (15U)
-#define GPIO_IDR_ID15_Msk (0x1UL << GPIO_IDR_ID15_Pos) /*!< 0x00008000 */
-#define GPIO_IDR_ID15 GPIO_IDR_ID15_Msk
-
-/* Legacy defines */
-#define GPIO_IDR_IDR_0 GPIO_IDR_ID0
-#define GPIO_IDR_IDR_1 GPIO_IDR_ID1
-#define GPIO_IDR_IDR_2 GPIO_IDR_ID2
-#define GPIO_IDR_IDR_3 GPIO_IDR_ID3
-#define GPIO_IDR_IDR_4 GPIO_IDR_ID4
-#define GPIO_IDR_IDR_5 GPIO_IDR_ID5
-#define GPIO_IDR_IDR_6 GPIO_IDR_ID6
-#define GPIO_IDR_IDR_7 GPIO_IDR_ID7
-#define GPIO_IDR_IDR_8 GPIO_IDR_ID8
-#define GPIO_IDR_IDR_9 GPIO_IDR_ID9
-#define GPIO_IDR_IDR_10 GPIO_IDR_ID10
-#define GPIO_IDR_IDR_11 GPIO_IDR_ID11
-#define GPIO_IDR_IDR_12 GPIO_IDR_ID12
-#define GPIO_IDR_IDR_13 GPIO_IDR_ID13
-#define GPIO_IDR_IDR_14 GPIO_IDR_ID14
-#define GPIO_IDR_IDR_15 GPIO_IDR_ID15
-
-/****************** Bits definition for GPIO_ODR register *******************/
-#define GPIO_ODR_OD0_Pos (0U)
-#define GPIO_ODR_OD0_Msk (0x1UL << GPIO_ODR_OD0_Pos) /*!< 0x00000001 */
-#define GPIO_ODR_OD0 GPIO_ODR_OD0_Msk
-#define GPIO_ODR_OD1_Pos (1U)
-#define GPIO_ODR_OD1_Msk (0x1UL << GPIO_ODR_OD1_Pos) /*!< 0x00000002 */
-#define GPIO_ODR_OD1 GPIO_ODR_OD1_Msk
-#define GPIO_ODR_OD2_Pos (2U)
-#define GPIO_ODR_OD2_Msk (0x1UL << GPIO_ODR_OD2_Pos) /*!< 0x00000004 */
-#define GPIO_ODR_OD2 GPIO_ODR_OD2_Msk
-#define GPIO_ODR_OD3_Pos (3U)
-#define GPIO_ODR_OD3_Msk (0x1UL << GPIO_ODR_OD3_Pos) /*!< 0x00000008 */
-#define GPIO_ODR_OD3 GPIO_ODR_OD3_Msk
-#define GPIO_ODR_OD4_Pos (4U)
-#define GPIO_ODR_OD4_Msk (0x1UL << GPIO_ODR_OD4_Pos) /*!< 0x00000010 */
-#define GPIO_ODR_OD4 GPIO_ODR_OD4_Msk
-#define GPIO_ODR_OD5_Pos (5U)
-#define GPIO_ODR_OD5_Msk (0x1UL << GPIO_ODR_OD5_Pos) /*!< 0x00000020 */
-#define GPIO_ODR_OD5 GPIO_ODR_OD5_Msk
-#define GPIO_ODR_OD6_Pos (6U)
-#define GPIO_ODR_OD6_Msk (0x1UL << GPIO_ODR_OD6_Pos) /*!< 0x00000040 */
-#define GPIO_ODR_OD6 GPIO_ODR_OD6_Msk
-#define GPIO_ODR_OD7_Pos (7U)
-#define GPIO_ODR_OD7_Msk (0x1UL << GPIO_ODR_OD7_Pos) /*!< 0x00000080 */
-#define GPIO_ODR_OD7 GPIO_ODR_OD7_Msk
-#define GPIO_ODR_OD8_Pos (8U)
-#define GPIO_ODR_OD8_Msk (0x1UL << GPIO_ODR_OD8_Pos) /*!< 0x00000100 */
-#define GPIO_ODR_OD8 GPIO_ODR_OD8_Msk
-#define GPIO_ODR_OD9_Pos (9U)
-#define GPIO_ODR_OD9_Msk (0x1UL << GPIO_ODR_OD9_Pos) /*!< 0x00000200 */
-#define GPIO_ODR_OD9 GPIO_ODR_OD9_Msk
-#define GPIO_ODR_OD10_Pos (10U)
-#define GPIO_ODR_OD10_Msk (0x1UL << GPIO_ODR_OD10_Pos) /*!< 0x00000400 */
-#define GPIO_ODR_OD10 GPIO_ODR_OD10_Msk
-#define GPIO_ODR_OD11_Pos (11U)
-#define GPIO_ODR_OD11_Msk (0x1UL << GPIO_ODR_OD11_Pos) /*!< 0x00000800 */
-#define GPIO_ODR_OD11 GPIO_ODR_OD11_Msk
-#define GPIO_ODR_OD12_Pos (12U)
-#define GPIO_ODR_OD12_Msk (0x1UL << GPIO_ODR_OD12_Pos) /*!< 0x00001000 */
-#define GPIO_ODR_OD12 GPIO_ODR_OD12_Msk
-#define GPIO_ODR_OD13_Pos (13U)
-#define GPIO_ODR_OD13_Msk (0x1UL << GPIO_ODR_OD13_Pos) /*!< 0x00002000 */
-#define GPIO_ODR_OD13 GPIO_ODR_OD13_Msk
-#define GPIO_ODR_OD14_Pos (14U)
-#define GPIO_ODR_OD14_Msk (0x1UL << GPIO_ODR_OD14_Pos) /*!< 0x00004000 */
-#define GPIO_ODR_OD14 GPIO_ODR_OD14_Msk
-#define GPIO_ODR_OD15_Pos (15U)
-#define GPIO_ODR_OD15_Msk (0x1UL << GPIO_ODR_OD15_Pos) /*!< 0x00008000 */
-#define GPIO_ODR_OD15 GPIO_ODR_OD15_Msk
-/* Legacy defines */
-#define GPIO_ODR_ODR_0 GPIO_ODR_OD0
-#define GPIO_ODR_ODR_1 GPIO_ODR_OD1
-#define GPIO_ODR_ODR_2 GPIO_ODR_OD2
-#define GPIO_ODR_ODR_3 GPIO_ODR_OD3
-#define GPIO_ODR_ODR_4 GPIO_ODR_OD4
-#define GPIO_ODR_ODR_5 GPIO_ODR_OD5
-#define GPIO_ODR_ODR_6 GPIO_ODR_OD6
-#define GPIO_ODR_ODR_7 GPIO_ODR_OD7
-#define GPIO_ODR_ODR_8 GPIO_ODR_OD8
-#define GPIO_ODR_ODR_9 GPIO_ODR_OD9
-#define GPIO_ODR_ODR_10 GPIO_ODR_OD10
-#define GPIO_ODR_ODR_11 GPIO_ODR_OD11
-#define GPIO_ODR_ODR_12 GPIO_ODR_OD12
-#define GPIO_ODR_ODR_13 GPIO_ODR_OD13
-#define GPIO_ODR_ODR_14 GPIO_ODR_OD14
-#define GPIO_ODR_ODR_15 GPIO_ODR_OD15
-
-/****************** Bits definition for GPIO_BSRR register ******************/
-#define GPIO_BSRR_BS0_Pos (0U)
-#define GPIO_BSRR_BS0_Msk (0x1UL << GPIO_BSRR_BS0_Pos) /*!< 0x00000001 */
-#define GPIO_BSRR_BS0 GPIO_BSRR_BS0_Msk
-#define GPIO_BSRR_BS1_Pos (1U)
-#define GPIO_BSRR_BS1_Msk (0x1UL << GPIO_BSRR_BS1_Pos) /*!< 0x00000002 */
-#define GPIO_BSRR_BS1 GPIO_BSRR_BS1_Msk
-#define GPIO_BSRR_BS2_Pos (2U)
-#define GPIO_BSRR_BS2_Msk (0x1UL << GPIO_BSRR_BS2_Pos) /*!< 0x00000004 */
-#define GPIO_BSRR_BS2 GPIO_BSRR_BS2_Msk
-#define GPIO_BSRR_BS3_Pos (3U)
-#define GPIO_BSRR_BS3_Msk (0x1UL << GPIO_BSRR_BS3_Pos) /*!< 0x00000008 */
-#define GPIO_BSRR_BS3 GPIO_BSRR_BS3_Msk
-#define GPIO_BSRR_BS4_Pos (4U)
-#define GPIO_BSRR_BS4_Msk (0x1UL << GPIO_BSRR_BS4_Pos) /*!< 0x00000010 */
-#define GPIO_BSRR_BS4 GPIO_BSRR_BS4_Msk
-#define GPIO_BSRR_BS5_Pos (5U)
-#define GPIO_BSRR_BS5_Msk (0x1UL << GPIO_BSRR_BS5_Pos) /*!< 0x00000020 */
-#define GPIO_BSRR_BS5 GPIO_BSRR_BS5_Msk
-#define GPIO_BSRR_BS6_Pos (6U)
-#define GPIO_BSRR_BS6_Msk (0x1UL << GPIO_BSRR_BS6_Pos) /*!< 0x00000040 */
-#define GPIO_BSRR_BS6 GPIO_BSRR_BS6_Msk
-#define GPIO_BSRR_BS7_Pos (7U)
-#define GPIO_BSRR_BS7_Msk (0x1UL << GPIO_BSRR_BS7_Pos) /*!< 0x00000080 */
-#define GPIO_BSRR_BS7 GPIO_BSRR_BS7_Msk
-#define GPIO_BSRR_BS8_Pos (8U)
-#define GPIO_BSRR_BS8_Msk (0x1UL << GPIO_BSRR_BS8_Pos) /*!< 0x00000100 */
-#define GPIO_BSRR_BS8 GPIO_BSRR_BS8_Msk
-#define GPIO_BSRR_BS9_Pos (9U)
-#define GPIO_BSRR_BS9_Msk (0x1UL << GPIO_BSRR_BS9_Pos) /*!< 0x00000200 */
-#define GPIO_BSRR_BS9 GPIO_BSRR_BS9_Msk
-#define GPIO_BSRR_BS10_Pos (10U)
-#define GPIO_BSRR_BS10_Msk (0x1UL << GPIO_BSRR_BS10_Pos) /*!< 0x00000400 */
-#define GPIO_BSRR_BS10 GPIO_BSRR_BS10_Msk
-#define GPIO_BSRR_BS11_Pos (11U)
-#define GPIO_BSRR_BS11_Msk (0x1UL << GPIO_BSRR_BS11_Pos) /*!< 0x00000800 */
-#define GPIO_BSRR_BS11 GPIO_BSRR_BS11_Msk
-#define GPIO_BSRR_BS12_Pos (12U)
-#define GPIO_BSRR_BS12_Msk (0x1UL << GPIO_BSRR_BS12_Pos) /*!< 0x00001000 */
-#define GPIO_BSRR_BS12 GPIO_BSRR_BS12_Msk
-#define GPIO_BSRR_BS13_Pos (13U)
-#define GPIO_BSRR_BS13_Msk (0x1UL << GPIO_BSRR_BS13_Pos) /*!< 0x00002000 */
-#define GPIO_BSRR_BS13 GPIO_BSRR_BS13_Msk
-#define GPIO_BSRR_BS14_Pos (14U)
-#define GPIO_BSRR_BS14_Msk (0x1UL << GPIO_BSRR_BS14_Pos) /*!< 0x00004000 */
-#define GPIO_BSRR_BS14 GPIO_BSRR_BS14_Msk
-#define GPIO_BSRR_BS15_Pos (15U)
-#define GPIO_BSRR_BS15_Msk (0x1UL << GPIO_BSRR_BS15_Pos) /*!< 0x00008000 */
-#define GPIO_BSRR_BS15 GPIO_BSRR_BS15_Msk
-#define GPIO_BSRR_BR0_Pos (16U)
-#define GPIO_BSRR_BR0_Msk (0x1UL << GPIO_BSRR_BR0_Pos) /*!< 0x00010000 */
-#define GPIO_BSRR_BR0 GPIO_BSRR_BR0_Msk
-#define GPIO_BSRR_BR1_Pos (17U)
-#define GPIO_BSRR_BR1_Msk (0x1UL << GPIO_BSRR_BR1_Pos) /*!< 0x00020000 */
-#define GPIO_BSRR_BR1 GPIO_BSRR_BR1_Msk
-#define GPIO_BSRR_BR2_Pos (18U)
-#define GPIO_BSRR_BR2_Msk (0x1UL << GPIO_BSRR_BR2_Pos) /*!< 0x00040000 */
-#define GPIO_BSRR_BR2 GPIO_BSRR_BR2_Msk
-#define GPIO_BSRR_BR3_Pos (19U)
-#define GPIO_BSRR_BR3_Msk (0x1UL << GPIO_BSRR_BR3_Pos) /*!< 0x00080000 */
-#define GPIO_BSRR_BR3 GPIO_BSRR_BR3_Msk
-#define GPIO_BSRR_BR4_Pos (20U)
-#define GPIO_BSRR_BR4_Msk (0x1UL << GPIO_BSRR_BR4_Pos) /*!< 0x00100000 */
-#define GPIO_BSRR_BR4 GPIO_BSRR_BR4_Msk
-#define GPIO_BSRR_BR5_Pos (21U)
-#define GPIO_BSRR_BR5_Msk (0x1UL << GPIO_BSRR_BR5_Pos) /*!< 0x00200000 */
-#define GPIO_BSRR_BR5 GPIO_BSRR_BR5_Msk
-#define GPIO_BSRR_BR6_Pos (22U)
-#define GPIO_BSRR_BR6_Msk (0x1UL << GPIO_BSRR_BR6_Pos) /*!< 0x00400000 */
-#define GPIO_BSRR_BR6 GPIO_BSRR_BR6_Msk
-#define GPIO_BSRR_BR7_Pos (23U)
-#define GPIO_BSRR_BR7_Msk (0x1UL << GPIO_BSRR_BR7_Pos) /*!< 0x00800000 */
-#define GPIO_BSRR_BR7 GPIO_BSRR_BR7_Msk
-#define GPIO_BSRR_BR8_Pos (24U)
-#define GPIO_BSRR_BR8_Msk (0x1UL << GPIO_BSRR_BR8_Pos) /*!< 0x01000000 */
-#define GPIO_BSRR_BR8 GPIO_BSRR_BR8_Msk
-#define GPIO_BSRR_BR9_Pos (25U)
-#define GPIO_BSRR_BR9_Msk (0x1UL << GPIO_BSRR_BR9_Pos) /*!< 0x02000000 */
-#define GPIO_BSRR_BR9 GPIO_BSRR_BR9_Msk
-#define GPIO_BSRR_BR10_Pos (26U)
-#define GPIO_BSRR_BR10_Msk (0x1UL << GPIO_BSRR_BR10_Pos) /*!< 0x04000000 */
-#define GPIO_BSRR_BR10 GPIO_BSRR_BR10_Msk
-#define GPIO_BSRR_BR11_Pos (27U)
-#define GPIO_BSRR_BR11_Msk (0x1UL << GPIO_BSRR_BR11_Pos) /*!< 0x08000000 */
-#define GPIO_BSRR_BR11 GPIO_BSRR_BR11_Msk
-#define GPIO_BSRR_BR12_Pos (28U)
-#define GPIO_BSRR_BR12_Msk (0x1UL << GPIO_BSRR_BR12_Pos) /*!< 0x10000000 */
-#define GPIO_BSRR_BR12 GPIO_BSRR_BR12_Msk
-#define GPIO_BSRR_BR13_Pos (29U)
-#define GPIO_BSRR_BR13_Msk (0x1UL << GPIO_BSRR_BR13_Pos) /*!< 0x20000000 */
-#define GPIO_BSRR_BR13 GPIO_BSRR_BR13_Msk
-#define GPIO_BSRR_BR14_Pos (30U)
-#define GPIO_BSRR_BR14_Msk (0x1UL << GPIO_BSRR_BR14_Pos) /*!< 0x40000000 */
-#define GPIO_BSRR_BR14 GPIO_BSRR_BR14_Msk
-#define GPIO_BSRR_BR15_Pos (31U)
-#define GPIO_BSRR_BR15_Msk (0x1UL << GPIO_BSRR_BR15_Pos) /*!< 0x80000000 */
-#define GPIO_BSRR_BR15 GPIO_BSRR_BR15_Msk
-
-/* Legacy defines */
-#define GPIO_BSRR_BS_0 GPIO_BSRR_BS0
-#define GPIO_BSRR_BS_1 GPIO_BSRR_BS1
-#define GPIO_BSRR_BS_2 GPIO_BSRR_BS2
-#define GPIO_BSRR_BS_3 GPIO_BSRR_BS3
-#define GPIO_BSRR_BS_4 GPIO_BSRR_BS4
-#define GPIO_BSRR_BS_5 GPIO_BSRR_BS5
-#define GPIO_BSRR_BS_6 GPIO_BSRR_BS6
-#define GPIO_BSRR_BS_7 GPIO_BSRR_BS7
-#define GPIO_BSRR_BS_8 GPIO_BSRR_BS8
-#define GPIO_BSRR_BS_9 GPIO_BSRR_BS9
-#define GPIO_BSRR_BS_10 GPIO_BSRR_BS10
-#define GPIO_BSRR_BS_11 GPIO_BSRR_BS11
-#define GPIO_BSRR_BS_12 GPIO_BSRR_BS12
-#define GPIO_BSRR_BS_13 GPIO_BSRR_BS13
-#define GPIO_BSRR_BS_14 GPIO_BSRR_BS14
-#define GPIO_BSRR_BS_15 GPIO_BSRR_BS15
-#define GPIO_BSRR_BR_0 GPIO_BSRR_BR0
-#define GPIO_BSRR_BR_1 GPIO_BSRR_BR1
-#define GPIO_BSRR_BR_2 GPIO_BSRR_BR2
-#define GPIO_BSRR_BR_3 GPIO_BSRR_BR3
-#define GPIO_BSRR_BR_4 GPIO_BSRR_BR4
-#define GPIO_BSRR_BR_5 GPIO_BSRR_BR5
-#define GPIO_BSRR_BR_6 GPIO_BSRR_BR6
-#define GPIO_BSRR_BR_7 GPIO_BSRR_BR7
-#define GPIO_BSRR_BR_8 GPIO_BSRR_BR8
-#define GPIO_BSRR_BR_9 GPIO_BSRR_BR9
-#define GPIO_BSRR_BR_10 GPIO_BSRR_BR10
-#define GPIO_BSRR_BR_11 GPIO_BSRR_BR11
-#define GPIO_BSRR_BR_12 GPIO_BSRR_BR12
-#define GPIO_BSRR_BR_13 GPIO_BSRR_BR13
-#define GPIO_BSRR_BR_14 GPIO_BSRR_BR14
-#define GPIO_BSRR_BR_15 GPIO_BSRR_BR15
-#define GPIO_BRR_BR0 GPIO_BSRR_BR0
-#define GPIO_BRR_BR0_Pos GPIO_BSRR_BR0_Pos
-#define GPIO_BRR_BR0_Msk GPIO_BSRR_BR0_Msk
-#define GPIO_BRR_BR1 GPIO_BSRR_BR1
-#define GPIO_BRR_BR1_Pos GPIO_BSRR_BR1_Pos
-#define GPIO_BRR_BR1_Msk GPIO_BSRR_BR1_Msk
-#define GPIO_BRR_BR2 GPIO_BSRR_BR2
-#define GPIO_BRR_BR2_Pos GPIO_BSRR_BR2_Pos
-#define GPIO_BRR_BR2_Msk GPIO_BSRR_BR2_Msk
-#define GPIO_BRR_BR3 GPIO_BSRR_BR3
-#define GPIO_BRR_BR3_Pos GPIO_BSRR_BR3_Pos
-#define GPIO_BRR_BR3_Msk GPIO_BSRR_BR3_Msk
-#define GPIO_BRR_BR4 GPIO_BSRR_BR4
-#define GPIO_BRR_BR4_Pos GPIO_BSRR_BR4_Pos
-#define GPIO_BRR_BR4_Msk GPIO_BSRR_BR4_Msk
-#define GPIO_BRR_BR5 GPIO_BSRR_BR5
-#define GPIO_BRR_BR5_Pos GPIO_BSRR_BR5_Pos
-#define GPIO_BRR_BR5_Msk GPIO_BSRR_BR5_Msk
-#define GPIO_BRR_BR6 GPIO_BSRR_BR6
-#define GPIO_BRR_BR6_Pos GPIO_BSRR_BR6_Pos
-#define GPIO_BRR_BR6_Msk GPIO_BSRR_BR6_Msk
-#define GPIO_BRR_BR7 GPIO_BSRR_BR7
-#define GPIO_BRR_BR7_Pos GPIO_BSRR_BR7_Pos
-#define GPIO_BRR_BR7_Msk GPIO_BSRR_BR7_Msk
-#define GPIO_BRR_BR8 GPIO_BSRR_BR8
-#define GPIO_BRR_BR8_Pos GPIO_BSRR_BR8_Pos
-#define GPIO_BRR_BR8_Msk GPIO_BSRR_BR8_Msk
-#define GPIO_BRR_BR9 GPIO_BSRR_BR9
-#define GPIO_BRR_BR9_Pos GPIO_BSRR_BR9_Pos
-#define GPIO_BRR_BR9_Msk GPIO_BSRR_BR9_Msk
-#define GPIO_BRR_BR10 GPIO_BSRR_BR10
-#define GPIO_BRR_BR10_Pos GPIO_BSRR_BR10_Pos
-#define GPIO_BRR_BR10_Msk GPIO_BSRR_BR10_Msk
-#define GPIO_BRR_BR11 GPIO_BSRR_BR11
-#define GPIO_BRR_BR11_Pos GPIO_BSRR_BR11_Pos
-#define GPIO_BRR_BR11_Msk GPIO_BSRR_BR11_Msk
-#define GPIO_BRR_BR12 GPIO_BSRR_BR12
-#define GPIO_BRR_BR12_Pos GPIO_BSRR_BR12_Pos
-#define GPIO_BRR_BR12_Msk GPIO_BSRR_BR12_Msk
-#define GPIO_BRR_BR13 GPIO_BSRR_BR13
-#define GPIO_BRR_BR13_Pos GPIO_BSRR_BR13_Pos
-#define GPIO_BRR_BR13_Msk GPIO_BSRR_BR13_Msk
-#define GPIO_BRR_BR14 GPIO_BSRR_BR14
-#define GPIO_BRR_BR14_Pos GPIO_BSRR_BR14_Pos
-#define GPIO_BRR_BR14_Msk GPIO_BSRR_BR14_Msk
-#define GPIO_BRR_BR15 GPIO_BSRR_BR15
-#define GPIO_BRR_BR15_Pos GPIO_BSRR_BR15_Pos
-#define GPIO_BRR_BR15_Msk GPIO_BSRR_BR15_Msk
-/****************** Bit definition for GPIO_LCKR register *********************/
-#define GPIO_LCKR_LCK0_Pos (0U)
-#define GPIO_LCKR_LCK0_Msk (0x1UL << GPIO_LCKR_LCK0_Pos) /*!< 0x00000001 */
-#define GPIO_LCKR_LCK0 GPIO_LCKR_LCK0_Msk
-#define GPIO_LCKR_LCK1_Pos (1U)
-#define GPIO_LCKR_LCK1_Msk (0x1UL << GPIO_LCKR_LCK1_Pos) /*!< 0x00000002 */
-#define GPIO_LCKR_LCK1 GPIO_LCKR_LCK1_Msk
-#define GPIO_LCKR_LCK2_Pos (2U)
-#define GPIO_LCKR_LCK2_Msk (0x1UL << GPIO_LCKR_LCK2_Pos) /*!< 0x00000004 */
-#define GPIO_LCKR_LCK2 GPIO_LCKR_LCK2_Msk
-#define GPIO_LCKR_LCK3_Pos (3U)
-#define GPIO_LCKR_LCK3_Msk (0x1UL << GPIO_LCKR_LCK3_Pos) /*!< 0x00000008 */
-#define GPIO_LCKR_LCK3 GPIO_LCKR_LCK3_Msk
-#define GPIO_LCKR_LCK4_Pos (4U)
-#define GPIO_LCKR_LCK4_Msk (0x1UL << GPIO_LCKR_LCK4_Pos) /*!< 0x00000010 */
-#define GPIO_LCKR_LCK4 GPIO_LCKR_LCK4_Msk
-#define GPIO_LCKR_LCK5_Pos (5U)
-#define GPIO_LCKR_LCK5_Msk (0x1UL << GPIO_LCKR_LCK5_Pos) /*!< 0x00000020 */
-#define GPIO_LCKR_LCK5 GPIO_LCKR_LCK5_Msk
-#define GPIO_LCKR_LCK6_Pos (6U)
-#define GPIO_LCKR_LCK6_Msk (0x1UL << GPIO_LCKR_LCK6_Pos) /*!< 0x00000040 */
-#define GPIO_LCKR_LCK6 GPIO_LCKR_LCK6_Msk
-#define GPIO_LCKR_LCK7_Pos (7U)
-#define GPIO_LCKR_LCK7_Msk (0x1UL << GPIO_LCKR_LCK7_Pos) /*!< 0x00000080 */
-#define GPIO_LCKR_LCK7 GPIO_LCKR_LCK7_Msk
-#define GPIO_LCKR_LCK8_Pos (8U)
-#define GPIO_LCKR_LCK8_Msk (0x1UL << GPIO_LCKR_LCK8_Pos) /*!< 0x00000100 */
-#define GPIO_LCKR_LCK8 GPIO_LCKR_LCK8_Msk
-#define GPIO_LCKR_LCK9_Pos (9U)
-#define GPIO_LCKR_LCK9_Msk (0x1UL << GPIO_LCKR_LCK9_Pos) /*!< 0x00000200 */
-#define GPIO_LCKR_LCK9 GPIO_LCKR_LCK9_Msk
-#define GPIO_LCKR_LCK10_Pos (10U)
-#define GPIO_LCKR_LCK10_Msk (0x1UL << GPIO_LCKR_LCK10_Pos) /*!< 0x00000400 */
-#define GPIO_LCKR_LCK10 GPIO_LCKR_LCK10_Msk
-#define GPIO_LCKR_LCK11_Pos (11U)
-#define GPIO_LCKR_LCK11_Msk (0x1UL << GPIO_LCKR_LCK11_Pos) /*!< 0x00000800 */
-#define GPIO_LCKR_LCK11 GPIO_LCKR_LCK11_Msk
-#define GPIO_LCKR_LCK12_Pos (12U)
-#define GPIO_LCKR_LCK12_Msk (0x1UL << GPIO_LCKR_LCK12_Pos) /*!< 0x00001000 */
-#define GPIO_LCKR_LCK12 GPIO_LCKR_LCK12_Msk
-#define GPIO_LCKR_LCK13_Pos (13U)
-#define GPIO_LCKR_LCK13_Msk (0x1UL << GPIO_LCKR_LCK13_Pos) /*!< 0x00002000 */
-#define GPIO_LCKR_LCK13 GPIO_LCKR_LCK13_Msk
-#define GPIO_LCKR_LCK14_Pos (14U)
-#define GPIO_LCKR_LCK14_Msk (0x1UL << GPIO_LCKR_LCK14_Pos) /*!< 0x00004000 */
-#define GPIO_LCKR_LCK14 GPIO_LCKR_LCK14_Msk
-#define GPIO_LCKR_LCK15_Pos (15U)
-#define GPIO_LCKR_LCK15_Msk (0x1UL << GPIO_LCKR_LCK15_Pos) /*!< 0x00008000 */
-#define GPIO_LCKR_LCK15 GPIO_LCKR_LCK15_Msk
-#define GPIO_LCKR_LCKK_Pos (16U)
-#define GPIO_LCKR_LCKK_Msk (0x1UL << GPIO_LCKR_LCKK_Pos) /*!< 0x00010000 */
-#define GPIO_LCKR_LCKK GPIO_LCKR_LCKK_Msk
-/****************** Bit definition for GPIO_AFRL register *********************/
-#define GPIO_AFRL_AFSEL0_Pos (0U)
-#define GPIO_AFRL_AFSEL0_Msk (0xFUL << GPIO_AFRL_AFSEL0_Pos) /*!< 0x0000000F */
-#define GPIO_AFRL_AFSEL0 GPIO_AFRL_AFSEL0_Msk
-#define GPIO_AFRL_AFSEL0_0 (0x1UL << GPIO_AFRL_AFSEL0_Pos) /*!< 0x00000001 */
-#define GPIO_AFRL_AFSEL0_1 (0x2UL << GPIO_AFRL_AFSEL0_Pos) /*!< 0x00000002 */
-#define GPIO_AFRL_AFSEL0_2 (0x4UL << GPIO_AFRL_AFSEL0_Pos) /*!< 0x00000004 */
-#define GPIO_AFRL_AFSEL0_3 (0x8UL << GPIO_AFRL_AFSEL0_Pos) /*!< 0x00000008 */
-#define GPIO_AFRL_AFSEL1_Pos (4U)
-#define GPIO_AFRL_AFSEL1_Msk (0xFUL << GPIO_AFRL_AFSEL1_Pos) /*!< 0x000000F0 */
-#define GPIO_AFRL_AFSEL1 GPIO_AFRL_AFSEL1_Msk
-#define GPIO_AFRL_AFSEL1_0 (0x1UL << GPIO_AFRL_AFSEL1_Pos) /*!< 0x00000010 */
-#define GPIO_AFRL_AFSEL1_1 (0x2UL << GPIO_AFRL_AFSEL1_Pos) /*!< 0x00000020 */
-#define GPIO_AFRL_AFSEL1_2 (0x4UL << GPIO_AFRL_AFSEL1_Pos) /*!< 0x00000040 */
-#define GPIO_AFRL_AFSEL1_3 (0x8UL << GPIO_AFRL_AFSEL1_Pos) /*!< 0x00000080 */
-#define GPIO_AFRL_AFSEL2_Pos (8U)
-#define GPIO_AFRL_AFSEL2_Msk (0xFUL << GPIO_AFRL_AFSEL2_Pos) /*!< 0x00000F00 */
-#define GPIO_AFRL_AFSEL2 GPIO_AFRL_AFSEL2_Msk
-#define GPIO_AFRL_AFSEL2_0 (0x1UL << GPIO_AFRL_AFSEL2_Pos) /*!< 0x00000100 */
-#define GPIO_AFRL_AFSEL2_1 (0x2UL << GPIO_AFRL_AFSEL2_Pos) /*!< 0x00000200 */
-#define GPIO_AFRL_AFSEL2_2 (0x4UL << GPIO_AFRL_AFSEL2_Pos) /*!< 0x00000400 */
-#define GPIO_AFRL_AFSEL2_3 (0x8UL << GPIO_AFRL_AFSEL2_Pos) /*!< 0x00000800 */
-#define GPIO_AFRL_AFSEL3_Pos (12U)
-#define GPIO_AFRL_AFSEL3_Msk (0xFUL << GPIO_AFRL_AFSEL3_Pos) /*!< 0x0000F000 */
-#define GPIO_AFRL_AFSEL3 GPIO_AFRL_AFSEL3_Msk
-#define GPIO_AFRL_AFSEL3_0 (0x1UL << GPIO_AFRL_AFSEL3_Pos) /*!< 0x00001000 */
-#define GPIO_AFRL_AFSEL3_1 (0x2UL << GPIO_AFRL_AFSEL3_Pos) /*!< 0x00002000 */
-#define GPIO_AFRL_AFSEL3_2 (0x4UL << GPIO_AFRL_AFSEL3_Pos) /*!< 0x00004000 */
-#define GPIO_AFRL_AFSEL3_3 (0x8UL << GPIO_AFRL_AFSEL3_Pos) /*!< 0x00008000 */
-#define GPIO_AFRL_AFSEL4_Pos (16U)
-#define GPIO_AFRL_AFSEL4_Msk (0xFUL << GPIO_AFRL_AFSEL4_Pos) /*!< 0x000F0000 */
-#define GPIO_AFRL_AFSEL4 GPIO_AFRL_AFSEL4_Msk
-#define GPIO_AFRL_AFSEL4_0 (0x1UL << GPIO_AFRL_AFSEL4_Pos) /*!< 0x00010000 */
-#define GPIO_AFRL_AFSEL4_1 (0x2UL << GPIO_AFRL_AFSEL4_Pos) /*!< 0x00020000 */
-#define GPIO_AFRL_AFSEL4_2 (0x4UL << GPIO_AFRL_AFSEL4_Pos) /*!< 0x00040000 */
-#define GPIO_AFRL_AFSEL4_3 (0x8UL << GPIO_AFRL_AFSEL4_Pos) /*!< 0x00080000 */
-#define GPIO_AFRL_AFSEL5_Pos (20U)
-#define GPIO_AFRL_AFSEL5_Msk (0xFUL << GPIO_AFRL_AFSEL5_Pos) /*!< 0x00F00000 */
-#define GPIO_AFRL_AFSEL5 GPIO_AFRL_AFSEL5_Msk
-#define GPIO_AFRL_AFSEL5_0 (0x1UL << GPIO_AFRL_AFSEL5_Pos) /*!< 0x00100000 */
-#define GPIO_AFRL_AFSEL5_1 (0x2UL << GPIO_AFRL_AFSEL5_Pos) /*!< 0x00200000 */
-#define GPIO_AFRL_AFSEL5_2 (0x4UL << GPIO_AFRL_AFSEL5_Pos) /*!< 0x00400000 */
-#define GPIO_AFRL_AFSEL5_3 (0x8UL << GPIO_AFRL_AFSEL5_Pos) /*!< 0x00800000 */
-#define GPIO_AFRL_AFSEL6_Pos (24U)
-#define GPIO_AFRL_AFSEL6_Msk (0xFUL << GPIO_AFRL_AFSEL6_Pos) /*!< 0x0F000000 */
-#define GPIO_AFRL_AFSEL6 GPIO_AFRL_AFSEL6_Msk
-#define GPIO_AFRL_AFSEL6_0 (0x1UL << GPIO_AFRL_AFSEL6_Pos) /*!< 0x01000000 */
-#define GPIO_AFRL_AFSEL6_1 (0x2UL << GPIO_AFRL_AFSEL6_Pos) /*!< 0x02000000 */
-#define GPIO_AFRL_AFSEL6_2 (0x4UL << GPIO_AFRL_AFSEL6_Pos) /*!< 0x04000000 */
-#define GPIO_AFRL_AFSEL6_3 (0x8UL << GPIO_AFRL_AFSEL6_Pos) /*!< 0x08000000 */
-#define GPIO_AFRL_AFSEL7_Pos (28U)
-#define GPIO_AFRL_AFSEL7_Msk (0xFUL << GPIO_AFRL_AFSEL7_Pos) /*!< 0xF0000000 */
-#define GPIO_AFRL_AFSEL7 GPIO_AFRL_AFSEL7_Msk
-#define GPIO_AFRL_AFSEL7_0 (0x1UL << GPIO_AFRL_AFSEL7_Pos) /*!< 0x10000000 */
-#define GPIO_AFRL_AFSEL7_1 (0x2UL << GPIO_AFRL_AFSEL7_Pos) /*!< 0x20000000 */
-#define GPIO_AFRL_AFSEL7_2 (0x4UL << GPIO_AFRL_AFSEL7_Pos) /*!< 0x40000000 */
-#define GPIO_AFRL_AFSEL7_3 (0x8UL << GPIO_AFRL_AFSEL7_Pos) /*!< 0x80000000 */
-
-/* Legacy defines */
-#define GPIO_AFRL_AFRL0 GPIO_AFRL_AFSEL0
-#define GPIO_AFRL_AFRL0_0 GPIO_AFRL_AFSEL0_0
-#define GPIO_AFRL_AFRL0_1 GPIO_AFRL_AFSEL0_1
-#define GPIO_AFRL_AFRL0_2 GPIO_AFRL_AFSEL0_2
-#define GPIO_AFRL_AFRL0_3 GPIO_AFRL_AFSEL0_3
-#define GPIO_AFRL_AFRL1 GPIO_AFRL_AFSEL1
-#define GPIO_AFRL_AFRL1_0 GPIO_AFRL_AFSEL1_0
-#define GPIO_AFRL_AFRL1_1 GPIO_AFRL_AFSEL1_1
-#define GPIO_AFRL_AFRL1_2 GPIO_AFRL_AFSEL1_2
-#define GPIO_AFRL_AFRL1_3 GPIO_AFRL_AFSEL1_3
-#define GPIO_AFRL_AFRL2 GPIO_AFRL_AFSEL2
-#define GPIO_AFRL_AFRL2_0 GPIO_AFRL_AFSEL2_0
-#define GPIO_AFRL_AFRL2_1 GPIO_AFRL_AFSEL2_1
-#define GPIO_AFRL_AFRL2_2 GPIO_AFRL_AFSEL2_2
-#define GPIO_AFRL_AFRL2_3 GPIO_AFRL_AFSEL2_3
-#define GPIO_AFRL_AFRL3 GPIO_AFRL_AFSEL3
-#define GPIO_AFRL_AFRL3_0 GPIO_AFRL_AFSEL3_0
-#define GPIO_AFRL_AFRL3_1 GPIO_AFRL_AFSEL3_1
-#define GPIO_AFRL_AFRL3_2 GPIO_AFRL_AFSEL3_2
-#define GPIO_AFRL_AFRL3_3 GPIO_AFRL_AFSEL3_3
-#define GPIO_AFRL_AFRL4 GPIO_AFRL_AFSEL4
-#define GPIO_AFRL_AFRL4_0 GPIO_AFRL_AFSEL4_0
-#define GPIO_AFRL_AFRL4_1 GPIO_AFRL_AFSEL4_1
-#define GPIO_AFRL_AFRL4_2 GPIO_AFRL_AFSEL4_2
-#define GPIO_AFRL_AFRL4_3 GPIO_AFRL_AFSEL4_3
-#define GPIO_AFRL_AFRL5 GPIO_AFRL_AFSEL5
-#define GPIO_AFRL_AFRL5_0 GPIO_AFRL_AFSEL5_0
-#define GPIO_AFRL_AFRL5_1 GPIO_AFRL_AFSEL5_1
-#define GPIO_AFRL_AFRL5_2 GPIO_AFRL_AFSEL5_2
-#define GPIO_AFRL_AFRL5_3 GPIO_AFRL_AFSEL5_3
-#define GPIO_AFRL_AFRL6 GPIO_AFRL_AFSEL6
-#define GPIO_AFRL_AFRL6_0 GPIO_AFRL_AFSEL6_0
-#define GPIO_AFRL_AFRL6_1 GPIO_AFRL_AFSEL6_1
-#define GPIO_AFRL_AFRL6_2 GPIO_AFRL_AFSEL6_2
-#define GPIO_AFRL_AFRL6_3 GPIO_AFRL_AFSEL6_3
-#define GPIO_AFRL_AFRL7 GPIO_AFRL_AFSEL7
-#define GPIO_AFRL_AFRL7_0 GPIO_AFRL_AFSEL7_0
-#define GPIO_AFRL_AFRL7_1 GPIO_AFRL_AFSEL7_1
-#define GPIO_AFRL_AFRL7_2 GPIO_AFRL_AFSEL7_2
-#define GPIO_AFRL_AFRL7_3 GPIO_AFRL_AFSEL7_3
-
-/****************** Bit definition for GPIO_AFRH register *********************/
-#define GPIO_AFRH_AFSEL8_Pos (0U)
-#define GPIO_AFRH_AFSEL8_Msk (0xFUL << GPIO_AFRH_AFSEL8_Pos) /*!< 0x0000000F */
-#define GPIO_AFRH_AFSEL8 GPIO_AFRH_AFSEL8_Msk
-#define GPIO_AFRH_AFSEL8_0 (0x1UL << GPIO_AFRH_AFSEL8_Pos) /*!< 0x00000001 */
-#define GPIO_AFRH_AFSEL8_1 (0x2UL << GPIO_AFRH_AFSEL8_Pos) /*!< 0x00000002 */
-#define GPIO_AFRH_AFSEL8_2 (0x4UL << GPIO_AFRH_AFSEL8_Pos) /*!< 0x00000004 */
-#define GPIO_AFRH_AFSEL8_3 (0x8UL << GPIO_AFRH_AFSEL8_Pos) /*!< 0x00000008 */
-#define GPIO_AFRH_AFSEL9_Pos (4U)
-#define GPIO_AFRH_AFSEL9_Msk (0xFUL << GPIO_AFRH_AFSEL9_Pos) /*!< 0x000000F0 */
-#define GPIO_AFRH_AFSEL9 GPIO_AFRH_AFSEL9_Msk
-#define GPIO_AFRH_AFSEL9_0 (0x1UL << GPIO_AFRH_AFSEL9_Pos) /*!< 0x00000010 */
-#define GPIO_AFRH_AFSEL9_1 (0x2UL << GPIO_AFRH_AFSEL9_Pos) /*!< 0x00000020 */
-#define GPIO_AFRH_AFSEL9_2 (0x4UL << GPIO_AFRH_AFSEL9_Pos) /*!< 0x00000040 */
-#define GPIO_AFRH_AFSEL9_3 (0x8UL << GPIO_AFRH_AFSEL9_Pos) /*!< 0x00000080 */
-#define GPIO_AFRH_AFSEL10_Pos (8U)
-#define GPIO_AFRH_AFSEL10_Msk (0xFUL << GPIO_AFRH_AFSEL10_Pos) /*!< 0x00000F00 */
-#define GPIO_AFRH_AFSEL10 GPIO_AFRH_AFSEL10_Msk
-#define GPIO_AFRH_AFSEL10_0 (0x1UL << GPIO_AFRH_AFSEL10_Pos) /*!< 0x00000100 */
-#define GPIO_AFRH_AFSEL10_1 (0x2UL << GPIO_AFRH_AFSEL10_Pos) /*!< 0x00000200 */
-#define GPIO_AFRH_AFSEL10_2 (0x4UL << GPIO_AFRH_AFSEL10_Pos) /*!< 0x00000400 */
-#define GPIO_AFRH_AFSEL10_3 (0x8UL << GPIO_AFRH_AFSEL10_Pos) /*!< 0x00000800 */
-#define GPIO_AFRH_AFSEL11_Pos (12U)
-#define GPIO_AFRH_AFSEL11_Msk (0xFUL << GPIO_AFRH_AFSEL11_Pos) /*!< 0x0000F000 */
-#define GPIO_AFRH_AFSEL11 GPIO_AFRH_AFSEL11_Msk
-#define GPIO_AFRH_AFSEL11_0 (0x1UL << GPIO_AFRH_AFSEL11_Pos) /*!< 0x00001000 */
-#define GPIO_AFRH_AFSEL11_1 (0x2UL << GPIO_AFRH_AFSEL11_Pos) /*!< 0x00002000 */
-#define GPIO_AFRH_AFSEL11_2 (0x4UL << GPIO_AFRH_AFSEL11_Pos) /*!< 0x00004000 */
-#define GPIO_AFRH_AFSEL11_3 (0x8UL << GPIO_AFRH_AFSEL11_Pos) /*!< 0x00008000 */
-#define GPIO_AFRH_AFSEL12_Pos (16U)
-#define GPIO_AFRH_AFSEL12_Msk (0xFUL << GPIO_AFRH_AFSEL12_Pos) /*!< 0x000F0000 */
-#define GPIO_AFRH_AFSEL12 GPIO_AFRH_AFSEL12_Msk
-#define GPIO_AFRH_AFSEL12_0 (0x1UL << GPIO_AFRH_AFSEL12_Pos) /*!< 0x00010000 */
-#define GPIO_AFRH_AFSEL12_1 (0x2UL << GPIO_AFRH_AFSEL12_Pos) /*!< 0x00020000 */
-#define GPIO_AFRH_AFSEL12_2 (0x4UL << GPIO_AFRH_AFSEL12_Pos) /*!< 0x00040000 */
-#define GPIO_AFRH_AFSEL12_3 (0x8UL << GPIO_AFRH_AFSEL12_Pos) /*!< 0x00080000 */
-#define GPIO_AFRH_AFSEL13_Pos (20U)
-#define GPIO_AFRH_AFSEL13_Msk (0xFUL << GPIO_AFRH_AFSEL13_Pos) /*!< 0x00F00000 */
-#define GPIO_AFRH_AFSEL13 GPIO_AFRH_AFSEL13_Msk
-#define GPIO_AFRH_AFSEL13_0 (0x1UL << GPIO_AFRH_AFSEL13_Pos) /*!< 0x00100000 */
-#define GPIO_AFRH_AFSEL13_1 (0x2UL << GPIO_AFRH_AFSEL13_Pos) /*!< 0x00200000 */
-#define GPIO_AFRH_AFSEL13_2 (0x4UL << GPIO_AFRH_AFSEL13_Pos) /*!< 0x00400000 */
-#define GPIO_AFRH_AFSEL13_3 (0x8UL << GPIO_AFRH_AFSEL13_Pos) /*!< 0x00800000 */
-#define GPIO_AFRH_AFSEL14_Pos (24U)
-#define GPIO_AFRH_AFSEL14_Msk (0xFUL << GPIO_AFRH_AFSEL14_Pos) /*!< 0x0F000000 */
-#define GPIO_AFRH_AFSEL14 GPIO_AFRH_AFSEL14_Msk
-#define GPIO_AFRH_AFSEL14_0 (0x1UL << GPIO_AFRH_AFSEL14_Pos) /*!< 0x01000000 */
-#define GPIO_AFRH_AFSEL14_1 (0x2UL << GPIO_AFRH_AFSEL14_Pos) /*!< 0x02000000 */
-#define GPIO_AFRH_AFSEL14_2 (0x4UL << GPIO_AFRH_AFSEL14_Pos) /*!< 0x04000000 */
-#define GPIO_AFRH_AFSEL14_3 (0x8UL << GPIO_AFRH_AFSEL14_Pos) /*!< 0x08000000 */
-#define GPIO_AFRH_AFSEL15_Pos (28U)
-#define GPIO_AFRH_AFSEL15_Msk (0xFUL << GPIO_AFRH_AFSEL15_Pos) /*!< 0xF0000000 */
-#define GPIO_AFRH_AFSEL15 GPIO_AFRH_AFSEL15_Msk
-#define GPIO_AFRH_AFSEL15_0 (0x1UL << GPIO_AFRH_AFSEL15_Pos) /*!< 0x10000000 */
-#define GPIO_AFRH_AFSEL15_1 (0x2UL << GPIO_AFRH_AFSEL15_Pos) /*!< 0x20000000 */
-#define GPIO_AFRH_AFSEL15_2 (0x4UL << GPIO_AFRH_AFSEL15_Pos) /*!< 0x40000000 */
-#define GPIO_AFRH_AFSEL15_3 (0x8UL << GPIO_AFRH_AFSEL15_Pos) /*!< 0x80000000 */
-
-/* Legacy defines */
-#define GPIO_AFRH_AFRH0 GPIO_AFRH_AFSEL8
-#define GPIO_AFRH_AFRH0_0 GPIO_AFRH_AFSEL8_0
-#define GPIO_AFRH_AFRH0_1 GPIO_AFRH_AFSEL8_1
-#define GPIO_AFRH_AFRH0_2 GPIO_AFRH_AFSEL8_2
-#define GPIO_AFRH_AFRH0_3 GPIO_AFRH_AFSEL8_3
-#define GPIO_AFRH_AFRH1 GPIO_AFRH_AFSEL9
-#define GPIO_AFRH_AFRH1_0 GPIO_AFRH_AFSEL9_0
-#define GPIO_AFRH_AFRH1_1 GPIO_AFRH_AFSEL9_1
-#define GPIO_AFRH_AFRH1_2 GPIO_AFRH_AFSEL9_2
-#define GPIO_AFRH_AFRH1_3 GPIO_AFRH_AFSEL9_3
-#define GPIO_AFRH_AFRH2 GPIO_AFRH_AFSEL10
-#define GPIO_AFRH_AFRH2_0 GPIO_AFRH_AFSEL10_0
-#define GPIO_AFRH_AFRH2_1 GPIO_AFRH_AFSEL10_1
-#define GPIO_AFRH_AFRH2_2 GPIO_AFRH_AFSEL10_2
-#define GPIO_AFRH_AFRH2_3 GPIO_AFRH_AFSEL10_3
-#define GPIO_AFRH_AFRH3 GPIO_AFRH_AFSEL11
-#define GPIO_AFRH_AFRH3_0 GPIO_AFRH_AFSEL11_0
-#define GPIO_AFRH_AFRH3_1 GPIO_AFRH_AFSEL11_1
-#define GPIO_AFRH_AFRH3_2 GPIO_AFRH_AFSEL11_2
-#define GPIO_AFRH_AFRH3_3 GPIO_AFRH_AFSEL11_3
-#define GPIO_AFRH_AFRH4 GPIO_AFRH_AFSEL12
-#define GPIO_AFRH_AFRH4_0 GPIO_AFRH_AFSEL12_0
-#define GPIO_AFRH_AFRH4_1 GPIO_AFRH_AFSEL12_1
-#define GPIO_AFRH_AFRH4_2 GPIO_AFRH_AFSEL12_2
-#define GPIO_AFRH_AFRH4_3 GPIO_AFRH_AFSEL12_3
-#define GPIO_AFRH_AFRH5 GPIO_AFRH_AFSEL13
-#define GPIO_AFRH_AFRH5_0 GPIO_AFRH_AFSEL13_0
-#define GPIO_AFRH_AFRH5_1 GPIO_AFRH_AFSEL13_1
-#define GPIO_AFRH_AFRH5_2 GPIO_AFRH_AFSEL13_2
-#define GPIO_AFRH_AFRH5_3 GPIO_AFRH_AFSEL13_3
-#define GPIO_AFRH_AFRH6 GPIO_AFRH_AFSEL14
-#define GPIO_AFRH_AFRH6_0 GPIO_AFRH_AFSEL14_0
-#define GPIO_AFRH_AFRH6_1 GPIO_AFRH_AFSEL14_1
-#define GPIO_AFRH_AFRH6_2 GPIO_AFRH_AFSEL14_2
-#define GPIO_AFRH_AFRH6_3 GPIO_AFRH_AFSEL14_3
-#define GPIO_AFRH_AFRH7 GPIO_AFRH_AFSEL15
-#define GPIO_AFRH_AFRH7_0 GPIO_AFRH_AFSEL15_0
-#define GPIO_AFRH_AFRH7_1 GPIO_AFRH_AFSEL15_1
-#define GPIO_AFRH_AFRH7_2 GPIO_AFRH_AFSEL15_2
-#define GPIO_AFRH_AFRH7_3 GPIO_AFRH_AFSEL15_3
-
-
-/******************************************************************************/
-/* */
-/* Inter-integrated Circuit Interface */
-/* */
-/******************************************************************************/
-/******************* Bit definition for I2C_CR1 register ********************/
-#define I2C_CR1_PE_Pos (0U)
-#define I2C_CR1_PE_Msk (0x1UL << I2C_CR1_PE_Pos) /*!< 0x00000001 */
-#define I2C_CR1_PE I2C_CR1_PE_Msk /*!<Peripheral Enable */
-#define I2C_CR1_SMBUS_Pos (1U)
-#define I2C_CR1_SMBUS_Msk (0x1UL << I2C_CR1_SMBUS_Pos) /*!< 0x00000002 */
-#define I2C_CR1_SMBUS I2C_CR1_SMBUS_Msk /*!<SMBus Mode */
-#define I2C_CR1_SMBTYPE_Pos (3U)
-#define I2C_CR1_SMBTYPE_Msk (0x1UL << I2C_CR1_SMBTYPE_Pos) /*!< 0x00000008 */
-#define I2C_CR1_SMBTYPE I2C_CR1_SMBTYPE_Msk /*!<SMBus Type */
-#define I2C_CR1_ENARP_Pos (4U)
-#define I2C_CR1_ENARP_Msk (0x1UL << I2C_CR1_ENARP_Pos) /*!< 0x00000010 */
-#define I2C_CR1_ENARP I2C_CR1_ENARP_Msk /*!<ARP Enable */
-#define I2C_CR1_ENPEC_Pos (5U)
-#define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
-#define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!<PEC Enable */
-#define I2C_CR1_ENGC_Pos (6U)
-#define I2C_CR1_ENGC_Msk (0x1UL << I2C_CR1_ENGC_Pos) /*!< 0x00000040 */
-#define I2C_CR1_ENGC I2C_CR1_ENGC_Msk /*!<General Call Enable */
-#define I2C_CR1_NOSTRETCH_Pos (7U)
-#define I2C_CR1_NOSTRETCH_Msk (0x1UL << I2C_CR1_NOSTRETCH_Pos) /*!< 0x00000080 */
-#define I2C_CR1_NOSTRETCH I2C_CR1_NOSTRETCH_Msk /*!<Clock Stretching Disable (Slave mode) */
-#define I2C_CR1_START_Pos (8U)
-#define I2C_CR1_START_Msk (0x1UL << I2C_CR1_START_Pos) /*!< 0x00000100 */
-#define I2C_CR1_START I2C_CR1_START_Msk /*!<Start Generation */
-#define I2C_CR1_STOP_Pos (9U)
-#define I2C_CR1_STOP_Msk (0x1UL << I2C_CR1_STOP_Pos) /*!< 0x00000200 */
-#define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!<Stop Generation */
-#define I2C_CR1_ACK_Pos (10U)
-#define I2C_CR1_ACK_Msk (0x1UL << I2C_CR1_ACK_Pos) /*!< 0x00000400 */
-#define I2C_CR1_ACK I2C_CR1_ACK_Msk /*!<Acknowledge Enable */
-#define I2C_CR1_POS_Pos (11U)
-#define I2C_CR1_POS_Msk (0x1UL << I2C_CR1_POS_Pos) /*!< 0x00000800 */
-#define I2C_CR1_POS I2C_CR1_POS_Msk /*!<Acknowledge/PEC Position (for data reception) */
-#define I2C_CR1_PEC_Pos (12U)
-#define I2C_CR1_PEC_Msk (0x1UL << I2C_CR1_PEC_Pos) /*!< 0x00001000 */
-#define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!<Packet Error Checking */
-#define I2C_CR1_ALERT_Pos (13U)
-#define I2C_CR1_ALERT_Msk (0x1UL << I2C_CR1_ALERT_Pos) /*!< 0x00002000 */
-#define I2C_CR1_ALERT I2C_CR1_ALERT_Msk /*!<SMBus Alert */
-#define I2C_CR1_SWRST_Pos (15U)
-#define I2C_CR1_SWRST_Msk (0x1UL << I2C_CR1_SWRST_Pos) /*!< 0x00008000 */
-#define I2C_CR1_SWRST I2C_CR1_SWRST_Msk /*!<Software Reset */
-
-/******************* Bit definition for I2C_CR2 register ********************/
-#define I2C_CR2_FREQ_Pos (0U)
-#define I2C_CR2_FREQ_Msk (0x3FUL << I2C_CR2_FREQ_Pos) /*!< 0x0000003F */
-#define I2C_CR2_FREQ I2C_CR2_FREQ_Msk /*!<FREQ[5:0] bits (Peripheral Clock Frequency) */
-#define I2C_CR2_FREQ_0 (0x01UL << I2C_CR2_FREQ_Pos) /*!< 0x00000001 */
-#define I2C_CR2_FREQ_1 (0x02UL << I2C_CR2_FREQ_Pos) /*!< 0x00000002 */
-#define I2C_CR2_FREQ_2 (0x04UL << I2C_CR2_FREQ_Pos) /*!< 0x00000004 */
-#define I2C_CR2_FREQ_3 (0x08UL << I2C_CR2_FREQ_Pos) /*!< 0x00000008 */
-#define I2C_CR2_FREQ_4 (0x10UL << I2C_CR2_FREQ_Pos) /*!< 0x00000010 */
-#define I2C_CR2_FREQ_5 (0x20UL << I2C_CR2_FREQ_Pos) /*!< 0x00000020 */
-
-#define I2C_CR2_ITERREN_Pos (8U)
-#define I2C_CR2_ITERREN_Msk (0x1UL << I2C_CR2_ITERREN_Pos) /*!< 0x00000100 */
-#define I2C_CR2_ITERREN I2C_CR2_ITERREN_Msk /*!<Error Interrupt Enable */
-#define I2C_CR2_ITEVTEN_Pos (9U)
-#define I2C_CR2_ITEVTEN_Msk (0x1UL << I2C_CR2_ITEVTEN_Pos) /*!< 0x00000200 */
-#define I2C_CR2_ITEVTEN I2C_CR2_ITEVTEN_Msk /*!<Event Interrupt Enable */
-#define I2C_CR2_ITBUFEN_Pos (10U)
-#define I2C_CR2_ITBUFEN_Msk (0x1UL << I2C_CR2_ITBUFEN_Pos) /*!< 0x00000400 */
-#define I2C_CR2_ITBUFEN I2C_CR2_ITBUFEN_Msk /*!<Buffer Interrupt Enable */
-#define I2C_CR2_DMAEN_Pos (11U)
-#define I2C_CR2_DMAEN_Msk (0x1UL << I2C_CR2_DMAEN_Pos) /*!< 0x00000800 */
-#define I2C_CR2_DMAEN I2C_CR2_DMAEN_Msk /*!<DMA Requests Enable */
-#define I2C_CR2_LAST_Pos (12U)
-#define I2C_CR2_LAST_Msk (0x1UL << I2C_CR2_LAST_Pos) /*!< 0x00001000 */
-#define I2C_CR2_LAST I2C_CR2_LAST_Msk /*!<DMA Last Transfer */
-
-/******************* Bit definition for I2C_OAR1 register *******************/
-#define I2C_OAR1_ADD1_7 0x000000FEU /*!<Interface Address */
-#define I2C_OAR1_ADD8_9 0x00000300U /*!<Interface Address */
-
-#define I2C_OAR1_ADD0_Pos (0U)
-#define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
-#define I2C_OAR1_ADD0 I2C_OAR1_ADD0_Msk /*!<Bit 0 */
-#define I2C_OAR1_ADD1_Pos (1U)
-#define I2C_OAR1_ADD1_Msk (0x1UL << I2C_OAR1_ADD1_Pos) /*!< 0x00000002 */
-#define I2C_OAR1_ADD1 I2C_OAR1_ADD1_Msk /*!<Bit 1 */
-#define I2C_OAR1_ADD2_Pos (2U)
-#define I2C_OAR1_ADD2_Msk (0x1UL << I2C_OAR1_ADD2_Pos) /*!< 0x00000004 */
-#define I2C_OAR1_ADD2 I2C_OAR1_ADD2_Msk /*!<Bit 2 */
-#define I2C_OAR1_ADD3_Pos (3U)
-#define I2C_OAR1_ADD3_Msk (0x1UL << I2C_OAR1_ADD3_Pos) /*!< 0x00000008 */
-#define I2C_OAR1_ADD3 I2C_OAR1_ADD3_Msk /*!<Bit 3 */
-#define I2C_OAR1_ADD4_Pos (4U)
-#define I2C_OAR1_ADD4_Msk (0x1UL << I2C_OAR1_ADD4_Pos) /*!< 0x00000010 */
-#define I2C_OAR1_ADD4 I2C_OAR1_ADD4_Msk /*!<Bit 4 */
-#define I2C_OAR1_ADD5_Pos (5U)
-#define I2C_OAR1_ADD5_Msk (0x1UL << I2C_OAR1_ADD5_Pos) /*!< 0x00000020 */
-#define I2C_OAR1_ADD5 I2C_OAR1_ADD5_Msk /*!<Bit 5 */
-#define I2C_OAR1_ADD6_Pos (6U)
-#define I2C_OAR1_ADD6_Msk (0x1UL << I2C_OAR1_ADD6_Pos) /*!< 0x00000040 */
-#define I2C_OAR1_ADD6 I2C_OAR1_ADD6_Msk /*!<Bit 6 */
-#define I2C_OAR1_ADD7_Pos (7U)
-#define I2C_OAR1_ADD7_Msk (0x1UL << I2C_OAR1_ADD7_Pos) /*!< 0x00000080 */
-#define I2C_OAR1_ADD7 I2C_OAR1_ADD7_Msk /*!<Bit 7 */
-#define I2C_OAR1_ADD8_Pos (8U)
-#define I2C_OAR1_ADD8_Msk (0x1UL << I2C_OAR1_ADD8_Pos) /*!< 0x00000100 */
-#define I2C_OAR1_ADD8 I2C_OAR1_ADD8_Msk /*!<Bit 8 */
-#define I2C_OAR1_ADD9_Pos (9U)
-#define I2C_OAR1_ADD9_Msk (0x1UL << I2C_OAR1_ADD9_Pos) /*!< 0x00000200 */
-#define I2C_OAR1_ADD9 I2C_OAR1_ADD9_Msk /*!<Bit 9 */
-
-#define I2C_OAR1_ADDMODE_Pos (15U)
-#define I2C_OAR1_ADDMODE_Msk (0x1UL << I2C_OAR1_ADDMODE_Pos) /*!< 0x00008000 */
-#define I2C_OAR1_ADDMODE I2C_OAR1_ADDMODE_Msk /*!<Addressing Mode (Slave mode) */
-
-/******************* Bit definition for I2C_OAR2 register *******************/
-#define I2C_OAR2_ENDUAL_Pos (0U)
-#define I2C_OAR2_ENDUAL_Msk (0x1UL << I2C_OAR2_ENDUAL_Pos) /*!< 0x00000001 */
-#define I2C_OAR2_ENDUAL I2C_OAR2_ENDUAL_Msk /*!<Dual addressing mode enable */
-#define I2C_OAR2_ADD2_Pos (1U)
-#define I2C_OAR2_ADD2_Msk (0x7FUL << I2C_OAR2_ADD2_Pos) /*!< 0x000000FE */
-#define I2C_OAR2_ADD2 I2C_OAR2_ADD2_Msk /*!<Interface address */
-
-/******************** Bit definition for I2C_DR register ********************/
-#define I2C_DR_DR_Pos (0U)
-#define I2C_DR_DR_Msk (0xFFUL << I2C_DR_DR_Pos) /*!< 0x000000FF */
-#define I2C_DR_DR I2C_DR_DR_Msk /*!<8-bit Data Register */
-
-/******************* Bit definition for I2C_SR1 register ********************/
-#define I2C_SR1_SB_Pos (0U)
-#define I2C_SR1_SB_Msk (0x1UL << I2C_SR1_SB_Pos) /*!< 0x00000001 */
-#define I2C_SR1_SB I2C_SR1_SB_Msk /*!<Start Bit (Master mode) */
-#define I2C_SR1_ADDR_Pos (1U)
-#define I2C_SR1_ADDR_Msk (0x1UL << I2C_SR1_ADDR_Pos) /*!< 0x00000002 */
-#define I2C_SR1_ADDR I2C_SR1_ADDR_Msk /*!<Address sent (master mode)/matched (slave mode) */
-#define I2C_SR1_BTF_Pos (2U)
-#define I2C_SR1_BTF_Msk (0x1UL << I2C_SR1_BTF_Pos) /*!< 0x00000004 */
-#define I2C_SR1_BTF I2C_SR1_BTF_Msk /*!<Byte Transfer Finished */
-#define I2C_SR1_ADD10_Pos (3U)
-#define I2C_SR1_ADD10_Msk (0x1UL << I2C_SR1_ADD10_Pos) /*!< 0x00000008 */
-#define I2C_SR1_ADD10 I2C_SR1_ADD10_Msk /*!<10-bit header sent (Master mode) */
-#define I2C_SR1_STOPF_Pos (4U)
-#define I2C_SR1_STOPF_Msk (0x1UL << I2C_SR1_STOPF_Pos) /*!< 0x00000010 */
-#define I2C_SR1_STOPF I2C_SR1_STOPF_Msk /*!<Stop detection (Slave mode) */
-#define I2C_SR1_RXNE_Pos (6U)
-#define I2C_SR1_RXNE_Msk (0x1UL << I2C_SR1_RXNE_Pos) /*!< 0x00000040 */
-#define I2C_SR1_RXNE I2C_SR1_RXNE_Msk /*!<Data Register not Empty (receivers) */
-#define I2C_SR1_TXE_Pos (7U)
-#define I2C_SR1_TXE_Msk (0x1UL << I2C_SR1_TXE_Pos) /*!< 0x00000080 */
-#define I2C_SR1_TXE I2C_SR1_TXE_Msk /*!<Data Register Empty (transmitters) */
-#define I2C_SR1_BERR_Pos (8U)
-#define I2C_SR1_BERR_Msk (0x1UL << I2C_SR1_BERR_Pos) /*!< 0x00000100 */
-#define I2C_SR1_BERR I2C_SR1_BERR_Msk /*!<Bus Error */
-#define I2C_SR1_ARLO_Pos (9U)
-#define I2C_SR1_ARLO_Msk (0x1UL << I2C_SR1_ARLO_Pos) /*!< 0x00000200 */
-#define I2C_SR1_ARLO I2C_SR1_ARLO_Msk /*!<Arbitration Lost (master mode) */
-#define I2C_SR1_AF_Pos (10U)
-#define I2C_SR1_AF_Msk (0x1UL << I2C_SR1_AF_Pos) /*!< 0x00000400 */
-#define I2C_SR1_AF I2C_SR1_AF_Msk /*!<Acknowledge Failure */
-#define I2C_SR1_OVR_Pos (11U)
-#define I2C_SR1_OVR_Msk (0x1UL << I2C_SR1_OVR_Pos) /*!< 0x00000800 */
-#define I2C_SR1_OVR I2C_SR1_OVR_Msk /*!<Overrun/Underrun */
-#define I2C_SR1_PECERR_Pos (12U)
-#define I2C_SR1_PECERR_Msk (0x1UL << I2C_SR1_PECERR_Pos) /*!< 0x00001000 */
-#define I2C_SR1_PECERR I2C_SR1_PECERR_Msk /*!<PEC Error in reception */
-#define I2C_SR1_TIMEOUT_Pos (14U)
-#define I2C_SR1_TIMEOUT_Msk (0x1UL << I2C_SR1_TIMEOUT_Pos) /*!< 0x00004000 */
-#define I2C_SR1_TIMEOUT I2C_SR1_TIMEOUT_Msk /*!<Timeout or Tlow Error */
-#define I2C_SR1_SMBALERT_Pos (15U)
-#define I2C_SR1_SMBALERT_Msk (0x1UL << I2C_SR1_SMBALERT_Pos) /*!< 0x00008000 */
-#define I2C_SR1_SMBALERT I2C_SR1_SMBALERT_Msk /*!<SMBus Alert */
-
-/******************* Bit definition for I2C_SR2 register ********************/
-#define I2C_SR2_MSL_Pos (0U)
-#define I2C_SR2_MSL_Msk (0x1UL << I2C_SR2_MSL_Pos) /*!< 0x00000001 */
-#define I2C_SR2_MSL I2C_SR2_MSL_Msk /*!<Master/Slave */
-#define I2C_SR2_BUSY_Pos (1U)
-#define I2C_SR2_BUSY_Msk (0x1UL << I2C_SR2_BUSY_Pos) /*!< 0x00000002 */
-#define I2C_SR2_BUSY I2C_SR2_BUSY_Msk /*!<Bus Busy */
-#define I2C_SR2_TRA_Pos (2U)
-#define I2C_SR2_TRA_Msk (0x1UL << I2C_SR2_TRA_Pos) /*!< 0x00000004 */
-#define I2C_SR2_TRA I2C_SR2_TRA_Msk /*!<Transmitter/Receiver */
-#define I2C_SR2_GENCALL_Pos (4U)
-#define I2C_SR2_GENCALL_Msk (0x1UL << I2C_SR2_GENCALL_Pos) /*!< 0x00000010 */
-#define I2C_SR2_GENCALL I2C_SR2_GENCALL_Msk /*!<General Call Address (Slave mode) */
-#define I2C_SR2_SMBDEFAULT_Pos (5U)
-#define I2C_SR2_SMBDEFAULT_Msk (0x1UL << I2C_SR2_SMBDEFAULT_Pos) /*!< 0x00000020 */
-#define I2C_SR2_SMBDEFAULT I2C_SR2_SMBDEFAULT_Msk /*!<SMBus Device Default Address (Slave mode) */
-#define I2C_SR2_SMBHOST_Pos (6U)
-#define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
-#define I2C_SR2_SMBHOST I2C_SR2_SMBHOST_Msk /*!<SMBus Host Header (Slave mode) */
-#define I2C_SR2_DUALF_Pos (7U)
-#define I2C_SR2_DUALF_Msk (0x1UL << I2C_SR2_DUALF_Pos) /*!< 0x00000080 */
-#define I2C_SR2_DUALF I2C_SR2_DUALF_Msk /*!<Dual Flag (Slave mode) */
-#define I2C_SR2_PEC_Pos (8U)
-#define I2C_SR2_PEC_Msk (0xFFUL << I2C_SR2_PEC_Pos) /*!< 0x0000FF00 */
-#define I2C_SR2_PEC I2C_SR2_PEC_Msk /*!<Packet Error Checking Register */
-
-/******************* Bit definition for I2C_CCR register ********************/
-#define I2C_CCR_CCR_Pos (0U)
-#define I2C_CCR_CCR_Msk (0xFFFUL << I2C_CCR_CCR_Pos) /*!< 0x00000FFF */
-#define I2C_CCR_CCR I2C_CCR_CCR_Msk /*!<Clock Control Register in Fast/Standard mode (Master mode) */
-#define I2C_CCR_DUTY_Pos (14U)
-#define I2C_CCR_DUTY_Msk (0x1UL << I2C_CCR_DUTY_Pos) /*!< 0x00004000 */
-#define I2C_CCR_DUTY I2C_CCR_DUTY_Msk /*!<Fast Mode Duty Cycle */
-#define I2C_CCR_FS_Pos (15U)
-#define I2C_CCR_FS_Msk (0x1UL << I2C_CCR_FS_Pos) /*!< 0x00008000 */
-#define I2C_CCR_FS I2C_CCR_FS_Msk /*!<I2C Master Mode Selection */
-
-/****************** Bit definition for I2C_TRISE register *******************/
-#define I2C_TRISE_TRISE_Pos (0U)
-#define I2C_TRISE_TRISE_Msk (0x3FUL << I2C_TRISE_TRISE_Pos) /*!< 0x0000003F */
-#define I2C_TRISE_TRISE I2C_TRISE_TRISE_Msk /*!<Maximum Rise Time in Fast/Standard mode (Master mode) */
-
-/****************** Bit definition for I2C_FLTR register *******************/
-#define I2C_FLTR_DNF_Pos (0U)
-#define I2C_FLTR_DNF_Msk (0xFUL << I2C_FLTR_DNF_Pos) /*!< 0x0000000F */
-#define I2C_FLTR_DNF I2C_FLTR_DNF_Msk /*!<Digital Noise Filter */
-#define I2C_FLTR_ANOFF_Pos (4U)
-#define I2C_FLTR_ANOFF_Msk (0x1UL << I2C_FLTR_ANOFF_Pos) /*!< 0x00000010 */
-#define I2C_FLTR_ANOFF I2C_FLTR_ANOFF_Msk /*!<Analog Noise Filter OFF */
-
-/******************************************************************************/
-/* */
-/* Independent WATCHDOG */
-/* */
-/******************************************************************************/
-/******************* Bit definition for IWDG_KR register ********************/
-#define IWDG_KR_KEY_Pos (0U)
-#define IWDG_KR_KEY_Msk (0xFFFFUL << IWDG_KR_KEY_Pos) /*!< 0x0000FFFF */
-#define IWDG_KR_KEY IWDG_KR_KEY_Msk /*!<Key value (write only, read 0000h) */
-
-/******************* Bit definition for IWDG_PR register ********************/
-#define IWDG_PR_PR_Pos (0U)
-#define IWDG_PR_PR_Msk (0x7UL << IWDG_PR_PR_Pos) /*!< 0x00000007 */
-#define IWDG_PR_PR IWDG_PR_PR_Msk /*!<PR[2:0] (Prescaler divider) */
-#define IWDG_PR_PR_0 (0x1UL << IWDG_PR_PR_Pos) /*!< 0x01 */
-#define IWDG_PR_PR_1 (0x2UL << IWDG_PR_PR_Pos) /*!< 0x02 */
-#define IWDG_PR_PR_2 (0x4UL << IWDG_PR_PR_Pos) /*!< 0x04 */
-
-/******************* Bit definition for IWDG_RLR register *******************/
-#define IWDG_RLR_RL_Pos (0U)
-#define IWDG_RLR_RL_Msk (0xFFFUL << IWDG_RLR_RL_Pos) /*!< 0x00000FFF */
-#define IWDG_RLR_RL IWDG_RLR_RL_Msk /*!<Watchdog counter reload value */
-
-/******************* Bit definition for IWDG_SR register ********************/
-#define IWDG_SR_PVU_Pos (0U)
-#define IWDG_SR_PVU_Msk (0x1UL << IWDG_SR_PVU_Pos) /*!< 0x00000001 */
-#define IWDG_SR_PVU IWDG_SR_PVU_Msk /*!<Watchdog prescaler value update */
-#define IWDG_SR_RVU_Pos (1U)
-#define IWDG_SR_RVU_Msk (0x1UL << IWDG_SR_RVU_Pos) /*!< 0x00000002 */
-#define IWDG_SR_RVU IWDG_SR_RVU_Msk /*!<Watchdog counter reload value update */
-
-
-
-/******************************************************************************/
-/* */
-/* Power Control */
-/* */
-/******************************************************************************/
-/******************** Bit definition for PWR_CR register ********************/
-#define PWR_CR_LPDS_Pos (0U)
-#define PWR_CR_LPDS_Msk (0x1UL << PWR_CR_LPDS_Pos) /*!< 0x00000001 */
-#define PWR_CR_LPDS PWR_CR_LPDS_Msk /*!< Low-Power Deepsleep */
-#define PWR_CR_PDDS_Pos (1U)
-#define PWR_CR_PDDS_Msk (0x1UL << PWR_CR_PDDS_Pos) /*!< 0x00000002 */
-#define PWR_CR_PDDS PWR_CR_PDDS_Msk /*!< Power Down Deepsleep */
-#define PWR_CR_CWUF_Pos (2U)
-#define PWR_CR_CWUF_Msk (0x1UL << PWR_CR_CWUF_Pos) /*!< 0x00000004 */
-#define PWR_CR_CWUF PWR_CR_CWUF_Msk /*!< Clear Wakeup Flag */
-#define PWR_CR_CSBF_Pos (3U)
-#define PWR_CR_CSBF_Msk (0x1UL << PWR_CR_CSBF_Pos) /*!< 0x00000008 */
-#define PWR_CR_CSBF PWR_CR_CSBF_Msk /*!< Clear Standby Flag */
-#define PWR_CR_PVDE_Pos (4U)
-#define PWR_CR_PVDE_Msk (0x1UL << PWR_CR_PVDE_Pos) /*!< 0x00000010 */
-#define PWR_CR_PVDE PWR_CR_PVDE_Msk /*!< Power Voltage Detector Enable */
-
-#define PWR_CR_PLS_Pos (5U)
-#define PWR_CR_PLS_Msk (0x7UL << PWR_CR_PLS_Pos) /*!< 0x000000E0 */
-#define PWR_CR_PLS PWR_CR_PLS_Msk /*!< PLS[2:0] bits (PVD Level Selection) */
-#define PWR_CR_PLS_0 (0x1UL << PWR_CR_PLS_Pos) /*!< 0x00000020 */
-#define PWR_CR_PLS_1 (0x2UL << PWR_CR_PLS_Pos) /*!< 0x00000040 */
-#define PWR_CR_PLS_2 (0x4UL << PWR_CR_PLS_Pos) /*!< 0x00000080 */
-
-/*!< PVD level configuration */
-#define PWR_CR_PLS_LEV0 0x00000000U /*!< PVD level 0 */
-#define PWR_CR_PLS_LEV1 0x00000020U /*!< PVD level 1 */
-#define PWR_CR_PLS_LEV2 0x00000040U /*!< PVD level 2 */
-#define PWR_CR_PLS_LEV3 0x00000060U /*!< PVD level 3 */
-#define PWR_CR_PLS_LEV4 0x00000080U /*!< PVD level 4 */
-#define PWR_CR_PLS_LEV5 0x000000A0U /*!< PVD level 5 */
-#define PWR_CR_PLS_LEV6 0x000000C0U /*!< PVD level 6 */
-#define PWR_CR_PLS_LEV7 0x000000E0U /*!< PVD level 7 */
-#define PWR_CR_DBP_Pos (8U)
-#define PWR_CR_DBP_Msk (0x1UL << PWR_CR_DBP_Pos) /*!< 0x00000100 */
-#define PWR_CR_DBP PWR_CR_DBP_Msk /*!< Disable Backup Domain write protection */
-#define PWR_CR_FPDS_Pos (9U)
-#define PWR_CR_FPDS_Msk (0x1UL << PWR_CR_FPDS_Pos) /*!< 0x00000200 */
-#define PWR_CR_FPDS PWR_CR_FPDS_Msk /*!< Flash power down in Stop mode */
-#define PWR_CR_LPLVDS_Pos (10U)
-#define PWR_CR_LPLVDS_Msk (0x1UL << PWR_CR_LPLVDS_Pos) /*!< 0x00000400 */
-#define PWR_CR_LPLVDS PWR_CR_LPLVDS_Msk /*!< Low Power Regulator Low Voltage in Deep Sleep mode */
-#define PWR_CR_MRLVDS_Pos (11U)
-#define PWR_CR_MRLVDS_Msk (0x1UL << PWR_CR_MRLVDS_Pos) /*!< 0x00000800 */
-#define PWR_CR_MRLVDS PWR_CR_MRLVDS_Msk /*!< Main Regulator Low Voltage in Deep Sleep mode */
-#define PWR_CR_ADCDC1_Pos (13U)
-#define PWR_CR_ADCDC1_Msk (0x1UL << PWR_CR_ADCDC1_Pos) /*!< 0x00002000 */
-#define PWR_CR_ADCDC1 PWR_CR_ADCDC1_Msk /*!< Refer to AN4073 on how to use this bit */
-#define PWR_CR_VOS_Pos (14U)
-#define PWR_CR_VOS_Msk (0x3UL << PWR_CR_VOS_Pos) /*!< 0x0000C000 */
-#define PWR_CR_VOS PWR_CR_VOS_Msk /*!< VOS[1:0] bits (Regulator voltage scaling output selection) */
-#define PWR_CR_VOS_0 0x00004000U /*!< Bit 0 */
-#define PWR_CR_VOS_1 0x00008000U /*!< Bit 1 */
-
-/* Legacy define */
-#define PWR_CR_PMODE PWR_CR_VOS
-
-/******************* Bit definition for PWR_CSR register ********************/
-#define PWR_CSR_WUF_Pos (0U)
-#define PWR_CSR_WUF_Msk (0x1UL << PWR_CSR_WUF_Pos) /*!< 0x00000001 */
-#define PWR_CSR_WUF PWR_CSR_WUF_Msk /*!< Wakeup Flag */
-#define PWR_CSR_SBF_Pos (1U)
-#define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
-#define PWR_CSR_SBF PWR_CSR_SBF_Msk /*!< Standby Flag */
-#define PWR_CSR_PVDO_Pos (2U)
-#define PWR_CSR_PVDO_Msk (0x1UL << PWR_CSR_PVDO_Pos) /*!< 0x00000004 */
-#define PWR_CSR_PVDO PWR_CSR_PVDO_Msk /*!< PVD Output */
-#define PWR_CSR_BRR_Pos (3U)
-#define PWR_CSR_BRR_Msk (0x1UL << PWR_CSR_BRR_Pos) /*!< 0x00000008 */
-#define PWR_CSR_BRR PWR_CSR_BRR_Msk /*!< Backup regulator ready */
-#define PWR_CSR_EWUP_Pos (8U)
-#define PWR_CSR_EWUP_Msk (0x1UL << PWR_CSR_EWUP_Pos) /*!< 0x00000100 */
-#define PWR_CSR_EWUP PWR_CSR_EWUP_Msk /*!< Enable WKUP pin */
-#define PWR_CSR_BRE_Pos (9U)
-#define PWR_CSR_BRE_Msk (0x1UL << PWR_CSR_BRE_Pos) /*!< 0x00000200 */
-#define PWR_CSR_BRE PWR_CSR_BRE_Msk /*!< Backup regulator enable */
-#define PWR_CSR_VOSRDY_Pos (14U)
-#define PWR_CSR_VOSRDY_Msk (0x1UL << PWR_CSR_VOSRDY_Pos) /*!< 0x00004000 */
-#define PWR_CSR_VOSRDY PWR_CSR_VOSRDY_Msk /*!< Regulator voltage scaling output selection ready */
-
-/* Legacy define */
-#define PWR_CSR_REGRDY PWR_CSR_VOSRDY
-
-/******************************************************************************/
-/* */
-/* Reset and Clock Control */
-/* */
-/******************************************************************************/
-/******************** Bit definition for RCC_CR register ********************/
-#define RCC_CR_HSION_Pos (0U)
-#define RCC_CR_HSION_Msk (0x1UL << RCC_CR_HSION_Pos) /*!< 0x00000001 */
-#define RCC_CR_HSION RCC_CR_HSION_Msk
-#define RCC_CR_HSIRDY_Pos (1U)
-#define RCC_CR_HSIRDY_Msk (0x1UL << RCC_CR_HSIRDY_Pos) /*!< 0x00000002 */
-#define RCC_CR_HSIRDY RCC_CR_HSIRDY_Msk
-
-#define RCC_CR_HSITRIM_Pos (3U)
-#define RCC_CR_HSITRIM_Msk (0x1FUL << RCC_CR_HSITRIM_Pos) /*!< 0x000000F8 */
-#define RCC_CR_HSITRIM RCC_CR_HSITRIM_Msk
-#define RCC_CR_HSITRIM_0 (0x01UL << RCC_CR_HSITRIM_Pos) /*!< 0x00000008 */
-#define RCC_CR_HSITRIM_1 (0x02UL << RCC_CR_HSITRIM_Pos) /*!< 0x00000010 */
-#define RCC_CR_HSITRIM_2 (0x04UL << RCC_CR_HSITRIM_Pos) /*!< 0x00000020 */
-#define RCC_CR_HSITRIM_3 (0x08UL << RCC_CR_HSITRIM_Pos) /*!< 0x00000040 */
-#define RCC_CR_HSITRIM_4 (0x10UL << RCC_CR_HSITRIM_Pos) /*!< 0x00000080 */
-
-#define RCC_CR_HSICAL_Pos (8U)
-#define RCC_CR_HSICAL_Msk (0xFFUL << RCC_CR_HSICAL_Pos) /*!< 0x0000FF00 */
-#define RCC_CR_HSICAL RCC_CR_HSICAL_Msk
-#define RCC_CR_HSICAL_0 (0x01UL << RCC_CR_HSICAL_Pos) /*!< 0x00000100 */
-#define RCC_CR_HSICAL_1 (0x02UL << RCC_CR_HSICAL_Pos) /*!< 0x00000200 */
-#define RCC_CR_HSICAL_2 (0x04UL << RCC_CR_HSICAL_Pos) /*!< 0x00000400 */
-#define RCC_CR_HSICAL_3 (0x08UL << RCC_CR_HSICAL_Pos) /*!< 0x00000800 */
-#define RCC_CR_HSICAL_4 (0x10UL << RCC_CR_HSICAL_Pos) /*!< 0x00001000 */
-#define RCC_CR_HSICAL_5 (0x20UL << RCC_CR_HSICAL_Pos) /*!< 0x00002000 */
-#define RCC_CR_HSICAL_6 (0x40UL << RCC_CR_HSICAL_Pos) /*!< 0x00004000 */
-#define RCC_CR_HSICAL_7 (0x80UL << RCC_CR_HSICAL_Pos) /*!< 0x00008000 */
-
-#define RCC_CR_HSEON_Pos (16U)
-#define RCC_CR_HSEON_Msk (0x1UL << RCC_CR_HSEON_Pos) /*!< 0x00010000 */
-#define RCC_CR_HSEON RCC_CR_HSEON_Msk
-#define RCC_CR_HSERDY_Pos (17U)
-#define RCC_CR_HSERDY_Msk (0x1UL << RCC_CR_HSERDY_Pos) /*!< 0x00020000 */
-#define RCC_CR_HSERDY RCC_CR_HSERDY_Msk
-#define RCC_CR_HSEBYP_Pos (18U)
-#define RCC_CR_HSEBYP_Msk (0x1UL << RCC_CR_HSEBYP_Pos) /*!< 0x00040000 */
-#define RCC_CR_HSEBYP RCC_CR_HSEBYP_Msk
-#define RCC_CR_CSSON_Pos (19U)
-#define RCC_CR_CSSON_Msk (0x1UL << RCC_CR_CSSON_Pos) /*!< 0x00080000 */
-#define RCC_CR_CSSON RCC_CR_CSSON_Msk
-#define RCC_CR_PLLON_Pos (24U)
-#define RCC_CR_PLLON_Msk (0x1UL << RCC_CR_PLLON_Pos) /*!< 0x01000000 */
-#define RCC_CR_PLLON RCC_CR_PLLON_Msk
-#define RCC_CR_PLLRDY_Pos (25U)
-#define RCC_CR_PLLRDY_Msk (0x1UL << RCC_CR_PLLRDY_Pos) /*!< 0x02000000 */
-#define RCC_CR_PLLRDY RCC_CR_PLLRDY_Msk
-/*
- * @brief Specific device feature definitions (not present on all devices in the STM32F4 serie)
- */
-#define RCC_PLLI2S_SUPPORT /*!< Support PLLI2S oscillator */
-
-#define RCC_CR_PLLI2SON_Pos (26U)
-#define RCC_CR_PLLI2SON_Msk (0x1UL << RCC_CR_PLLI2SON_Pos) /*!< 0x04000000 */
-#define RCC_CR_PLLI2SON RCC_CR_PLLI2SON_Msk
-#define RCC_CR_PLLI2SRDY_Pos (27U)
-#define RCC_CR_PLLI2SRDY_Msk (0x1UL << RCC_CR_PLLI2SRDY_Pos) /*!< 0x08000000 */
-#define RCC_CR_PLLI2SRDY RCC_CR_PLLI2SRDY_Msk
-
-/******************** Bit definition for RCC_PLLCFGR register ***************/
-#define RCC_PLLCFGR_PLLM_Pos (0U)
-#define RCC_PLLCFGR_PLLM_Msk (0x3FUL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x0000003F */
-#define RCC_PLLCFGR_PLLM RCC_PLLCFGR_PLLM_Msk
-#define RCC_PLLCFGR_PLLM_0 (0x01UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000001 */
-#define RCC_PLLCFGR_PLLM_1 (0x02UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000002 */
-#define RCC_PLLCFGR_PLLM_2 (0x04UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000004 */
-#define RCC_PLLCFGR_PLLM_3 (0x08UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000008 */
-#define RCC_PLLCFGR_PLLM_4 (0x10UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000010 */
-#define RCC_PLLCFGR_PLLM_5 (0x20UL << RCC_PLLCFGR_PLLM_Pos) /*!< 0x00000020 */
-
-#define RCC_PLLCFGR_PLLN_Pos (6U)
-#define RCC_PLLCFGR_PLLN_Msk (0x1FFUL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00007FC0 */
-#define RCC_PLLCFGR_PLLN RCC_PLLCFGR_PLLN_Msk
-#define RCC_PLLCFGR_PLLN_0 (0x001UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000040 */
-#define RCC_PLLCFGR_PLLN_1 (0x002UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000080 */
-#define RCC_PLLCFGR_PLLN_2 (0x004UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000100 */
-#define RCC_PLLCFGR_PLLN_3 (0x008UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000200 */
-#define RCC_PLLCFGR_PLLN_4 (0x010UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000400 */
-#define RCC_PLLCFGR_PLLN_5 (0x020UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00000800 */
-#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
-#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
-#define RCC_PLLCFGR_PLLN_8 (0x100UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00004000 */
-
-#define RCC_PLLCFGR_PLLP_Pos (16U)
-#define RCC_PLLCFGR_PLLP_Msk (0x3UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00030000 */
-#define RCC_PLLCFGR_PLLP RCC_PLLCFGR_PLLP_Msk
-#define RCC_PLLCFGR_PLLP_0 (0x1UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00010000 */
-#define RCC_PLLCFGR_PLLP_1 (0x2UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00020000 */
-
-#define RCC_PLLCFGR_PLLSRC_Pos (22U)
-#define RCC_PLLCFGR_PLLSRC_Msk (0x1UL << RCC_PLLCFGR_PLLSRC_Pos) /*!< 0x00400000 */
-#define RCC_PLLCFGR_PLLSRC RCC_PLLCFGR_PLLSRC_Msk
-#define RCC_PLLCFGR_PLLSRC_HSE_Pos (22U)
-#define RCC_PLLCFGR_PLLSRC_HSE_Msk (0x1UL << RCC_PLLCFGR_PLLSRC_HSE_Pos) /*!< 0x00400000 */
-#define RCC_PLLCFGR_PLLSRC_HSE RCC_PLLCFGR_PLLSRC_HSE_Msk
-#define RCC_PLLCFGR_PLLSRC_HSI 0x00000000U
-
-#define RCC_PLLCFGR_PLLQ_Pos (24U)
-#define RCC_PLLCFGR_PLLQ_Msk (0xFUL << RCC_PLLCFGR_PLLQ_Pos) /*!< 0x0F000000 */
-#define RCC_PLLCFGR_PLLQ RCC_PLLCFGR_PLLQ_Msk
-#define RCC_PLLCFGR_PLLQ_0 (0x1UL << RCC_PLLCFGR_PLLQ_Pos) /*!< 0x01000000 */
-#define RCC_PLLCFGR_PLLQ_1 (0x2UL << RCC_PLLCFGR_PLLQ_Pos) /*!< 0x02000000 */
-#define RCC_PLLCFGR_PLLQ_2 (0x4UL << RCC_PLLCFGR_PLLQ_Pos) /*!< 0x04000000 */
-#define RCC_PLLCFGR_PLLQ_3 (0x8UL << RCC_PLLCFGR_PLLQ_Pos) /*!< 0x08000000 */
-
-
-/******************** Bit definition for RCC_CFGR register ******************/
-/*!< SW configuration */
-#define RCC_CFGR_SW_Pos (0U)
-#define RCC_CFGR_SW_Msk (0x3UL << RCC_CFGR_SW_Pos) /*!< 0x00000003 */
-#define RCC_CFGR_SW RCC_CFGR_SW_Msk /*!< SW[1:0] bits (System clock Switch) */
-#define RCC_CFGR_SW_0 (0x1UL << RCC_CFGR_SW_Pos) /*!< 0x00000001 */
-#define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */
-
-#define RCC_CFGR_SW_HSI 0x00000000U /*!< HSI selected as system clock */
-#define RCC_CFGR_SW_HSE 0x00000001U /*!< HSE selected as system clock */
-#define RCC_CFGR_SW_PLL 0x00000002U /*!< PLL selected as system clock */
-
-/*!< SWS configuration */
-#define RCC_CFGR_SWS_Pos (2U)
-#define RCC_CFGR_SWS_Msk (0x3UL << RCC_CFGR_SWS_Pos) /*!< 0x0000000C */
-#define RCC_CFGR_SWS RCC_CFGR_SWS_Msk /*!< SWS[1:0] bits (System Clock Switch Status) */
-#define RCC_CFGR_SWS_0 (0x1UL << RCC_CFGR_SWS_Pos) /*!< 0x00000004 */
-#define RCC_CFGR_SWS_1 (0x2UL << RCC_CFGR_SWS_Pos) /*!< 0x00000008 */
-
-#define RCC_CFGR_SWS_HSI 0x00000000U /*!< HSI oscillator used as system clock */
-#define RCC_CFGR_SWS_HSE 0x00000004U /*!< HSE oscillator used as system clock */
-#define RCC_CFGR_SWS_PLL 0x00000008U /*!< PLL used as system clock */
-
-/*!< HPRE configuration */
-#define RCC_CFGR_HPRE_Pos (4U)
-#define RCC_CFGR_HPRE_Msk (0xFUL << RCC_CFGR_HPRE_Pos) /*!< 0x000000F0 */
-#define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits (AHB prescaler) */
-#define RCC_CFGR_HPRE_0 (0x1UL << RCC_CFGR_HPRE_Pos) /*!< 0x00000010 */
-#define RCC_CFGR_HPRE_1 (0x2UL << RCC_CFGR_HPRE_Pos) /*!< 0x00000020 */
-#define RCC_CFGR_HPRE_2 (0x4UL << RCC_CFGR_HPRE_Pos) /*!< 0x00000040 */
-#define RCC_CFGR_HPRE_3 (0x8UL << RCC_CFGR_HPRE_Pos) /*!< 0x00000080 */
-
-#define RCC_CFGR_HPRE_DIV1 0x00000000U /*!< SYSCLK not divided */
-#define RCC_CFGR_HPRE_DIV2 0x00000080U /*!< SYSCLK divided by 2 */
-#define RCC_CFGR_HPRE_DIV4 0x00000090U /*!< SYSCLK divided by 4 */
-#define RCC_CFGR_HPRE_DIV8 0x000000A0U /*!< SYSCLK divided by 8 */
-#define RCC_CFGR_HPRE_DIV16 0x000000B0U /*!< SYSCLK divided by 16 */
-#define RCC_CFGR_HPRE_DIV64 0x000000C0U /*!< SYSCLK divided by 64 */
-#define RCC_CFGR_HPRE_DIV128 0x000000D0U /*!< SYSCLK divided by 128 */
-#define RCC_CFGR_HPRE_DIV256 0x000000E0U /*!< SYSCLK divided by 256 */
-#define RCC_CFGR_HPRE_DIV512 0x000000F0U /*!< SYSCLK divided by 512 */
-
-/*!< PPRE1 configuration */
-#define RCC_CFGR_PPRE1_Pos (10U)
-#define RCC_CFGR_PPRE1_Msk (0x7UL << RCC_CFGR_PPRE1_Pos) /*!< 0x00001C00 */
-#define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits (APB1 prescaler) */
-#define RCC_CFGR_PPRE1_0 (0x1UL << RCC_CFGR_PPRE1_Pos) /*!< 0x00000400 */
-#define RCC_CFGR_PPRE1_1 (0x2UL << RCC_CFGR_PPRE1_Pos) /*!< 0x00000800 */
-#define RCC_CFGR_PPRE1_2 (0x4UL << RCC_CFGR_PPRE1_Pos) /*!< 0x00001000 */
-
-#define RCC_CFGR_PPRE1_DIV1 0x00000000U /*!< HCLK not divided */
-#define RCC_CFGR_PPRE1_DIV2 0x00001000U /*!< HCLK divided by 2 */
-#define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by 4 */
-#define RCC_CFGR_PPRE1_DIV8 0x00001800U /*!< HCLK divided by 8 */
-#define RCC_CFGR_PPRE1_DIV16 0x00001C00U /*!< HCLK divided by 16 */
-
-/*!< PPRE2 configuration */
-#define RCC_CFGR_PPRE2_Pos (13U)
-#define RCC_CFGR_PPRE2_Msk (0x7UL << RCC_CFGR_PPRE2_Pos) /*!< 0x0000E000 */
-#define RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_Msk /*!< PRE2[2:0] bits (APB2 prescaler) */
-#define RCC_CFGR_PPRE2_0 (0x1UL << RCC_CFGR_PPRE2_Pos) /*!< 0x00002000 */
-#define RCC_CFGR_PPRE2_1 (0x2UL << RCC_CFGR_PPRE2_Pos) /*!< 0x00004000 */
-#define RCC_CFGR_PPRE2_2 (0x4UL << RCC_CFGR_PPRE2_Pos) /*!< 0x00008000 */
-
-#define RCC_CFGR_PPRE2_DIV1 0x00000000U /*!< HCLK not divided */
-#define RCC_CFGR_PPRE2_DIV2 0x00008000U /*!< HCLK divided by 2 */
-#define RCC_CFGR_PPRE2_DIV4 0x0000A000U /*!< HCLK divided by 4 */
-#define RCC_CFGR_PPRE2_DIV8 0x0000C000U /*!< HCLK divided by 8 */
-#define RCC_CFGR_PPRE2_DIV16 0x0000E000U /*!< HCLK divided by 16 */
-
-/*!< RTCPRE configuration */
-#define RCC_CFGR_RTCPRE_Pos (16U)
-#define RCC_CFGR_RTCPRE_Msk (0x1FUL << RCC_CFGR_RTCPRE_Pos) /*!< 0x001F0000 */
-#define RCC_CFGR_RTCPRE RCC_CFGR_RTCPRE_Msk
-#define RCC_CFGR_RTCPRE_0 (0x01UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x00010000 */
-#define RCC_CFGR_RTCPRE_1 (0x02UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x00020000 */
-#define RCC_CFGR_RTCPRE_2 (0x04UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x00040000 */
-#define RCC_CFGR_RTCPRE_3 (0x08UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x00080000 */
-#define RCC_CFGR_RTCPRE_4 (0x10UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x00100000 */
-
-/*!< MCO1 configuration */
-#define RCC_CFGR_MCO1_Pos (21U)
-#define RCC_CFGR_MCO1_Msk (0x3UL << RCC_CFGR_MCO1_Pos) /*!< 0x00600000 */
-#define RCC_CFGR_MCO1 RCC_CFGR_MCO1_Msk
-#define RCC_CFGR_MCO1_0 (0x1UL << RCC_CFGR_MCO1_Pos) /*!< 0x00200000 */
-#define RCC_CFGR_MCO1_1 (0x2UL << RCC_CFGR_MCO1_Pos) /*!< 0x00400000 */
-
-#define RCC_CFGR_I2SSRC_Pos (23U)
-#define RCC_CFGR_I2SSRC_Msk (0x1UL << RCC_CFGR_I2SSRC_Pos) /*!< 0x00800000 */
-#define RCC_CFGR_I2SSRC RCC_CFGR_I2SSRC_Msk
-
-#define RCC_CFGR_MCO1PRE_Pos (24U)
-#define RCC_CFGR_MCO1PRE_Msk (0x7UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x07000000 */
-#define RCC_CFGR_MCO1PRE RCC_CFGR_MCO1PRE_Msk
-#define RCC_CFGR_MCO1PRE_0 (0x1UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x01000000 */
-#define RCC_CFGR_MCO1PRE_1 (0x2UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x02000000 */
-#define RCC_CFGR_MCO1PRE_2 (0x4UL << RCC_CFGR_MCO1PRE_Pos) /*!< 0x04000000 */
-
-#define RCC_CFGR_MCO2PRE_Pos (27U)
-#define RCC_CFGR_MCO2PRE_Msk (0x7UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x38000000 */
-#define RCC_CFGR_MCO2PRE RCC_CFGR_MCO2PRE_Msk
-#define RCC_CFGR_MCO2PRE_0 (0x1UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x08000000 */
-#define RCC_CFGR_MCO2PRE_1 (0x2UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x10000000 */
-#define RCC_CFGR_MCO2PRE_2 (0x4UL << RCC_CFGR_MCO2PRE_Pos) /*!< 0x20000000 */
-
-#define RCC_CFGR_MCO2_Pos (30U)
-#define RCC_CFGR_MCO2_Msk (0x3UL << RCC_CFGR_MCO2_Pos) /*!< 0xC0000000 */
-#define RCC_CFGR_MCO2 RCC_CFGR_MCO2_Msk
-#define RCC_CFGR_MCO2_0 (0x1UL << RCC_CFGR_MCO2_Pos) /*!< 0x40000000 */
-#define RCC_CFGR_MCO2_1 (0x2UL << RCC_CFGR_MCO2_Pos) /*!< 0x80000000 */
-
-/******************** Bit definition for RCC_CIR register *******************/
-#define RCC_CIR_LSIRDYF_Pos (0U)
-#define RCC_CIR_LSIRDYF_Msk (0x1UL << RCC_CIR_LSIRDYF_Pos) /*!< 0x00000001 */
-#define RCC_CIR_LSIRDYF RCC_CIR_LSIRDYF_Msk
-#define RCC_CIR_LSERDYF_Pos (1U)
-#define RCC_CIR_LSERDYF_Msk (0x1UL << RCC_CIR_LSERDYF_Pos) /*!< 0x00000002 */
-#define RCC_CIR_LSERDYF RCC_CIR_LSERDYF_Msk
-#define RCC_CIR_HSIRDYF_Pos (2U)
-#define RCC_CIR_HSIRDYF_Msk (0x1UL << RCC_CIR_HSIRDYF_Pos) /*!< 0x00000004 */
-#define RCC_CIR_HSIRDYF RCC_CIR_HSIRDYF_Msk
-#define RCC_CIR_HSERDYF_Pos (3U)
-#define RCC_CIR_HSERDYF_Msk (0x1UL << RCC_CIR_HSERDYF_Pos) /*!< 0x00000008 */
-#define RCC_CIR_HSERDYF RCC_CIR_HSERDYF_Msk
-#define RCC_CIR_PLLRDYF_Pos (4U)
-#define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
-#define RCC_CIR_PLLRDYF RCC_CIR_PLLRDYF_Msk
-#define RCC_CIR_PLLI2SRDYF_Pos (5U)
-#define RCC_CIR_PLLI2SRDYF_Msk (0x1UL << RCC_CIR_PLLI2SRDYF_Pos) /*!< 0x00000020 */
-#define RCC_CIR_PLLI2SRDYF RCC_CIR_PLLI2SRDYF_Msk
-
-#define RCC_CIR_CSSF_Pos (7U)
-#define RCC_CIR_CSSF_Msk (0x1UL << RCC_CIR_CSSF_Pos) /*!< 0x00000080 */
-#define RCC_CIR_CSSF RCC_CIR_CSSF_Msk
-#define RCC_CIR_LSIRDYIE_Pos (8U)
-#define RCC_CIR_LSIRDYIE_Msk (0x1UL << RCC_CIR_LSIRDYIE_Pos) /*!< 0x00000100 */
-#define RCC_CIR_LSIRDYIE RCC_CIR_LSIRDYIE_Msk
-#define RCC_CIR_LSERDYIE_Pos (9U)
-#define RCC_CIR_LSERDYIE_Msk (0x1UL << RCC_CIR_LSERDYIE_Pos) /*!< 0x00000200 */
-#define RCC_CIR_LSERDYIE RCC_CIR_LSERDYIE_Msk
-#define RCC_CIR_HSIRDYIE_Pos (10U)
-#define RCC_CIR_HSIRDYIE_Msk (0x1UL << RCC_CIR_HSIRDYIE_Pos) /*!< 0x00000400 */
-#define RCC_CIR_HSIRDYIE RCC_CIR_HSIRDYIE_Msk
-#define RCC_CIR_HSERDYIE_Pos (11U)
-#define RCC_CIR_HSERDYIE_Msk (0x1UL << RCC_CIR_HSERDYIE_Pos) /*!< 0x00000800 */
-#define RCC_CIR_HSERDYIE RCC_CIR_HSERDYIE_Msk
-#define RCC_CIR_PLLRDYIE_Pos (12U)
-#define RCC_CIR_PLLRDYIE_Msk (0x1UL << RCC_CIR_PLLRDYIE_Pos) /*!< 0x00001000 */
-#define RCC_CIR_PLLRDYIE RCC_CIR_PLLRDYIE_Msk
-#define RCC_CIR_PLLI2SRDYIE_Pos (13U)
-#define RCC_CIR_PLLI2SRDYIE_Msk (0x1UL << RCC_CIR_PLLI2SRDYIE_Pos) /*!< 0x00002000 */
-#define RCC_CIR_PLLI2SRDYIE RCC_CIR_PLLI2SRDYIE_Msk
-
-#define RCC_CIR_LSIRDYC_Pos (16U)
-#define RCC_CIR_LSIRDYC_Msk (0x1UL << RCC_CIR_LSIRDYC_Pos) /*!< 0x00010000 */
-#define RCC_CIR_LSIRDYC RCC_CIR_LSIRDYC_Msk
-#define RCC_CIR_LSERDYC_Pos (17U)
-#define RCC_CIR_LSERDYC_Msk (0x1UL << RCC_CIR_LSERDYC_Pos) /*!< 0x00020000 */
-#define RCC_CIR_LSERDYC RCC_CIR_LSERDYC_Msk
-#define RCC_CIR_HSIRDYC_Pos (18U)
-#define RCC_CIR_HSIRDYC_Msk (0x1UL << RCC_CIR_HSIRDYC_Pos) /*!< 0x00040000 */
-#define RCC_CIR_HSIRDYC RCC_CIR_HSIRDYC_Msk
-#define RCC_CIR_HSERDYC_Pos (19U)
-#define RCC_CIR_HSERDYC_Msk (0x1UL << RCC_CIR_HSERDYC_Pos) /*!< 0x00080000 */
-#define RCC_CIR_HSERDYC RCC_CIR_HSERDYC_Msk
-#define RCC_CIR_PLLRDYC_Pos (20U)
-#define RCC_CIR_PLLRDYC_Msk (0x1UL << RCC_CIR_PLLRDYC_Pos) /*!< 0x00100000 */
-#define RCC_CIR_PLLRDYC RCC_CIR_PLLRDYC_Msk
-#define RCC_CIR_PLLI2SRDYC_Pos (21U)
-#define RCC_CIR_PLLI2SRDYC_Msk (0x1UL << RCC_CIR_PLLI2SRDYC_Pos) /*!< 0x00200000 */
-#define RCC_CIR_PLLI2SRDYC RCC_CIR_PLLI2SRDYC_Msk
-
-#define RCC_CIR_CSSC_Pos (23U)
-#define RCC_CIR_CSSC_Msk (0x1UL << RCC_CIR_CSSC_Pos) /*!< 0x00800000 */
-#define RCC_CIR_CSSC RCC_CIR_CSSC_Msk
-
-/******************** Bit definition for RCC_AHB1RSTR register **************/
-#define RCC_AHB1RSTR_GPIOARST_Pos (0U)
-#define RCC_AHB1RSTR_GPIOARST_Msk (0x1UL << RCC_AHB1RSTR_GPIOARST_Pos) /*!< 0x00000001 */
-#define RCC_AHB1RSTR_GPIOARST RCC_AHB1RSTR_GPIOARST_Msk
-#define RCC_AHB1RSTR_GPIOBRST_Pos (1U)
-#define RCC_AHB1RSTR_GPIOBRST_Msk (0x1UL << RCC_AHB1RSTR_GPIOBRST_Pos) /*!< 0x00000002 */
-#define RCC_AHB1RSTR_GPIOBRST RCC_AHB1RSTR_GPIOBRST_Msk
-#define RCC_AHB1RSTR_GPIOCRST_Pos (2U)
-#define RCC_AHB1RSTR_GPIOCRST_Msk (0x1UL << RCC_AHB1RSTR_GPIOCRST_Pos) /*!< 0x00000004 */
-#define RCC_AHB1RSTR_GPIOCRST RCC_AHB1RSTR_GPIOCRST_Msk
-#define RCC_AHB1RSTR_GPIODRST_Pos (3U)
-#define RCC_AHB1RSTR_GPIODRST_Msk (0x1UL << RCC_AHB1RSTR_GPIODRST_Pos) /*!< 0x00000008 */
-#define RCC_AHB1RSTR_GPIODRST RCC_AHB1RSTR_GPIODRST_Msk
-#define RCC_AHB1RSTR_GPIOERST_Pos (4U)
-#define RCC_AHB1RSTR_GPIOERST_Msk (0x1UL << RCC_AHB1RSTR_GPIOERST_Pos) /*!< 0x00000010 */
-#define RCC_AHB1RSTR_GPIOERST RCC_AHB1RSTR_GPIOERST_Msk
-#define RCC_AHB1RSTR_GPIOHRST_Pos (7U)
-#define RCC_AHB1RSTR_GPIOHRST_Msk (0x1UL << RCC_AHB1RSTR_GPIOHRST_Pos) /*!< 0x00000080 */
-#define RCC_AHB1RSTR_GPIOHRST RCC_AHB1RSTR_GPIOHRST_Msk
-#define RCC_AHB1RSTR_CRCRST_Pos (12U)
-#define RCC_AHB1RSTR_CRCRST_Msk (0x1UL << RCC_AHB1RSTR_CRCRST_Pos) /*!< 0x00001000 */
-#define RCC_AHB1RSTR_CRCRST RCC_AHB1RSTR_CRCRST_Msk
-#define RCC_AHB1RSTR_DMA1RST_Pos (21U)
-#define RCC_AHB1RSTR_DMA1RST_Msk (0x1UL << RCC_AHB1RSTR_DMA1RST_Pos) /*!< 0x00200000 */
-#define RCC_AHB1RSTR_DMA1RST RCC_AHB1RSTR_DMA1RST_Msk
-#define RCC_AHB1RSTR_DMA2RST_Pos (22U)
-#define RCC_AHB1RSTR_DMA2RST_Msk (0x1UL << RCC_AHB1RSTR_DMA2RST_Pos) /*!< 0x00400000 */
-#define RCC_AHB1RSTR_DMA2RST RCC_AHB1RSTR_DMA2RST_Msk
-
-/******************** Bit definition for RCC_AHB2RSTR register **************/
-#define RCC_AHB2RSTR_OTGFSRST_Pos (7U)
-#define RCC_AHB2RSTR_OTGFSRST_Msk (0x1UL << RCC_AHB2RSTR_OTGFSRST_Pos) /*!< 0x00000080 */
-#define RCC_AHB2RSTR_OTGFSRST RCC_AHB2RSTR_OTGFSRST_Msk
-/******************** Bit definition for RCC_AHB3RSTR register **************/
-
-
-/******************** Bit definition for RCC_APB1RSTR register **************/
-#define RCC_APB1RSTR_TIM2RST_Pos (0U)
-#define RCC_APB1RSTR_TIM2RST_Msk (0x1UL << RCC_APB1RSTR_TIM2RST_Pos) /*!< 0x00000001 */
-#define RCC_APB1RSTR_TIM2RST RCC_APB1RSTR_TIM2RST_Msk
-#define RCC_APB1RSTR_TIM3RST_Pos (1U)
-#define RCC_APB1RSTR_TIM3RST_Msk (0x1UL << RCC_APB1RSTR_TIM3RST_Pos) /*!< 0x00000002 */
-#define RCC_APB1RSTR_TIM3RST RCC_APB1RSTR_TIM3RST_Msk
-#define RCC_APB1RSTR_TIM4RST_Pos (2U)
-#define RCC_APB1RSTR_TIM4RST_Msk (0x1UL << RCC_APB1RSTR_TIM4RST_Pos) /*!< 0x00000004 */
-#define RCC_APB1RSTR_TIM4RST RCC_APB1RSTR_TIM4RST_Msk
-#define RCC_APB1RSTR_TIM5RST_Pos (3U)
-#define RCC_APB1RSTR_TIM5RST_Msk (0x1UL << RCC_APB1RSTR_TIM5RST_Pos) /*!< 0x00000008 */
-#define RCC_APB1RSTR_TIM5RST RCC_APB1RSTR_TIM5RST_Msk
-#define RCC_APB1RSTR_WWDGRST_Pos (11U)
-#define RCC_APB1RSTR_WWDGRST_Msk (0x1UL << RCC_APB1RSTR_WWDGRST_Pos) /*!< 0x00000800 */
-#define RCC_APB1RSTR_WWDGRST RCC_APB1RSTR_WWDGRST_Msk
-#define RCC_APB1RSTR_SPI2RST_Pos (14U)
-#define RCC_APB1RSTR_SPI2RST_Msk (0x1UL << RCC_APB1RSTR_SPI2RST_Pos) /*!< 0x00004000 */
-#define RCC_APB1RSTR_SPI2RST RCC_APB1RSTR_SPI2RST_Msk
-#define RCC_APB1RSTR_SPI3RST_Pos (15U)
-#define RCC_APB1RSTR_SPI3RST_Msk (0x1UL << RCC_APB1RSTR_SPI3RST_Pos) /*!< 0x00008000 */
-#define RCC_APB1RSTR_SPI3RST RCC_APB1RSTR_SPI3RST_Msk
-#define RCC_APB1RSTR_USART2RST_Pos (17U)
-#define RCC_APB1RSTR_USART2RST_Msk (0x1UL << RCC_APB1RSTR_USART2RST_Pos) /*!< 0x00020000 */
-#define RCC_APB1RSTR_USART2RST RCC_APB1RSTR_USART2RST_Msk
-#define RCC_APB1RSTR_I2C1RST_Pos (21U)
-#define RCC_APB1RSTR_I2C1RST_Msk (0x1UL << RCC_APB1RSTR_I2C1RST_Pos) /*!< 0x00200000 */
-#define RCC_APB1RSTR_I2C1RST RCC_APB1RSTR_I2C1RST_Msk
-#define RCC_APB1RSTR_I2C2RST_Pos (22U)
-#define RCC_APB1RSTR_I2C2RST_Msk (0x1UL << RCC_APB1RSTR_I2C2RST_Pos) /*!< 0x00400000 */
-#define RCC_APB1RSTR_I2C2RST RCC_APB1RSTR_I2C2RST_Msk
-#define RCC_APB1RSTR_I2C3RST_Pos (23U)
-#define RCC_APB1RSTR_I2C3RST_Msk (0x1UL << RCC_APB1RSTR_I2C3RST_Pos) /*!< 0x00800000 */
-#define RCC_APB1RSTR_I2C3RST RCC_APB1RSTR_I2C3RST_Msk
-#define RCC_APB1RSTR_PWRRST_Pos (28U)
-#define RCC_APB1RSTR_PWRRST_Msk (0x1UL << RCC_APB1RSTR_PWRRST_Pos) /*!< 0x10000000 */
-#define RCC_APB1RSTR_PWRRST RCC_APB1RSTR_PWRRST_Msk
-
-/******************** Bit definition for RCC_APB2RSTR register **************/
-#define RCC_APB2RSTR_TIM1RST_Pos (0U)
-#define RCC_APB2RSTR_TIM1RST_Msk (0x1UL << RCC_APB2RSTR_TIM1RST_Pos) /*!< 0x00000001 */
-#define RCC_APB2RSTR_TIM1RST RCC_APB2RSTR_TIM1RST_Msk
-#define RCC_APB2RSTR_USART1RST_Pos (4U)
-#define RCC_APB2RSTR_USART1RST_Msk (0x1UL << RCC_APB2RSTR_USART1RST_Pos) /*!< 0x00000010 */
-#define RCC_APB2RSTR_USART1RST RCC_APB2RSTR_USART1RST_Msk
-#define RCC_APB2RSTR_USART6RST_Pos (5U)
-#define RCC_APB2RSTR_USART6RST_Msk (0x1UL << RCC_APB2RSTR_USART6RST_Pos) /*!< 0x00000020 */
-#define RCC_APB2RSTR_USART6RST RCC_APB2RSTR_USART6RST_Msk
-#define RCC_APB2RSTR_ADCRST_Pos (8U)
-#define RCC_APB2RSTR_ADCRST_Msk (0x1UL << RCC_APB2RSTR_ADCRST_Pos) /*!< 0x00000100 */
-#define RCC_APB2RSTR_ADCRST RCC_APB2RSTR_ADCRST_Msk
-#define RCC_APB2RSTR_SDIORST_Pos (11U)
-#define RCC_APB2RSTR_SDIORST_Msk (0x1UL << RCC_APB2RSTR_SDIORST_Pos) /*!< 0x00000800 */
-#define RCC_APB2RSTR_SDIORST RCC_APB2RSTR_SDIORST_Msk
-#define RCC_APB2RSTR_SPI1RST_Pos (12U)
-#define RCC_APB2RSTR_SPI1RST_Msk (0x1UL << RCC_APB2RSTR_SPI1RST_Pos) /*!< 0x00001000 */
-#define RCC_APB2RSTR_SPI1RST RCC_APB2RSTR_SPI1RST_Msk
-#define RCC_APB2RSTR_SPI4RST_Pos (13U)
-#define RCC_APB2RSTR_SPI4RST_Msk (0x1UL << RCC_APB2RSTR_SPI4RST_Pos) /*!< 0x00002000 */
-#define RCC_APB2RSTR_SPI4RST RCC_APB2RSTR_SPI4RST_Msk
-#define RCC_APB2RSTR_SYSCFGRST_Pos (14U)
-#define RCC_APB2RSTR_SYSCFGRST_Msk (0x1UL << RCC_APB2RSTR_SYSCFGRST_Pos) /*!< 0x00004000 */
-#define RCC_APB2RSTR_SYSCFGRST RCC_APB2RSTR_SYSCFGRST_Msk
-#define RCC_APB2RSTR_TIM9RST_Pos (16U)
-#define RCC_APB2RSTR_TIM9RST_Msk (0x1UL << RCC_APB2RSTR_TIM9RST_Pos) /*!< 0x00010000 */
-#define RCC_APB2RSTR_TIM9RST RCC_APB2RSTR_TIM9RST_Msk
-#define RCC_APB2RSTR_TIM10RST_Pos (17U)
-#define RCC_APB2RSTR_TIM10RST_Msk (0x1UL << RCC_APB2RSTR_TIM10RST_Pos) /*!< 0x00020000 */
-#define RCC_APB2RSTR_TIM10RST RCC_APB2RSTR_TIM10RST_Msk
-#define RCC_APB2RSTR_TIM11RST_Pos (18U)
-#define RCC_APB2RSTR_TIM11RST_Msk (0x1UL << RCC_APB2RSTR_TIM11RST_Pos) /*!< 0x00040000 */
-#define RCC_APB2RSTR_TIM11RST RCC_APB2RSTR_TIM11RST_Msk
-
-/* Old SPI1RST bit definition, maintained for legacy purpose */
-#define RCC_APB2RSTR_SPI1 RCC_APB2RSTR_SPI1RST
-
-/******************** Bit definition for RCC_AHB1ENR register ***************/
-#define RCC_AHB1ENR_GPIOAEN_Pos (0U)
-#define RCC_AHB1ENR_GPIOAEN_Msk (0x1UL << RCC_AHB1ENR_GPIOAEN_Pos) /*!< 0x00000001 */
-#define RCC_AHB1ENR_GPIOAEN RCC_AHB1ENR_GPIOAEN_Msk
-#define RCC_AHB1ENR_GPIOBEN_Pos (1U)
-#define RCC_AHB1ENR_GPIOBEN_Msk (0x1UL << RCC_AHB1ENR_GPIOBEN_Pos) /*!< 0x00000002 */
-#define RCC_AHB1ENR_GPIOBEN RCC_AHB1ENR_GPIOBEN_Msk
-#define RCC_AHB1ENR_GPIOCEN_Pos (2U)
-#define RCC_AHB1ENR_GPIOCEN_Msk (0x1UL << RCC_AHB1ENR_GPIOCEN_Pos) /*!< 0x00000004 */
-#define RCC_AHB1ENR_GPIOCEN RCC_AHB1ENR_GPIOCEN_Msk
-#define RCC_AHB1ENR_GPIODEN_Pos (3U)
-#define RCC_AHB1ENR_GPIODEN_Msk (0x1UL << RCC_AHB1ENR_GPIODEN_Pos) /*!< 0x00000008 */
-#define RCC_AHB1ENR_GPIODEN RCC_AHB1ENR_GPIODEN_Msk
-#define RCC_AHB1ENR_GPIOEEN_Pos (4U)
-#define RCC_AHB1ENR_GPIOEEN_Msk (0x1UL << RCC_AHB1ENR_GPIOEEN_Pos) /*!< 0x00000010 */
-#define RCC_AHB1ENR_GPIOEEN RCC_AHB1ENR_GPIOEEN_Msk
-#define RCC_AHB1ENR_GPIOHEN_Pos (7U)
-#define RCC_AHB1ENR_GPIOHEN_Msk (0x1UL << RCC_AHB1ENR_GPIOHEN_Pos) /*!< 0x00000080 */
-#define RCC_AHB1ENR_GPIOHEN RCC_AHB1ENR_GPIOHEN_Msk
-#define RCC_AHB1ENR_CRCEN_Pos (12U)
-#define RCC_AHB1ENR_CRCEN_Msk (0x1UL << RCC_AHB1ENR_CRCEN_Pos) /*!< 0x00001000 */
-#define RCC_AHB1ENR_CRCEN RCC_AHB1ENR_CRCEN_Msk
-#define RCC_AHB1ENR_DMA1EN_Pos (21U)
-#define RCC_AHB1ENR_DMA1EN_Msk (0x1UL << RCC_AHB1ENR_DMA1EN_Pos) /*!< 0x00200000 */
-#define RCC_AHB1ENR_DMA1EN RCC_AHB1ENR_DMA1EN_Msk
-#define RCC_AHB1ENR_DMA2EN_Pos (22U)
-#define RCC_AHB1ENR_DMA2EN_Msk (0x1UL << RCC_AHB1ENR_DMA2EN_Pos) /*!< 0x00400000 */
-#define RCC_AHB1ENR_DMA2EN RCC_AHB1ENR_DMA2EN_Msk
-/******************** Bit definition for RCC_AHB2ENR register ***************/
-/*
- * @brief Specific device feature definitions (not present on all devices in the STM32F4 serie)
- */
-#define RCC_AHB2_SUPPORT /*!< AHB2 Bus is supported */
-
-#define RCC_AHB2ENR_OTGFSEN_Pos (7U)
-#define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
-#define RCC_AHB2ENR_OTGFSEN RCC_AHB2ENR_OTGFSEN_Msk
-
-/******************** Bit definition for RCC_APB1ENR register ***************/
-#define RCC_APB1ENR_TIM2EN_Pos (0U)
-#define RCC_APB1ENR_TIM2EN_Msk (0x1UL << RCC_APB1ENR_TIM2EN_Pos) /*!< 0x00000001 */
-#define RCC_APB1ENR_TIM2EN RCC_APB1ENR_TIM2EN_Msk
-#define RCC_APB1ENR_TIM3EN_Pos (1U)
-#define RCC_APB1ENR_TIM3EN_Msk (0x1UL << RCC_APB1ENR_TIM3EN_Pos) /*!< 0x00000002 */
-#define RCC_APB1ENR_TIM3EN RCC_APB1ENR_TIM3EN_Msk
-#define RCC_APB1ENR_TIM4EN_Pos (2U)
-#define RCC_APB1ENR_TIM4EN_Msk (0x1UL << RCC_APB1ENR_TIM4EN_Pos) /*!< 0x00000004 */
-#define RCC_APB1ENR_TIM4EN RCC_APB1ENR_TIM4EN_Msk
-#define RCC_APB1ENR_TIM5EN_Pos (3U)
-#define RCC_APB1ENR_TIM5EN_Msk (0x1UL << RCC_APB1ENR_TIM5EN_Pos) /*!< 0x00000008 */
-#define RCC_APB1ENR_TIM5EN RCC_APB1ENR_TIM5EN_Msk
-#define RCC_APB1ENR_WWDGEN_Pos (11U)
-#define RCC_APB1ENR_WWDGEN_Msk (0x1UL << RCC_APB1ENR_WWDGEN_Pos) /*!< 0x00000800 */
-#define RCC_APB1ENR_WWDGEN RCC_APB1ENR_WWDGEN_Msk
-#define RCC_APB1ENR_SPI2EN_Pos (14U)
-#define RCC_APB1ENR_SPI2EN_Msk (0x1UL << RCC_APB1ENR_SPI2EN_Pos) /*!< 0x00004000 */
-#define RCC_APB1ENR_SPI2EN RCC_APB1ENR_SPI2EN_Msk
-#define RCC_APB1ENR_SPI3EN_Pos (15U)
-#define RCC_APB1ENR_SPI3EN_Msk (0x1UL << RCC_APB1ENR_SPI3EN_Pos) /*!< 0x00008000 */
-#define RCC_APB1ENR_SPI3EN RCC_APB1ENR_SPI3EN_Msk
-#define RCC_APB1ENR_USART2EN_Pos (17U)
-#define RCC_APB1ENR_USART2EN_Msk (0x1UL << RCC_APB1ENR_USART2EN_Pos) /*!< 0x00020000 */
-#define RCC_APB1ENR_USART2EN RCC_APB1ENR_USART2EN_Msk
-#define RCC_APB1ENR_I2C1EN_Pos (21U)
-#define RCC_APB1ENR_I2C1EN_Msk (0x1UL << RCC_APB1ENR_I2C1EN_Pos) /*!< 0x00200000 */
-#define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk
-#define RCC_APB1ENR_I2C2EN_Pos (22U)
-#define RCC_APB1ENR_I2C2EN_Msk (0x1UL << RCC_APB1ENR_I2C2EN_Pos) /*!< 0x00400000 */
-#define RCC_APB1ENR_I2C2EN RCC_APB1ENR_I2C2EN_Msk
-#define RCC_APB1ENR_I2C3EN_Pos (23U)
-#define RCC_APB1ENR_I2C3EN_Msk (0x1UL << RCC_APB1ENR_I2C3EN_Pos) /*!< 0x00800000 */
-#define RCC_APB1ENR_I2C3EN RCC_APB1ENR_I2C3EN_Msk
-#define RCC_APB1ENR_PWREN_Pos (28U)
-#define RCC_APB1ENR_PWREN_Msk (0x1UL << RCC_APB1ENR_PWREN_Pos) /*!< 0x10000000 */
-#define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk
-
-/******************** Bit definition for RCC_APB2ENR register ***************/
-#define RCC_APB2ENR_TIM1EN_Pos (0U)
-#define RCC_APB2ENR_TIM1EN_Msk (0x1UL << RCC_APB2ENR_TIM1EN_Pos) /*!< 0x00000001 */
-#define RCC_APB2ENR_TIM1EN RCC_APB2ENR_TIM1EN_Msk
-#define RCC_APB2ENR_USART1EN_Pos (4U)
-#define RCC_APB2ENR_USART1EN_Msk (0x1UL << RCC_APB2ENR_USART1EN_Pos) /*!< 0x00000010 */
-#define RCC_APB2ENR_USART1EN RCC_APB2ENR_USART1EN_Msk
-#define RCC_APB2ENR_USART6EN_Pos (5U)
-#define RCC_APB2ENR_USART6EN_Msk (0x1UL << RCC_APB2ENR_USART6EN_Pos) /*!< 0x00000020 */
-#define RCC_APB2ENR_USART6EN RCC_APB2ENR_USART6EN_Msk
-#define RCC_APB2ENR_ADC1EN_Pos (8U)
-#define RCC_APB2ENR_ADC1EN_Msk (0x1UL << RCC_APB2ENR_ADC1EN_Pos) /*!< 0x00000100 */
-#define RCC_APB2ENR_ADC1EN RCC_APB2ENR_ADC1EN_Msk
-#define RCC_APB2ENR_SDIOEN_Pos (11U)
-#define RCC_APB2ENR_SDIOEN_Msk (0x1UL << RCC_APB2ENR_SDIOEN_Pos) /*!< 0x00000800 */
-#define RCC_APB2ENR_SDIOEN RCC_APB2ENR_SDIOEN_Msk
-#define RCC_APB2ENR_SPI1EN_Pos (12U)
-#define RCC_APB2ENR_SPI1EN_Msk (0x1UL << RCC_APB2ENR_SPI1EN_Pos) /*!< 0x00001000 */
-#define RCC_APB2ENR_SPI1EN RCC_APB2ENR_SPI1EN_Msk
-#define RCC_APB2ENR_SPI4EN_Pos (13U)
-#define RCC_APB2ENR_SPI4EN_Msk (0x1UL << RCC_APB2ENR_SPI4EN_Pos) /*!< 0x00002000 */
-#define RCC_APB2ENR_SPI4EN RCC_APB2ENR_SPI4EN_Msk
-#define RCC_APB2ENR_SYSCFGEN_Pos (14U)
-#define RCC_APB2ENR_SYSCFGEN_Msk (0x1UL << RCC_APB2ENR_SYSCFGEN_Pos) /*!< 0x00004000 */
-#define RCC_APB2ENR_SYSCFGEN RCC_APB2ENR_SYSCFGEN_Msk
-#define RCC_APB2ENR_TIM9EN_Pos (16U)
-#define RCC_APB2ENR_TIM9EN_Msk (0x1UL << RCC_APB2ENR_TIM9EN_Pos) /*!< 0x00010000 */
-#define RCC_APB2ENR_TIM9EN RCC_APB2ENR_TIM9EN_Msk
-#define RCC_APB2ENR_TIM10EN_Pos (17U)
-#define RCC_APB2ENR_TIM10EN_Msk (0x1UL << RCC_APB2ENR_TIM10EN_Pos) /*!< 0x00020000 */
-#define RCC_APB2ENR_TIM10EN RCC_APB2ENR_TIM10EN_Msk
-#define RCC_APB2ENR_TIM11EN_Pos (18U)
-#define RCC_APB2ENR_TIM11EN_Msk (0x1UL << RCC_APB2ENR_TIM11EN_Pos) /*!< 0x00040000 */
-#define RCC_APB2ENR_TIM11EN RCC_APB2ENR_TIM11EN_Msk
-
-/******************** Bit definition for RCC_AHB1LPENR register *************/
-#define RCC_AHB1LPENR_GPIOALPEN_Pos (0U)
-#define RCC_AHB1LPENR_GPIOALPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOALPEN_Pos) /*!< 0x00000001 */
-#define RCC_AHB1LPENR_GPIOALPEN RCC_AHB1LPENR_GPIOALPEN_Msk
-#define RCC_AHB1LPENR_GPIOBLPEN_Pos (1U)
-#define RCC_AHB1LPENR_GPIOBLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOBLPEN_Pos) /*!< 0x00000002 */
-#define RCC_AHB1LPENR_GPIOBLPEN RCC_AHB1LPENR_GPIOBLPEN_Msk
-#define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U)
-#define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
-#define RCC_AHB1LPENR_GPIOCLPEN RCC_AHB1LPENR_GPIOCLPEN_Msk
-#define RCC_AHB1LPENR_GPIODLPEN_Pos (3U)
-#define RCC_AHB1LPENR_GPIODLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIODLPEN_Pos) /*!< 0x00000008 */
-#define RCC_AHB1LPENR_GPIODLPEN RCC_AHB1LPENR_GPIODLPEN_Msk
-#define RCC_AHB1LPENR_GPIOELPEN_Pos (4U)
-#define RCC_AHB1LPENR_GPIOELPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOELPEN_Pos) /*!< 0x00000010 */
-#define RCC_AHB1LPENR_GPIOELPEN RCC_AHB1LPENR_GPIOELPEN_Msk
-#define RCC_AHB1LPENR_GPIOHLPEN_Pos (7U)
-#define RCC_AHB1LPENR_GPIOHLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOHLPEN_Pos) /*!< 0x00000080 */
-#define RCC_AHB1LPENR_GPIOHLPEN RCC_AHB1LPENR_GPIOHLPEN_Msk
-#define RCC_AHB1LPENR_CRCLPEN_Pos (12U)
-#define RCC_AHB1LPENR_CRCLPEN_Msk (0x1UL << RCC_AHB1LPENR_CRCLPEN_Pos) /*!< 0x00001000 */
-#define RCC_AHB1LPENR_CRCLPEN RCC_AHB1LPENR_CRCLPEN_Msk
-#define RCC_AHB1LPENR_FLITFLPEN_Pos (15U)
-#define RCC_AHB1LPENR_FLITFLPEN_Msk (0x1UL << RCC_AHB1LPENR_FLITFLPEN_Pos) /*!< 0x00008000 */
-#define RCC_AHB1LPENR_FLITFLPEN RCC_AHB1LPENR_FLITFLPEN_Msk
-#define RCC_AHB1LPENR_SRAM1LPEN_Pos (16U)
-#define RCC_AHB1LPENR_SRAM1LPEN_Msk (0x1UL << RCC_AHB1LPENR_SRAM1LPEN_Pos) /*!< 0x00010000 */
-#define RCC_AHB1LPENR_SRAM1LPEN RCC_AHB1LPENR_SRAM1LPEN_Msk
-#define RCC_AHB1LPENR_DMA1LPEN_Pos (21U)
-#define RCC_AHB1LPENR_DMA1LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA1LPEN_Pos) /*!< 0x00200000 */
-#define RCC_AHB1LPENR_DMA1LPEN RCC_AHB1LPENR_DMA1LPEN_Msk
-#define RCC_AHB1LPENR_DMA2LPEN_Pos (22U)
-#define RCC_AHB1LPENR_DMA2LPEN_Msk (0x1UL << RCC_AHB1LPENR_DMA2LPEN_Pos) /*!< 0x00400000 */
-#define RCC_AHB1LPENR_DMA2LPEN RCC_AHB1LPENR_DMA2LPEN_Msk
-
-
-/******************** Bit definition for RCC_AHB2LPENR register *************/
-#define RCC_AHB2LPENR_OTGFSLPEN_Pos (7U)
-#define RCC_AHB2LPENR_OTGFSLPEN_Msk (0x1UL << RCC_AHB2LPENR_OTGFSLPEN_Pos) /*!< 0x00000080 */
-#define RCC_AHB2LPENR_OTGFSLPEN RCC_AHB2LPENR_OTGFSLPEN_Msk
-
-/******************** Bit definition for RCC_AHB3LPENR register *************/
-
-/******************** Bit definition for RCC_APB1LPENR register *************/
-#define RCC_APB1LPENR_TIM2LPEN_Pos (0U)
-#define RCC_APB1LPENR_TIM2LPEN_Msk (0x1UL << RCC_APB1LPENR_TIM2LPEN_Pos) /*!< 0x00000001 */
-#define RCC_APB1LPENR_TIM2LPEN RCC_APB1LPENR_TIM2LPEN_Msk
-#define RCC_APB1LPENR_TIM3LPEN_Pos (1U)
-#define RCC_APB1LPENR_TIM3LPEN_Msk (0x1UL << RCC_APB1LPENR_TIM3LPEN_Pos) /*!< 0x00000002 */
-#define RCC_APB1LPENR_TIM3LPEN RCC_APB1LPENR_TIM3LPEN_Msk
-#define RCC_APB1LPENR_TIM4LPEN_Pos (2U)
-#define RCC_APB1LPENR_TIM4LPEN_Msk (0x1UL << RCC_APB1LPENR_TIM4LPEN_Pos) /*!< 0x00000004 */
-#define RCC_APB1LPENR_TIM4LPEN RCC_APB1LPENR_TIM4LPEN_Msk
-#define RCC_APB1LPENR_TIM5LPEN_Pos (3U)
-#define RCC_APB1LPENR_TIM5LPEN_Msk (0x1UL << RCC_APB1LPENR_TIM5LPEN_Pos) /*!< 0x00000008 */
-#define RCC_APB1LPENR_TIM5LPEN RCC_APB1LPENR_TIM5LPEN_Msk
-#define RCC_APB1LPENR_WWDGLPEN_Pos (11U)
-#define RCC_APB1LPENR_WWDGLPEN_Msk (0x1UL << RCC_APB1LPENR_WWDGLPEN_Pos) /*!< 0x00000800 */
-#define RCC_APB1LPENR_WWDGLPEN RCC_APB1LPENR_WWDGLPEN_Msk
-#define RCC_APB1LPENR_SPI2LPEN_Pos (14U)
-#define RCC_APB1LPENR_SPI2LPEN_Msk (0x1UL << RCC_APB1LPENR_SPI2LPEN_Pos) /*!< 0x00004000 */
-#define RCC_APB1LPENR_SPI2LPEN RCC_APB1LPENR_SPI2LPEN_Msk
-#define RCC_APB1LPENR_SPI3LPEN_Pos (15U)
-#define RCC_APB1LPENR_SPI3LPEN_Msk (0x1UL << RCC_APB1LPENR_SPI3LPEN_Pos) /*!< 0x00008000 */
-#define RCC_APB1LPENR_SPI3LPEN RCC_APB1LPENR_SPI3LPEN_Msk
-#define RCC_APB1LPENR_USART2LPEN_Pos (17U)
-#define RCC_APB1LPENR_USART2LPEN_Msk (0x1UL << RCC_APB1LPENR_USART2LPEN_Pos) /*!< 0x00020000 */
-#define RCC_APB1LPENR_USART2LPEN RCC_APB1LPENR_USART2LPEN_Msk
-#define RCC_APB1LPENR_I2C1LPEN_Pos (21U)
-#define RCC_APB1LPENR_I2C1LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C1LPEN_Pos) /*!< 0x00200000 */
-#define RCC_APB1LPENR_I2C1LPEN RCC_APB1LPENR_I2C1LPEN_Msk
-#define RCC_APB1LPENR_I2C2LPEN_Pos (22U)
-#define RCC_APB1LPENR_I2C2LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C2LPEN_Pos) /*!< 0x00400000 */
-#define RCC_APB1LPENR_I2C2LPEN RCC_APB1LPENR_I2C2LPEN_Msk
-#define RCC_APB1LPENR_I2C3LPEN_Pos (23U)
-#define RCC_APB1LPENR_I2C3LPEN_Msk (0x1UL << RCC_APB1LPENR_I2C3LPEN_Pos) /*!< 0x00800000 */
-#define RCC_APB1LPENR_I2C3LPEN RCC_APB1LPENR_I2C3LPEN_Msk
-#define RCC_APB1LPENR_PWRLPEN_Pos (28U)
-#define RCC_APB1LPENR_PWRLPEN_Msk (0x1UL << RCC_APB1LPENR_PWRLPEN_Pos) /*!< 0x10000000 */
-#define RCC_APB1LPENR_PWRLPEN RCC_APB1LPENR_PWRLPEN_Msk
-
-/******************** Bit definition for RCC_APB2LPENR register *************/
-#define RCC_APB2LPENR_TIM1LPEN_Pos (0U)
-#define RCC_APB2LPENR_TIM1LPEN_Msk (0x1UL << RCC_APB2LPENR_TIM1LPEN_Pos) /*!< 0x00000001 */
-#define RCC_APB2LPENR_TIM1LPEN RCC_APB2LPENR_TIM1LPEN_Msk
-#define RCC_APB2LPENR_USART1LPEN_Pos (4U)
-#define RCC_APB2LPENR_USART1LPEN_Msk (0x1UL << RCC_APB2LPENR_USART1LPEN_Pos) /*!< 0x00000010 */
-#define RCC_APB2LPENR_USART1LPEN RCC_APB2LPENR_USART1LPEN_Msk
-#define RCC_APB2LPENR_USART6LPEN_Pos (5U)
-#define RCC_APB2LPENR_USART6LPEN_Msk (0x1UL << RCC_APB2LPENR_USART6LPEN_Pos) /*!< 0x00000020 */
-#define RCC_APB2LPENR_USART6LPEN RCC_APB2LPENR_USART6LPEN_Msk
-#define RCC_APB2LPENR_ADC1LPEN_Pos (8U)
-#define RCC_APB2LPENR_ADC1LPEN_Msk (0x1UL << RCC_APB2LPENR_ADC1LPEN_Pos) /*!< 0x00000100 */
-#define RCC_APB2LPENR_ADC1LPEN RCC_APB2LPENR_ADC1LPEN_Msk
-#define RCC_APB2LPENR_SDIOLPEN_Pos (11U)
-#define RCC_APB2LPENR_SDIOLPEN_Msk (0x1UL << RCC_APB2LPENR_SDIOLPEN_Pos) /*!< 0x00000800 */
-#define RCC_APB2LPENR_SDIOLPEN RCC_APB2LPENR_SDIOLPEN_Msk
-#define RCC_APB2LPENR_SPI1LPEN_Pos (12U)
-#define RCC_APB2LPENR_SPI1LPEN_Msk (0x1UL << RCC_APB2LPENR_SPI1LPEN_Pos) /*!< 0x00001000 */
-#define RCC_APB2LPENR_SPI1LPEN RCC_APB2LPENR_SPI1LPEN_Msk
-#define RCC_APB2LPENR_SPI4LPEN_Pos (13U)
-#define RCC_APB2LPENR_SPI4LPEN_Msk (0x1UL << RCC_APB2LPENR_SPI4LPEN_Pos) /*!< 0x00002000 */
-#define RCC_APB2LPENR_SPI4LPEN RCC_APB2LPENR_SPI4LPEN_Msk
-#define RCC_APB2LPENR_SYSCFGLPEN_Pos (14U)
-#define RCC_APB2LPENR_SYSCFGLPEN_Msk (0x1UL << RCC_APB2LPENR_SYSCFGLPEN_Pos) /*!< 0x00004000 */
-#define RCC_APB2LPENR_SYSCFGLPEN RCC_APB2LPENR_SYSCFGLPEN_Msk
-#define RCC_APB2LPENR_TIM9LPEN_Pos (16U)
-#define RCC_APB2LPENR_TIM9LPEN_Msk (0x1UL << RCC_APB2LPENR_TIM9LPEN_Pos) /*!< 0x00010000 */
-#define RCC_APB2LPENR_TIM9LPEN RCC_APB2LPENR_TIM9LPEN_Msk
-#define RCC_APB2LPENR_TIM10LPEN_Pos (17U)
-#define RCC_APB2LPENR_TIM10LPEN_Msk (0x1UL << RCC_APB2LPENR_TIM10LPEN_Pos) /*!< 0x00020000 */
-#define RCC_APB2LPENR_TIM10LPEN RCC_APB2LPENR_TIM10LPEN_Msk
-#define RCC_APB2LPENR_TIM11LPEN_Pos (18U)
-#define RCC_APB2LPENR_TIM11LPEN_Msk (0x1UL << RCC_APB2LPENR_TIM11LPEN_Pos) /*!< 0x00040000 */
-#define RCC_APB2LPENR_TIM11LPEN RCC_APB2LPENR_TIM11LPEN_Msk
-
-/******************** Bit definition for RCC_BDCR register ******************/
-#define RCC_BDCR_LSEON_Pos (0U)
-#define RCC_BDCR_LSEON_Msk (0x1UL << RCC_BDCR_LSEON_Pos) /*!< 0x00000001 */
-#define RCC_BDCR_LSEON RCC_BDCR_LSEON_Msk
-#define RCC_BDCR_LSERDY_Pos (1U)
-#define RCC_BDCR_LSERDY_Msk (0x1UL << RCC_BDCR_LSERDY_Pos) /*!< 0x00000002 */
-#define RCC_BDCR_LSERDY RCC_BDCR_LSERDY_Msk
-#define RCC_BDCR_LSEBYP_Pos (2U)
-#define RCC_BDCR_LSEBYP_Msk (0x1UL << RCC_BDCR_LSEBYP_Pos) /*!< 0x00000004 */
-#define RCC_BDCR_LSEBYP RCC_BDCR_LSEBYP_Msk
-
-#define RCC_BDCR_RTCSEL_Pos (8U)
-#define RCC_BDCR_RTCSEL_Msk (0x3UL << RCC_BDCR_RTCSEL_Pos) /*!< 0x00000300 */
-#define RCC_BDCR_RTCSEL RCC_BDCR_RTCSEL_Msk
-#define RCC_BDCR_RTCSEL_0 (0x1UL << RCC_BDCR_RTCSEL_Pos) /*!< 0x00000100 */
-#define RCC_BDCR_RTCSEL_1 (0x2UL << RCC_BDCR_RTCSEL_Pos) /*!< 0x00000200 */
-
-#define RCC_BDCR_RTCEN_Pos (15U)
-#define RCC_BDCR_RTCEN_Msk (0x1UL << RCC_BDCR_RTCEN_Pos) /*!< 0x00008000 */
-#define RCC_BDCR_RTCEN RCC_BDCR_RTCEN_Msk
-#define RCC_BDCR_BDRST_Pos (16U)
-#define RCC_BDCR_BDRST_Msk (0x1UL << RCC_BDCR_BDRST_Pos) /*!< 0x00010000 */
-#define RCC_BDCR_BDRST RCC_BDCR_BDRST_Msk
-
-/******************** Bit definition for RCC_CSR register *******************/
-#define RCC_CSR_LSION_Pos (0U)
-#define RCC_CSR_LSION_Msk (0x1UL << RCC_CSR_LSION_Pos) /*!< 0x00000001 */
-#define RCC_CSR_LSION RCC_CSR_LSION_Msk
-#define RCC_CSR_LSIRDY_Pos (1U)
-#define RCC_CSR_LSIRDY_Msk (0x1UL << RCC_CSR_LSIRDY_Pos) /*!< 0x00000002 */
-#define RCC_CSR_LSIRDY RCC_CSR_LSIRDY_Msk
-#define RCC_CSR_RMVF_Pos (24U)
-#define RCC_CSR_RMVF_Msk (0x1UL << RCC_CSR_RMVF_Pos) /*!< 0x01000000 */
-#define RCC_CSR_RMVF RCC_CSR_RMVF_Msk
-#define RCC_CSR_BORRSTF_Pos (25U)
-#define RCC_CSR_BORRSTF_Msk (0x1UL << RCC_CSR_BORRSTF_Pos) /*!< 0x02000000 */
-#define RCC_CSR_BORRSTF RCC_CSR_BORRSTF_Msk
-#define RCC_CSR_PINRSTF_Pos (26U)
-#define RCC_CSR_PINRSTF_Msk (0x1UL << RCC_CSR_PINRSTF_Pos) /*!< 0x04000000 */
-#define RCC_CSR_PINRSTF RCC_CSR_PINRSTF_Msk
-#define RCC_CSR_PORRSTF_Pos (27U)
-#define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
-#define RCC_CSR_PORRSTF RCC_CSR_PORRSTF_Msk
-#define RCC_CSR_SFTRSTF_Pos (28U)
-#define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
-#define RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF_Msk
-#define RCC_CSR_IWDGRSTF_Pos (29U)
-#define RCC_CSR_IWDGRSTF_Msk (0x1UL << RCC_CSR_IWDGRSTF_Pos) /*!< 0x20000000 */
-#define RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF_Msk
-#define RCC_CSR_WWDGRSTF_Pos (30U)
-#define RCC_CSR_WWDGRSTF_Msk (0x1UL << RCC_CSR_WWDGRSTF_Pos) /*!< 0x40000000 */
-#define RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF_Msk
-#define RCC_CSR_LPWRRSTF_Pos (31U)
-#define RCC_CSR_LPWRRSTF_Msk (0x1UL << RCC_CSR_LPWRRSTF_Pos) /*!< 0x80000000 */
-#define RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF_Msk
-/* Legacy defines */
-#define RCC_CSR_PADRSTF RCC_CSR_PINRSTF
-#define RCC_CSR_WDGRSTF RCC_CSR_IWDGRSTF
-
-/******************** Bit definition for RCC_SSCGR register *****************/
-#define RCC_SSCGR_MODPER_Pos (0U)
-#define RCC_SSCGR_MODPER_Msk (0x1FFFUL << RCC_SSCGR_MODPER_Pos) /*!< 0x00001FFF */
-#define RCC_SSCGR_MODPER RCC_SSCGR_MODPER_Msk
-#define RCC_SSCGR_INCSTEP_Pos (13U)
-#define RCC_SSCGR_INCSTEP_Msk (0x7FFFUL << RCC_SSCGR_INCSTEP_Pos) /*!< 0x0FFFE000 */
-#define RCC_SSCGR_INCSTEP RCC_SSCGR_INCSTEP_Msk
-#define RCC_SSCGR_SPREADSEL_Pos (30U)
-#define RCC_SSCGR_SPREADSEL_Msk (0x1UL << RCC_SSCGR_SPREADSEL_Pos) /*!< 0x40000000 */
-#define RCC_SSCGR_SPREADSEL RCC_SSCGR_SPREADSEL_Msk
-#define RCC_SSCGR_SSCGEN_Pos (31U)
-#define RCC_SSCGR_SSCGEN_Msk (0x1UL << RCC_SSCGR_SSCGEN_Pos) /*!< 0x80000000 */
-#define RCC_SSCGR_SSCGEN RCC_SSCGR_SSCGEN_Msk
-
-/******************** Bit definition for RCC_PLLI2SCFGR register ************/
-#define RCC_PLLI2SCFGR_PLLI2SN_Pos (6U)
-#define RCC_PLLI2SCFGR_PLLI2SN_Msk (0x1FFUL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00007FC0 */
-#define RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN_Msk
-#define RCC_PLLI2SCFGR_PLLI2SN_0 (0x001UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000040 */
-#define RCC_PLLI2SCFGR_PLLI2SN_1 (0x002UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000080 */
-#define RCC_PLLI2SCFGR_PLLI2SN_2 (0x004UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000100 */
-#define RCC_PLLI2SCFGR_PLLI2SN_3 (0x008UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000200 */
-#define RCC_PLLI2SCFGR_PLLI2SN_4 (0x010UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000400 */
-#define RCC_PLLI2SCFGR_PLLI2SN_5 (0x020UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00000800 */
-#define RCC_PLLI2SCFGR_PLLI2SN_6 (0x040UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00001000 */
-#define RCC_PLLI2SCFGR_PLLI2SN_7 (0x080UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00002000 */
-#define RCC_PLLI2SCFGR_PLLI2SN_8 (0x100UL << RCC_PLLI2SCFGR_PLLI2SN_Pos) /*!< 0x00004000 */
-
-#define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U)
-#define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
-#define RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR_Msk
-#define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
-#define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
-#define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
-
-/******************** Bit definition for RCC_DCKCFGR register ***************/
-
-#define RCC_DCKCFGR_TIMPRE_Pos (24U)
-#define RCC_DCKCFGR_TIMPRE_Msk (0x1UL << RCC_DCKCFGR_TIMPRE_Pos) /*!< 0x01000000 */
-#define RCC_DCKCFGR_TIMPRE RCC_DCKCFGR_TIMPRE_Msk
-
-
-/******************************************************************************/
-/* */
-/* Real-Time Clock (RTC) */
-/* */
-/******************************************************************************/
-/******************** Bits definition for RTC_TR register *******************/
-#define RTC_TR_PM_Pos (22U)
-#define RTC_TR_PM_Msk (0x1UL << RTC_TR_PM_Pos) /*!< 0x00400000 */
-#define RTC_TR_PM RTC_TR_PM_Msk
-#define RTC_TR_HT_Pos (20U)
-#define RTC_TR_HT_Msk (0x3UL << RTC_TR_HT_Pos) /*!< 0x00300000 */
-#define RTC_TR_HT RTC_TR_HT_Msk
-#define RTC_TR_HT_0 (0x1UL << RTC_TR_HT_Pos) /*!< 0x00100000 */
-#define RTC_TR_HT_1 (0x2UL << RTC_TR_HT_Pos) /*!< 0x00200000 */
-#define RTC_TR_HU_Pos (16U)
-#define RTC_TR_HU_Msk (0xFUL << RTC_TR_HU_Pos) /*!< 0x000F0000 */
-#define RTC_TR_HU RTC_TR_HU_Msk
-#define RTC_TR_HU_0 (0x1UL << RTC_TR_HU_Pos) /*!< 0x00010000 */
-#define RTC_TR_HU_1 (0x2UL << RTC_TR_HU_Pos) /*!< 0x00020000 */
-#define RTC_TR_HU_2 (0x4UL << RTC_TR_HU_Pos) /*!< 0x00040000 */
-#define RTC_TR_HU_3 (0x8UL << RTC_TR_HU_Pos) /*!< 0x00080000 */
-#define RTC_TR_MNT_Pos (12U)
-#define RTC_TR_MNT_Msk (0x7UL << RTC_TR_MNT_Pos) /*!< 0x00007000 */
-#define RTC_TR_MNT RTC_TR_MNT_Msk
-#define RTC_TR_MNT_0 (0x1UL << RTC_TR_MNT_Pos) /*!< 0x00001000 */
-#define RTC_TR_MNT_1 (0x2UL << RTC_TR_MNT_Pos) /*!< 0x00002000 */
-#define RTC_TR_MNT_2 (0x4UL << RTC_TR_MNT_Pos) /*!< 0x00004000 */
-#define RTC_TR_MNU_Pos (8U)
-#define RTC_TR_MNU_Msk (0xFUL << RTC_TR_MNU_Pos) /*!< 0x00000F00 */
-#define RTC_TR_MNU RTC_TR_MNU_Msk
-#define RTC_TR_MNU_0 (0x1UL << RTC_TR_MNU_Pos) /*!< 0x00000100 */
-#define RTC_TR_MNU_1 (0x2UL << RTC_TR_MNU_Pos) /*!< 0x00000200 */
-#define RTC_TR_MNU_2 (0x4UL << RTC_TR_MNU_Pos) /*!< 0x00000400 */
-#define RTC_TR_MNU_3 (0x8UL << RTC_TR_MNU_Pos) /*!< 0x00000800 */
-#define RTC_TR_ST_Pos (4U)
-#define RTC_TR_ST_Msk (0x7UL << RTC_TR_ST_Pos) /*!< 0x00000070 */
-#define RTC_TR_ST RTC_TR_ST_Msk
-#define RTC_TR_ST_0 (0x1UL << RTC_TR_ST_Pos) /*!< 0x00000010 */
-#define RTC_TR_ST_1 (0x2UL << RTC_TR_ST_Pos) /*!< 0x00000020 */
-#define RTC_TR_ST_2 (0x4UL << RTC_TR_ST_Pos) /*!< 0x00000040 */
-#define RTC_TR_SU_Pos (0U)
-#define RTC_TR_SU_Msk (0xFUL << RTC_TR_SU_Pos) /*!< 0x0000000F */
-#define RTC_TR_SU RTC_TR_SU_Msk
-#define RTC_TR_SU_0 (0x1UL << RTC_TR_SU_Pos) /*!< 0x00000001 */
-#define RTC_TR_SU_1 (0x2UL << RTC_TR_SU_Pos) /*!< 0x00000002 */
-#define RTC_TR_SU_2 (0x4UL << RTC_TR_SU_Pos) /*!< 0x00000004 */
-#define RTC_TR_SU_3 (0x8UL << RTC_TR_SU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_DR register *******************/
-#define RTC_DR_YT_Pos (20U)
-#define RTC_DR_YT_Msk (0xFUL << RTC_DR_YT_Pos) /*!< 0x00F00000 */
-#define RTC_DR_YT RTC_DR_YT_Msk
-#define RTC_DR_YT_0 (0x1UL << RTC_DR_YT_Pos) /*!< 0x00100000 */
-#define RTC_DR_YT_1 (0x2UL << RTC_DR_YT_Pos) /*!< 0x00200000 */
-#define RTC_DR_YT_2 (0x4UL << RTC_DR_YT_Pos) /*!< 0x00400000 */
-#define RTC_DR_YT_3 (0x8UL << RTC_DR_YT_Pos) /*!< 0x00800000 */
-#define RTC_DR_YU_Pos (16U)
-#define RTC_DR_YU_Msk (0xFUL << RTC_DR_YU_Pos) /*!< 0x000F0000 */
-#define RTC_DR_YU RTC_DR_YU_Msk
-#define RTC_DR_YU_0 (0x1UL << RTC_DR_YU_Pos) /*!< 0x00010000 */
-#define RTC_DR_YU_1 (0x2UL << RTC_DR_YU_Pos) /*!< 0x00020000 */
-#define RTC_DR_YU_2 (0x4UL << RTC_DR_YU_Pos) /*!< 0x00040000 */
-#define RTC_DR_YU_3 (0x8UL << RTC_DR_YU_Pos) /*!< 0x00080000 */
-#define RTC_DR_WDU_Pos (13U)
-#define RTC_DR_WDU_Msk (0x7UL << RTC_DR_WDU_Pos) /*!< 0x0000E000 */
-#define RTC_DR_WDU RTC_DR_WDU_Msk
-#define RTC_DR_WDU_0 (0x1UL << RTC_DR_WDU_Pos) /*!< 0x00002000 */
-#define RTC_DR_WDU_1 (0x2UL << RTC_DR_WDU_Pos) /*!< 0x00004000 */
-#define RTC_DR_WDU_2 (0x4UL << RTC_DR_WDU_Pos) /*!< 0x00008000 */
-#define RTC_DR_MT_Pos (12U)
-#define RTC_DR_MT_Msk (0x1UL << RTC_DR_MT_Pos) /*!< 0x00001000 */
-#define RTC_DR_MT RTC_DR_MT_Msk
-#define RTC_DR_MU_Pos (8U)
-#define RTC_DR_MU_Msk (0xFUL << RTC_DR_MU_Pos) /*!< 0x00000F00 */
-#define RTC_DR_MU RTC_DR_MU_Msk
-#define RTC_DR_MU_0 (0x1UL << RTC_DR_MU_Pos) /*!< 0x00000100 */
-#define RTC_DR_MU_1 (0x2UL << RTC_DR_MU_Pos) /*!< 0x00000200 */
-#define RTC_DR_MU_2 (0x4UL << RTC_DR_MU_Pos) /*!< 0x00000400 */
-#define RTC_DR_MU_3 (0x8UL << RTC_DR_MU_Pos) /*!< 0x00000800 */
-#define RTC_DR_DT_Pos (4U)
-#define RTC_DR_DT_Msk (0x3UL << RTC_DR_DT_Pos) /*!< 0x00000030 */
-#define RTC_DR_DT RTC_DR_DT_Msk
-#define RTC_DR_DT_0 (0x1UL << RTC_DR_DT_Pos) /*!< 0x00000010 */
-#define RTC_DR_DT_1 (0x2UL << RTC_DR_DT_Pos) /*!< 0x00000020 */
-#define RTC_DR_DU_Pos (0U)
-#define RTC_DR_DU_Msk (0xFUL << RTC_DR_DU_Pos) /*!< 0x0000000F */
-#define RTC_DR_DU RTC_DR_DU_Msk
-#define RTC_DR_DU_0 (0x1UL << RTC_DR_DU_Pos) /*!< 0x00000001 */
-#define RTC_DR_DU_1 (0x2UL << RTC_DR_DU_Pos) /*!< 0x00000002 */
-#define RTC_DR_DU_2 (0x4UL << RTC_DR_DU_Pos) /*!< 0x00000004 */
-#define RTC_DR_DU_3 (0x8UL << RTC_DR_DU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_CR register *******************/
-#define RTC_CR_COE_Pos (23U)
-#define RTC_CR_COE_Msk (0x1UL << RTC_CR_COE_Pos) /*!< 0x00800000 */
-#define RTC_CR_COE RTC_CR_COE_Msk
-#define RTC_CR_OSEL_Pos (21U)
-#define RTC_CR_OSEL_Msk (0x3UL << RTC_CR_OSEL_Pos) /*!< 0x00600000 */
-#define RTC_CR_OSEL RTC_CR_OSEL_Msk
-#define RTC_CR_OSEL_0 (0x1UL << RTC_CR_OSEL_Pos) /*!< 0x00200000 */
-#define RTC_CR_OSEL_1 (0x2UL << RTC_CR_OSEL_Pos) /*!< 0x00400000 */
-#define RTC_CR_POL_Pos (20U)
-#define RTC_CR_POL_Msk (0x1UL << RTC_CR_POL_Pos) /*!< 0x00100000 */
-#define RTC_CR_POL RTC_CR_POL_Msk
-#define RTC_CR_COSEL_Pos (19U)
-#define RTC_CR_COSEL_Msk (0x1UL << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
-#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BKP_Pos (18U)
-#define RTC_CR_BKP_Msk (0x1UL << RTC_CR_BKP_Pos) /*!< 0x00040000 */
-#define RTC_CR_BKP RTC_CR_BKP_Msk
-#define RTC_CR_SUB1H_Pos (17U)
-#define RTC_CR_SUB1H_Msk (0x1UL << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
-#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
-#define RTC_CR_ADD1H_Pos (16U)
-#define RTC_CR_ADD1H_Msk (0x1UL << RTC_CR_ADD1H_Pos) /*!< 0x00010000 */
-#define RTC_CR_ADD1H RTC_CR_ADD1H_Msk
-#define RTC_CR_TSIE_Pos (15U)
-#define RTC_CR_TSIE_Msk (0x1UL << RTC_CR_TSIE_Pos) /*!< 0x00008000 */
-#define RTC_CR_TSIE RTC_CR_TSIE_Msk
-#define RTC_CR_WUTIE_Pos (14U)
-#define RTC_CR_WUTIE_Msk (0x1UL << RTC_CR_WUTIE_Pos) /*!< 0x00004000 */
-#define RTC_CR_WUTIE RTC_CR_WUTIE_Msk
-#define RTC_CR_ALRBIE_Pos (13U)
-#define RTC_CR_ALRBIE_Msk (0x1UL << RTC_CR_ALRBIE_Pos) /*!< 0x00002000 */
-#define RTC_CR_ALRBIE RTC_CR_ALRBIE_Msk
-#define RTC_CR_ALRAIE_Pos (12U)
-#define RTC_CR_ALRAIE_Msk (0x1UL << RTC_CR_ALRAIE_Pos) /*!< 0x00001000 */
-#define RTC_CR_ALRAIE RTC_CR_ALRAIE_Msk
-#define RTC_CR_TSE_Pos (11U)
-#define RTC_CR_TSE_Msk (0x1UL << RTC_CR_TSE_Pos) /*!< 0x00000800 */
-#define RTC_CR_TSE RTC_CR_TSE_Msk
-#define RTC_CR_WUTE_Pos (10U)
-#define RTC_CR_WUTE_Msk (0x1UL << RTC_CR_WUTE_Pos) /*!< 0x00000400 */
-#define RTC_CR_WUTE RTC_CR_WUTE_Msk
-#define RTC_CR_ALRBE_Pos (9U)
-#define RTC_CR_ALRBE_Msk (0x1UL << RTC_CR_ALRBE_Pos) /*!< 0x00000200 */
-#define RTC_CR_ALRBE RTC_CR_ALRBE_Msk
-#define RTC_CR_ALRAE_Pos (8U)
-#define RTC_CR_ALRAE_Msk (0x1UL << RTC_CR_ALRAE_Pos) /*!< 0x00000100 */
-#define RTC_CR_ALRAE RTC_CR_ALRAE_Msk
-#define RTC_CR_DCE_Pos (7U)
-#define RTC_CR_DCE_Msk (0x1UL << RTC_CR_DCE_Pos) /*!< 0x00000080 */
-#define RTC_CR_DCE RTC_CR_DCE_Msk
-#define RTC_CR_FMT_Pos (6U)
-#define RTC_CR_FMT_Msk (0x1UL << RTC_CR_FMT_Pos) /*!< 0x00000040 */
-#define RTC_CR_FMT RTC_CR_FMT_Msk
-#define RTC_CR_BYPSHAD_Pos (5U)
-#define RTC_CR_BYPSHAD_Msk (0x1UL << RTC_CR_BYPSHAD_Pos) /*!< 0x00000020 */
-#define RTC_CR_BYPSHAD RTC_CR_BYPSHAD_Msk
-#define RTC_CR_REFCKON_Pos (4U)
-#define RTC_CR_REFCKON_Msk (0x1UL << RTC_CR_REFCKON_Pos) /*!< 0x00000010 */
-#define RTC_CR_REFCKON RTC_CR_REFCKON_Msk
-#define RTC_CR_TSEDGE_Pos (3U)
-#define RTC_CR_TSEDGE_Msk (0x1UL << RTC_CR_TSEDGE_Pos) /*!< 0x00000008 */
-#define RTC_CR_TSEDGE RTC_CR_TSEDGE_Msk
-#define RTC_CR_WUCKSEL_Pos (0U)
-#define RTC_CR_WUCKSEL_Msk (0x7UL << RTC_CR_WUCKSEL_Pos) /*!< 0x00000007 */
-#define RTC_CR_WUCKSEL RTC_CR_WUCKSEL_Msk
-#define RTC_CR_WUCKSEL_0 (0x1UL << RTC_CR_WUCKSEL_Pos) /*!< 0x00000001 */
-#define RTC_CR_WUCKSEL_1 (0x2UL << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
-#define RTC_CR_WUCKSEL_2 (0x4UL << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
-
-/* Legacy defines */
-#define RTC_CR_BCK RTC_CR_BKP
-
-/******************** Bits definition for RTC_ISR register ******************/
-#define RTC_ISR_RECALPF_Pos (16U)
-#define RTC_ISR_RECALPF_Msk (0x1UL << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
-#define RTC_ISR_RECALPF RTC_ISR_RECALPF_Msk
-#define RTC_ISR_TAMP1F_Pos (13U)
-#define RTC_ISR_TAMP1F_Msk (0x1UL << RTC_ISR_TAMP1F_Pos) /*!< 0x00002000 */
-#define RTC_ISR_TAMP1F RTC_ISR_TAMP1F_Msk
-#define RTC_ISR_TAMP2F_Pos (14U)
-#define RTC_ISR_TAMP2F_Msk (0x1UL << RTC_ISR_TAMP2F_Pos) /*!< 0x00004000 */
-#define RTC_ISR_TAMP2F RTC_ISR_TAMP2F_Msk
-#define RTC_ISR_TSOVF_Pos (12U)
-#define RTC_ISR_TSOVF_Msk (0x1UL << RTC_ISR_TSOVF_Pos) /*!< 0x00001000 */
-#define RTC_ISR_TSOVF RTC_ISR_TSOVF_Msk
-#define RTC_ISR_TSF_Pos (11U)
-#define RTC_ISR_TSF_Msk (0x1UL << RTC_ISR_TSF_Pos) /*!< 0x00000800 */
-#define RTC_ISR_TSF RTC_ISR_TSF_Msk
-#define RTC_ISR_WUTF_Pos (10U)
-#define RTC_ISR_WUTF_Msk (0x1UL << RTC_ISR_WUTF_Pos) /*!< 0x00000400 */
-#define RTC_ISR_WUTF RTC_ISR_WUTF_Msk
-#define RTC_ISR_ALRBF_Pos (9U)
-#define RTC_ISR_ALRBF_Msk (0x1UL << RTC_ISR_ALRBF_Pos) /*!< 0x00000200 */
-#define RTC_ISR_ALRBF RTC_ISR_ALRBF_Msk
-#define RTC_ISR_ALRAF_Pos (8U)
-#define RTC_ISR_ALRAF_Msk (0x1UL << RTC_ISR_ALRAF_Pos) /*!< 0x00000100 */
-#define RTC_ISR_ALRAF RTC_ISR_ALRAF_Msk
-#define RTC_ISR_INIT_Pos (7U)
-#define RTC_ISR_INIT_Msk (0x1UL << RTC_ISR_INIT_Pos) /*!< 0x00000080 */
-#define RTC_ISR_INIT RTC_ISR_INIT_Msk
-#define RTC_ISR_INITF_Pos (6U)
-#define RTC_ISR_INITF_Msk (0x1UL << RTC_ISR_INITF_Pos) /*!< 0x00000040 */
-#define RTC_ISR_INITF RTC_ISR_INITF_Msk
-#define RTC_ISR_RSF_Pos (5U)
-#define RTC_ISR_RSF_Msk (0x1UL << RTC_ISR_RSF_Pos) /*!< 0x00000020 */
-#define RTC_ISR_RSF RTC_ISR_RSF_Msk
-#define RTC_ISR_INITS_Pos (4U)
-#define RTC_ISR_INITS_Msk (0x1UL << RTC_ISR_INITS_Pos) /*!< 0x00000010 */
-#define RTC_ISR_INITS RTC_ISR_INITS_Msk
-#define RTC_ISR_SHPF_Pos (3U)
-#define RTC_ISR_SHPF_Msk (0x1UL << RTC_ISR_SHPF_Pos) /*!< 0x00000008 */
-#define RTC_ISR_SHPF RTC_ISR_SHPF_Msk
-#define RTC_ISR_WUTWF_Pos (2U)
-#define RTC_ISR_WUTWF_Msk (0x1UL << RTC_ISR_WUTWF_Pos) /*!< 0x00000004 */
-#define RTC_ISR_WUTWF RTC_ISR_WUTWF_Msk
-#define RTC_ISR_ALRBWF_Pos (1U)
-#define RTC_ISR_ALRBWF_Msk (0x1UL << RTC_ISR_ALRBWF_Pos) /*!< 0x00000002 */
-#define RTC_ISR_ALRBWF RTC_ISR_ALRBWF_Msk
-#define RTC_ISR_ALRAWF_Pos (0U)
-#define RTC_ISR_ALRAWF_Msk (0x1UL << RTC_ISR_ALRAWF_Pos) /*!< 0x00000001 */
-#define RTC_ISR_ALRAWF RTC_ISR_ALRAWF_Msk
-
-/******************** Bits definition for RTC_PRER register *****************/
-#define RTC_PRER_PREDIV_A_Pos (16U)
-#define RTC_PRER_PREDIV_A_Msk (0x7FUL << RTC_PRER_PREDIV_A_Pos) /*!< 0x007F0000 */
-#define RTC_PRER_PREDIV_A RTC_PRER_PREDIV_A_Msk
-#define RTC_PRER_PREDIV_S_Pos (0U)
-#define RTC_PRER_PREDIV_S_Msk (0x7FFFUL << RTC_PRER_PREDIV_S_Pos) /*!< 0x00007FFF */
-#define RTC_PRER_PREDIV_S RTC_PRER_PREDIV_S_Msk
-
-/******************** Bits definition for RTC_WUTR register *****************/
-#define RTC_WUTR_WUT_Pos (0U)
-#define RTC_WUTR_WUT_Msk (0xFFFFUL << RTC_WUTR_WUT_Pos) /*!< 0x0000FFFF */
-#define RTC_WUTR_WUT RTC_WUTR_WUT_Msk
-
-/******************** Bits definition for RTC_CALIBR register ***************/
-#define RTC_CALIBR_DCS_Pos (7U)
-#define RTC_CALIBR_DCS_Msk (0x1UL << RTC_CALIBR_DCS_Pos) /*!< 0x00000080 */
-#define RTC_CALIBR_DCS RTC_CALIBR_DCS_Msk
-#define RTC_CALIBR_DC_Pos (0U)
-#define RTC_CALIBR_DC_Msk (0x1FUL << RTC_CALIBR_DC_Pos) /*!< 0x0000001F */
-#define RTC_CALIBR_DC RTC_CALIBR_DC_Msk
-
-/******************** Bits definition for RTC_ALRMAR register ***************/
-#define RTC_ALRMAR_MSK4_Pos (31U)
-#define RTC_ALRMAR_MSK4_Msk (0x1UL << RTC_ALRMAR_MSK4_Pos) /*!< 0x80000000 */
-#define RTC_ALRMAR_MSK4 RTC_ALRMAR_MSK4_Msk
-#define RTC_ALRMAR_WDSEL_Pos (30U)
-#define RTC_ALRMAR_WDSEL_Msk (0x1UL << RTC_ALRMAR_WDSEL_Pos) /*!< 0x40000000 */
-#define RTC_ALRMAR_WDSEL RTC_ALRMAR_WDSEL_Msk
-#define RTC_ALRMAR_DT_Pos (28U)
-#define RTC_ALRMAR_DT_Msk (0x3UL << RTC_ALRMAR_DT_Pos) /*!< 0x30000000 */
-#define RTC_ALRMAR_DT RTC_ALRMAR_DT_Msk
-#define RTC_ALRMAR_DT_0 (0x1UL << RTC_ALRMAR_DT_Pos) /*!< 0x10000000 */
-#define RTC_ALRMAR_DT_1 (0x2UL << RTC_ALRMAR_DT_Pos) /*!< 0x20000000 */
-#define RTC_ALRMAR_DU_Pos (24U)
-#define RTC_ALRMAR_DU_Msk (0xFUL << RTC_ALRMAR_DU_Pos) /*!< 0x0F000000 */
-#define RTC_ALRMAR_DU RTC_ALRMAR_DU_Msk
-#define RTC_ALRMAR_DU_0 (0x1UL << RTC_ALRMAR_DU_Pos) /*!< 0x01000000 */
-#define RTC_ALRMAR_DU_1 (0x2UL << RTC_ALRMAR_DU_Pos) /*!< 0x02000000 */
-#define RTC_ALRMAR_DU_2 (0x4UL << RTC_ALRMAR_DU_Pos) /*!< 0x04000000 */
-#define RTC_ALRMAR_DU_3 (0x8UL << RTC_ALRMAR_DU_Pos) /*!< 0x08000000 */
-#define RTC_ALRMAR_MSK3_Pos (23U)
-#define RTC_ALRMAR_MSK3_Msk (0x1UL << RTC_ALRMAR_MSK3_Pos) /*!< 0x00800000 */
-#define RTC_ALRMAR_MSK3 RTC_ALRMAR_MSK3_Msk
-#define RTC_ALRMAR_PM_Pos (22U)
-#define RTC_ALRMAR_PM_Msk (0x1UL << RTC_ALRMAR_PM_Pos) /*!< 0x00400000 */
-#define RTC_ALRMAR_PM RTC_ALRMAR_PM_Msk
-#define RTC_ALRMAR_HT_Pos (20U)
-#define RTC_ALRMAR_HT_Msk (0x3UL << RTC_ALRMAR_HT_Pos) /*!< 0x00300000 */
-#define RTC_ALRMAR_HT RTC_ALRMAR_HT_Msk
-#define RTC_ALRMAR_HT_0 (0x1UL << RTC_ALRMAR_HT_Pos) /*!< 0x00100000 */
-#define RTC_ALRMAR_HT_1 (0x2UL << RTC_ALRMAR_HT_Pos) /*!< 0x00200000 */
-#define RTC_ALRMAR_HU_Pos (16U)
-#define RTC_ALRMAR_HU_Msk (0xFUL << RTC_ALRMAR_HU_Pos) /*!< 0x000F0000 */
-#define RTC_ALRMAR_HU RTC_ALRMAR_HU_Msk
-#define RTC_ALRMAR_HU_0 (0x1UL << RTC_ALRMAR_HU_Pos) /*!< 0x00010000 */
-#define RTC_ALRMAR_HU_1 (0x2UL << RTC_ALRMAR_HU_Pos) /*!< 0x00020000 */
-#define RTC_ALRMAR_HU_2 (0x4UL << RTC_ALRMAR_HU_Pos) /*!< 0x00040000 */
-#define RTC_ALRMAR_HU_3 (0x8UL << RTC_ALRMAR_HU_Pos) /*!< 0x00080000 */
-#define RTC_ALRMAR_MSK2_Pos (15U)
-#define RTC_ALRMAR_MSK2_Msk (0x1UL << RTC_ALRMAR_MSK2_Pos) /*!< 0x00008000 */
-#define RTC_ALRMAR_MSK2 RTC_ALRMAR_MSK2_Msk
-#define RTC_ALRMAR_MNT_Pos (12U)
-#define RTC_ALRMAR_MNT_Msk (0x7UL << RTC_ALRMAR_MNT_Pos) /*!< 0x00007000 */
-#define RTC_ALRMAR_MNT RTC_ALRMAR_MNT_Msk
-#define RTC_ALRMAR_MNT_0 (0x1UL << RTC_ALRMAR_MNT_Pos) /*!< 0x00001000 */
-#define RTC_ALRMAR_MNT_1 (0x2UL << RTC_ALRMAR_MNT_Pos) /*!< 0x00002000 */
-#define RTC_ALRMAR_MNT_2 (0x4UL << RTC_ALRMAR_MNT_Pos) /*!< 0x00004000 */
-#define RTC_ALRMAR_MNU_Pos (8U)
-#define RTC_ALRMAR_MNU_Msk (0xFUL << RTC_ALRMAR_MNU_Pos) /*!< 0x00000F00 */
-#define RTC_ALRMAR_MNU RTC_ALRMAR_MNU_Msk
-#define RTC_ALRMAR_MNU_0 (0x1UL << RTC_ALRMAR_MNU_Pos) /*!< 0x00000100 */
-#define RTC_ALRMAR_MNU_1 (0x2UL << RTC_ALRMAR_MNU_Pos) /*!< 0x00000200 */
-#define RTC_ALRMAR_MNU_2 (0x4UL << RTC_ALRMAR_MNU_Pos) /*!< 0x00000400 */
-#define RTC_ALRMAR_MNU_3 (0x8UL << RTC_ALRMAR_MNU_Pos) /*!< 0x00000800 */
-#define RTC_ALRMAR_MSK1_Pos (7U)
-#define RTC_ALRMAR_MSK1_Msk (0x1UL << RTC_ALRMAR_MSK1_Pos) /*!< 0x00000080 */
-#define RTC_ALRMAR_MSK1 RTC_ALRMAR_MSK1_Msk
-#define RTC_ALRMAR_ST_Pos (4U)
-#define RTC_ALRMAR_ST_Msk (0x7UL << RTC_ALRMAR_ST_Pos) /*!< 0x00000070 */
-#define RTC_ALRMAR_ST RTC_ALRMAR_ST_Msk
-#define RTC_ALRMAR_ST_0 (0x1UL << RTC_ALRMAR_ST_Pos) /*!< 0x00000010 */
-#define RTC_ALRMAR_ST_1 (0x2UL << RTC_ALRMAR_ST_Pos) /*!< 0x00000020 */
-#define RTC_ALRMAR_ST_2 (0x4UL << RTC_ALRMAR_ST_Pos) /*!< 0x00000040 */
-#define RTC_ALRMAR_SU_Pos (0U)
-#define RTC_ALRMAR_SU_Msk (0xFUL << RTC_ALRMAR_SU_Pos) /*!< 0x0000000F */
-#define RTC_ALRMAR_SU RTC_ALRMAR_SU_Msk
-#define RTC_ALRMAR_SU_0 (0x1UL << RTC_ALRMAR_SU_Pos) /*!< 0x00000001 */
-#define RTC_ALRMAR_SU_1 (0x2UL << RTC_ALRMAR_SU_Pos) /*!< 0x00000002 */
-#define RTC_ALRMAR_SU_2 (0x4UL << RTC_ALRMAR_SU_Pos) /*!< 0x00000004 */
-#define RTC_ALRMAR_SU_3 (0x8UL << RTC_ALRMAR_SU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_ALRMBR register ***************/
-#define RTC_ALRMBR_MSK4_Pos (31U)
-#define RTC_ALRMBR_MSK4_Msk (0x1UL << RTC_ALRMBR_MSK4_Pos) /*!< 0x80000000 */
-#define RTC_ALRMBR_MSK4 RTC_ALRMBR_MSK4_Msk
-#define RTC_ALRMBR_WDSEL_Pos (30U)
-#define RTC_ALRMBR_WDSEL_Msk (0x1UL << RTC_ALRMBR_WDSEL_Pos) /*!< 0x40000000 */
-#define RTC_ALRMBR_WDSEL RTC_ALRMBR_WDSEL_Msk
-#define RTC_ALRMBR_DT_Pos (28U)
-#define RTC_ALRMBR_DT_Msk (0x3UL << RTC_ALRMBR_DT_Pos) /*!< 0x30000000 */
-#define RTC_ALRMBR_DT RTC_ALRMBR_DT_Msk
-#define RTC_ALRMBR_DT_0 (0x1UL << RTC_ALRMBR_DT_Pos) /*!< 0x10000000 */
-#define RTC_ALRMBR_DT_1 (0x2UL << RTC_ALRMBR_DT_Pos) /*!< 0x20000000 */
-#define RTC_ALRMBR_DU_Pos (24U)
-#define RTC_ALRMBR_DU_Msk (0xFUL << RTC_ALRMBR_DU_Pos) /*!< 0x0F000000 */
-#define RTC_ALRMBR_DU RTC_ALRMBR_DU_Msk
-#define RTC_ALRMBR_DU_0 (0x1UL << RTC_ALRMBR_DU_Pos) /*!< 0x01000000 */
-#define RTC_ALRMBR_DU_1 (0x2UL << RTC_ALRMBR_DU_Pos) /*!< 0x02000000 */
-#define RTC_ALRMBR_DU_2 (0x4UL << RTC_ALRMBR_DU_Pos) /*!< 0x04000000 */
-#define RTC_ALRMBR_DU_3 (0x8UL << RTC_ALRMBR_DU_Pos) /*!< 0x08000000 */
-#define RTC_ALRMBR_MSK3_Pos (23U)
-#define RTC_ALRMBR_MSK3_Msk (0x1UL << RTC_ALRMBR_MSK3_Pos) /*!< 0x00800000 */
-#define RTC_ALRMBR_MSK3 RTC_ALRMBR_MSK3_Msk
-#define RTC_ALRMBR_PM_Pos (22U)
-#define RTC_ALRMBR_PM_Msk (0x1UL << RTC_ALRMBR_PM_Pos) /*!< 0x00400000 */
-#define RTC_ALRMBR_PM RTC_ALRMBR_PM_Msk
-#define RTC_ALRMBR_HT_Pos (20U)
-#define RTC_ALRMBR_HT_Msk (0x3UL << RTC_ALRMBR_HT_Pos) /*!< 0x00300000 */
-#define RTC_ALRMBR_HT RTC_ALRMBR_HT_Msk
-#define RTC_ALRMBR_HT_0 (0x1UL << RTC_ALRMBR_HT_Pos) /*!< 0x00100000 */
-#define RTC_ALRMBR_HT_1 (0x2UL << RTC_ALRMBR_HT_Pos) /*!< 0x00200000 */
-#define RTC_ALRMBR_HU_Pos (16U)
-#define RTC_ALRMBR_HU_Msk (0xFUL << RTC_ALRMBR_HU_Pos) /*!< 0x000F0000 */
-#define RTC_ALRMBR_HU RTC_ALRMBR_HU_Msk
-#define RTC_ALRMBR_HU_0 (0x1UL << RTC_ALRMBR_HU_Pos) /*!< 0x00010000 */
-#define RTC_ALRMBR_HU_1 (0x2UL << RTC_ALRMBR_HU_Pos) /*!< 0x00020000 */
-#define RTC_ALRMBR_HU_2 (0x4UL << RTC_ALRMBR_HU_Pos) /*!< 0x00040000 */
-#define RTC_ALRMBR_HU_3 (0x8UL << RTC_ALRMBR_HU_Pos) /*!< 0x00080000 */
-#define RTC_ALRMBR_MSK2_Pos (15U)
-#define RTC_ALRMBR_MSK2_Msk (0x1UL << RTC_ALRMBR_MSK2_Pos) /*!< 0x00008000 */
-#define RTC_ALRMBR_MSK2 RTC_ALRMBR_MSK2_Msk
-#define RTC_ALRMBR_MNT_Pos (12U)
-#define RTC_ALRMBR_MNT_Msk (0x7UL << RTC_ALRMBR_MNT_Pos) /*!< 0x00007000 */
-#define RTC_ALRMBR_MNT RTC_ALRMBR_MNT_Msk
-#define RTC_ALRMBR_MNT_0 (0x1UL << RTC_ALRMBR_MNT_Pos) /*!< 0x00001000 */
-#define RTC_ALRMBR_MNT_1 (0x2UL << RTC_ALRMBR_MNT_Pos) /*!< 0x00002000 */
-#define RTC_ALRMBR_MNT_2 (0x4UL << RTC_ALRMBR_MNT_Pos) /*!< 0x00004000 */
-#define RTC_ALRMBR_MNU_Pos (8U)
-#define RTC_ALRMBR_MNU_Msk (0xFUL << RTC_ALRMBR_MNU_Pos) /*!< 0x00000F00 */
-#define RTC_ALRMBR_MNU RTC_ALRMBR_MNU_Msk
-#define RTC_ALRMBR_MNU_0 (0x1UL << RTC_ALRMBR_MNU_Pos) /*!< 0x00000100 */
-#define RTC_ALRMBR_MNU_1 (0x2UL << RTC_ALRMBR_MNU_Pos) /*!< 0x00000200 */
-#define RTC_ALRMBR_MNU_2 (0x4UL << RTC_ALRMBR_MNU_Pos) /*!< 0x00000400 */
-#define RTC_ALRMBR_MNU_3 (0x8UL << RTC_ALRMBR_MNU_Pos) /*!< 0x00000800 */
-#define RTC_ALRMBR_MSK1_Pos (7U)
-#define RTC_ALRMBR_MSK1_Msk (0x1UL << RTC_ALRMBR_MSK1_Pos) /*!< 0x00000080 */
-#define RTC_ALRMBR_MSK1 RTC_ALRMBR_MSK1_Msk
-#define RTC_ALRMBR_ST_Pos (4U)
-#define RTC_ALRMBR_ST_Msk (0x7UL << RTC_ALRMBR_ST_Pos) /*!< 0x00000070 */
-#define RTC_ALRMBR_ST RTC_ALRMBR_ST_Msk
-#define RTC_ALRMBR_ST_0 (0x1UL << RTC_ALRMBR_ST_Pos) /*!< 0x00000010 */
-#define RTC_ALRMBR_ST_1 (0x2UL << RTC_ALRMBR_ST_Pos) /*!< 0x00000020 */
-#define RTC_ALRMBR_ST_2 (0x4UL << RTC_ALRMBR_ST_Pos) /*!< 0x00000040 */
-#define RTC_ALRMBR_SU_Pos (0U)
-#define RTC_ALRMBR_SU_Msk (0xFUL << RTC_ALRMBR_SU_Pos) /*!< 0x0000000F */
-#define RTC_ALRMBR_SU RTC_ALRMBR_SU_Msk
-#define RTC_ALRMBR_SU_0 (0x1UL << RTC_ALRMBR_SU_Pos) /*!< 0x00000001 */
-#define RTC_ALRMBR_SU_1 (0x2UL << RTC_ALRMBR_SU_Pos) /*!< 0x00000002 */
-#define RTC_ALRMBR_SU_2 (0x4UL << RTC_ALRMBR_SU_Pos) /*!< 0x00000004 */
-#define RTC_ALRMBR_SU_3 (0x8UL << RTC_ALRMBR_SU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_WPR register ******************/
-#define RTC_WPR_KEY_Pos (0U)
-#define RTC_WPR_KEY_Msk (0xFFUL << RTC_WPR_KEY_Pos) /*!< 0x000000FF */
-#define RTC_WPR_KEY RTC_WPR_KEY_Msk
-
-/******************** Bits definition for RTC_SSR register ******************/
-#define RTC_SSR_SS_Pos (0U)
-#define RTC_SSR_SS_Msk (0xFFFFUL << RTC_SSR_SS_Pos) /*!< 0x0000FFFF */
-#define RTC_SSR_SS RTC_SSR_SS_Msk
-
-/******************** Bits definition for RTC_SHIFTR register ***************/
-#define RTC_SHIFTR_SUBFS_Pos (0U)
-#define RTC_SHIFTR_SUBFS_Msk (0x7FFFUL << RTC_SHIFTR_SUBFS_Pos) /*!< 0x00007FFF */
-#define RTC_SHIFTR_SUBFS RTC_SHIFTR_SUBFS_Msk
-#define RTC_SHIFTR_ADD1S_Pos (31U)
-#define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
-#define RTC_SHIFTR_ADD1S RTC_SHIFTR_ADD1S_Msk
-
-/******************** Bits definition for RTC_TSTR register *****************/
-#define RTC_TSTR_PM_Pos (22U)
-#define RTC_TSTR_PM_Msk (0x1UL << RTC_TSTR_PM_Pos) /*!< 0x00400000 */
-#define RTC_TSTR_PM RTC_TSTR_PM_Msk
-#define RTC_TSTR_HT_Pos (20U)
-#define RTC_TSTR_HT_Msk (0x3UL << RTC_TSTR_HT_Pos) /*!< 0x00300000 */
-#define RTC_TSTR_HT RTC_TSTR_HT_Msk
-#define RTC_TSTR_HT_0 (0x1UL << RTC_TSTR_HT_Pos) /*!< 0x00100000 */
-#define RTC_TSTR_HT_1 (0x2UL << RTC_TSTR_HT_Pos) /*!< 0x00200000 */
-#define RTC_TSTR_HU_Pos (16U)
-#define RTC_TSTR_HU_Msk (0xFUL << RTC_TSTR_HU_Pos) /*!< 0x000F0000 */
-#define RTC_TSTR_HU RTC_TSTR_HU_Msk
-#define RTC_TSTR_HU_0 (0x1UL << RTC_TSTR_HU_Pos) /*!< 0x00010000 */
-#define RTC_TSTR_HU_1 (0x2UL << RTC_TSTR_HU_Pos) /*!< 0x00020000 */
-#define RTC_TSTR_HU_2 (0x4UL << RTC_TSTR_HU_Pos) /*!< 0x00040000 */
-#define RTC_TSTR_HU_3 (0x8UL << RTC_TSTR_HU_Pos) /*!< 0x00080000 */
-#define RTC_TSTR_MNT_Pos (12U)
-#define RTC_TSTR_MNT_Msk (0x7UL << RTC_TSTR_MNT_Pos) /*!< 0x00007000 */
-#define RTC_TSTR_MNT RTC_TSTR_MNT_Msk
-#define RTC_TSTR_MNT_0 (0x1UL << RTC_TSTR_MNT_Pos) /*!< 0x00001000 */
-#define RTC_TSTR_MNT_1 (0x2UL << RTC_TSTR_MNT_Pos) /*!< 0x00002000 */
-#define RTC_TSTR_MNT_2 (0x4UL << RTC_TSTR_MNT_Pos) /*!< 0x00004000 */
-#define RTC_TSTR_MNU_Pos (8U)
-#define RTC_TSTR_MNU_Msk (0xFUL << RTC_TSTR_MNU_Pos) /*!< 0x00000F00 */
-#define RTC_TSTR_MNU RTC_TSTR_MNU_Msk
-#define RTC_TSTR_MNU_0 (0x1UL << RTC_TSTR_MNU_Pos) /*!< 0x00000100 */
-#define RTC_TSTR_MNU_1 (0x2UL << RTC_TSTR_MNU_Pos) /*!< 0x00000200 */
-#define RTC_TSTR_MNU_2 (0x4UL << RTC_TSTR_MNU_Pos) /*!< 0x00000400 */
-#define RTC_TSTR_MNU_3 (0x8UL << RTC_TSTR_MNU_Pos) /*!< 0x00000800 */
-#define RTC_TSTR_ST_Pos (4U)
-#define RTC_TSTR_ST_Msk (0x7UL << RTC_TSTR_ST_Pos) /*!< 0x00000070 */
-#define RTC_TSTR_ST RTC_TSTR_ST_Msk
-#define RTC_TSTR_ST_0 (0x1UL << RTC_TSTR_ST_Pos) /*!< 0x00000010 */
-#define RTC_TSTR_ST_1 (0x2UL << RTC_TSTR_ST_Pos) /*!< 0x00000020 */
-#define RTC_TSTR_ST_2 (0x4UL << RTC_TSTR_ST_Pos) /*!< 0x00000040 */
-#define RTC_TSTR_SU_Pos (0U)
-#define RTC_TSTR_SU_Msk (0xFUL << RTC_TSTR_SU_Pos) /*!< 0x0000000F */
-#define RTC_TSTR_SU RTC_TSTR_SU_Msk
-#define RTC_TSTR_SU_0 (0x1UL << RTC_TSTR_SU_Pos) /*!< 0x00000001 */
-#define RTC_TSTR_SU_1 (0x2UL << RTC_TSTR_SU_Pos) /*!< 0x00000002 */
-#define RTC_TSTR_SU_2 (0x4UL << RTC_TSTR_SU_Pos) /*!< 0x00000004 */
-#define RTC_TSTR_SU_3 (0x8UL << RTC_TSTR_SU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_TSDR register *****************/
-#define RTC_TSDR_WDU_Pos (13U)
-#define RTC_TSDR_WDU_Msk (0x7UL << RTC_TSDR_WDU_Pos) /*!< 0x0000E000 */
-#define RTC_TSDR_WDU RTC_TSDR_WDU_Msk
-#define RTC_TSDR_WDU_0 (0x1UL << RTC_TSDR_WDU_Pos) /*!< 0x00002000 */
-#define RTC_TSDR_WDU_1 (0x2UL << RTC_TSDR_WDU_Pos) /*!< 0x00004000 */
-#define RTC_TSDR_WDU_2 (0x4UL << RTC_TSDR_WDU_Pos) /*!< 0x00008000 */
-#define RTC_TSDR_MT_Pos (12U)
-#define RTC_TSDR_MT_Msk (0x1UL << RTC_TSDR_MT_Pos) /*!< 0x00001000 */
-#define RTC_TSDR_MT RTC_TSDR_MT_Msk
-#define RTC_TSDR_MU_Pos (8U)
-#define RTC_TSDR_MU_Msk (0xFUL << RTC_TSDR_MU_Pos) /*!< 0x00000F00 */
-#define RTC_TSDR_MU RTC_TSDR_MU_Msk
-#define RTC_TSDR_MU_0 (0x1UL << RTC_TSDR_MU_Pos) /*!< 0x00000100 */
-#define RTC_TSDR_MU_1 (0x2UL << RTC_TSDR_MU_Pos) /*!< 0x00000200 */
-#define RTC_TSDR_MU_2 (0x4UL << RTC_TSDR_MU_Pos) /*!< 0x00000400 */
-#define RTC_TSDR_MU_3 (0x8UL << RTC_TSDR_MU_Pos) /*!< 0x00000800 */
-#define RTC_TSDR_DT_Pos (4U)
-#define RTC_TSDR_DT_Msk (0x3UL << RTC_TSDR_DT_Pos) /*!< 0x00000030 */
-#define RTC_TSDR_DT RTC_TSDR_DT_Msk
-#define RTC_TSDR_DT_0 (0x1UL << RTC_TSDR_DT_Pos) /*!< 0x00000010 */
-#define RTC_TSDR_DT_1 (0x2UL << RTC_TSDR_DT_Pos) /*!< 0x00000020 */
-#define RTC_TSDR_DU_Pos (0U)
-#define RTC_TSDR_DU_Msk (0xFUL << RTC_TSDR_DU_Pos) /*!< 0x0000000F */
-#define RTC_TSDR_DU RTC_TSDR_DU_Msk
-#define RTC_TSDR_DU_0 (0x1UL << RTC_TSDR_DU_Pos) /*!< 0x00000001 */
-#define RTC_TSDR_DU_1 (0x2UL << RTC_TSDR_DU_Pos) /*!< 0x00000002 */
-#define RTC_TSDR_DU_2 (0x4UL << RTC_TSDR_DU_Pos) /*!< 0x00000004 */
-#define RTC_TSDR_DU_3 (0x8UL << RTC_TSDR_DU_Pos) /*!< 0x00000008 */
-
-/******************** Bits definition for RTC_TSSSR register ****************/
-#define RTC_TSSSR_SS_Pos (0U)
-#define RTC_TSSSR_SS_Msk (0xFFFFUL << RTC_TSSSR_SS_Pos) /*!< 0x0000FFFF */
-#define RTC_TSSSR_SS RTC_TSSSR_SS_Msk
-
-/******************** Bits definition for RTC_CAL register *****************/
-#define RTC_CALR_CALP_Pos (15U)
-#define RTC_CALR_CALP_Msk (0x1UL << RTC_CALR_CALP_Pos) /*!< 0x00008000 */
-#define RTC_CALR_CALP RTC_CALR_CALP_Msk
-#define RTC_CALR_CALW8_Pos (14U)
-#define RTC_CALR_CALW8_Msk (0x1UL << RTC_CALR_CALW8_Pos) /*!< 0x00004000 */
-#define RTC_CALR_CALW8 RTC_CALR_CALW8_Msk
-#define RTC_CALR_CALW16_Pos (13U)
-#define RTC_CALR_CALW16_Msk (0x1UL << RTC_CALR_CALW16_Pos) /*!< 0x00002000 */
-#define RTC_CALR_CALW16 RTC_CALR_CALW16_Msk
-#define RTC_CALR_CALM_Pos (0U)
-#define RTC_CALR_CALM_Msk (0x1FFUL << RTC_CALR_CALM_Pos) /*!< 0x000001FF */
-#define RTC_CALR_CALM RTC_CALR_CALM_Msk
-#define RTC_CALR_CALM_0 (0x001UL << RTC_CALR_CALM_Pos) /*!< 0x00000001 */
-#define RTC_CALR_CALM_1 (0x002UL << RTC_CALR_CALM_Pos) /*!< 0x00000002 */
-#define RTC_CALR_CALM_2 (0x004UL << RTC_CALR_CALM_Pos) /*!< 0x00000004 */
-#define RTC_CALR_CALM_3 (0x008UL << RTC_CALR_CALM_Pos) /*!< 0x00000008 */
-#define RTC_CALR_CALM_4 (0x010UL << RTC_CALR_CALM_Pos) /*!< 0x00000010 */
-#define RTC_CALR_CALM_5 (0x020UL << RTC_CALR_CALM_Pos) /*!< 0x00000020 */
-#define RTC_CALR_CALM_6 (0x040UL << RTC_CALR_CALM_Pos) /*!< 0x00000040 */
-#define RTC_CALR_CALM_7 (0x080UL << RTC_CALR_CALM_Pos) /*!< 0x00000080 */
-#define RTC_CALR_CALM_8 (0x100UL << RTC_CALR_CALM_Pos) /*!< 0x00000100 */
-
-/******************** Bits definition for RTC_TAFCR register ****************/
-#define RTC_TAFCR_ALARMOUTTYPE_Pos (18U)
-#define RTC_TAFCR_ALARMOUTTYPE_Msk (0x1UL << RTC_TAFCR_ALARMOUTTYPE_Pos) /*!< 0x00040000 */
-#define RTC_TAFCR_ALARMOUTTYPE RTC_TAFCR_ALARMOUTTYPE_Msk
-#define RTC_TAFCR_TSINSEL_Pos (17U)
-#define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
-#define RTC_TAFCR_TSINSEL RTC_TAFCR_TSINSEL_Msk
-#define RTC_TAFCR_TAMP1INSEL_Pos (16U)
-#define RTC_TAFCR_TAMP1INSEL_Msk (0x1UL << RTC_TAFCR_TAMP1INSEL_Pos) /*!< 0x00010000 */
-#define RTC_TAFCR_TAMP1INSEL RTC_TAFCR_TAMP1INSEL_Msk
-#define RTC_TAFCR_TAMPPUDIS_Pos (15U)
-#define RTC_TAFCR_TAMPPUDIS_Msk (0x1UL << RTC_TAFCR_TAMPPUDIS_Pos) /*!< 0x00008000 */
-#define RTC_TAFCR_TAMPPUDIS RTC_TAFCR_TAMPPUDIS_Msk
-#define RTC_TAFCR_TAMPPRCH_Pos (13U)
-#define RTC_TAFCR_TAMPPRCH_Msk (0x3UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00006000 */
-#define RTC_TAFCR_TAMPPRCH RTC_TAFCR_TAMPPRCH_Msk
-#define RTC_TAFCR_TAMPPRCH_0 (0x1UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00002000 */
-#define RTC_TAFCR_TAMPPRCH_1 (0x2UL << RTC_TAFCR_TAMPPRCH_Pos) /*!< 0x00004000 */
-#define RTC_TAFCR_TAMPFLT_Pos (11U)
-#define RTC_TAFCR_TAMPFLT_Msk (0x3UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00001800 */
-#define RTC_TAFCR_TAMPFLT RTC_TAFCR_TAMPFLT_Msk
-#define RTC_TAFCR_TAMPFLT_0 (0x1UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00000800 */
-#define RTC_TAFCR_TAMPFLT_1 (0x2UL << RTC_TAFCR_TAMPFLT_Pos) /*!< 0x00001000 */
-#define RTC_TAFCR_TAMPFREQ_Pos (8U)
-#define RTC_TAFCR_TAMPFREQ_Msk (0x7UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000700 */
-#define RTC_TAFCR_TAMPFREQ RTC_TAFCR_TAMPFREQ_Msk
-#define RTC_TAFCR_TAMPFREQ_0 (0x1UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000100 */
-#define RTC_TAFCR_TAMPFREQ_1 (0x2UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000200 */
-#define RTC_TAFCR_TAMPFREQ_2 (0x4UL << RTC_TAFCR_TAMPFREQ_Pos) /*!< 0x00000400 */
-#define RTC_TAFCR_TAMPTS_Pos (7U)
-#define RTC_TAFCR_TAMPTS_Msk (0x1UL << RTC_TAFCR_TAMPTS_Pos) /*!< 0x00000080 */
-#define RTC_TAFCR_TAMPTS RTC_TAFCR_TAMPTS_Msk
-#define RTC_TAFCR_TAMP2TRG_Pos (4U)
-#define RTC_TAFCR_TAMP2TRG_Msk (0x1UL << RTC_TAFCR_TAMP2TRG_Pos) /*!< 0x00000010 */
-#define RTC_TAFCR_TAMP2TRG RTC_TAFCR_TAMP2TRG_Msk
-#define RTC_TAFCR_TAMP2E_Pos (3U)
-#define RTC_TAFCR_TAMP2E_Msk (0x1UL << RTC_TAFCR_TAMP2E_Pos) /*!< 0x00000008 */
-#define RTC_TAFCR_TAMP2E RTC_TAFCR_TAMP2E_Msk
-#define RTC_TAFCR_TAMPIE_Pos (2U)
-#define RTC_TAFCR_TAMPIE_Msk (0x1UL << RTC_TAFCR_TAMPIE_Pos) /*!< 0x00000004 */
-#define RTC_TAFCR_TAMPIE RTC_TAFCR_TAMPIE_Msk
-#define RTC_TAFCR_TAMP1TRG_Pos (1U)
-#define RTC_TAFCR_TAMP1TRG_Msk (0x1UL << RTC_TAFCR_TAMP1TRG_Pos) /*!< 0x00000002 */
-#define RTC_TAFCR_TAMP1TRG RTC_TAFCR_TAMP1TRG_Msk
-#define RTC_TAFCR_TAMP1E_Pos (0U)
-#define RTC_TAFCR_TAMP1E_Msk (0x1UL << RTC_TAFCR_TAMP1E_Pos) /*!< 0x00000001 */
-#define RTC_TAFCR_TAMP1E RTC_TAFCR_TAMP1E_Msk
-
-/* Legacy defines */
-#define RTC_TAFCR_TAMPINSEL RTC_TAFCR_TAMP1INSEL
-
-/******************** Bits definition for RTC_ALRMASSR register *************/
-#define RTC_ALRMASSR_MASKSS_Pos (24U)
-#define RTC_ALRMASSR_MASKSS_Msk (0xFUL << RTC_ALRMASSR_MASKSS_Pos) /*!< 0x0F000000 */
-#define RTC_ALRMASSR_MASKSS RTC_ALRMASSR_MASKSS_Msk
-#define RTC_ALRMASSR_MASKSS_0 (0x1UL << RTC_ALRMASSR_MASKSS_Pos) /*!< 0x01000000 */
-#define RTC_ALRMASSR_MASKSS_1 (0x2UL << RTC_ALRMASSR_MASKSS_Pos) /*!< 0x02000000 */
-#define RTC_ALRMASSR_MASKSS_2 (0x4UL << RTC_ALRMASSR_MASKSS_Pos) /*!< 0x04000000 */
-#define RTC_ALRMASSR_MASKSS_3 (0x8UL << RTC_ALRMASSR_MASKSS_Pos) /*!< 0x08000000 */
-#define RTC_ALRMASSR_SS_Pos (0U)
-#define RTC_ALRMASSR_SS_Msk (0x7FFFUL << RTC_ALRMASSR_SS_Pos) /*!< 0x00007FFF */
-#define RTC_ALRMASSR_SS RTC_ALRMASSR_SS_Msk
-
-/******************** Bits definition for RTC_ALRMBSSR register *************/
-#define RTC_ALRMBSSR_MASKSS_Pos (24U)
-#define RTC_ALRMBSSR_MASKSS_Msk (0xFUL << RTC_ALRMBSSR_MASKSS_Pos) /*!< 0x0F000000 */
-#define RTC_ALRMBSSR_MASKSS RTC_ALRMBSSR_MASKSS_Msk
-#define RTC_ALRMBSSR_MASKSS_0 (0x1UL << RTC_ALRMBSSR_MASKSS_Pos) /*!< 0x01000000 */
-#define RTC_ALRMBSSR_MASKSS_1 (0x2UL << RTC_ALRMBSSR_MASKSS_Pos) /*!< 0x02000000 */
-#define RTC_ALRMBSSR_MASKSS_2 (0x4UL << RTC_ALRMBSSR_MASKSS_Pos) /*!< 0x04000000 */
-#define RTC_ALRMBSSR_MASKSS_3 (0x8UL << RTC_ALRMBSSR_MASKSS_Pos) /*!< 0x08000000 */
-#define RTC_ALRMBSSR_SS_Pos (0U)
-#define RTC_ALRMBSSR_SS_Msk (0x7FFFUL << RTC_ALRMBSSR_SS_Pos) /*!< 0x00007FFF */
-#define RTC_ALRMBSSR_SS RTC_ALRMBSSR_SS_Msk
-
-/******************** Bits definition for RTC_BKP0R register ****************/
-#define RTC_BKP0R_Pos (0U)
-#define RTC_BKP0R_Msk (0xFFFFFFFFUL << RTC_BKP0R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP0R RTC_BKP0R_Msk
-
-/******************** Bits definition for RTC_BKP1R register ****************/
-#define RTC_BKP1R_Pos (0U)
-#define RTC_BKP1R_Msk (0xFFFFFFFFUL << RTC_BKP1R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP1R RTC_BKP1R_Msk
-
-/******************** Bits definition for RTC_BKP2R register ****************/
-#define RTC_BKP2R_Pos (0U)
-#define RTC_BKP2R_Msk (0xFFFFFFFFUL << RTC_BKP2R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP2R RTC_BKP2R_Msk
-
-/******************** Bits definition for RTC_BKP3R register ****************/
-#define RTC_BKP3R_Pos (0U)
-#define RTC_BKP3R_Msk (0xFFFFFFFFUL << RTC_BKP3R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP3R RTC_BKP3R_Msk
-
-/******************** Bits definition for RTC_BKP4R register ****************/
-#define RTC_BKP4R_Pos (0U)
-#define RTC_BKP4R_Msk (0xFFFFFFFFUL << RTC_BKP4R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP4R RTC_BKP4R_Msk
-
-/******************** Bits definition for RTC_BKP5R register ****************/
-#define RTC_BKP5R_Pos (0U)
-#define RTC_BKP5R_Msk (0xFFFFFFFFUL << RTC_BKP5R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP5R RTC_BKP5R_Msk
-
-/******************** Bits definition for RTC_BKP6R register ****************/
-#define RTC_BKP6R_Pos (0U)
-#define RTC_BKP6R_Msk (0xFFFFFFFFUL << RTC_BKP6R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP6R RTC_BKP6R_Msk
-
-/******************** Bits definition for RTC_BKP7R register ****************/
-#define RTC_BKP7R_Pos (0U)
-#define RTC_BKP7R_Msk (0xFFFFFFFFUL << RTC_BKP7R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP7R RTC_BKP7R_Msk
-
-/******************** Bits definition for RTC_BKP8R register ****************/
-#define RTC_BKP8R_Pos (0U)
-#define RTC_BKP8R_Msk (0xFFFFFFFFUL << RTC_BKP8R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP8R RTC_BKP8R_Msk
-
-/******************** Bits definition for RTC_BKP9R register ****************/
-#define RTC_BKP9R_Pos (0U)
-#define RTC_BKP9R_Msk (0xFFFFFFFFUL << RTC_BKP9R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP9R RTC_BKP9R_Msk
-
-/******************** Bits definition for RTC_BKP10R register ***************/
-#define RTC_BKP10R_Pos (0U)
-#define RTC_BKP10R_Msk (0xFFFFFFFFUL << RTC_BKP10R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP10R RTC_BKP10R_Msk
-
-/******************** Bits definition for RTC_BKP11R register ***************/
-#define RTC_BKP11R_Pos (0U)
-#define RTC_BKP11R_Msk (0xFFFFFFFFUL << RTC_BKP11R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP11R RTC_BKP11R_Msk
-
-/******************** Bits definition for RTC_BKP12R register ***************/
-#define RTC_BKP12R_Pos (0U)
-#define RTC_BKP12R_Msk (0xFFFFFFFFUL << RTC_BKP12R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP12R RTC_BKP12R_Msk
-
-/******************** Bits definition for RTC_BKP13R register ***************/
-#define RTC_BKP13R_Pos (0U)
-#define RTC_BKP13R_Msk (0xFFFFFFFFUL << RTC_BKP13R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP13R RTC_BKP13R_Msk
-
-/******************** Bits definition for RTC_BKP14R register ***************/
-#define RTC_BKP14R_Pos (0U)
-#define RTC_BKP14R_Msk (0xFFFFFFFFUL << RTC_BKP14R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP14R RTC_BKP14R_Msk
-
-/******************** Bits definition for RTC_BKP15R register ***************/
-#define RTC_BKP15R_Pos (0U)
-#define RTC_BKP15R_Msk (0xFFFFFFFFUL << RTC_BKP15R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP15R RTC_BKP15R_Msk
-
-/******************** Bits definition for RTC_BKP16R register ***************/
-#define RTC_BKP16R_Pos (0U)
-#define RTC_BKP16R_Msk (0xFFFFFFFFUL << RTC_BKP16R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP16R RTC_BKP16R_Msk
-
-/******************** Bits definition for RTC_BKP17R register ***************/
-#define RTC_BKP17R_Pos (0U)
-#define RTC_BKP17R_Msk (0xFFFFFFFFUL << RTC_BKP17R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP17R RTC_BKP17R_Msk
-
-/******************** Bits definition for RTC_BKP18R register ***************/
-#define RTC_BKP18R_Pos (0U)
-#define RTC_BKP18R_Msk (0xFFFFFFFFUL << RTC_BKP18R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP18R RTC_BKP18R_Msk
-
-/******************** Bits definition for RTC_BKP19R register ***************/
-#define RTC_BKP19R_Pos (0U)
-#define RTC_BKP19R_Msk (0xFFFFFFFFUL << RTC_BKP19R_Pos) /*!< 0xFFFFFFFF */
-#define RTC_BKP19R RTC_BKP19R_Msk
-
-/******************** Number of backup registers ******************************/
-#define RTC_BKP_NUMBER 0x000000014U
-
-
-/******************************************************************************/
-/* */
-/* SD host Interface */
-/* */
-/******************************************************************************/
-/****************** Bit definition for SDIO_POWER register ******************/
-#define SDIO_POWER_PWRCTRL_Pos (0U)
-#define SDIO_POWER_PWRCTRL_Msk (0x3UL << SDIO_POWER_PWRCTRL_Pos) /*!< 0x00000003 */
-#define SDIO_POWER_PWRCTRL SDIO_POWER_PWRCTRL_Msk /*!<PWRCTRL[1:0] bits (Power supply control bits) */
-#define SDIO_POWER_PWRCTRL_0 (0x1UL << SDIO_POWER_PWRCTRL_Pos) /*!< 0x01 */
-#define SDIO_POWER_PWRCTRL_1 (0x2UL << SDIO_POWER_PWRCTRL_Pos) /*!< 0x02 */
-
-/****************** Bit definition for SDIO_CLKCR register ******************/
-#define SDIO_CLKCR_CLKDIV_Pos (0U)
-#define SDIO_CLKCR_CLKDIV_Msk (0xFFUL << SDIO_CLKCR_CLKDIV_Pos) /*!< 0x000000FF */
-#define SDIO_CLKCR_CLKDIV SDIO_CLKCR_CLKDIV_Msk /*!<Clock divide factor */
-#define SDIO_CLKCR_CLKEN_Pos (8U)
-#define SDIO_CLKCR_CLKEN_Msk (0x1UL << SDIO_CLKCR_CLKEN_Pos) /*!< 0x00000100 */
-#define SDIO_CLKCR_CLKEN SDIO_CLKCR_CLKEN_Msk /*!<Clock enable bit */
-#define SDIO_CLKCR_PWRSAV_Pos (9U)
-#define SDIO_CLKCR_PWRSAV_Msk (0x1UL << SDIO_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
-#define SDIO_CLKCR_PWRSAV SDIO_CLKCR_PWRSAV_Msk /*!<Power saving configuration bit */
-#define SDIO_CLKCR_BYPASS_Pos (10U)
-#define SDIO_CLKCR_BYPASS_Msk (0x1UL << SDIO_CLKCR_BYPASS_Pos) /*!< 0x00000400 */
-#define SDIO_CLKCR_BYPASS SDIO_CLKCR_BYPASS_Msk /*!<Clock divider bypass enable bit */
-
-#define SDIO_CLKCR_WIDBUS_Pos (11U)
-#define SDIO_CLKCR_WIDBUS_Msk (0x3UL << SDIO_CLKCR_WIDBUS_Pos) /*!< 0x00001800 */
-#define SDIO_CLKCR_WIDBUS SDIO_CLKCR_WIDBUS_Msk /*!<WIDBUS[1:0] bits (Wide bus mode enable bit) */
-#define SDIO_CLKCR_WIDBUS_0 (0x1UL << SDIO_CLKCR_WIDBUS_Pos) /*!< 0x0800 */
-#define SDIO_CLKCR_WIDBUS_1 (0x2UL << SDIO_CLKCR_WIDBUS_Pos) /*!< 0x1000 */
-
-#define SDIO_CLKCR_NEGEDGE_Pos (13U)
-#define SDIO_CLKCR_NEGEDGE_Msk (0x1UL << SDIO_CLKCR_NEGEDGE_Pos) /*!< 0x00002000 */
-#define SDIO_CLKCR_NEGEDGE SDIO_CLKCR_NEGEDGE_Msk /*!<SDIO_CK dephasing selection bit */
-#define SDIO_CLKCR_HWFC_EN_Pos (14U)
-#define SDIO_CLKCR_HWFC_EN_Msk (0x1UL << SDIO_CLKCR_HWFC_EN_Pos) /*!< 0x00004000 */
-#define SDIO_CLKCR_HWFC_EN SDIO_CLKCR_HWFC_EN_Msk /*!<HW Flow Control enable */
-
-/******************* Bit definition for SDIO_ARG register *******************/
-#define SDIO_ARG_CMDARG_Pos (0U)
-#define SDIO_ARG_CMDARG_Msk (0xFFFFFFFFUL << SDIO_ARG_CMDARG_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_ARG_CMDARG SDIO_ARG_CMDARG_Msk /*!<Command argument */
-
-/******************* Bit definition for SDIO_CMD register *******************/
-#define SDIO_CMD_CMDINDEX_Pos (0U)
-#define SDIO_CMD_CMDINDEX_Msk (0x3FUL << SDIO_CMD_CMDINDEX_Pos) /*!< 0x0000003F */
-#define SDIO_CMD_CMDINDEX SDIO_CMD_CMDINDEX_Msk /*!<Command Index */
-
-#define SDIO_CMD_WAITRESP_Pos (6U)
-#define SDIO_CMD_WAITRESP_Msk (0x3UL << SDIO_CMD_WAITRESP_Pos) /*!< 0x000000C0 */
-#define SDIO_CMD_WAITRESP SDIO_CMD_WAITRESP_Msk /*!<WAITRESP[1:0] bits (Wait for response bits) */
-#define SDIO_CMD_WAITRESP_0 (0x1UL << SDIO_CMD_WAITRESP_Pos) /*!< 0x0040 */
-#define SDIO_CMD_WAITRESP_1 (0x2UL << SDIO_CMD_WAITRESP_Pos) /*!< 0x0080 */
-
-#define SDIO_CMD_WAITINT_Pos (8U)
-#define SDIO_CMD_WAITINT_Msk (0x1UL << SDIO_CMD_WAITINT_Pos) /*!< 0x00000100 */
-#define SDIO_CMD_WAITINT SDIO_CMD_WAITINT_Msk /*!<CPSM Waits for Interrupt Request */
-#define SDIO_CMD_WAITPEND_Pos (9U)
-#define SDIO_CMD_WAITPEND_Msk (0x1UL << SDIO_CMD_WAITPEND_Pos) /*!< 0x00000200 */
-#define SDIO_CMD_WAITPEND SDIO_CMD_WAITPEND_Msk /*!<CPSM Waits for ends of data transfer (CmdPend internal signal) */
-#define SDIO_CMD_CPSMEN_Pos (10U)
-#define SDIO_CMD_CPSMEN_Msk (0x1UL << SDIO_CMD_CPSMEN_Pos) /*!< 0x00000400 */
-#define SDIO_CMD_CPSMEN SDIO_CMD_CPSMEN_Msk /*!<Command path state machine (CPSM) Enable bit */
-#define SDIO_CMD_SDIOSUSPEND_Pos (11U)
-#define SDIO_CMD_SDIOSUSPEND_Msk (0x1UL << SDIO_CMD_SDIOSUSPEND_Pos) /*!< 0x00000800 */
-#define SDIO_CMD_SDIOSUSPEND SDIO_CMD_SDIOSUSPEND_Msk /*!<SD I/O suspend command */
-#define SDIO_CMD_ENCMDCOMPL_Pos (12U)
-#define SDIO_CMD_ENCMDCOMPL_Msk (0x1UL << SDIO_CMD_ENCMDCOMPL_Pos) /*!< 0x00001000 */
-#define SDIO_CMD_ENCMDCOMPL SDIO_CMD_ENCMDCOMPL_Msk /*!<Enable CMD completion */
-#define SDIO_CMD_NIEN_Pos (13U)
-#define SDIO_CMD_NIEN_Msk (0x1UL << SDIO_CMD_NIEN_Pos) /*!< 0x00002000 */
-#define SDIO_CMD_NIEN SDIO_CMD_NIEN_Msk /*!<Not Interrupt Enable */
-#define SDIO_CMD_CEATACMD_Pos (14U)
-#define SDIO_CMD_CEATACMD_Msk (0x1UL << SDIO_CMD_CEATACMD_Pos) /*!< 0x00004000 */
-#define SDIO_CMD_CEATACMD SDIO_CMD_CEATACMD_Msk /*!<CE-ATA command */
-
-/***************** Bit definition for SDIO_RESPCMD register *****************/
-#define SDIO_RESPCMD_RESPCMD_Pos (0U)
-#define SDIO_RESPCMD_RESPCMD_Msk (0x3FUL << SDIO_RESPCMD_RESPCMD_Pos) /*!< 0x0000003F */
-#define SDIO_RESPCMD_RESPCMD SDIO_RESPCMD_RESPCMD_Msk /*!<Response command index */
-
-/****************** Bit definition for SDIO_RESP0 register ******************/
-#define SDIO_RESP0_CARDSTATUS0_Pos (0U)
-#define SDIO_RESP0_CARDSTATUS0_Msk (0xFFFFFFFFUL << SDIO_RESP0_CARDSTATUS0_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_RESP0_CARDSTATUS0 SDIO_RESP0_CARDSTATUS0_Msk /*!<Card Status */
-
-/****************** Bit definition for SDIO_RESP1 register ******************/
-#define SDIO_RESP1_CARDSTATUS1_Pos (0U)
-#define SDIO_RESP1_CARDSTATUS1_Msk (0xFFFFFFFFUL << SDIO_RESP1_CARDSTATUS1_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_RESP1_CARDSTATUS1 SDIO_RESP1_CARDSTATUS1_Msk /*!<Card Status */
-
-/****************** Bit definition for SDIO_RESP2 register ******************/
-#define SDIO_RESP2_CARDSTATUS2_Pos (0U)
-#define SDIO_RESP2_CARDSTATUS2_Msk (0xFFFFFFFFUL << SDIO_RESP2_CARDSTATUS2_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_RESP2_CARDSTATUS2 SDIO_RESP2_CARDSTATUS2_Msk /*!<Card Status */
-
-/****************** Bit definition for SDIO_RESP3 register ******************/
-#define SDIO_RESP3_CARDSTATUS3_Pos (0U)
-#define SDIO_RESP3_CARDSTATUS3_Msk (0xFFFFFFFFUL << SDIO_RESP3_CARDSTATUS3_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_RESP3_CARDSTATUS3 SDIO_RESP3_CARDSTATUS3_Msk /*!<Card Status */
-
-/****************** Bit definition for SDIO_RESP4 register ******************/
-#define SDIO_RESP4_CARDSTATUS4_Pos (0U)
-#define SDIO_RESP4_CARDSTATUS4_Msk (0xFFFFFFFFUL << SDIO_RESP4_CARDSTATUS4_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_RESP4_CARDSTATUS4 SDIO_RESP4_CARDSTATUS4_Msk /*!<Card Status */
-
-/****************** Bit definition for SDIO_DTIMER register *****************/
-#define SDIO_DTIMER_DATATIME_Pos (0U)
-#define SDIO_DTIMER_DATATIME_Msk (0xFFFFFFFFUL << SDIO_DTIMER_DATATIME_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_DTIMER_DATATIME SDIO_DTIMER_DATATIME_Msk /*!<Data timeout period. */
-
-/****************** Bit definition for SDIO_DLEN register *******************/
-#define SDIO_DLEN_DATALENGTH_Pos (0U)
-#define SDIO_DLEN_DATALENGTH_Msk (0x1FFFFFFUL << SDIO_DLEN_DATALENGTH_Pos) /*!< 0x01FFFFFF */
-#define SDIO_DLEN_DATALENGTH SDIO_DLEN_DATALENGTH_Msk /*!<Data length value */
-
-/****************** Bit definition for SDIO_DCTRL register ******************/
-#define SDIO_DCTRL_DTEN_Pos (0U)
-#define SDIO_DCTRL_DTEN_Msk (0x1UL << SDIO_DCTRL_DTEN_Pos) /*!< 0x00000001 */
-#define SDIO_DCTRL_DTEN SDIO_DCTRL_DTEN_Msk /*!<Data transfer enabled bit */
-#define SDIO_DCTRL_DTDIR_Pos (1U)
-#define SDIO_DCTRL_DTDIR_Msk (0x1UL << SDIO_DCTRL_DTDIR_Pos) /*!< 0x00000002 */
-#define SDIO_DCTRL_DTDIR SDIO_DCTRL_DTDIR_Msk /*!<Data transfer direction selection */
-#define SDIO_DCTRL_DTMODE_Pos (2U)
-#define SDIO_DCTRL_DTMODE_Msk (0x1UL << SDIO_DCTRL_DTMODE_Pos) /*!< 0x00000004 */
-#define SDIO_DCTRL_DTMODE SDIO_DCTRL_DTMODE_Msk /*!<Data transfer mode selection */
-#define SDIO_DCTRL_DMAEN_Pos (3U)
-#define SDIO_DCTRL_DMAEN_Msk (0x1UL << SDIO_DCTRL_DMAEN_Pos) /*!< 0x00000008 */
-#define SDIO_DCTRL_DMAEN SDIO_DCTRL_DMAEN_Msk /*!<DMA enabled bit */
-
-#define SDIO_DCTRL_DBLOCKSIZE_Pos (4U)
-#define SDIO_DCTRL_DBLOCKSIZE_Msk (0xFUL << SDIO_DCTRL_DBLOCKSIZE_Pos) /*!< 0x000000F0 */
-#define SDIO_DCTRL_DBLOCKSIZE SDIO_DCTRL_DBLOCKSIZE_Msk /*!<DBLOCKSIZE[3:0] bits (Data block size) */
-#define SDIO_DCTRL_DBLOCKSIZE_0 (0x1UL << SDIO_DCTRL_DBLOCKSIZE_Pos) /*!< 0x0010 */
-#define SDIO_DCTRL_DBLOCKSIZE_1 (0x2UL << SDIO_DCTRL_DBLOCKSIZE_Pos) /*!< 0x0020 */
-#define SDIO_DCTRL_DBLOCKSIZE_2 (0x4UL << SDIO_DCTRL_DBLOCKSIZE_Pos) /*!< 0x0040 */
-#define SDIO_DCTRL_DBLOCKSIZE_3 (0x8UL << SDIO_DCTRL_DBLOCKSIZE_Pos) /*!< 0x0080 */
-
-#define SDIO_DCTRL_RWSTART_Pos (8U)
-#define SDIO_DCTRL_RWSTART_Msk (0x1UL << SDIO_DCTRL_RWSTART_Pos) /*!< 0x00000100 */
-#define SDIO_DCTRL_RWSTART SDIO_DCTRL_RWSTART_Msk /*!<Read wait start */
-#define SDIO_DCTRL_RWSTOP_Pos (9U)
-#define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
-#define SDIO_DCTRL_RWSTOP SDIO_DCTRL_RWSTOP_Msk /*!<Read wait stop */
-#define SDIO_DCTRL_RWMOD_Pos (10U)
-#define SDIO_DCTRL_RWMOD_Msk (0x1UL << SDIO_DCTRL_RWMOD_Pos) /*!< 0x00000400 */
-#define SDIO_DCTRL_RWMOD SDIO_DCTRL_RWMOD_Msk /*!<Read wait mode */
-#define SDIO_DCTRL_SDIOEN_Pos (11U)
-#define SDIO_DCTRL_SDIOEN_Msk (0x1UL << SDIO_DCTRL_SDIOEN_Pos) /*!< 0x00000800 */
-#define SDIO_DCTRL_SDIOEN SDIO_DCTRL_SDIOEN_Msk /*!<SD I/O enable functions */
-
-/****************** Bit definition for SDIO_DCOUNT register *****************/
-#define SDIO_DCOUNT_DATACOUNT_Pos (0U)
-#define SDIO_DCOUNT_DATACOUNT_Msk (0x1FFFFFFUL << SDIO_DCOUNT_DATACOUNT_Pos) /*!< 0x01FFFFFF */
-#define SDIO_DCOUNT_DATACOUNT SDIO_DCOUNT_DATACOUNT_Msk /*!<Data count value */
-
-/****************** Bit definition for SDIO_STA register ********************/
-#define SDIO_STA_CCRCFAIL_Pos (0U)
-#define SDIO_STA_CCRCFAIL_Msk (0x1UL << SDIO_STA_CCRCFAIL_Pos) /*!< 0x00000001 */
-#define SDIO_STA_CCRCFAIL SDIO_STA_CCRCFAIL_Msk /*!<Command response received (CRC check failed) */
-#define SDIO_STA_DCRCFAIL_Pos (1U)
-#define SDIO_STA_DCRCFAIL_Msk (0x1UL << SDIO_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
-#define SDIO_STA_DCRCFAIL SDIO_STA_DCRCFAIL_Msk /*!<Data block sent/received (CRC check failed) */
-#define SDIO_STA_CTIMEOUT_Pos (2U)
-#define SDIO_STA_CTIMEOUT_Msk (0x1UL << SDIO_STA_CTIMEOUT_Pos) /*!< 0x00000004 */
-#define SDIO_STA_CTIMEOUT SDIO_STA_CTIMEOUT_Msk /*!<Command response timeout */
-#define SDIO_STA_DTIMEOUT_Pos (3U)
-#define SDIO_STA_DTIMEOUT_Msk (0x1UL << SDIO_STA_DTIMEOUT_Pos) /*!< 0x00000008 */
-#define SDIO_STA_DTIMEOUT SDIO_STA_DTIMEOUT_Msk /*!<Data timeout */
-#define SDIO_STA_TXUNDERR_Pos (4U)
-#define SDIO_STA_TXUNDERR_Msk (0x1UL << SDIO_STA_TXUNDERR_Pos) /*!< 0x00000010 */
-#define SDIO_STA_TXUNDERR SDIO_STA_TXUNDERR_Msk /*!<Transmit FIFO underrun error */
-#define SDIO_STA_RXOVERR_Pos (5U)
-#define SDIO_STA_RXOVERR_Msk (0x1UL << SDIO_STA_RXOVERR_Pos) /*!< 0x00000020 */
-#define SDIO_STA_RXOVERR SDIO_STA_RXOVERR_Msk /*!<Received FIFO overrun error */
-#define SDIO_STA_CMDREND_Pos (6U)
-#define SDIO_STA_CMDREND_Msk (0x1UL << SDIO_STA_CMDREND_Pos) /*!< 0x00000040 */
-#define SDIO_STA_CMDREND SDIO_STA_CMDREND_Msk /*!<Command response received (CRC check passed) */
-#define SDIO_STA_CMDSENT_Pos (7U)
-#define SDIO_STA_CMDSENT_Msk (0x1UL << SDIO_STA_CMDSENT_Pos) /*!< 0x00000080 */
-#define SDIO_STA_CMDSENT SDIO_STA_CMDSENT_Msk /*!<Command sent (no response required) */
-#define SDIO_STA_DATAEND_Pos (8U)
-#define SDIO_STA_DATAEND_Msk (0x1UL << SDIO_STA_DATAEND_Pos) /*!< 0x00000100 */
-#define SDIO_STA_DATAEND SDIO_STA_DATAEND_Msk /*!<Data end (data counter, SDIDCOUNT, is zero) */
-#define SDIO_STA_STBITERR_Pos (9U)
-#define SDIO_STA_STBITERR_Msk (0x1UL << SDIO_STA_STBITERR_Pos) /*!< 0x00000200 */
-#define SDIO_STA_STBITERR SDIO_STA_STBITERR_Msk /*!<Start bit not detected on all data signals in wide bus mode */
-#define SDIO_STA_DBCKEND_Pos (10U)
-#define SDIO_STA_DBCKEND_Msk (0x1UL << SDIO_STA_DBCKEND_Pos) /*!< 0x00000400 */
-#define SDIO_STA_DBCKEND SDIO_STA_DBCKEND_Msk /*!<Data block sent/received (CRC check passed) */
-#define SDIO_STA_CMDACT_Pos (11U)
-#define SDIO_STA_CMDACT_Msk (0x1UL << SDIO_STA_CMDACT_Pos) /*!< 0x00000800 */
-#define SDIO_STA_CMDACT SDIO_STA_CMDACT_Msk /*!<Command transfer in progress */
-#define SDIO_STA_TXACT_Pos (12U)
-#define SDIO_STA_TXACT_Msk (0x1UL << SDIO_STA_TXACT_Pos) /*!< 0x00001000 */
-#define SDIO_STA_TXACT SDIO_STA_TXACT_Msk /*!<Data transmit in progress */
-#define SDIO_STA_RXACT_Pos (13U)
-#define SDIO_STA_RXACT_Msk (0x1UL << SDIO_STA_RXACT_Pos) /*!< 0x00002000 */
-#define SDIO_STA_RXACT SDIO_STA_RXACT_Msk /*!<Data receive in progress */
-#define SDIO_STA_TXFIFOHE_Pos (14U)
-#define SDIO_STA_TXFIFOHE_Msk (0x1UL << SDIO_STA_TXFIFOHE_Pos) /*!< 0x00004000 */
-#define SDIO_STA_TXFIFOHE SDIO_STA_TXFIFOHE_Msk /*!<Transmit FIFO Half Empty: at least 8 words can be written into the FIFO */
-#define SDIO_STA_RXFIFOHF_Pos (15U)
-#define SDIO_STA_RXFIFOHF_Msk (0x1UL << SDIO_STA_RXFIFOHF_Pos) /*!< 0x00008000 */
-#define SDIO_STA_RXFIFOHF SDIO_STA_RXFIFOHF_Msk /*!<Receive FIFO Half Full: there are at least 8 words in the FIFO */
-#define SDIO_STA_TXFIFOF_Pos (16U)
-#define SDIO_STA_TXFIFOF_Msk (0x1UL << SDIO_STA_TXFIFOF_Pos) /*!< 0x00010000 */
-#define SDIO_STA_TXFIFOF SDIO_STA_TXFIFOF_Msk /*!<Transmit FIFO full */
-#define SDIO_STA_RXFIFOF_Pos (17U)
-#define SDIO_STA_RXFIFOF_Msk (0x1UL << SDIO_STA_RXFIFOF_Pos) /*!< 0x00020000 */
-#define SDIO_STA_RXFIFOF SDIO_STA_RXFIFOF_Msk /*!<Receive FIFO full */
-#define SDIO_STA_TXFIFOE_Pos (18U)
-#define SDIO_STA_TXFIFOE_Msk (0x1UL << SDIO_STA_TXFIFOE_Pos) /*!< 0x00040000 */
-#define SDIO_STA_TXFIFOE SDIO_STA_TXFIFOE_Msk /*!<Transmit FIFO empty */
-#define SDIO_STA_RXFIFOE_Pos (19U)
-#define SDIO_STA_RXFIFOE_Msk (0x1UL << SDIO_STA_RXFIFOE_Pos) /*!< 0x00080000 */
-#define SDIO_STA_RXFIFOE SDIO_STA_RXFIFOE_Msk /*!<Receive FIFO empty */
-#define SDIO_STA_TXDAVL_Pos (20U)
-#define SDIO_STA_TXDAVL_Msk (0x1UL << SDIO_STA_TXDAVL_Pos) /*!< 0x00100000 */
-#define SDIO_STA_TXDAVL SDIO_STA_TXDAVL_Msk /*!<Data available in transmit FIFO */
-#define SDIO_STA_RXDAVL_Pos (21U)
-#define SDIO_STA_RXDAVL_Msk (0x1UL << SDIO_STA_RXDAVL_Pos) /*!< 0x00200000 */
-#define SDIO_STA_RXDAVL SDIO_STA_RXDAVL_Msk /*!<Data available in receive FIFO */
-#define SDIO_STA_SDIOIT_Pos (22U)
-#define SDIO_STA_SDIOIT_Msk (0x1UL << SDIO_STA_SDIOIT_Pos) /*!< 0x00400000 */
-#define SDIO_STA_SDIOIT SDIO_STA_SDIOIT_Msk /*!<SDIO interrupt received */
-#define SDIO_STA_CEATAEND_Pos (23U)
-#define SDIO_STA_CEATAEND_Msk (0x1UL << SDIO_STA_CEATAEND_Pos) /*!< 0x00800000 */
-#define SDIO_STA_CEATAEND SDIO_STA_CEATAEND_Msk /*!<CE-ATA command completion signal received for CMD61 */
-
-/******************* Bit definition for SDIO_ICR register *******************/
-#define SDIO_ICR_CCRCFAILC_Pos (0U)
-#define SDIO_ICR_CCRCFAILC_Msk (0x1UL << SDIO_ICR_CCRCFAILC_Pos) /*!< 0x00000001 */
-#define SDIO_ICR_CCRCFAILC SDIO_ICR_CCRCFAILC_Msk /*!<CCRCFAIL flag clear bit */
-#define SDIO_ICR_DCRCFAILC_Pos (1U)
-#define SDIO_ICR_DCRCFAILC_Msk (0x1UL << SDIO_ICR_DCRCFAILC_Pos) /*!< 0x00000002 */
-#define SDIO_ICR_DCRCFAILC SDIO_ICR_DCRCFAILC_Msk /*!<DCRCFAIL flag clear bit */
-#define SDIO_ICR_CTIMEOUTC_Pos (2U)
-#define SDIO_ICR_CTIMEOUTC_Msk (0x1UL << SDIO_ICR_CTIMEOUTC_Pos) /*!< 0x00000004 */
-#define SDIO_ICR_CTIMEOUTC SDIO_ICR_CTIMEOUTC_Msk /*!<CTIMEOUT flag clear bit */
-#define SDIO_ICR_DTIMEOUTC_Pos (3U)
-#define SDIO_ICR_DTIMEOUTC_Msk (0x1UL << SDIO_ICR_DTIMEOUTC_Pos) /*!< 0x00000008 */
-#define SDIO_ICR_DTIMEOUTC SDIO_ICR_DTIMEOUTC_Msk /*!<DTIMEOUT flag clear bit */
-#define SDIO_ICR_TXUNDERRC_Pos (4U)
-#define SDIO_ICR_TXUNDERRC_Msk (0x1UL << SDIO_ICR_TXUNDERRC_Pos) /*!< 0x00000010 */
-#define SDIO_ICR_TXUNDERRC SDIO_ICR_TXUNDERRC_Msk /*!<TXUNDERR flag clear bit */
-#define SDIO_ICR_RXOVERRC_Pos (5U)
-#define SDIO_ICR_RXOVERRC_Msk (0x1UL << SDIO_ICR_RXOVERRC_Pos) /*!< 0x00000020 */
-#define SDIO_ICR_RXOVERRC SDIO_ICR_RXOVERRC_Msk /*!<RXOVERR flag clear bit */
-#define SDIO_ICR_CMDRENDC_Pos (6U)
-#define SDIO_ICR_CMDRENDC_Msk (0x1UL << SDIO_ICR_CMDRENDC_Pos) /*!< 0x00000040 */
-#define SDIO_ICR_CMDRENDC SDIO_ICR_CMDRENDC_Msk /*!<CMDREND flag clear bit */
-#define SDIO_ICR_CMDSENTC_Pos (7U)
-#define SDIO_ICR_CMDSENTC_Msk (0x1UL << SDIO_ICR_CMDSENTC_Pos) /*!< 0x00000080 */
-#define SDIO_ICR_CMDSENTC SDIO_ICR_CMDSENTC_Msk /*!<CMDSENT flag clear bit */
-#define SDIO_ICR_DATAENDC_Pos (8U)
-#define SDIO_ICR_DATAENDC_Msk (0x1UL << SDIO_ICR_DATAENDC_Pos) /*!< 0x00000100 */
-#define SDIO_ICR_DATAENDC SDIO_ICR_DATAENDC_Msk /*!<DATAEND flag clear bit */
-#define SDIO_ICR_STBITERRC_Pos (9U)
-#define SDIO_ICR_STBITERRC_Msk (0x1UL << SDIO_ICR_STBITERRC_Pos) /*!< 0x00000200 */
-#define SDIO_ICR_STBITERRC SDIO_ICR_STBITERRC_Msk /*!<STBITERR flag clear bit */
-#define SDIO_ICR_DBCKENDC_Pos (10U)
-#define SDIO_ICR_DBCKENDC_Msk (0x1UL << SDIO_ICR_DBCKENDC_Pos) /*!< 0x00000400 */
-#define SDIO_ICR_DBCKENDC SDIO_ICR_DBCKENDC_Msk /*!<DBCKEND flag clear bit */
-#define SDIO_ICR_SDIOITC_Pos (22U)
-#define SDIO_ICR_SDIOITC_Msk (0x1UL << SDIO_ICR_SDIOITC_Pos) /*!< 0x00400000 */
-#define SDIO_ICR_SDIOITC SDIO_ICR_SDIOITC_Msk /*!<SDIOIT flag clear bit */
-#define SDIO_ICR_CEATAENDC_Pos (23U)
-#define SDIO_ICR_CEATAENDC_Msk (0x1UL << SDIO_ICR_CEATAENDC_Pos) /*!< 0x00800000 */
-#define SDIO_ICR_CEATAENDC SDIO_ICR_CEATAENDC_Msk /*!<CEATAEND flag clear bit */
-
-/****************** Bit definition for SDIO_MASK register *******************/
-#define SDIO_MASK_CCRCFAILIE_Pos (0U)
-#define SDIO_MASK_CCRCFAILIE_Msk (0x1UL << SDIO_MASK_CCRCFAILIE_Pos) /*!< 0x00000001 */
-#define SDIO_MASK_CCRCFAILIE SDIO_MASK_CCRCFAILIE_Msk /*!<Command CRC Fail Interrupt Enable */
-#define SDIO_MASK_DCRCFAILIE_Pos (1U)
-#define SDIO_MASK_DCRCFAILIE_Msk (0x1UL << SDIO_MASK_DCRCFAILIE_Pos) /*!< 0x00000002 */
-#define SDIO_MASK_DCRCFAILIE SDIO_MASK_DCRCFAILIE_Msk /*!<Data CRC Fail Interrupt Enable */
-#define SDIO_MASK_CTIMEOUTIE_Pos (2U)
-#define SDIO_MASK_CTIMEOUTIE_Msk (0x1UL << SDIO_MASK_CTIMEOUTIE_Pos) /*!< 0x00000004 */
-#define SDIO_MASK_CTIMEOUTIE SDIO_MASK_CTIMEOUTIE_Msk /*!<Command TimeOut Interrupt Enable */
-#define SDIO_MASK_DTIMEOUTIE_Pos (3U)
-#define SDIO_MASK_DTIMEOUTIE_Msk (0x1UL << SDIO_MASK_DTIMEOUTIE_Pos) /*!< 0x00000008 */
-#define SDIO_MASK_DTIMEOUTIE SDIO_MASK_DTIMEOUTIE_Msk /*!<Data TimeOut Interrupt Enable */
-#define SDIO_MASK_TXUNDERRIE_Pos (4U)
-#define SDIO_MASK_TXUNDERRIE_Msk (0x1UL << SDIO_MASK_TXUNDERRIE_Pos) /*!< 0x00000010 */
-#define SDIO_MASK_TXUNDERRIE SDIO_MASK_TXUNDERRIE_Msk /*!<Tx FIFO UnderRun Error Interrupt Enable */
-#define SDIO_MASK_RXOVERRIE_Pos (5U)
-#define SDIO_MASK_RXOVERRIE_Msk (0x1UL << SDIO_MASK_RXOVERRIE_Pos) /*!< 0x00000020 */
-#define SDIO_MASK_RXOVERRIE SDIO_MASK_RXOVERRIE_Msk /*!<Rx FIFO OverRun Error Interrupt Enable */
-#define SDIO_MASK_CMDRENDIE_Pos (6U)
-#define SDIO_MASK_CMDRENDIE_Msk (0x1UL << SDIO_MASK_CMDRENDIE_Pos) /*!< 0x00000040 */
-#define SDIO_MASK_CMDRENDIE SDIO_MASK_CMDRENDIE_Msk /*!<Command Response Received Interrupt Enable */
-#define SDIO_MASK_CMDSENTIE_Pos (7U)
-#define SDIO_MASK_CMDSENTIE_Msk (0x1UL << SDIO_MASK_CMDSENTIE_Pos) /*!< 0x00000080 */
-#define SDIO_MASK_CMDSENTIE SDIO_MASK_CMDSENTIE_Msk /*!<Command Sent Interrupt Enable */
-#define SDIO_MASK_DATAENDIE_Pos (8U)
-#define SDIO_MASK_DATAENDIE_Msk (0x1UL << SDIO_MASK_DATAENDIE_Pos) /*!< 0x00000100 */
-#define SDIO_MASK_DATAENDIE SDIO_MASK_DATAENDIE_Msk /*!<Data End Interrupt Enable */
-#define SDIO_MASK_STBITERRIE_Pos (9U)
-#define SDIO_MASK_STBITERRIE_Msk (0x1UL << SDIO_MASK_STBITERRIE_Pos) /*!< 0x00000200 */
-#define SDIO_MASK_STBITERRIE SDIO_MASK_STBITERRIE_Msk /*!<Start Bit Error Interrupt Enable */
-#define SDIO_MASK_DBCKENDIE_Pos (10U)
-#define SDIO_MASK_DBCKENDIE_Msk (0x1UL << SDIO_MASK_DBCKENDIE_Pos) /*!< 0x00000400 */
-#define SDIO_MASK_DBCKENDIE SDIO_MASK_DBCKENDIE_Msk /*!<Data Block End Interrupt Enable */
-#define SDIO_MASK_CMDACTIE_Pos (11U)
-#define SDIO_MASK_CMDACTIE_Msk (0x1UL << SDIO_MASK_CMDACTIE_Pos) /*!< 0x00000800 */
-#define SDIO_MASK_CMDACTIE SDIO_MASK_CMDACTIE_Msk /*!<CCommand Acting Interrupt Enable */
-#define SDIO_MASK_TXACTIE_Pos (12U)
-#define SDIO_MASK_TXACTIE_Msk (0x1UL << SDIO_MASK_TXACTIE_Pos) /*!< 0x00001000 */
-#define SDIO_MASK_TXACTIE SDIO_MASK_TXACTIE_Msk /*!<Data Transmit Acting Interrupt Enable */
-#define SDIO_MASK_RXACTIE_Pos (13U)
-#define SDIO_MASK_RXACTIE_Msk (0x1UL << SDIO_MASK_RXACTIE_Pos) /*!< 0x00002000 */
-#define SDIO_MASK_RXACTIE SDIO_MASK_RXACTIE_Msk /*!<Data receive acting interrupt enabled */
-#define SDIO_MASK_TXFIFOHEIE_Pos (14U)
-#define SDIO_MASK_TXFIFOHEIE_Msk (0x1UL << SDIO_MASK_TXFIFOHEIE_Pos) /*!< 0x00004000 */
-#define SDIO_MASK_TXFIFOHEIE SDIO_MASK_TXFIFOHEIE_Msk /*!<Tx FIFO Half Empty interrupt Enable */
-#define SDIO_MASK_RXFIFOHFIE_Pos (15U)
-#define SDIO_MASK_RXFIFOHFIE_Msk (0x1UL << SDIO_MASK_RXFIFOHFIE_Pos) /*!< 0x00008000 */
-#define SDIO_MASK_RXFIFOHFIE SDIO_MASK_RXFIFOHFIE_Msk /*!<Rx FIFO Half Full interrupt Enable */
-#define SDIO_MASK_TXFIFOFIE_Pos (16U)
-#define SDIO_MASK_TXFIFOFIE_Msk (0x1UL << SDIO_MASK_TXFIFOFIE_Pos) /*!< 0x00010000 */
-#define SDIO_MASK_TXFIFOFIE SDIO_MASK_TXFIFOFIE_Msk /*!<Tx FIFO Full interrupt Enable */
-#define SDIO_MASK_RXFIFOFIE_Pos (17U)
-#define SDIO_MASK_RXFIFOFIE_Msk (0x1UL << SDIO_MASK_RXFIFOFIE_Pos) /*!< 0x00020000 */
-#define SDIO_MASK_RXFIFOFIE SDIO_MASK_RXFIFOFIE_Msk /*!<Rx FIFO Full interrupt Enable */
-#define SDIO_MASK_TXFIFOEIE_Pos (18U)
-#define SDIO_MASK_TXFIFOEIE_Msk (0x1UL << SDIO_MASK_TXFIFOEIE_Pos) /*!< 0x00040000 */
-#define SDIO_MASK_TXFIFOEIE SDIO_MASK_TXFIFOEIE_Msk /*!<Tx FIFO Empty interrupt Enable */
-#define SDIO_MASK_RXFIFOEIE_Pos (19U)
-#define SDIO_MASK_RXFIFOEIE_Msk (0x1UL << SDIO_MASK_RXFIFOEIE_Pos) /*!< 0x00080000 */
-#define SDIO_MASK_RXFIFOEIE SDIO_MASK_RXFIFOEIE_Msk /*!<Rx FIFO Empty interrupt Enable */
-#define SDIO_MASK_TXDAVLIE_Pos (20U)
-#define SDIO_MASK_TXDAVLIE_Msk (0x1UL << SDIO_MASK_TXDAVLIE_Pos) /*!< 0x00100000 */
-#define SDIO_MASK_TXDAVLIE SDIO_MASK_TXDAVLIE_Msk /*!<Data available in Tx FIFO interrupt Enable */
-#define SDIO_MASK_RXDAVLIE_Pos (21U)
-#define SDIO_MASK_RXDAVLIE_Msk (0x1UL << SDIO_MASK_RXDAVLIE_Pos) /*!< 0x00200000 */
-#define SDIO_MASK_RXDAVLIE SDIO_MASK_RXDAVLIE_Msk /*!<Data available in Rx FIFO interrupt Enable */
-#define SDIO_MASK_SDIOITIE_Pos (22U)
-#define SDIO_MASK_SDIOITIE_Msk (0x1UL << SDIO_MASK_SDIOITIE_Pos) /*!< 0x00400000 */
-#define SDIO_MASK_SDIOITIE SDIO_MASK_SDIOITIE_Msk /*!<SDIO Mode Interrupt Received interrupt Enable */
-#define SDIO_MASK_CEATAENDIE_Pos (23U)
-#define SDIO_MASK_CEATAENDIE_Msk (0x1UL << SDIO_MASK_CEATAENDIE_Pos) /*!< 0x00800000 */
-#define SDIO_MASK_CEATAENDIE SDIO_MASK_CEATAENDIE_Msk /*!<CE-ATA command completion signal received Interrupt Enable */
-
-/***************** Bit definition for SDIO_FIFOCNT register *****************/
-#define SDIO_FIFOCNT_FIFOCOUNT_Pos (0U)
-#define SDIO_FIFOCNT_FIFOCOUNT_Msk (0xFFFFFFUL << SDIO_FIFOCNT_FIFOCOUNT_Pos) /*!< 0x00FFFFFF */
-#define SDIO_FIFOCNT_FIFOCOUNT SDIO_FIFOCNT_FIFOCOUNT_Msk /*!<Remaining number of words to be written to or read from the FIFO */
-
-/****************** Bit definition for SDIO_FIFO register *******************/
-#define SDIO_FIFO_FIFODATA_Pos (0U)
-#define SDIO_FIFO_FIFODATA_Msk (0xFFFFFFFFUL << SDIO_FIFO_FIFODATA_Pos) /*!< 0xFFFFFFFF */
-#define SDIO_FIFO_FIFODATA SDIO_FIFO_FIFODATA_Msk /*!<Receive and transmit FIFO data */
-
-/******************************************************************************/
-/* */
-/* Serial Peripheral Interface */
-/* */
-/******************************************************************************/
-#define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */
-
-/******************* Bit definition for SPI_CR1 register ********************/
-#define SPI_CR1_CPHA_Pos (0U)
-#define SPI_CR1_CPHA_Msk (0x1UL << SPI_CR1_CPHA_Pos) /*!< 0x00000001 */
-#define SPI_CR1_CPHA SPI_CR1_CPHA_Msk /*!<Clock Phase */
-#define SPI_CR1_CPOL_Pos (1U)
-#define SPI_CR1_CPOL_Msk (0x1UL << SPI_CR1_CPOL_Pos) /*!< 0x00000002 */
-#define SPI_CR1_CPOL SPI_CR1_CPOL_Msk /*!<Clock Polarity */
-#define SPI_CR1_MSTR_Pos (2U)
-#define SPI_CR1_MSTR_Msk (0x1UL << SPI_CR1_MSTR_Pos) /*!< 0x00000004 */
-#define SPI_CR1_MSTR SPI_CR1_MSTR_Msk /*!<Master Selection */
-
-#define SPI_CR1_BR_Pos (3U)
-#define SPI_CR1_BR_Msk (0x7UL << SPI_CR1_BR_Pos) /*!< 0x00000038 */
-#define SPI_CR1_BR SPI_CR1_BR_Msk /*!<BR[2:0] bits (Baud Rate Control) */
-#define SPI_CR1_BR_0 (0x1UL << SPI_CR1_BR_Pos) /*!< 0x00000008 */
-#define SPI_CR1_BR_1 (0x2UL << SPI_CR1_BR_Pos) /*!< 0x00000010 */
-#define SPI_CR1_BR_2 (0x4UL << SPI_CR1_BR_Pos) /*!< 0x00000020 */
-
-#define SPI_CR1_SPE_Pos (6U)
-#define SPI_CR1_SPE_Msk (0x1UL << SPI_CR1_SPE_Pos) /*!< 0x00000040 */
-#define SPI_CR1_SPE SPI_CR1_SPE_Msk /*!<SPI Enable */
-#define SPI_CR1_LSBFIRST_Pos (7U)
-#define SPI_CR1_LSBFIRST_Msk (0x1UL << SPI_CR1_LSBFIRST_Pos) /*!< 0x00000080 */
-#define SPI_CR1_LSBFIRST SPI_CR1_LSBFIRST_Msk /*!<Frame Format */
-#define SPI_CR1_SSI_Pos (8U)
-#define SPI_CR1_SSI_Msk (0x1UL << SPI_CR1_SSI_Pos) /*!< 0x00000100 */
-#define SPI_CR1_SSI SPI_CR1_SSI_Msk /*!<Internal slave select */
-#define SPI_CR1_SSM_Pos (9U)
-#define SPI_CR1_SSM_Msk (0x1UL << SPI_CR1_SSM_Pos) /*!< 0x00000200 */
-#define SPI_CR1_SSM SPI_CR1_SSM_Msk /*!<Software slave management */
-#define SPI_CR1_RXONLY_Pos (10U)
-#define SPI_CR1_RXONLY_Msk (0x1UL << SPI_CR1_RXONLY_Pos) /*!< 0x00000400 */
-#define SPI_CR1_RXONLY SPI_CR1_RXONLY_Msk /*!<Receive only */
-#define SPI_CR1_DFF_Pos (11U)
-#define SPI_CR1_DFF_Msk (0x1UL << SPI_CR1_DFF_Pos) /*!< 0x00000800 */
-#define SPI_CR1_DFF SPI_CR1_DFF_Msk /*!<Data Frame Format */
-#define SPI_CR1_CRCNEXT_Pos (12U)
-#define SPI_CR1_CRCNEXT_Msk (0x1UL << SPI_CR1_CRCNEXT_Pos) /*!< 0x00001000 */
-#define SPI_CR1_CRCNEXT SPI_CR1_CRCNEXT_Msk /*!<Transmit CRC next */
-#define SPI_CR1_CRCEN_Pos (13U)
-#define SPI_CR1_CRCEN_Msk (0x1UL << SPI_CR1_CRCEN_Pos) /*!< 0x00002000 */
-#define SPI_CR1_CRCEN SPI_CR1_CRCEN_Msk /*!<Hardware CRC calculation enable */
-#define SPI_CR1_BIDIOE_Pos (14U)
-#define SPI_CR1_BIDIOE_Msk (0x1UL << SPI_CR1_BIDIOE_Pos) /*!< 0x00004000 */
-#define SPI_CR1_BIDIOE SPI_CR1_BIDIOE_Msk /*!<Output enable in bidirectional mode */
-#define SPI_CR1_BIDIMODE_Pos (15U)
-#define SPI_CR1_BIDIMODE_Msk (0x1UL << SPI_CR1_BIDIMODE_Pos) /*!< 0x00008000 */
-#define SPI_CR1_BIDIMODE SPI_CR1_BIDIMODE_Msk /*!<Bidirectional data mode enable */
-
-/******************* Bit definition for SPI_CR2 register ********************/
-#define SPI_CR2_RXDMAEN_Pos (0U)
-#define SPI_CR2_RXDMAEN_Msk (0x1UL << SPI_CR2_RXDMAEN_Pos) /*!< 0x00000001 */
-#define SPI_CR2_RXDMAEN SPI_CR2_RXDMAEN_Msk /*!<Rx Buffer DMA Enable */
-#define SPI_CR2_TXDMAEN_Pos (1U)
-#define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
-#define SPI_CR2_TXDMAEN SPI_CR2_TXDMAEN_Msk /*!<Tx Buffer DMA Enable */
-#define SPI_CR2_SSOE_Pos (2U)
-#define SPI_CR2_SSOE_Msk (0x1UL << SPI_CR2_SSOE_Pos) /*!< 0x00000004 */
-#define SPI_CR2_SSOE SPI_CR2_SSOE_Msk /*!<SS Output Enable */
-#define SPI_CR2_FRF_Pos (4U)
-#define SPI_CR2_FRF_Msk (0x1UL << SPI_CR2_FRF_Pos) /*!< 0x00000010 */
-#define SPI_CR2_FRF SPI_CR2_FRF_Msk /*!<Frame Format */
-#define SPI_CR2_ERRIE_Pos (5U)
-#define SPI_CR2_ERRIE_Msk (0x1UL << SPI_CR2_ERRIE_Pos) /*!< 0x00000020 */
-#define SPI_CR2_ERRIE SPI_CR2_ERRIE_Msk /*!<Error Interrupt Enable */
-#define SPI_CR2_RXNEIE_Pos (6U)
-#define SPI_CR2_RXNEIE_Msk (0x1UL << SPI_CR2_RXNEIE_Pos) /*!< 0x00000040 */
-#define SPI_CR2_RXNEIE SPI_CR2_RXNEIE_Msk /*!<RX buffer Not Empty Interrupt Enable */
-#define SPI_CR2_TXEIE_Pos (7U)
-#define SPI_CR2_TXEIE_Msk (0x1UL << SPI_CR2_TXEIE_Pos) /*!< 0x00000080 */
-#define SPI_CR2_TXEIE SPI_CR2_TXEIE_Msk /*!<Tx buffer Empty Interrupt Enable */
-
-/******************** Bit definition for SPI_SR register ********************/
-#define SPI_SR_RXNE_Pos (0U)
-#define SPI_SR_RXNE_Msk (0x1UL << SPI_SR_RXNE_Pos) /*!< 0x00000001 */
-#define SPI_SR_RXNE SPI_SR_RXNE_Msk /*!<Receive buffer Not Empty */
-#define SPI_SR_TXE_Pos (1U)
-#define SPI_SR_TXE_Msk (0x1UL << SPI_SR_TXE_Pos) /*!< 0x00000002 */
-#define SPI_SR_TXE SPI_SR_TXE_Msk /*!<Transmit buffer Empty */
-#define SPI_SR_CHSIDE_Pos (2U)
-#define SPI_SR_CHSIDE_Msk (0x1UL << SPI_SR_CHSIDE_Pos) /*!< 0x00000004 */
-#define SPI_SR_CHSIDE SPI_SR_CHSIDE_Msk /*!<Channel side */
-#define SPI_SR_UDR_Pos (3U)
-#define SPI_SR_UDR_Msk (0x1UL << SPI_SR_UDR_Pos) /*!< 0x00000008 */
-#define SPI_SR_UDR SPI_SR_UDR_Msk /*!<Underrun flag */
-#define SPI_SR_CRCERR_Pos (4U)
-#define SPI_SR_CRCERR_Msk (0x1UL << SPI_SR_CRCERR_Pos) /*!< 0x00000010 */
-#define SPI_SR_CRCERR SPI_SR_CRCERR_Msk /*!<CRC Error flag */
-#define SPI_SR_MODF_Pos (5U)
-#define SPI_SR_MODF_Msk (0x1UL << SPI_SR_MODF_Pos) /*!< 0x00000020 */
-#define SPI_SR_MODF SPI_SR_MODF_Msk /*!<Mode fault */
-#define SPI_SR_OVR_Pos (6U)
-#define SPI_SR_OVR_Msk (0x1UL << SPI_SR_OVR_Pos) /*!< 0x00000040 */
-#define SPI_SR_OVR SPI_SR_OVR_Msk /*!<Overrun flag */
-#define SPI_SR_BSY_Pos (7U)
-#define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
-#define SPI_SR_BSY SPI_SR_BSY_Msk /*!<Busy flag */
-#define SPI_SR_FRE_Pos (8U)
-#define SPI_SR_FRE_Msk (0x1UL << SPI_SR_FRE_Pos) /*!< 0x00000100 */
-#define SPI_SR_FRE SPI_SR_FRE_Msk /*!<Frame format error flag */
-
-/******************** Bit definition for SPI_DR register ********************/
-#define SPI_DR_DR_Pos (0U)
-#define SPI_DR_DR_Msk (0xFFFFUL << SPI_DR_DR_Pos) /*!< 0x0000FFFF */
-#define SPI_DR_DR SPI_DR_DR_Msk /*!<Data Register */
-
-/******************* Bit definition for SPI_CRCPR register ******************/
-#define SPI_CRCPR_CRCPOLY_Pos (0U)
-#define SPI_CRCPR_CRCPOLY_Msk (0xFFFFUL << SPI_CRCPR_CRCPOLY_Pos) /*!< 0x0000FFFF */
-#define SPI_CRCPR_CRCPOLY SPI_CRCPR_CRCPOLY_Msk /*!<CRC polynomial register */
-
-/****************** Bit definition for SPI_RXCRCR register ******************/
-#define SPI_RXCRCR_RXCRC_Pos (0U)
-#define SPI_RXCRCR_RXCRC_Msk (0xFFFFUL << SPI_RXCRCR_RXCRC_Pos) /*!< 0x0000FFFF */
-#define SPI_RXCRCR_RXCRC SPI_RXCRCR_RXCRC_Msk /*!<Rx CRC Register */
-
-/****************** Bit definition for SPI_TXCRCR register ******************/
-#define SPI_TXCRCR_TXCRC_Pos (0U)
-#define SPI_TXCRCR_TXCRC_Msk (0xFFFFUL << SPI_TXCRCR_TXCRC_Pos) /*!< 0x0000FFFF */
-#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!<Tx CRC Register */
-
-/****************** Bit definition for SPI_I2SCFGR register *****************/
-#define SPI_I2SCFGR_CHLEN_Pos (0U)
-#define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
-#define SPI_I2SCFGR_CHLEN SPI_I2SCFGR_CHLEN_Msk /*!<Channel length (number of bits per audio channel) */
-
-#define SPI_I2SCFGR_DATLEN_Pos (1U)
-#define SPI_I2SCFGR_DATLEN_Msk (0x3UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000006 */
-#define SPI_I2SCFGR_DATLEN SPI_I2SCFGR_DATLEN_Msk /*!<DATLEN[1:0] bits (Data length to be transferred) */
-#define SPI_I2SCFGR_DATLEN_0 (0x1UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000002 */
-#define SPI_I2SCFGR_DATLEN_1 (0x2UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000004 */
-
-#define SPI_I2SCFGR_CKPOL_Pos (3U)
-#define SPI_I2SCFGR_CKPOL_Msk (0x1UL << SPI_I2SCFGR_CKPOL_Pos) /*!< 0x00000008 */
-#define SPI_I2SCFGR_CKPOL SPI_I2SCFGR_CKPOL_Msk /*!<steady state clock polarity */
-
-#define SPI_I2SCFGR_I2SSTD_Pos (4U)
-#define SPI_I2SCFGR_I2SSTD_Msk (0x3UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000030 */
-#define SPI_I2SCFGR_I2SSTD SPI_I2SCFGR_I2SSTD_Msk /*!<I2SSTD[1:0] bits (I2S standard selection) */
-#define SPI_I2SCFGR_I2SSTD_0 (0x1UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000010 */
-#define SPI_I2SCFGR_I2SSTD_1 (0x2UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000020 */
-
-#define SPI_I2SCFGR_PCMSYNC_Pos (7U)
-#define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
-#define SPI_I2SCFGR_PCMSYNC SPI_I2SCFGR_PCMSYNC_Msk /*!<PCM frame synchronization */
-
-#define SPI_I2SCFGR_I2SCFG_Pos (8U)
-#define SPI_I2SCFGR_I2SCFG_Msk (0x3UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000300 */
-#define SPI_I2SCFGR_I2SCFG SPI_I2SCFGR_I2SCFG_Msk /*!<I2SCFG[1:0] bits (I2S configuration mode) */
-#define SPI_I2SCFGR_I2SCFG_0 (0x1UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000100 */
-#define SPI_I2SCFGR_I2SCFG_1 (0x2UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000200 */
-
-#define SPI_I2SCFGR_I2SE_Pos (10U)
-#define SPI_I2SCFGR_I2SE_Msk (0x1UL << SPI_I2SCFGR_I2SE_Pos) /*!< 0x00000400 */
-#define SPI_I2SCFGR_I2SE SPI_I2SCFGR_I2SE_Msk /*!<I2S Enable */
-#define SPI_I2SCFGR_I2SMOD_Pos (11U)
-#define SPI_I2SCFGR_I2SMOD_Msk (0x1UL << SPI_I2SCFGR_I2SMOD_Pos) /*!< 0x00000800 */
-#define SPI_I2SCFGR_I2SMOD SPI_I2SCFGR_I2SMOD_Msk /*!<I2S mode selection */
-
-/****************** Bit definition for SPI_I2SPR register *******************/
-#define SPI_I2SPR_I2SDIV_Pos (0U)
-#define SPI_I2SPR_I2SDIV_Msk (0xFFUL << SPI_I2SPR_I2SDIV_Pos) /*!< 0x000000FF */
-#define SPI_I2SPR_I2SDIV SPI_I2SPR_I2SDIV_Msk /*!<I2S Linear prescaler */
-#define SPI_I2SPR_ODD_Pos (8U)
-#define SPI_I2SPR_ODD_Msk (0x1UL << SPI_I2SPR_ODD_Pos) /*!< 0x00000100 */
-#define SPI_I2SPR_ODD SPI_I2SPR_ODD_Msk /*!<Odd factor for the prescaler */
-#define SPI_I2SPR_MCKOE_Pos (9U)
-#define SPI_I2SPR_MCKOE_Msk (0x1UL << SPI_I2SPR_MCKOE_Pos) /*!< 0x00000200 */
-#define SPI_I2SPR_MCKOE SPI_I2SPR_MCKOE_Msk /*!<Master Clock Output Enable */
-
-/******************************************************************************/
-/* */
-/* SYSCFG */
-/* */
-/******************************************************************************/
-/****************** Bit definition for SYSCFG_MEMRMP register ***************/
-#define SYSCFG_MEMRMP_MEM_MODE_Pos (0U)
-#define SYSCFG_MEMRMP_MEM_MODE_Msk (0x3UL << SYSCFG_MEMRMP_MEM_MODE_Pos) /*!< 0x00000003 */
-#define SYSCFG_MEMRMP_MEM_MODE SYSCFG_MEMRMP_MEM_MODE_Msk /*!< SYSCFG_Memory Remap Config */
-#define SYSCFG_MEMRMP_MEM_MODE_0 (0x1UL << SYSCFG_MEMRMP_MEM_MODE_Pos) /*!< 0x00000001 */
-#define SYSCFG_MEMRMP_MEM_MODE_1 (0x2UL << SYSCFG_MEMRMP_MEM_MODE_Pos) /*!< 0x00000002 */
-/****************** Bit definition for SYSCFG_PMC register ******************/
-#define SYSCFG_PMC_ADC1DC2_Pos (16U)
-#define SYSCFG_PMC_ADC1DC2_Msk (0x1UL << SYSCFG_PMC_ADC1DC2_Pos) /*!< 0x00010000 */
-#define SYSCFG_PMC_ADC1DC2 SYSCFG_PMC_ADC1DC2_Msk /*!< Refer to AN4073 on how to use this bit */
-
-/***************** Bit definition for SYSCFG_EXTICR1 register ***************/
-#define SYSCFG_EXTICR1_EXTI0_Pos (0U)
-#define SYSCFG_EXTICR1_EXTI0_Msk (0xFUL << SYSCFG_EXTICR1_EXTI0_Pos) /*!< 0x0000000F */
-#define SYSCFG_EXTICR1_EXTI0 SYSCFG_EXTICR1_EXTI0_Msk /*!<EXTI 0 configuration */
-#define SYSCFG_EXTICR1_EXTI1_Pos (4U)
-#define SYSCFG_EXTICR1_EXTI1_Msk (0xFUL << SYSCFG_EXTICR1_EXTI1_Pos) /*!< 0x000000F0 */
-#define SYSCFG_EXTICR1_EXTI1 SYSCFG_EXTICR1_EXTI1_Msk /*!<EXTI 1 configuration */
-#define SYSCFG_EXTICR1_EXTI2_Pos (8U)
-#define SYSCFG_EXTICR1_EXTI2_Msk (0xFUL << SYSCFG_EXTICR1_EXTI2_Pos) /*!< 0x00000F00 */
-#define SYSCFG_EXTICR1_EXTI2 SYSCFG_EXTICR1_EXTI2_Msk /*!<EXTI 2 configuration */
-#define SYSCFG_EXTICR1_EXTI3_Pos (12U)
-#define SYSCFG_EXTICR1_EXTI3_Msk (0xFUL << SYSCFG_EXTICR1_EXTI3_Pos) /*!< 0x0000F000 */
-#define SYSCFG_EXTICR1_EXTI3 SYSCFG_EXTICR1_EXTI3_Msk /*!<EXTI 3 configuration */
-/**
- * @brief EXTI0 configuration
- */
-#define SYSCFG_EXTICR1_EXTI0_PA 0x0000U /*!<PA[0] pin */
-#define SYSCFG_EXTICR1_EXTI0_PB 0x0001U /*!<PB[0] pin */
-#define SYSCFG_EXTICR1_EXTI0_PC 0x0002U /*!<PC[0] pin */
-#define SYSCFG_EXTICR1_EXTI0_PD 0x0003U /*!<PD[0] pin */
-#define SYSCFG_EXTICR1_EXTI0_PE 0x0004U /*!<PE[0] pin */
-#define SYSCFG_EXTICR1_EXTI0_PH 0x0007U /*!<PH[0] pin */
-
-/**
- * @brief EXTI1 configuration
- */
-#define SYSCFG_EXTICR1_EXTI1_PA 0x0000U /*!<PA[1] pin */
-#define SYSCFG_EXTICR1_EXTI1_PB 0x0010U /*!<PB[1] pin */
-#define SYSCFG_EXTICR1_EXTI1_PC 0x0020U /*!<PC[1] pin */
-#define SYSCFG_EXTICR1_EXTI1_PD 0x0030U /*!<PD[1] pin */
-#define SYSCFG_EXTICR1_EXTI1_PE 0x0040U /*!<PE[1] pin */
-#define SYSCFG_EXTICR1_EXTI1_PH 0x0070U /*!<PH[1] pin */
-
-/**
- * @brief EXTI2 configuration
- */
-#define SYSCFG_EXTICR1_EXTI2_PA 0x0000U /*!<PA[2] pin */
-#define SYSCFG_EXTICR1_EXTI2_PB 0x0100U /*!<PB[2] pin */
-#define SYSCFG_EXTICR1_EXTI2_PC 0x0200U /*!<PC[2] pin */
-#define SYSCFG_EXTICR1_EXTI2_PD 0x0300U /*!<PD[2] pin */
-#define SYSCFG_EXTICR1_EXTI2_PE 0x0400U /*!<PE[2] pin */
-#define SYSCFG_EXTICR1_EXTI2_PH 0x0700U /*!<PH[2] pin */
-
-/**
- * @brief EXTI3 configuration
- */
-#define SYSCFG_EXTICR1_EXTI3_PA 0x0000U /*!<PA[3] pin */
-#define SYSCFG_EXTICR1_EXTI3_PB 0x1000U /*!<PB[3] pin */
-#define SYSCFG_EXTICR1_EXTI3_PC 0x2000U /*!<PC[3] pin */
-#define SYSCFG_EXTICR1_EXTI3_PD 0x3000U /*!<PD[3] pin */
-#define SYSCFG_EXTICR1_EXTI3_PE 0x4000U /*!<PE[3] pin */
-#define SYSCFG_EXTICR1_EXTI3_PH 0x7000U /*!<PH[3] pin */
-
-/***************** Bit definition for SYSCFG_EXTICR2 register ***************/
-#define SYSCFG_EXTICR2_EXTI4_Pos (0U)
-#define SYSCFG_EXTICR2_EXTI4_Msk (0xFUL << SYSCFG_EXTICR2_EXTI4_Pos) /*!< 0x0000000F */
-#define SYSCFG_EXTICR2_EXTI4 SYSCFG_EXTICR2_EXTI4_Msk /*!<EXTI 4 configuration */
-#define SYSCFG_EXTICR2_EXTI5_Pos (4U)
-#define SYSCFG_EXTICR2_EXTI5_Msk (0xFUL << SYSCFG_EXTICR2_EXTI5_Pos) /*!< 0x000000F0 */
-#define SYSCFG_EXTICR2_EXTI5 SYSCFG_EXTICR2_EXTI5_Msk /*!<EXTI 5 configuration */
-#define SYSCFG_EXTICR2_EXTI6_Pos (8U)
-#define SYSCFG_EXTICR2_EXTI6_Msk (0xFUL << SYSCFG_EXTICR2_EXTI6_Pos) /*!< 0x00000F00 */
-#define SYSCFG_EXTICR2_EXTI6 SYSCFG_EXTICR2_EXTI6_Msk /*!<EXTI 6 configuration */
-#define SYSCFG_EXTICR2_EXTI7_Pos (12U)
-#define SYSCFG_EXTICR2_EXTI7_Msk (0xFUL << SYSCFG_EXTICR2_EXTI7_Pos) /*!< 0x0000F000 */
-#define SYSCFG_EXTICR2_EXTI7 SYSCFG_EXTICR2_EXTI7_Msk /*!<EXTI 7 configuration */
-
-/**
- * @brief EXTI4 configuration
- */
-#define SYSCFG_EXTICR2_EXTI4_PA 0x0000U /*!<PA[4] pin */
-#define SYSCFG_EXTICR2_EXTI4_PB 0x0001U /*!<PB[4] pin */
-#define SYSCFG_EXTICR2_EXTI4_PC 0x0002U /*!<PC[4] pin */
-#define SYSCFG_EXTICR2_EXTI4_PD 0x0003U /*!<PD[4] pin */
-#define SYSCFG_EXTICR2_EXTI4_PE 0x0004U /*!<PE[4] pin */
-#define SYSCFG_EXTICR2_EXTI4_PH 0x0007U /*!<PH[4] pin */
-
-/**
- * @brief EXTI5 configuration
- */
-#define SYSCFG_EXTICR2_EXTI5_PA 0x0000U /*!<PA[5] pin */
-#define SYSCFG_EXTICR2_EXTI5_PB 0x0010U /*!<PB[5] pin */
-#define SYSCFG_EXTICR2_EXTI5_PC 0x0020U /*!<PC[5] pin */
-#define SYSCFG_EXTICR2_EXTI5_PD 0x0030U /*!<PD[5] pin */
-#define SYSCFG_EXTICR2_EXTI5_PE 0x0040U /*!<PE[5] pin */
-#define SYSCFG_EXTICR2_EXTI5_PH 0x0070U /*!<PH[5] pin */
-
-/**
- * @brief EXTI6 configuration
- */
-#define SYSCFG_EXTICR2_EXTI6_PA 0x0000U /*!<PA[6] pin */
-#define SYSCFG_EXTICR2_EXTI6_PB 0x0100U /*!<PB[6] pin */
-#define SYSCFG_EXTICR2_EXTI6_PC 0x0200U /*!<PC[6] pin */
-#define SYSCFG_EXTICR2_EXTI6_PD 0x0300U /*!<PD[6] pin */
-#define SYSCFG_EXTICR2_EXTI6_PE 0x0400U /*!<PE[6] pin */
-#define SYSCFG_EXTICR2_EXTI6_PH 0x0700U /*!<PH[6] pin */
-
-/**
- * @brief EXTI7 configuration
- */
-#define SYSCFG_EXTICR2_EXTI7_PA 0x0000U /*!<PA[7] pin */
-#define SYSCFG_EXTICR2_EXTI7_PB 0x1000U /*!<PB[7] pin */
-#define SYSCFG_EXTICR2_EXTI7_PC 0x2000U /*!<PC[7] pin */
-#define SYSCFG_EXTICR2_EXTI7_PD 0x3000U /*!<PD[7] pin */
-#define SYSCFG_EXTICR2_EXTI7_PE 0x4000U /*!<PE[7] pin */
-#define SYSCFG_EXTICR2_EXTI7_PH 0x7000U /*!<PH[7] pin */
-
-/***************** Bit definition for SYSCFG_EXTICR3 register ***************/
-#define SYSCFG_EXTICR3_EXTI8_Pos (0U)
-#define SYSCFG_EXTICR3_EXTI8_Msk (0xFUL << SYSCFG_EXTICR3_EXTI8_Pos) /*!< 0x0000000F */
-#define SYSCFG_EXTICR3_EXTI8 SYSCFG_EXTICR3_EXTI8_Msk /*!<EXTI 8 configuration */
-#define SYSCFG_EXTICR3_EXTI9_Pos (4U)
-#define SYSCFG_EXTICR3_EXTI9_Msk (0xFUL << SYSCFG_EXTICR3_EXTI9_Pos) /*!< 0x000000F0 */
-#define SYSCFG_EXTICR3_EXTI9 SYSCFG_EXTICR3_EXTI9_Msk /*!<EXTI 9 configuration */
-#define SYSCFG_EXTICR3_EXTI10_Pos (8U)
-#define SYSCFG_EXTICR3_EXTI10_Msk (0xFUL << SYSCFG_EXTICR3_EXTI10_Pos) /*!< 0x00000F00 */
-#define SYSCFG_EXTICR3_EXTI10 SYSCFG_EXTICR3_EXTI10_Msk /*!<EXTI 10 configuration */
-#define SYSCFG_EXTICR3_EXTI11_Pos (12U)
-#define SYSCFG_EXTICR3_EXTI11_Msk (0xFUL << SYSCFG_EXTICR3_EXTI11_Pos) /*!< 0x0000F000 */
-#define SYSCFG_EXTICR3_EXTI11 SYSCFG_EXTICR3_EXTI11_Msk /*!<EXTI 11 configuration */
-
-/**
- * @brief EXTI8 configuration
- */
-#define SYSCFG_EXTICR3_EXTI8_PA 0x0000U /*!<PA[8] pin */
-#define SYSCFG_EXTICR3_EXTI8_PB 0x0001U /*!<PB[8] pin */
-#define SYSCFG_EXTICR3_EXTI8_PC 0x0002U /*!<PC[8] pin */
-#define SYSCFG_EXTICR3_EXTI8_PD 0x0003U /*!<PD[8] pin */
-#define SYSCFG_EXTICR3_EXTI8_PE 0x0004U /*!<PE[8] pin */
-#define SYSCFG_EXTICR3_EXTI8_PH 0x0007U /*!<PH[8] pin */
-
-/**
- * @brief EXTI9 configuration
- */
-#define SYSCFG_EXTICR3_EXTI9_PA 0x0000U /*!<PA[9] pin */
-#define SYSCFG_EXTICR3_EXTI9_PB 0x0010U /*!<PB[9] pin */
-#define SYSCFG_EXTICR3_EXTI9_PC 0x0020U /*!<PC[9] pin */
-#define SYSCFG_EXTICR3_EXTI9_PD 0x0030U /*!<PD[9] pin */
-#define SYSCFG_EXTICR3_EXTI9_PE 0x0040U /*!<PE[9] pin */
-#define SYSCFG_EXTICR3_EXTI9_PH 0x0070U /*!<PH[9] pin */
-
-/**
- * @brief EXTI10 configuration
- */
-#define SYSCFG_EXTICR3_EXTI10_PA 0x0000U /*!<PA[10] pin */
-#define SYSCFG_EXTICR3_EXTI10_PB 0x0100U /*!<PB[10] pin */
-#define SYSCFG_EXTICR3_EXTI10_PC 0x0200U /*!<PC[10] pin */
-#define SYSCFG_EXTICR3_EXTI10_PD 0x0300U /*!<PD[10] pin */
-#define SYSCFG_EXTICR3_EXTI10_PE 0x0400U /*!<PE[10] pin */
-#define SYSCFG_EXTICR3_EXTI10_PH 0x0700U /*!<PH[10] pin */
-
-/**
- * @brief EXTI11 configuration
- */
-#define SYSCFG_EXTICR3_EXTI11_PA 0x0000U /*!<PA[11] pin */
-#define SYSCFG_EXTICR3_EXTI11_PB 0x1000U /*!<PB[11] pin */
-#define SYSCFG_EXTICR3_EXTI11_PC 0x2000U /*!<PC[11] pin */
-#define SYSCFG_EXTICR3_EXTI11_PD 0x3000U /*!<PD[11] pin */
-#define SYSCFG_EXTICR3_EXTI11_PE 0x4000U /*!<PE[11] pin */
-#define SYSCFG_EXTICR3_EXTI11_PH 0x7000U /*!<PH[11] pin */
-
-/***************** Bit definition for SYSCFG_EXTICR4 register ***************/
-#define SYSCFG_EXTICR4_EXTI12_Pos (0U)
-#define SYSCFG_EXTICR4_EXTI12_Msk (0xFUL << SYSCFG_EXTICR4_EXTI12_Pos) /*!< 0x0000000F */
-#define SYSCFG_EXTICR4_EXTI12 SYSCFG_EXTICR4_EXTI12_Msk /*!<EXTI 12 configuration */
-#define SYSCFG_EXTICR4_EXTI13_Pos (4U)
-#define SYSCFG_EXTICR4_EXTI13_Msk (0xFUL << SYSCFG_EXTICR4_EXTI13_Pos) /*!< 0x000000F0 */
-#define SYSCFG_EXTICR4_EXTI13 SYSCFG_EXTICR4_EXTI13_Msk /*!<EXTI 13 configuration */
-#define SYSCFG_EXTICR4_EXTI14_Pos (8U)
-#define SYSCFG_EXTICR4_EXTI14_Msk (0xFUL << SYSCFG_EXTICR4_EXTI14_Pos) /*!< 0x00000F00 */
-#define SYSCFG_EXTICR4_EXTI14 SYSCFG_EXTICR4_EXTI14_Msk /*!<EXTI 14 configuration */
-#define SYSCFG_EXTICR4_EXTI15_Pos (12U)
-#define SYSCFG_EXTICR4_EXTI15_Msk (0xFUL << SYSCFG_EXTICR4_EXTI15_Pos) /*!< 0x0000F000 */
-#define SYSCFG_EXTICR4_EXTI15 SYSCFG_EXTICR4_EXTI15_Msk /*!<EXTI 15 configuration */
-
-/**
- * @brief EXTI12 configuration
- */
-#define SYSCFG_EXTICR4_EXTI12_PA 0x0000U /*!<PA[12] pin */
-#define SYSCFG_EXTICR4_EXTI12_PB 0x0001U /*!<PB[12] pin */
-#define SYSCFG_EXTICR4_EXTI12_PC 0x0002U /*!<PC[12] pin */
-#define SYSCFG_EXTICR4_EXTI12_PD 0x0003U /*!<PD[12] pin */
-#define SYSCFG_EXTICR4_EXTI12_PE 0x0004U /*!<PE[12] pin */
-#define SYSCFG_EXTICR4_EXTI12_PH 0x0007U /*!<PH[12] pin */
-
-/**
- * @brief EXTI13 configuration
- */
-#define SYSCFG_EXTICR4_EXTI13_PA 0x0000U /*!<PA[13] pin */
-#define SYSCFG_EXTICR4_EXTI13_PB 0x0010U /*!<PB[13] pin */
-#define SYSCFG_EXTICR4_EXTI13_PC 0x0020U /*!<PC[13] pin */
-#define SYSCFG_EXTICR4_EXTI13_PD 0x0030U /*!<PD[13] pin */
-#define SYSCFG_EXTICR4_EXTI13_PE 0x0040U /*!<PE[13] pin */
-#define SYSCFG_EXTICR4_EXTI13_PH 0x0070U /*!<PH[13] pin */
-
-/**
- * @brief EXTI14 configuration
- */
-#define SYSCFG_EXTICR4_EXTI14_PA 0x0000U /*!<PA[14] pin */
-#define SYSCFG_EXTICR4_EXTI14_PB 0x0100U /*!<PB[14] pin */
-#define SYSCFG_EXTICR4_EXTI14_PC 0x0200U /*!<PC[14] pin */
-#define SYSCFG_EXTICR4_EXTI14_PD 0x0300U /*!<PD[14] pin */
-#define SYSCFG_EXTICR4_EXTI14_PE 0x0400U /*!<PE[14] pin */
-#define SYSCFG_EXTICR4_EXTI14_PH 0x0700U /*!<PH[14] pin */
-
-/**
- * @brief EXTI15 configuration
- */
-#define SYSCFG_EXTICR4_EXTI15_PA 0x0000U /*!<PA[15] pin */
-#define SYSCFG_EXTICR4_EXTI15_PB 0x1000U /*!<PB[15] pin */
-#define SYSCFG_EXTICR4_EXTI15_PC 0x2000U /*!<PC[15] pin */
-#define SYSCFG_EXTICR4_EXTI15_PD 0x3000U /*!<PD[15] pin */
-#define SYSCFG_EXTICR4_EXTI15_PE 0x4000U /*!<PE[15] pin */
-#define SYSCFG_EXTICR4_EXTI15_PH 0x7000U /*!<PH[15] pin */
-
-/****************** Bit definition for SYSCFG_CMPCR register ****************/
-#define SYSCFG_CMPCR_CMP_PD_Pos (0U)
-#define SYSCFG_CMPCR_CMP_PD_Msk (0x1UL << SYSCFG_CMPCR_CMP_PD_Pos) /*!< 0x00000001 */
-#define SYSCFG_CMPCR_CMP_PD SYSCFG_CMPCR_CMP_PD_Msk /*!<Compensation cell ready flag */
-#define SYSCFG_CMPCR_READY_Pos (8U)
-#define SYSCFG_CMPCR_READY_Msk (0x1UL << SYSCFG_CMPCR_READY_Pos) /*!< 0x00000100 */
-#define SYSCFG_CMPCR_READY SYSCFG_CMPCR_READY_Msk /*!<Compensation cell power-down */
-
-/******************************************************************************/
-/* */
-/* TIM */
-/* */
-/******************************************************************************/
-/******************* Bit definition for TIM_CR1 register ********************/
-#define TIM_CR1_CEN_Pos (0U)
-#define TIM_CR1_CEN_Msk (0x1UL << TIM_CR1_CEN_Pos) /*!< 0x00000001 */
-#define TIM_CR1_CEN TIM_CR1_CEN_Msk /*!<Counter enable */
-#define TIM_CR1_UDIS_Pos (1U)
-#define TIM_CR1_UDIS_Msk (0x1UL << TIM_CR1_UDIS_Pos) /*!< 0x00000002 */
-#define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */
-#define TIM_CR1_URS_Pos (2U)
-#define TIM_CR1_URS_Msk (0x1UL << TIM_CR1_URS_Pos) /*!< 0x00000004 */
-#define TIM_CR1_URS TIM_CR1_URS_Msk /*!<Update request source */
-#define TIM_CR1_OPM_Pos (3U)
-#define TIM_CR1_OPM_Msk (0x1UL << TIM_CR1_OPM_Pos) /*!< 0x00000008 */
-#define TIM_CR1_OPM TIM_CR1_OPM_Msk /*!<One pulse mode */
-#define TIM_CR1_DIR_Pos (4U)
-#define TIM_CR1_DIR_Msk (0x1UL << TIM_CR1_DIR_Pos) /*!< 0x00000010 */
-#define TIM_CR1_DIR TIM_CR1_DIR_Msk /*!<Direction */
-
-#define TIM_CR1_CMS_Pos (5U)
-#define TIM_CR1_CMS_Msk (0x3UL << TIM_CR1_CMS_Pos) /*!< 0x00000060 */
-#define TIM_CR1_CMS TIM_CR1_CMS_Msk /*!<CMS[1:0] bits (Center-aligned mode selection) */
-#define TIM_CR1_CMS_0 (0x1UL << TIM_CR1_CMS_Pos) /*!< 0x0020 */
-#define TIM_CR1_CMS_1 (0x2UL << TIM_CR1_CMS_Pos) /*!< 0x0040 */
-
-#define TIM_CR1_ARPE_Pos (7U)
-#define TIM_CR1_ARPE_Msk (0x1UL << TIM_CR1_ARPE_Pos) /*!< 0x00000080 */
-#define TIM_CR1_ARPE TIM_CR1_ARPE_Msk /*!<Auto-reload preload enable */
-
-#define TIM_CR1_CKD_Pos (8U)
-#define TIM_CR1_CKD_Msk (0x3UL << TIM_CR1_CKD_Pos) /*!< 0x00000300 */
-#define TIM_CR1_CKD TIM_CR1_CKD_Msk /*!<CKD[1:0] bits (clock division) */
-#define TIM_CR1_CKD_0 (0x1UL << TIM_CR1_CKD_Pos) /*!< 0x0100 */
-#define TIM_CR1_CKD_1 (0x2UL << TIM_CR1_CKD_Pos) /*!< 0x0200 */
-
-/******************* Bit definition for TIM_CR2 register ********************/
-#define TIM_CR2_CCPC_Pos (0U)
-#define TIM_CR2_CCPC_Msk (0x1UL << TIM_CR2_CCPC_Pos) /*!< 0x00000001 */
-#define TIM_CR2_CCPC TIM_CR2_CCPC_Msk /*!<Capture/Compare Preloaded Control */
-#define TIM_CR2_CCUS_Pos (2U)
-#define TIM_CR2_CCUS_Msk (0x1UL << TIM_CR2_CCUS_Pos) /*!< 0x00000004 */
-#define TIM_CR2_CCUS TIM_CR2_CCUS_Msk /*!<Capture/Compare Control Update Selection */
-#define TIM_CR2_CCDS_Pos (3U)
-#define TIM_CR2_CCDS_Msk (0x1UL << TIM_CR2_CCDS_Pos) /*!< 0x00000008 */
-#define TIM_CR2_CCDS TIM_CR2_CCDS_Msk /*!<Capture/Compare DMA Selection */
-
-#define TIM_CR2_MMS_Pos (4U)
-#define TIM_CR2_MMS_Msk (0x7UL << TIM_CR2_MMS_Pos) /*!< 0x00000070 */
-#define TIM_CR2_MMS TIM_CR2_MMS_Msk /*!<MMS[2:0] bits (Master Mode Selection) */
-#define TIM_CR2_MMS_0 (0x1UL << TIM_CR2_MMS_Pos) /*!< 0x0010 */
-#define TIM_CR2_MMS_1 (0x2UL << TIM_CR2_MMS_Pos) /*!< 0x0020 */
-#define TIM_CR2_MMS_2 (0x4UL << TIM_CR2_MMS_Pos) /*!< 0x0040 */
-
-#define TIM_CR2_TI1S_Pos (7U)
-#define TIM_CR2_TI1S_Msk (0x1UL << TIM_CR2_TI1S_Pos) /*!< 0x00000080 */
-#define TIM_CR2_TI1S TIM_CR2_TI1S_Msk /*!<TI1 Selection */
-#define TIM_CR2_OIS1_Pos (8U)
-#define TIM_CR2_OIS1_Msk (0x1UL << TIM_CR2_OIS1_Pos) /*!< 0x00000100 */
-#define TIM_CR2_OIS1 TIM_CR2_OIS1_Msk /*!<Output Idle state 1 (OC1 output) */
-#define TIM_CR2_OIS1N_Pos (9U)
-#define TIM_CR2_OIS1N_Msk (0x1UL << TIM_CR2_OIS1N_Pos) /*!< 0x00000200 */
-#define TIM_CR2_OIS1N TIM_CR2_OIS1N_Msk /*!<Output Idle state 1 (OC1N output) */
-#define TIM_CR2_OIS2_Pos (10U)
-#define TIM_CR2_OIS2_Msk (0x1UL << TIM_CR2_OIS2_Pos) /*!< 0x00000400 */
-#define TIM_CR2_OIS2 TIM_CR2_OIS2_Msk /*!<Output Idle state 2 (OC2 output) */
-#define TIM_CR2_OIS2N_Pos (11U)
-#define TIM_CR2_OIS2N_Msk (0x1UL << TIM_CR2_OIS2N_Pos) /*!< 0x00000800 */
-#define TIM_CR2_OIS2N TIM_CR2_OIS2N_Msk /*!<Output Idle state 2 (OC2N output) */
-#define TIM_CR2_OIS3_Pos (12U)
-#define TIM_CR2_OIS3_Msk (0x1UL << TIM_CR2_OIS3_Pos) /*!< 0x00001000 */
-#define TIM_CR2_OIS3 TIM_CR2_OIS3_Msk /*!<Output Idle state 3 (OC3 output) */
-#define TIM_CR2_OIS3N_Pos (13U)
-#define TIM_CR2_OIS3N_Msk (0x1UL << TIM_CR2_OIS3N_Pos) /*!< 0x00002000 */
-#define TIM_CR2_OIS3N TIM_CR2_OIS3N_Msk /*!<Output Idle state 3 (OC3N output) */
-#define TIM_CR2_OIS4_Pos (14U)
-#define TIM_CR2_OIS4_Msk (0x1UL << TIM_CR2_OIS4_Pos) /*!< 0x00004000 */
-#define TIM_CR2_OIS4 TIM_CR2_OIS4_Msk /*!<Output Idle state 4 (OC4 output) */
-
-/******************* Bit definition for TIM_SMCR register *******************/
-#define TIM_SMCR_SMS_Pos (0U)
-#define TIM_SMCR_SMS_Msk (0x7UL << TIM_SMCR_SMS_Pos) /*!< 0x00000007 */
-#define TIM_SMCR_SMS TIM_SMCR_SMS_Msk /*!<SMS[2:0] bits (Slave mode selection) */
-#define TIM_SMCR_SMS_0 (0x1UL << TIM_SMCR_SMS_Pos) /*!< 0x0001 */
-#define TIM_SMCR_SMS_1 (0x2UL << TIM_SMCR_SMS_Pos) /*!< 0x0002 */
-#define TIM_SMCR_SMS_2 (0x4UL << TIM_SMCR_SMS_Pos) /*!< 0x0004 */
-
-#define TIM_SMCR_TS_Pos (4U)
-#define TIM_SMCR_TS_Msk (0x7UL << TIM_SMCR_TS_Pos) /*!< 0x00000070 */
-#define TIM_SMCR_TS TIM_SMCR_TS_Msk /*!<TS[2:0] bits (Trigger selection) */
-#define TIM_SMCR_TS_0 (0x1UL << TIM_SMCR_TS_Pos) /*!< 0x0010 */
-#define TIM_SMCR_TS_1 (0x2UL << TIM_SMCR_TS_Pos) /*!< 0x0020 */
-#define TIM_SMCR_TS_2 (0x4UL << TIM_SMCR_TS_Pos) /*!< 0x0040 */
-
-#define TIM_SMCR_MSM_Pos (7U)
-#define TIM_SMCR_MSM_Msk (0x1UL << TIM_SMCR_MSM_Pos) /*!< 0x00000080 */
-#define TIM_SMCR_MSM TIM_SMCR_MSM_Msk /*!<Master/slave mode */
-
-#define TIM_SMCR_ETF_Pos (8U)
-#define TIM_SMCR_ETF_Msk (0xFUL << TIM_SMCR_ETF_Pos) /*!< 0x00000F00 */
-#define TIM_SMCR_ETF TIM_SMCR_ETF_Msk /*!<ETF[3:0] bits (External trigger filter) */
-#define TIM_SMCR_ETF_0 (0x1UL << TIM_SMCR_ETF_Pos) /*!< 0x0100 */
-#define TIM_SMCR_ETF_1 (0x2UL << TIM_SMCR_ETF_Pos) /*!< 0x0200 */
-#define TIM_SMCR_ETF_2 (0x4UL << TIM_SMCR_ETF_Pos) /*!< 0x0400 */
-#define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x0800 */
-
-#define TIM_SMCR_ETPS_Pos (12U)
-#define TIM_SMCR_ETPS_Msk (0x3UL << TIM_SMCR_ETPS_Pos) /*!< 0x00003000 */
-#define TIM_SMCR_ETPS TIM_SMCR_ETPS_Msk /*!<ETPS[1:0] bits (External trigger prescaler) */
-#define TIM_SMCR_ETPS_0 (0x1UL << TIM_SMCR_ETPS_Pos) /*!< 0x1000 */
-#define TIM_SMCR_ETPS_1 (0x2UL << TIM_SMCR_ETPS_Pos) /*!< 0x2000 */
-
-#define TIM_SMCR_ECE_Pos (14U)
-#define TIM_SMCR_ECE_Msk (0x1UL << TIM_SMCR_ECE_Pos) /*!< 0x00004000 */
-#define TIM_SMCR_ECE TIM_SMCR_ECE_Msk /*!<External clock enable */
-#define TIM_SMCR_ETP_Pos (15U)
-#define TIM_SMCR_ETP_Msk (0x1UL << TIM_SMCR_ETP_Pos) /*!< 0x00008000 */
-#define TIM_SMCR_ETP TIM_SMCR_ETP_Msk /*!<External trigger polarity */
-
-/******************* Bit definition for TIM_DIER register *******************/
-#define TIM_DIER_UIE_Pos (0U)
-#define TIM_DIER_UIE_Msk (0x1UL << TIM_DIER_UIE_Pos) /*!< 0x00000001 */
-#define TIM_DIER_UIE TIM_DIER_UIE_Msk /*!<Update interrupt enable */
-#define TIM_DIER_CC1IE_Pos (1U)
-#define TIM_DIER_CC1IE_Msk (0x1UL << TIM_DIER_CC1IE_Pos) /*!< 0x00000002 */
-#define TIM_DIER_CC1IE TIM_DIER_CC1IE_Msk /*!<Capture/Compare 1 interrupt enable */
-#define TIM_DIER_CC2IE_Pos (2U)
-#define TIM_DIER_CC2IE_Msk (0x1UL << TIM_DIER_CC2IE_Pos) /*!< 0x00000004 */
-#define TIM_DIER_CC2IE TIM_DIER_CC2IE_Msk /*!<Capture/Compare 2 interrupt enable */
-#define TIM_DIER_CC3IE_Pos (3U)
-#define TIM_DIER_CC3IE_Msk (0x1UL << TIM_DIER_CC3IE_Pos) /*!< 0x00000008 */
-#define TIM_DIER_CC3IE TIM_DIER_CC3IE_Msk /*!<Capture/Compare 3 interrupt enable */
-#define TIM_DIER_CC4IE_Pos (4U)
-#define TIM_DIER_CC4IE_Msk (0x1UL << TIM_DIER_CC4IE_Pos) /*!< 0x00000010 */
-#define TIM_DIER_CC4IE TIM_DIER_CC4IE_Msk /*!<Capture/Compare 4 interrupt enable */
-#define TIM_DIER_COMIE_Pos (5U)
-#define TIM_DIER_COMIE_Msk (0x1UL << TIM_DIER_COMIE_Pos) /*!< 0x00000020 */
-#define TIM_DIER_COMIE TIM_DIER_COMIE_Msk /*!<COM interrupt enable */
-#define TIM_DIER_TIE_Pos (6U)
-#define TIM_DIER_TIE_Msk (0x1UL << TIM_DIER_TIE_Pos) /*!< 0x00000040 */
-#define TIM_DIER_TIE TIM_DIER_TIE_Msk /*!<Trigger interrupt enable */
-#define TIM_DIER_BIE_Pos (7U)
-#define TIM_DIER_BIE_Msk (0x1UL << TIM_DIER_BIE_Pos) /*!< 0x00000080 */
-#define TIM_DIER_BIE TIM_DIER_BIE_Msk /*!<Break interrupt enable */
-#define TIM_DIER_UDE_Pos (8U)
-#define TIM_DIER_UDE_Msk (0x1UL << TIM_DIER_UDE_Pos) /*!< 0x00000100 */
-#define TIM_DIER_UDE TIM_DIER_UDE_Msk /*!<Update DMA request enable */
-#define TIM_DIER_CC1DE_Pos (9U)
-#define TIM_DIER_CC1DE_Msk (0x1UL << TIM_DIER_CC1DE_Pos) /*!< 0x00000200 */
-#define TIM_DIER_CC1DE TIM_DIER_CC1DE_Msk /*!<Capture/Compare 1 DMA request enable */
-#define TIM_DIER_CC2DE_Pos (10U)
-#define TIM_DIER_CC2DE_Msk (0x1UL << TIM_DIER_CC2DE_Pos) /*!< 0x00000400 */
-#define TIM_DIER_CC2DE TIM_DIER_CC2DE_Msk /*!<Capture/Compare 2 DMA request enable */
-#define TIM_DIER_CC3DE_Pos (11U)
-#define TIM_DIER_CC3DE_Msk (0x1UL << TIM_DIER_CC3DE_Pos) /*!< 0x00000800 */
-#define TIM_DIER_CC3DE TIM_DIER_CC3DE_Msk /*!<Capture/Compare 3 DMA request enable */
-#define TIM_DIER_CC4DE_Pos (12U)
-#define TIM_DIER_CC4DE_Msk (0x1UL << TIM_DIER_CC4DE_Pos) /*!< 0x00001000 */
-#define TIM_DIER_CC4DE TIM_DIER_CC4DE_Msk /*!<Capture/Compare 4 DMA request enable */
-#define TIM_DIER_COMDE_Pos (13U)
-#define TIM_DIER_COMDE_Msk (0x1UL << TIM_DIER_COMDE_Pos) /*!< 0x00002000 */
-#define TIM_DIER_COMDE TIM_DIER_COMDE_Msk /*!<COM DMA request enable */
-#define TIM_DIER_TDE_Pos (14U)
-#define TIM_DIER_TDE_Msk (0x1UL << TIM_DIER_TDE_Pos) /*!< 0x00004000 */
-#define TIM_DIER_TDE TIM_DIER_TDE_Msk /*!<Trigger DMA request enable */
-
-/******************** Bit definition for TIM_SR register ********************/
-#define TIM_SR_UIF_Pos (0U)
-#define TIM_SR_UIF_Msk (0x1UL << TIM_SR_UIF_Pos) /*!< 0x00000001 */
-#define TIM_SR_UIF TIM_SR_UIF_Msk /*!<Update interrupt Flag */
-#define TIM_SR_CC1IF_Pos (1U)
-#define TIM_SR_CC1IF_Msk (0x1UL << TIM_SR_CC1IF_Pos) /*!< 0x00000002 */
-#define TIM_SR_CC1IF TIM_SR_CC1IF_Msk /*!<Capture/Compare 1 interrupt Flag */
-#define TIM_SR_CC2IF_Pos (2U)
-#define TIM_SR_CC2IF_Msk (0x1UL << TIM_SR_CC2IF_Pos) /*!< 0x00000004 */
-#define TIM_SR_CC2IF TIM_SR_CC2IF_Msk /*!<Capture/Compare 2 interrupt Flag */
-#define TIM_SR_CC3IF_Pos (3U)
-#define TIM_SR_CC3IF_Msk (0x1UL << TIM_SR_CC3IF_Pos) /*!< 0x00000008 */
-#define TIM_SR_CC3IF TIM_SR_CC3IF_Msk /*!<Capture/Compare 3 interrupt Flag */
-#define TIM_SR_CC4IF_Pos (4U)
-#define TIM_SR_CC4IF_Msk (0x1UL << TIM_SR_CC4IF_Pos) /*!< 0x00000010 */
-#define TIM_SR_CC4IF TIM_SR_CC4IF_Msk /*!<Capture/Compare 4 interrupt Flag */
-#define TIM_SR_COMIF_Pos (5U)
-#define TIM_SR_COMIF_Msk (0x1UL << TIM_SR_COMIF_Pos) /*!< 0x00000020 */
-#define TIM_SR_COMIF TIM_SR_COMIF_Msk /*!<COM interrupt Flag */
-#define TIM_SR_TIF_Pos (6U)
-#define TIM_SR_TIF_Msk (0x1UL << TIM_SR_TIF_Pos) /*!< 0x00000040 */
-#define TIM_SR_TIF TIM_SR_TIF_Msk /*!<Trigger interrupt Flag */
-#define TIM_SR_BIF_Pos (7U)
-#define TIM_SR_BIF_Msk (0x1UL << TIM_SR_BIF_Pos) /*!< 0x00000080 */
-#define TIM_SR_BIF TIM_SR_BIF_Msk /*!<Break interrupt Flag */
-#define TIM_SR_CC1OF_Pos (9U)
-#define TIM_SR_CC1OF_Msk (0x1UL << TIM_SR_CC1OF_Pos) /*!< 0x00000200 */
-#define TIM_SR_CC1OF TIM_SR_CC1OF_Msk /*!<Capture/Compare 1 Overcapture Flag */
-#define TIM_SR_CC2OF_Pos (10U)
-#define TIM_SR_CC2OF_Msk (0x1UL << TIM_SR_CC2OF_Pos) /*!< 0x00000400 */
-#define TIM_SR_CC2OF TIM_SR_CC2OF_Msk /*!<Capture/Compare 2 Overcapture Flag */
-#define TIM_SR_CC3OF_Pos (11U)
-#define TIM_SR_CC3OF_Msk (0x1UL << TIM_SR_CC3OF_Pos) /*!< 0x00000800 */
-#define TIM_SR_CC3OF TIM_SR_CC3OF_Msk /*!<Capture/Compare 3 Overcapture Flag */
-#define TIM_SR_CC4OF_Pos (12U)
-#define TIM_SR_CC4OF_Msk (0x1UL << TIM_SR_CC4OF_Pos) /*!< 0x00001000 */
-#define TIM_SR_CC4OF TIM_SR_CC4OF_Msk /*!<Capture/Compare 4 Overcapture Flag */
-
-/******************* Bit definition for TIM_EGR register ********************/
-#define TIM_EGR_UG_Pos (0U)
-#define TIM_EGR_UG_Msk (0x1UL << TIM_EGR_UG_Pos) /*!< 0x00000001 */
-#define TIM_EGR_UG TIM_EGR_UG_Msk /*!<Update Generation */
-#define TIM_EGR_CC1G_Pos (1U)
-#define TIM_EGR_CC1G_Msk (0x1UL << TIM_EGR_CC1G_Pos) /*!< 0x00000002 */
-#define TIM_EGR_CC1G TIM_EGR_CC1G_Msk /*!<Capture/Compare 1 Generation */
-#define TIM_EGR_CC2G_Pos (2U)
-#define TIM_EGR_CC2G_Msk (0x1UL << TIM_EGR_CC2G_Pos) /*!< 0x00000004 */
-#define TIM_EGR_CC2G TIM_EGR_CC2G_Msk /*!<Capture/Compare 2 Generation */
-#define TIM_EGR_CC3G_Pos (3U)
-#define TIM_EGR_CC3G_Msk (0x1UL << TIM_EGR_CC3G_Pos) /*!< 0x00000008 */
-#define TIM_EGR_CC3G TIM_EGR_CC3G_Msk /*!<Capture/Compare 3 Generation */
-#define TIM_EGR_CC4G_Pos (4U)
-#define TIM_EGR_CC4G_Msk (0x1UL << TIM_EGR_CC4G_Pos) /*!< 0x00000010 */
-#define TIM_EGR_CC4G TIM_EGR_CC4G_Msk /*!<Capture/Compare 4 Generation */
-#define TIM_EGR_COMG_Pos (5U)
-#define TIM_EGR_COMG_Msk (0x1UL << TIM_EGR_COMG_Pos) /*!< 0x00000020 */
-#define TIM_EGR_COMG TIM_EGR_COMG_Msk /*!<Capture/Compare Control Update Generation */
-#define TIM_EGR_TG_Pos (6U)
-#define TIM_EGR_TG_Msk (0x1UL << TIM_EGR_TG_Pos) /*!< 0x00000040 */
-#define TIM_EGR_TG TIM_EGR_TG_Msk /*!<Trigger Generation */
-#define TIM_EGR_BG_Pos (7U)
-#define TIM_EGR_BG_Msk (0x1UL << TIM_EGR_BG_Pos) /*!< 0x00000080 */
-#define TIM_EGR_BG TIM_EGR_BG_Msk /*!<Break Generation */
-
-/****************** Bit definition for TIM_CCMR1 register *******************/
-#define TIM_CCMR1_CC1S_Pos (0U)
-#define TIM_CCMR1_CC1S_Msk (0x3UL << TIM_CCMR1_CC1S_Pos) /*!< 0x00000003 */
-#define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (Capture/Compare 1 Selection) */
-#define TIM_CCMR1_CC1S_0 (0x1UL << TIM_CCMR1_CC1S_Pos) /*!< 0x0001 */
-#define TIM_CCMR1_CC1S_1 (0x2UL << TIM_CCMR1_CC1S_Pos) /*!< 0x0002 */
-
-#define TIM_CCMR1_OC1FE_Pos (2U)
-#define TIM_CCMR1_OC1FE_Msk (0x1UL << TIM_CCMR1_OC1FE_Pos) /*!< 0x00000004 */
-#define TIM_CCMR1_OC1FE TIM_CCMR1_OC1FE_Msk /*!<Output Compare 1 Fast enable */
-#define TIM_CCMR1_OC1PE_Pos (3U)
-#define TIM_CCMR1_OC1PE_Msk (0x1UL << TIM_CCMR1_OC1PE_Pos) /*!< 0x00000008 */
-#define TIM_CCMR1_OC1PE TIM_CCMR1_OC1PE_Msk /*!<Output Compare 1 Preload enable */
-
-#define TIM_CCMR1_OC1M_Pos (4U)
-#define TIM_CCMR1_OC1M_Msk (0x7UL << TIM_CCMR1_OC1M_Pos) /*!< 0x00000070 */
-#define TIM_CCMR1_OC1M TIM_CCMR1_OC1M_Msk /*!<OC1M[2:0] bits (Output Compare 1 Mode) */
-#define TIM_CCMR1_OC1M_0 (0x1UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0010 */
-#define TIM_CCMR1_OC1M_1 (0x2UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0020 */
-#define TIM_CCMR1_OC1M_2 (0x4UL << TIM_CCMR1_OC1M_Pos) /*!< 0x0040 */
-
-#define TIM_CCMR1_OC1CE_Pos (7U)
-#define TIM_CCMR1_OC1CE_Msk (0x1UL << TIM_CCMR1_OC1CE_Pos) /*!< 0x00000080 */
-#define TIM_CCMR1_OC1CE TIM_CCMR1_OC1CE_Msk /*!<Output Compare 1Clear Enable */
-
-#define TIM_CCMR1_CC2S_Pos (8U)
-#define TIM_CCMR1_CC2S_Msk (0x3UL << TIM_CCMR1_CC2S_Pos) /*!< 0x00000300 */
-#define TIM_CCMR1_CC2S TIM_CCMR1_CC2S_Msk /*!<CC2S[1:0] bits (Capture/Compare 2 Selection) */
-#define TIM_CCMR1_CC2S_0 (0x1UL << TIM_CCMR1_CC2S_Pos) /*!< 0x0100 */
-#define TIM_CCMR1_CC2S_1 (0x2UL << TIM_CCMR1_CC2S_Pos) /*!< 0x0200 */
-
-#define TIM_CCMR1_OC2FE_Pos (10U)
-#define TIM_CCMR1_OC2FE_Msk (0x1UL << TIM_CCMR1_OC2FE_Pos) /*!< 0x00000400 */
-#define TIM_CCMR1_OC2FE TIM_CCMR1_OC2FE_Msk /*!<Output Compare 2 Fast enable */
-#define TIM_CCMR1_OC2PE_Pos (11U)
-#define TIM_CCMR1_OC2PE_Msk (0x1UL << TIM_CCMR1_OC2PE_Pos) /*!< 0x00000800 */
-#define TIM_CCMR1_OC2PE TIM_CCMR1_OC2PE_Msk /*!<Output Compare 2 Preload enable */
-
-#define TIM_CCMR1_OC2M_Pos (12U)
-#define TIM_CCMR1_OC2M_Msk (0x7UL << TIM_CCMR1_OC2M_Pos) /*!< 0x00007000 */
-#define TIM_CCMR1_OC2M TIM_CCMR1_OC2M_Msk /*!<OC2M[2:0] bits (Output Compare 2 Mode) */
-#define TIM_CCMR1_OC2M_0 (0x1UL << TIM_CCMR1_OC2M_Pos) /*!< 0x1000 */
-#define TIM_CCMR1_OC2M_1 (0x2UL << TIM_CCMR1_OC2M_Pos) /*!< 0x2000 */
-#define TIM_CCMR1_OC2M_2 (0x4UL << TIM_CCMR1_OC2M_Pos) /*!< 0x4000 */
-
-#define TIM_CCMR1_OC2CE_Pos (15U)
-#define TIM_CCMR1_OC2CE_Msk (0x1UL << TIM_CCMR1_OC2CE_Pos) /*!< 0x00008000 */
-#define TIM_CCMR1_OC2CE TIM_CCMR1_OC2CE_Msk /*!<Output Compare 2 Clear Enable */
-
-/*----------------------------------------------------------------------------*/
-
-#define TIM_CCMR1_IC1PSC_Pos (2U)
-#define TIM_CCMR1_IC1PSC_Msk (0x3UL << TIM_CCMR1_IC1PSC_Pos) /*!< 0x0000000C */
-#define TIM_CCMR1_IC1PSC TIM_CCMR1_IC1PSC_Msk /*!<IC1PSC[1:0] bits (Input Capture 1 Prescaler) */
-#define TIM_CCMR1_IC1PSC_0 (0x1UL << TIM_CCMR1_IC1PSC_Pos) /*!< 0x0004 */
-#define TIM_CCMR1_IC1PSC_1 (0x2UL << TIM_CCMR1_IC1PSC_Pos) /*!< 0x0008 */
-
-#define TIM_CCMR1_IC1F_Pos (4U)
-#define TIM_CCMR1_IC1F_Msk (0xFUL << TIM_CCMR1_IC1F_Pos) /*!< 0x000000F0 */
-#define TIM_CCMR1_IC1F TIM_CCMR1_IC1F_Msk /*!<IC1F[3:0] bits (Input Capture 1 Filter) */
-#define TIM_CCMR1_IC1F_0 (0x1UL << TIM_CCMR1_IC1F_Pos) /*!< 0x0010 */
-#define TIM_CCMR1_IC1F_1 (0x2UL << TIM_CCMR1_IC1F_Pos) /*!< 0x0020 */
-#define TIM_CCMR1_IC1F_2 (0x4UL << TIM_CCMR1_IC1F_Pos) /*!< 0x0040 */
-#define TIM_CCMR1_IC1F_3 (0x8UL << TIM_CCMR1_IC1F_Pos) /*!< 0x0080 */
-
-#define TIM_CCMR1_IC2PSC_Pos (10U)
-#define TIM_CCMR1_IC2PSC_Msk (0x3UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x00000C00 */
-#define TIM_CCMR1_IC2PSC TIM_CCMR1_IC2PSC_Msk /*!<IC2PSC[1:0] bits (Input Capture 2 Prescaler) */
-#define TIM_CCMR1_IC2PSC_0 (0x1UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x0400 */
-#define TIM_CCMR1_IC2PSC_1 (0x2UL << TIM_CCMR1_IC2PSC_Pos) /*!< 0x0800 */
-
-#define TIM_CCMR1_IC2F_Pos (12U)
-#define TIM_CCMR1_IC2F_Msk (0xFUL << TIM_CCMR1_IC2F_Pos) /*!< 0x0000F000 */
-#define TIM_CCMR1_IC2F TIM_CCMR1_IC2F_Msk /*!<IC2F[3:0] bits (Input Capture 2 Filter) */
-#define TIM_CCMR1_IC2F_0 (0x1UL << TIM_CCMR1_IC2F_Pos) /*!< 0x1000 */
-#define TIM_CCMR1_IC2F_1 (0x2UL << TIM_CCMR1_IC2F_Pos) /*!< 0x2000 */
-#define TIM_CCMR1_IC2F_2 (0x4UL << TIM_CCMR1_IC2F_Pos) /*!< 0x4000 */
-#define TIM_CCMR1_IC2F_3 (0x8UL << TIM_CCMR1_IC2F_Pos) /*!< 0x8000 */
-
-/****************** Bit definition for TIM_CCMR2 register *******************/
-#define TIM_CCMR2_CC3S_Pos (0U)
-#define TIM_CCMR2_CC3S_Msk (0x3UL << TIM_CCMR2_CC3S_Pos) /*!< 0x00000003 */
-#define TIM_CCMR2_CC3S TIM_CCMR2_CC3S_Msk /*!<CC3S[1:0] bits (Capture/Compare 3 Selection) */
-#define TIM_CCMR2_CC3S_0 (0x1UL << TIM_CCMR2_CC3S_Pos) /*!< 0x0001 */
-#define TIM_CCMR2_CC3S_1 (0x2UL << TIM_CCMR2_CC3S_Pos) /*!< 0x0002 */
-
-#define TIM_CCMR2_OC3FE_Pos (2U)
-#define TIM_CCMR2_OC3FE_Msk (0x1UL << TIM_CCMR2_OC3FE_Pos) /*!< 0x00000004 */
-#define TIM_CCMR2_OC3FE TIM_CCMR2_OC3FE_Msk /*!<Output Compare 3 Fast enable */
-#define TIM_CCMR2_OC3PE_Pos (3U)
-#define TIM_CCMR2_OC3PE_Msk (0x1UL << TIM_CCMR2_OC3PE_Pos) /*!< 0x00000008 */
-#define TIM_CCMR2_OC3PE TIM_CCMR2_OC3PE_Msk /*!<Output Compare 3 Preload enable */
-
-#define TIM_CCMR2_OC3M_Pos (4U)
-#define TIM_CCMR2_OC3M_Msk (0x7UL << TIM_CCMR2_OC3M_Pos) /*!< 0x00000070 */
-#define TIM_CCMR2_OC3M TIM_CCMR2_OC3M_Msk /*!<OC3M[2:0] bits (Output Compare 3 Mode) */
-#define TIM_CCMR2_OC3M_0 (0x1UL << TIM_CCMR2_OC3M_Pos) /*!< 0x0010 */
-#define TIM_CCMR2_OC3M_1 (0x2UL << TIM_CCMR2_OC3M_Pos) /*!< 0x0020 */
-#define TIM_CCMR2_OC3M_2 (0x4UL << TIM_CCMR2_OC3M_Pos) /*!< 0x0040 */
-
-#define TIM_CCMR2_OC3CE_Pos (7U)
-#define TIM_CCMR2_OC3CE_Msk (0x1UL << TIM_CCMR2_OC3CE_Pos) /*!< 0x00000080 */
-#define TIM_CCMR2_OC3CE TIM_CCMR2_OC3CE_Msk /*!<Output Compare 3 Clear Enable */
-
-#define TIM_CCMR2_CC4S_Pos (8U)
-#define TIM_CCMR2_CC4S_Msk (0x3UL << TIM_CCMR2_CC4S_Pos) /*!< 0x00000300 */
-#define TIM_CCMR2_CC4S TIM_CCMR2_CC4S_Msk /*!<CC4S[1:0] bits (Capture/Compare 4 Selection) */
-#define TIM_CCMR2_CC4S_0 (0x1UL << TIM_CCMR2_CC4S_Pos) /*!< 0x0100 */
-#define TIM_CCMR2_CC4S_1 (0x2UL << TIM_CCMR2_CC4S_Pos) /*!< 0x0200 */
-
-#define TIM_CCMR2_OC4FE_Pos (10U)
-#define TIM_CCMR2_OC4FE_Msk (0x1UL << TIM_CCMR2_OC4FE_Pos) /*!< 0x00000400 */
-#define TIM_CCMR2_OC4FE TIM_CCMR2_OC4FE_Msk /*!<Output Compare 4 Fast enable */
-#define TIM_CCMR2_OC4PE_Pos (11U)
-#define TIM_CCMR2_OC4PE_Msk (0x1UL << TIM_CCMR2_OC4PE_Pos) /*!< 0x00000800 */
-#define TIM_CCMR2_OC4PE TIM_CCMR2_OC4PE_Msk /*!<Output Compare 4 Preload enable */
-
-#define TIM_CCMR2_OC4M_Pos (12U)
-#define TIM_CCMR2_OC4M_Msk (0x7UL << TIM_CCMR2_OC4M_Pos) /*!< 0x00007000 */
-#define TIM_CCMR2_OC4M TIM_CCMR2_OC4M_Msk /*!<OC4M[2:0] bits (Output Compare 4 Mode) */
-#define TIM_CCMR2_OC4M_0 (0x1UL << TIM_CCMR2_OC4M_Pos) /*!< 0x1000 */
-#define TIM_CCMR2_OC4M_1 (0x2UL << TIM_CCMR2_OC4M_Pos) /*!< 0x2000 */
-#define TIM_CCMR2_OC4M_2 (0x4UL << TIM_CCMR2_OC4M_Pos) /*!< 0x4000 */
-
-#define TIM_CCMR2_OC4CE_Pos (15U)
-#define TIM_CCMR2_OC4CE_Msk (0x1UL << TIM_CCMR2_OC4CE_Pos) /*!< 0x00008000 */
-#define TIM_CCMR2_OC4CE TIM_CCMR2_OC4CE_Msk /*!<Output Compare 4 Clear Enable */
-
-/*----------------------------------------------------------------------------*/
-
-#define TIM_CCMR2_IC3PSC_Pos (2U)
-#define TIM_CCMR2_IC3PSC_Msk (0x3UL << TIM_CCMR2_IC3PSC_Pos) /*!< 0x0000000C */
-#define TIM_CCMR2_IC3PSC TIM_CCMR2_IC3PSC_Msk /*!<IC3PSC[1:0] bits (Input Capture 3 Prescaler) */
-#define TIM_CCMR2_IC3PSC_0 (0x1UL << TIM_CCMR2_IC3PSC_Pos) /*!< 0x0004 */
-#define TIM_CCMR2_IC3PSC_1 (0x2UL << TIM_CCMR2_IC3PSC_Pos) /*!< 0x0008 */
-
-#define TIM_CCMR2_IC3F_Pos (4U)
-#define TIM_CCMR2_IC3F_Msk (0xFUL << TIM_CCMR2_IC3F_Pos) /*!< 0x000000F0 */
-#define TIM_CCMR2_IC3F TIM_CCMR2_IC3F_Msk /*!<IC3F[3:0] bits (Input Capture 3 Filter) */
-#define TIM_CCMR2_IC3F_0 (0x1UL << TIM_CCMR2_IC3F_Pos) /*!< 0x0010 */
-#define TIM_CCMR2_IC3F_1 (0x2UL << TIM_CCMR2_IC3F_Pos) /*!< 0x0020 */
-#define TIM_CCMR2_IC3F_2 (0x4UL << TIM_CCMR2_IC3F_Pos) /*!< 0x0040 */
-#define TIM_CCMR2_IC3F_3 (0x8UL << TIM_CCMR2_IC3F_Pos) /*!< 0x0080 */
-
-#define TIM_CCMR2_IC4PSC_Pos (10U)
-#define TIM_CCMR2_IC4PSC_Msk (0x3UL << TIM_CCMR2_IC4PSC_Pos) /*!< 0x00000C00 */
-#define TIM_CCMR2_IC4PSC TIM_CCMR2_IC4PSC_Msk /*!<IC4PSC[1:0] bits (Input Capture 4 Prescaler) */
-#define TIM_CCMR2_IC4PSC_0 (0x1UL << TIM_CCMR2_IC4PSC_Pos) /*!< 0x0400 */
-#define TIM_CCMR2_IC4PSC_1 (0x2UL << TIM_CCMR2_IC4PSC_Pos) /*!< 0x0800 */
-
-#define TIM_CCMR2_IC4F_Pos (12U)
-#define TIM_CCMR2_IC4F_Msk (0xFUL << TIM_CCMR2_IC4F_Pos) /*!< 0x0000F000 */
-#define TIM_CCMR2_IC4F TIM_CCMR2_IC4F_Msk /*!<IC4F[3:0] bits (Input Capture 4 Filter) */
-#define TIM_CCMR2_IC4F_0 (0x1UL << TIM_CCMR2_IC4F_Pos) /*!< 0x1000 */
-#define TIM_CCMR2_IC4F_1 (0x2UL << TIM_CCMR2_IC4F_Pos) /*!< 0x2000 */
-#define TIM_CCMR2_IC4F_2 (0x4UL << TIM_CCMR2_IC4F_Pos) /*!< 0x4000 */
-#define TIM_CCMR2_IC4F_3 (0x8UL << TIM_CCMR2_IC4F_Pos) /*!< 0x8000 */
-
-/******************* Bit definition for TIM_CCER register *******************/
-#define TIM_CCER_CC1E_Pos (0U)
-#define TIM_CCER_CC1E_Msk (0x1UL << TIM_CCER_CC1E_Pos) /*!< 0x00000001 */
-#define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare 1 output enable */
-#define TIM_CCER_CC1P_Pos (1U)
-#define TIM_CCER_CC1P_Msk (0x1UL << TIM_CCER_CC1P_Pos) /*!< 0x00000002 */
-#define TIM_CCER_CC1P TIM_CCER_CC1P_Msk /*!<Capture/Compare 1 output Polarity */
-#define TIM_CCER_CC1NE_Pos (2U)
-#define TIM_CCER_CC1NE_Msk (0x1UL << TIM_CCER_CC1NE_Pos) /*!< 0x00000004 */
-#define TIM_CCER_CC1NE TIM_CCER_CC1NE_Msk /*!<Capture/Compare 1 Complementary output enable */
-#define TIM_CCER_CC1NP_Pos (3U)
-#define TIM_CCER_CC1NP_Msk (0x1UL << TIM_CCER_CC1NP_Pos) /*!< 0x00000008 */
-#define TIM_CCER_CC1NP TIM_CCER_CC1NP_Msk /*!<Capture/Compare 1 Complementary output Polarity */
-#define TIM_CCER_CC2E_Pos (4U)
-#define TIM_CCER_CC2E_Msk (0x1UL << TIM_CCER_CC2E_Pos) /*!< 0x00000010 */
-#define TIM_CCER_CC2E TIM_CCER_CC2E_Msk /*!<Capture/Compare 2 output enable */
-#define TIM_CCER_CC2P_Pos (5U)
-#define TIM_CCER_CC2P_Msk (0x1UL << TIM_CCER_CC2P_Pos) /*!< 0x00000020 */
-#define TIM_CCER_CC2P TIM_CCER_CC2P_Msk /*!<Capture/Compare 2 output Polarity */
-#define TIM_CCER_CC2NE_Pos (6U)
-#define TIM_CCER_CC2NE_Msk (0x1UL << TIM_CCER_CC2NE_Pos) /*!< 0x00000040 */
-#define TIM_CCER_CC2NE TIM_CCER_CC2NE_Msk /*!<Capture/Compare 2 Complementary output enable */
-#define TIM_CCER_CC2NP_Pos (7U)
-#define TIM_CCER_CC2NP_Msk (0x1UL << TIM_CCER_CC2NP_Pos) /*!< 0x00000080 */
-#define TIM_CCER_CC2NP TIM_CCER_CC2NP_Msk /*!<Capture/Compare 2 Complementary output Polarity */
-#define TIM_CCER_CC3E_Pos (8U)
-#define TIM_CCER_CC3E_Msk (0x1UL << TIM_CCER_CC3E_Pos) /*!< 0x00000100 */
-#define TIM_CCER_CC3E TIM_CCER_CC3E_Msk /*!<Capture/Compare 3 output enable */
-#define TIM_CCER_CC3P_Pos (9U)
-#define TIM_CCER_CC3P_Msk (0x1UL << TIM_CCER_CC3P_Pos) /*!< 0x00000200 */
-#define TIM_CCER_CC3P TIM_CCER_CC3P_Msk /*!<Capture/Compare 3 output Polarity */
-#define TIM_CCER_CC3NE_Pos (10U)
-#define TIM_CCER_CC3NE_Msk (0x1UL << TIM_CCER_CC3NE_Pos) /*!< 0x00000400 */
-#define TIM_CCER_CC3NE TIM_CCER_CC3NE_Msk /*!<Capture/Compare 3 Complementary output enable */
-#define TIM_CCER_CC3NP_Pos (11U)
-#define TIM_CCER_CC3NP_Msk (0x1UL << TIM_CCER_CC3NP_Pos) /*!< 0x00000800 */
-#define TIM_CCER_CC3NP TIM_CCER_CC3NP_Msk /*!<Capture/Compare 3 Complementary output Polarity */
-#define TIM_CCER_CC4E_Pos (12U)
-#define TIM_CCER_CC4E_Msk (0x1UL << TIM_CCER_CC4E_Pos) /*!< 0x00001000 */
-#define TIM_CCER_CC4E TIM_CCER_CC4E_Msk /*!<Capture/Compare 4 output enable */
-#define TIM_CCER_CC4P_Pos (13U)
-#define TIM_CCER_CC4P_Msk (0x1UL << TIM_CCER_CC4P_Pos) /*!< 0x00002000 */
-#define TIM_CCER_CC4P TIM_CCER_CC4P_Msk /*!<Capture/Compare 4 output Polarity */
-#define TIM_CCER_CC4NP_Pos (15U)
-#define TIM_CCER_CC4NP_Msk (0x1UL << TIM_CCER_CC4NP_Pos) /*!< 0x00008000 */
-#define TIM_CCER_CC4NP TIM_CCER_CC4NP_Msk /*!<Capture/Compare 4 Complementary output Polarity */
-
-/******************* Bit definition for TIM_CNT register ********************/
-#define TIM_CNT_CNT_Pos (0U)
-#define TIM_CNT_CNT_Msk (0xFFFFFFFFUL << TIM_CNT_CNT_Pos) /*!< 0xFFFFFFFF */
-#define TIM_CNT_CNT TIM_CNT_CNT_Msk /*!<Counter Value */
-
-/******************* Bit definition for TIM_PSC register ********************/
-#define TIM_PSC_PSC_Pos (0U)
-#define TIM_PSC_PSC_Msk (0xFFFFUL << TIM_PSC_PSC_Pos) /*!< 0x0000FFFF */
-#define TIM_PSC_PSC TIM_PSC_PSC_Msk /*!<Prescaler Value */
-
-/******************* Bit definition for TIM_ARR register ********************/
-#define TIM_ARR_ARR_Pos (0U)
-#define TIM_ARR_ARR_Msk (0xFFFFFFFFUL << TIM_ARR_ARR_Pos) /*!< 0xFFFFFFFF */
-#define TIM_ARR_ARR TIM_ARR_ARR_Msk /*!<actual auto-reload Value */
-
-/******************* Bit definition for TIM_RCR register ********************/
-#define TIM_RCR_REP_Pos (0U)
-#define TIM_RCR_REP_Msk (0xFFUL << TIM_RCR_REP_Pos) /*!< 0x000000FF */
-#define TIM_RCR_REP TIM_RCR_REP_Msk /*!<Repetition Counter Value */
-
-/******************* Bit definition for TIM_CCR1 register *******************/
-#define TIM_CCR1_CCR1_Pos (0U)
-#define TIM_CCR1_CCR1_Msk (0xFFFFUL << TIM_CCR1_CCR1_Pos) /*!< 0x0000FFFF */
-#define TIM_CCR1_CCR1 TIM_CCR1_CCR1_Msk /*!<Capture/Compare 1 Value */
-
-/******************* Bit definition for TIM_CCR2 register *******************/
-#define TIM_CCR2_CCR2_Pos (0U)
-#define TIM_CCR2_CCR2_Msk (0xFFFFUL << TIM_CCR2_CCR2_Pos) /*!< 0x0000FFFF */
-#define TIM_CCR2_CCR2 TIM_CCR2_CCR2_Msk /*!<Capture/Compare 2 Value */
-
-/******************* Bit definition for TIM_CCR3 register *******************/
-#define TIM_CCR3_CCR3_Pos (0U)
-#define TIM_CCR3_CCR3_Msk (0xFFFFUL << TIM_CCR3_CCR3_Pos) /*!< 0x0000FFFF */
-#define TIM_CCR3_CCR3 TIM_CCR3_CCR3_Msk /*!<Capture/Compare 3 Value */
-
-/******************* Bit definition for TIM_CCR4 register *******************/
-#define TIM_CCR4_CCR4_Pos (0U)
-#define TIM_CCR4_CCR4_Msk (0xFFFFUL << TIM_CCR4_CCR4_Pos) /*!< 0x0000FFFF */
-#define TIM_CCR4_CCR4 TIM_CCR4_CCR4_Msk /*!<Capture/Compare 4 Value */
-
-/******************* Bit definition for TIM_BDTR register *******************/
-#define TIM_BDTR_DTG_Pos (0U)
-#define TIM_BDTR_DTG_Msk (0xFFUL << TIM_BDTR_DTG_Pos) /*!< 0x000000FF */
-#define TIM_BDTR_DTG TIM_BDTR_DTG_Msk /*!<DTG[0:7] bits (Dead-Time Generator set-up) */
-#define TIM_BDTR_DTG_0 (0x01UL << TIM_BDTR_DTG_Pos) /*!< 0x0001 */
-#define TIM_BDTR_DTG_1 (0x02UL << TIM_BDTR_DTG_Pos) /*!< 0x0002 */
-#define TIM_BDTR_DTG_2 (0x04UL << TIM_BDTR_DTG_Pos) /*!< 0x0004 */
-#define TIM_BDTR_DTG_3 (0x08UL << TIM_BDTR_DTG_Pos) /*!< 0x0008 */
-#define TIM_BDTR_DTG_4 (0x10UL << TIM_BDTR_DTG_Pos) /*!< 0x0010 */
-#define TIM_BDTR_DTG_5 (0x20UL << TIM_BDTR_DTG_Pos) /*!< 0x0020 */
-#define TIM_BDTR_DTG_6 (0x40UL << TIM_BDTR_DTG_Pos) /*!< 0x0040 */
-#define TIM_BDTR_DTG_7 (0x80UL << TIM_BDTR_DTG_Pos) /*!< 0x0080 */
-
-#define TIM_BDTR_LOCK_Pos (8U)
-#define TIM_BDTR_LOCK_Msk (0x3UL << TIM_BDTR_LOCK_Pos) /*!< 0x00000300 */
-#define TIM_BDTR_LOCK TIM_BDTR_LOCK_Msk /*!<LOCK[1:0] bits (Lock Configuration) */
-#define TIM_BDTR_LOCK_0 (0x1UL << TIM_BDTR_LOCK_Pos) /*!< 0x0100 */
-#define TIM_BDTR_LOCK_1 (0x2UL << TIM_BDTR_LOCK_Pos) /*!< 0x0200 */
-
-#define TIM_BDTR_OSSI_Pos (10U)
-#define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
-#define TIM_BDTR_OSSI TIM_BDTR_OSSI_Msk /*!<Off-State Selection for Idle mode */
-#define TIM_BDTR_OSSR_Pos (11U)
-#define TIM_BDTR_OSSR_Msk (0x1UL << TIM_BDTR_OSSR_Pos) /*!< 0x00000800 */
-#define TIM_BDTR_OSSR TIM_BDTR_OSSR_Msk /*!<Off-State Selection for Run mode */
-#define TIM_BDTR_BKE_Pos (12U)
-#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
-#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable */
-#define TIM_BDTR_BKP_Pos (13U)
-#define TIM_BDTR_BKP_Msk (0x1UL << TIM_BDTR_BKP_Pos) /*!< 0x00002000 */
-#define TIM_BDTR_BKP TIM_BDTR_BKP_Msk /*!<Break Polarity */
-#define TIM_BDTR_AOE_Pos (14U)
-#define TIM_BDTR_AOE_Msk (0x1UL << TIM_BDTR_AOE_Pos) /*!< 0x00004000 */
-#define TIM_BDTR_AOE TIM_BDTR_AOE_Msk /*!<Automatic Output enable */
-#define TIM_BDTR_MOE_Pos (15U)
-#define TIM_BDTR_MOE_Msk (0x1UL << TIM_BDTR_MOE_Pos) /*!< 0x00008000 */
-#define TIM_BDTR_MOE TIM_BDTR_MOE_Msk /*!<Main Output enable */
-
-/******************* Bit definition for TIM_DCR register ********************/
-#define TIM_DCR_DBA_Pos (0U)
-#define TIM_DCR_DBA_Msk (0x1FUL << TIM_DCR_DBA_Pos) /*!< 0x0000001F */
-#define TIM_DCR_DBA TIM_DCR_DBA_Msk /*!<DBA[4:0] bits (DMA Base Address) */
-#define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x0001 */
-#define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x0002 */
-#define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x0004 */
-#define TIM_DCR_DBA_3 (0x08UL << TIM_DCR_DBA_Pos) /*!< 0x0008 */
-#define TIM_DCR_DBA_4 (0x10UL << TIM_DCR_DBA_Pos) /*!< 0x0010 */
-
-#define TIM_DCR_DBL_Pos (8U)
-#define TIM_DCR_DBL_Msk (0x1FUL << TIM_DCR_DBL_Pos) /*!< 0x00001F00 */
-#define TIM_DCR_DBL TIM_DCR_DBL_Msk /*!<DBL[4:0] bits (DMA Burst Length) */
-#define TIM_DCR_DBL_0 (0x01UL << TIM_DCR_DBL_Pos) /*!< 0x0100 */
-#define TIM_DCR_DBL_1 (0x02UL << TIM_DCR_DBL_Pos) /*!< 0x0200 */
-#define TIM_DCR_DBL_2 (0x04UL << TIM_DCR_DBL_Pos) /*!< 0x0400 */
-#define TIM_DCR_DBL_3 (0x08UL << TIM_DCR_DBL_Pos) /*!< 0x0800 */
-#define TIM_DCR_DBL_4 (0x10UL << TIM_DCR_DBL_Pos) /*!< 0x1000 */
-
-/******************* Bit definition for TIM_DMAR register *******************/
-#define TIM_DMAR_DMAB_Pos (0U)
-#define TIM_DMAR_DMAB_Msk (0xFFFFUL << TIM_DMAR_DMAB_Pos) /*!< 0x0000FFFF */
-#define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */
-
-/******************* Bit definition for TIM_OR register *********************/
-#define TIM_OR_TI1_RMP_Pos (0U)
-#define TIM_OR_TI1_RMP_Msk (0x3UL << TIM_OR_TI1_RMP_Pos) /*!< 0x00000003 */
-#define TIM_OR_TI1_RMP TIM_OR_TI1_RMP_Msk /*!< TI1_RMP[1:0] bits (TIM11 Input Capture 1 remap) */
-#define TIM_OR_TI1_RMP_0 (0x1UL << TIM_OR_TI1_RMP_Pos) /*!< 0x00000001 */
-#define TIM_OR_TI1_RMP_1 (0x2UL << TIM_OR_TI1_RMP_Pos) /*!< 0x00000002 */
-
-#define TIM_OR_TI4_RMP_Pos (6U)
-#define TIM_OR_TI4_RMP_Msk (0x3UL << TIM_OR_TI4_RMP_Pos) /*!< 0x000000C0 */
-#define TIM_OR_TI4_RMP TIM_OR_TI4_RMP_Msk /*!<TI4_RMP[1:0] bits (TIM5 Input 4 remap) */
-#define TIM_OR_TI4_RMP_0 (0x1UL << TIM_OR_TI4_RMP_Pos) /*!< 0x0040 */
-#define TIM_OR_TI4_RMP_1 (0x2UL << TIM_OR_TI4_RMP_Pos) /*!< 0x0080 */
-#define TIM_OR_ITR1_RMP_Pos (10U)
-#define TIM_OR_ITR1_RMP_Msk (0x3UL << TIM_OR_ITR1_RMP_Pos) /*!< 0x00000C00 */
-#define TIM_OR_ITR1_RMP TIM_OR_ITR1_RMP_Msk /*!<ITR1_RMP[1:0] bits (TIM2 Internal trigger 1 remap) */
-#define TIM_OR_ITR1_RMP_0 (0x1UL << TIM_OR_ITR1_RMP_Pos) /*!< 0x0400 */
-#define TIM_OR_ITR1_RMP_1 (0x2UL << TIM_OR_ITR1_RMP_Pos) /*!< 0x0800 */
-
-
-/******************************************************************************/
-/* */
-/* Universal Synchronous Asynchronous Receiver Transmitter */
-/* */
-/******************************************************************************/
-/******************* Bit definition for USART_SR register *******************/
-#define USART_SR_PE_Pos (0U)
-#define USART_SR_PE_Msk (0x1UL << USART_SR_PE_Pos) /*!< 0x00000001 */
-#define USART_SR_PE USART_SR_PE_Msk /*!<Parity Error */
-#define USART_SR_FE_Pos (1U)
-#define USART_SR_FE_Msk (0x1UL << USART_SR_FE_Pos) /*!< 0x00000002 */
-#define USART_SR_FE USART_SR_FE_Msk /*!<Framing Error */
-#define USART_SR_NE_Pos (2U)
-#define USART_SR_NE_Msk (0x1UL << USART_SR_NE_Pos) /*!< 0x00000004 */
-#define USART_SR_NE USART_SR_NE_Msk /*!<Noise Error Flag */
-#define USART_SR_ORE_Pos (3U)
-#define USART_SR_ORE_Msk (0x1UL << USART_SR_ORE_Pos) /*!< 0x00000008 */
-#define USART_SR_ORE USART_SR_ORE_Msk /*!<OverRun Error */
-#define USART_SR_IDLE_Pos (4U)
-#define USART_SR_IDLE_Msk (0x1UL << USART_SR_IDLE_Pos) /*!< 0x00000010 */
-#define USART_SR_IDLE USART_SR_IDLE_Msk /*!<IDLE line detected */
-#define USART_SR_RXNE_Pos (5U)
-#define USART_SR_RXNE_Msk (0x1UL << USART_SR_RXNE_Pos) /*!< 0x00000020 */
-#define USART_SR_RXNE USART_SR_RXNE_Msk /*!<Read Data Register Not Empty */
-#define USART_SR_TC_Pos (6U)
-#define USART_SR_TC_Msk (0x1UL << USART_SR_TC_Pos) /*!< 0x00000040 */
-#define USART_SR_TC USART_SR_TC_Msk /*!<Transmission Complete */
-#define USART_SR_TXE_Pos (7U)
-#define USART_SR_TXE_Msk (0x1UL << USART_SR_TXE_Pos) /*!< 0x00000080 */
-#define USART_SR_TXE USART_SR_TXE_Msk /*!<Transmit Data Register Empty */
-#define USART_SR_LBD_Pos (8U)
-#define USART_SR_LBD_Msk (0x1UL << USART_SR_LBD_Pos) /*!< 0x00000100 */
-#define USART_SR_LBD USART_SR_LBD_Msk /*!<LIN Break Detection Flag */
-#define USART_SR_CTS_Pos (9U)
-#define USART_SR_CTS_Msk (0x1UL << USART_SR_CTS_Pos) /*!< 0x00000200 */
-#define USART_SR_CTS USART_SR_CTS_Msk /*!<CTS Flag */
-
-/******************* Bit definition for USART_DR register *******************/
-#define USART_DR_DR_Pos (0U)
-#define USART_DR_DR_Msk (0x1FFUL << USART_DR_DR_Pos) /*!< 0x000001FF */
-#define USART_DR_DR USART_DR_DR_Msk /*!<Data value */
-
-/****************** Bit definition for USART_BRR register *******************/
-#define USART_BRR_DIV_Fraction_Pos (0U)
-#define USART_BRR_DIV_Fraction_Msk (0xFUL << USART_BRR_DIV_Fraction_Pos) /*!< 0x0000000F */
-#define USART_BRR_DIV_Fraction USART_BRR_DIV_Fraction_Msk /*!<Fraction of USARTDIV */
-#define USART_BRR_DIV_Mantissa_Pos (4U)
-#define USART_BRR_DIV_Mantissa_Msk (0xFFFUL << USART_BRR_DIV_Mantissa_Pos) /*!< 0x0000FFF0 */
-#define USART_BRR_DIV_Mantissa USART_BRR_DIV_Mantissa_Msk /*!<Mantissa of USARTDIV */
-
-/****************** Bit definition for USART_CR1 register *******************/
-#define USART_CR1_SBK_Pos (0U)
-#define USART_CR1_SBK_Msk (0x1UL << USART_CR1_SBK_Pos) /*!< 0x00000001 */
-#define USART_CR1_SBK USART_CR1_SBK_Msk /*!<Send Break */
-#define USART_CR1_RWU_Pos (1U)
-#define USART_CR1_RWU_Msk (0x1UL << USART_CR1_RWU_Pos) /*!< 0x00000002 */
-#define USART_CR1_RWU USART_CR1_RWU_Msk /*!<Receiver wakeup */
-#define USART_CR1_RE_Pos (2U)
-#define USART_CR1_RE_Msk (0x1UL << USART_CR1_RE_Pos) /*!< 0x00000004 */
-#define USART_CR1_RE USART_CR1_RE_Msk /*!<Receiver Enable */
-#define USART_CR1_TE_Pos (3U)
-#define USART_CR1_TE_Msk (0x1UL << USART_CR1_TE_Pos) /*!< 0x00000008 */
-#define USART_CR1_TE USART_CR1_TE_Msk /*!<Transmitter Enable */
-#define USART_CR1_IDLEIE_Pos (4U)
-#define USART_CR1_IDLEIE_Msk (0x1UL << USART_CR1_IDLEIE_Pos) /*!< 0x00000010 */
-#define USART_CR1_IDLEIE USART_CR1_IDLEIE_Msk /*!<IDLE Interrupt Enable */
-#define USART_CR1_RXNEIE_Pos (5U)
-#define USART_CR1_RXNEIE_Msk (0x1UL << USART_CR1_RXNEIE_Pos) /*!< 0x00000020 */
-#define USART_CR1_RXNEIE USART_CR1_RXNEIE_Msk /*!<RXNE Interrupt Enable */
-#define USART_CR1_TCIE_Pos (6U)
-#define USART_CR1_TCIE_Msk (0x1UL << USART_CR1_TCIE_Pos) /*!< 0x00000040 */
-#define USART_CR1_TCIE USART_CR1_TCIE_Msk /*!<Transmission Complete Interrupt Enable */
-#define USART_CR1_TXEIE_Pos (7U)
-#define USART_CR1_TXEIE_Msk (0x1UL << USART_CR1_TXEIE_Pos) /*!< 0x00000080 */
-#define USART_CR1_TXEIE USART_CR1_TXEIE_Msk /*!<TXE Interrupt Enable */
-#define USART_CR1_PEIE_Pos (8U)
-#define USART_CR1_PEIE_Msk (0x1UL << USART_CR1_PEIE_Pos) /*!< 0x00000100 */
-#define USART_CR1_PEIE USART_CR1_PEIE_Msk /*!<PE Interrupt Enable */
-#define USART_CR1_PS_Pos (9U)
-#define USART_CR1_PS_Msk (0x1UL << USART_CR1_PS_Pos) /*!< 0x00000200 */
-#define USART_CR1_PS USART_CR1_PS_Msk /*!<Parity Selection */
-#define USART_CR1_PCE_Pos (10U)
-#define USART_CR1_PCE_Msk (0x1UL << USART_CR1_PCE_Pos) /*!< 0x00000400 */
-#define USART_CR1_PCE USART_CR1_PCE_Msk /*!<Parity Control Enable */
-#define USART_CR1_WAKE_Pos (11U)
-#define USART_CR1_WAKE_Msk (0x1UL << USART_CR1_WAKE_Pos) /*!< 0x00000800 */
-#define USART_CR1_WAKE USART_CR1_WAKE_Msk /*!<Wakeup method */
-#define USART_CR1_M_Pos (12U)
-#define USART_CR1_M_Msk (0x1UL << USART_CR1_M_Pos) /*!< 0x00001000 */
-#define USART_CR1_M USART_CR1_M_Msk /*!<Word length */
-#define USART_CR1_UE_Pos (13U)
-#define USART_CR1_UE_Msk (0x1UL << USART_CR1_UE_Pos) /*!< 0x00002000 */
-#define USART_CR1_UE USART_CR1_UE_Msk /*!<USART Enable */
-#define USART_CR1_OVER8_Pos (15U)
-#define USART_CR1_OVER8_Msk (0x1UL << USART_CR1_OVER8_Pos) /*!< 0x00008000 */
-#define USART_CR1_OVER8 USART_CR1_OVER8_Msk /*!<USART Oversampling by 8 enable */
-
-/****************** Bit definition for USART_CR2 register *******************/
-#define USART_CR2_ADD_Pos (0U)
-#define USART_CR2_ADD_Msk (0xFUL << USART_CR2_ADD_Pos) /*!< 0x0000000F */
-#define USART_CR2_ADD USART_CR2_ADD_Msk /*!<Address of the USART node */
-#define USART_CR2_LBDL_Pos (5U)
-#define USART_CR2_LBDL_Msk (0x1UL << USART_CR2_LBDL_Pos) /*!< 0x00000020 */
-#define USART_CR2_LBDL USART_CR2_LBDL_Msk /*!<LIN Break Detection Length */
-#define USART_CR2_LBDIE_Pos (6U)
-#define USART_CR2_LBDIE_Msk (0x1UL << USART_CR2_LBDIE_Pos) /*!< 0x00000040 */
-#define USART_CR2_LBDIE USART_CR2_LBDIE_Msk /*!<LIN Break Detection Interrupt Enable */
-#define USART_CR2_LBCL_Pos (8U)
-#define USART_CR2_LBCL_Msk (0x1UL << USART_CR2_LBCL_Pos) /*!< 0x00000100 */
-#define USART_CR2_LBCL USART_CR2_LBCL_Msk /*!<Last Bit Clock pulse */
-#define USART_CR2_CPHA_Pos (9U)
-#define USART_CR2_CPHA_Msk (0x1UL << USART_CR2_CPHA_Pos) /*!< 0x00000200 */
-#define USART_CR2_CPHA USART_CR2_CPHA_Msk /*!<Clock Phase */
-#define USART_CR2_CPOL_Pos (10U)
-#define USART_CR2_CPOL_Msk (0x1UL << USART_CR2_CPOL_Pos) /*!< 0x00000400 */
-#define USART_CR2_CPOL USART_CR2_CPOL_Msk /*!<Clock Polarity */
-#define USART_CR2_CLKEN_Pos (11U)
-#define USART_CR2_CLKEN_Msk (0x1UL << USART_CR2_CLKEN_Pos) /*!< 0x00000800 */
-#define USART_CR2_CLKEN USART_CR2_CLKEN_Msk /*!<Clock Enable */
-
-#define USART_CR2_STOP_Pos (12U)
-#define USART_CR2_STOP_Msk (0x3UL << USART_CR2_STOP_Pos) /*!< 0x00003000 */
-#define USART_CR2_STOP USART_CR2_STOP_Msk /*!<STOP[1:0] bits (STOP bits) */
-#define USART_CR2_STOP_0 (0x1UL << USART_CR2_STOP_Pos) /*!< 0x1000 */
-#define USART_CR2_STOP_1 (0x2UL << USART_CR2_STOP_Pos) /*!< 0x2000 */
-
-#define USART_CR2_LINEN_Pos (14U)
-#define USART_CR2_LINEN_Msk (0x1UL << USART_CR2_LINEN_Pos) /*!< 0x00004000 */
-#define USART_CR2_LINEN USART_CR2_LINEN_Msk /*!<LIN mode enable */
-
-/****************** Bit definition for USART_CR3 register *******************/
-#define USART_CR3_EIE_Pos (0U)
-#define USART_CR3_EIE_Msk (0x1UL << USART_CR3_EIE_Pos) /*!< 0x00000001 */
-#define USART_CR3_EIE USART_CR3_EIE_Msk /*!<Error Interrupt Enable */
-#define USART_CR3_IREN_Pos (1U)
-#define USART_CR3_IREN_Msk (0x1UL << USART_CR3_IREN_Pos) /*!< 0x00000002 */
-#define USART_CR3_IREN USART_CR3_IREN_Msk /*!<IrDA mode Enable */
-#define USART_CR3_IRLP_Pos (2U)
-#define USART_CR3_IRLP_Msk (0x1UL << USART_CR3_IRLP_Pos) /*!< 0x00000004 */
-#define USART_CR3_IRLP USART_CR3_IRLP_Msk /*!<IrDA Low-Power */
-#define USART_CR3_HDSEL_Pos (3U)
-#define USART_CR3_HDSEL_Msk (0x1UL << USART_CR3_HDSEL_Pos) /*!< 0x00000008 */
-#define USART_CR3_HDSEL USART_CR3_HDSEL_Msk /*!<Half-Duplex Selection */
-#define USART_CR3_NACK_Pos (4U)
-#define USART_CR3_NACK_Msk (0x1UL << USART_CR3_NACK_Pos) /*!< 0x00000010 */
-#define USART_CR3_NACK USART_CR3_NACK_Msk /*!<Smartcard NACK enable */
-#define USART_CR3_SCEN_Pos (5U)
-#define USART_CR3_SCEN_Msk (0x1UL << USART_CR3_SCEN_Pos) /*!< 0x00000020 */
-#define USART_CR3_SCEN USART_CR3_SCEN_Msk /*!<Smartcard mode enable */
-#define USART_CR3_DMAR_Pos (6U)
-#define USART_CR3_DMAR_Msk (0x1UL << USART_CR3_DMAR_Pos) /*!< 0x00000040 */
-#define USART_CR3_DMAR USART_CR3_DMAR_Msk /*!<DMA Enable Receiver */
-#define USART_CR3_DMAT_Pos (7U)
-#define USART_CR3_DMAT_Msk (0x1UL << USART_CR3_DMAT_Pos) /*!< 0x00000080 */
-#define USART_CR3_DMAT USART_CR3_DMAT_Msk /*!<DMA Enable Transmitter */
-#define USART_CR3_RTSE_Pos (8U)
-#define USART_CR3_RTSE_Msk (0x1UL << USART_CR3_RTSE_Pos) /*!< 0x00000100 */
-#define USART_CR3_RTSE USART_CR3_RTSE_Msk /*!<RTS Enable */
-#define USART_CR3_CTSE_Pos (9U)
-#define USART_CR3_CTSE_Msk (0x1UL << USART_CR3_CTSE_Pos) /*!< 0x00000200 */
-#define USART_CR3_CTSE USART_CR3_CTSE_Msk /*!<CTS Enable */
-#define USART_CR3_CTSIE_Pos (10U)
-#define USART_CR3_CTSIE_Msk (0x1UL << USART_CR3_CTSIE_Pos) /*!< 0x00000400 */
-#define USART_CR3_CTSIE USART_CR3_CTSIE_Msk /*!<CTS Interrupt Enable */
-#define USART_CR3_ONEBIT_Pos (11U)
-#define USART_CR3_ONEBIT_Msk (0x1UL << USART_CR3_ONEBIT_Pos) /*!< 0x00000800 */
-#define USART_CR3_ONEBIT USART_CR3_ONEBIT_Msk /*!<USART One bit method enable */
-
-/****************** Bit definition for USART_GTPR register ******************/
-#define USART_GTPR_PSC_Pos (0U)
-#define USART_GTPR_PSC_Msk (0xFFUL << USART_GTPR_PSC_Pos) /*!< 0x000000FF */
-#define USART_GTPR_PSC USART_GTPR_PSC_Msk /*!<PSC[7:0] bits (Prescaler value) */
-#define USART_GTPR_PSC_0 (0x01UL << USART_GTPR_PSC_Pos) /*!< 0x0001 */
-#define USART_GTPR_PSC_1 (0x02UL << USART_GTPR_PSC_Pos) /*!< 0x0002 */
-#define USART_GTPR_PSC_2 (0x04UL << USART_GTPR_PSC_Pos) /*!< 0x0004 */
-#define USART_GTPR_PSC_3 (0x08UL << USART_GTPR_PSC_Pos) /*!< 0x0008 */
-#define USART_GTPR_PSC_4 (0x10UL << USART_GTPR_PSC_Pos) /*!< 0x0010 */
-#define USART_GTPR_PSC_5 (0x20UL << USART_GTPR_PSC_Pos) /*!< 0x0020 */
-#define USART_GTPR_PSC_6 (0x40UL << USART_GTPR_PSC_Pos) /*!< 0x0040 */
-#define USART_GTPR_PSC_7 (0x80UL << USART_GTPR_PSC_Pos) /*!< 0x0080 */
-
-#define USART_GTPR_GT_Pos (8U)
-#define USART_GTPR_GT_Msk (0xFFUL << USART_GTPR_GT_Pos) /*!< 0x0000FF00 */
-#define USART_GTPR_GT USART_GTPR_GT_Msk /*!<Guard time value */
-
-/******************************************************************************/
-/* */
-/* Window WATCHDOG */
-/* */
-/******************************************************************************/
-/******************* Bit definition for WWDG_CR register ********************/
-#define WWDG_CR_T_Pos (0U)
-#define WWDG_CR_T_Msk (0x7FUL << WWDG_CR_T_Pos) /*!< 0x0000007F */
-#define WWDG_CR_T WWDG_CR_T_Msk /*!<T[6:0] bits (7-Bit counter (MSB to LSB)) */
-#define WWDG_CR_T_0 (0x01UL << WWDG_CR_T_Pos) /*!< 0x01 */
-#define WWDG_CR_T_1 (0x02UL << WWDG_CR_T_Pos) /*!< 0x02 */
-#define WWDG_CR_T_2 (0x04UL << WWDG_CR_T_Pos) /*!< 0x04 */
-#define WWDG_CR_T_3 (0x08UL << WWDG_CR_T_Pos) /*!< 0x08 */
-#define WWDG_CR_T_4 (0x10UL << WWDG_CR_T_Pos) /*!< 0x10 */
-#define WWDG_CR_T_5 (0x20UL << WWDG_CR_T_Pos) /*!< 0x20 */
-#define WWDG_CR_T_6 (0x40UL << WWDG_CR_T_Pos) /*!< 0x40 */
-/* Legacy defines */
-#define WWDG_CR_T0 WWDG_CR_T_0
-#define WWDG_CR_T1 WWDG_CR_T_1
-#define WWDG_CR_T2 WWDG_CR_T_2
-#define WWDG_CR_T3 WWDG_CR_T_3
-#define WWDG_CR_T4 WWDG_CR_T_4
-#define WWDG_CR_T5 WWDG_CR_T_5
-#define WWDG_CR_T6 WWDG_CR_T_6
-
-#define WWDG_CR_WDGA_Pos (7U)
-#define WWDG_CR_WDGA_Msk (0x1UL << WWDG_CR_WDGA_Pos) /*!< 0x00000080 */
-#define WWDG_CR_WDGA WWDG_CR_WDGA_Msk /*!<Activation bit */
-
-/******************* Bit definition for WWDG_CFR register *******************/
-#define WWDG_CFR_W_Pos (0U)
-#define WWDG_CFR_W_Msk (0x7FUL << WWDG_CFR_W_Pos) /*!< 0x0000007F */
-#define WWDG_CFR_W WWDG_CFR_W_Msk /*!<W[6:0] bits (7-bit window value) */
-#define WWDG_CFR_W_0 (0x01UL << WWDG_CFR_W_Pos) /*!< 0x0001 */
-#define WWDG_CFR_W_1 (0x02UL << WWDG_CFR_W_Pos) /*!< 0x0002 */
-#define WWDG_CFR_W_2 (0x04UL << WWDG_CFR_W_Pos) /*!< 0x0004 */
-#define WWDG_CFR_W_3 (0x08UL << WWDG_CFR_W_Pos) /*!< 0x0008 */
-#define WWDG_CFR_W_4 (0x10UL << WWDG_CFR_W_Pos) /*!< 0x0010 */
-#define WWDG_CFR_W_5 (0x20UL << WWDG_CFR_W_Pos) /*!< 0x0020 */
-#define WWDG_CFR_W_6 (0x40UL << WWDG_CFR_W_Pos) /*!< 0x0040 */
-/* Legacy defines */
-#define WWDG_CFR_W0 WWDG_CFR_W_0
-#define WWDG_CFR_W1 WWDG_CFR_W_1
-#define WWDG_CFR_W2 WWDG_CFR_W_2
-#define WWDG_CFR_W3 WWDG_CFR_W_3
-#define WWDG_CFR_W4 WWDG_CFR_W_4
-#define WWDG_CFR_W5 WWDG_CFR_W_5
-#define WWDG_CFR_W6 WWDG_CFR_W_6
-
-#define WWDG_CFR_WDGTB_Pos (7U)
-#define WWDG_CFR_WDGTB_Msk (0x3UL << WWDG_CFR_WDGTB_Pos) /*!< 0x00000180 */
-#define WWDG_CFR_WDGTB WWDG_CFR_WDGTB_Msk /*!<WDGTB[1:0] bits (Timer Base) */
-#define WWDG_CFR_WDGTB_0 (0x1UL << WWDG_CFR_WDGTB_Pos) /*!< 0x0080 */
-#define WWDG_CFR_WDGTB_1 (0x2UL << WWDG_CFR_WDGTB_Pos) /*!< 0x0100 */
-/* Legacy defines */
-#define WWDG_CFR_WDGTB0 WWDG_CFR_WDGTB_0
-#define WWDG_CFR_WDGTB1 WWDG_CFR_WDGTB_1
-
-#define WWDG_CFR_EWI_Pos (9U)
-#define WWDG_CFR_EWI_Msk (0x1UL << WWDG_CFR_EWI_Pos) /*!< 0x00000200 */
-#define WWDG_CFR_EWI WWDG_CFR_EWI_Msk /*!<Early Wakeup Interrupt */
-
-/******************* Bit definition for WWDG_SR register ********************/
-#define WWDG_SR_EWIF_Pos (0U)
-#define WWDG_SR_EWIF_Msk (0x1UL << WWDG_SR_EWIF_Pos) /*!< 0x00000001 */
-#define WWDG_SR_EWIF WWDG_SR_EWIF_Msk /*!<Early Wakeup Interrupt Flag */
-
-
-/******************************************************************************/
-/* */
-/* DBG */
-/* */
-/******************************************************************************/
-/******************** Bit definition for DBGMCU_IDCODE register *************/
-#define DBGMCU_IDCODE_DEV_ID_Pos (0U)
-#define DBGMCU_IDCODE_DEV_ID_Msk (0xFFFUL << DBGMCU_IDCODE_DEV_ID_Pos) /*!< 0x00000FFF */
-#define DBGMCU_IDCODE_DEV_ID DBGMCU_IDCODE_DEV_ID_Msk
-#define DBGMCU_IDCODE_REV_ID_Pos (16U)
-#define DBGMCU_IDCODE_REV_ID_Msk (0xFFFFUL << DBGMCU_IDCODE_REV_ID_Pos) /*!< 0xFFFF0000 */
-#define DBGMCU_IDCODE_REV_ID DBGMCU_IDCODE_REV_ID_Msk
-
-/******************** Bit definition for DBGMCU_CR register *****************/
-#define DBGMCU_CR_DBG_SLEEP_Pos (0U)
-#define DBGMCU_CR_DBG_SLEEP_Msk (0x1UL << DBGMCU_CR_DBG_SLEEP_Pos) /*!< 0x00000001 */
-#define DBGMCU_CR_DBG_SLEEP DBGMCU_CR_DBG_SLEEP_Msk
-#define DBGMCU_CR_DBG_STOP_Pos (1U)
-#define DBGMCU_CR_DBG_STOP_Msk (0x1UL << DBGMCU_CR_DBG_STOP_Pos) /*!< 0x00000002 */
-#define DBGMCU_CR_DBG_STOP DBGMCU_CR_DBG_STOP_Msk
-#define DBGMCU_CR_DBG_STANDBY_Pos (2U)
-#define DBGMCU_CR_DBG_STANDBY_Msk (0x1UL << DBGMCU_CR_DBG_STANDBY_Pos) /*!< 0x00000004 */
-#define DBGMCU_CR_DBG_STANDBY DBGMCU_CR_DBG_STANDBY_Msk
-#define DBGMCU_CR_TRACE_IOEN_Pos (5U)
-#define DBGMCU_CR_TRACE_IOEN_Msk (0x1UL << DBGMCU_CR_TRACE_IOEN_Pos) /*!< 0x00000020 */
-#define DBGMCU_CR_TRACE_IOEN DBGMCU_CR_TRACE_IOEN_Msk
-
-#define DBGMCU_CR_TRACE_MODE_Pos (6U)
-#define DBGMCU_CR_TRACE_MODE_Msk (0x3UL << DBGMCU_CR_TRACE_MODE_Pos) /*!< 0x000000C0 */
-#define DBGMCU_CR_TRACE_MODE DBGMCU_CR_TRACE_MODE_Msk
-#define DBGMCU_CR_TRACE_MODE_0 (0x1UL << DBGMCU_CR_TRACE_MODE_Pos) /*!< 0x00000040 */
-#define DBGMCU_CR_TRACE_MODE_1 (0x2UL << DBGMCU_CR_TRACE_MODE_Pos) /*!< 0x00000080 */
-
-/******************** Bit definition for DBGMCU_APB1_FZ register ************/
-#define DBGMCU_APB1_FZ_DBG_TIM2_STOP_Pos (0U)
-#define DBGMCU_APB1_FZ_DBG_TIM2_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_TIM2_STOP_Pos) /*!< 0x00000001 */
-#define DBGMCU_APB1_FZ_DBG_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_TIM3_STOP_Pos (1U)
-#define DBGMCU_APB1_FZ_DBG_TIM3_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_TIM3_STOP_Pos) /*!< 0x00000002 */
-#define DBGMCU_APB1_FZ_DBG_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_TIM4_STOP_Pos (2U)
-#define DBGMCU_APB1_FZ_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_TIM4_STOP_Pos) /*!< 0x00000004 */
-#define DBGMCU_APB1_FZ_DBG_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_TIM5_STOP_Pos (3U)
-#define DBGMCU_APB1_FZ_DBG_TIM5_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_TIM5_STOP_Pos) /*!< 0x00000008 */
-#define DBGMCU_APB1_FZ_DBG_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_RTC_STOP_Pos (10U)
-#define DBGMCU_APB1_FZ_DBG_RTC_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_RTC_STOP_Pos) /*!< 0x00000400 */
-#define DBGMCU_APB1_FZ_DBG_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_WWDG_STOP_Pos (11U)
-#define DBGMCU_APB1_FZ_DBG_WWDG_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_WWDG_STOP_Pos) /*!< 0x00000800 */
-#define DBGMCU_APB1_FZ_DBG_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_IWDG_STOP_Pos (12U)
-#define DBGMCU_APB1_FZ_DBG_IWDG_STOP_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_IWDG_STOP_Pos) /*!< 0x00001000 */
-#define DBGMCU_APB1_FZ_DBG_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP_Msk
-#define DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Pos (21U)
-#define DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Pos) /*!< 0x00200000 */
-#define DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Msk
-#define DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Pos (22U)
-#define DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Pos) /*!< 0x00400000 */
-#define DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Msk
-#define DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Pos (23U)
-#define DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Msk (0x1UL << DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Pos) /*!< 0x00800000 */
-#define DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Msk
-/* Old IWDGSTOP bit definition, maintained for legacy purpose */
-#define DBGMCU_APB1_FZ_DBG_IWDEG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
-
-/******************** Bit definition for DBGMCU_APB2_FZ register ************/
-#define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U)
-#define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*!< 0x00000001 */
-#define DBGMCU_APB2_FZ_DBG_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk
-#define DBGMCU_APB2_FZ_DBG_TIM9_STOP_Pos (16U)
-#define DBGMCU_APB2_FZ_DBG_TIM9_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM9_STOP_Pos) /*!< 0x00010000 */
-#define DBGMCU_APB2_FZ_DBG_TIM9_STOP DBGMCU_APB2_FZ_DBG_TIM9_STOP_Msk
-#define DBGMCU_APB2_FZ_DBG_TIM10_STOP_Pos (17U)
-#define DBGMCU_APB2_FZ_DBG_TIM10_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM10_STOP_Pos) /*!< 0x00020000 */
-#define DBGMCU_APB2_FZ_DBG_TIM10_STOP DBGMCU_APB2_FZ_DBG_TIM10_STOP_Msk
-#define DBGMCU_APB2_FZ_DBG_TIM11_STOP_Pos (18U)
-#define DBGMCU_APB2_FZ_DBG_TIM11_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM11_STOP_Pos) /*!< 0x00040000 */
-#define DBGMCU_APB2_FZ_DBG_TIM11_STOP DBGMCU_APB2_FZ_DBG_TIM11_STOP_Msk
-
-/******************************************************************************/
-/* */
-/* USB_OTG */
-/* */
-/******************************************************************************/
-/******************** Bit definition for USB_OTG_GOTGCTL register ***********/
-#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U)
-#define USB_OTG_GOTGCTL_SRQSCS_Msk (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */
-#define USB_OTG_GOTGCTL_SRQSCS USB_OTG_GOTGCTL_SRQSCS_Msk /*!< Session request success */
-#define USB_OTG_GOTGCTL_SRQ_Pos (1U)
-#define USB_OTG_GOTGCTL_SRQ_Msk (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */
-#define USB_OTG_GOTGCTL_SRQ USB_OTG_GOTGCTL_SRQ_Msk /*!< Session request */
-#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U)
-#define USB_OTG_GOTGCTL_HNGSCS_Msk (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */
-#define USB_OTG_GOTGCTL_HNGSCS USB_OTG_GOTGCTL_HNGSCS_Msk /*!< Host set HNP enable */
-#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U)
-#define USB_OTG_GOTGCTL_HNPRQ_Msk (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */
-#define USB_OTG_GOTGCTL_HNPRQ USB_OTG_GOTGCTL_HNPRQ_Msk /*!< HNP request */
-#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U)
-#define USB_OTG_GOTGCTL_HSHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */
-#define USB_OTG_GOTGCTL_HSHNPEN USB_OTG_GOTGCTL_HSHNPEN_Msk /*!< Host set HNP enable */
-#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U)
-#define USB_OTG_GOTGCTL_DHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */
-#define USB_OTG_GOTGCTL_DHNPEN USB_OTG_GOTGCTL_DHNPEN_Msk /*!< Device HNP enabled */
-#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U)
-#define USB_OTG_GOTGCTL_CIDSTS_Msk (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */
-#define USB_OTG_GOTGCTL_CIDSTS USB_OTG_GOTGCTL_CIDSTS_Msk /*!< Connector ID status */
-#define USB_OTG_GOTGCTL_DBCT_Pos (17U)
-#define USB_OTG_GOTGCTL_DBCT_Msk (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */
-#define USB_OTG_GOTGCTL_DBCT USB_OTG_GOTGCTL_DBCT_Msk /*!< Long/short debounce time */
-#define USB_OTG_GOTGCTL_ASVLD_Pos (18U)
-#define USB_OTG_GOTGCTL_ASVLD_Msk (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */
-#define USB_OTG_GOTGCTL_ASVLD USB_OTG_GOTGCTL_ASVLD_Msk /*!< A-session valid */
-#define USB_OTG_GOTGCTL_BSVLD_Pos (19U)
-#define USB_OTG_GOTGCTL_BSVLD_Msk (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */
-#define USB_OTG_GOTGCTL_BSVLD USB_OTG_GOTGCTL_BSVLD_Msk /*!< B-session valid */
-
-/******************** Bit definition forUSB_OTG_HCFG register ********************/
-
-#define USB_OTG_HCFG_FSLSPCS_Pos (0U)
-#define USB_OTG_HCFG_FSLSPCS_Msk (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */
-#define USB_OTG_HCFG_FSLSPCS USB_OTG_HCFG_FSLSPCS_Msk /*!< FS/LS PHY clock select */
-#define USB_OTG_HCFG_FSLSPCS_0 (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
-#define USB_OTG_HCFG_FSLSPCS_1 (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
-#define USB_OTG_HCFG_FSLSS_Pos (2U)
-#define USB_OTG_HCFG_FSLSS_Msk (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */
-#define USB_OTG_HCFG_FSLSS USB_OTG_HCFG_FSLSS_Msk /*!< FS- and LS-only support */
-
-/******************** Bit definition for USB_OTG_DCFG register ********************/
-
-#define USB_OTG_DCFG_DSPD_Pos (0U)
-#define USB_OTG_DCFG_DSPD_Msk (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */
-#define USB_OTG_DCFG_DSPD USB_OTG_DCFG_DSPD_Msk /*!< Device speed */
-#define USB_OTG_DCFG_DSPD_0 (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */
-#define USB_OTG_DCFG_DSPD_1 (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */
-#define USB_OTG_DCFG_NZLSOHSK_Pos (2U)
-#define USB_OTG_DCFG_NZLSOHSK_Msk (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */
-#define USB_OTG_DCFG_NZLSOHSK USB_OTG_DCFG_NZLSOHSK_Msk /*!< Nonzero-length status OUT handshake */
-
-#define USB_OTG_DCFG_DAD_Pos (4U)
-#define USB_OTG_DCFG_DAD_Msk (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */
-#define USB_OTG_DCFG_DAD USB_OTG_DCFG_DAD_Msk /*!< Device address */
-#define USB_OTG_DCFG_DAD_0 (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */
-#define USB_OTG_DCFG_DAD_1 (0x02UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000020 */
-#define USB_OTG_DCFG_DAD_2 (0x04UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000040 */
-#define USB_OTG_DCFG_DAD_3 (0x08UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000080 */
-#define USB_OTG_DCFG_DAD_4 (0x10UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000100 */
-#define USB_OTG_DCFG_DAD_5 (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */
-#define USB_OTG_DCFG_DAD_6 (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */
-
-#define USB_OTG_DCFG_PFIVL_Pos (11U)
-#define USB_OTG_DCFG_PFIVL_Msk (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */
-#define USB_OTG_DCFG_PFIVL USB_OTG_DCFG_PFIVL_Msk /*!< Periodic (micro)frame interval */
-#define USB_OTG_DCFG_PFIVL_0 (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */
-#define USB_OTG_DCFG_PFIVL_1 (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */
-
-#define USB_OTG_DCFG_XCVRDLY_Pos (14U)
-#define USB_OTG_DCFG_XCVRDLY_Msk (0x1UL << USB_OTG_DCFG_XCVRDLY_Pos) /*!< 0x00004000 */
-#define USB_OTG_DCFG_XCVRDLY USB_OTG_DCFG_XCVRDLY_Msk /*!< Transceiver delay */
-
-#define USB_OTG_DCFG_ERRATIM_Pos (15U)
-#define USB_OTG_DCFG_ERRATIM_Msk (0x1UL << USB_OTG_DCFG_ERRATIM_Pos) /*!< 0x00008000 */
-#define USB_OTG_DCFG_ERRATIM USB_OTG_DCFG_ERRATIM_Msk /*!< Erratic error interrupt mask */
-
-#define USB_OTG_DCFG_PERSCHIVL_Pos (24U)
-#define USB_OTG_DCFG_PERSCHIVL_Msk (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */
-#define USB_OTG_DCFG_PERSCHIVL USB_OTG_DCFG_PERSCHIVL_Msk /*!< Periodic scheduling interval */
-#define USB_OTG_DCFG_PERSCHIVL_0 (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */
-#define USB_OTG_DCFG_PERSCHIVL_1 (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */
-
-/******************** Bit definition for USB_OTG_PCGCR register ********************/
-#define USB_OTG_PCGCR_STPPCLK_Pos (0U)
-#define USB_OTG_PCGCR_STPPCLK_Msk (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */
-#define USB_OTG_PCGCR_STPPCLK USB_OTG_PCGCR_STPPCLK_Msk /*!< Stop PHY clock */
-#define USB_OTG_PCGCR_GATEHCLK_Pos (1U)
-#define USB_OTG_PCGCR_GATEHCLK_Msk (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */
-#define USB_OTG_PCGCR_GATEHCLK USB_OTG_PCGCR_GATEHCLK_Msk /*!< Gate HCLK */
-#define USB_OTG_PCGCR_PHYSUSP_Pos (4U)
-#define USB_OTG_PCGCR_PHYSUSP_Msk (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */
-#define USB_OTG_PCGCR_PHYSUSP USB_OTG_PCGCR_PHYSUSP_Msk /*!< PHY suspended */
-
-/******************** Bit definition for USB_OTG_GOTGINT register ********************/
-#define USB_OTG_GOTGINT_SEDET_Pos (2U)
-#define USB_OTG_GOTGINT_SEDET_Msk (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */
-#define USB_OTG_GOTGINT_SEDET USB_OTG_GOTGINT_SEDET_Msk /*!< Session end detected */
-#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U)
-#define USB_OTG_GOTGINT_SRSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */
-#define USB_OTG_GOTGINT_SRSSCHG USB_OTG_GOTGINT_SRSSCHG_Msk /*!< Session request success status change */
-#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U)
-#define USB_OTG_GOTGINT_HNSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */
-#define USB_OTG_GOTGINT_HNSSCHG USB_OTG_GOTGINT_HNSSCHG_Msk /*!< Host negotiation success status change */
-#define USB_OTG_GOTGINT_HNGDET_Pos (17U)
-#define USB_OTG_GOTGINT_HNGDET_Msk (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */
-#define USB_OTG_GOTGINT_HNGDET USB_OTG_GOTGINT_HNGDET_Msk /*!< Host negotiation detected */
-#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U)
-#define USB_OTG_GOTGINT_ADTOCHG_Msk (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */
-#define USB_OTG_GOTGINT_ADTOCHG USB_OTG_GOTGINT_ADTOCHG_Msk /*!< A-device timeout change */
-#define USB_OTG_GOTGINT_DBCDNE_Pos (19U)
-#define USB_OTG_GOTGINT_DBCDNE_Msk (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */
-#define USB_OTG_GOTGINT_DBCDNE USB_OTG_GOTGINT_DBCDNE_Msk /*!< Debounce done */
-
-/******************** Bit definition for USB_OTG_DCTL register ********************/
-#define USB_OTG_DCTL_RWUSIG_Pos (0U)
-#define USB_OTG_DCTL_RWUSIG_Msk (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */
-#define USB_OTG_DCTL_RWUSIG USB_OTG_DCTL_RWUSIG_Msk /*!< Remote wakeup signaling */
-#define USB_OTG_DCTL_SDIS_Pos (1U)
-#define USB_OTG_DCTL_SDIS_Msk (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */
-#define USB_OTG_DCTL_SDIS USB_OTG_DCTL_SDIS_Msk /*!< Soft disconnect */
-#define USB_OTG_DCTL_GINSTS_Pos (2U)
-#define USB_OTG_DCTL_GINSTS_Msk (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */
-#define USB_OTG_DCTL_GINSTS USB_OTG_DCTL_GINSTS_Msk /*!< Global IN NAK status */
-#define USB_OTG_DCTL_GONSTS_Pos (3U)
-#define USB_OTG_DCTL_GONSTS_Msk (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */
-#define USB_OTG_DCTL_GONSTS USB_OTG_DCTL_GONSTS_Msk /*!< Global OUT NAK status */
-
-#define USB_OTG_DCTL_TCTL_Pos (4U)
-#define USB_OTG_DCTL_TCTL_Msk (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */
-#define USB_OTG_DCTL_TCTL USB_OTG_DCTL_TCTL_Msk /*!< Test control */
-#define USB_OTG_DCTL_TCTL_0 (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */
-#define USB_OTG_DCTL_TCTL_1 (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */
-#define USB_OTG_DCTL_TCTL_2 (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */
-#define USB_OTG_DCTL_SGINAK_Pos (7U)
-#define USB_OTG_DCTL_SGINAK_Msk (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */
-#define USB_OTG_DCTL_SGINAK USB_OTG_DCTL_SGINAK_Msk /*!< Set global IN NAK */
-#define USB_OTG_DCTL_CGINAK_Pos (8U)
-#define USB_OTG_DCTL_CGINAK_Msk (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */
-#define USB_OTG_DCTL_CGINAK USB_OTG_DCTL_CGINAK_Msk /*!< Clear global IN NAK */
-#define USB_OTG_DCTL_SGONAK_Pos (9U)
-#define USB_OTG_DCTL_SGONAK_Msk (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */
-#define USB_OTG_DCTL_SGONAK USB_OTG_DCTL_SGONAK_Msk /*!< Set global OUT NAK */
-#define USB_OTG_DCTL_CGONAK_Pos (10U)
-#define USB_OTG_DCTL_CGONAK_Msk (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */
-#define USB_OTG_DCTL_CGONAK USB_OTG_DCTL_CGONAK_Msk /*!< Clear global OUT NAK */
-#define USB_OTG_DCTL_POPRGDNE_Pos (11U)
-#define USB_OTG_DCTL_POPRGDNE_Msk (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */
-#define USB_OTG_DCTL_POPRGDNE USB_OTG_DCTL_POPRGDNE_Msk /*!< Power-on programming done */
-
-/******************** Bit definition for USB_OTG_HFIR register ********************/
-#define USB_OTG_HFIR_FRIVL_Pos (0U)
-#define USB_OTG_HFIR_FRIVL_Msk (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HFIR_FRIVL USB_OTG_HFIR_FRIVL_Msk /*!< Frame interval */
-
-/******************** Bit definition for USB_OTG_HFNUM register ********************/
-#define USB_OTG_HFNUM_FRNUM_Pos (0U)
-#define USB_OTG_HFNUM_FRNUM_Msk (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HFNUM_FRNUM USB_OTG_HFNUM_FRNUM_Msk /*!< Frame number */
-#define USB_OTG_HFNUM_FTREM_Pos (16U)
-#define USB_OTG_HFNUM_FTREM_Msk (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_HFNUM_FTREM USB_OTG_HFNUM_FTREM_Msk /*!< Frame time remaining */
-
-/******************** Bit definition for USB_OTG_DSTS register ********************/
-#define USB_OTG_DSTS_SUSPSTS_Pos (0U)
-#define USB_OTG_DSTS_SUSPSTS_Msk (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */
-#define USB_OTG_DSTS_SUSPSTS USB_OTG_DSTS_SUSPSTS_Msk /*!< Suspend status */
-
-#define USB_OTG_DSTS_ENUMSPD_Pos (1U)
-#define USB_OTG_DSTS_ENUMSPD_Msk (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */
-#define USB_OTG_DSTS_ENUMSPD USB_OTG_DSTS_ENUMSPD_Msk /*!< Enumerated speed */
-#define USB_OTG_DSTS_ENUMSPD_0 (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */
-#define USB_OTG_DSTS_ENUMSPD_1 (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */
-#define USB_OTG_DSTS_EERR_Pos (3U)
-#define USB_OTG_DSTS_EERR_Msk (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */
-#define USB_OTG_DSTS_EERR USB_OTG_DSTS_EERR_Msk /*!< Erratic error */
-#define USB_OTG_DSTS_FNSOF_Pos (8U)
-#define USB_OTG_DSTS_FNSOF_Msk (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */
-#define USB_OTG_DSTS_FNSOF USB_OTG_DSTS_FNSOF_Msk /*!< Frame number of the received SOF */
-
-/******************** Bit definition for USB_OTG_GAHBCFG register ********************/
-#define USB_OTG_GAHBCFG_GINT_Pos (0U)
-#define USB_OTG_GAHBCFG_GINT_Msk (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */
-#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINT_Msk /*!< Global interrupt mask */
-#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U)
-#define USB_OTG_GAHBCFG_HBSTLEN_Msk (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */
-#define USB_OTG_GAHBCFG_HBSTLEN USB_OTG_GAHBCFG_HBSTLEN_Msk /*!< Burst length/type */
-#define USB_OTG_GAHBCFG_HBSTLEN_0 (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */
-#define USB_OTG_GAHBCFG_HBSTLEN_1 (0x1UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR */
-#define USB_OTG_GAHBCFG_HBSTLEN_2 (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */
-#define USB_OTG_GAHBCFG_HBSTLEN_3 (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */
-#define USB_OTG_GAHBCFG_HBSTLEN_4 (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */
-#define USB_OTG_GAHBCFG_DMAEN_Pos (5U)
-#define USB_OTG_GAHBCFG_DMAEN_Msk (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */
-#define USB_OTG_GAHBCFG_DMAEN USB_OTG_GAHBCFG_DMAEN_Msk /*!< DMA enable */
-#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U)
-#define USB_OTG_GAHBCFG_TXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */
-#define USB_OTG_GAHBCFG_TXFELVL USB_OTG_GAHBCFG_TXFELVL_Msk /*!< TxFIFO empty level */
-#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U)
-#define USB_OTG_GAHBCFG_PTXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */
-#define USB_OTG_GAHBCFG_PTXFELVL USB_OTG_GAHBCFG_PTXFELVL_Msk /*!< Periodic TxFIFO empty level */
-
-/******************** Bit definition for USB_OTG_GUSBCFG register ********************/
-
-#define USB_OTG_GUSBCFG_TOCAL_Pos (0U)
-#define USB_OTG_GUSBCFG_TOCAL_Msk (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */
-#define USB_OTG_GUSBCFG_TOCAL USB_OTG_GUSBCFG_TOCAL_Msk /*!< FS timeout calibration */
-#define USB_OTG_GUSBCFG_TOCAL_0 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */
-#define USB_OTG_GUSBCFG_TOCAL_1 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */
-#define USB_OTG_GUSBCFG_TOCAL_2 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */
-#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U)
-#define USB_OTG_GUSBCFG_PHYSEL_Msk (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */
-#define USB_OTG_GUSBCFG_PHYSEL USB_OTG_GUSBCFG_PHYSEL_Msk /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
-#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U)
-#define USB_OTG_GUSBCFG_SRPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */
-#define USB_OTG_GUSBCFG_SRPCAP USB_OTG_GUSBCFG_SRPCAP_Msk /*!< SRP-capable */
-#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U)
-#define USB_OTG_GUSBCFG_HNPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */
-#define USB_OTG_GUSBCFG_HNPCAP USB_OTG_GUSBCFG_HNPCAP_Msk /*!< HNP-capable */
-#define USB_OTG_GUSBCFG_TRDT_Pos (10U)
-#define USB_OTG_GUSBCFG_TRDT_Msk (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */
-#define USB_OTG_GUSBCFG_TRDT USB_OTG_GUSBCFG_TRDT_Msk /*!< USB turnaround time */
-#define USB_OTG_GUSBCFG_TRDT_0 (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */
-#define USB_OTG_GUSBCFG_TRDT_1 (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */
-#define USB_OTG_GUSBCFG_TRDT_2 (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */
-#define USB_OTG_GUSBCFG_TRDT_3 (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */
-#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U)
-#define USB_OTG_GUSBCFG_PHYLPCS_Msk (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */
-#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPCS_Msk /*!< PHY Low-power clock select */
-#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U)
-#define USB_OTG_GUSBCFG_ULPIFSLS_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */
-#define USB_OTG_GUSBCFG_ULPIFSLS USB_OTG_GUSBCFG_ULPIFSLS_Msk /*!< ULPI FS/LS select */
-#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U)
-#define USB_OTG_GUSBCFG_ULPIAR_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */
-#define USB_OTG_GUSBCFG_ULPIAR USB_OTG_GUSBCFG_ULPIAR_Msk /*!< ULPI Auto-resume */
-#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U)
-#define USB_OTG_GUSBCFG_ULPICSM_Msk (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */
-#define USB_OTG_GUSBCFG_ULPICSM USB_OTG_GUSBCFG_ULPICSM_Msk /*!< ULPI Clock SuspendM */
-#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U)
-#define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */
-#define USB_OTG_GUSBCFG_ULPIEVBUSD USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */
-#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U)
-#define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */
-#define USB_OTG_GUSBCFG_ULPIEVBUSI USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */
-#define USB_OTG_GUSBCFG_TSDPS_Pos (22U)
-#define USB_OTG_GUSBCFG_TSDPS_Msk (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */
-#define USB_OTG_GUSBCFG_TSDPS USB_OTG_GUSBCFG_TSDPS_Msk /*!< TermSel DLine pulsing selection */
-#define USB_OTG_GUSBCFG_PCCI_Pos (23U)
-#define USB_OTG_GUSBCFG_PCCI_Msk (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */
-#define USB_OTG_GUSBCFG_PCCI USB_OTG_GUSBCFG_PCCI_Msk /*!< Indicator complement */
-#define USB_OTG_GUSBCFG_PTCI_Pos (24U)
-#define USB_OTG_GUSBCFG_PTCI_Msk (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */
-#define USB_OTG_GUSBCFG_PTCI USB_OTG_GUSBCFG_PTCI_Msk /*!< Indicator pass through */
-#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U)
-#define USB_OTG_GUSBCFG_ULPIIPD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */
-#define USB_OTG_GUSBCFG_ULPIIPD USB_OTG_GUSBCFG_ULPIIPD_Msk /*!< ULPI interface protect disable */
-#define USB_OTG_GUSBCFG_FHMOD_Pos (29U)
-#define USB_OTG_GUSBCFG_FHMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */
-#define USB_OTG_GUSBCFG_FHMOD USB_OTG_GUSBCFG_FHMOD_Msk /*!< Forced host mode */
-#define USB_OTG_GUSBCFG_FDMOD_Pos (30U)
-#define USB_OTG_GUSBCFG_FDMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */
-#define USB_OTG_GUSBCFG_FDMOD USB_OTG_GUSBCFG_FDMOD_Msk /*!< Forced peripheral mode */
-#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U)
-#define USB_OTG_GUSBCFG_CTXPKT_Msk (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */
-#define USB_OTG_GUSBCFG_CTXPKT USB_OTG_GUSBCFG_CTXPKT_Msk /*!< Corrupt Tx packet */
-
-/******************** Bit definition for USB_OTG_GRSTCTL register ********************/
-#define USB_OTG_GRSTCTL_CSRST_Pos (0U)
-#define USB_OTG_GRSTCTL_CSRST_Msk (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */
-#define USB_OTG_GRSTCTL_CSRST USB_OTG_GRSTCTL_CSRST_Msk /*!< Core soft reset */
-#define USB_OTG_GRSTCTL_HSRST_Pos (1U)
-#define USB_OTG_GRSTCTL_HSRST_Msk (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */
-#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_HSRST_Msk /*!< HCLK soft reset */
-#define USB_OTG_GRSTCTL_FCRST_Pos (2U)
-#define USB_OTG_GRSTCTL_FCRST_Msk (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */
-#define USB_OTG_GRSTCTL_FCRST USB_OTG_GRSTCTL_FCRST_Msk /*!< Host frame counter reset */
-#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U)
-#define USB_OTG_GRSTCTL_RXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */
-#define USB_OTG_GRSTCTL_RXFFLSH USB_OTG_GRSTCTL_RXFFLSH_Msk /*!< RxFIFO flush */
-#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U)
-#define USB_OTG_GRSTCTL_TXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */
-#define USB_OTG_GRSTCTL_TXFFLSH USB_OTG_GRSTCTL_TXFFLSH_Msk /*!< TxFIFO flush */
-
-
-#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U)
-#define USB_OTG_GRSTCTL_TXFNUM_Msk (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */
-#define USB_OTG_GRSTCTL_TXFNUM USB_OTG_GRSTCTL_TXFNUM_Msk /*!< TxFIFO number */
-#define USB_OTG_GRSTCTL_TXFNUM_0 (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */
-#define USB_OTG_GRSTCTL_TXFNUM_1 (0x02UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000080 */
-#define USB_OTG_GRSTCTL_TXFNUM_2 (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */
-#define USB_OTG_GRSTCTL_TXFNUM_3 (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */
-#define USB_OTG_GRSTCTL_TXFNUM_4 (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */
-#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U)
-#define USB_OTG_GRSTCTL_DMAREQ_Msk (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */
-#define USB_OTG_GRSTCTL_DMAREQ USB_OTG_GRSTCTL_DMAREQ_Msk /*!< DMA request signal */
-#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U)
-#define USB_OTG_GRSTCTL_AHBIDL_Msk (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */
-#define USB_OTG_GRSTCTL_AHBIDL USB_OTG_GRSTCTL_AHBIDL_Msk /*!< AHB master idle */
-
-/******************** Bit definition for USB_OTG_DIEPMSK register ********************/
-#define USB_OTG_DIEPMSK_XFRCM_Pos (0U)
-#define USB_OTG_DIEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */
-#define USB_OTG_DIEPMSK_XFRCM USB_OTG_DIEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DIEPMSK_EPDM_Pos (1U)
-#define USB_OTG_DIEPMSK_EPDM_Msk (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */
-#define USB_OTG_DIEPMSK_EPDM USB_OTG_DIEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DIEPMSK_TOM_Pos (3U)
-#define USB_OTG_DIEPMSK_TOM_Msk (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */
-#define USB_OTG_DIEPMSK_TOM USB_OTG_DIEPMSK_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */
-#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U)
-#define USB_OTG_DIEPMSK_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */
-#define USB_OTG_DIEPMSK_ITTXFEMSK USB_OTG_DIEPMSK_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U)
-#define USB_OTG_DIEPMSK_INEPNMM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */
-#define USB_OTG_DIEPMSK_INEPNMM USB_OTG_DIEPMSK_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U)
-#define USB_OTG_DIEPMSK_INEPNEM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */
-#define USB_OTG_DIEPMSK_INEPNEM USB_OTG_DIEPMSK_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DIEPMSK_TXFURM_Pos (8U)
-#define USB_OTG_DIEPMSK_TXFURM_Msk (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */
-#define USB_OTG_DIEPMSK_TXFURM USB_OTG_DIEPMSK_TXFURM_Msk /*!< FIFO underrun mask */
-#define USB_OTG_DIEPMSK_BIM_Pos (9U)
-#define USB_OTG_DIEPMSK_BIM_Msk (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */
-#define USB_OTG_DIEPMSK_BIM USB_OTG_DIEPMSK_BIM_Msk /*!< BNA interrupt mask */
-
-/******************** Bit definition for USB_OTG_HPTXSTS register ********************/
-#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U)
-#define USB_OTG_HPTXSTS_PTXFSAVL_Msk (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HPTXSTS_PTXFSAVL USB_OTG_HPTXSTS_PTXFSAVL_Msk /*!< Periodic transmit data FIFO space available */
-#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U)
-#define USB_OTG_HPTXSTS_PTXQSAV_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */
-#define USB_OTG_HPTXSTS_PTXQSAV USB_OTG_HPTXSTS_PTXQSAV_Msk /*!< Periodic transmit request queue space available */
-#define USB_OTG_HPTXSTS_PTXQSAV_0 (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_1 (0x02UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00020000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_2 (0x04UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00040000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_3 (0x08UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00080000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_4 (0x10UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00100000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_5 (0x20UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00200000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_6 (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */
-#define USB_OTG_HPTXSTS_PTXQSAV_7 (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */
-
-#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U)
-#define USB_OTG_HPTXSTS_PTXQTOP_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP USB_OTG_HPTXSTS_PTXQTOP_Msk /*!< Top of the periodic transmit request queue */
-#define USB_OTG_HPTXSTS_PTXQTOP_0 (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_1 (0x02UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x02000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_2 (0x04UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x04000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_3 (0x08UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x08000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_4 (0x10UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x10000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_5 (0x20UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x20000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_6 (0x40UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x40000000 */
-#define USB_OTG_HPTXSTS_PTXQTOP_7 (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */
-
-/******************** Bit definition for USB_OTG_HAINT register ********************/
-#define USB_OTG_HAINT_HAINT_Pos (0U)
-#define USB_OTG_HAINT_HAINT_Msk (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HAINT_HAINT USB_OTG_HAINT_HAINT_Msk /*!< Channel interrupts */
-
-/******************** Bit definition for USB_OTG_DOEPMSK register ********************/
-#define USB_OTG_DOEPMSK_XFRCM_Pos (0U)
-#define USB_OTG_DOEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */
-#define USB_OTG_DOEPMSK_XFRCM USB_OTG_DOEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DOEPMSK_EPDM_Pos (1U)
-#define USB_OTG_DOEPMSK_EPDM_Msk (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */
-#define USB_OTG_DOEPMSK_EPDM USB_OTG_DOEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DOEPMSK_AHBERRM_Pos (2U)
-#define USB_OTG_DOEPMSK_AHBERRM_Msk (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */
-#define USB_OTG_DOEPMSK_AHBERRM USB_OTG_DOEPMSK_AHBERRM_Msk /*!< OUT transaction AHB Error interrupt mask */
-#define USB_OTG_DOEPMSK_STUPM_Pos (3U)
-#define USB_OTG_DOEPMSK_STUPM_Msk (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */
-#define USB_OTG_DOEPMSK_STUPM USB_OTG_DOEPMSK_STUPM_Msk /*!< SETUP phase done mask */
-#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U)
-#define USB_OTG_DOEPMSK_OTEPDM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */
-#define USB_OTG_DOEPMSK_OTEPDM USB_OTG_DOEPMSK_OTEPDM_Msk /*!< OUT token received when endpoint disabled mask */
-#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U)
-#define USB_OTG_DOEPMSK_OTEPSPRM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */
-#define USB_OTG_DOEPMSK_OTEPSPRM USB_OTG_DOEPMSK_OTEPSPRM_Msk /*!< Status Phase Received mask */
-#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U)
-#define USB_OTG_DOEPMSK_B2BSTUP_Msk (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */
-#define USB_OTG_DOEPMSK_B2BSTUP USB_OTG_DOEPMSK_B2BSTUP_Msk /*!< Back-to-back SETUP packets received mask */
-#define USB_OTG_DOEPMSK_OPEM_Pos (8U)
-#define USB_OTG_DOEPMSK_OPEM_Msk (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */
-#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OPEM_Msk /*!< OUT packet error mask */
-#define USB_OTG_DOEPMSK_BOIM_Pos (9U)
-#define USB_OTG_DOEPMSK_BOIM_Msk (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */
-#define USB_OTG_DOEPMSK_BOIM USB_OTG_DOEPMSK_BOIM_Msk /*!< BNA interrupt mask */
-#define USB_OTG_DOEPMSK_BERRM_Pos (12U)
-#define USB_OTG_DOEPMSK_BERRM_Msk (0x1UL << USB_OTG_DOEPMSK_BERRM_Pos) /*!< 0x00001000 */
-#define USB_OTG_DOEPMSK_BERRM USB_OTG_DOEPMSK_BERRM_Msk /*!< Babble error interrupt mask */
-#define USB_OTG_DOEPMSK_NAKM_Pos (13U)
-#define USB_OTG_DOEPMSK_NAKM_Msk (0x1UL << USB_OTG_DOEPMSK_NAKM_Pos) /*!< 0x00002000 */
-#define USB_OTG_DOEPMSK_NAKM USB_OTG_DOEPMSK_NAKM_Msk /*!< OUT Packet NAK interrupt mask */
-#define USB_OTG_DOEPMSK_NYETM_Pos (14U)
-#define USB_OTG_DOEPMSK_NYETM_Msk (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */
-#define USB_OTG_DOEPMSK_NYETM USB_OTG_DOEPMSK_NYETM_Msk /*!< NYET interrupt mask */
-/******************** Bit definition for USB_OTG_GINTSTS register ********************/
-#define USB_OTG_GINTSTS_CMOD_Pos (0U)
-#define USB_OTG_GINTSTS_CMOD_Msk (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */
-#define USB_OTG_GINTSTS_CMOD USB_OTG_GINTSTS_CMOD_Msk /*!< Current mode of operation */
-#define USB_OTG_GINTSTS_MMIS_Pos (1U)
-#define USB_OTG_GINTSTS_MMIS_Msk (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */
-#define USB_OTG_GINTSTS_MMIS USB_OTG_GINTSTS_MMIS_Msk /*!< Mode mismatch interrupt */
-#define USB_OTG_GINTSTS_OTGINT_Pos (2U)
-#define USB_OTG_GINTSTS_OTGINT_Msk (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */
-#define USB_OTG_GINTSTS_OTGINT USB_OTG_GINTSTS_OTGINT_Msk /*!< OTG interrupt */
-#define USB_OTG_GINTSTS_SOF_Pos (3U)
-#define USB_OTG_GINTSTS_SOF_Msk (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */
-#define USB_OTG_GINTSTS_SOF USB_OTG_GINTSTS_SOF_Msk /*!< Start of frame */
-#define USB_OTG_GINTSTS_RXFLVL_Pos (4U)
-#define USB_OTG_GINTSTS_RXFLVL_Msk (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */
-#define USB_OTG_GINTSTS_RXFLVL USB_OTG_GINTSTS_RXFLVL_Msk /*!< RxFIFO nonempty */
-#define USB_OTG_GINTSTS_NPTXFE_Pos (5U)
-#define USB_OTG_GINTSTS_NPTXFE_Msk (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */
-#define USB_OTG_GINTSTS_NPTXFE USB_OTG_GINTSTS_NPTXFE_Msk /*!< Nonperiodic TxFIFO empty */
-#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U)
-#define USB_OTG_GINTSTS_GINAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */
-#define USB_OTG_GINTSTS_GINAKEFF USB_OTG_GINTSTS_GINAKEFF_Msk /*!< Global IN nonperiodic NAK effective */
-#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U)
-#define USB_OTG_GINTSTS_BOUTNAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */
-#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */
-#define USB_OTG_GINTSTS_ESUSP_Pos (10U)
-#define USB_OTG_GINTSTS_ESUSP_Msk (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */
-#define USB_OTG_GINTSTS_ESUSP USB_OTG_GINTSTS_ESUSP_Msk /*!< Early suspend */
-#define USB_OTG_GINTSTS_USBSUSP_Pos (11U)
-#define USB_OTG_GINTSTS_USBSUSP_Msk (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */
-#define USB_OTG_GINTSTS_USBSUSP USB_OTG_GINTSTS_USBSUSP_Msk /*!< USB suspend */
-#define USB_OTG_GINTSTS_USBRST_Pos (12U)
-#define USB_OTG_GINTSTS_USBRST_Msk (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */
-#define USB_OTG_GINTSTS_USBRST USB_OTG_GINTSTS_USBRST_Msk /*!< USB reset */
-#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U)
-#define USB_OTG_GINTSTS_ENUMDNE_Msk (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */
-#define USB_OTG_GINTSTS_ENUMDNE USB_OTG_GINTSTS_ENUMDNE_Msk /*!< Enumeration done */
-#define USB_OTG_GINTSTS_ISOODRP_Pos (14U)
-#define USB_OTG_GINTSTS_ISOODRP_Msk (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */
-#define USB_OTG_GINTSTS_ISOODRP USB_OTG_GINTSTS_ISOODRP_Msk /*!< Isochronous OUT packet dropped interrupt */
-#define USB_OTG_GINTSTS_EOPF_Pos (15U)
-#define USB_OTG_GINTSTS_EOPF_Msk (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */
-#define USB_OTG_GINTSTS_EOPF USB_OTG_GINTSTS_EOPF_Msk /*!< End of periodic frame interrupt */
-#define USB_OTG_GINTSTS_IEPINT_Pos (18U)
-#define USB_OTG_GINTSTS_IEPINT_Msk (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */
-#define USB_OTG_GINTSTS_IEPINT USB_OTG_GINTSTS_IEPINT_Msk /*!< IN endpoint interrupt */
-#define USB_OTG_GINTSTS_OEPINT_Pos (19U)
-#define USB_OTG_GINTSTS_OEPINT_Msk (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */
-#define USB_OTG_GINTSTS_OEPINT USB_OTG_GINTSTS_OEPINT_Msk /*!< OUT endpoint interrupt */
-#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U)
-#define USB_OTG_GINTSTS_IISOIXFR_Msk (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */
-#define USB_OTG_GINTSTS_IISOIXFR USB_OTG_GINTSTS_IISOIXFR_Msk /*!< Incomplete isochronous IN transfer */
-#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U)
-#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */
-#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */
-#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U)
-#define USB_OTG_GINTSTS_DATAFSUSP_Msk (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */
-#define USB_OTG_GINTSTS_DATAFSUSP USB_OTG_GINTSTS_DATAFSUSP_Msk /*!< Data fetch suspended */
-#define USB_OTG_GINTSTS_HPRTINT_Pos (24U)
-#define USB_OTG_GINTSTS_HPRTINT_Msk (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */
-#define USB_OTG_GINTSTS_HPRTINT USB_OTG_GINTSTS_HPRTINT_Msk /*!< Host port interrupt */
-#define USB_OTG_GINTSTS_HCINT_Pos (25U)
-#define USB_OTG_GINTSTS_HCINT_Msk (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */
-#define USB_OTG_GINTSTS_HCINT USB_OTG_GINTSTS_HCINT_Msk /*!< Host channels interrupt */
-#define USB_OTG_GINTSTS_PTXFE_Pos (26U)
-#define USB_OTG_GINTSTS_PTXFE_Msk (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */
-#define USB_OTG_GINTSTS_PTXFE USB_OTG_GINTSTS_PTXFE_Msk /*!< Periodic TxFIFO empty */
-#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U)
-#define USB_OTG_GINTSTS_CIDSCHG_Msk (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */
-#define USB_OTG_GINTSTS_CIDSCHG USB_OTG_GINTSTS_CIDSCHG_Msk /*!< Connector ID status change */
-#define USB_OTG_GINTSTS_DISCINT_Pos (29U)
-#define USB_OTG_GINTSTS_DISCINT_Msk (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */
-#define USB_OTG_GINTSTS_DISCINT USB_OTG_GINTSTS_DISCINT_Msk /*!< Disconnect detected interrupt */
-#define USB_OTG_GINTSTS_SRQINT_Pos (30U)
-#define USB_OTG_GINTSTS_SRQINT_Msk (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */
-#define USB_OTG_GINTSTS_SRQINT USB_OTG_GINTSTS_SRQINT_Msk /*!< Session request/new session detected interrupt */
-#define USB_OTG_GINTSTS_WKUINT_Pos (31U)
-#define USB_OTG_GINTSTS_WKUINT_Msk (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */
-#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUINT_Msk /*!< Resume/remote wakeup detected interrupt */
-
-/******************** Bit definition for USB_OTG_GINTMSK register ********************/
-#define USB_OTG_GINTMSK_MMISM_Pos (1U)
-#define USB_OTG_GINTMSK_MMISM_Msk (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */
-#define USB_OTG_GINTMSK_MMISM USB_OTG_GINTMSK_MMISM_Msk /*!< Mode mismatch interrupt mask */
-#define USB_OTG_GINTMSK_OTGINT_Pos (2U)
-#define USB_OTG_GINTMSK_OTGINT_Msk (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */
-#define USB_OTG_GINTMSK_OTGINT USB_OTG_GINTMSK_OTGINT_Msk /*!< OTG interrupt mask */
-#define USB_OTG_GINTMSK_SOFM_Pos (3U)
-#define USB_OTG_GINTMSK_SOFM_Msk (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */
-#define USB_OTG_GINTMSK_SOFM USB_OTG_GINTMSK_SOFM_Msk /*!< Start of frame mask */
-#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U)
-#define USB_OTG_GINTMSK_RXFLVLM_Msk (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */
-#define USB_OTG_GINTMSK_RXFLVLM USB_OTG_GINTMSK_RXFLVLM_Msk /*!< Receive FIFO nonempty mask */
-#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U)
-#define USB_OTG_GINTMSK_NPTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */
-#define USB_OTG_GINTMSK_NPTXFEM USB_OTG_GINTMSK_NPTXFEM_Msk /*!< Nonperiodic TxFIFO empty mask */
-#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U)
-#define USB_OTG_GINTMSK_GINAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */
-#define USB_OTG_GINTMSK_GINAKEFFM USB_OTG_GINTMSK_GINAKEFFM_Msk /*!< Global nonperiodic IN NAK effective mask */
-#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U)
-#define USB_OTG_GINTMSK_GONAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */
-#define USB_OTG_GINTMSK_GONAKEFFM USB_OTG_GINTMSK_GONAKEFFM_Msk /*!< Global OUT NAK effective mask */
-#define USB_OTG_GINTMSK_ESUSPM_Pos (10U)
-#define USB_OTG_GINTMSK_ESUSPM_Msk (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */
-#define USB_OTG_GINTMSK_ESUSPM USB_OTG_GINTMSK_ESUSPM_Msk /*!< Early suspend mask */
-#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U)
-#define USB_OTG_GINTMSK_USBSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */
-#define USB_OTG_GINTMSK_USBSUSPM USB_OTG_GINTMSK_USBSUSPM_Msk /*!< USB suspend mask */
-#define USB_OTG_GINTMSK_USBRST_Pos (12U)
-#define USB_OTG_GINTMSK_USBRST_Msk (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */
-#define USB_OTG_GINTMSK_USBRST USB_OTG_GINTMSK_USBRST_Msk /*!< USB reset mask */
-#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U)
-#define USB_OTG_GINTMSK_ENUMDNEM_Msk (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */
-#define USB_OTG_GINTMSK_ENUMDNEM USB_OTG_GINTMSK_ENUMDNEM_Msk /*!< Enumeration done mask */
-#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U)
-#define USB_OTG_GINTMSK_ISOODRPM_Msk (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */
-#define USB_OTG_GINTMSK_ISOODRPM USB_OTG_GINTMSK_ISOODRPM_Msk /*!< Isochronous OUT packet dropped interrupt mask */
-#define USB_OTG_GINTMSK_EOPFM_Pos (15U)
-#define USB_OTG_GINTMSK_EOPFM_Msk (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */
-#define USB_OTG_GINTMSK_EOPFM USB_OTG_GINTMSK_EOPFM_Msk /*!< End of periodic frame interrupt mask */
-#define USB_OTG_GINTMSK_EPMISM_Pos (17U)
-#define USB_OTG_GINTMSK_EPMISM_Msk (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */
-#define USB_OTG_GINTMSK_EPMISM USB_OTG_GINTMSK_EPMISM_Msk /*!< Endpoint mismatch interrupt mask */
-#define USB_OTG_GINTMSK_IEPINT_Pos (18U)
-#define USB_OTG_GINTMSK_IEPINT_Msk (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */
-#define USB_OTG_GINTMSK_IEPINT USB_OTG_GINTMSK_IEPINT_Msk /*!< IN endpoints interrupt mask */
-#define USB_OTG_GINTMSK_OEPINT_Pos (19U)
-#define USB_OTG_GINTMSK_OEPINT_Msk (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */
-#define USB_OTG_GINTMSK_OEPINT USB_OTG_GINTMSK_OEPINT_Msk /*!< OUT endpoints interrupt mask */
-#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U)
-#define USB_OTG_GINTMSK_IISOIXFRM_Msk (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */
-#define USB_OTG_GINTMSK_IISOIXFRM USB_OTG_GINTMSK_IISOIXFRM_Msk /*!< Incomplete isochronous IN transfer mask */
-#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U)
-#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */
-#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */
-#define USB_OTG_GINTMSK_FSUSPM_Pos (22U)
-#define USB_OTG_GINTMSK_FSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */
-#define USB_OTG_GINTMSK_FSUSPM USB_OTG_GINTMSK_FSUSPM_Msk /*!< Data fetch suspended mask */
-#define USB_OTG_GINTMSK_PRTIM_Pos (24U)
-#define USB_OTG_GINTMSK_PRTIM_Msk (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */
-#define USB_OTG_GINTMSK_PRTIM USB_OTG_GINTMSK_PRTIM_Msk /*!< Host port interrupt mask */
-#define USB_OTG_GINTMSK_HCIM_Pos (25U)
-#define USB_OTG_GINTMSK_HCIM_Msk (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */
-#define USB_OTG_GINTMSK_HCIM USB_OTG_GINTMSK_HCIM_Msk /*!< Host channels interrupt mask */
-#define USB_OTG_GINTMSK_PTXFEM_Pos (26U)
-#define USB_OTG_GINTMSK_PTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */
-#define USB_OTG_GINTMSK_PTXFEM USB_OTG_GINTMSK_PTXFEM_Msk /*!< Periodic TxFIFO empty mask */
-#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U)
-#define USB_OTG_GINTMSK_CIDSCHGM_Msk (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */
-#define USB_OTG_GINTMSK_CIDSCHGM USB_OTG_GINTMSK_CIDSCHGM_Msk /*!< Connector ID status change mask */
-#define USB_OTG_GINTMSK_DISCINT_Pos (29U)
-#define USB_OTG_GINTMSK_DISCINT_Msk (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */
-#define USB_OTG_GINTMSK_DISCINT USB_OTG_GINTMSK_DISCINT_Msk /*!< Disconnect detected interrupt mask */
-#define USB_OTG_GINTMSK_SRQIM_Pos (30U)
-#define USB_OTG_GINTMSK_SRQIM_Msk (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */
-#define USB_OTG_GINTMSK_SRQIM USB_OTG_GINTMSK_SRQIM_Msk /*!< Session request/new session detected interrupt mask */
-#define USB_OTG_GINTMSK_WUIM_Pos (31U)
-#define USB_OTG_GINTMSK_WUIM_Msk (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */
-#define USB_OTG_GINTMSK_WUIM USB_OTG_GINTMSK_WUIM_Msk /*!< Resume/remote wakeup detected interrupt mask */
-
-/******************** Bit definition for USB_OTG_DAINT register ********************/
-#define USB_OTG_DAINT_IEPINT_Pos (0U)
-#define USB_OTG_DAINT_IEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DAINT_IEPINT USB_OTG_DAINT_IEPINT_Msk /*!< IN endpoint interrupt bits */
-#define USB_OTG_DAINT_OEPINT_Pos (16U)
-#define USB_OTG_DAINT_OEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_DAINT_OEPINT USB_OTG_DAINT_OEPINT_Msk /*!< OUT endpoint interrupt bits */
-
-/******************** Bit definition for USB_OTG_HAINTMSK register ********************/
-#define USB_OTG_HAINTMSK_HAINTM_Pos (0U)
-#define USB_OTG_HAINTMSK_HAINTM_Msk (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HAINTMSK_HAINTM USB_OTG_HAINTMSK_HAINTM_Msk /*!< Channel interrupt mask */
-
-/******************** Bit definition for USB_OTG_GRXSTSP register ********************/
-#define USB_OTG_GRXSTSP_EPNUM_Pos (0U)
-#define USB_OTG_GRXSTSP_EPNUM_Msk (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */
-#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_Msk /*!< IN EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_BCNT_Pos (4U)
-#define USB_OTG_GRXSTSP_BCNT_Msk (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */
-#define USB_OTG_GRXSTSP_BCNT USB_OTG_GRXSTSP_BCNT_Msk /*!< OUT EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_DPID_Pos (15U)
-#define USB_OTG_GRXSTSP_DPID_Msk (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */
-#define USB_OTG_GRXSTSP_DPID USB_OTG_GRXSTSP_DPID_Msk /*!< OUT EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U)
-#define USB_OTG_GRXSTSP_PKTSTS_Msk (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */
-#define USB_OTG_GRXSTSP_PKTSTS USB_OTG_GRXSTSP_PKTSTS_Msk /*!< OUT EP interrupt mask bits */
-
-/******************** Bit definition for USB_OTG_DAINTMSK register ********************/
-#define USB_OTG_DAINTMSK_IEPM_Pos (0U)
-#define USB_OTG_DAINTMSK_IEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DAINTMSK_IEPM USB_OTG_DAINTMSK_IEPM_Msk /*!< IN EP interrupt mask bits */
-#define USB_OTG_DAINTMSK_OEPM_Pos (16U)
-#define USB_OTG_DAINTMSK_OEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_DAINTMSK_OEPM USB_OTG_DAINTMSK_OEPM_Msk /*!< OUT EP interrupt mask bits */
-
-/******************** Bit definition for USB_OTG_GRXFSIZ register ********************/
-#define USB_OTG_GRXFSIZ_RXFD_Pos (0U)
-#define USB_OTG_GRXFSIZ_RXFD_Msk (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_GRXFSIZ_RXFD USB_OTG_GRXFSIZ_RXFD_Msk /*!< RxFIFO depth */
-
-/******************** Bit definition for USB_OTG_DVBUSDIS register ********************/
-#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U)
-#define USB_OTG_DVBUSDIS_VBUSDT_Msk (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DVBUSDIS_VBUSDT USB_OTG_DVBUSDIS_VBUSDT_Msk /*!< Device VBUS discharge time */
-
-/******************** Bit definition for OTG register ********************/
-#define USB_OTG_NPTXFSA_Pos (0U)
-#define USB_OTG_NPTXFSA_Msk (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_NPTXFSA USB_OTG_NPTXFSA_Msk /*!< Nonperiodic transmit RAM start address */
-#define USB_OTG_NPTXFD_Pos (16U)
-#define USB_OTG_NPTXFD_Msk (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_NPTXFD USB_OTG_NPTXFD_Msk /*!< Nonperiodic TxFIFO depth */
-#define USB_OTG_TX0FSA_Pos (0U)
-#define USB_OTG_TX0FSA_Msk (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_TX0FSA USB_OTG_TX0FSA_Msk /*!< Endpoint 0 transmit RAM start address */
-#define USB_OTG_TX0FD_Pos (16U)
-#define USB_OTG_TX0FD_Msk (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_TX0FD USB_OTG_TX0FD_Msk /*!< Endpoint 0 TxFIFO depth */
-
-/******************** Bit definition forUSB_OTG_DVBUSPULSE register ********************/
-#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U)
-#define USB_OTG_DVBUSPULSE_DVBUSP_Msk (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */
-#define USB_OTG_DVBUSPULSE_DVBUSP USB_OTG_DVBUSPULSE_DVBUSP_Msk /*!< Device VBUS pulsing time */
-
-/******************** Bit definition for USB_OTG_GNPTXSTS register ********************/
-#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U)
-#define USB_OTG_GNPTXSTS_NPTXFSAV_Msk (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_GNPTXSTS_NPTXFSAV USB_OTG_GNPTXSTS_NPTXFSAV_Msk /*!< Nonperiodic TxFIFO space available */
-
-#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U)
-#define USB_OTG_GNPTXSTS_NPTQXSAV_Msk (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV USB_OTG_GNPTXSTS_NPTQXSAV_Msk /*!< Nonperiodic transmit request queue space available */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_0 (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_1 (0x02UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00020000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_2 (0x04UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00040000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_3 (0x08UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00080000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_4 (0x10UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00100000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_5 (0x20UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00200000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_6 (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */
-#define USB_OTG_GNPTXSTS_NPTQXSAV_7 (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */
-
-#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U)
-#define USB_OTG_GNPTXSTS_NPTXQTOP_Msk (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP USB_OTG_GNPTXSTS_NPTXQTOP_Msk /*!< Top of the nonperiodic transmit request queue */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_0 (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_1 (0x02UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x02000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_2 (0x04UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x04000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_3 (0x08UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x08000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_4 (0x10UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x10000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_5 (0x20UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x20000000 */
-#define USB_OTG_GNPTXSTS_NPTXQTOP_6 (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */
-
-/******************** Bit definition for USB_OTG_DTHRCTL register ********************/
-#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U)
-#define USB_OTG_DTHRCTL_NONISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */
-#define USB_OTG_DTHRCTL_NONISOTHREN USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */
-#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U)
-#define USB_OTG_DTHRCTL_ISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */
-#define USB_OTG_DTHRCTL_ISOTHREN USB_OTG_DTHRCTL_ISOTHREN_Msk /*!< ISO IN endpoint threshold enable */
-
-#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U)
-#define USB_OTG_DTHRCTL_TXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */
-#define USB_OTG_DTHRCTL_TXTHRLEN USB_OTG_DTHRCTL_TXTHRLEN_Msk /*!< Transmit threshold length */
-#define USB_OTG_DTHRCTL_TXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_1 (0x002UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000008 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_2 (0x004UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000010 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_3 (0x008UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000020 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_4 (0x010UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000040 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_5 (0x020UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000080 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */
-#define USB_OTG_DTHRCTL_TXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */
-#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U)
-#define USB_OTG_DTHRCTL_RXTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */
-#define USB_OTG_DTHRCTL_RXTHREN USB_OTG_DTHRCTL_RXTHREN_Msk /*!< Receive threshold enable */
-
-#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U)
-#define USB_OTG_DTHRCTL_RXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN USB_OTG_DTHRCTL_RXTHRLEN_Msk /*!< Receive threshold length */
-#define USB_OTG_DTHRCTL_RXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_1 (0x002UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00040000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_2 (0x004UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00080000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_3 (0x008UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00100000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_4 (0x010UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00200000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_5 (0x020UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00400000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */
-#define USB_OTG_DTHRCTL_RXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */
-#define USB_OTG_DTHRCTL_ARPEN_Pos (27U)
-#define USB_OTG_DTHRCTL_ARPEN_Msk (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */
-#define USB_OTG_DTHRCTL_ARPEN USB_OTG_DTHRCTL_ARPEN_Msk /*!< Arbiter parking enable */
-
-/******************** Bit definition for USB_OTG_DIEPEMPMSK register ********************/
-#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U)
-#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DIEPEMPMSK_INEPTXFEM USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */
-
-/******************** Bit definition for USB_OTG_DEACHINT register ********************/
-#define USB_OTG_DEACHINT_IEP1INT_Pos (1U)
-#define USB_OTG_DEACHINT_IEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */
-#define USB_OTG_DEACHINT_IEP1INT USB_OTG_DEACHINT_IEP1INT_Msk /*!< IN endpoint 1interrupt bit */
-#define USB_OTG_DEACHINT_OEP1INT_Pos (17U)
-#define USB_OTG_DEACHINT_OEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */
-#define USB_OTG_DEACHINT_OEP1INT USB_OTG_DEACHINT_OEP1INT_Msk /*!< OUT endpoint 1 interrupt bit */
-
-/******************** Bit definition for USB_OTG_GCCFG register ********************/
-#define USB_OTG_GCCFG_PWRDWN_Pos (16U)
-#define USB_OTG_GCCFG_PWRDWN_Msk (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */
-#define USB_OTG_GCCFG_PWRDWN USB_OTG_GCCFG_PWRDWN_Msk /*!< Power down */
-#define USB_OTG_GCCFG_I2CPADEN_Pos (17U)
-#define USB_OTG_GCCFG_I2CPADEN_Msk (0x1UL << USB_OTG_GCCFG_I2CPADEN_Pos) /*!< 0x00020000 */
-#define USB_OTG_GCCFG_I2CPADEN USB_OTG_GCCFG_I2CPADEN_Msk /*!< Enable I2C bus connection for the external I2C PHY interface*/
-#define USB_OTG_GCCFG_VBUSASEN_Pos (18U)
-#define USB_OTG_GCCFG_VBUSASEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */
-#define USB_OTG_GCCFG_VBUSASEN USB_OTG_GCCFG_VBUSASEN_Msk /*!< Enable the VBUS sensing device */
-#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U)
-#define USB_OTG_GCCFG_VBUSBSEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */
-#define USB_OTG_GCCFG_VBUSBSEN USB_OTG_GCCFG_VBUSBSEN_Msk /*!< Enable the VBUS sensing device */
-#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U)
-#define USB_OTG_GCCFG_SOFOUTEN_Msk (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */
-#define USB_OTG_GCCFG_SOFOUTEN USB_OTG_GCCFG_SOFOUTEN_Msk /*!< SOF output enable */
-#define USB_OTG_GCCFG_NOVBUSSENS_Pos (21U)
-#define USB_OTG_GCCFG_NOVBUSSENS_Msk (0x1UL << USB_OTG_GCCFG_NOVBUSSENS_Pos) /*!< 0x00200000 */
-#define USB_OTG_GCCFG_NOVBUSSENS USB_OTG_GCCFG_NOVBUSSENS_Msk /*!< VBUS sensing disable option*/
-
-/******************** Bit definition forUSB_OTG_DEACHINTMSK register ********************/
-#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U)
-#define USB_OTG_DEACHINTMSK_IEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */
-#define USB_OTG_DEACHINTMSK_IEP1INTM USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */
-#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U)
-#define USB_OTG_DEACHINTMSK_OEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */
-#define USB_OTG_DEACHINTMSK_OEP1INTM USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */
-
-/******************** Bit definition for USB_OTG_CID register ********************/
-#define USB_OTG_CID_PRODUCT_ID_Pos (0U)
-#define USB_OTG_CID_PRODUCT_ID_Msk (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */
-#define USB_OTG_CID_PRODUCT_ID USB_OTG_CID_PRODUCT_ID_Msk /*!< Product ID field */
-
-/******************** Bit definition for USB_OTG_DIEPEACHMSK1 register ********************/
-#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U)
-#define USB_OTG_DIEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
-#define USB_OTG_DIEPEACHMSK1_XFRCM USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U)
-#define USB_OTG_DIEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
-#define USB_OTG_DIEPEACHMSK1_EPDM USB_OTG_DIEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U)
-#define USB_OTG_DIEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
-#define USB_OTG_DIEPEACHMSK1_TOM USB_OTG_DIEPEACHMSK1_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */
-#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U)
-#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
-#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U)
-#define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
-#define USB_OTG_DIEPEACHMSK1_INEPNMM USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U)
-#define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
-#define USB_OTG_DIEPEACHMSK1_INEPNEM USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U)
-#define USB_OTG_DIEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
-#define USB_OTG_DIEPEACHMSK1_TXFURM USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */
-#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U)
-#define USB_OTG_DIEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
-#define USB_OTG_DIEPEACHMSK1_BIM USB_OTG_DIEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U)
-#define USB_OTG_DIEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
-#define USB_OTG_DIEPEACHMSK1_NAKM USB_OTG_DIEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */
-
-/******************** Bit definition for USB_OTG_HPRT register ********************/
-#define USB_OTG_HPRT_PCSTS_Pos (0U)
-#define USB_OTG_HPRT_PCSTS_Msk (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */
-#define USB_OTG_HPRT_PCSTS USB_OTG_HPRT_PCSTS_Msk /*!< Port connect status */
-#define USB_OTG_HPRT_PCDET_Pos (1U)
-#define USB_OTG_HPRT_PCDET_Msk (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */
-#define USB_OTG_HPRT_PCDET USB_OTG_HPRT_PCDET_Msk /*!< Port connect detected */
-#define USB_OTG_HPRT_PENA_Pos (2U)
-#define USB_OTG_HPRT_PENA_Msk (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */
-#define USB_OTG_HPRT_PENA USB_OTG_HPRT_PENA_Msk /*!< Port enable */
-#define USB_OTG_HPRT_PENCHNG_Pos (3U)
-#define USB_OTG_HPRT_PENCHNG_Msk (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */
-#define USB_OTG_HPRT_PENCHNG USB_OTG_HPRT_PENCHNG_Msk /*!< Port enable/disable change */
-#define USB_OTG_HPRT_POCA_Pos (4U)
-#define USB_OTG_HPRT_POCA_Msk (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */
-#define USB_OTG_HPRT_POCA USB_OTG_HPRT_POCA_Msk /*!< Port overcurrent active */
-#define USB_OTG_HPRT_POCCHNG_Pos (5U)
-#define USB_OTG_HPRT_POCCHNG_Msk (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */
-#define USB_OTG_HPRT_POCCHNG USB_OTG_HPRT_POCCHNG_Msk /*!< Port overcurrent change */
-#define USB_OTG_HPRT_PRES_Pos (6U)
-#define USB_OTG_HPRT_PRES_Msk (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */
-#define USB_OTG_HPRT_PRES USB_OTG_HPRT_PRES_Msk /*!< Port resume */
-#define USB_OTG_HPRT_PSUSP_Pos (7U)
-#define USB_OTG_HPRT_PSUSP_Msk (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */
-#define USB_OTG_HPRT_PSUSP USB_OTG_HPRT_PSUSP_Msk /*!< Port suspend */
-#define USB_OTG_HPRT_PRST_Pos (8U)
-#define USB_OTG_HPRT_PRST_Msk (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */
-#define USB_OTG_HPRT_PRST USB_OTG_HPRT_PRST_Msk /*!< Port reset */
-
-#define USB_OTG_HPRT_PLSTS_Pos (10U)
-#define USB_OTG_HPRT_PLSTS_Msk (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */
-#define USB_OTG_HPRT_PLSTS USB_OTG_HPRT_PLSTS_Msk /*!< Port line status */
-#define USB_OTG_HPRT_PLSTS_0 (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */
-#define USB_OTG_HPRT_PLSTS_1 (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */
-#define USB_OTG_HPRT_PPWR_Pos (12U)
-#define USB_OTG_HPRT_PPWR_Msk (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */
-#define USB_OTG_HPRT_PPWR USB_OTG_HPRT_PPWR_Msk /*!< Port power */
-
-#define USB_OTG_HPRT_PTCTL_Pos (13U)
-#define USB_OTG_HPRT_PTCTL_Msk (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */
-#define USB_OTG_HPRT_PTCTL USB_OTG_HPRT_PTCTL_Msk /*!< Port test control */
-#define USB_OTG_HPRT_PTCTL_0 (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */
-#define USB_OTG_HPRT_PTCTL_1 (0x2UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00004000 */
-#define USB_OTG_HPRT_PTCTL_2 (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */
-#define USB_OTG_HPRT_PTCTL_3 (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */
-
-#define USB_OTG_HPRT_PSPD_Pos (17U)
-#define USB_OTG_HPRT_PSPD_Msk (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */
-#define USB_OTG_HPRT_PSPD USB_OTG_HPRT_PSPD_Msk /*!< Port speed */
-#define USB_OTG_HPRT_PSPD_0 (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */
-#define USB_OTG_HPRT_PSPD_1 (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */
-
-/******************** Bit definition for USB_OTG_DOEPEACHMSK1 register ********************/
-#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U)
-#define USB_OTG_DOEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
-#define USB_OTG_DOEPEACHMSK1_XFRCM USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U)
-#define USB_OTG_DOEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
-#define USB_OTG_DOEPEACHMSK1_EPDM USB_OTG_DOEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U)
-#define USB_OTG_DOEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
-#define USB_OTG_DOEPEACHMSK1_TOM USB_OTG_DOEPEACHMSK1_TOM_Msk /*!< Timeout condition mask */
-#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U)
-#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
-#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U)
-#define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
-#define USB_OTG_DOEPEACHMSK1_INEPNMM USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U)
-#define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
-#define USB_OTG_DOEPEACHMSK1_INEPNEM USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U)
-#define USB_OTG_DOEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
-#define USB_OTG_DOEPEACHMSK1_TXFURM USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */
-#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U)
-#define USB_OTG_DOEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
-#define USB_OTG_DOEPEACHMSK1_BIM USB_OTG_DOEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U)
-#define USB_OTG_DOEPEACHMSK1_BERRM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */
-#define USB_OTG_DOEPEACHMSK1_BERRM USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U)
-#define USB_OTG_DOEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
-#define USB_OTG_DOEPEACHMSK1_NAKM USB_OTG_DOEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U)
-#define USB_OTG_DOEPEACHMSK1_NYETM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */
-#define USB_OTG_DOEPEACHMSK1_NYETM USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */
-
-/******************** Bit definition for USB_OTG_HPTXFSIZ register ********************/
-#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U)
-#define USB_OTG_HPTXFSIZ_PTXSA_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_HPTXFSIZ_PTXSA USB_OTG_HPTXFSIZ_PTXSA_Msk /*!< Host periodic TxFIFO start address */
-#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U)
-#define USB_OTG_HPTXFSIZ_PTXFD_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFD_Msk /*!< Host periodic TxFIFO depth */
-
-/******************** Bit definition for USB_OTG_DIEPCTL register ********************/
-#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U)
-#define USB_OTG_DIEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
-#define USB_OTG_DIEPCTL_MPSIZ USB_OTG_DIEPCTL_MPSIZ_Msk /*!< Maximum packet size */
-#define USB_OTG_DIEPCTL_USBAEP_Pos (15U)
-#define USB_OTG_DIEPCTL_USBAEP_Msk (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */
-#define USB_OTG_DIEPCTL_USBAEP USB_OTG_DIEPCTL_USBAEP_Msk /*!< USB active endpoint */
-#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U)
-#define USB_OTG_DIEPCTL_EONUM_DPID_Msk (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */
-#define USB_OTG_DIEPCTL_EONUM_DPID USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */
-#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U)
-#define USB_OTG_DIEPCTL_NAKSTS_Msk (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
-#define USB_OTG_DIEPCTL_NAKSTS USB_OTG_DIEPCTL_NAKSTS_Msk /*!< NAK status */
-
-#define USB_OTG_DIEPCTL_EPTYP_Pos (18U)
-#define USB_OTG_DIEPCTL_EPTYP_Msk (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
-#define USB_OTG_DIEPCTL_EPTYP USB_OTG_DIEPCTL_EPTYP_Msk /*!< Endpoint type */
-#define USB_OTG_DIEPCTL_EPTYP_0 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */
-#define USB_OTG_DIEPCTL_EPTYP_1 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */
-#define USB_OTG_DIEPCTL_STALL_Pos (21U)
-#define USB_OTG_DIEPCTL_STALL_Msk (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */
-#define USB_OTG_DIEPCTL_STALL USB_OTG_DIEPCTL_STALL_Msk /*!< STALL handshake */
-
-#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U)
-#define USB_OTG_DIEPCTL_TXFNUM_Msk (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */
-#define USB_OTG_DIEPCTL_TXFNUM USB_OTG_DIEPCTL_TXFNUM_Msk /*!< TxFIFO number */
-#define USB_OTG_DIEPCTL_TXFNUM_0 (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */
-#define USB_OTG_DIEPCTL_TXFNUM_1 (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */
-#define USB_OTG_DIEPCTL_TXFNUM_2 (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */
-#define USB_OTG_DIEPCTL_TXFNUM_3 (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */
-#define USB_OTG_DIEPCTL_CNAK_Pos (26U)
-#define USB_OTG_DIEPCTL_CNAK_Msk (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */
-#define USB_OTG_DIEPCTL_CNAK USB_OTG_DIEPCTL_CNAK_Msk /*!< Clear NAK */
-#define USB_OTG_DIEPCTL_SNAK_Pos (27U)
-#define USB_OTG_DIEPCTL_SNAK_Msk (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */
-#define USB_OTG_DIEPCTL_SNAK USB_OTG_DIEPCTL_SNAK_Msk /*!< Set NAK */
-#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U)
-#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
-#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
-#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U)
-#define USB_OTG_DIEPCTL_SODDFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
-#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SODDFRM_Msk /*!< Set odd frame */
-#define USB_OTG_DIEPCTL_EPDIS_Pos (30U)
-#define USB_OTG_DIEPCTL_EPDIS_Msk (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */
-#define USB_OTG_DIEPCTL_EPDIS USB_OTG_DIEPCTL_EPDIS_Msk /*!< Endpoint disable */
-#define USB_OTG_DIEPCTL_EPENA_Pos (31U)
-#define USB_OTG_DIEPCTL_EPENA_Msk (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */
-#define USB_OTG_DIEPCTL_EPENA USB_OTG_DIEPCTL_EPENA_Msk /*!< Endpoint enable */
-
-/******************** Bit definition for USB_OTG_HCCHAR register ********************/
-#define USB_OTG_HCCHAR_MPSIZ_Pos (0U)
-#define USB_OTG_HCCHAR_MPSIZ_Msk (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */
-#define USB_OTG_HCCHAR_MPSIZ USB_OTG_HCCHAR_MPSIZ_Msk /*!< Maximum packet size */
-
-#define USB_OTG_HCCHAR_EPNUM_Pos (11U)
-#define USB_OTG_HCCHAR_EPNUM_Msk (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */
-#define USB_OTG_HCCHAR_EPNUM USB_OTG_HCCHAR_EPNUM_Msk /*!< Endpoint number */
-#define USB_OTG_HCCHAR_EPNUM_0 (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */
-#define USB_OTG_HCCHAR_EPNUM_1 (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */
-#define USB_OTG_HCCHAR_EPNUM_2 (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */
-#define USB_OTG_HCCHAR_EPNUM_3 (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */
-#define USB_OTG_HCCHAR_EPDIR_Pos (15U)
-#define USB_OTG_HCCHAR_EPDIR_Msk (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */
-#define USB_OTG_HCCHAR_EPDIR USB_OTG_HCCHAR_EPDIR_Msk /*!< Endpoint direction */
-#define USB_OTG_HCCHAR_LSDEV_Pos (17U)
-#define USB_OTG_HCCHAR_LSDEV_Msk (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */
-#define USB_OTG_HCCHAR_LSDEV USB_OTG_HCCHAR_LSDEV_Msk /*!< Low-speed device */
-
-#define USB_OTG_HCCHAR_EPTYP_Pos (18U)
-#define USB_OTG_HCCHAR_EPTYP_Msk (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */
-#define USB_OTG_HCCHAR_EPTYP USB_OTG_HCCHAR_EPTYP_Msk /*!< Endpoint type */
-#define USB_OTG_HCCHAR_EPTYP_0 (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */
-#define USB_OTG_HCCHAR_EPTYP_1 (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */
-
-#define USB_OTG_HCCHAR_MC_Pos (20U)
-#define USB_OTG_HCCHAR_MC_Msk (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */
-#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MC_Msk /*!< Multi Count (MC) / Error Count (EC) */
-#define USB_OTG_HCCHAR_MC_0 (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */
-#define USB_OTG_HCCHAR_MC_1 (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */
-
-#define USB_OTG_HCCHAR_DAD_Pos (22U)
-#define USB_OTG_HCCHAR_DAD_Msk (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */
-#define USB_OTG_HCCHAR_DAD USB_OTG_HCCHAR_DAD_Msk /*!< Device address */
-#define USB_OTG_HCCHAR_DAD_0 (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */
-#define USB_OTG_HCCHAR_DAD_1 (0x02UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00800000 */
-#define USB_OTG_HCCHAR_DAD_2 (0x04UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x01000000 */
-#define USB_OTG_HCCHAR_DAD_3 (0x08UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x02000000 */
-#define USB_OTG_HCCHAR_DAD_4 (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */
-#define USB_OTG_HCCHAR_DAD_5 (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */
-#define USB_OTG_HCCHAR_DAD_6 (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */
-#define USB_OTG_HCCHAR_ODDFRM_Pos (29U)
-#define USB_OTG_HCCHAR_ODDFRM_Msk (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */
-#define USB_OTG_HCCHAR_ODDFRM USB_OTG_HCCHAR_ODDFRM_Msk /*!< Odd frame */
-#define USB_OTG_HCCHAR_CHDIS_Pos (30U)
-#define USB_OTG_HCCHAR_CHDIS_Msk (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */
-#define USB_OTG_HCCHAR_CHDIS USB_OTG_HCCHAR_CHDIS_Msk /*!< Channel disable */
-#define USB_OTG_HCCHAR_CHENA_Pos (31U)
-#define USB_OTG_HCCHAR_CHENA_Msk (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */
-#define USB_OTG_HCCHAR_CHENA USB_OTG_HCCHAR_CHENA_Msk /*!< Channel enable */
-
-/******************** Bit definition for USB_OTG_HCSPLT register ********************/
-
-#define USB_OTG_HCSPLT_PRTADDR_Pos (0U)
-#define USB_OTG_HCSPLT_PRTADDR_Msk (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */
-#define USB_OTG_HCSPLT_PRTADDR USB_OTG_HCSPLT_PRTADDR_Msk /*!< Port address */
-#define USB_OTG_HCSPLT_PRTADDR_0 (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */
-#define USB_OTG_HCSPLT_PRTADDR_1 (0x02UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000002 */
-#define USB_OTG_HCSPLT_PRTADDR_2 (0x04UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000004 */
-#define USB_OTG_HCSPLT_PRTADDR_3 (0x08UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000008 */
-#define USB_OTG_HCSPLT_PRTADDR_4 (0x10UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000010 */
-#define USB_OTG_HCSPLT_PRTADDR_5 (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */
-#define USB_OTG_HCSPLT_PRTADDR_6 (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */
-
-#define USB_OTG_HCSPLT_HUBADDR_Pos (7U)
-#define USB_OTG_HCSPLT_HUBADDR_Msk (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */
-#define USB_OTG_HCSPLT_HUBADDR USB_OTG_HCSPLT_HUBADDR_Msk /*!< Hub address */
-#define USB_OTG_HCSPLT_HUBADDR_0 (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */
-#define USB_OTG_HCSPLT_HUBADDR_1 (0x02UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000100 */
-#define USB_OTG_HCSPLT_HUBADDR_2 (0x04UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000200 */
-#define USB_OTG_HCSPLT_HUBADDR_3 (0x08UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000400 */
-#define USB_OTG_HCSPLT_HUBADDR_4 (0x10UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000800 */
-#define USB_OTG_HCSPLT_HUBADDR_5 (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */
-#define USB_OTG_HCSPLT_HUBADDR_6 (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */
-
-#define USB_OTG_HCSPLT_XACTPOS_Pos (14U)
-#define USB_OTG_HCSPLT_XACTPOS_Msk (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */
-#define USB_OTG_HCSPLT_XACTPOS USB_OTG_HCSPLT_XACTPOS_Msk /*!< XACTPOS */
-#define USB_OTG_HCSPLT_XACTPOS_0 (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */
-#define USB_OTG_HCSPLT_XACTPOS_1 (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */
-#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U)
-#define USB_OTG_HCSPLT_COMPLSPLT_Msk (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */
-#define USB_OTG_HCSPLT_COMPLSPLT USB_OTG_HCSPLT_COMPLSPLT_Msk /*!< Do complete split */
-#define USB_OTG_HCSPLT_SPLITEN_Pos (31U)
-#define USB_OTG_HCSPLT_SPLITEN_Msk (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */
-#define USB_OTG_HCSPLT_SPLITEN USB_OTG_HCSPLT_SPLITEN_Msk /*!< Split enable */
-
-/******************** Bit definition for USB_OTG_HCINT register ********************/
-#define USB_OTG_HCINT_XFRC_Pos (0U)
-#define USB_OTG_HCINT_XFRC_Msk (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */
-#define USB_OTG_HCINT_XFRC USB_OTG_HCINT_XFRC_Msk /*!< Transfer completed */
-#define USB_OTG_HCINT_CHH_Pos (1U)
-#define USB_OTG_HCINT_CHH_Msk (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */
-#define USB_OTG_HCINT_CHH USB_OTG_HCINT_CHH_Msk /*!< Channel halted */
-#define USB_OTG_HCINT_AHBERR_Pos (2U)
-#define USB_OTG_HCINT_AHBERR_Msk (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */
-#define USB_OTG_HCINT_AHBERR USB_OTG_HCINT_AHBERR_Msk /*!< AHB error */
-#define USB_OTG_HCINT_STALL_Pos (3U)
-#define USB_OTG_HCINT_STALL_Msk (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */
-#define USB_OTG_HCINT_STALL USB_OTG_HCINT_STALL_Msk /*!< STALL response received interrupt */
-#define USB_OTG_HCINT_NAK_Pos (4U)
-#define USB_OTG_HCINT_NAK_Msk (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */
-#define USB_OTG_HCINT_NAK USB_OTG_HCINT_NAK_Msk /*!< NAK response received interrupt */
-#define USB_OTG_HCINT_ACK_Pos (5U)
-#define USB_OTG_HCINT_ACK_Msk (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */
-#define USB_OTG_HCINT_ACK USB_OTG_HCINT_ACK_Msk /*!< ACK response received/transmitted interrupt */
-#define USB_OTG_HCINT_NYET_Pos (6U)
-#define USB_OTG_HCINT_NYET_Msk (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */
-#define USB_OTG_HCINT_NYET USB_OTG_HCINT_NYET_Msk /*!< Response received interrupt */
-#define USB_OTG_HCINT_TXERR_Pos (7U)
-#define USB_OTG_HCINT_TXERR_Msk (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */
-#define USB_OTG_HCINT_TXERR USB_OTG_HCINT_TXERR_Msk /*!< Transaction error */
-#define USB_OTG_HCINT_BBERR_Pos (8U)
-#define USB_OTG_HCINT_BBERR_Msk (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */
-#define USB_OTG_HCINT_BBERR USB_OTG_HCINT_BBERR_Msk /*!< Babble error */
-#define USB_OTG_HCINT_FRMOR_Pos (9U)
-#define USB_OTG_HCINT_FRMOR_Msk (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */
-#define USB_OTG_HCINT_FRMOR USB_OTG_HCINT_FRMOR_Msk /*!< Frame overrun */
-#define USB_OTG_HCINT_DTERR_Pos (10U)
-#define USB_OTG_HCINT_DTERR_Msk (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */
-#define USB_OTG_HCINT_DTERR USB_OTG_HCINT_DTERR_Msk /*!< Data toggle error */
-
-/******************** Bit definition for USB_OTG_DIEPINT register ********************/
-#define USB_OTG_DIEPINT_XFRC_Pos (0U)
-#define USB_OTG_DIEPINT_XFRC_Msk (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */
-#define USB_OTG_DIEPINT_XFRC USB_OTG_DIEPINT_XFRC_Msk /*!< Transfer completed interrupt */
-#define USB_OTG_DIEPINT_EPDISD_Pos (1U)
-#define USB_OTG_DIEPINT_EPDISD_Msk (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */
-#define USB_OTG_DIEPINT_EPDISD USB_OTG_DIEPINT_EPDISD_Msk /*!< Endpoint disabled interrupt */
-#define USB_OTG_DIEPINT_AHBERR_Pos (2U)
-#define USB_OTG_DIEPINT_AHBERR_Msk (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */
-#define USB_OTG_DIEPINT_AHBERR USB_OTG_DIEPINT_AHBERR_Msk /*!< AHB Error (AHBErr) during an IN transaction */
-#define USB_OTG_DIEPINT_TOC_Pos (3U)
-#define USB_OTG_DIEPINT_TOC_Msk (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */
-#define USB_OTG_DIEPINT_TOC USB_OTG_DIEPINT_TOC_Msk /*!< Timeout condition */
-#define USB_OTG_DIEPINT_ITTXFE_Pos (4U)
-#define USB_OTG_DIEPINT_ITTXFE_Msk (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */
-#define USB_OTG_DIEPINT_ITTXFE USB_OTG_DIEPINT_ITTXFE_Msk /*!< IN token received when TxFIFO is empty */
-#define USB_OTG_DIEPINT_INEPNM_Pos (5U)
-#define USB_OTG_DIEPINT_INEPNM_Msk (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */
-#define USB_OTG_DIEPINT_INEPNM USB_OTG_DIEPINT_INEPNM_Msk /*!< IN token received with EP mismatch */
-#define USB_OTG_DIEPINT_INEPNE_Pos (6U)
-#define USB_OTG_DIEPINT_INEPNE_Msk (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */
-#define USB_OTG_DIEPINT_INEPNE USB_OTG_DIEPINT_INEPNE_Msk /*!< IN endpoint NAK effective */
-#define USB_OTG_DIEPINT_TXFE_Pos (7U)
-#define USB_OTG_DIEPINT_TXFE_Msk (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */
-#define USB_OTG_DIEPINT_TXFE USB_OTG_DIEPINT_TXFE_Msk /*!< Transmit FIFO empty */
-#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U)
-#define USB_OTG_DIEPINT_TXFIFOUDRN_Msk (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */
-#define USB_OTG_DIEPINT_TXFIFOUDRN USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */
-#define USB_OTG_DIEPINT_BNA_Pos (9U)
-#define USB_OTG_DIEPINT_BNA_Msk (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */
-#define USB_OTG_DIEPINT_BNA USB_OTG_DIEPINT_BNA_Msk /*!< Buffer not available interrupt */
-#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U)
-#define USB_OTG_DIEPINT_PKTDRPSTS_Msk (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */
-#define USB_OTG_DIEPINT_PKTDRPSTS USB_OTG_DIEPINT_PKTDRPSTS_Msk /*!< Packet dropped status */
-#define USB_OTG_DIEPINT_BERR_Pos (12U)
-#define USB_OTG_DIEPINT_BERR_Msk (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */
-#define USB_OTG_DIEPINT_BERR USB_OTG_DIEPINT_BERR_Msk /*!< Babble error interrupt */
-#define USB_OTG_DIEPINT_NAK_Pos (13U)
-#define USB_OTG_DIEPINT_NAK_Msk (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */
-#define USB_OTG_DIEPINT_NAK USB_OTG_DIEPINT_NAK_Msk /*!< NAK interrupt */
-
-/******************** Bit definition forUSB_OTG_HCINTMSK register ********************/
-#define USB_OTG_HCINTMSK_XFRCM_Pos (0U)
-#define USB_OTG_HCINTMSK_XFRCM_Msk (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */
-#define USB_OTG_HCINTMSK_XFRCM USB_OTG_HCINTMSK_XFRCM_Msk /*!< Transfer completed mask */
-#define USB_OTG_HCINTMSK_CHHM_Pos (1U)
-#define USB_OTG_HCINTMSK_CHHM_Msk (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */
-#define USB_OTG_HCINTMSK_CHHM USB_OTG_HCINTMSK_CHHM_Msk /*!< Channel halted mask */
-#define USB_OTG_HCINTMSK_AHBERR_Pos (2U)
-#define USB_OTG_HCINTMSK_AHBERR_Msk (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */
-#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERR_Msk /*!< AHB error */
-#define USB_OTG_HCINTMSK_STALLM_Pos (3U)
-#define USB_OTG_HCINTMSK_STALLM_Msk (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */
-#define USB_OTG_HCINTMSK_STALLM USB_OTG_HCINTMSK_STALLM_Msk /*!< STALL response received interrupt mask */
-#define USB_OTG_HCINTMSK_NAKM_Pos (4U)
-#define USB_OTG_HCINTMSK_NAKM_Msk (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */
-#define USB_OTG_HCINTMSK_NAKM USB_OTG_HCINTMSK_NAKM_Msk /*!< NAK response received interrupt mask */
-#define USB_OTG_HCINTMSK_ACKM_Pos (5U)
-#define USB_OTG_HCINTMSK_ACKM_Msk (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */
-#define USB_OTG_HCINTMSK_ACKM USB_OTG_HCINTMSK_ACKM_Msk /*!< ACK response received/transmitted interrupt mask */
-#define USB_OTG_HCINTMSK_NYET_Pos (6U)
-#define USB_OTG_HCINTMSK_NYET_Msk (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */
-#define USB_OTG_HCINTMSK_NYET USB_OTG_HCINTMSK_NYET_Msk /*!< response received interrupt mask */
-#define USB_OTG_HCINTMSK_TXERRM_Pos (7U)
-#define USB_OTG_HCINTMSK_TXERRM_Msk (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */
-#define USB_OTG_HCINTMSK_TXERRM USB_OTG_HCINTMSK_TXERRM_Msk /*!< Transaction error mask */
-#define USB_OTG_HCINTMSK_BBERRM_Pos (8U)
-#define USB_OTG_HCINTMSK_BBERRM_Msk (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */
-#define USB_OTG_HCINTMSK_BBERRM USB_OTG_HCINTMSK_BBERRM_Msk /*!< Babble error mask */
-#define USB_OTG_HCINTMSK_FRMORM_Pos (9U)
-#define USB_OTG_HCINTMSK_FRMORM_Msk (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */
-#define USB_OTG_HCINTMSK_FRMORM USB_OTG_HCINTMSK_FRMORM_Msk /*!< Frame overrun mask */
-#define USB_OTG_HCINTMSK_DTERRM_Pos (10U)
-#define USB_OTG_HCINTMSK_DTERRM_Msk (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */
-#define USB_OTG_HCINTMSK_DTERRM USB_OTG_HCINTMSK_DTERRM_Msk /*!< Data toggle error mask */
-
-/******************** Bit definition for USB_OTG_DIEPTSIZ register ********************/
-
-#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U)
-#define USB_OTG_DIEPTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
-#define USB_OTG_DIEPTSIZ_XFRSIZ USB_OTG_DIEPTSIZ_XFRSIZ_Msk /*!< Transfer size */
-#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U)
-#define USB_OTG_DIEPTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
-#define USB_OTG_DIEPTSIZ_PKTCNT USB_OTG_DIEPTSIZ_PKTCNT_Msk /*!< Packet count */
-#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U)
-#define USB_OTG_DIEPTSIZ_MULCNT_Msk (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */
-#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MULCNT_Msk /*!< Packet count */
-/******************** Bit definition for USB_OTG_HCTSIZ register ********************/
-#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U)
-#define USB_OTG_HCTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
-#define USB_OTG_HCTSIZ_XFRSIZ USB_OTG_HCTSIZ_XFRSIZ_Msk /*!< Transfer size */
-#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U)
-#define USB_OTG_HCTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
-#define USB_OTG_HCTSIZ_PKTCNT USB_OTG_HCTSIZ_PKTCNT_Msk /*!< Packet count */
-#define USB_OTG_HCTSIZ_DOPING_Pos (31U)
-#define USB_OTG_HCTSIZ_DOPING_Msk (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */
-#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPING_Msk /*!< Do PING */
-#define USB_OTG_HCTSIZ_DPID_Pos (29U)
-#define USB_OTG_HCTSIZ_DPID_Msk (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */
-#define USB_OTG_HCTSIZ_DPID USB_OTG_HCTSIZ_DPID_Msk /*!< Data PID */
-#define USB_OTG_HCTSIZ_DPID_0 (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */
-#define USB_OTG_HCTSIZ_DPID_1 (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */
-
-/******************** Bit definition for USB_OTG_DIEPDMA register ********************/
-#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U)
-#define USB_OTG_DIEPDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
-#define USB_OTG_DIEPDMA_DMAADDR USB_OTG_DIEPDMA_DMAADDR_Msk /*!< DMA address */
-
-/******************** Bit definition for USB_OTG_HCDMA register ********************/
-#define USB_OTG_HCDMA_DMAADDR_Pos (0U)
-#define USB_OTG_HCDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
-#define USB_OTG_HCDMA_DMAADDR USB_OTG_HCDMA_DMAADDR_Msk /*!< DMA address */
-
-/******************** Bit definition for USB_OTG_DTXFSTS register ********************/
-#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U)
-#define USB_OTG_DTXFSTS_INEPTFSAV_Msk (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DTXFSTS_INEPTFSAV USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */
-
-/******************** Bit definition for USB_OTG_DIEPTXF register ********************/
-#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U)
-#define USB_OTG_DIEPTXF_INEPTXSA_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */
-#define USB_OTG_DIEPTXF_INEPTXSA USB_OTG_DIEPTXF_INEPTXSA_Msk /*!< IN endpoint FIFOx transmit RAM start address */
-#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U)
-#define USB_OTG_DIEPTXF_INEPTXFD_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */
-#define USB_OTG_DIEPTXF_INEPTXFD USB_OTG_DIEPTXF_INEPTXFD_Msk /*!< IN endpoint TxFIFO depth */
-
-/******************** Bit definition for USB_OTG_DOEPCTL register ********************/
-
-#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U)
-#define USB_OTG_DOEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
-#define USB_OTG_DOEPCTL_MPSIZ USB_OTG_DOEPCTL_MPSIZ_Msk /*!< Maximum packet size */ /*!<Bit 1 */
-#define USB_OTG_DOEPCTL_USBAEP_Pos (15U)
-#define USB_OTG_DOEPCTL_USBAEP_Msk (0x1UL << USB_OTG_DOEPCTL_USBAEP_Pos) /*!< 0x00008000 */
-#define USB_OTG_DOEPCTL_USBAEP USB_OTG_DOEPCTL_USBAEP_Msk /*!< USB active endpoint */
-#define USB_OTG_DOEPCTL_NAKSTS_Pos (17U)
-#define USB_OTG_DOEPCTL_NAKSTS_Msk (0x1UL << USB_OTG_DOEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
-#define USB_OTG_DOEPCTL_NAKSTS USB_OTG_DOEPCTL_NAKSTS_Msk /*!< NAK status */
-#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos (28U)
-#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk (0x1UL << USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
-#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
-#define USB_OTG_DOEPCTL_SODDFRM_Pos (29U)
-#define USB_OTG_DOEPCTL_SODDFRM_Msk (0x1UL << USB_OTG_DOEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
-#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SODDFRM_Msk /*!< Set odd frame */
-#define USB_OTG_DOEPCTL_EPTYP_Pos (18U)
-#define USB_OTG_DOEPCTL_EPTYP_Msk (0x3UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
-#define USB_OTG_DOEPCTL_EPTYP USB_OTG_DOEPCTL_EPTYP_Msk /*!< Endpoint type */
-#define USB_OTG_DOEPCTL_EPTYP_0 (0x1UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00040000 */
-#define USB_OTG_DOEPCTL_EPTYP_1 (0x2UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00080000 */
-#define USB_OTG_DOEPCTL_SNPM_Pos (20U)
-#define USB_OTG_DOEPCTL_SNPM_Msk (0x1UL << USB_OTG_DOEPCTL_SNPM_Pos) /*!< 0x00100000 */
-#define USB_OTG_DOEPCTL_SNPM USB_OTG_DOEPCTL_SNPM_Msk /*!< Snoop mode */
-#define USB_OTG_DOEPCTL_STALL_Pos (21U)
-#define USB_OTG_DOEPCTL_STALL_Msk (0x1UL << USB_OTG_DOEPCTL_STALL_Pos) /*!< 0x00200000 */
-#define USB_OTG_DOEPCTL_STALL USB_OTG_DOEPCTL_STALL_Msk /*!< STALL handshake */
-#define USB_OTG_DOEPCTL_CNAK_Pos (26U)
-#define USB_OTG_DOEPCTL_CNAK_Msk (0x1UL << USB_OTG_DOEPCTL_CNAK_Pos) /*!< 0x04000000 */
-#define USB_OTG_DOEPCTL_CNAK USB_OTG_DOEPCTL_CNAK_Msk /*!< Clear NAK */
-#define USB_OTG_DOEPCTL_SNAK_Pos (27U)
-#define USB_OTG_DOEPCTL_SNAK_Msk (0x1UL << USB_OTG_DOEPCTL_SNAK_Pos) /*!< 0x08000000 */
-#define USB_OTG_DOEPCTL_SNAK USB_OTG_DOEPCTL_SNAK_Msk /*!< Set NAK */
-#define USB_OTG_DOEPCTL_EPDIS_Pos (30U)
-#define USB_OTG_DOEPCTL_EPDIS_Msk (0x1UL << USB_OTG_DOEPCTL_EPDIS_Pos) /*!< 0x40000000 */
-#define USB_OTG_DOEPCTL_EPDIS USB_OTG_DOEPCTL_EPDIS_Msk /*!< Endpoint disable */
-#define USB_OTG_DOEPCTL_EPENA_Pos (31U)
-#define USB_OTG_DOEPCTL_EPENA_Msk (0x1UL << USB_OTG_DOEPCTL_EPENA_Pos) /*!< 0x80000000 */
-#define USB_OTG_DOEPCTL_EPENA USB_OTG_DOEPCTL_EPENA_Msk /*!< Endpoint enable */
-
-/******************** Bit definition for USB_OTG_DOEPINT register ********************/
-#define USB_OTG_DOEPINT_XFRC_Pos (0U)
-#define USB_OTG_DOEPINT_XFRC_Msk (0x1UL << USB_OTG_DOEPINT_XFRC_Pos) /*!< 0x00000001 */
-#define USB_OTG_DOEPINT_XFRC USB_OTG_DOEPINT_XFRC_Msk /*!< Transfer completed interrupt */
-#define USB_OTG_DOEPINT_EPDISD_Pos (1U)
-#define USB_OTG_DOEPINT_EPDISD_Msk (0x1UL << USB_OTG_DOEPINT_EPDISD_Pos) /*!< 0x00000002 */
-#define USB_OTG_DOEPINT_EPDISD USB_OTG_DOEPINT_EPDISD_Msk /*!< Endpoint disabled interrupt */
-#define USB_OTG_DOEPINT_AHBERR_Pos (2U)
-#define USB_OTG_DOEPINT_AHBERR_Msk (0x1UL << USB_OTG_DOEPINT_AHBERR_Pos) /*!< 0x00000004 */
-#define USB_OTG_DOEPINT_AHBERR USB_OTG_DOEPINT_AHBERR_Msk /*!< AHB Error (AHBErr) during an OUT transaction */
-#define USB_OTG_DOEPINT_STUP_Pos (3U)
-#define USB_OTG_DOEPINT_STUP_Msk (0x1UL << USB_OTG_DOEPINT_STUP_Pos) /*!< 0x00000008 */
-#define USB_OTG_DOEPINT_STUP USB_OTG_DOEPINT_STUP_Msk /*!< SETUP phase done */
-#define USB_OTG_DOEPINT_OTEPDIS_Pos (4U)
-#define USB_OTG_DOEPINT_OTEPDIS_Msk (0x1UL << USB_OTG_DOEPINT_OTEPDIS_Pos) /*!< 0x00000010 */
-#define USB_OTG_DOEPINT_OTEPDIS USB_OTG_DOEPINT_OTEPDIS_Msk /*!< OUT token received when endpoint disabled */
-#define USB_OTG_DOEPINT_OTEPSPR_Pos (5U)
-#define USB_OTG_DOEPINT_OTEPSPR_Msk (0x1UL << USB_OTG_DOEPINT_OTEPSPR_Pos) /*!< 0x00000020 */
-#define USB_OTG_DOEPINT_OTEPSPR USB_OTG_DOEPINT_OTEPSPR_Msk /*!< Status Phase Received For Control Write */
-#define USB_OTG_DOEPINT_B2BSTUP_Pos (6U)
-#define USB_OTG_DOEPINT_B2BSTUP_Msk (0x1UL << USB_OTG_DOEPINT_B2BSTUP_Pos) /*!< 0x00000040 */
-#define USB_OTG_DOEPINT_B2BSTUP USB_OTG_DOEPINT_B2BSTUP_Msk /*!< Back-to-back SETUP packets received */
-#define USB_OTG_DOEPINT_OUTPKTERR_Pos (8U)
-#define USB_OTG_DOEPINT_OUTPKTERR_Msk (0x1UL << USB_OTG_DOEPINT_OUTPKTERR_Pos) /*!< 0x00000100 */
-#define USB_OTG_DOEPINT_OUTPKTERR USB_OTG_DOEPINT_OUTPKTERR_Msk /*!< OUT packet error */
-#define USB_OTG_DOEPINT_NAK_Pos (13U)
-#define USB_OTG_DOEPINT_NAK_Msk (0x1UL << USB_OTG_DOEPINT_NAK_Pos) /*!< 0x00002000 */
-#define USB_OTG_DOEPINT_NAK USB_OTG_DOEPINT_NAK_Msk /*!< NAK Packet is transmitted by the device */
-#define USB_OTG_DOEPINT_NYET_Pos (14U)
-#define USB_OTG_DOEPINT_NYET_Msk (0x1UL << USB_OTG_DOEPINT_NYET_Pos) /*!< 0x00004000 */
-#define USB_OTG_DOEPINT_NYET USB_OTG_DOEPINT_NYET_Msk /*!< NYET interrupt */
-#define USB_OTG_DOEPINT_STPKTRX_Pos (15U)
-#define USB_OTG_DOEPINT_STPKTRX_Msk (0x1UL << USB_OTG_DOEPINT_STPKTRX_Pos) /*!< 0x00008000 */
-#define USB_OTG_DOEPINT_STPKTRX USB_OTG_DOEPINT_STPKTRX_Msk /*!< Setup Packet Received */
-/******************** Bit definition for USB_OTG_DOEPTSIZ register ********************/
-
-#define USB_OTG_DOEPTSIZ_XFRSIZ_Pos (0U)
-#define USB_OTG_DOEPTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_DOEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
-#define USB_OTG_DOEPTSIZ_XFRSIZ USB_OTG_DOEPTSIZ_XFRSIZ_Msk /*!< Transfer size */
-#define USB_OTG_DOEPTSIZ_PKTCNT_Pos (19U)
-#define USB_OTG_DOEPTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_DOEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
-#define USB_OTG_DOEPTSIZ_PKTCNT USB_OTG_DOEPTSIZ_PKTCNT_Msk /*!< Packet count */
-
-#define USB_OTG_DOEPTSIZ_STUPCNT_Pos (29U)
-#define USB_OTG_DOEPTSIZ_STUPCNT_Msk (0x3UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x60000000 */
-#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_STUPCNT_Msk /*!< SETUP packet count */
-#define USB_OTG_DOEPTSIZ_STUPCNT_0 (0x1UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x20000000 */
-#define USB_OTG_DOEPTSIZ_STUPCNT_1 (0x2UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x40000000 */
-
-/******************** Bit definition for PCGCCTL register ********************/
-#define USB_OTG_PCGCCTL_STOPCLK_Pos (0U)
-#define USB_OTG_PCGCCTL_STOPCLK_Msk (0x1UL << USB_OTG_PCGCCTL_STOPCLK_Pos) /*!< 0x00000001 */
-#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STOPCLK_Msk /*!< SETUP packet count */
-#define USB_OTG_PCGCCTL_GATECLK_Pos (1U)
-#define USB_OTG_PCGCCTL_GATECLK_Msk (0x1UL << USB_OTG_PCGCCTL_GATECLK_Pos) /*!< 0x00000002 */
-#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATECLK_Msk /*!<Bit 0 */
-#define USB_OTG_PCGCCTL_PHYSUSP_Pos (4U)
-#define USB_OTG_PCGCCTL_PHYSUSP_Msk (0x1UL << USB_OTG_PCGCCTL_PHYSUSP_Pos) /*!< 0x00000010 */
-#define USB_OTG_PCGCCTL_PHYSUSP USB_OTG_PCGCCTL_PHYSUSP_Msk /*!<Bit 1 */
-
-/* Legacy define */
-/******************** Bit definition for OTG register ********************/
-#define USB_OTG_CHNUM_Pos (0U)
-#define USB_OTG_CHNUM_Msk (0xFUL << USB_OTG_CHNUM_Pos) /*!< 0x0000000F */
-#define USB_OTG_CHNUM USB_OTG_CHNUM_Msk /*!< Channel number */
-#define USB_OTG_CHNUM_0 (0x1UL << USB_OTG_CHNUM_Pos) /*!< 0x00000001 */
-#define USB_OTG_CHNUM_1 (0x2UL << USB_OTG_CHNUM_Pos) /*!< 0x00000002 */
-#define USB_OTG_CHNUM_2 (0x4UL << USB_OTG_CHNUM_Pos) /*!< 0x00000004 */
-#define USB_OTG_CHNUM_3 (0x8UL << USB_OTG_CHNUM_Pos) /*!< 0x00000008 */
-#define USB_OTG_BCNT_Pos (4U)
-#define USB_OTG_BCNT_Msk (0x7FFUL << USB_OTG_BCNT_Pos) /*!< 0x00007FF0 */
-#define USB_OTG_BCNT USB_OTG_BCNT_Msk /*!< Byte count */
-
-#define USB_OTG_DPID_Pos (15U)
-#define USB_OTG_DPID_Msk (0x3UL << USB_OTG_DPID_Pos) /*!< 0x00018000 */
-#define USB_OTG_DPID USB_OTG_DPID_Msk /*!< Data PID */
-#define USB_OTG_DPID_0 (0x1UL << USB_OTG_DPID_Pos) /*!< 0x00008000 */
-#define USB_OTG_DPID_1 (0x2UL << USB_OTG_DPID_Pos) /*!< 0x00010000 */
-
-#define USB_OTG_PKTSTS_Pos (17U)
-#define USB_OTG_PKTSTS_Msk (0xFUL << USB_OTG_PKTSTS_Pos) /*!< 0x001E0000 */
-#define USB_OTG_PKTSTS USB_OTG_PKTSTS_Msk /*!< Packet status */
-#define USB_OTG_PKTSTS_0 (0x1UL << USB_OTG_PKTSTS_Pos) /*!< 0x00020000 */
-#define USB_OTG_PKTSTS_1 (0x2UL << USB_OTG_PKTSTS_Pos) /*!< 0x00040000 */
-#define USB_OTG_PKTSTS_2 (0x4UL << USB_OTG_PKTSTS_Pos) /*!< 0x00080000 */
-#define USB_OTG_PKTSTS_3 (0x8UL << USB_OTG_PKTSTS_Pos) /*!< 0x00100000 */
-
-#define USB_OTG_EPNUM_Pos (0U)
-#define USB_OTG_EPNUM_Msk (0xFUL << USB_OTG_EPNUM_Pos) /*!< 0x0000000F */
-#define USB_OTG_EPNUM USB_OTG_EPNUM_Msk /*!< Endpoint number */
-#define USB_OTG_EPNUM_0 (0x1UL << USB_OTG_EPNUM_Pos) /*!< 0x00000001 */
-#define USB_OTG_EPNUM_1 (0x2UL << USB_OTG_EPNUM_Pos) /*!< 0x00000002 */
-#define USB_OTG_EPNUM_2 (0x4UL << USB_OTG_EPNUM_Pos) /*!< 0x00000004 */
-#define USB_OTG_EPNUM_3 (0x8UL << USB_OTG_EPNUM_Pos) /*!< 0x00000008 */
-
-#define USB_OTG_FRMNUM_Pos (21U)
-#define USB_OTG_FRMNUM_Msk (0xFUL << USB_OTG_FRMNUM_Pos) /*!< 0x01E00000 */
-#define USB_OTG_FRMNUM USB_OTG_FRMNUM_Msk /*!< Frame number */
-#define USB_OTG_FRMNUM_0 (0x1UL << USB_OTG_FRMNUM_Pos) /*!< 0x00200000 */
-#define USB_OTG_FRMNUM_1 (0x2UL << USB_OTG_FRMNUM_Pos) /*!< 0x00400000 */
-#define USB_OTG_FRMNUM_2 (0x4UL << USB_OTG_FRMNUM_Pos) /*!< 0x00800000 */
-#define USB_OTG_FRMNUM_3 (0x8UL << USB_OTG_FRMNUM_Pos) /*!< 0x01000000 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @addtogroup Exported_macros
- * @{
- */
-
-/******************************* ADC Instances ********************************/
-#define IS_ADC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == ADC1)
-
-#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC1_COMMON)
-/******************************* CRC Instances ********************************/
-#define IS_CRC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CRC)
-
-
-/******************************** DMA Instances *******************************/
-#define IS_DMA_STREAM_ALL_INSTANCE(INSTANCE) (((INSTANCE) == DMA1_Stream0) || \
- ((INSTANCE) == DMA1_Stream1) || \
- ((INSTANCE) == DMA1_Stream2) || \
- ((INSTANCE) == DMA1_Stream3) || \
- ((INSTANCE) == DMA1_Stream4) || \
- ((INSTANCE) == DMA1_Stream5) || \
- ((INSTANCE) == DMA1_Stream6) || \
- ((INSTANCE) == DMA1_Stream7) || \
- ((INSTANCE) == DMA2_Stream0) || \
- ((INSTANCE) == DMA2_Stream1) || \
- ((INSTANCE) == DMA2_Stream2) || \
- ((INSTANCE) == DMA2_Stream3) || \
- ((INSTANCE) == DMA2_Stream4) || \
- ((INSTANCE) == DMA2_Stream5) || \
- ((INSTANCE) == DMA2_Stream6) || \
- ((INSTANCE) == DMA2_Stream7))
-
-/******************************* GPIO Instances *******************************/
-#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
- ((INSTANCE) == GPIOB) || \
- ((INSTANCE) == GPIOC) || \
- ((INSTANCE) == GPIOD) || \
- ((INSTANCE) == GPIOE) || \
- ((INSTANCE) == GPIOH))
-
-/******************************** I2C Instances *******************************/
-#define IS_I2C_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
- ((INSTANCE) == I2C2) || \
- ((INSTANCE) == I2C3))
-
-/******************************* SMBUS Instances ******************************/
-#define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE
-
-/******************************** I2S Instances *******************************/
-
-#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI2) || \
- ((INSTANCE) == SPI3))
-
-/*************************** I2S Extended Instances ***************************/
-#define IS_I2S_EXT_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2S2ext)|| \
- ((INSTANCE) == I2S3ext))
-/* Legacy Defines */
-#define IS_I2S_ALL_INSTANCE_EXT IS_I2S_EXT_ALL_INSTANCE
-
-
-/****************************** RTC Instances *********************************/
-#define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC)
-
-
-/******************************** SPI Instances *******************************/
-#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
- ((INSTANCE) == SPI2) || \
- ((INSTANCE) == SPI3) || \
- ((INSTANCE) == SPI4))
-
-
-/****************** TIM Instances : All supported instances *******************/
-#define IS_TIM_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9) || \
- ((INSTANCE) == TIM10) || \
- ((INSTANCE) == TIM11))
-
-
-/************* TIM Instances : at least 1 capture/compare channel *************/
-#define IS_TIM_CC1_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9) || \
- ((INSTANCE) == TIM10) || \
- ((INSTANCE) == TIM11))
-
-/************ TIM Instances : at least 2 capture/compare channels *************/
-#define IS_TIM_CC2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-
-/************ TIM Instances : at least 3 capture/compare channels *************/
-#define IS_TIM_CC3_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/************ TIM Instances : at least 4 capture/compare channels *************/
-#define IS_TIM_CC4_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/******************** TIM Instances : Advanced-control timers *****************/
-#define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1)
-
-/******************* TIM Instances : Timer input XOR function *****************/
-#define IS_TIM_XOR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****************** TIM Instances : DMA requests generation (UDE) *************/
-#define IS_TIM_DMA_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/************ TIM Instances : DMA requests generation (CCxDE) *****************/
-#define IS_TIM_DMA_CC_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/************ TIM Instances : DMA requests generation (COMDE) *****************/
-#define IS_TIM_CCDMA_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/******************** TIM Instances : DMA burst feature ***********************/
-#define IS_TIM_DMABURST_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****** TIM Instances : master mode available (TIMx_CR2.MMS available )********/
-#define IS_TIM_MASTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/*********** TIM Instances : Slave mode available (TIMx_SMCR available )*******/
-#define IS_TIM_SLAVE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-/********************** TIM Instances : 32 bit Counter ************************/
-#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE)(((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM5))
-
-/***************** TIM Instances : external trigger input available ************/
-#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****************** TIM Instances : remapping capability **********************/
-#define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM11))
-
-/******************* TIM Instances : output(s) available **********************/
-#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) \
- ((((INSTANCE) == TIM1) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3) || \
- ((CHANNEL) == TIM_CHANNEL_4))) \
- || \
- (((INSTANCE) == TIM2) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3) || \
- ((CHANNEL) == TIM_CHANNEL_4))) \
- || \
- (((INSTANCE) == TIM3) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3) || \
- ((CHANNEL) == TIM_CHANNEL_4))) \
- || \
- (((INSTANCE) == TIM4) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3) || \
- ((CHANNEL) == TIM_CHANNEL_4))) \
- || \
- (((INSTANCE) == TIM5) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3) || \
- ((CHANNEL) == TIM_CHANNEL_4))) \
- || \
- (((INSTANCE) == TIM9) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2))) \
- || \
- (((INSTANCE) == TIM10) && \
- (((CHANNEL) == TIM_CHANNEL_1))) \
- || \
- (((INSTANCE) == TIM11) && \
- (((CHANNEL) == TIM_CHANNEL_1))))
-
-/************ TIM Instances : complementary output(s) available ***************/
-#define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL) \
- ((((INSTANCE) == TIM1) && \
- (((CHANNEL) == TIM_CHANNEL_1) || \
- ((CHANNEL) == TIM_CHANNEL_2) || \
- ((CHANNEL) == TIM_CHANNEL_3))))
-
-/****************** TIM Instances : supporting counting mode selection ********/
-#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****************** TIM Instances : supporting clock division *****************/
-#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9) || \
- ((INSTANCE) == TIM10) || \
- ((INSTANCE) == TIM11))
-
-
-/****************** TIM Instances : supporting commutation event generation ***/
-
-#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE) ((INSTANCE) == TIM1)
-
-/****************** TIM Instances : supporting OCxREF clear *******************/
-#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****** TIM Instances : supporting external clock mode 1 for ETRF input *******/
-#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-
-/****** TIM Instances : supporting external clock mode 2 for ETRF input *******/
-#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1)|| \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-
-/****** TIM Instances : supporting external clock mode 1 for TIX inputs ******/
-#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-
-/********** TIM Instances : supporting internal trigger inputs(ITRX) *********/
-#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-
-/****************** TIM Instances : supporting repetition counter *************/
-#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM1))
-
-/****************** TIM Instances : supporting encoder interface **************/
-#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5) || \
- ((INSTANCE) == TIM9))
-/****************** TIM Instances : supporting Hall sensor interface **********/
-#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \
- ((INSTANCE) == TIM2) || \
- ((INSTANCE) == TIM3) || \
- ((INSTANCE) == TIM4) || \
- ((INSTANCE) == TIM5))
-/****************** TIM Instances : supporting the break function *************/
-#define IS_TIM_BREAK_INSTANCE(INSTANCE) (((INSTANCE) == TIM1))
-
-/******************** USART Instances : Synchronous mode **********************/
-#define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
- ((INSTANCE) == USART2) || \
- ((INSTANCE) == USART6))
-
-/******************** UART Instances : Half-Duplex mode **********************/
-#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
- ((INSTANCE) == USART2) || \
- ((INSTANCE) == USART6))
-
-/* Legacy defines */
-#define IS_UART_INSTANCE IS_UART_HALFDUPLEX_INSTANCE
-
-/****************** UART Instances : Hardware Flow control ********************/
-#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
- ((INSTANCE) == USART2) || \
- ((INSTANCE) == USART6))
-/******************** UART Instances : LIN mode **********************/
-#define IS_UART_LIN_INSTANCE IS_UART_HALFDUPLEX_INSTANCE
-
-/********************* UART Instances : Smart card mode ***********************/
-#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
- ((INSTANCE) == USART2) || \
- ((INSTANCE) == USART6))
-
-/*********************** UART Instances : IRDA mode ***************************/
-#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
- ((INSTANCE) == USART2) || \
- ((INSTANCE) == USART6))
-
-/*********************** PCD Instances ****************************************/
-#define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS))
-
-/*********************** HCD Instances ****************************************/
-#define IS_HCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS))
-
-/****************************** SDIO Instances ********************************/
-#define IS_SDIO_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SDIO)
-
-/****************************** IWDG Instances ********************************/
-#define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG)
-
-/****************************** WWDG Instances ********************************/
-#define IS_WWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == WWDG)
-
-/****************************** USB Exported Constants ************************/
-#define USB_OTG_FS_HOST_MAX_CHANNEL_NBR 8U
-#define USB_OTG_FS_MAX_IN_ENDPOINTS 4U /* Including EP0 */
-#define USB_OTG_FS_MAX_OUT_ENDPOINTS 4U /* Including EP0 */
-#define USB_OTG_FS_TOTAL_FIFO_SIZE 1280U /* in Bytes */
-
-/*
- * @brief Specific devices reset values definitions
- */
-#define RCC_PLLCFGR_RST_VALUE 0x24003010U
-#define RCC_PLLI2SCFGR_RST_VALUE 0x20003000U
-
-#define RCC_MAX_FREQUENCY 84000000U /*!< Max frequency of family in Hz*/
-#define RCC_MAX_FREQUENCY_SCALE3 60000000U /*!< Maximum frequency for system clock at power scale3, in Hz */
-#define RCC_MAX_FREQUENCY_SCALE2 RCC_MAX_FREQUENCY /*!< Maximum frequency for system clock at power scale2, in Hz */
-#define RCC_PLLVCO_OUTPUT_MIN 192000000U /*!< Frequency min for PLLVCO output, in Hz */
-#define RCC_PLLVCO_INPUT_MIN 950000U /*!< Frequency min for PLLVCO input, in Hz */
-#define RCC_PLLVCO_INPUT_MAX 2100000U /*!< Frequency max for PLLVCO input, in Hz */
-#define RCC_PLLVCO_OUTPUT_MAX 432000000U /*!< Frequency max for PLLVCO output, in Hz */
-
-#define RCC_PLLN_MIN_VALUE 192U
-#define RCC_PLLN_MAX_VALUE 432U
-
-#define FLASH_SCALE2_LATENCY1_FREQ 30000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */
-#define FLASH_SCALE2_LATENCY2_FREQ 60000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 2 */
-
-#define FLASH_SCALE3_LATENCY1_FREQ 30000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 3 */
-#define FLASH_SCALE3_LATENCY2_FREQ 60000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 3 */
-
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32F401xE_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
deleted file mode 100644
index 92fe3a785544fa7e91403b9f77354c7e9d9a4197..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx.h
- * @author MCD Application Team
- * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
- *
- * The file is the unique include file that the application programmer
- * is using in the C source code, usually in main.c. This file contains:
- * - Configuration section that allows to select:
- * - The STM32F4xx device used in the target application
- * - To use or not the peripheral's drivers in application code(i.e.
- * code will be based on direct access to peripheral's registers
- * rather than drivers API), this option is controlled by
- * "#define USE_HAL_DRIVER"
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f4xx
- * @{
- */
-
-#ifndef __STM32F4xx_H
-#define __STM32F4xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-
-/** @addtogroup Library_configuration_section
- * @{
- */
-
-/**
- * @brief STM32 Family
- */
-#if !defined (STM32F4)
-#define STM32F4
-#endif /* STM32F4 */
-
-/* Uncomment the line below according to the target STM32 device used in your
- application
- */
-#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
- !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
- !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \
- !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \
- !defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \
- !defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx)
- /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
- /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
- /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
- /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
- /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
- /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
- /* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
- STM32F439NI, STM32F429IG and STM32F429II Devices */
- /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
- STM32F439NI, STM32F439IG and STM32F439II Devices */
- /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
- /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
- /* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */
- /* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
- /* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */
- /* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */
- /* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,
- and STM32F446ZE Devices */
- /* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG,
- STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */
- /* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG
- and STM32F479NG Devices */
- /* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */
- /* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */
- /* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */
- /* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */
- /* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG,
- STM32F413RG, STM32F413VG and STM32F413ZG Devices */
- /* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */
-#endif
-
-/* Tip: To avoid modifying this file each time you need to switch between these
- devices, you can define the device in your toolchain compiler preprocessor.
- */
-#if !defined (USE_HAL_DRIVER)
-/**
- * @brief Comment the line below if you will not use the peripherals drivers.
- In this case, these drivers will not be included and the application code will
- be based on direct access to peripherals registers
- */
- /*#define USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
-
-/**
- * @brief CMSIS version number V2.6.8
- */
-#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
-#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
-#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */
-#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
-#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\
- |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\
- |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\
- |(__STM32F4xx_CMSIS_VERSION_RC))
-
-/**
- * @}
- */
-
-/** @addtogroup Device_Included
- * @{
- */
-
-#if defined(STM32F405xx)
- #include "stm32f405xx.h"
-#elif defined(STM32F415xx)
- #include "stm32f415xx.h"
-#elif defined(STM32F407xx)
- #include "stm32f407xx.h"
-#elif defined(STM32F417xx)
- #include "stm32f417xx.h"
-#elif defined(STM32F427xx)
- #include "stm32f427xx.h"
-#elif defined(STM32F437xx)
- #include "stm32f437xx.h"
-#elif defined(STM32F429xx)
- #include "stm32f429xx.h"
-#elif defined(STM32F439xx)
- #include "stm32f439xx.h"
-#elif defined(STM32F401xC)
- #include "stm32f401xc.h"
-#elif defined(STM32F401xE)
- #include "stm32f401xe.h"
-#elif defined(STM32F410Tx)
- #include "stm32f410tx.h"
-#elif defined(STM32F410Cx)
- #include "stm32f410cx.h"
-#elif defined(STM32F410Rx)
- #include "stm32f410rx.h"
-#elif defined(STM32F411xE)
- #include "stm32f411xe.h"
-#elif defined(STM32F446xx)
- #include "stm32f446xx.h"
-#elif defined(STM32F469xx)
- #include "stm32f469xx.h"
-#elif defined(STM32F479xx)
- #include "stm32f479xx.h"
-#elif defined(STM32F412Cx)
- #include "stm32f412cx.h"
-#elif defined(STM32F412Zx)
- #include "stm32f412zx.h"
-#elif defined(STM32F412Rx)
- #include "stm32f412rx.h"
-#elif defined(STM32F412Vx)
- #include "stm32f412vx.h"
-#elif defined(STM32F413xx)
- #include "stm32f413xx.h"
-#elif defined(STM32F423xx)
- #include "stm32f423xx.h"
-#else
- #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
-#endif
-
-/**
- * @}
- */
-
-/** @addtogroup Exported_types
- * @{
- */
-typedef enum
-{
- RESET = 0U,
- SET = !RESET
-} FlagStatus, ITStatus;
-
-typedef enum
-{
- DISABLE = 0U,
- ENABLE = !DISABLE
-} FunctionalState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-
-typedef enum
-{
- SUCCESS = 0U,
- ERROR = !SUCCESS
-} ErrorStatus;
-
-/**
- * @}
- */
-
-
-/** @addtogroup Exported_macro
- * @{
- */
-#define SET_BIT(REG, BIT) ((REG) |= (BIT))
-
-#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
-
-#define READ_BIT(REG, BIT) ((REG) & (BIT))
-
-#define CLEAR_REG(REG) ((REG) = (0x0))
-
-#define WRITE_REG(REG, VAL) ((REG) = (VAL))
-
-#define READ_REG(REG) ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-
-#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
-
-/* Use of CMSIS compiler intrinsics for register exclusive access */
-/* Atomic 32-bit register access macro to set one or several bits */
-#define ATOMIC_SET_BIT(REG, BIT) \
- do { \
- uint32_t val; \
- do { \
- val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
- } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
- } while(0)
-
-/* Atomic 32-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEAR_BIT(REG, BIT) \
- do { \
- uint32_t val; \
- do { \
- val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
- } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
- } while(0)
-
-/* Atomic 32-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
- do { \
- uint32_t val; \
- do { \
- val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
- } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
- } while(0)
-
-/* Atomic 16-bit register access macro to set one or several bits */
-#define ATOMIC_SETH_BIT(REG, BIT) \
- do { \
- uint16_t val; \
- do { \
- val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
- } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
- } while(0)
-
-/* Atomic 16-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEARH_BIT(REG, BIT) \
- do { \
- uint16_t val; \
- do { \
- val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
- } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
- } while(0)
-
-/* Atomic 16-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
- do { \
- uint16_t val; \
- do { \
- val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
- } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
- } while(0)
-
-/**
- * @}
- */
-
-#if defined (USE_HAL_DRIVER)
- #include "stm32f4xx_hal.h"
-#endif /* USE_HAL_DRIVER */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32F4xx_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h
deleted file mode 100644
index d92c6f11a2fe21f7cfbc484b7f9a95c37cfb1ad0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/**
- ******************************************************************************
- * @file system_stm32f4xx.h
- * @author MCD Application Team
- * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f4xx_system
- * @{
- */
-
-/**
- * @brief Define to prevent recursive inclusion
- */
-#ifndef __SYSTEM_STM32F4XX_H
-#define __SYSTEM_STM32F4XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/** @addtogroup STM32F4xx_System_Includes
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @addtogroup STM32F4xx_System_Exported_types
- * @{
- */
- /* This variable is updated in three ways:
- 1) by calling CMSIS function SystemCoreClockUpdate()
- 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
- 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
- Note: If you use this function to configure the system clock; then there
- is no need to call the 2 first functions listed above, since SystemCoreClock
- variable is updated automatically.
- */
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
-extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Exported_Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Exported_Functions
- * @{
- */
-
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32F4XX_H */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt
deleted file mode 100644
index 5306686d83a363fc818d586e5f02ede169d5b88c..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-This software component is provided to you as part of a software package and
-applicable license terms are in the Package_license file. If you received this
-software component outside of a package or without applicable license terms,
-the terms of the Apache-2.0 license shall apply.
-You may obtain a copy of the Apache-2.0 at:
-https://opensource.org/licenses/Apache-2.0
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armcc.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armcc.h
deleted file mode 100644
index 7d751fb3a175a35889ff901cf624f2c959aa663a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armcc.h
+++ /dev/null
@@ -1,865 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_armcc.h
- * @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version V5.0.4
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
- #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* CMSIS compiler control architecture macros */
-#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
- (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
- #define __ARM_ARCH_6M__ 1
-#endif
-
-#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
- #define __ARM_ARCH_7M__ 1
-#endif
-
-#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
- #define __ARM_ARCH_7EM__ 1
-#endif
-
- /* __ARM_ARCH_8M_BASE__ not applicable */
- /* __ARM_ARCH_8M_MAIN__ not applicable */
-
-
-/* CMSIS compiler specific defines */
-#ifndef __ASM
- #define __ASM __asm
-#endif
-#ifndef __INLINE
- #define __INLINE __inline
-#endif
-#ifndef __STATIC_INLINE
- #define __STATIC_INLINE static __inline
-#endif
-#ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE static __forceinline
-#endif
-#ifndef __NO_RETURN
- #define __NO_RETURN __declspec(noreturn)
-#endif
-#ifndef __USED
- #define __USED __attribute__((used))
-#endif
-#ifndef __WEAK
- #define __WEAK __attribute__((weak))
-#endif
-#ifndef __PACKED
- #define __PACKED __attribute__((packed))
-#endif
-#ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT __packed struct
-#endif
-#ifndef __PACKED_UNION
- #define __PACKED_UNION __packed union
-#endif
-#ifndef __UNALIGNED_UINT32 /* deprecated */
- #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
-#endif
-#ifndef __UNALIGNED_UINT16_WRITE
- #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
-#endif
-#ifndef __UNALIGNED_UINT16_READ
- #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
-#endif
-#ifndef __UNALIGNED_UINT32_WRITE
- #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
-#endif
-#ifndef __UNALIGNED_UINT32_READ
- #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
-#endif
-#ifndef __ALIGNED
- #define __ALIGNED(x) __attribute__((aligned(x)))
-#endif
-#ifndef __RESTRICT
- #define __RESTRICT __restrict
-#endif
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/**
- \brief Enable IRQ Interrupts
- \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq(); */
-
-
-/**
- \brief Disable IRQ Interrupts
- \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq(); */
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- register uint32_t __regControl __ASM("control");
- return(__regControl);
-}
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- register uint32_t __regControl __ASM("control");
- __regControl = control;
-}
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
- register uint32_t __regIPSR __ASM("ipsr");
- return(__regIPSR);
-}
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-}
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
- \return xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
- register uint32_t __regXPSR __ASM("xpsr");
- return(__regXPSR);
-}
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- return(__regProcessStackPointer);
-}
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- return(__regMainStackPointer);
-}
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- register uint32_t __regPriMask __ASM("primask");
- return(__regPriMask);
-}
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- register uint32_t __regPriMask __ASM("primask");
- __regPriMask = (priMask);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
-
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- register uint32_t __regBasePri __ASM("basepri");
- return(__regBasePri);
-}
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
- register uint32_t __regBasePri __ASM("basepri");
- __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
- register uint32_t __regBasePriMax __ASM("basepri_max");
- __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- return(__regFaultMask);
-}
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- __regFaultMask = (faultMask & (uint32_t)1U);
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
-
-
-/**
- \brief Get FPSCR
- \details Returns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#else
- return(0U);
-#endif
-}
-
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#else
- (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __nop
-
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI __wfi
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __wfe
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __sev
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-#define __ISB() do {\
- __schedule_barrier();\
- __isb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
- __schedule_barrier();\
- __dsb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
- __schedule_barrier();\
- __dmb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV __rev
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
- rev16 r0, r0
- bx lr
-}
-#endif
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
-{
- revsh r0, r0
- bx lr
-}
-#endif
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] op1 Value to rotate
- \param [in] op2 Number of Bits to rotate
- \return Rotated value
- */
-#define __ROR __ror
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __breakpoint(value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
- #define __RBIT __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
- uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
- result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value != 0U; value >>= 1U)
- {
- result <<= 1U;
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
- return result;
-}
-#endif
-
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
-
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
-#else
- #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
-#else
- #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
-#else
- #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXB(value, ptr) __strex(value, ptr)
-#else
- #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXH(value, ptr) __strex(value, ptr)
-#else
- #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXW(value, ptr) __strex(value, ptr)
-#else
- #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX __clrex
-
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT __ssat
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __usat
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
- rrx r0, r0
- bx lr
-}
-#endif
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRBT(value, ptr) __strt(value, ptr)
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRHT(value, ptr) __strt(value, ptr)
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRT(value, ptr) __strt(value, ptr)
-
-#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
- if ((sat >= 1U) && (sat <= 32U))
- {
- const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
- const int32_t min = -1 - max ;
- if (val > max)
- {
- return max;
- }
- else if (val < min)
- {
- return min;
- }
- }
- return val;
-}
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
- if (sat <= 31U)
- {
- const uint32_t max = ((1U << sat) - 1U);
- if (val > (int32_t)max)
- {
- return max;
- }
- else if (val < 0)
- {
- return 0U;
- }
- }
- return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
-
-#define __SADD8 __sadd8
-#define __QADD8 __qadd8
-#define __SHADD8 __shadd8
-#define __UADD8 __uadd8
-#define __UQADD8 __uqadd8
-#define __UHADD8 __uhadd8
-#define __SSUB8 __ssub8
-#define __QSUB8 __qsub8
-#define __SHSUB8 __shsub8
-#define __USUB8 __usub8
-#define __UQSUB8 __uqsub8
-#define __UHSUB8 __uhsub8
-#define __SADD16 __sadd16
-#define __QADD16 __qadd16
-#define __SHADD16 __shadd16
-#define __UADD16 __uadd16
-#define __UQADD16 __uqadd16
-#define __UHADD16 __uhadd16
-#define __SSUB16 __ssub16
-#define __QSUB16 __qsub16
-#define __SHSUB16 __shsub16
-#define __USUB16 __usub16
-#define __UQSUB16 __uqsub16
-#define __UHSUB16 __uhsub16
-#define __SASX __sasx
-#define __QASX __qasx
-#define __SHASX __shasx
-#define __UASX __uasx
-#define __UQASX __uqasx
-#define __UHASX __uhasx
-#define __SSAX __ssax
-#define __QSAX __qsax
-#define __SHSAX __shsax
-#define __USAX __usax
-#define __UQSAX __uqsax
-#define __UHSAX __uhsax
-#define __USAD8 __usad8
-#define __USADA8 __usada8
-#define __SSAT16 __ssat16
-#define __USAT16 __usat16
-#define __UXTB16 __uxtb16
-#define __UXTAB16 __uxtab16
-#define __SXTB16 __sxtb16
-#define __SXTAB16 __sxtab16
-#define __SMUAD __smuad
-#define __SMUADX __smuadx
-#define __SMLAD __smlad
-#define __SMLADX __smladx
-#define __SMLALD __smlald
-#define __SMLALDX __smlaldx
-#define __SMUSD __smusd
-#define __SMUSDX __smusdx
-#define __SMLSD __smlsd
-#define __SMLSDX __smlsdx
-#define __SMLSLD __smlsld
-#define __SMLSLDX __smlsldx
-#define __SEL __sel
-#define __QADD __qadd
-#define __QSUB __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
- ((int64_t)(ARG3) << 32U) ) >> 32U))
-
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armclang.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armclang.h
deleted file mode 100644
index d8031b03024469800f20c5f638bc5958853142c2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_armclang.h
+++ /dev/null
@@ -1,1869 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_armclang.h
- * @brief CMSIS compiler armclang (Arm Compiler 6) header file
- * @version V5.0.4
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
-
-#ifndef __CMSIS_ARMCLANG_H
-#define __CMSIS_ARMCLANG_H
-
-#pragma clang system_header /* treat file as system include file */
-
-#ifndef __ARM_COMPAT_H
-#include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef __ASM
- #define __ASM __asm
-#endif
-#ifndef __INLINE
- #define __INLINE __inline
-#endif
-#ifndef __STATIC_INLINE
- #define __STATIC_INLINE static __inline
-#endif
-#ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
-#endif
-#ifndef __NO_RETURN
- #define __NO_RETURN __attribute__((__noreturn__))
-#endif
-#ifndef __USED
- #define __USED __attribute__((used))
-#endif
-#ifndef __WEAK
- #define __WEAK __attribute__((weak))
-#endif
-#ifndef __PACKED
- #define __PACKED __attribute__((packed, aligned(1)))
-#endif
-#ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef __PACKED_UNION
- #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-#endif
-#ifndef __UNALIGNED_UINT32 /* deprecated */
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
- struct __attribute__((packed)) T_UINT32 { uint32_t v; };
- #pragma clang diagnostic pop
- #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef __UNALIGNED_UINT16_WRITE
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
- __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- #pragma clang diagnostic pop
- #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef __UNALIGNED_UINT16_READ
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
- __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- #pragma clang diagnostic pop
- #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef __UNALIGNED_UINT32_WRITE
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
- __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- #pragma clang diagnostic pop
- #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef __UNALIGNED_UINT32_READ
- #pragma clang diagnostic push
- #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
- __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- #pragma clang diagnostic pop
- #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef __ALIGNED
- #define __ALIGNED(x) __attribute__((aligned(x)))
-#endif
-#ifndef __RESTRICT
- #define __RESTRICT __restrict
-#endif
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/**
- \brief Enable IRQ Interrupts
- \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq(); see arm_compat.h */
-
-
-/**
- \brief Disable IRQ Interrupts
- \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq(); see arm_compat.h */
-
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Control Register (non-secure)
- \details Returns the content of the non-secure Control Register when in secure mode.
- \return non-secure Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Control Register (non-secure)
- \details Writes the given value to the non-secure Control Register when in secure state.
- \param [in] control Control Register value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
- __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
- \return xPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSP(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, psp" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Process Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
- \return PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Process Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSP(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, msp" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Main Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
- \return MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Main Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
-}
-#endif
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
- \return SP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
- \param [in] topOfStack Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
-{
- __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
-}
-#endif
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Priority Mask (non-secure)
- \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
- \return Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Priority Mask (non-secure)
- \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
- \param [in] priMask Priority Mask
- */
-__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
- __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq /* see arm_compat.h */
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq /* see arm_compat.h */
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Base Priority (non-secure)
- \details Returns the current value of the non-secure Base Priority register when in secure state.
- \return Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Base Priority (non-secure)
- \details Assigns the given value to the non-secure Base Priority register when in secure state.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
-}
-#endif
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
-}
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Fault Mask (non-secure)
- \details Returns the current value of the non-secure Fault Mask register when in secure state.
- \return Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Fault Mask (non-secure)
- \details Assigns the given value to the non-secure Fault Mask register when in secure state.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-
-/**
- \brief Get Process Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always in non-secure
- mode.
-
- \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
- \return PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- return result;
-#endif
-}
-
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Process Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always in non-secure
- mode.
-
- \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \return PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
- return result;
-#endif
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored in non-secure
- mode.
-
- \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)ProcStackPtrLimit;
-#else
- __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Process Stack Pointer (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored in non-secure
- mode.
-
- \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)ProcStackPtrLimit;
-#else
- __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-#endif
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always.
-
- \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
- \return MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, msplim" : "=r" (result) );
- return result;
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Main Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always.
-
- \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
- \return MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
- return result;
-#endif
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored.
-
- \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
- \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- (void)MainStackPtrLimit;
-#else
- __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Main Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored.
-
- \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
- \param [in] MainStackPtrLimit Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- (void)MainStackPtrLimit;
-#else
- __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-/**
- \brief Get FPSCR
- \details Returns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
-#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr
-#else
-#define __get_FPSCR() ((uint32_t)0U)
-#endif
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
-#define __set_FPSCR __builtin_arm_set_fpscr
-#else
-#define __set_FPSCR(x) ((void)(x))
-#endif
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __builtin_arm_nop
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI __builtin_arm_wfi
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __builtin_arm_wfe
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __builtin_arm_sev
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-#define __ISB() __builtin_arm_isb(0xF);
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() __builtin_arm_dsb(0xF);
-
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() __builtin_arm_dmb(0xF);
-
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV(value) __builtin_bswap32(value)
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV16(value) __ROR(__REV(value), 16)
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REVSH(value) (int16_t)__builtin_bswap16(value)
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] op1 Value to rotate
- \param [in] op2 Number of Bits to rotate
- \return Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
- op2 %= 32U;
- if (op2 == 0U)
- {
- return op1;
- }
- return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __ASM volatile ("bkpt "#value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __RBIT __builtin_arm_rbit
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ (uint8_t)__builtin_clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDREXB (uint8_t)__builtin_arm_ldrex
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDREXH (uint16_t)__builtin_arm_ldrex
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDREXW (uint32_t)__builtin_arm_ldrex
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXB (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXH (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXW (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX __builtin_arm_clrex
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT __builtin_arm_ssat
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __builtin_arm_usat
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
- if ((sat >= 1U) && (sat <= 32U))
- {
- const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
- const int32_t min = -1 - max ;
- if (val > max)
- {
- return max;
- }
- else if (val < min)
- {
- return min;
- }
- }
- return val;
-}
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
- if (sat <= 31U)
- {
- const uint32_t max = ((1U << sat) - 1U);
- if (val > (int32_t)max)
- {
- return max;
- }
- else if (val < 0)
- {
- return 0U;
- }
- }
- return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-/**
- \brief Load-Acquire (8 bit)
- \details Executes a LDAB instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result);
-}
-
-
-/**
- \brief Load-Acquire (16 bit)
- \details Executes a LDAH instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result);
-}
-
-
-/**
- \brief Load-Acquire (32 bit)
- \details Executes a LDA instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief Store-Release (8 bit)
- \details Executes a STLB instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (16 bit)
- \details Executes a STLH instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (32 bit)
- \details Executes a STL instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Load-Acquire Exclusive (8 bit)
- \details Executes a LDAB exclusive instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDAEXB (uint8_t)__builtin_arm_ldaex
-
-
-/**
- \brief Load-Acquire Exclusive (16 bit)
- \details Executes a LDAH exclusive instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDAEXH (uint16_t)__builtin_arm_ldaex
-
-
-/**
- \brief Load-Acquire Exclusive (32 bit)
- \details Executes a LDA exclusive instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDAEX (uint32_t)__builtin_arm_ldaex
-
-
-/**
- \brief Store-Release Exclusive (8 bit)
- \details Executes a STLB exclusive instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEXB (uint32_t)__builtin_arm_stlex
-
-
-/**
- \brief Store-Release Exclusive (16 bit)
- \details Executes a STLH exclusive instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEXH (uint32_t)__builtin_arm_stlex
-
-
-/**
- \brief Store-Release Exclusive (32 bit)
- \details Executes a STL exclusive instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEX (uint32_t)__builtin_arm_stlex
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- int32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-#endif
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_compiler.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_compiler.h
deleted file mode 100644
index 79a2cac3639eac8abdc6f0b8f122cceaf8ce41be..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_compiler.h
+++ /dev/null
@@ -1,266 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_compiler.h
- * @brief CMSIS compiler generic header file
- * @version V5.0.4
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_COMPILER_H
-#define __CMSIS_COMPILER_H
-
-#include <stdint.h>
-
-/*
- * Arm Compiler 4/5
- */
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-
-/*
- * Arm Compiler 6 (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armclang.h"
-
-
-/*
- * GNU Compiler
- */
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-
-/*
- * IAR Compiler
- */
-#elif defined ( __ICCARM__ )
- #include <cmsis_iccarm.h>
-
-
-/*
- * TI Arm Compiler
- */
-#elif defined ( __TI_ARM__ )
- #include <cmsis_ccs.h>
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
- #ifndef __INLINE
- #define __INLINE inline
- #endif
- #ifndef __STATIC_INLINE
- #define __STATIC_INLINE static inline
- #endif
- #ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __STATIC_INLINE
- #endif
- #ifndef __NO_RETURN
- #define __NO_RETURN __attribute__((noreturn))
- #endif
- #ifndef __USED
- #define __USED __attribute__((used))
- #endif
- #ifndef __WEAK
- #define __WEAK __attribute__((weak))
- #endif
- #ifndef __PACKED
- #define __PACKED __attribute__((packed))
- #endif
- #ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT struct __attribute__((packed))
- #endif
- #ifndef __PACKED_UNION
- #define __PACKED_UNION union __attribute__((packed))
- #endif
- #ifndef __UNALIGNED_UINT32 /* deprecated */
- struct __attribute__((packed)) T_UINT32 { uint32_t v; };
- #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
- #endif
- #ifndef __UNALIGNED_UINT16_WRITE
- __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT16_READ
- __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __UNALIGNED_UINT32_WRITE
- __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT32_READ
- __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __ALIGNED
- #define __ALIGNED(x) __attribute__((aligned(x)))
- #endif
- #ifndef __RESTRICT
- #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
- #define __RESTRICT
- #endif
-
-
-/*
- * TASKING Compiler
- */
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
- #ifndef __ASM
- #define __ASM __asm
- #endif
- #ifndef __INLINE
- #define __INLINE inline
- #endif
- #ifndef __STATIC_INLINE
- #define __STATIC_INLINE static inline
- #endif
- #ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __STATIC_INLINE
- #endif
- #ifndef __NO_RETURN
- #define __NO_RETURN __attribute__((noreturn))
- #endif
- #ifndef __USED
- #define __USED __attribute__((used))
- #endif
- #ifndef __WEAK
- #define __WEAK __attribute__((weak))
- #endif
- #ifndef __PACKED
- #define __PACKED __packed__
- #endif
- #ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT struct __packed__
- #endif
- #ifndef __PACKED_UNION
- #define __PACKED_UNION union __packed__
- #endif
- #ifndef __UNALIGNED_UINT32 /* deprecated */
- struct __packed__ T_UINT32 { uint32_t v; };
- #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
- #endif
- #ifndef __UNALIGNED_UINT16_WRITE
- __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT16_READ
- __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __UNALIGNED_UINT32_WRITE
- __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT32_READ
- __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __ALIGNED
- #define __ALIGNED(x) __align(x)
- #endif
- #ifndef __RESTRICT
- #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
- #define __RESTRICT
- #endif
-
-
-/*
- * COSMIC Compiler
- */
-#elif defined ( __CSMC__ )
- #include <cmsis_csm.h>
-
- #ifndef __ASM
- #define __ASM _asm
- #endif
- #ifndef __INLINE
- #define __INLINE inline
- #endif
- #ifndef __STATIC_INLINE
- #define __STATIC_INLINE static inline
- #endif
- #ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __STATIC_INLINE
- #endif
- #ifndef __NO_RETURN
- // NO RETURN is automatically detected hence no warning here
- #define __NO_RETURN
- #endif
- #ifndef __USED
- #warning No compiler specific solution for __USED. __USED is ignored.
- #define __USED
- #endif
- #ifndef __WEAK
- #define __WEAK __weak
- #endif
- #ifndef __PACKED
- #define __PACKED @packed
- #endif
- #ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT @packed struct
- #endif
- #ifndef __PACKED_UNION
- #define __PACKED_UNION @packed union
- #endif
- #ifndef __UNALIGNED_UINT32 /* deprecated */
- @packed struct T_UINT32 { uint32_t v; };
- #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
- #endif
- #ifndef __UNALIGNED_UINT16_WRITE
- __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT16_READ
- __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __UNALIGNED_UINT32_WRITE
- __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
- #endif
- #ifndef __UNALIGNED_UINT32_READ
- __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
- #endif
- #ifndef __ALIGNED
- #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
- #define __ALIGNED(x)
- #endif
- #ifndef __RESTRICT
- #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
- #define __RESTRICT
- #endif
-
-
-#else
- #error Unknown compiler.
-#endif
-
-
-#endif /* __CMSIS_COMPILER_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_gcc.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_gcc.h
deleted file mode 100644
index 1bd41a4952d87109d334cb1c56a77ab7115b0921..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_gcc.h
+++ /dev/null
@@ -1,2085 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_gcc.h
- * @brief CMSIS compiler GCC header file
- * @version V5.0.4
- * @date 09. April 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_GCC_H
-#define __CMSIS_GCC_H
-
-/* ignore some GCC warnings */
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-
-/* Fallback for __has_builtin */
-#ifndef __has_builtin
- #define __has_builtin(x) (0)
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef __ASM
- #define __ASM __asm
-#endif
-#ifndef __INLINE
- #define __INLINE inline
-#endif
-#ifndef __STATIC_INLINE
- #define __STATIC_INLINE static inline
-#endif
-#ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
-#endif
-#ifndef __NO_RETURN
- #define __NO_RETURN __attribute__((__noreturn__))
-#endif
-#ifndef __USED
- #define __USED __attribute__((used))
-#endif
-#ifndef __WEAK
- #define __WEAK __attribute__((weak))
-#endif
-#ifndef __PACKED
- #define __PACKED __attribute__((packed, aligned(1)))
-#endif
-#ifndef __PACKED_STRUCT
- #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef __PACKED_UNION
- #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-#endif
-#ifndef __UNALIGNED_UINT32 /* deprecated */
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wpacked"
- #pragma GCC diagnostic ignored "-Wattributes"
- struct __attribute__((packed)) T_UINT32 { uint32_t v; };
- #pragma GCC diagnostic pop
- #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef __UNALIGNED_UINT16_WRITE
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wpacked"
- #pragma GCC diagnostic ignored "-Wattributes"
- __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- #pragma GCC diagnostic pop
- #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef __UNALIGNED_UINT16_READ
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wpacked"
- #pragma GCC diagnostic ignored "-Wattributes"
- __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- #pragma GCC diagnostic pop
- #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef __UNALIGNED_UINT32_WRITE
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wpacked"
- #pragma GCC diagnostic ignored "-Wattributes"
- __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- #pragma GCC diagnostic pop
- #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef __UNALIGNED_UINT32_READ
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wpacked"
- #pragma GCC diagnostic ignored "-Wattributes"
- __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- #pragma GCC diagnostic pop
- #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef __ALIGNED
- #define __ALIGNED(x) __attribute__((aligned(x)))
-#endif
-#ifndef __RESTRICT
- #define __RESTRICT __restrict
-#endif
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/**
- \brief Enable IRQ Interrupts
- \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
- \brief Disable IRQ Interrupts
- \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __disable_irq(void)
-{
- __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Control Register (non-secure)
- \details Returns the content of the non-secure Control Register when in secure mode.
- \return non-secure Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Control Register (non-secure)
- \details Writes the given value to the non-secure Control Register when in secure state.
- \param [in] control Control Register value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
- __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
- \return xPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSP(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, psp" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Process Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
- \return PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Process Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSP(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, msp" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Main Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
- \return MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Main Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
-}
-#endif
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
- \return SP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
- \param [in] topOfStack Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
-{
- __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
-}
-#endif
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Priority Mask (non-secure)
- \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
- \return Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Priority Mask (non-secure)
- \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
- \param [in] priMask Priority Mask
- */
-__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
- __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __enable_fault_irq(void)
-{
- __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __disable_fault_irq(void)
-{
- __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Base Priority (non-secure)
- \details Returns the current value of the non-secure Base Priority register when in secure state.
- \return Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Base Priority (non-secure)
- \details Assigns the given value to the non-secure Base Priority register when in secure state.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
-}
-#endif
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
- __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
-}
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Fault Mask (non-secure)
- \details Returns the current value of the non-secure Fault Mask register when in secure state.
- \return Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Fault Mask (non-secure)
- \details Assigns the given value to the non-secure Fault Mask register when in secure state.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-
-/**
- \brief Get Process Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always in non-secure
- mode.
-
- \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
- \return PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- return result;
-#endif
-}
-
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Process Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always.
-
- \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \return PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
- return result;
-#endif
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored in non-secure
- mode.
-
- \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)ProcStackPtrLimit;
-#else
- __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Process Stack Pointer (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored.
-
- \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)ProcStackPtrLimit;
-#else
- __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-#endif
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always in non-secure
- mode.
-
- \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
- \return MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, msplim" : "=r" (result) );
- return result;
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Get Main Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence zero is returned always.
-
- \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
- \return MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- return 0U;
-#else
- uint32_t result;
- __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
- return result;
-#endif
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer Limit
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored in non-secure
- mode.
-
- \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
- \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- (void)MainStackPtrLimit;
-#else
- __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
- \brief Set Main Stack Pointer Limit (non-secure)
- Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- Stack Pointer Limit register hence the write is silently ignored.
-
- \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
- \param [in] MainStackPtrLimit Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- (void)MainStackPtrLimit;
-#else
- __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-
-/**
- \brief Get FPSCR
- \details Returns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
-#if __has_builtin(__builtin_arm_get_fpscr)
-// Re-enable using built-in when GCC has been fixed
-// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
- /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
- return __builtin_arm_get_fpscr();
-#else
- uint32_t result;
-
- __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- return(result);
-#endif
-#else
- return(0U);
-#endif
-}
-
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
-#if __has_builtin(__builtin_arm_set_fpscr)
-// Re-enable using built-in when GCC has been fixed
-// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
- /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
- __builtin_arm_set_fpscr(fpscr);
-#else
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
-#endif
-#else
- (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_RW_REG(r) "+l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_RW_REG(r) "+r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP() __ASM volatile ("nop")
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI() __ASM volatile ("wfi")
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE() __ASM volatile ("wfe")
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV() __ASM volatile ("sev")
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-__STATIC_FORCEINLINE void __ISB(void)
-{
- __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-__STATIC_FORCEINLINE void __DSB(void)
-{
- __ASM volatile ("dsb 0xF":::"memory");
-}
-
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-__STATIC_FORCEINLINE void __DMB(void)
-{
- __ASM volatile ("dmb 0xF":::"memory");
-}
-
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
- return __builtin_bswap32(value);
-#else
- uint32_t result;
-
- __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return result;
-#endif
-}
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return result;
-}
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- return (int16_t)__builtin_bswap16(value);
-#else
- int16_t result;
-
- __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return result;
-#endif
-}
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] op1 Value to rotate
- \param [in] op2 Number of Bits to rotate
- \return Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
- op2 %= 32U;
- if (op2 == 0U)
- {
- return op1;
- }
- return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __ASM volatile ("bkpt "#value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
- uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
- result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value != 0U; value >>= 1U)
- {
- result <<= 1U;
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
-#endif
- return result;
-}
-
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ (uint8_t)__builtin_clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- return(result);
-}
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-__STATIC_FORCEINLINE void __CLREX(void)
-{
- __ASM volatile ("clrex" ::: "memory");
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] ARG1 Value to be saturated
- \param [in] ARG2 Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-__extension__ \
-({ \
- int32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] ARG1 Value to be saturated
- \param [in] ARG2 Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT(ARG1,ARG2) \
- __extension__ \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
-#endif
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
-#endif
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
- if ((sat >= 1U) && (sat <= 32U))
- {
- const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
- const int32_t min = -1 - max ;
- if (val > max)
- {
- return max;
- }
- else if (val < min)
- {
- return min;
- }
- }
- return val;
-}
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
- if (sat <= 31U)
- {
- const uint32_t max = ((1U << sat) - 1U);
- if (val > (int32_t)max)
- {
- return max;
- }
- else if (val < 0)
- {
- return 0U;
- }
- }
- return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-/**
- \brief Load-Acquire (8 bit)
- \details Executes a LDAB instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result);
-}
-
-
-/**
- \brief Load-Acquire (16 bit)
- \details Executes a LDAH instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result);
-}
-
-
-/**
- \brief Load-Acquire (32 bit)
- \details Executes a LDA instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief Store-Release (8 bit)
- \details Executes a STLB instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (16 bit)
- \details Executes a STLH instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (32 bit)
- \details Executes a STL instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Load-Acquire Exclusive (8 bit)
- \details Executes a LDAB exclusive instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result);
-}
-
-
-/**
- \brief Load-Acquire Exclusive (16 bit)
- \details Executes a LDAH exclusive instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result);
-}
-
-
-/**
- \brief Load-Acquire Exclusive (32 bit)
- \details Executes a LDA exclusive instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief Store-Release Exclusive (8 bit)
- \details Executes a STLB exclusive instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief Store-Release Exclusive (16 bit)
- \details Executes a STLH exclusive instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief Store-Release Exclusive (32 bit)
- \details Executes a STL exclusive instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- int32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-#endif
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#pragma GCC diagnostic pop
-
-#endif /* __CMSIS_GCC_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_iccarm.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_iccarm.h
deleted file mode 100644
index 3c90a2cdc39f07dc12f62c2fe493cecc04ed0f96..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_iccarm.h
+++ /dev/null
@@ -1,935 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_iccarm.h
- * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version V5.0.7
- * @date 19. June 2018
- ******************************************************************************/
-
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2017-2018 IAR Systems
-//
-// Licensed under the Apache License, Version 2.0 (the "License")
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-//
-//------------------------------------------------------------------------------
-
-
-#ifndef __CMSIS_ICCARM_H__
-#define __CMSIS_ICCARM_H__
-
-#ifndef __ICCARM__
- #error This file should only be compiled by ICCARM
-#endif
-
-#pragma system_include
-
-#define __IAR_FT _Pragma("inline=forced") __intrinsic
-
-#if (__VER__ >= 8000000)
- #define __ICCARM_V8 1
-#else
- #define __ICCARM_V8 0
-#endif
-
-#ifndef __ALIGNED
- #if __ICCARM_V8
- #define __ALIGNED(x) __attribute__((aligned(x)))
- #elif (__VER__ >= 7080000)
- /* Needs IAR language extensions */
- #define __ALIGNED(x) __attribute__((aligned(x)))
- #else
- #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
- #define __ALIGNED(x)
- #endif
-#endif
-
-
-/* Define compiler macros for CPU architecture, used in CMSIS 5.
- */
-#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
-/* Macros already defined */
-#else
- #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
- #define __ARM_ARCH_8M_MAIN__ 1
- #elif defined(__ARM8M_BASELINE__)
- #define __ARM_ARCH_8M_BASE__ 1
- #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
- #if __ARM_ARCH == 6
- #define __ARM_ARCH_6M__ 1
- #elif __ARM_ARCH == 7
- #if __ARM_FEATURE_DSP
- #define __ARM_ARCH_7EM__ 1
- #else
- #define __ARM_ARCH_7M__ 1
- #endif
- #endif /* __ARM_ARCH */
- #endif /* __ARM_ARCH_PROFILE == 'M' */
-#endif
-
-/* Alternativ core deduction for older ICCARM's */
-#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
- !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
- #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
- #define __ARM_ARCH_6M__ 1
- #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
- #define __ARM_ARCH_7M__ 1
- #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
- #define __ARM_ARCH_7EM__ 1
- #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
- #define __ARM_ARCH_8M_BASE__ 1
- #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
- #define __ARM_ARCH_8M_MAIN__ 1
- #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
- #define __ARM_ARCH_8M_MAIN__ 1
- #else
- #error "Unknown target."
- #endif
-#endif
-
-
-
-#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
- #define __IAR_M0_FAMILY 1
-#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
- #define __IAR_M0_FAMILY 1
-#else
- #define __IAR_M0_FAMILY 0
-#endif
-
-
-#ifndef __ASM
- #define __ASM __asm
-#endif
-
-#ifndef __INLINE
- #define __INLINE inline
-#endif
-
-#ifndef __NO_RETURN
- #if __ICCARM_V8
- #define __NO_RETURN __attribute__((__noreturn__))
- #else
- #define __NO_RETURN _Pragma("object_attribute=__noreturn")
- #endif
-#endif
-
-#ifndef __PACKED
- #if __ICCARM_V8
- #define __PACKED __attribute__((packed, aligned(1)))
- #else
- /* Needs IAR language extensions */
- #define __PACKED __packed
- #endif
-#endif
-
-#ifndef __PACKED_STRUCT
- #if __ICCARM_V8
- #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
- #else
- /* Needs IAR language extensions */
- #define __PACKED_STRUCT __packed struct
- #endif
-#endif
-
-#ifndef __PACKED_UNION
- #if __ICCARM_V8
- #define __PACKED_UNION union __attribute__((packed, aligned(1)))
- #else
- /* Needs IAR language extensions */
- #define __PACKED_UNION __packed union
- #endif
-#endif
-
-#ifndef __RESTRICT
- #define __RESTRICT __restrict
-#endif
-
-#ifndef __STATIC_INLINE
- #define __STATIC_INLINE static inline
-#endif
-
-#ifndef __FORCEINLINE
- #define __FORCEINLINE _Pragma("inline=forced")
-#endif
-
-#ifndef __STATIC_FORCEINLINE
- #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
-#endif
-
-#ifndef __UNALIGNED_UINT16_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
-{
- return *(__packed uint16_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
-#endif
-
-
-#ifndef __UNALIGNED_UINT16_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
-{
- *(__packed uint16_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
-{
- return *(__packed uint32_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
-#endif
-
-#ifndef __UNALIGNED_UINT32_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
-{
- *(__packed uint32_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32 /* deprecated */
-#pragma language=save
-#pragma language=extended
-__packed struct __iar_u32 { uint32_t v; };
-#pragma language=restore
-#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
-#endif
-
-#ifndef __USED
- #if __ICCARM_V8
- #define __USED __attribute__((used))
- #else
- #define __USED _Pragma("__root")
- #endif
-#endif
-
-#ifndef __WEAK
- #if __ICCARM_V8
- #define __WEAK __attribute__((weak))
- #else
- #define __WEAK _Pragma("__weak")
- #endif
-#endif
-
-
-#ifndef __ICCARM_INTRINSICS_VERSION__
- #define __ICCARM_INTRINSICS_VERSION__ 0
-#endif
-
-#if __ICCARM_INTRINSICS_VERSION__ == 2
-
- #if defined(__CLZ)
- #undef __CLZ
- #endif
- #if defined(__REVSH)
- #undef __REVSH
- #endif
- #if defined(__RBIT)
- #undef __RBIT
- #endif
- #if defined(__SSAT)
- #undef __SSAT
- #endif
- #if defined(__USAT)
- #undef __USAT
- #endif
-
- #include "iccarm_builtin.h"
-
- #define __disable_fault_irq __iar_builtin_disable_fiq
- #define __disable_irq __iar_builtin_disable_interrupt
- #define __enable_fault_irq __iar_builtin_enable_fiq
- #define __enable_irq __iar_builtin_enable_interrupt
- #define __arm_rsr __iar_builtin_rsr
- #define __arm_wsr __iar_builtin_wsr
-
-
- #define __get_APSR() (__arm_rsr("APSR"))
- #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
- #define __get_CONTROL() (__arm_rsr("CONTROL"))
- #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
-
- #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
- #define __get_FPSCR() (__arm_rsr("FPSCR"))
- #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
- #else
- #define __get_FPSCR() ( 0 )
- #define __set_FPSCR(VALUE) ((void)VALUE)
- #endif
-
- #define __get_IPSR() (__arm_rsr("IPSR"))
- #define __get_MSP() (__arm_rsr("MSP"))
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- #define __get_MSPLIM() (0U)
- #else
- #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
- #endif
- #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
- #define __get_PSP() (__arm_rsr("PSP"))
-
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- #define __get_PSPLIM() (0U)
- #else
- #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
- #endif
-
- #define __get_xPSR() (__arm_rsr("xPSR"))
-
- #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
- #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
- #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
- #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
- #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
-
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- #define __set_MSPLIM(VALUE) ((void)(VALUE))
- #else
- #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
- #endif
- #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
- #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- #define __set_PSPLIM(VALUE) ((void)(VALUE))
- #else
- #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
- #endif
-
- #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
- #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
- #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
- #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
- #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
- #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
- #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
- #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
- #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
- #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
- #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
- #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
- #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
- #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
-
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- #define __TZ_get_PSPLIM_NS() (0U)
- #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
- #else
- #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
- #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
- #endif
-
- #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
- #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
-
- #define __NOP __iar_builtin_no_operation
-
- #define __CLZ __iar_builtin_CLZ
- #define __CLREX __iar_builtin_CLREX
-
- #define __DMB __iar_builtin_DMB
- #define __DSB __iar_builtin_DSB
- #define __ISB __iar_builtin_ISB
-
- #define __LDREXB __iar_builtin_LDREXB
- #define __LDREXH __iar_builtin_LDREXH
- #define __LDREXW __iar_builtin_LDREX
-
- #define __RBIT __iar_builtin_RBIT
- #define __REV __iar_builtin_REV
- #define __REV16 __iar_builtin_REV16
-
- __IAR_FT int16_t __REVSH(int16_t val)
- {
- return (int16_t) __iar_builtin_REVSH(val);
- }
-
- #define __ROR __iar_builtin_ROR
- #define __RRX __iar_builtin_RRX
-
- #define __SEV __iar_builtin_SEV
-
- #if !__IAR_M0_FAMILY
- #define __SSAT __iar_builtin_SSAT
- #endif
-
- #define __STREXB __iar_builtin_STREXB
- #define __STREXH __iar_builtin_STREXH
- #define __STREXW __iar_builtin_STREX
-
- #if !__IAR_M0_FAMILY
- #define __USAT __iar_builtin_USAT
- #endif
-
- #define __WFE __iar_builtin_WFE
- #define __WFI __iar_builtin_WFI
-
- #if __ARM_MEDIA__
- #define __SADD8 __iar_builtin_SADD8
- #define __QADD8 __iar_builtin_QADD8
- #define __SHADD8 __iar_builtin_SHADD8
- #define __UADD8 __iar_builtin_UADD8
- #define __UQADD8 __iar_builtin_UQADD8
- #define __UHADD8 __iar_builtin_UHADD8
- #define __SSUB8 __iar_builtin_SSUB8
- #define __QSUB8 __iar_builtin_QSUB8
- #define __SHSUB8 __iar_builtin_SHSUB8
- #define __USUB8 __iar_builtin_USUB8
- #define __UQSUB8 __iar_builtin_UQSUB8
- #define __UHSUB8 __iar_builtin_UHSUB8
- #define __SADD16 __iar_builtin_SADD16
- #define __QADD16 __iar_builtin_QADD16
- #define __SHADD16 __iar_builtin_SHADD16
- #define __UADD16 __iar_builtin_UADD16
- #define __UQADD16 __iar_builtin_UQADD16
- #define __UHADD16 __iar_builtin_UHADD16
- #define __SSUB16 __iar_builtin_SSUB16
- #define __QSUB16 __iar_builtin_QSUB16
- #define __SHSUB16 __iar_builtin_SHSUB16
- #define __USUB16 __iar_builtin_USUB16
- #define __UQSUB16 __iar_builtin_UQSUB16
- #define __UHSUB16 __iar_builtin_UHSUB16
- #define __SASX __iar_builtin_SASX
- #define __QASX __iar_builtin_QASX
- #define __SHASX __iar_builtin_SHASX
- #define __UASX __iar_builtin_UASX
- #define __UQASX __iar_builtin_UQASX
- #define __UHASX __iar_builtin_UHASX
- #define __SSAX __iar_builtin_SSAX
- #define __QSAX __iar_builtin_QSAX
- #define __SHSAX __iar_builtin_SHSAX
- #define __USAX __iar_builtin_USAX
- #define __UQSAX __iar_builtin_UQSAX
- #define __UHSAX __iar_builtin_UHSAX
- #define __USAD8 __iar_builtin_USAD8
- #define __USADA8 __iar_builtin_USADA8
- #define __SSAT16 __iar_builtin_SSAT16
- #define __USAT16 __iar_builtin_USAT16
- #define __UXTB16 __iar_builtin_UXTB16
- #define __UXTAB16 __iar_builtin_UXTAB16
- #define __SXTB16 __iar_builtin_SXTB16
- #define __SXTAB16 __iar_builtin_SXTAB16
- #define __SMUAD __iar_builtin_SMUAD
- #define __SMUADX __iar_builtin_SMUADX
- #define __SMMLA __iar_builtin_SMMLA
- #define __SMLAD __iar_builtin_SMLAD
- #define __SMLADX __iar_builtin_SMLADX
- #define __SMLALD __iar_builtin_SMLALD
- #define __SMLALDX __iar_builtin_SMLALDX
- #define __SMUSD __iar_builtin_SMUSD
- #define __SMUSDX __iar_builtin_SMUSDX
- #define __SMLSD __iar_builtin_SMLSD
- #define __SMLSDX __iar_builtin_SMLSDX
- #define __SMLSLD __iar_builtin_SMLSLD
- #define __SMLSLDX __iar_builtin_SMLSLDX
- #define __SEL __iar_builtin_SEL
- #define __QADD __iar_builtin_QADD
- #define __QSUB __iar_builtin_QSUB
- #define __PKHBT __iar_builtin_PKHBT
- #define __PKHTB __iar_builtin_PKHTB
- #endif
-
-#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
- #if __IAR_M0_FAMILY
- /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
- #define __CLZ __cmsis_iar_clz_not_active
- #define __SSAT __cmsis_iar_ssat_not_active
- #define __USAT __cmsis_iar_usat_not_active
- #define __RBIT __cmsis_iar_rbit_not_active
- #define __get_APSR __cmsis_iar_get_APSR_not_active
- #endif
-
-
- #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
- #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
- #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
- #endif
-
- #ifdef __INTRINSICS_INCLUDED
- #error intrinsics.h is already included previously!
- #endif
-
- #include <intrinsics.h>
-
- #if __IAR_M0_FAMILY
- /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
- #undef __CLZ
- #undef __SSAT
- #undef __USAT
- #undef __RBIT
- #undef __get_APSR
-
- __STATIC_INLINE uint8_t __CLZ(uint32_t data)
- {
- if (data == 0U) { return 32U; }
-
- uint32_t count = 0U;
- uint32_t mask = 0x80000000U;
-
- while ((data & mask) == 0U)
- {
- count += 1U;
- mask = mask >> 1U;
- }
- return count;
- }
-
- __STATIC_INLINE uint32_t __RBIT(uint32_t v)
- {
- uint8_t sc = 31U;
- uint32_t r = v;
- for (v >>= 1U; v; v >>= 1U)
- {
- r <<= 1U;
- r |= v & 1U;
- sc--;
- }
- return (r << sc);
- }
-
- __STATIC_INLINE uint32_t __get_APSR(void)
- {
- uint32_t res;
- __asm("MRS %0,APSR" : "=r" (res));
- return res;
- }
-
- #endif
-
- #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
- #undef __get_FPSCR
- #undef __set_FPSCR
- #define __get_FPSCR() (0)
- #define __set_FPSCR(VALUE) ((void)VALUE)
- #endif
-
- #pragma diag_suppress=Pe940
- #pragma diag_suppress=Pe177
-
- #define __enable_irq __enable_interrupt
- #define __disable_irq __disable_interrupt
- #define __NOP __no_operation
-
- #define __get_xPSR __get_PSR
-
- #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
-
- __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
- {
- return __LDREX((unsigned long *)ptr);
- }
-
- __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
- {
- return __STREX(value, (unsigned long *)ptr);
- }
- #endif
-
-
- /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
- #if (__CORTEX_M >= 0x03)
-
- __IAR_FT uint32_t __RRX(uint32_t value)
- {
- uint32_t result;
- __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
- return(result);
- }
-
- __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
- {
- __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
- }
-
-
- #define __enable_fault_irq __enable_fiq
- #define __disable_fault_irq __disable_fiq
-
-
- #endif /* (__CORTEX_M >= 0x03) */
-
- __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
- {
- return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
- }
-
- #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-
- __IAR_FT uint32_t __get_MSPLIM(void)
- {
- uint32_t res;
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- res = 0U;
- #else
- __asm volatile("MRS %0,MSPLIM" : "=r" (res));
- #endif
- return res;
- }
-
- __IAR_FT void __set_MSPLIM(uint32_t value)
- {
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure MSPLIM is RAZ/WI
- (void)value;
- #else
- __asm volatile("MSR MSPLIM,%0" :: "r" (value));
- #endif
- }
-
- __IAR_FT uint32_t __get_PSPLIM(void)
- {
- uint32_t res;
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- res = 0U;
- #else
- __asm volatile("MRS %0,PSPLIM" : "=r" (res));
- #endif
- return res;
- }
-
- __IAR_FT void __set_PSPLIM(uint32_t value)
- {
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)value;
- #else
- __asm volatile("MSR PSPLIM,%0" :: "r" (value));
- #endif
- }
-
- __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
- {
- __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_PSP_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,PSP_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
- {
- __asm volatile("MSR PSP_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_MSP_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,MSP_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
- {
- __asm volatile("MSR MSP_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_SP_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,SP_NS" : "=r" (res));
- return res;
- }
- __IAR_FT void __TZ_set_SP_NS(uint32_t value)
- {
- __asm volatile("MSR SP_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
- {
- __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
- {
- __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
- {
- __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
- }
-
- __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
- {
- uint32_t res;
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- res = 0U;
- #else
- __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
- #endif
- return res;
- }
-
- __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
- {
- #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
- // without main extensions, the non-secure PSPLIM is RAZ/WI
- (void)value;
- #else
- __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
- #endif
- }
-
- __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
- {
- uint32_t res;
- __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
- return res;
- }
-
- __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
- {
- __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
- }
-
- #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
-
-#if __IAR_M0_FAMILY
- __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
- {
- if ((sat >= 1U) && (sat <= 32U))
- {
- const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
- const int32_t min = -1 - max ;
- if (val > max)
- {
- return max;
- }
- else if (val < min)
- {
- return min;
- }
- }
- return val;
- }
-
- __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
- {
- if (sat <= 31U)
- {
- const uint32_t max = ((1U << sat) - 1U);
- if (val > (int32_t)max)
- {
- return max;
- }
- else if (val < 0)
- {
- return 0U;
- }
- }
- return (uint32_t)val;
- }
-#endif
-
-#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-
- __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
- {
- uint32_t res;
- __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
- return ((uint8_t)res);
- }
-
- __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
- {
- uint32_t res;
- __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
- return ((uint16_t)res);
- }
-
- __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
- {
- uint32_t res;
- __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
- return res;
- }
-
- __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
- {
- __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
- }
-
- __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
- {
- __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
- }
-
- __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
- {
- __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
- }
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-
-
- __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return ((uint8_t)res);
- }
-
- __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return ((uint16_t)res);
- }
-
- __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return res;
- }
-
- __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
- {
- __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
- }
-
- __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
- {
- __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
- }
-
- __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
- {
- __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
- }
-
- __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return ((uint8_t)res);
- }
-
- __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return ((uint16_t)res);
- }
-
- __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
- return res;
- }
-
- __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
- return res;
- }
-
- __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
- return res;
- }
-
- __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
- {
- uint32_t res;
- __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
- return res;
- }
-
-#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#undef __IAR_FT
-#undef __IAR_M0_FAMILY
-#undef __ICCARM_V8
-
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
-
-#endif /* __CMSIS_ICCARM_H__ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_version.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_version.h
deleted file mode 100644
index ae3f2e33d821052ff25314ee2749dfb317db4990..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/cmsis_version.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/**************************************************************************//**
- * @file cmsis_version.h
- * @brief CMSIS Core(M) Version definitions
- * @version V5.0.2
- * @date 19. April 2017
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CMSIS_VERSION_H
-#define __CMSIS_VERSION_H
-
-/* CMSIS Version definitions */
-#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
-#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
- __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
-#endif
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mbl.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mbl.h
deleted file mode 100644
index ec76ab218bb5d27415a4b1eb663256bede3a1073..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mbl.h
+++ /dev/null
@@ -1,1918 +0,0 @@
-/**************************************************************************//**
- * @file core_armv8mbl.h
- * @brief CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
- * @version V5.0.7
- * @date 22. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_ARMV8MBL_H_GENERIC
-#define __CORE_ARMV8MBL_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_ARMv8MBL
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS definitions */
-#define __ARMv8MBL_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MBL_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __ARMv8MBL_CMSIS_VERSION ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \
- __ARMv8MBL_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M ( 2U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MBL_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_ARMV8MBL_H_DEPENDANT
-#define __CORE_ARMV8MBL_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __ARMv8MBL_REV
- #define __ARMv8MBL_REV 0x0000U
- #warning "__ARMv8MBL_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __SAUREGION_PRESENT
- #define __SAUREGION_PRESENT 0U
- #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __VTOR_PRESENT
- #define __VTOR_PRESENT 0U
- #warning "__VTOR_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-
- #ifndef __ETM_PRESENT
- #define __ETM_PRESENT 0U
- #warning "__ETM_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MTB_PRESENT
- #define __MTB_PRESENT 0U
- #warning "__MTB_PRESENT not defined in device header file; using default!"
- #endif
-
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group ARMv8MBL */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core SAU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[16U];
- __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[16U];
- __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[16U];
- __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[16U];
- __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[16U];
- __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */
- uint32_t RESERVED5[16U];
- __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
-#else
- uint32_t RESERVED0;
-#endif
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- uint32_t RESERVED0[6U];
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- uint32_t RESERVED3[1U];
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED4[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- uint32_t RESERVED5[1U];
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED6[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- uint32_t RESERVED7[1U];
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED8[1U];
- __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */
- uint32_t RESERVED9[1U];
- __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */
- uint32_t RESERVED10[1U];
- __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */
- uint32_t RESERVED11[1U];
- __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */
- uint32_t RESERVED12[1U];
- __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */
- uint32_t RESERVED13[1U];
- __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */
- uint32_t RESERVED14[1U];
- __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */
- uint32_t RESERVED15[1U];
- __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */
- uint32_t RESERVED16[1U];
- __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */
- uint32_t RESERVED17[1U];
- __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */
- uint32_t RESERVED18[1U];
- __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */
- uint32_t RESERVED19[1U];
- __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */
- uint32_t RESERVED20[1U];
- __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */
- uint32_t RESERVED21[1U];
- __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */
- uint32_t RESERVED22[1U];
- __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */
- uint32_t RESERVED23[1U];
- __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */
- uint32_t RESERVED24[1U];
- __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */
- uint32_t RESERVED25[1U];
- __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */
- uint32_t RESERVED26[1U];
- __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */
- uint32_t RESERVED27[1U];
- __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */
- uint32_t RESERVED28[1U];
- __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */
- uint32_t RESERVED29[1U];
- __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */
- uint32_t RESERVED30[1U];
- __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */
- uint32_t RESERVED31[1U];
- __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */
- uint32_t RESERVED3[809U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */
- uint32_t RESERVED4[4U];
- __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */
-#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI Periodic Synchronization Control Register Definitions */
-#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */
-#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */
-
-/* TPI Software Lock Status Register Definitions */
-#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */
-#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */
-
-#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */
-#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */
-
-#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */
-#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */
-#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */
- uint32_t RESERVED0[7U];
- union {
- __IOM uint32_t MAIR[2];
- struct {
- __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
- __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
- };
- };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */
-#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SAU Security Attribution Unit (SAU)
- \brief Type definitions for the Security Attribution Unit (SAU)
- @{
- */
-
-/**
- \brief Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */
- __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */
-#endif
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
- uint32_t RESERVED4[1U];
- __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */
- __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */
-#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
- #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
- #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
- #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
- #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
- #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
- #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
- #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-
- #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
- #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
- #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
- #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
- #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
- #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
- #endif
-
- #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */
- #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */
- #endif
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */
- #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */
- #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */
- #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */
- #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
-
- #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */
- #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */
- #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
- #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */
- #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */
- #endif
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
-#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
-#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
-#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
-#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
-#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
-#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
-#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
-#else
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
-#endif
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping() (0U)
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Interrupt Target State
- \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- \return 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Target State
- \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Clear Interrupt Target State
- \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- If VTOR is not present address 0 must be mapped to SRAM.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Enable Interrupt (non-secure)
- \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status (non-secure)
- \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt (non-secure)
- \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Pending Interrupt (non-secure)
- \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt (non-secure)
- \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt (non-secure)
- \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt (non-secure)
- \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority (non-secure)
- \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority (non-secure)
- \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## SAU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SAUFunctions SAU Functions
- \brief Functions that configure the SAU.
- @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
- \brief Enable SAU
- \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
- SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
- \brief Disable SAU
- \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
- SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief System Tick Configuration (non-secure)
- \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MBL_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mml.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mml.h
deleted file mode 100644
index 2d0f106775eaf61e291ac4f7afeb62ddf4eb7646..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_armv8mml.h
+++ /dev/null
@@ -1,2927 +0,0 @@
-/**************************************************************************//**
- * @file core_armv8mml.h
- * @brief CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
- * @version V5.0.7
- * @date 06. July 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_ARMV8MML_H_GENERIC
-#define __CORE_ARMV8MML_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_ARMv8MML
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS Armv8MML definitions */
-#define __ARMv8MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __ARMv8MML_CMSIS_VERSION ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \
- __ARMv8MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (81U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined(__ARM_FEATURE_DSP)
- #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined(__ARM_FEATURE_DSP)
- #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined(__ARM_FEATURE_DSP)
- #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined(__ARM_FEATURE_DSP)
- #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MML_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_ARMV8MML_H_DEPENDANT
-#define __CORE_ARMV8MML_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __ARMv8MML_REV
- #define __ARMv8MML_REV 0x0000U
- #warning "__ARMv8MML_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __SAUREGION_PRESENT
- #define __SAUREGION_PRESENT 0U
- #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DSP_PRESENT
- #define __DSP_PRESENT 0U
- #warning "__DSP_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group ARMv8MML */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core SAU Register
- - Core FPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16U /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */
- uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */
- uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */
- uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[16U];
- __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[16U];
- __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[16U];
- __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[16U];
- __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[16U];
- __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */
- uint32_t RESERVED5[16U];
- __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED6[580U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */
- __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */
- __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */
- __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
- __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */
- uint32_t RESERVED3[92U];
- __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */
- uint32_t RESERVED4[15U];
- __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */
- __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */
- uint32_t RESERVED5[1U];
- __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */
- uint32_t RESERVED6[1U];
- __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */
- __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */
- __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */
- __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */
- __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */
- __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */
- __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */
- __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */
- uint32_t RESERVED7[6U];
- __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */
- __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */
- __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */
- __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */
- __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */
- uint32_t RESERVED8[1U];
- __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
- __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[1U];
- __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */
- uint32_t RESERVED6[4U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- uint32_t RESERVED3[1U];
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED4[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- uint32_t RESERVED5[1U];
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED6[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- uint32_t RESERVED7[1U];
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED8[1U];
- __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */
- uint32_t RESERVED9[1U];
- __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */
- uint32_t RESERVED10[1U];
- __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */
- uint32_t RESERVED11[1U];
- __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */
- uint32_t RESERVED12[1U];
- __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */
- uint32_t RESERVED13[1U];
- __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */
- uint32_t RESERVED14[1U];
- __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */
- uint32_t RESERVED15[1U];
- __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */
- uint32_t RESERVED16[1U];
- __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */
- uint32_t RESERVED17[1U];
- __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */
- uint32_t RESERVED18[1U];
- __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */
- uint32_t RESERVED19[1U];
- __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */
- uint32_t RESERVED20[1U];
- __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */
- uint32_t RESERVED21[1U];
- __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */
- uint32_t RESERVED22[1U];
- __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */
- uint32_t RESERVED23[1U];
- __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */
- uint32_t RESERVED24[1U];
- __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */
- uint32_t RESERVED25[1U];
- __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */
- uint32_t RESERVED26[1U];
- __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */
- uint32_t RESERVED27[1U];
- __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */
- uint32_t RESERVED28[1U];
- __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */
- uint32_t RESERVED29[1U];
- __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */
- uint32_t RESERVED30[1U];
- __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */
- uint32_t RESERVED31[1U];
- __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */
- uint32_t RESERVED32[934U];
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */
- uint32_t RESERVED33[1U];
- __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */
- uint32_t RESERVED3[809U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */
- uint32_t RESERVED4[4U];
- __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */
-#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI Periodic Synchronization Control Register Definitions */
-#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */
-#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */
-
-/* TPI Software Lock Status Register Definitions */
-#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */
-#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */
-
-#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */
-#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */
-
-#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */
-#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */
-#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */
- __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */
- __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */
- __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */
- uint32_t RESERVED0[1];
- union {
- __IOM uint32_t MAIR[2];
- struct {
- __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
- __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
- };
- };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SAU Security Attribution Unit (SAU)
- \brief Type definitions for the Security Attribution Unit (SAU)
- @{
- */
-
-/**
- \brief Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */
- __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */
-#else
- uint32_t RESERVED0[3];
-#endif
- __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */
- __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/**
- \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
- uint32_t RESERVED4[1U];
- __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */
- __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
- #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
- #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
- #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
- #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
- #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
- #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
- #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
- #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
- #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
- #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
- #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
- #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
- #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
- #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
- #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
- #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
- #endif
-
- #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */
- #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */
- #endif
-
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */
- #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */
- #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */
- #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */
- #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
-
- #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */
- #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */
- #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */
- #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
- #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */
- #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */
- #endif
-
- #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */
- #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
-#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
-#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
-#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
-#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
-#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
-#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
-#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
-#else
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
-#endif
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Interrupt Target State
- \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- \return 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Target State
- \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Clear Interrupt Target State
- \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Priority Grouping (non-secure)
- \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB_NS->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
- SCB_NS->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping (non-secure)
- \details Reads the priority grouping field from the non-secure NVIC when in secure state.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
- return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt (non-secure)
- \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status (non-secure)
- \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt (non-secure)
- \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Pending Interrupt (non-secure)
- \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt (non-secure)
- \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt (non-secure)
- \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt (non-secure)
- \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority (non-secure)
- \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority (non-secure)
- \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- uint32_t mvfr0;
-
- mvfr0 = FPU->MVFR0;
- if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
- {
- return 2U; /* Double + Single precision FPU */
- }
- else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
- {
- return 1U; /* Single precision FPU */
- }
- else
- {
- return 0U; /* No FPU */
- }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## SAU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SAUFunctions SAU Functions
- \brief Functions that configure the SAU.
- @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
- \brief Enable SAU
- \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
- SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
- \brief Disable SAU
- \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
- SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief System Tick Configuration (non-secure)
- \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MML_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0.h
deleted file mode 100644
index 6f82227c6b40f8f5a3577685270f29d8e275d2f7..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0.h
+++ /dev/null
@@ -1,949 +0,0 @@
-/**************************************************************************//**
- * @file core_cm0.h
- * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version V5.0.5
- * @date 28. May 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M0
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
- __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (0U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0_REV
- #define __CM0_REV 0x0000U
- #warning "__CM0_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:1; /*!< bit: 0 Reserved */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31U];
- __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31U];
- __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31U];
- __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31U];
- uint32_t RESERVED4[64U];
- __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- uint32_t RESERVED0;
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
- Therefore they are not covered by the Cortex-M0 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping() (0U)
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- Address 0 must be mapped to SRAM.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)0x0U;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)0x0U;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0plus.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0plus.h
deleted file mode 100644
index b9377e8c78357648918fb3247b9aba24a1f01a7e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm0plus.h
+++ /dev/null
@@ -1,1083 +0,0 @@
-/**************************************************************************//**
- * @file core_cm0plus.h
- * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version V5.0.6
- * @date 28. May 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0PLUS_H_GENERIC
-#define __CORE_CM0PLUS_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex-M0+
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM0+ definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
- __CM0PLUS_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (0U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0PLUS_H_DEPENDANT
-#define __CORE_CM0PLUS_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0PLUS_REV
- #define __CM0PLUS_REV 0x0000U
- #warning "__CM0PLUS_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __VTOR_PRESENT
- #define __VTOR_PRESENT 0U
- #warning "__VTOR_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex-M0+ */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core MPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31U];
- __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31U];
- __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31U];
- __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31U];
- uint32_t RESERVED4[64U];
- __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
-#else
- uint32_t RESERVED0;
-#endif
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
- Therefore they are not covered by the Cortex-M0+ header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping() (0U)
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- If VTOR is not present address 0 must be mapped to SRAM.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm1.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm1.h
deleted file mode 100644
index fd1c4077d270cce8716e33f8e2a3c1c28711029a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm1.h
+++ /dev/null
@@ -1,976 +0,0 @@
-/**************************************************************************//**
- * @file core_cm1.h
- * @brief CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version V1.0.0
- * @date 23. July 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM1_H_GENERIC
-#define __CORE_CM1_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M1
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM1 definitions */
-#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
- __CM1_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (1U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM1_H_DEPENDANT
-#define __CORE_CM1_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM1_REV
- #define __CM1_REV 0x0100U
- #warning "__CM1_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M1 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:1; /*!< bit: 0 Reserved */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31U];
- __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31U];
- __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31U];
- __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31U];
- uint32_t RESERVED4[64U];
- __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- uint32_t RESERVED0;
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_ITCMUAEN_Pos 4U /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMUAEN_Msk (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos) /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
-
-#define SCnSCB_ACTLR_ITCMLAEN_Pos 3U /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMLAEN_Msk (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos) /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
- Therefore they are not covered by the Cortex-M1 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M1 */
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping() (0U)
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- Address 0 must be mapped to SRAM.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)0x0U;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)0x0U;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm23.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm23.h
deleted file mode 100644
index 8202a8ddfcdd5f628cd9c0c45c8dd7cb778804bf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm23.h
+++ /dev/null
@@ -1,1993 +0,0 @@
-/**************************************************************************//**
- * @file core_cm23.h
- * @brief CMSIS Cortex-M23 Core Peripheral Access Layer Header File
- * @version V5.0.7
- * @date 22. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM23_H_GENERIC
-#define __CORE_CM23_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M23
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS definitions */
-#define __CM23_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM23_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM23_CMSIS_VERSION ((__CM23_CMSIS_VERSION_MAIN << 16U) | \
- __CM23_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (23U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM23_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM23_H_DEPENDANT
-#define __CORE_CM23_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM23_REV
- #define __CM23_REV 0x0000U
- #warning "__CM23_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __SAUREGION_PRESENT
- #define __SAUREGION_PRESENT 0U
- #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __VTOR_PRESENT
- #define __VTOR_PRESENT 0U
- #warning "__VTOR_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-
- #ifndef __ETM_PRESENT
- #define __ETM_PRESENT 0U
- #warning "__ETM_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MTB_PRESENT
- #define __MTB_PRESENT 0U
- #warning "__MTB_PRESENT not defined in device header file; using default!"
- #endif
-
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M23 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core SAU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[16U];
- __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[16U];
- __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[16U];
- __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[16U];
- __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[16U];
- __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */
- uint32_t RESERVED5[16U];
- __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
-#else
- uint32_t RESERVED0;
-#endif
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- uint32_t RESERVED0[6U];
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- uint32_t RESERVED3[1U];
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED4[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- uint32_t RESERVED5[1U];
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED6[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- uint32_t RESERVED7[1U];
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED8[1U];
- __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */
- uint32_t RESERVED9[1U];
- __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */
- uint32_t RESERVED10[1U];
- __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */
- uint32_t RESERVED11[1U];
- __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */
- uint32_t RESERVED12[1U];
- __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */
- uint32_t RESERVED13[1U];
- __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */
- uint32_t RESERVED14[1U];
- __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */
- uint32_t RESERVED15[1U];
- __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */
- uint32_t RESERVED16[1U];
- __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */
- uint32_t RESERVED17[1U];
- __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */
- uint32_t RESERVED18[1U];
- __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */
- uint32_t RESERVED19[1U];
- __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */
- uint32_t RESERVED20[1U];
- __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */
- uint32_t RESERVED21[1U];
- __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */
- uint32_t RESERVED22[1U];
- __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */
- uint32_t RESERVED23[1U];
- __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */
- uint32_t RESERVED24[1U];
- __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */
- uint32_t RESERVED25[1U];
- __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */
- uint32_t RESERVED26[1U];
- __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */
- uint32_t RESERVED27[1U];
- __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */
- uint32_t RESERVED28[1U];
- __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */
- uint32_t RESERVED29[1U];
- __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */
- uint32_t RESERVED30[1U];
- __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */
- uint32_t RESERVED31[1U];
- __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */
- __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */
- __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration Test FIFO Test Data 0 Register Definitions */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
-#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
-#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
-#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 2 Register Definitions */
-#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */
-#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */
-#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */
-#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */
-
-#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */
-#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */
-
-/* TPI Integration Test FIFO Test Data 1 Register Definitions */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
-#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
-#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
-#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 0 Definitions */
-#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */
-#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */
-#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */
-#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */
-
-#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */
-#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */
-#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */
- uint32_t RESERVED0[7U];
- union {
- __IOM uint32_t MAIR[2];
- struct {
- __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
- __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
- };
- };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */
-#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SAU Security Attribution Unit (SAU)
- \brief Type definitions for the Security Attribution Unit (SAU)
- @{
- */
-
-/**
- \brief Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */
- __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */
-#endif
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
- uint32_t RESERVED4[1U];
- __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */
- __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */
-#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
- #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
- #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
- #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
- #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
- #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
- #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
- #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-
- #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
- #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
- #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
- #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
- #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
- #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
- #endif
-
- #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */
- #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */
- #endif
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */
- #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */
- #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */
- #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */
- #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
-
- #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */
- #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */
- #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
- #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */
- #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */
- #endif
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M23 */
-/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M23 */
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
-#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
-#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
-#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
-#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
-#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
-#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
-#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
-#else
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
-#endif
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping() (0U)
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Interrupt Target State
- \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- \return 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Target State
- \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Clear Interrupt Target State
- \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- If VTOR is not present address 0 must be mapped to SRAM.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
- uint32_t *vectors = (uint32_t *)0x0U;
-#endif
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Enable Interrupt (non-secure)
- \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status (non-secure)
- \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt (non-secure)
- \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Pending Interrupt (non-secure)
- \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt (non-secure)
- \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt (non-secure)
- \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt (non-secure)
- \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority (non-secure)
- \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority (non-secure)
- \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## SAU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SAUFunctions SAU Functions
- \brief Functions that configure the SAU.
- @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
- \brief Enable SAU
- \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
- SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
- \brief Disable SAU
- \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
- SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief System Tick Configuration (non-secure)
- \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM23_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm3.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm3.h
deleted file mode 100644
index b0dfbd3d9d43fda35afeaa03d7315f2c075601e2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm3.h
+++ /dev/null
@@ -1,1941 +0,0 @@
-/**************************************************************************//**
- * @file core_cm3.h
- * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version V5.0.8
- * @date 04. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM3_H_GENERIC
-#define __CORE_CM3_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M3
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
- __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (3U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM3_H_DEPENDANT
-#define __CORE_CM3_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM3_REV
- #define __CM3_REV 0x0200U
- #warning "__CM3_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M3 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:1; /*!< bit: 9 Reserved */
- uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
- uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit */
- uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24U];
- __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
- __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24U];
- __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24U];
- __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56U];
- __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5U];
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#else
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
-#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-#else
- uint32_t RESERVED1[1U];
-#endif
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm33.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm33.h
deleted file mode 100644
index 02f82e29bd2e4be649273f1fd8d07ba9b4b28a95..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm33.h
+++ /dev/null
@@ -1,3002 +0,0 @@
-/**************************************************************************//**
- * @file core_cm33.h
- * @brief CMSIS Cortex-M33 Core Peripheral Access Layer Header File
- * @version V5.0.9
- * @date 06. July 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM33_H_GENERIC
-#define __CORE_CM33_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M33
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM33 definitions */
-#define __CM33_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM33_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM33_CMSIS_VERSION ((__CM33_CMSIS_VERSION_MAIN << 16U) | \
- __CM33_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (33U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined (__TARGET_FPU_VFP)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
- #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined (__ARM_PCS_VFP)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
- #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
- #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined (__ARMVFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
- #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
- #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
- #define __DSP_USED 1U
- #else
- #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
- #define __DSP_USED 0U
- #endif
- #else
- #define __DSP_USED 0U
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined (__TI_VFP_SUPPORT__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined (__FPU_VFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM33_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM33_H_DEPENDANT
-#define __CORE_CM33_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM33_REV
- #define __CM33_REV 0x0000U
- #warning "__CM33_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __SAUREGION_PRESENT
- #define __SAUREGION_PRESENT 0U
- #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DSP_PRESENT
- #define __DSP_PRESENT 0U
- #warning "__DSP_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M33 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core SAU Register
- - Core FPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16U /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */
- uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */
- uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */
- uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[16U];
- __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[16U];
- __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[16U];
- __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[16U];
- __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[16U];
- __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */
- uint32_t RESERVED5[16U];
- __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED6[580U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */
- __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */
- __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */
- __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
- __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */
- uint32_t RESERVED3[92U];
- __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */
- uint32_t RESERVED4[15U];
- __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */
- __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */
- uint32_t RESERVED5[1U];
- __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */
- uint32_t RESERVED6[1U];
- __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */
- __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */
- __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */
- __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */
- __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */
- __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */
- __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */
- __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */
- uint32_t RESERVED7[6U];
- __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */
- __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */
- __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */
- __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */
- __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */
- uint32_t RESERVED8[1U];
- __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
- __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[1U];
- __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */
- uint32_t RESERVED6[4U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- uint32_t RESERVED3[1U];
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED4[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- uint32_t RESERVED5[1U];
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED6[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- uint32_t RESERVED7[1U];
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED8[1U];
- __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */
- uint32_t RESERVED9[1U];
- __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */
- uint32_t RESERVED10[1U];
- __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */
- uint32_t RESERVED11[1U];
- __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */
- uint32_t RESERVED12[1U];
- __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */
- uint32_t RESERVED13[1U];
- __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */
- uint32_t RESERVED14[1U];
- __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */
- uint32_t RESERVED15[1U];
- __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */
- uint32_t RESERVED16[1U];
- __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */
- uint32_t RESERVED17[1U];
- __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */
- uint32_t RESERVED18[1U];
- __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */
- uint32_t RESERVED19[1U];
- __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */
- uint32_t RESERVED20[1U];
- __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */
- uint32_t RESERVED21[1U];
- __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */
- uint32_t RESERVED22[1U];
- __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */
- uint32_t RESERVED23[1U];
- __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */
- uint32_t RESERVED24[1U];
- __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */
- uint32_t RESERVED25[1U];
- __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */
- uint32_t RESERVED26[1U];
- __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */
- uint32_t RESERVED27[1U];
- __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */
- uint32_t RESERVED28[1U];
- __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */
- uint32_t RESERVED29[1U];
- __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */
- uint32_t RESERVED30[1U];
- __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */
- uint32_t RESERVED31[1U];
- __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */
- uint32_t RESERVED32[934U];
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */
- uint32_t RESERVED33[1U];
- __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */
- __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */
- __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration Test FIFO Test Data 0 Register Definitions */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
-#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
-#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
-#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 2 Register Definitions */
-#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */
-#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */
-#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */
-#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */
-
-#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */
-#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */
-
-/* TPI Integration Test FIFO Test Data 1 Register Definitions */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
-#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
-#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
-#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 0 Definitions */
-#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */
-#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */
-#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */
-#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */
-
-#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */
-#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */
-#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */
- __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */
- __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */
- __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */
- uint32_t RESERVED0[1];
- union {
- __IOM uint32_t MAIR[2];
- struct {
- __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
- __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
- };
- };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SAU Security Attribution Unit (SAU)
- \brief Type definitions for the Security Attribution Unit (SAU)
- @{
- */
-
-/**
- \brief Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */
- __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */
- __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */
-#else
- uint32_t RESERVED0[3];
-#endif
- __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */
- __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/**
- \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
- uint32_t RESERVED4[1U];
- __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */
- __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
- #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
- #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
- #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
- #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
- #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
- #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
- #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
- #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
- #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
- #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
- #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
- #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
- #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
- #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
- #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
- #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
- #endif
-
- #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */
- #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */
- #endif
-
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
- #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */
- #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */
- #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */
- #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */
- #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */
-
- #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */
- #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */
- #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */
- #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */
- #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */
-
- #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */
- #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */
- #endif
-
- #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */
- #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
-#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
-#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
-#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
-#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
-#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
-#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
-#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
-#else
-#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
-#endif
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priority group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Interrupt Target State
- \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- \return 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Target State
- \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Clear Interrupt Target State
- \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 if interrupt is assigned to Secure
- 1 if interrupt is assigned to Non Secure
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
- return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Priority Grouping (non-secure)
- \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB_NS->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- SCB_NS->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping (non-secure)
- \details Reads the priority grouping field from the non-secure NVIC when in secure state.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
- return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt (non-secure)
- \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status (non-secure)
- \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt (non-secure)
- \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Pending Interrupt (non-secure)
- \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt (non-secure)
- \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt (non-secure)
- \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt (non-secure)
- \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority (non-secure)
- \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority (non-secure)
- \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- uint32_t mvfr0;
-
- mvfr0 = FPU->MVFR0;
- if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
- {
- return 2U; /* Double + Single precision FPU */
- }
- else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
- {
- return 1U; /* Single precision FPU */
- }
- else
- {
- return 0U; /* No FPU */
- }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## SAU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SAUFunctions SAU Functions
- \brief Functions that configure the SAU.
- @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
- \brief Enable SAU
- \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
- SAU->CTRL |= (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
- \brief Disable SAU
- \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
- SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief System Tick Configuration (non-secure)
- \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM33_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm4.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm4.h
deleted file mode 100644
index 308b86813ca7b8cd37610e51d13b735fc6578232..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm4.h
+++ /dev/null
@@ -1,2129 +0,0 @@
-/**************************************************************************//**
- * @file core_cm4.h
- * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version V5.0.8
- * @date 04. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M4
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
- __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (4U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM4_REV
- #define __CM4_REV 0x0000U
- #warning "__CM4_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16U /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:1; /*!< bit: 9 Reserved */
- uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit */
- uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24U];
- __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
- __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24U];
- __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24U];
- __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56U];
- __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5U];
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/**
- \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
-#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- uint32_t mvfr0;
-
- mvfr0 = FPU->MVFR0;
- if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
- {
- return 1U; /* Single precision FPU */
- }
- else
- {
- return 0U; /* No FPU */
- }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm7.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm7.h
deleted file mode 100644
index ada6c2a57ee815a8e09c742a6dbfbeb2dc8e8855..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_cm7.h
+++ /dev/null
@@ -1,2671 +0,0 @@
-/**************************************************************************//**
- * @file core_cm7.h
- * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version V5.0.8
- * @date 04. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM7_H_GENERIC
-#define __CORE_CM7_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M7
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM7_CMSIS_VERSION_SUB ( __CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
- __CM7_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M (7U) /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM7_H_DEPENDANT
-#define __CORE_CM7_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM7_REV
- #define __CM7_REV 0x0000U
- #warning "__CM7_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __ICACHE_PRESENT
- #define __ICACHE_PRESENT 0U
- #warning "__ICACHE_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DCACHE_PRESENT
- #define __DCACHE_PRESENT 0U
- #warning "__DCACHE_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DTCM_PRESENT
- #define __DTCM_PRESENT 0U
- #warning "__DTCM_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M7 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16U /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:1; /*!< bit: 9 Reserved */
- uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit */
- uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24U];
- __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
- __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24U];
- __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24U];
- __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56U];
- __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[1U];
- __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */
- __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */
- __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */
- __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
- uint32_t RESERVED3[93U];
- __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */
- uint32_t RESERVED4[15U];
- __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */
- __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */
- uint32_t RESERVED5[1U];
- __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */
- uint32_t RESERVED6[1U];
- __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */
- __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */
- __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */
- __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */
- __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */
- __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */
- __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */
- __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */
- uint32_t RESERVED7[6U];
- __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */
- __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */
- __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */
- __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */
- __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */
- uint32_t RESERVED8[1U];
- __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */
-
-#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */
-
-#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */
-
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */
-
-#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */
-#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */
-
-#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */
-#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED3[981U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES 4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/**
- \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
- __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/* Media and FP Feature Register 2 Definitions */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
-#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ########################## MPU functions #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- uint32_t mvfr0;
-
- mvfr0 = SCB->MVFR0;
- if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
- {
- return 2U; /* Double + Single precision FPU */
- }
- else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
- {
- return 1U; /* Single precision FPU */
- }
- else
- {
- return 0U; /* No FPU */
- }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## Cache functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_CacheFunctions Cache Functions
- \brief Functions that configure Instruction and Data cache.
- @{
- */
-
-/* Cache Size ID Register Macros */
-#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
-#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
-
-
-/**
- \brief Enable I-Cache
- \details Turns on I-Cache
- */
-__STATIC_INLINE void SCB_EnableICache (void)
-{
- #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
- __DSB();
- __ISB();
- SCB->ICIALLU = 0UL; /* invalidate I-Cache */
- __DSB();
- __ISB();
- SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Disable I-Cache
- \details Turns off I-Cache
- */
-__STATIC_INLINE void SCB_DisableICache (void)
-{
- #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
- __DSB();
- __ISB();
- SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
- SCB->ICIALLU = 0UL; /* invalidate I-Cache */
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Invalidate I-Cache
- \details Invalidates I-Cache
- */
-__STATIC_INLINE void SCB_InvalidateICache (void)
-{
- #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
- __DSB();
- __ISB();
- SCB->ICIALLU = 0UL;
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Enable D-Cache
- \details Turns on D-Cache
- */
-__STATIC_INLINE void SCB_EnableDCache (void)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
-
- SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
- __DSB();
-
- ccsidr = SCB->CCSIDR;
-
- /* invalidate D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- do {
- SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
- ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- } while(sets-- != 0U);
- __DSB();
-
- SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Disable D-Cache
- \details Turns off D-Cache
- */
-__STATIC_INLINE void SCB_DisableDCache (void)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
-
- SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
- __DSB();
-
- SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
- __DSB();
-
- ccsidr = SCB->CCSIDR;
-
- /* clean & invalidate D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- do {
- SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
- ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- } while(sets-- != 0U);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Invalidate D-Cache
- \details Invalidates D-Cache
- */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
-
- SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
- __DSB();
-
- ccsidr = SCB->CCSIDR;
-
- /* invalidate D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- do {
- SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
- ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- } while(sets-- != 0U);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Clean D-Cache
- \details Cleans D-Cache
- */
-__STATIC_INLINE void SCB_CleanDCache (void)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
-
- SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
- __DSB();
-
- ccsidr = SCB->CCSIDR;
-
- /* clean D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- do {
- SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
- ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- } while(sets-- != 0U);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief Clean & Invalidate D-Cache
- \details Cleans and Invalidates D-Cache
- */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- uint32_t ccsidr;
- uint32_t sets;
- uint32_t ways;
-
- SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
- __DSB();
-
- ccsidr = SCB->CCSIDR;
-
- /* clean & invalidate D-Cache */
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- do {
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- do {
- SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
- ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
- #if defined ( __CC_ARM )
- __schedule_barrier();
- #endif
- } while (ways-- != 0U);
- } while(sets-- != 0U);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief D-Cache Invalidate by address
- \details Invalidates D-Cache for the given address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t)addr;
- int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCIMVAC = op_addr;
- op_addr += (uint32_t)linesize;
- op_size -= linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief D-Cache Clean by address
- \details Cleans D-Cache for the given address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t) addr;
- int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCCMVAC = op_addr;
- op_addr += (uint32_t)linesize;
- op_size -= linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \brief D-Cache Clean and Invalidate by address
- \details Cleans and invalidates D_Cache for the given address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t) addr;
- int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCCIMVAC = op_addr;
- op_addr += (uint32_t)linesize;
- op_size -= linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/*@} end of CMSIS_Core_CacheFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc000.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc000.h
deleted file mode 100644
index 9086c642b7f0308c0fd2a4ad966389770499a87a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc000.h
+++ /dev/null
@@ -1,1022 +0,0 @@
-/**************************************************************************//**
- * @file core_sc000.h
- * @brief CMSIS SC000 Core Peripheral Access Layer Header File
- * @version V5.0.5
- * @date 28. May 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC000_H_GENERIC
-#define __CORE_SC000_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup SC000
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS SC000 definitions */
-#define __SC000_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __SC000_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
- __SC000_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_SC (000U) /*!< Cortex secure core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC000_H_DEPENDANT
-#define __CORE_SC000_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __SC000_REV
- #define __SC000_REV 0x0000U
- #warning "__SC000_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC000 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core MPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:1; /*!< bit: 0 Reserved */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31U];
- __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31U];
- __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31U];
- __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31U];
- uint32_t RESERVED4[64U];
- __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED0[1U];
- __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- uint32_t RESERVED1[154U];
- __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
- Therefore they are not covered by the SC000 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for SC000 */
-/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for SC000 */
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive __NVIC_GetActive not available for SC000 */
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
-#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
-#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
- else
- {
- SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc300.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc300.h
deleted file mode 100644
index 665822da8b193f128c52f90229964e65ff5e5276..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/core_sc300.h
+++ /dev/null
@@ -1,1915 +0,0 @@
-/**************************************************************************//**
- * @file core_sc300.h
- * @brief CMSIS SC300 Core Peripheral Access Layer Header File
- * @version V5.0.6
- * @date 04. June 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC300_H_GENERIC
-#define __CORE_SC300_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup SC3000
- @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS SC300 definitions */
-#define __SC300_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __SC300_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
-#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
- __SC300_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_SC (300U) /*!< Cortex secure core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
- This core does not support an FPU at all
-*/
-#define __FPU_USED 0U
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TI_ARM__ )
- #if defined __TI_VFP_SUPPORT__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#endif
-
-#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC300_H_DEPENDANT
-#define __CORE_SC300_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __SC300_REV
- #define __SC300_REV 0x0000U
- #warning "__SC300_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC300 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:1; /*!< bit: 9 Reserved */
- uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
- uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit */
- uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24U];
- __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
- __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24U];
- __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24U];
- __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56U];
- __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5U];
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
- uint32_t RESERVED1[129U];
- __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- uint32_t RESERVED1[1U];
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
- __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
- #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
- #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
- #endif
- #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
- #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
- #define NVIC_EnableIRQ __NVIC_EnableIRQ
- #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
- #define NVIC_DisableIRQ __NVIC_DisableIRQ
- #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
- #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
- #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
- #define NVIC_GetActive __NVIC_GetActive
- #define NVIC_SetPriority __NVIC_SetPriority
- #define NVIC_GetPriority __NVIC_GetPriority
- #define NVIC_SystemReset __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
- #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
- #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
- #endif
- #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
- #define NVIC_SetVector __NVIC_SetVector
- #define NVIC_GetVector __NVIC_GetVector
-#endif /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET 16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
-#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
-#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
-
-
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable Interrupt
- \details Enables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Interrupt Enable status
- \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt is not enabled.
- \return 1 Interrupt is enabled.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Disable Interrupt
- \details Disables a device specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- __DSB();
- __ISB();
- }
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
- \param [in] IRQn Device specific interrupt number.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- }
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
- \param [in] IRQn Device specific interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- \note IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
- }
- else
- {
- return(0U);
- }
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- \note The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) >= 0)
- {
- NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of a device specific interrupt or a processor exception.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) >= 0)
- {
- return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief Set Interrupt Vector
- \details Sets an interrupt vector in SRAM based interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- VTOR must been relocated to SRAM before.
- \param [in] IRQn Interrupt number
- \param [in] vector Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
- \brief Get Interrupt Vector
- \details Reads an interrupt vector from interrupt vector table.
- The interrupt number can be positive to specify a device specific interrupt,
- or negative to specify a processor exception.
- \param [in] IRQn Interrupt number.
- \return Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
- uint32_t *vectors = (uint32_t *)SCB->VTOR;
- return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for(;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ########################## FPU functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \brief get FPU type
- \details returns the FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- return 0U; /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv7.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv7.h
deleted file mode 100644
index 7d4b600ccd6086ce1d7ba12869f826f07961bd83..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv7.h
+++ /dev/null
@@ -1,270 +0,0 @@
-/******************************************************************************
- * @file mpu_armv7.h
- * @brief CMSIS MPU API for Armv7-M MPU
- * @version V5.0.4
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef ARM_MPU_ARMV7_H
-#define ARM_MPU_ARMV7_H
-
-#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
-#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
-#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
-#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
-#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
-#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
-#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
-#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
-#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
-#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
-#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
-#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
-#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
-#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
-#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
-#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
-#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
-#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
-#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
-#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
-#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
-#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
-#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
-#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
-#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
-#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
-#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
-#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
-
-#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
-#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
-#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
-#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
-#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
-#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
-
-/** MPU Region Base Address Register Value
-*
-* \param Region The region to be configured, number 0 to 15.
-* \param BaseAddress The base address for the region.
-*/
-#define ARM_MPU_RBAR(Region, BaseAddress) \
- (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
- ((Region) & MPU_RBAR_REGION_Msk) | \
- (MPU_RBAR_VALID_Msk))
-
-/**
-* MPU Memory Access Attributes
-*
-* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable Region is shareable between multiple bus masters.
-* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-*/
-#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
- ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
- (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
- (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
- (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
-
-/**
-* MPU Region Attribute and Size Register Value
-*
-* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
-* \param SubRegionDisable Sub-region disable field.
-* \param Size Region size of the region to be configured, for example 4K, 8K.
-*/
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
- ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
- (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
- (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
-
-/**
-* MPU Region Attribute and Size Register Value
-*
-* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable Region is shareable between multiple bus masters.
-* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-* \param SubRegionDisable Sub-region disable field.
-* \param Size Region size of the region to be configured, for example 4K, 8K.
-*/
-#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
- ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
-
-/**
-* MPU Memory Access Attribute for strongly ordered memory.
-* - TEX: 000b
-* - Shareable
-* - Non-cacheable
-* - Non-bufferable
-*/
-#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
-
-/**
-* MPU Memory Access Attribute for device memory.
-* - TEX: 000b (if non-shareable) or 010b (if shareable)
-* - Shareable or non-shareable
-* - Non-cacheable
-* - Bufferable (if shareable) or non-bufferable (if non-shareable)
-*
-* \param IsShareable Configures the device memory as shareable or non-shareable.
-*/
-#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
-
-/**
-* MPU Memory Access Attribute for normal memory.
-* - TEX: 1BBb (reflecting outer cacheability rules)
-* - Shareable or non-shareable
-* - Cacheable or non-cacheable (reflecting inner cacheability rules)
-* - Bufferable or non-bufferable (reflecting inner cacheability rules)
-*
-* \param OuterCp Configures the outer cache policy.
-* \param InnerCp Configures the inner cache policy.
-* \param IsShareable Configures the memory as shareable or non-shareable.
-*/
-#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
-
-/**
-* MPU Memory Access Attribute non-cacheable policy.
-*/
-#define ARM_MPU_CACHEP_NOCACHE 0U
-
-/**
-* MPU Memory Access Attribute write-back, write and read allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_WRA 1U
-
-/**
-* MPU Memory Access Attribute write-through, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WT_NWA 2U
-
-/**
-* MPU Memory Access Attribute write-back, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_NWA 3U
-
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
- uint32_t RBAR; //!< The region base address register value (RBAR)
- uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
-} ARM_MPU_Region_t;
-
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
- __DSB();
- __ISB();
- MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
- __DSB();
- __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
- MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
- MPU->RNR = rnr;
- MPU->RASR = 0U;
-}
-
-/** Configure an MPU region.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
-{
- MPU->RBAR = rbar;
- MPU->RASR = rasr;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/
-__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
-{
- MPU->RNR = rnr;
- MPU->RBAR = rbar;
- MPU->RASR = rasr;
-}
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
- uint32_t i;
- for (i = 0U; i < len; ++i)
- {
- dst[i] = src[i];
- }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
-{
- const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
- while (cnt > MPU_TYPE_RALIASES) {
- orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
- table += MPU_TYPE_RALIASES;
- cnt -= MPU_TYPE_RALIASES;
- }
- orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
-}
-
-#endif
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv8.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv8.h
deleted file mode 100644
index 99ee9f99cb828fb0de19a7a131488d5a7d9b3882..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/mpu_armv8.h
+++ /dev/null
@@ -1,333 +0,0 @@
-/******************************************************************************
- * @file mpu_armv8.h
- * @brief CMSIS MPU API for Armv8-M MPU
- * @version V5.0.4
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef ARM_MPU_ARMV8_H
-#define ARM_MPU_ARMV8_H
-
-/** \brief Attribute for device memory (outer only) */
-#define ARM_MPU_ATTR_DEVICE ( 0U )
-
-/** \brief Attribute for non-cacheable, normal memory */
-#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
-
-/** \brief Attribute for normal memory (outer and inner)
-* \param NT Non-Transient: Set to 1 for non-transient data.
-* \param WB Write-Back: Set to 1 to use write-back update policy.
-* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
-* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
-*/
-#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
- (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
-
-/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
-
-/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
-
-/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
-
-/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_GRE (3U)
-
-/** \brief Memory Attribute
-* \param O Outer memory attributes
-* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
-*/
-#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
-
-/** \brief Normal memory non-shareable */
-#define ARM_MPU_SH_NON (0U)
-
-/** \brief Normal memory outer shareable */
-#define ARM_MPU_SH_OUTER (2U)
-
-/** \brief Normal memory inner shareable */
-#define ARM_MPU_SH_INNER (3U)
-
-/** \brief Memory access permissions
-* \param RO Read-Only: Set to 1 for read-only memory.
-* \param NP Non-Privileged: Set to 1 for non-privileged memory.
-*/
-#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
-
-/** \brief Region Base Address Register value
-* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
-* \param SH Defines the Shareability domain for this memory region.
-* \param RO Read-Only: Set to 1 for a read-only memory region.
-* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
-*/
-#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
- ((BASE & MPU_RBAR_BASE_Msk) | \
- ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
- ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
- ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
-
-/** \brief Region Limit Address Register value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR(LIMIT, IDX) \
- ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
- ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
- (MPU_RLAR_EN_Msk))
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
- uint32_t RBAR; /*!< Region Base Address Register value */
- uint32_t RLAR; /*!< Region Limit Address Register value */
-} ARM_MPU_Region_t;
-
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
- __DSB();
- __ISB();
- MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
- __DSB();
- __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
- MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-#ifdef MPU_NS
-/** Enable the Non-secure MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
-{
- __DSB();
- __ISB();
- MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the Non-secure MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable_NS(void)
-{
- __DSB();
- __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
- SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
- MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
-}
-#endif
-
-/** Set the memory attribute encoding to the given MPU.
-* \param mpu Pointer to the MPU to be configured.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
-{
- const uint8_t reg = idx / 4U;
- const uint32_t pos = ((idx % 4U) * 8U);
- const uint32_t mask = 0xFFU << pos;
-
- if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
- return; // invalid index
- }
-
- mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
-}
-
-/** Set the memory attribute encoding.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
-{
- ARM_MPU_SetMemAttrEx(MPU, idx, attr);
-}
-
-#ifdef MPU_NS
-/** Set the memory attribute encoding to the Non-secure MPU.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
-{
- ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
-}
-#endif
-
-/** Clear and disable the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
-{
- mpu->RNR = rnr;
- mpu->RLAR = 0U;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
- ARM_MPU_ClrRegionEx(MPU, rnr);
-}
-
-#ifdef MPU_NS
-/** Clear and disable the given Non-secure MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{
- ARM_MPU_ClrRegionEx(MPU_NS, rnr);
-}
-#endif
-
-/** Configure the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/
-__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
- mpu->RNR = rnr;
- mpu->RBAR = rbar;
- mpu->RLAR = rlar;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
- ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
-}
-
-#ifdef MPU_NS
-/** Configure the given Non-secure MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/
-__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
- ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
-}
-#endif
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
- uint32_t i;
- for (i = 0U; i < len; ++i)
- {
- dst[i] = src[i];
- }
-}
-
-/** Load the given number of MPU regions from a table to the given MPU.
-* \param mpu Pointer to the MPU registers to be used.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
-{
- const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
- if (cnt == 1U) {
- mpu->RNR = rnr;
- orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
- } else {
- uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
- uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-
- mpu->RNR = rnrBase;
- while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
- uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
- orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
- table += c;
- cnt -= c;
- rnrOffset = 0U;
- rnrBase += MPU_TYPE_RALIASES;
- mpu->RNR = rnrBase;
- }
-
- orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
- }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
-{
- ARM_MPU_LoadEx(MPU, rnr, table, cnt);
-}
-
-#ifdef MPU_NS
-/** Load the given number of MPU regions from a table to the Non-secure MPU.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
-{
- ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
-}
-#endif
-
-#endif
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/tz_context.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/tz_context.h
deleted file mode 100644
index d4c1474f9cdf32c16f30a2efdc6e0c45ca43e227..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/Include/tz_context.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/******************************************************************************
- * @file tz_context.h
- * @brief Context Management for Armv8-M TrustZone
- * @version V1.0.1
- * @date 10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef TZ_CONTEXT_H
-#define TZ_CONTEXT_H
-
-#include <stdint.h>
-
-#ifndef TZ_MODULEID_T
-#define TZ_MODULEID_T
-/// \details Data type that identifies secure software modules called by a process.
-typedef uint32_t TZ_ModuleId_t;
-#endif
-
-/// \details TZ Memory ID identifies an allocated memory slot.
-typedef uint32_t TZ_MemoryId_t;
-
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_InitContextSystem_S (void);
-
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in] module identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0 no memory available or internal error
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
-
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
-
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
-
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in] id TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
-
-#endif // TZ_CONTEXT_H
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/LICENSE.txt
deleted file mode 100644
index c0ee81299bd368b4c38a7947d1651a1e32348313..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/CMSIS/LICENSE.txt
+++ /dev/null
@@ -1,201 +0,0 @@
- Apache License
- Version 2.0, January 2004
- http://www.apache.org/licenses/
-
- TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
-
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diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
deleted file mode 100644
index 17b5cee1e3ebb0c40b6ca55949192c5ccdfcc2ff..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+++ /dev/null
@@ -1,4014 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32_hal_legacy.h
- * @author MCD Application Team
- * @brief This file contains aliases definition for the STM32Cube HAL constants
- * macros and functions maintained for legacy purpose.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef STM32_HAL_LEGACY
-#define STM32_HAL_LEGACY
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
- * @{
- */
-#define AES_FLAG_RDERR CRYP_FLAG_RDERR
-#define AES_FLAG_WRERR CRYP_FLAG_WRERR
-#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
-#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
-#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
-#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1)
-#define CRYP_DATATYPE_32B CRYP_NO_SWAP
-#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
-#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
-#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
-#if defined(STM32U5)
-#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
-#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
-#endif /* STM32U5 */
-#endif /* STM32U5 || STM32H7 || STM32MP1 */
-/**
- * @}
- */
-
-/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
- * @{
- */
-#define ADC_RESOLUTION12b ADC_RESOLUTION_12B
-#define ADC_RESOLUTION10b ADC_RESOLUTION_10B
-#define ADC_RESOLUTION8b ADC_RESOLUTION_8B
-#define ADC_RESOLUTION6b ADC_RESOLUTION_6B
-#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
-#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
-#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
-#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
-#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
-#define REGULAR_GROUP ADC_REGULAR_GROUP
-#define INJECTED_GROUP ADC_INJECTED_GROUP
-#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
-#define AWD_EVENT ADC_AWD_EVENT
-#define AWD1_EVENT ADC_AWD1_EVENT
-#define AWD2_EVENT ADC_AWD2_EVENT
-#define AWD3_EVENT ADC_AWD3_EVENT
-#define OVR_EVENT ADC_OVR_EVENT
-#define JQOVF_EVENT ADC_JQOVF_EVENT
-#define ALL_CHANNELS ADC_ALL_CHANNELS
-#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
-#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
-#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
-#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
-#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
-#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
-#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
-#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
-#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
-#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
-#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
-#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
-#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
-#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
-#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
-#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
-#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
-#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
-#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
-#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
-#define ADC_SAMPLETIME_2CYCLE_5 ADC_SAMPLETIME_2CYCLES_5
-
-#define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY
-#define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY
-#define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC
-#define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC
-#define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL
-#define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL
-#define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1
-
-#if defined(STM32H7)
-#define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT
-#endif /* STM32H7 */
-
-#if defined(STM32U5)
-#define ADC_SAMPLETIME_5CYCLE ADC_SAMPLETIME_5CYCLES
-#define ADC_SAMPLETIME_391CYCLES_5 ADC_SAMPLETIME_391CYCLES
-#define ADC4_SAMPLETIME_160CYCLES_5 ADC4_SAMPLETIME_814CYCLES_5
-#endif /* STM32U5 */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
-
-/**
- * @}
- */
-
-/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
- * @{
- */
-#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
-#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
-#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
-#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
-#define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3
-#define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4
-#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
-#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
-#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
-#if defined(STM32L0)
-#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
-#endif
-#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
-#if defined(STM32F373xC) || defined(STM32F378xx)
-#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
-#define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR
-#endif /* STM32F373xC || STM32F378xx */
-
-#if defined(STM32L0) || defined(STM32L4)
-#define COMP_WINDOWMODE_ENABLE COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
-
-#define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1
-#define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2
-#define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3
-#define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4
-#define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5
-#define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6
-
-#define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT
-#define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT
-#define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT
-#define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT
-#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1
-#define COMP_INVERTINGINPUT_DAC1_CH2 COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1
-#define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1
-#if defined(STM32L0)
-/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */
-/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */
-/* to the second dedicated IO (only for COMP2). */
-#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2
-#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2
-#else
-#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2
-#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3
-#endif
-#define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4
-#define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5
-
-#define COMP_OUTPUTLEVEL_LOW COMP_OUTPUT_LEVEL_LOW
-#define COMP_OUTPUTLEVEL_HIGH COMP_OUTPUT_LEVEL_HIGH
-
-/* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose. */
-/* To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()". */
-#if defined(COMP_CSR_LOCK)
-#define COMP_FLAG_LOCK COMP_CSR_LOCK
-#elif defined(COMP_CSR_COMP1LOCK)
-#define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK
-#elif defined(COMP_CSR_COMPxLOCK)
-#define COMP_FLAG_LOCK COMP_CSR_COMPxLOCK
-#endif
-
-#if defined(STM32L4)
-#define COMP_BLANKINGSRCE_TIM1OC5 COMP_BLANKINGSRC_TIM1_OC5_COMP1
-#define COMP_BLANKINGSRCE_TIM2OC3 COMP_BLANKINGSRC_TIM2_OC3_COMP1
-#define COMP_BLANKINGSRCE_TIM3OC3 COMP_BLANKINGSRC_TIM3_OC3_COMP1
-#define COMP_BLANKINGSRCE_TIM3OC4 COMP_BLANKINGSRC_TIM3_OC4_COMP2
-#define COMP_BLANKINGSRCE_TIM8OC5 COMP_BLANKINGSRC_TIM8_OC5_COMP2
-#define COMP_BLANKINGSRCE_TIM15OC1 COMP_BLANKINGSRC_TIM15_OC1_COMP2
-#define COMP_BLANKINGSRCE_NONE COMP_BLANKINGSRC_NONE
-#endif
-
-#if defined(STM32L0)
-#define COMP_MODE_HIGHSPEED COMP_POWERMODE_MEDIUMSPEED
-#define COMP_MODE_LOWSPEED COMP_POWERMODE_ULTRALOWPOWER
-#else
-#define COMP_MODE_HIGHSPEED COMP_POWERMODE_HIGHSPEED
-#define COMP_MODE_MEDIUMSPEED COMP_POWERMODE_MEDIUMSPEED
-#define COMP_MODE_LOWPOWER COMP_POWERMODE_LOWPOWER
-#define COMP_MODE_ULTRALOWPOWER COMP_POWERMODE_ULTRALOWPOWER
-#endif
-
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
- * @{
- */
-#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
-#if defined(STM32U5)
-#define MPU_DEVICE_nGnRnE MPU_DEVICE_NGNRNE
-#define MPU_DEVICE_nGnRE MPU_DEVICE_NGNRE
-#define MPU_DEVICE_nGRE MPU_DEVICE_NGRE
-#endif /* STM32U5 */
-/**
- * @}
- */
-
-/** @defgroup CRC_Aliases CRC API aliases
- * @{
- */
-#if defined(STM32C0)
-#else
-#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
-#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
-#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define DAC1_CHANNEL_1 DAC_CHANNEL_1
-#define DAC1_CHANNEL_2 DAC_CHANNEL_2
-#define DAC2_CHANNEL_1 DAC_CHANNEL_1
-#define DAC_WAVE_NONE 0x00000000U
-#define DAC_WAVE_NOISE DAC_CR_WAVE1_0
-#define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1
-#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
-#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
-#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
-
-#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
-#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
-#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
-#endif
-
-#if defined(STM32U5)
-#define DAC_TRIGGER_STOP_LPTIM1_OUT DAC_TRIGGER_STOP_LPTIM1_CH1
-#define DAC_TRIGGER_STOP_LPTIM3_OUT DAC_TRIGGER_STOP_LPTIM3_CH1
-#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
-#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1
-#endif
-
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
-#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
-#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
-#endif
-
-/**
- * @}
- */
-
-/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
- * @{
- */
-#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
-#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
-#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
-#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
-#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
-#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
-#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
-#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
-#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
-#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
-#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
-#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
-#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
-#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
-
-#define IS_HAL_REMAPDMA IS_DMA_REMAP
-#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
-#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
-
-#if defined(STM32L4)
-
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI1 HAL_DMAMUX1_REQ_GEN_EXTI1
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI2 HAL_DMAMUX1_REQ_GEN_EXTI2
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI3 HAL_DMAMUX1_REQ_GEN_EXTI3
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI4 HAL_DMAMUX1_REQ_GEN_EXTI4
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI5 HAL_DMAMUX1_REQ_GEN_EXTI5
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI6 HAL_DMAMUX1_REQ_GEN_EXTI6
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI7 HAL_DMAMUX1_REQ_GEN_EXTI7
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI8 HAL_DMAMUX1_REQ_GEN_EXTI8
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI9 HAL_DMAMUX1_REQ_GEN_EXTI9
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI10 HAL_DMAMUX1_REQ_GEN_EXTI10
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI11 HAL_DMAMUX1_REQ_GEN_EXTI11
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI12 HAL_DMAMUX1_REQ_GEN_EXTI12
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI13 HAL_DMAMUX1_REQ_GEN_EXTI13
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI14 HAL_DMAMUX1_REQ_GEN_EXTI14
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI15 HAL_DMAMUX1_REQ_GEN_EXTI15
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
-#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
-#define HAL_DMAMUX1_REQUEST_GEN_DSI_TE HAL_DMAMUX1_REQ_GEN_DSI_TE
-#define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT HAL_DMAMUX1_REQ_GEN_DSI_EOT
-#define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT HAL_DMAMUX1_REQ_GEN_DMA2D_EOT
-#define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT HAL_DMAMUX1_REQ_GEN_LTDC_IT
-
-#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT
-#define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING
-#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
-#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
-
-#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
-#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
-#endif
-
-#endif /* STM32L4 */
-
-#if defined(STM32G0)
-#define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1
-#define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2
-#define DMA_REQUEST_TIM16_TRIG_COM DMA_REQUEST_TIM16_COM
-#define DMA_REQUEST_TIM17_TRIG_COM DMA_REQUEST_TIM17_COM
-
-#define LL_DMAMUX_REQ_TIM16_TRIG_COM LL_DMAMUX_REQ_TIM16_COM
-#define LL_DMAMUX_REQ_TIM17_TRIG_COM LL_DMAMUX_REQ_TIM17_COM
-#endif
-
-#if defined(STM32H7)
-
-#define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1
-#define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2
-
-#define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
-#define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
-
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
-#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
-#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
-#define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
-#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0
-#define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
-
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT
-#define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT
-#define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP
-#define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0
-#define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2
-#define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
-#define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT
-#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
-#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
-#define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT
-#define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
-#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
-#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
-
-#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT
-#define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING
-#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
-#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
-
-#define DFSDM_FILTER_EXT_TRIG_LPTIM1 DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT
-#define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT
-#define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT
-
-#define DAC_TRIGGER_LP1_OUT DAC_TRIGGER_LPTIM1_OUT
-#define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT
-
-#endif /* STM32H7 */
-
-#if defined(STM32U5)
-#define GPDMA1_REQUEST_DCMI GPDMA1_REQUEST_DCMI_PSSI
-#endif /* STM32U5 */
-/**
- * @}
- */
-
-/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
-#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
-#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
-#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
-#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
-#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
-#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
-#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
-#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
-#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
-#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
-#define OBEX_PCROP OPTIONBYTE_PCROP
-#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
-#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
-#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
-#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
-#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
-#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
-#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
-#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
-#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
-#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
-#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
-#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
-#define PAGESIZE FLASH_PAGE_SIZE
-#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
-#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
-#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
-#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
-#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
-#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
-#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
-#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
-#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
-#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
-#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
-#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
-#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
-#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
-#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
-#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
-#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
-#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
-#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
-#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
-#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
-#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
-#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
-#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
-#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
-#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
-#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
-#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
-#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
-#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
-#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
-#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
-#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
-#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
-#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
-#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
-#define OB_WDG_SW OB_IWDG_SW
-#define OB_WDG_HW OB_IWDG_HW
-#define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET
-#define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET
-#define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET
-#define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET
-#define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR
-#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
-#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
-#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
-#if defined(STM32G0) || defined(STM32C0)
-#define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE
-#define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH
-#else
-#define OB_BOOT_ENTRY_FORCED_NONE OB_BOOT_LOCK_DISABLE
-#define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE
-#endif
-#if defined(STM32H7)
-#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
-#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
-#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
-#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
-#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
-#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
-#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
-#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
-#endif /* STM32H7 */
-#if defined(STM32U5)
-#define OB_USER_nRST_STOP OB_USER_NRST_STOP
-#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
-#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
-#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0
-#define OB_USER_nBOOT0 OB_USER_NBOOT0
-#define OB_nBOOT0_RESET OB_NBOOT0_RESET
-#define OB_nBOOT0_SET OB_NBOOT0_SET
-#endif /* STM32U5 */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#if defined(STM32H7)
-#define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE
-#define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE
-#define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET
-#define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET
-#define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
-#define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
-#endif /* STM32H7 */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
-#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
-#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
-#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
-#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
-#if defined(STM32G4)
-
-#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOSwitchBooster
-#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOSwitchBooster
-#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
-#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
-#endif /* STM32G4 */
-
-/**
- * @}
- */
-
-
-/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
- * @{
- */
-#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
-#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
-#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
-#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
-#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
-#elif defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4)
-#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
-#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
-#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
-#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
-#endif
-/**
- * @}
- */
-
-/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
-#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
-/**
- * @}
- */
-
-/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
- * @{
- */
-#define GET_GPIO_SOURCE GPIO_GET_INDEX
-#define GET_GPIO_INDEX GPIO_GET_INDEX
-
-#if defined(STM32F4)
-#define GPIO_AF12_SDMMC GPIO_AF12_SDIO
-#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
-#endif
-
-#if defined(STM32F7)
-#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
-#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
-#endif
-
-#if defined(STM32L4)
-#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
-#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
-#endif
-
-#if defined(STM32H7)
-#define GPIO_AF7_SDIO1 GPIO_AF7_SDMMC1
-#define GPIO_AF8_SDIO1 GPIO_AF8_SDMMC1
-#define GPIO_AF12_SDIO1 GPIO_AF12_SDMMC1
-#define GPIO_AF9_SDIO2 GPIO_AF9_SDMMC2
-#define GPIO_AF10_SDIO2 GPIO_AF10_SDMMC2
-#define GPIO_AF11_SDIO2 GPIO_AF11_SDMMC2
-
-#if defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx) || defined (STM32H742xx) || \
- defined (STM32H745xx) || defined (STM32H755xx) || defined (STM32H747xx) || defined (STM32H757xx)
-#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS
-#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS
-#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS
-#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
-#endif /* STM32H7 */
-
-#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
-#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
-#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
-
-#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
-#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
-#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
-#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
-#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
-#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
-
-#if defined(STM32L1)
-#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
-#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM
-#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH
-#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
-#endif /* STM32L1 */
-
-#if defined(STM32F0) || defined(STM32F3) || defined(STM32F1)
-#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
-#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
-#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH
-#endif /* STM32F0 || STM32F3 || STM32F1 */
-
-#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
-
-#if defined(STM32U5)
-#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
-#endif /* STM32U5 */
-#if defined(STM32U5)
-#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
-#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
-#endif /* STM32U5 */
-/**
- * @}
- */
-
-/** @defgroup HAL_GTZC_Aliased_Defines HAL GTZC Aliased Defines maintained for legacy purpose
- * @{
- */
-#if defined(STM32U5)
-#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI
-#endif /* STM32U5 */
-/**
- * @}
- */
-
-/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
- * @{
- */
-#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
-#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
-#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
-
-#define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER
-#define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER
-#define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD
-#define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD
-#define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
-#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
-#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
-#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
-
-#if defined(STM32G4)
-#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
-#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
-#define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
-#define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
-#define HRTIM_TIMEEVENT_A HRTIM_EVENTCOUNTER_A
-#define HRTIM_TIMEEVENT_B HRTIM_EVENTCOUNTER_B
-#define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL
-#define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL
-#endif /* STM32G4 */
-
-#if defined(STM32H7)
-#define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
-
-#define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
-#define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
-#define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
-#define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
-#define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
-#define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
-#define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
-#define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
-#define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
-#define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
-#endif /* STM32H7 */
-
-#if defined(STM32F3)
-/** @brief Constants defining available sources associated to external events.
- */
-#define HRTIM_EVENTSRC_1 (0x00000000U)
-#define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0)
-#define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1)
-#define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0)
-
-/** @brief Constants defining the DLL calibration periods (in micro seconds)
- */
-#define HRTIM_CALIBRATIONRATE_7300 0x00000000U
-#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
-#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
-#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
-
-#endif /* STM32F3 */
-/**
- * @}
- */
-
-/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
- * @{
- */
-#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
-#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
-#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
-#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
-#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
-#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
-#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
-#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
-#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
-#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX
-#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_MASTER_BUSY_RX HAL_I2C_STATE_BUSY_RX
-#define HAL_I2C_STATE_SLAVE_BUSY_TX HAL_I2C_STATE_BUSY_TX
-#define HAL_I2C_STATE_SLAVE_BUSY_RX HAL_I2C_STATE_BUSY_RX
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
- * @{
- */
-#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
-#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
- * @{
- */
-#define KR_KEY_RELOAD IWDG_KEY_RELOAD
-#define KR_KEY_ENABLE IWDG_KEY_ENABLE
-#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
-#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
-/**
- * @}
- */
-
-/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
-#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
-#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
-#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
-
-#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
-#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
-#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
-
-#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
-#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS
-
-/* The following 3 definition have also been present in a temporary version of lptim.h */
-/* They need to be renamed also to the right name, just in case */
-#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
-#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
-
-
-/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
- * @{
- */
-#define HAL_LPTIM_ReadCompare HAL_LPTIM_ReadCapturedValue
-/**
- * @}
- */
-
-#if defined(STM32U5)
-#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF
-#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF
-#define LPTIM_CHANNEL_ALL 0x00000000U
-#endif /* STM32U5 */
-/**
- * @}
- */
-
-/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
- * @{
- */
-#define HAL_NAND_Read_Page HAL_NAND_Read_Page_8b
-#define HAL_NAND_Write_Page HAL_NAND_Write_Page_8b
-#define HAL_NAND_Read_SpareArea HAL_NAND_Read_SpareArea_8b
-#define HAL_NAND_Write_SpareArea HAL_NAND_Write_SpareArea_8b
-
-#define NAND_AddressTypedef NAND_AddressTypeDef
-
-#define __ARRAY_ADDRESS ARRAY_ADDRESS
-#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
-#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
-#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
-#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
-/**
- * @}
- */
-
-/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
- * @{
- */
-#define NOR_StatusTypedef HAL_NOR_StatusTypeDef
-#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
-#define NOR_ONGOING HAL_NOR_STATUS_ONGOING
-#define NOR_ERROR HAL_NOR_STATUS_ERROR
-#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
-
-#define __NOR_WRITE NOR_WRITE
-#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
-/**
- * @}
- */
-
-/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
-#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
-#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
-#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
-
-#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
-#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
-#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
-#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
-
-#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
-#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
-
-#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
-#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
-
-#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
-#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
-
-#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
-
-#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
-#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
-#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
-
-#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
-#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
-#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
-#endif
-
-#if defined(STM32L4) || defined(STM32L5)
-#define OPAMP_POWERMODE_NORMAL OPAMP_POWERMODE_NORMALPOWER
-#elif defined(STM32G4)
-#define OPAMP_POWERMODE_NORMAL OPAMP_POWERMODE_NORMALSPEED
-#endif
-
-/**
- * @}
- */
-
-/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
- * @{
- */
-#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
-
-#if defined(STM32H7)
-#define I2S_IT_TXE I2S_IT_TXP
-#define I2S_IT_RXNE I2S_IT_RXP
-
-#define I2S_FLAG_TXE I2S_FLAG_TXP
-#define I2S_FLAG_RXNE I2S_FLAG_RXP
-#endif
-
-#if defined(STM32F7)
-#define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
- * @{
- */
-
-/* Compact Flash-ATA registers description */
-#define CF_DATA ATA_DATA
-#define CF_SECTOR_COUNT ATA_SECTOR_COUNT
-#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
-#define CF_CYLINDER_LOW ATA_CYLINDER_LOW
-#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
-#define CF_CARD_HEAD ATA_CARD_HEAD
-#define CF_STATUS_CMD ATA_STATUS_CMD
-#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
-#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
-
-/* Compact Flash-ATA commands */
-#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
-#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
-#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
-#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
-
-#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
-#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
-#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
-#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
-#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
-/**
- * @}
- */
-
-/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define FORMAT_BIN RTC_FORMAT_BIN
-#define FORMAT_BCD RTC_FORMAT_BCD
-
-#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
-#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
-#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
-#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
-
-#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
-#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
-#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
-#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
-#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
-
-#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
-#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
-#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
-#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
-
-#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
-#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
-#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
-
-#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
-#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
-#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
-
-#if defined(STM32F7)
-#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
-#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
-#endif /* STM32F7 */
-
-#if defined(STM32H7)
-#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
-#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
-#endif /* STM32H7 */
-
-#if defined(STM32F7) || defined(STM32H7)
-#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
-#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
-#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
-#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
-#endif /* STM32F7 || STM32H7 */
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
- * @{
- */
-#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
-#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
-
-#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
-#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
-#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
-#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
-
-#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
-#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
-
-#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
-#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
-/**
- * @}
- */
-
-
-/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
- * @{
- */
-#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
-#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
-#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
-#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
-#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
-#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
-#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
-#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
-#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
-#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
-#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
-/**
- * @}
- */
-
-/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
- * @{
- */
-#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
-#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
-
-#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
-#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
-
-#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
-#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
-
-#if defined(STM32H7)
-
-#define SPI_FLAG_TXE SPI_FLAG_TXP
-#define SPI_FLAG_RXNE SPI_FLAG_RXP
-
-#define SPI_IT_TXE SPI_IT_TXP
-#define SPI_IT_RXNE SPI_IT_RXP
-
-#define SPI_FRLVL_EMPTY SPI_RX_FIFO_0PACKET
-#define SPI_FRLVL_QUARTER_FULL SPI_RX_FIFO_1PACKET
-#define SPI_FRLVL_HALF_FULL SPI_RX_FIFO_2PACKET
-#define SPI_FRLVL_FULL SPI_RX_FIFO_3PACKET
-
-#endif /* STM32H7 */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
- * @{
- */
-#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
-#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
-
-#define TIM_DMABase_CR1 TIM_DMABASE_CR1
-#define TIM_DMABase_CR2 TIM_DMABASE_CR2
-#define TIM_DMABase_SMCR TIM_DMABASE_SMCR
-#define TIM_DMABase_DIER TIM_DMABASE_DIER
-#define TIM_DMABase_SR TIM_DMABASE_SR
-#define TIM_DMABase_EGR TIM_DMABASE_EGR
-#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
-#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
-#define TIM_DMABase_CCER TIM_DMABASE_CCER
-#define TIM_DMABase_CNT TIM_DMABASE_CNT
-#define TIM_DMABase_PSC TIM_DMABASE_PSC
-#define TIM_DMABase_ARR TIM_DMABASE_ARR
-#define TIM_DMABase_RCR TIM_DMABASE_RCR
-#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
-#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
-#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
-#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
-#define TIM_DMABase_BDTR TIM_DMABASE_BDTR
-#define TIM_DMABase_DCR TIM_DMABASE_DCR
-#define TIM_DMABase_DMAR TIM_DMABASE_DMAR
-#define TIM_DMABase_OR1 TIM_DMABASE_OR1
-#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
-#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
-#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
-#define TIM_DMABase_OR2 TIM_DMABASE_OR2
-#define TIM_DMABase_OR3 TIM_DMABASE_OR3
-#define TIM_DMABase_OR TIM_DMABASE_OR
-
-#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
-#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
-#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
-#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
-#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
-#define TIM_EventSource_COM TIM_EVENTSOURCE_COM
-#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
-#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
-#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
-
-#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
-#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
-#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
-#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
-#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
-#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
-#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
-#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
-#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
-#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
-#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
-#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
-#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
-#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
-#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
-#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
-#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
-#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
-
-#if defined(STM32L0)
-#define TIM22_TI1_GPIO1 TIM22_TI1_GPIO
-#define TIM22_TI1_GPIO2 TIM22_TI1_GPIO
-#endif
-
-#if defined(STM32F3)
-#define IS_TIM_HALL_INTERFACE_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
-#endif
-
-#if defined(STM32H7)
-#define TIM_TIM1_ETR_COMP1_OUT TIM_TIM1_ETR_COMP1
-#define TIM_TIM1_ETR_COMP2_OUT TIM_TIM1_ETR_COMP2
-#define TIM_TIM8_ETR_COMP1_OUT TIM_TIM8_ETR_COMP1
-#define TIM_TIM8_ETR_COMP2_OUT TIM_TIM8_ETR_COMP2
-#define TIM_TIM2_ETR_COMP1_OUT TIM_TIM2_ETR_COMP1
-#define TIM_TIM2_ETR_COMP2_OUT TIM_TIM2_ETR_COMP2
-#define TIM_TIM3_ETR_COMP1_OUT TIM_TIM3_ETR_COMP1
-#define TIM_TIM1_TI1_COMP1_OUT TIM_TIM1_TI1_COMP1
-#define TIM_TIM8_TI1_COMP2_OUT TIM_TIM8_TI1_COMP2
-#define TIM_TIM2_TI4_COMP1_OUT TIM_TIM2_TI4_COMP1
-#define TIM_TIM2_TI4_COMP2_OUT TIM_TIM2_TI4_COMP2
-#define TIM_TIM2_TI4_COMP1COMP2_OUT TIM_TIM2_TI4_COMP1_COMP2
-#define TIM_TIM3_TI1_COMP1_OUT TIM_TIM3_TI1_COMP1
-#define TIM_TIM3_TI1_COMP2_OUT TIM_TIM3_TI1_COMP2
-#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
-#endif
-
-#if defined(STM32U5) || defined(STM32MP2)
-#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
-#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
- * @{
- */
-#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
-#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
-/**
- * @}
- */
-
-/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
- * @{
- */
-#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
-#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
-#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
-#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
-
-#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
-#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
-
-#define __DIV_SAMPLING16 UART_DIV_SAMPLING16
-#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
-#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
-#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
-
-#define __DIV_SAMPLING8 UART_DIV_SAMPLING8
-#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
-#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
-#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
-
-#define __DIV_LPUART UART_DIV_LPUART
-
-#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
-#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
-#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
-
-#define USARTNACK_ENABLED USART_NACK_ENABLE
-#define USARTNACK_DISABLED USART_NACK_DISABLE
-/**
- * @}
- */
-
-/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
- * @{
- */
-#define CFR_BASE WWDG_CFR_BASE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
- * @{
- */
-#define CAN_FilterFIFO0 CAN_FILTER_FIFO0
-#define CAN_FilterFIFO1 CAN_FILTER_FIFO1
-#define CAN_IT_RQCP0 CAN_IT_TME
-#define CAN_IT_RQCP1 CAN_IT_TME
-#define CAN_IT_RQCP2 CAN_IT_TME
-#define INAK_TIMEOUT CAN_TIMEOUT_VALUE
-#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
-#define CAN_TXSTATUS_FAILED ((uint8_t)0x00U)
-#define CAN_TXSTATUS_OK ((uint8_t)0x01U)
-#define CAN_TXSTATUS_PENDING ((uint8_t)0x02U)
-
-/**
- * @}
- */
-
-/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
- * @{
- */
-
-#define VLAN_TAG ETH_VLAN_TAG
-#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
-#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
-#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
-#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
-#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
-#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
-#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
-
-#define ETH_MMCCR 0x00000100U
-#define ETH_MMCRIR 0x00000104U
-#define ETH_MMCTIR 0x00000108U
-#define ETH_MMCRIMR 0x0000010CU
-#define ETH_MMCTIMR 0x00000110U
-#define ETH_MMCTGFSCCR 0x0000014CU
-#define ETH_MMCTGFMSCCR 0x00000150U
-#define ETH_MMCTGFCR 0x00000168U
-#define ETH_MMCRFCECR 0x00000194U
-#define ETH_MMCRFAECR 0x00000198U
-#define ETH_MMCRGUFCR 0x000001C4U
-
-#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
-#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
-#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
-#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
-#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
-#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
-#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
-#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
-#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
-#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
-#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
-#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
-#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
-#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
-#if defined(STM32F1)
-#else
-#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
-#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
-#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
-#endif
-#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
-#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
-#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
-#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */
-#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */
-#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
-#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose
- * @{
- */
-#define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR
-#define DCMI_IT_OVF DCMI_IT_OVR
-#define DCMI_FLAG_OVFRI DCMI_FLAG_OVRRI
-#define DCMI_FLAG_OVFMI DCMI_FLAG_OVRMI
-
-#define HAL_DCMI_ConfigCROP HAL_DCMI_ConfigCrop
-#define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop
-#define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop
-
-/**
- * @}
- */
-
-#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
- || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
- || defined(STM32H7)
-/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
- * @{
- */
-#define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888
-#define DMA2D_RGB888 DMA2D_OUTPUT_RGB888
-#define DMA2D_RGB565 DMA2D_OUTPUT_RGB565
-#define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555
-#define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444
-
-#define CM_ARGB8888 DMA2D_INPUT_ARGB8888
-#define CM_RGB888 DMA2D_INPUT_RGB888
-#define CM_RGB565 DMA2D_INPUT_RGB565
-#define CM_ARGB1555 DMA2D_INPUT_ARGB1555
-#define CM_ARGB4444 DMA2D_INPUT_ARGB4444
-#define CM_L8 DMA2D_INPUT_L8
-#define CM_AL44 DMA2D_INPUT_AL44
-#define CM_AL88 DMA2D_INPUT_AL88
-#define CM_L4 DMA2D_INPUT_L4
-#define CM_A8 DMA2D_INPUT_A8
-#define CM_A4 DMA2D_INPUT_A4
-/**
- * @}
- */
-#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
-
-#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
- || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
- || defined(STM32H7) || defined(STM32U5)
-/** @defgroup DMA2D_Aliases DMA2D API Aliases
- * @{
- */
-#define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort
- for compatibility with legacy code */
-/**
- * @}
- */
-
-#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */
-
-/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
- * @{
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
-/**
- * @}
- */
-
-/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
- * @{
- */
-
-#if defined(STM32U5)
-#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr
-#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT
-#endif /* STM32U5 */
-
-/**
- * @}
- */
-
-#if !defined(STM32F2)
-/** @defgroup HASH_alias HASH API alias
- * @{
- */
-#define HAL_HASHEx_IRQHandler HAL_HASH_IRQHandler /*!< Redirection for compatibility with legacy code */
-/**
- *
- * @}
- */
-#endif /* STM32F2 */
-/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef
-#define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef
-#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
-#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
-#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
-#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
-
-/*HASH Algorithm Selection*/
-
-#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
-#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
-#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
-#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
-
-#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
-#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
-
-#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
-#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
-
-#if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
-
-#define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt
-#define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End
-#define HAL_HASH_MD5_Accumulate_IT HAL_HASH_MD5_Accmlt_IT
-#define HAL_HASH_MD5_Accumulate_End_IT HAL_HASH_MD5_Accmlt_End_IT
-
-#define HAL_HASH_SHA1_Accumulate HAL_HASH_SHA1_Accmlt
-#define HAL_HASH_SHA1_Accumulate_End HAL_HASH_SHA1_Accmlt_End
-#define HAL_HASH_SHA1_Accumulate_IT HAL_HASH_SHA1_Accmlt_IT
-#define HAL_HASH_SHA1_Accumulate_End_IT HAL_HASH_SHA1_Accmlt_End_IT
-
-#define HAL_HASHEx_SHA224_Accumulate HAL_HASHEx_SHA224_Accmlt
-#define HAL_HASHEx_SHA224_Accumulate_End HAL_HASHEx_SHA224_Accmlt_End
-#define HAL_HASHEx_SHA224_Accumulate_IT HAL_HASHEx_SHA224_Accmlt_IT
-#define HAL_HASHEx_SHA224_Accumulate_End_IT HAL_HASHEx_SHA224_Accmlt_End_IT
-
-#define HAL_HASHEx_SHA256_Accumulate HAL_HASHEx_SHA256_Accmlt
-#define HAL_HASHEx_SHA256_Accumulate_End HAL_HASHEx_SHA256_Accmlt_End
-#define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT
-#define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT
-
-#endif /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */
-/**
- * @}
- */
-
-/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
-#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
-#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
-#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
-#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
-#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
-#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd\
- )==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
-#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
-#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
-#if defined(STM32L0)
-#else
-#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
-#endif
-#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
-#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
-#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
-#define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode
-#define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode
-#define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode
-#define HAL_DisableSRDomainDBGStandbyMode HAL_DisableDomain3DBGStandbyMode
-#endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ || STM32H7B0xxQ */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
- * @{
- */
-#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
-#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
-#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
-#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
-#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
-#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
-#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
-
-/**
- * @}
- */
-
-/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
-#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
-#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
-#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
-
-#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd\
- )==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
-
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
-#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
-#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
-#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
-#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
-#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
-#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
-#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
-#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
-#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
-#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
-
-#if defined(STM32F4)
-#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT
-#define HAL_FMPI2C_Master_Sequential_Receive_IT HAL_FMPI2C_Master_Seq_Receive_IT
-#define HAL_FMPI2C_Slave_Sequential_Transmit_IT HAL_FMPI2C_Slave_Seq_Transmit_IT
-#define HAL_FMPI2C_Slave_Sequential_Receive_IT HAL_FMPI2C_Slave_Seq_Receive_IT
-#define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA
-#define HAL_FMPI2C_Master_Sequential_Receive_DMA HAL_FMPI2C_Master_Seq_Receive_DMA
-#define HAL_FMPI2C_Slave_Sequential_Transmit_DMA HAL_FMPI2C_Slave_Seq_Transmit_DMA
-#define HAL_FMPI2C_Slave_Sequential_Receive_DMA HAL_FMPI2C_Slave_Seq_Receive_DMA
-#endif /* STM32F4 */
-/**
- * @}
- */
-
-/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
- * @{
- */
-
-#if defined(STM32G0)
-#define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD
-#define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD
-#define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD
-#define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler
-#endif
-#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
-#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
-#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
-#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
-#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
-#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
-#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
-#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
-#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
-#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
-#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
-#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
-#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
-#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
-#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
-#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
-
-#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
-#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
-#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
-#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
-#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
-#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
-#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
-
-#define CR_OFFSET_BB PWR_CR_OFFSET_BB
-#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
-#define PMODE_BIT_NUMBER VOS_BIT_NUMBER
-#define CR_PMODE_BB CR_VOS_BB
-
-#define DBP_BitNumber DBP_BIT_NUMBER
-#define PVDE_BitNumber PVDE_BIT_NUMBER
-#define PMODE_BitNumber PMODE_BIT_NUMBER
-#define EWUP_BitNumber EWUP_BIT_NUMBER
-#define FPDS_BitNumber FPDS_BIT_NUMBER
-#define ODEN_BitNumber ODEN_BIT_NUMBER
-#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
-#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
-#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
-#define BRE_BitNumber BRE_BIT_NUMBER
-
-#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
-
-#if defined (STM32U5)
-#define PWR_SRAM1_PAGE1_STOP_RETENTION PWR_SRAM1_PAGE1_STOP
-#define PWR_SRAM1_PAGE2_STOP_RETENTION PWR_SRAM1_PAGE2_STOP
-#define PWR_SRAM1_PAGE3_STOP_RETENTION PWR_SRAM1_PAGE3_STOP
-#define PWR_SRAM1_PAGE4_STOP_RETENTION PWR_SRAM1_PAGE4_STOP
-#define PWR_SRAM1_PAGE5_STOP_RETENTION PWR_SRAM1_PAGE5_STOP
-#define PWR_SRAM1_PAGE6_STOP_RETENTION PWR_SRAM1_PAGE6_STOP
-#define PWR_SRAM1_PAGE7_STOP_RETENTION PWR_SRAM1_PAGE7_STOP
-#define PWR_SRAM1_PAGE8_STOP_RETENTION PWR_SRAM1_PAGE8_STOP
-#define PWR_SRAM1_PAGE9_STOP_RETENTION PWR_SRAM1_PAGE9_STOP
-#define PWR_SRAM1_PAGE10_STOP_RETENTION PWR_SRAM1_PAGE10_STOP
-#define PWR_SRAM1_PAGE11_STOP_RETENTION PWR_SRAM1_PAGE11_STOP
-#define PWR_SRAM1_PAGE12_STOP_RETENTION PWR_SRAM1_PAGE12_STOP
-#define PWR_SRAM1_FULL_STOP_RETENTION PWR_SRAM1_FULL_STOP
-
-#define PWR_SRAM2_PAGE1_STOP_RETENTION PWR_SRAM2_PAGE1_STOP
-#define PWR_SRAM2_PAGE2_STOP_RETENTION PWR_SRAM2_PAGE2_STOP
-#define PWR_SRAM2_FULL_STOP_RETENTION PWR_SRAM2_FULL_STOP
-
-#define PWR_SRAM3_PAGE1_STOP_RETENTION PWR_SRAM3_PAGE1_STOP
-#define PWR_SRAM3_PAGE2_STOP_RETENTION PWR_SRAM3_PAGE2_STOP
-#define PWR_SRAM3_PAGE3_STOP_RETENTION PWR_SRAM3_PAGE3_STOP
-#define PWR_SRAM3_PAGE4_STOP_RETENTION PWR_SRAM3_PAGE4_STOP
-#define PWR_SRAM3_PAGE5_STOP_RETENTION PWR_SRAM3_PAGE5_STOP
-#define PWR_SRAM3_PAGE6_STOP_RETENTION PWR_SRAM3_PAGE6_STOP
-#define PWR_SRAM3_PAGE7_STOP_RETENTION PWR_SRAM3_PAGE7_STOP
-#define PWR_SRAM3_PAGE8_STOP_RETENTION PWR_SRAM3_PAGE8_STOP
-#define PWR_SRAM3_PAGE9_STOP_RETENTION PWR_SRAM3_PAGE9_STOP
-#define PWR_SRAM3_PAGE10_STOP_RETENTION PWR_SRAM3_PAGE10_STOP
-#define PWR_SRAM3_PAGE11_STOP_RETENTION PWR_SRAM3_PAGE11_STOP
-#define PWR_SRAM3_PAGE12_STOP_RETENTION PWR_SRAM3_PAGE12_STOP
-#define PWR_SRAM3_PAGE13_STOP_RETENTION PWR_SRAM3_PAGE13_STOP
-#define PWR_SRAM3_FULL_STOP_RETENTION PWR_SRAM3_FULL_STOP
-
-#define PWR_SRAM4_FULL_STOP_RETENTION PWR_SRAM4_FULL_STOP
-
-#define PWR_SRAM5_PAGE1_STOP_RETENTION PWR_SRAM5_PAGE1_STOP
-#define PWR_SRAM5_PAGE2_STOP_RETENTION PWR_SRAM5_PAGE2_STOP
-#define PWR_SRAM5_PAGE3_STOP_RETENTION PWR_SRAM5_PAGE3_STOP
-#define PWR_SRAM5_PAGE4_STOP_RETENTION PWR_SRAM5_PAGE4_STOP
-#define PWR_SRAM5_PAGE5_STOP_RETENTION PWR_SRAM5_PAGE5_STOP
-#define PWR_SRAM5_PAGE6_STOP_RETENTION PWR_SRAM5_PAGE6_STOP
-#define PWR_SRAM5_PAGE7_STOP_RETENTION PWR_SRAM5_PAGE7_STOP
-#define PWR_SRAM5_PAGE8_STOP_RETENTION PWR_SRAM5_PAGE8_STOP
-#define PWR_SRAM5_PAGE9_STOP_RETENTION PWR_SRAM5_PAGE9_STOP
-#define PWR_SRAM5_PAGE10_STOP_RETENTION PWR_SRAM5_PAGE10_STOP
-#define PWR_SRAM5_PAGE11_STOP_RETENTION PWR_SRAM5_PAGE11_STOP
-#define PWR_SRAM5_PAGE12_STOP_RETENTION PWR_SRAM5_PAGE12_STOP
-#define PWR_SRAM5_PAGE13_STOP_RETENTION PWR_SRAM5_PAGE13_STOP
-#define PWR_SRAM5_FULL_STOP_RETENTION PWR_SRAM5_FULL_STOP
-
-#define PWR_ICACHE_FULL_STOP_RETENTION PWR_ICACHE_FULL_STOP
-#define PWR_DCACHE1_FULL_STOP_RETENTION PWR_DCACHE1_FULL_STOP
-#define PWR_DCACHE2_FULL_STOP_RETENTION PWR_DCACHE2_FULL_STOP
-#define PWR_DMA2DRAM_FULL_STOP_RETENTION PWR_DMA2DRAM_FULL_STOP
-#define PWR_PERIPHRAM_FULL_STOP_RETENTION PWR_PERIPHRAM_FULL_STOP
-#define PWR_PKA32RAM_FULL_STOP_RETENTION PWR_PKA32RAM_FULL_STOP
-#define PWR_GRAPHICPRAM_FULL_STOP_RETENTION PWR_GRAPHICPRAM_FULL_STOP
-#define PWR_DSIRAM_FULL_STOP_RETENTION PWR_DSIRAM_FULL_STOP
-
-#define PWR_SRAM2_PAGE1_STANDBY_RETENTION PWR_SRAM2_PAGE1_STANDBY
-#define PWR_SRAM2_PAGE2_STANDBY_RETENTION PWR_SRAM2_PAGE2_STANDBY
-#define PWR_SRAM2_FULL_STANDBY_RETENTION PWR_SRAM2_FULL_STANDBY
-
-#define PWR_SRAM1_FULL_RUN_RETENTION PWR_SRAM1_FULL_RUN
-#define PWR_SRAM2_FULL_RUN_RETENTION PWR_SRAM2_FULL_RUN
-#define PWR_SRAM3_FULL_RUN_RETENTION PWR_SRAM3_FULL_RUN
-#define PWR_SRAM4_FULL_RUN_RETENTION PWR_SRAM4_FULL_RUN
-#define PWR_SRAM5_FULL_RUN_RETENTION PWR_SRAM5_FULL_RUN
-
-#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
-#endif
-
-/**
- * @}
- */
-
-/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
-#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
-#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
-/**
- * @}
- */
-
-/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
-/**
- * @}
- */
-
-/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
-#define HAL_TIM_DMAError TIM_DMAError
-#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
-#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
-#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
-#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
-#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
-#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
-#define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent
-#define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT
-#define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA
-#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */
-/**
- * @}
- */
-
-/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
-/**
- * @}
- */
-
-/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
-#define HAL_LTDC_Relaod HAL_LTDC_Reload
-#define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig
-#define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig
-/**
- * @}
- */
-
-
-/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
- * @{
- */
-
-/**
- * @}
- */
-
-/* Exported macros ------------------------------------------------------------*/
-
-/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
- * @{
- */
-#define AES_IT_CC CRYP_IT_CC
-#define AES_IT_ERR CRYP_IT_ERR
-#define AES_FLAG_CCF CRYP_FLAG_CCF
-/**
- * @}
- */
-
-/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
-#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
-#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
-#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
-#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
-#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
-#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
-#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
-#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
-#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
-#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
-#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
-#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
-#define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE
-
-#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
-#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
-#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
-#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
-#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __ADC_ENABLE __HAL_ADC_ENABLE
-#define __ADC_DISABLE __HAL_ADC_DISABLE
-#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
-#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
-#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
-#define __ADC_IS_ENABLED ADC_IS_ENABLE
-#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
-#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
-#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
-#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
-#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
-
-#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
-#define __HAL_ADC_JSQR_RK ADC_JSQR_RK
-#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
-#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
-#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
-#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
-#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
-#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
-#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
-#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
-#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
-#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
-#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
-#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
-#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
-#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
-#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
-#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
-#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
-#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
-
-#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
-#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
-#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
-#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
-#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
-#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
-#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
-#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
-#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
-#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
-
-#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
-#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
-#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
-#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
-#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
-#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
-#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
-#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
-
-#define __HAL_ADC_SQR1 ADC_SQR1
-#define __HAL_ADC_SMPR1 ADC_SMPR1
-#define __HAL_ADC_SMPR2 ADC_SMPR2
-#define __HAL_ADC_SQR3_RK ADC_SQR3_RK
-#define __HAL_ADC_SQR2_RK ADC_SQR2_RK
-#define __HAL_ADC_SQR1_RK ADC_SQR1_RK
-#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
-#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
-#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
-#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
-#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
-#define __HAL_ADC_JSQR ADC_JSQR
-
-#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
-#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
-#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
-#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
-#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
-#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
-#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
-#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
-
-/**
- * @}
- */
-
-/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
-#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
-#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
-#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
-#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
-#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
-#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
-#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
-#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
-#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
-#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
-#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
-#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
-#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
-#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
-#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
-#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
-#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
-#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
-
-#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
-#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
-#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
-#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
-#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
-#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
-#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
-#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
-#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
-#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
-#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
-#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
-#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
-#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
-
-
-#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
-#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
-#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
-#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
-#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
-#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
-#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
-#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
-#if defined(STM32H7)
-#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1
-#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1
-#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1
-#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1
-#else
-#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
-#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
-#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
-#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
-#endif /* STM32H7 */
-#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
-#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
-#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
-#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
-#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
-#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
-#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
-#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
-#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
-#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
-#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
-#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
-
-/**
- * @}
- */
-
-/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
- * @{
- */
-#if defined(STM32F3)
-#define COMP_START __HAL_COMP_ENABLE
-#define COMP_STOP __HAL_COMP_DISABLE
-#define COMP_LOCK __HAL_COMP_LOCK
-
-#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
- __HAL_COMP_COMP6_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
- __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F302xE) || defined(STM32F302xC)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
- __HAL_COMP_COMP6_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
- __HAL_COMP_COMP6_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
- __HAL_COMP_COMP6_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
- __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
- __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
- __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
- __HAL_COMP_COMP7_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
- ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
- __HAL_COMP_COMP7_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
- __HAL_COMP_COMP7_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
- ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
- __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
-# endif
-# if defined(STM32F373xC) ||defined(STM32F378xx)
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
- __HAL_COMP_COMP2_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
- __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
-# endif
-#else
-#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
-#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
- __HAL_COMP_COMP2_EXTI_ENABLE_IT())
-#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
- __HAL_COMP_COMP2_EXTI_DISABLE_IT())
-#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
- __HAL_COMP_COMP2_EXTI_GET_FLAG())
-#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
- __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
-#endif
-
-#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
-
-#if defined(STM32L0) || defined(STM32L4)
-/* Note: On these STM32 families, the only argument of this macro */
-/* is COMP_FLAG_LOCK. */
-/* This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle */
-/* argument. */
-#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (__HAL_COMP_IS_LOCKED(__HANDLE__))
-#endif
-/**
- * @}
- */
-
-#if defined(STM32L0) || defined(STM32L4)
-/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
- * @{
- */
-#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
-/**
- * @}
- */
-#endif
-
-/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
- ((WAVE) == DAC_WAVE_NOISE)|| \
- ((WAVE) == DAC_WAVE_TRIANGLE))
-
-/**
- * @}
- */
-
-/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define IS_WRPAREA IS_OB_WRPAREA
-#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
-#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
-#define IS_TYPEERASE IS_FLASH_TYPEERASE
-#define IS_NBSECTORS IS_FLASH_NBSECTORS
-#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
-#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
-#if defined(STM32F1)
-#define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE
-#else
-#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
-#endif /* STM32F1 */
-#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
-#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
-#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
-#define __HAL_I2C_SPEED I2C_SPEED
-#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
-#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
-#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
-#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
-#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
-#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
-#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
-#define __HAL_I2C_FREQRANGE I2C_FREQRANGE
-/**
- * @}
- */
-
-/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
-#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
-
-#if defined(STM32H7)
-#define __HAL_I2S_CLEAR_FREFLAG __HAL_I2S_CLEAR_TIFREFLAG
-#endif
-
-/**
- * @}
- */
-
-/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __IRDA_DISABLE __HAL_IRDA_DISABLE
-#define __IRDA_ENABLE __HAL_IRDA_ENABLE
-
-#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
-#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
-#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
-#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
-
-#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
-
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
-#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
-/**
- * @}
- */
-
-
-/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
-#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
-#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
-#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
-#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
-#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
-#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
-#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
-#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
-#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
-#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
-#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
-#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
-#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
-#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
-#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
-#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
-#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
-#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
-#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
-#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
-#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
-#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
-#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
-#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
-#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
-#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
-#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
-#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
-#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
-#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
-#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
-#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
-#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
-#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
-#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
-#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
-#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
-#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
-#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
-#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
-
-#if defined (STM32F4)
-#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
-#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
-#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
-#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
-#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
-#else
-#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
-#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
-#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
-#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
-#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
-#endif /* STM32F4 */
-/**
- * @}
- */
-
-
-/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
- * @{
- */
-
-#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
-#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
-
-#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
-#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd\
- )==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
-
-#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
-#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
-#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
-#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
-#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
-#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
-#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
-#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
-#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
-#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
-#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
-#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
-#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
-#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
-#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
-#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
-#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
-#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
-#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
-#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
-#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
-#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
-#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
-#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
-#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
-#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
-#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
-#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
-#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
-#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
-#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
-#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
-#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
-#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
-#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
-#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
-#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
-#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
-#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
-#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
-#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
-#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
-#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
-#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
-#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
-#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
-#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
-#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
-#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
-#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
-#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
-#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
-#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
-#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
-#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
-#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
-#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
-#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
-#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
-#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
-#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
-#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
-#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
-#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
-#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
-#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
-#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
-#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
-#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
-#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
-#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
-#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
-#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
-#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
-#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
-#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
-#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
-#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
-#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
-#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
-#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
-#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
-#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
-#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
-#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
-#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
-#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
-#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
-#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
-#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
-#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
-#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
-#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
-#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
-#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
-#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
-#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
-#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
-#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
-#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
-#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
-#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
-#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
-#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
-#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
-#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
-#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
-#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
-#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
-#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
-#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
-#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
-#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
-#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
-#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
-#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
-#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
-#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
-#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
-#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
-#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
-#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
-#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
-#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
-#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
-#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
-#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
-#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
-#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
-#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
-#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
-#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
-#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
-#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
-#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
-#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
-#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
-#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
-#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
-#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
-#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
-#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
-#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
-#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
-#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
-#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
-#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
-#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
-#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
-#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
-#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
-#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
-#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
-#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
-#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
-#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
-#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
-#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
-#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
-#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
-#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
-#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
-#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
-#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
-#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
-#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
-#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
-#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
-#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
-#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
-#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
-#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
-#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
-#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
-#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
-#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
-#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
-#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
-#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
-#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
-#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
-#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
-#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
-#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
-#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
-#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
-#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
-#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
-#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
-#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
-#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
-#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
-#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
-#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
-#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
-#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
-#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
-#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
-#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
-#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
-#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
-#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
-#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
-#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
-#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
-#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
-#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
-#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
-#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
-#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
-#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
-#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
-#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
-#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
-#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
-#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
-#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
-#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
-#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
-#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
-#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
-#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
-#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
-#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
-#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
-#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
-#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
-#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
-#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
-#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
-#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
-#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
-#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
-#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
-#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
-#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
-#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
-#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
-#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
-#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
-#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
-#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
-#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
-#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
-#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
-#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
-#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
-#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
-#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
-#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
-#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
-#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
-#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
-#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
-#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
-#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
-#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
-#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
-
-#if defined(STM32WB)
-#define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE
-#define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE
-#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
-#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
-#define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET
-#define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET
-#define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED
-#define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED
-#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
-#define QSPI_IRQHandler QUADSPI_IRQHandler
-#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
-
-#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
-#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
-#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
-#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
-#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
-#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
-#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
-#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
-#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
-#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
-#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
-#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
-#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
-#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
-#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
-#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
-#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
-#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
-#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
-#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
-#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
-#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
-#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
-#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
-#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
-#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
-#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
-#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
-#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
-#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
-#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
-#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
-#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
-#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
-#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
-#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
-#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
-#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
-#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
-#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
-#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
-#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
-#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
-#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
-#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
-#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
-#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
-#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
-#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
-#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
-#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
-#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
-#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
-#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
-#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
-#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
-#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
-#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
-#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
-#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
-#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
-#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
-#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
-#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
-#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
-#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
-#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
-#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
-#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
-#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
-#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
-#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
-#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
-#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
-#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
-#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
-#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
-#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
-#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
-#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
-#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
-#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
-#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
-#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
-#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
-#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
-#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
-#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
-#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
-#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
-#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
-#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
-#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
-#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
-#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
-#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
-#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
-#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
-#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
-#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
-#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
-#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
-#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
-#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
-#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
-#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
-#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
-#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
-#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
-#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
-#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
-#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
-#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
-#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
-#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
-#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
-#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
-#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
-#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
-#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
-#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
-#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
-#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
-#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
-#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
-#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
-#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
-#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
-#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
-#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
-#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
-#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
-#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
-#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
-#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
-#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
-#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
-#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
-#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
-#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
-#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
-#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
-#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
-#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
-#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
-#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
-#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
-#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
-#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
-#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
-#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
-#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
-#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
-#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
-#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
-#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
-#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
-#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
-#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
-#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
-#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
-#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
-#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
-#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
-#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
-#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
-#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
-#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
-#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
-#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
-#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
-#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
-#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
-#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
-#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
-#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
-#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
-#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
-#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
-#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
-#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
-#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
-#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
-#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
-#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
-#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
-#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
-#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
-#define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
-#define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
-#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
-#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
-#define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
-#define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
-#define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
-#define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
-#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
-#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
-#define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
-#define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
-#define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
-#define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
-#define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
-#define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
-#define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
-#define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
-#define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
-#define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
-#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
-#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
-#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
-#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
-#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
-#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
-#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
-#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
-
-#if defined(STM32H7)
-#define __HAL_RCC_WWDG_CLK_DISABLE __HAL_RCC_WWDG1_CLK_DISABLE
-#define __HAL_RCC_WWDG_CLK_ENABLE __HAL_RCC_WWDG1_CLK_ENABLE
-#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE
-#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE
-
-#define __HAL_RCC_WWDG_FORCE_RESET ((void)0U) /* Not available on the STM32H7*/
-#define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/
-
-
-#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
-#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
-#endif
-
-#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
-#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
-#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
-#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
-#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
-#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
-
-#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
-#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
-#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
-#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
-#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
-#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
-#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
-#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
-#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
-#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
-#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
-#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
-#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
-#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
-#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
-#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
-#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
-#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
-#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
-#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
-
-#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
-#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
-#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
-#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
-#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
-#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
-#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
-#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
-#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
-#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
-#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
-#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
-#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
-#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
-#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
-#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
-#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
-#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
-#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
-#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
-#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
-#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
-#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
-#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
-#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
-#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
-#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
-#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
-#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
-#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
-#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
-#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
-#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
-#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
-#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
-#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
-#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
-#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
-#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
-#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
-#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
-#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
-#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
-#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
-#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
-#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
-#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
-#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
-#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
-#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
-#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
-#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
-#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
-#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
-#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
-#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
-#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
-#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
-#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
-#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
-#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
-#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
-#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
-#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
-#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
-#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
-#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
-#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
-#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
-#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
-#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
-#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
-#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
-#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
-#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
-#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
-#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
-#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
-#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
-#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
-#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
-#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
-#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
-#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
-#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
-#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
-#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
-#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
-#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
-#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
-#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
-#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
-#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
-#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
-#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
-#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
-#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
-#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
-#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
-#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
-#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
-#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
-#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
-#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
-#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
-#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
-#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
-#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
-#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
-#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
-#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
-#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
-#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
-#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
-#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
-#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
-#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
-#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
-#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
-#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
-#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
-#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
-#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
-#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
-#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
-#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
-#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
-#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
-#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
-#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
-#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
-#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
-#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
-#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
-#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
-#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
-#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
-#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
-#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
-#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
-#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
-#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
-#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
-#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
-#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
-
-/* alias define maintained for legacy */
-#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
-#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
-
-#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
-#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
-#define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE
-#define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE
-#define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE
-#define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE
-#define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE
-#define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE
-#define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE
-#define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE
-#define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE
-#define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE
-#define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE
-#define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE
-#define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE
-#define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE
-#define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE
-#define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE
-#define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE
-#define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE
-
-#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
-#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
-#define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET
-#define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET
-#define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET
-#define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET
-#define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET
-#define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET
-#define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET
-#define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET
-#define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET
-#define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET
-#define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET
-#define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET
-#define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET
-#define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET
-#define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET
-#define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET
-#define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET
-#define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET
-
-#define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED
-#define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED
-#define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
-#define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
-#define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED
-#define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED
-#define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED
-#define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED
-#define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED
-#define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED
-#define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED
-#define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED
-#define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED
-#define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED
-#define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED
-#define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED
-#define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED
-#define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED
-#define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED
-#define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED
-#define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED
-#define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED
-#define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED
-#define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED
-#define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED
-#define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED
-#define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED
-#define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED
-#define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED
-#define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED
-#define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED
-#define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED
-#define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED
-#define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED
-#define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED
-#define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED
-#define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED
-#define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED
-#define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED
-#define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED
-#define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED
-#define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED
-#define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED
-#define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED
-#define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED
-#define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED
-#define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED
-#define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED
-#define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED
-#define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED
-#define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED
-#define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED
-#define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED
-#define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED
-#define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED
-#define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED
-#define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED
-#define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED
-#define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED
-#define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED
-#define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED
-#define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED
-#define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED
-#define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED
-#define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED
-#define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED
-#define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED
-#define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED
-#define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED
-#define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED
-#define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED
-#define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED
-#define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED
-#define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED
-#define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED
-#define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED
-#define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED
-#define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED
-#define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED
-#define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED
-#define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED
-#define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED
-#define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED
-#define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED
-#define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED
-#define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED
-#define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED
-#define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED
-#define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED
-#define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED
-#define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED
-#define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED
-#define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED
-#define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED
-#define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED
-#define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED
-#define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED
-#define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED
-#define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED
-#define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED
-#define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED
-#define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED
-#define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED
-#define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED
-#define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED
-#define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED
-#define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED
-#define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED
-#define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED
-#define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED
-#define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED
-#define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED
-#define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED
-#define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED
-#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
-#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
-
-#if defined(STM32L1)
-#define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
-#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
-#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
-#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
-#define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
-#define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
-#endif /* STM32L1 */
-
-#if defined(STM32F4)
-#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
-#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
-#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
-#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
-#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
-#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
-#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED
-#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED
-#define Sdmmc1ClockSelection SdioClockSelection
-#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
-#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
-#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
-#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
-#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
-#endif
-
-#if defined(STM32F7) || defined(STM32L4)
-#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
-#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
-#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
-#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED
-#define SdioClockSelection Sdmmc1ClockSelection
-#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
-#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
-#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
-#endif
-
-#if defined(STM32F7)
-#define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48
-#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
-#endif
-
-#if defined(STM32H7)
-#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE()
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE()
-#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE()
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE()
-#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET()
-#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET()
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE()
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE()
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
-
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE()
-#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE()
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE()
-#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE()
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET()
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET()
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE()
-#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE()
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE()
-#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE()
-#endif
-
-#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
-#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
-
-#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
-
-#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
-#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
-#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
-#define IS_RCC_HCLK_DIV IS_RCC_PCLK
-#define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK
-
-#define RCC_IT_HSI14 RCC_IT_HSI14RDY
-
-#define RCC_IT_CSSLSE RCC_IT_LSECSS
-#define RCC_IT_CSSHSE RCC_IT_CSS
-
-#define RCC_PLLMUL_3 RCC_PLL_MUL3
-#define RCC_PLLMUL_4 RCC_PLL_MUL4
-#define RCC_PLLMUL_6 RCC_PLL_MUL6
-#define RCC_PLLMUL_8 RCC_PLL_MUL8
-#define RCC_PLLMUL_12 RCC_PLL_MUL12
-#define RCC_PLLMUL_16 RCC_PLL_MUL16
-#define RCC_PLLMUL_24 RCC_PLL_MUL24
-#define RCC_PLLMUL_32 RCC_PLL_MUL32
-#define RCC_PLLMUL_48 RCC_PLL_MUL48
-
-#define RCC_PLLDIV_2 RCC_PLL_DIV2
-#define RCC_PLLDIV_3 RCC_PLL_DIV3
-#define RCC_PLLDIV_4 RCC_PLL_DIV4
-
-#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
-#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
-#define RCC_MCO_NODIV RCC_MCODIV_1
-#define RCC_MCO_DIV1 RCC_MCODIV_1
-#define RCC_MCO_DIV2 RCC_MCODIV_2
-#define RCC_MCO_DIV4 RCC_MCODIV_4
-#define RCC_MCO_DIV8 RCC_MCODIV_8
-#define RCC_MCO_DIV16 RCC_MCODIV_16
-#define RCC_MCO_DIV32 RCC_MCODIV_32
-#define RCC_MCO_DIV64 RCC_MCODIV_64
-#define RCC_MCO_DIV128 RCC_MCODIV_128
-#define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK
-#define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI
-#define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE
-#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
-#define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI
-#define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14
-#define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48
-#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
-#define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK
-#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
-#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
-
-#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL) || defined(STM32C0)
-#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
-#else
-#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
-#endif
-
-#define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1
-#define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL
-#define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI
-#define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL
-#define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL
-#define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5
-#define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2
-#define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3
-
-#define HSION_BitNumber RCC_HSION_BIT_NUMBER
-#define HSION_BITNUMBER RCC_HSION_BIT_NUMBER
-#define HSEON_BitNumber RCC_HSEON_BIT_NUMBER
-#define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER
-#define MSION_BITNUMBER RCC_MSION_BIT_NUMBER
-#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
-#define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER
-#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
-#define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER
-#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
-#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
-#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
-#define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER
-#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
-#define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER
-#define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER
-#define LSION_BitNumber RCC_LSION_BIT_NUMBER
-#define LSION_BITNUMBER RCC_LSION_BIT_NUMBER
-#define LSEON_BitNumber RCC_LSEON_BIT_NUMBER
-#define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER
-#define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER
-#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
-#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
-#define RMVF_BitNumber RCC_RMVF_BIT_NUMBER
-#define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER
-#define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
-#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
-#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
-#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
-#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
-#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
-#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
-
-#define CR_HSION_BB RCC_CR_HSION_BB
-#define CR_CSSON_BB RCC_CR_CSSON_BB
-#define CR_PLLON_BB RCC_CR_PLLON_BB
-#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
-#define CR_MSION_BB RCC_CR_MSION_BB
-#define CSR_LSION_BB RCC_CSR_LSION_BB
-#define CSR_LSEON_BB RCC_CSR_LSEON_BB
-#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
-#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
-#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
-#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
-#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
-#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
-#define CR_HSEON_BB RCC_CR_HSEON_BB
-#define CSR_RMVF_BB RCC_CSR_RMVF_BB
-#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
-#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
-
-#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
-#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
-#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
-#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
-#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE
-
-#define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT
-
-#define RCC_CRS_SYNCWARM RCC_CRS_SYNCWARN
-#define RCC_CRS_TRIMOV RCC_CRS_TRIMOVF
-
-#define RCC_PERIPHCLK_CK48 RCC_PERIPHCLK_CLK48
-#define RCC_CK48CLKSOURCE_PLLQ RCC_CLK48CLKSOURCE_PLLQ
-#define RCC_CK48CLKSOURCE_PLLSAIP RCC_CLK48CLKSOURCE_PLLSAIP
-#define RCC_CK48CLKSOURCE_PLLI2SQ RCC_CLK48CLKSOURCE_PLLI2SQ
-#define IS_RCC_CK48CLKSOURCE IS_RCC_CLK48CLKSOURCE
-#define RCC_SDIOCLKSOURCE_CK48 RCC_SDIOCLKSOURCE_CLK48
-
-#define __HAL_RCC_DFSDM_CLK_ENABLE __HAL_RCC_DFSDM1_CLK_ENABLE
-#define __HAL_RCC_DFSDM_CLK_DISABLE __HAL_RCC_DFSDM1_CLK_DISABLE
-#define __HAL_RCC_DFSDM_IS_CLK_ENABLED __HAL_RCC_DFSDM1_IS_CLK_ENABLED
-#define __HAL_RCC_DFSDM_IS_CLK_DISABLED __HAL_RCC_DFSDM1_IS_CLK_DISABLED
-#define __HAL_RCC_DFSDM_FORCE_RESET __HAL_RCC_DFSDM1_FORCE_RESET
-#define __HAL_RCC_DFSDM_RELEASE_RESET __HAL_RCC_DFSDM1_RELEASE_RESET
-#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
-#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
-#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
-#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
-#define DfsdmClockSelection Dfsdm1ClockSelection
-#define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1
-#define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
-#define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK
-#define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG
-#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
-#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
-#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
-#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
-#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
-
-#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
-#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
-#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1
-#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2
-#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
-#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
-#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
-#if defined(STM32U5)
-#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
-#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
-#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
-#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
-#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
-#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE
-#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE
-#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE
-#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE
-#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE
-#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE
-#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT
-#define RCC_PERIPHCLK_CLK48 RCC_PERIPHCLK_ICLK
-#define RCC_CLK48CLKSOURCE_HSI48 RCC_ICLK_CLKSOURCE_HSI48
-#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2
-#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1
-#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK
-#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
-#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
-#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
-#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
-#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
-#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
-#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
-#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
-#define __HAL_RCC_GET_CLK48_SOURCE __HAL_RCC_GET_ICLK_SOURCE
-#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
-#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
-#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
-#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
-#endif /* STM32U5 */
-
-/**
- * @}
- */
-
-/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
- * @{
- */
-#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
-
-/**
- * @}
- */
-
-/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
- * @{
- */
-#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx)|| \
- defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
- defined (STM32C0)
-#else
-#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
-#endif
-#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
-#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
-
-#if defined (STM32F1)
-#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
-
-#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
-
-#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
-
-#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
-
-#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
-#else
-#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
- (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
-#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
- (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
-#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
- (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
-#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
- (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
-#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
- (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
- __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
-#endif /* STM32F1 */
-
-#define IS_ALARM IS_RTC_ALARM
-#define IS_ALARM_MASK IS_RTC_ALARM_MASK
-#define IS_TAMPER IS_RTC_TAMPER
-#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
-#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
-#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
-#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
-#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
-#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
-#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
-#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
-#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
-#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
-#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
-
-#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
-#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
-#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
-
-#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
-#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
-#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
-#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
-
-#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV
-#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV
-#endif
-
-#if defined(STM32F4) || defined(STM32F2)
-#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
-#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
-#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
-#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
-#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
-#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
-#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
-#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
-#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
-#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
-#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
-#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
-#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
-#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
-#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
-#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
-#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
-#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
-#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
-#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
-/* alias CMSIS */
-#define SDMMC1_IRQn SDIO_IRQn
-#define SDMMC1_IRQHandler SDIO_IRQHandler
-#endif
-
-#if defined(STM32F7) || defined(STM32L4)
-#define SD_SDIO_DISABLED SD_SDMMC_DISABLED
-#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
-#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
-#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
-#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
-#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
-#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
-#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
-#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
-#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
-#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
-#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
-#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
-#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
-#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
-#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
-#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
-#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
-#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
-#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
-/* alias CMSIS for compatibilities */
-#define SDIO_IRQn SDMMC1_IRQn
-#define SDIO_IRQHandler SDMMC1_IRQHandler
-#endif
-
-#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7)
-#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
-#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
-#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef
-#define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef
-#endif
-
-#if defined(STM32H7) || defined(STM32L5)
-#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
-#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
-#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
-#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
-#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback
-#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback
-#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback
-#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback
-#define HAL_SD_DriveTransciver_1_8V_Callback HAL_SD_DriveTransceiver_1_8V_Callback
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
-#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
-#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
-#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
-#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
-#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
-
-#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
-#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
-
-#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
-
-/**
- * @}
- */
-
-/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
-#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
-#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
-#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
-#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
-#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
-#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
-#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
-/**
- * @}
- */
-
-/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __HAL_SPI_1LINE_TX SPI_1LINE_TX
-#define __HAL_SPI_1LINE_RX SPI_1LINE_RX
-#define __HAL_SPI_RESET_CRC SPI_RESET_CRC
-
-/**
- * @}
- */
-
-/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
-#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
-#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
-#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
-
-#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
-
-#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
-#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
-
-/**
- * @}
- */
-
-
-/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
-#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
-#define __USART_ENABLE __HAL_USART_ENABLE
-#define __USART_DISABLE __HAL_USART_DISABLE
-
-#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
-#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
-
-#if defined(STM32F0) || defined(STM32F3) || defined(STM32F7)
-#define USART_OVERSAMPLING_16 0x00000000U
-#define USART_OVERSAMPLING_8 USART_CR1_OVER8
-
-#define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
- ((__SAMPLING__) == USART_OVERSAMPLING_8))
-#endif /* STM32F0 || STM32F3 || STM32F7 */
-/**
- * @}
- */
-
-/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
- * @{
- */
-#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
-
-#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
-#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
-#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
-#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
-
-#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
-#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
-#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
-#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
-
-#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-
-#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
-
-#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
-#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
-#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
-#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
-#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
-
-#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
-#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
-
-#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
-#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
-/**
- * @}
- */
-
-/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
-#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
-
-#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
-#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
-
-#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
-
-#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
-#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
-#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
-#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
-#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
-#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
-#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
-#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
-#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
-#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
-#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
-#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
-
-#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
-/**
- * @}
- */
-
-/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
- * @{
- */
-
-#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
-#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
-#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
-#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
-#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
-#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
-#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
-
-#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
-#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
-#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
-/**
- * @}
- */
-
-/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
- * @{
- */
-#define __HAL_LTDC_LAYER LTDC_LAYER
-#define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
-/**
- * @}
- */
-
-/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
- * @{
- */
-#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
-#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
-#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
-#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
-#define SAI_STREOMODE SAI_STEREOMODE
-#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
-#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
-#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
-#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
-#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
-#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
-#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
-#define SAI_SYNCHRONOUS_EXT SAI_SYNCHRONOUS_EXT_SAI1
-#define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE
-/**
- * @}
- */
-
-/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
- * @{
- */
-#if defined(STM32H7)
-#define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow
-#define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT
-#define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose
- * @{
- */
-#if defined (STM32H7) || defined (STM32G4) || defined (STM32F3)
-#define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT
-#define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA
-#define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart
-#define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT
-#define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA
-#define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop
-#endif
-/**
- * @}
- */
-
-/** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
- * @{
- */
-#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7)
-#define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
-#endif /* STM32L4 || STM32F4 || STM32F7 */
-/**
- * @}
- */
-
-/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
- * @{
- */
-#if defined (STM32F7)
-#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
-#endif /* STM32F7 */
-/**
- * @}
- */
-
-/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
- * @{
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32_HAL_LEGACY */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h
deleted file mode 100644
index 5d8cdd3684990a5021f71fa74f51763f6359a4f0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h
+++ /dev/null
@@ -1,297 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal.h
- * @author MCD Application Team
- * @brief This file contains all the functions prototypes for the HAL
- * module driver.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_H
-#define __STM32F4xx_HAL_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_conf.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup HAL
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup HAL_Exported_Constants HAL Exported Constants
- * @{
- */
-
-/** @defgroup HAL_TICK_FREQ Tick Frequency
- * @{
- */
-typedef enum
-{
- HAL_TICK_FREQ_10HZ = 100U,
- HAL_TICK_FREQ_100HZ = 10U,
- HAL_TICK_FREQ_1KHZ = 1U,
- HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
-} HAL_TickFreqTypeDef;
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup HAL_Exported_Macros HAL Exported Macros
- * @{
- */
-
-/** @brief Freeze/Unfreeze Peripherals in Debug mode
- */
-#define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
-#define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
-#define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
-#define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
-#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
-#define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
-#define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
-
-#define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
-#define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
-#define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
-#define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
-#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
-#define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
-#define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
-#define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
-
-/** @brief Main Flash memory mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
-
-/** @brief System Flash memory mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
- SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
- }while(0);
-
-/** @brief Embedded SRAM mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
- SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
- }while(0);
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
-/** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
- SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
- }while(0);
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
- SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
- }while(0);
-
-/** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
- */
-#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
- SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
- }while(0);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
- * @{
- */
-/** @brief SYSCFG Break Lockup lock
- * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
- * @note The selected configuration is locked and can be unlocked by system reset
- */
-#define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
- SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
- }while(0)
-/**
- * @}
- */
-
-/** @defgroup PVD_Lock_Enable PVD Lock
- * @{
- */
-/** @brief SYSCFG Break PVD lock
- * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
- * @note The selected configuration is locked and can be unlocked by system reset
- */
-#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
- SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
- }while(0)
-/**
- * @}
- */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup HAL_Private_Macros HAL Private Macros
- * @{
- */
-#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
- ((FREQ) == HAL_TICK_FREQ_100HZ) || \
- ((FREQ) == HAL_TICK_FREQ_1KHZ))
-/**
- * @}
- */
-
-/* Exported variables --------------------------------------------------------*/
-
-/** @addtogroup HAL_Exported_Variables
- * @{
- */
-extern __IO uint32_t uwTick;
-extern uint32_t uwTickPrio;
-extern HAL_TickFreqTypeDef uwTickFreq;
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup HAL_Exported_Functions
- * @{
- */
-/** @addtogroup HAL_Exported_Functions_Group1
- * @{
- */
-/* Initialization and Configuration functions ******************************/
-HAL_StatusTypeDef HAL_Init(void);
-HAL_StatusTypeDef HAL_DeInit(void);
-void HAL_MspInit(void);
-void HAL_MspDeInit(void);
-HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
-/**
- * @}
- */
-
-/** @addtogroup HAL_Exported_Functions_Group2
- * @{
- */
-/* Peripheral Control functions ************************************************/
-void HAL_IncTick(void);
-void HAL_Delay(uint32_t Delay);
-uint32_t HAL_GetTick(void);
-uint32_t HAL_GetTickPrio(void);
-HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
-HAL_TickFreqTypeDef HAL_GetTickFreq(void);
-void HAL_SuspendTick(void);
-void HAL_ResumeTick(void);
-uint32_t HAL_GetHalVersion(void);
-uint32_t HAL_GetREVID(void);
-uint32_t HAL_GetDEVID(void);
-void HAL_DBGMCU_EnableDBGSleepMode(void);
-void HAL_DBGMCU_DisableDBGSleepMode(void);
-void HAL_DBGMCU_EnableDBGStopMode(void);
-void HAL_DBGMCU_DisableDBGStopMode(void);
-void HAL_DBGMCU_EnableDBGStandbyMode(void);
-void HAL_DBGMCU_DisableDBGStandbyMode(void);
-void HAL_EnableCompensationCell(void);
-void HAL_DisableCompensationCell(void);
-uint32_t HAL_GetUIDw0(void);
-uint32_t HAL_GetUIDw1(void);
-uint32_t HAL_GetUIDw2(void);
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-void HAL_EnableMemorySwappingBank(void);
-void HAL_DisableMemorySwappingBank(void);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup HAL_Private_Variables HAL Private Variables
- * @{
- */
-/**
- * @}
- */
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup HAL_Private_Constants HAL Private Constants
- * @{
- */
-/**
- * @}
- */
-/* Private macros ------------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_H */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h
deleted file mode 100644
index 935be057a1b61384494fba1585e168136184b99c..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h
+++ /dev/null
@@ -1,407 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_cortex.h
- * @author MCD Application Team
- * @brief Header file of CORTEX HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CORTEX_H
-#define __STM32F4xx_HAL_CORTEX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup CORTEX
- * @{
- */
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup CORTEX_Exported_Types Cortex Exported Types
- * @{
- */
-
-#if (__MPU_PRESENT == 1U)
-/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
- * @brief MPU Region initialization structure
- * @{
- */
-typedef struct
-{
- uint8_t Enable; /*!< Specifies the status of the region.
- This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
- uint8_t Number; /*!< Specifies the number of the region to protect.
- This parameter can be a value of @ref CORTEX_MPU_Region_Number */
- uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
- uint8_t Size; /*!< Specifies the size of the region to protect.
- This parameter can be a value of @ref CORTEX_MPU_Region_Size */
- uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
- uint8_t TypeExtField; /*!< Specifies the TEX field level.
- This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
- uint8_t AccessPermission; /*!< Specifies the region access permission type.
- This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
- uint8_t DisableExec; /*!< Specifies the instruction access status.
- This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
- uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
- This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
- uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
- This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
- uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
- This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
-}MPU_Region_InitTypeDef;
-/**
- * @}
- */
-#endif /* __MPU_PRESENT */
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
- * @{
- */
-
-/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
- * @{
- */
-#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
- 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
- 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
- 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
- 1 bits for subpriority */
-#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority
- 0 bits for subpriority */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
- * @{
- */
-#define SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U
-#define SYSTICK_CLKSOURCE_HCLK 0x00000004U
-
-/**
- * @}
- */
-
-#if (__MPU_PRESENT == 1)
-/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
- * @{
- */
-#define MPU_HFNMI_PRIVDEF_NONE 0x00000000U
-#define MPU_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk
-#define MPU_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk
-#define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
-
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
- * @{
- */
-#define MPU_REGION_ENABLE ((uint8_t)0x01)
-#define MPU_REGION_DISABLE ((uint8_t)0x00)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
- * @{
- */
-#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
-#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
- * @{
- */
-#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
-#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
- * @{
- */
-#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
-#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
- * @{
- */
-#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
-#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
- * @{
- */
-#define MPU_TEX_LEVEL0 ((uint8_t)0x00)
-#define MPU_TEX_LEVEL1 ((uint8_t)0x01)
-#define MPU_TEX_LEVEL2 ((uint8_t)0x02)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
- * @{
- */
-#define MPU_REGION_SIZE_32B ((uint8_t)0x04)
-#define MPU_REGION_SIZE_64B ((uint8_t)0x05)
-#define MPU_REGION_SIZE_128B ((uint8_t)0x06)
-#define MPU_REGION_SIZE_256B ((uint8_t)0x07)
-#define MPU_REGION_SIZE_512B ((uint8_t)0x08)
-#define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
-#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
-#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
-#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
-#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
-#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
-#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
-#define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
-#define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
-#define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
-#define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
-#define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
-#define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
-#define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
-#define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
-#define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
-#define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
-#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
-#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
-#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
-#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
-#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
-#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
- * @{
- */
-#define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
-#define MPU_REGION_PRIV_RW ((uint8_t)0x01)
-#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
-#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
-#define MPU_REGION_PRIV_RO ((uint8_t)0x05)
-#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
-/**
- * @}
- */
-
-/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
- * @{
- */
-#define MPU_REGION_NUMBER0 ((uint8_t)0x00)
-#define MPU_REGION_NUMBER1 ((uint8_t)0x01)
-#define MPU_REGION_NUMBER2 ((uint8_t)0x02)
-#define MPU_REGION_NUMBER3 ((uint8_t)0x03)
-#define MPU_REGION_NUMBER4 ((uint8_t)0x04)
-#define MPU_REGION_NUMBER5 ((uint8_t)0x05)
-#define MPU_REGION_NUMBER6 ((uint8_t)0x06)
-#define MPU_REGION_NUMBER7 ((uint8_t)0x07)
-/**
- * @}
- */
-#endif /* __MPU_PRESENT */
-
-/**
- * @}
- */
-
-
-/* Exported Macros -----------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CORTEX_Exported_Functions
- * @{
- */
-
-/** @addtogroup CORTEX_Exported_Functions_Group1
- * @{
- */
-/* Initialization and de-initialization functions *****************************/
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
-void HAL_NVIC_SystemReset(void);
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
-/**
- * @}
- */
-
-/** @addtogroup CORTEX_Exported_Functions_Group2
- * @{
- */
-/* Peripheral Control functions ***********************************************/
-uint32_t HAL_NVIC_GetPriorityGrouping(void);
-void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
-uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
-void HAL_SYSTICK_IRQHandler(void);
-void HAL_SYSTICK_Callback(void);
-
-#if (__MPU_PRESENT == 1U)
-void HAL_MPU_Enable(uint32_t MPU_Control);
-void HAL_MPU_Disable(void);
-void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
-#endif /* __MPU_PRESENT */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
- * @{
- */
-#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
- ((GROUP) == NVIC_PRIORITYGROUP_1) || \
- ((GROUP) == NVIC_PRIORITYGROUP_2) || \
- ((GROUP) == NVIC_PRIORITYGROUP_3) || \
- ((GROUP) == NVIC_PRIORITYGROUP_4))
-
-#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
-
-#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
-
-#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U)
-
-#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
- ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
-
-#if (__MPU_PRESENT == 1U)
-#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
- ((STATE) == MPU_REGION_DISABLE))
-
-#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
- ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
-
-#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
- ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
-
-#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
- ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
-
-#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
- ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
-
-#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
- ((TYPE) == MPU_TEX_LEVEL1) || \
- ((TYPE) == MPU_TEX_LEVEL2))
-
-#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
- ((TYPE) == MPU_REGION_PRIV_RW) || \
- ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
- ((TYPE) == MPU_REGION_FULL_ACCESS) || \
- ((TYPE) == MPU_REGION_PRIV_RO) || \
- ((TYPE) == MPU_REGION_PRIV_RO_URO))
-
-#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
- ((NUMBER) == MPU_REGION_NUMBER1) || \
- ((NUMBER) == MPU_REGION_NUMBER2) || \
- ((NUMBER) == MPU_REGION_NUMBER3) || \
- ((NUMBER) == MPU_REGION_NUMBER4) || \
- ((NUMBER) == MPU_REGION_NUMBER5) || \
- ((NUMBER) == MPU_REGION_NUMBER6) || \
- ((NUMBER) == MPU_REGION_NUMBER7))
-
-#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
- ((SIZE) == MPU_REGION_SIZE_64B) || \
- ((SIZE) == MPU_REGION_SIZE_128B) || \
- ((SIZE) == MPU_REGION_SIZE_256B) || \
- ((SIZE) == MPU_REGION_SIZE_512B) || \
- ((SIZE) == MPU_REGION_SIZE_1KB) || \
- ((SIZE) == MPU_REGION_SIZE_2KB) || \
- ((SIZE) == MPU_REGION_SIZE_4KB) || \
- ((SIZE) == MPU_REGION_SIZE_8KB) || \
- ((SIZE) == MPU_REGION_SIZE_16KB) || \
- ((SIZE) == MPU_REGION_SIZE_32KB) || \
- ((SIZE) == MPU_REGION_SIZE_64KB) || \
- ((SIZE) == MPU_REGION_SIZE_128KB) || \
- ((SIZE) == MPU_REGION_SIZE_256KB) || \
- ((SIZE) == MPU_REGION_SIZE_512KB) || \
- ((SIZE) == MPU_REGION_SIZE_1MB) || \
- ((SIZE) == MPU_REGION_SIZE_2MB) || \
- ((SIZE) == MPU_REGION_SIZE_4MB) || \
- ((SIZE) == MPU_REGION_SIZE_8MB) || \
- ((SIZE) == MPU_REGION_SIZE_16MB) || \
- ((SIZE) == MPU_REGION_SIZE_32MB) || \
- ((SIZE) == MPU_REGION_SIZE_64MB) || \
- ((SIZE) == MPU_REGION_SIZE_128MB) || \
- ((SIZE) == MPU_REGION_SIZE_256MB) || \
- ((SIZE) == MPU_REGION_SIZE_512MB) || \
- ((SIZE) == MPU_REGION_SIZE_1GB) || \
- ((SIZE) == MPU_REGION_SIZE_2GB) || \
- ((SIZE) == MPU_REGION_SIZE_4GB))
-
-#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
-#endif /* __MPU_PRESENT */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CORTEX_H */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h
deleted file mode 100644
index 094b411b8be9ff3367df89454d1225c34b2f16a9..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_def.h
- * @author MCD Application Team
- * @brief This file contains HAL common defines, enumeration, macros and
- * structures definitions.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_DEF
-#define __STM32F4xx_HAL_DEF
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-#include "Legacy/stm32_hal_legacy.h"
-#include <stddef.h>
-
-/* Exported types ------------------------------------------------------------*/
-
-/**
- * @brief HAL Status structures definition
- */
-typedef enum
-{
- HAL_OK = 0x00U,
- HAL_ERROR = 0x01U,
- HAL_BUSY = 0x02U,
- HAL_TIMEOUT = 0x03U
-} HAL_StatusTypeDef;
-
-/**
- * @brief HAL Lock structures definition
- */
-typedef enum
-{
- HAL_UNLOCKED = 0x00U,
- HAL_LOCKED = 0x01U
-} HAL_LockTypeDef;
-
-/* Exported macro ------------------------------------------------------------*/
-
-#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
-
-#define HAL_MAX_DELAY 0xFFFFFFFFU
-
-#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
-#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
-
-#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
- do{ \
- (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
- (__DMA_HANDLE__).Parent = (__HANDLE__); \
- } while(0U)
-
-/** @brief Reset the Handle's State field.
- * @param __HANDLE__ specifies the Peripheral Handle.
- * @note This macro can be used for the following purpose:
- * - When the Handle is declared as local variable; before passing it as parameter
- * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
- * to set to 0 the Handle's "State" field.
- * Otherwise, "State" field may have any random value and the first time the function
- * HAL_PPP_Init() is called, the low level hardware initialization will be missed
- * (i.e. HAL_PPP_MspInit() will not be executed).
- * - When there is a need to reconfigure the low level hardware: instead of calling
- * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
- * In this later function, when the Handle's "State" field is set to 0, it will execute the function
- * HAL_PPP_MspInit() which will reconfigure the low level hardware.
- * @retval None
- */
-#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
-
-#if (USE_RTOS == 1U)
- /* Reserved for future use */
- #error "USE_RTOS should be 0 in the current HAL release"
-#else
- #define __HAL_LOCK(__HANDLE__) \
- do{ \
- if((__HANDLE__)->Lock == HAL_LOCKED) \
- { \
- return HAL_BUSY; \
- } \
- else \
- { \
- (__HANDLE__)->Lock = HAL_LOCKED; \
- } \
- }while (0U)
-
- #define __HAL_UNLOCK(__HANDLE__) \
- do{ \
- (__HANDLE__)->Lock = HAL_UNLOCKED; \
- }while (0U)
-#endif /* USE_RTOS */
-
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
- #ifndef __weak
- #define __weak __attribute__((weak))
- #endif
- #ifndef __packed
- #define __packed __attribute__((packed))
- #endif
-#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
- #ifndef __weak
- #define __weak __attribute__((weak))
- #endif /* __weak */
- #ifndef __packed
- #define __packed __attribute__((__packed__))
- #endif /* __packed */
-#endif /* __GNUC__ */
-
-
-/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
- #ifndef __ALIGN_BEGIN
- #define __ALIGN_BEGIN
- #endif
- #ifndef __ALIGN_END
- #define __ALIGN_END __attribute__ ((aligned (4)))
- #endif
-#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
- #ifndef __ALIGN_END
-#define __ALIGN_END __attribute__ ((aligned (4)))
- #endif /* __ALIGN_END */
- #ifndef __ALIGN_BEGIN
- #define __ALIGN_BEGIN
- #endif /* __ALIGN_BEGIN */
-#else
- #ifndef __ALIGN_END
- #define __ALIGN_END
- #endif /* __ALIGN_END */
- #ifndef __ALIGN_BEGIN
- #if defined (__CC_ARM) /* ARM Compiler V5*/
-#define __ALIGN_BEGIN __align(4)
- #elif defined (__ICCARM__) /* IAR Compiler */
- #define __ALIGN_BEGIN
- #endif /* __CC_ARM */
- #endif /* __ALIGN_BEGIN */
-#endif /* __GNUC__ */
-
-
-/**
- * @brief __RAM_FUNC definition
- */
-#if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
-/* ARM Compiler V4/V5 and V6
- --------------------------
- RAM functions are defined using the toolchain options.
- Functions that are executed in RAM should reside in a separate source module.
- Using the 'Options for File' dialog you can simply change the 'Code / Const'
- area of a module to a memory space in physical RAM.
- Available memory areas are declared in the 'Target' tab of the 'Options for Target'
- dialog.
-*/
-#define __RAM_FUNC
-
-#elif defined ( __ICCARM__ )
-/* ICCARM Compiler
- ---------------
- RAM functions are defined using a specific toolchain keyword "__ramfunc".
-*/
-#define __RAM_FUNC __ramfunc
-
-#elif defined ( __GNUC__ )
-/* GNU Compiler
- ------------
- RAM functions are defined using a specific toolchain attribute
- "__attribute__((section(".RamFunc")))".
-*/
-#define __RAM_FUNC __attribute__((section(".RamFunc")))
-
-#endif
-
-/**
- * @brief __NOINLINE definition
- */
-#if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
-/* ARM V4/V5 and V6 & GNU Compiler
- -------------------------------
-*/
-#define __NOINLINE __attribute__ ( (noinline) )
-
-#elif defined ( __ICCARM__ )
-/* ICCARM Compiler
- ---------------
-*/
-#define __NOINLINE _Pragma("optimize = no_inline")
-
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ___STM32F4xx_HAL_DEF */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h
deleted file mode 100644
index 336b2bbc1da249de1d78406dfdddf69bde2cb6e5..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h
+++ /dev/null
@@ -1,802 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_dma.h
- * @author MCD Application Team
- * @brief Header file of DMA HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_DMA_H
-#define __STM32F4xx_HAL_DMA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup DMA
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Types DMA Exported Types
- * @brief DMA Exported Types
- * @{
- */
-
-/**
- * @brief DMA Configuration Structure definition
- */
-typedef struct
-{
- uint32_t Channel; /*!< Specifies the channel used for the specified stream.
- This parameter can be a value of @ref DMA_Channel_selection */
-
- uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
- from memory to memory or from peripheral to memory.
- This parameter can be a value of @ref DMA_Data_transfer_direction */
-
- uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
- This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
-
- uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
- This parameter can be a value of @ref DMA_Memory_incremented_mode */
-
- uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
- This parameter can be a value of @ref DMA_Peripheral_data_size */
-
- uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
- This parameter can be a value of @ref DMA_Memory_data_size */
-
- uint32_t Mode; /*!< Specifies the operation mode of the DMAy Streamx.
- This parameter can be a value of @ref DMA_mode
- @note The circular buffer mode cannot be used if the memory-to-memory
- data transfer is configured on the selected Stream */
-
- uint32_t Priority; /*!< Specifies the software priority for the DMAy Streamx.
- This parameter can be a value of @ref DMA_Priority_level */
-
- uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for the specified stream.
- This parameter can be a value of @ref DMA_FIFO_direct_mode
- @note The Direct mode (FIFO mode disabled) cannot be used if the
- memory-to-memory data transfer is configured on the selected stream */
-
- uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level.
- This parameter can be a value of @ref DMA_FIFO_threshold_level */
-
- uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory transfers.
- It specifies the amount of data to be transferred in a single non interruptible
- transaction.
- This parameter can be a value of @ref DMA_Memory_burst
- @note The burst mode is possible only if the address Increment mode is enabled. */
-
- uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripheral transfers.
- It specifies the amount of data to be transferred in a single non interruptible
- transaction.
- This parameter can be a value of @ref DMA_Peripheral_burst
- @note The burst mode is possible only if the address Increment mode is enabled. */
-}DMA_InitTypeDef;
-
-
-/**
- * @brief HAL DMA State structures definition
- */
-typedef enum
-{
- HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
- HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
- HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
- HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
- HAL_DMA_STATE_ERROR = 0x04U, /*!< DMA error state */
- HAL_DMA_STATE_ABORT = 0x05U, /*!< DMA Abort state */
-}HAL_DMA_StateTypeDef;
-
-/**
- * @brief HAL DMA Error Code structure definition
- */
-typedef enum
-{
- HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
- HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */
-}HAL_DMA_LevelCompleteTypeDef;
-
-/**
- * @brief HAL DMA Error Code structure definition
- */
-typedef enum
-{
- HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */
- HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half Transfer */
- HAL_DMA_XFER_M1CPLT_CB_ID = 0x02U, /*!< M1 Full Transfer */
- HAL_DMA_XFER_M1HALFCPLT_CB_ID = 0x03U, /*!< M1 Half Transfer */
- HAL_DMA_XFER_ERROR_CB_ID = 0x04U, /*!< Error */
- HAL_DMA_XFER_ABORT_CB_ID = 0x05U, /*!< Abort */
- HAL_DMA_XFER_ALL_CB_ID = 0x06U /*!< All */
-}HAL_DMA_CallbackIDTypeDef;
-
-/**
- * @brief DMA handle Structure definition
- */
-typedef struct __DMA_HandleTypeDef
-{
- DMA_Stream_TypeDef *Instance; /*!< Register base address */
-
- DMA_InitTypeDef Init; /*!< DMA communication parameters */
-
- HAL_LockTypeDef Lock; /*!< DMA locking object */
-
- __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
-
- void *Parent; /*!< Parent object state */
-
- void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
-
- void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
-
- void (* XferM1CpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete Memory1 callback */
-
- void (* XferM1HalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer Half complete Memory1 callback */
-
- void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
-
- void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer Abort callback */
-
- __IO uint32_t ErrorCode; /*!< DMA Error code */
-
- uint32_t StreamBaseAddress; /*!< DMA Stream Base Address */
-
- uint32_t StreamIndex; /*!< DMA Stream Index */
-
-}DMA_HandleTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Constants DMA Exported Constants
- * @brief DMA Exported constants
- * @{
- */
-
-/** @defgroup DMA_Error_Code DMA Error Code
- * @brief DMA Error Code
- * @{
- */
-#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
-#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
-#define HAL_DMA_ERROR_FE 0x00000002U /*!< FIFO error */
-#define HAL_DMA_ERROR_DME 0x00000004U /*!< Direct Mode error */
-#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
-#define HAL_DMA_ERROR_PARAM 0x00000040U /*!< Parameter error */
-#define HAL_DMA_ERROR_NO_XFER 0x00000080U /*!< Abort requested with no Xfer ongoing */
-#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
-/**
- * @}
- */
-
-/** @defgroup DMA_Channel_selection DMA Channel selection
- * @brief DMA channel selection
- * @{
- */
-#define DMA_CHANNEL_0 0x00000000U /*!< DMA Channel 0 */
-#define DMA_CHANNEL_1 0x02000000U /*!< DMA Channel 1 */
-#define DMA_CHANNEL_2 0x04000000U /*!< DMA Channel 2 */
-#define DMA_CHANNEL_3 0x06000000U /*!< DMA Channel 3 */
-#define DMA_CHANNEL_4 0x08000000U /*!< DMA Channel 4 */
-#define DMA_CHANNEL_5 0x0A000000U /*!< DMA Channel 5 */
-#define DMA_CHANNEL_6 0x0C000000U /*!< DMA Channel 6 */
-#define DMA_CHANNEL_7 0x0E000000U /*!< DMA Channel 7 */
-#if defined (DMA_SxCR_CHSEL_3)
-#define DMA_CHANNEL_8 0x10000000U /*!< DMA Channel 8 */
-#define DMA_CHANNEL_9 0x12000000U /*!< DMA Channel 9 */
-#define DMA_CHANNEL_10 0x14000000U /*!< DMA Channel 10 */
-#define DMA_CHANNEL_11 0x16000000U /*!< DMA Channel 11 */
-#define DMA_CHANNEL_12 0x18000000U /*!< DMA Channel 12 */
-#define DMA_CHANNEL_13 0x1A000000U /*!< DMA Channel 13 */
-#define DMA_CHANNEL_14 0x1C000000U /*!< DMA Channel 14 */
-#define DMA_CHANNEL_15 0x1E000000U /*!< DMA Channel 15 */
-#endif /* DMA_SxCR_CHSEL_3 */
-/**
- * @}
- */
-
-/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
- * @brief DMA data transfer direction
- * @{
- */
-#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
-#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_SxCR_DIR_0) /*!< Memory to peripheral direction */
-#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_SxCR_DIR_1) /*!< Memory to memory direction */
-/**
- * @}
- */
-
-/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
- * @brief DMA peripheral incremented mode
- * @{
- */
-#define DMA_PINC_ENABLE ((uint32_t)DMA_SxCR_PINC) /*!< Peripheral increment mode enable */
-#define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode disable */
-/**
- * @}
- */
-
-/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
- * @brief DMA memory incremented mode
- * @{
- */
-#define DMA_MINC_ENABLE ((uint32_t)DMA_SxCR_MINC) /*!< Memory increment mode enable */
-#define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode disable */
-/**
- * @}
- */
-
-/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
- * @brief DMA peripheral data size
- * @{
- */
-#define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment: Byte */
-#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
-#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_SxCR_PSIZE_1) /*!< Peripheral data alignment: Word */
-/**
- * @}
- */
-
-/** @defgroup DMA_Memory_data_size DMA Memory data size
- * @brief DMA memory data size
- * @{
- */
-#define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment: Byte */
-#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
-#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_SxCR_MSIZE_1) /*!< Memory data alignment: Word */
-/**
- * @}
- */
-
-/** @defgroup DMA_mode DMA mode
- * @brief DMA mode
- * @{
- */
-#define DMA_NORMAL 0x00000000U /*!< Normal mode */
-#define DMA_CIRCULAR ((uint32_t)DMA_SxCR_CIRC) /*!< Circular mode */
-#define DMA_PFCTRL ((uint32_t)DMA_SxCR_PFCTRL) /*!< Peripheral flow control mode */
-/**
- * @}
- */
-
-/** @defgroup DMA_Priority_level DMA Priority level
- * @brief DMA priority levels
- * @{
- */
-#define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level: Low */
-#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
-#define DMA_PRIORITY_HIGH ((uint32_t)DMA_SxCR_PL_1) /*!< Priority level: High */
-#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_SxCR_PL) /*!< Priority level: Very High */
-/**
- * @}
- */
-
-/** @defgroup DMA_FIFO_direct_mode DMA FIFO direct mode
- * @brief DMA FIFO direct mode
- * @{
- */
-#define DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
-#define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
-/**
- * @}
- */
-
-/** @defgroup DMA_FIFO_threshold_level DMA FIFO threshold level
- * @brief DMA FIFO level
- * @{
- */
-#define DMA_FIFO_THRESHOLD_1QUARTERFULL 0x00000000U /*!< FIFO threshold 1 quart full configuration */
-#define DMA_FIFO_THRESHOLD_HALFFULL ((uint32_t)DMA_SxFCR_FTH_0) /*!< FIFO threshold half full configuration */
-#define DMA_FIFO_THRESHOLD_3QUARTERSFULL ((uint32_t)DMA_SxFCR_FTH_1) /*!< FIFO threshold 3 quarts full configuration */
-#define DMA_FIFO_THRESHOLD_FULL ((uint32_t)DMA_SxFCR_FTH) /*!< FIFO threshold full configuration */
-/**
- * @}
- */
-
-/** @defgroup DMA_Memory_burst DMA Memory burst
- * @brief DMA memory burst
- * @{
- */
-#define DMA_MBURST_SINGLE 0x00000000U
-#define DMA_MBURST_INC4 ((uint32_t)DMA_SxCR_MBURST_0)
-#define DMA_MBURST_INC8 ((uint32_t)DMA_SxCR_MBURST_1)
-#define DMA_MBURST_INC16 ((uint32_t)DMA_SxCR_MBURST)
-/**
- * @}
- */
-
-/** @defgroup DMA_Peripheral_burst DMA Peripheral burst
- * @brief DMA peripheral burst
- * @{
- */
-#define DMA_PBURST_SINGLE 0x00000000U
-#define DMA_PBURST_INC4 ((uint32_t)DMA_SxCR_PBURST_0)
-#define DMA_PBURST_INC8 ((uint32_t)DMA_SxCR_PBURST_1)
-#define DMA_PBURST_INC16 ((uint32_t)DMA_SxCR_PBURST)
-/**
- * @}
- */
-
-/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
- * @brief DMA interrupts definition
- * @{
- */
-#define DMA_IT_TC ((uint32_t)DMA_SxCR_TCIE)
-#define DMA_IT_HT ((uint32_t)DMA_SxCR_HTIE)
-#define DMA_IT_TE ((uint32_t)DMA_SxCR_TEIE)
-#define DMA_IT_DME ((uint32_t)DMA_SxCR_DMEIE)
-#define DMA_IT_FE 0x00000080U
-/**
- * @}
- */
-
-/** @defgroup DMA_flag_definitions DMA flag definitions
- * @brief DMA flag definitions
- * @{
- */
-#define DMA_FLAG_FEIF0_4 0x00000001U
-#define DMA_FLAG_DMEIF0_4 0x00000004U
-#define DMA_FLAG_TEIF0_4 0x00000008U
-#define DMA_FLAG_HTIF0_4 0x00000010U
-#define DMA_FLAG_TCIF0_4 0x00000020U
-#define DMA_FLAG_FEIF1_5 0x00000040U
-#define DMA_FLAG_DMEIF1_5 0x00000100U
-#define DMA_FLAG_TEIF1_5 0x00000200U
-#define DMA_FLAG_HTIF1_5 0x00000400U
-#define DMA_FLAG_TCIF1_5 0x00000800U
-#define DMA_FLAG_FEIF2_6 0x00010000U
-#define DMA_FLAG_DMEIF2_6 0x00040000U
-#define DMA_FLAG_TEIF2_6 0x00080000U
-#define DMA_FLAG_HTIF2_6 0x00100000U
-#define DMA_FLAG_TCIF2_6 0x00200000U
-#define DMA_FLAG_FEIF3_7 0x00400000U
-#define DMA_FLAG_DMEIF3_7 0x01000000U
-#define DMA_FLAG_TEIF3_7 0x02000000U
-#define DMA_FLAG_HTIF3_7 0x04000000U
-#define DMA_FLAG_TCIF3_7 0x08000000U
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @brief Reset DMA handle state
- * @param __HANDLE__ specifies the DMA handle.
- * @retval None
- */
-#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
-
-/**
- * @brief Return the current DMA Stream FIFO filled level.
- * @param __HANDLE__ DMA handle
- * @retval The FIFO filling state.
- * - DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full
- * and not empty.
- * - DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
- * - DMA_FIFOStatus_HalfFull: if more than 1 half-full.
- * - DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
- * - DMA_FIFOStatus_Empty: when FIFO is empty
- * - DMA_FIFOStatus_Full: when FIFO is full
- */
-#define __HAL_DMA_GET_FS(__HANDLE__) (((__HANDLE__)->Instance->FCR & (DMA_SxFCR_FS)))
-
-/**
- * @brief Enable the specified DMA Stream.
- * @param __HANDLE__ DMA handle
- * @retval None
- */
-#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)
-
-/**
- * @brief Disable the specified DMA Stream.
- * @param __HANDLE__ DMA handle
- * @retval None
- */
-#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
-
-/* Interrupt & Flag management */
-
-/**
- * @brief Return the current DMA Stream transfer complete flag.
- * @param __HANDLE__ DMA handle
- * @retval The specified transfer complete flag index.
- */
-#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
- DMA_FLAG_TCIF3_7)
-
-/**
- * @brief Return the current DMA Stream half transfer complete flag.
- * @param __HANDLE__ DMA handle
- * @retval The specified half transfer complete flag index.
- */
-#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
- DMA_FLAG_HTIF3_7)
-
-/**
- * @brief Return the current DMA Stream transfer error flag.
- * @param __HANDLE__ DMA handle
- * @retval The specified transfer error flag index.
- */
-#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
- DMA_FLAG_TEIF3_7)
-
-/**
- * @brief Return the current DMA Stream FIFO error flag.
- * @param __HANDLE__ DMA handle
- * @retval The specified FIFO error flag index.
- */
-#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
- DMA_FLAG_FEIF3_7)
-
-/**
- * @brief Return the current DMA Stream direct mode error flag.
- * @param __HANDLE__ DMA handle
- * @retval The specified direct mode error flag index.
- */
-#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)\
-(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
- ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
- DMA_FLAG_DMEIF3_7)
-
-/**
- * @brief Get the DMA Stream pending flags.
- * @param __HANDLE__ DMA handle
- * @param __FLAG__ Get the specified flag.
- * This parameter can be any combination of the following values:
- * @arg DMA_FLAG_TCIFx: Transfer complete flag.
- * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
- * @arg DMA_FLAG_TEIFx: Transfer error flag.
- * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
- * @arg DMA_FLAG_FEIFx: FIFO error flag.
- * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
- * @retval The state of FLAG (SET or RESET).
- */
-#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
-(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
- ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
- ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))
-
-/**
- * @brief Clear the DMA Stream pending flags.
- * @param __HANDLE__ DMA handle
- * @param __FLAG__ specifies the flag to clear.
- * This parameter can be any combination of the following values:
- * @arg DMA_FLAG_TCIFx: Transfer complete flag.
- * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
- * @arg DMA_FLAG_TEIFx: Transfer error flag.
- * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
- * @arg DMA_FLAG_FEIFx: FIFO error flag.
- * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
- * @retval None
- */
-#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
-(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
- ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
- ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
-
-/**
- * @brief Enable the specified DMA Stream interrupts.
- * @param __HANDLE__ DMA handle
- * @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
- * This parameter can be any combination of the following values:
- * @arg DMA_IT_TC: Transfer complete interrupt mask.
- * @arg DMA_IT_HT: Half transfer complete interrupt mask.
- * @arg DMA_IT_TE: Transfer error interrupt mask.
- * @arg DMA_IT_FE: FIFO error interrupt mask.
- * @arg DMA_IT_DME: Direct mode error interrupt.
- * @retval None
- */
-#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
-((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR |= (__INTERRUPT__)))
-
-/**
- * @brief Disable the specified DMA Stream interrupts.
- * @param __HANDLE__ DMA handle
- * @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
- * This parameter can be any combination of the following values:
- * @arg DMA_IT_TC: Transfer complete interrupt mask.
- * @arg DMA_IT_HT: Half transfer complete interrupt mask.
- * @arg DMA_IT_TE: Transfer error interrupt mask.
- * @arg DMA_IT_FE: FIFO error interrupt mask.
- * @arg DMA_IT_DME: Direct mode error interrupt.
- * @retval None
- */
-#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
-((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__)))
-
-/**
- * @brief Check whether the specified DMA Stream interrupt is enabled or disabled.
- * @param __HANDLE__ DMA handle
- * @param __INTERRUPT__ specifies the DMA interrupt source to check.
- * This parameter can be one of the following values:
- * @arg DMA_IT_TC: Transfer complete interrupt mask.
- * @arg DMA_IT_HT: Half transfer complete interrupt mask.
- * @arg DMA_IT_TE: Transfer error interrupt mask.
- * @arg DMA_IT_FE: FIFO error interrupt mask.
- * @arg DMA_IT_DME: Direct mode error interrupt.
- * @retval The state of DMA_IT.
- */
-#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
- ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) : \
- ((__HANDLE__)->Instance->FCR & (__INTERRUPT__)))
-
-/**
- * @brief Writes the number of data units to be transferred on the DMA Stream.
- * @param __HANDLE__ DMA handle
- * @param __COUNTER__ Number of data units to be transferred (from 0 to 65535)
- * Number of data items depends only on the Peripheral data format.
- *
- * @note If Peripheral data format is Bytes: number of data units is equal
- * to total number of bytes to be transferred.
- *
- * @note If Peripheral data format is Half-Word: number of data units is
- * equal to total number of bytes to be transferred / 2.
- *
- * @note If Peripheral data format is Word: number of data units is equal
- * to total number of bytes to be transferred / 4.
- *
- * @retval The number of remaining data units in the current DMAy Streamx transfer.
- */
-#define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->NDTR = (uint16_t)(__COUNTER__))
-
-/**
- * @brief Returns the number of remaining data units in the current DMAy Streamx transfer.
- * @param __HANDLE__ DMA handle
- *
- * @retval The number of remaining data units in the current DMA Stream transfer.
- */
-#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->NDTR)
-
-
-/* Include DMA HAL Extension module */
-#include "stm32f4xx_hal_dma_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Functions DMA Exported Functions
- * @brief DMA Exported functions
- * @{
- */
-
-/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and de-initialization functions
- * @{
- */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma);
-/**
- * @}
- */
-
-/** @defgroup DMA_Exported_Functions_Group2 I/O operation functions
- * @brief I/O operation functions
- * @{
- */
-HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout);
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_CleanCallbacks(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma));
-HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
-
-/**
- * @}
- */
-
-/** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
- * @brief Peripheral State functions
- * @{
- */
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
-/**
- * @}
- */
-/**
- * @}
- */
-/* Private Constants -------------------------------------------------------------*/
-/** @defgroup DMA_Private_Constants DMA Private Constants
- * @brief DMA private defines and constants
- * @{
- */
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup DMA_Private_Macros DMA Private Macros
- * @brief DMA private macros
- * @{
- */
-#if defined (DMA_SxCR_CHSEL_3)
-#define IS_DMA_CHANNEL(CHANNEL) (((CHANNEL) == DMA_CHANNEL_0) || \
- ((CHANNEL) == DMA_CHANNEL_1) || \
- ((CHANNEL) == DMA_CHANNEL_2) || \
- ((CHANNEL) == DMA_CHANNEL_3) || \
- ((CHANNEL) == DMA_CHANNEL_4) || \
- ((CHANNEL) == DMA_CHANNEL_5) || \
- ((CHANNEL) == DMA_CHANNEL_6) || \
- ((CHANNEL) == DMA_CHANNEL_7) || \
- ((CHANNEL) == DMA_CHANNEL_8) || \
- ((CHANNEL) == DMA_CHANNEL_9) || \
- ((CHANNEL) == DMA_CHANNEL_10)|| \
- ((CHANNEL) == DMA_CHANNEL_11)|| \
- ((CHANNEL) == DMA_CHANNEL_12)|| \
- ((CHANNEL) == DMA_CHANNEL_13)|| \
- ((CHANNEL) == DMA_CHANNEL_14)|| \
- ((CHANNEL) == DMA_CHANNEL_15))
-#else
-#define IS_DMA_CHANNEL(CHANNEL) (((CHANNEL) == DMA_CHANNEL_0) || \
- ((CHANNEL) == DMA_CHANNEL_1) || \
- ((CHANNEL) == DMA_CHANNEL_2) || \
- ((CHANNEL) == DMA_CHANNEL_3) || \
- ((CHANNEL) == DMA_CHANNEL_4) || \
- ((CHANNEL) == DMA_CHANNEL_5) || \
- ((CHANNEL) == DMA_CHANNEL_6) || \
- ((CHANNEL) == DMA_CHANNEL_7))
-#endif /* DMA_SxCR_CHSEL_3 */
-
-#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
- ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
- ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
-
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x01U) && ((SIZE) < 0x10000U))
-
-#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
- ((STATE) == DMA_PINC_DISABLE))
-
-#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
- ((STATE) == DMA_MINC_DISABLE))
-
-#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
- ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
- ((SIZE) == DMA_PDATAALIGN_WORD))
-
-#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
- ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
- ((SIZE) == DMA_MDATAALIGN_WORD ))
-
-#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
- ((MODE) == DMA_CIRCULAR) || \
- ((MODE) == DMA_PFCTRL))
-
-#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
- ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
- ((PRIORITY) == DMA_PRIORITY_HIGH) || \
- ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
-
-#define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMODE_DISABLE ) || \
- ((STATE) == DMA_FIFOMODE_ENABLE))
-
-#define IS_DMA_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == DMA_FIFO_THRESHOLD_1QUARTERFULL ) || \
- ((THRESHOLD) == DMA_FIFO_THRESHOLD_HALFFULL) || \
- ((THRESHOLD) == DMA_FIFO_THRESHOLD_3QUARTERSFULL) || \
- ((THRESHOLD) == DMA_FIFO_THRESHOLD_FULL))
-
-#define IS_DMA_MEMORY_BURST(BURST) (((BURST) == DMA_MBURST_SINGLE) || \
- ((BURST) == DMA_MBURST_INC4) || \
- ((BURST) == DMA_MBURST_INC8) || \
- ((BURST) == DMA_MBURST_INC16))
-
-#define IS_DMA_PERIPHERAL_BURST(BURST) (((BURST) == DMA_PBURST_SINGLE) || \
- ((BURST) == DMA_PBURST_INC4) || \
- ((BURST) == DMA_PBURST_INC8) || \
- ((BURST) == DMA_PBURST_INC16))
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup DMA_Private_Functions DMA Private Functions
- * @brief DMA private functions
- * @{
- */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_DMA_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h
deleted file mode 100644
index 266c1fa553fee63b15a0681b5defe098cce46ca4..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_dma_ex.h
- * @author MCD Application Team
- * @brief Header file of DMA HAL extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_DMA_EX_H
-#define __STM32F4xx_HAL_DMA_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup DMAEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup DMAEx_Exported_Types DMAEx Exported Types
- * @brief DMAEx Exported types
- * @{
- */
-
-/**
- * @brief HAL DMA Memory definition
- */
-typedef enum
-{
- MEMORY0 = 0x00U, /*!< Memory 0 */
- MEMORY1 = 0x01U /*!< Memory 1 */
-}HAL_DMA_MemoryTypeDef;
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
- * @brief DMAEx Exported functions
- * @{
- */
-
-/** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
- * @brief Extended features functions
- * @{
- */
-
-/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
-HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
-
-/**
- * @}
- */
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup DMAEx_Private_Functions DMAEx Private Functions
- * @brief DMAEx Private functions
- * @{
- */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F4xx_HAL_DMA_EX_H*/
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h
deleted file mode 100644
index a7af12158220633b89807b7c081ba44c244fdc4e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h
+++ /dev/null
@@ -1,366 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_exti.h
- * @author MCD Application Team
- * @brief Header file of EXTI HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2018 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.Clause
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef STM32f4xx_HAL_EXTI_H
-#define STM32f4xx_HAL_EXTI_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup EXTI EXTI
- * @brief EXTI HAL module driver
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup EXTI_Exported_Types EXTI Exported Types
- * @{
- */
-typedef enum
-{
- HAL_EXTI_COMMON_CB_ID = 0x00U
-} EXTI_CallbackIDTypeDef;
-
-/**
- * @brief EXTI Handle structure definition
- */
-typedef struct
-{
- uint32_t Line; /*!< Exti line number */
- void (* PendingCallback)(void); /*!< Exti pending callback */
-} EXTI_HandleTypeDef;
-
-/**
- * @brief EXTI Configuration structure definition
- */
-typedef struct
-{
- uint32_t Line; /*!< The Exti line to be configured. This parameter
- can be a value of @ref EXTI_Line */
- uint32_t Mode; /*!< The Exit Mode to be configured for a core.
- This parameter can be a combination of @ref EXTI_Mode */
- uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
- can be a value of @ref EXTI_Trigger */
- uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
- This parameter is only possible for line 0 to 15. It
- can be a value of @ref EXTI_GPIOSel */
-} EXTI_ConfigTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
- * @{
- */
-
-/** @defgroup EXTI_Line EXTI Line
- * @{
- */
-#define EXTI_LINE_0 (EXTI_GPIO | 0x00u) /*!< External interrupt line 0 */
-#define EXTI_LINE_1 (EXTI_GPIO | 0x01u) /*!< External interrupt line 1 */
-#define EXTI_LINE_2 (EXTI_GPIO | 0x02u) /*!< External interrupt line 2 */
-#define EXTI_LINE_3 (EXTI_GPIO | 0x03u) /*!< External interrupt line 3 */
-#define EXTI_LINE_4 (EXTI_GPIO | 0x04u) /*!< External interrupt line 4 */
-#define EXTI_LINE_5 (EXTI_GPIO | 0x05u) /*!< External interrupt line 5 */
-#define EXTI_LINE_6 (EXTI_GPIO | 0x06u) /*!< External interrupt line 6 */
-#define EXTI_LINE_7 (EXTI_GPIO | 0x07u) /*!< External interrupt line 7 */
-#define EXTI_LINE_8 (EXTI_GPIO | 0x08u) /*!< External interrupt line 8 */
-#define EXTI_LINE_9 (EXTI_GPIO | 0x09u) /*!< External interrupt line 9 */
-#define EXTI_LINE_10 (EXTI_GPIO | 0x0Au) /*!< External interrupt line 10 */
-#define EXTI_LINE_11 (EXTI_GPIO | 0x0Bu) /*!< External interrupt line 11 */
-#define EXTI_LINE_12 (EXTI_GPIO | 0x0Cu) /*!< External interrupt line 12 */
-#define EXTI_LINE_13 (EXTI_GPIO | 0x0Du) /*!< External interrupt line 13 */
-#define EXTI_LINE_14 (EXTI_GPIO | 0x0Eu) /*!< External interrupt line 14 */
-#define EXTI_LINE_15 (EXTI_GPIO | 0x0Fu) /*!< External interrupt line 15 */
-#define EXTI_LINE_16 (EXTI_CONFIG | 0x10u) /*!< External interrupt line 16 Connected to the PVD Output */
-#define EXTI_LINE_17 (EXTI_CONFIG | 0x11u) /*!< External interrupt line 17 Connected to the RTC Alarm event */
-#if defined(EXTI_IMR_IM18)
-#define EXTI_LINE_18 (EXTI_CONFIG | 0x12u) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
-#else
-#define EXTI_LINE_18 (EXTI_RESERVED | 0x12u) /*!< No interrupt supported in this line */
-#endif /* EXTI_IMR_IM18 */
-#if defined(EXTI_IMR_IM19)
-#define EXTI_LINE_19 (EXTI_CONFIG | 0x13u) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
-#else
-#define EXTI_LINE_19 (EXTI_RESERVED | 0x13u) /*!< No interrupt supported in this line */
-#endif /* EXTI_IMR_IM19 */
-#if defined(EXTI_IMR_IM20)
-#define EXTI_LINE_20 (EXTI_CONFIG | 0x14u) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
-#else
-#define EXTI_LINE_20 (EXTI_RESERVED | 0x14u) /*!< No interrupt supported in this line */
-#endif /* EXTI_IMR_IM20 */
-#define EXTI_LINE_21 (EXTI_CONFIG | 0x15u) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
-#define EXTI_LINE_22 (EXTI_CONFIG | 0x16u) /*!< External interrupt line 22 Connected to the RTC Wakeup event */
-#if defined(EXTI_IMR_IM23)
-#define EXTI_LINE_23 (EXTI_CONFIG | 0x17u) /*!< External interrupt line 23 Connected to the LPTIM1 asynchronous event */
-#endif /* EXTI_IMR_IM23 */
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_Mode EXTI Mode
- * @{
- */
-#define EXTI_MODE_NONE 0x00000000u
-#define EXTI_MODE_INTERRUPT 0x00000001u
-#define EXTI_MODE_EVENT 0x00000002u
-/**
- * @}
- */
-
-/** @defgroup EXTI_Trigger EXTI Trigger
- * @{
- */
-
-#define EXTI_TRIGGER_NONE 0x00000000u
-#define EXTI_TRIGGER_RISING 0x00000001u
-#define EXTI_TRIGGER_FALLING 0x00000002u
-#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
-/**
- * @}
- */
-
-/** @defgroup EXTI_GPIOSel EXTI GPIOSel
- * @brief
- * @{
- */
-#define EXTI_GPIOA 0x00000000u
-#define EXTI_GPIOB 0x00000001u
-#define EXTI_GPIOC 0x00000002u
-#if defined (GPIOD)
-#define EXTI_GPIOD 0x00000003u
-#endif /* GPIOD */
-#if defined (GPIOE)
-#define EXTI_GPIOE 0x00000004u
-#endif /* GPIOE */
-#if defined (GPIOF)
-#define EXTI_GPIOF 0x00000005u
-#endif /* GPIOF */
-#if defined (GPIOG)
-#define EXTI_GPIOG 0x00000006u
-#endif /* GPIOG */
-#if defined (GPIOH)
-#define EXTI_GPIOH 0x00000007u
-#endif /* GPIOH */
-#if defined (GPIOI)
-#define EXTI_GPIOI 0x00000008u
-#endif /* GPIOI */
-#if defined (GPIOJ)
-#define EXTI_GPIOJ 0x00000009u
-#endif /* GPIOJ */
-#if defined (GPIOK)
-#define EXTI_GPIOK 0x0000000Au
-#endif /* GPIOK */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/* Private constants --------------------------------------------------------*/
-/** @defgroup EXTI_Private_Constants EXTI Private Constants
- * @{
- */
-/**
- * @brief EXTI Line property definition
- */
-#define EXTI_PROPERTY_SHIFT 24u
-#define EXTI_CONFIG (0x02uL << EXTI_PROPERTY_SHIFT)
-#define EXTI_GPIO ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
-#define EXTI_RESERVED (0x08uL << EXTI_PROPERTY_SHIFT)
-#define EXTI_PROPERTY_MASK (EXTI_CONFIG | EXTI_GPIO)
-
-/**
- * @brief EXTI bit usage
- */
-#define EXTI_PIN_MASK 0x0000001Fu
-
-/**
- * @brief EXTI Mask for interrupt & event mode
- */
-#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
-
-/**
- * @brief EXTI Mask for trigger possibilities
- */
-#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
-
-/**
- * @brief EXTI Line number
- */
-#if defined(EXTI_IMR_IM23)
-#define EXTI_LINE_NB 24UL
-#else
-#define EXTI_LINE_NB 23UL
-#endif /* EXTI_IMR_IM23 */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup EXTI_Private_Macros EXTI Private Macros
- * @{
- */
-#define IS_EXTI_LINE(__EXTI_LINE__) ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
- ((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
- (((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
- (((__EXTI_LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
-
-#define IS_EXTI_MODE(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00u) && \
- (((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00u))
-
-#define IS_EXTI_TRIGGER(__EXTI_LINE__) (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
-
-#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__) ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)
-
-#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__) (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00u)
-
-#if !defined (GPIOD)
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOH))
-#elif !defined (GPIOE)
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOD) || \
- ((__PORT__) == EXTI_GPIOH))
-#elif !defined (GPIOF)
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOD) || \
- ((__PORT__) == EXTI_GPIOE) || \
- ((__PORT__) == EXTI_GPIOH))
-#elif !defined (GPIOI)
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOD) || \
- ((__PORT__) == EXTI_GPIOE) || \
- ((__PORT__) == EXTI_GPIOF) || \
- ((__PORT__) == EXTI_GPIOG) || \
- ((__PORT__) == EXTI_GPIOH))
-#elif !defined (GPIOJ)
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOD) || \
- ((__PORT__) == EXTI_GPIOE) || \
- ((__PORT__) == EXTI_GPIOF) || \
- ((__PORT__) == EXTI_GPIOG) || \
- ((__PORT__) == EXTI_GPIOH) || \
- ((__PORT__) == EXTI_GPIOI))
-#else
-#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
- ((__PORT__) == EXTI_GPIOB) || \
- ((__PORT__) == EXTI_GPIOC) || \
- ((__PORT__) == EXTI_GPIOD) || \
- ((__PORT__) == EXTI_GPIOE) || \
- ((__PORT__) == EXTI_GPIOF) || \
- ((__PORT__) == EXTI_GPIOG) || \
- ((__PORT__) == EXTI_GPIOH) || \
- ((__PORT__) == EXTI_GPIOI) || \
- ((__PORT__) == EXTI_GPIOJ) || \
- ((__PORT__) == EXTI_GPIOK))
-#endif /* GPIOD */
-
-#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16U)
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
- * @brief EXTI Exported Functions
- * @{
- */
-
-/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
- * @brief Configuration functions
- * @{
- */
-/* Configuration functions ****************************************************/
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
-HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
-HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
-/**
- * @}
- */
-
-/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
- * @brief IO operation functions
- * @{
- */
-/* IO operation functions *****************************************************/
-void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
-uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32f4xx_HAL_EXTI_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h
deleted file mode 100644
index a047e8271369b5d85944d6e4641fe06c736ffef6..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h
+++ /dev/null
@@ -1,425 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash.h
- * @author MCD Application Team
- * @brief Header file of FLASH HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_FLASH_H
-#define __STM32F4xx_HAL_FLASH_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup FLASH
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Types FLASH Exported Types
- * @{
- */
-
-/**
- * @brief FLASH Procedure structure definition
- */
-typedef enum
-{
- FLASH_PROC_NONE = 0U,
- FLASH_PROC_SECTERASE,
- FLASH_PROC_MASSERASE,
- FLASH_PROC_PROGRAM
-} FLASH_ProcedureTypeDef;
-
-/**
- * @brief FLASH handle Structure definition
- */
-typedef struct
-{
- __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*Internal variable to indicate which procedure is ongoing or not in IT context*/
-
- __IO uint32_t NbSectorsToErase; /*Internal variable to save the remaining sectors to erase in IT context*/
-
- __IO uint8_t VoltageForErase; /*Internal variable to provide voltage range selected by user in IT context*/
-
- __IO uint32_t Sector; /*Internal variable to define the current sector which is erasing*/
-
- __IO uint32_t Bank; /*Internal variable to save current bank selected during mass erase*/
-
- __IO uint32_t Address; /*Internal variable to save address selected for program*/
-
- HAL_LockTypeDef Lock; /* FLASH locking object */
-
- __IO uint32_t ErrorCode; /* FLASH error code */
-
-}FLASH_ProcessTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
- * @{
- */
-/** @defgroup FLASH_Error_Code FLASH Error Code
- * @brief FLASH Error Code
- * @{
- */
-#define HAL_FLASH_ERROR_NONE 0x00000000U /*!< No error */
-#define HAL_FLASH_ERROR_RD 0x00000001U /*!< Read Protection error */
-#define HAL_FLASH_ERROR_PGS 0x00000002U /*!< Programming Sequence error */
-#define HAL_FLASH_ERROR_PGP 0x00000004U /*!< Programming Parallelism error */
-#define HAL_FLASH_ERROR_PGA 0x00000008U /*!< Programming Alignment error */
-#define HAL_FLASH_ERROR_WRP 0x00000010U /*!< Write protection error */
-#define HAL_FLASH_ERROR_OPERATION 0x00000020U /*!< Operation Error */
-/**
- * @}
- */
-
-/** @defgroup FLASH_Type_Program FLASH Type Program
- * @{
- */
-#define FLASH_TYPEPROGRAM_BYTE 0x00000000U /*!< Program byte (8-bit) at a specified address */
-#define FLASH_TYPEPROGRAM_HALFWORD 0x00000001U /*!< Program a half-word (16-bit) at a specified address */
-#define FLASH_TYPEPROGRAM_WORD 0x00000002U /*!< Program a word (32-bit) at a specified address */
-#define FLASH_TYPEPROGRAM_DOUBLEWORD 0x00000003U /*!< Program a double word (64-bit) at a specified address */
-/**
- * @}
- */
-
-/** @defgroup FLASH_Flag_definition FLASH Flag definition
- * @brief Flag definition
- * @{
- */
-#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
-#define FLASH_FLAG_OPERR FLASH_SR_SOP /*!< FLASH operation Error flag */
-#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
-#define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
-#define FLASH_FLAG_PGPERR FLASH_SR_PGPERR /*!< FLASH Programming Parallelism error flag */
-#define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< FLASH Programming Sequence error flag */
-#if defined(FLASH_SR_RDERR)
-#define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< Read Protection error flag (PCROP) */
-#endif /* FLASH_SR_RDERR */
-#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
-/**
- * @}
- */
-
-/** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition
- * @brief FLASH Interrupt definition
- * @{
- */
-#define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
-#define FLASH_IT_ERR 0x02000000U /*!< Error Interrupt source */
-/**
- * @}
- */
-
-/** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism
- * @{
- */
-#define FLASH_PSIZE_BYTE 0x00000000U
-#define FLASH_PSIZE_HALF_WORD 0x00000100U
-#define FLASH_PSIZE_WORD 0x00000200U
-#define FLASH_PSIZE_DOUBLE_WORD 0x00000300U
-#define CR_PSIZE_MASK 0xFFFFFCFFU
-/**
- * @}
- */
-
-/** @defgroup FLASH_Keys FLASH Keys
- * @{
- */
-#define RDP_KEY ((uint16_t)0x00A5)
-#define FLASH_KEY1 0x45670123U
-#define FLASH_KEY2 0xCDEF89ABU
-#define FLASH_OPT_KEY1 0x08192A3BU
-#define FLASH_OPT_KEY2 0x4C5D6E7FU
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Macros FLASH Exported Macros
- * @{
- */
-/**
- * @brief Set the FLASH Latency.
- * @param __LATENCY__ FLASH Latency
- * The value of this parameter depend on device used within the same series
- * @retval none
- */
-#define __HAL_FLASH_SET_LATENCY(__LATENCY__) (*(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)(__LATENCY__))
-
-/**
- * @brief Get the FLASH Latency.
- * @retval FLASH Latency
- * The value of this parameter depend on device used within the same series
- */
-#define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
-
-/**
- * @brief Enable the FLASH prefetch buffer.
- * @retval none
- */
-#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTEN)
-
-/**
- * @brief Disable the FLASH prefetch buffer.
- * @retval none
- */
-#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTEN))
-
-/**
- * @brief Enable the FLASH instruction cache.
- * @retval none
- */
-#define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_ICEN)
-
-/**
- * @brief Disable the FLASH instruction cache.
- * @retval none
- */
-#define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_ICEN))
-
-/**
- * @brief Enable the FLASH data cache.
- * @retval none
- */
-#define __HAL_FLASH_DATA_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_DCEN)
-
-/**
- * @brief Disable the FLASH data cache.
- * @retval none
- */
-#define __HAL_FLASH_DATA_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_DCEN))
-
-/**
- * @brief Resets the FLASH instruction Cache.
- * @note This function must be used only when the Instruction Cache is disabled.
- * @retval None
- */
-#define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do {FLASH->ACR |= FLASH_ACR_ICRST; \
- FLASH->ACR &= ~FLASH_ACR_ICRST; \
- }while(0U)
-
-/**
- * @brief Resets the FLASH data Cache.
- * @note This function must be used only when the data Cache is disabled.
- * @retval None
- */
-#define __HAL_FLASH_DATA_CACHE_RESET() do {FLASH->ACR |= FLASH_ACR_DCRST; \
- FLASH->ACR &= ~FLASH_ACR_DCRST; \
- }while(0U)
-/**
- * @brief Enable the specified FLASH interrupt.
- * @param __INTERRUPT__ FLASH interrupt
- * This parameter can be any combination of the following values:
- * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
- * @arg FLASH_IT_ERR: Error Interrupt
- * @retval none
- */
-#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__))
-
-/**
- * @brief Disable the specified FLASH interrupt.
- * @param __INTERRUPT__ FLASH interrupt
- * This parameter can be any combination of the following values:
- * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
- * @arg FLASH_IT_ERR: Error Interrupt
- * @retval none
- */
-#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(uint32_t)(__INTERRUPT__))
-
-/**
- * @brief Get the specified FLASH flag status.
- * @param __FLAG__ specifies the FLASH flags to check.
- * This parameter can be any combination of the following values:
- * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
- * @arg FLASH_FLAG_OPERR : FLASH operation Error flag
- * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
- * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
- * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
- * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
- * @arg FLASH_FLAG_RDERR : FLASH Read Protection error flag (PCROP) (*)
- * @arg FLASH_FLAG_BSY : FLASH Busy flag
- * (*) FLASH_FLAG_RDERR is not available for STM32F405xx/407xx/415xx/417xx devices
- * @retval The new state of __FLAG__ (SET or RESET).
- */
-#define __HAL_FLASH_GET_FLAG(__FLAG__) ((FLASH->SR & (__FLAG__)))
-
-/**
- * @brief Clear the specified FLASH flags.
- * @param __FLAG__ specifies the FLASH flags to clear.
- * This parameter can be any combination of the following values:
- * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
- * @arg FLASH_FLAG_OPERR : FLASH operation Error flag
- * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
- * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
- * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
- * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
- * @arg FLASH_FLAG_RDERR : FLASH Read Protection error flag (PCROP) (*)
- * (*) FLASH_FLAG_RDERR is not available for STM32F405xx/407xx/415xx/417xx devices
- * @retval none
- */
-#define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (FLASH->SR = (__FLAG__))
-/**
- * @}
- */
-
-/* Include FLASH HAL Extension module */
-#include "stm32f4xx_hal_flash_ex.h"
-#include "stm32f4xx_hal_flash_ramfunc.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup FLASH_Exported_Functions
- * @{
- */
-/** @addtogroup FLASH_Exported_Functions_Group1
- * @{
- */
-/* Program operation functions ***********************************************/
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
-/* FLASH IRQ handler method */
-void HAL_FLASH_IRQHandler(void);
-/* Callbacks in non blocking modes */
-void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
-void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
-/**
- * @}
- */
-
-/** @addtogroup FLASH_Exported_Functions_Group2
- * @{
- */
-/* Peripheral Control functions **********************************************/
-HAL_StatusTypeDef HAL_FLASH_Unlock(void);
-HAL_StatusTypeDef HAL_FLASH_Lock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
-/* Option bytes control */
-HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
-/**
- * @}
- */
-
-/** @addtogroup FLASH_Exported_Functions_Group3
- * @{
- */
-/* Peripheral State functions ************************************************/
-uint32_t HAL_FLASH_GetError(void);
-HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup FLASH_Private_Variables FLASH Private Variables
- * @{
- */
-
-/**
- * @}
- */
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup FLASH_Private_Constants FLASH Private Constants
- * @{
- */
-
-/**
- * @brief ACR register byte 0 (Bits[7:0]) base address
- */
-#define ACR_BYTE0_ADDRESS 0x40023C00U
-/**
- * @brief OPTCR register byte 0 (Bits[7:0]) base address
- */
-#define OPTCR_BYTE0_ADDRESS 0x40023C14U
-/**
- * @brief OPTCR register byte 1 (Bits[15:8]) base address
- */
-#define OPTCR_BYTE1_ADDRESS 0x40023C15U
-/**
- * @brief OPTCR register byte 2 (Bits[23:16]) base address
- */
-#define OPTCR_BYTE2_ADDRESS 0x40023C16U
-/**
- * @brief OPTCR register byte 3 (Bits[31:24]) base address
- */
-#define OPTCR_BYTE3_ADDRESS 0x40023C17U
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup FLASH_Private_Macros FLASH Private Macros
- * @{
- */
-
-/** @defgroup FLASH_IS_FLASH_Definitions FLASH Private macros to check input parameters
- * @{
- */
-#define IS_FLASH_TYPEPROGRAM(VALUE)(((VALUE) == FLASH_TYPEPROGRAM_BYTE) || \
- ((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
- ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \
- ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup FLASH_Private_Functions FLASH Private Functions
- * @{
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_FLASH_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h
deleted file mode 100644
index 908fd5e8215e0ff8b4e87cda4cf7b71409104e21..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h
+++ /dev/null
@@ -1,1063 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash_ex.h
- * @author MCD Application Team
- * @brief Header file of FLASH HAL Extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_FLASH_EX_H
-#define __STM32F4xx_HAL_FLASH_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup FLASHEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup FLASHEx_Exported_Types FLASH Exported Types
- * @{
- */
-
-/**
- * @brief FLASH Erase structure definition
- */
-typedef struct
-{
- uint32_t TypeErase; /*!< Mass erase or sector Erase.
- This parameter can be a value of @ref FLASHEx_Type_Erase */
-
- uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
- This parameter must be a value of @ref FLASHEx_Banks */
-
- uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
- This parameter must be a value of @ref FLASHEx_Sectors */
-
- uint32_t NbSectors; /*!< Number of sectors to be erased.
- This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
-
- uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
- This parameter must be a value of @ref FLASHEx_Voltage_Range */
-
-} FLASH_EraseInitTypeDef;
-
-/**
- * @brief FLASH Option Bytes Program structure definition
- */
-typedef struct
-{
- uint32_t OptionType; /*!< Option byte to be configured.
- This parameter can be a value of @ref FLASHEx_Option_Type */
-
- uint32_t WRPState; /*!< Write protection activation or deactivation.
- This parameter can be a value of @ref FLASHEx_WRP_State */
-
- uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
- The value of this parameter depend on device used within the same series */
-
- uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
- This parameter must be a value of @ref FLASHEx_Banks */
-
- uint32_t RDPLevel; /*!< Set the read protection level.
- This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
-
- uint32_t BORLevel; /*!< Set the BOR Level.
- This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
-
- uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
-
-} FLASH_OBProgramInitTypeDef;
-
-/**
- * @brief FLASH Advanced Option Bytes Program structure definition
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-typedef struct
-{
- uint32_t OptionType; /*!< Option byte to be configured for extension.
- This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
-
- uint32_t PCROPState; /*!< PCROP activation or deactivation.
- This parameter can be a value of @ref FLASHEx_PCROP_State */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
- uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
- This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx ||\
- STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
- uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
- This parameter must be a value of @ref FLASHEx_Banks */
-
- uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
- This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
-
- uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
- This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
-
- uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
- This parameter can be a value of @ref FLASHEx_Dual_Boot */
-
-#endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-}FLASH_AdvOBProgramInitTypeDef;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx ||
- STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
- * @{
- */
-
-/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
- * @{
- */
-#define FLASH_TYPEERASE_SECTORS 0x00000000U /*!< Sectors erase only */
-#define FLASH_TYPEERASE_MASSERASE 0x00000001U /*!< Flash Mass erase activation */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
- * @{
- */
-#define FLASH_VOLTAGE_RANGE_1 0x00000000U /*!< Device operating range: 1.8V to 2.1V */
-#define FLASH_VOLTAGE_RANGE_2 0x00000001U /*!< Device operating range: 2.1V to 2.7V */
-#define FLASH_VOLTAGE_RANGE_3 0x00000002U /*!< Device operating range: 2.7V to 3.6V */
-#define FLASH_VOLTAGE_RANGE_4 0x00000003U /*!< Device operating range: 2.7V to 3.6V + External Vpp */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_WRP_State FLASH WRP State
- * @{
- */
-#define OB_WRPSTATE_DISABLE 0x00000000U /*!< Disable the write protection of the desired bank 1 sectors */
-#define OB_WRPSTATE_ENABLE 0x00000001U /*!< Enable the write protection of the desired bank 1 sectors */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Type FLASH Option Type
- * @{
- */
-#define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */
-#define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */
-#define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */
-#define OPTIONBYTE_BOR 0x00000008U /*!< BOR option byte configuration */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
- * @{
- */
-#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
-#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
-#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
- it s no more possible to go back to level 1 or 0 */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
- * @{
- */
-#define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
-#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
- * @{
- */
-#define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
-#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
-/**
- * @}
- */
-
-
-/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
- * @{
- */
-#define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
-#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
- * @{
- */
-#define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
-#define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
-#define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
-#define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
-/**
- * @}
- */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup FLASHEx_PCROP_State FLASH PCROP State
- * @{
- */
-#define OB_PCROP_STATE_DISABLE 0x00000000U /*!< Disable PCROP */
-#define OB_PCROP_STATE_ENABLE 0x00000001U /*!< Enable PCROP */
-/**
- * @}
- */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-/** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define OPTIONBYTE_PCROP 0x00000001U /*!< PCROP option byte configuration */
-#define OPTIONBYTE_BOOTCONFIG 0x00000002U /*!< BOOTConfig option byte configuration */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define OPTIONBYTE_PCROP 0x00000001U /*!<PCROP option byte configuration */
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup FLASH_Latency FLASH Latency
- * @{
- */
-/*------------------------- STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx ----------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
-#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
-#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
-#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
-#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
-#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
-#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
-#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
-#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
-#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
-#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
-#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
-#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
-#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
-#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
-#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-/*--------------------------------------------------------------------------------------------------------------*/
-
-/*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx/STM32F423xx -----------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-
-#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
-#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
-#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
-#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
-#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
-#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
-#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
-#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-/*--------------------------------------------------------------------------------------------------------------*/
-
-/**
- * @}
- */
-
-
-/** @defgroup FLASHEx_Banks FLASH Banks
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define FLASH_BANK_1 1U /*!< Bank 1 */
-#define FLASH_BANK_2 2U /*!< Bank 2 */
-#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define FLASH_BANK_1 1U /*!< Bank 1 */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
- STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
- STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Sectors FLASH Sectors
- * @{
- */
-/*-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
-#define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
-#define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
-#define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
-#define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
-#define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
-#define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
-#define FLASH_SECTOR_12 12U /*!< Sector Number 12 */
-#define FLASH_SECTOR_13 13U /*!< Sector Number 13 */
-#define FLASH_SECTOR_14 14U /*!< Sector Number 14 */
-#define FLASH_SECTOR_15 15U /*!< Sector Number 15 */
-#define FLASH_SECTOR_16 16U /*!< Sector Number 16 */
-#define FLASH_SECTOR_17 17U /*!< Sector Number 17 */
-#define FLASH_SECTOR_18 18U /*!< Sector Number 18 */
-#define FLASH_SECTOR_19 19U /*!< Sector Number 19 */
-#define FLASH_SECTOR_20 20U /*!< Sector Number 20 */
-#define FLASH_SECTOR_21 21U /*!< Sector Number 21 */
-#define FLASH_SECTOR_22 22U /*!< Sector Number 22 */
-#define FLASH_SECTOR_23 23U /*!< Sector Number 23 */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*-------------------------------------- STM32F413xx/STM32F423xx --------------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
-#define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
-#define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
-#define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
-#define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
-#define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
-#define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
-#define FLASH_SECTOR_12 12U /*!< Sector Number 12 */
-#define FLASH_SECTOR_13 13U /*!< Sector Number 13 */
-#define FLASH_SECTOR_14 14U /*!< Sector Number 14 */
-#define FLASH_SECTOR_15 15U /*!< Sector Number 15 */
-#endif /* STM32F413xx || STM32F423xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
-#define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
-#define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
-#define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
-#define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
-#define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
-#define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F401xC -------------------------------------------*/
-#if defined(STM32F401xC)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
-#endif /* STM32F401xC */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F410xx -------------------------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
-#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
-#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
-#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
-#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
-#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
-#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
-#define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
-#define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
- * @{
- */
-/*--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
-#define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
-#define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
-#define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
-#define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
-#define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
-#define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
-#define OB_WRP_SECTOR_12 0x00000001U << 12U /*!< Write protection of Sector12 */
-#define OB_WRP_SECTOR_13 0x00000002U << 12U /*!< Write protection of Sector13 */
-#define OB_WRP_SECTOR_14 0x00000004U << 12U /*!< Write protection of Sector14 */
-#define OB_WRP_SECTOR_15 0x00000008U << 12U /*!< Write protection of Sector15 */
-#define OB_WRP_SECTOR_16 0x00000010U << 12U /*!< Write protection of Sector16 */
-#define OB_WRP_SECTOR_17 0x00000020U << 12U /*!< Write protection of Sector17 */
-#define OB_WRP_SECTOR_18 0x00000040U << 12U /*!< Write protection of Sector18 */
-#define OB_WRP_SECTOR_19 0x00000080U << 12U /*!< Write protection of Sector19 */
-#define OB_WRP_SECTOR_20 0x00000100U << 12U /*!< Write protection of Sector20 */
-#define OB_WRP_SECTOR_21 0x00000200U << 12U /*!< Write protection of Sector21 */
-#define OB_WRP_SECTOR_22 0x00000400U << 12U /*!< Write protection of Sector22 */
-#define OB_WRP_SECTOR_23 0x00000800U << 12U /*!< Write protection of Sector23 */
-#define OB_WRP_SECTOR_All 0x00000FFFU << 12U /*!< Write protection of all Sectors */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------- STM32F413xx/STM32F423xx -------------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
-#define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
-#define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
-#define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
-#define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
-#define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
-#define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
-#define OB_WRP_SECTOR_12 0x00001000U /*!< Write protection of Sector12 */
-#define OB_WRP_SECTOR_13 0x00002000U /*!< Write protection of Sector13 */
-#define OB_WRP_SECTOR_14 0x00004000U /*!< Write protection of Sector14 */
-#define OB_WRP_SECTOR_15 0x00004000U /*!< Write protection of Sector15 */
-#define OB_WRP_SECTOR_All 0x00007FFFU /*!< Write protection of all Sectors */
-#endif /* STM32F413xx || STM32F423xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
-#define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
-#define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
-#define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
-#define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
-#define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
-#define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
-#define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F401xC -------------------------------------------*/
-#if defined(STM32F401xC)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
-#define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
-#endif /* STM32F401xC */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F410xx -------------------------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
-#define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
-#define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
-#define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
-#define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
-#define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
-#define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
-#define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
-#define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
-#define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
-/*-----------------------------------------------------------------------------------------------------*/
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
- * @{
- */
-/*-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
-#define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
-#define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
-#define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
-#define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
-#define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
-#define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
-#define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
-#define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */
-#define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */
-#define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */
-#define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */
-#define OB_PCROP_SECTOR_12 0x00000001U /*!< PC Read/Write protection of Sector12 */
-#define OB_PCROP_SECTOR_13 0x00000002U /*!< PC Read/Write protection of Sector13 */
-#define OB_PCROP_SECTOR_14 0x00000004U /*!< PC Read/Write protection of Sector14 */
-#define OB_PCROP_SECTOR_15 0x00000008U /*!< PC Read/Write protection of Sector15 */
-#define OB_PCROP_SECTOR_16 0x00000010U /*!< PC Read/Write protection of Sector16 */
-#define OB_PCROP_SECTOR_17 0x00000020U /*!< PC Read/Write protection of Sector17 */
-#define OB_PCROP_SECTOR_18 0x00000040U /*!< PC Read/Write protection of Sector18 */
-#define OB_PCROP_SECTOR_19 0x00000080U /*!< PC Read/Write protection of Sector19 */
-#define OB_PCROP_SECTOR_20 0x00000100U /*!< PC Read/Write protection of Sector20 */
-#define OB_PCROP_SECTOR_21 0x00000200U /*!< PC Read/Write protection of Sector21 */
-#define OB_PCROP_SECTOR_22 0x00000400U /*!< PC Read/Write protection of Sector22 */
-#define OB_PCROP_SECTOR_23 0x00000800U /*!< PC Read/Write protection of Sector23 */
-#define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
-#define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
-#define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
-#define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
-#define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
-#define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
-#define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
-#define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
-#define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */
-#define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */
-#define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */
-#define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */
-#define OB_PCROP_SECTOR_12 0x00001000U /*!< PC Read/Write protection of Sector12 */
-#define OB_PCROP_SECTOR_13 0x00002000U /*!< PC Read/Write protection of Sector13 */
-#define OB_PCROP_SECTOR_14 0x00004000U /*!< PC Read/Write protection of Sector14 */
-#define OB_PCROP_SECTOR_15 0x00004000U /*!< PC Read/Write protection of Sector15 */
-#define OB_PCROP_SECTOR_All 0x00007FFFU /*!< PC Read/Write protection of all Sectors */
-#endif /* STM32F413xx || STM32F423xx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F401xC -------------------------------------------*/
-#if defined(STM32F401xC)
-#define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
-#define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
-#define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
-#define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
-#define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
-#define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
-#define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
-#endif /* STM32F401xC */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*--------------------------------------------- STM32F410xx -------------------------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
-#define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
-#define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
-#define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
-#define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
-#define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/*-------------- STM32F401xE/STM32F411xE/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F446xx --*/
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
-#define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
-#define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
-#define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
-#define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
-#define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
-#define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
-#define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
-#define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/*-----------------------------------------------------------------------------------------------------*/
-
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
-#define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
-#define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup FLASHEx_Exported_Functions
- * @{
- */
-
-/** @addtogroup FLASHEx_Exported_Functions_Group1
- * @{
- */
-/* Extension Program operation functions *************************************/
-HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
-HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
-HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
-void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
-void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
-HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
-HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Constants FLASH Private Constants
- * @{
- */
-/*--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define FLASH_SECTOR_TOTAL 24U
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-/*-------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define FLASH_SECTOR_TOTAL 16U
-#endif /* STM32F413xx || STM32F423xx */
-
-/*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define FLASH_SECTOR_TOTAL 12U
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-/*--------------------------------------------- STM32F401xC -------------------------------------------*/
-#if defined(STM32F401xC)
-#define FLASH_SECTOR_TOTAL 6U
-#endif /* STM32F401xC */
-
-/*--------------------------------------------- STM32F410xx -------------------------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define FLASH_SECTOR_TOTAL 5U
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-/*--------------------------------- STM32F401xE/STM32F411xE/STM32F412xG/STM32F446xx -------------------*/
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
-#define FLASH_SECTOR_TOTAL 8U
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
-
-/**
- * @brief OPTCR1 register byte 2 (Bits[23:16]) base address
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define OPTCR1_BYTE2_ADDRESS 0x40023C1AU
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
- * @{
- */
-
-/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
- * @{
- */
-
-#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
- ((VALUE) == FLASH_TYPEERASE_MASSERASE))
-
-#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
- ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
- ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
- ((RANGE) == FLASH_VOLTAGE_RANGE_4))
-
-#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
- ((VALUE) == OB_WRPSTATE_ENABLE))
-
-#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
-
-#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
- ((LEVEL) == OB_RDP_LEVEL_1) ||\
- ((LEVEL) == OB_RDP_LEVEL_2))
-
-#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
-
-#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
-
-#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
-
-#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
- ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \
- ((VALUE) == OB_PCROP_STATE_ENABLE))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \
- ((VALUE) == OPTIONBYTE_BOOTCONFIG))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
- ((LATENCY) == FLASH_LATENCY_1) || \
- ((LATENCY) == FLASH_LATENCY_2) || \
- ((LATENCY) == FLASH_LATENCY_3) || \
- ((LATENCY) == FLASH_LATENCY_4) || \
- ((LATENCY) == FLASH_LATENCY_5) || \
- ((LATENCY) == FLASH_LATENCY_6) || \
- ((LATENCY) == FLASH_LATENCY_7) || \
- ((LATENCY) == FLASH_LATENCY_8) || \
- ((LATENCY) == FLASH_LATENCY_9) || \
- ((LATENCY) == FLASH_LATENCY_10) || \
- ((LATENCY) == FLASH_LATENCY_11) || \
- ((LATENCY) == FLASH_LATENCY_12) || \
- ((LATENCY) == FLASH_LATENCY_13) || \
- ((LATENCY) == FLASH_LATENCY_14) || \
- ((LATENCY) == FLASH_LATENCY_15))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
- ((LATENCY) == FLASH_LATENCY_1) || \
- ((LATENCY) == FLASH_LATENCY_2) || \
- ((LATENCY) == FLASH_LATENCY_3) || \
- ((LATENCY) == FLASH_LATENCY_4) || \
- ((LATENCY) == FLASH_LATENCY_5) || \
- ((LATENCY) == FLASH_LATENCY_6) || \
- ((LATENCY) == FLASH_LATENCY_7))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
- STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
- ((BANK) == FLASH_BANK_2) || \
- ((BANK) == FLASH_BANK_BOTH))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx ||\
- STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
- ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
- ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
- ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
- ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
- ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\
- ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\
- ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\
- ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
- ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
- ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
- ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
- ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
- ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
- ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15))
-#endif /* STM32F413xx || STM32F423xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
- ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
- ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
- ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F401xC)
-#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5))
-#endif /* STM32F401xC */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
-#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
- ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
- ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
- ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx */
-
-#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \
- (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END)))
-
-#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFF000000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F413xx || STM32F423xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-
-#if defined(STM32F401xC)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F401xC */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
- defined(STM32F412Rx) || defined(STM32F412Cx)
-#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F413xx || STM32F423xx */
-
-#if defined(STM32F401xC)
-#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F401xC */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
- defined(STM32F412Rx) || defined(STM32F412Cx)
-#define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
-#endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Functions FLASH Private Functions
- * @{
- */
-void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
-void FLASH_FlushCaches(void);
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_FLASH_EX_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h
deleted file mode 100644
index b4d5f606f281d9b0be75e115db3bfc3e22341e41..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash_ramfunc.h
- * @author MCD Application Team
- * @brief Header file of FLASH RAMFUNC driver.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_FLASH_RAMFUNC_H
-#define __STM32F4xx_FLASH_RAMFUNC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup FLASH_RAMFUNC
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions
- * @{
- */
-
-/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
- * @{
- */
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void);
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void);
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void);
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void);
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32F4xx_FLASH_RAMFUNC_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h
deleted file mode 100644
index 661400f4fb5ecbd3914890247bd92a06f3f60aa0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h
+++ /dev/null
@@ -1,325 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_gpio.h
- * @author MCD Application Team
- * @brief Header file of GPIO HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_GPIO_H
-#define __STM32F4xx_HAL_GPIO_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup GPIO
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup GPIO_Exported_Types GPIO Exported Types
- * @{
- */
-
-/**
- * @brief GPIO Init structure definition
- */
-typedef struct
-{
- uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
- This parameter can be any value of @ref GPIO_pins_define */
-
- uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
- This parameter can be a value of @ref GPIO_mode_define */
-
- uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
- This parameter can be a value of @ref GPIO_pull_define */
-
- uint32_t Speed; /*!< Specifies the speed for the selected pins.
- This parameter can be a value of @ref GPIO_speed_define */
-
- uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
- This parameter can be a value of @ref GPIO_Alternate_function_selection */
-}GPIO_InitTypeDef;
-
-/**
- * @brief GPIO Bit SET and Bit RESET enumeration
- */
-typedef enum
-{
- GPIO_PIN_RESET = 0,
- GPIO_PIN_SET
-}GPIO_PinState;
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup GPIO_Exported_Constants GPIO Exported Constants
- * @{
- */
-
-/** @defgroup GPIO_pins_define GPIO pins define
- * @{
- */
-#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
-#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
-#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
-#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
-#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
-#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
-#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
-#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
-#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
-#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
-#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
-#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
-#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
-#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
-#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
-#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
-#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
-
-#define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
-/**
- * @}
- */
-
-/** @defgroup GPIO_mode_define GPIO mode define
- * @brief GPIO Configuration Mode
- * Elements values convention: 0x00WX00YZ
- * - W : EXTI trigger detection on 3 bits
- * - X : EXTI mode (IT or Event) on 2 bits
- * - Y : Output type (Push Pull or Open Drain) on 1 bit
- * - Z : GPIO mode (Input, Output, Alternate or Analog) on 2 bits
- * @{
- */
-#define GPIO_MODE_INPUT MODE_INPUT /*!< Input Floating Mode */
-#define GPIO_MODE_OUTPUT_PP (MODE_OUTPUT | OUTPUT_PP) /*!< Output Push Pull Mode */
-#define GPIO_MODE_OUTPUT_OD (MODE_OUTPUT | OUTPUT_OD) /*!< Output Open Drain Mode */
-#define GPIO_MODE_AF_PP (MODE_AF | OUTPUT_PP) /*!< Alternate Function Push Pull Mode */
-#define GPIO_MODE_AF_OD (MODE_AF | OUTPUT_OD) /*!< Alternate Function Open Drain Mode */
-
-#define GPIO_MODE_ANALOG MODE_ANALOG /*!< Analog Mode */
-
-#define GPIO_MODE_IT_RISING (MODE_INPUT | EXTI_IT | TRIGGER_RISING) /*!< External Interrupt Mode with Rising edge trigger detection */
-#define GPIO_MODE_IT_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_FALLING) /*!< External Interrupt Mode with Falling edge trigger detection */
-#define GPIO_MODE_IT_RISING_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
-
-#define GPIO_MODE_EVT_RISING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING) /*!< External Event Mode with Rising edge trigger detection */
-#define GPIO_MODE_EVT_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_FALLING) /*!< External Event Mode with Falling edge trigger detection */
-#define GPIO_MODE_EVT_RISING_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Event Mode with Rising/Falling edge trigger detection */
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_speed_define GPIO speed define
- * @brief GPIO Output Maximum frequency
- * @{
- */
-#define GPIO_SPEED_FREQ_LOW 0x00000000U /*!< IO works at 2 MHz, please refer to the product datasheet */
-#define GPIO_SPEED_FREQ_MEDIUM 0x00000001U /*!< range 12,5 MHz to 50 MHz, please refer to the product datasheet */
-#define GPIO_SPEED_FREQ_HIGH 0x00000002U /*!< range 25 MHz to 100 MHz, please refer to the product datasheet */
-#define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003U /*!< range 50 MHz to 200 MHz, please refer to the product datasheet */
-/**
- * @}
- */
-
- /** @defgroup GPIO_pull_define GPIO pull define
- * @brief GPIO Pull-Up or Pull-Down Activation
- * @{
- */
-#define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
-#define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
-#define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup GPIO_Exported_Macros GPIO Exported Macros
- * @{
- */
-
-/**
- * @brief Checks whether the specified EXTI line flag is set or not.
- * @param __EXTI_LINE__ specifies the EXTI line flag to check.
- * This parameter can be GPIO_PIN_x where x can be(0..15)
- * @retval The new state of __EXTI_LINE__ (SET or RESET).
- */
-#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
-
-/**
- * @brief Clears the EXTI's line pending flags.
- * @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
- * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
- * @retval None
- */
-#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
-
-/**
- * @brief Checks whether the specified EXTI line is asserted or not.
- * @param __EXTI_LINE__ specifies the EXTI line to check.
- * This parameter can be GPIO_PIN_x where x can be(0..15)
- * @retval The new state of __EXTI_LINE__ (SET or RESET).
- */
-#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
-
-/**
- * @brief Clears the EXTI's line pending bits.
- * @param __EXTI_LINE__ specifies the EXTI lines to clear.
- * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
- * @retval None
- */
-#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
-
-/**
- * @brief Generates a Software interrupt on selected EXTI line.
- * @param __EXTI_LINE__ specifies the EXTI line to check.
- * This parameter can be GPIO_PIN_x where x can be(0..15)
- * @retval None
- */
-#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
-/**
- * @}
- */
-
-/* Include GPIO HAL Extension module */
-#include "stm32f4xx_hal_gpio_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup GPIO_Exported_Functions
- * @{
- */
-
-/** @addtogroup GPIO_Exported_Functions_Group1
- * @{
- */
-/* Initialization and de-initialization functions *****************************/
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
-void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
-/**
- * @}
- */
-
-/** @addtogroup GPIO_Exported_Functions_Group2
- * @{
- */
-/* IO operation functions *****************************************************/
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
-void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
-void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup GPIO_Private_Constants GPIO Private Constants
- * @{
- */
-#define GPIO_MODE_Pos 0U
-#define GPIO_MODE (0x3UL << GPIO_MODE_Pos)
-#define MODE_INPUT (0x0UL << GPIO_MODE_Pos)
-#define MODE_OUTPUT (0x1UL << GPIO_MODE_Pos)
-#define MODE_AF (0x2UL << GPIO_MODE_Pos)
-#define MODE_ANALOG (0x3UL << GPIO_MODE_Pos)
-#define OUTPUT_TYPE_Pos 4U
-#define OUTPUT_TYPE (0x1UL << OUTPUT_TYPE_Pos)
-#define OUTPUT_PP (0x0UL << OUTPUT_TYPE_Pos)
-#define OUTPUT_OD (0x1UL << OUTPUT_TYPE_Pos)
-#define EXTI_MODE_Pos 16U
-#define EXTI_MODE (0x3UL << EXTI_MODE_Pos)
-#define EXTI_IT (0x1UL << EXTI_MODE_Pos)
-#define EXTI_EVT (0x2UL << EXTI_MODE_Pos)
-#define TRIGGER_MODE_Pos 20U
-#define TRIGGER_MODE (0x7UL << TRIGGER_MODE_Pos)
-#define TRIGGER_RISING (0x1UL << TRIGGER_MODE_Pos)
-#define TRIGGER_FALLING (0x2UL << TRIGGER_MODE_Pos)
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup GPIO_Private_Macros GPIO Private Macros
- * @{
- */
-#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
-#define IS_GPIO_PIN(PIN) (((((uint32_t)PIN) & GPIO_PIN_MASK ) != 0x00U) && ((((uint32_t)PIN) & ~GPIO_PIN_MASK) == 0x00U))
-#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
- ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
- ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
- ((MODE) == GPIO_MODE_AF_PP) ||\
- ((MODE) == GPIO_MODE_AF_OD) ||\
- ((MODE) == GPIO_MODE_IT_RISING) ||\
- ((MODE) == GPIO_MODE_IT_FALLING) ||\
- ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
- ((MODE) == GPIO_MODE_EVT_RISING) ||\
- ((MODE) == GPIO_MODE_EVT_FALLING) ||\
- ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
- ((MODE) == GPIO_MODE_ANALOG))
-#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
- ((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
-#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
- ((PULL) == GPIO_PULLDOWN))
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup GPIO_Private_Functions GPIO Private Functions
- * @{
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_GPIO_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h
deleted file mode 100644
index 393f388b2edb0b8965302ed8a3a08cff470f43e5..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h
+++ /dev/null
@@ -1,1590 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_gpio_ex.h
- * @author MCD Application Team
- * @brief Header file of GPIO HAL Extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_GPIO_EX_H
-#define __STM32F4xx_HAL_GPIO_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup GPIOEx GPIOEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
- * @{
- */
-
-/** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
- * @{
- */
-
-/*------------------------------------------ STM32F429xx/STM32F439xx ---------*/
-#if defined(STM32F429xx) || defined(STM32F439xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-#define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
-#define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-#define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */
-#define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LCD-TFT Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 13 selection
- */
-#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
-
-/**
- * @brief AF 14 selection
- */
-#define GPIO_AF14_LTDC ((uint8_t)0x0E) /* LCD-TFT Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F429xx || STM32F439xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F427xx/STM32F437xx------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-#define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
-#define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
-/** @brief GPIO_Legacy
- */
-#define GPIO_AF5_I2S3ext GPIO_AF5_SPI3 /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-#define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */
-#define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 13 selection
- */
-#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F427xx || STM32F437xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F407xx/STM32F417xx------------------*/
-#if defined(STM32F407xx) || defined(STM32F417xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FSMC ((uint8_t)0x0C) /* FSMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 13 selection
- */
-#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F407xx || STM32F417xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F405xx/STM32F415xx------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FSMC ((uint8_t)0x0C) /* FSMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F405xx || STM32F415xx */
-
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------------- STM32F401xx------------------------*/
-#if defined(STM32F401xC) || defined(STM32F401xE)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping */
-#define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping */
-
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F401xC || STM32F401xE */
-/*----------------------------------------------------------------------------*/
-
-/*--------------- STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx-------------*/
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-#define GPIO_AF4_FMPI2C1 ((uint8_t)0x04) /* FMPI2C1 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4/I2S4 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* I2S2 Alternate Function mapping */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_SPI4 ((uint8_t)0x06) /* SPI4/I2S4 Alternate Function mapping */
-#define GPIO_AF6_SPI5 ((uint8_t)0x06) /* SPI5/I2S5 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_USART3 ((uint8_t)0x08) /* USART3 Alternate Function mapping */
-#define GPIO_AF8_DFSDM1 ((uint8_t)0x08) /* DFSDM1 Alternate Function mapping */
-#define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping */
-#define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping */
-#define GPIO_AF9_FMPI2C1 ((uint8_t)0x09) /* FMPI2C1 Alternate Function mapping */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_QSPI ((uint8_t)0x09) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_DFSDM1 ((uint8_t)0x0A) /* DFSDM1 Alternate Function mapping */
-#define GPIO_AF10_QSPI ((uint8_t)0x0A) /* QSPI Alternate Function mapping */
-#define GPIO_AF10_FMC ((uint8_t)0x0A) /* FMC Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-#define GPIO_AF12_FSMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-/*----------------------------------------------------------------------------*/
-
-/*--------------- STM32F413xx/STM32F423xx-------------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-#define GPIO_AF3_DFSDM2 ((uint8_t)0x03) /* DFSDM2 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-#define GPIO_AF4_FMPI2C1 ((uint8_t)0x04) /* FMPI2C1 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4/I2S4 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* I2S2 Alternate Function mapping */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_SPI4 ((uint8_t)0x06) /* SPI4/I2S4 Alternate Function mapping */
-#define GPIO_AF6_SPI5 ((uint8_t)0x06) /* SPI5/I2S5 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */
-#define GPIO_AF6_DFSDM2 ((uint8_t)0x06) /* DFSDM2 Alternate Function mapping */
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF7_SAI1 ((uint8_t)0x07) /* SAI1 Alternate Function mapping */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-#define GPIO_AF7_DFSDM2 ((uint8_t)0x07) /* DFSDM2 Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_USART3 ((uint8_t)0x08) /* USART3 Alternate Function mapping */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_UART7 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
-#define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
-#define GPIO_AF8_DFSDM1 ((uint8_t)0x08) /* DFSDM1 Alternate Function mapping */
-#define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping */
-#define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping */
-#define GPIO_AF9_FMPI2C1 ((uint8_t)0x09) /* FMPI2C1 Alternate Function mapping */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_QSPI ((uint8_t)0x09) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_SAI1 ((uint8_t)0x0A) /* SAI1 Alternate Function mapping */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_DFSDM1 ((uint8_t)0x0A) /* DFSDM1 Alternate Function mapping */
-#define GPIO_AF10_DFSDM2 ((uint8_t)0x0A) /* DFSDM2 Alternate Function mapping */
-#define GPIO_AF10_QSPI ((uint8_t)0x0A) /* QSPI Alternate Function mapping */
-#define GPIO_AF10_FSMC ((uint8_t)0x0A) /* FSMC Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_UART4 ((uint8_t)0x0B) /* UART4 Alternate Function mapping */
-#define GPIO_AF11_UART5 ((uint8_t)0x0B) /* UART5 Alternate Function mapping */
-#define GPIO_AF11_UART9 ((uint8_t)0x0B) /* UART9 Alternate Function mapping */
-#define GPIO_AF11_UART10 ((uint8_t)0x0B) /* UART10 Alternate Function mapping */
-#define GPIO_AF11_CAN3 ((uint8_t)0x0B) /* CAN3 Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-#define GPIO_AF12_FSMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-
-/**
- * @brief AF 14 selection
- */
-#define GPIO_AF14_RNG ((uint8_t)0x0E) /* RNG Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F413xx || STM32F423xx */
-
-/*---------------------------------------- STM32F411xx------------------------*/
-#if defined(STM32F411xE)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* I2S2 Alternate Function mapping */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_SPI4 ((uint8_t)0x06) /* SPI4/I2S4 Alternate Function mapping */
-#define GPIO_AF6_SPI5 ((uint8_t)0x06) /* SPI5/I2S5 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping */
-#define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F411xE */
-
-/*---------------------------------------- STM32F410xx------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_FMPI2C1 ((uint8_t)0x04) /* FMPI2C1 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */
-#if defined(STM32F410Cx) || defined(STM32F410Rx)
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#endif /* STM32F410Cx || STM32F410Rx */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI1 ((uint8_t)0x06) /* SPI1 Alternate Function mapping */
-#if defined(STM32F410Cx) || defined(STM32F410Rx)
-#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* I2S2 Alternate Function mapping */
-#endif /* STM32F410Cx || STM32F410Rx */
-#define GPIO_AF6_SPI5 ((uint8_t)0x06) /* SPI5/I2S5 Alternate Function mapping */
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping */
-#define GPIO_AF9_FMPI2C1 ((uint8_t)0x09) /* FMPI2C1 Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-/*---------------------------------------- STM32F446xx -----------------------*/
-#if defined(STM32F446xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-#define GPIO_AF3_CEC ((uint8_t)0x03) /* CEC Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-#define GPIO_AF4_FMPI2C1 ((uint8_t)0x04) /* FMPI2C1 Alternate Function mapping */
-#define GPIO_AF4_CEC ((uint8_t)0x04) /* CEC Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI2 ((uint8_t)0x06) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_SPI4 ((uint8_t)0x06) /* SPI4 Alternate Function mapping */
-#define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_UART5 ((uint8_t)0x07) /* UART5 Alternate Function mapping */
-#define GPIO_AF7_SPI2 ((uint8_t)0x07) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF7_SPDIFRX ((uint8_t)0x07) /* SPDIFRX Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_SPDIFRX ((uint8_t)0x08) /* SPDIFRX Alternate Function mapping */
-#define GPIO_AF8_SAI2 ((uint8_t)0x08) /* SAI2 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_QSPI ((uint8_t)0x09) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-#define GPIO_AF10_SAI2 ((uint8_t)0x0A) /* SAI2 Alternate Function mapping */
-#define GPIO_AF10_QSPI ((uint8_t)0x0A) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 13 selection
- */
-#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-
-#endif /* STM32F446xx */
-/*----------------------------------------------------------------------------*/
-
-/*-------------------------------- STM32F469xx/STM32F479xx--------------------*/
-#if defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief AF 0 selection
- */
-#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
-#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
-#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
-#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
-#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
-
-/**
- * @brief AF 1 selection
- */
-#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
-#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
-
-/**
- * @brief AF 2 selection
- */
-#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
-#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
-#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
-
-/**
- * @brief AF 3 selection
- */
-#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
-#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
-#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
-#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
-
-/**
- * @brief AF 4 selection
- */
-#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
-#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
-#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
-
-/**
- * @brief AF 5 selection
- */
-#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
-#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
-#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF5_SPI4 ((uint8_t)0x05) /* SPI4 Alternate Function mapping */
-#define GPIO_AF5_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */
-#define GPIO_AF5_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */
-#define GPIO_AF5_I2S3ext ((uint8_t)0x05) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 6 selection
- */
-#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
-#define GPIO_AF6_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping */
-#define GPIO_AF6_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */
-
-/**
- * @brief AF 7 selection
- */
-#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
-#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
-#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
-#define GPIO_AF7_I2S3ext ((uint8_t)0x07) /* I2S3ext_SD Alternate Function mapping */
-
-/**
- * @brief AF 8 selection
- */
-#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
-#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
-#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
-#define GPIO_AF8_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */
-#define GPIO_AF8_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */
-
-/**
- * @brief AF 9 selection
- */
-#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
-#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
-#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
-#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
-#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
-#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LCD-TFT Alternate Function mapping */
-#define GPIO_AF9_QSPI ((uint8_t)0x09) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 10 selection
- */
-#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
-#define GPIO_AF10_OTG_HS ((uint8_t)0x0A) /* OTG_HS Alternate Function mapping */
-#define GPIO_AF10_QSPI ((uint8_t)0x0A) /* QSPI Alternate Function mapping */
-
-/**
- * @brief AF 11 selection
- */
-#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
-
-/**
- * @brief AF 12 selection
- */
-#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
-#define GPIO_AF12_OTG_HS_FS ((uint8_t)0x0C) /* OTG HS configured in FS, Alternate Function mapping */
-#define GPIO_AF12_SDIO ((uint8_t)0x0C) /* SDIO Alternate Function mapping */
-
-/**
- * @brief AF 13 selection
- */
-#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
-#define GPIO_AF13_DSI ((uint8_t)0x0D) /* DSI Alternate Function mapping */
-
-/**
- * @brief AF 14 selection
- */
-#define GPIO_AF14_LTDC ((uint8_t)0x0E) /* LCD-TFT Alternate Function mapping */
-
-/**
- * @brief AF 15 selection
- */
-#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
-
-#endif /* STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
- * @{
- */
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
- * @{
- */
-/**
- * @}
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup GPIOEx_Private_Constants GPIO Private Constants
- * @{
- */
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup GPIOEx_Private_Macros GPIO Private Macros
- * @{
- */
-/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
- * @{
- */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U :\
- ((__GPIOx__) == (GPIOE))? 4U :\
- ((__GPIOx__) == (GPIOF))? 5U :\
- ((__GPIOx__) == (GPIOG))? 6U :\
- ((__GPIOx__) == (GPIOH))? 7U : 8U)
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U :\
- ((__GPIOx__) == (GPIOE))? 4U :\
- ((__GPIOx__) == (GPIOF))? 5U :\
- ((__GPIOx__) == (GPIOG))? 6U :\
- ((__GPIOx__) == (GPIOH))? 7U :\
- ((__GPIOx__) == (GPIOI))? 8U :\
- ((__GPIOx__) == (GPIOJ))? 9U : 10U)
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U : 7U)
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U :\
- ((__GPIOx__) == (GPIOE))? 4U : 7U)
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
-
-#if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U :\
- ((__GPIOx__) == (GPIOE))? 4U :\
- ((__GPIOx__) == (GPIOF))? 5U :\
- ((__GPIOx__) == (GPIOG))? 6U : 7U)
-#endif /* STM32F446xx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U :\
- ((__GPIOx__) == (GPIOE))? 4U : 7U)
-#endif /* STM32F412Vx */
-#if defined(STM32F412Rx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U :\
- ((__GPIOx__) == (GPIOD))? 3U : 7U)
-#endif /* STM32F412Rx */
-#if defined(STM32F412Cx)
-#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
- ((__GPIOx__) == (GPIOB))? 1U :\
- ((__GPIOx__) == (GPIOC))? 2U : 7U)
-#endif /* STM32F412Cx */
-
-/**
- * @}
- */
-
-/** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
- * @{
- */
-/*------------------------- STM32F429xx/STM32F439xx---------------------------*/
-#if defined(STM32F429xx) || defined(STM32F439xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
- ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
- ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
- ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF6_SAI1) || \
- ((AF) == GPIO_AF14_LTDC))
-
-#endif /* STM32F429xx || STM32F439xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F427xx/STM32F437xx------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
- ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
- ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
- ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF6_SAI1))
-
-#endif /* STM32F427xx || STM32F437xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F407xx/STM32F417xx------------------*/
-#if defined(STM32F407xx) || defined(STM32F417xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
- ((AF) == GPIO_AF12_FSMC) || ((AF) == GPIO_AF15_EVENTOUT))
-
-#endif /* STM32F407xx || STM32F417xx */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F405xx/STM32F415xx------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDIO) || \
- ((AF) == GPIO_AF12_FSMC) || ((AF) == GPIO_AF15_EVENTOUT))
-
-#endif /* STM32F405xx || STM32F415xx */
-
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------------- STM32F401xx------------------------*/
-#if defined(STM32F401xC) || defined(STM32F401xE)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF12_SDIO) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM9) || \
- ((AF) == GPIO_AF3_TIM10) || ((AF) == GPIO_AF3_TIM11) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF7_USART1) || \
- ((AF) == GPIO_AF7_USART2) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_I2C2) || ((AF) == GPIO_AF9_I2C3) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF15_EVENTOUT))
-#endif /* STM32F401xC || STM32F401xE */
-/*----------------------------------------------------------------------------*/
-/*---------------------------------------- STM32F410xx------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_GPIO_AF(AF) (((AF) < 10U) || ((AF) == 15U))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-/*---------------------------------------- STM32F411xx------------------------*/
-#if defined(STM32F411xE)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF4_I2C1) || \
- ((AF) == GPIO_AF4_I2C2) || ((AF) == GPIO_AF4_I2C3) || \
- ((AF) == GPIO_AF5_SPI1) || ((AF) == GPIO_AF5_SPI2) || \
- ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF6_SPI4) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF6_SPI5) || ((AF) == GPIO_AF7_SPI3) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF8_USART6) || ((AF) == GPIO_AF10_OTG_FS) || \
- ((AF) == GPIO_AF9_I2C2) || ((AF) == GPIO_AF9_I2C3) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF15_EVENTOUT))
-
-#endif /* STM32F411xE */
-/*----------------------------------------------------------------------------*/
-
-/*----------------------------------------------- STM32F446xx ----------------*/
-#if defined(STM32F446xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
- ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF6_SAI1) || \
- ((AF) == GPIO_AF3_CEC) || ((AF) == GPIO_AF4_CEC) || \
- ((AF) == GPIO_AF5_SPI3) || ((AF) == GPIO_AF6_SPI2) || \
- ((AF) == GPIO_AF6_SPI4) || ((AF) == GPIO_AF7_UART5) || \
- ((AF) == GPIO_AF7_SPI2) || ((AF) == GPIO_AF7_SPI3) || \
- ((AF) == GPIO_AF7_SPDIFRX) || ((AF) == GPIO_AF8_SPDIFRX) || \
- ((AF) == GPIO_AF8_SAI2) || ((AF) == GPIO_AF9_QSPI) || \
- ((AF) == GPIO_AF10_SAI2) || ((AF) == GPIO_AF10_QSPI))
-
-#endif /* STM32F446xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------------------------------- STM32F469xx/STM32F479xx --------*/
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \
- ((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
- ((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
- ((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
- ((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
- ((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
- ((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
- ((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
- ((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
- ((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
- ((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
- ((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
- ((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
- ((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
- ((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
- ((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
- ((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
- ((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF5_SPI4) || \
- ((AF) == GPIO_AF5_SPI5) || ((AF) == GPIO_AF5_SPI6) || \
- ((AF) == GPIO_AF8_UART7) || ((AF) == GPIO_AF8_UART8) || \
- ((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF6_SAI1) || \
- ((AF) == GPIO_AF14_LTDC) || ((AF) == GPIO_AF13_DSI) || \
- ((AF) == GPIO_AF9_QSPI) || ((AF) == GPIO_AF10_QSPI))
-
-#endif /* STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx-----------*/
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define IS_GPIO_AF(AF) (((AF) < 16U) && ((AF) != 11U) && ((AF) != 14U) && ((AF) != 13U))
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------STM32F413xx/STM32F423xx-----------------------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_GPIO_AF(AF) (((AF) < 16U) && ((AF) != 13U))
-#endif /* STM32F413xx || STM32F423xx */
-/*----------------------------------------------------------------------------*/
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup GPIOEx_Private_Functions GPIO Private Functions
- * @{
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_GPIO_EX_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h
deleted file mode 100644
index b37126e3a195da4636fbbb7e83c889055e42f351..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h
+++ /dev/null
@@ -1,741 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_i2c.h
- * @author MCD Application Team
- * @brief Header file of I2C HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_I2C_H
-#define __STM32F4xx_HAL_I2C_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup I2C
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup I2C_Exported_Types I2C Exported Types
- * @{
- */
-
-/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
- * @brief I2C Configuration Structure definition
- * @{
- */
-typedef struct
-{
- uint32_t ClockSpeed; /*!< Specifies the clock frequency.
- This parameter must be set to a value lower than 400kHz */
-
- uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
- This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
-
- uint32_t OwnAddress1; /*!< Specifies the first device own address.
- This parameter can be a 7-bit or 10-bit address. */
-
- uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
- This parameter can be a value of @ref I2C_addressing_mode */
-
- uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
- This parameter can be a value of @ref I2C_dual_addressing_mode */
-
- uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
- This parameter can be a 7-bit address. */
-
- uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
- This parameter can be a value of @ref I2C_general_call_addressing_mode */
-
- uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
- This parameter can be a value of @ref I2C_nostretch_mode */
-
-} I2C_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup HAL_state_structure_definition HAL state structure definition
- * @brief HAL State structure definition
- * @note HAL I2C State value coding follow below described bitmap :
- * b7-b6 Error information
- * 00 : No Error
- * 01 : Abort (Abort user request on going)
- * 10 : Timeout
- * 11 : Error
- * b5 Peripheral initialization status
- * 0 : Reset (Peripheral not initialized)
- * 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
- * b4 (not used)
- * x : Should be set to 0
- * b3
- * 0 : Ready or Busy (No Listen mode ongoing)
- * 1 : Listen (Peripheral in Address Listen Mode)
- * b2 Intrinsic process state
- * 0 : Ready
- * 1 : Busy (Peripheral busy with some configuration or internal operations)
- * b1 Rx state
- * 0 : Ready (no Rx operation ongoing)
- * 1 : Busy (Rx operation ongoing)
- * b0 Tx state
- * 0 : Ready (no Tx operation ongoing)
- * 1 : Busy (Tx operation ongoing)
- * @{
- */
-typedef enum
-{
- HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
- HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
- HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
- HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
- HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
- HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
- HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
- process is ongoing */
- HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
- process is ongoing */
- HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
- HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
- HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
-
-} HAL_I2C_StateTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup HAL_mode_structure_definition HAL mode structure definition
- * @brief HAL Mode structure definition
- * @note HAL I2C Mode value coding follow below described bitmap :\n
- * b7 (not used)\n
- * x : Should be set to 0\n
- * b6\n
- * 0 : None\n
- * 1 : Memory (HAL I2C communication is in Memory Mode)\n
- * b5\n
- * 0 : None\n
- * 1 : Slave (HAL I2C communication is in Slave Mode)\n
- * b4\n
- * 0 : None\n
- * 1 : Master (HAL I2C communication is in Master Mode)\n
- * b3-b2-b1-b0 (not used)\n
- * xxxx : Should be set to 0000
- * @{
- */
-typedef enum
-{
- HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
- HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
- HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
- HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
-
-} HAL_I2C_ModeTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Error_Code_definition I2C Error Code definition
- * @brief I2C Error Code definition
- * @{
- */
-#define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
-#define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
-#define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
-#define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
-#define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
-#define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
-#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
-#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
-#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
-#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-/**
- * @}
- */
-
-/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
- * @brief I2C handle Structure definition
- * @{
- */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-typedef struct __I2C_HandleTypeDef
-#else
-typedef struct
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-{
- I2C_TypeDef *Instance; /*!< I2C registers base address */
-
- I2C_InitTypeDef Init; /*!< I2C communication parameters */
-
- uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
-
- uint16_t XferSize; /*!< I2C transfer size */
-
- __IO uint16_t XferCount; /*!< I2C transfer counter */
-
- __IO uint32_t XferOptions; /*!< I2C transfer options */
-
- __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
- context for internal usage */
-
- DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
-
- DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
-
- HAL_LockTypeDef Lock; /*!< I2C locking object */
-
- __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
-
- __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
-
- __IO uint32_t ErrorCode; /*!< I2C Error code */
-
- __IO uint32_t Devaddress; /*!< I2C Target device address */
-
- __IO uint32_t Memaddress; /*!< I2C Target memory address */
-
- __IO uint32_t MemaddSize; /*!< I2C Target memory address size */
-
- __IO uint32_t EventCount; /*!< I2C Event counter */
-
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
- void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
- void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
- void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
- void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
- void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
- void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
- void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
- void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
-
- void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
-
- void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
- void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
-
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-} I2C_HandleTypeDef;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-/**
- * @brief HAL I2C Callback ID enumeration definition
- */
-typedef enum
-{
- HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
- HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
- HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
- HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
- HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
- HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
- HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
- HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
- HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
-
- HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
- HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
-
-} HAL_I2C_CallbackIDTypeDef;
-
-/**
- * @brief HAL I2C Callback pointer definition
- */
-typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
-typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
-
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Constants I2C Exported Constants
- * @{
- */
-
-/** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
- * @{
- */
-#define I2C_DUTYCYCLE_2 0x00000000U
-#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
-/**
- * @}
- */
-
-/** @defgroup I2C_addressing_mode I2C addressing mode
- * @{
- */
-#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
-#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
-/**
- * @}
- */
-
-/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
- * @{
- */
-#define I2C_DUALADDRESS_DISABLE 0x00000000U
-#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
-/**
- * @}
- */
-
-/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
- * @{
- */
-#define I2C_GENERALCALL_DISABLE 0x00000000U
-#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
-/**
- * @}
- */
-
-/** @defgroup I2C_nostretch_mode I2C nostretch mode
- * @{
- */
-#define I2C_NOSTRETCH_DISABLE 0x00000000U
-#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
-/**
- * @}
- */
-
-/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
- * @{
- */
-#define I2C_MEMADD_SIZE_8BIT 0x00000001U
-#define I2C_MEMADD_SIZE_16BIT 0x00000010U
-/**
- * @}
- */
-
-/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
- * @{
- */
-#define I2C_DIRECTION_RECEIVE 0x00000000U
-#define I2C_DIRECTION_TRANSMIT 0x00000001U
-/**
- * @}
- */
-
-/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
- * @{
- */
-#define I2C_FIRST_FRAME 0x00000001U
-#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
-#define I2C_NEXT_FRAME 0x00000004U
-#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
-#define I2C_LAST_FRAME_NO_STOP 0x00000010U
-#define I2C_LAST_FRAME 0x00000020U
-
-/* List of XferOptions in usage of :
- * 1- Restart condition in all use cases (direction change or not)
- */
-#define I2C_OTHER_FRAME (0x00AA0000U)
-#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
-/**
- * @}
- */
-
-/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
- * @brief I2C Interrupt definition
- * Elements values convention: 0xXXXXXXXX
- * - XXXXXXXX : Interrupt control mask
- * @{
- */
-#define I2C_IT_BUF I2C_CR2_ITBUFEN
-#define I2C_IT_EVT I2C_CR2_ITEVTEN
-#define I2C_IT_ERR I2C_CR2_ITERREN
-/**
- * @}
- */
-
-/** @defgroup I2C_Flag_definition I2C Flag definition
- * @{
- */
-
-#define I2C_FLAG_OVR 0x00010800U
-#define I2C_FLAG_AF 0x00010400U
-#define I2C_FLAG_ARLO 0x00010200U
-#define I2C_FLAG_BERR 0x00010100U
-#define I2C_FLAG_TXE 0x00010080U
-#define I2C_FLAG_RXNE 0x00010040U
-#define I2C_FLAG_STOPF 0x00010010U
-#define I2C_FLAG_ADD10 0x00010008U
-#define I2C_FLAG_BTF 0x00010004U
-#define I2C_FLAG_ADDR 0x00010002U
-#define I2C_FLAG_SB 0x00010001U
-#define I2C_FLAG_DUALF 0x00100080U
-#define I2C_FLAG_GENCALL 0x00100010U
-#define I2C_FLAG_TRA 0x00100004U
-#define I2C_FLAG_BUSY 0x00100002U
-#define I2C_FLAG_MSL 0x00100001U
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macros -----------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Macros I2C Exported Macros
- * @{
- */
-
-/** @brief Reset I2C handle state.
- * @param __HANDLE__ specifies the I2C Handle.
- * @retval None
- */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
- (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
- (__HANDLE__)->MspInitCallback = NULL; \
- (__HANDLE__)->MspDeInitCallback = NULL; \
- } while(0)
-#else
-#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
-#endif
-
-/** @brief Enable or disable the specified I2C interrupts.
- * @param __HANDLE__ specifies the I2C Handle.
- * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
- * This parameter can be one of the following values:
- * @arg I2C_IT_BUF: Buffer interrupt enable
- * @arg I2C_IT_EVT: Event interrupt enable
- * @arg I2C_IT_ERR: Error interrupt enable
- * @retval None
- */
-#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
-#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
-
-/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
- * @param __HANDLE__ specifies the I2C Handle.
- * @param __INTERRUPT__ specifies the I2C interrupt source to check.
- * This parameter can be one of the following values:
- * @arg I2C_IT_BUF: Buffer interrupt enable
- * @arg I2C_IT_EVT: Event interrupt enable
- * @arg I2C_IT_ERR: Error interrupt enable
- * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
- */
-#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief Checks whether the specified I2C flag is set or not.
- * @param __HANDLE__ specifies the I2C Handle.
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be one of the following values:
- * @arg I2C_FLAG_OVR: Overrun/Underrun flag
- * @arg I2C_FLAG_AF: Acknowledge failure flag
- * @arg I2C_FLAG_ARLO: Arbitration lost flag
- * @arg I2C_FLAG_BERR: Bus error flag
- * @arg I2C_FLAG_TXE: Data register empty flag
- * @arg I2C_FLAG_RXNE: Data register not empty flag
- * @arg I2C_FLAG_STOPF: Stop detection flag
- * @arg I2C_FLAG_ADD10: 10-bit header sent flag
- * @arg I2C_FLAG_BTF: Byte transfer finished flag
- * @arg I2C_FLAG_ADDR: Address sent flag
- * Address matched flag
- * @arg I2C_FLAG_SB: Start bit flag
- * @arg I2C_FLAG_DUALF: Dual flag
- * @arg I2C_FLAG_GENCALL: General call header flag
- * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
- * @arg I2C_FLAG_BUSY: Bus busy flag
- * @arg I2C_FLAG_MSL: Master/Slave flag
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
- (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
- (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
-
-/** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
- * @param __HANDLE__ specifies the I2C Handle.
- * @param __FLAG__ specifies the flag to clear.
- * This parameter can be any combination of the following values:
- * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
- * @arg I2C_FLAG_AF: Acknowledge failure flag
- * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
- * @arg I2C_FLAG_BERR: Bus error flag
- * @retval None
- */
-#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
-
-/** @brief Clears the I2C ADDR pending flag.
- * @param __HANDLE__ specifies the I2C Handle.
- * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
- * @retval None
- */
-#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
- do{ \
- __IO uint32_t tmpreg = 0x00U; \
- tmpreg = (__HANDLE__)->Instance->SR1; \
- tmpreg = (__HANDLE__)->Instance->SR2; \
- UNUSED(tmpreg); \
- } while(0)
-
-/** @brief Clears the I2C STOPF pending flag.
- * @param __HANDLE__ specifies the I2C Handle.
- * @retval None
- */
-#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
- do{ \
- __IO uint32_t tmpreg = 0x00U; \
- tmpreg = (__HANDLE__)->Instance->SR1; \
- SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
- UNUSED(tmpreg); \
- } while(0)
-
-/** @brief Enable the specified I2C peripheral.
- * @param __HANDLE__ specifies the I2C Handle.
- * @retval None
- */
-#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
-
-/** @brief Disable the specified I2C peripheral.
- * @param __HANDLE__ specifies the I2C Handle.
- * @retval None
- */
-#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
-
-/**
- * @}
- */
-
-/* Include I2C HAL Extension module */
-#include "stm32f4xx_hal_i2c_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2C_Exported_Functions
- * @{
- */
-
-/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
- * @{
- */
-/* Initialization and de-initialization functions******************************/
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
-
-/* Callbacks Register/UnRegister functions ***********************************/
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
-
-HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-/**
- * @}
- */
-
-/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
- * @{
- */
-/* IO operation functions ****************************************************/
-/******* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
-
-/******* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
-
-/******* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
-
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-/**
- * @}
- */
-
-/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
-void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
-void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
-/**
- * @}
- */
-
-/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
- * @{
- */
-/* Peripheral State, Mode and Error functions *********************************/
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2C_Private_Constants I2C Private Constants
- * @{
- */
-#define I2C_FLAG_MASK 0x0000FFFFU
-#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */
-#define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2C_Private_Macros I2C Private Macros
- * @{
- */
-
-#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
-#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
-#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
-#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
-#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
-#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
-#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
- ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
- ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
-
-#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
-#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
-
-#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
-#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
-#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
-
-#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
-#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
-
-/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
- * @{
- */
-#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
- ((CYCLE) == I2C_DUTYCYCLE_16_9))
-#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
- ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
-#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
- ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
-#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
- ((CALL) == I2C_GENERALCALL_ENABLE))
-#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
- ((STRETCH) == I2C_NOSTRETCH_ENABLE))
-#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
- ((SIZE) == I2C_MEMADD_SIZE_16BIT))
-#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
-#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
-#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
-#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
- ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
- ((REQUEST) == I2C_NEXT_FRAME) || \
- ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
- ((REQUEST) == I2C_LAST_FRAME) || \
- ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
- IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
-
-#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
- ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
-
-#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
-#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup I2C_Private_Functions I2C Private Functions
- * @{
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32F4xx_HAL_I2C_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h
deleted file mode 100644
index e2ee7c804bf4ed1f55a31409df0290fa444a34f9..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_i2c_ex.h
- * @author MCD Application Team
- * @brief Header file of I2C HAL Extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_I2C_EX_H
-#define __STM32F4xx_HAL_I2C_EX_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup I2CEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup I2CEx_Exported_Constants I2C Exported Constants
- * @{
- */
-
-/** @defgroup I2CEx_Analog_Filter I2C Analog Filter
- * @{
- */
-#define I2C_ANALOGFILTER_ENABLE 0x00000000U
-#define I2C_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2CEx_Exported_Functions
- * @{
- */
-
-/** @addtogroup I2CEx_Exported_Functions_Group1
- * @{
- */
-/* Peripheral Control functions ************************************************/
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2CEx_Private_Constants I2C Private Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2CEx_Private_Macros I2C Private Macros
- * @{
- */
-#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
- ((FILTER) == I2C_ANALOGFILTER_DISABLE))
-#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_I2C_EX_H */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h
deleted file mode 100644
index ab0412d74362309d2fa3790b46b72b3a2dda9ea4..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h
+++ /dev/null
@@ -1,427 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_pwr.h
- * @author MCD Application Team
- * @brief Header file of PWR HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_PWR_H
-#define __STM32F4xx_HAL_PWR_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup PWR
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-
-/** @defgroup PWR_Exported_Types PWR Exported Types
- * @{
- */
-
-/**
- * @brief PWR PVD configuration structure definition
- */
-typedef struct
-{
- uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
- This parameter can be a value of @ref PWR_PVD_detection_level */
-
- uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
- This parameter can be a value of @ref PWR_PVD_Mode */
-}PWR_PVDTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup PWR_Exported_Constants PWR Exported Constants
- * @{
- */
-
-/** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
- * @{
- */
-#define PWR_WAKEUP_PIN1 0x00000100U
-/**
- * @}
- */
-
-/** @defgroup PWR_PVD_detection_level PWR PVD detection level
- * @{
- */
-#define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
-#define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
-#define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
-#define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
-#define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
-#define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
-#define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
-#define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
- (Compare internally to VREFINT) */
-/**
- * @}
- */
-
-/** @defgroup PWR_PVD_Mode PWR PVD Mode
- * @{
- */
-#define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
-#define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
-#define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
-#define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
-/**
- * @}
- */
-
-
-/** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
- * @{
- */
-#define PWR_MAINREGULATOR_ON 0x00000000U
-#define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
-/**
- * @}
- */
-
-/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
- * @{
- */
-#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
-#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
-/**
- * @}
- */
-
-/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
- * @{
- */
-#define PWR_STOPENTRY_WFI ((uint8_t)0x01)
-#define PWR_STOPENTRY_WFE ((uint8_t)0x02)
-/**
- * @}
- */
-
-/** @defgroup PWR_Flag PWR Flag
- * @{
- */
-#define PWR_FLAG_WU PWR_CSR_WUF
-#define PWR_FLAG_SB PWR_CSR_SBF
-#define PWR_FLAG_PVDO PWR_CSR_PVDO
-#define PWR_FLAG_BRR PWR_CSR_BRR
-#define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup PWR_Exported_Macro PWR Exported Macro
- * @{
- */
-
-/** @brief Check PWR flag is set or not.
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be one of the following values:
- * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
- * was received from the WKUP pin or from the RTC alarm (Alarm A
- * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
- * An additional wakeup event is detected if the WKUP pin is enabled
- * (by setting the EWUP bit) when the WKUP pin level is already high.
- * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
- * resumed from StandBy mode.
- * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
- * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
- * For this reason, this bit is equal to 0 after Standby or reset
- * until the PVDE bit is set.
- * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
- * when the device wakes up from Standby mode or by a system reset
- * or power reset.
- * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
- * scaling output selection is ready.
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
-
-/** @brief Clear the PWR's pending flags.
- * @param __FLAG__ specifies the flag to clear.
- * This parameter can be one of the following values:
- * @arg PWR_FLAG_WU: Wake Up flag
- * @arg PWR_FLAG_SB: StandBy flag
- */
-#define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
-
-/**
- * @brief Enable the PVD Exti Line 16.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Disable the PVD EXTI Line 16.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Enable event on PVD Exti Line 16.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Disable event on PVD Exti Line 16.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Enable the PVD Extended Interrupt Rising Trigger.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-
-/**
- * @brief Disable the PVD Extended Interrupt Rising Trigger.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
-
-/**
- * @brief Enable the PVD Extended Interrupt Falling Trigger.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-
-
-/**
- * @brief Disable the PVD Extended Interrupt Falling Trigger.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
-
-
-/**
- * @brief PVD EXTI line configuration: set rising & falling edge trigger.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
- __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
- }while(0U)
-
-/**
- * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
- * This parameter can be:
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
- __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
- }while(0U)
-
-/**
- * @brief checks whether the specified PVD Exti interrupt flag is set or not.
- * @retval EXTI PVD Line Status.
- */
-#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Clear the PVD Exti flag.
- * @retval None.
- */
-#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
-
-/**
- * @brief Generates a Software interrupt on PVD EXTI line.
- * @retval None
- */
-#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
-
-/**
- * @}
- */
-
-/* Include PWR HAL Extension module */
-#include "stm32f4xx_hal_pwr_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup PWR_Exported_Functions PWR Exported Functions
- * @{
- */
-
-/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
- * @{
- */
-/* Initialization and de-initialization functions *****************************/
-void HAL_PWR_DeInit(void);
-void HAL_PWR_EnableBkUpAccess(void);
-void HAL_PWR_DisableBkUpAccess(void);
-/**
- * @}
- */
-
-/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
- * @{
- */
-/* Peripheral Control functions **********************************************/
-/* PVD configuration */
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
-void HAL_PWR_EnablePVD(void);
-void HAL_PWR_DisablePVD(void);
-
-/* WakeUp pins configuration */
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
-
-/* Low Power modes entry */
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
-void HAL_PWR_EnterSTANDBYMode(void);
-
-/* Power PVD IRQ Handler */
-void HAL_PWR_PVD_IRQHandler(void);
-void HAL_PWR_PVDCallback(void);
-
-/* Cortex System Control functions *******************************************/
-void HAL_PWR_EnableSleepOnExit(void);
-void HAL_PWR_DisableSleepOnExit(void);
-void HAL_PWR_EnableSEVOnPend(void);
-void HAL_PWR_DisableSEVOnPend(void);
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup PWR_Private_Constants PWR Private Constants
- * @{
- */
-
-/** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
- * @{
- */
-#define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
-/**
- * @}
- */
-
-/** @defgroup PWR_register_alias_address PWR Register alias address
- * @{
- */
-/* ------------- PWR registers bit address in the alias region ---------------*/
-#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
-#define PWR_CR_OFFSET 0x00U
-#define PWR_CSR_OFFSET 0x04U
-#define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
-#define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
-/**
- * @}
- */
-
-/** @defgroup PWR_CR_register_alias PWR CR Register alias address
- * @{
- */
-/* --- CR Register ---*/
-/* Alias word address of DBP bit */
-#define DBP_BIT_NUMBER PWR_CR_DBP_Pos
-#define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
-
-/* Alias word address of PVDE bit */
-#define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
-#define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
-
-/* Alias word address of VOS bit */
-#define VOS_BIT_NUMBER PWR_CR_VOS_Pos
-#define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
-/**
- * @}
- */
-
-/** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
- * @{
- */
-/* --- CSR Register ---*/
-/* Alias word address of EWUP bit */
-#define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
-#define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup PWR_Private_Macros PWR Private Macros
- * @{
- */
-
-/** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
- * @{
- */
-#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
- ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
- ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
- ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
-#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
- ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
- ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
- ((MODE) == PWR_PVD_MODE_NORMAL))
-#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
- ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
-#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
-#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32F4xx_HAL_PWR_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h
deleted file mode 100644
index 7b632a586dae234d9c9606b57dc33253c77f1041..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h
+++ /dev/null
@@ -1,340 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_pwr_ex.h
- * @author MCD Application Team
- * @brief Header file of PWR HAL Extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_PWR_EX_H
-#define __STM32F4xx_HAL_PWR_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup PWREx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup PWREx_Exported_Constants PWREx Exported Constants
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-
-/** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
- * @{
- */
-#define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
-#define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
-/**
- * @}
- */
-
-/** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
- * @{
- */
-#define PWR_FLAG_ODRDY PWR_CSR_ODRDY
-#define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
-#define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
-/**
- * @}
- */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-/** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
- * @{
- */
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
-#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
-#define PWR_REGULATOR_VOLTAGE_SCALE2 0x00000000U /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
-#else
-#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
- 180 MHz by activating the over-drive mode. */
-#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
- 168 MHz by activating the over-drive mode. */
-#define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
-#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
-/**
- * @}
- */
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
- * @{
- */
-#define PWR_WAKEUP_PIN2 0x00000080U
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define PWR_WAKEUP_PIN3 0x00000040U
-#endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
- STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-#endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup PWREx_Exported_Constants PWREx Exported Constants
- * @{
- */
-
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
-/** @brief macros configure the main internal regulator output voltage.
- * @param __REGULATOR__ specifies the regulator output voltage to achieve
- * a tradeoff between performance and power consumption when the device does
- * not operate at the maximum frequency (refer to the datasheets for more details).
- * This parameter can be one of the following values:
- * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
- * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
- * @retval None
- */
-#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
- __IO uint32_t tmpreg = 0x00U; \
- MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
- UNUSED(tmpreg); \
- } while(0U)
-#else
-/** @brief macros configure the main internal regulator output voltage.
- * @param __REGULATOR__ specifies the regulator output voltage to achieve
- * a tradeoff between performance and power consumption when the device does
- * not operate at the maximum frequency (refer to the datasheets for more details).
- * This parameter can be one of the following values:
- * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
- * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
- * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
- * @retval None
- */
-#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
- __IO uint32_t tmpreg = 0x00U; \
- MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macros to enable or disable the Over drive mode.
- * @note These macros can be used only for STM32F42xx/STM3243xx devices.
- */
-#define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
-#define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
-
-/** @brief Macros to enable or disable the Over drive switching.
- * @note These macros can be used only for STM32F42xx/STM3243xx devices.
- */
-#define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
-#define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
-
-/** @brief Macros to enable or disable the Under drive mode.
- * @note This mode is enabled only with STOP low power mode.
- * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
- * mode is only available when the main regulator or the low power regulator
- * is in low voltage mode.
- * @note If the Under-drive mode was enabled, it is automatically disabled after
- * exiting Stop mode.
- * When the voltage regulator operates in Under-drive mode, an additional
- * startup delay is induced when waking up from Stop mode.
- */
-#define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
-#define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
-
-/** @brief Check PWR flag is set or not.
- * @note These macros can be used only for STM32F42xx/STM3243xx devices.
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be one of the following values:
- * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
- * is ready
- * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
- * switching is ready
- * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
- * is enabled in Stop mode
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
-
-/** @brief Clear the Under-Drive Ready flag.
- * @note These macros can be used only for STM32F42xx/STM3243xx devices.
- */
-#define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
- * @{
- */
-
-/** @addtogroup PWREx_Exported_Functions_Group1
- * @{
- */
-void HAL_PWREx_EnableFlashPowerDown(void);
-void HAL_PWREx_DisableFlashPowerDown(void);
-HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
-HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
-uint32_t HAL_PWREx_GetVoltageRange(void);
-HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
- defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
-void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
-void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
-void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
-#endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
- STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
-HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
-HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup PWREx_Private_Constants PWREx Private Constants
- * @{
- */
-
-/** @defgroup PWREx_register_alias_address PWREx Register alias address
- * @{
- */
-/* ------------- PWR registers bit address in the alias region ---------------*/
-/* --- CR Register ---*/
-/* Alias word address of FPDS bit */
-#define FPDS_BIT_NUMBER PWR_CR_FPDS_Pos
-#define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
-
-/* Alias word address of ODEN bit */
-#define ODEN_BIT_NUMBER PWR_CR_ODEN_Pos
-#define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
-
-/* Alias word address of ODSWEN bit */
-#define ODSWEN_BIT_NUMBER PWR_CR_ODSWEN_Pos
-#define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
-
-/* Alias word address of MRLVDS bit */
-#define MRLVDS_BIT_NUMBER PWR_CR_MRLVDS_Pos
-#define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
-
-/* Alias word address of LPLVDS bit */
-#define LPLVDS_BIT_NUMBER PWR_CR_LPLVDS_Pos
-#define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
-
- /**
- * @}
- */
-
-/** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
- * @{
- */
-/* --- CSR Register ---*/
-/* Alias word address of BRE bit */
-#define BRE_BIT_NUMBER PWR_CSR_BRE_Pos
-#define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup PWREx_Private_Macros PWREx Private Macros
- * @{
- */
-
-/** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
- ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
-#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
- ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
-#else
-#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
- ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
- ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
-#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
-
-#if defined(STM32F446xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
-#elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
- ((PIN) == PWR_WAKEUP_PIN3))
-#else
-#define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
-#endif /* STM32F446xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32F4xx_HAL_PWR_EX_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h
deleted file mode 100644
index 908432da40a11bd205a67eb5e19419870502319c..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h
+++ /dev/null
@@ -1,1459 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_rcc.h
- * @author MCD Application Team
- * @brief Header file of RCC HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_RCC_H
-#define __STM32F4xx_HAL_RCC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/* Include RCC HAL Extended module */
-/* (include on top of file since RCC structures are defined in extended file) */
-#include "stm32f4xx_hal_rcc_ex.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup RCC
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup RCC_Exported_Types RCC Exported Types
- * @{
- */
-
-/**
- * @brief RCC Internal/External Oscillator (HSE, HSI, LSE and LSI) configuration structure definition
- */
-typedef struct
-{
- uint32_t OscillatorType; /*!< The oscillators to be configured.
- This parameter can be a value of @ref RCC_Oscillator_Type */
-
- uint32_t HSEState; /*!< The new state of the HSE.
- This parameter can be a value of @ref RCC_HSE_Config */
-
- uint32_t LSEState; /*!< The new state of the LSE.
- This parameter can be a value of @ref RCC_LSE_Config */
-
- uint32_t HSIState; /*!< The new state of the HSI.
- This parameter can be a value of @ref RCC_HSI_Config */
-
- uint32_t HSICalibrationValue; /*!< The HSI calibration trimming value (default is RCC_HSICALIBRATION_DEFAULT).
- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */
-
- uint32_t LSIState; /*!< The new state of the LSI.
- This parameter can be a value of @ref RCC_LSI_Config */
-
- RCC_PLLInitTypeDef PLL; /*!< PLL structure parameters */
-}RCC_OscInitTypeDef;
-
-/**
- * @brief RCC System, AHB and APB busses clock configuration structure definition
- */
-typedef struct
-{
- uint32_t ClockType; /*!< The clock to be configured.
- This parameter can be a value of @ref RCC_System_Clock_Type */
-
- uint32_t SYSCLKSource; /*!< The clock source (SYSCLKS) used as system clock.
- This parameter can be a value of @ref RCC_System_Clock_Source */
-
- uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
- This parameter can be a value of @ref RCC_AHB_Clock_Source */
-
- uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
- This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */
-
- uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
- This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */
-
-}RCC_ClkInitTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RCC_Exported_Constants RCC Exported Constants
- * @{
- */
-
-/** @defgroup RCC_Oscillator_Type Oscillator Type
- * @{
- */
-#define RCC_OSCILLATORTYPE_NONE 0x00000000U
-#define RCC_OSCILLATORTYPE_HSE 0x00000001U
-#define RCC_OSCILLATORTYPE_HSI 0x00000002U
-#define RCC_OSCILLATORTYPE_LSE 0x00000004U
-#define RCC_OSCILLATORTYPE_LSI 0x00000008U
-/**
- * @}
- */
-
-/** @defgroup RCC_HSE_Config HSE Config
- * @{
- */
-#define RCC_HSE_OFF 0x00000000U
-#define RCC_HSE_ON RCC_CR_HSEON
-#define RCC_HSE_BYPASS ((uint32_t)(RCC_CR_HSEBYP | RCC_CR_HSEON))
-/**
- * @}
- */
-
-/** @defgroup RCC_LSE_Config LSE Config
- * @{
- */
-#define RCC_LSE_OFF 0x00000000U
-#define RCC_LSE_ON RCC_BDCR_LSEON
-#define RCC_LSE_BYPASS ((uint32_t)(RCC_BDCR_LSEBYP | RCC_BDCR_LSEON))
-/**
- * @}
- */
-
-/** @defgroup RCC_HSI_Config HSI Config
- * @{
- */
-#define RCC_HSI_OFF ((uint8_t)0x00)
-#define RCC_HSI_ON ((uint8_t)0x01)
-
-#define RCC_HSICALIBRATION_DEFAULT 0x10U /* Default HSI calibration trimming value */
-/**
- * @}
- */
-
-/** @defgroup RCC_LSI_Config LSI Config
- * @{
- */
-#define RCC_LSI_OFF ((uint8_t)0x00)
-#define RCC_LSI_ON ((uint8_t)0x01)
-/**
- * @}
- */
-
-/** @defgroup RCC_PLL_Config PLL Config
- * @{
- */
-#define RCC_PLL_NONE ((uint8_t)0x00)
-#define RCC_PLL_OFF ((uint8_t)0x01)
-#define RCC_PLL_ON ((uint8_t)0x02)
-/**
- * @}
- */
-
-/** @defgroup RCC_PLLP_Clock_Divider PLLP Clock Divider
- * @{
- */
-#define RCC_PLLP_DIV2 0x00000002U
-#define RCC_PLLP_DIV4 0x00000004U
-#define RCC_PLLP_DIV6 0x00000006U
-#define RCC_PLLP_DIV8 0x00000008U
-/**
- * @}
- */
-
-/** @defgroup RCC_PLL_Clock_Source PLL Clock Source
- * @{
- */
-#define RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI
-#define RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE
-/**
- * @}
- */
-
-/** @defgroup RCC_System_Clock_Type System Clock Type
- * @{
- */
-#define RCC_CLOCKTYPE_SYSCLK 0x00000001U
-#define RCC_CLOCKTYPE_HCLK 0x00000002U
-#define RCC_CLOCKTYPE_PCLK1 0x00000004U
-#define RCC_CLOCKTYPE_PCLK2 0x00000008U
-/**
- * @}
- */
-
-/** @defgroup RCC_System_Clock_Source System Clock Source
- * @note The RCC_SYSCLKSOURCE_PLLRCLK parameter is available only for
- * STM32F446xx devices.
- * @{
- */
-#define RCC_SYSCLKSOURCE_HSI RCC_CFGR_SW_HSI
-#define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_HSE
-#define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL
-#define RCC_SYSCLKSOURCE_PLLRCLK ((uint32_t)(RCC_CFGR_SW_0 | RCC_CFGR_SW_1))
-/**
- * @}
- */
-
-/** @defgroup RCC_System_Clock_Source_Status System Clock Source Status
- * @note The RCC_SYSCLKSOURCE_STATUS_PLLRCLK parameter is available only for
- * STM32F446xx devices.
- * @{
- */
-#define RCC_SYSCLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_PLLCLK RCC_CFGR_SWS_PLL /*!< PLL used as system clock */
-#define RCC_SYSCLKSOURCE_STATUS_PLLRCLK ((uint32_t)(RCC_CFGR_SWS_0 | RCC_CFGR_SWS_1)) /*!< PLLR used as system clock */
-/**
- * @}
- */
-
-/** @defgroup RCC_AHB_Clock_Source AHB Clock Source
- * @{
- */
-#define RCC_SYSCLK_DIV1 RCC_CFGR_HPRE_DIV1
-#define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2
-#define RCC_SYSCLK_DIV4 RCC_CFGR_HPRE_DIV4
-#define RCC_SYSCLK_DIV8 RCC_CFGR_HPRE_DIV8
-#define RCC_SYSCLK_DIV16 RCC_CFGR_HPRE_DIV16
-#define RCC_SYSCLK_DIV64 RCC_CFGR_HPRE_DIV64
-#define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128
-#define RCC_SYSCLK_DIV256 RCC_CFGR_HPRE_DIV256
-#define RCC_SYSCLK_DIV512 RCC_CFGR_HPRE_DIV512
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_APB2_Clock_Source APB1/APB2 Clock Source
- * @{
- */
-#define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1
-#define RCC_HCLK_DIV2 RCC_CFGR_PPRE1_DIV2
-#define RCC_HCLK_DIV4 RCC_CFGR_PPRE1_DIV4
-#define RCC_HCLK_DIV8 RCC_CFGR_PPRE1_DIV8
-#define RCC_HCLK_DIV16 RCC_CFGR_PPRE1_DIV16
-/**
- * @}
- */
-
-/** @defgroup RCC_RTC_Clock_Source RTC Clock Source
- * @{
- */
-#define RCC_RTCCLKSOURCE_NO_CLK 0x00000000U
-#define RCC_RTCCLKSOURCE_LSE 0x00000100U
-#define RCC_RTCCLKSOURCE_LSI 0x00000200U
-#define RCC_RTCCLKSOURCE_HSE_DIVX 0x00000300U
-#define RCC_RTCCLKSOURCE_HSE_DIV2 0x00020300U
-#define RCC_RTCCLKSOURCE_HSE_DIV3 0x00030300U
-#define RCC_RTCCLKSOURCE_HSE_DIV4 0x00040300U
-#define RCC_RTCCLKSOURCE_HSE_DIV5 0x00050300U
-#define RCC_RTCCLKSOURCE_HSE_DIV6 0x00060300U
-#define RCC_RTCCLKSOURCE_HSE_DIV7 0x00070300U
-#define RCC_RTCCLKSOURCE_HSE_DIV8 0x00080300U
-#define RCC_RTCCLKSOURCE_HSE_DIV9 0x00090300U
-#define RCC_RTCCLKSOURCE_HSE_DIV10 0x000A0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV11 0x000B0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV12 0x000C0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV13 0x000D0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV14 0x000E0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV15 0x000F0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV16 0x00100300U
-#define RCC_RTCCLKSOURCE_HSE_DIV17 0x00110300U
-#define RCC_RTCCLKSOURCE_HSE_DIV18 0x00120300U
-#define RCC_RTCCLKSOURCE_HSE_DIV19 0x00130300U
-#define RCC_RTCCLKSOURCE_HSE_DIV20 0x00140300U
-#define RCC_RTCCLKSOURCE_HSE_DIV21 0x00150300U
-#define RCC_RTCCLKSOURCE_HSE_DIV22 0x00160300U
-#define RCC_RTCCLKSOURCE_HSE_DIV23 0x00170300U
-#define RCC_RTCCLKSOURCE_HSE_DIV24 0x00180300U
-#define RCC_RTCCLKSOURCE_HSE_DIV25 0x00190300U
-#define RCC_RTCCLKSOURCE_HSE_DIV26 0x001A0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV27 0x001B0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV28 0x001C0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV29 0x001D0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV30 0x001E0300U
-#define RCC_RTCCLKSOURCE_HSE_DIV31 0x001F0300U
-/**
- * @}
- */
-
-/** @defgroup RCC_MCO_Index MCO Index
- * @{
- */
-#define RCC_MCO1 0x00000000U
-#define RCC_MCO2 0x00000001U
-/**
- * @}
- */
-
-/** @defgroup RCC_MCO1_Clock_Source MCO1 Clock Source
- * @{
- */
-#define RCC_MCO1SOURCE_HSI 0x00000000U
-#define RCC_MCO1SOURCE_LSE RCC_CFGR_MCO1_0
-#define RCC_MCO1SOURCE_HSE RCC_CFGR_MCO1_1
-#define RCC_MCO1SOURCE_PLLCLK RCC_CFGR_MCO1
-/**
- * @}
- */
-
-/** @defgroup RCC_MCOx_Clock_Prescaler MCOx Clock Prescaler
- * @{
- */
-#define RCC_MCODIV_1 0x00000000U
-#define RCC_MCODIV_2 RCC_CFGR_MCO1PRE_2
-#define RCC_MCODIV_3 ((uint32_t)RCC_CFGR_MCO1PRE_0 | RCC_CFGR_MCO1PRE_2)
-#define RCC_MCODIV_4 ((uint32_t)RCC_CFGR_MCO1PRE_1 | RCC_CFGR_MCO1PRE_2)
-#define RCC_MCODIV_5 RCC_CFGR_MCO1PRE
-/**
- * @}
- */
-
-/** @defgroup RCC_Interrupt Interrupts
- * @{
- */
-#define RCC_IT_LSIRDY ((uint8_t)0x01)
-#define RCC_IT_LSERDY ((uint8_t)0x02)
-#define RCC_IT_HSIRDY ((uint8_t)0x04)
-#define RCC_IT_HSERDY ((uint8_t)0x08)
-#define RCC_IT_PLLRDY ((uint8_t)0x10)
-#define RCC_IT_PLLI2SRDY ((uint8_t)0x20)
-#define RCC_IT_CSS ((uint8_t)0x80)
-/**
- * @}
- */
-
-/** @defgroup RCC_Flag Flags
- * Elements values convention: 0XXYYYYYb
- * - YYYYY : Flag position in the register
- * - 0XX : Register index
- * - 01: CR register
- * - 10: BDCR register
- * - 11: CSR register
- * @{
- */
-/* Flags in the CR register */
-#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
-#define RCC_FLAG_HSERDY ((uint8_t)0x31)
-#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
-#define RCC_FLAG_PLLI2SRDY ((uint8_t)0x3B)
-
-/* Flags in the BDCR register */
-#define RCC_FLAG_LSERDY ((uint8_t)0x41)
-
-/* Flags in the CSR register */
-#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
-#define RCC_FLAG_BORRST ((uint8_t)0x79)
-#define RCC_FLAG_PINRST ((uint8_t)0x7A)
-#define RCC_FLAG_PORRST ((uint8_t)0x7B)
-#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
-#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
-#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
-#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RCC_Exported_Macros RCC Exported Macros
- * @{
- */
-
-/** @defgroup RCC_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOA_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOB_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOH_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DMA1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DMA2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))
-#define __HAL_RCC_GPIOB_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))
-#define __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))
-#define __HAL_RCC_GPIOH_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))
-#define __HAL_RCC_DMA1_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA1EN))
-#define __HAL_RCC_DMA2_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2EN))
-/**
- * @}
- */
-
-/** @defgroup RCC_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOA_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
-#define __HAL_RCC_DMA1_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
-#define __HAL_RCC_DMA2_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
-
-#define __HAL_RCC_GPIOA_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
-#define __HAL_RCC_GPIOB_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
-#define __HAL_RCC_GPIOC_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
-#define __HAL_RCC_GPIOH_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
-#define __HAL_RCC_DMA1_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
-#define __HAL_RCC_DMA2_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_WWDG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_WWDGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_WWDGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_PWR_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_TIM5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM5EN))
-#define __HAL_RCC_WWDG_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_WWDGEN))
-#define __HAL_RCC_SPI2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))
-#define __HAL_RCC_USART2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART2EN))
-#define __HAL_RCC_I2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN))
-#define __HAL_RCC_I2C2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C2EN))
-#define __HAL_RCC_PWR_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_PWREN))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)
-#define __HAL_RCC_WWDG_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)
-#define __HAL_RCC_SPI2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)
-#define __HAL_RCC_USART2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)
-#define __HAL_RCC_I2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)
-#define __HAL_RCC_I2C2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)
-#define __HAL_RCC_PWR_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)
-
-#define __HAL_RCC_TIM5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)
-#define __HAL_RCC_WWDG_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)
-#define __HAL_RCC_SPI2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)
-#define __HAL_RCC_USART2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)
-#define __HAL_RCC_I2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)
-#define __HAL_RCC_I2C2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)
-#define __HAL_RCC_PWR_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCC_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SYSCFG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM9_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM9EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM11_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM11EN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_TIM1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN))
-#define __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
-#define __HAL_RCC_USART6_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
-#define __HAL_RCC_ADC1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN))
-#define __HAL_RCC_SPI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
-#define __HAL_RCC_SYSCFG_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SYSCFGEN))
-#define __HAL_RCC_TIM9_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM9EN))
-#define __HAL_RCC_TIM11_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM11EN))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)
-#define __HAL_RCC_USART1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
-#define __HAL_RCC_USART6_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)
-#define __HAL_RCC_ADC1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
-#define __HAL_RCC_SPI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
-#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)
-#define __HAL_RCC_TIM9_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)
-#define __HAL_RCC_TIM11_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)
-
-#define __HAL_RCC_TIM1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)
-#define __HAL_RCC_USART1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
-#define __HAL_RCC_USART6_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)
-#define __HAL_RCC_ADC1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
-#define __HAL_RCC_SPI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
-#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)
-#define __HAL_RCC_TIM9_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)
-#define __HAL_RCC_TIM11_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCC_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB1_FORCE_RESET() (RCC->AHB1RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_GPIOA_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOARST))
-#define __HAL_RCC_GPIOB_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOBRST))
-#define __HAL_RCC_GPIOC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOCRST))
-#define __HAL_RCC_GPIOH_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOHRST))
-#define __HAL_RCC_DMA1_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA1RST))
-#define __HAL_RCC_DMA2_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA2RST))
-
-#define __HAL_RCC_AHB1_RELEASE_RESET() (RCC->AHB1RSTR = 0x00U)
-#define __HAL_RCC_GPIOA_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOARST))
-#define __HAL_RCC_GPIOB_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOBRST))
-#define __HAL_RCC_GPIOC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOCRST))
-#define __HAL_RCC_GPIOH_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOHRST))
-#define __HAL_RCC_DMA1_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA1RST))
-#define __HAL_RCC_DMA2_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA2RST))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_TIM5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST))
-#define __HAL_RCC_WWDG_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST))
-#define __HAL_RCC_SPI2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_USART2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_I2C1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_PWR_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST))
-
-#define __HAL_RCC_APB1_RELEASE_RESET() (RCC->APB1RSTR = 0x00U)
-#define __HAL_RCC_TIM5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST))
-#define __HAL_RCC_WWDG_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_WWDGRST))
-#define __HAL_RCC_SPI2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI2RST))
-#define __HAL_RCC_USART2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART2RST))
-#define __HAL_RCC_I2C1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST))
-#define __HAL_RCC_I2C2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C2RST))
-#define __HAL_RCC_PWR_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_PWRRST))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_APB2_FORCE_RESET() (RCC->APB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_TIM1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM1RST))
-#define __HAL_RCC_USART1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_USART1RST))
-#define __HAL_RCC_USART6_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_USART6RST))
-#define __HAL_RCC_ADC_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_ADCRST))
-#define __HAL_RCC_SPI1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_SYSCFG_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SYSCFGRST))
-#define __HAL_RCC_TIM9_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM9RST))
-#define __HAL_RCC_TIM11_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM11RST))
-
-#define __HAL_RCC_APB2_RELEASE_RESET() (RCC->APB2RSTR = 0x00U)
-#define __HAL_RCC_TIM1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM1RST))
-#define __HAL_RCC_USART1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART1RST))
-#define __HAL_RCC_USART6_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART6RST))
-#define __HAL_RCC_ADC_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADCRST))
-#define __HAL_RCC_SPI1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI1RST))
-#define __HAL_RCC_SYSCFG_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SYSCFGRST))
-#define __HAL_RCC_TIM9_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM9RST))
-#define __HAL_RCC_TIM11_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM11RST))
-/**
- * @}
- */
-
-/** @defgroup RCC_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOALPEN))
-#define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOBLPEN))
-#define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOCLPEN))
-#define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOHLPEN))
-#define __HAL_RCC_DMA1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_DMA1LPEN))
-#define __HAL_RCC_DMA2_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_DMA2LPEN))
-
-#define __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOALPEN))
-#define __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOBLPEN))
-#define __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOCLPEN))
-#define __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOHLPEN))
-#define __HAL_RCC_DMA1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_DMA1LPEN))
-#define __HAL_RCC_DMA2_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_DMA2LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM5LPEN))
-#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_WWDGLPEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI2LPEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_USART2LPEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C1LPEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C2LPEN))
-#define __HAL_RCC_PWR_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_PWRLPEN))
-
-#define __HAL_RCC_TIM5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM5LPEN))
-#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_WWDGLPEN))
-#define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI2LPEN))
-#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART2LPEN))
-#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C1LPEN))
-#define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C2LPEN))
-#define __HAL_RCC_PWR_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_PWRLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCC_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM1LPEN))
-#define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_USART1LPEN))
-#define __HAL_RCC_USART6_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_USART6LPEN))
-#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC1LPEN))
-#define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI1LPEN))
-#define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SYSCFGLPEN))
-#define __HAL_RCC_TIM9_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM9LPEN))
-#define __HAL_RCC_TIM11_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM11LPEN))
-
-#define __HAL_RCC_TIM1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM1LPEN))
-#define __HAL_RCC_USART1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_USART1LPEN))
-#define __HAL_RCC_USART6_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_USART6LPEN))
-#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC1LPEN))
-#define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI1LPEN))
-#define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SYSCFGLPEN))
-#define __HAL_RCC_TIM9_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM9LPEN))
-#define __HAL_RCC_TIM11_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM11LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCC_HSI_Configuration HSI Configuration
- * @{
- */
-
-/** @brief Macros to enable or disable the Internal High Speed oscillator (HSI).
- * @note The HSI is stopped by hardware when entering STOP and STANDBY modes.
- * It is used (enabled by hardware) as system clock source after startup
- * from Reset, wake-up from STOP and STANDBY mode, or in case of failure
- * of the HSE used directly or indirectly as system clock (if the Clock
- * Security System CSS is enabled).
- * @note HSI can not be stopped if it is used as system clock source. In this case,
- * you have to select another source of the system clock then stop the HSI.
- * @note After enabling the HSI, the application software should wait on HSIRDY
- * flag to be set indicating that HSI clock is stable and can be used as
- * system clock source.
- * This parameter can be: ENABLE or DISABLE.
- * @note When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator
- * clock cycles.
- */
-#define __HAL_RCC_HSI_ENABLE() (*(__IO uint32_t *) RCC_CR_HSION_BB = ENABLE)
-#define __HAL_RCC_HSI_DISABLE() (*(__IO uint32_t *) RCC_CR_HSION_BB = DISABLE)
-
-/** @brief Macro to adjust the Internal High Speed oscillator (HSI) calibration value.
- * @note The calibration is used to compensate for the variations in voltage
- * and temperature that influence the frequency of the internal HSI RC.
- * @param __HSICalibrationValue__ specifies the calibration trimming value.
- * (default is RCC_HSICALIBRATION_DEFAULT).
- * This parameter must be a number between 0 and 0x1F.
- */
-#define __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(__HSICalibrationValue__) (MODIFY_REG(RCC->CR,\
- RCC_CR_HSITRIM, (uint32_t)(__HSICalibrationValue__) << RCC_CR_HSITRIM_Pos))
-/**
- * @}
- */
-
-/** @defgroup RCC_LSI_Configuration LSI Configuration
- * @{
- */
-
-/** @brief Macros to enable or disable the Internal Low Speed oscillator (LSI).
- * @note After enabling the LSI, the application software should wait on
- * LSIRDY flag to be set indicating that LSI clock is stable and can
- * be used to clock the IWDG and/or the RTC.
- * @note LSI can not be disabled if the IWDG is running.
- * @note When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator
- * clock cycles.
- */
-#define __HAL_RCC_LSI_ENABLE() (*(__IO uint32_t *) RCC_CSR_LSION_BB = ENABLE)
-#define __HAL_RCC_LSI_DISABLE() (*(__IO uint32_t *) RCC_CSR_LSION_BB = DISABLE)
-/**
- * @}
- */
-
-/** @defgroup RCC_HSE_Configuration HSE Configuration
- * @{
- */
-
-/**
- * @brief Macro to configure the External High Speed oscillator (HSE).
- * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not supported by this macro.
- * User should request a transition to HSE Off first and then HSE On or HSE Bypass.
- * @note After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application
- * software should wait on HSERDY flag to be set indicating that HSE clock
- * is stable and can be used to clock the PLL and/or system clock.
- * @note HSE state can not be changed if it is used directly or through the
- * PLL as system clock. In this case, you have to select another source
- * of the system clock then change the HSE state (ex. disable it).
- * @note The HSE is stopped by hardware when entering STOP and STANDBY modes.
- * @note This function reset the CSSON bit, so if the clock security system(CSS)
- * was previously enabled you have to enable it again after calling this
- * function.
- * @param __STATE__ specifies the new state of the HSE.
- * This parameter can be one of the following values:
- * @arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after
- * 6 HSE oscillator clock cycles.
- * @arg RCC_HSE_ON: turn ON the HSE oscillator.
- * @arg RCC_HSE_BYPASS: HSE oscillator bypassed with external clock.
- */
-#define __HAL_RCC_HSE_CONFIG(__STATE__) \
- do { \
- if ((__STATE__) == RCC_HSE_ON) \
- { \
- SET_BIT(RCC->CR, RCC_CR_HSEON); \
- } \
- else if ((__STATE__) == RCC_HSE_BYPASS) \
- { \
- SET_BIT(RCC->CR, RCC_CR_HSEBYP); \
- SET_BIT(RCC->CR, RCC_CR_HSEON); \
- } \
- else \
- { \
- CLEAR_BIT(RCC->CR, RCC_CR_HSEON); \
- CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); \
- } \
- } while(0U)
-/**
- * @}
- */
-
-/** @defgroup RCC_LSE_Configuration LSE Configuration
- * @{
- */
-
-/**
- * @brief Macro to configure the External Low Speed oscillator (LSE).
- * @note Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro.
- * User should request a transition to LSE Off first and then LSE On or LSE Bypass.
- * @note As the LSE is in the Backup domain and write access is denied to
- * this domain after reset, you have to enable write access using
- * HAL_PWR_EnableBkUpAccess() function before to configure the LSE
- * (to be done once after reset).
- * @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_BYPASS), the application
- * software should wait on LSERDY flag to be set indicating that LSE clock
- * is stable and can be used to clock the RTC.
- * @param __STATE__ specifies the new state of the LSE.
- * This parameter can be one of the following values:
- * @arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after
- * 6 LSE oscillator clock cycles.
- * @arg RCC_LSE_ON: turn ON the LSE oscillator.
- * @arg RCC_LSE_BYPASS: LSE oscillator bypassed with external clock.
- */
-#define __HAL_RCC_LSE_CONFIG(__STATE__) \
- do { \
- if((__STATE__) == RCC_LSE_ON) \
- { \
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
- } \
- else if((__STATE__) == RCC_LSE_BYPASS) \
- { \
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
- } \
- else \
- { \
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
- } \
- } while(0U)
-/**
- * @}
- */
-
-/** @defgroup RCC_Internal_RTC_Clock_Configuration RTC Clock Configuration
- * @{
- */
-
-/** @brief Macros to enable or disable the RTC clock.
- * @note These macros must be used only after the RTC clock source was selected.
- */
-#define __HAL_RCC_RTC_ENABLE() (*(__IO uint32_t *) RCC_BDCR_RTCEN_BB = ENABLE)
-#define __HAL_RCC_RTC_DISABLE() (*(__IO uint32_t *) RCC_BDCR_RTCEN_BB = DISABLE)
-
-/** @brief Macros to configure the RTC clock (RTCCLK).
- * @note As the RTC clock configuration bits are in the Backup domain and write
- * access is denied to this domain after reset, you have to enable write
- * access using the Power Backup Access macro before to configure
- * the RTC clock source (to be done once after reset).
- * @note Once the RTC clock is configured it can't be changed unless the
- * Backup domain is reset using __HAL_RCC_BackupReset_RELEASE() macro, or by
- * a Power On Reset (POR).
- * @param __RTCCLKSource__ specifies the RTC clock source.
- * This parameter can be one of the following values:
- * @arg @ref RCC_RTCCLKSOURCE_NO_CLK : No clock selected as RTC clock.
- * @arg @ref RCC_RTCCLKSOURCE_LSE : LSE selected as RTC clock.
- * @arg @ref RCC_RTCCLKSOURCE_LSI : LSI selected as RTC clock.
- * @arg @ref RCC_RTCCLKSOURCE_HSE_DIVX HSE divided by X selected as RTC clock (X can be retrieved thanks to @ref __HAL_RCC_GET_RTC_HSE_PRESCALER()
- * @note If the LSE or LSI is used as RTC clock source, the RTC continues to
- * work in STOP and STANDBY modes, and can be used as wake-up source.
- * However, when the HSE clock is used as RTC clock source, the RTC
- * cannot be used in STOP and STANDBY modes.
- * @note The maximum input clock frequency for RTC is 1MHz (when using HSE as
- * RTC clock source).
- */
-#define __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__) (((__RTCCLKSource__) & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL) ? \
- MODIFY_REG(RCC->CFGR, RCC_CFGR_RTCPRE, ((__RTCCLKSource__) & 0xFFFFCFFU)) : CLEAR_BIT(RCC->CFGR, RCC_CFGR_RTCPRE)
-
-#define __HAL_RCC_RTC_CONFIG(__RTCCLKSource__) do { __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__); \
- RCC->BDCR |= ((__RTCCLKSource__) & 0x00000FFFU); \
- } while(0U)
-
-/** @brief Macro to get the RTC clock source.
- * @retval The clock source can be one of the following values:
- * @arg @ref RCC_RTCCLKSOURCE_NO_CLK No clock selected as RTC clock
- * @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock
- * @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock
- * @arg @ref RCC_RTCCLKSOURCE_HSE_DIVX HSE divided by X selected as RTC clock (X can be retrieved thanks to @ref __HAL_RCC_GET_RTC_HSE_PRESCALER()
- */
-#define __HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL))
-
-/**
- * @brief Get the RTC and HSE clock divider (RTCPRE).
- * @retval Returned value can be one of the following values:
- * @arg @ref RCC_RTCCLKSOURCE_HSE_DIVX HSE divided by X selected as RTC clock (X can be retrieved thanks to @ref __HAL_RCC_GET_RTC_HSE_PRESCALER()
- */
-#define __HAL_RCC_GET_RTC_HSE_PRESCALER() (READ_BIT(RCC->CFGR, RCC_CFGR_RTCPRE) | RCC_BDCR_RTCSEL)
-
-/** @brief Macros to force or release the Backup domain reset.
- * @note This function resets the RTC peripheral (including the backup registers)
- * and the RTC clock source selection in RCC_CSR register.
- * @note The BKPSRAM is not affected by this reset.
- */
-#define __HAL_RCC_BACKUPRESET_FORCE() (*(__IO uint32_t *) RCC_BDCR_BDRST_BB = ENABLE)
-#define __HAL_RCC_BACKUPRESET_RELEASE() (*(__IO uint32_t *) RCC_BDCR_BDRST_BB = DISABLE)
-/**
- * @}
- */
-
-/** @defgroup RCC_PLL_Configuration PLL Configuration
- * @{
- */
-
-/** @brief Macros to enable or disable the main PLL.
- * @note After enabling the main PLL, the application software should wait on
- * PLLRDY flag to be set indicating that PLL clock is stable and can
- * be used as system clock source.
- * @note The main PLL can not be disabled if it is used as system clock source
- * @note The main PLL is disabled by hardware when entering STOP and STANDBY modes.
- */
-#define __HAL_RCC_PLL_ENABLE() (*(__IO uint32_t *) RCC_CR_PLLON_BB = ENABLE)
-#define __HAL_RCC_PLL_DISABLE() (*(__IO uint32_t *) RCC_CR_PLLON_BB = DISABLE)
-
-/** @brief Macro to configure the PLL clock source.
- * @note This function must be used only when the main PLL is disabled.
- * @param __PLLSOURCE__ specifies the PLL entry clock source.
- * This parameter can be one of the following values:
- * @arg RCC_PLLSOURCE_HSI: HSI oscillator clock selected as PLL clock entry
- * @arg RCC_PLLSOURCE_HSE: HSE oscillator clock selected as PLL clock entry
- *
- */
-#define __HAL_RCC_PLL_PLLSOURCE_CONFIG(__PLLSOURCE__) MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__))
-
-/** @brief Macro to configure the PLL multiplication factor.
- * @note This function must be used only when the main PLL is disabled.
- * @param __PLLM__ specifies the division factor for PLL VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 2 MHz to limit PLL jitter.
- *
- */
-#define __HAL_RCC_PLL_PLLM_CONFIG(__PLLM__) MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, (__PLLM__))
-/**
- * @}
- */
-
-/** @defgroup RCC_Get_Clock_source Get Clock source
- * @{
- */
-/**
- * @brief Macro to configure the system clock source.
- * @param __RCC_SYSCLKSOURCE__ specifies the system clock source.
- * This parameter can be one of the following values:
- * - RCC_SYSCLKSOURCE_HSI: HSI oscillator is used as system clock source.
- * - RCC_SYSCLKSOURCE_HSE: HSE oscillator is used as system clock source.
- * - RCC_SYSCLKSOURCE_PLLCLK: PLL output is used as system clock source.
- * - RCC_SYSCLKSOURCE_PLLRCLK: PLLR output is used as system clock source. This
- * parameter is available only for STM32F446xx devices.
- */
-#define __HAL_RCC_SYSCLK_CONFIG(__RCC_SYSCLKSOURCE__) MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__RCC_SYSCLKSOURCE__))
-
-/** @brief Macro to get the clock source used as system clock.
- * @retval The clock source used as system clock. The returned value can be one
- * of the following:
- * - RCC_SYSCLKSOURCE_STATUS_HSI: HSI used as system clock.
- * - RCC_SYSCLKSOURCE_STATUS_HSE: HSE used as system clock.
- * - RCC_SYSCLKSOURCE_STATUS_PLLCLK: PLL used as system clock.
- * - RCC_SYSCLKSOURCE_STATUS_PLLRCLK: PLLR used as system clock. This parameter
- * is available only for STM32F446xx devices.
- */
-#define __HAL_RCC_GET_SYSCLK_SOURCE() (RCC->CFGR & RCC_CFGR_SWS)
-
-/** @brief Macro to get the oscillator used as PLL clock source.
- * @retval The oscillator used as PLL clock source. The returned value can be one
- * of the following:
- * - RCC_PLLSOURCE_HSI: HSI oscillator is used as PLL clock source.
- * - RCC_PLLSOURCE_HSE: HSE oscillator is used as PLL clock source.
- */
-#define __HAL_RCC_GET_PLL_OSCSOURCE() ((uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_MCOx_Clock_Config RCC Extended MCOx Clock Config
- * @{
- */
-
-/** @brief Macro to configure the MCO1 clock.
- * @param __MCOCLKSOURCE__ specifies the MCO clock source.
- * This parameter can be one of the following values:
- * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
- * @param __MCODIV__ specifies the MCO clock prescaler.
- * This parameter can be one of the following values:
- * @arg RCC_MCODIV_1: no division applied to MCOx clock
- * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
- * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
- * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
- * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
- */
-#define __HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__) \
- MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
-
-/** @brief Macro to configure the MCO2 clock.
- * @param __MCOCLKSOURCE__ specifies the MCO clock source.
- * This parameter can be one of the following values:
- * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
- * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for all STM32F4 devices except STM32F410xx
- * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for STM32F410Rx devices
- * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
- * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
- * @param __MCODIV__ specifies the MCO clock prescaler.
- * This parameter can be one of the following values:
- * @arg RCC_MCODIV_1: no division applied to MCOx clock
- * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
- * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
- * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
- * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
- * @note For STM32F410Rx devices, to output I2SCLK clock on MCO2, you should have
- * at least one of the SPI clocks enabled (SPI1, SPI2 or SPI5).
- */
-#define __HAL_RCC_MCO2_CONFIG(__MCOCLKSOURCE__, __MCODIV__) \
- MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3U)));
-/**
- * @}
- */
-
-/** @defgroup RCC_Flags_Interrupts_Management Flags Interrupts Management
- * @brief macros to manage the specified RCC Flags and interrupts.
- * @{
- */
-
-/** @brief Enable RCC interrupt (Perform Byte access to RCC_CIR[14:8] bits to enable
- * the selected interrupts).
- * @param __INTERRUPT__ specifies the RCC interrupt sources to be enabled.
- * This parameter can be any combination of the following values:
- * @arg RCC_IT_LSIRDY: LSI ready interrupt.
- * @arg RCC_IT_LSERDY: LSE ready interrupt.
- * @arg RCC_IT_HSIRDY: HSI ready interrupt.
- * @arg RCC_IT_HSERDY: HSE ready interrupt.
- * @arg RCC_IT_PLLRDY: Main PLL ready interrupt.
- * @arg RCC_IT_PLLI2SRDY: PLLI2S ready interrupt.
- */
-#define __HAL_RCC_ENABLE_IT(__INTERRUPT__) (*(__IO uint8_t *) RCC_CIR_BYTE1_ADDRESS |= (__INTERRUPT__))
-
-/** @brief Disable RCC interrupt (Perform Byte access to RCC_CIR[14:8] bits to disable
- * the selected interrupts).
- * @param __INTERRUPT__ specifies the RCC interrupt sources to be disabled.
- * This parameter can be any combination of the following values:
- * @arg RCC_IT_LSIRDY: LSI ready interrupt.
- * @arg RCC_IT_LSERDY: LSE ready interrupt.
- * @arg RCC_IT_HSIRDY: HSI ready interrupt.
- * @arg RCC_IT_HSERDY: HSE ready interrupt.
- * @arg RCC_IT_PLLRDY: Main PLL ready interrupt.
- * @arg RCC_IT_PLLI2SRDY: PLLI2S ready interrupt.
- */
-#define __HAL_RCC_DISABLE_IT(__INTERRUPT__) (*(__IO uint8_t *) RCC_CIR_BYTE1_ADDRESS &= (uint8_t)(~(__INTERRUPT__)))
-
-/** @brief Clear the RCC's interrupt pending bits (Perform Byte access to RCC_CIR[23:16]
- * bits to clear the selected interrupt pending bits.
- * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
- * This parameter can be any combination of the following values:
- * @arg RCC_IT_LSIRDY: LSI ready interrupt.
- * @arg RCC_IT_LSERDY: LSE ready interrupt.
- * @arg RCC_IT_HSIRDY: HSI ready interrupt.
- * @arg RCC_IT_HSERDY: HSE ready interrupt.
- * @arg RCC_IT_PLLRDY: Main PLL ready interrupt.
- * @arg RCC_IT_PLLI2SRDY: PLLI2S ready interrupt.
- * @arg RCC_IT_CSS: Clock Security System interrupt
- */
-#define __HAL_RCC_CLEAR_IT(__INTERRUPT__) (*(__IO uint8_t *) RCC_CIR_BYTE2_ADDRESS = (__INTERRUPT__))
-
-/** @brief Check the RCC's interrupt has occurred or not.
- * @param __INTERRUPT__ specifies the RCC interrupt source to check.
- * This parameter can be one of the following values:
- * @arg RCC_IT_LSIRDY: LSI ready interrupt.
- * @arg RCC_IT_LSERDY: LSE ready interrupt.
- * @arg RCC_IT_HSIRDY: HSI ready interrupt.
- * @arg RCC_IT_HSERDY: HSE ready interrupt.
- * @arg RCC_IT_PLLRDY: Main PLL ready interrupt.
- * @arg RCC_IT_PLLI2SRDY: PLLI2S ready interrupt.
- * @arg RCC_IT_CSS: Clock Security System interrupt
- * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
- */
-#define __HAL_RCC_GET_IT(__INTERRUPT__) ((RCC->CIR & (__INTERRUPT__)) == (__INTERRUPT__))
-
-/** @brief Set RMVF bit to clear the reset flags: RCC_FLAG_PINRST, RCC_FLAG_PORRST,
- * RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST and RCC_FLAG_LPWRRST.
- */
-#define __HAL_RCC_CLEAR_RESET_FLAGS() (RCC->CSR |= RCC_CSR_RMVF)
-
-/** @brief Check RCC flag is set or not.
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be one of the following values:
- * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready.
- * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready.
- * @arg RCC_FLAG_PLLRDY: Main PLL clock ready.
- * @arg RCC_FLAG_PLLI2SRDY: PLLI2S clock ready.
- * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready.
- * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready.
- * @arg RCC_FLAG_BORRST: POR/PDR or BOR reset.
- * @arg RCC_FLAG_PINRST: Pin reset.
- * @arg RCC_FLAG_PORRST: POR/PDR reset.
- * @arg RCC_FLAG_SFTRST: Software reset.
- * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset.
- * @arg RCC_FLAG_WWDGRST: Window Watchdog reset.
- * @arg RCC_FLAG_LPWRRST: Low Power reset.
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define RCC_FLAG_MASK ((uint8_t)0x1FU)
-#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((__FLAG__) >> 5U) == 1U)? RCC->CR :((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR :((((__FLAG__) >> 5U) == 3U)? RCC->CSR :RCC->CIR))) & (1U << ((__FLAG__) & RCC_FLAG_MASK)))!= 0U)? 1U : 0U)
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
- /** @addtogroup RCC_Exported_Functions
- * @{
- */
-
-/** @addtogroup RCC_Exported_Functions_Group1
- * @{
- */
-/* Initialization and de-initialization functions ******************************/
-HAL_StatusTypeDef HAL_RCC_DeInit(void);
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct);
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency);
-/**
- * @}
- */
-
-/** @addtogroup RCC_Exported_Functions_Group2
- * @{
- */
-/* Peripheral Control functions ************************************************/
-void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv);
-void HAL_RCC_EnableCSS(void);
-void HAL_RCC_DisableCSS(void);
-uint32_t HAL_RCC_GetSysClockFreq(void);
-uint32_t HAL_RCC_GetHCLKFreq(void);
-uint32_t HAL_RCC_GetPCLK1Freq(void);
-uint32_t HAL_RCC_GetPCLK2Freq(void);
-void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct);
-void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency);
-
-/* CSS NMI IRQ handler */
-void HAL_RCC_NMI_IRQHandler(void);
-
-/* User Callbacks in non blocking mode (IT mode) */
-void HAL_RCC_CSSCallback(void);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RCC_Private_Constants RCC Private Constants
- * @{
- */
-
-/** @defgroup RCC_BitAddress_AliasRegion RCC BitAddress AliasRegion
- * @brief RCC registers bit address in the alias region
- * @{
- */
-#define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
-/* --- CR Register --- */
-/* Alias word address of HSION bit */
-#define RCC_CR_OFFSET (RCC_OFFSET + 0x00U)
-#define RCC_HSION_BIT_NUMBER 0x00U
-#define RCC_CR_HSION_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U))
-/* Alias word address of CSSON bit */
-#define RCC_CSSON_BIT_NUMBER 0x13U
-#define RCC_CR_CSSON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))
-/* Alias word address of PLLON bit */
-#define RCC_PLLON_BIT_NUMBER 0x18U
-#define RCC_CR_PLLON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))
-
-/* --- BDCR Register --- */
-/* Alias word address of RTCEN bit */
-#define RCC_BDCR_OFFSET (RCC_OFFSET + 0x70U)
-#define RCC_RTCEN_BIT_NUMBER 0x0FU
-#define RCC_BDCR_RTCEN_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))
-/* Alias word address of BDRST bit */
-#define RCC_BDRST_BIT_NUMBER 0x10U
-#define RCC_BDCR_BDRST_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))
-
-/* --- CSR Register --- */
-/* Alias word address of LSION bit */
-#define RCC_CSR_OFFSET (RCC_OFFSET + 0x74U)
-#define RCC_LSION_BIT_NUMBER 0x00U
-#define RCC_CSR_LSION_BB (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U))
-
-/* CR register byte 3 (Bits[23:16]) base address */
-#define RCC_CR_BYTE2_ADDRESS 0x40023802U
-
-/* CIR register byte 2 (Bits[15:8]) base address */
-#define RCC_CIR_BYTE1_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x01U))
-
-/* CIR register byte 3 (Bits[23:16]) base address */
-#define RCC_CIR_BYTE2_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x02U))
-
-/* BDCR register base address */
-#define RCC_BDCR_BYTE0_ADDRESS (PERIPH_BASE + RCC_BDCR_OFFSET)
-
-#define RCC_DBP_TIMEOUT_VALUE 2U
-#define RCC_LSE_TIMEOUT_VALUE LSE_STARTUP_TIMEOUT
-
-#define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
-#define HSI_TIMEOUT_VALUE 2U /* 2 ms */
-#define LSI_TIMEOUT_VALUE 2U /* 2 ms */
-#define CLOCKSWITCH_TIMEOUT_VALUE 5000U /* 5 s */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup RCC_Private_Macros RCC Private Macros
- * @{
- */
-
-/** @defgroup RCC_IS_RCC_Definitions RCC Private macros to check input parameters
- * @{
- */
-#define IS_RCC_OSCILLATORTYPE(OSCILLATOR) ((OSCILLATOR) <= 15U)
-
-#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
- ((HSE) == RCC_HSE_BYPASS))
-
-#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
- ((LSE) == RCC_LSE_BYPASS))
-
-#define IS_RCC_HSI(HSI) (((HSI) == RCC_HSI_OFF) || ((HSI) == RCC_HSI_ON))
-
-#define IS_RCC_LSI(LSI) (((LSI) == RCC_LSI_OFF) || ((LSI) == RCC_LSI_ON))
-
-#define IS_RCC_PLL(PLL) (((PLL) == RCC_PLL_NONE) ||((PLL) == RCC_PLL_OFF) || ((PLL) == RCC_PLL_ON))
-
-#define IS_RCC_PLLSOURCE(SOURCE) (((SOURCE) == RCC_PLLSOURCE_HSI) || \
- ((SOURCE) == RCC_PLLSOURCE_HSE))
-
-#define IS_RCC_SYSCLKSOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSOURCE_HSI) || \
- ((SOURCE) == RCC_SYSCLKSOURCE_HSE) || \
- ((SOURCE) == RCC_SYSCLKSOURCE_PLLCLK) || \
- ((SOURCE) == RCC_SYSCLKSOURCE_PLLRCLK))
-
-#define IS_RCC_RTCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RTCCLKSOURCE_LSE) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV2) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV3) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV4) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV5) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV6) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV7) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV8) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV9) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV10) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV11) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV12) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV13) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV14) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV15) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV16) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV17) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV18) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV19) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV20) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV21) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV22) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV23) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV24) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV25) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV26) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV27) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV28) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV29) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV30) || \
- ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV31))
-
-#define IS_RCC_PLLM_VALUE(VALUE) ((VALUE) <= 63U)
-
-#define IS_RCC_PLLP_VALUE(VALUE) (((VALUE) == 2U) || ((VALUE) == 4U) || ((VALUE) == 6U) || ((VALUE) == 8U))
-
-#define IS_RCC_PLLQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U))
-
-#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_DIV1) || ((HCLK) == RCC_SYSCLK_DIV2) || \
- ((HCLK) == RCC_SYSCLK_DIV4) || ((HCLK) == RCC_SYSCLK_DIV8) || \
- ((HCLK) == RCC_SYSCLK_DIV16) || ((HCLK) == RCC_SYSCLK_DIV64) || \
- ((HCLK) == RCC_SYSCLK_DIV128) || ((HCLK) == RCC_SYSCLK_DIV256) || \
- ((HCLK) == RCC_SYSCLK_DIV512))
-
-#define IS_RCC_CLOCKTYPE(CLK) ((1U <= (CLK)) && ((CLK) <= 15U))
-
-#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_DIV1) || ((PCLK) == RCC_HCLK_DIV2) || \
- ((PCLK) == RCC_HCLK_DIV4) || ((PCLK) == RCC_HCLK_DIV8) || \
- ((PCLK) == RCC_HCLK_DIV16))
-
-#define IS_RCC_MCO(MCOx) (((MCOx) == RCC_MCO1) || ((MCOx) == RCC_MCO2))
-
-#define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1SOURCE_HSI) || ((SOURCE) == RCC_MCO1SOURCE_LSE) || \
- ((SOURCE) == RCC_MCO1SOURCE_HSE) || ((SOURCE) == RCC_MCO1SOURCE_PLLCLK))
-
-#define IS_RCC_MCODIV(DIV) (((DIV) == RCC_MCODIV_1) || ((DIV) == RCC_MCODIV_2) || \
- ((DIV) == RCC_MCODIV_3) || ((DIV) == RCC_MCODIV_4) || \
- ((DIV) == RCC_MCODIV_5))
-#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1FU)
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_RCC_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h
deleted file mode 100644
index 1ac56e11a750cd0bf8b3b1c719259c6834e90181..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h
+++ /dev/null
@@ -1,7111 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_rcc_ex.h
- * @author MCD Application Team
- * @brief Header file of RCC HAL Extension module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_RCC_EX_H
-#define __STM32F4xx_HAL_RCC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup RCCEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Types RCCEx Exported Types
- * @{
- */
-
-/**
- * @brief RCC PLL configuration structure definition
- */
-typedef struct
-{
- uint32_t PLLState; /*!< The new state of the PLL.
- This parameter can be a value of @ref RCC_PLL_Config */
-
- uint32_t PLLSource; /*!< RCC_PLLSource: PLL entry clock source.
- This parameter must be a value of @ref RCC_PLL_Clock_Source */
-
- uint32_t PLLM; /*!< PLLM: Division factor for PLL VCO input clock.
- This parameter must be a number between Min_Data = 0 and Max_Data = 63 */
-
- uint32_t PLLN; /*!< PLLN: Multiplication factor for PLL VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432
- except for STM32F411xE devices where the Min_Data = 192 */
-
- uint32_t PLLP; /*!< PLLP: Division factor for main system clock (SYSCLK).
- This parameter must be a value of @ref RCC_PLLP_Clock_Divider */
-
- uint32_t PLLQ; /*!< PLLQ: Division factor for OTG FS, SDIO and RNG clocks.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15 */
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
- uint32_t PLLR; /*!< PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks.
- This parameter is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx
- and STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F413xx/STM32F423xx devices.
- This parameter must be a number between Min_Data = 2 and Max_Data = 7 */
-#endif /* STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-}RCC_PLLInitTypeDef;
-
-#if defined(STM32F446xx)
-/**
- * @brief PLLI2S Clock structure definition
- */
-typedef struct
-{
- uint32_t PLLI2SM; /*!< Specifies division factor for PLL VCO input clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 63 */
-
- uint32_t PLLI2SN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432 */
-
- uint32_t PLLI2SP; /*!< Specifies division factor for SPDIFRX Clock.
- This parameter must be a value of @ref RCCEx_PLLI2SP_Clock_Divider */
-
- uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-
- uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S */
-}RCC_PLLI2SInitTypeDef;
-
-/**
- * @brief PLLSAI Clock structure definition
- */
-typedef struct
-{
- uint32_t PLLSAIM; /*!< Specifies division factor for PLL VCO input clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 63 */
-
- uint32_t PLLSAIN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432 */
-
- uint32_t PLLSAIP; /*!< Specifies division factor for OTG FS, SDIO and RNG clocks.
- This parameter must be a value of @ref RCCEx_PLLSAIP_Clock_Divider */
-
- uint32_t PLLSAIQ; /*!< Specifies the division factor for SAI clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- This parameter will be used only when PLLSAI is selected as Clock Source SAI */
-}RCC_PLLSAIInitTypeDef;
-
-/**
- * @brief RCC extended clocks structure definition
- */
-typedef struct
-{
- uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
- This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
- RCC_PLLI2SInitTypeDef PLLI2S; /*!< PLL I2S structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- RCC_PLLSAIInitTypeDef PLLSAI; /*!< PLL SAI structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source SAI or LTDC */
-
- uint32_t PLLI2SDivQ; /*!< Specifies the PLLI2S division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-
- uint32_t PLLSAIDivQ; /*!< Specifies the PLLI2S division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLLSAI is selected as Clock Source SAI */
-
- uint32_t Sai1ClockSelection; /*!< Specifies SAI1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SAI1_Clock_Source */
-
- uint32_t Sai2ClockSelection; /*!< Specifies SAI2 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SAI2_Clock_Source */
-
- uint32_t I2sApb1ClockSelection; /*!< Specifies I2S APB1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_I2SAPB1_Clock_Source */
-
- uint32_t I2sApb2ClockSelection; /*!< Specifies I2S APB2 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_I2SAPB2_Clock_Source */
-
- uint32_t RTCClockSelection; /*!< Specifies RTC Clock Source Selection.
- This parameter can be a value of @ref RCC_RTC_Clock_Source */
-
- uint32_t SdioClockSelection; /*!< Specifies SDIO Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SDIO_Clock_Source */
-
- uint32_t CecClockSelection; /*!< Specifies CEC Clock Source Selection.
- This parameter can be a value of @ref RCCEx_CEC_Clock_Source */
-
- uint32_t Fmpi2c1ClockSelection; /*!< Specifies FMPI2C1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_FMPI2C1_Clock_Source */
-
- uint32_t SpdifClockSelection; /*!< Specifies SPDIFRX Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SPDIFRX_Clock_Source */
-
- uint32_t Clk48ClockSelection; /*!< Specifies CLK48 Clock Selection this clock used OTG FS, SDIO and RNG clocks.
- This parameter can be a value of @ref RCCEx_CLK48_Clock_Source */
-
- uint8_t TIMPresSelection; /*!< Specifies TIM Clock Source Selection.
- This parameter can be a value of @ref RCCEx_TIM_PRescaler_Selection */
-}RCC_PeriphCLKInitTypeDef;
-#endif /* STM32F446xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/**
- * @brief RCC extended clocks structure definition
- */
-typedef struct
-{
- uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
- This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
- uint32_t I2SClockSelection; /*!< Specifies RTC Clock Source Selection.
- This parameter can be a value of @ref RCCEx_I2S_APB_Clock_Source */
-
- uint32_t RTCClockSelection; /*!< Specifies RTC Clock Source Selection.
- This parameter can be a value of @ref RCC_RTC_Clock_Source */
-
- uint32_t Lptim1ClockSelection; /*!< Specifies LPTIM1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */
-
- uint32_t Fmpi2c1ClockSelection; /*!< Specifies FMPI2C1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_FMPI2C1_Clock_Source */
-
- uint8_t TIMPresSelection; /*!< Specifies TIM Clock Source Selection.
- This parameter can be a value of @ref RCCEx_TIM_PRescaler_Selection */
-}RCC_PeriphCLKInitTypeDef;
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief PLLI2S Clock structure definition
- */
-typedef struct
-{
- uint32_t PLLI2SM; /*!< Specifies division factor for PLL VCO input clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 63 */
-
- uint32_t PLLI2SN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432 */
-
- uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-
- uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S */
-}RCC_PLLI2SInitTypeDef;
-
-/**
- * @brief RCC extended clocks structure definition
- */
-typedef struct
-{
- uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
- This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
- RCC_PLLI2SInitTypeDef PLLI2S; /*!< PLL I2S structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- uint32_t PLLDivR; /*!< Specifies the PLL division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLL is selected as Clock Source SAI */
-
- uint32_t PLLI2SDivR; /*!< Specifies the PLLI2S division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-#endif /* STM32F413xx || STM32F423xx */
-
- uint32_t I2sApb1ClockSelection; /*!< Specifies I2S APB1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_I2SAPB1_Clock_Source */
-
- uint32_t I2sApb2ClockSelection; /*!< Specifies I2S APB2 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_I2SAPB2_Clock_Source */
-
- uint32_t RTCClockSelection; /*!< Specifies RTC Clock Source Selection.
- This parameter can be a value of @ref RCC_RTC_Clock_Source */
-
- uint32_t SdioClockSelection; /*!< Specifies SDIO Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SDIO_Clock_Source */
-
- uint32_t Fmpi2c1ClockSelection; /*!< Specifies FMPI2C1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_FMPI2C1_Clock_Source */
-
- uint32_t Clk48ClockSelection; /*!< Specifies CLK48 Clock Selection this clock used OTG FS, SDIO and RNG clocks.
- This parameter can be a value of @ref RCCEx_CLK48_Clock_Source */
-
- uint32_t Dfsdm1ClockSelection; /*!< Specifies DFSDM1 Clock Selection.
- This parameter can be a value of @ref RCCEx_DFSDM1_Kernel_Clock_Source */
-
- uint32_t Dfsdm1AudioClockSelection;/*!< Specifies DFSDM1 Audio Clock Selection.
- This parameter can be a value of @ref RCCEx_DFSDM1_Audio_Clock_Source */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- uint32_t Dfsdm2ClockSelection; /*!< Specifies DFSDM2 Clock Selection.
- This parameter can be a value of @ref RCCEx_DFSDM2_Kernel_Clock_Source */
-
- uint32_t Dfsdm2AudioClockSelection;/*!< Specifies DFSDM2 Audio Clock Selection.
- This parameter can be a value of @ref RCCEx_DFSDM2_Audio_Clock_Source */
-
- uint32_t Lptim1ClockSelection; /*!< Specifies LPTIM1 Clock Source Selection.
- This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */
-
- uint32_t SaiAClockSelection; /*!< Specifies SAI1_A Clock Prescalers Selection
- This parameter can be a value of @ref RCCEx_SAI1_BlockA_Clock_Source */
-
- uint32_t SaiBClockSelection; /*!< Specifies SAI1_B Clock Prescalers Selection
- This parameter can be a value of @ref RCCEx_SAI1_BlockB_Clock_Source */
-#endif /* STM32F413xx || STM32F423xx */
-
- uint32_t PLLI2SSelection; /*!< Specifies PLL I2S Clock Source Selection.
- This parameter can be a value of @ref RCCEx_PLL_I2S_Clock_Source */
-
- uint8_t TIMPresSelection; /*!< Specifies TIM Clock Source Selection.
- This parameter can be a value of @ref RCCEx_TIM_PRescaler_Selection */
-}RCC_PeriphCLKInitTypeDef;
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-
-/**
- * @brief PLLI2S Clock structure definition
- */
-typedef struct
-{
- uint32_t PLLI2SN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- uint32_t PLLI2SQ; /*!< Specifies the division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-}RCC_PLLI2SInitTypeDef;
-
-/**
- * @brief PLLSAI Clock structure definition
- */
-typedef struct
-{
- uint32_t PLLSAIN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- uint32_t PLLSAIP; /*!< Specifies division factor for OTG FS and SDIO clocks.
- This parameter is only available in STM32F469xx/STM32F479xx devices.
- This parameter must be a value of @ref RCCEx_PLLSAIP_Clock_Divider */
-#endif /* STM32F469xx || STM32F479xx */
-
- uint32_t PLLSAIQ; /*!< Specifies the division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC */
-
- uint32_t PLLSAIR; /*!< specifies the division factor for LTDC clock
- This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- This parameter will be used only when PLLSAI is selected as Clock Source LTDC */
-
-}RCC_PLLSAIInitTypeDef;
-
-/**
- * @brief RCC extended clocks structure definition
- */
-typedef struct
-{
- uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
- This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
- RCC_PLLI2SInitTypeDef PLLI2S; /*!< PLL I2S structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- RCC_PLLSAIInitTypeDef PLLSAI; /*!< PLL SAI structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source SAI or LTDC */
-
- uint32_t PLLI2SDivQ; /*!< Specifies the PLLI2S division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLLI2S is selected as Clock Source SAI */
-
- uint32_t PLLSAIDivQ; /*!< Specifies the PLLI2S division factor for SAI1 clock.
- This parameter must be a number between Min_Data = 1 and Max_Data = 32
- This parameter will be used only when PLLSAI is selected as Clock Source SAI */
-
- uint32_t PLLSAIDivR; /*!< Specifies the PLLSAI division factor for LTDC clock.
- This parameter must be one value of @ref RCCEx_PLLSAI_DIVR */
-
- uint32_t RTCClockSelection; /*!< Specifies RTC Clock Prescalers Selection.
- This parameter can be a value of @ref RCC_RTC_Clock_Source */
-
- uint8_t TIMPresSelection; /*!< Specifies TIM Clock Prescalers Selection.
- This parameter can be a value of @ref RCCEx_TIM_PRescaler_Selection */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- uint32_t Clk48ClockSelection; /*!< Specifies CLK48 Clock Selection this clock used OTG FS, SDIO and RNG clocks.
- This parameter can be a value of @ref RCCEx_CLK48_Clock_Source */
-
- uint32_t SdioClockSelection; /*!< Specifies SDIO Clock Source Selection.
- This parameter can be a value of @ref RCCEx_SDIO_Clock_Source */
-#endif /* STM32F469xx || STM32F479xx */
-}RCC_PeriphCLKInitTypeDef;
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-/**
- * @brief PLLI2S Clock structure definition
- */
-typedef struct
-{
-#if defined(STM32F411xE)
- uint32_t PLLI2SM; /*!< PLLM: Division factor for PLLI2S VCO input clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 62 */
-#endif /* STM32F411xE */
-
- uint32_t PLLI2SN; /*!< Specifies the multiplication factor for PLLI2S VCO output clock.
- This parameter must be a number between Min_Data = 50 and Max_Data = 432
- Except for STM32F411xE devices where the Min_Data = 192.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- uint32_t PLLI2SR; /*!< Specifies the division factor for I2S clock.
- This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
-}RCC_PLLI2SInitTypeDef;
-
-/**
- * @brief RCC extended clocks structure definition
- */
-typedef struct
-{
- uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
- This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
-
- RCC_PLLI2SInitTypeDef PLLI2S; /*!< PLL I2S structure parameters.
- This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI */
-
- uint32_t RTCClockSelection; /*!< Specifies RTC Clock Prescalers Selection.
- This parameter can be a value of @ref RCC_RTC_Clock_Source */
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
- uint8_t TIMPresSelection; /*!< Specifies TIM Clock Source Selection.
- This parameter can be a value of @ref RCCEx_TIM_PRescaler_Selection */
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
-}RCC_PeriphCLKInitTypeDef;
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants
- * @{
- */
-
-/** @defgroup RCCEx_Periph_Clock_Selection RCC Periph Clock Selection
- * @{
- */
-/* Peripheral Clock source for STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx */
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
-#define RCC_PERIPHCLK_I2S_APB1 0x00000001U
-#define RCC_PERIPHCLK_I2S_APB2 0x00000002U
-#define RCC_PERIPHCLK_TIM 0x00000004U
-#define RCC_PERIPHCLK_RTC 0x00000008U
-#define RCC_PERIPHCLK_FMPI2C1 0x00000010U
-#define RCC_PERIPHCLK_CLK48 0x00000020U
-#define RCC_PERIPHCLK_SDIO 0x00000040U
-#define RCC_PERIPHCLK_PLLI2S 0x00000080U
-#define RCC_PERIPHCLK_DFSDM1 0x00000100U
-#define RCC_PERIPHCLK_DFSDM1_AUDIO 0x00000200U
-#endif /* STM32F412Zx || STM32F412Vx) || STM32F412Rx || STM32F412Cx */
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define RCC_PERIPHCLK_DFSDM2 0x00000400U
-#define RCC_PERIPHCLK_DFSDM2_AUDIO 0x00000800U
-#define RCC_PERIPHCLK_LPTIM1 0x00001000U
-#define RCC_PERIPHCLK_SAIA 0x00002000U
-#define RCC_PERIPHCLK_SAIB 0x00004000U
-#endif /* STM32F413xx || STM32F423xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------- Peripheral Clock source for STM32F410xx ----------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define RCC_PERIPHCLK_I2S 0x00000001U
-#define RCC_PERIPHCLK_TIM 0x00000002U
-#define RCC_PERIPHCLK_RTC 0x00000004U
-#define RCC_PERIPHCLK_FMPI2C1 0x00000008U
-#define RCC_PERIPHCLK_LPTIM1 0x00000010U
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------- Peripheral Clock source for STM32F446xx ----------------*/
-#if defined(STM32F446xx)
-#define RCC_PERIPHCLK_I2S_APB1 0x00000001U
-#define RCC_PERIPHCLK_I2S_APB2 0x00000002U
-#define RCC_PERIPHCLK_SAI1 0x00000004U
-#define RCC_PERIPHCLK_SAI2 0x00000008U
-#define RCC_PERIPHCLK_TIM 0x00000010U
-#define RCC_PERIPHCLK_RTC 0x00000020U
-#define RCC_PERIPHCLK_CEC 0x00000040U
-#define RCC_PERIPHCLK_FMPI2C1 0x00000080U
-#define RCC_PERIPHCLK_CLK48 0x00000100U
-#define RCC_PERIPHCLK_SDIO 0x00000200U
-#define RCC_PERIPHCLK_SPDIFRX 0x00000400U
-#define RCC_PERIPHCLK_PLLI2S 0x00000800U
-#endif /* STM32F446xx */
-/*-----------------------------------------------------------------------------*/
-
-/*----------- Peripheral Clock source for STM32F469xx/STM32F479xx -------------*/
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define RCC_PERIPHCLK_I2S 0x00000001U
-#define RCC_PERIPHCLK_SAI_PLLI2S 0x00000002U
-#define RCC_PERIPHCLK_SAI_PLLSAI 0x00000004U
-#define RCC_PERIPHCLK_LTDC 0x00000008U
-#define RCC_PERIPHCLK_TIM 0x00000010U
-#define RCC_PERIPHCLK_RTC 0x00000020U
-#define RCC_PERIPHCLK_PLLI2S 0x00000040U
-#define RCC_PERIPHCLK_CLK48 0x00000080U
-#define RCC_PERIPHCLK_SDIO 0x00000100U
-#endif /* STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*-------- Peripheral Clock source for STM32F42xxx/STM32F43xxx ---------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
-#define RCC_PERIPHCLK_I2S 0x00000001U
-#define RCC_PERIPHCLK_SAI_PLLI2S 0x00000002U
-#define RCC_PERIPHCLK_SAI_PLLSAI 0x00000004U
-#define RCC_PERIPHCLK_LTDC 0x00000008U
-#define RCC_PERIPHCLK_TIM 0x00000010U
-#define RCC_PERIPHCLK_RTC 0x00000020U
-#define RCC_PERIPHCLK_PLLI2S 0x00000040U
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-/*----------------------------------------------------------------------------*/
-
-/*-------- Peripheral Clock source for STM32F40xxx/STM32F41xxx ---------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-#define RCC_PERIPHCLK_I2S 0x00000001U
-#define RCC_PERIPHCLK_RTC 0x00000002U
-#define RCC_PERIPHCLK_PLLI2S 0x00000004U
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-#define RCC_PERIPHCLK_TIM 0x00000008U
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
-/*----------------------------------------------------------------------------*/
-/**
- * @}
- */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
- defined(STM32F479xx)
-/** @defgroup RCCEx_I2S_Clock_Source I2S Clock Source
- * @{
- */
-#define RCC_I2SCLKSOURCE_PLLI2S 0x00000000U
-#define RCC_I2SCLKSOURCE_EXT 0x00000001U
-/**
- * @}
- */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
-
-/** @defgroup RCCEx_PLLSAI_DIVR RCC PLLSAI DIVR
- * @{
- */
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-#define RCC_PLLSAIDIVR_2 0x00000000U
-#define RCC_PLLSAIDIVR_4 0x00010000U
-#define RCC_PLLSAIDIVR_8 0x00020000U
-#define RCC_PLLSAIDIVR_16 0x00030000U
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_PLLI2SP_Clock_Divider RCC PLLI2SP Clock Divider
- * @{
- */
-#if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx)
-#define RCC_PLLI2SP_DIV2 0x00000002U
-#define RCC_PLLI2SP_DIV4 0x00000004U
-#define RCC_PLLI2SP_DIV6 0x00000006U
-#define RCC_PLLI2SP_DIV8 0x00000008U
-#endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_PLLSAIP_Clock_Divider RCC PLLSAIP Clock Divider
- * @{
- */
-#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define RCC_PLLSAIP_DIV2 0x00000002U
-#define RCC_PLLSAIP_DIV4 0x00000004U
-#define RCC_PLLSAIP_DIV6 0x00000006U
-#define RCC_PLLSAIP_DIV8 0x00000008U
-#endif /* STM32F446xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @defgroup RCCEx_SAI_BlockA_Clock_Source RCC SAI BlockA Clock Source
- * @{
- */
-#define RCC_SAIACLKSOURCE_PLLSAI 0x00000000U
-#define RCC_SAIACLKSOURCE_PLLI2S 0x00100000U
-#define RCC_SAIACLKSOURCE_EXT 0x00200000U
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SAI_BlockB_Clock_Source RCC SAI BlockB Clock Source
- * @{
- */
-#define RCC_SAIBCLKSOURCE_PLLSAI 0x00000000U
-#define RCC_SAIBCLKSOURCE_PLLI2S 0x00400000U
-#define RCC_SAIBCLKSOURCE_EXT 0x00800000U
-/**
- * @}
- */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-/** @defgroup RCCEx_CLK48_Clock_Source RCC CLK48 Clock Source
- * @{
- */
-#define RCC_CLK48CLKSOURCE_PLLQ 0x00000000U
-#define RCC_CLK48CLKSOURCE_PLLSAIP ((uint32_t)RCC_DCKCFGR_CK48MSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SDIO_Clock_Source RCC SDIO Clock Source
- * @{
- */
-#define RCC_SDIOCLKSOURCE_CLK48 0x00000000U
-#define RCC_SDIOCLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR_SDIOSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_DSI_Clock_Source RCC DSI Clock Source
- * @{
- */
-#define RCC_DSICLKSOURCE_DSIPHY 0x00000000U
-#define RCC_DSICLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_DSISEL)
-/**
- * @}
- */
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F446xx)
-/** @defgroup RCCEx_SAI1_Clock_Source RCC SAI1 Clock Source
- * @{
- */
-#define RCC_SAI1CLKSOURCE_PLLSAI 0x00000000U
-#define RCC_SAI1CLKSOURCE_PLLI2S ((uint32_t)RCC_DCKCFGR_SAI1SRC_0)
-#define RCC_SAI1CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_SAI1SRC_1)
-#define RCC_SAI1CLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_SAI1SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SAI2_Clock_Source RCC SAI2 Clock Source
- * @{
- */
-#define RCC_SAI2CLKSOURCE_PLLSAI 0x00000000U
-#define RCC_SAI2CLKSOURCE_PLLI2S ((uint32_t)RCC_DCKCFGR_SAI2SRC_0)
-#define RCC_SAI2CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_SAI2SRC_1)
-#define RCC_SAI2CLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_SAI2SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_I2SAPB1_Clock_Source RCC I2S APB1 Clock Source
- * @{
- */
-#define RCC_I2SAPB1CLKSOURCE_PLLI2S 0x00000000U
-#define RCC_I2SAPB1CLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_I2S1SRC_0)
-#define RCC_I2SAPB1CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_I2S1SRC_1)
-#define RCC_I2SAPB1CLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_I2S1SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_I2SAPB2_Clock_Source RCC I2S APB2 Clock Source
- * @{
- */
-#define RCC_I2SAPB2CLKSOURCE_PLLI2S 0x00000000U
-#define RCC_I2SAPB2CLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_I2S2SRC_0)
-#define RCC_I2SAPB2CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_I2S2SRC_1)
-#define RCC_I2SAPB2CLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_I2S2SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_FMPI2C1_Clock_Source RCC FMPI2C1 Clock Source
- * @{
- */
-#define RCC_FMPI2C1CLKSOURCE_PCLK1 0x00000000U
-#define RCC_FMPI2C1CLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_0)
-#define RCC_FMPI2C1CLKSOURCE_HSI ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_CEC_Clock_Source RCC CEC Clock Source
- * @{
- */
-#define RCC_CECCLKSOURCE_HSI 0x00000000U
-#define RCC_CECCLKSOURCE_LSE ((uint32_t)RCC_DCKCFGR2_CECSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_CLK48_Clock_Source RCC CLK48 Clock Source
- * @{
- */
-#define RCC_CLK48CLKSOURCE_PLLQ 0x00000000U
-#define RCC_CLK48CLKSOURCE_PLLSAIP ((uint32_t)RCC_DCKCFGR2_CK48MSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SDIO_Clock_Source RCC SDIO Clock Source
- * @{
- */
-#define RCC_SDIOCLKSOURCE_CLK48 0x00000000U
-#define RCC_SDIOCLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR2_SDIOSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SPDIFRX_Clock_Source RCC SPDIFRX Clock Source
- * @{
- */
-#define RCC_SPDIFRXCLKSOURCE_PLLR 0x00000000U
-#define RCC_SPDIFRXCLKSOURCE_PLLI2SP ((uint32_t)RCC_DCKCFGR2_SPDIFRXSEL)
-/**
- * @}
- */
-
-#endif /* STM32F446xx */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup RCCEx_SAI1_BlockA_Clock_Source RCC SAI BlockA Clock Source
- * @{
- */
-#define RCC_SAIACLKSOURCE_PLLI2SR 0x00000000U
-#define RCC_SAIACLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_SAI1ASRC_0)
-#define RCC_SAIACLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_SAI1ASRC_1)
-#define RCC_SAIACLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_SAI1ASRC_0 | RCC_DCKCFGR_SAI1ASRC_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SAI1_BlockB_Clock_Source RCC SAI BlockB Clock Source
- * @{
- */
-#define RCC_SAIBCLKSOURCE_PLLI2SR 0x00000000U
-#define RCC_SAIBCLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_SAI1BSRC_0)
-#define RCC_SAIBCLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_SAI1BSRC_1)
-#define RCC_SAIBCLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_SAI1BSRC_0 | RCC_DCKCFGR_SAI1BSRC_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_LPTIM1_Clock_Source RCC LPTIM1 Clock Source
- * @{
- */
-#define RCC_LPTIM1CLKSOURCE_PCLK1 0x00000000U
-#define RCC_LPTIM1CLKSOURCE_HSI ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_0)
-#define RCC_LPTIM1CLKSOURCE_LSI ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_1)
-#define RCC_LPTIM1CLKSOURCE_LSE ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_0 | RCC_DCKCFGR2_LPTIM1SEL_1)
-/**
- * @}
- */
-
-
-/** @defgroup RCCEx_DFSDM2_Audio_Clock_Source RCC DFSDM2 Audio Clock Source
- * @{
- */
-#define RCC_DFSDM2AUDIOCLKSOURCE_I2S1 0x00000000U
-#define RCC_DFSDM2AUDIOCLKSOURCE_I2S2 ((uint32_t)RCC_DCKCFGR_CKDFSDM2ASEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_DFSDM2_Kernel_Clock_Source RCC DFSDM2 Kernel Clock Source
- * @{
- */
-#define RCC_DFSDM2CLKSOURCE_PCLK2 0x00000000U
-#define RCC_DFSDM2CLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR_CKDFSDM1SEL)
-/**
- * @}
- */
-
-#endif /* STM32F413xx || STM32F423xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup RCCEx_PLL_I2S_Clock_Source PLL I2S Clock Source
- * @{
- */
-#define RCC_PLLI2SCLKSOURCE_PLLSRC 0x00000000U
-#define RCC_PLLI2SCLKSOURCE_EXT ((uint32_t)RCC_PLLI2SCFGR_PLLI2SSRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_DFSDM1_Audio_Clock_Source RCC DFSDM1 Audio Clock Source
- * @{
- */
-#define RCC_DFSDM1AUDIOCLKSOURCE_I2S1 0x00000000U
-#define RCC_DFSDM1AUDIOCLKSOURCE_I2S2 ((uint32_t)RCC_DCKCFGR_CKDFSDM1ASEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_DFSDM1_Kernel_Clock_Source RCC DFSDM1 Kernel Clock Source
- * @{
- */
-#define RCC_DFSDM1CLKSOURCE_PCLK2 0x00000000U
-#define RCC_DFSDM1CLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR_CKDFSDM1SEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_I2SAPB1_Clock_Source RCC I2S APB1 Clock Source
- * @{
- */
-#define RCC_I2SAPB1CLKSOURCE_PLLI2S 0x00000000U
-#define RCC_I2SAPB1CLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_I2S1SRC_0)
-#define RCC_I2SAPB1CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_I2S1SRC_1)
-#define RCC_I2SAPB1CLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_I2S1SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_I2SAPB2_Clock_Source RCC I2S APB2 Clock Source
- * @{
- */
-#define RCC_I2SAPB2CLKSOURCE_PLLI2S 0x00000000U
-#define RCC_I2SAPB2CLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_I2S2SRC_0)
-#define RCC_I2SAPB2CLKSOURCE_PLLR ((uint32_t)RCC_DCKCFGR_I2S2SRC_1)
-#define RCC_I2SAPB2CLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_I2S2SRC)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_FMPI2C1_Clock_Source RCC FMPI2C1 Clock Source
- * @{
- */
-#define RCC_FMPI2C1CLKSOURCE_PCLK1 0x00000000U
-#define RCC_FMPI2C1CLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_0)
-#define RCC_FMPI2C1CLKSOURCE_HSI ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_CLK48_Clock_Source RCC CLK48 Clock Source
- * @{
- */
-#define RCC_CLK48CLKSOURCE_PLLQ 0x00000000U
-#define RCC_CLK48CLKSOURCE_PLLI2SQ ((uint32_t)RCC_DCKCFGR2_CK48MSEL)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_SDIO_Clock_Source RCC SDIO Clock Source
- * @{
- */
-#define RCC_SDIOCLKSOURCE_CLK48 0x00000000U
-#define RCC_SDIOCLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR2_SDIOSEL)
-/**
- * @}
- */
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-
-/** @defgroup RCCEx_I2S_APB_Clock_Source RCC I2S APB Clock Source
- * @{
- */
-#define RCC_I2SAPBCLKSOURCE_PLLR 0x00000000U
-#define RCC_I2SAPBCLKSOURCE_EXT ((uint32_t)RCC_DCKCFGR_I2SSRC_0)
-#define RCC_I2SAPBCLKSOURCE_PLLSRC ((uint32_t)RCC_DCKCFGR_I2SSRC_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_FMPI2C1_Clock_Source RCC FMPI2C1 Clock Source
- * @{
- */
-#define RCC_FMPI2C1CLKSOURCE_PCLK1 0x00000000U
-#define RCC_FMPI2C1CLKSOURCE_SYSCLK ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_0)
-#define RCC_FMPI2C1CLKSOURCE_HSI ((uint32_t)RCC_DCKCFGR2_FMPI2C1SEL_1)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_LPTIM1_Clock_Source RCC LPTIM1 Clock Source
- * @{
- */
-#define RCC_LPTIM1CLKSOURCE_PCLK1 0x00000000U
-#define RCC_LPTIM1CLKSOURCE_HSI ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_0)
-#define RCC_LPTIM1CLKSOURCE_LSI ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_1)
-#define RCC_LPTIM1CLKSOURCE_LSE ((uint32_t)RCC_DCKCFGR2_LPTIM1SEL_0 | RCC_DCKCFGR2_LPTIM1SEL_1)
-/**
- * @}
- */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup RCCEx_TIM_PRescaler_Selection RCC TIM PRescaler Selection
- * @{
- */
-#define RCC_TIMPRES_DESACTIVATED ((uint8_t)0x00)
-#define RCC_TIMPRES_ACTIVATED ((uint8_t)0x01)
-/**
- * @}
- */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
- STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-/** @defgroup RCCEx_LSE_Dual_Mode_Selection RCC LSE Dual Mode Selection
- * @{
- */
-#define RCC_LSE_LOWPOWER_MODE ((uint8_t)0x00)
-#define RCC_LSE_HIGHDRIVE_MODE ((uint8_t)0x01)
-/**
- * @}
- */
-#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||\
- STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup RCC_MCO2_Clock_Source MCO2 Clock Source
- * @{
- */
-#define RCC_MCO2SOURCE_SYSCLK 0x00000000U
-#define RCC_MCO2SOURCE_PLLI2SCLK RCC_CFGR_MCO2_0
-#define RCC_MCO2SOURCE_HSE RCC_CFGR_MCO2_1
-#define RCC_MCO2SOURCE_PLLCLK RCC_CFGR_MCO2
-/**
- * @}
- */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
- STM32F412Rx || STM32F413xx | STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/** @defgroup RCC_MCO2_Clock_Source MCO2 Clock Source
- * @{
- */
-#define RCC_MCO2SOURCE_SYSCLK 0x00000000U
-#define RCC_MCO2SOURCE_I2SCLK RCC_CFGR_MCO2_0
-#define RCC_MCO2SOURCE_HSE RCC_CFGR_MCO2_1
-#define RCC_MCO2SOURCE_PLLCLK RCC_CFGR_MCO2
-/**
- * @}
- */
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros
- * @{
- */
-/*------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx --------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_BKPSRAM_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOJ_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOK_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DMA2D_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACTX_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACRX_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACPTP_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))
-#define __HAL_RCC_GPIOG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))
-#define __HAL_RCC_GPIOI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN))
-#define __HAL_RCC_GPIOJ_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOJEN))
-#define __HAL_RCC_GPIOK_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOKEN))
-#define __HAL_RCC_DMA2D_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2DEN))
-#define __HAL_RCC_ETHMAC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN))
-#define __HAL_RCC_ETHMACTX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN))
-#define __HAL_RCC_ETHMACRX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN))
-#define __HAL_RCC_ETHMACPTP_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))
-#define __HAL_RCC_BKPSRAM_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))
-#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-
-/**
- * @brief Enable ETHERNET clock.
- */
-#define __HAL_RCC_ETH_CLK_ENABLE() do { \
- __HAL_RCC_ETHMAC_CLK_ENABLE(); \
- __HAL_RCC_ETHMACTX_CLK_ENABLE(); \
- __HAL_RCC_ETHMACRX_CLK_ENABLE(); \
- } while(0U)
-/**
- * @brief Disable ETHERNET clock.
- */
-#define __HAL_RCC_ETH_CLK_DISABLE() do { \
- __HAL_RCC_ETHMACTX_CLK_DISABLE(); \
- __HAL_RCC_ETHMACRX_CLK_DISABLE(); \
- __HAL_RCC_ETHMAC_CLK_DISABLE(); \
- } while(0U)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)
-#define __HAL_RCC_GPIOI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET)
-#define __HAL_RCC_GPIOJ_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) != RESET)
-#define __HAL_RCC_GPIOK_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) != RESET)
-#define __HAL_RCC_DMA2D_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) != RESET)
-#define __HAL_RCC_ETHMAC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) != RESET)
-#define __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) != RESET)
-#define __HAL_RCC_ETHMACRX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) != RESET)
-#define __HAL_RCC_ETHMACPTP_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)
-#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-#define __HAL_RCC_ETH_IS_CLK_ENABLED() (__HAL_RCC_ETHMAC_IS_CLK_ENABLED() && \
- __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() && \
- __HAL_RCC_ETHMACRX_IS_CLK_ENABLED())
-
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)
-#define __HAL_RCC_GPIOI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET)
-#define __HAL_RCC_GPIOJ_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) == RESET)
-#define __HAL_RCC_GPIOK_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) == RESET)
-#define __HAL_RCC_DMA2D_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) == RESET)
-#define __HAL_RCC_ETHMAC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) == RESET)
-#define __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) == RESET)
-#define __HAL_RCC_ETHMACRX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) == RESET)
-#define __HAL_RCC_ETHMACPTP_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET)
-#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-#define __HAL_RCC_ETH_IS_CLK_DISABLED() (__HAL_RCC_ETHMAC_IS_CLK_DISABLED() && \
- __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() && \
- __HAL_RCC_ETHMACRX_IS_CLK_DISABLED())
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
- #define __HAL_RCC_DCMI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DCMI_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_DCMIEN))
-
-#if defined(STM32F437xx)|| defined(STM32F439xx) || defined(STM32F479xx)
-#define __HAL_RCC_CRYP_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_HASH_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_CRYP_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_CRYPEN))
-#define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
-#endif /* STM32F437xx || STM32F439xx || STM32F479xx */
-
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-
-#define __HAL_RCC_RNG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_DCMI_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) != RESET)
-#define __HAL_RCC_DCMI_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) == RESET)
-
-#if defined(STM32F437xx)|| defined(STM32F439xx) || defined(STM32F479xx)
-#define __HAL_RCC_CRYP_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_CRYPEN)) != RESET)
-#define __HAL_RCC_CRYP_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_CRYPEN)) == RESET)
-
-#define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) != RESET)
-#define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) == RESET)
-#endif /* STM32F437xx || STM32F439xx || STM32F479xx */
-
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-
-#define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FMC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_FMC_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_FMCEN))
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_QSPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_QSPI_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_QSPIEN))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-
-/** @defgroup RCCEx_AHB3_Peripheral_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FMC_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)
-#define __HAL_RCC_FMC_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_QSPI_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)
-#define __HAL_RCC_QSPI_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM12_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM13_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM14_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM14_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
-#define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
-#define __HAL_RCC_TIM14_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM14EN))
-#define __HAL_RCC_USART3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
-#define __HAL_RCC_UART4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
-#define __HAL_RCC_UART5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
-#define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
-#define __HAL_RCC_CAN2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN2EN))
-#define __HAL_RCC_DAC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))
-#define __HAL_RCC_UART7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART7EN))
-#define __HAL_RCC_UART8_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART8EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
-#define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
-#define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
-#define __HAL_RCC_TIM14_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)
-#define __HAL_RCC_USART3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
-#define __HAL_RCC_UART4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
-#define __HAL_RCC_UART5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
-#define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
-#define __HAL_RCC_CAN2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
-#define __HAL_RCC_UART7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) != RESET)
-#define __HAL_RCC_UART8_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) != RESET)
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
-#define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
-#define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
-#define __HAL_RCC_TIM14_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)
-#define __HAL_RCC_USART3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
-#define __HAL_RCC_UART4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
-#define __HAL_RCC_UART5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
-#define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
-#define __HAL_RCC_CAN2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
-#define __HAL_RCC_UART7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) == RESET)
-#define __HAL_RCC_UART8_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SAI1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-#define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
-#define __HAL_RCC_ADC2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))
-#define __HAL_RCC_ADC3_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC3EN))
-#define __HAL_RCC_SPI5_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI5EN))
-#define __HAL_RCC_SPI6_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI6EN))
-#define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
-
-#if defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_LTDC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_LTDC_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_LTDCEN))
-#endif /* STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_DSI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_DSI_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_DSIEN))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
-#define __HAL_RCC_ADC2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)
-#define __HAL_RCC_ADC3_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)
-#define __HAL_RCC_SPI5_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)
-#define __HAL_RCC_SPI6_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) != RESET)
-#define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN))!= RESET)
-
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN))== RESET)
-#define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
-#define __HAL_RCC_ADC2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)
-#define __HAL_RCC_ADC3_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)
-#define __HAL_RCC_SPI5_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)
-#define __HAL_RCC_SPI6_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) == RESET)
-#define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
-
-#if defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_LTDC_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_LTDCEN)) != RESET)
-#define __HAL_RCC_LTDC_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_LTDCEN)) == RESET)
-#endif /* STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_DSI_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DSIEN)) != RESET)
-#define __HAL_RCC_DSI_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DSIEN)) == RESET)
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_GPIOI_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOIRST))
-#define __HAL_RCC_ETHMAC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_ETHMACRST))
-#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_GPIOJ_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOJRST))
-#define __HAL_RCC_GPIOK_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOKRST))
-#define __HAL_RCC_DMA2D_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA2DRST))
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_GPIOI_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOIRST))
-#define __HAL_RCC_ETHMAC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_ETHMACRST))
-#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_GPIOJ_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOJRST))
-#define __HAL_RCC_GPIOK_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOKRST))
-#define __HAL_RCC_DMA2D_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA2DRST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_RNG_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_DCMI_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_DCMIRST))
-
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_RNG_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_DCMI_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_DCMIRST))
-
-#if defined(STM32F437xx)|| defined(STM32F439xx) || defined(STM32F479xx)
-#define __HAL_RCC_CRYP_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_CRYPRST))
-#define __HAL_RCC_HASH_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_HASHRST))
-
-#define __HAL_RCC_CRYP_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_CRYPRST))
-#define __HAL_RCC_HASH_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_HASHRST))
-#endif /* STM32F437xx || STM32F439xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-#define __HAL_RCC_FMC_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_FMCRST))
-#define __HAL_RCC_FMC_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_FMCRST))
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_QSPI_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_QSPIRST))
-#define __HAL_RCC_QSPI_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_QSPIRST))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_USART3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_CAN1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_UART7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART7RST))
-#define __HAL_RCC_UART8_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART8RST))
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_USART3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_CAN1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_UART7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART7RST))
-#define __HAL_RCC_UART8_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART8RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM8_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
-#define __HAL_RCC_SPI5_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI5RST))
-#define __HAL_RCC_SPI6_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI6RST))
-#define __HAL_RCC_SAI1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SAI1RST))
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET()(RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_TIM8_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
-#define __HAL_RCC_SPI5_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI5RST))
-#define __HAL_RCC_SPI6_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI6RST))
-#define __HAL_RCC_SAI1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SAI1RST))
-
-#if defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_LTDC_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_LTDCRST))
-#define __HAL_RCC_LTDC_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_LTDCRST))
-#endif /* STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_DSI_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_DSIRST))
-#define __HAL_RCC_DSI_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_DSIRST))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOILPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACLPEN))
-#define __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACTXLPEN))
-#define __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACRXLPEN))
-#define __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACPTPLPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOJLPEN))
-#define __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOKLPEN))
-#define __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM3LPEN))
-#define __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_DMA2DLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_BKPSRAMLPEN))
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOILPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACLPEN))
-#define __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACTXLPEN))
-#define __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACRXLPEN))
-#define __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACPTPLPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOJLPEN))
-#define __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOKLPEN))
-#define __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_DMA2DLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_BKPSRAMLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_RNGLPEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_RNGLPEN))
-
-#define __HAL_RCC_DCMI_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_DCMILPEN))
-#define __HAL_RCC_DCMI_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_DCMILPEN))
-
-#if defined(STM32F437xx)|| defined(STM32F439xx) || defined(STM32F479xx)
-#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_CRYPLPEN))
-#define __HAL_RCC_HASH_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_HASHLPEN))
-
-#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_CRYPLPEN))
-#define __HAL_RCC_HASH_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_HASHLPEN))
-#endif /* STM32F437xx || STM32F439xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_LowPower_Enable_Disable AHB3 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
-#define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FMCLPEN))
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
-#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_UART7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART7LPEN))
-#define __HAL_RCC_UART8_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART8LPEN))
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_UART7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART7LPEN))
-#define __HAL_RCC_UART8_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART8LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC3LPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI5LPEN))
-#define __HAL_RCC_SPI6_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI6LPEN))
-#define __HAL_RCC_SAI1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SAI1LPEN))
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE()(RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE()(RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC3LPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI5LPEN))
-#define __HAL_RCC_SPI6_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI6LPEN))
-#define __HAL_RCC_SAI1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SAI1LPEN))
-
-#if defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_LTDC_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_LTDCLPEN))
-
-#define __HAL_RCC_LTDC_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_LTDCLPEN))
-#endif /* STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define __HAL_RCC_DSI_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_DSILPEN))
-#define __HAL_RCC_DSI_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_DSILPEN))
-#endif /* STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*----------------------------------- STM32F40xxx/STM32F41xxx-----------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_BKPSRAM_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))
-#define __HAL_RCC_GPIOG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))
-#define __HAL_RCC_GPIOI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))
-#define __HAL_RCC_BKPSRAM_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))
-#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-/**
- * @brief Enable ETHERNET clock.
- */
-#define __HAL_RCC_ETHMAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACTX_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACRX_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETHMACPTP_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ETH_CLK_ENABLE() do { \
- __HAL_RCC_ETHMAC_CLK_ENABLE(); \
- __HAL_RCC_ETHMACTX_CLK_ENABLE(); \
- __HAL_RCC_ETHMACRX_CLK_ENABLE(); \
- } while(0U)
-
-/**
- * @brief Disable ETHERNET clock.
- */
-#define __HAL_RCC_ETHMAC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN))
-#define __HAL_RCC_ETHMACTX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN))
-#define __HAL_RCC_ETHMACRX_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN))
-#define __HAL_RCC_ETHMACPTP_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN))
-#define __HAL_RCC_ETH_CLK_DISABLE() do { \
- __HAL_RCC_ETHMACTX_CLK_DISABLE(); \
- __HAL_RCC_ETHMACRX_CLK_DISABLE(); \
- __HAL_RCC_ETHMAC_CLK_DISABLE(); \
- } while(0U)
-#endif /* STM32F407xx || STM32F417xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#define __HAL_RCC_GPIOI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)
-
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)
-#define __HAL_RCC_GPIOI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN))== RESET)
-#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-/**
- * @brief Enable ETHERNET clock.
- */
-#define __HAL_RCC_ETHMAC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) != RESET)
-#define __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) != RESET)
-#define __HAL_RCC_ETHMACRX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) != RESET)
-#define __HAL_RCC_ETHMACPTP_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) != RESET)
-#define __HAL_RCC_ETH_IS_CLK_ENABLED() (__HAL_RCC_ETHMAC_IS_CLK_ENABLED() && \
- __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() && \
- __HAL_RCC_ETHMACRX_IS_CLK_ENABLED())
-/**
- * @brief Disable ETHERNET clock.
- */
-#define __HAL_RCC_ETHMAC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) == RESET)
-#define __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) == RESET)
-#define __HAL_RCC_ETHMACRX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) == RESET)
-#define __HAL_RCC_ETHMACPTP_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) == RESET)
-#define __HAL_RCC_ETH_IS_CLK_DISABLED() (__HAL_RCC_ETHMAC_IS_CLK_DISABLED() && \
- __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() && \
- __HAL_RCC_ETHMACRX_IS_CLK_DISABLED())
-#endif /* STM32F407xx || STM32F417xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-
-#define __HAL_RCC_RNG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
-
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-#define __HAL_RCC_DCMI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DCMI_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_DCMIEN))
-#endif /* STM32F407xx || STM32F417xx */
-
-#if defined(STM32F415xx) || defined(STM32F417xx)
-#define __HAL_RCC_CRYP_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_HASH_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRYP_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_CRYPEN))
-#define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
-#endif /* STM32F415xx || STM32F417xx */
-/**
- * @}
- */
-
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-
-#define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
-
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-#define __HAL_RCC_DCMI_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) != RESET)
-#define __HAL_RCC_DCMI_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) == RESET)
-#endif /* STM32F407xx || STM32F417xx */
-
-#if defined(STM32F415xx) || defined(STM32F417xx)
-#define __HAL_RCC_CRYP_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_CRYPEN)) != RESET)
-#define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) != RESET)
-
-#define __HAL_RCC_CRYP_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_CRYPEN)) == RESET)
-#define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) == RESET)
-#endif /* STM32F415xx || STM32F417xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FSMC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_FSMC_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_FSMCEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Peripheral_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FSMC_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FSMCEN)) != RESET)
-#define __HAL_RCC_FSMC_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FSMCEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM12_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM13_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM14_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
-#define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
-#define __HAL_RCC_TIM14_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM14EN))
-#define __HAL_RCC_USART3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
-#define __HAL_RCC_UART4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
-#define __HAL_RCC_UART5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
-#define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
-#define __HAL_RCC_CAN2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN2EN))
-#define __HAL_RCC_DAC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
-#define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
-#define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
-#define __HAL_RCC_TIM14_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)
-#define __HAL_RCC_USART3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
-#define __HAL_RCC_UART4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
-#define __HAL_RCC_UART5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
-#define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
-#define __HAL_RCC_CAN2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
-#define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
-#define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
-#define __HAL_RCC_TIM14_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)
-#define __HAL_RCC_USART3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
-#define __HAL_RCC_UART4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
-#define __HAL_RCC_UART5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
-#define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
-#define __HAL_RCC_CAN2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
- /**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-#define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
-#define __HAL_RCC_ADC2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))
-#define __HAL_RCC_ADC3_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC3EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
-#define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
-#define __HAL_RCC_ADC2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)
-#define __HAL_RCC_ADC3_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)
-
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
-#define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
-#define __HAL_RCC_ADC2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)
-#define __HAL_RCC_ADC3_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_GPIOI_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOIRST))
-#define __HAL_RCC_ETHMAC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_ETHMACRST))
-#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_GPIOI_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOIRST))
-#define __HAL_RCC_ETHMAC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_ETHMACRST))
-#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-#define __HAL_RCC_DCMI_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_DCMIRST))
-#define __HAL_RCC_DCMI_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_DCMIRST))
-#endif /* STM32F407xx || STM32F417xx */
-
-#if defined(STM32F415xx) || defined(STM32F417xx)
-#define __HAL_RCC_CRYP_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_CRYPRST))
-#define __HAL_RCC_HASH_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_HASHRST))
-
-#define __HAL_RCC_CRYP_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_CRYPRST))
-#define __HAL_RCC_HASH_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_HASHRST))
-#endif /* STM32F415xx || STM32F417xx */
-
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-
-#define __HAL_RCC_RNG_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_RNG_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_RNGRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-
-#define __HAL_RCC_FSMC_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_FSMCRST))
-#define __HAL_RCC_FSMC_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_FSMCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_USART3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_CAN1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_USART3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_CAN1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM8_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET()(RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_TIM8_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOILPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACLPEN))
-#define __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACTXLPEN))
-#define __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACRXLPEN))
-#define __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_ETHMACPTPLPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_BKPSRAMLPEN))
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOILPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACLPEN))
-#define __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACTXLPEN))
-#define __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACRXLPEN))
-#define __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_ETHMACPTPLPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_BKPSRAMLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_RNGLPEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_RNGLPEN))
-
-#if defined(STM32F407xx)|| defined(STM32F417xx)
-#define __HAL_RCC_DCMI_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_DCMILPEN))
-#define __HAL_RCC_DCMI_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_DCMILPEN))
-#endif /* STM32F407xx || STM32F417xx */
-
-#if defined(STM32F415xx) || defined(STM32F417xx)
-#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_CRYPLPEN))
-#define __HAL_RCC_HASH_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_HASHLPEN))
-
-#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_CRYPLPEN))
-#define __HAL_RCC_HASH_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_HASHLPEN))
-#endif /* STM32F415xx || STM32F417xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_LowPower_Enable_Disable AHB3 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_FSMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FSMCLPEN))
-#define __HAL_RCC_FSMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FSMCLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_DACLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC3LPEN))
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE()(RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE()(RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC3LPEN))
-/**
- * @}
- */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------------- STM32F401xE/STM32F401xC --------------------------*/
-#if defined(STM32F401xC) || defined(STM32F401xE)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET)
-
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCC_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
-
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
-/**
- * @}
- */
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB1_FORCE_RESET() (RCC->AHB1RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#define __HAL_RCC_AHB1_RELEASE_RESET() (RCC->AHB1RSTR = 0x00U)
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-
-#define __HAL_RCC_APB1_RELEASE_RESET() (RCC->APB1RSTR = 0x00U)
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_APB2_FORCE_RESET() (RCC->APB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-
-#define __HAL_RCC_APB2_RELEASE_RESET() (RCC->APB2RSTR = 0x00U)
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-/**
- * @}
- */
-#endif /* STM32F401xC || STM32F401xE*/
-/*----------------------------------------------------------------------------*/
-
-/*-------------------------------- STM32F410xx -------------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RNG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RNGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RNGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-#define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_RNGEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_RNGEN)) != RESET)
-
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_RNGEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB1) peripheral clock.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_LPTIM1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RTCAPB_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_RTCAPBEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_RTCAPBEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_FMPI2C1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_TIM6_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_RTCAPB_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_RTCAPBEN))
-#define __HAL_RCC_LPTIM1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_LPTIM1EN))
-#define __HAL_RCC_FMPI2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_FMPI2C1EN))
-#define __HAL_RCC_DAC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
-#define __HAL_RCC_RTCAPB_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) != RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) != RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
-
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
-#define __HAL_RCC_RTCAPB_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) == RESET)
-#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) == RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @{
- */
-#define __HAL_RCC_SPI5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_EXTIT_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_EXTITEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_EXTITEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI5_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI5EN))
-#define __HAL_RCC_EXTIT_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_EXTITEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SPI5_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)
-#define __HAL_RCC_EXTIT_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_EXTITEN)) != RESET)
-
-#define __HAL_RCC_SPI5_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)
-#define __HAL_RCC_EXTIT_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_EXTITEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-#define __HAL_RCC_RNG_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_RNGRST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-#define __HAL_RCC_RNG_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_RNGRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET()
-#define __HAL_RCC_AHB2_RELEASE_RESET()
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET()
-#define __HAL_RCC_AHB3_RELEASE_RESET()
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_LPTIM1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_FMPI2C1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
-
-#define __HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_LPTIM1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LPTIM1RST))
-#define __HAL_RCC_FMPI2C1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_SPI5_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI5RST))
-#define __HAL_RCC_SPI5_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI5RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_RNGLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_RNGLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_LPTIM1LPEN))
-#define __HAL_RCC_RTCAPB_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_RTCAPBLPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_DACLPEN))
-
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_LPTIM1LPEN))
-#define __HAL_RCC_RTCAPB_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_RTCAPBLPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_DACLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @{
- */
-#define __HAL_RCC_SPI5_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI5LPEN))
-#define __HAL_RCC_EXTIT_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_EXTITLPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI5LPEN))
-#define __HAL_RCC_EXTIT_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_EXTITLPEN))
-/**
- * @}
- */
-
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/*----------------------------------------------------------------------------*/
-
-/*-------------------------------- STM32F411xx -------------------------------*/
-#if defined(STM32F411xE)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEX_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @{
- */
-#define __HAL_RCC_SPI5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-#define __HAL_RCC_SPI5_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI5EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
-#define __HAL_RCC_SPI5_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)
-
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
-#define __HAL_RCC_SPI5_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_SPI5_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI5RST))
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_SPI5_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI5RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @{
- */
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @{
- */
-#define __HAL_RCC_SPI5_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI5LPEN))
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI5LPEN))
-/**
- * @}
- */
-#endif /* STM32F411xE */
-/*----------------------------------------------------------------------------*/
-
-/*---------------------------------- STM32F446xx -----------------------------*/
-#if defined(STM32F446xx)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_BKPSRAM_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))
-#define __HAL_RCC_GPIOG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))
-#define __HAL_RCC_BKPSRAM_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))
-#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)
-#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN))!= RESET)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)
-#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET)
-#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)
-#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_DCMI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DCMI_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_DCMIEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-
-#define __HAL_RCC_RNG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_DCMI_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) != RESET)
-#define __HAL_RCC_DCMI_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_DCMIEN)) == RESET)
-
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-
-#define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FMC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_QSPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_FMC_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_FMCEN))
-#define __HAL_RCC_QSPI_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_QSPIEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Peripheral_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_FMC_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)
-#define __HAL_RCC_QSPI_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)
-
-#define __HAL_RCC_FMC_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)
-#define __HAL_RCC_QSPI_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM12_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM13_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM14_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPDIFRX_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPDIFRXEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPDIFRXEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_FMPI2C1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CEC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CECEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_DAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
-#define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
-#define __HAL_RCC_TIM14_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM14EN))
-#define __HAL_RCC_SPDIFRX_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPDIFRXEN))
-#define __HAL_RCC_USART3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
-#define __HAL_RCC_UART4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
-#define __HAL_RCC_UART5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
-#define __HAL_RCC_FMPI2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_FMPI2C1EN))
-#define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
-#define __HAL_RCC_CAN2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN2EN))
-#define __HAL_RCC_CEC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CECEN))
-#define __HAL_RCC_DAC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
-#define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
-#define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
-#define __HAL_RCC_TIM14_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)
-#define __HAL_RCC_SPDIFRX_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPDIFRXEN)) != RESET)
-#define __HAL_RCC_USART3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
-#define __HAL_RCC_UART4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
-#define __HAL_RCC_UART5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) != RESET)
-#define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
-#define __HAL_RCC_CAN2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) != RESET)
-#define __HAL_RCC_CEC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CECEN)) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
-#define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
-#define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
-#define __HAL_RCC_TIM14_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)
-#define __HAL_RCC_SPDIFRX_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPDIFRXEN)) == RESET)
-#define __HAL_RCC_USART3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
-#define __HAL_RCC_UART4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
-#define __HAL_RCC_UART5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) == RESET)
-#define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
-#define __HAL_RCC_CAN2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) == RESET)
-#define __HAL_RCC_CEC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CECEN)) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_ADC3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SAI1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SAI2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-#define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
-#define __HAL_RCC_ADC2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))
-#define __HAL_RCC_ADC3_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC3EN))
-#define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
-#define __HAL_RCC_SAI2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI2EN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
-#define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
-#define __HAL_RCC_ADC2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)
-#define __HAL_RCC_ADC3_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)
-#define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
-#define __HAL_RCC_SAI2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) != RESET)
-
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
-#define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
-#define __HAL_RCC_ADC2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)
-#define __HAL_RCC_ADC3_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)
-#define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
-#define __HAL_RCC_SAI2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#define __HAL_RCC_GPIOF_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOGRST))
-#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_OTGHRST))
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_RNG_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_DCMI_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_DCMIRST))
-
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_RNG_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_DCMI_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_DCMIRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-
-#define __HAL_RCC_FMC_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_FMCRST))
-#define __HAL_RCC_QSPI_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_QSPIRST))
-
-#define __HAL_RCC_FMC_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_FMCRST))
-#define __HAL_RCC_QSPI_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_QSPIRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_SPDIFRX_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPDIFRXRST))
-#define __HAL_RCC_USART3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_FMPI2C1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_CAN1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_CEC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CECRST))
-#define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM14RST))
-#define __HAL_RCC_SPDIFRX_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPDIFRXRST))
-#define __HAL_RCC_USART3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
-#define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
-#define __HAL_RCC_FMPI2C1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_CAN1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN2RST))
-#define __HAL_RCC_CEC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CECRST))
-#define __HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM8_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
-#define __HAL_RCC_SAI1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SAI1RST))
-#define __HAL_RCC_SAI2_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SAI2RST))
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_TIM8_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
-#define __HAL_RCC_SAI1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SAI1RST))
-#define __HAL_RCC_SAI2_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SAI2RST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_BKPSRAMLPEN))
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM2LPEN))
-#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSLPEN))
-#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_OTGHSULPILPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-#define __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_BKPSRAMLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_RNGLPEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_RNGLPEN))
-
-#define __HAL_RCC_DCMI_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_DCMILPEN))
-#define __HAL_RCC_DCMI_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_DCMILPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_LowPower_Enable_Disable AHB3 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
-#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
-
-#define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FMCLPEN))
-#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_SPDIFRX_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPDIFRXLPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_CEC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CECLPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM14LPEN))
-#define __HAL_RCC_SPDIFRX_CLK_SLEEP_DISABLE()(RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPDIFRXLPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART3LPEN))
-#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_DISABLE()(RCC->APB1LPENR &= ~(RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN2LPEN))
-#define __HAL_RCC_CEC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CECLPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_DACLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_ADC3LPEN))
-#define __HAL_RCC_SAI1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SAI1LPEN))
-#define __HAL_RCC_SAI2_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SAI2LPEN))
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE()(RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE()(RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM8LPEN))
-#define __HAL_RCC_ADC2_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC2LPEN))
-#define __HAL_RCC_ADC3_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_ADC3LPEN))
-#define __HAL_RCC_SAI1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SAI1LPEN))
-#define __HAL_RCC_SAI2_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SAI2LPEN))
-/**
- * @}
- */
-
-#endif /* STM32F446xx */
-/*----------------------------------------------------------------------------*/
-
-/*-------STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx-------*/
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))
-#define __HAL_RCC_GPIOG_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
-
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)
-#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F423xx)
-#define __HAL_RCC_AES_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_AES_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_AESEN))
-#endif /* STM32F423xx */
-
-#define __HAL_RCC_RNG_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_RNG_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))
-
-#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
- __HAL_RCC_SYSCFG_CLK_ENABLE();\
- }while(0U)
-
-#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Peripheral_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F423xx)
-#define __HAL_RCC_AES_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_AESEN)) != RESET)
-#define __HAL_RCC_AES_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_AESEN)) == RESET)
-#endif /* STM32F423xx */
-
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
-#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
-
-#define __HAL_RCC_RNG_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
-#define __HAL_RCC_RNG_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable
- * @brief Enables or disables the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_FSMC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_QSPI_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#define __HAL_RCC_FSMC_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_FSMCEN))
-#define __HAL_RCC_QSPI_CLK_DISABLE() (RCC->AHB3ENR &= ~(RCC_AHB3ENR_QSPIEN))
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Peripheral_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the AHB3 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_FSMC_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FSMCEN)) != RESET)
-#define __HAL_RCC_QSPI_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)
-
-#define __HAL_RCC_FSMC_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FSMCEN)) == RESET)
-#define __HAL_RCC_QSPI_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
-
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable
- * @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM6_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM6EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM12_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM12EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM13_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM13EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM14_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM14EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_LPTIM1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_RTCAPBEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_RTCAPBEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_USART3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_FMPI2C1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_FMPI2C1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_CAN2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DAC_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_DACEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART7_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART7EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART7EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB1ENR, RCC_APB1ENR_UART8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_UART8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM2EN))
-#define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
-#define __HAL_RCC_TIM4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
-#define __HAL_RCC_TIM6_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM6EN))
-#define __HAL_RCC_TIM7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM7EN))
-#define __HAL_RCC_TIM12_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM12EN))
-#define __HAL_RCC_TIM13_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM13EN))
-#define __HAL_RCC_TIM14_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM14EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_LPTIM1EN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_RTCAPBEN))
-#define __HAL_RCC_SPI3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI3EN))
-#define __HAL_RCC_USART3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART4EN))
-#define __HAL_RCC_UART5_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART5EN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
-#define __HAL_RCC_FMPI2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_FMPI2C1EN))
-#define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
-#define __HAL_RCC_CAN2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN2EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN3EN))
-#define __HAL_RCC_DAC_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_DACEN))
-#define __HAL_RCC_UART7_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART7EN))
-#define __HAL_RCC_UART8_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_UART8EN))
-#endif /* STM32F413xx || STM32F423xx */
-
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Peripheral_Clock_Enable_Disable_Status APB1 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB1 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
-#define __HAL_RCC_TIM12_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
-#define __HAL_RCC_TIM13_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
-#define __HAL_RCC_TIM14_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) != RESET)
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
-#define __HAL_RCC_USART3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
-#define __HAL_RCC_UART5_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) != RESET)
-#define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN))!= RESET)
-#define __HAL_RCC_CAN2_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN3EN)) != RESET)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
-#define __HAL_RCC_UART7_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) != RESET)
-#define __HAL_RCC_UART8_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
-#define __HAL_RCC_TIM12_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
-#define __HAL_RCC_TIM13_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
-#define __HAL_RCC_TIM14_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_RTCAPBEN)) == RESET)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
-#define __HAL_RCC_USART3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
-#define __HAL_RCC_UART5_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
-#define __HAL_RCC_FMPI2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_FMPI2C1EN)) == RESET)
-#define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
-#define __HAL_RCC_CAN2_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN2EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN3EN)) == RESET)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
-#define __HAL_RCC_UART7_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) == RESET)
-#define __HAL_RCC_UART8_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-/** @defgroup RCCEx_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable
- * @brief Enable or disable the High Speed APB (APB2) peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_UART9EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_UART9EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_UART10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_UART10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_UART10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDIOEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI4_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI4EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_EXTIT_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_EXTITEN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_EXTITEN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_TIM10_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM10EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#define __HAL_RCC_SPI5_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI5EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_CLK_ENABLE() do { \
- __IO uint32_t tmpreg = 0x00U; \
- SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM2EN);\
- /* Delay after an RCC peripheral clock enabling */ \
- tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM2EN);\
- UNUSED(tmpreg); \
- } while(0U)
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_UART9EN))
-#define __HAL_RCC_UART10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_UART10EN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SDIOEN))
-#define __HAL_RCC_SPI4_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI4EN))
-#define __HAL_RCC_EXTIT_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_EXTITEN))
-#define __HAL_RCC_TIM10_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM10EN))
-#define __HAL_RCC_SPI5_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI5EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_DFSDM1EN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_DFSDM2EN))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Peripheral_Clock_Enable_Disable_Status APB2 Peripheral Clock Enable Disable Status
- * @brief Get the enable or disable status of the APB2 peripheral clock.
- * @note After reset, the peripheral clock (used for registers read/write access)
- * is disabled and the application software has to enable this clock before
- * using it.
- * @{
- */
-#define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_UART9EN)) != RESET)
-#define __HAL_RCC_UART10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_UART10EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
-#define __HAL_RCC_SPI4_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
-#define __HAL_RCC_EXTIT_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_EXTITEN)) != RESET)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
-#define __HAL_RCC_SPI5_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DFSDM1EN)) != RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DFSDM2EN)) != RESET)
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_UART9EN)) == RESET)
-#define __HAL_RCC_UART10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_UART10EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
-#define __HAL_RCC_SPI4_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
-#define __HAL_RCC_EXTIT_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_EXTITEN)) == RESET)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
-#define __HAL_RCC_SPI5_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DFSDM1EN)) == RESET)
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_DFSDM2EN)) == RESET)
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_Force_Release_Reset AHB1 Force Release Reset
- * @brief Force or release AHB1 peripheral reset.
- * @{
- */
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOGRST))
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_FORCE_RESET() (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
-
-#if defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOD_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
-#endif /* STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOE_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
-#endif /* STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Zx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_GPIOF_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOFRST))
-#define __HAL_RCC_GPIOG_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOGRST))
-#endif /* STM32F412Zx || STM32F413xx || STM32F423xx */
-#define __HAL_RCC_CRC_RELEASE_RESET() (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_Force_Release_Reset AHB2 Force Release Reset
- * @brief Force or release AHB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_AHB2_FORCE_RESET() (RCC->AHB2RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB2_RELEASE_RESET() (RCC->AHB2RSTR = 0x00U)
-
-#if defined(STM32F423xx)
-#define __HAL_RCC_AES_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_AESRST))
-#define __HAL_RCC_AES_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_AESRST))
-#endif /* STM32F423xx */
-
-#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_OTGFSRST))
-#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_OTGFSRST))
-
-#define __HAL_RCC_RNG_FORCE_RESET() (RCC->AHB2RSTR |= (RCC_AHB2RSTR_RNGRST))
-#define __HAL_RCC_RNG_RELEASE_RESET() (RCC->AHB2RSTR &= ~(RCC_AHB2RSTR_RNGRST))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_Force_Release_Reset AHB3 Force Release Reset
- * @brief Force or release AHB3 peripheral reset.
- * @{
- */
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_AHB3_FORCE_RESET() (RCC->AHB3RSTR = 0xFFFFFFFFU)
-#define __HAL_RCC_AHB3_RELEASE_RESET() (RCC->AHB3RSTR = 0x00U)
-
-#define __HAL_RCC_FSMC_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_FSMCRST))
-#define __HAL_RCC_QSPI_FORCE_RESET() (RCC->AHB3RSTR |= (RCC_AHB3RSTR_QSPIRST))
-
-#define __HAL_RCC_FSMC_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_FSMCRST))
-#define __HAL_RCC_QSPI_RELEASE_RESET() (RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_QSPIRST))
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
-#if defined(STM32F412Cx)
-#define __HAL_RCC_AHB3_FORCE_RESET()
-#define __HAL_RCC_AHB3_RELEASE_RESET()
-
-#define __HAL_RCC_FSMC_FORCE_RESET()
-#define __HAL_RCC_QSPI_FORCE_RESET()
-
-#define __HAL_RCC_FSMC_RELEASE_RESET()
-#define __HAL_RCC_QSPI_RELEASE_RESET()
-#endif /* STM32F412Cx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_Force_Release_Reset APB1 Force Release Reset
- * @brief Force or release APB1 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_TIM6_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM14RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_LPTIM1RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SPI3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_USART3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_FMPI2C1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_CAN1_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN2RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN3RST))
-#define __HAL_RCC_DAC_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_UART7_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART7RST))
-#define __HAL_RCC_UART8_FORCE_RESET() (RCC->APB1RSTR |= (RCC_APB1RSTR_UART8RST))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
-#define __HAL_RCC_TIM3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
-#define __HAL_RCC_TIM4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
-#define __HAL_RCC_TIM6_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
-#define __HAL_RCC_TIM7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
-#define __HAL_RCC_TIM12_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM12RST))
-#define __HAL_RCC_TIM13_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM13RST))
-#define __HAL_RCC_TIM14_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM14RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_LPTIM1RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SPI3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
-#define __HAL_RCC_USART3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
-#define __HAL_RCC_UART5_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
-#define __HAL_RCC_FMPI2C1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_FMPI2C1RST))
-#define __HAL_RCC_CAN1_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
-#define __HAL_RCC_CAN2_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN2RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN3RST))
-#define __HAL_RCC_DAC_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
-#define __HAL_RCC_UART7_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART7RST))
-#define __HAL_RCC_UART8_RELEASE_RESET() (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART8RST))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_Force_Release_Reset APB2 Force Release Reset
- * @brief Force or release APB2 peripheral reset.
- * @{
- */
-#define __HAL_RCC_TIM8_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_UART9RST))
-#define __HAL_RCC_UART10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_UART10RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_SPI5_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI5RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_SAI1RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_DFSDM1RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_FORCE_RESET() (RCC->APB2RSTR |= (RCC_APB2RSTR_DFSDM2RST))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM8_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_UART9RST))
-#define __HAL_RCC_UART10_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_UART10RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
-#define __HAL_RCC_SPI4_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI4RST))
-#define __HAL_RCC_TIM10_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
-#define __HAL_RCC_SPI5_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI5RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SAI1RST))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_DFSDM1RST))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_RELEASE_RESET() (RCC->APB2RSTR &= ~(RCC_APB2RSTR_DFSDM2RST))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB1_LowPower_Enable_Disable AHB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM1LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() (RCC->AHB1LPENR |= (RCC_AHB1LPENR_SRAM2LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIODLPEN))
-#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOELPEN))
-#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOFLPEN))
-#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_GPIOGLPEN))
-#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_CRCLPEN))
-#define __HAL_RCC_FLITF_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_FLITFLPEN))
-#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM1LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() (RCC->AHB1LPENR &= ~(RCC_AHB1LPENR_SRAM2LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB2_LowPower_Enable_Disable AHB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wake-up from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#if defined(STM32F423xx)
-#define __HAL_RCC_AES_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_AESLPEN))
-#define __HAL_RCC_AES_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_AESLPEN))
-#endif /* STM32F423xx */
-
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_OTGFSLPEN))
-#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_OTGFSLPEN))
-
-#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() (RCC->AHB2LPENR |= (RCC_AHB2LPENR_RNGLPEN))
-#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() (RCC->AHB2LPENR &= ~(RCC_AHB2LPENR_RNGLPEN))
-/**
- * @}
- */
-
-/** @defgroup RCCEx_AHB3_LowPower_Enable_Disable AHB3 Peripheral Low Power Enable Disable
- * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_FSMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FSMCLPEN))
-#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
-
-#define __HAL_RCC_FSMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FSMCLPEN))
-#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
-
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB1_LowPower_Enable_Disable APB1 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM14LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_LPTIM1LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_RTCAPBLPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_USART3LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART5LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_I2C3LPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN2LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_CAN3LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_UART7_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART7LPEN))
-#define __HAL_RCC_UART8_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_UART8LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM2LPEN))
-#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM3LPEN))
-#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM4LPEN))
-#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM6LPEN))
-#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM7LPEN))
-#define __HAL_RCC_TIM12_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM12LPEN))
-#define __HAL_RCC_TIM13_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM13LPEN))
-#define __HAL_RCC_TIM14_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_TIM14LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_LPTIM1LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_RTCAPB_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_RTCAPBLPEN))
-#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_SPI3LPEN))
-#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_USART3LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART4LPEN))
-#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART5LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_I2C3LPEN))
-#define __HAL_RCC_FMPI2C1_CLK_SLEEP_DISABLE()(RCC->APB1LPENR &= ~(RCC_APB1LPENR_FMPI2C1LPEN))
-#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN1LPEN))
-#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN2LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_CAN3_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_CAN3LPEN))
-#define __HAL_RCC_DAC_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_DACLPEN))
-#define __HAL_RCC_UART7_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART7LPEN))
-#define __HAL_RCC_UART8_CLK_SLEEP_DISABLE() (RCC->APB1LPENR &= ~(RCC_APB1LPENR_UART8LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-
-/** @defgroup RCCEx_APB2_LowPower_Enable_Disable APB2 Peripheral Low Power Enable Disable
- * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
- * @note Peripheral clock gating in SLEEP mode can be used to further reduce
- * power consumption.
- * @note After wakeup from SLEEP mode, the peripheral clock is enabled again.
- * @note By default, all peripheral clocks are enabled during SLEEP mode.
- * @{
- */
-#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM8LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_UART9LPEN))
-#define __HAL_RCC_UART10_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_UART10LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_EXTIT_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_EXTITLPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SPI5LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_SAI1LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_DFSDM1LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_CLK_SLEEP_ENABLE() (RCC->APB2LPENR |= (RCC_APB2LPENR_DFSDM2LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM8LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_UART9_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_UART9LPEN))
-#define __HAL_RCC_UART10_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_UART10LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SDIOLPEN))
-#define __HAL_RCC_SPI4_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI4LPEN))
-#define __HAL_RCC_EXTIT_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_EXTITLPEN))
-#define __HAL_RCC_TIM10_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_TIM10LPEN))
-#define __HAL_RCC_SPI5_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SPI5LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_SAI1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_SAI1LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-#define __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_DFSDM1LPEN))
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define __HAL_RCC_DFSDM2_CLK_SLEEP_DISABLE() (RCC->APB2LPENR &= ~(RCC_APB2LPENR_DFSDM2LPEN))
-#endif /* STM32F413xx || STM32F423xx */
-/**
- * @}
- */
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------------------- PLL Configuration --------------------------*/
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @brief Macro to configure the main PLL clock source, multiplication and division factors.
- * @note This function must be used only when the main PLL is disabled.
- * @param __RCC_PLLSource__ specifies the PLL entry clock source.
- * This parameter can be one of the following values:
- * @arg RCC_PLLSOURCE_HSI: HSI oscillator clock selected as PLL clock entry
- * @arg RCC_PLLSOURCE_HSE: HSE oscillator clock selected as PLL clock entry
- * @note This clock source (RCC_PLLSource) is common for the main PLL and PLLI2S.
- * @param __PLLM__ specifies the division factor for PLL VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 2 MHz to limit PLL jitter.
- * @param __PLLN__ specifies the multiplication factor for PLL VCO output clock
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLN parameter correctly to ensure that the VCO
- * output frequency is between 100 and 432 MHz.
- *
- * @param __PLLP__ specifies the division factor for main system clock (SYSCLK)
- * This parameter must be a number in the range {2, 4, 6, or 8}.
- *
- * @param __PLLQ__ specifies the division factor for OTG FS, SDIO and RNG clocks
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- * @note If the USB OTG FS is used in your application, you have to set the
- * PLLQ parameter correctly to have 48 MHz clock for the USB. However,
- * the SDIO and RNG need a frequency lower than or equal to 48 MHz to work
- * correctly.
- *
- * @param __PLLR__ PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks.
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note This parameter is only available in STM32F446xx/STM32F469xx/STM32F479xx/
- STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F413xx/STM32F423xx devices.
- *
- */
-#define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__) \
- (RCC->PLLCFGR = ((__RCC_PLLSource__) | (__PLLM__) | \
- ((__PLLN__) << RCC_PLLCFGR_PLLN_Pos) | \
- ((((__PLLP__) >> 1U) -1U) << RCC_PLLCFGR_PLLP_Pos) | \
- ((__PLLQ__) << RCC_PLLCFGR_PLLQ_Pos) | \
- ((__PLLR__) << RCC_PLLCFGR_PLLR_Pos)))
-#else
-/** @brief Macro to configure the main PLL clock source, multiplication and division factors.
- * @note This function must be used only when the main PLL is disabled.
- * @param __RCC_PLLSource__ specifies the PLL entry clock source.
- * This parameter can be one of the following values:
- * @arg RCC_PLLSOURCE_HSI: HSI oscillator clock selected as PLL clock entry
- * @arg RCC_PLLSOURCE_HSE: HSE oscillator clock selected as PLL clock entry
- * @note This clock source (RCC_PLLSource) is common for the main PLL and PLLI2S.
- * @param __PLLM__ specifies the division factor for PLL VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 2 MHz to limit PLL jitter.
- * @param __PLLN__ specifies the multiplication factor for PLL VCO output clock
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432
- * Except for STM32F411xE devices where Min_Data = 192.
- * @note You have to set the PLLN parameter correctly to ensure that the VCO
- * output frequency is between 100 and 432 MHz, Except for STM32F411xE devices
- * where frequency is between 192 and 432 MHz.
- * @param __PLLP__ specifies the division factor for main system clock (SYSCLK)
- * This parameter must be a number in the range {2, 4, 6, or 8}.
- *
- * @param __PLLQ__ specifies the division factor for OTG FS, SDIO and RNG clocks
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- * @note If the USB OTG FS is used in your application, you have to set the
- * PLLQ parameter correctly to have 48 MHz clock for the USB. However,
- * the SDIO and RNG need a frequency lower than or equal to 48 MHz to work
- * correctly.
- *
- */
-#define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__) \
- (RCC->PLLCFGR = (0x20000000U | (__RCC_PLLSource__) | (__PLLM__)| \
- ((__PLLN__) << RCC_PLLCFGR_PLLN_Pos) | \
- ((((__PLLP__) >> 1U) -1U) << RCC_PLLCFGR_PLLP_Pos) | \
- ((__PLLQ__) << RCC_PLLCFGR_PLLQ_Pos)))
- #endif /* STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-/*----------------------------------------------------------------------------*/
-
-/*----------------------------PLLI2S Configuration ---------------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-
-/** @brief Macros to enable or disable the PLLI2S.
- * @note The PLLI2S is disabled by hardware when entering STOP and STANDBY modes.
- */
-#define __HAL_RCC_PLLI2S_ENABLE() (*(__IO uint32_t *) RCC_CR_PLLI2SON_BB = ENABLE)
-#define __HAL_RCC_PLLI2S_DISABLE() (*(__IO uint32_t *) RCC_CR_PLLI2SON_BB = DISABLE)
-
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
- STM32F412Rx || STM32F412Cx */
-#if defined(STM32F446xx)
-/** @brief Macro to configure the PLLI2S clock multiplication and division factors .
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note PLLI2S clock source is common with the main PLL (configured in
- * HAL_RCC_ClockConfig() API).
- * @param __PLLI2SM__ specifies the division factor for PLLI2S VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLI2SM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 1 MHz to limit PLLI2S jitter.
- *
- * @param __PLLI2SN__ specifies the multiplication factor for PLLI2S VCO output clock
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLI2SN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLI2SP__ specifies division factor for SPDIFRX Clock.
- * This parameter must be a number in the range {2, 4, 6, or 8}.
- * @note the PLLI2SP parameter is only available with STM32F446xx Devices
- *
- * @param __PLLI2SR__ specifies the division factor for I2S clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note You have to set the PLLI2SR parameter correctly to not exceed 192 MHz
- * on the I2S clock frequency.
- *
- * @param __PLLI2SQ__ specifies the division factor for SAI clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- */
-#define __HAL_RCC_PLLI2S_CONFIG(__PLLI2SM__, __PLLI2SN__, __PLLI2SP__, __PLLI2SQ__, __PLLI2SR__) \
- (RCC->PLLI2SCFGR = ((__PLLI2SM__) |\
- ((__PLLI2SN__) << RCC_PLLI2SCFGR_PLLI2SN_Pos) |\
- ((((__PLLI2SP__) >> 1U) -1U) << RCC_PLLI2SCFGR_PLLI2SP_Pos) |\
- ((__PLLI2SQ__) << RCC_PLLI2SCFGR_PLLI2SQ_Pos) |\
- ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
-#elif defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
-/** @brief Macro to configure the PLLI2S clock multiplication and division factors .
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note PLLI2S clock source is common with the main PLL (configured in
- * HAL_RCC_ClockConfig() API).
- * @param __PLLI2SM__ specifies the division factor for PLLI2S VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLI2SM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 1 MHz to limit PLLI2S jitter.
- *
- * @param __PLLI2SN__ specifies the multiplication factor for PLLI2S VCO output clock
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLI2SN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLI2SR__ specifies the division factor for I2S clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note You have to set the PLLI2SR parameter correctly to not exceed 192 MHz
- * on the I2S clock frequency.
- *
- * @param __PLLI2SQ__ specifies the division factor for SAI clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- */
-#define __HAL_RCC_PLLI2S_CONFIG(__PLLI2SM__, __PLLI2SN__, __PLLI2SQ__, __PLLI2SR__) \
- (RCC->PLLI2SCFGR = ((__PLLI2SM__) |\
- ((__PLLI2SN__) << RCC_PLLI2SCFGR_PLLI2SN_Pos) |\
- ((__PLLI2SQ__) << RCC_PLLI2SCFGR_PLLI2SQ_Pos) |\
- ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
-#else
-/** @brief Macro to configure the PLLI2S clock multiplication and division factors .
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note PLLI2S clock source is common with the main PLL (configured in
- * HAL_RCC_ClockConfig() API).
- * @param __PLLI2SN__ specifies the multiplication factor for PLLI2S VCO output clock
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLI2SN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLI2SR__ specifies the division factor for I2S clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note You have to set the PLLI2SR parameter correctly to not exceed 192 MHz
- * on the I2S clock frequency.
- *
- */
-#define __HAL_RCC_PLLI2S_CONFIG(__PLLI2SN__, __PLLI2SR__) \
- (RCC->PLLI2SCFGR = (((__PLLI2SN__) << RCC_PLLI2SCFGR_PLLI2SN_Pos) |\
- ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
-#endif /* STM32F446xx */
-
-#if defined(STM32F411xE)
-/** @brief Macro to configure the PLLI2S clock multiplication and division factors .
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note PLLI2S clock source is common with the main PLL (configured in
- * HAL_RCC_ClockConfig() API).
- * @param __PLLI2SM__ specifies the division factor for PLLI2S VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note The PLLI2SM parameter is only used with STM32F411xE/STM32F410xx Devices
- * @note You have to set the PLLI2SM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 2 MHz to limit PLLI2S jitter.
- * @param __PLLI2SN__ specifies the multiplication factor for PLLI2S VCO output clock
- * This parameter must be a number between Min_Data = 192 and Max_Data = 432.
- * @note You have to set the PLLI2SN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 192 and Max_Data = 432 MHz.
- * @param __PLLI2SR__ specifies the division factor for I2S clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note You have to set the PLLI2SR parameter correctly to not exceed 192 MHz
- * on the I2S clock frequency.
- */
-#define __HAL_RCC_PLLI2S_I2SCLK_CONFIG(__PLLI2SM__, __PLLI2SN__, __PLLI2SR__) (RCC->PLLI2SCFGR = ((__PLLI2SM__) |\
- ((__PLLI2SN__) << RCC_PLLI2SCFGR_PLLI2SN_Pos) |\
- ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
-#endif /* STM32F411xE */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macro used by the SAI HAL driver to configure the PLLI2S clock multiplication and division factors.
- * @note This macro must be used only when the PLLI2S is disabled.
- * @note PLLI2S clock source is common with the main PLL (configured in
- * HAL_RCC_ClockConfig() API)
- * @param __PLLI2SN__ specifies the multiplication factor for PLLI2S VCO output clock.
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLI2SN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- * @param __PLLI2SQ__ specifies the division factor for SAI1 clock.
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- * @note the PLLI2SQ parameter is only available with STM32F427xx/437xx/429xx/439xx/469xx/479xx
- * Devices and can be configured using the __HAL_RCC_PLLI2S_PLLSAICLK_CONFIG() macro
- * @param __PLLI2SR__ specifies the division factor for I2S clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note You have to set the PLLI2SR parameter correctly to not exceed 192 MHz
- * on the I2S clock frequency.
- */
-#define __HAL_RCC_PLLI2S_SAICLK_CONFIG(__PLLI2SN__, __PLLI2SQ__, __PLLI2SR__) (RCC->PLLI2SCFGR = ((__PLLI2SN__) << 6U) |\
- ((__PLLI2SQ__) << 24U) |\
- ((__PLLI2SR__) << 28U))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------------------ PLLSAI Configuration ------------------------*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macros to Enable or Disable the PLLISAI.
- * @note The PLLSAI is only available with STM32F429x/439x Devices.
- * @note The PLLSAI is disabled by hardware when entering STOP and STANDBY modes.
- */
-#define __HAL_RCC_PLLSAI_ENABLE() (*(__IO uint32_t *) RCC_CR_PLLSAION_BB = ENABLE)
-#define __HAL_RCC_PLLSAI_DISABLE() (*(__IO uint32_t *) RCC_CR_PLLSAION_BB = DISABLE)
-
-#if defined(STM32F446xx)
-/** @brief Macro to configure the PLLSAI clock multiplication and division factors.
- *
- * @param __PLLSAIM__ specifies the division factor for PLLSAI VCO input clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 63.
- * @note You have to set the PLLSAIM parameter correctly to ensure that the VCO input
- * frequency ranges from 1 to 2 MHz. It is recommended to select a frequency
- * of 1 MHz to limit PLLI2S jitter.
- * @note The PLLSAIM parameter is only used with STM32F446xx Devices
- *
- * @param __PLLSAIN__ specifies the multiplication factor for PLLSAI VCO output clock.
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLSAIN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLSAIP__ specifies division factor for OTG FS, SDIO and RNG clocks.
- * This parameter must be a number in the range {2, 4, 6, or 8}.
- * @note the PLLSAIP parameter is only available with STM32F446xx Devices
- *
- * @param __PLLSAIQ__ specifies the division factor for SAI clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- *
- * @param __PLLSAIR__ specifies the division factor for LTDC clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note the PLLI2SR parameter is only available with STM32F427/437/429/439xx Devices
- */
-#define __HAL_RCC_PLLSAI_CONFIG(__PLLSAIM__, __PLLSAIN__, __PLLSAIP__, __PLLSAIQ__, __PLLSAIR__) \
- (RCC->PLLSAICFGR = ((__PLLSAIM__) | \
- ((__PLLSAIN__) << RCC_PLLSAICFGR_PLLSAIN_Pos) | \
- ((((__PLLSAIP__) >> 1U) -1U) << RCC_PLLSAICFGR_PLLSAIP_Pos) | \
- ((__PLLSAIQ__) << RCC_PLLSAICFGR_PLLSAIQ_Pos)))
-#endif /* STM32F446xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macro to configure the PLLSAI clock multiplication and division factors.
- *
- * @param __PLLSAIN__ specifies the multiplication factor for PLLSAI VCO output clock.
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLSAIN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLSAIP__ specifies division factor for SDIO and CLK48 clocks.
- * This parameter must be a number in the range {2, 4, 6, or 8}.
- *
- * @param __PLLSAIQ__ specifies the division factor for SAI clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- *
- * @param __PLLSAIR__ specifies the division factor for LTDC clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- */
-#define __HAL_RCC_PLLSAI_CONFIG(__PLLSAIN__, __PLLSAIP__, __PLLSAIQ__, __PLLSAIR__) \
- (RCC->PLLSAICFGR = (((__PLLSAIN__) << RCC_PLLSAICFGR_PLLSAIN_Pos) |\
- ((((__PLLSAIP__) >> 1U) -1U) << RCC_PLLSAICFGR_PLLSAIP_Pos) |\
- ((__PLLSAIQ__) << RCC_PLLSAICFGR_PLLSAIQ_Pos) |\
- ((__PLLSAIR__) << RCC_PLLSAICFGR_PLLSAIR_Pos)))
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
-/** @brief Macro to configure the PLLSAI clock multiplication and division factors.
- *
- * @param __PLLSAIN__ specifies the multiplication factor for PLLSAI VCO output clock.
- * This parameter must be a number between Min_Data = 50 and Max_Data = 432.
- * @note You have to set the PLLSAIN parameter correctly to ensure that the VCO
- * output frequency is between Min_Data = 100 and Max_Data = 432 MHz.
- *
- * @param __PLLSAIQ__ specifies the division factor for SAI clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 15.
- *
- * @param __PLLSAIR__ specifies the division factor for LTDC clock
- * This parameter must be a number between Min_Data = 2 and Max_Data = 7.
- * @note the PLLI2SR parameter is only available with STM32F427/437/429/439xx Devices
- */
-#define __HAL_RCC_PLLSAI_CONFIG(__PLLSAIN__, __PLLSAIQ__, __PLLSAIR__) \
- (RCC->PLLSAICFGR = (((__PLLSAIN__) << RCC_PLLSAICFGR_PLLSAIN_Pos) | \
- ((__PLLSAIQ__) << RCC_PLLSAICFGR_PLLSAIQ_Pos) | \
- ((__PLLSAIR__) << RCC_PLLSAICFGR_PLLSAIR_Pos)))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------- PLLSAI/PLLI2S Dividers Configuration -------------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
-/** @brief Macro to configure the SAI clock Divider coming from PLLI2S.
- * @note This function must be called before enabling the PLLI2S.
- * @param __PLLI2SDivR__ specifies the PLLI2S division factor for SAI1 clock.
- * This parameter must be a number between 1 and 32.
- * SAI1 clock frequency = f(PLLI2SR) / __PLLI2SDivR__
- */
-#define __HAL_RCC_PLLI2S_PLLSAICLKDIVR_CONFIG(__PLLI2SDivR__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVR, (__PLLI2SDivR__)-1U))
-
-/** @brief Macro to configure the SAI clock Divider coming from PLL.
- * @param __PLLDivR__ specifies the PLL division factor for SAI1 clock.
- * This parameter must be a number between 1 and 32.
- * SAI1 clock frequency = f(PLLR) / __PLLDivR__
- */
-#define __HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(__PLLDivR__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLDIVR, ((__PLLDivR__)-1U)<<8U))
-#endif /* STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macro to configure the SAI clock Divider coming from PLLI2S.
- * @note This function must be called before enabling the PLLI2S.
- * @param __PLLI2SDivQ__ specifies the PLLI2S division factor for SAI1 clock.
- * This parameter must be a number between 1 and 32.
- * SAI1 clock frequency = f(PLLI2SQ) / __PLLI2SDivQ__
- */
-#define __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(__PLLI2SDivQ__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVQ, (__PLLI2SDivQ__)-1U))
-
-/** @brief Macro to configure the SAI clock Divider coming from PLLSAI.
- * @note This function must be called before enabling the PLLSAI.
- * @param __PLLSAIDivQ__ specifies the PLLSAI division factor for SAI1 clock .
- * This parameter must be a number between Min_Data = 1 and Max_Data = 32.
- * SAI1 clock frequency = f(PLLSAIQ) / __PLLSAIDivQ__
- */
-#define __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(__PLLSAIDivQ__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVQ, ((__PLLSAIDivQ__)-1U)<<8U))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Macro to configure the LTDC clock Divider coming from PLLSAI.
- *
- * @note The LTDC peripheral is only available with STM32F427/437/429/439/469/479xx Devices.
- * @note This function must be called before enabling the PLLSAI.
- * @param __PLLSAIDivR__ specifies the PLLSAI division factor for LTDC clock .
- * This parameter must be a number between Min_Data = 2 and Max_Data = 16.
- * LTDC clock frequency = f(PLLSAIR) / __PLLSAIDivR__
- */
-#define __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(__PLLSAIDivR__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVR, (__PLLSAIDivR__)))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-/*----------------------------------------------------------------------------*/
-
-/*------------------------- Peripheral Clock selection -----------------------*/
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) ||\
- defined(STM32F479xx)
-/** @brief Macro to configure the I2S clock source (I2SCLK).
- * @note This function must be called before enabling the I2S APB clock.
- * @param __SOURCE__ specifies the I2S clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SCLKSOURCE_PLLI2S: PLLI2S clock used as I2S clock source.
- * @arg RCC_I2SCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin
- * used as I2S clock source.
- */
-#define __HAL_RCC_I2S_CONFIG(__SOURCE__) (*(__IO uint32_t *) RCC_CFGR_I2SSRC_BB = (__SOURCE__))
-
-
-/** @brief Macro to get the I2S clock source (I2SCLK).
- * @retval The clock source can be one of the following values:
- * @arg @ref RCC_I2SCLKSOURCE_PLLI2S: PLLI2S clock used as I2S clock source.
- * @arg @ref RCC_I2SCLKSOURCE_EXT External clock mapped on the I2S_CKIN pin
- * used as I2S clock source
- */
-#define __HAL_RCC_GET_I2S_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_I2SSRC)))
-#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-
-/** @brief Macro to configure SAI1BlockA clock source selection.
- * @note The SAI peripheral is only available with STM32F427/437/429/439/469/479xx Devices.
- * @note This function must be called before enabling PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI Block A clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAIACLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used
- * as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used
- * as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_Ext: External clock mapped on the I2S_CKIN pin
- * used as SAI1 Block A clock.
- */
-#define __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI1ASRC, (__SOURCE__)))
-
-/** @brief Macro to configure SAI1BlockB clock source selection.
- * @note The SAI peripheral is only available with STM32F427/437/429/439/469/479xx Devices.
- * @note This function must be called before enabling PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI Block B clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAIBCLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used
- * as SAI1 Block B clock.
- * @arg RCC_SAIBCLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used
- * as SAI1 Block B clock.
- * @arg RCC_SAIBCLKSOURCE_Ext: External clock mapped on the I2S_CKIN pin
- * used as SAI1 Block B clock.
- */
-#define __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI1BSRC, (__SOURCE__)))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F446xx)
-/** @brief Macro to configure SAI1 clock source selection.
- * @note This configuration is only available with STM32F446xx Devices.
- * @note This function must be called before enabling PLL, PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAI1CLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as SAI1 clock.
- */
-#define __HAL_RCC_SAI1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI1SRC, (__SOURCE__)))
-
-/** @brief Macro to Get SAI1 clock source selection.
- * @note This configuration is only available with STM32F446xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SAI1CLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SAI1 clock.
- * @arg RCC_SAI1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as SAI1 clock.
- */
-#define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_SAI1SRC))
-
-/** @brief Macro to configure SAI2 clock source selection.
- * @note This configuration is only available with STM32F446xx Devices.
- * @note This function must be called before enabling PLL, PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI2 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAI2CLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL Source clock used as SAI2 clock.
- */
-#define __HAL_RCC_SAI2_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI2SRC, (__SOURCE__)))
-
-/** @brief Macro to Get SAI2 clock source selection.
- * @note This configuration is only available with STM32F446xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SAI2CLKSOURCE_PLLI2S: PLLI2S_Q clock divided by PLLI2SDIVQ used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLSAI: PLLISAI_Q clock divided by PLLSAIDIVQ used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SAI2 clock.
- * @arg RCC_SAI2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL Source clock used as SAI2 clock.
- */
-#define __HAL_RCC_GET_SAI2_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_SAI2SRC))
-
-/** @brief Macro to configure I2S APB1 clock source selection.
- * @note This function must be called before enabling PLL, PLLI2S and the I2S clock.
- * @param __SOURCE__ specifies the I2S APB1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SAPB1CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR used as I2S clock.
- * @arg RCC_I2SAPB1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S APB1 clock.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as I2S APB1 clock.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_I2S_APB1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_I2S1SRC, (__SOURCE__)))
-
-/** @brief Macro to Get I2S APB1 clock source selection.
- * @retval The clock source can be one of the following values:
- * @arg RCC_I2SAPB1CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR used as I2S clock.
- * @arg RCC_I2SAPB1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S APB1 clock.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as I2S APB1 clock.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_I2S_APB1_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_I2S1SRC))
-
-/** @brief Macro to configure I2S APB2 clock source selection.
- * @note This function must be called before enabling PLL, PLLI2S and the I2S clock.
- * @param __SOURCE__ specifies the SAI Block A clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SAPB2CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR used as I2S clock.
- * @arg RCC_I2SAPB2CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S APB2 clock.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as I2S APB2 clock.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_I2S_APB2_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_I2S2SRC, (__SOURCE__)))
-
-/** @brief Macro to Get I2S APB2 clock source selection.
- * @retval The clock source can be one of the following values:
- * @arg RCC_I2SAPB2CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR used as I2S clock.
- * @arg RCC_I2SAPB2CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S APB2 clock.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as I2S APB2 clock.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_I2S_APB2_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_I2S2SRC))
-
-/** @brief Macro to configure the CEC clock.
- * @param __SOURCE__ specifies the CEC clock source.
- * This parameter can be one of the following values:
- * @arg RCC_CECCLKSOURCE_HSI: HSI selected as CEC clock
- * @arg RCC_CECCLKSOURCE_LSE: LSE selected as CEC clock
- */
-#define __HAL_RCC_CEC_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CECSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the CEC clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_CECCLKSOURCE_HSI488: HSI selected as CEC clock
- * @arg RCC_CECCLKSOURCE_LSE: LSE selected as CEC clock
- */
-#define __HAL_RCC_GET_CEC_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_CECSEL))
-
-/** @brief Macro to configure the FMPI2C1 clock.
- * @param __SOURCE__ specifies the FMPI2C1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_FMPI2C1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the FMPI2C1 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_GET_FMPI2C1_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL))
-
-/** @brief Macro to configure the CLK48 clock.
- * @param __SOURCE__ specifies the CLK48 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLSAIP: PLLSAI VCO Output divided by PLLSAIP used as CLK48 clock.
- */
-#define __HAL_RCC_CLK48_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the CLK48 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLSAIP: PLLSAI VCO Output divided by PLLSAIP used as CLK48 clock.
- */
-#define __HAL_RCC_GET_CLK48_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL))
-
-/** @brief Macro to configure the SDIO clock.
- * @param __SOURCE__ specifies the SDIO clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_SDIO_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the SDIO clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_GET_SDIO_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL))
-
-/** @brief Macro to configure the SPDIFRX clock.
- * @param __SOURCE__ specifies the SPDIFRX clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SPDIFRXCLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SPDIFRX clock.
- * @arg RCC_SPDIFRXCLKSOURCE_PLLI2SP: PLLI2S VCO Output divided by PLLI2SP used as SPDIFRX clock.
- */
-#define __HAL_RCC_SPDIFRX_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SPDIFRXSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the SPDIFRX clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SPDIFRXCLKSOURCE_PLLR: PLL VCO Output divided by PLLR used as SPDIFRX clock.
- * @arg RCC_SPDIFRXCLKSOURCE_PLLI2SP: PLLI2S VCO Output divided by PLLI2SP used as SPDIFRX clock.
- */
-#define __HAL_RCC_GET_SPDIFRX_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_SPDIFRXSEL))
-#endif /* STM32F446xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-
-/** @brief Macro to configure the CLK48 clock.
- * @param __SOURCE__ specifies the CLK48 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLSAIP: PLLSAI VCO Output divided by PLLSAIP used as CLK48 clock.
- */
-#define __HAL_RCC_CLK48_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the CLK48 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLSAIP: PLLSAI VCO Output divided by PLLSAIP used as CLK48 clock.
- */
-#define __HAL_RCC_GET_CLK48_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL))
-
-/** @brief Macro to configure the SDIO clock.
- * @param __SOURCE__ specifies the SDIO clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_SDIO_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SDIOSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the SDIO clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_GET_SDIO_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_SDIOSEL))
-
-/** @brief Macro to configure the DSI clock.
- * @param __SOURCE__ specifies the DSI clock source.
- * This parameter can be one of the following values:
- * @arg RCC_DSICLKSOURCE_PLLR: PLLR output used as DSI clock.
- * @arg RCC_DSICLKSOURCE_DSIPHY: DSI-PHY output used as DSI clock.
- */
-#define __HAL_RCC_DSI_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_DSISEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the DSI clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_DSICLKSOURCE_PLLR: PLLR output used as DSI clock.
- * @arg RCC_DSICLKSOURCE_DSIPHY: DSI-PHY output used as DSI clock.
- */
-#define __HAL_RCC_GET_DSI_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_DSISEL))
-
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
- /** @brief Macro to configure the DFSDM1 clock.
- * @param __DFSDM1_CLKSOURCE__ specifies the DFSDM1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_DFSDM1CLKSOURCE_PCLK2: PCLK2 clock used as kernel clock.
- * @arg RCC_DFSDM1CLKSOURCE_SYSCLK: System clock used as kernel clock.
- * @retval None
- */
-#define __HAL_RCC_DFSDM1_CONFIG(__DFSDM1_CLKSOURCE__) MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL, (__DFSDM1_CLKSOURCE__))
-
-/** @brief Macro to get the DFSDM1 clock source.
- * @retval The clock source can be one of the following values:
- * @arg RCC_DFSDM1CLKSOURCE_PCLK2: PCLK2 clock used as kernel clock.
- * @arg RCC_DFSDM1CLKSOURCE_SYSCLK: System clock used as kernel clock.
- */
-#define __HAL_RCC_GET_DFSDM1_SOURCE() ((uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL)))
-
-/** @brief Macro to configure DFSDM1 Audio clock source selection.
- * @note This configuration is only available with STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/
- STM32F413xx/STM32F423xx Devices.
- * @param __SOURCE__ specifies the DFSDM1 Audio clock source.
- * This parameter can be one of the following values:
- * @arg RCC_DFSDM1AUDIOCLKSOURCE_I2S1: CK_I2S_PCLK1 selected as audio clock
- * @arg RCC_DFSDM1AUDIOCLKSOURCE_I2S2: CK_I2S_PCLK2 selected as audio clock
- */
-#define __HAL_RCC_DFSDM1AUDIO_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1ASEL, (__SOURCE__)))
-
-/** @brief Macro to Get DFSDM1 Audio clock source selection.
- * @note This configuration is only available with STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/
- STM32F413xx/STM32F423xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_DFSDM1AUDIOCLKSOURCE_I2S1: CK_I2S_PCLK1 selected as audio clock
- * @arg RCC_DFSDM1AUDIOCLKSOURCE_I2S2: CK_I2S_PCLK2 selected as audio clock
- */
-#define __HAL_RCC_GET_DFSDM1AUDIO_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1ASEL))
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /** @brief Macro to configure the DFSDM2 clock.
- * @param __DFSDM2_CLKSOURCE__ specifies the DFSDM1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_DFSDM2CLKSOURCE_PCLK2: PCLK2 clock used as kernel clock.
- * @arg RCC_DFSDM2CLKSOURCE_SYSCLK: System clock used as kernel clock.
- * @retval None
- */
-#define __HAL_RCC_DFSDM2_CONFIG(__DFSDM2_CLKSOURCE__) MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL, (__DFSDM2_CLKSOURCE__))
-
-/** @brief Macro to get the DFSDM2 clock source.
- * @retval The clock source can be one of the following values:
- * @arg RCC_DFSDM2CLKSOURCE_PCLK2: PCLK2 clock used as kernel clock.
- * @arg RCC_DFSDM2CLKSOURCE_SYSCLK: System clock used as kernel clock.
- */
-#define __HAL_RCC_GET_DFSDM2_SOURCE() ((uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL)))
-
-/** @brief Macro to configure DFSDM1 Audio clock source selection.
- * @note This configuration is only available with STM32F413xx/STM32F423xx Devices.
- * @param __SOURCE__ specifies the DFSDM2 Audio clock source.
- * This parameter can be one of the following values:
- * @arg RCC_DFSDM2AUDIOCLKSOURCE_I2S1: CK_I2S_PCLK1 selected as audio clock
- * @arg RCC_DFSDM2AUDIOCLKSOURCE_I2S2: CK_I2S_PCLK2 selected as audio clock
- */
-#define __HAL_RCC_DFSDM2AUDIO_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM2ASEL, (__SOURCE__)))
-
-/** @brief Macro to Get DFSDM2 Audio clock source selection.
- * @note This configuration is only available with STM32F413xx/STM32F423xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_DFSDM2AUDIOCLKSOURCE_I2S1: CK_I2S_PCLK1 selected as audio clock
- * @arg RCC_DFSDM2AUDIOCLKSOURCE_I2S2: CK_I2S_PCLK2 selected as audio clock
- */
-#define __HAL_RCC_GET_DFSDM2AUDIO_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM2ASEL))
-
-/** @brief Macro to configure SAI1BlockA clock source selection.
- * @note The SAI peripheral is only available with STM32F413xx/STM32F423xx Devices.
- * @note This function must be called before enabling PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI Block A clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAIACLKSOURCE_PLLI2SR: PLLI2S_R clock divided (R2) used as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_EXT: External clock mapped on the I2S_CKIN pinused as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_PLLR: PLL_R clock divided (R1) used as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI1ASRC, (__SOURCE__)))
-
-/** @brief Macro to Get SAI1 BlockA clock source selection.
- * @note This configuration is only available with STM32F413xx/STM32F423xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SAIACLKSOURCE_PLLI2SR: PLLI2S_R clock divided (R2) used as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_EXT: External clock mapped on the I2S_CKIN pinused as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_PLLR: PLL_R clock divided (R1) used as SAI1 Block A clock.
- * @arg RCC_SAIACLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_SAI_BLOCKA_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_SAI1ASRC))
-
-/** @brief Macro to configure SAI1 BlockB clock source selection.
- * @note The SAI peripheral is only available with STM32F413xx/STM32F423xx Devices.
- * @note This function must be called before enabling PLLSAI, PLLI2S and
- * the SAI clock.
- * @param __SOURCE__ specifies the SAI Block B clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SAIBCLKSOURCE_PLLI2SR: PLLI2S_R clock divided (R2) used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_PLLR: PLL_R clock divided (R1) used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SAI1BSRC, (__SOURCE__)))
-
-/** @brief Macro to Get SAI1 BlockB clock source selection.
- * @note This configuration is only available with STM32F413xx/STM32F423xx Devices.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SAIBCLKSOURCE_PLLI2SR: PLLI2S_R clock divided (R2) used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_PLLR: PLL_R clock divided (R1) used as SAI1 Block A clock.
- * @arg RCC_SAIBCLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_SAI_BLOCKB_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_SAI1BSRC))
-
-/** @brief Macro to configure the LPTIM1 clock.
- * @param __SOURCE__ specifies the LPTIM1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_LPTIM1CLKSOURCE_PCLK1: PCLK selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_HSI: HSI clock selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSI: LSI selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSE: LSE selected as LPTIM1 clock
- */
-#define __HAL_RCC_LPTIM1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the LPTIM1 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_LPTIM1CLKSOURCE_PCLK1: PCLK selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_HSI: HSI clock selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSI: LSI selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSE: LSE selected as LPTIM1 clock
- */
-#define __HAL_RCC_GET_LPTIM1_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL))
-#endif /* STM32F413xx || STM32F423xx */
-
-/** @brief Macro to configure I2S APB1 clock source selection.
- * @param __SOURCE__ specifies the I2S APB1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SAPB1CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR.
- * @arg RCC_I2SAPB1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_I2S_APB1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_I2S1SRC, (__SOURCE__)))
-
-/** @brief Macro to Get I2S APB1 clock source selection.
- * @retval The clock source can be one of the following values:
- * @arg RCC_I2SAPB1CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR.
- * @arg RCC_I2SAPB1CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLR: PLL VCO Output divided by PLLR.
- * @arg RCC_I2SAPB1CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_I2S_APB1_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_I2S1SRC))
-
-/** @brief Macro to configure I2S APB2 clock source selection.
- * @param __SOURCE__ specifies the I2S APB2 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SAPB2CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR.
- * @arg RCC_I2SAPB2CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_I2S_APB2_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_I2S2SRC, (__SOURCE__)))
-
-/** @brief Macro to Get I2S APB2 clock source selection.
- * @retval The clock source can be one of the following values:
- * @arg RCC_I2SAPB2CLKSOURCE_PLLI2S: PLLI2S VCO output clock divided by PLLI2SR.
- * @arg RCC_I2SAPB2CLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLR: PLL VCO Output divided by PLLR.
- * @arg RCC_I2SAPB2CLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- */
-#define __HAL_RCC_GET_I2S_APB2_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_I2S2SRC))
-
-/** @brief Macro to configure the PLL I2S clock source (PLLI2SCLK).
- * @note This macro must be called before enabling the I2S APB clock.
- * @param __SOURCE__ specifies the I2S clock source.
- * This parameter can be one of the following values:
- * @arg RCC_PLLI2SCLKSOURCE_PLLSRC: HSI or HSE depending from PLL source Clock.
- * @arg RCC_PLLI2SCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin
- * used as I2S clock source.
- */
-#define __HAL_RCC_PLL_I2S_CONFIG(__SOURCE__) (*(__IO uint32_t *) RCC_PLLI2SCFGR_PLLI2SSRC_BB = (__SOURCE__))
-
-/** @brief Macro to configure the FMPI2C1 clock.
- * @param __SOURCE__ specifies the FMPI2C1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_FMPI2C1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the FMPI2C1 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_GET_FMPI2C1_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL))
-
-/** @brief Macro to configure the CLK48 clock.
- * @param __SOURCE__ specifies the CLK48 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLI2SQ: PLLI2S VCO Output divided by PLLI2SQ used as CLK48 clock.
- */
-#define __HAL_RCC_CLK48_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the CLK48 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_CLK48CLKSOURCE_PLLQ: PLL VCO Output divided by PLLQ used as CLK48 clock.
- * @arg RCC_CLK48CLKSOURCE_PLLI2SQ: PLLI2S VCO Output divided by PLLI2SQ used as CLK48 clock
- */
-#define __HAL_RCC_GET_CLK48_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL))
-
-/** @brief Macro to configure the SDIO clock.
- * @param __SOURCE__ specifies the SDIO clock source.
- * This parameter can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_SDIO_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the SDIO clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_SDIOCLKSOURCE_CLK48: CLK48 output used as SDIO clock.
- * @arg RCC_SDIOCLKSOURCE_SYSCLK: System clock output used as SDIO clock.
- */
-#define __HAL_RCC_GET_SDIO_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL))
-
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/** @brief Macro to configure I2S clock source selection.
- * @param __SOURCE__ specifies the I2S clock source.
- * This parameter can be one of the following values:
- * @arg RCC_I2SAPBCLKSOURCE_PLLR: PLL VCO output clock divided by PLLR.
- * @arg RCC_I2SAPBCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPBCLKSOURCE_PLLSRC: HSI/HSE depends on PLLSRC.
- */
-#define __HAL_RCC_I2S_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_I2SSRC, (__SOURCE__)))
-
-/** @brief Macro to Get I2S clock source selection.
- * @retval The clock source can be one of the following values:
- * @arg RCC_I2SAPBCLKSOURCE_PLLR: PLL VCO output clock divided by PLLR.
- * @arg RCC_I2SAPBCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin.
- * @arg RCC_I2SAPBCLKSOURCE_PLLSRC: HSI/HSE depends on PLLSRC.
- */
-#define __HAL_RCC_GET_I2S_SOURCE() (READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_I2SSRC))
-
-/** @brief Macro to configure the FMPI2C1 clock.
- * @param __SOURCE__ specifies the FMPI2C1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_FMPI2C1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the FMPI2C1 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_FMPI2C1CLKSOURCE_PCLK1: PCLK1 selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_SYSCLK: SYS clock selected as FMPI2C1 clock
- * @arg RCC_FMPI2C1CLKSOURCE_HSI: HSI selected as FMPI2C1 clock
- */
-#define __HAL_RCC_GET_FMPI2C1_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL))
-
-/** @brief Macro to configure the LPTIM1 clock.
- * @param __SOURCE__ specifies the LPTIM1 clock source.
- * This parameter can be one of the following values:
- * @arg RCC_LPTIM1CLKSOURCE_PCLK1: PCLK1 selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_HSI: HSI clock selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSI: LSI selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSE: LSE selected as LPTIM1 clock
- */
-#define __HAL_RCC_LPTIM1_CONFIG(__SOURCE__) (MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL, (uint32_t)(__SOURCE__)))
-
-/** @brief Macro to Get the LPTIM1 clock.
- * @retval The clock source can be one of the following values:
- * @arg RCC_LPTIM1CLKSOURCE_PCLK1: PCLK1 selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_HSI: HSI clock selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSI: LSI selected as LPTIM1 clock
- * @arg RCC_LPTIM1CLKSOURCE_LSE: LSE selected as LPTIM1 clock
- */
-#define __HAL_RCC_GET_LPTIM1_SOURCE() (READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/** @brief Macro to configure the Timers clocks prescalers
- * @note This feature is only available with STM32F429x/439x Devices.
- * @param __PRESC__ specifies the Timers clocks prescalers selection
- * This parameter can be one of the following values:
- * @arg RCC_TIMPRES_DESACTIVATED: The Timers kernels clocks prescaler is
- * equal to HPRE if PPREx is corresponding to division by 1 or 2,
- * else it is equal to [(HPRE * PPREx) / 2] if PPREx is corresponding to
- * division by 4 or more.
- * @arg RCC_TIMPRES_ACTIVATED: The Timers kernels clocks prescaler is
- * equal to HPRE if PPREx is corresponding to division by 1, 2 or 4,
- * else it is equal to [(HPRE * PPREx) / 4] if PPREx is corresponding
- * to division by 8 or more.
- */
-#define __HAL_RCC_TIMCLKPRESCALER(__PRESC__) (*(__IO uint32_t *) RCC_DCKCFGR_TIMPRE_BB = (__PRESC__))
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx) || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE ||\
- STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx ||\
- STM32F423xx */
-
-/*----------------------------------------------------------------------------*/
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/** @brief Enable PLLSAI_RDY interrupt.
- */
-#define __HAL_RCC_PLLSAI_ENABLE_IT() (RCC->CIR |= (RCC_CIR_PLLSAIRDYIE))
-
-/** @brief Disable PLLSAI_RDY interrupt.
- */
-#define __HAL_RCC_PLLSAI_DISABLE_IT() (RCC->CIR &= ~(RCC_CIR_PLLSAIRDYIE))
-
-/** @brief Clear the PLLSAI RDY interrupt pending bits.
- */
-#define __HAL_RCC_PLLSAI_CLEAR_IT() (RCC->CIR |= (RCC_CIR_PLLSAIRDYF))
-
-/** @brief Check the PLLSAI RDY interrupt has occurred or not.
- * @retval The new state (TRUE or FALSE).
- */
-#define __HAL_RCC_PLLSAI_GET_IT() ((RCC->CIR & (RCC_CIR_PLLSAIRDYIE)) == (RCC_CIR_PLLSAIRDYIE))
-
-/** @brief Check PLLSAI RDY flag is set or not.
- * @retval The new state (TRUE or FALSE).
- */
-#define __HAL_RCC_PLLSAI_GET_FLAG() ((RCC->CR & (RCC_CR_PLLSAIRDY)) == (RCC_CR_PLLSAIRDY))
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/** @brief Macros to enable or disable the RCC MCO1 feature.
- */
-#define __HAL_RCC_MCO1_ENABLE() (*(__IO uint32_t *) RCC_CFGR_MCO1EN_BB = ENABLE)
-#define __HAL_RCC_MCO1_DISABLE() (*(__IO uint32_t *) RCC_CFGR_MCO1EN_BB = DISABLE)
-
-/** @brief Macros to enable or disable the RCC MCO2 feature.
- */
-#define __HAL_RCC_MCO2_ENABLE() (*(__IO uint32_t *) RCC_CFGR_MCO2EN_BB = ENABLE)
-#define __HAL_RCC_MCO2_DISABLE() (*(__IO uint32_t *) RCC_CFGR_MCO2EN_BB = DISABLE)
-
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RCCEx_Exported_Functions
- * @{
- */
-
-/** @addtogroup RCCEx_Exported_Functions_Group1
- * @{
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
-
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-void HAL_RCCEx_SelectLSEMode(uint8_t Mode);
-#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-#if defined(RCC_PLLI2S_SUPPORT)
-HAL_StatusTypeDef HAL_RCCEx_EnablePLLI2S(RCC_PLLI2SInitTypeDef *PLLI2SInit);
-HAL_StatusTypeDef HAL_RCCEx_DisablePLLI2S(void);
-#endif /* RCC_PLLI2S_SUPPORT */
-#if defined(RCC_PLLSAI_SUPPORT)
-HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI(RCC_PLLSAIInitTypeDef *PLLSAIInit);
-HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI(void);
-#endif /* RCC_PLLSAI_SUPPORT */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup RCCEx_Private_Constants RCCEx Private Constants
- * @{
- */
-
-/** @defgroup RCCEx_BitAddress_AliasRegion RCC BitAddress AliasRegion
- * @brief RCC registers bit address in the alias region
- * @{
- */
-/* --- CR Register ---*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/* Alias word address of PLLSAION bit */
-#define RCC_PLLSAION_BIT_NUMBER 0x1CU
-#define RCC_CR_PLLSAION_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLSAION_BIT_NUMBER * 4U))
-
-#define PLLSAI_TIMEOUT_VALUE 2U /* Timeout value fixed to 2 ms */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/* Alias word address of PLLI2SON bit */
-#define RCC_PLLI2SON_BIT_NUMBER 0x1AU
-#define RCC_CR_PLLI2SON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLI2SON_BIT_NUMBER * 4U))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
- STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-/* --- DCKCFGR Register ---*/
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
- defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/* Alias word address of TIMPRE bit */
-#define RCC_DCKCFGR_OFFSET (RCC_OFFSET + 0x8CU)
-#define RCC_TIMPRE_BIT_NUMBER 0x18U
-#define RCC_DCKCFGR_TIMPRE_BB (PERIPH_BB_BASE + (RCC_DCKCFGR_OFFSET * 32U) + (RCC_TIMPRE_BIT_NUMBER * 4U))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F410xx || STM32F401xC ||\
- STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
- STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-/* --- CFGR Register ---*/
-#define RCC_CFGR_OFFSET (RCC_OFFSET + 0x08U)
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx)
-/* Alias word address of I2SSRC bit */
-#define RCC_I2SSRC_BIT_NUMBER 0x17U
-#define RCC_CFGR_I2SSRC_BB (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32U) + (RCC_I2SSRC_BIT_NUMBER * 4U))
-
-#define PLLI2S_TIMEOUT_VALUE 2U /* Timeout value fixed to 2 ms */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
-/* --- PLLI2SCFGR Register ---*/
-#define RCC_PLLI2SCFGR_OFFSET (RCC_OFFSET + 0x84U)
-/* Alias word address of PLLI2SSRC bit */
-#define RCC_PLLI2SSRC_BIT_NUMBER 0x16U
-#define RCC_PLLI2SCFGR_PLLI2SSRC_BB (PERIPH_BB_BASE + (RCC_PLLI2SCFGR_OFFSET * 32U) + (RCC_PLLI2SSRC_BIT_NUMBER * 4U))
-
-#define PLLI2S_TIMEOUT_VALUE 2U /* Timeout value fixed to 2 ms */
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx | STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/* Alias word address of MCO1EN bit */
-#define RCC_MCO1EN_BIT_NUMBER 0x8U
-#define RCC_CFGR_MCO1EN_BB (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32U) + (RCC_MCO1EN_BIT_NUMBER * 4U))
-
-/* Alias word address of MCO2EN bit */
-#define RCC_MCO2EN_BIT_NUMBER 0x9U
-#define RCC_CFGR_MCO2EN_BB (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32U) + (RCC_MCO2EN_BIT_NUMBER * 4U))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#define PLL_TIMEOUT_VALUE 2U /* 2 ms */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup RCCEx_Private_Macros RCCEx Private Macros
- * @{
- */
-/** @defgroup RCCEx_IS_RCC_Definitions RCC Private macros to check input parameters
- * @{
- */
-#define IS_RCC_PLLN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U))
-#define IS_RCC_PLLI2SN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U))
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x0000007FU))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x00000007U))
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x0000000FU))
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x0000001FU))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F446xx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x00000FFFU))
-#endif /* STM32F446xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x000001FFU))
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x000003FFU))
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_RCC_PERIPHCLOCK(SELECTION) ((1U <= (SELECTION)) && ((SELECTION) <= 0x00007FFFU))
-#endif /* STM32F413xx || STM32F423xx */
-
-#define IS_RCC_PLLI2SR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_RCC_PLLI2SQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U))
-
-#define IS_RCC_PLLSAIN_VALUE(VALUE) ((50U <= (VALUE)) && ((VALUE) <= 432U))
-
-#define IS_RCC_PLLSAIQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U))
-
-#define IS_RCC_PLLSAIR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#define IS_RCC_PLLSAI_DIVQ_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U))
-
-#define IS_RCC_PLLI2S_DIVQ_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U))
-
-#define IS_RCC_PLLSAI_DIVR_VALUE(VALUE) (((VALUE) == RCC_PLLSAIDIVR_2) ||\
- ((VALUE) == RCC_PLLSAIDIVR_4) ||\
- ((VALUE) == RCC_PLLSAIDIVR_8) ||\
- ((VALUE) == RCC_PLLSAIDIVR_16))
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_RCC_PLLI2SM_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 63U))
-
-#define IS_RCC_LSE_MODE(MODE) (((MODE) == RCC_LSE_LOWPOWER_MODE) ||\
- ((MODE) == RCC_LSE_HIGHDRIVE_MODE))
-#endif /* STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_RCC_PLLR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#define IS_RCC_LSE_MODE(MODE) (((MODE) == RCC_LSE_LOWPOWER_MODE) ||\
- ((MODE) == RCC_LSE_HIGHDRIVE_MODE))
-
-#define IS_RCC_FMPI2C1CLKSOURCE(SOURCE) (((SOURCE) == RCC_FMPI2C1CLKSOURCE_PCLK1) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_SYSCLK) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_HSI))
-
-#define IS_RCC_LPTIM1CLKSOURCE(SOURCE) (((SOURCE) == RCC_LPTIM1CLKSOURCE_PCLK1) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_HSI) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_LSI) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_LSE))
-
-#define IS_RCC_I2SAPBCLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SAPBCLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_I2SAPBCLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_I2SAPBCLKSOURCE_PLLSRC))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F446xx)
-#define IS_RCC_PLLR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#define IS_RCC_PLLI2SP_VALUE(VALUE) (((VALUE) == RCC_PLLI2SP_DIV2) ||\
- ((VALUE) == RCC_PLLI2SP_DIV4) ||\
- ((VALUE) == RCC_PLLI2SP_DIV6) ||\
- ((VALUE) == RCC_PLLI2SP_DIV8))
-
-#define IS_RCC_PLLSAIM_VALUE(VALUE) ((VALUE) <= 63U)
-
-#define IS_RCC_PLLSAIP_VALUE(VALUE) (((VALUE) == RCC_PLLSAIP_DIV2) ||\
- ((VALUE) == RCC_PLLSAIP_DIV4) ||\
- ((VALUE) == RCC_PLLSAIP_DIV6) ||\
- ((VALUE) == RCC_PLLSAIP_DIV8))
-
-#define IS_RCC_SAI1CLKSOURCE(SOURCE) (((SOURCE) == RCC_SAI1CLKSOURCE_PLLSAI) ||\
- ((SOURCE) == RCC_SAI1CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_SAI1CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_SAI1CLKSOURCE_EXT))
-
-#define IS_RCC_SAI2CLKSOURCE(SOURCE) (((SOURCE) == RCC_SAI2CLKSOURCE_PLLSAI) ||\
- ((SOURCE) == RCC_SAI2CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_SAI2CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_SAI2CLKSOURCE_PLLSRC))
-
-#define IS_RCC_I2SAPB1CLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLSRC))
-
- #define IS_RCC_I2SAPB2CLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLSRC))
-
-#define IS_RCC_FMPI2C1CLKSOURCE(SOURCE) (((SOURCE) == RCC_FMPI2C1CLKSOURCE_PCLK1) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_SYSCLK) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_HSI))
-
-#define IS_RCC_CECCLKSOURCE(SOURCE) (((SOURCE) == RCC_CECCLKSOURCE_HSI) ||\
- ((SOURCE) == RCC_CECCLKSOURCE_LSE))
-
-#define IS_RCC_CLK48CLKSOURCE(SOURCE) (((SOURCE) == RCC_CLK48CLKSOURCE_PLLQ) ||\
- ((SOURCE) == RCC_CLK48CLKSOURCE_PLLSAIP))
-
-#define IS_RCC_SDIOCLKSOURCE(SOURCE) (((SOURCE) == RCC_SDIOCLKSOURCE_CLK48) ||\
- ((SOURCE) == RCC_SDIOCLKSOURCE_SYSCLK))
-
-#define IS_RCC_SPDIFRXCLKSOURCE(SOURCE) (((SOURCE) == RCC_SPDIFRXCLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_SPDIFRXCLKSOURCE_PLLI2SP))
-#endif /* STM32F446xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-#define IS_RCC_PLLR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#define IS_RCC_PLLSAIP_VALUE(VALUE) (((VALUE) == RCC_PLLSAIP_DIV2) ||\
- ((VALUE) == RCC_PLLSAIP_DIV4) ||\
- ((VALUE) == RCC_PLLSAIP_DIV6) ||\
- ((VALUE) == RCC_PLLSAIP_DIV8))
-
-#define IS_RCC_CLK48CLKSOURCE(SOURCE) (((SOURCE) == RCC_CLK48CLKSOURCE_PLLQ) ||\
- ((SOURCE) == RCC_CLK48CLKSOURCE_PLLSAIP))
-
-#define IS_RCC_SDIOCLKSOURCE(SOURCE) (((SOURCE) == RCC_SDIOCLKSOURCE_CLK48) ||\
- ((SOURCE) == RCC_SDIOCLKSOURCE_SYSCLK))
-
-#define IS_RCC_DSIBYTELANECLKSOURCE(SOURCE) (((SOURCE) == RCC_DSICLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_DSICLKSOURCE_DSIPHY))
-
-#define IS_RCC_LSE_MODE(MODE) (((MODE) == RCC_LSE_LOWPOWER_MODE) ||\
- ((MODE) == RCC_LSE_HIGHDRIVE_MODE))
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_RCC_PLLI2SQ_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 15U))
-
-#define IS_RCC_PLLR_VALUE(VALUE) ((2U <= (VALUE)) && ((VALUE) <= 7U))
-
-#define IS_RCC_PLLI2SCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_PLLI2SCLKSOURCE_PLLSRC) || \
- ((__SOURCE__) == RCC_PLLI2SCLKSOURCE_EXT))
-
-#define IS_RCC_I2SAPB1CLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_I2SAPB1CLKSOURCE_PLLSRC))
-
- #define IS_RCC_I2SAPB2CLKSOURCE(SOURCE) (((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLI2S) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_I2SAPB2CLKSOURCE_PLLSRC))
-
-#define IS_RCC_FMPI2C1CLKSOURCE(SOURCE) (((SOURCE) == RCC_FMPI2C1CLKSOURCE_PCLK1) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_SYSCLK) ||\
- ((SOURCE) == RCC_FMPI2C1CLKSOURCE_HSI))
-
-#define IS_RCC_CLK48CLKSOURCE(SOURCE) (((SOURCE) == RCC_CLK48CLKSOURCE_PLLQ) ||\
- ((SOURCE) == RCC_CLK48CLKSOURCE_PLLI2SQ))
-
-#define IS_RCC_SDIOCLKSOURCE(SOURCE) (((SOURCE) == RCC_SDIOCLKSOURCE_CLK48) ||\
- ((SOURCE) == RCC_SDIOCLKSOURCE_SYSCLK))
-
-#define IS_RCC_DFSDM1CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_DFSDM1CLKSOURCE_PCLK2) || \
- ((__SOURCE__) == RCC_DFSDM1CLKSOURCE_SYSCLK))
-
-#define IS_RCC_DFSDM1AUDIOCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_I2S1) || \
- ((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_I2S2))
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
-#define IS_RCC_DFSDM2CLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_DFSDM2CLKSOURCE_PCLK2) || \
- ((__SOURCE__) == RCC_DFSDM2CLKSOURCE_SYSCLK))
-
-#define IS_RCC_DFSDM2AUDIOCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_DFSDM2AUDIOCLKSOURCE_I2S1) || \
- ((__SOURCE__) == RCC_DFSDM2AUDIOCLKSOURCE_I2S2))
-
-#define IS_RCC_LPTIM1CLKSOURCE(SOURCE) (((SOURCE) == RCC_LPTIM1CLKSOURCE_PCLK1) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_HSI) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_LSI) ||\
- ((SOURCE) == RCC_LPTIM1CLKSOURCE_LSE))
-
-#define IS_RCC_SAIACLKSOURCE(SOURCE) (((SOURCE) == RCC_SAIACLKSOURCE_PLLI2SR) ||\
- ((SOURCE) == RCC_SAIACLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_SAIACLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_SAIACLKSOURCE_PLLSRC))
-
-#define IS_RCC_SAIBCLKSOURCE(SOURCE) (((SOURCE) == RCC_SAIBCLKSOURCE_PLLI2SR) ||\
- ((SOURCE) == RCC_SAIBCLKSOURCE_EXT) ||\
- ((SOURCE) == RCC_SAIBCLKSOURCE_PLLR) ||\
- ((SOURCE) == RCC_SAIBCLKSOURCE_PLLSRC))
-
-#define IS_RCC_PLL_DIVR_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U))
-
-#define IS_RCC_PLLI2S_DIVR_VALUE(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 32U))
-
-#endif /* STM32F413xx || STM32F423xx */
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
- defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
- defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
-
-#define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2SOURCE_SYSCLK) || ((SOURCE) == RCC_MCO2SOURCE_PLLI2SCLK)|| \
- ((SOURCE) == RCC_MCO2SOURCE_HSE) || ((SOURCE) == RCC_MCO2SOURCE_PLLCLK))
-
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
- STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || \
- STM32F412Rx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-#define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2SOURCE_SYSCLK) || ((SOURCE) == RCC_MCO2SOURCE_I2SCLK)|| \
- ((SOURCE) == RCC_MCO2SOURCE_HSE) || ((SOURCE) == RCC_MCO2SOURCE_PLLCLK))
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_RCC_EX_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h
deleted file mode 100644
index e3cc45009d12846dec0aec37ee3f6abea8afac56..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h
+++ /dev/null
@@ -1,2146 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_tim.h
- * @author MCD Application Team
- * @brief Header file of TIM HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef STM32F4xx_HAL_TIM_H
-#define STM32F4xx_HAL_TIM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup TIM
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup TIM_Exported_Types TIM Exported Types
- * @{
- */
-
-/**
- * @brief TIM Time base Configuration Structure definition
- */
-typedef struct
-{
- uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
-
- uint32_t CounterMode; /*!< Specifies the counter mode.
- This parameter can be a value of @ref TIM_Counter_Mode */
-
- uint32_t Period; /*!< Specifies the period value to be loaded into the active
- Auto-Reload Register at the next update event.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
-
- uint32_t ClockDivision; /*!< Specifies the clock division.
- This parameter can be a value of @ref TIM_ClockDivision */
-
- uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
- reaches zero, an update event is generated and counting restarts
- from the RCR value (N).
- This means in PWM mode that (N+1) corresponds to:
- - the number of PWM periods in edge-aligned mode
- - the number of half PWM period in center-aligned mode
- GP timers: this parameter must be a number between Min_Data = 0x00 and
- Max_Data = 0xFF.
- Advanced timers: this parameter must be a number between Min_Data = 0x0000 and
- Max_Data = 0xFFFF. */
-
- uint32_t AutoReloadPreload; /*!< Specifies the auto-reload preload.
- This parameter can be a value of @ref TIM_AutoReloadPreload */
-} TIM_Base_InitTypeDef;
-
-/**
- * @brief TIM Output Compare Configuration Structure definition
- */
-typedef struct
-{
- uint32_t OCMode; /*!< Specifies the TIM mode.
- This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
-
- uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
-
- uint32_t OCPolarity; /*!< Specifies the output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_Polarity */
-
- uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
- @note This parameter is valid only for timer instances supporting break feature. */
-
- uint32_t OCFastMode; /*!< Specifies the Fast mode state.
- This parameter can be a value of @ref TIM_Output_Fast_State
- @note This parameter is valid only in PWM1 and PWM2 mode. */
-
-
- uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_Idle_State
- @note This parameter is valid only for timer instances supporting break feature. */
-
- uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
- @note This parameter is valid only for timer instances supporting break feature. */
-} TIM_OC_InitTypeDef;
-
-/**
- * @brief TIM One Pulse Mode Configuration Structure definition
- */
-typedef struct
-{
- uint32_t OCMode; /*!< Specifies the TIM mode.
- This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
-
- uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
-
- uint32_t OCPolarity; /*!< Specifies the output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_Polarity */
-
- uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
- @note This parameter is valid only for timer instances supporting break feature. */
-
- uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_Idle_State
- @note This parameter is valid only for timer instances supporting break feature. */
-
- uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
- @note This parameter is valid only for timer instances supporting break feature. */
-
- uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
- uint32_t ICSelection; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
- uint32_t ICFilter; /*!< Specifies the input capture filter.
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_OnePulse_InitTypeDef;
-
-/**
- * @brief TIM Input Capture Configuration Structure definition
- */
-typedef struct
-{
- uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
- uint32_t ICSelection; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
- uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
- uint32_t ICFilter; /*!< Specifies the input capture filter.
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_IC_InitTypeDef;
-
-/**
- * @brief TIM Encoder Configuration Structure definition
- */
-typedef struct
-{
- uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Encoder_Mode */
-
- uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Encoder_Input_Polarity */
-
- uint32_t IC1Selection; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
- uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
- uint32_t IC1Filter; /*!< Specifies the input capture filter.
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-
- uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Encoder_Input_Polarity */
-
- uint32_t IC2Selection; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
- uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
- uint32_t IC2Filter; /*!< Specifies the input capture filter.
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_Encoder_InitTypeDef;
-
-/**
- * @brief Clock Configuration Handle Structure definition
- */
-typedef struct
-{
- uint32_t ClockSource; /*!< TIM clock sources
- This parameter can be a value of @ref TIM_Clock_Source */
- uint32_t ClockPolarity; /*!< TIM clock polarity
- This parameter can be a value of @ref TIM_Clock_Polarity */
- uint32_t ClockPrescaler; /*!< TIM clock prescaler
- This parameter can be a value of @ref TIM_Clock_Prescaler */
- uint32_t ClockFilter; /*!< TIM clock filter
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_ClockConfigTypeDef;
-
-/**
- * @brief TIM Clear Input Configuration Handle Structure definition
- */
-typedef struct
-{
- uint32_t ClearInputState; /*!< TIM clear Input state
- This parameter can be ENABLE or DISABLE */
- uint32_t ClearInputSource; /*!< TIM clear Input sources
- This parameter can be a value of @ref TIM_ClearInput_Source */
- uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
- This parameter can be a value of @ref TIM_ClearInput_Polarity */
- uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
- This parameter must be 0: When OCRef clear feature is used with ETR source,
- ETR prescaler must be off */
- uint32_t ClearInputFilter; /*!< TIM Clear Input filter
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-} TIM_ClearInputConfigTypeDef;
-
-/**
- * @brief TIM Master configuration Structure definition
- */
-typedef struct
-{
- uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
- This parameter can be a value of @ref TIM_Master_Mode_Selection */
- uint32_t MasterSlaveMode; /*!< Master/slave mode selection
- This parameter can be a value of @ref TIM_Master_Slave_Mode
- @note When the Master/slave mode is enabled, the effect of
- an event on the trigger input (TRGI) is delayed to allow a
- perfect synchronization between the current timer and its
- slaves (through TRGO). It is not mandatory in case of timer
- synchronization mode. */
-} TIM_MasterConfigTypeDef;
-
-/**
- * @brief TIM Slave configuration Structure definition
- */
-typedef struct
-{
- uint32_t SlaveMode; /*!< Slave mode selection
- This parameter can be a value of @ref TIM_Slave_Mode */
- uint32_t InputTrigger; /*!< Input Trigger source
- This parameter can be a value of @ref TIM_Trigger_Selection */
- uint32_t TriggerPolarity; /*!< Input Trigger polarity
- This parameter can be a value of @ref TIM_Trigger_Polarity */
- uint32_t TriggerPrescaler; /*!< Input trigger prescaler
- This parameter can be a value of @ref TIM_Trigger_Prescaler */
- uint32_t TriggerFilter; /*!< Input trigger filter
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-
-} TIM_SlaveConfigTypeDef;
-
-/**
- * @brief TIM Break input(s) and Dead time configuration Structure definition
- * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
- * filter and polarity.
- */
-typedef struct
-{
- uint32_t OffStateRunMode; /*!< TIM off state in run mode, This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
-
- uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode, This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
-
- uint32_t LockLevel; /*!< TIM Lock level, This parameter can be a value of @ref TIM_Lock_level */
-
- uint32_t DeadTime; /*!< TIM dead Time, This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
-
- uint32_t BreakState; /*!< TIM Break State, This parameter can be a value of @ref TIM_Break_Input_enable_disable */
-
- uint32_t BreakPolarity; /*!< TIM Break input polarity, This parameter can be a value of @ref TIM_Break_Polarity */
-
- uint32_t BreakFilter; /*!< Specifies the break input filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-
- uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state, This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
-
-} TIM_BreakDeadTimeConfigTypeDef;
-
-/**
- * @brief HAL State structures definition
- */
-typedef enum
-{
- HAL_TIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
- HAL_TIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
- HAL_TIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
- HAL_TIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
- HAL_TIM_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
-} HAL_TIM_StateTypeDef;
-
-/**
- * @brief TIM Channel States definition
- */
-typedef enum
-{
- HAL_TIM_CHANNEL_STATE_RESET = 0x00U, /*!< TIM Channel initial state */
- HAL_TIM_CHANNEL_STATE_READY = 0x01U, /*!< TIM Channel ready for use */
- HAL_TIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the TIM channel */
-} HAL_TIM_ChannelStateTypeDef;
-
-/**
- * @brief DMA Burst States definition
- */
-typedef enum
-{
- HAL_DMA_BURST_STATE_RESET = 0x00U, /*!< DMA Burst initial state */
- HAL_DMA_BURST_STATE_READY = 0x01U, /*!< DMA Burst ready for use */
- HAL_DMA_BURST_STATE_BUSY = 0x02U, /*!< Ongoing DMA Burst */
-} HAL_TIM_DMABurstStateTypeDef;
-
-/**
- * @brief HAL Active channel structures definition
- */
-typedef enum
-{
- HAL_TIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */
- HAL_TIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */
- HAL_TIM_ACTIVE_CHANNEL_3 = 0x04U, /*!< The active channel is 3 */
- HAL_TIM_ACTIVE_CHANNEL_4 = 0x08U, /*!< The active channel is 4 */
- HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */
-} HAL_TIM_ActiveChannel;
-
-/**
- * @brief TIM Time Base Handle Structure definition
- */
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-typedef struct __TIM_HandleTypeDef
-#else
-typedef struct
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-{
- TIM_TypeDef *Instance; /*!< Register base address */
- TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */
- HAL_TIM_ActiveChannel Channel; /*!< Active channel */
- DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array
- This array is accessed by a @ref DMA_Handle_index */
- HAL_LockTypeDef Lock; /*!< Locking object */
- __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */
- __IO HAL_TIM_ChannelStateTypeDef ChannelState[4]; /*!< TIM channel operation state */
- __IO HAL_TIM_ChannelStateTypeDef ChannelNState[4]; /*!< TIM complementary channel operation state */
- __IO HAL_TIM_DMABurstStateTypeDef DMABurstState; /*!< DMA burst operation state */
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- void (* Base_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Base Msp Init Callback */
- void (* Base_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Base Msp DeInit Callback */
- void (* IC_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM IC Msp Init Callback */
- void (* IC_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM IC Msp DeInit Callback */
- void (* OC_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM OC Msp Init Callback */
- void (* OC_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM OC Msp DeInit Callback */
- void (* PWM_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM PWM Msp Init Callback */
- void (* PWM_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM PWM Msp DeInit Callback */
- void (* OnePulse_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM One Pulse Msp Init Callback */
- void (* OnePulse_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM One Pulse Msp DeInit Callback */
- void (* Encoder_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Encoder Msp Init Callback */
- void (* Encoder_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Encoder Msp DeInit Callback */
- void (* HallSensor_MspInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Hall Sensor Msp Init Callback */
- void (* HallSensor_MspDeInitCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Hall Sensor Msp DeInit Callback */
- void (* PeriodElapsedCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Period Elapsed Callback */
- void (* PeriodElapsedHalfCpltCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Period Elapsed half complete Callback */
- void (* TriggerCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Trigger Callback */
- void (* TriggerHalfCpltCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Trigger half complete Callback */
- void (* IC_CaptureCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Input Capture Callback */
- void (* IC_CaptureHalfCpltCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Input Capture half complete Callback */
- void (* OC_DelayElapsedCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Output Compare Delay Elapsed Callback */
- void (* PWM_PulseFinishedCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM PWM Pulse Finished Callback */
- void (* PWM_PulseFinishedHalfCpltCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM PWM Pulse Finished half complete Callback */
- void (* ErrorCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Error Callback */
- void (* CommutationCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Commutation Callback */
- void (* CommutationHalfCpltCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Commutation half complete Callback */
- void (* BreakCallback)(struct __TIM_HandleTypeDef *htim); /*!< TIM Break Callback */
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-} TIM_HandleTypeDef;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-/**
- * @brief HAL TIM Callback ID enumeration definition
- */
-typedef enum
-{
- HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */
- , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */
- , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */
- , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */
- , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */
- , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */
- , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */
- , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */
- , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */
- , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */
- , HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */
- , HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */
- , HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */
- , HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */
-
- , HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */
- , HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */
- , HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */
- , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */
- , HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */
- , HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */
- , HAL_TIM_COMMUTATION_CB_ID = 0x18U /*!< TIM Commutation Callback ID */
- , HAL_TIM_COMMUTATION_HALF_CB_ID = 0x19U /*!< TIM Commutation half complete Callback ID */
- , HAL_TIM_BREAK_CB_ID = 0x1AU /*!< TIM Break Callback ID */
-} HAL_TIM_CallbackIDTypeDef;
-
-/**
- * @brief HAL TIM Callback pointer definition
- */
-typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to the TIM callback function */
-
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-/* End of exported types -----------------------------------------------------*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIM_Exported_Constants TIM Exported Constants
- * @{
- */
-
-/** @defgroup TIM_ClearInput_Source TIM Clear Input Source
- * @{
- */
-#define TIM_CLEARINPUTSOURCE_NONE 0x00000000U /*!< OCREF_CLR is disabled */
-#define TIM_CLEARINPUTSOURCE_ETR 0x00000001U /*!< OCREF_CLR is connected to ETRF input */
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_Base_address TIM DMA Base Address
- * @{
- */
-#define TIM_DMABASE_CR1 0x00000000U
-#define TIM_DMABASE_CR2 0x00000001U
-#define TIM_DMABASE_SMCR 0x00000002U
-#define TIM_DMABASE_DIER 0x00000003U
-#define TIM_DMABASE_SR 0x00000004U
-#define TIM_DMABASE_EGR 0x00000005U
-#define TIM_DMABASE_CCMR1 0x00000006U
-#define TIM_DMABASE_CCMR2 0x00000007U
-#define TIM_DMABASE_CCER 0x00000008U
-#define TIM_DMABASE_CNT 0x00000009U
-#define TIM_DMABASE_PSC 0x0000000AU
-#define TIM_DMABASE_ARR 0x0000000BU
-#define TIM_DMABASE_RCR 0x0000000CU
-#define TIM_DMABASE_CCR1 0x0000000DU
-#define TIM_DMABASE_CCR2 0x0000000EU
-#define TIM_DMABASE_CCR3 0x0000000FU
-#define TIM_DMABASE_CCR4 0x00000010U
-#define TIM_DMABASE_BDTR 0x00000011U
-#define TIM_DMABASE_DCR 0x00000012U
-#define TIM_DMABASE_DMAR 0x00000013U
-/**
- * @}
- */
-
-/** @defgroup TIM_Event_Source TIM Event Source
- * @{
- */
-#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
-#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
-#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
-#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
-#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
-#define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */
-#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */
-#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity
- * @{
- */
-#define TIM_INPUTCHANNELPOLARITY_RISING 0x00000000U /*!< Polarity for TIx source */
-#define TIM_INPUTCHANNELPOLARITY_FALLING TIM_CCER_CC1P /*!< Polarity for TIx source */
-#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */
-/**
- * @}
- */
-
-/** @defgroup TIM_ETR_Polarity TIM ETR Polarity
- * @{
- */
-#define TIM_ETRPOLARITY_INVERTED TIM_SMCR_ETP /*!< Polarity for ETR source */
-#define TIM_ETRPOLARITY_NONINVERTED 0x00000000U /*!< Polarity for ETR source */
-/**
- * @}
- */
-
-/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
- * @{
- */
-#define TIM_ETRPRESCALER_DIV1 0x00000000U /*!< No prescaler is used */
-#define TIM_ETRPRESCALER_DIV2 TIM_SMCR_ETPS_0 /*!< ETR input source is divided by 2 */
-#define TIM_ETRPRESCALER_DIV4 TIM_SMCR_ETPS_1 /*!< ETR input source is divided by 4 */
-#define TIM_ETRPRESCALER_DIV8 TIM_SMCR_ETPS /*!< ETR input source is divided by 8 */
-/**
- * @}
- */
-
-/** @defgroup TIM_Counter_Mode TIM Counter Mode
- * @{
- */
-#define TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as up-counter */
-#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as down-counter */
-#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0 /*!< Center-aligned mode 1 */
-#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1 /*!< Center-aligned mode 2 */
-#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS /*!< Center-aligned mode 3 */
-/**
- * @}
- */
-
-/** @defgroup TIM_ClockDivision TIM Clock Division
- * @{
- */
-#define TIM_CLOCKDIVISION_DIV1 0x00000000U /*!< Clock division: tDTS=tCK_INT */
-#define TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /*!< Clock division: tDTS=2*tCK_INT */
-#define TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /*!< Clock division: tDTS=4*tCK_INT */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_State TIM Output Compare State
- * @{
- */
-#define TIM_OUTPUTSTATE_DISABLE 0x00000000U /*!< Capture/Compare 1 output disabled */
-#define TIM_OUTPUTSTATE_ENABLE TIM_CCER_CC1E /*!< Capture/Compare 1 output enabled */
-/**
- * @}
- */
-
-/** @defgroup TIM_AutoReloadPreload TIM Auto-Reload Preload
- * @{
- */
-#define TIM_AUTORELOAD_PRELOAD_DISABLE 0x00000000U /*!< TIMx_ARR register is not buffered */
-#define TIM_AUTORELOAD_PRELOAD_ENABLE TIM_CR1_ARPE /*!< TIMx_ARR register is buffered */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Fast_State TIM Output Fast State
- * @{
- */
-#define TIM_OCFAST_DISABLE 0x00000000U /*!< Output Compare fast disable */
-#define TIM_OCFAST_ENABLE TIM_CCMR1_OC1FE /*!< Output Compare fast enable */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State
- * @{
- */
-#define TIM_OUTPUTNSTATE_DISABLE 0x00000000U /*!< OCxN is disabled */
-#define TIM_OUTPUTNSTATE_ENABLE TIM_CCER_CC1NE /*!< OCxN is enabled */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
- * @{
- */
-#define TIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */
-#define TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< Capture/Compare output polarity */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
- * @{
- */
-#define TIM_OCNPOLARITY_HIGH 0x00000000U /*!< Capture/Compare complementary output polarity */
-#define TIM_OCNPOLARITY_LOW TIM_CCER_CC1NP /*!< Capture/Compare complementary output polarity */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
- * @{
- */
-#define TIM_OCIDLESTATE_SET TIM_CR2_OIS1 /*!< Output Idle state: OCx=1 when MOE=0 */
-#define TIM_OCIDLESTATE_RESET 0x00000000U /*!< Output Idle state: OCx=0 when MOE=0 */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
- * @{
- */
-#define TIM_OCNIDLESTATE_SET TIM_CR2_OIS1N /*!< Complementary output Idle state: OCxN=1 when MOE=0 */
-#define TIM_OCNIDLESTATE_RESET 0x00000000U /*!< Complementary output Idle state: OCxN=0 when MOE=0 */
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
- * @{
- */
-#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Capture triggered by rising edge on timer input */
-#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Capture triggered by falling edge on timer input */
-#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Capture triggered by both rising and falling edges on timer input*/
-/**
- * @}
- */
-
-/** @defgroup TIM_Encoder_Input_Polarity TIM Encoder Input Polarity
- * @{
- */
-#define TIM_ENCODERINPUTPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Encoder input with rising edge polarity */
-#define TIM_ENCODERINPUTPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Encoder input with falling edge polarity */
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
- * @{
- */
-#define TIM_ICSELECTION_DIRECTTI TIM_CCMR1_CC1S_0 /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to IC1, IC2, IC3 or IC4, respectively */
-#define TIM_ICSELECTION_INDIRECTTI TIM_CCMR1_CC1S_1 /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to IC2, IC1, IC4 or IC3, respectively */
-#define TIM_ICSELECTION_TRC TIM_CCMR1_CC1S /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
- * @{
- */
-#define TIM_ICPSC_DIV1 0x00000000U /*!< Capture performed each time an edge is detected on the capture input */
-#define TIM_ICPSC_DIV2 TIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */
-#define TIM_ICPSC_DIV4 TIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */
-#define TIM_ICPSC_DIV8 TIM_CCMR1_IC1PSC /*!< Capture performed once every 8 events */
-/**
- * @}
- */
-
-/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
- * @{
- */
-#define TIM_OPMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */
-#define TIM_OPMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */
-/**
- * @}
- */
-
-/** @defgroup TIM_Encoder_Mode TIM Encoder Mode
- * @{
- */
-#define TIM_ENCODERMODE_TI1 TIM_SMCR_SMS_0 /*!< Quadrature encoder mode 1, x2 mode, counts up/down on TI1FP1 edge depending on TI2FP2 level */
-#define TIM_ENCODERMODE_TI2 TIM_SMCR_SMS_1 /*!< Quadrature encoder mode 2, x2 mode, counts up/down on TI2FP2 edge depending on TI1FP1 level. */
-#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) /*!< Quadrature encoder mode 3, x4 mode, counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input. */
-/**
- * @}
- */
-
-/** @defgroup TIM_Interrupt_definition TIM interrupt Definition
- * @{
- */
-#define TIM_IT_UPDATE TIM_DIER_UIE /*!< Update interrupt */
-#define TIM_IT_CC1 TIM_DIER_CC1IE /*!< Capture/Compare 1 interrupt */
-#define TIM_IT_CC2 TIM_DIER_CC2IE /*!< Capture/Compare 2 interrupt */
-#define TIM_IT_CC3 TIM_DIER_CC3IE /*!< Capture/Compare 3 interrupt */
-#define TIM_IT_CC4 TIM_DIER_CC4IE /*!< Capture/Compare 4 interrupt */
-#define TIM_IT_COM TIM_DIER_COMIE /*!< Commutation interrupt */
-#define TIM_IT_TRIGGER TIM_DIER_TIE /*!< Trigger interrupt */
-#define TIM_IT_BREAK TIM_DIER_BIE /*!< Break interrupt */
-/**
- * @}
- */
-
-/** @defgroup TIM_Commutation_Source TIM Commutation Source
- * @{
- */
-#define TIM_COMMUTATION_TRGI TIM_CR2_CCUS /*!< When Capture/compare control bits are preloaded, they are updated by setting the COMG bit or when an rising edge occurs on trigger input */
-#define TIM_COMMUTATION_SOFTWARE 0x00000000U /*!< When Capture/compare control bits are preloaded, they are updated by setting the COMG bit */
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_sources TIM DMA Sources
- * @{
- */
-#define TIM_DMA_UPDATE TIM_DIER_UDE /*!< DMA request is triggered by the update event */
-#define TIM_DMA_CC1 TIM_DIER_CC1DE /*!< DMA request is triggered by the capture/compare macth 1 event */
-#define TIM_DMA_CC2 TIM_DIER_CC2DE /*!< DMA request is triggered by the capture/compare macth 2 event event */
-#define TIM_DMA_CC3 TIM_DIER_CC3DE /*!< DMA request is triggered by the capture/compare macth 3 event event */
-#define TIM_DMA_CC4 TIM_DIER_CC4DE /*!< DMA request is triggered by the capture/compare macth 4 event event */
-#define TIM_DMA_COM TIM_DIER_COMDE /*!< DMA request is triggered by the commutation event */
-#define TIM_DMA_TRIGGER TIM_DIER_TDE /*!< DMA request is triggered by the trigger event */
-/**
- * @}
- */
-
-/** @defgroup TIM_CC_DMA_Request CCx DMA request selection
- * @{
- */
-#define TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when capture or compare match event occurs */
-#define TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when update event occurs */
-/**
- * @}
- */
-
-/** @defgroup TIM_Flag_definition TIM Flag Definition
- * @{
- */
-#define TIM_FLAG_UPDATE TIM_SR_UIF /*!< Update interrupt flag */
-#define TIM_FLAG_CC1 TIM_SR_CC1IF /*!< Capture/Compare 1 interrupt flag */
-#define TIM_FLAG_CC2 TIM_SR_CC2IF /*!< Capture/Compare 2 interrupt flag */
-#define TIM_FLAG_CC3 TIM_SR_CC3IF /*!< Capture/Compare 3 interrupt flag */
-#define TIM_FLAG_CC4 TIM_SR_CC4IF /*!< Capture/Compare 4 interrupt flag */
-#define TIM_FLAG_COM TIM_SR_COMIF /*!< Commutation interrupt flag */
-#define TIM_FLAG_TRIGGER TIM_SR_TIF /*!< Trigger interrupt flag */
-#define TIM_FLAG_BREAK TIM_SR_BIF /*!< Break interrupt flag */
-#define TIM_FLAG_CC1OF TIM_SR_CC1OF /*!< Capture 1 overcapture flag */
-#define TIM_FLAG_CC2OF TIM_SR_CC2OF /*!< Capture 2 overcapture flag */
-#define TIM_FLAG_CC3OF TIM_SR_CC3OF /*!< Capture 3 overcapture flag */
-#define TIM_FLAG_CC4OF TIM_SR_CC4OF /*!< Capture 4 overcapture flag */
-/**
- * @}
- */
-
-/** @defgroup TIM_Channel TIM Channel
- * @{
- */
-#define TIM_CHANNEL_1 0x00000000U /*!< Capture/compare channel 1 identifier */
-#define TIM_CHANNEL_2 0x00000004U /*!< Capture/compare channel 2 identifier */
-#define TIM_CHANNEL_3 0x00000008U /*!< Capture/compare channel 3 identifier */
-#define TIM_CHANNEL_4 0x0000000CU /*!< Capture/compare channel 4 identifier */
-#define TIM_CHANNEL_ALL 0x0000003CU /*!< Global Capture/compare channel identifier */
-/**
- * @}
- */
-
-/** @defgroup TIM_Clock_Source TIM Clock Source
- * @{
- */
-#define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 /*!< Internal clock source */
-#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
-#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
-#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
-#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
-#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
-#define TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 /*!< External clock source mode 1 (ITR0) */
-#define TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 /*!< External clock source mode 1 (ITR1) */
-#define TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 /*!< External clock source mode 1 (ITR2) */
-#define TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 /*!< External clock source mode 1 (ITR3) */
-/**
- * @}
- */
-
-/** @defgroup TIM_Clock_Polarity TIM Clock Polarity
- * @{
- */
-#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */
-#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */
-#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */
-#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */
-#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */
-/**
- * @}
- */
-
-/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
- * @{
- */
-#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
-#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */
-#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */
-#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */
-/**
- * @}
- */
-
-/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
- * @{
- */
-#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */
-#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */
-/**
- * @}
- */
-
-/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
- * @{
- */
-#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
-#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */
-#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */
-#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */
-/**
- * @}
- */
-
-/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state
- * @{
- */
-#define TIM_OSSR_ENABLE TIM_BDTR_OSSR /*!< When inactive, OC/OCN outputs are enabled (still controlled by the timer) */
-#define TIM_OSSR_DISABLE 0x00000000U /*!< When inactive, OC/OCN outputs are disabled (not controlled any longer by the timer) */
-/**
- * @}
- */
-
-/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state
- * @{
- */
-#define TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OC/OCN outputs are enabled (still controlled by the timer) */
-#define TIM_OSSI_DISABLE 0x00000000U /*!< When inactive, OC/OCN outputs are disabled (not controlled any longer by the timer) */
-/**
- * @}
- */
-/** @defgroup TIM_Lock_level TIM Lock level
- * @{
- */
-#define TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF */
-#define TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */
-#define TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /*!< LOCK Level 2 */
-#define TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */
-/**
- * @}
- */
-
-/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable
- * @{
- */
-#define TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break input BRK is enabled */
-#define TIM_BREAK_DISABLE 0x00000000U /*!< Break input BRK is disabled */
-/**
- * @}
- */
-
-/** @defgroup TIM_Break_Polarity TIM Break Input Polarity
- * @{
- */
-#define TIM_BREAKPOLARITY_LOW 0x00000000U /*!< Break input BRK is active low */
-#define TIM_BREAKPOLARITY_HIGH TIM_BDTR_BKP /*!< Break input BRK is active high */
-/**
- * @}
- */
-
-/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
- * @{
- */
-#define TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by software */
-#define TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by software or automatically at the next update event (if none of the break inputs BRK and BRK2 is active) */
-/**
- * @}
- */
-
-/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
- * @{
- */
-#define TIM_TRGO_RESET 0x00000000U /*!< TIMx_EGR.UG bit is used as trigger output (TRGO) */
-#define TIM_TRGO_ENABLE TIM_CR2_MMS_0 /*!< TIMx_CR1.CEN bit is used as trigger output (TRGO) */
-#define TIM_TRGO_UPDATE TIM_CR2_MMS_1 /*!< Update event is used as trigger output (TRGO) */
-#define TIM_TRGO_OC1 (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< Capture or a compare match 1 is used as trigger output (TRGO) */
-#define TIM_TRGO_OC1REF TIM_CR2_MMS_2 /*!< OC1REF signal is used as trigger output (TRGO) */
-#define TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) /*!< OC2REF signal is used as trigger output(TRGO) */
-#define TIM_TRGO_OC3REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1) /*!< OC3REF signal is used as trigger output(TRGO) */
-#define TIM_TRGO_OC4REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< OC4REF signal is used as trigger output(TRGO) */
-/**
- * @}
- */
-
-/** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode
- * @{
- */
-#define TIM_MASTERSLAVEMODE_ENABLE TIM_SMCR_MSM /*!< No action */
-#define TIM_MASTERSLAVEMODE_DISABLE 0x00000000U /*!< Master/slave mode is selected */
-/**
- * @}
- */
-
-/** @defgroup TIM_Slave_Mode TIM Slave mode
- * @{
- */
-#define TIM_SLAVEMODE_DISABLE 0x00000000U /*!< Slave mode disabled */
-#define TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /*!< Reset Mode */
-#define TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0) /*!< Gated Mode */
-#define TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1) /*!< Trigger Mode */
-#define TIM_SLAVEMODE_EXTERNAL1 (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) /*!< External Clock Mode 1 */
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes
- * @{
- */
-#define TIM_OCMODE_TIMING 0x00000000U /*!< Frozen */
-#define TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 /*!< Set channel to active level on match */
-#define TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 /*!< Set channel to inactive level on match */
-#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!< Toggle */
-#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) /*!< PWM mode 1 */
-#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!< PWM mode 2 */
-#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) /*!< Force active level */
-#define TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2 /*!< Force inactive level */
-/**
- * @}
- */
-
-/** @defgroup TIM_Trigger_Selection TIM Trigger Selection
- * @{
- */
-#define TIM_TS_ITR0 0x00000000U /*!< Internal Trigger 0 (ITR0) */
-#define TIM_TS_ITR1 TIM_SMCR_TS_0 /*!< Internal Trigger 1 (ITR1) */
-#define TIM_TS_ITR2 TIM_SMCR_TS_1 /*!< Internal Trigger 2 (ITR2) */
-#define TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) /*!< Internal Trigger 3 (ITR3) */
-#define TIM_TS_TI1F_ED TIM_SMCR_TS_2 /*!< TI1 Edge Detector (TI1F_ED) */
-#define TIM_TS_TI1FP1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 1 (TI1FP1) */
-#define TIM_TS_TI2FP2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 2 (TI2FP2) */
-#define TIM_TS_ETRF (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered External Trigger input (ETRF) */
-#define TIM_TS_NONE 0x0000FFFFU /*!< No trigger selected */
-/**
- * @}
- */
-
-/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
- * @{
- */
-#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */
-#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */
-#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
-#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
-#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */
-/**
- * @}
- */
-
-/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
- * @{
- */
-#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
-#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */
-#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */
-#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */
-/**
- * @}
- */
-
-/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
- * @{
- */
-#define TIM_TI1SELECTION_CH1 0x00000000U /*!< The TIMx_CH1 pin is connected to TI1 input */
-#define TIM_TI1SELECTION_XORCOMBINATION TIM_CR2_TI1S /*!< The TIMx_CH1, CH2 and CH3 pins are connected to the TI1 input (XOR combination) */
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
- * @{
- */
-#define TIM_DMABURSTLENGTH_1TRANSFER 0x00000000U /*!< The transfer is done to 1 register starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_2TRANSFERS 0x00000100U /*!< The transfer is done to 2 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_3TRANSFERS 0x00000200U /*!< The transfer is done to 3 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_4TRANSFERS 0x00000300U /*!< The transfer is done to 4 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_5TRANSFERS 0x00000400U /*!< The transfer is done to 5 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_6TRANSFERS 0x00000500U /*!< The transfer is done to 6 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_7TRANSFERS 0x00000600U /*!< The transfer is done to 7 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_8TRANSFERS 0x00000700U /*!< The transfer is done to 8 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_9TRANSFERS 0x00000800U /*!< The transfer is done to 9 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_10TRANSFERS 0x00000900U /*!< The transfer is done to 10 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_11TRANSFERS 0x00000A00U /*!< The transfer is done to 11 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_12TRANSFERS 0x00000B00U /*!< The transfer is done to 12 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_13TRANSFERS 0x00000C00U /*!< The transfer is done to 13 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_14TRANSFERS 0x00000D00U /*!< The transfer is done to 14 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_15TRANSFERS 0x00000E00U /*!< The transfer is done to 15 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_16TRANSFERS 0x00000F00U /*!< The transfer is done to 16 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_17TRANSFERS 0x00001000U /*!< The transfer is done to 17 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-#define TIM_DMABURSTLENGTH_18TRANSFERS 0x00001100U /*!< The transfer is done to 18 registers starting from TIMx_CR1 + TIMx_DCR.DBA */
-/**
- * @}
- */
-
-/** @defgroup DMA_Handle_index TIM DMA Handle Index
- * @{
- */
-#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */
-#define TIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */
-#define TIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */
-#define TIM_DMA_ID_CC3 ((uint16_t) 0x0003) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */
-#define TIM_DMA_ID_CC4 ((uint16_t) 0x0004) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */
-#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x0005) /*!< Index of the DMA handle used for Commutation DMA requests */
-#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x0006) /*!< Index of the DMA handle used for Trigger DMA requests */
-/**
- * @}
- */
-
-/** @defgroup Channel_CC_State TIM Capture/Compare Channel State
- * @{
- */
-#define TIM_CCx_ENABLE 0x00000001U /*!< Input or output channel is enabled */
-#define TIM_CCx_DISABLE 0x00000000U /*!< Input or output channel is disabled */
-#define TIM_CCxN_ENABLE 0x00000004U /*!< Complementary output channel is enabled */
-#define TIM_CCxN_DISABLE 0x00000000U /*!< Complementary output channel is enabled */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* End of exported constants -------------------------------------------------*/
-
-/* Exported macros -----------------------------------------------------------*/
-/** @defgroup TIM_Exported_Macros TIM Exported Macros
- * @{
- */
-
-/** @brief Reset TIM handle state.
- * @param __HANDLE__ TIM handle.
- * @retval None
- */
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) do { \
- (__HANDLE__)->State = HAL_TIM_STATE_RESET; \
- (__HANDLE__)->ChannelState[0] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[1] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[2] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[3] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[0] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[1] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[2] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[3] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->DMABurstState = HAL_DMA_BURST_STATE_RESET; \
- (__HANDLE__)->Base_MspInitCallback = NULL; \
- (__HANDLE__)->Base_MspDeInitCallback = NULL; \
- (__HANDLE__)->IC_MspInitCallback = NULL; \
- (__HANDLE__)->IC_MspDeInitCallback = NULL; \
- (__HANDLE__)->OC_MspInitCallback = NULL; \
- (__HANDLE__)->OC_MspDeInitCallback = NULL; \
- (__HANDLE__)->PWM_MspInitCallback = NULL; \
- (__HANDLE__)->PWM_MspDeInitCallback = NULL; \
- (__HANDLE__)->OnePulse_MspInitCallback = NULL; \
- (__HANDLE__)->OnePulse_MspDeInitCallback = NULL; \
- (__HANDLE__)->Encoder_MspInitCallback = NULL; \
- (__HANDLE__)->Encoder_MspDeInitCallback = NULL; \
- (__HANDLE__)->HallSensor_MspInitCallback = NULL; \
- (__HANDLE__)->HallSensor_MspDeInitCallback = NULL; \
- } while(0)
-#else
-#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) do { \
- (__HANDLE__)->State = HAL_TIM_STATE_RESET; \
- (__HANDLE__)->ChannelState[0] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[1] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[2] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelState[3] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[0] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[1] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[2] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->ChannelNState[3] = HAL_TIM_CHANNEL_STATE_RESET; \
- (__HANDLE__)->DMABurstState = HAL_DMA_BURST_STATE_RESET; \
- } while(0)
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @brief Enable the TIM peripheral.
- * @param __HANDLE__ TIM handle
- * @retval None
- */
-#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
-
-/**
- * @brief Enable the TIM main Output.
- * @param __HANDLE__ TIM handle
- * @retval None
- */
-#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE))
-
-/**
- * @brief Disable the TIM peripheral.
- * @param __HANDLE__ TIM handle
- * @retval None
- */
-#define __HAL_TIM_DISABLE(__HANDLE__) \
- do { \
- if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0UL) \
- { \
- if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0UL) \
- { \
- (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
- } \
- } \
- } while(0)
-
-/**
- * @brief Disable the TIM main Output.
- * @param __HANDLE__ TIM handle
- * @retval None
- * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been
- * disabled
- */
-#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
- do { \
- if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0UL) \
- { \
- if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0UL) \
- { \
- (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
- } \
- } \
- } while(0)
-
-/**
- * @brief Disable the TIM main Output.
- * @param __HANDLE__ TIM handle
- * @retval None
- * @note The Main Output Enable of a timer instance is disabled unconditionally
- */
-#define __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY(__HANDLE__) (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE)
-
-/** @brief Enable the specified TIM interrupt.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __INTERRUPT__ specifies the TIM interrupt source to enable.
- * This parameter can be one of the following values:
- * @arg TIM_IT_UPDATE: Update interrupt
- * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
- * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
- * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
- * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
- * @arg TIM_IT_COM: Commutation interrupt
- * @arg TIM_IT_TRIGGER: Trigger interrupt
- * @arg TIM_IT_BREAK: Break interrupt
- * @retval None
- */
-#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
-
-/** @brief Disable the specified TIM interrupt.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __INTERRUPT__ specifies the TIM interrupt source to disable.
- * This parameter can be one of the following values:
- * @arg TIM_IT_UPDATE: Update interrupt
- * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
- * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
- * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
- * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
- * @arg TIM_IT_COM: Commutation interrupt
- * @arg TIM_IT_TRIGGER: Trigger interrupt
- * @arg TIM_IT_BREAK: Break interrupt
- * @retval None
- */
-#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
-
-/** @brief Enable the specified DMA request.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __DMA__ specifies the TIM DMA request to enable.
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: Update DMA request
- * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
- * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
- * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
- * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
- * @arg TIM_DMA_COM: Commutation DMA request
- * @arg TIM_DMA_TRIGGER: Trigger DMA request
- * @retval None
- */
-#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__))
-
-/** @brief Disable the specified DMA request.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __DMA__ specifies the TIM DMA request to disable.
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: Update DMA request
- * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
- * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
- * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
- * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
- * @arg TIM_DMA_COM: Commutation DMA request
- * @arg TIM_DMA_TRIGGER: Trigger DMA request
- * @retval None
- */
-#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
-
-/** @brief Check whether the specified TIM interrupt flag is set or not.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __FLAG__ specifies the TIM interrupt flag to check.
- * This parameter can be one of the following values:
- * @arg TIM_FLAG_UPDATE: Update interrupt flag
- * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
- * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
- * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
- * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
- * @arg TIM_FLAG_COM: Commutation interrupt flag
- * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
- * @arg TIM_FLAG_BREAK: Break interrupt flag
- * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
- * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
- * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
- * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
-
-/** @brief Clear the specified TIM interrupt flag.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __FLAG__ specifies the TIM interrupt flag to clear.
- * This parameter can be one of the following values:
- * @arg TIM_FLAG_UPDATE: Update interrupt flag
- * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
- * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
- * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
- * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
- * @arg TIM_FLAG_COM: Commutation interrupt flag
- * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
- * @arg TIM_FLAG_BREAK: Break interrupt flag
- * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
- * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
- * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
- * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
-
-/**
- * @brief Check whether the specified TIM interrupt source is enabled or not.
- * @param __HANDLE__ TIM handle
- * @param __INTERRUPT__ specifies the TIM interrupt source to check.
- * This parameter can be one of the following values:
- * @arg TIM_IT_UPDATE: Update interrupt
- * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
- * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
- * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
- * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
- * @arg TIM_IT_COM: Commutation interrupt
- * @arg TIM_IT_TRIGGER: Trigger interrupt
- * @arg TIM_IT_BREAK: Break interrupt
- * @retval The state of TIM_IT (SET or RESET).
- */
-#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) \
- == (__INTERRUPT__)) ? SET : RESET)
-
-/** @brief Clear the TIM interrupt pending bits.
- * @param __HANDLE__ TIM handle
- * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
- * This parameter can be one of the following values:
- * @arg TIM_IT_UPDATE: Update interrupt
- * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
- * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
- * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
- * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
- * @arg TIM_IT_COM: Commutation interrupt
- * @arg TIM_IT_TRIGGER: Trigger interrupt
- * @arg TIM_IT_BREAK: Break interrupt
- * @retval None
- */
-#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
-
-/**
- * @brief Indicates whether or not the TIM Counter is used as downcounter.
- * @param __HANDLE__ TIM handle.
- * @retval False (Counter used as upcounter) or True (Counter used as downcounter)
- * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode
- * or Encoder mode.
- */
-#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
-
-/**
- * @brief Set the TIM Prescaler on runtime.
- * @param __HANDLE__ TIM handle.
- * @param __PRESC__ specifies the Prescaler new value.
- * @retval None
- */
-#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
-
-/**
- * @brief Set the TIM Counter Register value on runtime.
- * @param __HANDLE__ TIM handle.
- * @param __COUNTER__ specifies the Counter register new value.
- * @retval None
- */
-#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
-
-/**
- * @brief Get the TIM Counter Register value on runtime.
- * @param __HANDLE__ TIM handle.
- * @retval 16-bit or 32-bit value of the timer counter register (TIMx_CNT)
- */
-#define __HAL_TIM_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNT)
-
-/**
- * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function.
- * @param __HANDLE__ TIM handle.
- * @param __AUTORELOAD__ specifies the Counter register new value.
- * @retval None
- */
-#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
- do{ \
- (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
- (__HANDLE__)->Init.Period = (__AUTORELOAD__); \
- } while(0)
-
-/**
- * @brief Get the TIM Autoreload Register value on runtime.
- * @param __HANDLE__ TIM handle.
- * @retval 16-bit or 32-bit value of the timer auto-reload register(TIMx_ARR)
- */
-#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) ((__HANDLE__)->Instance->ARR)
-
-/**
- * @brief Set the TIM Clock Division value on runtime without calling another time any Init function.
- * @param __HANDLE__ TIM handle.
- * @param __CKD__ specifies the clock division value.
- * This parameter can be one of the following value:
- * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT
- * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT
- * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT
- * @retval None
- */
-#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
- do{ \
- (__HANDLE__)->Instance->CR1 &= (~TIM_CR1_CKD); \
- (__HANDLE__)->Instance->CR1 |= (__CKD__); \
- (__HANDLE__)->Init.ClockDivision = (__CKD__); \
- } while(0)
-
-/**
- * @brief Get the TIM Clock Division value on runtime.
- * @param __HANDLE__ TIM handle.
- * @retval The clock division can be one of the following values:
- * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT
- * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT
- * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT
- */
-#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
-
-/**
- * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel()
- * function.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param __ICPSC__ specifies the Input Capture4 prescaler new value.
- * This parameter can be one of the following values:
- * @arg TIM_ICPSC_DIV1: no prescaler
- * @arg TIM_ICPSC_DIV2: capture is done once every 2 events
- * @arg TIM_ICPSC_DIV4: capture is done once every 4 events
- * @arg TIM_ICPSC_DIV8: capture is done once every 8 events
- * @retval None
- */
-#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
- do{ \
- TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
- TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
- } while(0)
-
-/**
- * @brief Get the TIM Input Capture prescaler on runtime.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: get input capture 1 prescaler value
- * @arg TIM_CHANNEL_2: get input capture 2 prescaler value
- * @arg TIM_CHANNEL_3: get input capture 3 prescaler value
- * @arg TIM_CHANNEL_4: get input capture 4 prescaler value
- * @retval The input capture prescaler can be one of the following values:
- * @arg TIM_ICPSC_DIV1: no prescaler
- * @arg TIM_ICPSC_DIV2: capture is done once every 2 events
- * @arg TIM_ICPSC_DIV4: capture is done once every 4 events
- * @arg TIM_ICPSC_DIV8: capture is done once every 8 events
- */
-#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
- (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U)
-
-/**
- * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param __COMPARE__ specifies the Capture Compare register new value.
- * @retval None
- */
-#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
- ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)))
-
-/**
- * @brief Get the TIM Capture Compare Register value on runtime.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channel associated with the capture compare register
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: get capture/compare 1 register value
- * @arg TIM_CHANNEL_2: get capture/compare 2 register value
- * @arg TIM_CHANNEL_3: get capture/compare 3 register value
- * @arg TIM_CHANNEL_4: get capture/compare 4 register value
- * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy)
- */
-#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
- ((__HANDLE__)->Instance->CCR4))
-
-/**
- * @brief Set the TIM Output compare preload.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval None
- */
-#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\
- ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE))
-
-/**
- * @brief Reset the TIM Output compare preload.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval None
- */
-#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) :\
- ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE))
-
-/**
- * @brief Enable fast mode for a given channel.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @note When fast mode is enabled an active edge on the trigger input acts
- * like a compare match on CCx output. Delay to sample the trigger
- * input and to activate CCx output is reduced to 3 clock cycles.
- * @note Fast mode acts only if the channel is configured in PWM1 or PWM2 mode.
- * @retval None
- */
-#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) :\
- ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE))
-
-/**
- * @brief Disable fast mode for a given channel.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @note When fast mode is disabled CCx output behaves normally depending
- * on counter and CCRx values even when the trigger is ON. The minimum
- * delay to activate CCx output when an active edge occurs on the
- * trigger input is 5 clock cycles.
- * @retval None
- */
-#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) :\
- ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE))
-
-/**
- * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register.
- * @param __HANDLE__ TIM handle.
- * @note When the URS bit of the TIMx_CR1 register is set, only counter
- * overflow/underflow generates an update interrupt or DMA request (if
- * enabled)
- * @retval None
- */
-#define __HAL_TIM_URS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|= TIM_CR1_URS)
-
-/**
- * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register.
- * @param __HANDLE__ TIM handle.
- * @note When the URS bit of the TIMx_CR1 register is reset, any of the
- * following events generate an update interrupt or DMA request (if
- * enabled):
- * _ Counter overflow underflow
- * _ Setting the UG bit
- * _ Update generation through the slave mode controller
- * @retval None
- */
-#define __HAL_TIM_URS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1&=~TIM_CR1_URS)
-
-/**
- * @brief Set the TIM Capture x input polarity on runtime.
- * @param __HANDLE__ TIM handle.
- * @param __CHANNEL__ TIM Channels to be configured.
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param __POLARITY__ Polarity for TIx source
- * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
- * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
- * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
- * @retval None
- */
-#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
- do{ \
- TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
- TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
- }while(0)
-
-/** @brief Select the Capture/compare DMA request source.
- * @param __HANDLE__ specifies the TIM Handle.
- * @param __CCDMA__ specifies Capture/compare DMA request source
- * This parameter can be one of the following values:
- * @arg TIM_CCDMAREQUEST_CC: CCx DMA request generated on Capture/Compare event
- * @arg TIM_CCDMAREQUEST_UPDATE: CCx DMA request generated on Update event
- * @retval None
- */
-#define __HAL_TIM_SELECT_CCDMAREQUEST(__HANDLE__, __CCDMA__) \
- MODIFY_REG((__HANDLE__)->Instance->CR2, TIM_CR2_CCDS, (__CCDMA__))
-
-/**
- * @}
- */
-/* End of exported macros ----------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup TIM_Private_Constants TIM Private Constants
- * @{
- */
-/* The counter of a timer instance is disabled only if all the CCx and CCxN
- channels have been disabled */
-#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E))
-#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE))
-/**
- * @}
- */
-/* End of private constants --------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup TIM_Private_Macros TIM Private Macros
- * @{
- */
-#define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \
- ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
-
-#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \
- ((__BASE__) == TIM_DMABASE_CR2) || \
- ((__BASE__) == TIM_DMABASE_SMCR) || \
- ((__BASE__) == TIM_DMABASE_DIER) || \
- ((__BASE__) == TIM_DMABASE_SR) || \
- ((__BASE__) == TIM_DMABASE_EGR) || \
- ((__BASE__) == TIM_DMABASE_CCMR1) || \
- ((__BASE__) == TIM_DMABASE_CCMR2) || \
- ((__BASE__) == TIM_DMABASE_CCER) || \
- ((__BASE__) == TIM_DMABASE_CNT) || \
- ((__BASE__) == TIM_DMABASE_PSC) || \
- ((__BASE__) == TIM_DMABASE_ARR) || \
- ((__BASE__) == TIM_DMABASE_RCR) || \
- ((__BASE__) == TIM_DMABASE_CCR1) || \
- ((__BASE__) == TIM_DMABASE_CCR2) || \
- ((__BASE__) == TIM_DMABASE_CCR3) || \
- ((__BASE__) == TIM_DMABASE_CCR4) || \
- ((__BASE__) == TIM_DMABASE_BDTR))
-
-#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFF00U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
-
-#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \
- ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
- ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
- ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
- ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
-
-#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
- ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
- ((__DIV__) == TIM_CLOCKDIVISION_DIV4))
-
-#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD) (((PRELOAD) == TIM_AUTORELOAD_PRELOAD_DISABLE) || \
- ((PRELOAD) == TIM_AUTORELOAD_PRELOAD_ENABLE))
-
-#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \
- ((__STATE__) == TIM_OCFAST_ENABLE))
-
-#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \
- ((__POLARITY__) == TIM_OCPOLARITY_LOW))
-
-#define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \
- ((__POLARITY__) == TIM_OCNPOLARITY_LOW))
-
-#define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \
- ((__STATE__) == TIM_OCIDLESTATE_RESET))
-
-#define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \
- ((__STATE__) == TIM_OCNIDLESTATE_RESET))
-
-#define IS_TIM_ENCODERINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ENCODERINPUTPOLARITY_RISING) || \
- ((__POLARITY__) == TIM_ENCODERINPUTPOLARITY_FALLING))
-
-#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \
- ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \
- ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
-
-#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \
- ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \
- ((__SELECTION__) == TIM_ICSELECTION_TRC))
-
-#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \
- ((__PRESCALER__) == TIM_ICPSC_DIV2) || \
- ((__PRESCALER__) == TIM_ICPSC_DIV4) || \
- ((__PRESCALER__) == TIM_ICPSC_DIV8))
-
-#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
- ((__MODE__) == TIM_OPMODE_REPETITIVE))
-
-#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \
- ((__MODE__) == TIM_ENCODERMODE_TI2) || \
- ((__MODE__) == TIM_ENCODERMODE_TI12))
-
-#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))
-
-#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
- ((__CHANNEL__) == TIM_CHANNEL_2) || \
- ((__CHANNEL__) == TIM_CHANNEL_3) || \
- ((__CHANNEL__) == TIM_CHANNEL_4) || \
- ((__CHANNEL__) == TIM_CHANNEL_ALL))
-
-#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
- ((__CHANNEL__) == TIM_CHANNEL_2))
-
-#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
- ((__CHANNEL__) == TIM_CHANNEL_2) || \
- ((__CHANNEL__) == TIM_CHANNEL_3))
-
-#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3))
-
-#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
- ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
- ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \
- ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \
- ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
-
-#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \
- ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \
- ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \
- ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
-
-#define IS_TIM_CLOCKFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
-
-#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \
- ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
-
-#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \
- ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \
- ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \
- ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
-
-#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
-
-#define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \
- ((__STATE__) == TIM_OSSR_DISABLE))
-
-#define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \
- ((__STATE__) == TIM_OSSI_DISABLE))
-
-#define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \
- ((__LEVEL__) == TIM_LOCKLEVEL_1) || \
- ((__LEVEL__) == TIM_LOCKLEVEL_2) || \
- ((__LEVEL__) == TIM_LOCKLEVEL_3))
-
-#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL)
-
-
-#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
- ((__STATE__) == TIM_BREAK_DISABLE))
-
-#define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \
- ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH))
-
-#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \
- ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE))
-
-#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
- ((__SOURCE__) == TIM_TRGO_ENABLE) || \
- ((__SOURCE__) == TIM_TRGO_UPDATE) || \
- ((__SOURCE__) == TIM_TRGO_OC1) || \
- ((__SOURCE__) == TIM_TRGO_OC1REF) || \
- ((__SOURCE__) == TIM_TRGO_OC2REF) || \
- ((__SOURCE__) == TIM_TRGO_OC3REF) || \
- ((__SOURCE__) == TIM_TRGO_OC4REF))
-
-#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \
- ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
-
-#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \
- ((__MODE__) == TIM_SLAVEMODE_RESET) || \
- ((__MODE__) == TIM_SLAVEMODE_GATED) || \
- ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \
- ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1))
-
-#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \
- ((__MODE__) == TIM_OCMODE_PWM2))
-
-#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
- ((__MODE__) == TIM_OCMODE_ACTIVE) || \
- ((__MODE__) == TIM_OCMODE_INACTIVE) || \
- ((__MODE__) == TIM_OCMODE_TOGGLE) || \
- ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
- ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE))
-
-#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
- ((__SELECTION__) == TIM_TS_ETRF))
-
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_NONE))
-
-#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \
- ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
- ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \
- ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \
- ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
-
-#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \
- ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \
- ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \
- ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
-
-#define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
-
-#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \
- ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
-
-#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
- ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
-
-#define IS_TIM_DMA_DATA_LENGTH(LENGTH) (((LENGTH) >= 0x1U) && ((LENGTH) < 0x10000U))
-
-#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
-
-#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFFU)
-
-#define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__) ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER)
-
-#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
- ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U)))
-
-#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) :\
- ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC))
-
-#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) :\
- ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U))))
-
-#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\
- ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP)))
-
-#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__)\
- (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] :\
- (__HANDLE__)->ChannelState[3])
-
-#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) :\
- ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__)))
-
-#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \
- (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
- } while(0)
-
-#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\
- (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] :\
- (__HANDLE__)->ChannelNState[3])
-
-#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \
- (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) :\
- ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) :\
- ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__)))
-
-#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \
- (__HANDLE__)->ChannelNState[0] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[1] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[2] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[3] = \
- (__CHANNEL_STATE__); \
- } while(0)
-
-/**
- * @}
- */
-/* End of private macros -----------------------------------------------------*/
-
-/* Include TIM HAL Extended module */
-#include "stm32f4xx_hal_tim_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup TIM_Exported_Functions TIM Exported Functions
- * @{
- */
-
-/** @addtogroup TIM_Exported_Functions_Group1 TIM Time Base functions
- * @brief Time Base functions
- * @{
- */
-/* Time Base functions ********************************************************/
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group2 TIM Output Compare functions
- * @brief TIM Output Compare functions
- * @{
- */
-/* Timer Output Compare functions *********************************************/
-HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group3 TIM PWM functions
- * @brief TIM PWM functions
- * @{
- */
-/* Timer PWM functions ********************************************************/
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group4 TIM Input Capture functions
- * @brief TIM Input Capture functions
- * @{
- */
-/* Timer Input Capture functions **********************************************/
-HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group5 TIM One Pulse functions
- * @brief TIM One Pulse functions
- * @{
- */
-/* Timer One Pulse functions **************************************************/
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
-HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group6 TIM Encoder functions
- * @brief TIM Encoder functions
- * @{
- */
-/* Timer Encoder functions ****************************************************/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig);
-HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1,
- uint32_t *pData2, uint16_t Length);
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management
- * @brief IRQ handler management
- * @{
- */
-/* Interrupt Handler functions ***********************************************/
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions
- * @brief Peripheral Control functions
- * @{
- */
-/* Control functions *********************************************************/
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
- uint32_t OutputChannel, uint32_t InputChannel);
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig,
- uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig);
-HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
- uint32_t BurstLength, uint32_t DataLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
- uint32_t BurstLength, uint32_t DataLength);
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
-HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
- * @brief TIM Callbacks functions
- * @{
- */
-/* Callback in non blocking modes (Interrupt and DMA) *************************/
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim);
-void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
-
-/* Callbacks Register/UnRegister functions ***********************************/
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID,
- pTIM_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions
- * @brief Peripheral State functions
- * @{
- */
-/* Peripheral State functions ************************************************/
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
-
-/* Peripheral Channel state functions ************************************************/
-HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim);
-HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim);
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* End of exported functions -------------------------------------------------*/
-
-/* Private functions----------------------------------------------------------*/
-/** @defgroup TIM_Private_Functions TIM Private Functions
- * @{
- */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
-void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
- uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
-
-void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma);
-void TIM_DMAError(DMA_HandleTypeDef *hdma);
-void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
-void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma);
-void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-void TIM_ResetCallback(TIM_HandleTypeDef *htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-/* End of private functions --------------------------------------------------*/
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* STM32F4xx_HAL_TIM_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
deleted file mode 100644
index a43611babcdc07b1ecd7ad8ad6bf43f17ea799e4..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h
+++ /dev/null
@@ -1,354 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_tim_ex.h
- * @author MCD Application Team
- * @brief Header file of TIM HAL Extended module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef STM32F4xx_HAL_TIM_EX_H
-#define STM32F4xx_HAL_TIM_EX_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup TIMEx
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
- * @{
- */
-
-/**
- * @brief TIM Hall sensor Configuration Structure definition
- */
-
-typedef struct
-{
- uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
- uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
- uint32_t IC1Filter; /*!< Specifies the input capture filter.
- This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
-
- uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
-} TIM_HallSensor_InitTypeDef;
-/**
- * @}
- */
-/* End of exported types -----------------------------------------------------*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
- * @{
- */
-
-/** @defgroup TIMEx_Remap TIM Extended Remapping
- * @{
- */
-#if defined (TIM2)
-#if defined(TIM8)
-#define TIM_TIM2_TIM8_TRGO 0x00000000U /*!< TIM2 ITR1 is connected to TIM8 TRGO */
-#else
-#define TIM_TIM2_ETH_PTP TIM_OR_ITR1_RMP_0 /*!< TIM2 ITR1 is connected to PTP trigger output */
-#endif /* TIM8 */
-#define TIM_TIM2_USBFS_SOF TIM_OR_ITR1_RMP_1 /*!< TIM2 ITR1 is connected to OTG FS SOF */
-#define TIM_TIM2_USBHS_SOF (TIM_OR_ITR1_RMP_1 | TIM_OR_ITR1_RMP_0) /*!< TIM2 ITR1 is connected to OTG HS SOF */
-#endif /* TIM2 */
-
-#define TIM_TIM5_GPIO 0x00000000U /*!< TIM5 TI4 is connected to GPIO */
-#define TIM_TIM5_LSI TIM_OR_TI4_RMP_0 /*!< TIM5 TI4 is connected to LSI */
-#define TIM_TIM5_LSE TIM_OR_TI4_RMP_1 /*!< TIM5 TI4 is connected to LSE */
-#define TIM_TIM5_RTC (TIM_OR_TI4_RMP_1 | TIM_OR_TI4_RMP_0) /*!< TIM5 TI4 is connected to the RTC wakeup interrupt */
-
-#define TIM_TIM11_GPIO 0x00000000U /*!< TIM11 TI1 is connected to GPIO */
-#define TIM_TIM11_HSE TIM_OR_TI1_RMP_1 /*!< TIM11 TI1 is connected to HSE_RTC clock */
-#if defined(SPDIFRX)
-#define TIM_TIM11_SPDIFRX TIM_OR_TI1_RMP_0 /*!< TIM11 TI1 is connected to SPDIFRX_FRAME_SYNC */
-#endif /* SPDIFRX*/
-
-#if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP)
-#define LPTIM_REMAP_MASK 0x10000000U
-
-#define TIM_TIM9_TIM3_TRGO LPTIM_REMAP_MASK /*!< TIM9 ITR1 is connected to TIM3 TRGO */
-#define TIM_TIM9_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM9_ITR1_RMP) /*!< TIM9 ITR1 is connected to LPTIM1 output */
-
-#define TIM_TIM5_TIM3_TRGO LPTIM_REMAP_MASK /*!< TIM5 ITR1 is connected to TIM3 TRGO */
-#define TIM_TIM5_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM5_ITR1_RMP) /*!< TIM5 ITR1 is connected to LPTIM1 output */
-
-#define TIM_TIM1_TIM3_TRGO LPTIM_REMAP_MASK /*!< TIM1 ITR2 is connected to TIM3 TRGO */
-#define TIM_TIM1_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM1_ITR2_RMP) /*!< TIM1 ITR2 is connected to LPTIM1 output */
-#endif /* LPTIM_OR_TIM1_ITR2_RMP && LPTIM_OR_TIM5_ITR1_RMP && LPTIM_OR_TIM5_ITR1_RMP */
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* End of exported constants -------------------------------------------------*/
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
- * @{
- */
-
-/**
- * @}
- */
-/* End of exported macro -----------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
- * @{
- */
-#if defined(SPDIFRX)
-#define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
- ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
- ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
- ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
- (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
- ((TIM_REMAP) == TIM_TIM5_LSI) || \
- ((TIM_REMAP) == TIM_TIM5_LSE) || \
- ((TIM_REMAP) == TIM_TIM5_RTC))) || \
- (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
- ((TIM_REMAP) == TIM_TIM11_SPDIFRX) || \
- ((TIM_REMAP) == TIM_TIM11_HSE))))
-#elif defined(TIM2)
-#if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP)
-#define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
- ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
- ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
- ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
- (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
- ((TIM_REMAP) == TIM_TIM5_LSI) || \
- ((TIM_REMAP) == TIM_TIM5_LSE) || \
- ((TIM_REMAP) == TIM_TIM5_RTC))) || \
- (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
- ((TIM_REMAP) == TIM_TIM11_HSE))) || \
- (((INSTANCE) == TIM1) && (((TIM_REMAP) == TIM_TIM1_TIM3_TRGO) || \
- ((TIM_REMAP) == TIM_TIM1_LPTIM))) || \
- (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_TIM3_TRGO) || \
- ((TIM_REMAP) == TIM_TIM5_LPTIM))) || \
- (((INSTANCE) == TIM9) && (((TIM_REMAP) == TIM_TIM9_TIM3_TRGO) || \
- ((TIM_REMAP) == TIM_TIM9_LPTIM))))
-#elif defined(TIM8)
-#define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
- ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
- ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
- ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
- (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
- ((TIM_REMAP) == TIM_TIM5_LSI) || \
- ((TIM_REMAP) == TIM_TIM5_LSE) || \
- ((TIM_REMAP) == TIM_TIM5_RTC))) || \
- (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
- ((TIM_REMAP) == TIM_TIM11_HSE))))
-#else
-#define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
- ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_ETH_PTP) || \
- ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
- ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
- (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
- ((TIM_REMAP) == TIM_TIM5_LSI) || \
- ((TIM_REMAP) == TIM_TIM5_LSE) || \
- ((TIM_REMAP) == TIM_TIM5_RTC))) || \
- (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
- ((TIM_REMAP) == TIM_TIM11_HSE))))
-#endif /* LPTIM_OR_TIM1_ITR2_RMP && LPTIM_OR_TIM5_ITR1_RMP && LPTIM_OR_TIM5_ITR1_RMP */
-#else
-#define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
- ((((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
- ((TIM_REMAP) == TIM_TIM5_LSI) || \
- ((TIM_REMAP) == TIM_TIM5_LSE) || \
- ((TIM_REMAP) == TIM_TIM5_RTC))) || \
- (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
- ((TIM_REMAP) == TIM_TIM11_HSE))))
-#endif /* SPDIFRX */
-
-/**
- * @}
- */
-/* End of private macro ------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
- * @{
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
- * @brief Timer Hall Sensor functions
- * @{
- */
-/* Timer Hall Sensor functions **********************************************/
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
-
-void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
-void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
-
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
- * @brief Timer Complementary Output Compare functions
- * @{
- */
-/* Timer Complementary Output Compare functions *****************************/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
- * @brief Timer Complementary PWM functions
- * @{
- */
-/* Timer Complementary PWM functions ****************************************/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
-
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
-/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
- * @brief Timer Complementary One Pulse functions
- * @{
- */
-/* Timer Complementary One Pulse functions **********************************/
-/* Blocking mode: Polling */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-
-/* Non-Blocking mode: Interrupt */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
- * @brief Peripheral Control functions
- * @{
- */
-/* Extended Control functions ************************************************/
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource);
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource);
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource);
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig);
-HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
- TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
-HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
- * @brief Extended Callbacks functions
- * @{
- */
-/* Extended Callback **********************************************************/
-void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
-void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
-void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
-/**
- * @}
- */
-
-/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
- * @brief Extended Peripheral State functions
- * @{
- */
-/* Extended Peripheral State functions ***************************************/
-HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN);
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* End of exported functions -------------------------------------------------*/
-
-/* Private functions----------------------------------------------------------*/
-/** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
- * @{
- */
-void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
-void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
-/**
- * @}
- */
-/* End of private functions --------------------------------------------------*/
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* STM32F4xx_HAL_TIM_EX_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
deleted file mode 100644
index 543ebccb51e692d5380e0af80892fac05297b752..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+++ /dev/null
@@ -1,884 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_uart.h
- * @author MCD Application Team
- * @brief Header file of UART HAL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_UART_H
-#define __STM32F4xx_HAL_UART_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal_def.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup UART
- * @{
- */
-
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup UART_Exported_Types UART Exported Types
- * @{
- */
-
-/**
- * @brief UART Init Structure definition
- */
-typedef struct
-{
- uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
- The baud rate is computed using the following formula:
- - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
- - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
- Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
-
- uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
- This parameter can be a value of @ref UART_Word_Length */
-
- uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
- This parameter can be a value of @ref UART_Stop_Bits */
-
- uint32_t Parity; /*!< Specifies the parity mode.
- This parameter can be a value of @ref UART_Parity
- @note When parity is enabled, the computed parity is inserted
- at the MSB position of the transmitted data (9th bit when
- the word length is set to 9 data bits; 8th bit when the
- word length is set to 8 data bits). */
-
- uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
- This parameter can be a value of @ref UART_Mode */
-
- uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
- This parameter can be a value of @ref UART_Hardware_Flow_Control */
-
- uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
- This parameter can be a value of @ref UART_Over_Sampling */
-} UART_InitTypeDef;
-
-/**
- * @brief HAL UART State structures definition
- * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
- * - gState contains UART state information related to global Handle management
- * and also information related to Tx operations.
- * gState value coding follow below described bitmap :
- * b7-b6 Error information
- * 00 : No Error
- * 01 : (Not Used)
- * 10 : Timeout
- * 11 : Error
- * b5 Peripheral initialization status
- * 0 : Reset (Peripheral not initialized)
- * 1 : Init done (Peripheral initialized. HAL UART Init function already called)
- * b4-b3 (not used)
- * xx : Should be set to 00
- * b2 Intrinsic process state
- * 0 : Ready
- * 1 : Busy (Peripheral busy with some configuration or internal operations)
- * b1 (not used)
- * x : Should be set to 0
- * b0 Tx state
- * 0 : Ready (no Tx operation ongoing)
- * 1 : Busy (Tx operation ongoing)
- * - RxState contains information related to Rx operations.
- * RxState value coding follow below described bitmap :
- * b7-b6 (not used)
- * xx : Should be set to 00
- * b5 Peripheral initialization status
- * 0 : Reset (Peripheral not initialized)
- * 1 : Init done (Peripheral initialized)
- * b4-b2 (not used)
- * xxx : Should be set to 000
- * b1 Rx state
- * 0 : Ready (no Rx operation ongoing)
- * 1 : Busy (Rx operation ongoing)
- * b0 (not used)
- * x : Should be set to 0.
- */
-typedef enum
-{
- HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
- Value is allowed for gState and RxState */
- HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
- Value is allowed for gState and RxState */
- HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
- Value is allowed for gState only */
- HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
- Value is allowed for gState only */
- HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
- Value is allowed for RxState only */
- HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
- Not to be used for neither gState nor RxState.
- Value is result of combination (Or) between gState and RxState values */
- HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
- Value is allowed for gState only */
- HAL_UART_STATE_ERROR = 0xE0U /*!< Error
- Value is allowed for gState only */
-} HAL_UART_StateTypeDef;
-
-/**
- * @brief HAL UART Reception type definition
- * @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
- * It is expected to admit following values :
- * HAL_UART_RECEPTION_STANDARD = 0x00U,
- * HAL_UART_RECEPTION_TOIDLE = 0x01U,
- */
-typedef uint32_t HAL_UART_RxTypeTypeDef;
-
-/**
- * @brief UART handle Structure definition
- */
-typedef struct __UART_HandleTypeDef
-{
- USART_TypeDef *Instance; /*!< UART registers base address */
-
- UART_InitTypeDef Init; /*!< UART communication parameters */
-
- const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
-
- uint16_t TxXferSize; /*!< UART Tx Transfer size */
-
- __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
-
- uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
-
- uint16_t RxXferSize; /*!< UART Rx Transfer size */
-
- __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
-
- __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
-
- DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
-
- DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
-
- HAL_LockTypeDef Lock; /*!< Locking object */
-
- __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
- and also related to Tx operations.
- This parameter can be a value of @ref HAL_UART_StateTypeDef */
-
- __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
- This parameter can be a value of @ref HAL_UART_StateTypeDef */
-
- __IO uint32_t ErrorCode; /*!< UART Error code */
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
- void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
- void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
- void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
- void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
- void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
- void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
- void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
- void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
- void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
-
- void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
- void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
-} UART_HandleTypeDef;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-/**
- * @brief HAL UART Callback ID enumeration definition
- */
-typedef enum
-{
- HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
- HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
- HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
- HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
- HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
- HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
- HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
- HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
- HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
-
- HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
- HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
-
-} HAL_UART_CallbackIDTypeDef;
-
-/**
- * @brief HAL UART Callback pointer definition
- */
-typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
-typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
-
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup UART_Exported_Constants UART Exported Constants
- * @{
- */
-
-/** @defgroup UART_Error_Code UART Error Code
- * @{
- */
-#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
-#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
-#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
-#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
-#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
-#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-/**
- * @}
- */
-
-/** @defgroup UART_Word_Length UART Word Length
- * @{
- */
-#define UART_WORDLENGTH_8B 0x00000000U
-#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
-/**
- * @}
- */
-
-/** @defgroup UART_Stop_Bits UART Number of Stop Bits
- * @{
- */
-#define UART_STOPBITS_1 0x00000000U
-#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
-/**
- * @}
- */
-
-/** @defgroup UART_Parity UART Parity
- * @{
- */
-#define UART_PARITY_NONE 0x00000000U
-#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
-#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
-/**
- * @}
- */
-
-/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
- * @{
- */
-#define UART_HWCONTROL_NONE 0x00000000U
-#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
-#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
-#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
-/**
- * @}
- */
-
-/** @defgroup UART_Mode UART Transfer Mode
- * @{
- */
-#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
-#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
-#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE))
-/**
- * @}
- */
-
-/** @defgroup UART_State UART State
- * @{
- */
-#define UART_STATE_DISABLE 0x00000000U
-#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
-/**
- * @}
- */
-
-/** @defgroup UART_Over_Sampling UART Over Sampling
- * @{
- */
-#define UART_OVERSAMPLING_16 0x00000000U
-#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
-/**
- * @}
- */
-
-/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
- * @{
- */
-#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
-#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
-/**
- * @}
- */
-
-/** @defgroup UART_WakeUp_functions UART Wakeup Functions
- * @{
- */
-#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
-#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
-/**
- * @}
- */
-
-/** @defgroup UART_Flags UART FLags
- * Elements values convention: 0xXXXX
- * - 0xXXXX : Flag mask in the SR register
- * @{
- */
-#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
-#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
-#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
-#define UART_FLAG_TC ((uint32_t)USART_SR_TC)
-#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
-#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
-#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
-#define UART_FLAG_NE ((uint32_t)USART_SR_NE)
-#define UART_FLAG_FE ((uint32_t)USART_SR_FE)
-#define UART_FLAG_PE ((uint32_t)USART_SR_PE)
-/**
- * @}
- */
-
-/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
- * Elements values convention: 0xY000XXXX
- * - XXXX : Interrupt mask (16 bits) in the Y register
- * - Y : Interrupt source register (2bits)
- * - 0001: CR1 register
- * - 0010: CR2 register
- * - 0011: CR3 register
- * @{
- */
-
-#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
-#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
-#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
-#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
-#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
-
-#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
-
-#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
-#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
-/**
- * @}
- */
-
-/** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values
- * @{
- */
-#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
-#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup UART_Exported_Macros UART Exported Macros
- * @{
- */
-
-/** @brief Reset UART handle gstate & RxState
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
- (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
- (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
- (__HANDLE__)->MspInitCallback = NULL; \
- (__HANDLE__)->MspDeInitCallback = NULL; \
- } while(0U)
-#else
-#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
- (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
- (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
- } while(0U)
-#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
-
-/** @brief Flushes the UART DR register
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- */
-#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
-
-/** @brief Checks whether the specified UART flag is set or not.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be one of the following values:
- * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
- * @arg UART_FLAG_LBD: LIN Break detection flag
- * @arg UART_FLAG_TXE: Transmit data register empty flag
- * @arg UART_FLAG_TC: Transmission Complete flag
- * @arg UART_FLAG_RXNE: Receive data register not empty flag
- * @arg UART_FLAG_IDLE: Idle Line detection flag
- * @arg UART_FLAG_ORE: Overrun Error flag
- * @arg UART_FLAG_NE: Noise Error flag
- * @arg UART_FLAG_FE: Framing Error flag
- * @arg UART_FLAG_PE: Parity Error flag
- * @retval The new state of __FLAG__ (TRUE or FALSE).
- */
-#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
-
-/** @brief Clears the specified UART pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @param __FLAG__ specifies the flag to check.
- * This parameter can be any combination of the following values:
- * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
- * @arg UART_FLAG_LBD: LIN Break detection flag.
- * @arg UART_FLAG_TC: Transmission Complete flag.
- * @arg UART_FLAG_RXNE: Receive data register not empty flag.
- *
- * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
- * error) and IDLE (Idle line detected) flags are cleared by software
- * sequence: a read operation to USART_SR register followed by a read
- * operation to USART_DR register.
- * @note RXNE flag can be also cleared by a read to the USART_DR register.
- * @note TC flag can be also cleared by software sequence: a read operation to
- * USART_SR register followed by a write operation to USART_DR register.
- * @note TXE flag is cleared only by a write to the USART_DR register.
- *
- * @retval None
- */
-#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
-
-/** @brief Clears the UART PE pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
- do{ \
- __IO uint32_t tmpreg = 0x00U; \
- tmpreg = (__HANDLE__)->Instance->SR; \
- tmpreg = (__HANDLE__)->Instance->DR; \
- UNUSED(tmpreg); \
- } while(0U)
-
-/** @brief Clears the UART FE pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
-
-/** @brief Clears the UART NE pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
-
-/** @brief Clears the UART ORE pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
-
-/** @brief Clears the UART IDLE pending flag.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @retval None
- */
-#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
-
-/** @brief Enable the specified UART interrupt.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @param __INTERRUPT__ specifies the UART interrupt source to enable.
- * This parameter can be one of the following values:
- * @arg UART_IT_CTS: CTS change interrupt
- * @arg UART_IT_LBD: LIN Break detection interrupt
- * @arg UART_IT_TXE: Transmit Data Register empty interrupt
- * @arg UART_IT_TC: Transmission complete interrupt
- * @arg UART_IT_RXNE: Receive Data register not empty interrupt
- * @arg UART_IT_IDLE: Idle line detection interrupt
- * @arg UART_IT_PE: Parity Error interrupt
- * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
- * @retval None
- */
-#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
- (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
- ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
-
-/** @brief Disable the specified UART interrupt.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @param __INTERRUPT__ specifies the UART interrupt source to disable.
- * This parameter can be one of the following values:
- * @arg UART_IT_CTS: CTS change interrupt
- * @arg UART_IT_LBD: LIN Break detection interrupt
- * @arg UART_IT_TXE: Transmit Data Register empty interrupt
- * @arg UART_IT_TC: Transmission complete interrupt
- * @arg UART_IT_RXNE: Receive Data register not empty interrupt
- * @arg UART_IT_IDLE: Idle line detection interrupt
- * @arg UART_IT_PE: Parity Error interrupt
- * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
- * @retval None
- */
-#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
- (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
- ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
-
-/** @brief Checks whether the specified UART interrupt source is enabled or not.
- * @param __HANDLE__ specifies the UART Handle.
- * UART Handle selects the USARTx or UARTy peripheral
- * (USART,UART availability and x,y values depending on device).
- * @param __IT__ specifies the UART interrupt source to check.
- * This parameter can be one of the following values:
- * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
- * @arg UART_IT_LBD: LIN Break detection interrupt
- * @arg UART_IT_TXE: Transmit Data Register empty interrupt
- * @arg UART_IT_TC: Transmission complete interrupt
- * @arg UART_IT_RXNE: Receive Data register not empty interrupt
- * @arg UART_IT_IDLE: Idle line detection interrupt
- * @arg UART_IT_ERR: Error interrupt
- * @retval The new state of __IT__ (TRUE or FALSE).
- */
-#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
- (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
-
-/** @brief Enable CTS flow control
- * @note This macro allows to enable CTS hardware flow control for a given UART instance,
- * without need to call HAL_UART_Init() function.
- * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
- * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
- * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
- * - UART instance should have already been initialised (through call of HAL_UART_Init() )
- * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
- * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
- * @param __HANDLE__ specifies the UART Handle.
- * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
- * It is used to select the USART peripheral (USART availability and x value depending on device).
- * @retval None
- */
-#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
- do{ \
- ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
- (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
- } while(0U)
-
-/** @brief Disable CTS flow control
- * @note This macro allows to disable CTS hardware flow control for a given UART instance,
- * without need to call HAL_UART_Init() function.
- * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
- * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
- * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
- * - UART instance should have already been initialised (through call of HAL_UART_Init() )
- * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
- * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
- * @param __HANDLE__ specifies the UART Handle.
- * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
- * It is used to select the USART peripheral (USART availability and x value depending on device).
- * @retval None
- */
-#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
- do{ \
- ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
- (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
- } while(0U)
-
-/** @brief Enable RTS flow control
- * This macro allows to enable RTS hardware flow control for a given UART instance,
- * without need to call HAL_UART_Init() function.
- * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
- * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
- * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
- * - UART instance should have already been initialised (through call of HAL_UART_Init() )
- * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
- * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
- * @param __HANDLE__ specifies the UART Handle.
- * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
- * It is used to select the USART peripheral (USART availability and x value depending on device).
- * @retval None
- */
-#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
- do{ \
- ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
- (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
- } while(0U)
-
-/** @brief Disable RTS flow control
- * This macro allows to disable RTS hardware flow control for a given UART instance,
- * without need to call HAL_UART_Init() function.
- * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
- * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
- * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
- * - UART instance should have already been initialised (through call of HAL_UART_Init() )
- * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
- * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
- * @param __HANDLE__ specifies the UART Handle.
- * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
- * It is used to select the USART peripheral (USART availability and x value depending on device).
- * @retval None
- */
-#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
- do{ \
- ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
- (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
- } while(0U)
-
-/** @brief Macro to enable the UART's one bit sample method
- * @param __HANDLE__ specifies the UART Handle.
- * @retval None
- */
-#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
-
-/** @brief Macro to disable the UART's one bit sample method
- * @param __HANDLE__ specifies the UART Handle.
- * @retval None
- */
-#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
- &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
-
-/** @brief Enable UART
- * @param __HANDLE__ specifies the UART Handle.
- * @retval None
- */
-#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
-
-/** @brief Disable UART
- * @param __HANDLE__ specifies the UART Handle.
- * @retval None
- */
-#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup UART_Exported_Functions
- * @{
- */
-
-/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
- * @{
- */
-
-/* Initialization/de-initialization functions **********************************/
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
-HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
-HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
-void HAL_UART_MspInit(UART_HandleTypeDef *huart);
-void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
-
-/* Callbacks Register/UnRegister functions ***********************************/
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
- pUART_CallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
-
-HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
-HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
- * @{
- */
-
-/* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
-
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
- uint32_t Timeout);
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-
-/* Transfer Abort functions */
-HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
-
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
-void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
-void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
-void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
-
-void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
-
-/**
- * @}
- */
-
-/** @addtogroup UART_Exported_Functions_Group3
- * @{
- */
-/* Peripheral Control functions ************************************************/
-HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
-/**
- * @}
- */
-
-/** @addtogroup UART_Exported_Functions_Group4
- * @{
- */
-/* Peripheral State functions **************************************************/
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
-uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup UART_Private_Constants UART Private Constants
- * @{
- */
-/** @brief UART interruptions flag mask
- *
- */
-#define UART_IT_MASK 0x0000FFFFU
-
-#define UART_CR1_REG_INDEX 1U
-#define UART_CR2_REG_INDEX 2U
-#define UART_CR3_REG_INDEX 3U
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup UART_Private_Macros UART Private Macros
- * @{
- */
-#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
- ((LENGTH) == UART_WORDLENGTH_9B))
-#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
-#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
- ((STOPBITS) == UART_STOPBITS_2))
-#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
- ((PARITY) == UART_PARITY_EVEN) || \
- ((PARITY) == UART_PARITY_ODD))
-#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
- (((CONTROL) == UART_HWCONTROL_NONE) || \
- ((CONTROL) == UART_HWCONTROL_RTS) || \
- ((CONTROL) == UART_HWCONTROL_CTS) || \
- ((CONTROL) == UART_HWCONTROL_RTS_CTS))
-#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
-#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
- ((STATE) == UART_STATE_ENABLE))
-#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
- ((SAMPLING) == UART_OVERSAMPLING_8))
-#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
-#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
- ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
-#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
- ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
-#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 10500000U)
-#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
-
-#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(4U*((uint64_t)(_BAUD_)))))
-#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
-#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\
- + 50U) / 100U)
-/* UART BRR = mantissa + overflow + fraction
- = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
-#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
- (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U) + \
- (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
-
-#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(2U*((uint64_t)(_BAUD_)))))
-#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
-#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\
- + 50U) / 100U)
-/* UART BRR = mantissa + overflow + fraction
- = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
-#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
- ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U) + \
- (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup UART_Private_Functions UART Private Functions
- * @{
- */
-
-HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_UART_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h
deleted file mode 100644
index 460edfc7c9ad94a617d2978391a6e605196099eb..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h
+++ /dev/null
@@ -1,2105 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_bus.h
- * @author MCD Application Team
- * @brief Header file of BUS LL module.
-
- @verbatim
- ##### RCC Limitations #####
- ==============================================================================
- [..]
- A delay between an RCC peripheral clock enable and the effective peripheral
- enabling should be taken into account in order to manage the peripheral read/write
- from/to registers.
- (+) This delay depends on the peripheral mapping.
- (++) AHB & APB peripherals, 1 dummy read is necessary
-
- [..]
- Workarounds:
- (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
- inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_BUS_H
-#define __STM32F4xx_LL_BUS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined(RCC)
-
-/** @defgroup BUS_LL BUS
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
- * @{
- */
-
-/** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH
- * @{
- */
-#define LL_AHB1_GRP1_PERIPH_ALL 0xFFFFFFFFU
-#define LL_AHB1_GRP1_PERIPH_GPIOA RCC_AHB1ENR_GPIOAEN
-#define LL_AHB1_GRP1_PERIPH_GPIOB RCC_AHB1ENR_GPIOBEN
-#define LL_AHB1_GRP1_PERIPH_GPIOC RCC_AHB1ENR_GPIOCEN
-#if defined(GPIOD)
-#define LL_AHB1_GRP1_PERIPH_GPIOD RCC_AHB1ENR_GPIODEN
-#endif /* GPIOD */
-#if defined(GPIOE)
-#define LL_AHB1_GRP1_PERIPH_GPIOE RCC_AHB1ENR_GPIOEEN
-#endif /* GPIOE */
-#if defined(GPIOF)
-#define LL_AHB1_GRP1_PERIPH_GPIOF RCC_AHB1ENR_GPIOFEN
-#endif /* GPIOF */
-#if defined(GPIOG)
-#define LL_AHB1_GRP1_PERIPH_GPIOG RCC_AHB1ENR_GPIOGEN
-#endif /* GPIOG */
-#if defined(GPIOH)
-#define LL_AHB1_GRP1_PERIPH_GPIOH RCC_AHB1ENR_GPIOHEN
-#endif /* GPIOH */
-#if defined(GPIOI)
-#define LL_AHB1_GRP1_PERIPH_GPIOI RCC_AHB1ENR_GPIOIEN
-#endif /* GPIOI */
-#if defined(GPIOJ)
-#define LL_AHB1_GRP1_PERIPH_GPIOJ RCC_AHB1ENR_GPIOJEN
-#endif /* GPIOJ */
-#if defined(GPIOK)
-#define LL_AHB1_GRP1_PERIPH_GPIOK RCC_AHB1ENR_GPIOKEN
-#endif /* GPIOK */
-#define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
-#if defined(RCC_AHB1ENR_BKPSRAMEN)
-#define LL_AHB1_GRP1_PERIPH_BKPSRAM RCC_AHB1ENR_BKPSRAMEN
-#endif /* RCC_AHB1ENR_BKPSRAMEN */
-#if defined(RCC_AHB1ENR_CCMDATARAMEN)
-#define LL_AHB1_GRP1_PERIPH_CCMDATARAM RCC_AHB1ENR_CCMDATARAMEN
-#endif /* RCC_AHB1ENR_CCMDATARAMEN */
-#define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN
-#define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN
-#if defined(RCC_AHB1ENR_RNGEN)
-#define LL_AHB1_GRP1_PERIPH_RNG RCC_AHB1ENR_RNGEN
-#endif /* RCC_AHB1ENR_RNGEN */
-#if defined(DMA2D)
-#define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN
-#endif /* DMA2D */
-#if defined(ETH)
-#define LL_AHB1_GRP1_PERIPH_ETHMAC RCC_AHB1ENR_ETHMACEN
-#define LL_AHB1_GRP1_PERIPH_ETHMACTX RCC_AHB1ENR_ETHMACTXEN
-#define LL_AHB1_GRP1_PERIPH_ETHMACRX RCC_AHB1ENR_ETHMACRXEN
-#define LL_AHB1_GRP1_PERIPH_ETHMACPTP RCC_AHB1ENR_ETHMACPTPEN
-#endif /* ETH */
-#if defined(USB_OTG_HS)
-#define LL_AHB1_GRP1_PERIPH_OTGHS RCC_AHB1ENR_OTGHSEN
-#define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN
-#endif /* USB_OTG_HS */
-#define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN
-#define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN
-#if defined(RCC_AHB1LPENR_SRAM2LPEN)
-#define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN
-#endif /* RCC_AHB1LPENR_SRAM2LPEN */
-#if defined(RCC_AHB1LPENR_SRAM3LPEN)
-#define LL_AHB1_GRP1_PERIPH_SRAM3 RCC_AHB1LPENR_SRAM3LPEN
-#endif /* RCC_AHB1LPENR_SRAM3LPEN */
-/**
- * @}
- */
-
-#if defined(RCC_AHB2_SUPPORT)
-/** @defgroup BUS_LL_EC_AHB2_GRP1_PERIPH AHB2 GRP1 PERIPH
- * @{
- */
-#define LL_AHB2_GRP1_PERIPH_ALL 0xFFFFFFFFU
-#if defined(DCMI)
-#define LL_AHB2_GRP1_PERIPH_DCMI RCC_AHB2ENR_DCMIEN
-#endif /* DCMI */
-#if defined(CRYP)
-#define LL_AHB2_GRP1_PERIPH_CRYP RCC_AHB2ENR_CRYPEN
-#endif /* CRYP */
-#if defined(AES)
-#define LL_AHB2_GRP1_PERIPH_AES RCC_AHB2ENR_AESEN
-#endif /* AES */
-#if defined(HASH)
-#define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
-#endif /* HASH */
-#if defined(RCC_AHB2ENR_RNGEN)
-#define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN
-#endif /* RCC_AHB2ENR_RNGEN */
-#if defined(USB_OTG_FS)
-#define LL_AHB2_GRP1_PERIPH_OTGFS RCC_AHB2ENR_OTGFSEN
-#endif /* USB_OTG_FS */
-/**
- * @}
- */
-#endif /* RCC_AHB2_SUPPORT */
-
-#if defined(RCC_AHB3_SUPPORT)
-/** @defgroup BUS_LL_EC_AHB3_GRP1_PERIPH AHB3 GRP1 PERIPH
- * @{
- */
-#define LL_AHB3_GRP1_PERIPH_ALL 0xFFFFFFFFU
-#if defined(FSMC_Bank1)
-#define LL_AHB3_GRP1_PERIPH_FSMC RCC_AHB3ENR_FSMCEN
-#endif /* FSMC_Bank1 */
-#if defined(FMC_Bank1)
-#define LL_AHB3_GRP1_PERIPH_FMC RCC_AHB3ENR_FMCEN
-#endif /* FMC_Bank1 */
-#if defined(QUADSPI)
-#define LL_AHB3_GRP1_PERIPH_QSPI RCC_AHB3ENR_QSPIEN
-#endif /* QUADSPI */
-/**
- * @}
- */
-#endif /* RCC_AHB3_SUPPORT */
-
-/** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH
- * @{
- */
-#define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU
-#if defined(TIM2)
-#define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN
-#endif /* TIM2 */
-#if defined(TIM3)
-#define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN
-#endif /* TIM3 */
-#if defined(TIM4)
-#define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN
-#endif /* TIM4 */
-#define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR_TIM5EN
-#if defined(TIM6)
-#define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN
-#endif /* TIM6 */
-#if defined(TIM7)
-#define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN
-#endif /* TIM7 */
-#if defined(TIM12)
-#define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN
-#endif /* TIM12 */
-#if defined(TIM13)
-#define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN
-#endif /* TIM13 */
-#if defined(TIM14)
-#define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN
-#endif /* TIM14 */
-#if defined(LPTIM1)
-#define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN
-#endif /* LPTIM1 */
-#if defined(RCC_APB1ENR_RTCAPBEN)
-#define LL_APB1_GRP1_PERIPH_RTCAPB RCC_APB1ENR_RTCAPBEN
-#endif /* RCC_APB1ENR_RTCAPBEN */
-#define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN
-#if defined(SPI2)
-#define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN
-#endif /* SPI2 */
-#if defined(SPI3)
-#define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN
-#endif /* SPI3 */
-#if defined(SPDIFRX)
-#define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN
-#endif /* SPDIFRX */
-#define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN
-#if defined(USART3)
-#define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR_USART3EN
-#endif /* USART3 */
-#if defined(UART4)
-#define LL_APB1_GRP1_PERIPH_UART4 RCC_APB1ENR_UART4EN
-#endif /* UART4 */
-#if defined(UART5)
-#define LL_APB1_GRP1_PERIPH_UART5 RCC_APB1ENR_UART5EN
-#endif /* UART5 */
-#define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN
-#define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR_I2C2EN
-#if defined(I2C3)
-#define LL_APB1_GRP1_PERIPH_I2C3 RCC_APB1ENR_I2C3EN
-#endif /* I2C3 */
-#if defined(FMPI2C1)
-#define LL_APB1_GRP1_PERIPH_FMPI2C1 RCC_APB1ENR_FMPI2C1EN
-#endif /* FMPI2C1 */
-#if defined(CAN1)
-#define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN
-#endif /* CAN1 */
-#if defined(CAN2)
-#define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN
-#endif /* CAN2 */
-#if defined(CAN3)
-#define LL_APB1_GRP1_PERIPH_CAN3 RCC_APB1ENR_CAN3EN
-#endif /* CAN3 */
-#if defined(CEC)
-#define LL_APB1_GRP1_PERIPH_CEC RCC_APB1ENR_CECEN
-#endif /* CEC */
-#define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN
-#if defined(DAC1)
-#define LL_APB1_GRP1_PERIPH_DAC1 RCC_APB1ENR_DACEN
-#endif /* DAC1 */
-#if defined(UART7)
-#define LL_APB1_GRP1_PERIPH_UART7 RCC_APB1ENR_UART7EN
-#endif /* UART7 */
-#if defined(UART8)
-#define LL_APB1_GRP1_PERIPH_UART8 RCC_APB1ENR_UART8EN
-#endif /* UART8 */
-/**
- * @}
- */
-
-/** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH
- * @{
- */
-#define LL_APB2_GRP1_PERIPH_ALL 0xFFFFFFFFU
-#define LL_APB2_GRP1_PERIPH_TIM1 RCC_APB2ENR_TIM1EN
-#if defined(TIM8)
-#define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
-#endif /* TIM8 */
-#define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN
-#if defined(USART6)
-#define LL_APB2_GRP1_PERIPH_USART6 RCC_APB2ENR_USART6EN
-#endif /* USART6 */
-#if defined(UART9)
-#define LL_APB2_GRP1_PERIPH_UART9 RCC_APB2ENR_UART9EN
-#endif /* UART9 */
-#if defined(UART10)
-#define LL_APB2_GRP1_PERIPH_UART10 RCC_APB2ENR_UART10EN
-#endif /* UART10 */
-#define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN
-#if defined(ADC2)
-#define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN
-#endif /* ADC2 */
-#if defined(ADC3)
-#define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN
-#endif /* ADC3 */
-#if defined(SDIO)
-#define LL_APB2_GRP1_PERIPH_SDIO RCC_APB2ENR_SDIOEN
-#endif /* SDIO */
-#define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN
-#if defined(SPI4)
-#define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN
-#endif /* SPI4 */
-#define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN
-#if defined(RCC_APB2ENR_EXTITEN)
-#define LL_APB2_GRP1_PERIPH_EXTI RCC_APB2ENR_EXTITEN
-#endif /* RCC_APB2ENR_EXTITEN */
-#define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN
-#if defined(TIM10)
-#define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN
-#endif /* TIM10 */
-#define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN
-#if defined(SPI5)
-#define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN
-#endif /* SPI5 */
-#if defined(SPI6)
-#define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN
-#endif /* SPI6 */
-#if defined(SAI1)
-#define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
-#endif /* SAI1 */
-#if defined(SAI2)
-#define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
-#endif /* SAI2 */
-#if defined(LTDC)
-#define LL_APB2_GRP1_PERIPH_LTDC RCC_APB2ENR_LTDCEN
-#endif /* LTDC */
-#if defined(DSI)
-#define LL_APB2_GRP1_PERIPH_DSI RCC_APB2ENR_DSIEN
-#endif /* DSI */
-#if defined(DFSDM1_Channel0)
-#define LL_APB2_GRP1_PERIPH_DFSDM1 RCC_APB2ENR_DFSDM1EN
-#endif /* DFSDM1_Channel0 */
-#if defined(DFSDM2_Channel0)
-#define LL_APB2_GRP1_PERIPH_DFSDM2 RCC_APB2ENR_DFSDM2EN
-#endif /* DFSDM2_Channel0 */
-#define LL_APB2_GRP1_PERIPH_ADC RCC_APB2RSTR_ADCRST
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
- * @{
- */
-
-/** @defgroup BUS_LL_EF_AHB1 AHB1
- * @{
- */
-
-/**
- * @brief Enable AHB1 peripherals clock.
- * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOBEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOCEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOHEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOIEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOJEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR GPIOKEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR CRCEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR RNGEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR OTGHSEN LL_AHB1_GRP1_EnableClock\n
- * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_EnableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB1ENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB1ENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Check if AHB1 peripheral clock is enabled or not
- * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOCEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIODEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOEEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOFEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOGEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOHEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR RNGEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR DMA2DEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n
- * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_IsEnabledClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*)
- *
- * (*) value not defined in all devices.
- * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
-{
- return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs);
-}
-
-/**
- * @brief Disable AHB1 peripherals clock.
- * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOBEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOCEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIODEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOEEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOFEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOGEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR RNGEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n
- * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_DisableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB1ENR, Periphs);
-}
-
-/**
- * @brief Force AHB1 peripherals reset.
- * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIODRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOERST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR RNGRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n
- * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
-{
- SET_BIT(RCC->AHB1RSTR, Periphs);
-}
-
-/**
- * @brief Release AHB1 peripherals reset.
- * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR RNGRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n
- * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB1RSTR, Periphs);
-}
-
-/**
- * @brief Enable AHB1 peripheral clocks in low-power mode
- * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR CRCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR SRAM3LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR RNGLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM3 (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB1LPENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Disable AHB1 peripheral clocks in low-power mode
- * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR CRCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR SRAM3LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR RNGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM3 (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*)
- * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB1LPENR, Periphs);
-}
-
-/**
- * @}
- */
-
-#if defined(RCC_AHB2_SUPPORT)
-/** @defgroup BUS_LL_EF_AHB2 AHB2
- * @{
- */
-
-/**
- * @brief Enable AHB2 peripherals clock.
- * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n
- * AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock\n
- * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n
- * AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock\n
- * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n
- * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB2ENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Check if AHB2 peripheral clock is enabled or not
- * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n
- * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n
- * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n
- * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n
- * AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock\n
- * AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)
-{
- return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs);
-}
-
-/**
- * @brief Disable AHB2 peripherals clock.
- * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n
- * AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock\n
- * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n
- * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n
- * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock\n
- * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB2ENR, Periphs);
-}
-
-/**
- * @brief Force AHB2 peripherals reset.
- * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset\n
- * AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset\n
- * AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset\n
- * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n
- * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n
- * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)
-{
- SET_BIT(RCC->AHB2RSTR, Periphs);
-}
-
-/**
- * @brief Release AHB2 peripherals reset.
- * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset\n
- * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n
- * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n
- * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n
- * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n
- * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB2RSTR, Periphs);
-}
-
-/**
- * @brief Enable AHB2 peripheral clocks in low-power mode
- * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower\n
- * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- * AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- * AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- * AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB2LPENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Disable AHB2 peripheral clocks in low-power mode
- * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower\n
- * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*)
- * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB2LPENR, Periphs);
-}
-
-/**
- * @}
- */
-#endif /* RCC_AHB2_SUPPORT */
-
-#if defined(RCC_AHB3_SUPPORT)
-/** @defgroup BUS_LL_EF_AHB3 AHB3
- * @{
- */
-
-/**
- * @brief Enable AHB3 peripherals clock.
- * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n
- * AHB3ENR FSMCEN LL_AHB3_GRP1_EnableClock\n
- * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB3ENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Check if AHB3 peripheral clock is enabled or not
- * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock\n
- * AHB3ENR FSMCEN LL_AHB3_GRP1_IsEnabledClock\n
- * AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)
-{
- return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs);
-}
-
-/**
- * @brief Disable AHB3 peripherals clock.
- * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n
- * AHB3ENR FSMCEN LL_AHB3_GRP1_DisableClock\n
- * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB3ENR, Periphs);
-}
-
-/**
- * @brief Force AHB3 peripherals reset.
- * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n
- * AHB3RSTR FSMCRST LL_AHB3_GRP1_ForceReset\n
- * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)
-{
- SET_BIT(RCC->AHB3RSTR, Periphs);
-}
-
-/**
- * @brief Release AHB3 peripherals reset.
- * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset\n
- * AHB3RSTR FSMCRST LL_AHB3_GRP1_ReleaseReset\n
- * AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB3RSTR, Periphs);
-}
-
-/**
- * @brief Enable AHB3 peripheral clocks in low-power mode
- * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n
- * AHB3LPENR FSMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n
- * AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->AHB3LPENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Disable AHB3 peripheral clocks in low-power mode
- * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n
- * AHB3LPENR FSMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n
- * AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*)
- * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->AHB3LPENR, Periphs);
-}
-
-/**
- * @}
- */
-#endif /* RCC_AHB3_SUPPORT */
-
-/** @defgroup BUS_LL_EF_APB1 APB1
- * @{
- */
-
-/**
- * @brief Enable APB1 peripherals clock.
- * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM5EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM12EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n
- * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR SPDIFRXEN LL_APB1_GRP1_EnableClock\n
- * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR FMPI2C1EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR CAN3EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n
- * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n
- * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n
- * APB1ENR UART7EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR UART8EN LL_APB1_GRP1_EnableClock\n
- * APB1ENR RTCAPBEN LL_APB1_GRP1_EnableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->APB1ENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Check if APB1 peripheral clock is enabled or not
- * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM12EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM13EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR TIM14EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR SPDIFRXEN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR FMPI2C1EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR UART7EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR UART8EN LL_APB1_GRP1_IsEnabledClock\n
- * APB1ENR RTCAPBEN LL_APB1_GRP1_IsEnabledClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
- *
- * (*) value not defined in all devices.
- * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
-{
- return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
-}
-
-/**
- * @brief Disable APB1 peripherals clock.
- * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM4EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n
- * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR SPI3EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR SPDIFRXEN LL_APB1_GRP1_DisableClock\n
- * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR USART3EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR UART4EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR FMPI2C1EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR CAN1EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR CAN2EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR CAN3EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR CECEN LL_APB1_GRP1_DisableClock\n
- * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n
- * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n
- * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n
- * APB1ENR RTCAPBEN LL_APB1_GRP1_DisableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB1ENR, Periphs);
-}
-
-/**
- * @brief Force APB1 peripherals reset.
- * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM12RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM13RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR TIM14RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR FMPI2C1RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR UART7RST LL_APB1_GRP1_ForceReset\n
- * APB1RSTR UART8RST LL_APB1_GRP1_ForceReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
-{
- SET_BIT(RCC->APB1RSTR, Periphs);
-}
-
-/**
- * @brief Release APB1 peripherals reset.
- * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR USART3RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR UART4RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR UART5RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR FMPI2C1RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR CAN3RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n
- * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB1RSTR, Periphs);
-}
-
-/**
- * @brief Enable APB1 peripheral clocks in low-power mode
- * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM3LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM4LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM5LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM6LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM7LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM12LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM13LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR TIM14LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR WWDGLPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR SPI2LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR SPI3LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR I2C2LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR I2C3LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR FMPI2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR CAN1LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR CAN2LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR CAN3LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR CECLPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR PWRLPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n
- * APB1LPENR RTCAPBLPEN LL_APB1_GRP1_EnableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->APB1LPENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->APB1LPENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Disable APB1 peripheral clocks in low-power mode
- * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM4LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM5LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM6LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM7LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR SPI2LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR SPI3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR USART2LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR USART3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR FMPI2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR CAN1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n
- * APB1LPENR RTCAPBLPEN LL_APB1_GRP1_DisableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
- * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*)
- * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB1LPENR, Periphs);
-}
-
-/**
- * @}
- */
-
-/** @defgroup BUS_LL_EF_APB2 APB2
- * @{
- */
-
-/**
- * @brief Enable APB2 peripherals clock.
- * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR UART9EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR UART10EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SDIOEN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SPI4EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n
- * APB2ENR EXTITEN LL_APB2_GRP1_EnableClock\n
- * APB2ENR TIM9EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR TIM10EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SPI5EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SPI6EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR SAI2EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR LTDCEN LL_APB2_GRP1_EnableClock\n
- * APB2ENR DSIEN LL_APB2_GRP1_EnableClock\n
- * APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock\n
- * APB2ENR DFSDM2EN LL_APB2_GRP1_EnableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
-
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->APB2ENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Check if APB2 peripheral clock is enabled or not
- * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR USART6EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR UART9EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR UART10EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR ADC1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR ADC2EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR ADC3EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SDIOEN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SPI4EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR EXTITEN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR TIM9EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR TIM10EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR TIM11EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SPI5EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SPI6EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SAI1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR SAI2EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR LTDCEN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR DSIEN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR DFSDM1EN LL_APB2_GRP1_IsEnabledClock\n
- * APB2ENR DFSDM2EN LL_APB2_GRP1_IsEnabledClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval State of Periphs (1 or 0).
-*/
-__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)
-{
- return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);
-}
-
-/**
- * @brief Disable APB2 peripherals clock.
- * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR TIM8EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR USART1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR USART6EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR UART9EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR UART10EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR ADC1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR ADC2EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR ADC3EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SDIOEN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SPI1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SPI4EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SYSCFGEN LL_APB2_GRP1_DisableClock\n
- * APB2ENR EXTITEN LL_APB2_GRP1_DisableClock\n
- * APB2ENR TIM9EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR TIM10EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR TIM11EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SPI5EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SPI6EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SAI1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR SAI2EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR LTDCEN LL_APB2_GRP1_DisableClock\n
- * APB2ENR DSIEN LL_APB2_GRP1_DisableClock\n
- * APB2ENR DFSDM1EN LL_APB2_GRP1_DisableClock\n
- * APB2ENR DFSDM2EN LL_APB2_GRP1_DisableClock
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB2ENR, Periphs);
-}
-
-/**
- * @brief Force APB2 peripherals reset.
- * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR USART6RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR UART9RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR UART10RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR ADCRST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SDIORST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SPI4RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR TIM9RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR TIM10RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR TIM11RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SPI5RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SPI6RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SAI1RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR SAI2RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR LTDCRST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR DSIRST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR DFSDM1RST LL_APB2_GRP1_ForceReset\n
- * APB2RSTR DFSDM2RST LL_APB2_GRP1_ForceReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_ALL
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)
-{
- SET_BIT(RCC->APB2RSTR, Periphs);
-}
-
-/**
- * @brief Release APB2 peripherals reset.
- * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR TIM8RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR USART1RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR USART6RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR UART9RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR UART10RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR ADCRST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SDIORST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SPI1RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SPI4RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SYSCFGRST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR TIM9RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SPI6RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SAI1RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR SAI2RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR LTDCRST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR DSIRST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR DFSDM1RST LL_APB2_GRP1_ReleaseReset\n
- * APB2RSTR DFSDM2RST LL_APB2_GRP1_ReleaseReset
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_ALL
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB2RSTR, Periphs);
-}
-
-/**
- * @brief Enable APB2 peripheral clocks in low-power mode
- * @rmtoll APB2LPENR TIM1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR TIM8LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR USART1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR USART6LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR UART9LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR UART10LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR ADC1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR ADC2LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR ADC3LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SDIOLPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SPI1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SPI4LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SYSCFGLPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR EXTITLPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR TIM9LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR TIM10LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR TIM11LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SPI5LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SPI6LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SAI1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR SAI2LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR LTDCLPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR DSILPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR DFSDM1LPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR DSILPEN LL_APB2_GRP1_EnableClockLowPower\n
- * APB2LPENR DFSDM2LPEN LL_APB2_GRP1_EnableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_EnableClockLowPower(uint32_t Periphs)
-{
- __IO uint32_t tmpreg;
- SET_BIT(RCC->APB2LPENR, Periphs);
- /* Delay after an RCC peripheral clock enabling */
- tmpreg = READ_BIT(RCC->APB2LPENR, Periphs);
- (void)tmpreg;
-}
-
-/**
- * @brief Disable APB2 peripheral clocks in low-power mode
- * @rmtoll APB2LPENR TIM1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR TIM8LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR USART1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR USART6LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR UART9LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR UART10LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR ADC1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR ADC2LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR ADC3LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SDIOLPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SPI1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SPI4LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SYSCFGLPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR EXTITLPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR TIM9LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR TIM10LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR TIM11LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SPI5LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SPI6LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SAI1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR SAI2LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR LTDCLPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR DSILPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR DFSDM1LPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR DSILPEN LL_APB2_GRP1_DisableClockLowPower\n
- * APB2LPENR DFSDM2LPEN LL_APB2_GRP1_DisableClockLowPower
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_USART1
- * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
- * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
- * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
-*/
-__STATIC_INLINE void LL_APB2_GRP1_DisableClockLowPower(uint32_t Periphs)
-{
- CLEAR_BIT(RCC->APB2LPENR, Periphs);
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* defined(RCC) */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_BUS_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h
deleted file mode 100644
index 4b11b73da94a410b8b9bca3b85d9bf74ddbe0349..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h
+++ /dev/null
@@ -1,637 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_cortex.h
- * @author MCD Application Team
- * @brief Header file of CORTEX LL module.
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The LL CORTEX driver contains a set of generic APIs that can be
- used by user:
- (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
- functions
- (+) Low power mode configuration (SCB register of Cortex-MCU)
- (+) MPU API to configure and enable regions
- (MPU services provided only on some devices)
- (+) API to access to MCU info (CPUID register)
- (+) API to enable fault handler (SHCSR accesses)
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_CORTEX_H
-#define __STM32F4xx_LL_CORTEX_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-/** @defgroup CORTEX_LL CORTEX
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
- * @{
- */
-
-/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
- * @{
- */
-#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/
-#define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_FAULT Handler Fault type
- * @{
- */
-#define LL_HANDLER_FAULT_USG SCB_SHCSR_USGFAULTENA_Msk /*!< Usage fault */
-#define LL_HANDLER_FAULT_BUS SCB_SHCSR_BUSFAULTENA_Msk /*!< Bus fault */
-#define LL_HANDLER_FAULT_MEM SCB_SHCSR_MEMFAULTENA_Msk /*!< Memory management fault */
-/**
- * @}
- */
-
-#if __MPU_PRESENT
-
-/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
- * @{
- */
-#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE 0x00000000U /*!< Disable NMI and privileged SW access */
-#define LL_MPU_CTRL_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
-#define LL_MPU_CTRL_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk /*!< Enable privileged software access to default memory map */
-#define LL_MPU_CTRL_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
- * @{
- */
-#define LL_MPU_REGION_NUMBER0 0x00U /*!< REGION Number 0 */
-#define LL_MPU_REGION_NUMBER1 0x01U /*!< REGION Number 1 */
-#define LL_MPU_REGION_NUMBER2 0x02U /*!< REGION Number 2 */
-#define LL_MPU_REGION_NUMBER3 0x03U /*!< REGION Number 3 */
-#define LL_MPU_REGION_NUMBER4 0x04U /*!< REGION Number 4 */
-#define LL_MPU_REGION_NUMBER5 0x05U /*!< REGION Number 5 */
-#define LL_MPU_REGION_NUMBER6 0x06U /*!< REGION Number 6 */
-#define LL_MPU_REGION_NUMBER7 0x07U /*!< REGION Number 7 */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
- * @{
- */
-#define LL_MPU_REGION_SIZE_32B (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64B (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128B (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256B (0x07U << MPU_RASR_SIZE_Pos) /*!< 256B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512B (0x08U << MPU_RASR_SIZE_Pos) /*!< 512B Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1KB (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2KB (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4KB (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_8KB (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_16KB (0x0DU << MPU_RASR_SIZE_Pos) /*!< 16KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_32KB (0x0EU << MPU_RASR_SIZE_Pos) /*!< 32KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64KB (0x0FU << MPU_RASR_SIZE_Pos) /*!< 64KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128KB (0x10U << MPU_RASR_SIZE_Pos) /*!< 128KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256KB (0x11U << MPU_RASR_SIZE_Pos) /*!< 256KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512KB (0x12U << MPU_RASR_SIZE_Pos) /*!< 512KB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1MB (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2MB (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4MB (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_8MB (0x16U << MPU_RASR_SIZE_Pos) /*!< 8MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_16MB (0x17U << MPU_RASR_SIZE_Pos) /*!< 16MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_32MB (0x18U << MPU_RASR_SIZE_Pos) /*!< 32MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_64MB (0x19U << MPU_RASR_SIZE_Pos) /*!< 64MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_128MB (0x1AU << MPU_RASR_SIZE_Pos) /*!< 128MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_256MB (0x1BU << MPU_RASR_SIZE_Pos) /*!< 256MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_512MB (0x1CU << MPU_RASR_SIZE_Pos) /*!< 512MB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_1GB (0x1DU << MPU_RASR_SIZE_Pos) /*!< 1GB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_2GB (0x1EU << MPU_RASR_SIZE_Pos) /*!< 2GB Size of the MPU protection region */
-#define LL_MPU_REGION_SIZE_4GB (0x1FU << MPU_RASR_SIZE_Pos) /*!< 4GB Size of the MPU protection region */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
- * @{
- */
-#define LL_MPU_REGION_NO_ACCESS (0x00U << MPU_RASR_AP_Pos) /*!< No access*/
-#define LL_MPU_REGION_PRIV_RW (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privileged access only)*/
-#define LL_MPU_REGION_PRIV_RW_URO (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user (Write in a user program generates a fault) */
-#define LL_MPU_REGION_FULL_ACCESS (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Full access) */
-#define LL_MPU_REGION_PRIV_RO (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privileged read only)*/
-#define LL_MPU_REGION_PRIV_RO_URO (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (read only) */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
- * @{
- */
-#define LL_MPU_TEX_LEVEL0 (0x00U << MPU_RASR_TEX_Pos) /*!< b000 for TEX bits */
-#define LL_MPU_TEX_LEVEL1 (0x01U << MPU_RASR_TEX_Pos) /*!< b001 for TEX bits */
-#define LL_MPU_TEX_LEVEL2 (0x02U << MPU_RASR_TEX_Pos) /*!< b010 for TEX bits */
-#define LL_MPU_TEX_LEVEL4 (0x04U << MPU_RASR_TEX_Pos) /*!< b100 for TEX bits */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
- * @{
- */
-#define LL_MPU_INSTRUCTION_ACCESS_ENABLE 0x00U /*!< Instruction fetches enabled */
-#define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
- * @{
- */
-#define LL_MPU_ACCESS_SHAREABLE MPU_RASR_S_Msk /*!< Shareable memory attribute */
-#define LL_MPU_ACCESS_NOT_SHAREABLE 0x00U /*!< Not Shareable memory attribute */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
- * @{
- */
-#define LL_MPU_ACCESS_CACHEABLE MPU_RASR_C_Msk /*!< Cacheable memory attribute */
-#define LL_MPU_ACCESS_NOT_CACHEABLE 0x00U /*!< Not Cacheable memory attribute */
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
- * @{
- */
-#define LL_MPU_ACCESS_BUFFERABLE MPU_RASR_B_Msk /*!< Bufferable memory attribute */
-#define LL_MPU_ACCESS_NOT_BUFFERABLE 0x00U /*!< Not Bufferable memory attribute */
-/**
- * @}
- */
-#endif /* __MPU_PRESENT */
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
- * @{
- */
-
-/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
- * @{
- */
-
-/**
- * @brief This function checks if the Systick counter flag is active or not.
- * @note It can be used in timeout function on application side.
- * @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void)
-{
- return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk));
-}
-
-/**
- * @brief Configures the SysTick clock source
- * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
- * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
- * @retval None
- */
-__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source)
-{
- if (Source == LL_SYSTICK_CLKSOURCE_HCLK)
- {
- SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
- }
- else
- {
- CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
- }
-}
-
-/**
- * @brief Get the SysTick clock source
- * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
- * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
- */
-__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void)
-{
- return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
-}
-
-/**
- * @brief Enable SysTick exception request
- * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT
- * @retval None
- */
-__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
-{
- SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
- * @brief Disable SysTick exception request
- * @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT
- * @retval None
- */
-__STATIC_INLINE void LL_SYSTICK_DisableIT(void)
-{
- CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
- * @brief Checks if the SYSTICK interrupt is enabled or disabled.
- * @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void)
-{
- return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk));
-}
-
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
- * @{
- */
-
-/**
- * @brief Processor uses sleep as its low power mode
- * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_EnableSleep(void)
-{
- /* Clear SLEEPDEEP bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-}
-
-/**
- * @brief Processor uses deep sleep as its low power mode
- * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_EnableDeepSleep(void)
-{
- /* Set SLEEPDEEP bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-}
-
-/**
- * @brief Configures sleep-on-exit when returning from Handler mode to Thread mode.
- * @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an
- * empty main application.
- * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void)
-{
- /* Set SLEEPONEXIT bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
- * @brief Do not sleep when returning to Thread mode.
- * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void)
-{
- /* Clear SLEEPONEXIT bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
- * @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the
- * processor.
- * @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_EnableEventOnPend(void)
-{
- /* Set SEVEONPEND bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
- * @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are
- * excluded
- * @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend
- * @retval None
- */
-__STATIC_INLINE void LL_LPM_DisableEventOnPend(void)
-{
- /* Clear SEVEONPEND bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EF_HANDLER HANDLER
- * @{
- */
-
-/**
- * @brief Enable a fault in System handler control register (SHCSR)
- * @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_EnableFault
- * @param Fault This parameter can be a combination of the following values:
- * @arg @ref LL_HANDLER_FAULT_USG
- * @arg @ref LL_HANDLER_FAULT_BUS
- * @arg @ref LL_HANDLER_FAULT_MEM
- * @retval None
- */
-__STATIC_INLINE void LL_HANDLER_EnableFault(uint32_t Fault)
-{
- /* Enable the system handler fault */
- SET_BIT(SCB->SHCSR, Fault);
-}
-
-/**
- * @brief Disable a fault in System handler control register (SHCSR)
- * @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_DisableFault
- * @param Fault This parameter can be a combination of the following values:
- * @arg @ref LL_HANDLER_FAULT_USG
- * @arg @ref LL_HANDLER_FAULT_BUS
- * @arg @ref LL_HANDLER_FAULT_MEM
- * @retval None
- */
-__STATIC_INLINE void LL_HANDLER_DisableFault(uint32_t Fault)
-{
- /* Disable the system handler fault */
- CLEAR_BIT(SCB->SHCSR, Fault);
-}
-
-/**
- * @}
- */
-
-/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
- * @{
- */
-
-/**
- * @brief Get Implementer code
- * @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer
- * @retval Value should be equal to 0x41 for ARM
- */
-__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void)
-{
- return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos);
-}
-
-/**
- * @brief Get Variant number (The r value in the rnpn product revision identifier)
- * @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant
- * @retval Value between 0 and 255 (0x0: revision 0)
- */
-__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void)
-{
- return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos);
-}
-
-/**
- * @brief Get Constant number
- * @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetConstant
- * @retval Value should be equal to 0xF for Cortex-M4 devices
- */
-__STATIC_INLINE uint32_t LL_CPUID_GetConstant(void)
-{
- return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos);
-}
-
-/**
- * @brief Get Part number
- * @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo
- * @retval Value should be equal to 0xC24 for Cortex-M4
- */
-__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void)
-{
- return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos);
-}
-
-/**
- * @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release)
- * @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision
- * @retval Value between 0 and 255 (0x1: patch 1)
- */
-__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void)
-{
- return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos);
-}
-
-/**
- * @}
- */
-
-#if __MPU_PRESENT
-/** @defgroup CORTEX_LL_EF_MPU MPU
- * @{
- */
-
-/**
- * @brief Enable MPU with input options
- * @rmtoll MPU_CTRL ENABLE LL_MPU_Enable
- * @param Options This parameter can be one of the following values:
- * @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE
- * @arg @ref LL_MPU_CTRL_HARDFAULT_NMI
- * @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT
- * @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF
- * @retval None
- */
-__STATIC_INLINE void LL_MPU_Enable(uint32_t Options)
-{
- /* Enable the MPU*/
- WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options));
- /* Ensure MPU settings take effects */
- __DSB();
- /* Sequence instruction fetches using update settings */
- __ISB();
-}
-
-/**
- * @brief Disable MPU
- * @rmtoll MPU_CTRL ENABLE LL_MPU_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_MPU_Disable(void)
-{
- /* Make sure outstanding transfers are done */
- __DMB();
- /* Disable MPU*/
- WRITE_REG(MPU->CTRL, 0U);
-}
-
-/**
- * @brief Check if MPU is enabled or not
- * @rmtoll MPU_CTRL ENABLE LL_MPU_IsEnabled
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void)
-{
- return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk));
-}
-
-/**
- * @brief Enable a MPU region
- * @rmtoll MPU_RASR ENABLE LL_MPU_EnableRegion
- * @param Region This parameter can be one of the following values:
- * @arg @ref LL_MPU_REGION_NUMBER0
- * @arg @ref LL_MPU_REGION_NUMBER1
- * @arg @ref LL_MPU_REGION_NUMBER2
- * @arg @ref LL_MPU_REGION_NUMBER3
- * @arg @ref LL_MPU_REGION_NUMBER4
- * @arg @ref LL_MPU_REGION_NUMBER5
- * @arg @ref LL_MPU_REGION_NUMBER6
- * @arg @ref LL_MPU_REGION_NUMBER7
- * @retval None
- */
-__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region)
-{
- /* Set Region number */
- WRITE_REG(MPU->RNR, Region);
- /* Enable the MPU region */
- SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
-}
-
-/**
- * @brief Configure and enable a region
- * @rmtoll MPU_RNR REGION LL_MPU_ConfigRegion\n
- * MPU_RBAR REGION LL_MPU_ConfigRegion\n
- * MPU_RBAR ADDR LL_MPU_ConfigRegion\n
- * MPU_RASR XN LL_MPU_ConfigRegion\n
- * MPU_RASR AP LL_MPU_ConfigRegion\n
- * MPU_RASR S LL_MPU_ConfigRegion\n
- * MPU_RASR C LL_MPU_ConfigRegion\n
- * MPU_RASR B LL_MPU_ConfigRegion\n
- * MPU_RASR SIZE LL_MPU_ConfigRegion
- * @param Region This parameter can be one of the following values:
- * @arg @ref LL_MPU_REGION_NUMBER0
- * @arg @ref LL_MPU_REGION_NUMBER1
- * @arg @ref LL_MPU_REGION_NUMBER2
- * @arg @ref LL_MPU_REGION_NUMBER3
- * @arg @ref LL_MPU_REGION_NUMBER4
- * @arg @ref LL_MPU_REGION_NUMBER5
- * @arg @ref LL_MPU_REGION_NUMBER6
- * @arg @ref LL_MPU_REGION_NUMBER7
- * @param Address Value of region base address
- * @param SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF
- * @param Attributes This parameter can be a combination of the following values:
- * @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B
- * or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB
- * or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB
- * or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB
- * or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB
- * or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB
- * @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS
- * or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO
- * @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4
- * @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE
- * @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE
- * @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE
- * @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE
- * @retval None
- */
-__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes)
-{
- /* Set Region number */
- WRITE_REG(MPU->RNR, Region);
- /* Set base address */
- WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U));
- /* Configure MPU */
- WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos));
-}
-
-/**
- * @brief Disable a region
- * @rmtoll MPU_RNR REGION LL_MPU_DisableRegion\n
- * MPU_RASR ENABLE LL_MPU_DisableRegion
- * @param Region This parameter can be one of the following values:
- * @arg @ref LL_MPU_REGION_NUMBER0
- * @arg @ref LL_MPU_REGION_NUMBER1
- * @arg @ref LL_MPU_REGION_NUMBER2
- * @arg @ref LL_MPU_REGION_NUMBER3
- * @arg @ref LL_MPU_REGION_NUMBER4
- * @arg @ref LL_MPU_REGION_NUMBER5
- * @arg @ref LL_MPU_REGION_NUMBER6
- * @arg @ref LL_MPU_REGION_NUMBER7
- * @retval None
- */
-__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
-{
- /* Set Region number */
- WRITE_REG(MPU->RNR, Region);
- /* Disable the MPU region */
- CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
-}
-
-/**
- * @}
- */
-
-#endif /* __MPU_PRESENT */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_CORTEX_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h
deleted file mode 100644
index c04ac76977c2e6710be802740550414e81461c1a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h
+++ /dev/null
@@ -1,2868 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_dma.h
- * @author MCD Application Team
- * @brief Header file of DMA LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_DMA_H
-#define __STM32F4xx_LL_DMA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (DMA1) || defined (DMA2)
-
-/** @defgroup DMA_LL DMA
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup DMA_LL_Private_Variables DMA Private Variables
- * @{
- */
-/* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */
-static const uint8_t STREAM_OFFSET_TAB[] =
-{
- (uint8_t)(DMA1_Stream0_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream2_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream3_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream5_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream6_BASE - DMA1_BASE),
- (uint8_t)(DMA1_Stream7_BASE - DMA1_BASE)
-};
-
-/**
- * @}
- */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup DMA_LL_Private_Constants DMA Private Constants
- * @{
- */
-/**
- * @}
- */
-
-
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
- * @{
- */
-typedef struct
-{
- uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer
- or as Source base address in case of memory to memory transfer direction.
-
- This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
-
- uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer
- or as Destination base address in case of memory to memory transfer direction.
-
- This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
-
- uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
- from memory to memory or from peripheral to memory.
- This parameter can be a value of @ref DMA_LL_EC_DIRECTION
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
-
- uint32_t Mode; /*!< Specifies the normal or circular operation mode.
- This parameter can be a value of @ref DMA_LL_EC_MODE
- @note The circular buffer mode cannot be used if the memory to memory
- data transfer direction is configured on the selected Stream
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
-
- uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
- is incremented or not.
- This parameter can be a value of @ref DMA_LL_EC_PERIPH
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
-
- uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
- is incremented or not.
- This parameter can be a value of @ref DMA_LL_EC_MEMORY
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
-
- uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
- in case of memory to memory transfer direction.
- This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
-
- uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
- in case of memory to memory transfer direction.
- This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
-
- uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit.
- The data unit is equal to the source buffer configuration set in PeripheralSize
- or MemorySize parameters depending in the transfer direction.
- This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
-
- uint32_t Channel; /*!< Specifies the peripheral channel.
- This parameter can be a value of @ref DMA_LL_EC_CHANNEL
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelSelection(). */
-
- uint32_t Priority; /*!< Specifies the channel priority level.
- This parameter can be a value of @ref DMA_LL_EC_PRIORITY
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetStreamPriorityLevel(). */
-
- uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for the specified stream.
- This parameter can be a value of @ref DMA_LL_FIFOMODE
- @note The Direct mode (FIFO mode disabled) cannot be used if the
- memory-to-memory data transfer is configured on the selected stream
-
- This feature can be modified afterwards using unitary functions @ref LL_DMA_EnableFifoMode() or @ref LL_DMA_EnableFifoMode() . */
-
- uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level.
- This parameter can be a value of @ref DMA_LL_EC_FIFOTHRESHOLD
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetFIFOThreshold(). */
-
- uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory transfers.
- It specifies the amount of data to be transferred in a single non interruptible
- transaction.
- This parameter can be a value of @ref DMA_LL_EC_MBURST
- @note The burst mode is possible only if the address Increment mode is enabled.
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryBurstxfer(). */
-
- uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripheral transfers.
- It specifies the amount of data to be transferred in a single non interruptible
- transaction.
- This parameter can be a value of @ref DMA_LL_EC_PBURST
- @note The burst mode is possible only if the address Increment mode is enabled.
-
- This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphBurstxfer(). */
-
-} LL_DMA_InitTypeDef;
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
- * @{
- */
-
-/** @defgroup DMA_LL_EC_STREAM STREAM
- * @{
- */
-#define LL_DMA_STREAM_0 0x00000000U
-#define LL_DMA_STREAM_1 0x00000001U
-#define LL_DMA_STREAM_2 0x00000002U
-#define LL_DMA_STREAM_3 0x00000003U
-#define LL_DMA_STREAM_4 0x00000004U
-#define LL_DMA_STREAM_5 0x00000005U
-#define LL_DMA_STREAM_6 0x00000006U
-#define LL_DMA_STREAM_7 0x00000007U
-#define LL_DMA_STREAM_ALL 0xFFFF0000U
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_DIRECTION DIRECTION
- * @{
- */
-#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
-#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direction */
-#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_MODE MODE
- * @{
- */
-#define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode */
-#define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode */
-#define LL_DMA_MODE_PFCTRL DMA_SxCR_PFCTRL /*!< Peripheral flow control mode */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_DOUBLEBUFFER_MODE DOUBLEBUFFER MODE
- * @{
- */
-#define LL_DMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U /*!< Disable double buffering mode */
-#define LL_DMA_DOUBLEBUFFER_MODE_ENABLE DMA_SxCR_DBM /*!< Enable double buffering mode */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_PERIPH PERIPH
- * @{
- */
-#define LL_DMA_PERIPH_NOINCREMENT 0x00000000U /*!< Peripheral increment mode Disable */
-#define LL_DMA_PERIPH_INCREMENT DMA_SxCR_PINC /*!< Peripheral increment mode Enable */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_MEMORY MEMORY
- * @{
- */
-#define LL_DMA_MEMORY_NOINCREMENT 0x00000000U /*!< Memory increment mode Disable */
-#define LL_DMA_MEMORY_INCREMENT DMA_SxCR_MINC /*!< Memory increment mode Enable */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_PDATAALIGN PDATAALIGN
- * @{
- */
-#define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment : Byte */
-#define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */
-#define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment : Word */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_MDATAALIGN MDATAALIGN
- * @{
- */
-#define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : Byte */
-#define LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment : HalfWord */
-#define LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment : Word */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_OFFSETSIZE OFFSETSIZE
- * @{
- */
-#define LL_DMA_OFFSETSIZE_PSIZE 0x00000000U /*!< Peripheral increment offset size is linked to the PSIZE */
-#define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offset size is fixed to 4 (32-bit alignment) */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_PRIORITY PRIORITY
- * @{
- */
-#define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
-#define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium */
-#define LL_DMA_PRIORITY_HIGH DMA_SxCR_PL_1 /*!< Priority level : High */
-#define LL_DMA_PRIORITY_VERYHIGH DMA_SxCR_PL /*!< Priority level : Very_High */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
- * @{
- */
-#define LL_DMA_CHANNEL_0 0x00000000U /* Select Channel0 of DMA Instance */
-#define LL_DMA_CHANNEL_1 DMA_SxCR_CHSEL_0 /* Select Channel1 of DMA Instance */
-#define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1 /* Select Channel2 of DMA Instance */
-#define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) /* Select Channel3 of DMA Instance */
-#define LL_DMA_CHANNEL_4 DMA_SxCR_CHSEL_2 /* Select Channel4 of DMA Instance */
-#define LL_DMA_CHANNEL_5 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) /* Select Channel5 of DMA Instance */
-#define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) /* Select Channel6 of DMA Instance */
-#define LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel7 of DMA Instance */
-#if defined (DMA_SxCR_CHSEL_3)
-#define LL_DMA_CHANNEL_8 DMA_SxCR_CHSEL_3 /* Select Channel8 of DMA Instance */
-#define LL_DMA_CHANNEL_9 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_0) /* Select Channel9 of DMA Instance */
-#define LL_DMA_CHANNEL_10 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1) /* Select Channel10 of DMA Instance */
-#define LL_DMA_CHANNEL_11 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel11 of DMA Instance */
-#define LL_DMA_CHANNEL_12 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2) /* Select Channel12 of DMA Instance */
-#define LL_DMA_CHANNEL_13 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) /* Select Channel13 of DMA Instance */
-#define LL_DMA_CHANNEL_14 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) /* Select Channel14 of DMA Instance */
-#define LL_DMA_CHANNEL_15 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel15 of DMA Instance */
-#endif /* DMA_SxCR_CHSEL_3 */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_MBURST MBURST
- * @{
- */
-#define LL_DMA_MBURST_SINGLE 0x00000000U /*!< Memory burst single transfer configuration */
-#define LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 /*!< Memory burst of 4 beats transfer configuration */
-#define LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 /*!< Memory burst of 8 beats transfer configuration */
-#define LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) /*!< Memory burst of 16 beats transfer configuration */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_PBURST PBURST
- * @{
- */
-#define LL_DMA_PBURST_SINGLE 0x00000000U /*!< Peripheral burst single transfer configuration */
-#define LL_DMA_PBURST_INC4 DMA_SxCR_PBURST_0 /*!< Peripheral burst of 4 beats transfer configuration */
-#define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral burst of 8 beats transfer configuration */
-#define LL_DMA_PBURST_INC16 (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) /*!< Peripheral burst of 16 beats transfer configuration */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_FIFOMODE DMA_LL_FIFOMODE
- * @{
- */
-#define LL_DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable (direct mode is enabled) */
-#define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode enable */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_FIFOSTATUS_0 FIFOSTATUS 0
- * @{
- */
-#define LL_DMA_FIFOSTATUS_0_25 0x00000000U /*!< 0 < fifo_level < 1/4 */
-#define LL_DMA_FIFOSTATUS_25_50 DMA_SxFCR_FS_0 /*!< 1/4 < fifo_level < 1/2 */
-#define LL_DMA_FIFOSTATUS_50_75 DMA_SxFCR_FS_1 /*!< 1/2 < fifo_level < 3/4 */
-#define LL_DMA_FIFOSTATUS_75_100 (DMA_SxFCR_FS_1 | DMA_SxFCR_FS_0) /*!< 3/4 < fifo_level < full */
-#define LL_DMA_FIFOSTATUS_EMPTY DMA_SxFCR_FS_2 /*!< FIFO is empty */
-#define LL_DMA_FIFOSTATUS_FULL (DMA_SxFCR_FS_2 | DMA_SxFCR_FS_0) /*!< FIFO is full */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_FIFOTHRESHOLD FIFOTHRESHOLD
- * @{
- */
-#define LL_DMA_FIFOTHRESHOLD_1_4 0x00000000U /*!< FIFO threshold 1 quart full configuration */
-#define LL_DMA_FIFOTHRESHOLD_1_2 DMA_SxFCR_FTH_0 /*!< FIFO threshold half full configuration */
-#define LL_DMA_FIFOTHRESHOLD_3_4 DMA_SxFCR_FTH_1 /*!< FIFO threshold 3 quarts full configuration */
-#define LL_DMA_FIFOTHRESHOLD_FULL DMA_SxFCR_FTH /*!< FIFO threshold full configuration */
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM
- * @{
- */
-#define LL_DMA_CURRENTTARGETMEM0 0x00000000U /*!< Set CurrentTarget Memory to Memory 0 */
-#define LL_DMA_CURRENTTARGETMEM1 DMA_SxCR_CT /*!< Set CurrentTarget Memory to Memory 1 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
- * @{
- */
-
-/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
- * @{
- */
-/**
- * @brief Write a value in DMA register
- * @param __INSTANCE__ DMA Instance
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in DMA register
- * @param __INSTANCE__ DMA Instance
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxStreamy
- * @{
- */
-/**
- * @brief Convert DMAx_Streamy into DMAx
- * @param __STREAM_INSTANCE__ DMAx_Streamy
- * @retval DMAx
- */
-#define __LL_DMA_GET_INSTANCE(__STREAM_INSTANCE__) \
-(((uint32_t)(__STREAM_INSTANCE__) > ((uint32_t)DMA1_Stream7)) ? DMA2 : DMA1)
-
-/**
- * @brief Convert DMAx_Streamy into LL_DMA_STREAM_y
- * @param __STREAM_INSTANCE__ DMAx_Streamy
- * @retval LL_DMA_CHANNEL_y
- */
-#define __LL_DMA_GET_STREAM(__STREAM_INSTANCE__) \
-(((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream0)) ? LL_DMA_STREAM_0 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream0)) ? LL_DMA_STREAM_0 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream1)) ? LL_DMA_STREAM_1 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream1)) ? LL_DMA_STREAM_1 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream2)) ? LL_DMA_STREAM_2 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream2)) ? LL_DMA_STREAM_2 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream3)) ? LL_DMA_STREAM_3 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream3)) ? LL_DMA_STREAM_3 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream4)) ? LL_DMA_STREAM_4 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream4)) ? LL_DMA_STREAM_4 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream5)) ? LL_DMA_STREAM_5 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream5)) ? LL_DMA_STREAM_5 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream6)) ? LL_DMA_STREAM_6 : \
- ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream6)) ? LL_DMA_STREAM_6 : \
- LL_DMA_STREAM_7)
-
-/**
- * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy
- * @param __DMA_INSTANCE__ DMAx
- * @param __STREAM__ LL_DMA_STREAM_y
- * @retval DMAx_Streamy
- */
-#define __LL_DMA_GET_STREAM_INSTANCE(__DMA_INSTANCE__, __STREAM__) \
-((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_0))) ? DMA1_Stream0 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_0))) ? DMA2_Stream0 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_1))) ? DMA1_Stream1 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_1))) ? DMA2_Stream1 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_2))) ? DMA1_Stream2 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_2))) ? DMA2_Stream2 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_3))) ? DMA1_Stream3 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_3))) ? DMA2_Stream3 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_4))) ? DMA1_Stream4 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_4))) ? DMA2_Stream4 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA1_Stream5 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_5))) ? DMA2_Stream5 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_6))) ? DMA1_Stream6 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_6))) ? DMA2_Stream6 : \
- (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DMA_STREAM_7))) ? DMA1_Stream7 : \
- DMA2_Stream7)
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-
-/* Exported functions --------------------------------------------------------*/
- /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
- * @{
- */
-
-/** @defgroup DMA_LL_EF_Configuration Configuration
- * @{
- */
-/**
- * @brief Enable DMA stream.
- * @rmtoll CR EN LL_DMA_EnableStream
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableStream(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_EN);
-}
-
-/**
- * @brief Disable DMA stream.
- * @rmtoll CR EN LL_DMA_DisableStream
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_EN);
-}
-
-/**
- * @brief Check if DMA stream is enabled or disabled.
- * @rmtoll CR EN LL_DMA_IsEnabledStream
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledStream(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_EN) == (DMA_SxCR_EN));
-}
-
-/**
- * @brief Configure all parameters linked to DMA transfer.
- * @rmtoll CR DIR LL_DMA_ConfigTransfer\n
- * CR CIRC LL_DMA_ConfigTransfer\n
- * CR PINC LL_DMA_ConfigTransfer\n
- * CR MINC LL_DMA_ConfigTransfer\n
- * CR PSIZE LL_DMA_ConfigTransfer\n
- * CR MSIZE LL_DMA_ConfigTransfer\n
- * CR PL LL_DMA_ConfigTransfer\n
- * CR PFCTRL LL_DMA_ConfigTransfer
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Configuration This parameter must be a combination of all the following values:
- * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
- * @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR or @ref LL_DMA_MODE_PFCTRL
- * @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
- * @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
- * @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
- * @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
- * @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
- *@retval None
- */
-__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Configuration)
-{
- MODIFY_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR,
- DMA_SxCR_DIR | DMA_SxCR_CIRC | DMA_SxCR_PINC | DMA_SxCR_MINC | DMA_SxCR_PSIZE | DMA_SxCR_MSIZE | DMA_SxCR_PL | DMA_SxCR_PFCTRL,
- Configuration);
-}
-
-/**
- * @brief Set Data transfer direction (read from peripheral or from memory).
- * @rmtoll CR DIR LL_DMA_SetDataTransferDirection
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Direction This parameter can be one of the following values:
- * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Direction)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DIR, Direction);
-}
-
-/**
- * @brief Get Data transfer direction (read from peripheral or from memory).
- * @rmtoll CR DIR LL_DMA_GetDataTransferDirection
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
- */
-__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DIR));
-}
-
-/**
- * @brief Set DMA mode normal, circular or peripheral flow control.
- * @rmtoll CR CIRC LL_DMA_SetMode\n
- * CR PFCTRL LL_DMA_SetMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Mode This parameter can be one of the following values:
- * @arg @ref LL_DMA_MODE_NORMAL
- * @arg @ref LL_DMA_MODE_CIRCULAR
- * @arg @ref LL_DMA_MODE_PFCTRL
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mode)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CIRC | DMA_SxCR_PFCTRL, Mode);
-}
-
-/**
- * @brief Get DMA mode normal, circular or peripheral flow control.
- * @rmtoll CR CIRC LL_DMA_GetMode\n
- * CR PFCTRL LL_DMA_GetMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_MODE_NORMAL
- * @arg @ref LL_DMA_MODE_CIRCULAR
- * @arg @ref LL_DMA_MODE_PFCTRL
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CIRC | DMA_SxCR_PFCTRL));
-}
-
-/**
- * @brief Set Peripheral increment mode.
- * @rmtoll CR PINC LL_DMA_SetPeriphIncMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param IncrementMode This parameter can be one of the following values:
- * @arg @ref LL_DMA_PERIPH_NOINCREMENT
- * @arg @ref LL_DMA_PERIPH_INCREMENT
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t IncrementMode)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PINC, IncrementMode);
-}
-
-/**
- * @brief Get Peripheral increment mode.
- * @rmtoll CR PINC LL_DMA_GetPeriphIncMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_PERIPH_NOINCREMENT
- * @arg @ref LL_DMA_PERIPH_INCREMENT
- */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PINC));
-}
-
-/**
- * @brief Set Memory increment mode.
- * @rmtoll CR MINC LL_DMA_SetMemoryIncMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param IncrementMode This parameter can be one of the following values:
- * @arg @ref LL_DMA_MEMORY_NOINCREMENT
- * @arg @ref LL_DMA_MEMORY_INCREMENT
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t IncrementMode)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MINC, IncrementMode);
-}
-
-/**
- * @brief Get Memory increment mode.
- * @rmtoll CR MINC LL_DMA_GetMemoryIncMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_MEMORY_NOINCREMENT
- * @arg @ref LL_DMA_MEMORY_INCREMENT
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MINC));
-}
-
-/**
- * @brief Set Peripheral size.
- * @rmtoll CR PSIZE LL_DMA_SetPeriphSize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Size This parameter can be one of the following values:
- * @arg @ref LL_DMA_PDATAALIGN_BYTE
- * @arg @ref LL_DMA_PDATAALIGN_HALFWORD
- * @arg @ref LL_DMA_PDATAALIGN_WORD
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PSIZE, Size);
-}
-
-/**
- * @brief Get Peripheral size.
- * @rmtoll CR PSIZE LL_DMA_GetPeriphSize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_PDATAALIGN_BYTE
- * @arg @ref LL_DMA_PDATAALIGN_HALFWORD
- * @arg @ref LL_DMA_PDATAALIGN_WORD
- */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PSIZE));
-}
-
-/**
- * @brief Set Memory size.
- * @rmtoll CR MSIZE LL_DMA_SetMemorySize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Size This parameter can be one of the following values:
- * @arg @ref LL_DMA_MDATAALIGN_BYTE
- * @arg @ref LL_DMA_MDATAALIGN_HALFWORD
- * @arg @ref LL_DMA_MDATAALIGN_WORD
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MSIZE, Size);
-}
-
-/**
- * @brief Get Memory size.
- * @rmtoll CR MSIZE LL_DMA_GetMemorySize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_MDATAALIGN_BYTE
- * @arg @ref LL_DMA_MDATAALIGN_HALFWORD
- * @arg @ref LL_DMA_MDATAALIGN_WORD
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MSIZE));
-}
-
-/**
- * @brief Set Peripheral increment offset size.
- * @rmtoll CR PINCOS LL_DMA_SetIncOffsetSize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param OffsetSize This parameter can be one of the following values:
- * @arg @ref LL_DMA_OFFSETSIZE_PSIZE
- * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t OffsetSize)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PINCOS, OffsetSize);
-}
-
-/**
- * @brief Get Peripheral increment offset size.
- * @rmtoll CR PINCOS LL_DMA_GetIncOffsetSize
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_OFFSETSIZE_PSIZE
- * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4
- */
-__STATIC_INLINE uint32_t LL_DMA_GetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PINCOS));
-}
-
-/**
- * @brief Set Stream priority level.
- * @rmtoll CR PL LL_DMA_SetStreamPriorityLevel
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Priority This parameter can be one of the following values:
- * @arg @ref LL_DMA_PRIORITY_LOW
- * @arg @ref LL_DMA_PRIORITY_MEDIUM
- * @arg @ref LL_DMA_PRIORITY_HIGH
- * @arg @ref LL_DMA_PRIORITY_VERYHIGH
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Priority)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PL, Priority);
-}
-
-/**
- * @brief Get Stream priority level.
- * @rmtoll CR PL LL_DMA_GetStreamPriorityLevel
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_PRIORITY_LOW
- * @arg @ref LL_DMA_PRIORITY_MEDIUM
- * @arg @ref LL_DMA_PRIORITY_HIGH
- * @arg @ref LL_DMA_PRIORITY_VERYHIGH
- */
-__STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PL));
-}
-
-/**
- * @brief Set Number of data to transfer.
- * @rmtoll NDTR NDT LL_DMA_SetDataLength
- * @note This action has no effect if
- * stream is enabled.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param NbData Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t NbData)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->NDTR, DMA_SxNDT, NbData);
-}
-
-/**
- * @brief Get Number of data to transfer.
- * @rmtoll NDTR NDT LL_DMA_GetDataLength
- * @note Once the stream is enabled, the return value indicate the
- * remaining bytes to be transmitted.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef* DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->NDTR, DMA_SxNDT));
-}
-
-/**
- * @brief Select Channel number associated to the Stream.
- * @rmtoll CR CHSEL LL_DMA_SetChannelSelection
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_DMA_CHANNEL_0
- * @arg @ref LL_DMA_CHANNEL_1
- * @arg @ref LL_DMA_CHANNEL_2
- * @arg @ref LL_DMA_CHANNEL_3
- * @arg @ref LL_DMA_CHANNEL_4
- * @arg @ref LL_DMA_CHANNEL_5
- * @arg @ref LL_DMA_CHANNEL_6
- * @arg @ref LL_DMA_CHANNEL_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channel)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CHSEL, Channel);
-}
-
-/**
- * @brief Get the Channel number associated to the Stream.
- * @rmtoll CR CHSEL LL_DMA_GetChannelSelection
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_CHANNEL_0
- * @arg @ref LL_DMA_CHANNEL_1
- * @arg @ref LL_DMA_CHANNEL_2
- * @arg @ref LL_DMA_CHANNEL_3
- * @arg @ref LL_DMA_CHANNEL_4
- * @arg @ref LL_DMA_CHANNEL_5
- * @arg @ref LL_DMA_CHANNEL_6
- * @arg @ref LL_DMA_CHANNEL_7
- */
-__STATIC_INLINE uint32_t LL_DMA_GetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CHSEL));
-}
-
-/**
- * @brief Set Memory burst transfer configuration.
- * @rmtoll CR MBURST LL_DMA_SetMemoryBurstxfer
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Mburst This parameter can be one of the following values:
- * @arg @ref LL_DMA_MBURST_SINGLE
- * @arg @ref LL_DMA_MBURST_INC4
- * @arg @ref LL_DMA_MBURST_INC8
- * @arg @ref LL_DMA_MBURST_INC16
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mburst)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MBURST, Mburst);
-}
-
-/**
- * @brief Get Memory burst transfer configuration.
- * @rmtoll CR MBURST LL_DMA_GetMemoryBurstxfer
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_MBURST_SINGLE
- * @arg @ref LL_DMA_MBURST_INC4
- * @arg @ref LL_DMA_MBURST_INC8
- * @arg @ref LL_DMA_MBURST_INC16
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_MBURST));
-}
-
-/**
- * @brief Set Peripheral burst transfer configuration.
- * @rmtoll CR PBURST LL_DMA_SetPeriphBurstxfer
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Pburst This parameter can be one of the following values:
- * @arg @ref LL_DMA_PBURST_SINGLE
- * @arg @ref LL_DMA_PBURST_INC4
- * @arg @ref LL_DMA_PBURST_INC8
- * @arg @ref LL_DMA_PBURST_INC16
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Pburst)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PBURST, Pburst);
-}
-
-/**
- * @brief Get Peripheral burst transfer configuration.
- * @rmtoll CR PBURST LL_DMA_GetPeriphBurstxfer
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_PBURST_SINGLE
- * @arg @ref LL_DMA_PBURST_INC4
- * @arg @ref LL_DMA_PBURST_INC8
- * @arg @ref LL_DMA_PBURST_INC16
- */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_PBURST));
-}
-
-/**
- * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0.
- * @rmtoll CR CT LL_DMA_SetCurrentTargetMem
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param CurrentMemory This parameter can be one of the following values:
- * @arg @ref LL_DMA_CURRENTTARGETMEM0
- * @arg @ref LL_DMA_CURRENTTARGETMEM1
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t CurrentMemory)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CT, CurrentMemory);
-}
-
-/**
- * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0.
- * @rmtoll CR CT LL_DMA_GetCurrentTargetMem
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_CURRENTTARGETMEM0
- * @arg @ref LL_DMA_CURRENTTARGETMEM1
- */
-__STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_CT));
-}
-
-/**
- * @brief Enable the double buffer mode.
- * @rmtoll CR DBM LL_DMA_EnableDoubleBufferMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DBM);
-}
-
-/**
- * @brief Disable the double buffer mode.
- * @rmtoll CR DBM LL_DMA_DisableDoubleBufferMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DBM);
-}
-
-/**
- * @brief Get FIFO status.
- * @rmtoll FCR FS LL_DMA_GetFIFOStatus
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_FIFOSTATUS_0_25
- * @arg @ref LL_DMA_FIFOSTATUS_25_50
- * @arg @ref LL_DMA_FIFOSTATUS_50_75
- * @arg @ref LL_DMA_FIFOSTATUS_75_100
- * @arg @ref LL_DMA_FIFOSTATUS_EMPTY
- * @arg @ref LL_DMA_FIFOSTATUS_FULL
- */
-__STATIC_INLINE uint32_t LL_DMA_GetFIFOStatus(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FS));
-}
-
-/**
- * @brief Disable Fifo mode.
- * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS);
-}
-
-/**
- * @brief Enable Fifo mode.
- * @rmtoll FCR DMDIS LL_DMA_EnableFifoMode
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_DMDIS);
-}
-
-/**
- * @brief Select FIFO threshold.
- * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Threshold This parameter can be one of the following values:
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
- * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH, Threshold);
-}
-
-/**
- * @brief Get FIFO threshold.
- * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
- * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
- */
-__STATIC_INLINE uint32_t LL_DMA_GetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH));
-}
-
-/**
- * @brief Configure the FIFO .
- * @rmtoll FCR FTH LL_DMA_ConfigFifo\n
- * FCR DMDIS LL_DMA_ConfigFifo
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param FifoMode This parameter can be one of the following values:
- * @arg @ref LL_DMA_FIFOMODE_ENABLE
- * @arg @ref LL_DMA_FIFOMODE_DISABLE
- * @param FifoThreshold This parameter can be one of the following values:
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
- * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
- * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ConfigFifo(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint32_t FifoThreshold)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FTH|DMA_SxFCR_DMDIS, FifoMode|FifoThreshold);
-}
-
-/**
- * @brief Configure the Source and Destination addresses.
- * @note This API must not be called when the DMA stream is enabled.
- * @rmtoll M0AR M0A LL_DMA_ConfigAddresses\n
- * PAR PA LL_DMA_ConfigAddresses
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param SrcAddress Between 0 to 0xFFFFFFFF
- * @param DstAddress Between 0 to 0xFFFFFFFF
- * @param Direction This parameter can be one of the following values:
- * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
- * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction)
-{
- /* Direction Memory to Periph */
- if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
- {
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, SrcAddress);
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, DstAddress);
- }
- /* Direction Periph to Memory and Memory to Memory */
- else
- {
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, SrcAddress);
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, DstAddress);
- }
-}
-
-/**
- * @brief Set the Memory address.
- * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress
- * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
- * @note This API must not be called when the DMA channel is enabled.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param MemoryAddress Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAddress)
-{
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, MemoryAddress);
-}
-
-/**
- * @brief Set the Peripheral address.
- * @rmtoll PAR PA LL_DMA_SetPeriphAddress
- * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
- * @note This API must not be called when the DMA channel is enabled.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param PeriphAddress Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t PeriphAddress)
-{
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, PeriphAddress);
-}
-
-/**
- * @brief Get the Memory address.
- * @rmtoll M0AR M0A LL_DMA_GetMemoryAddress
- * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-{
- return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR));
-}
-
-/**
- * @brief Get the Peripheral address.
- * @rmtoll PAR PA LL_DMA_GetPeriphAddress
- * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-{
- return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR));
-}
-
-/**
- * @brief Set the Memory to Memory Source address.
- * @rmtoll PAR PA LL_DMA_SetM2MSrcAddress
- * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
- * @note This API must not be called when the DMA channel is enabled.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param MemoryAddress Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAddress)
-{
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, MemoryAddress);
-}
-
-/**
- * @brief Set the Memory to Memory Destination address.
- * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress
- * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
- * @note This API must not be called when the DMA channel is enabled.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param MemoryAddress Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAddress)
- {
- WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, MemoryAddress);
- }
-
-/**
- * @brief Get the Memory to Memory Source address.
- * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress
- * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream)
- {
- return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR));
- }
-
-/**
- * @brief Get the Memory to Memory Destination address.
- * @rmtoll M0AR M0A LL_DMA_GetM2MDstAddress
- * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-{
- return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR));
-}
-
-/**
- * @brief Set Memory 1 address (used in case of Double buffer mode).
- * @rmtoll M1AR M1A LL_DMA_SetMemory1Address
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @param Address Between 0 to 0xFFFFFFFF
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address)
-{
- MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, DMA_SxM1AR_M1A, Address);
-}
-
-/**
- * @brief Get Memory 1 address (used in case of Double buffer mode).
- * @rmtoll M1AR M1A LL_DMA_GetMemory1Address
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval Between 0 to 0xFFFFFFFF
- */
-__STATIC_INLINE uint32_t LL_DMA_GetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR);
-}
-
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
- * @{
- */
-
-/**
- * @brief Get Stream 0 half transfer flag.
- * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT0(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF0)==(DMA_LISR_HTIF0));
-}
-
-/**
- * @brief Get Stream 1 half transfer flag.
- * @rmtoll LISR HTIF1 LL_DMA_IsActiveFlag_HT1
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1));
-}
-
-/**
- * @brief Get Stream 2 half transfer flag.
- * @rmtoll LISR HTIF2 LL_DMA_IsActiveFlag_HT2
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2));
-}
-
-/**
- * @brief Get Stream 3 half transfer flag.
- * @rmtoll LISR HTIF3 LL_DMA_IsActiveFlag_HT3
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF3)==(DMA_LISR_HTIF3));
-}
-
-/**
- * @brief Get Stream 4 half transfer flag.
- * @rmtoll HISR HTIF4 LL_DMA_IsActiveFlag_HT4
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF4)==(DMA_HISR_HTIF4));
-}
-
-/**
- * @brief Get Stream 5 half transfer flag.
- * @rmtoll HISR HTIF0 LL_DMA_IsActiveFlag_HT5
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF5)==(DMA_HISR_HTIF5));
-}
-
-/**
- * @brief Get Stream 6 half transfer flag.
- * @rmtoll HISR HTIF6 LL_DMA_IsActiveFlag_HT6
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6));
-}
-
-/**
- * @brief Get Stream 7 half transfer flag.
- * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7));
-}
-
-/**
- * @brief Get Stream 0 transfer complete flag.
- * @rmtoll LISR TCIF0 LL_DMA_IsActiveFlag_TC0
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC0(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF0)==(DMA_LISR_TCIF0));
-}
-
-/**
- * @brief Get Stream 1 transfer complete flag.
- * @rmtoll LISR TCIF1 LL_DMA_IsActiveFlag_TC1
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF1)==(DMA_LISR_TCIF1));
-}
-
-/**
- * @brief Get Stream 2 transfer complete flag.
- * @rmtoll LISR TCIF2 LL_DMA_IsActiveFlag_TC2
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2));
-}
-
-/**
- * @brief Get Stream 3 transfer complete flag.
- * @rmtoll LISR TCIF3 LL_DMA_IsActiveFlag_TC3
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF3)==(DMA_LISR_TCIF3));
-}
-
-/**
- * @brief Get Stream 4 transfer complete flag.
- * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4));
-}
-
-/**
- * @brief Get Stream 5 transfer complete flag.
- * @rmtoll HISR TCIF0 LL_DMA_IsActiveFlag_TC5
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF5)==(DMA_HISR_TCIF5));
-}
-
-/**
- * @brief Get Stream 6 transfer complete flag.
- * @rmtoll HISR TCIF6 LL_DMA_IsActiveFlag_TC6
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF6)==(DMA_HISR_TCIF6));
-}
-
-/**
- * @brief Get Stream 7 transfer complete flag.
- * @rmtoll HISR TCIF7 LL_DMA_IsActiveFlag_TC7
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7));
-}
-
-/**
- * @brief Get Stream 0 transfer error flag.
- * @rmtoll LISR TEIF0 LL_DMA_IsActiveFlag_TE0
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE0(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF0)==(DMA_LISR_TEIF0));
-}
-
-/**
- * @brief Get Stream 1 transfer error flag.
- * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF1)==(DMA_LISR_TEIF1));
-}
-
-/**
- * @brief Get Stream 2 transfer error flag.
- * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF2)==(DMA_LISR_TEIF2));
-}
-
-/**
- * @brief Get Stream 3 transfer error flag.
- * @rmtoll LISR TEIF3 LL_DMA_IsActiveFlag_TE3
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF3)==(DMA_LISR_TEIF3));
-}
-
-/**
- * @brief Get Stream 4 transfer error flag.
- * @rmtoll HISR TEIF4 LL_DMA_IsActiveFlag_TE4
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF4)==(DMA_HISR_TEIF4));
-}
-
-/**
- * @brief Get Stream 5 transfer error flag.
- * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5));
-}
-
-/**
- * @brief Get Stream 6 transfer error flag.
- * @rmtoll HISR TEIF6 LL_DMA_IsActiveFlag_TE6
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6));
-}
-
-/**
- * @brief Get Stream 7 transfer error flag.
- * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF7)==(DMA_HISR_TEIF7));
-}
-
-/**
- * @brief Get Stream 0 direct mode error flag.
- * @rmtoll LISR DMEIF0 LL_DMA_IsActiveFlag_DME0
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME0(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF0)==(DMA_LISR_DMEIF0));
-}
-
-/**
- * @brief Get Stream 1 direct mode error flag.
- * @rmtoll LISR DMEIF1 LL_DMA_IsActiveFlag_DME1
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME1(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF1)==(DMA_LISR_DMEIF1));
-}
-
-/**
- * @brief Get Stream 2 direct mode error flag.
- * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME2(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF2)==(DMA_LISR_DMEIF2));
-}
-
-/**
- * @brief Get Stream 3 direct mode error flag.
- * @rmtoll LISR DMEIF3 LL_DMA_IsActiveFlag_DME3
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3));
-}
-
-/**
- * @brief Get Stream 4 direct mode error flag.
- * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF4)==(DMA_HISR_DMEIF4));
-}
-
-/**
- * @brief Get Stream 5 direct mode error flag.
- * @rmtoll HISR DMEIF0 LL_DMA_IsActiveFlag_DME5
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME5(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF5)==(DMA_HISR_DMEIF5));
-}
-
-/**
- * @brief Get Stream 6 direct mode error flag.
- * @rmtoll HISR DMEIF6 LL_DMA_IsActiveFlag_DME6
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME6(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF6)==(DMA_HISR_DMEIF6));
-}
-
-/**
- * @brief Get Stream 7 direct mode error flag.
- * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF7)==(DMA_HISR_DMEIF7));
-}
-
-/**
- * @brief Get Stream 0 FIFO error flag.
- * @rmtoll LISR FEIF0 LL_DMA_IsActiveFlag_FE0
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE0(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0));
-}
-
-/**
- * @brief Get Stream 1 FIFO error flag.
- * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1));
-}
-
-/**
- * @brief Get Stream 2 FIFO error flag.
- * @rmtoll LISR FEIF2 LL_DMA_IsActiveFlag_FE2
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE2(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF2)==(DMA_LISR_FEIF2));
-}
-
-/**
- * @brief Get Stream 3 FIFO error flag.
- * @rmtoll LISR FEIF3 LL_DMA_IsActiveFlag_FE3
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE3(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF3)==(DMA_LISR_FEIF3));
-}
-
-/**
- * @brief Get Stream 4 FIFO error flag.
- * @rmtoll HISR FEIF4 LL_DMA_IsActiveFlag_FE4
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4));
-}
-
-/**
- * @brief Get Stream 5 FIFO error flag.
- * @rmtoll HISR FEIF0 LL_DMA_IsActiveFlag_FE5
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF5)==(DMA_HISR_FEIF5));
-}
-
-/**
- * @brief Get Stream 6 FIFO error flag.
- * @rmtoll HISR FEIF6 LL_DMA_IsActiveFlag_FE6
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6));
-}
-
-/**
- * @brief Get Stream 7 FIFO error flag.
- * @rmtoll HISR FEIF7 LL_DMA_IsActiveFlag_FE7
- * @param DMAx DMAx Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE7(DMA_TypeDef *DMAx)
-{
- return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF7)==(DMA_HISR_FEIF7));
-}
-
-/**
- * @brief Clear Stream 0 half transfer flag.
- * @rmtoll LIFCR CHTIF0 LL_DMA_ClearFlag_HT0
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT0(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0);
-}
-
-/**
- * @brief Clear Stream 1 half transfer flag.
- * @rmtoll LIFCR CHTIF1 LL_DMA_ClearFlag_HT1
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1);
-}
-
-/**
- * @brief Clear Stream 2 half transfer flag.
- * @rmtoll LIFCR CHTIF2 LL_DMA_ClearFlag_HT2
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2);
-}
-
-/**
- * @brief Clear Stream 3 half transfer flag.
- * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3);
-}
-
-/**
- * @brief Clear Stream 4 half transfer flag.
- * @rmtoll HIFCR CHTIF4 LL_DMA_ClearFlag_HT4
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF4);
-}
-
-/**
- * @brief Clear Stream 5 half transfer flag.
- * @rmtoll HIFCR CHTIF5 LL_DMA_ClearFlag_HT5
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF5);
-}
-
-/**
- * @brief Clear Stream 6 half transfer flag.
- * @rmtoll HIFCR CHTIF6 LL_DMA_ClearFlag_HT6
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6);
-}
-
-/**
- * @brief Clear Stream 7 half transfer flag.
- * @rmtoll HIFCR CHTIF7 LL_DMA_ClearFlag_HT7
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7);
-}
-
-/**
- * @brief Clear Stream 0 transfer complete flag.
- * @rmtoll LIFCR CTCIF0 LL_DMA_ClearFlag_TC0
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC0(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0);
-}
-
-/**
- * @brief Clear Stream 1 transfer complete flag.
- * @rmtoll LIFCR CTCIF1 LL_DMA_ClearFlag_TC1
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF1);
-}
-
-/**
- * @brief Clear Stream 2 transfer complete flag.
- * @rmtoll LIFCR CTCIF2 LL_DMA_ClearFlag_TC2
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF2);
-}
-
-/**
- * @brief Clear Stream 3 transfer complete flag.
- * @rmtoll LIFCR CTCIF3 LL_DMA_ClearFlag_TC3
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF3);
-}
-
-/**
- * @brief Clear Stream 4 transfer complete flag.
- * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4);
-}
-
-/**
- * @brief Clear Stream 5 transfer complete flag.
- * @rmtoll HIFCR CTCIF5 LL_DMA_ClearFlag_TC5
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5);
-}
-
-/**
- * @brief Clear Stream 6 transfer complete flag.
- * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6);
-}
-
-/**
- * @brief Clear Stream 7 transfer complete flag.
- * @rmtoll HIFCR CTCIF7 LL_DMA_ClearFlag_TC7
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7);
-}
-
-/**
- * @brief Clear Stream 0 transfer error flag.
- * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE0(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0);
-}
-
-/**
- * @brief Clear Stream 1 transfer error flag.
- * @rmtoll LIFCR CTEIF1 LL_DMA_ClearFlag_TE1
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1);
-}
-
-/**
- * @brief Clear Stream 2 transfer error flag.
- * @rmtoll LIFCR CTEIF2 LL_DMA_ClearFlag_TE2
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF2);
-}
-
-/**
- * @brief Clear Stream 3 transfer error flag.
- * @rmtoll LIFCR CTEIF3 LL_DMA_ClearFlag_TE3
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF3);
-}
-
-/**
- * @brief Clear Stream 4 transfer error flag.
- * @rmtoll HIFCR CTEIF4 LL_DMA_ClearFlag_TE4
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF4);
-}
-
-/**
- * @brief Clear Stream 5 transfer error flag.
- * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5);
-}
-
-/**
- * @brief Clear Stream 6 transfer error flag.
- * @rmtoll HIFCR CTEIF6 LL_DMA_ClearFlag_TE6
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6);
-}
-
-/**
- * @brief Clear Stream 7 transfer error flag.
- * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7);
-}
-
-/**
- * @brief Clear Stream 0 direct mode error flag.
- * @rmtoll LIFCR CDMEIF0 LL_DMA_ClearFlag_DME0
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME0(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF0);
-}
-
-/**
- * @brief Clear Stream 1 direct mode error flag.
- * @rmtoll LIFCR CDMEIF1 LL_DMA_ClearFlag_DME1
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF1);
-}
-
-/**
- * @brief Clear Stream 2 direct mode error flag.
- * @rmtoll LIFCR CDMEIF2 LL_DMA_ClearFlag_DME2
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME2(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF2);
-}
-
-/**
- * @brief Clear Stream 3 direct mode error flag.
- * @rmtoll LIFCR CDMEIF3 LL_DMA_ClearFlag_DME3
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME3(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF3);
-}
-
-/**
- * @brief Clear Stream 4 direct mode error flag.
- * @rmtoll HIFCR CDMEIF4 LL_DMA_ClearFlag_DME4
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME4(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF4);
-}
-
-/**
- * @brief Clear Stream 5 direct mode error flag.
- * @rmtoll HIFCR CDMEIF5 LL_DMA_ClearFlag_DME5
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME5(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF5);
-}
-
-/**
- * @brief Clear Stream 6 direct mode error flag.
- * @rmtoll HIFCR CDMEIF6 LL_DMA_ClearFlag_DME6
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6);
-}
-
-/**
- * @brief Clear Stream 7 direct mode error flag.
- * @rmtoll HIFCR CDMEIF7 LL_DMA_ClearFlag_DME7
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_DME7(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF7);
-}
-
-/**
- * @brief Clear Stream 0 FIFO error flag.
- * @rmtoll LIFCR CFEIF0 LL_DMA_ClearFlag_FE0
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE0(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF0);
-}
-
-/**
- * @brief Clear Stream 1 FIFO error flag.
- * @rmtoll LIFCR CFEIF1 LL_DMA_ClearFlag_FE1
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE1(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF1);
-}
-
-/**
- * @brief Clear Stream 2 FIFO error flag.
- * @rmtoll LIFCR CFEIF2 LL_DMA_ClearFlag_FE2
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE2(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF2);
-}
-
-/**
- * @brief Clear Stream 3 FIFO error flag.
- * @rmtoll LIFCR CFEIF3 LL_DMA_ClearFlag_FE3
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE3(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3);
-}
-
-/**
- * @brief Clear Stream 4 FIFO error flag.
- * @rmtoll HIFCR CFEIF4 LL_DMA_ClearFlag_FE4
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE4(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF4);
-}
-
-/**
- * @brief Clear Stream 5 FIFO error flag.
- * @rmtoll HIFCR CFEIF5 LL_DMA_ClearFlag_FE5
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE5(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF5);
-}
-
-/**
- * @brief Clear Stream 6 FIFO error flag.
- * @rmtoll HIFCR CFEIF6 LL_DMA_ClearFlag_FE6
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE6(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF6);
-}
-
-/**
- * @brief Clear Stream 7 FIFO error flag.
- * @rmtoll HIFCR CFEIF7 LL_DMA_ClearFlag_FE7
- * @param DMAx DMAx Instance
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_ClearFlag_FE7(DMA_TypeDef *DMAx)
-{
- WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF7);
-}
-
-/**
- * @}
- */
-
-/** @defgroup DMA_LL_EF_IT_Management IT_Management
- * @{
- */
-
-/**
- * @brief Enable Half transfer interrupt.
- * @rmtoll CR HTIE LL_DMA_EnableIT_HT
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_HTIE);
-}
-
-/**
- * @brief Enable Transfer error interrupt.
- * @rmtoll CR TEIE LL_DMA_EnableIT_TE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TEIE);
-}
-
-/**
- * @brief Enable Transfer complete interrupt.
- * @rmtoll CR TCIE LL_DMA_EnableIT_TC
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TCIE);
-}
-
-/**
- * @brief Enable Direct mode error interrupt.
- * @rmtoll CR DMEIE LL_DMA_EnableIT_DME
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableIT_DME(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DMEIE);
-}
-
-/**
- * @brief Enable FIFO error interrupt.
- * @rmtoll FCR FEIE LL_DMA_EnableIT_FE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_EnableIT_FE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE);
-}
-
-/**
- * @brief Disable Half transfer interrupt.
- * @rmtoll CR HTIE LL_DMA_DisableIT_HT
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_HTIE);
-}
-
-/**
- * @brief Disable Transfer error interrupt.
- * @rmtoll CR TEIE LL_DMA_DisableIT_TE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TEIE);
-}
-
-/**
- * @brief Disable Transfer complete interrupt.
- * @rmtoll CR TCIE LL_DMA_DisableIT_TC
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TCIE);
-}
-
-/**
- * @brief Disable Direct mode error interrupt.
- * @rmtoll CR DMEIE LL_DMA_DisableIT_DME
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableIT_DME(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DMEIE);
-}
-
-/**
- * @brief Disable FIFO error interrupt.
- * @rmtoll FCR FEIE LL_DMA_DisableIT_FE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval None
- */
-__STATIC_INLINE void LL_DMA_DisableIT_FE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE);
-}
-
-/**
- * @brief Check if Half transfer interrupt is enabled.
- * @rmtoll CR HTIE LL_DMA_IsEnabledIT_HT
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_HTIE) == DMA_SxCR_HTIE);
-}
-
-/**
- * @brief Check if Transfer error nterrup is enabled.
- * @rmtoll CR TEIE LL_DMA_IsEnabledIT_TE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TEIE) == DMA_SxCR_TEIE);
-}
-
-/**
- * @brief Check if Transfer complete interrupt is enabled.
- * @rmtoll CR TCIE LL_DMA_IsEnabledIT_TC
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_TCIE) == DMA_SxCR_TCIE);
-}
-
-/**
- * @brief Check if Direct mode error interrupt is enabled.
- * @rmtoll CR DMEIE LL_DMA_IsEnabledIT_DME
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_DME(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA_SxCR_DMEIE) == DMA_SxCR_DMEIE);
-}
-
-/**
- * @brief Check if FIFO error interrupt is enabled.
- * @rmtoll FCR FEIE LL_DMA_IsEnabledIT_FE
- * @param DMAx DMAx Instance
- * @param Stream This parameter can be one of the following values:
- * @arg @ref LL_DMA_STREAM_0
- * @arg @ref LL_DMA_STREAM_1
- * @arg @ref LL_DMA_STREAM_2
- * @arg @ref LL_DMA_STREAM_3
- * @arg @ref LL_DMA_STREAM_4
- * @arg @ref LL_DMA_STREAM_5
- * @arg @ref LL_DMA_STREAM_6
- * @arg @ref LL_DMA_STREAM_7
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_FE(DMA_TypeDef *DMAx, uint32_t Stream)
-{
- return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DMA_SxFCR_FEIE) == DMA_SxFCR_FEIE);
-}
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
- * @{
- */
-
-uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Stream, LL_DMA_InitTypeDef *DMA_InitStruct);
-uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Stream);
-void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* DMA1 || DMA2 */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_DMA_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h
deleted file mode 100644
index bef8894f544441a2dfa3c6041166e3c31ecf2f63..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h
+++ /dev/null
@@ -1,954 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_exti.h
- * @author MCD Application Team
- * @brief Header file of EXTI LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.Clause
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_EXTI_H
-#define __STM32F4xx_LL_EXTI_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (EXTI)
-
-/** @defgroup EXTI_LL EXTI
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private Macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
- * @{
- */
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
- * @{
- */
-typedef struct
-{
-
- uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
- This parameter can be any combination of @ref EXTI_LL_EC_LINE */
-
- FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
- This parameter can be set either to ENABLE or DISABLE */
-
- uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
- This parameter can be a value of @ref EXTI_LL_EC_MODE. */
-
- uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
- This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
-} LL_EXTI_InitTypeDef;
-
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
- * @{
- */
-
-/** @defgroup EXTI_LL_EC_LINE LINE
- * @{
- */
-#define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
-#define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
-#define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
-#define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
-#define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
-#define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
-#define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
-#define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
-#define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
-#define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
-#define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
-#define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
-#define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
-#define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
-#define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
-#define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
-#if defined(EXTI_IMR_IM16)
-#define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
-#endif
-#define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
-#if defined(EXTI_IMR_IM18)
-#define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
-#endif
-#define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
-#if defined(EXTI_IMR_IM20)
-#define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
-#endif
-#if defined(EXTI_IMR_IM21)
-#define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
-#endif
-#if defined(EXTI_IMR_IM22)
-#define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
-#endif
-#if defined(EXTI_IMR_IM23)
-#define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
-#endif
-#if defined(EXTI_IMR_IM24)
-#define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
-#endif
-#if defined(EXTI_IMR_IM25)
-#define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
-#endif
-#if defined(EXTI_IMR_IM26)
-#define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
-#endif
-#if defined(EXTI_IMR_IM27)
-#define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
-#endif
-#if defined(EXTI_IMR_IM28)
-#define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
-#endif
-#if defined(EXTI_IMR_IM29)
-#define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
-#endif
-#if defined(EXTI_IMR_IM30)
-#define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
-#endif
-#if defined(EXTI_IMR_IM31)
-#define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
-#endif
-#define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
-
-
-#define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFFU) /*!< All Extended line */
-
-#if defined(USE_FULL_LL_DRIVER)
-#define LL_EXTI_LINE_NONE ((uint32_t)0x00000000U) /*!< None Extended line */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/**
- * @}
- */
-#if defined(USE_FULL_LL_DRIVER)
-
-/** @defgroup EXTI_LL_EC_MODE Mode
- * @{
- */
-#define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
-#define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
-#define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
- * @{
- */
-#define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
-#define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
-#define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
-#define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
-
-/**
- * @}
- */
-
-
-#endif /*USE_FULL_LL_DRIVER*/
-
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
- * @{
- */
-
-/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in EXTI register
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in EXTI register
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
- * @{
- */
-/** @defgroup EXTI_LL_EF_IT_Management IT_Management
- * @{
- */
-
-/**
- * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
- * @note The reset value for the direct or internal lines (see RM)
- * is set to 1 in order to enable the interrupt by default.
- * Bits are set automatically at Power on.
- * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
-{
- SET_BIT(EXTI->IMR, ExtiLine);
-}
-
-/**
- * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
- * @note The reset value for the direct or internal lines (see RM)
- * is set to 1 in order to enable the interrupt by default.
- * Bits are set automatically at Power on.
- * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
-{
- CLEAR_BIT(EXTI->IMR, ExtiLine);
-}
-
-
-/**
- * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
- * @note The reset value for the direct or internal lines (see RM)
- * is set to 1 in order to enable the interrupt by default.
- * Bits are set automatically at Power on.
- * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
-{
- return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EF_Event_Management Event_Management
- * @{
- */
-
-/**
- * @brief Enable ExtiLine Event request for Lines in range 0 to 31
- * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
-{
- SET_BIT(EXTI->EMR, ExtiLine);
-
-}
-
-
-/**
- * @brief Disable ExtiLine Event request for Lines in range 0 to 31
- * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
-{
- CLEAR_BIT(EXTI->EMR, ExtiLine);
-}
-
-
-/**
- * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
- * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
- * @param ExtiLine This parameter can be one of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_17
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @arg @ref LL_EXTI_LINE_23(*)
- * @arg @ref LL_EXTI_LINE_ALL_0_31
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
-{
- return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
-
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
- * @{
- */
-
-/**
- * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
- * @note The configurable wakeup lines are edge-triggered. No glitch must be
- * generated on these lines. If a rising edge on a configurable interrupt
- * line occurs during a write operation in the EXTI_RTSR register, the
- * pending bit is not set.
- * Rising and falling edge triggers can be set for
- * the same interrupt line. In this case, both generate a trigger
- * condition.
- * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
-{
- SET_BIT(EXTI->RTSR, ExtiLine);
-
-}
-
-
-/**
- * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
- * @note The configurable wakeup lines are edge-triggered. No glitch must be
- * generated on these lines. If a rising edge on a configurable interrupt
- * line occurs during a write operation in the EXTI_RTSR register, the
- * pending bit is not set.
- * Rising and falling edge triggers can be set for
- * the same interrupt line. In this case, both generate a trigger
- * condition.
- * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
-{
- CLEAR_BIT(EXTI->RTSR, ExtiLine);
-
-}
-
-
-/**
- * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
- * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
-{
- return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
- * @{
- */
-
-/**
- * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
- * @note The configurable wakeup lines are edge-triggered. No glitch must be
- * generated on these lines. If a falling edge on a configurable interrupt
- * line occurs during a write operation in the EXTI_FTSR register, the
- * pending bit is not set.
- * Rising and falling edge triggers can be set for
- * the same interrupt line. In this case, both generate a trigger
- * condition.
- * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
-{
- SET_BIT(EXTI->FTSR, ExtiLine);
-}
-
-
-/**
- * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
- * @note The configurable wakeup lines are edge-triggered. No glitch must be
- * generated on these lines. If a Falling edge on a configurable interrupt
- * line occurs during a write operation in the EXTI_FTSR register, the
- * pending bit is not set.
- * Rising and falling edge triggers can be set for the same interrupt line.
- * In this case, both generate a trigger condition.
- * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
-{
- CLEAR_BIT(EXTI->FTSR, ExtiLine);
-}
-
-
-/**
- * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
- * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
-{
- return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
- * @{
- */
-
-/**
- * @brief Generate a software Interrupt Event for Lines in range 0 to 31
- * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
- * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
- * resulting in an interrupt request generation.
- * This bit is cleared by clearing the corresponding bit in the EXTI_PR
- * register (by writing a 1 into the bit)
- * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
-{
- SET_BIT(EXTI->SWIER, ExtiLine);
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
- * @{
- */
-
-/**
- * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
- * @note This bit is set when the selected edge event arrives on the interrupt
- * line. This bit is cleared by writing a 1 to the bit.
- * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
-{
- return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
-}
-
-
-/**
- * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
- * @note This bit is set when the selected edge event arrives on the interrupt
- * line. This bit is cleared by writing a 1 to the bit.
- * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval @note This bit is set when the selected edge event arrives on the interrupt
- */
-__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
-{
- return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
-}
-
-
-/**
- * @brief Clear ExtLine Flags for Lines in range 0 to 31
- * @note This bit is set when the selected edge event arrives on the interrupt
- * line. This bit is cleared by writing a 1 to the bit.
- * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
- * @param ExtiLine This parameter can be a combination of the following values:
- * @arg @ref LL_EXTI_LINE_0
- * @arg @ref LL_EXTI_LINE_1
- * @arg @ref LL_EXTI_LINE_2
- * @arg @ref LL_EXTI_LINE_3
- * @arg @ref LL_EXTI_LINE_4
- * @arg @ref LL_EXTI_LINE_5
- * @arg @ref LL_EXTI_LINE_6
- * @arg @ref LL_EXTI_LINE_7
- * @arg @ref LL_EXTI_LINE_8
- * @arg @ref LL_EXTI_LINE_9
- * @arg @ref LL_EXTI_LINE_10
- * @arg @ref LL_EXTI_LINE_11
- * @arg @ref LL_EXTI_LINE_12
- * @arg @ref LL_EXTI_LINE_13
- * @arg @ref LL_EXTI_LINE_14
- * @arg @ref LL_EXTI_LINE_15
- * @arg @ref LL_EXTI_LINE_16
- * @arg @ref LL_EXTI_LINE_18
- * @arg @ref LL_EXTI_LINE_19(*)
- * @arg @ref LL_EXTI_LINE_20(*)
- * @arg @ref LL_EXTI_LINE_21
- * @arg @ref LL_EXTI_LINE_22
- * @note (*): Available in some devices
- * @note Please check each device line mapping for EXTI Line availability
- * @retval None
- */
-__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
-{
- WRITE_REG(EXTI->PR, ExtiLine);
-}
-
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
- * @{
- */
-
-uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
-uint32_t LL_EXTI_DeInit(void);
-void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
-
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* EXTI */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_EXTI_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h
deleted file mode 100644
index 9d5b34c12c9f0cea2e2529d7a6ec0b2a09e31aaa..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h
+++ /dev/null
@@ -1,981 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_gpio.h
- * @author MCD Application Team
- * @brief Header file of GPIO LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_GPIO_H
-#define __STM32F4xx_LL_GPIO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK)
-
-/** @defgroup GPIO_LL GPIO
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
- * @{
- */
-
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
- * @{
- */
-
-/**
- * @brief LL GPIO Init Structure definition
- */
-typedef struct
-{
- uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
- This parameter can be any value of @ref GPIO_LL_EC_PIN */
-
- uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
- This parameter can be a value of @ref GPIO_LL_EC_MODE.
-
- GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
-
- uint32_t Speed; /*!< Specifies the speed for the selected pins.
- This parameter can be a value of @ref GPIO_LL_EC_SPEED.
-
- GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
-
- uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
- This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
-
- GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
-
- uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
- This parameter can be a value of @ref GPIO_LL_EC_PULL.
-
- GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
-
- uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
- This parameter can be a value of @ref GPIO_LL_EC_AF.
-
- GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
-} LL_GPIO_InitTypeDef;
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
- * @{
- */
-
-/** @defgroup GPIO_LL_EC_PIN PIN
- * @{
- */
-#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
-#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
-#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
-#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
-#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
-#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
-#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
-#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
-#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
-#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
-#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
-#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
-#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
-#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
-#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
-#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
-#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
- GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
- GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
- GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
- GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
- GPIO_BSRR_BS_15) /*!< Select all pins */
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EC_MODE Mode
- * @{
- */
-#define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
-#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
-#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
-#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EC_OUTPUT Output Type
- * @{
- */
-#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
-#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EC_SPEED Output Speed
- * @{
- */
-#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
-#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
-#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
-#define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
- * @{
- */
-#define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
-#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
-#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EC_AF Alternate Function
- * @{
- */
-#define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
-#define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
-#define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
-#define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
-#define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
-#define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
-#define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
-#define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
-#define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */
-#define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */
-#define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */
-#define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */
-#define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */
-#define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */
-#define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */
-#define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
- * @{
- */
-
-/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in GPIO register
- * @param __INSTANCE__ GPIO Instance
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in GPIO register
- * @param __INSTANCE__ GPIO Instance
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
- * @{
- */
-
-/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
- * @{
- */
-
-/**
- * @brief Configure gpio mode for a dedicated pin on dedicated port.
- * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll MODER MODEy LL_GPIO_SetPinMode
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @param Mode This parameter can be one of the following values:
- * @arg @ref LL_GPIO_MODE_INPUT
- * @arg @ref LL_GPIO_MODE_OUTPUT
- * @arg @ref LL_GPIO_MODE_ALTERNATE
- * @arg @ref LL_GPIO_MODE_ANALOG
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
-{
- MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
-}
-
-/**
- * @brief Return gpio mode for a dedicated pin on dedicated port.
- * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll MODER MODEy LL_GPIO_GetPinMode
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_MODE_INPUT
- * @arg @ref LL_GPIO_MODE_OUTPUT
- * @arg @ref LL_GPIO_MODE_ALTERNATE
- * @arg @ref LL_GPIO_MODE_ANALOG
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->MODER,
- (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
-}
-
-/**
- * @brief Configure gpio output type for several pins on dedicated port.
- * @note Output type as to be set when gpio pin is in output or
- * alternate modes. Possible type are Push-pull or Open-drain.
- * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @param OutputType This parameter can be one of the following values:
- * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
- * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
-{
- MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
-}
-
-/**
- * @brief Return gpio output type for several pins on dedicated port.
- * @note Output type as to be set when gpio pin is in output or
- * alternate modes. Possible type are Push-pull or Open-drain.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
- * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
-}
-
-/**
- * @brief Configure gpio speed for a dedicated pin on dedicated port.
- * @note I/O speed can be Low, Medium, Fast or High speed.
- * @note Warning: only one pin can be passed as parameter.
- * @note Refer to datasheet for frequency specifications and the power
- * supply and load conditions for each speed.
- * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @param Speed This parameter can be one of the following values:
- * @arg @ref LL_GPIO_SPEED_FREQ_LOW
- * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
- * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
- * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
-{
- MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
- (Speed << (POSITION_VAL(Pin) * 2U)));
-}
-
-/**
- * @brief Return gpio speed for a dedicated pin on dedicated port.
- * @note I/O speed can be Low, Medium, Fast or High speed.
- * @note Warning: only one pin can be passed as parameter.
- * @note Refer to datasheet for frequency specifications and the power
- * supply and load conditions for each speed.
- * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_SPEED_FREQ_LOW
- * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
- * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
- * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
- (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
-}
-
-/**
- * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @param Pull This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PULL_NO
- * @arg @ref LL_GPIO_PULL_UP
- * @arg @ref LL_GPIO_PULL_DOWN
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
-{
- MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
-}
-
-/**
- * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_PULL_NO
- * @arg @ref LL_GPIO_PULL_UP
- * @arg @ref LL_GPIO_PULL_DOWN
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->PUPDR,
- (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
-}
-
-/**
- * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
- * @note Possible values are from AF0 to AF15 depending on target.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @param Alternate This parameter can be one of the following values:
- * @arg @ref LL_GPIO_AF_0
- * @arg @ref LL_GPIO_AF_1
- * @arg @ref LL_GPIO_AF_2
- * @arg @ref LL_GPIO_AF_3
- * @arg @ref LL_GPIO_AF_4
- * @arg @ref LL_GPIO_AF_5
- * @arg @ref LL_GPIO_AF_6
- * @arg @ref LL_GPIO_AF_7
- * @arg @ref LL_GPIO_AF_8
- * @arg @ref LL_GPIO_AF_9
- * @arg @ref LL_GPIO_AF_10
- * @arg @ref LL_GPIO_AF_11
- * @arg @ref LL_GPIO_AF_12
- * @arg @ref LL_GPIO_AF_13
- * @arg @ref LL_GPIO_AF_14
- * @arg @ref LL_GPIO_AF_15
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
-{
- MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
- (Alternate << (POSITION_VAL(Pin) * 4U)));
-}
-
-/**
- * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
- * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_AF_0
- * @arg @ref LL_GPIO_AF_1
- * @arg @ref LL_GPIO_AF_2
- * @arg @ref LL_GPIO_AF_3
- * @arg @ref LL_GPIO_AF_4
- * @arg @ref LL_GPIO_AF_5
- * @arg @ref LL_GPIO_AF_6
- * @arg @ref LL_GPIO_AF_7
- * @arg @ref LL_GPIO_AF_8
- * @arg @ref LL_GPIO_AF_9
- * @arg @ref LL_GPIO_AF_10
- * @arg @ref LL_GPIO_AF_11
- * @arg @ref LL_GPIO_AF_12
- * @arg @ref LL_GPIO_AF_13
- * @arg @ref LL_GPIO_AF_14
- * @arg @ref LL_GPIO_AF_15
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->AFR[0],
- (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
-}
-
-/**
- * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
- * @note Possible values are from AF0 to AF15 depending on target.
- * @note Warning: only one pin can be passed as parameter.
- * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @param Alternate This parameter can be one of the following values:
- * @arg @ref LL_GPIO_AF_0
- * @arg @ref LL_GPIO_AF_1
- * @arg @ref LL_GPIO_AF_2
- * @arg @ref LL_GPIO_AF_3
- * @arg @ref LL_GPIO_AF_4
- * @arg @ref LL_GPIO_AF_5
- * @arg @ref LL_GPIO_AF_6
- * @arg @ref LL_GPIO_AF_7
- * @arg @ref LL_GPIO_AF_8
- * @arg @ref LL_GPIO_AF_9
- * @arg @ref LL_GPIO_AF_10
- * @arg @ref LL_GPIO_AF_11
- * @arg @ref LL_GPIO_AF_12
- * @arg @ref LL_GPIO_AF_13
- * @arg @ref LL_GPIO_AF_14
- * @arg @ref LL_GPIO_AF_15
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
-{
- MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
- (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
-}
-
-/**
- * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
- * @note Possible values are from AF0 to AF15 depending on target.
- * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
- * @param GPIOx GPIO Port
- * @param Pin This parameter can be one of the following values:
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_GPIO_AF_0
- * @arg @ref LL_GPIO_AF_1
- * @arg @ref LL_GPIO_AF_2
- * @arg @ref LL_GPIO_AF_3
- * @arg @ref LL_GPIO_AF_4
- * @arg @ref LL_GPIO_AF_5
- * @arg @ref LL_GPIO_AF_6
- * @arg @ref LL_GPIO_AF_7
- * @arg @ref LL_GPIO_AF_8
- * @arg @ref LL_GPIO_AF_9
- * @arg @ref LL_GPIO_AF_10
- * @arg @ref LL_GPIO_AF_11
- * @arg @ref LL_GPIO_AF_12
- * @arg @ref LL_GPIO_AF_13
- * @arg @ref LL_GPIO_AF_14
- * @arg @ref LL_GPIO_AF_15
- */
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
-{
- return (uint32_t)(READ_BIT(GPIOx->AFR[1],
- (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
-}
-
-
-/**
- * @brief Lock configuration of several pins for a dedicated port.
- * @note When the lock sequence has been applied on a port bit, the
- * value of this port bit can no longer be modified until the
- * next reset.
- * @note Each lock bit freezes a specific configuration register
- * (control and alternate function registers).
- * @rmtoll LCKR LCKK LL_GPIO_LockPin
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- __IO uint32_t temp;
- WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
- WRITE_REG(GPIOx->LCKR, PinMask);
- WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
- temp = READ_REG(GPIOx->LCKR);
- (void) temp;
-}
-
-/**
- * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
- * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
-}
-
-/**
- * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
- * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
- * @param GPIOx GPIO Port
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
-{
- return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
-}
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_LL_EF_Data_Access Data Access
- * @{
- */
-
-/**
- * @brief Return full input data register value for a dedicated port.
- * @rmtoll IDR IDy LL_GPIO_ReadInputPort
- * @param GPIOx GPIO Port
- * @retval Input data register value of port
- */
-__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
-{
- return (uint32_t)(READ_REG(GPIOx->IDR));
-}
-
-/**
- * @brief Return if input data level for several pins of dedicated port is high or low.
- * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
-}
-
-/**
- * @brief Write output data register for the port.
- * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
- * @param GPIOx GPIO Port
- * @param PortValue Level value for each pin of the port
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
-{
- WRITE_REG(GPIOx->ODR, PortValue);
-}
-
-/**
- * @brief Return full output data register value for a dedicated port.
- * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
- * @param GPIOx GPIO Port
- * @retval Output data register value of port
- */
-__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
-{
- return (uint32_t)(READ_REG(GPIOx->ODR));
-}
-
-/**
- * @brief Return if input data level for several pins of dedicated port is high or low.
- * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
-}
-
-/**
- * @brief Set several pins to high level on dedicated gpio port.
- * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- WRITE_REG(GPIOx->BSRR, PinMask);
-}
-
-/**
- * @brief Set several pins to low level on dedicated gpio port.
- * @rmtoll BSRR BRy LL_GPIO_ResetOutputPin
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- WRITE_REG(GPIOx->BSRR, (PinMask << 16));
-}
-
-/**
- * @brief Toggle data value for several pin of dedicated port.
- * @rmtoll ODR ODy LL_GPIO_TogglePin
- * @param GPIOx GPIO Port
- * @param PinMask This parameter can be a combination of the following values:
- * @arg @ref LL_GPIO_PIN_0
- * @arg @ref LL_GPIO_PIN_1
- * @arg @ref LL_GPIO_PIN_2
- * @arg @ref LL_GPIO_PIN_3
- * @arg @ref LL_GPIO_PIN_4
- * @arg @ref LL_GPIO_PIN_5
- * @arg @ref LL_GPIO_PIN_6
- * @arg @ref LL_GPIO_PIN_7
- * @arg @ref LL_GPIO_PIN_8
- * @arg @ref LL_GPIO_PIN_9
- * @arg @ref LL_GPIO_PIN_10
- * @arg @ref LL_GPIO_PIN_11
- * @arg @ref LL_GPIO_PIN_12
- * @arg @ref LL_GPIO_PIN_13
- * @arg @ref LL_GPIO_PIN_14
- * @arg @ref LL_GPIO_PIN_15
- * @arg @ref LL_GPIO_PIN_ALL
- * @retval None
- */
-__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
- uint32_t odr = READ_REG(GPIOx->ODR);
- WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
-}
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
- * @{
- */
-
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
-ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
-void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK) */
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_GPIO_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h
deleted file mode 100644
index 2ef20f7550ad9072dab760c835c4c418720cc11a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h
+++ /dev/null
@@ -1,1890 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_i2c.h
- * @author MCD Application Team
- * @brief Header file of I2C LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_I2C_H
-#define __STM32F4xx_LL_I2C_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (I2C1) || defined (I2C2) || defined (I2C3)
-
-/** @defgroup I2C_LL I2C
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2C_LL_Private_Constants I2C Private Constants
- * @{
- */
-
-/* Defines used to perform compute and check in the macros */
-#define LL_I2C_MAX_SPEED_STANDARD 100000U
-#define LL_I2C_MAX_SPEED_FAST 400000U
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_Private_Macros I2C Private Macros
- * @{
- */
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
- * @{
- */
-typedef struct
-{
- uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
- This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
-
- uint32_t ClockSpeed; /*!< Specifies the clock frequency.
- This parameter must be set to a value lower than 400kHz (in Hz)
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetClockPeriod()
- or @ref LL_I2C_SetDutyCycle() or @ref LL_I2C_SetClockSpeedMode() or @ref LL_I2C_ConfigSpeed(). */
-
- uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
- This parameter can be a value of @ref I2C_LL_EC_DUTYCYCLE
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetDutyCycle(). */
-
-#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
- uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
- This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
-
- This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
-
- uint32_t DigitalFilter; /*!< Configures the digital noise filter.
- This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
-
-#endif
- uint32_t OwnAddress1; /*!< Specifies the device own address 1.
- This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
-
- uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
- This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
-
- uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
- This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
-
- This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
-} LL_I2C_InitTypeDef;
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
- * @{
- */
-
-/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
- * @brief Flags defines which can be used with LL_I2C_ReadReg function
- * @{
- */
-#define LL_I2C_SR1_SB I2C_SR1_SB /*!< Start Bit (master mode) */
-#define LL_I2C_SR1_ADDR I2C_SR1_ADDR /*!< Address sent (master mode) or
- Address matched flag (slave mode) */
-#define LL_I2C_SR1_BTF I2C_SR1_BTF /*!< Byte Transfer Finished flag */
-#define LL_I2C_SR1_ADD10 I2C_SR1_ADD10 /*!< 10-bit header sent (master mode) */
-#define LL_I2C_SR1_STOPF I2C_SR1_STOPF /*!< Stop detection flag (slave mode) */
-#define LL_I2C_SR1_RXNE I2C_SR1_RXNE /*!< Data register not empty (receivers) */
-#define LL_I2C_SR1_TXE I2C_SR1_TXE /*!< Data register empty (transmitters) */
-#define LL_I2C_SR1_BERR I2C_SR1_BERR /*!< Bus error */
-#define LL_I2C_SR1_ARLO I2C_SR1_ARLO /*!< Arbitration lost */
-#define LL_I2C_SR1_AF I2C_SR1_AF /*!< Acknowledge failure flag */
-#define LL_I2C_SR1_OVR I2C_SR1_OVR /*!< Overrun/Underrun */
-#define LL_I2C_SR1_PECERR I2C_ISR_PECERR /*!< PEC Error in reception (SMBus mode) */
-#define LL_I2C_SR1_TIMEOUT I2C_ISR_TIMEOUT /*!< Timeout detection flag (SMBus mode) */
-#define LL_I2C_SR1_SMALERT I2C_ISR_SMALERT /*!< SMBus alert (SMBus mode) */
-#define LL_I2C_SR2_MSL I2C_SR2_MSL /*!< Master/Slave flag */
-#define LL_I2C_SR2_BUSY I2C_SR2_BUSY /*!< Bus busy flag */
-#define LL_I2C_SR2_TRA I2C_SR2_TRA /*!< Transmitter/receiver direction */
-#define LL_I2C_SR2_GENCALL I2C_SR2_GENCALL /*!< General call address (Slave mode) */
-#define LL_I2C_SR2_SMBDEFAULT I2C_SR2_SMBDEFAULT /*!< SMBus Device default address (Slave mode) */
-#define LL_I2C_SR2_SMBHOST I2C_SR2_SMBHOST /*!< SMBus Host address (Slave mode) */
-#define LL_I2C_SR2_DUALF I2C_SR2_DUALF /*!< Dual flag (Slave mode) */
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_IT IT Defines
- * @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
- * @{
- */
-#define LL_I2C_CR2_ITEVTEN I2C_CR2_ITEVTEN /*!< Events interrupts enable */
-#define LL_I2C_CR2_ITBUFEN I2C_CR2_ITBUFEN /*!< Buffer interrupts enable */
-#define LL_I2C_CR2_ITERREN I2C_CR2_ITERREN /*!< Error interrupts enable */
-/**
- * @}
- */
-
-#if defined(I2C_FLTR_ANOFF)
-/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
- * @{
- */
-#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /*!< Analog filter is enabled. */
-#define LL_I2C_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF /*!< Analog filter is disabled.*/
-/**
- * @}
- */
-
-#endif
-/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
- * @{
- */
-#define LL_I2C_OWNADDRESS1_7BIT 0x00004000U /*!< Own address 1 is a 7-bit address. */
-#define LL_I2C_OWNADDRESS1_10BIT (uint32_t)(I2C_OAR1_ADDMODE | 0x00004000U) /*!< Own address 1 is a 10-bit address. */
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_DUTYCYCLE Fast Mode Duty Cycle
- * @{
- */
-#define LL_I2C_DUTYCYCLE_2 0x00000000U /*!< I2C fast mode Tlow/Thigh = 2 */
-#define LL_I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY /*!< I2C fast mode Tlow/Thigh = 16/9 */
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_CLOCK_SPEED_MODE Master Clock Speed Mode
- * @{
- */
-#define LL_I2C_CLOCK_SPEED_STANDARD_MODE 0x00000000U /*!< Master clock speed range is standard mode */
-#define LL_I2C_CLOCK_SPEED_FAST_MODE I2C_CCR_FS /*!< Master clock speed range is fast mode */
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
- * @{
- */
-#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
-#define LL_I2C_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Host address acknowledge */
-#define LL_I2C_MODE_SMBUS_DEVICE I2C_CR1_SMBUS /*!< SMBus Device default mode (Default address not acknowledge) */
-#define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP) /*!< SMBus Device Default address acknowledge */
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
- * @{
- */
-#define LL_I2C_ACK I2C_CR1_ACK /*!< ACK is sent after current received byte. */
-#define LL_I2C_NACK 0x00000000U /*!< NACK is sent after current received byte.*/
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
- * @{
- */
-#define LL_I2C_DIRECTION_WRITE I2C_SR2_TRA /*!< Bus is in write transfer */
-#define LL_I2C_DIRECTION_READ 0x00000000U /*!< Bus is in read transfer */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
- * @{
- */
-
-/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in I2C register
- * @param __INSTANCE__ I2C Instance
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in I2C register
- * @param __INSTANCE__ I2C Instance
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
- * @{
- */
-
-/**
- * @brief Convert Peripheral Clock Frequency in Mhz.
- * @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
- * @retval Value of peripheral clock (in Mhz)
- */
-#define __LL_I2C_FREQ_HZ_TO_MHZ(__PCLK__) (uint32_t)((__PCLK__)/1000000U)
-
-/**
- * @brief Convert Peripheral Clock Frequency in Hz.
- * @param __PCLK__ This parameter must be a value of peripheral clock (in Mhz).
- * @retval Value of peripheral clock (in Hz)
- */
-#define __LL_I2C_FREQ_MHZ_TO_HZ(__PCLK__) (uint32_t)((__PCLK__)*1000000U)
-
-/**
- * @brief Compute I2C Clock rising time.
- * @param __FREQRANGE__ This parameter must be a value of peripheral clock (in Mhz).
- * @param __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
- * @retval Value between Min_Data=0x02 and Max_Data=0x3F
- */
-#define __LL_I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
-
-/**
- * @brief Compute Speed clock range to a Clock Control Register (I2C_CCR_CCR) value.
- * @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
- * @param __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
- * @param __DUTYCYCLE__ This parameter can be one of the following values:
- * @arg @ref LL_I2C_DUTYCYCLE_2
- * @arg @ref LL_I2C_DUTYCYCLE_16_9
- * @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
- */
-#define __LL_I2C_SPEED_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__) (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD)? \
- (__LL_I2C_SPEED_STANDARD_TO_CCR((__PCLK__), (__SPEED__))) : \
- (__LL_I2C_SPEED_FAST_TO_CCR((__PCLK__), (__SPEED__), (__DUTYCYCLE__))))
-
-/**
- * @brief Compute Speed Standard clock range to a Clock Control Register (I2C_CCR_CCR) value.
- * @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
- * @param __SPEED__ This parameter must be a value lower than 100kHz (in Hz).
- * @retval Value between Min_Data=0x004 and Max_Data=0xFFF.
- */
-#define __LL_I2C_SPEED_STANDARD_TO_CCR(__PCLK__, __SPEED__) (uint32_t)(((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
-
-/**
- * @brief Compute Speed Fast clock range to a Clock Control Register (I2C_CCR_CCR) value.
- * @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
- * @param __SPEED__ This parameter must be a value between Min_Data=100Khz and Max_Data=400Khz (in Hz).
- * @param __DUTYCYCLE__ This parameter can be one of the following values:
- * @arg @ref LL_I2C_DUTYCYCLE_2
- * @arg @ref LL_I2C_DUTYCYCLE_16_9
- * @retval Value between Min_Data=0x001 and Max_Data=0xFFF
- */
-#define __LL_I2C_SPEED_FAST_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__) (uint32_t)(((__DUTYCYCLE__) == LL_I2C_DUTYCYCLE_2)? \
- (((((__PCLK__) / ((__SPEED__) * 3U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 3U))) : \
- (((((__PCLK__) / ((__SPEED__) * 25U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 25U))))
-
-/**
- * @brief Get the Least significant bits of a 10-Bits address.
- * @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
- * @retval Value between Min_Data=0x00 and Max_Data=0xFF
- */
-#define __LL_I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
-
-/**
- * @brief Convert a 10-Bits address to a 10-Bits header with Write direction.
- * @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
- * @retval Value between Min_Data=0xF0 and Max_Data=0xF6
- */
-#define __LL_I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0))))
-
-/**
- * @brief Convert a 10-Bits address to a 10-Bits header with Read direction.
- * @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
- * @retval Value between Min_Data=0xF1 and Max_Data=0xF7
- */
-#define __LL_I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1))))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
- * @{
- */
-
-/** @defgroup I2C_LL_EF_Configuration Configuration
- * @{
- */
-
-/**
- * @brief Enable I2C peripheral (PE = 1).
- * @rmtoll CR1 PE LL_I2C_Enable
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_PE);
-}
-
-/**
- * @brief Disable I2C peripheral (PE = 0).
- * @rmtoll CR1 PE LL_I2C_Disable
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
-}
-
-/**
- * @brief Check if the I2C peripheral is enabled or disabled.
- * @rmtoll CR1 PE LL_I2C_IsEnabled
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
-}
-
-#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
-/**
- * @brief Configure Noise Filters (Analog and Digital).
- * @note If the analog filter is also enabled, the digital filter is added to analog filter.
- * The filters can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll FLTR ANOFF LL_I2C_ConfigFilters\n
- * FLTR DNF LL_I2C_ConfigFilters
- * @param I2Cx I2C Instance.
- * @param AnalogFilter This parameter can be one of the following values:
- * @arg @ref LL_I2C_ANALOGFILTER_ENABLE
- * @arg @ref LL_I2C_ANALOGFILTER_DISABLE
- * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*TPCLK1)
- * This parameter is used to configure the digital noise filter on SDA and SCL input. The digital filter will suppress the spikes with a length of up to DNF[3:0]*TPCLK1.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
-{
- MODIFY_REG(I2Cx->FLTR, I2C_FLTR_ANOFF | I2C_FLTR_DNF, AnalogFilter | DigitalFilter);
-}
-#endif
-#if defined(I2C_FLTR_DNF)
-
-/**
- * @brief Configure Digital Noise Filter.
- * @note If the analog filter is also enabled, the digital filter is added to analog filter.
- * This filter can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll FLTR DNF LL_I2C_SetDigitalFilter
- * @param I2Cx I2C Instance.
- * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*TPCLK1)
- * This parameter is used to configure the digital noise filter on SDA and SCL input. The digital filter will suppress the spikes with a length of up to DNF[3:0]*TPCLK1.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
-{
- MODIFY_REG(I2Cx->FLTR, I2C_FLTR_DNF, DigitalFilter);
-}
-
-/**
- * @brief Get the current Digital Noise Filter configuration.
- * @rmtoll FLTR DNF LL_I2C_GetDigitalFilter
- * @param I2Cx I2C Instance.
- * @retval Value between Min_Data=0x0 and Max_Data=0xF
- */
-__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->FLTR, I2C_FLTR_DNF));
-}
-#endif
-#if defined(I2C_FLTR_ANOFF)
-
-/**
- * @brief Enable Analog Noise Filter.
- * @note This filter can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll FLTR ANOFF LL_I2C_EnableAnalogFilter
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->FLTR, I2C_FLTR_ANOFF);
-}
-
-/**
- * @brief Disable Analog Noise Filter.
- * @note This filter can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll FLTR ANOFF LL_I2C_DisableAnalogFilter
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->FLTR, I2C_FLTR_ANOFF);
-}
-
-/**
- * @brief Check if Analog Noise Filter is enabled or disabled.
- * @rmtoll FLTR ANOFF LL_I2C_IsEnabledAnalogFilter
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->FLTR, I2C_FLTR_ANOFF) == (I2C_FLTR_ANOFF));
-}
-#endif
-
-/**
- * @brief Enable DMA transmission requests.
- * @rmtoll CR2 DMAEN LL_I2C_EnableDMAReq_TX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
-}
-
-/**
- * @brief Disable DMA transmission requests.
- * @rmtoll CR2 DMAEN LL_I2C_DisableDMAReq_TX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
-}
-
-/**
- * @brief Check if DMA transmission requests are enabled or disabled.
- * @rmtoll CR2 DMAEN LL_I2C_IsEnabledDMAReq_TX
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
-}
-
-/**
- * @brief Enable DMA reception requests.
- * @rmtoll CR2 DMAEN LL_I2C_EnableDMAReq_RX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
-}
-
-/**
- * @brief Disable DMA reception requests.
- * @rmtoll CR2 DMAEN LL_I2C_DisableDMAReq_RX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
-}
-
-/**
- * @brief Check if DMA reception requests are enabled or disabled.
- * @rmtoll CR2 DMAEN LL_I2C_IsEnabledDMAReq_RX
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
-}
-
-/**
- * @brief Get the data register address used for DMA transfer.
- * @rmtoll DR DR LL_I2C_DMA_GetRegAddr
- * @param I2Cx I2C Instance.
- * @retval Address of data register
- */
-__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx)
-{
- return (uint32_t) & (I2Cx->DR);
-}
-
-/**
- * @brief Enable Clock stretching.
- * @note This bit can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
-}
-
-/**
- * @brief Disable Clock stretching.
- * @note This bit can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
-}
-
-/**
- * @brief Check if Clock stretching is enabled or disabled.
- * @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
-}
-
-/**
- * @brief Enable General Call.
- * @note When enabled the Address 0x00 is ACKed.
- * @rmtoll CR1 ENGC LL_I2C_EnableGeneralCall
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_ENGC);
-}
-
-/**
- * @brief Disable General Call.
- * @note When disabled the Address 0x00 is NACKed.
- * @rmtoll CR1 ENGC LL_I2C_DisableGeneralCall
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENGC);
-}
-
-/**
- * @brief Check if General Call is enabled or disabled.
- * @rmtoll CR1 ENGC LL_I2C_IsEnabledGeneralCall
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_ENGC) == (I2C_CR1_ENGC));
-}
-
-/**
- * @brief Set the Own Address1.
- * @rmtoll OAR1 ADD0 LL_I2C_SetOwnAddress1\n
- * OAR1 ADD1_7 LL_I2C_SetOwnAddress1\n
- * OAR1 ADD8_9 LL_I2C_SetOwnAddress1\n
- * OAR1 ADDMODE LL_I2C_SetOwnAddress1
- * @param I2Cx I2C Instance.
- * @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
- * @param OwnAddrSize This parameter can be one of the following values:
- * @arg @ref LL_I2C_OWNADDRESS1_7BIT
- * @arg @ref LL_I2C_OWNADDRESS1_10BIT
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
-{
- MODIFY_REG(I2Cx->OAR1, I2C_OAR1_ADD0 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD8_9 | I2C_OAR1_ADDMODE, OwnAddress1 | OwnAddrSize);
-}
-
-/**
- * @brief Set the 7bits Own Address2.
- * @note This action has no effect if own address2 is enabled.
- * @rmtoll OAR2 ADD2 LL_I2C_SetOwnAddress2
- * @param I2Cx I2C Instance.
- * @param OwnAddress2 This parameter must be a value between Min_Data=0 and Max_Data=0x7F.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2)
-{
- MODIFY_REG(I2Cx->OAR2, I2C_OAR2_ADD2, OwnAddress2);
-}
-
-/**
- * @brief Enable acknowledge on Own Address2 match address.
- * @rmtoll OAR2 ENDUAL LL_I2C_EnableOwnAddress2
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
-}
-
-/**
- * @brief Disable acknowledge on Own Address2 match address.
- * @rmtoll OAR2 ENDUAL LL_I2C_DisableOwnAddress2
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
-}
-
-/**
- * @brief Check if Own Address1 acknowledge is enabled or disabled.
- * @rmtoll OAR2 ENDUAL LL_I2C_IsEnabledOwnAddress2
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL) == (I2C_OAR2_ENDUAL));
-}
-
-/**
- * @brief Configure the Peripheral clock frequency.
- * @rmtoll CR2 FREQ LL_I2C_SetPeriphClock
- * @param I2Cx I2C Instance.
- * @param PeriphClock Peripheral Clock (in Hz)
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetPeriphClock(I2C_TypeDef *I2Cx, uint32_t PeriphClock)
-{
- MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock));
-}
-
-/**
- * @brief Get the Peripheral clock frequency.
- * @rmtoll CR2 FREQ LL_I2C_GetPeriphClock
- * @param I2Cx I2C Instance.
- * @retval Value of Peripheral Clock (in Hz)
- */
-__STATIC_INLINE uint32_t LL_I2C_GetPeriphClock(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(__LL_I2C_FREQ_MHZ_TO_HZ(READ_BIT(I2Cx->CR2, I2C_CR2_FREQ)));
-}
-
-/**
- * @brief Configure the Duty cycle (Fast mode only).
- * @rmtoll CCR DUTY LL_I2C_SetDutyCycle
- * @param I2Cx I2C Instance.
- * @param DutyCycle This parameter can be one of the following values:
- * @arg @ref LL_I2C_DUTYCYCLE_2
- * @arg @ref LL_I2C_DUTYCYCLE_16_9
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetDutyCycle(I2C_TypeDef *I2Cx, uint32_t DutyCycle)
-{
- MODIFY_REG(I2Cx->CCR, I2C_CCR_DUTY, DutyCycle);
-}
-
-/**
- * @brief Get the Duty cycle (Fast mode only).
- * @rmtoll CCR DUTY LL_I2C_GetDutyCycle
- * @param I2Cx I2C Instance.
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_I2C_DUTYCYCLE_2
- * @arg @ref LL_I2C_DUTYCYCLE_16_9
- */
-__STATIC_INLINE uint32_t LL_I2C_GetDutyCycle(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_DUTY));
-}
-
-/**
- * @brief Configure the I2C master clock speed mode.
- * @rmtoll CCR FS LL_I2C_SetClockSpeedMode
- * @param I2Cx I2C Instance.
- * @param ClockSpeedMode This parameter can be one of the following values:
- * @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
- * @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetClockSpeedMode(I2C_TypeDef *I2Cx, uint32_t ClockSpeedMode)
-{
- MODIFY_REG(I2Cx->CCR, I2C_CCR_FS, ClockSpeedMode);
-}
-
-/**
- * @brief Get the the I2C master speed mode.
- * @rmtoll CCR FS LL_I2C_GetClockSpeedMode
- * @param I2Cx I2C Instance.
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
- * @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
- */
-__STATIC_INLINE uint32_t LL_I2C_GetClockSpeedMode(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_FS));
-}
-
-/**
- * @brief Configure the SCL, SDA rising time.
- * @note This bit can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll TRISE TRISE LL_I2C_SetRiseTime
- * @param I2Cx I2C Instance.
- * @param RiseTime This parameter must be a value between Min_Data=0x02 and Max_Data=0x3F.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetRiseTime(I2C_TypeDef *I2Cx, uint32_t RiseTime)
-{
- MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, RiseTime);
-}
-
-/**
- * @brief Get the SCL, SDA rising time.
- * @rmtoll TRISE TRISE LL_I2C_GetRiseTime
- * @param I2Cx I2C Instance.
- * @retval Value between Min_Data=0x02 and Max_Data=0x3F
- */
-__STATIC_INLINE uint32_t LL_I2C_GetRiseTime(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->TRISE, I2C_TRISE_TRISE));
-}
-
-/**
- * @brief Configure the SCL high and low period.
- * @note This bit can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll CCR CCR LL_I2C_SetClockPeriod
- * @param I2Cx I2C Instance.
- * @param ClockPeriod This parameter must be a value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetClockPeriod(I2C_TypeDef *I2Cx, uint32_t ClockPeriod)
-{
- MODIFY_REG(I2Cx->CCR, I2C_CCR_CCR, ClockPeriod);
-}
-
-/**
- * @brief Get the SCL high and low period.
- * @rmtoll CCR CCR LL_I2C_GetClockPeriod
- * @param I2Cx I2C Instance.
- * @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
- */
-__STATIC_INLINE uint32_t LL_I2C_GetClockPeriod(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_CCR));
-}
-
-/**
- * @brief Configure the SCL speed.
- * @note This bit can only be programmed when the I2C is disabled (PE = 0).
- * @rmtoll CR2 FREQ LL_I2C_ConfigSpeed\n
- * TRISE TRISE LL_I2C_ConfigSpeed\n
- * CCR FS LL_I2C_ConfigSpeed\n
- * CCR DUTY LL_I2C_ConfigSpeed\n
- * CCR CCR LL_I2C_ConfigSpeed
- * @param I2Cx I2C Instance.
- * @param PeriphClock Peripheral Clock (in Hz)
- * @param ClockSpeed This parameter must be a value lower than 400kHz (in Hz).
- * @param DutyCycle This parameter can be one of the following values:
- * @arg @ref LL_I2C_DUTYCYCLE_2
- * @arg @ref LL_I2C_DUTYCYCLE_16_9
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
- uint32_t DutyCycle)
-{
- uint32_t freqrange = 0x0U;
- uint32_t clockconfig = 0x0U;
-
- /* Compute frequency range */
- freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);
-
- /* Configure I2Cx: Frequency range register */
- MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, freqrange);
-
- /* Configure I2Cx: Rise Time register */
- MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, __LL_I2C_RISE_TIME(freqrange, ClockSpeed));
-
- /* Configure Speed mode, Duty Cycle and Clock control register value */
- if (ClockSpeed > LL_I2C_MAX_SPEED_STANDARD)
- {
- /* Set Speed mode at fast and duty cycle for Clock Speed request in fast clock range */
- clockconfig = LL_I2C_CLOCK_SPEED_FAST_MODE | \
- __LL_I2C_SPEED_FAST_TO_CCR(PeriphClock, ClockSpeed, DutyCycle) | \
- DutyCycle;
- }
- else
- {
- /* Set Speed mode at standard for Clock Speed request in standard clock range */
- clockconfig = LL_I2C_CLOCK_SPEED_STANDARD_MODE | \
- __LL_I2C_SPEED_STANDARD_TO_CCR(PeriphClock, ClockSpeed);
- }
-
- /* Configure I2Cx: Clock control register */
- MODIFY_REG(I2Cx->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), clockconfig);
-}
-
-/**
- * @brief Configure peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 SMBUS LL_I2C_SetMode\n
- * CR1 SMBTYPE LL_I2C_SetMode\n
- * CR1 ENARP LL_I2C_SetMode
- * @param I2Cx I2C Instance.
- * @param PeripheralMode This parameter can be one of the following values:
- * @arg @ref LL_I2C_MODE_I2C
- * @arg @ref LL_I2C_MODE_SMBUS_HOST
- * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
- * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
-{
- MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode);
-}
-
-/**
- * @brief Get peripheral mode.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 SMBUS LL_I2C_GetMode\n
- * CR1 SMBTYPE LL_I2C_GetMode\n
- * CR1 ENARP LL_I2C_GetMode
- * @param I2Cx I2C Instance.
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_I2C_MODE_I2C
- * @arg @ref LL_I2C_MODE_SMBUS_HOST
- * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
- * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
- */
-__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP));
-}
-
-/**
- * @brief Enable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note SMBus Device mode:
- * - SMBus Alert pin is drived low and
- * Alert Response Address Header acknowledge is enabled.
- * SMBus Host mode:
- * - SMBus Alert pin management is supported.
- * @rmtoll CR1 ALERT LL_I2C_EnableSMBusAlert
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_ALERT);
-}
-
-/**
- * @brief Disable SMBus alert (Host or Device mode)
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note SMBus Device mode:
- * - SMBus Alert pin is not drived (can be used as a standard GPIO) and
- * Alert Response Address Header acknowledge is disabled.
- * SMBus Host mode:
- * - SMBus Alert pin management is not supported.
- * @rmtoll CR1 ALERT LL_I2C_DisableSMBusAlert
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERT);
-}
-
-/**
- * @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 ALERT LL_I2C_IsEnabledSMBusAlert
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERT) == (I2C_CR1_ALERT));
-}
-
-/**
- * @brief Enable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 ENPEC LL_I2C_EnableSMBusPEC
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
-}
-
-/**
- * @brief Disable SMBus Packet Error Calculation (PEC).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 ENPEC LL_I2C_DisableSMBusPEC
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
-}
-
-/**
- * @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 ENPEC LL_I2C_IsEnabledSMBusPEC
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC));
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EF_IT_Management IT_Management
- * @{
- */
-
-/**
- * @brief Enable TXE interrupt.
- * @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_TX\n
- * CR2 ITBUFEN LL_I2C_EnableIT_TX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Disable TXE interrupt.
- * @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_TX\n
- * CR2 ITBUFEN LL_I2C_DisableIT_TX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Check if the TXE Interrupt is enabled or disabled.
- * @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_TX\n
- * CR2 ITBUFEN LL_I2C_IsEnabledIT_TX
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN));
-}
-
-/**
- * @brief Enable RXNE interrupt.
- * @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_RX\n
- * CR2 ITBUFEN LL_I2C_EnableIT_RX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Disable RXNE interrupt.
- * @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_RX\n
- * CR2 ITBUFEN LL_I2C_DisableIT_RX
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Check if the RXNE Interrupt is enabled or disabled.
- * @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_RX\n
- * CR2 ITBUFEN LL_I2C_IsEnabledIT_RX
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN));
-}
-
-/**
- * @brief Enable Events interrupts.
- * @note Any of these events will generate interrupt :
- * Start Bit (SB)
- * Address sent, Address matched (ADDR)
- * 10-bit header sent (ADD10)
- * Stop detection (STOPF)
- * Byte transfer finished (BTF)
- *
- * @note Any of these events will generate interrupt if Buffer interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_BUF()) :
- * Receive buffer not empty (RXNE)
- * Transmit buffer empty (TXE)
- * @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_EVT
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableIT_EVT(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
-}
-
-/**
- * @brief Disable Events interrupts.
- * @note Any of these events will generate interrupt :
- * Start Bit (SB)
- * Address sent, Address matched (ADDR)
- * 10-bit header sent (ADD10)
- * Stop detection (STOPF)
- * Byte transfer finished (BTF)
- * Receive buffer not empty (RXNE)
- * Transmit buffer empty (TXE)
- * @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_EVT
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableIT_EVT(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
-}
-
-/**
- * @brief Check if Events interrupts are enabled or disabled.
- * @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_EVT
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_EVT(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN) == (I2C_CR2_ITEVTEN));
-}
-
-/**
- * @brief Enable Buffer interrupts.
- * @note Any of these Buffer events will generate interrupt if Events interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_EVT()) :
- * Receive buffer not empty (RXNE)
- * Transmit buffer empty (TXE)
- * @rmtoll CR2 ITBUFEN LL_I2C_EnableIT_BUF
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableIT_BUF(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Disable Buffer interrupts.
- * @note Any of these Buffer events will generate interrupt :
- * Receive buffer not empty (RXNE)
- * Transmit buffer empty (TXE)
- * @rmtoll CR2 ITBUFEN LL_I2C_DisableIT_BUF
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableIT_BUF(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
-}
-
-/**
- * @brief Check if Buffer interrupts are enabled or disabled.
- * @rmtoll CR2 ITBUFEN LL_I2C_IsEnabledIT_BUF
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_BUF(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN) == (I2C_CR2_ITBUFEN));
-}
-
-/**
- * @brief Enable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note Any of these errors will generate interrupt :
- * Bus Error detection (BERR)
- * Arbitration Loss (ARLO)
- * Acknowledge Failure(AF)
- * Overrun/Underrun (OVR)
- * SMBus Timeout detection (TIMEOUT)
- * SMBus PEC error detection (PECERR)
- * SMBus Alert pin event detection (SMBALERT)
- * @rmtoll CR2 ITERREN LL_I2C_EnableIT_ERR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
-}
-
-/**
- * @brief Disable Error interrupts.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note Any of these errors will generate interrupt :
- * Bus Error detection (BERR)
- * Arbitration Loss (ARLO)
- * Acknowledge Failure(AF)
- * Overrun/Underrun (OVR)
- * SMBus Timeout detection (TIMEOUT)
- * SMBus PEC error detection (PECERR)
- * SMBus Alert pin event detection (SMBALERT)
- * @rmtoll CR2 ITERREN LL_I2C_DisableIT_ERR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
-}
-
-/**
- * @brief Check if Error interrupts are enabled or disabled.
- * @rmtoll CR2 ITERREN LL_I2C_IsEnabledIT_ERR
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_ITERREN) == (I2C_CR2_ITERREN));
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
- * @{
- */
-
-/**
- * @brief Indicate the status of Transmit data register empty flag.
- * @note RESET: When next data is written in Transmit data register.
- * SET: When Transmit data register is empty.
- * @rmtoll SR1 TXE LL_I2C_IsActiveFlag_TXE
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_TXE) == (I2C_SR1_TXE));
-}
-
-/**
- * @brief Indicate the status of Byte Transfer Finished flag.
- * RESET: When Data byte transfer not done.
- * SET: When Data byte transfer succeeded.
- * @rmtoll SR1 BTF LL_I2C_IsActiveFlag_BTF
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BTF(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_BTF) == (I2C_SR1_BTF));
-}
-
-/**
- * @brief Indicate the status of Receive data register not empty flag.
- * @note RESET: When Receive data register is read.
- * SET: When the received data is copied in Receive data register.
- * @rmtoll SR1 RXNE LL_I2C_IsActiveFlag_RXNE
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_RXNE) == (I2C_SR1_RXNE));
-}
-
-/**
- * @brief Indicate the status of Start Bit (master mode).
- * @note RESET: When No Start condition.
- * SET: When Start condition is generated.
- * @rmtoll SR1 SB LL_I2C_IsActiveFlag_SB
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_SB(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_SB) == (I2C_SR1_SB));
-}
-
-/**
- * @brief Indicate the status of Address sent (master mode) or Address matched flag (slave mode).
- * @note RESET: Clear default value.
- * SET: When the address is fully sent (master mode) or when the received slave address matched with one of the enabled slave address (slave mode).
- * @rmtoll SR1 ADDR LL_I2C_IsActiveFlag_ADDR
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_ADDR) == (I2C_SR1_ADDR));
-}
-
-/**
- * @brief Indicate the status of 10-bit header sent (master mode).
- * @note RESET: When no ADD10 event occurred.
- * SET: When the master has sent the first address byte (header).
- * @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADD10(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_ADD10) == (I2C_SR1_ADD10));
-}
-
-/**
- * @brief Indicate the status of Acknowledge failure flag.
- * @note RESET: No acknowledge failure.
- * SET: When an acknowledge failure is received after a byte transmission.
- * @rmtoll SR1 AF LL_I2C_IsActiveFlag_AF
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_AF(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_AF) == (I2C_SR1_AF));
-}
-
-/**
- * @brief Indicate the status of Stop detection flag (slave mode).
- * @note RESET: Clear default value.
- * SET: When a Stop condition is detected.
- * @rmtoll SR1 STOPF LL_I2C_IsActiveFlag_STOP
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_STOPF) == (I2C_SR1_STOPF));
-}
-
-/**
- * @brief Indicate the status of Bus error flag.
- * @note RESET: Clear default value.
- * SET: When a misplaced Start or Stop condition is detected.
- * @rmtoll SR1 BERR LL_I2C_IsActiveFlag_BERR
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_BERR) == (I2C_SR1_BERR));
-}
-
-/**
- * @brief Indicate the status of Arbitration lost flag.
- * @note RESET: Clear default value.
- * SET: When arbitration lost.
- * @rmtoll SR1 ARLO LL_I2C_IsActiveFlag_ARLO
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_ARLO) == (I2C_SR1_ARLO));
-}
-
-/**
- * @brief Indicate the status of Overrun/Underrun flag.
- * @note RESET: Clear default value.
- * SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
- * @rmtoll SR1 OVR LL_I2C_IsActiveFlag_OVR
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_OVR) == (I2C_SR1_OVR));
-}
-
-/**
- * @brief Indicate the status of SMBus PEC error flag in reception.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR1 PECERR LL_I2C_IsActiveSMBusFlag_PECERR
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_PECERR) == (I2C_SR1_PECERR));
-}
-
-/**
- * @brief Indicate the status of SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR1 TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT) == (I2C_SR1_TIMEOUT));
-}
-
-/**
- * @brief Indicate the status of SMBus alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR1 SMBALERT LL_I2C_IsActiveSMBusFlag_ALERT
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR1, I2C_SR1_SMBALERT) == (I2C_SR1_SMBALERT));
-}
-
-/**
- * @brief Indicate the status of Bus Busy flag.
- * @note RESET: Clear default value.
- * SET: When a Start condition is detected.
- * @rmtoll SR2 BUSY LL_I2C_IsActiveFlag_BUSY
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_BUSY) == (I2C_SR2_BUSY));
-}
-
-/**
- * @brief Indicate the status of Dual flag.
- * @note RESET: Received address matched with OAR1.
- * SET: Received address matched with OAR2.
- * @rmtoll SR2 DUALF LL_I2C_IsActiveFlag_DUAL
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_DUAL(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_DUALF) == (I2C_SR2_DUALF));
-}
-
-/**
- * @brief Indicate the status of SMBus Host address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note RESET: No SMBus Host address
- * SET: SMBus Host address received.
- * @note This status is cleared by hardware after a STOP condition or repeated START condition.
- * @rmtoll SR2 SMBHOST LL_I2C_IsActiveSMBusFlag_SMBHOST
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBHOST(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBHOST) == (I2C_SR2_SMBHOST));
-}
-
-/**
- * @brief Indicate the status of SMBus Device default address reception (Slave mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note RESET: No SMBus Device default address
- * SET: SMBus Device default address received.
- * @note This status is cleared by hardware after a STOP condition or repeated START condition.
- * @rmtoll SR2 SMBDEFAULT LL_I2C_IsActiveSMBusFlag_SMBDEFAULT
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBDEFAULT(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBDEFAULT) == (I2C_SR2_SMBDEFAULT));
-}
-
-/**
- * @brief Indicate the status of General call address reception (Slave mode).
- * @note RESET: No General call address
- * SET: General call address received.
- * @note This status is cleared by hardware after a STOP condition or repeated START condition.
- * @rmtoll SR2 GENCALL LL_I2C_IsActiveFlag_GENCALL
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_GENCALL(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_GENCALL) == (I2C_SR2_GENCALL));
-}
-
-/**
- * @brief Indicate the status of Master/Slave flag.
- * @note RESET: Slave Mode.
- * SET: Master Mode.
- * @rmtoll SR2 MSL LL_I2C_IsActiveFlag_MSL
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_MSL(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->SR2, I2C_SR2_MSL) == (I2C_SR2_MSL));
-}
-
-/**
- * @brief Clear Address Matched flag.
- * @note Clearing this flag is done by a read access to the I2Cx_SR1
- * register followed by a read access to the I2Cx_SR2 register.
- * @rmtoll SR1 ADDR LL_I2C_ClearFlag_ADDR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
-{
- __IO uint32_t tmpreg;
- tmpreg = I2Cx->SR1;
- (void) tmpreg;
- tmpreg = I2Cx->SR2;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear Acknowledge failure flag.
- * @rmtoll SR1 AF LL_I2C_ClearFlag_AF
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_AF(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_AF);
-}
-
-/**
- * @brief Clear Stop detection flag.
- * @note Clearing this flag is done by a read access to the I2Cx_SR1
- * register followed by a write access to I2Cx_CR1 register.
- * @rmtoll SR1 STOPF LL_I2C_ClearFlag_STOP\n
- * CR1 PE LL_I2C_ClearFlag_STOP
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
-{
- __IO uint32_t tmpreg;
- tmpreg = I2Cx->SR1;
- (void) tmpreg;
- SET_BIT(I2Cx->CR1, I2C_CR1_PE);
-}
-
-/**
- * @brief Clear Bus error flag.
- * @rmtoll SR1 BERR LL_I2C_ClearFlag_BERR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_BERR);
-}
-
-/**
- * @brief Clear Arbitration lost flag.
- * @rmtoll SR1 ARLO LL_I2C_ClearFlag_ARLO
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_ARLO);
-}
-
-/**
- * @brief Clear Overrun/Underrun flag.
- * @rmtoll SR1 OVR LL_I2C_ClearFlag_OVR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_OVR);
-}
-
-/**
- * @brief Clear SMBus PEC error flag.
- * @rmtoll SR1 PECERR LL_I2C_ClearSMBusFlag_PECERR
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_PECERR);
-}
-
-/**
- * @brief Clear SMBus Timeout detection flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR1 TIMEOUT LL_I2C_ClearSMBusFlag_TIMEOUT
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT);
-}
-
-/**
- * @brief Clear SMBus Alert flag.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR1 SMBALERT LL_I2C_ClearSMBusFlag_ALERT
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->SR1, I2C_SR1_SMBALERT);
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_LL_EF_Data_Management Data_Management
- * @{
- */
-
-/**
- * @brief Enable Reset of I2C peripheral.
- * @rmtoll CR1 SWRST LL_I2C_EnableReset
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableReset(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_SWRST);
-}
-
-/**
- * @brief Disable Reset of I2C peripheral.
- * @rmtoll CR1 SWRST LL_I2C_DisableReset
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableReset(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_SWRST);
-}
-
-/**
- * @brief Check if the I2C peripheral is under reset state or not.
- * @rmtoll CR1 SWRST LL_I2C_IsResetEnabled
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsResetEnabled(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_SWRST) == (I2C_CR1_SWRST));
-}
-
-/**
- * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
- * @note Usage in Slave or Master mode.
- * @rmtoll CR1 ACK LL_I2C_AcknowledgeNextData
- * @param I2Cx I2C Instance.
- * @param TypeAcknowledge This parameter can be one of the following values:
- * @arg @ref LL_I2C_ACK
- * @arg @ref LL_I2C_NACK
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
-{
- MODIFY_REG(I2Cx->CR1, I2C_CR1_ACK, TypeAcknowledge);
-}
-
-/**
- * @brief Generate a START or RESTART condition
- * @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
- * This action has no effect when RELOAD is set.
- * @rmtoll CR1 START LL_I2C_GenerateStartCondition
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_START);
-}
-
-/**
- * @brief Generate a STOP condition after the current byte transfer (master mode).
- * @rmtoll CR1 STOP LL_I2C_GenerateStopCondition
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_STOP);
-}
-
-/**
- * @brief Enable bit POS (master/host mode).
- * @note In that case, the ACK bit controls the (N)ACK of the next byte received or the PEC bit indicates that the next byte in shift register is a PEC.
- * @rmtoll CR1 POS LL_I2C_EnableBitPOS
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableBitPOS(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_POS);
-}
-
-/**
- * @brief Disable bit POS (master/host mode).
- * @note In that case, the ACK bit controls the (N)ACK of the current byte received or the PEC bit indicates that the current byte in shift register is a PEC.
- * @rmtoll CR1 POS LL_I2C_DisableBitPOS
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableBitPOS(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS);
-}
-
-/**
- * @brief Check if bit POS is enabled or disabled.
- * @rmtoll CR1 POS LL_I2C_IsEnabledBitPOS
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledBitPOS(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS));
-}
-
-/**
- * @brief Indicate the value of transfer direction.
- * @note RESET: Bus is in read transfer (peripheral point of view).
- * SET: Bus is in write transfer (peripheral point of view).
- * @rmtoll SR2 TRA LL_I2C_GetTransferDirection
- * @param I2Cx I2C Instance.
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_I2C_DIRECTION_WRITE
- * @arg @ref LL_I2C_DIRECTION_READ
- */
-__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_TRA));
-}
-
-/**
- * @brief Enable DMA last transfer.
- * @note This action mean that next DMA EOT is the last transfer.
- * @rmtoll CR2 LAST LL_I2C_EnableLastDMA
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableLastDMA(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR2, I2C_CR2_LAST);
-}
-
-/**
- * @brief Disable DMA last transfer.
- * @note This action mean that next DMA EOT is not the last transfer.
- * @rmtoll CR2 LAST LL_I2C_DisableLastDMA
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableLastDMA(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR2, I2C_CR2_LAST);
-}
-
-/**
- * @brief Check if DMA last transfer is enabled or disabled.
- * @rmtoll CR2 LAST LL_I2C_IsEnabledLastDMA
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledLastDMA(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR2, I2C_CR2_LAST) == (I2C_CR2_LAST));
-}
-
-/**
- * @brief Enable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @note This feature is cleared by hardware when the PEC byte is transferred or compared,
- * or by a START or STOP condition, it is also cleared by software.
- * @rmtoll CR1 PEC LL_I2C_EnableSMBusPECCompare
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
-{
- SET_BIT(I2Cx->CR1, I2C_CR1_PEC);
-}
-
-/**
- * @brief Disable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 PEC LL_I2C_DisableSMBusPECCompare
- * @param I2Cx I2C Instance.
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_DisableSMBusPECCompare(I2C_TypeDef *I2Cx)
-{
- CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC);
-}
-
-/**
- * @brief Check if the SMBus Packet Error byte transfer or internal comparison is requested or not.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll CR1 PEC LL_I2C_IsEnabledSMBusPECCompare
- * @param I2Cx I2C Instance.
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
-{
- return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC));
-}
-
-/**
- * @brief Get the SMBus Packet Error byte calculated.
- * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
- * SMBus feature is supported by the I2Cx Instance.
- * @rmtoll SR2 PEC LL_I2C_GetSMBusPEC
- * @param I2Cx I2C Instance.
- * @retval Value between Min_Data=0x00 and Max_Data=0xFF
- */
-__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
-{
- return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_PEC) >> I2C_SR2_PEC_Pos);
-}
-
-/**
- * @brief Read Receive Data register.
- * @rmtoll DR DR LL_I2C_ReceiveData8
- * @param I2Cx I2C Instance.
- * @retval Value between Min_Data=0x0 and Max_Data=0xFF
- */
-__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
-{
- return (uint8_t)(READ_BIT(I2Cx->DR, I2C_DR_DR));
-}
-
-/**
- * @brief Write in Transmit Data Register .
- * @rmtoll DR DR LL_I2C_TransmitData8
- * @param I2Cx I2C Instance.
- * @param Data Value between Min_Data=0x0 and Max_Data=0xFF
- * @retval None
- */
-__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
-{
- MODIFY_REG(I2Cx->DR, I2C_DR_DR, Data);
-}
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
- * @{
- */
-
-uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
-uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
-void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
-
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* I2C1 || I2C2 || I2C3 */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_I2C_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h
deleted file mode 100644
index f40e0796607dcb31d0ddaae97980e00506a76a91..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h
+++ /dev/null
@@ -1,985 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_pwr.h
- * @author MCD Application Team
- * @brief Header file of PWR LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_PWR_H
-#define __STM32F4xx_LL_PWR_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined(PWR)
-
-/** @defgroup PWR_LL PWR
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
- * @{
- */
-
-/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
- * @brief Flags defines which can be used with LL_PWR_WriteReg function
- * @{
- */
-#define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
-#define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
- * @brief Flags defines which can be used with LL_PWR_ReadReg function
- * @{
- */
-#define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
-#define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
-#define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
-#define LL_PWR_CSR_VOS PWR_CSR_VOSRDY /*!< Voltage scaling select flag */
-#if defined(PWR_CSR_EWUP)
-#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin */
-#elif defined(PWR_CSR_EWUP1)
-#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
-#endif /* PWR_CSR_EWUP */
-#if defined(PWR_CSR_EWUP2)
-#define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
-#endif /* PWR_CSR_EWUP2 */
-#if defined(PWR_CSR_EWUP3)
-#define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
-#endif /* PWR_CSR_EWUP3 */
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
- * @{
- */
-#if defined(PWR_CR_VOS_0)
-#define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0)
-#define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1)
-#define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /* The SCALE1 is not available for STM32F401xx devices */
-#else
-#define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS)
-#define LL_PWR_REGU_VOLTAGE_SCALE2 0x00000000U
-#endif /* PWR_CR_VOS_0 */
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
- * @{
- */
-#define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
-#define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
-#if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS)
-#define LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (PWR_CR_MRUDS | PWR_CR_FPDS) /*!< Enter Stop mode (with main Regulator in under-drive mode) when the CPU enters deepsleep */
-#define LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_FPDS) /*!< Enter Stop mode (with low power Regulator in under-drive mode) when the CPU enters deepsleep */
-#endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */
-#if defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS)
-#define LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (PWR_CR_MRLVDS | PWR_CR_FPDS) /*!< Enter Stop mode (with main Regulator in Deep Sleep mode) when the CPU enters deepsleep */
-#define LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (PWR_CR_LPDS | PWR_CR_LPLVDS | PWR_CR_FPDS) /*!< Enter Stop mode (with low power Regulator in Deep Sleep mode) when the CPU enters deepsleep */
-#endif /* PWR_CR_MRLVDS && PWR_CR_LPLVDS && PWR_CR_FPDS */
-#define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
- * @{
- */
-#define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
-#define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
- * @{
- */
-#define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
-#define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
-#define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
-#define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
-#define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
-#define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
-#define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
-#define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
-/**
- * @}
- */
-/** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
- * @{
- */
-#if defined(PWR_CSR_EWUP)
-#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin : PA0 */
-#endif /* PWR_CSR_EWUP */
-#if defined(PWR_CSR_EWUP1)
-#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
-#endif /* PWR_CSR_EWUP1 */
-#if defined(PWR_CSR_EWUP2)
-#define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC0 or PC13 according to device */
-#endif /* PWR_CSR_EWUP2 */
-#if defined(PWR_CSR_EWUP3)
-#define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PC1 */
-#endif /* PWR_CSR_EWUP3 */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
- * @{
- */
-
-/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in PWR register
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in PWR register
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
- * @{
- */
-
-/** @defgroup PWR_LL_EF_Configuration Configuration
- * @{
- */
-#if defined(PWR_CR_FISSR)
-/**
- * @brief Enable FLASH interface STOP while system Run is ON
- * @rmtoll CR FISSR LL_PWR_EnableFLASHInterfaceSTOP
- * @note This mode is enabled only with STOP low power mode.
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableFLASHInterfaceSTOP(void)
-{
- SET_BIT(PWR->CR, PWR_CR_FISSR);
-}
-
-/**
- * @brief Disable FLASH Interface STOP while system Run is ON
- * @rmtoll CR FISSR LL_PWR_DisableFLASHInterfaceSTOP
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableFLASHInterfaceSTOP(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
-}
-
-/**
- * @brief Check if FLASH Interface STOP while system Run feature is enabled
- * @rmtoll CR FISSR LL_PWR_IsEnabledFLASHInterfaceSTOP
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledFLASHInterfaceSTOP(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_FISSR) == (PWR_CR_FISSR));
-}
-#endif /* PWR_CR_FISSR */
-
-#if defined(PWR_CR_FMSSR)
-/**
- * @brief Enable FLASH Memory STOP while system Run is ON
- * @rmtoll CR FMSSR LL_PWR_EnableFLASHMemorySTOP
- * @note This mode is enabled only with STOP low power mode.
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableFLASHMemorySTOP(void)
-{
- SET_BIT(PWR->CR, PWR_CR_FMSSR);
-}
-
-/**
- * @brief Disable FLASH Memory STOP while system Run is ON
- * @rmtoll CR FMSSR LL_PWR_DisableFLASHMemorySTOP
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableFLASHMemorySTOP(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
-}
-
-/**
- * @brief Check if FLASH Memory STOP while system Run feature is enabled
- * @rmtoll CR FMSSR LL_PWR_IsEnabledFLASHMemorySTOP
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledFLASHMemorySTOP(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_FMSSR) == (PWR_CR_FMSSR));
-}
-#endif /* PWR_CR_FMSSR */
-#if defined(PWR_CR_UDEN)
-/**
- * @brief Enable Under Drive Mode
- * @rmtoll CR UDEN LL_PWR_EnableUnderDriveMode
- * @note This mode is enabled only with STOP low power mode.
- * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
- * mode is only available when the main Regulator or the low power Regulator
- * is in low voltage mode.
- * @note If the Under-drive mode was enabled, it is automatically disabled after
- * exiting Stop mode.
- * When the voltage Regulator operates in Under-drive mode, an additional
- * startup delay is induced when waking up from Stop mode.
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableUnderDriveMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_UDEN);
-}
-
-/**
- * @brief Disable Under Drive Mode
- * @rmtoll CR UDEN LL_PWR_DisableUnderDriveMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableUnderDriveMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_UDEN);
-}
-
-/**
- * @brief Check if Under Drive Mode is enabled
- * @rmtoll CR UDEN LL_PWR_IsEnabledUnderDriveMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledUnderDriveMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_UDEN) == (PWR_CR_UDEN));
-}
-#endif /* PWR_CR_UDEN */
-
-#if defined(PWR_CR_ODSWEN)
-/**
- * @brief Enable Over drive switching
- * @rmtoll CR ODSWEN LL_PWR_EnableOverDriveSwitching
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableOverDriveSwitching(void)
-{
- SET_BIT(PWR->CR, PWR_CR_ODSWEN);
-}
-
-/**
- * @brief Disable Over drive switching
- * @rmtoll CR ODSWEN LL_PWR_DisableOverDriveSwitching
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableOverDriveSwitching(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_ODSWEN);
-}
-
-/**
- * @brief Check if Over drive switching is enabled
- * @rmtoll CR ODSWEN LL_PWR_IsEnabledOverDriveSwitching
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveSwitching(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_ODSWEN) == (PWR_CR_ODSWEN));
-}
-#endif /* PWR_CR_ODSWEN */
-#if defined(PWR_CR_ODEN)
-/**
- * @brief Enable Over drive Mode
- * @rmtoll CR ODEN LL_PWR_EnableOverDriveMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableOverDriveMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_ODEN);
-}
-
-/**
- * @brief Disable Over drive Mode
- * @rmtoll CR ODEN LL_PWR_DisableOverDriveMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableOverDriveMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_ODEN);
-}
-
-/**
- * @brief Check if Over drive switching is enabled
- * @rmtoll CR ODEN LL_PWR_IsEnabledOverDriveMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_ODEN) == (PWR_CR_ODEN));
-}
-#endif /* PWR_CR_ODEN */
-#if defined(PWR_CR_MRUDS)
-/**
- * @brief Enable Main Regulator in deepsleep under-drive Mode
- * @rmtoll CR MRUDS LL_PWR_EnableMainRegulatorDeepSleepUDMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableMainRegulatorDeepSleepUDMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_MRUDS);
-}
-
-/**
- * @brief Disable Main Regulator in deepsleep under-drive Mode
- * @rmtoll CR MRUDS LL_PWR_DisableMainRegulatorDeepSleepUDMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableMainRegulatorDeepSleepUDMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_MRUDS);
-}
-
-/**
- * @brief Check if Main Regulator in deepsleep under-drive Mode is enabled
- * @rmtoll CR MRUDS LL_PWR_IsEnabledMainRegulatorDeepSleepUDMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledMainRegulatorDeepSleepUDMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_MRUDS) == (PWR_CR_MRUDS));
-}
-#endif /* PWR_CR_MRUDS */
-
-#if defined(PWR_CR_LPUDS)
-/**
- * @brief Enable Low Power Regulator in deepsleep under-drive Mode
- * @rmtoll CR LPUDS LL_PWR_EnableLowPowerRegulatorDeepSleepUDMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableLowPowerRegulatorDeepSleepUDMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_LPUDS);
-}
-
-/**
- * @brief Disable Low Power Regulator in deepsleep under-drive Mode
- * @rmtoll CR LPUDS LL_PWR_DisableLowPowerRegulatorDeepSleepUDMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableLowPowerRegulatorDeepSleepUDMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_LPUDS);
-}
-
-/**
- * @brief Check if Low Power Regulator in deepsleep under-drive Mode is enabled
- * @rmtoll CR LPUDS LL_PWR_IsEnabledLowPowerRegulatorDeepSleepUDMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRegulatorDeepSleepUDMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_LPUDS) == (PWR_CR_LPUDS));
-}
-#endif /* PWR_CR_LPUDS */
-
-#if defined(PWR_CR_MRLVDS)
-/**
- * @brief Enable Main Regulator low voltage Mode
- * @rmtoll CR MRLVDS LL_PWR_EnableMainRegulatorLowVoltageMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableMainRegulatorLowVoltageMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_MRLVDS);
-}
-
-/**
- * @brief Disable Main Regulator low voltage Mode
- * @rmtoll CR MRLVDS LL_PWR_DisableMainRegulatorLowVoltageMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableMainRegulatorLowVoltageMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_MRLVDS);
-}
-
-/**
- * @brief Check if Main Regulator low voltage Mode is enabled
- * @rmtoll CR MRLVDS LL_PWR_IsEnabledMainRegulatorLowVoltageMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledMainRegulatorLowVoltageMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_MRLVDS) == (PWR_CR_MRLVDS));
-}
-#endif /* PWR_CR_MRLVDS */
-
-#if defined(PWR_CR_LPLVDS)
-/**
- * @brief Enable Low Power Regulator low voltage Mode
- * @rmtoll CR LPLVDS LL_PWR_EnableLowPowerRegulatorLowVoltageMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableLowPowerRegulatorLowVoltageMode(void)
-{
- SET_BIT(PWR->CR, PWR_CR_LPLVDS);
-}
-
-/**
- * @brief Disable Low Power Regulator low voltage Mode
- * @rmtoll CR LPLVDS LL_PWR_DisableLowPowerRegulatorLowVoltageMode
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableLowPowerRegulatorLowVoltageMode(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_LPLVDS);
-}
-
-/**
- * @brief Check if Low Power Regulator low voltage Mode is enabled
- * @rmtoll CR LPLVDS LL_PWR_IsEnabledLowPowerRegulatorLowVoltageMode
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRegulatorLowVoltageMode(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_LPLVDS) == (PWR_CR_LPLVDS));
-}
-#endif /* PWR_CR_LPLVDS */
-/**
- * @brief Set the main internal Regulator output voltage
- * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling
- * @param VoltageScaling This parameter can be one of the following values:
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 (*)
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
- * (*) LL_PWR_REGU_VOLTAGE_SCALE1 is not available for STM32F401xx devices
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
-{
- MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
-}
-
-/**
- * @brief Get the main internal Regulator output voltage
- * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 (*)
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
- * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
- * (*) LL_PWR_REGU_VOLTAGE_SCALE1 is not available for STM32F401xx devices
- */
-__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
-{
- return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
-}
-/**
- * @brief Enable the Flash Power Down in Stop Mode
- * @rmtoll CR FPDS LL_PWR_EnableFlashPowerDown
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableFlashPowerDown(void)
-{
- SET_BIT(PWR->CR, PWR_CR_FPDS);
-}
-
-/**
- * @brief Disable the Flash Power Down in Stop Mode
- * @rmtoll CR FPDS LL_PWR_DisableFlashPowerDown
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableFlashPowerDown(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_FPDS);
-}
-
-/**
- * @brief Check if the Flash Power Down in Stop Mode is enabled
- * @rmtoll CR FPDS LL_PWR_IsEnabledFlashPowerDown
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledFlashPowerDown(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_FPDS) == (PWR_CR_FPDS));
-}
-
-/**
- * @brief Enable access to the backup domain
- * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
-{
- SET_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
- * @brief Disable access to the backup domain
- * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_DBP);
-}
-
-/**
- * @brief Check if the backup domain is enabled
- * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
-}
-/**
- * @brief Enable the backup Regulator
- * @rmtoll CSR BRE LL_PWR_EnableBkUpRegulator
- * @note The BRE bit of the PWR_CSR register is protected against parasitic write access.
- * The LL_PWR_EnableBkUpAccess() must be called before using this API.
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableBkUpRegulator(void)
-{
- SET_BIT(PWR->CSR, PWR_CSR_BRE);
-}
-
-/**
- * @brief Disable the backup Regulator
- * @rmtoll CSR BRE LL_PWR_DisableBkUpRegulator
- * @note The BRE bit of the PWR_CSR register is protected against parasitic write access.
- * The LL_PWR_EnableBkUpAccess() must be called before using this API.
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableBkUpRegulator(void)
-{
- CLEAR_BIT(PWR->CSR, PWR_CSR_BRE);
-}
-
-/**
- * @brief Check if the backup Regulator is enabled
- * @rmtoll CSR BRE LL_PWR_IsEnabledBkUpRegulator
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpRegulator(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_BRE) == (PWR_CSR_BRE));
-}
-
-/**
- * @brief Set voltage Regulator mode during deep sleep mode
- * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
- * @param RegulMode This parameter can be one of the following values:
- * @arg @ref LL_PWR_REGU_DSMODE_MAIN
- * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
-{
- MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
-}
-
-/**
- * @brief Get voltage Regulator mode during deep sleep mode
- * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_PWR_REGU_DSMODE_MAIN
- * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
- */
-__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
-{
- return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
-}
-
-/**
- * @brief Set Power Down mode when CPU enters deepsleep
- * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
- * @rmtoll CR MRUDS LL_PWR_SetPowerMode\n
- * @rmtoll CR LPUDS LL_PWR_SetPowerMode\n
- * @rmtoll CR FPDS LL_PWR_SetPowerMode\n
- * @rmtoll CR MRLVDS LL_PWR_SetPowerMode\n
- * @rmtoll CR LPlVDS LL_PWR_SetPowerMode\n
- * @rmtoll CR FPDS LL_PWR_SetPowerMode\n
- * @rmtoll CR LPDS LL_PWR_SetPowerMode
- * @param PDMode This parameter can be one of the following values:
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU
- * @arg @ref LL_PWR_MODE_STOP_LPREGU
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (*)
- * @arg @ref LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (*)
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (*)
- * @arg @ref LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (*)
- *
- * (*) not available on all devices
- * @arg @ref LL_PWR_MODE_STANDBY
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
-{
-#if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS)
- MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPUDS | PWR_CR_MRUDS), PDMode);
-#elif defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS)
- MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPLVDS | PWR_CR_MRLVDS), PDMode);
-#else
- MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
-#endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */
-}
-
-/**
- * @brief Get Power Down mode when CPU enters deepsleep
- * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
- * @rmtoll CR MRUDS LL_PWR_GetPowerMode\n
- * @rmtoll CR LPUDS LL_PWR_GetPowerMode\n
- * @rmtoll CR FPDS LL_PWR_GetPowerMode\n
- * @rmtoll CR MRLVDS LL_PWR_GetPowerMode\n
- * @rmtoll CR LPLVDS LL_PWR_GetPowerMode\n
- * @rmtoll CR FPDS LL_PWR_GetPowerMode\n
- * @rmtoll CR LPDS LL_PWR_GetPowerMode
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU
- * @arg @ref LL_PWR_MODE_STOP_LPREGU
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (*)
- * @arg @ref LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (*)
- * @arg @ref LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (*)
- * @arg @ref LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (*)
- *
- * (*) not available on all devices
- * @arg @ref LL_PWR_MODE_STANDBY
- */
-__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
-{
-#if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS)
- return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPUDS | PWR_CR_MRUDS)));
-#elif defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS)
- return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPLVDS | PWR_CR_MRLVDS)));
-#else
- return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
-#endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */
-}
-
-/**
- * @brief Configure the voltage threshold detected by the Power Voltage Detector
- * @rmtoll CR PLS LL_PWR_SetPVDLevel
- * @param PVDLevel This parameter can be one of the following values:
- * @arg @ref LL_PWR_PVDLEVEL_0
- * @arg @ref LL_PWR_PVDLEVEL_1
- * @arg @ref LL_PWR_PVDLEVEL_2
- * @arg @ref LL_PWR_PVDLEVEL_3
- * @arg @ref LL_PWR_PVDLEVEL_4
- * @arg @ref LL_PWR_PVDLEVEL_5
- * @arg @ref LL_PWR_PVDLEVEL_6
- * @arg @ref LL_PWR_PVDLEVEL_7
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
-{
- MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
-}
-
-/**
- * @brief Get the voltage threshold detection
- * @rmtoll CR PLS LL_PWR_GetPVDLevel
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_PWR_PVDLEVEL_0
- * @arg @ref LL_PWR_PVDLEVEL_1
- * @arg @ref LL_PWR_PVDLEVEL_2
- * @arg @ref LL_PWR_PVDLEVEL_3
- * @arg @ref LL_PWR_PVDLEVEL_4
- * @arg @ref LL_PWR_PVDLEVEL_5
- * @arg @ref LL_PWR_PVDLEVEL_6
- * @arg @ref LL_PWR_PVDLEVEL_7
- */
-__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
-{
- return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
-}
-
-/**
- * @brief Enable Power Voltage Detector
- * @rmtoll CR PVDE LL_PWR_EnablePVD
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnablePVD(void)
-{
- SET_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
- * @brief Disable Power Voltage Detector
- * @rmtoll CR PVDE LL_PWR_DisablePVD
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisablePVD(void)
-{
- CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
-}
-
-/**
- * @brief Check if Power Voltage Detector is enabled
- * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
-{
- return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
-}
-
-/**
- * @brief Enable the WakeUp PINx functionality
- * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin\n
- * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
- * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n
- * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin
- * @param WakeUpPin This parameter can be one of the following values:
- * @arg @ref LL_PWR_WAKEUP_PIN1
- * @arg @ref LL_PWR_WAKEUP_PIN2 (*)
- * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
- *
- * (*) not available on all devices
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
-{
- SET_BIT(PWR->CSR, WakeUpPin);
-}
-
-/**
- * @brief Disable the WakeUp PINx functionality
- * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin\n
- * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
- * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n
- * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin
- * @param WakeUpPin This parameter can be one of the following values:
- * @arg @ref LL_PWR_WAKEUP_PIN1
- * @arg @ref LL_PWR_WAKEUP_PIN2 (*)
- * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
- *
- * (*) not available on all devices
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
-{
- CLEAR_BIT(PWR->CSR, WakeUpPin);
-}
-
-/**
- * @brief Check if the WakeUp PINx functionality is enabled
- * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin\n
- * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
- * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
- * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
- * @param WakeUpPin This parameter can be one of the following values:
- * @arg @ref LL_PWR_WAKEUP_PIN1
- * @arg @ref LL_PWR_WAKEUP_PIN2 (*)
- * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
- *
- * (*) not available on all devices
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
-{
- return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
-}
-
-
-/**
- * @}
- */
-
-/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
- * @{
- */
-
-/**
- * @brief Get Wake-up Flag
- * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
-}
-
-/**
- * @brief Get Standby Flag
- * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
-}
-
-/**
- * @brief Get Backup Regulator ready Flag
- * @rmtoll CSR BRR LL_PWR_IsActiveFlag_BRR
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_BRR(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_BRR) == (PWR_CSR_BRR));
-}
-/**
- * @brief Indicate whether VDD voltage is below the selected PVD threshold
- * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
-}
-
-/**
- * @brief Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
- * @rmtoll CSR VOS LL_PWR_IsActiveFlag_VOS
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
-{
- return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS));
-}
-#if defined(PWR_CR_ODEN)
-/**
- * @brief Indicate whether the Over-Drive mode is ready or not
- * @rmtoll CSR ODRDY LL_PWR_IsActiveFlag_OD
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_OD(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_ODRDY) == (PWR_CSR_ODRDY));
-}
-#endif /* PWR_CR_ODEN */
-
-#if defined(PWR_CR_ODSWEN)
-/**
- * @brief Indicate whether the Over-Drive mode switching is ready or not
- * @rmtoll CSR ODSWRDY LL_PWR_IsActiveFlag_ODSW
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_ODSW(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_ODSWRDY) == (PWR_CSR_ODSWRDY));
-}
-#endif /* PWR_CR_ODSWEN */
-
-#if defined(PWR_CR_UDEN)
-/**
- * @brief Indicate whether the Under-Drive mode is ready or not
- * @rmtoll CSR UDRDY LL_PWR_IsActiveFlag_UD
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_UD(void)
-{
- return (READ_BIT(PWR->CSR, PWR_CSR_UDRDY) == (PWR_CSR_UDRDY));
-}
-#endif /* PWR_CR_UDEN */
-/**
- * @brief Clear Standby Flag
- * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
-{
- SET_BIT(PWR->CR, PWR_CR_CSBF);
-}
-
-/**
- * @brief Clear Wake-up Flags
- * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
-{
- SET_BIT(PWR->CR, PWR_CR_CWUF);
-}
-#if defined(PWR_CSR_UDRDY)
-/**
- * @brief Clear Under-Drive ready Flag
- * @rmtoll CSR UDRDY LL_PWR_ClearFlag_UD
- * @retval None
- */
-__STATIC_INLINE void LL_PWR_ClearFlag_UD(void)
-{
- WRITE_REG(PWR->CSR, PWR_CSR_UDRDY);
-}
-#endif /* PWR_CSR_UDRDY */
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup PWR_LL_EF_Init De-initialization function
- * @{
- */
-ErrorStatus LL_PWR_DeInit(void);
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* defined(PWR) */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_PWR_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h
deleted file mode 100644
index 1f2a91d7012c45e3f5b98ec5349e9c5146fe9326..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h
+++ /dev/null
@@ -1,7096 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_rcc.h
- * @author MCD Application Team
- * @brief Header file of RCC LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_RCC_H
-#define __STM32F4xx_LL_RCC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined(RCC)
-
-/** @defgroup RCC_LL RCC
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup RCC_LL_Private_Variables RCC Private Variables
- * @{
- */
-
-#if defined(RCC_DCKCFGR_PLLSAIDIVR)
-static const uint8_t aRCC_PLLSAIDIVRPrescTable[4] = {2, 4, 8, 16};
-#endif /* RCC_DCKCFGR_PLLSAIDIVR */
-
-/**
- * @}
- */
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_Private_Macros RCC Private Macros
- * @{
- */
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_Exported_Types RCC Exported Types
- * @{
- */
-
-/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
- * @{
- */
-
-/**
- * @brief RCC Clocks Frequency Structure
- */
-typedef struct
-{
- uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */
- uint32_t HCLK_Frequency; /*!< HCLK clock frequency */
- uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */
- uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */
-} LL_RCC_ClocksTypeDef;
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
- * @{
- */
-
-/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
- * @brief Defines used to adapt values of different oscillators
- * @note These values could be modified in the user environment according to
- * HW set-up.
- * @{
- */
-#if !defined (HSE_VALUE)
-#define HSE_VALUE 25000000U /*!< Value of the HSE oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined (HSI_VALUE)
-#define HSI_VALUE 16000000U /*!< Value of the HSI oscillator in Hz */
-#endif /* HSI_VALUE */
-
-#if !defined (LSE_VALUE)
-#define LSE_VALUE 32768U /*!< Value of the LSE oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined (LSI_VALUE)
-#define LSI_VALUE 32000U /*!< Value of the LSI oscillator in Hz */
-#endif /* LSI_VALUE */
-
-#if !defined (EXTERNAL_CLOCK_VALUE)
-#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the I2S_CKIN external oscillator in Hz */
-#endif /* EXTERNAL_CLOCK_VALUE */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
- * @brief Flags defines which can be used with LL_RCC_WriteReg function
- * @{
- */
-#define LL_RCC_CIR_LSIRDYC RCC_CIR_LSIRDYC /*!< LSI Ready Interrupt Clear */
-#define LL_RCC_CIR_LSERDYC RCC_CIR_LSERDYC /*!< LSE Ready Interrupt Clear */
-#define LL_RCC_CIR_HSIRDYC RCC_CIR_HSIRDYC /*!< HSI Ready Interrupt Clear */
-#define LL_RCC_CIR_HSERDYC RCC_CIR_HSERDYC /*!< HSE Ready Interrupt Clear */
-#define LL_RCC_CIR_PLLRDYC RCC_CIR_PLLRDYC /*!< PLL Ready Interrupt Clear */
-#if defined(RCC_PLLI2S_SUPPORT)
-#define LL_RCC_CIR_PLLI2SRDYC RCC_CIR_PLLI2SRDYC /*!< PLLI2S Ready Interrupt Clear */
-#endif /* RCC_PLLI2S_SUPPORT */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_CIR_PLLSAIRDYC RCC_CIR_PLLSAIRDYC /*!< PLLSAI Ready Interrupt Clear */
-#endif /* RCC_PLLSAI_SUPPORT */
-#define LL_RCC_CIR_CSSC RCC_CIR_CSSC /*!< Clock Security System Interrupt Clear */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
- * @brief Flags defines which can be used with LL_RCC_ReadReg function
- * @{
- */
-#define LL_RCC_CIR_LSIRDYF RCC_CIR_LSIRDYF /*!< LSI Ready Interrupt flag */
-#define LL_RCC_CIR_LSERDYF RCC_CIR_LSERDYF /*!< LSE Ready Interrupt flag */
-#define LL_RCC_CIR_HSIRDYF RCC_CIR_HSIRDYF /*!< HSI Ready Interrupt flag */
-#define LL_RCC_CIR_HSERDYF RCC_CIR_HSERDYF /*!< HSE Ready Interrupt flag */
-#define LL_RCC_CIR_PLLRDYF RCC_CIR_PLLRDYF /*!< PLL Ready Interrupt flag */
-#if defined(RCC_PLLI2S_SUPPORT)
-#define LL_RCC_CIR_PLLI2SRDYF RCC_CIR_PLLI2SRDYF /*!< PLLI2S Ready Interrupt flag */
-#endif /* RCC_PLLI2S_SUPPORT */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_CIR_PLLSAIRDYF RCC_CIR_PLLSAIRDYF /*!< PLLSAI Ready Interrupt flag */
-#endif /* RCC_PLLSAI_SUPPORT */
-#define LL_RCC_CIR_CSSF RCC_CIR_CSSF /*!< Clock Security System Interrupt flag */
-#define LL_RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF /*!< Low-Power reset flag */
-#define LL_RCC_CSR_PINRSTF RCC_CSR_PINRSTF /*!< PIN reset flag */
-#define LL_RCC_CSR_PORRSTF RCC_CSR_PORRSTF /*!< POR/PDR reset flag */
-#define LL_RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF /*!< Software Reset flag */
-#define LL_RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF /*!< Independent Watchdog reset flag */
-#define LL_RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF /*!< Window watchdog reset flag */
-#if defined(RCC_CSR_BORRSTF)
-#define LL_RCC_CSR_BORRSTF RCC_CSR_BORRSTF /*!< BOR reset flag */
-#endif /* RCC_CSR_BORRSTF */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_IT IT Defines
- * @brief IT defines which can be used with LL_RCC_ReadReg and LL_RCC_WriteReg functions
- * @{
- */
-#define LL_RCC_CIR_LSIRDYIE RCC_CIR_LSIRDYIE /*!< LSI Ready Interrupt Enable */
-#define LL_RCC_CIR_LSERDYIE RCC_CIR_LSERDYIE /*!< LSE Ready Interrupt Enable */
-#define LL_RCC_CIR_HSIRDYIE RCC_CIR_HSIRDYIE /*!< HSI Ready Interrupt Enable */
-#define LL_RCC_CIR_HSERDYIE RCC_CIR_HSERDYIE /*!< HSE Ready Interrupt Enable */
-#define LL_RCC_CIR_PLLRDYIE RCC_CIR_PLLRDYIE /*!< PLL Ready Interrupt Enable */
-#if defined(RCC_PLLI2S_SUPPORT)
-#define LL_RCC_CIR_PLLI2SRDYIE RCC_CIR_PLLI2SRDYIE /*!< PLLI2S Ready Interrupt Enable */
-#endif /* RCC_PLLI2S_SUPPORT */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_CIR_PLLSAIRDYIE RCC_CIR_PLLSAIRDYIE /*!< PLLSAI Ready Interrupt Enable */
-#endif /* RCC_PLLSAI_SUPPORT */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch
- * @{
- */
-#define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */
-#define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */
-#define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
-#if defined(RCC_CFGR_SW_PLLR)
-#define LL_RCC_SYS_CLKSOURCE_PLLR RCC_CFGR_SW_PLLR /*!< PLLR selection as system clock */
-#endif /* RCC_CFGR_SW_PLLR */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status
- * @{
- */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */
-#define LL_RCC_SYS_CLKSOURCE_STATUS_PLL RCC_CFGR_SWS_PLL /*!< PLL used as system clock */
-#if defined(RCC_PLLR_SYSCLK_SUPPORT)
-#define LL_RCC_SYS_CLKSOURCE_STATUS_PLLR RCC_CFGR_SWS_PLLR /*!< PLLR used as system clock */
-#endif /* RCC_PLLR_SYSCLK_SUPPORT */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_SYSCLK_DIV AHB prescaler
- * @{
- */
-#define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */
-#define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */
-#define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */
-#define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */
-#define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */
-#define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */
-#define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
-#define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
-#define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1)
- * @{
- */
-#define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
-#define LL_RCC_APB1_DIV_2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */
-#define LL_RCC_APB1_DIV_4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */
-#define LL_RCC_APB1_DIV_8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */
-#define LL_RCC_APB1_DIV_16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_APB2_DIV APB high-speed prescaler (APB2)
- * @{
- */
-#define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */
-#define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */
-#define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
-#define LL_RCC_APB2_DIV_8 RCC_CFGR_PPRE2_DIV8 /*!< HCLK divided by 8 */
-#define LL_RCC_APB2_DIV_16 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_MCOxSOURCE MCO source selection
- * @{
- */
-#define LL_RCC_MCO1SOURCE_HSI (uint32_t)(RCC_CFGR_MCO1|0x00000000U) /*!< HSI selection as MCO1 source */
-#define LL_RCC_MCO1SOURCE_LSE (uint32_t)(RCC_CFGR_MCO1|(RCC_CFGR_MCO1_0 >> 16U)) /*!< LSE selection as MCO1 source */
-#define LL_RCC_MCO1SOURCE_HSE (uint32_t)(RCC_CFGR_MCO1|(RCC_CFGR_MCO1_1 >> 16U)) /*!< HSE selection as MCO1 source */
-#define LL_RCC_MCO1SOURCE_PLLCLK (uint32_t)(RCC_CFGR_MCO1|((RCC_CFGR_MCO1_1|RCC_CFGR_MCO1_0) >> 16U)) /*!< PLLCLK selection as MCO1 source */
-#if defined(RCC_CFGR_MCO2)
-#define LL_RCC_MCO2SOURCE_SYSCLK (uint32_t)(RCC_CFGR_MCO2|0x00000000U) /*!< SYSCLK selection as MCO2 source */
-#define LL_RCC_MCO2SOURCE_PLLI2S (uint32_t)(RCC_CFGR_MCO2|(RCC_CFGR_MCO2_0 >> 16U)) /*!< PLLI2S selection as MCO2 source */
-#define LL_RCC_MCO2SOURCE_HSE (uint32_t)(RCC_CFGR_MCO2|(RCC_CFGR_MCO2_1 >> 16U)) /*!< HSE selection as MCO2 source */
-#define LL_RCC_MCO2SOURCE_PLLCLK (uint32_t)(RCC_CFGR_MCO2|((RCC_CFGR_MCO2_1|RCC_CFGR_MCO2_0) >> 16U)) /*!< PLLCLK selection as MCO2 source */
-#endif /* RCC_CFGR_MCO2 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_MCOx_DIV MCO prescaler
- * @{
- */
-#define LL_RCC_MCO1_DIV_1 (uint32_t)(RCC_CFGR_MCO1PRE|0x00000000U) /*!< MCO1 not divided */
-#define LL_RCC_MCO1_DIV_2 (uint32_t)(RCC_CFGR_MCO1PRE|(RCC_CFGR_MCO1PRE_2 >> 16U)) /*!< MCO1 divided by 2 */
-#define LL_RCC_MCO1_DIV_3 (uint32_t)(RCC_CFGR_MCO1PRE|((RCC_CFGR_MCO1PRE_2|RCC_CFGR_MCO1PRE_0) >> 16U)) /*!< MCO1 divided by 3 */
-#define LL_RCC_MCO1_DIV_4 (uint32_t)(RCC_CFGR_MCO1PRE|((RCC_CFGR_MCO1PRE_2|RCC_CFGR_MCO1PRE_1) >> 16U)) /*!< MCO1 divided by 4 */
-#define LL_RCC_MCO1_DIV_5 (uint32_t)(RCC_CFGR_MCO1PRE|(RCC_CFGR_MCO1PRE >> 16U)) /*!< MCO1 divided by 5 */
-#if defined(RCC_CFGR_MCO2PRE)
-#define LL_RCC_MCO2_DIV_1 (uint32_t)(RCC_CFGR_MCO2PRE|0x00000000U) /*!< MCO2 not divided */
-#define LL_RCC_MCO2_DIV_2 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE_2 >> 16U)) /*!< MCO2 divided by 2 */
-#define LL_RCC_MCO2_DIV_3 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFGR_MCO2PRE_0) >> 16U)) /*!< MCO2 divided by 3 */
-#define LL_RCC_MCO2_DIV_4 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFGR_MCO2PRE_1) >> 16U)) /*!< MCO2 divided by 4 */
-#define LL_RCC_MCO2_DIV_5 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE >> 16U)) /*!< MCO2 divided by 5 */
-#endif /* RCC_CFGR_MCO2PRE */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_RTC_HSEDIV HSE prescaler for RTC clock
- * @{
- */
-#define LL_RCC_RTC_NOCLOCK 0x00000000U /*!< HSE not divided */
-#define LL_RCC_RTC_HSE_DIV_2 RCC_CFGR_RTCPRE_1 /*!< HSE clock divided by 2 */
-#define LL_RCC_RTC_HSE_DIV_3 (RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 3 */
-#define LL_RCC_RTC_HSE_DIV_4 RCC_CFGR_RTCPRE_2 /*!< HSE clock divided by 4 */
-#define LL_RCC_RTC_HSE_DIV_5 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 5 */
-#define LL_RCC_RTC_HSE_DIV_6 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 6 */
-#define LL_RCC_RTC_HSE_DIV_7 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 7 */
-#define LL_RCC_RTC_HSE_DIV_8 RCC_CFGR_RTCPRE_3 /*!< HSE clock divided by 8 */
-#define LL_RCC_RTC_HSE_DIV_9 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 9 */
-#define LL_RCC_RTC_HSE_DIV_10 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 10 */
-#define LL_RCC_RTC_HSE_DIV_11 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 11 */
-#define LL_RCC_RTC_HSE_DIV_12 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 12 */
-#define LL_RCC_RTC_HSE_DIV_13 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 13 */
-#define LL_RCC_RTC_HSE_DIV_14 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 14 */
-#define LL_RCC_RTC_HSE_DIV_15 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 15 */
-#define LL_RCC_RTC_HSE_DIV_16 RCC_CFGR_RTCPRE_4 /*!< HSE clock divided by 16 */
-#define LL_RCC_RTC_HSE_DIV_17 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 17 */
-#define LL_RCC_RTC_HSE_DIV_18 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 18 */
-#define LL_RCC_RTC_HSE_DIV_19 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 19 */
-#define LL_RCC_RTC_HSE_DIV_20 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 20 */
-#define LL_RCC_RTC_HSE_DIV_21 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 21 */
-#define LL_RCC_RTC_HSE_DIV_22 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 22 */
-#define LL_RCC_RTC_HSE_DIV_23 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 23 */
-#define LL_RCC_RTC_HSE_DIV_24 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3) /*!< HSE clock divided by 24 */
-#define LL_RCC_RTC_HSE_DIV_25 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 25 */
-#define LL_RCC_RTC_HSE_DIV_26 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 26 */
-#define LL_RCC_RTC_HSE_DIV_27 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 27 */
-#define LL_RCC_RTC_HSE_DIV_28 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 28 */
-#define LL_RCC_RTC_HSE_DIV_29 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 29 */
-#define LL_RCC_RTC_HSE_DIV_30 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 30 */
-#define LL_RCC_RTC_HSE_DIV_31 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 31 */
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
- * @{
- */
-#define LL_RCC_PERIPH_FREQUENCY_NO 0x00000000U /*!< No clock enabled for the peripheral */
-#define LL_RCC_PERIPH_FREQUENCY_NA 0xFFFFFFFFU /*!< Frequency cannot be provided as external clock */
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-#if defined(FMPI2C1)
-/** @defgroup RCC_LL_EC_FMPI2C1_CLKSOURCE Peripheral FMPI2C clock source selection
- * @{
- */
-#define LL_RCC_FMPI2C1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as FMPI2C1 clock source */
-#define LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK RCC_DCKCFGR2_FMPI2C1SEL_0 /*!< SYSCLK clock used as FMPI2C1 clock source */
-#define LL_RCC_FMPI2C1_CLKSOURCE_HSI RCC_DCKCFGR2_FMPI2C1SEL_1 /*!< HSI clock used as FMPI2C1 clock source */
-/**
- * @}
- */
-#endif /* FMPI2C1 */
-
-#if defined(LPTIM1)
-/** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE Peripheral LPTIM clock source selection
- * @{
- */
-#define LL_RCC_LPTIM1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_HSI RCC_DCKCFGR2_LPTIM1SEL_0 /*!< LSI oscillator clock used as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_LSI RCC_DCKCFGR2_LPTIM1SEL_1 /*!< HSI oscillator clock used as LPTIM1 clock */
-#define LL_RCC_LPTIM1_CLKSOURCE_LSE (uint32_t)(RCC_DCKCFGR2_LPTIM1SEL_1 | RCC_DCKCFGR2_LPTIM1SEL_0) /*!< LSE oscillator clock used as LPTIM1 clock */
-/**
- * @}
- */
-#endif /* LPTIM1 */
-
-#if defined(SAI1)
-/** @defgroup RCC_LL_EC_SAIx_CLKSOURCE Peripheral SAI clock source selection
- * @{
- */
-#if defined(RCC_DCKCFGR_SAI1SRC)
-#define LL_RCC_SAI1_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1SRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 clock source */
-#define LL_RCC_SAI1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 clock source */
-#define LL_RCC_SAI1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC_1 >> 16)) /*!< PLL clock used as SAI1 clock source */
-#define LL_RCC_SAI1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC >> 16)) /*!< External pin clock used as SAI1 clock source */
-#endif /* RCC_DCKCFGR_SAI1SRC */
-#if defined(RCC_DCKCFGR_SAI2SRC)
-#define LL_RCC_SAI2_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI2SRC | 0x00000000U) /*!< PLLSAI clock used as SAI2 clock source */
-#define LL_RCC_SAI2_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC_0 >> 16)) /*!< PLLI2S clock used as SAI2 clock source */
-#define LL_RCC_SAI2_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC_1 >> 16)) /*!< PLL clock used as SAI2 clock source */
-#define LL_RCC_SAI2_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC >> 16)) /*!< PLL Main clock used as SAI2 clock source */
-#endif /* RCC_DCKCFGR_SAI2SRC */
-#if defined(RCC_DCKCFGR_SAI1ASRC)
-#if defined(RCC_SAI1A_PLLSOURCE_SUPPORT)
-#define LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1ASRC | 0x00000000U) /*!< PLLI2S clock used as SAI1 block A clock source */
-#define LL_RCC_SAI1_A_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_0 >> 16)) /*!< External pin used as SAI1 block A clock source */
-#define LL_RCC_SAI1_A_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_1 >> 16)) /*!< PLL clock used as SAI1 block A clock source */
-#define LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC >> 16)) /*!< PLL Main clock used as SAI1 block A clock source */
-#else
-#define LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1ASRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 block A clock source */
-#define LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 block A clock source */
-#define LL_RCC_SAI1_A_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_1 >> 16)) /*!< External pin clock used as SAI1 block A clock source */
-#endif /* RCC_SAI1A_PLLSOURCE_SUPPORT */
-#endif /* RCC_DCKCFGR_SAI1ASRC */
-#if defined(RCC_DCKCFGR_SAI1BSRC)
-#if defined(RCC_SAI1B_PLLSOURCE_SUPPORT)
-#define LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1BSRC | 0x00000000U) /*!< PLLI2S clock used as SAI1 block B clock source */
-#define LL_RCC_SAI1_B_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_0 >> 16)) /*!< External pin used as SAI1 block B clock source */
-#define LL_RCC_SAI1_B_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_1 >> 16)) /*!< PLL clock used as SAI1 block B clock source */
-#define LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC >> 16)) /*!< PLL Main clock used as SAI1 block B clock source */
-#else
-#define LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1BSRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 block B clock source */
-#define LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 block B clock source */
-#define LL_RCC_SAI1_B_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_1 >> 16)) /*!< External pin clock used as SAI1 block B clock source */
-#endif /* RCC_SAI1B_PLLSOURCE_SUPPORT */
-#endif /* RCC_DCKCFGR_SAI1BSRC */
-/**
- * @}
- */
-#endif /* SAI1 */
-
-#if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
-/** @defgroup RCC_LL_EC_SDIOx_CLKSOURCE Peripheral SDIO clock source selection
- * @{
- */
-#define LL_RCC_SDIO_CLKSOURCE_PLL48CLK 0x00000000U /*!< PLL 48M domain clock used as SDIO clock */
-#if defined(RCC_DCKCFGR_SDIOSEL)
-#define LL_RCC_SDIO_CLKSOURCE_SYSCLK RCC_DCKCFGR_SDIOSEL /*!< System clock clock used as SDIO clock */
-#else
-#define LL_RCC_SDIO_CLKSOURCE_SYSCLK RCC_DCKCFGR2_SDIOSEL /*!< System clock clock used as SDIO clock */
-#endif /* RCC_DCKCFGR_SDIOSEL */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
-
-#if defined(DSI)
-/** @defgroup RCC_LL_EC_DSI_CLKSOURCE Peripheral DSI clock source selection
- * @{
- */
-#define LL_RCC_DSI_CLKSOURCE_PHY 0x00000000U /*!< DSI-PHY clock used as DSI byte lane clock source */
-#define LL_RCC_DSI_CLKSOURCE_PLL RCC_DCKCFGR_DSISEL /*!< PLL clock used as DSI byte lane clock source */
-/**
- * @}
- */
-#endif /* DSI */
-
-#if defined(CEC)
-/** @defgroup RCC_LL_EC_CEC_CLKSOURCE Peripheral CEC clock source selection
- * @{
- */
-#define LL_RCC_CEC_CLKSOURCE_HSI_DIV488 0x00000000U /*!< HSI oscillator clock divided by 488 used as CEC clock */
-#define LL_RCC_CEC_CLKSOURCE_LSE RCC_DCKCFGR2_CECSEL /*!< LSE oscillator clock used as CEC clock */
-/**
- * @}
- */
-#endif /* CEC */
-
-/** @defgroup RCC_LL_EC_I2S1_CLKSOURCE Peripheral I2S clock source selection
- * @{
- */
-#if defined(RCC_CFGR_I2SSRC)
-#define LL_RCC_I2S1_CLKSOURCE_PLLI2S 0x00000000U /*!< I2S oscillator clock used as I2S1 clock */
-#define LL_RCC_I2S1_CLKSOURCE_PIN RCC_CFGR_I2SSRC /*!< External pin clock used as I2S1 clock */
-#endif /* RCC_CFGR_I2SSRC */
-#if defined(RCC_DCKCFGR_I2SSRC)
-#define LL_RCC_I2S1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2SSRC | 0x00000000U) /*!< PLL clock used as I2S1 clock source */
-#define LL_RCC_I2S1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2SSRC | (RCC_DCKCFGR_I2SSRC_0 >> 16)) /*!< External pin used as I2S1 clock source */
-#define LL_RCC_I2S1_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2SSRC | (RCC_DCKCFGR_I2SSRC_1 >> 16)) /*!< PLL Main clock used as I2S1 clock source */
-#endif /* RCC_DCKCFGR_I2SSRC */
-#if defined(RCC_DCKCFGR_I2S1SRC)
-#define LL_RCC_I2S1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_I2S1SRC | 0x00000000U) /*!< PLLI2S clock used as I2S1 clock source */
-#define LL_RCC_I2S1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC_0 >> 16)) /*!< External pin used as I2S1 clock source */
-#define LL_RCC_I2S1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC_1 >> 16)) /*!< PLL clock used as I2S1 clock source */
-#define LL_RCC_I2S1_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC >> 16)) /*!< PLL Main clock used as I2S1 clock source */
-#endif /* RCC_DCKCFGR_I2S1SRC */
-#if defined(RCC_DCKCFGR_I2S2SRC)
-#define LL_RCC_I2S2_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_I2S2SRC | 0x00000000U) /*!< PLLI2S clock used as I2S2 clock source */
-#define LL_RCC_I2S2_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC_0 >> 16)) /*!< External pin used as I2S2 clock source */
-#define LL_RCC_I2S2_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC_1 >> 16)) /*!< PLL clock used as I2S2 clock source */
-#define LL_RCC_I2S2_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC >> 16)) /*!< PLL Main clock used as I2S2 clock source */
-#endif /* RCC_DCKCFGR_I2S2SRC */
-/**
- * @}
- */
-
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-/** @defgroup RCC_LL_EC_CK48M_CLKSOURCE Peripheral 48Mhz domain clock source selection
- * @{
- */
-#if defined(RCC_DCKCFGR_CK48MSEL)
-#define LL_RCC_CK48M_CLKSOURCE_PLL 0x00000000U /*!< PLL oscillator clock used as 48Mhz domain clock */
-#define LL_RCC_CK48M_CLKSOURCE_PLLSAI RCC_DCKCFGR_CK48MSEL /*!< PLLSAI oscillator clock used as 48Mhz domain clock */
-#endif /* RCC_DCKCFGR_CK48MSEL */
-#if defined(RCC_DCKCFGR2_CK48MSEL)
-#define LL_RCC_CK48M_CLKSOURCE_PLL 0x00000000U /*!< PLL oscillator clock used as 48Mhz domain clock */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_CK48M_CLKSOURCE_PLLSAI RCC_DCKCFGR2_CK48MSEL /*!< PLLSAI oscillator clock used as 48Mhz domain clock */
-#endif /* RCC_PLLSAI_SUPPORT */
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
-#define LL_RCC_CK48M_CLKSOURCE_PLLI2S RCC_DCKCFGR2_CK48MSEL /*!< PLLI2S oscillator clock used as 48Mhz domain clock */
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
-#endif /* RCC_DCKCFGR2_CK48MSEL */
-/**
- * @}
- */
-
-#if defined(RNG)
-/** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
- * @{
- */
-#define LL_RCC_RNG_CLKSOURCE_PLL LL_RCC_CK48M_CLKSOURCE_PLL /*!< PLL clock used as RNG clock source */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_RNG_CLKSOURCE_PLLSAI LL_RCC_CK48M_CLKSOURCE_PLLSAI /*!< PLLSAI clock used as RNG clock source */
-#endif /* RCC_PLLSAI_SUPPORT */
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
-#define LL_RCC_RNG_CLKSOURCE_PLLI2S LL_RCC_CK48M_CLKSOURCE_PLLI2S /*!< PLLI2S clock used as RNG clock source */
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
-/**
- * @}
- */
-#endif /* RNG */
-
-#if defined(USB_OTG_FS) || defined(USB_OTG_HS)
-/** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
- * @{
- */
-#define LL_RCC_USB_CLKSOURCE_PLL LL_RCC_CK48M_CLKSOURCE_PLL /*!< PLL clock used as USB clock source */
-#if defined(RCC_PLLSAI_SUPPORT)
-#define LL_RCC_USB_CLKSOURCE_PLLSAI LL_RCC_CK48M_CLKSOURCE_PLLSAI /*!< PLLSAI clock used as USB clock source */
-#endif /* RCC_PLLSAI_SUPPORT */
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
-#define LL_RCC_USB_CLKSOURCE_PLLI2S LL_RCC_CK48M_CLKSOURCE_PLLI2S /*!< PLLI2S clock used as USB clock source */
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
-/**
- * @}
- */
-#endif /* USB_OTG_FS || USB_OTG_HS */
-
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-
-#if defined(DFSDM1_Channel0) || defined(DFSDM2_Channel0)
-/** @defgroup RCC_LL_EC_DFSDM1_AUDIO_CLKSOURCE Peripheral DFSDM Audio clock source selection
- * @{
- */
-#define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1 (uint32_t)(RCC_DCKCFGR_CKDFSDM1ASEL | 0x00000000U) /*!< I2S1 clock used as DFSDM1 Audio clock source */
-#define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2 (uint32_t)(RCC_DCKCFGR_CKDFSDM1ASEL | (RCC_DCKCFGR_CKDFSDM1ASEL << 16)) /*!< I2S2 clock used as DFSDM1 Audio clock source */
-#if defined(DFSDM2_Channel0)
-#define LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (uint32_t)(RCC_DCKCFGR_CKDFSDM2ASEL | 0x00000000U) /*!< I2S1 clock used as DFSDM2 Audio clock source */
-#define LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (uint32_t)(RCC_DCKCFGR_CKDFSDM2ASEL | (RCC_DCKCFGR_CKDFSDM2ASEL << 16)) /*!< I2S2 clock used as DFSDM2 Audio clock source */
-#endif /* DFSDM2_Channel0 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_DFSDM1_CLKSOURCE Peripheral DFSDM clock source selection
- * @{
- */
-#define LL_RCC_DFSDM1_CLKSOURCE_PCLK2 0x00000000U /*!< PCLK2 clock used as DFSDM1 clock */
-#define LL_RCC_DFSDM1_CLKSOURCE_SYSCLK RCC_DCKCFGR_CKDFSDM1SEL /*!< System clock used as DFSDM1 clock */
-#if defined(DFSDM2_Channel0)
-#define LL_RCC_DFSDM2_CLKSOURCE_PCLK2 0x00000000U /*!< PCLK2 clock used as DFSDM2 clock */
-#define LL_RCC_DFSDM2_CLKSOURCE_SYSCLK RCC_DCKCFGR_CKDFSDM1SEL /*!< System clock used as DFSDM2 clock */
-#endif /* DFSDM2_Channel0 */
-/**
- * @}
- */
-#endif /* DFSDM1_Channel0 || DFSDM2_Channel0 */
-
-#if defined(FMPI2C1)
-/** @defgroup RCC_LL_EC_FMPI2C1 Peripheral FMPI2C get clock source
- * @{
- */
-#define LL_RCC_FMPI2C1_CLKSOURCE RCC_DCKCFGR2_FMPI2C1SEL /*!< FMPI2C1 Clock source selection */
-/**
- * @}
- */
-#endif /* FMPI2C1 */
-
-#if defined(SPDIFRX)
-/** @defgroup RCC_LL_EC_SPDIFRX_CLKSOURCE Peripheral SPDIFRX clock source selection
- * @{
- */
-#define LL_RCC_SPDIFRX1_CLKSOURCE_PLL 0x00000000U /*!< PLL clock used as SPDIFRX clock source */
-#define LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S RCC_DCKCFGR2_SPDIFRXSEL /*!< PLLI2S clock used as SPDIFRX clock source */
-/**
- * @}
- */
-#endif /* SPDIFRX */
-
-#if defined(LPTIM1)
-/** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
- * @{
- */
-#define LL_RCC_LPTIM1_CLKSOURCE RCC_DCKCFGR2_LPTIM1SEL /*!< LPTIM1 Clock source selection */
-/**
- * @}
- */
-#endif /* LPTIM1 */
-
-#if defined(SAI1)
-/** @defgroup RCC_LL_EC_SAIx Peripheral SAI get clock source
- * @{
- */
-#if defined(RCC_DCKCFGR_SAI1ASRC)
-#define LL_RCC_SAI1_A_CLKSOURCE RCC_DCKCFGR_SAI1ASRC /*!< SAI1 block A Clock source selection */
-#endif /* RCC_DCKCFGR_SAI1ASRC */
-#if defined(RCC_DCKCFGR_SAI1BSRC)
-#define LL_RCC_SAI1_B_CLKSOURCE RCC_DCKCFGR_SAI1BSRC /*!< SAI1 block B Clock source selection */
-#endif /* RCC_DCKCFGR_SAI1BSRC */
-#if defined(RCC_DCKCFGR_SAI1SRC)
-#define LL_RCC_SAI1_CLKSOURCE RCC_DCKCFGR_SAI1SRC /*!< SAI1 Clock source selection */
-#endif /* RCC_DCKCFGR_SAI1SRC */
-#if defined(RCC_DCKCFGR_SAI2SRC)
-#define LL_RCC_SAI2_CLKSOURCE RCC_DCKCFGR_SAI2SRC /*!< SAI2 Clock source selection */
-#endif /* RCC_DCKCFGR_SAI2SRC */
-/**
- * @}
- */
-#endif /* SAI1 */
-
-#if defined(SDIO)
-/** @defgroup RCC_LL_EC_SDIOx Peripheral SDIO get clock source
- * @{
- */
-#if defined(RCC_DCKCFGR_SDIOSEL)
-#define LL_RCC_SDIO_CLKSOURCE RCC_DCKCFGR_SDIOSEL /*!< SDIO Clock source selection */
-#elif defined(RCC_DCKCFGR2_SDIOSEL)
-#define LL_RCC_SDIO_CLKSOURCE RCC_DCKCFGR2_SDIOSEL /*!< SDIO Clock source selection */
-#else
-#define LL_RCC_SDIO_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< SDIO Clock source selection */
-#endif
-/**
- * @}
- */
-#endif /* SDIO */
-
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-/** @defgroup RCC_LL_EC_CK48M Peripheral CK48M get clock source
- * @{
- */
-#if defined(RCC_DCKCFGR_CK48MSEL)
-#define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR_CK48MSEL /*!< CK48M Domain clock source selection */
-#endif /* RCC_DCKCFGR_CK48MSEL */
-#if defined(RCC_DCKCFGR2_CK48MSEL)
-#define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR2_CK48MSEL /*!< CK48M Domain clock source selection */
-#endif /* RCC_DCKCFGR_CK48MSEL */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-
-#if defined(RNG)
-/** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
- * @{
- */
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-#define LL_RCC_RNG_CLKSOURCE LL_RCC_CK48M_CLKSOURCE /*!< RNG Clock source selection */
-#else
-#define LL_RCC_RNG_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< RNG Clock source selection */
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-/**
- * @}
- */
-#endif /* RNG */
-
-#if defined(USB_OTG_FS) || defined(USB_OTG_HS)
-/** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
- * @{
- */
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-#define LL_RCC_USB_CLKSOURCE LL_RCC_CK48M_CLKSOURCE /*!< USB Clock source selection */
-#else
-#define LL_RCC_USB_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< USB Clock source selection */
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-/**
- * @}
- */
-#endif /* USB_OTG_FS || USB_OTG_HS */
-
-#if defined(CEC)
-/** @defgroup RCC_LL_EC_CEC Peripheral CEC get clock source
- * @{
- */
-#define LL_RCC_CEC_CLKSOURCE RCC_DCKCFGR2_CECSEL /*!< CEC Clock source selection */
-/**
- * @}
- */
-#endif /* CEC */
-
-/** @defgroup RCC_LL_EC_I2S1 Peripheral I2S get clock source
- * @{
- */
-#if defined(RCC_CFGR_I2SSRC)
-#define LL_RCC_I2S1_CLKSOURCE RCC_CFGR_I2SSRC /*!< I2S1 Clock source selection */
-#endif /* RCC_CFGR_I2SSRC */
-#if defined(RCC_DCKCFGR_I2SSRC)
-#define LL_RCC_I2S1_CLKSOURCE RCC_DCKCFGR_I2SSRC /*!< I2S1 Clock source selection */
-#endif /* RCC_DCKCFGR_I2SSRC */
-#if defined(RCC_DCKCFGR_I2S1SRC)
-#define LL_RCC_I2S1_CLKSOURCE RCC_DCKCFGR_I2S1SRC /*!< I2S1 Clock source selection */
-#endif /* RCC_DCKCFGR_I2S1SRC */
-#if defined(RCC_DCKCFGR_I2S2SRC)
-#define LL_RCC_I2S2_CLKSOURCE RCC_DCKCFGR_I2S2SRC /*!< I2S2 Clock source selection */
-#endif /* RCC_DCKCFGR_I2S2SRC */
-/**
- * @}
- */
-
-#if defined(DFSDM1_Channel0) || defined(DFSDM2_Channel0)
-/** @defgroup RCC_LL_EC_DFSDM_AUDIO Peripheral DFSDM Audio get clock source
- * @{
- */
-#define LL_RCC_DFSDM1_AUDIO_CLKSOURCE RCC_DCKCFGR_CKDFSDM1ASEL /*!< DFSDM1 Audio Clock source selection */
-#if defined(DFSDM2_Channel0)
-#define LL_RCC_DFSDM2_AUDIO_CLKSOURCE RCC_DCKCFGR_CKDFSDM2ASEL /*!< DFSDM2 Audio Clock source selection */
-#endif /* DFSDM2_Channel0 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_DFSDM Peripheral DFSDM get clock source
- * @{
- */
-#define LL_RCC_DFSDM1_CLKSOURCE RCC_DCKCFGR_CKDFSDM1SEL /*!< DFSDM1 Clock source selection */
-#if defined(DFSDM2_Channel0)
-#define LL_RCC_DFSDM2_CLKSOURCE RCC_DCKCFGR_CKDFSDM1SEL /*!< DFSDM2 Clock source selection */
-#endif /* DFSDM2_Channel0 */
-/**
- * @}
- */
-#endif /* DFSDM1_Channel0 || DFSDM2_Channel0 */
-
-#if defined(SPDIFRX)
-/** @defgroup RCC_LL_EC_SPDIFRX Peripheral SPDIFRX get clock source
- * @{
- */
-#define LL_RCC_SPDIFRX1_CLKSOURCE RCC_DCKCFGR2_SPDIFRXSEL /*!< SPDIFRX Clock source selection */
-/**
- * @}
- */
-#endif /* SPDIFRX */
-
-#if defined(DSI)
-/** @defgroup RCC_LL_EC_DSI Peripheral DSI get clock source
- * @{
- */
-#define LL_RCC_DSI_CLKSOURCE RCC_DCKCFGR_DSISEL /*!< DSI Clock source selection */
-/**
- * @}
- */
-#endif /* DSI */
-
-#if defined(LTDC)
-/** @defgroup RCC_LL_EC_LTDC Peripheral LTDC get clock source
- * @{
- */
-#define LL_RCC_LTDC_CLKSOURCE RCC_DCKCFGR_PLLSAIDIVR /*!< LTDC Clock source selection */
-/**
- * @}
- */
-#endif /* LTDC */
-
-
-/** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection
- * @{
- */
-#define LL_RCC_RTC_CLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used as RTC clock */
-#define LL_RCC_RTC_CLKSOURCE_HSE RCC_BDCR_RTCSEL /*!< HSE oscillator clock divided by HSE prescaler used as RTC clock */
-/**
- * @}
- */
-
-#if defined(RCC_DCKCFGR_TIMPRE)
-/** @defgroup RCC_LL_EC_TIM_CLKPRESCALER Timers clocks prescalers selection
- * @{
- */
-#define LL_RCC_TIM_PRESCALER_TWICE 0x00000000U /*!< Timers clock to twice PCLK */
-#define LL_RCC_TIM_PRESCALER_FOUR_TIMES RCC_DCKCFGR_TIMPRE /*!< Timers clock to four time PCLK */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_TIMPRE */
-
-/** @defgroup RCC_LL_EC_PLLSOURCE PLL, PLLI2S and PLLSAI entry clock source
- * @{
- */
-#define LL_RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI /*!< HSI16 clock selected as PLL entry clock source */
-#define LL_RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */
-#if defined(RCC_PLLI2SCFGR_PLLI2SSRC)
-#define LL_RCC_PLLI2SSOURCE_PIN (RCC_PLLI2SCFGR_PLLI2SSRC | 0x80U) /*!< I2S External pin input clock selected as PLLI2S entry clock source */
-#endif /* RCC_PLLI2SCFGR_PLLI2SSRC */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_PLLM_DIV PLL, PLLI2S and PLLSAI division factor
- * @{
- */
-#define LL_RCC_PLLM_DIV_2 (RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 2 */
-#define LL_RCC_PLLM_DIV_3 (RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 3 */
-#define LL_RCC_PLLM_DIV_4 (RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 4 */
-#define LL_RCC_PLLM_DIV_5 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 5 */
-#define LL_RCC_PLLM_DIV_6 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 6 */
-#define LL_RCC_PLLM_DIV_7 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 7 */
-#define LL_RCC_PLLM_DIV_8 (RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 8 */
-#define LL_RCC_PLLM_DIV_9 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 9 */
-#define LL_RCC_PLLM_DIV_10 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 10 */
-#define LL_RCC_PLLM_DIV_11 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 11 */
-#define LL_RCC_PLLM_DIV_12 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 12 */
-#define LL_RCC_PLLM_DIV_13 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 13 */
-#define LL_RCC_PLLM_DIV_14 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 14 */
-#define LL_RCC_PLLM_DIV_15 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 15 */
-#define LL_RCC_PLLM_DIV_16 (RCC_PLLCFGR_PLLM_4) /*!< PLL, PLLI2S and PLLSAI division factor by 16 */
-#define LL_RCC_PLLM_DIV_17 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 17 */
-#define LL_RCC_PLLM_DIV_18 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 18 */
-#define LL_RCC_PLLM_DIV_19 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 19 */
-#define LL_RCC_PLLM_DIV_20 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 20 */
-#define LL_RCC_PLLM_DIV_21 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 21 */
-#define LL_RCC_PLLM_DIV_22 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 22 */
-#define LL_RCC_PLLM_DIV_23 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 23 */
-#define LL_RCC_PLLM_DIV_24 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 24 */
-#define LL_RCC_PLLM_DIV_25 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 25 */
-#define LL_RCC_PLLM_DIV_26 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 26 */
-#define LL_RCC_PLLM_DIV_27 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 27 */
-#define LL_RCC_PLLM_DIV_28 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 28 */
-#define LL_RCC_PLLM_DIV_29 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 29 */
-#define LL_RCC_PLLM_DIV_30 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 30 */
-#define LL_RCC_PLLM_DIV_31 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 31 */
-#define LL_RCC_PLLM_DIV_32 (RCC_PLLCFGR_PLLM_5) /*!< PLL, PLLI2S and PLLSAI division factor by 32 */
-#define LL_RCC_PLLM_DIV_33 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 33 */
-#define LL_RCC_PLLM_DIV_34 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 34 */
-#define LL_RCC_PLLM_DIV_35 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 35 */
-#define LL_RCC_PLLM_DIV_36 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 36 */
-#define LL_RCC_PLLM_DIV_37 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 37 */
-#define LL_RCC_PLLM_DIV_38 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 38 */
-#define LL_RCC_PLLM_DIV_39 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 39 */
-#define LL_RCC_PLLM_DIV_40 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 40 */
-#define LL_RCC_PLLM_DIV_41 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 41 */
-#define LL_RCC_PLLM_DIV_42 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 42 */
-#define LL_RCC_PLLM_DIV_43 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 43 */
-#define LL_RCC_PLLM_DIV_44 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 44 */
-#define LL_RCC_PLLM_DIV_45 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 45 */
-#define LL_RCC_PLLM_DIV_46 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 46 */
-#define LL_RCC_PLLM_DIV_47 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 47 */
-#define LL_RCC_PLLM_DIV_48 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4) /*!< PLL, PLLI2S and PLLSAI division factor by 48 */
-#define LL_RCC_PLLM_DIV_49 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 49 */
-#define LL_RCC_PLLM_DIV_50 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 50 */
-#define LL_RCC_PLLM_DIV_51 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 51 */
-#define LL_RCC_PLLM_DIV_52 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 52 */
-#define LL_RCC_PLLM_DIV_53 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 53 */
-#define LL_RCC_PLLM_DIV_54 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 54 */
-#define LL_RCC_PLLM_DIV_55 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 55 */
-#define LL_RCC_PLLM_DIV_56 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 56 */
-#define LL_RCC_PLLM_DIV_57 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 57 */
-#define LL_RCC_PLLM_DIV_58 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 58 */
-#define LL_RCC_PLLM_DIV_59 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 59 */
-#define LL_RCC_PLLM_DIV_60 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 60 */
-#define LL_RCC_PLLM_DIV_61 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 61 */
-#define LL_RCC_PLLM_DIV_62 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 62 */
-#define LL_RCC_PLLM_DIV_63 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 63 */
-/**
- * @}
- */
-
-#if defined(RCC_PLLCFGR_PLLR)
-/** @defgroup RCC_LL_EC_PLLR_DIV PLL division factor (PLLR)
- * @{
- */
-#define LL_RCC_PLLR_DIV_2 (RCC_PLLCFGR_PLLR_1) /*!< Main PLL division factor for PLLCLK (system clock) by 2 */
-#define LL_RCC_PLLR_DIV_3 (RCC_PLLCFGR_PLLR_1|RCC_PLLCFGR_PLLR_0) /*!< Main PLL division factor for PLLCLK (system clock) by 3 */
-#define LL_RCC_PLLR_DIV_4 (RCC_PLLCFGR_PLLR_2) /*!< Main PLL division factor for PLLCLK (system clock) by 4 */
-#define LL_RCC_PLLR_DIV_5 (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_0) /*!< Main PLL division factor for PLLCLK (system clock) by 5 */
-#define LL_RCC_PLLR_DIV_6 (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_1) /*!< Main PLL division factor for PLLCLK (system clock) by 6 */
-#define LL_RCC_PLLR_DIV_7 (RCC_PLLCFGR_PLLR) /*!< Main PLL division factor for PLLCLK (system clock) by 7 */
-/**
- * @}
- */
-#endif /* RCC_PLLCFGR_PLLR */
-
-#if defined(RCC_DCKCFGR_PLLDIVR)
-/** @defgroup RCC_LL_EC_PLLDIVR PLLDIVR division factor (PLLDIVR)
- * @{
- */
-#define LL_RCC_PLLDIVR_DIV_1 (RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 1 */
-#define LL_RCC_PLLDIVR_DIV_2 (RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 2 */
-#define LL_RCC_PLLDIVR_DIV_3 (RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 3 */
-#define LL_RCC_PLLDIVR_DIV_4 (RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 4 */
-#define LL_RCC_PLLDIVR_DIV_5 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 5 */
-#define LL_RCC_PLLDIVR_DIV_6 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 6 */
-#define LL_RCC_PLLDIVR_DIV_7 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 7 */
-#define LL_RCC_PLLDIVR_DIV_8 (RCC_DCKCFGR_PLLDIVR_3) /*!< PLL division factor for PLLDIVR output by 8 */
-#define LL_RCC_PLLDIVR_DIV_9 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 9 */
-#define LL_RCC_PLLDIVR_DIV_10 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 10 */
-#define LL_RCC_PLLDIVR_DIV_11 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 11 */
-#define LL_RCC_PLLDIVR_DIV_12 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 12 */
-#define LL_RCC_PLLDIVR_DIV_13 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 13 */
-#define LL_RCC_PLLDIVR_DIV_14 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 14 */
-#define LL_RCC_PLLDIVR_DIV_15 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 15 */
-#define LL_RCC_PLLDIVR_DIV_16 (RCC_DCKCFGR_PLLDIVR_4) /*!< PLL division factor for PLLDIVR output by 16 */
-#define LL_RCC_PLLDIVR_DIV_17 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 17 */
-#define LL_RCC_PLLDIVR_DIV_18 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 18 */
-#define LL_RCC_PLLDIVR_DIV_19 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 19 */
-#define LL_RCC_PLLDIVR_DIV_20 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 20 */
-#define LL_RCC_PLLDIVR_DIV_21 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 21 */
-#define LL_RCC_PLLDIVR_DIV_22 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 22 */
-#define LL_RCC_PLLDIVR_DIV_23 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 23 */
-#define LL_RCC_PLLDIVR_DIV_24 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3) /*!< PLL division factor for PLLDIVR output by 24 */
-#define LL_RCC_PLLDIVR_DIV_25 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 25 */
-#define LL_RCC_PLLDIVR_DIV_26 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 26 */
-#define LL_RCC_PLLDIVR_DIV_27 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 27 */
-#define LL_RCC_PLLDIVR_DIV_28 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 28 */
-#define LL_RCC_PLLDIVR_DIV_29 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 29 */
-#define LL_RCC_PLLDIVR_DIV_30 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 30 */
-#define LL_RCC_PLLDIVR_DIV_31 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 31 */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_PLLDIVR */
-
-/** @defgroup RCC_LL_EC_PLLP_DIV PLL division factor (PLLP)
- * @{
- */
-#define LL_RCC_PLLP_DIV_2 0x00000000U /*!< Main PLL division factor for PLLP output by 2 */
-#define LL_RCC_PLLP_DIV_4 RCC_PLLCFGR_PLLP_0 /*!< Main PLL division factor for PLLP output by 4 */
-#define LL_RCC_PLLP_DIV_6 RCC_PLLCFGR_PLLP_1 /*!< Main PLL division factor for PLLP output by 6 */
-#define LL_RCC_PLLP_DIV_8 (RCC_PLLCFGR_PLLP_1 | RCC_PLLCFGR_PLLP_0) /*!< Main PLL division factor for PLLP output by 8 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_PLLQ_DIV PLL division factor (PLLQ)
- * @{
- */
-#define LL_RCC_PLLQ_DIV_2 RCC_PLLCFGR_PLLQ_1 /*!< Main PLL division factor for PLLQ output by 2 */
-#define LL_RCC_PLLQ_DIV_3 (RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 3 */
-#define LL_RCC_PLLQ_DIV_4 RCC_PLLCFGR_PLLQ_2 /*!< Main PLL division factor for PLLQ output by 4 */
-#define LL_RCC_PLLQ_DIV_5 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 5 */
-#define LL_RCC_PLLQ_DIV_6 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 6 */
-#define LL_RCC_PLLQ_DIV_7 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 7 */
-#define LL_RCC_PLLQ_DIV_8 RCC_PLLCFGR_PLLQ_3 /*!< Main PLL division factor for PLLQ output by 8 */
-#define LL_RCC_PLLQ_DIV_9 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 9 */
-#define LL_RCC_PLLQ_DIV_10 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 10 */
-#define LL_RCC_PLLQ_DIV_11 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 11 */
-#define LL_RCC_PLLQ_DIV_12 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2) /*!< Main PLL division factor for PLLQ output by 12 */
-#define LL_RCC_PLLQ_DIV_13 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 13 */
-#define LL_RCC_PLLQ_DIV_14 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 14 */
-#define LL_RCC_PLLQ_DIV_15 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 15 */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_PLL_SPRE_SEL PLL Spread Spectrum Selection
- * @{
- */
-#define LL_RCC_SPREAD_SELECT_CENTER 0x00000000U /*!< PLL center spread spectrum selection */
-#define LL_RCC_SPREAD_SELECT_DOWN RCC_SSCGR_SPREADSEL /*!< PLL down spread spectrum selection */
-/**
- * @}
- */
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/** @defgroup RCC_LL_EC_PLLI2SM PLLI2SM division factor (PLLI2SM)
- * @{
- */
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
-#define LL_RCC_PLLI2SM_DIV_2 (RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 2 */
-#define LL_RCC_PLLI2SM_DIV_3 (RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 3 */
-#define LL_RCC_PLLI2SM_DIV_4 (RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 4 */
-#define LL_RCC_PLLI2SM_DIV_5 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 5 */
-#define LL_RCC_PLLI2SM_DIV_6 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 6 */
-#define LL_RCC_PLLI2SM_DIV_7 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 7 */
-#define LL_RCC_PLLI2SM_DIV_8 (RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 8 */
-#define LL_RCC_PLLI2SM_DIV_9 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 9 */
-#define LL_RCC_PLLI2SM_DIV_10 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 10 */
-#define LL_RCC_PLLI2SM_DIV_11 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 11 */
-#define LL_RCC_PLLI2SM_DIV_12 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 12 */
-#define LL_RCC_PLLI2SM_DIV_13 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 13 */
-#define LL_RCC_PLLI2SM_DIV_14 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 14 */
-#define LL_RCC_PLLI2SM_DIV_15 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 15 */
-#define LL_RCC_PLLI2SM_DIV_16 (RCC_PLLI2SCFGR_PLLI2SM_4) /*!< PLLI2S division factor for PLLI2SM output by 16 */
-#define LL_RCC_PLLI2SM_DIV_17 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 17 */
-#define LL_RCC_PLLI2SM_DIV_18 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 18 */
-#define LL_RCC_PLLI2SM_DIV_19 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 19 */
-#define LL_RCC_PLLI2SM_DIV_20 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 20 */
-#define LL_RCC_PLLI2SM_DIV_21 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 21 */
-#define LL_RCC_PLLI2SM_DIV_22 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 22 */
-#define LL_RCC_PLLI2SM_DIV_23 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 23 */
-#define LL_RCC_PLLI2SM_DIV_24 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 24 */
-#define LL_RCC_PLLI2SM_DIV_25 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 25 */
-#define LL_RCC_PLLI2SM_DIV_26 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 26 */
-#define LL_RCC_PLLI2SM_DIV_27 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 27 */
-#define LL_RCC_PLLI2SM_DIV_28 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 28 */
-#define LL_RCC_PLLI2SM_DIV_29 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 29 */
-#define LL_RCC_PLLI2SM_DIV_30 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 30 */
-#define LL_RCC_PLLI2SM_DIV_31 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 31 */
-#define LL_RCC_PLLI2SM_DIV_32 (RCC_PLLI2SCFGR_PLLI2SM_5) /*!< PLLI2S division factor for PLLI2SM output by 32 */
-#define LL_RCC_PLLI2SM_DIV_33 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 33 */
-#define LL_RCC_PLLI2SM_DIV_34 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 34 */
-#define LL_RCC_PLLI2SM_DIV_35 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 35 */
-#define LL_RCC_PLLI2SM_DIV_36 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 36 */
-#define LL_RCC_PLLI2SM_DIV_37 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 37 */
-#define LL_RCC_PLLI2SM_DIV_38 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 38 */
-#define LL_RCC_PLLI2SM_DIV_39 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 39 */
-#define LL_RCC_PLLI2SM_DIV_40 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 40 */
-#define LL_RCC_PLLI2SM_DIV_41 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 41 */
-#define LL_RCC_PLLI2SM_DIV_42 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 42 */
-#define LL_RCC_PLLI2SM_DIV_43 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 43 */
-#define LL_RCC_PLLI2SM_DIV_44 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 44 */
-#define LL_RCC_PLLI2SM_DIV_45 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 45 */
-#define LL_RCC_PLLI2SM_DIV_46 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 46 */
-#define LL_RCC_PLLI2SM_DIV_47 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 47 */
-#define LL_RCC_PLLI2SM_DIV_48 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4) /*!< PLLI2S division factor for PLLI2SM output by 48 */
-#define LL_RCC_PLLI2SM_DIV_49 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 49 */
-#define LL_RCC_PLLI2SM_DIV_50 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 50 */
-#define LL_RCC_PLLI2SM_DIV_51 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 51 */
-#define LL_RCC_PLLI2SM_DIV_52 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 52 */
-#define LL_RCC_PLLI2SM_DIV_53 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 53 */
-#define LL_RCC_PLLI2SM_DIV_54 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 54 */
-#define LL_RCC_PLLI2SM_DIV_55 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 55 */
-#define LL_RCC_PLLI2SM_DIV_56 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 56 */
-#define LL_RCC_PLLI2SM_DIV_57 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 57 */
-#define LL_RCC_PLLI2SM_DIV_58 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 58 */
-#define LL_RCC_PLLI2SM_DIV_59 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 59 */
-#define LL_RCC_PLLI2SM_DIV_60 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 60 */
-#define LL_RCC_PLLI2SM_DIV_61 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 61 */
-#define LL_RCC_PLLI2SM_DIV_62 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 62 */
-#define LL_RCC_PLLI2SM_DIV_63 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 63 */
-#else
-#define LL_RCC_PLLI2SM_DIV_2 LL_RCC_PLLM_DIV_2 /*!< PLLI2S division factor for PLLI2SM output by 2 */
-#define LL_RCC_PLLI2SM_DIV_3 LL_RCC_PLLM_DIV_3 /*!< PLLI2S division factor for PLLI2SM output by 3 */
-#define LL_RCC_PLLI2SM_DIV_4 LL_RCC_PLLM_DIV_4 /*!< PLLI2S division factor for PLLI2SM output by 4 */
-#define LL_RCC_PLLI2SM_DIV_5 LL_RCC_PLLM_DIV_5 /*!< PLLI2S division factor for PLLI2SM output by 5 */
-#define LL_RCC_PLLI2SM_DIV_6 LL_RCC_PLLM_DIV_6 /*!< PLLI2S division factor for PLLI2SM output by 6 */
-#define LL_RCC_PLLI2SM_DIV_7 LL_RCC_PLLM_DIV_7 /*!< PLLI2S division factor for PLLI2SM output by 7 */
-#define LL_RCC_PLLI2SM_DIV_8 LL_RCC_PLLM_DIV_8 /*!< PLLI2S division factor for PLLI2SM output by 8 */
-#define LL_RCC_PLLI2SM_DIV_9 LL_RCC_PLLM_DIV_9 /*!< PLLI2S division factor for PLLI2SM output by 9 */
-#define LL_RCC_PLLI2SM_DIV_10 LL_RCC_PLLM_DIV_10 /*!< PLLI2S division factor for PLLI2SM output by 10 */
-#define LL_RCC_PLLI2SM_DIV_11 LL_RCC_PLLM_DIV_11 /*!< PLLI2S division factor for PLLI2SM output by 11 */
-#define LL_RCC_PLLI2SM_DIV_12 LL_RCC_PLLM_DIV_12 /*!< PLLI2S division factor for PLLI2SM output by 12 */
-#define LL_RCC_PLLI2SM_DIV_13 LL_RCC_PLLM_DIV_13 /*!< PLLI2S division factor for PLLI2SM output by 13 */
-#define LL_RCC_PLLI2SM_DIV_14 LL_RCC_PLLM_DIV_14 /*!< PLLI2S division factor for PLLI2SM output by 14 */
-#define LL_RCC_PLLI2SM_DIV_15 LL_RCC_PLLM_DIV_15 /*!< PLLI2S division factor for PLLI2SM output by 15 */
-#define LL_RCC_PLLI2SM_DIV_16 LL_RCC_PLLM_DIV_16 /*!< PLLI2S division factor for PLLI2SM output by 16 */
-#define LL_RCC_PLLI2SM_DIV_17 LL_RCC_PLLM_DIV_17 /*!< PLLI2S division factor for PLLI2SM output by 17 */
-#define LL_RCC_PLLI2SM_DIV_18 LL_RCC_PLLM_DIV_18 /*!< PLLI2S division factor for PLLI2SM output by 18 */
-#define LL_RCC_PLLI2SM_DIV_19 LL_RCC_PLLM_DIV_19 /*!< PLLI2S division factor for PLLI2SM output by 19 */
-#define LL_RCC_PLLI2SM_DIV_20 LL_RCC_PLLM_DIV_20 /*!< PLLI2S division factor for PLLI2SM output by 20 */
-#define LL_RCC_PLLI2SM_DIV_21 LL_RCC_PLLM_DIV_21 /*!< PLLI2S division factor for PLLI2SM output by 21 */
-#define LL_RCC_PLLI2SM_DIV_22 LL_RCC_PLLM_DIV_22 /*!< PLLI2S division factor for PLLI2SM output by 22 */
-#define LL_RCC_PLLI2SM_DIV_23 LL_RCC_PLLM_DIV_23 /*!< PLLI2S division factor for PLLI2SM output by 23 */
-#define LL_RCC_PLLI2SM_DIV_24 LL_RCC_PLLM_DIV_24 /*!< PLLI2S division factor for PLLI2SM output by 24 */
-#define LL_RCC_PLLI2SM_DIV_25 LL_RCC_PLLM_DIV_25 /*!< PLLI2S division factor for PLLI2SM output by 25 */
-#define LL_RCC_PLLI2SM_DIV_26 LL_RCC_PLLM_DIV_26 /*!< PLLI2S division factor for PLLI2SM output by 26 */
-#define LL_RCC_PLLI2SM_DIV_27 LL_RCC_PLLM_DIV_27 /*!< PLLI2S division factor for PLLI2SM output by 27 */
-#define LL_RCC_PLLI2SM_DIV_28 LL_RCC_PLLM_DIV_28 /*!< PLLI2S division factor for PLLI2SM output by 28 */
-#define LL_RCC_PLLI2SM_DIV_29 LL_RCC_PLLM_DIV_29 /*!< PLLI2S division factor for PLLI2SM output by 29 */
-#define LL_RCC_PLLI2SM_DIV_30 LL_RCC_PLLM_DIV_30 /*!< PLLI2S division factor for PLLI2SM output by 30 */
-#define LL_RCC_PLLI2SM_DIV_31 LL_RCC_PLLM_DIV_31 /*!< PLLI2S division factor for PLLI2SM output by 31 */
-#define LL_RCC_PLLI2SM_DIV_32 LL_RCC_PLLM_DIV_32 /*!< PLLI2S division factor for PLLI2SM output by 32 */
-#define LL_RCC_PLLI2SM_DIV_33 LL_RCC_PLLM_DIV_33 /*!< PLLI2S division factor for PLLI2SM output by 33 */
-#define LL_RCC_PLLI2SM_DIV_34 LL_RCC_PLLM_DIV_34 /*!< PLLI2S division factor for PLLI2SM output by 34 */
-#define LL_RCC_PLLI2SM_DIV_35 LL_RCC_PLLM_DIV_35 /*!< PLLI2S division factor for PLLI2SM output by 35 */
-#define LL_RCC_PLLI2SM_DIV_36 LL_RCC_PLLM_DIV_36 /*!< PLLI2S division factor for PLLI2SM output by 36 */
-#define LL_RCC_PLLI2SM_DIV_37 LL_RCC_PLLM_DIV_37 /*!< PLLI2S division factor for PLLI2SM output by 37 */
-#define LL_RCC_PLLI2SM_DIV_38 LL_RCC_PLLM_DIV_38 /*!< PLLI2S division factor for PLLI2SM output by 38 */
-#define LL_RCC_PLLI2SM_DIV_39 LL_RCC_PLLM_DIV_39 /*!< PLLI2S division factor for PLLI2SM output by 39 */
-#define LL_RCC_PLLI2SM_DIV_40 LL_RCC_PLLM_DIV_40 /*!< PLLI2S division factor for PLLI2SM output by 40 */
-#define LL_RCC_PLLI2SM_DIV_41 LL_RCC_PLLM_DIV_41 /*!< PLLI2S division factor for PLLI2SM output by 41 */
-#define LL_RCC_PLLI2SM_DIV_42 LL_RCC_PLLM_DIV_42 /*!< PLLI2S division factor for PLLI2SM output by 42 */
-#define LL_RCC_PLLI2SM_DIV_43 LL_RCC_PLLM_DIV_43 /*!< PLLI2S division factor for PLLI2SM output by 43 */
-#define LL_RCC_PLLI2SM_DIV_44 LL_RCC_PLLM_DIV_44 /*!< PLLI2S division factor for PLLI2SM output by 44 */
-#define LL_RCC_PLLI2SM_DIV_45 LL_RCC_PLLM_DIV_45 /*!< PLLI2S division factor for PLLI2SM output by 45 */
-#define LL_RCC_PLLI2SM_DIV_46 LL_RCC_PLLM_DIV_46 /*!< PLLI2S division factor for PLLI2SM output by 46 */
-#define LL_RCC_PLLI2SM_DIV_47 LL_RCC_PLLM_DIV_47 /*!< PLLI2S division factor for PLLI2SM output by 47 */
-#define LL_RCC_PLLI2SM_DIV_48 LL_RCC_PLLM_DIV_48 /*!< PLLI2S division factor for PLLI2SM output by 48 */
-#define LL_RCC_PLLI2SM_DIV_49 LL_RCC_PLLM_DIV_49 /*!< PLLI2S division factor for PLLI2SM output by 49 */
-#define LL_RCC_PLLI2SM_DIV_50 LL_RCC_PLLM_DIV_50 /*!< PLLI2S division factor for PLLI2SM output by 50 */
-#define LL_RCC_PLLI2SM_DIV_51 LL_RCC_PLLM_DIV_51 /*!< PLLI2S division factor for PLLI2SM output by 51 */
-#define LL_RCC_PLLI2SM_DIV_52 LL_RCC_PLLM_DIV_52 /*!< PLLI2S division factor for PLLI2SM output by 52 */
-#define LL_RCC_PLLI2SM_DIV_53 LL_RCC_PLLM_DIV_53 /*!< PLLI2S division factor for PLLI2SM output by 53 */
-#define LL_RCC_PLLI2SM_DIV_54 LL_RCC_PLLM_DIV_54 /*!< PLLI2S division factor for PLLI2SM output by 54 */
-#define LL_RCC_PLLI2SM_DIV_55 LL_RCC_PLLM_DIV_55 /*!< PLLI2S division factor for PLLI2SM output by 55 */
-#define LL_RCC_PLLI2SM_DIV_56 LL_RCC_PLLM_DIV_56 /*!< PLLI2S division factor for PLLI2SM output by 56 */
-#define LL_RCC_PLLI2SM_DIV_57 LL_RCC_PLLM_DIV_57 /*!< PLLI2S division factor for PLLI2SM output by 57 */
-#define LL_RCC_PLLI2SM_DIV_58 LL_RCC_PLLM_DIV_58 /*!< PLLI2S division factor for PLLI2SM output by 58 */
-#define LL_RCC_PLLI2SM_DIV_59 LL_RCC_PLLM_DIV_59 /*!< PLLI2S division factor for PLLI2SM output by 59 */
-#define LL_RCC_PLLI2SM_DIV_60 LL_RCC_PLLM_DIV_60 /*!< PLLI2S division factor for PLLI2SM output by 60 */
-#define LL_RCC_PLLI2SM_DIV_61 LL_RCC_PLLM_DIV_61 /*!< PLLI2S division factor for PLLI2SM output by 61 */
-#define LL_RCC_PLLI2SM_DIV_62 LL_RCC_PLLM_DIV_62 /*!< PLLI2S division factor for PLLI2SM output by 62 */
-#define LL_RCC_PLLI2SM_DIV_63 LL_RCC_PLLM_DIV_63 /*!< PLLI2S division factor for PLLI2SM output by 63 */
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
-/**
- * @}
- */
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ)
-/** @defgroup RCC_LL_EC_PLLI2SQ PLLI2SQ division factor (PLLI2SQ)
- * @{
- */
-#define LL_RCC_PLLI2SQ_DIV_2 RCC_PLLI2SCFGR_PLLI2SQ_1 /*!< PLLI2S division factor for PLLI2SQ output by 2 */
-#define LL_RCC_PLLI2SQ_DIV_3 (RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 3 */
-#define LL_RCC_PLLI2SQ_DIV_4 RCC_PLLI2SCFGR_PLLI2SQ_2 /*!< PLLI2S division factor for PLLI2SQ output by 4 */
-#define LL_RCC_PLLI2SQ_DIV_5 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 5 */
-#define LL_RCC_PLLI2SQ_DIV_6 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 6 */
-#define LL_RCC_PLLI2SQ_DIV_7 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 7 */
-#define LL_RCC_PLLI2SQ_DIV_8 RCC_PLLI2SCFGR_PLLI2SQ_3 /*!< PLLI2S division factor for PLLI2SQ output by 8 */
-#define LL_RCC_PLLI2SQ_DIV_9 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 9 */
-#define LL_RCC_PLLI2SQ_DIV_10 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 10 */
-#define LL_RCC_PLLI2SQ_DIV_11 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 11 */
-#define LL_RCC_PLLI2SQ_DIV_12 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2) /*!< PLLI2S division factor for PLLI2SQ output by 12 */
-#define LL_RCC_PLLI2SQ_DIV_13 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 13 */
-#define LL_RCC_PLLI2SQ_DIV_14 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 14 */
-#define LL_RCC_PLLI2SQ_DIV_15 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 15 */
-/**
- * @}
- */
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ */
-
-#if defined(RCC_DCKCFGR_PLLI2SDIVQ)
-/** @defgroup RCC_LL_EC_PLLI2SDIVQ PLLI2SDIVQ division factor (PLLI2SDIVQ)
- * @{
- */
-#define LL_RCC_PLLI2SDIVQ_DIV_1 0x00000000U /*!< PLLI2S division factor for PLLI2SDIVQ output by 1 */
-#define LL_RCC_PLLI2SDIVQ_DIV_2 RCC_DCKCFGR_PLLI2SDIVQ_0 /*!< PLLI2S division factor for PLLI2SDIVQ output by 2 */
-#define LL_RCC_PLLI2SDIVQ_DIV_3 RCC_DCKCFGR_PLLI2SDIVQ_1 /*!< PLLI2S division factor for PLLI2SDIVQ output by 3 */
-#define LL_RCC_PLLI2SDIVQ_DIV_4 (RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 4 */
-#define LL_RCC_PLLI2SDIVQ_DIV_5 RCC_DCKCFGR_PLLI2SDIVQ_2 /*!< PLLI2S division factor for PLLI2SDIVQ output by 5 */
-#define LL_RCC_PLLI2SDIVQ_DIV_6 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 6 */
-#define LL_RCC_PLLI2SDIVQ_DIV_7 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 7 */
-#define LL_RCC_PLLI2SDIVQ_DIV_8 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 8 */
-#define LL_RCC_PLLI2SDIVQ_DIV_9 RCC_DCKCFGR_PLLI2SDIVQ_3 /*!< PLLI2S division factor for PLLI2SDIVQ output by 9 */
-#define LL_RCC_PLLI2SDIVQ_DIV_10 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 10 */
-#define LL_RCC_PLLI2SDIVQ_DIV_11 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 11 */
-#define LL_RCC_PLLI2SDIVQ_DIV_12 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 12 */
-#define LL_RCC_PLLI2SDIVQ_DIV_13 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 13 */
-#define LL_RCC_PLLI2SDIVQ_DIV_14 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 14 */
-#define LL_RCC_PLLI2SDIVQ_DIV_15 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 15 */
-#define LL_RCC_PLLI2SDIVQ_DIV_16 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 16 */
-#define LL_RCC_PLLI2SDIVQ_DIV_17 RCC_DCKCFGR_PLLI2SDIVQ_4 /*!< PLLI2S division factor for PLLI2SDIVQ output by 17 */
-#define LL_RCC_PLLI2SDIVQ_DIV_18 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 18 */
-#define LL_RCC_PLLI2SDIVQ_DIV_19 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 19 */
-#define LL_RCC_PLLI2SDIVQ_DIV_20 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 20 */
-#define LL_RCC_PLLI2SDIVQ_DIV_21 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 21 */
-#define LL_RCC_PLLI2SDIVQ_DIV_22 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 22 */
-#define LL_RCC_PLLI2SDIVQ_DIV_23 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 23 */
-#define LL_RCC_PLLI2SDIVQ_DIV_24 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 24 */
-#define LL_RCC_PLLI2SDIVQ_DIV_25 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3) /*!< PLLI2S division factor for PLLI2SDIVQ output by 25 */
-#define LL_RCC_PLLI2SDIVQ_DIV_26 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 26 */
-#define LL_RCC_PLLI2SDIVQ_DIV_27 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 27 */
-#define LL_RCC_PLLI2SDIVQ_DIV_28 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 28 */
-#define LL_RCC_PLLI2SDIVQ_DIV_29 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 29 */
-#define LL_RCC_PLLI2SDIVQ_DIV_30 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 30 */
-#define LL_RCC_PLLI2SDIVQ_DIV_31 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 31 */
-#define LL_RCC_PLLI2SDIVQ_DIV_32 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 32 */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ */
-
-#if defined(RCC_DCKCFGR_PLLI2SDIVR)
-/** @defgroup RCC_LL_EC_PLLI2SDIVR PLLI2SDIVR division factor (PLLI2SDIVR)
- * @{
- */
-#define LL_RCC_PLLI2SDIVR_DIV_1 (RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 1 */
-#define LL_RCC_PLLI2SDIVR_DIV_2 (RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 2 */
-#define LL_RCC_PLLI2SDIVR_DIV_3 (RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 3 */
-#define LL_RCC_PLLI2SDIVR_DIV_4 (RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 4 */
-#define LL_RCC_PLLI2SDIVR_DIV_5 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 5 */
-#define LL_RCC_PLLI2SDIVR_DIV_6 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 6 */
-#define LL_RCC_PLLI2SDIVR_DIV_7 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 7 */
-#define LL_RCC_PLLI2SDIVR_DIV_8 (RCC_DCKCFGR_PLLI2SDIVR_3) /*!< PLLI2S division factor for PLLI2SDIVR output by 8 */
-#define LL_RCC_PLLI2SDIVR_DIV_9 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 9 */
-#define LL_RCC_PLLI2SDIVR_DIV_10 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 10 */
-#define LL_RCC_PLLI2SDIVR_DIV_11 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 11 */
-#define LL_RCC_PLLI2SDIVR_DIV_12 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 12 */
-#define LL_RCC_PLLI2SDIVR_DIV_13 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 13 */
-#define LL_RCC_PLLI2SDIVR_DIV_14 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 14 */
-#define LL_RCC_PLLI2SDIVR_DIV_15 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 15 */
-#define LL_RCC_PLLI2SDIVR_DIV_16 (RCC_DCKCFGR_PLLI2SDIVR_4) /*!< PLLI2S division factor for PLLI2SDIVR output by 16 */
-#define LL_RCC_PLLI2SDIVR_DIV_17 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 17 */
-#define LL_RCC_PLLI2SDIVR_DIV_18 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 18 */
-#define LL_RCC_PLLI2SDIVR_DIV_19 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 19 */
-#define LL_RCC_PLLI2SDIVR_DIV_20 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 20 */
-#define LL_RCC_PLLI2SDIVR_DIV_21 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 21 */
-#define LL_RCC_PLLI2SDIVR_DIV_22 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 22 */
-#define LL_RCC_PLLI2SDIVR_DIV_23 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 23 */
-#define LL_RCC_PLLI2SDIVR_DIV_24 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3) /*!< PLLI2S division factor for PLLI2SDIVR output by 24 */
-#define LL_RCC_PLLI2SDIVR_DIV_25 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 25 */
-#define LL_RCC_PLLI2SDIVR_DIV_26 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 26 */
-#define LL_RCC_PLLI2SDIVR_DIV_27 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 27 */
-#define LL_RCC_PLLI2SDIVR_DIV_28 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 28 */
-#define LL_RCC_PLLI2SDIVR_DIV_29 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 29 */
-#define LL_RCC_PLLI2SDIVR_DIV_30 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 30 */
-#define LL_RCC_PLLI2SDIVR_DIV_31 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 31 */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_PLLI2SDIVR */
-
-/** @defgroup RCC_LL_EC_PLLI2SR PLLI2SR division factor (PLLI2SR)
- * @{
- */
-#define LL_RCC_PLLI2SR_DIV_2 RCC_PLLI2SCFGR_PLLI2SR_1 /*!< PLLI2S division factor for PLLI2SR output by 2 */
-#define LL_RCC_PLLI2SR_DIV_3 (RCC_PLLI2SCFGR_PLLI2SR_1 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 3 */
-#define LL_RCC_PLLI2SR_DIV_4 RCC_PLLI2SCFGR_PLLI2SR_2 /*!< PLLI2S division factor for PLLI2SR output by 4 */
-#define LL_RCC_PLLI2SR_DIV_5 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 5 */
-#define LL_RCC_PLLI2SR_DIV_6 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_1) /*!< PLLI2S division factor for PLLI2SR output by 6 */
-#define LL_RCC_PLLI2SR_DIV_7 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_1 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 7 */
-/**
- * @}
- */
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SP)
-/** @defgroup RCC_LL_EC_PLLI2SP PLLI2SP division factor (PLLI2SP)
- * @{
- */
-#define LL_RCC_PLLI2SP_DIV_2 0x00000000U /*!< PLLI2S division factor for PLLI2SP output by 2 */
-#define LL_RCC_PLLI2SP_DIV_4 RCC_PLLI2SCFGR_PLLI2SP_0 /*!< PLLI2S division factor for PLLI2SP output by 4 */
-#define LL_RCC_PLLI2SP_DIV_6 RCC_PLLI2SCFGR_PLLI2SP_1 /*!< PLLI2S division factor for PLLI2SP output by 6 */
-#define LL_RCC_PLLI2SP_DIV_8 (RCC_PLLI2SCFGR_PLLI2SP_1 | RCC_PLLI2SCFGR_PLLI2SP_0) /*!< PLLI2S division factor for PLLI2SP output by 8 */
-/**
- * @}
- */
-#endif /* RCC_PLLI2SCFGR_PLLI2SP */
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/** @defgroup RCC_LL_EC_PLLSAIM PLLSAIM division factor (PLLSAIM or PLLM)
- * @{
- */
-#if defined(RCC_PLLSAICFGR_PLLSAIM)
-#define LL_RCC_PLLSAIM_DIV_2 (RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 2 */
-#define LL_RCC_PLLSAIM_DIV_3 (RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 3 */
-#define LL_RCC_PLLSAIM_DIV_4 (RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 4 */
-#define LL_RCC_PLLSAIM_DIV_5 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 5 */
-#define LL_RCC_PLLSAIM_DIV_6 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 6 */
-#define LL_RCC_PLLSAIM_DIV_7 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 7 */
-#define LL_RCC_PLLSAIM_DIV_8 (RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 8 */
-#define LL_RCC_PLLSAIM_DIV_9 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 9 */
-#define LL_RCC_PLLSAIM_DIV_10 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 10 */
-#define LL_RCC_PLLSAIM_DIV_11 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 11 */
-#define LL_RCC_PLLSAIM_DIV_12 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 12 */
-#define LL_RCC_PLLSAIM_DIV_13 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 13 */
-#define LL_RCC_PLLSAIM_DIV_14 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 14 */
-#define LL_RCC_PLLSAIM_DIV_15 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 15 */
-#define LL_RCC_PLLSAIM_DIV_16 (RCC_PLLSAICFGR_PLLSAIM_4) /*!< PLLSAI division factor for PLLSAIM output by 16 */
-#define LL_RCC_PLLSAIM_DIV_17 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 17 */
-#define LL_RCC_PLLSAIM_DIV_18 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 18 */
-#define LL_RCC_PLLSAIM_DIV_19 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 19 */
-#define LL_RCC_PLLSAIM_DIV_20 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 20 */
-#define LL_RCC_PLLSAIM_DIV_21 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 21 */
-#define LL_RCC_PLLSAIM_DIV_22 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 22 */
-#define LL_RCC_PLLSAIM_DIV_23 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 23 */
-#define LL_RCC_PLLSAIM_DIV_24 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 24 */
-#define LL_RCC_PLLSAIM_DIV_25 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 25 */
-#define LL_RCC_PLLSAIM_DIV_26 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 26 */
-#define LL_RCC_PLLSAIM_DIV_27 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 27 */
-#define LL_RCC_PLLSAIM_DIV_28 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 28 */
-#define LL_RCC_PLLSAIM_DIV_29 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 29 */
-#define LL_RCC_PLLSAIM_DIV_30 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 30 */
-#define LL_RCC_PLLSAIM_DIV_31 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 31 */
-#define LL_RCC_PLLSAIM_DIV_32 (RCC_PLLSAICFGR_PLLSAIM_5) /*!< PLLSAI division factor for PLLSAIM output by 32 */
-#define LL_RCC_PLLSAIM_DIV_33 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 33 */
-#define LL_RCC_PLLSAIM_DIV_34 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 34 */
-#define LL_RCC_PLLSAIM_DIV_35 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 35 */
-#define LL_RCC_PLLSAIM_DIV_36 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 36 */
-#define LL_RCC_PLLSAIM_DIV_37 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 37 */
-#define LL_RCC_PLLSAIM_DIV_38 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 38 */
-#define LL_RCC_PLLSAIM_DIV_39 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 39 */
-#define LL_RCC_PLLSAIM_DIV_40 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 40 */
-#define LL_RCC_PLLSAIM_DIV_41 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 41 */
-#define LL_RCC_PLLSAIM_DIV_42 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 42 */
-#define LL_RCC_PLLSAIM_DIV_43 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 43 */
-#define LL_RCC_PLLSAIM_DIV_44 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 44 */
-#define LL_RCC_PLLSAIM_DIV_45 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 45 */
-#define LL_RCC_PLLSAIM_DIV_46 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 46 */
-#define LL_RCC_PLLSAIM_DIV_47 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 47 */
-#define LL_RCC_PLLSAIM_DIV_48 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4) /*!< PLLSAI division factor for PLLSAIM output by 48 */
-#define LL_RCC_PLLSAIM_DIV_49 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 49 */
-#define LL_RCC_PLLSAIM_DIV_50 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 50 */
-#define LL_RCC_PLLSAIM_DIV_51 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 51 */
-#define LL_RCC_PLLSAIM_DIV_52 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 52 */
-#define LL_RCC_PLLSAIM_DIV_53 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 53 */
-#define LL_RCC_PLLSAIM_DIV_54 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 54 */
-#define LL_RCC_PLLSAIM_DIV_55 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 55 */
-#define LL_RCC_PLLSAIM_DIV_56 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 56 */
-#define LL_RCC_PLLSAIM_DIV_57 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 57 */
-#define LL_RCC_PLLSAIM_DIV_58 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 58 */
-#define LL_RCC_PLLSAIM_DIV_59 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 59 */
-#define LL_RCC_PLLSAIM_DIV_60 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 60 */
-#define LL_RCC_PLLSAIM_DIV_61 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 61 */
-#define LL_RCC_PLLSAIM_DIV_62 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 62 */
-#define LL_RCC_PLLSAIM_DIV_63 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 63 */
-#else
-#define LL_RCC_PLLSAIM_DIV_2 LL_RCC_PLLM_DIV_2 /*!< PLLSAI division factor for PLLSAIM output by 2 */
-#define LL_RCC_PLLSAIM_DIV_3 LL_RCC_PLLM_DIV_3 /*!< PLLSAI division factor for PLLSAIM output by 3 */
-#define LL_RCC_PLLSAIM_DIV_4 LL_RCC_PLLM_DIV_4 /*!< PLLSAI division factor for PLLSAIM output by 4 */
-#define LL_RCC_PLLSAIM_DIV_5 LL_RCC_PLLM_DIV_5 /*!< PLLSAI division factor for PLLSAIM output by 5 */
-#define LL_RCC_PLLSAIM_DIV_6 LL_RCC_PLLM_DIV_6 /*!< PLLSAI division factor for PLLSAIM output by 6 */
-#define LL_RCC_PLLSAIM_DIV_7 LL_RCC_PLLM_DIV_7 /*!< PLLSAI division factor for PLLSAIM output by 7 */
-#define LL_RCC_PLLSAIM_DIV_8 LL_RCC_PLLM_DIV_8 /*!< PLLSAI division factor for PLLSAIM output by 8 */
-#define LL_RCC_PLLSAIM_DIV_9 LL_RCC_PLLM_DIV_9 /*!< PLLSAI division factor for PLLSAIM output by 9 */
-#define LL_RCC_PLLSAIM_DIV_10 LL_RCC_PLLM_DIV_10 /*!< PLLSAI division factor for PLLSAIM output by 10 */
-#define LL_RCC_PLLSAIM_DIV_11 LL_RCC_PLLM_DIV_11 /*!< PLLSAI division factor for PLLSAIM output by 11 */
-#define LL_RCC_PLLSAIM_DIV_12 LL_RCC_PLLM_DIV_12 /*!< PLLSAI division factor for PLLSAIM output by 12 */
-#define LL_RCC_PLLSAIM_DIV_13 LL_RCC_PLLM_DIV_13 /*!< PLLSAI division factor for PLLSAIM output by 13 */
-#define LL_RCC_PLLSAIM_DIV_14 LL_RCC_PLLM_DIV_14 /*!< PLLSAI division factor for PLLSAIM output by 14 */
-#define LL_RCC_PLLSAIM_DIV_15 LL_RCC_PLLM_DIV_15 /*!< PLLSAI division factor for PLLSAIM output by 15 */
-#define LL_RCC_PLLSAIM_DIV_16 LL_RCC_PLLM_DIV_16 /*!< PLLSAI division factor for PLLSAIM output by 16 */
-#define LL_RCC_PLLSAIM_DIV_17 LL_RCC_PLLM_DIV_17 /*!< PLLSAI division factor for PLLSAIM output by 17 */
-#define LL_RCC_PLLSAIM_DIV_18 LL_RCC_PLLM_DIV_18 /*!< PLLSAI division factor for PLLSAIM output by 18 */
-#define LL_RCC_PLLSAIM_DIV_19 LL_RCC_PLLM_DIV_19 /*!< PLLSAI division factor for PLLSAIM output by 19 */
-#define LL_RCC_PLLSAIM_DIV_20 LL_RCC_PLLM_DIV_20 /*!< PLLSAI division factor for PLLSAIM output by 20 */
-#define LL_RCC_PLLSAIM_DIV_21 LL_RCC_PLLM_DIV_21 /*!< PLLSAI division factor for PLLSAIM output by 21 */
-#define LL_RCC_PLLSAIM_DIV_22 LL_RCC_PLLM_DIV_22 /*!< PLLSAI division factor for PLLSAIM output by 22 */
-#define LL_RCC_PLLSAIM_DIV_23 LL_RCC_PLLM_DIV_23 /*!< PLLSAI division factor for PLLSAIM output by 23 */
-#define LL_RCC_PLLSAIM_DIV_24 LL_RCC_PLLM_DIV_24 /*!< PLLSAI division factor for PLLSAIM output by 24 */
-#define LL_RCC_PLLSAIM_DIV_25 LL_RCC_PLLM_DIV_25 /*!< PLLSAI division factor for PLLSAIM output by 25 */
-#define LL_RCC_PLLSAIM_DIV_26 LL_RCC_PLLM_DIV_26 /*!< PLLSAI division factor for PLLSAIM output by 26 */
-#define LL_RCC_PLLSAIM_DIV_27 LL_RCC_PLLM_DIV_27 /*!< PLLSAI division factor for PLLSAIM output by 27 */
-#define LL_RCC_PLLSAIM_DIV_28 LL_RCC_PLLM_DIV_28 /*!< PLLSAI division factor for PLLSAIM output by 28 */
-#define LL_RCC_PLLSAIM_DIV_29 LL_RCC_PLLM_DIV_29 /*!< PLLSAI division factor for PLLSAIM output by 29 */
-#define LL_RCC_PLLSAIM_DIV_30 LL_RCC_PLLM_DIV_30 /*!< PLLSAI division factor for PLLSAIM output by 30 */
-#define LL_RCC_PLLSAIM_DIV_31 LL_RCC_PLLM_DIV_31 /*!< PLLSAI division factor for PLLSAIM output by 31 */
-#define LL_RCC_PLLSAIM_DIV_32 LL_RCC_PLLM_DIV_32 /*!< PLLSAI division factor for PLLSAIM output by 32 */
-#define LL_RCC_PLLSAIM_DIV_33 LL_RCC_PLLM_DIV_33 /*!< PLLSAI division factor for PLLSAIM output by 33 */
-#define LL_RCC_PLLSAIM_DIV_34 LL_RCC_PLLM_DIV_34 /*!< PLLSAI division factor for PLLSAIM output by 34 */
-#define LL_RCC_PLLSAIM_DIV_35 LL_RCC_PLLM_DIV_35 /*!< PLLSAI division factor for PLLSAIM output by 35 */
-#define LL_RCC_PLLSAIM_DIV_36 LL_RCC_PLLM_DIV_36 /*!< PLLSAI division factor for PLLSAIM output by 36 */
-#define LL_RCC_PLLSAIM_DIV_37 LL_RCC_PLLM_DIV_37 /*!< PLLSAI division factor for PLLSAIM output by 37 */
-#define LL_RCC_PLLSAIM_DIV_38 LL_RCC_PLLM_DIV_38 /*!< PLLSAI division factor for PLLSAIM output by 38 */
-#define LL_RCC_PLLSAIM_DIV_39 LL_RCC_PLLM_DIV_39 /*!< PLLSAI division factor for PLLSAIM output by 39 */
-#define LL_RCC_PLLSAIM_DIV_40 LL_RCC_PLLM_DIV_40 /*!< PLLSAI division factor for PLLSAIM output by 40 */
-#define LL_RCC_PLLSAIM_DIV_41 LL_RCC_PLLM_DIV_41 /*!< PLLSAI division factor for PLLSAIM output by 41 */
-#define LL_RCC_PLLSAIM_DIV_42 LL_RCC_PLLM_DIV_42 /*!< PLLSAI division factor for PLLSAIM output by 42 */
-#define LL_RCC_PLLSAIM_DIV_43 LL_RCC_PLLM_DIV_43 /*!< PLLSAI division factor for PLLSAIM output by 43 */
-#define LL_RCC_PLLSAIM_DIV_44 LL_RCC_PLLM_DIV_44 /*!< PLLSAI division factor for PLLSAIM output by 44 */
-#define LL_RCC_PLLSAIM_DIV_45 LL_RCC_PLLM_DIV_45 /*!< PLLSAI division factor for PLLSAIM output by 45 */
-#define LL_RCC_PLLSAIM_DIV_46 LL_RCC_PLLM_DIV_46 /*!< PLLSAI division factor for PLLSAIM output by 46 */
-#define LL_RCC_PLLSAIM_DIV_47 LL_RCC_PLLM_DIV_47 /*!< PLLSAI division factor for PLLSAIM output by 47 */
-#define LL_RCC_PLLSAIM_DIV_48 LL_RCC_PLLM_DIV_48 /*!< PLLSAI division factor for PLLSAIM output by 48 */
-#define LL_RCC_PLLSAIM_DIV_49 LL_RCC_PLLM_DIV_49 /*!< PLLSAI division factor for PLLSAIM output by 49 */
-#define LL_RCC_PLLSAIM_DIV_50 LL_RCC_PLLM_DIV_50 /*!< PLLSAI division factor for PLLSAIM output by 50 */
-#define LL_RCC_PLLSAIM_DIV_51 LL_RCC_PLLM_DIV_51 /*!< PLLSAI division factor for PLLSAIM output by 51 */
-#define LL_RCC_PLLSAIM_DIV_52 LL_RCC_PLLM_DIV_52 /*!< PLLSAI division factor for PLLSAIM output by 52 */
-#define LL_RCC_PLLSAIM_DIV_53 LL_RCC_PLLM_DIV_53 /*!< PLLSAI division factor for PLLSAIM output by 53 */
-#define LL_RCC_PLLSAIM_DIV_54 LL_RCC_PLLM_DIV_54 /*!< PLLSAI division factor for PLLSAIM output by 54 */
-#define LL_RCC_PLLSAIM_DIV_55 LL_RCC_PLLM_DIV_55 /*!< PLLSAI division factor for PLLSAIM output by 55 */
-#define LL_RCC_PLLSAIM_DIV_56 LL_RCC_PLLM_DIV_56 /*!< PLLSAI division factor for PLLSAIM output by 56 */
-#define LL_RCC_PLLSAIM_DIV_57 LL_RCC_PLLM_DIV_57 /*!< PLLSAI division factor for PLLSAIM output by 57 */
-#define LL_RCC_PLLSAIM_DIV_58 LL_RCC_PLLM_DIV_58 /*!< PLLSAI division factor for PLLSAIM output by 58 */
-#define LL_RCC_PLLSAIM_DIV_59 LL_RCC_PLLM_DIV_59 /*!< PLLSAI division factor for PLLSAIM output by 59 */
-#define LL_RCC_PLLSAIM_DIV_60 LL_RCC_PLLM_DIV_60 /*!< PLLSAI division factor for PLLSAIM output by 60 */
-#define LL_RCC_PLLSAIM_DIV_61 LL_RCC_PLLM_DIV_61 /*!< PLLSAI division factor for PLLSAIM output by 61 */
-#define LL_RCC_PLLSAIM_DIV_62 LL_RCC_PLLM_DIV_62 /*!< PLLSAI division factor for PLLSAIM output by 62 */
-#define LL_RCC_PLLSAIM_DIV_63 LL_RCC_PLLM_DIV_63 /*!< PLLSAI division factor for PLLSAIM output by 63 */
-#endif /* RCC_PLLSAICFGR_PLLSAIM */
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EC_PLLSAIQ PLLSAIQ division factor (PLLSAIQ)
- * @{
- */
-#define LL_RCC_PLLSAIQ_DIV_2 RCC_PLLSAICFGR_PLLSAIQ_1 /*!< PLLSAI division factor for PLLSAIQ output by 2 */
-#define LL_RCC_PLLSAIQ_DIV_3 (RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 3 */
-#define LL_RCC_PLLSAIQ_DIV_4 RCC_PLLSAICFGR_PLLSAIQ_2 /*!< PLLSAI division factor for PLLSAIQ output by 4 */
-#define LL_RCC_PLLSAIQ_DIV_5 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 5 */
-#define LL_RCC_PLLSAIQ_DIV_6 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 6 */
-#define LL_RCC_PLLSAIQ_DIV_7 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 7 */
-#define LL_RCC_PLLSAIQ_DIV_8 RCC_PLLSAICFGR_PLLSAIQ_3 /*!< PLLSAI division factor for PLLSAIQ output by 8 */
-#define LL_RCC_PLLSAIQ_DIV_9 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 9 */
-#define LL_RCC_PLLSAIQ_DIV_10 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 10 */
-#define LL_RCC_PLLSAIQ_DIV_11 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 11 */
-#define LL_RCC_PLLSAIQ_DIV_12 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2) /*!< PLLSAI division factor for PLLSAIQ output by 12 */
-#define LL_RCC_PLLSAIQ_DIV_13 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 13 */
-#define LL_RCC_PLLSAIQ_DIV_14 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 14 */
-#define LL_RCC_PLLSAIQ_DIV_15 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 15 */
-/**
- * @}
- */
-
-#if defined(RCC_DCKCFGR_PLLSAIDIVQ)
-/** @defgroup RCC_LL_EC_PLLSAIDIVQ PLLSAIDIVQ division factor (PLLSAIDIVQ)
- * @{
- */
-#define LL_RCC_PLLSAIDIVQ_DIV_1 0x00000000U /*!< PLLSAI division factor for PLLSAIDIVQ output by 1 */
-#define LL_RCC_PLLSAIDIVQ_DIV_2 RCC_DCKCFGR_PLLSAIDIVQ_0 /*!< PLLSAI division factor for PLLSAIDIVQ output by 2 */
-#define LL_RCC_PLLSAIDIVQ_DIV_3 RCC_DCKCFGR_PLLSAIDIVQ_1 /*!< PLLSAI division factor for PLLSAIDIVQ output by 3 */
-#define LL_RCC_PLLSAIDIVQ_DIV_4 (RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 4 */
-#define LL_RCC_PLLSAIDIVQ_DIV_5 RCC_DCKCFGR_PLLSAIDIVQ_2 /*!< PLLSAI division factor for PLLSAIDIVQ output by 5 */
-#define LL_RCC_PLLSAIDIVQ_DIV_6 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 6 */
-#define LL_RCC_PLLSAIDIVQ_DIV_7 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 7 */
-#define LL_RCC_PLLSAIDIVQ_DIV_8 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 8 */
-#define LL_RCC_PLLSAIDIVQ_DIV_9 RCC_DCKCFGR_PLLSAIDIVQ_3 /*!< PLLSAI division factor for PLLSAIDIVQ output by 9 */
-#define LL_RCC_PLLSAIDIVQ_DIV_10 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 10 */
-#define LL_RCC_PLLSAIDIVQ_DIV_11 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 11 */
-#define LL_RCC_PLLSAIDIVQ_DIV_12 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 12 */
-#define LL_RCC_PLLSAIDIVQ_DIV_13 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 13 */
-#define LL_RCC_PLLSAIDIVQ_DIV_14 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 14 */
-#define LL_RCC_PLLSAIDIVQ_DIV_15 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 15 */
-#define LL_RCC_PLLSAIDIVQ_DIV_16 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 16 */
-#define LL_RCC_PLLSAIDIVQ_DIV_17 RCC_DCKCFGR_PLLSAIDIVQ_4 /*!< PLLSAI division factor for PLLSAIDIVQ output by 17 */
-#define LL_RCC_PLLSAIDIVQ_DIV_18 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 18 */
-#define LL_RCC_PLLSAIDIVQ_DIV_19 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 19 */
-#define LL_RCC_PLLSAIDIVQ_DIV_20 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 20 */
-#define LL_RCC_PLLSAIDIVQ_DIV_21 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 21 */
-#define LL_RCC_PLLSAIDIVQ_DIV_22 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 22 */
-#define LL_RCC_PLLSAIDIVQ_DIV_23 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 23 */
-#define LL_RCC_PLLSAIDIVQ_DIV_24 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 24 */
-#define LL_RCC_PLLSAIDIVQ_DIV_25 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3) /*!< PLLSAI division factor for PLLSAIDIVQ output by 25 */
-#define LL_RCC_PLLSAIDIVQ_DIV_26 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 26 */
-#define LL_RCC_PLLSAIDIVQ_DIV_27 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 27 */
-#define LL_RCC_PLLSAIDIVQ_DIV_28 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 28 */
-#define LL_RCC_PLLSAIDIVQ_DIV_29 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 29 */
-#define LL_RCC_PLLSAIDIVQ_DIV_30 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 30 */
-#define LL_RCC_PLLSAIDIVQ_DIV_31 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 31 */
-#define LL_RCC_PLLSAIDIVQ_DIV_32 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 32 */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_PLLSAIDIVQ */
-
-#if defined(RCC_PLLSAICFGR_PLLSAIR)
-/** @defgroup RCC_LL_EC_PLLSAIR PLLSAIR division factor (PLLSAIR)
- * @{
- */
-#define LL_RCC_PLLSAIR_DIV_2 RCC_PLLSAICFGR_PLLSAIR_1 /*!< PLLSAI division factor for PLLSAIR output by 2 */
-#define LL_RCC_PLLSAIR_DIV_3 (RCC_PLLSAICFGR_PLLSAIR_1 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 3 */
-#define LL_RCC_PLLSAIR_DIV_4 RCC_PLLSAICFGR_PLLSAIR_2 /*!< PLLSAI division factor for PLLSAIR output by 4 */
-#define LL_RCC_PLLSAIR_DIV_5 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 5 */
-#define LL_RCC_PLLSAIR_DIV_6 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_1) /*!< PLLSAI division factor for PLLSAIR output by 6 */
-#define LL_RCC_PLLSAIR_DIV_7 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_1 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 7 */
-/**
- * @}
- */
-#endif /* RCC_PLLSAICFGR_PLLSAIR */
-
-#if defined(RCC_DCKCFGR_PLLSAIDIVR)
-/** @defgroup RCC_LL_EC_PLLSAIDIVR PLLSAIDIVR division factor (PLLSAIDIVR)
- * @{
- */
-#define LL_RCC_PLLSAIDIVR_DIV_2 0x00000000U /*!< PLLSAI division factor for PLLSAIDIVR output by 2 */
-#define LL_RCC_PLLSAIDIVR_DIV_4 RCC_DCKCFGR_PLLSAIDIVR_0 /*!< PLLSAI division factor for PLLSAIDIVR output by 4 */
-#define LL_RCC_PLLSAIDIVR_DIV_8 RCC_DCKCFGR_PLLSAIDIVR_1 /*!< PLLSAI division factor for PLLSAIDIVR output by 8 */
-#define LL_RCC_PLLSAIDIVR_DIV_16 (RCC_DCKCFGR_PLLSAIDIVR_1 | RCC_DCKCFGR_PLLSAIDIVR_0) /*!< PLLSAI division factor for PLLSAIDIVR output by 16 */
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_PLLSAIDIVR */
-
-#if defined(RCC_PLLSAICFGR_PLLSAIP)
-/** @defgroup RCC_LL_EC_PLLSAIP PLLSAIP division factor (PLLSAIP)
- * @{
- */
-#define LL_RCC_PLLSAIP_DIV_2 0x00000000U /*!< PLLSAI division factor for PLLSAIP output by 2 */
-#define LL_RCC_PLLSAIP_DIV_4 RCC_PLLSAICFGR_PLLSAIP_0 /*!< PLLSAI division factor for PLLSAIP output by 4 */
-#define LL_RCC_PLLSAIP_DIV_6 RCC_PLLSAICFGR_PLLSAIP_1 /*!< PLLSAI division factor for PLLSAIP output by 6 */
-#define LL_RCC_PLLSAIP_DIV_8 (RCC_PLLSAICFGR_PLLSAIP_1 | RCC_PLLSAICFGR_PLLSAIP_0) /*!< PLLSAI division factor for PLLSAIP output by 8 */
-/**
- * @}
- */
-#endif /* RCC_PLLSAICFGR_PLLSAIP */
-#endif /* RCC_PLLSAI_SUPPORT */
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
- * @{
- */
-
-/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in RCC register
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in RCC register
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
- * @{
- */
-
-/**
- * @brief Helper macro to calculate the PLLCLK frequency on system domain
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLP__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLP_DIV_2
- * @arg @ref LL_RCC_PLLP_DIV_4
- * @arg @ref LL_RCC_PLLP_DIV_6
- * @arg @ref LL_RCC_PLLP_DIV_8
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos ) + 1U) * 2U))
-
-#if defined(RCC_PLLR_SYSCLK_SUPPORT)
-/**
- * @brief Helper macro to calculate the PLLRCLK frequency on system domain
- * @note ex: @ref __LL_RCC_CALC_PLLRCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50 and 432
- * @param __PLLR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLRCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
-
-#endif /* RCC_PLLR_SYSCLK_SUPPORT */
-
-/**
- * @brief Helper macro to calculate the PLLCLK frequency used on 48M domain
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLQ__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLQ_DIV_2
- * @arg @ref LL_RCC_PLLQ_DIV_3
- * @arg @ref LL_RCC_PLLQ_DIV_4
- * @arg @ref LL_RCC_PLLQ_DIV_5
- * @arg @ref LL_RCC_PLLQ_DIV_6
- * @arg @ref LL_RCC_PLLQ_DIV_7
- * @arg @ref LL_RCC_PLLQ_DIV_8
- * @arg @ref LL_RCC_PLLQ_DIV_9
- * @arg @ref LL_RCC_PLLQ_DIV_10
- * @arg @ref LL_RCC_PLLQ_DIV_11
- * @arg @ref LL_RCC_PLLQ_DIV_12
- * @arg @ref LL_RCC_PLLQ_DIV_13
- * @arg @ref LL_RCC_PLLQ_DIV_14
- * @arg @ref LL_RCC_PLLQ_DIV_15
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLCLK_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos ))
-
-#if defined(DSI)
-/**
- * @brief Helper macro to calculate the PLLCLK frequency used on DSI
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_DSI_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50 and 432
- * @param __PLLR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLCLK_DSI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
-#endif /* DSI */
-
-#if defined(RCC_PLLR_I2S_CLKSOURCE_SUPPORT)
-/**
- * @brief Helper macro to calculate the PLLCLK frequency used on I2S
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_I2S_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50 and 432
- * @param __PLLR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLCLK_I2S_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
-#endif /* RCC_PLLR_I2S_CLKSOURCE_SUPPORT */
-
-#if defined(SPDIFRX)
-/**
- * @brief Helper macro to calculate the PLLCLK frequency used on SPDIFRX
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_SPDIFRX_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50 and 432
- * @param __PLLR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval PLL clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLCLK_SPDIFRX_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
-#endif /* SPDIFRX */
-
-#if defined(RCC_PLLCFGR_PLLR)
-#if defined(SAI1)
-/**
- * @brief Helper macro to calculate the PLLCLK frequency used on SAI
- * @note ex: @ref __LL_RCC_CALC_PLLCLK_SAI_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
- * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR (), @ref LL_RCC_PLL_GetDIVR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param __PLLN__ Between 50 and 432
- * @param __PLLR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @param __PLLDIVR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLDIVR_DIV_1 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_7 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_8 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_9 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_10 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_11 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_12 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_13 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_14 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_15 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_16 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_17 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_18 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_19 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_20 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_21 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_22 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_23 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_24 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_25 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_26 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_27 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_28 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_29 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_30 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_31 (*)
- *
- * (*) value not defined in all devices.
- * @retval PLL clock frequency (in Hz)
- */
-#if defined(RCC_DCKCFGR_PLLDIVR)
-#define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__, __PLLDIVR__) (((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos )) / ((__PLLDIVR__) >> RCC_DCKCFGR_PLLDIVR_Pos ))
-#else
-#define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
- ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
-#endif /* RCC_DCKCFGR_PLLDIVR */
-#endif /* SAI1 */
-#endif /* RCC_PLLCFGR_PLLR */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Helper macro to calculate the PLLSAI frequency used for SAI domain
- * @note ex: @ref __LL_RCC_CALC_PLLSAI_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
- * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetQ (), @ref LL_RCC_PLLSAI_GetDIVQ ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param __PLLSAIN__ Between 49/50(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLSAIQ__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIQ_DIV_15
- * @param __PLLSAIDIVQ__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
- * @retval PLLSAI clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLSAI_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIQ__, __PLLSAIDIVQ__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
- (((__PLLSAIQ__) >> RCC_PLLSAICFGR_PLLSAIQ_Pos) * (((__PLLSAIDIVQ__) >> RCC_DCKCFGR_PLLSAIDIVQ_Pos) + 1U)))
-
-#if defined(RCC_PLLSAICFGR_PLLSAIP)
-/**
- * @brief Helper macro to calculate the PLLSAI frequency used on 48Mhz domain
- * @note ex: @ref __LL_RCC_CALC_PLLSAI_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
- * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetP ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param __PLLSAIN__ Between 50 and 432
- * @param __PLLSAIP__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIP_DIV_2
- * @arg @ref LL_RCC_PLLSAIP_DIV_4
- * @arg @ref LL_RCC_PLLSAIP_DIV_6
- * @arg @ref LL_RCC_PLLSAIP_DIV_8
- * @retval PLLSAI clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLSAI_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIP__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
- ((((__PLLSAIP__) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) * 2U))
-#endif /* RCC_PLLSAICFGR_PLLSAIP */
-
-#if defined(LTDC)
-/**
- * @brief Helper macro to calculate the PLLSAI frequency used for LTDC domain
- * @note ex: @ref __LL_RCC_CALC_PLLSAI_LTDC_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
- * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetR (), @ref LL_RCC_PLLSAI_GetDIVR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param __PLLSAIN__ Between 49/50(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLSAIR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIR_DIV_2
- * @arg @ref LL_RCC_PLLSAIR_DIV_3
- * @arg @ref LL_RCC_PLLSAIR_DIV_4
- * @arg @ref LL_RCC_PLLSAIR_DIV_5
- * @arg @ref LL_RCC_PLLSAIR_DIV_6
- * @arg @ref LL_RCC_PLLSAIR_DIV_7
- * @param __PLLSAIDIVR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
- * @retval PLLSAI clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLSAI_LTDC_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIR__, __PLLSAIDIVR__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
- (((__PLLSAIR__) >> RCC_PLLSAICFGR_PLLSAIR_Pos) * (aRCC_PLLSAIDIVRPrescTable[(__PLLSAIDIVR__) >> RCC_DCKCFGR_PLLSAIDIVR_Pos])))
-#endif /* LTDC */
-#endif /* RCC_PLLSAI_SUPPORT */
-
-#if defined(RCC_PLLI2S_SUPPORT)
-#if defined(RCC_DCKCFGR_PLLI2SDIVQ) || defined(RCC_DCKCFGR_PLLI2SDIVR)
-/**
- * @brief Helper macro to calculate the PLLI2S frequency used for SAI domain
- * @note ex: @ref __LL_RCC_CALC_PLLI2S_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
- * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ (), @ref LL_RCC_PLLI2S_GetDIVQ ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param __PLLI2SN__ Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLI2SQ_R__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SQ_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_7 (*)
- *
- * (*) value not defined in all devices.
- * @param __PLLI2SDIVQ_R__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31 (*)
- *
- * (*) value not defined in all devices.
- * @retval PLLI2S clock frequency (in Hz)
- */
-#if defined(RCC_DCKCFGR_PLLI2SDIVQ)
-#define __LL_RCC_CALC_PLLI2S_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ_R__, __PLLI2SDIVQ_R__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
- (((__PLLI2SQ_R__) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos) * (((__PLLI2SDIVQ_R__) >> RCC_DCKCFGR_PLLI2SDIVQ_Pos) + 1U)))
-#else
-#define __LL_RCC_CALC_PLLI2S_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ_R__, __PLLI2SDIVQ_R__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
- (((__PLLI2SQ_R__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos) * ((__PLLI2SDIVQ_R__) >> RCC_DCKCFGR_PLLI2SDIVR_Pos)))
-
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ */
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ || RCC_DCKCFGR_PLLI2SDIVR */
-
-#if defined(SPDIFRX)
-/**
- * @brief Helper macro to calculate the PLLI2S frequency used on SPDIFRX domain
- * @note ex: @ref __LL_RCC_CALC_PLLI2S_SPDIFRX_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
- * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetP ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param __PLLI2SN__ Between 50 and 432
- * @param __PLLI2SP__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SP_DIV_2
- * @arg @ref LL_RCC_PLLI2SP_DIV_4
- * @arg @ref LL_RCC_PLLI2SP_DIV_6
- * @arg @ref LL_RCC_PLLI2SP_DIV_8
- * @retval PLLI2S clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLI2S_SPDIFRX_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SP__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
- ((((__PLLI2SP__) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) * 2U))
-
-#endif /* SPDIFRX */
-
-/**
- * @brief Helper macro to calculate the PLLI2S frequency used for I2S domain
- * @note ex: @ref __LL_RCC_CALC_PLLI2S_I2S_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
- * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetR ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param __PLLI2SN__ Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param __PLLI2SR__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SR_DIV_2
- * @arg @ref LL_RCC_PLLI2SR_DIV_3
- * @arg @ref LL_RCC_PLLI2SR_DIV_4
- * @arg @ref LL_RCC_PLLI2SR_DIV_5
- * @arg @ref LL_RCC_PLLI2SR_DIV_6
- * @arg @ref LL_RCC_PLLI2SR_DIV_7
- * @retval PLLI2S clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLI2S_I2S_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SR__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
- ((__PLLI2SR__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos))
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
-/**
- * @brief Helper macro to calculate the PLLI2S frequency used for 48Mhz domain
- * @note ex: @ref __LL_RCC_CALC_PLLI2S_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
- * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ ());
- * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
- * @param __PLLM__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param __PLLI2SN__ Between 50 and 432
- * @param __PLLI2SQ__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SQ_DIV_2
- * @arg @ref LL_RCC_PLLI2SQ_DIV_3
- * @arg @ref LL_RCC_PLLI2SQ_DIV_4
- * @arg @ref LL_RCC_PLLI2SQ_DIV_5
- * @arg @ref LL_RCC_PLLI2SQ_DIV_6
- * @arg @ref LL_RCC_PLLI2SQ_DIV_7
- * @arg @ref LL_RCC_PLLI2SQ_DIV_8
- * @arg @ref LL_RCC_PLLI2SQ_DIV_9
- * @arg @ref LL_RCC_PLLI2SQ_DIV_10
- * @arg @ref LL_RCC_PLLI2SQ_DIV_11
- * @arg @ref LL_RCC_PLLI2SQ_DIV_12
- * @arg @ref LL_RCC_PLLI2SQ_DIV_13
- * @arg @ref LL_RCC_PLLI2SQ_DIV_14
- * @arg @ref LL_RCC_PLLI2SQ_DIV_15
- * @retval PLLI2S clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PLLI2S_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
- ((__PLLI2SQ__) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos))
-
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
-#endif /* RCC_PLLI2S_SUPPORT */
-
-/**
- * @brief Helper macro to calculate the HCLK frequency
- * @param __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
- * @param __AHBPRESCALER__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_SYSCLK_DIV_1
- * @arg @ref LL_RCC_SYSCLK_DIV_2
- * @arg @ref LL_RCC_SYSCLK_DIV_4
- * @arg @ref LL_RCC_SYSCLK_DIV_8
- * @arg @ref LL_RCC_SYSCLK_DIV_16
- * @arg @ref LL_RCC_SYSCLK_DIV_64
- * @arg @ref LL_RCC_SYSCLK_DIV_128
- * @arg @ref LL_RCC_SYSCLK_DIV_256
- * @arg @ref LL_RCC_SYSCLK_DIV_512
- * @retval HCLK clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos])
-
-/**
- * @brief Helper macro to calculate the PCLK1 frequency (ABP1)
- * @param __HCLKFREQ__ HCLK frequency
- * @param __APB1PRESCALER__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_APB1_DIV_1
- * @arg @ref LL_RCC_APB1_DIV_2
- * @arg @ref LL_RCC_APB1_DIV_4
- * @arg @ref LL_RCC_APB1_DIV_8
- * @arg @ref LL_RCC_APB1_DIV_16
- * @retval PCLK1 clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >> RCC_CFGR_PPRE1_Pos])
-
-/**
- * @brief Helper macro to calculate the PCLK2 frequency (ABP2)
- * @param __HCLKFREQ__ HCLK frequency
- * @param __APB2PRESCALER__ This parameter can be one of the following values:
- * @arg @ref LL_RCC_APB2_DIV_1
- * @arg @ref LL_RCC_APB2_DIV_2
- * @arg @ref LL_RCC_APB2_DIV_4
- * @arg @ref LL_RCC_APB2_DIV_8
- * @arg @ref LL_RCC_APB2_DIV_16
- * @retval PCLK2 clock frequency (in Hz)
- */
-#define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >> RCC_CFGR_PPRE2_Pos])
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
- * @{
- */
-
-/** @defgroup RCC_LL_EF_HSE HSE
- * @{
- */
-
-/**
- * @brief Enable the Clock Security System.
- * @rmtoll CR CSSON LL_RCC_HSE_EnableCSS
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
-{
- SET_BIT(RCC->CR, RCC_CR_CSSON);
-}
-
-/**
- * @brief Enable HSE external oscillator (HSE Bypass)
- * @rmtoll CR HSEBYP LL_RCC_HSE_EnableBypass
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
-{
- SET_BIT(RCC->CR, RCC_CR_HSEBYP);
-}
-
-/**
- * @brief Disable HSE external oscillator (HSE Bypass)
- * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
-}
-
-/**
- * @brief Enable HSE crystal oscillator (HSE ON)
- * @rmtoll CR HSEON LL_RCC_HSE_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSE_Enable(void)
-{
- SET_BIT(RCC->CR, RCC_CR_HSEON);
-}
-
-/**
- * @brief Disable HSE crystal oscillator (HSE ON)
- * @rmtoll CR HSEON LL_RCC_HSE_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSE_Disable(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
-}
-
-/**
- * @brief Check if HSE oscillator Ready
- * @rmtoll CR HSERDY LL_RCC_HSE_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
-{
- return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_HSI HSI
- * @{
- */
-
-/**
- * @brief Enable HSI oscillator
- * @rmtoll CR HSION LL_RCC_HSI_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSI_Enable(void)
-{
- SET_BIT(RCC->CR, RCC_CR_HSION);
-}
-
-/**
- * @brief Disable HSI oscillator
- * @rmtoll CR HSION LL_RCC_HSI_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSI_Disable(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_HSION);
-}
-
-/**
- * @brief Check if HSI clock is ready
- * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
-{
- return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
-}
-
-/**
- * @brief Get HSI Calibration value
- * @note When HSITRIM is written, HSICAL is updated with the sum of
- * HSITRIM and the factory trim value
- * @rmtoll CR HSICAL LL_RCC_HSI_GetCalibration
- * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
- */
-__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
-{
- return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSICAL) >> RCC_CR_HSICAL_Pos);
-}
-
-/**
- * @brief Set HSI Calibration trimming
- * @note user-programmable trimming value that is added to the HSICAL
- * @note Default value is 16, which, when added to the HSICAL value,
- * should trim the HSI to 16 MHz +/- 1 %
- * @rmtoll CR HSITRIM LL_RCC_HSI_SetCalibTrimming
- * @param Value Between Min_Data = 0 and Max_Data = 31
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
-{
- MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, Value << RCC_CR_HSITRIM_Pos);
-}
-
-/**
- * @brief Get HSI Calibration trimming
- * @rmtoll CR HSITRIM LL_RCC_HSI_GetCalibTrimming
- * @retval Between Min_Data = 0 and Max_Data = 31
- */
-__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
-{
- return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_LSE LSE
- * @{
- */
-
-/**
- * @brief Enable Low Speed External (LSE) crystal.
- * @rmtoll BDCR LSEON LL_RCC_LSE_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_Enable(void)
-{
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
-}
-
-/**
- * @brief Disable Low Speed External (LSE) crystal.
- * @rmtoll BDCR LSEON LL_RCC_LSE_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_Disable(void)
-{
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
-}
-
-/**
- * @brief Enable external clock source (LSE bypass).
- * @rmtoll BDCR LSEBYP LL_RCC_LSE_EnableBypass
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
-{
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
-}
-
-/**
- * @brief Disable external clock source (LSE bypass).
- * @rmtoll BDCR LSEBYP LL_RCC_LSE_DisableBypass
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
-{
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
-}
-
-/**
- * @brief Check if LSE oscillator Ready
- * @rmtoll BDCR LSERDY LL_RCC_LSE_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
-{
- return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY));
-}
-
-#if defined(RCC_BDCR_LSEMOD)
-/**
- * @brief Enable LSE high drive mode.
- * @note LSE high drive mode can be enabled only when the LSE clock is disabled
- * @rmtoll BDCR LSEMOD LL_RCC_LSE_EnableHighDriveMode
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_EnableHighDriveMode(void)
-{
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
-}
-
-/**
- * @brief Disable LSE high drive mode.
- * @note LSE high drive mode can be disabled only when the LSE clock is disabled
- * @rmtoll BDCR LSEMOD LL_RCC_LSE_DisableHighDriveMode
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSE_DisableHighDriveMode(void)
-{
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
-}
-#endif /* RCC_BDCR_LSEMOD */
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_LSI LSI
- * @{
- */
-
-/**
- * @brief Enable LSI Oscillator
- * @rmtoll CSR LSION LL_RCC_LSI_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSI_Enable(void)
-{
- SET_BIT(RCC->CSR, RCC_CSR_LSION);
-}
-
-/**
- * @brief Disable LSI Oscillator
- * @rmtoll CSR LSION LL_RCC_LSI_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_LSI_Disable(void)
-{
- CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
-}
-
-/**
- * @brief Check if LSI is Ready
- * @rmtoll CSR LSIRDY LL_RCC_LSI_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_System System
- * @{
- */
-
-/**
- * @brief Configure the system clock source
- * @rmtoll CFGR SW LL_RCC_SetSysClkSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
- * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
- * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
- * @arg @ref LL_RCC_SYS_CLKSOURCE_PLLR (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
-{
- MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
-}
-
-/**
- * @brief Get the system clock source
- * @rmtoll CFGR SWS LL_RCC_GetSysClkSource
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
- * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
- * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
- * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLLR (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
-{
- return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
-}
-
-/**
- * @brief Set AHB prescaler
- * @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler
- * @param Prescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_SYSCLK_DIV_1
- * @arg @ref LL_RCC_SYSCLK_DIV_2
- * @arg @ref LL_RCC_SYSCLK_DIV_4
- * @arg @ref LL_RCC_SYSCLK_DIV_8
- * @arg @ref LL_RCC_SYSCLK_DIV_16
- * @arg @ref LL_RCC_SYSCLK_DIV_64
- * @arg @ref LL_RCC_SYSCLK_DIV_128
- * @arg @ref LL_RCC_SYSCLK_DIV_256
- * @arg @ref LL_RCC_SYSCLK_DIV_512
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
-{
- MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
-}
-
-/**
- * @brief Set APB1 prescaler
- * @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler
- * @param Prescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_APB1_DIV_1
- * @arg @ref LL_RCC_APB1_DIV_2
- * @arg @ref LL_RCC_APB1_DIV_4
- * @arg @ref LL_RCC_APB1_DIV_8
- * @arg @ref LL_RCC_APB1_DIV_16
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
-{
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
-}
-
-/**
- * @brief Set APB2 prescaler
- * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler
- * @param Prescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_APB2_DIV_1
- * @arg @ref LL_RCC_APB2_DIV_2
- * @arg @ref LL_RCC_APB2_DIV_4
- * @arg @ref LL_RCC_APB2_DIV_8
- * @arg @ref LL_RCC_APB2_DIV_16
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
-{
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
-}
-
-/**
- * @brief Get AHB prescaler
- * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SYSCLK_DIV_1
- * @arg @ref LL_RCC_SYSCLK_DIV_2
- * @arg @ref LL_RCC_SYSCLK_DIV_4
- * @arg @ref LL_RCC_SYSCLK_DIV_8
- * @arg @ref LL_RCC_SYSCLK_DIV_16
- * @arg @ref LL_RCC_SYSCLK_DIV_64
- * @arg @ref LL_RCC_SYSCLK_DIV_128
- * @arg @ref LL_RCC_SYSCLK_DIV_256
- * @arg @ref LL_RCC_SYSCLK_DIV_512
- */
-__STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
-{
- return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
-}
-
-/**
- * @brief Get APB1 prescaler
- * @rmtoll CFGR PPRE1 LL_RCC_GetAPB1Prescaler
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_APB1_DIV_1
- * @arg @ref LL_RCC_APB1_DIV_2
- * @arg @ref LL_RCC_APB1_DIV_4
- * @arg @ref LL_RCC_APB1_DIV_8
- * @arg @ref LL_RCC_APB1_DIV_16
- */
-__STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
-{
- return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
-}
-
-/**
- * @brief Get APB2 prescaler
- * @rmtoll CFGR PPRE2 LL_RCC_GetAPB2Prescaler
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_APB2_DIV_1
- * @arg @ref LL_RCC_APB2_DIV_2
- * @arg @ref LL_RCC_APB2_DIV_4
- * @arg @ref LL_RCC_APB2_DIV_8
- * @arg @ref LL_RCC_APB2_DIV_16
- */
-__STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
-{
- return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_MCO MCO
- * @{
- */
-
-#if defined(RCC_CFGR_MCO1EN)
-/**
- * @brief Enable MCO1 output
- * @rmtoll CFGR RCC_CFGR_MCO1EN LL_RCC_MCO1_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_MCO1_Enable(void)
-{
- SET_BIT(RCC->CFGR, RCC_CFGR_MCO1EN);
-}
-
-/**
- * @brief Disable MCO1 output
- * @rmtoll CFGR RCC_CFGR_MCO1EN LL_RCC_MCO1_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_MCO1_Disable(void)
-{
- CLEAR_BIT(RCC->CFGR, RCC_CFGR_MCO1EN);
-}
-#endif /* RCC_CFGR_MCO1EN */
-
-#if defined(RCC_CFGR_MCO2EN)
-/**
- * @brief Enable MCO2 output
- * @rmtoll CFGR RCC_CFGR_MCO2EN LL_RCC_MCO2_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_MCO2_Enable(void)
-{
- SET_BIT(RCC->CFGR, RCC_CFGR_MCO2EN);
-}
-
-/**
- * @brief Disable MCO2 output
- * @rmtoll CFGR RCC_CFGR_MCO2EN LL_RCC_MCO2_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_MCO2_Disable(void)
-{
- CLEAR_BIT(RCC->CFGR, RCC_CFGR_MCO2EN);
-}
-#endif /* RCC_CFGR_MCO2EN */
-
-/**
- * @brief Configure MCOx
- * @rmtoll CFGR MCO1 LL_RCC_ConfigMCO\n
- * CFGR MCO1PRE LL_RCC_ConfigMCO\n
- * CFGR MCO2 LL_RCC_ConfigMCO\n
- * CFGR MCO2PRE LL_RCC_ConfigMCO
- * @param MCOxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_MCO1SOURCE_HSI
- * @arg @ref LL_RCC_MCO1SOURCE_LSE
- * @arg @ref LL_RCC_MCO1SOURCE_HSE
- * @arg @ref LL_RCC_MCO1SOURCE_PLLCLK
- * @arg @ref LL_RCC_MCO2SOURCE_SYSCLK
- * @arg @ref LL_RCC_MCO2SOURCE_PLLI2S
- * @arg @ref LL_RCC_MCO2SOURCE_HSE
- * @arg @ref LL_RCC_MCO2SOURCE_PLLCLK
- * @param MCOxPrescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_MCO1_DIV_1
- * @arg @ref LL_RCC_MCO1_DIV_2
- * @arg @ref LL_RCC_MCO1_DIV_3
- * @arg @ref LL_RCC_MCO1_DIV_4
- * @arg @ref LL_RCC_MCO1_DIV_5
- * @arg @ref LL_RCC_MCO2_DIV_1
- * @arg @ref LL_RCC_MCO2_DIV_2
- * @arg @ref LL_RCC_MCO2_DIV_3
- * @arg @ref LL_RCC_MCO2_DIV_4
- * @arg @ref LL_RCC_MCO2_DIV_5
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
-{
- MODIFY_REG(RCC->CFGR, (MCOxSource & 0xFFFF0000U) | (MCOxPrescaler & 0xFFFF0000U), (MCOxSource << 16U) | (MCOxPrescaler << 16U));
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
- * @{
- */
-#if defined(FMPI2C1)
-/**
- * @brief Configure FMPI2C clock source
- * @rmtoll DCKCFGR2 FMPI2C1SEL LL_RCC_SetFMPI2CClockSource
- * @param FMPI2CxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_PCLK1
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_HSI
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetFMPI2CClockSource(uint32_t FMPI2CxSource)
-{
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL, FMPI2CxSource);
-}
-#endif /* FMPI2C1 */
-
-#if defined(LPTIM1)
-/**
- * @brief Configure LPTIMx clock source
- * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_SetLPTIMClockSource
- * @param LPTIMxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource)
-{
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL, LPTIMxSource);
-}
-#endif /* LPTIM1 */
-
-#if defined(SAI1)
-/**
- * @brief Configure SAIx clock source
- * @rmtoll DCKCFGR SAI1SRC LL_RCC_SetSAIClockSource\n
- * DCKCFGR SAI2SRC LL_RCC_SetSAIClockSource\n
- * DCKCFGR SAI1ASRC LL_RCC_SetSAIClockSource\n
- * DCKCFGR SAI1BSRC LL_RCC_SetSAIClockSource
- * @param SAIxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetSAIClockSource(uint32_t SAIxSource)
-{
- MODIFY_REG(RCC->DCKCFGR, (SAIxSource & 0xFFFF0000U), (SAIxSource << 16U));
-}
-#endif /* SAI1 */
-
-#if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
-/**
- * @brief Configure SDIO clock source
- * @rmtoll DCKCFGR SDIOSEL LL_RCC_SetSDIOClockSource\n
- * DCKCFGR2 SDIOSEL LL_RCC_SetSDIOClockSource
- * @param SDIOxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_SDIO_CLKSOURCE_PLL48CLK
- * @arg @ref LL_RCC_SDIO_CLKSOURCE_SYSCLK
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetSDIOClockSource(uint32_t SDIOxSource)
-{
-#if defined(RCC_DCKCFGR_SDIOSEL)
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SDIOSEL, SDIOxSource);
-#else
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL, SDIOxSource);
-#endif /* RCC_DCKCFGR_SDIOSEL */
-}
-#endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
-
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-/**
- * @brief Configure 48Mhz domain clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetCK48MClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_SetCK48MClockSource
- * @param CK48MxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLL
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetCK48MClockSource(uint32_t CK48MxSource)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, CK48MxSource);
-#else
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, CK48MxSource);
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-
-#if defined(RNG)
-/**
- * @brief Configure RNG clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetRNGClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_SetRNGClockSource
- * @param RNGxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, RNGxSource);
-#else
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, RNGxSource);
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-#endif /* RNG */
-
-#if defined(USB_OTG_FS) || defined(USB_OTG_HS)
-/**
- * @brief Configure USB clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetUSBClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_SetUSBClockSource
- * @param USBxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, USBxSource);
-#else
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, USBxSource);
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-#endif /* USB_OTG_FS || USB_OTG_HS */
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-
-#if defined(CEC)
-/**
- * @brief Configure CEC clock source
- * @rmtoll DCKCFGR2 CECSEL LL_RCC_SetCECClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_CEC_CLKSOURCE_HSI_DIV488
- * @arg @ref LL_RCC_CEC_CLKSOURCE_LSE
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetCECClockSource(uint32_t Source)
-{
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CECSEL, Source);
-}
-#endif /* CEC */
-
-/**
- * @brief Configure I2S clock source
- * @rmtoll CFGR I2SSRC LL_RCC_SetI2SClockSource\n
- * DCKCFGR I2SSRC LL_RCC_SetI2SClockSource\n
- * DCKCFGR I2S1SRC LL_RCC_SetI2SClockSource\n
- * DCKCFGR I2S2SRC LL_RCC_SetI2SClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PIN
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLSRC (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t Source)
-{
-#if defined(RCC_CFGR_I2SSRC)
- MODIFY_REG(RCC->CFGR, RCC_CFGR_I2SSRC, Source);
-#else
- MODIFY_REG(RCC->DCKCFGR, (Source & 0xFFFF0000U), (Source << 16U));
-#endif /* RCC_CFGR_I2SSRC */
-}
-
-#if defined(DSI)
-/**
- * @brief Configure DSI clock source
- * @rmtoll DCKCFGR DSISEL LL_RCC_SetDSIClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_DSI_CLKSOURCE_PHY
- * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetDSIClockSource(uint32_t Source)
-{
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_DSISEL, Source);
-}
-#endif /* DSI */
-
-#if defined(DFSDM1_Channel0)
-/**
- * @brief Configure DFSDM Audio clock source
- * @rmtoll DCKCFGR CKDFSDM1ASEL LL_RCC_SetDFSDMAudioClockSource\n
- * DCKCFGR CKDFSDM2ASEL LL_RCC_SetDFSDMAudioClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1
- * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2
- * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (*)
- * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetDFSDMAudioClockSource(uint32_t Source)
-{
- MODIFY_REG(RCC->DCKCFGR, (Source & 0x0000FFFFU), (Source >> 16U));
-}
-
-/**
- * @brief Configure DFSDM Kernel clock source
- * @rmtoll DCKCFGR CKDFSDM1SEL LL_RCC_SetDFSDMClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_PCLK2
- * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_SYSCLK
- * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_PCLK2 (*)
- * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_SYSCLK (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetDFSDMClockSource(uint32_t Source)
-{
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL, Source);
-}
-#endif /* DFSDM1_Channel0 */
-
-#if defined(SPDIFRX)
-/**
- * @brief Configure SPDIFRX clock source
- * @rmtoll DCKCFGR2 SPDIFRXSEL LL_RCC_SetSPDIFRXClockSource
- * @param SPDIFRXxSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLL
- * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetSPDIFRXClockSource(uint32_t SPDIFRXxSource)
-{
- MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SPDIFRXSEL, SPDIFRXxSource);
-}
-#endif /* SPDIFRX */
-
-#if defined(FMPI2C1)
-/**
- * @brief Get FMPI2C clock source
- * @rmtoll DCKCFGR2 FMPI2C1SEL LL_RCC_GetFMPI2CClockSource
- * @param FMPI2Cx This parameter can be one of the following values:
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_PCLK1
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK
- * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_HSI
- */
-__STATIC_INLINE uint32_t LL_RCC_GetFMPI2CClockSource(uint32_t FMPI2Cx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, FMPI2Cx));
-}
-#endif /* FMPI2C1 */
-
-#if defined(LPTIM1)
-/**
- * @brief Get LPTIMx clock source
- * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_GetLPTIMClockSource
- * @param LPTIMx This parameter can be one of the following values:
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
- * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
- */
-__STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL));
-}
-#endif /* LPTIM1 */
-
-#if defined(SAI1)
-/**
- * @brief Get SAIx clock source
- * @rmtoll DCKCFGR SAI1SEL LL_RCC_GetSAIClockSource\n
- * DCKCFGR SAI2SEL LL_RCC_GetSAIClockSource\n
- * DCKCFGR SAI1ASRC LL_RCC_GetSAIClockSource\n
- * DCKCFGR SAI1BSRC LL_RCC_GetSAIClockSource
- * @param SAIx This parameter can be one of the following values:
- * @arg @ref LL_RCC_SAI1_CLKSOURCE (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE (*)
- *
- * (*) value not defined in all devices.
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetSAIClockSource(uint32_t SAIx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, SAIx) >> 16U | SAIx);
-}
-#endif /* SAI1 */
-
-#if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
-/**
- * @brief Get SDIOx clock source
- * @rmtoll DCKCFGR SDIOSEL LL_RCC_GetSDIOClockSource\n
- * DCKCFGR2 SDIOSEL LL_RCC_GetSDIOClockSource
- * @param SDIOx This parameter can be one of the following values:
- * @arg @ref LL_RCC_SDIO_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SDIO_CLKSOURCE_PLL48CLK
- * @arg @ref LL_RCC_SDIO_CLKSOURCE_SYSCLK
- */
-__STATIC_INLINE uint32_t LL_RCC_GetSDIOClockSource(uint32_t SDIOx)
-{
-#if defined(RCC_DCKCFGR_SDIOSEL)
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, SDIOx));
-#else
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SDIOx));
-#endif /* RCC_DCKCFGR_SDIOSEL */
-}
-#endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
-
-#if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
-/**
- * @brief Get 48Mhz domain clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetCK48MClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_GetCK48MClockSource
- * @param CK48Mx This parameter can be one of the following values:
- * @arg @ref LL_RCC_CK48M_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLL
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetCK48MClockSource(uint32_t CK48Mx)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, CK48Mx));
-#else
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CK48Mx));
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-
-#if defined(RNG)
-/**
- * @brief Get RNGx clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetRNGClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_GetRNGClockSource
- * @param RNGx This parameter can be one of the following values:
- * @arg @ref LL_RCC_RNG_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RNGx));
-#else
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, RNGx));
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-#endif /* RNG */
-
-#if defined(USB_OTG_FS) || defined(USB_OTG_HS)
-/**
- * @brief Get USBx clock source
- * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetUSBClockSource\n
- * DCKCFGR2 CK48MSEL LL_RCC_GetUSBClockSource
- * @param USBx This parameter can be one of the following values:
- * @arg @ref LL_RCC_USB_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLLSAI (*)
- * @arg @ref LL_RCC_USB_CLKSOURCE_PLLI2S (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
-{
-#if defined(RCC_DCKCFGR_CK48MSEL)
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, USBx));
-#else
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, USBx));
-#endif /* RCC_DCKCFGR_CK48MSEL */
-}
-#endif /* USB_OTG_FS || USB_OTG_HS */
-#endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
-
-#if defined(CEC)
-/**
- * @brief Get CEC Clock Source
- * @rmtoll DCKCFGR2 CECSEL LL_RCC_GetCECClockSource
- * @param CECx This parameter can be one of the following values:
- * @arg @ref LL_RCC_CEC_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_CEC_CLKSOURCE_HSI_DIV488
- * @arg @ref LL_RCC_CEC_CLKSOURCE_LSE
- */
-__STATIC_INLINE uint32_t LL_RCC_GetCECClockSource(uint32_t CECx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CECx));
-}
-#endif /* CEC */
-
-/**
- * @brief Get I2S Clock Source
- * @rmtoll CFGR I2SSRC LL_RCC_GetI2SClockSource\n
- * DCKCFGR I2SSRC LL_RCC_GetI2SClockSource\n
- * DCKCFGR I2S1SRC LL_RCC_GetI2SClockSource\n
- * DCKCFGR I2S2SRC LL_RCC_GetI2SClockSource
- * @param I2Sx This parameter can be one of the following values:
- * @arg @ref LL_RCC_I2S1_CLKSOURCE
- * @arg @ref LL_RCC_I2S2_CLKSOURCE (*)
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PIN
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLSRC (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PIN (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLL (*)
- * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLSRC (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx)
-{
-#if defined(RCC_CFGR_I2SSRC)
- return (uint32_t)(READ_BIT(RCC->CFGR, I2Sx));
-#else
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, I2Sx) >> 16U | I2Sx);
-#endif /* RCC_CFGR_I2SSRC */
-}
-
-#if defined(DFSDM1_Channel0)
-/**
- * @brief Get DFSDM Audio Clock Source
- * @rmtoll DCKCFGR CKDFSDM1ASEL LL_RCC_GetDFSDMAudioClockSource\n
- * DCKCFGR CKDFSDM2ASEL LL_RCC_GetDFSDMAudioClockSource
- * @param DFSDMx This parameter can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE
- * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE (*)
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1
- * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2
- * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (*)
- * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetDFSDMAudioClockSource(uint32_t DFSDMx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, DFSDMx) << 16U | DFSDMx);
-}
-
-/**
- * @brief Get DFSDM Audio Clock Source
- * @rmtoll DCKCFGR CKDFSDM1SEL LL_RCC_GetDFSDMClockSource
- * @param DFSDMx This parameter can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_CLKSOURCE
- * @arg @ref LL_RCC_DFSDM2_CLKSOURCE (*)
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_PCLK2
- * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_SYSCLK
- * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_PCLK2 (*)
- * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_SYSCLK (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetDFSDMClockSource(uint32_t DFSDMx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, DFSDMx));
-}
-#endif /* DFSDM1_Channel0 */
-
-#if defined(SPDIFRX)
-/**
- * @brief Get SPDIFRX clock source
- * @rmtoll DCKCFGR2 SPDIFRXSEL LL_RCC_GetSPDIFRXClockSource
- * @param SPDIFRXx This parameter can be one of the following values:
- * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLL
- * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_GetSPDIFRXClockSource(uint32_t SPDIFRXx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SPDIFRXx));
-}
-#endif /* SPDIFRX */
-
-#if defined(DSI)
-/**
- * @brief Get DSI Clock Source
- * @rmtoll DCKCFGR DSISEL LL_RCC_GetDSIClockSource
- * @param DSIx This parameter can be one of the following values:
- * @arg @ref LL_RCC_DSI_CLKSOURCE
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_DSI_CLKSOURCE_PHY
- * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL
- */
-__STATIC_INLINE uint32_t LL_RCC_GetDSIClockSource(uint32_t DSIx)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, DSIx));
-}
-#endif /* DSI */
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_RTC RTC
- * @{
- */
-
-/**
- * @brief Set RTC Clock Source
- * @note Once the RTC clock source has been selected, it cannot be changed anymore unless
- * the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is
- * set). The BDRST bit can be used to reset them.
- * @rmtoll BDCR RTCSEL LL_RCC_SetRTCClockSource
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
- * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
- * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
- * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
-{
- MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);
-}
-
-/**
- * @brief Get RTC Clock Source
- * @rmtoll BDCR RTCSEL LL_RCC_GetRTCClockSource
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
- * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
- * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
- * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
- */
-__STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
-{
- return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL));
-}
-
-/**
- * @brief Enable RTC
- * @rmtoll BDCR RTCEN LL_RCC_EnableRTC
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableRTC(void)
-{
- SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
-}
-
-/**
- * @brief Disable RTC
- * @rmtoll BDCR RTCEN LL_RCC_DisableRTC
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableRTC(void)
-{
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
-}
-
-/**
- * @brief Check if RTC has been enabled or not
- * @rmtoll BDCR RTCEN LL_RCC_IsEnabledRTC
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
-{
- return (READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == (RCC_BDCR_RTCEN));
-}
-
-/**
- * @brief Force the Backup domain reset
- * @rmtoll BDCR BDRST LL_RCC_ForceBackupDomainReset
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
-{
- SET_BIT(RCC->BDCR, RCC_BDCR_BDRST);
-}
-
-/**
- * @brief Release the Backup domain reset
- * @rmtoll BDCR BDRST LL_RCC_ReleaseBackupDomainReset
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
-{
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST);
-}
-
-/**
- * @brief Set HSE Prescalers for RTC Clock
- * @rmtoll CFGR RTCPRE LL_RCC_SetRTC_HSEPrescaler
- * @param Prescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_RTC_NOCLOCK
- * @arg @ref LL_RCC_RTC_HSE_DIV_2
- * @arg @ref LL_RCC_RTC_HSE_DIV_3
- * @arg @ref LL_RCC_RTC_HSE_DIV_4
- * @arg @ref LL_RCC_RTC_HSE_DIV_5
- * @arg @ref LL_RCC_RTC_HSE_DIV_6
- * @arg @ref LL_RCC_RTC_HSE_DIV_7
- * @arg @ref LL_RCC_RTC_HSE_DIV_8
- * @arg @ref LL_RCC_RTC_HSE_DIV_9
- * @arg @ref LL_RCC_RTC_HSE_DIV_10
- * @arg @ref LL_RCC_RTC_HSE_DIV_11
- * @arg @ref LL_RCC_RTC_HSE_DIV_12
- * @arg @ref LL_RCC_RTC_HSE_DIV_13
- * @arg @ref LL_RCC_RTC_HSE_DIV_14
- * @arg @ref LL_RCC_RTC_HSE_DIV_15
- * @arg @ref LL_RCC_RTC_HSE_DIV_16
- * @arg @ref LL_RCC_RTC_HSE_DIV_17
- * @arg @ref LL_RCC_RTC_HSE_DIV_18
- * @arg @ref LL_RCC_RTC_HSE_DIV_19
- * @arg @ref LL_RCC_RTC_HSE_DIV_20
- * @arg @ref LL_RCC_RTC_HSE_DIV_21
- * @arg @ref LL_RCC_RTC_HSE_DIV_22
- * @arg @ref LL_RCC_RTC_HSE_DIV_23
- * @arg @ref LL_RCC_RTC_HSE_DIV_24
- * @arg @ref LL_RCC_RTC_HSE_DIV_25
- * @arg @ref LL_RCC_RTC_HSE_DIV_26
- * @arg @ref LL_RCC_RTC_HSE_DIV_27
- * @arg @ref LL_RCC_RTC_HSE_DIV_28
- * @arg @ref LL_RCC_RTC_HSE_DIV_29
- * @arg @ref LL_RCC_RTC_HSE_DIV_30
- * @arg @ref LL_RCC_RTC_HSE_DIV_31
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetRTC_HSEPrescaler(uint32_t Prescaler)
-{
- MODIFY_REG(RCC->CFGR, RCC_CFGR_RTCPRE, Prescaler);
-}
-
-/**
- * @brief Get HSE Prescalers for RTC Clock
- * @rmtoll CFGR RTCPRE LL_RCC_GetRTC_HSEPrescaler
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_RTC_NOCLOCK
- * @arg @ref LL_RCC_RTC_HSE_DIV_2
- * @arg @ref LL_RCC_RTC_HSE_DIV_3
- * @arg @ref LL_RCC_RTC_HSE_DIV_4
- * @arg @ref LL_RCC_RTC_HSE_DIV_5
- * @arg @ref LL_RCC_RTC_HSE_DIV_6
- * @arg @ref LL_RCC_RTC_HSE_DIV_7
- * @arg @ref LL_RCC_RTC_HSE_DIV_8
- * @arg @ref LL_RCC_RTC_HSE_DIV_9
- * @arg @ref LL_RCC_RTC_HSE_DIV_10
- * @arg @ref LL_RCC_RTC_HSE_DIV_11
- * @arg @ref LL_RCC_RTC_HSE_DIV_12
- * @arg @ref LL_RCC_RTC_HSE_DIV_13
- * @arg @ref LL_RCC_RTC_HSE_DIV_14
- * @arg @ref LL_RCC_RTC_HSE_DIV_15
- * @arg @ref LL_RCC_RTC_HSE_DIV_16
- * @arg @ref LL_RCC_RTC_HSE_DIV_17
- * @arg @ref LL_RCC_RTC_HSE_DIV_18
- * @arg @ref LL_RCC_RTC_HSE_DIV_19
- * @arg @ref LL_RCC_RTC_HSE_DIV_20
- * @arg @ref LL_RCC_RTC_HSE_DIV_21
- * @arg @ref LL_RCC_RTC_HSE_DIV_22
- * @arg @ref LL_RCC_RTC_HSE_DIV_23
- * @arg @ref LL_RCC_RTC_HSE_DIV_24
- * @arg @ref LL_RCC_RTC_HSE_DIV_25
- * @arg @ref LL_RCC_RTC_HSE_DIV_26
- * @arg @ref LL_RCC_RTC_HSE_DIV_27
- * @arg @ref LL_RCC_RTC_HSE_DIV_28
- * @arg @ref LL_RCC_RTC_HSE_DIV_29
- * @arg @ref LL_RCC_RTC_HSE_DIV_30
- * @arg @ref LL_RCC_RTC_HSE_DIV_31
- */
-__STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
-{
- return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_RTCPRE));
-}
-
-/**
- * @}
- */
-
-#if defined(RCC_DCKCFGR_TIMPRE)
-/** @defgroup RCC_LL_EF_TIM_CLOCK_PRESCALER TIM
- * @{
- */
-
-/**
- * @brief Set Timers Clock Prescalers
- * @rmtoll DCKCFGR TIMPRE LL_RCC_SetTIMPrescaler
- * @param Prescaler This parameter can be one of the following values:
- * @arg @ref LL_RCC_TIM_PRESCALER_TWICE
- * @arg @ref LL_RCC_TIM_PRESCALER_FOUR_TIMES
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_SetTIMPrescaler(uint32_t Prescaler)
-{
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_TIMPRE, Prescaler);
-}
-
-/**
- * @brief Get Timers Clock Prescalers
- * @rmtoll DCKCFGR TIMPRE LL_RCC_GetTIMPrescaler
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_TIM_PRESCALER_TWICE
- * @arg @ref LL_RCC_TIM_PRESCALER_FOUR_TIMES
- */
-__STATIC_INLINE uint32_t LL_RCC_GetTIMPrescaler(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_TIMPRE));
-}
-
-/**
- * @}
- */
-#endif /* RCC_DCKCFGR_TIMPRE */
-
-/** @defgroup RCC_LL_EF_PLL PLL
- * @{
- */
-
-/**
- * @brief Enable PLL
- * @rmtoll CR PLLON LL_RCC_PLL_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_Enable(void)
-{
- SET_BIT(RCC->CR, RCC_CR_PLLON);
-}
-
-/**
- * @brief Disable PLL
- * @note Cannot be disabled if the PLL clock is used as the system clock
- * @rmtoll CR PLLON LL_RCC_PLL_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_Disable(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
-}
-
-/**
- * @brief Check if PLL Ready
- * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
-{
- return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
-}
-
-/**
- * @brief Configure PLL used for SYSCLK Domain
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLP can be written only when PLL is disabled
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS\n
- * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SYS\n
- * PLLCFGR PLLP LL_RCC_PLL_ConfigDomain_SYS
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLP_R This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLP_DIV_2
- * @arg @ref LL_RCC_PLLP_DIV_4
- * @arg @ref LL_RCC_PLLP_DIV_6
- * @arg @ref LL_RCC_PLLP_DIV_8
- * @arg @ref LL_RCC_PLLR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLR_DIV_7 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP_R)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos);
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLP, PLLP_R);
-#if defined(RCC_PLLR_SYSCLK_SUPPORT)
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLR, PLLP_R);
-#endif /* RCC_PLLR_SYSCLK_SUPPORT */
-}
-
-/**
- * @brief Configure PLL used for 48Mhz domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLQ can be written only when PLL is disabled
- * @note This can be selected for USB, RNG, SDIO
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_48M\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_48M\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_48M\n
- * PLLCFGR PLLQ LL_RCC_PLL_ConfigDomain_48M
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLQ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLQ_DIV_2
- * @arg @ref LL_RCC_PLLQ_DIV_3
- * @arg @ref LL_RCC_PLLQ_DIV_4
- * @arg @ref LL_RCC_PLLQ_DIV_5
- * @arg @ref LL_RCC_PLLQ_DIV_6
- * @arg @ref LL_RCC_PLLQ_DIV_7
- * @arg @ref LL_RCC_PLLQ_DIV_8
- * @arg @ref LL_RCC_PLLQ_DIV_9
- * @arg @ref LL_RCC_PLLQ_DIV_10
- * @arg @ref LL_RCC_PLLQ_DIV_11
- * @arg @ref LL_RCC_PLLQ_DIV_12
- * @arg @ref LL_RCC_PLLQ_DIV_13
- * @arg @ref LL_RCC_PLLQ_DIV_14
- * @arg @ref LL_RCC_PLLQ_DIV_15
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLQ,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLQ);
-}
-
-#if defined(DSI)
-/**
- * @brief Configure PLL used for DSI clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI are disabled
- * @note PLLN/PLLR can be written only when PLL is disabled
- * @note This can be selected for DSI
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_DSI\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_DSI\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_DSI\n
- * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_DSI
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_DSI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
-}
-#endif /* DSI */
-
-#if defined(RCC_PLLR_I2S_CLKSOURCE_SUPPORT)
-/**
- * @brief Configure PLL used for I2S clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI are disabled
- * @note PLLN/PLLR can be written only when PLL is disabled
- * @note This can be selected for I2S
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_I2S\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_I2S\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_I2S\n
- * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_I2S
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
-}
-#endif /* RCC_PLLR_I2S_CLKSOURCE_SUPPORT */
-
-#if defined(SPDIFRX)
-/**
- * @brief Configure PLL used for SPDIFRX clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI are disabled
- * @note PLLN/PLLR can be written only when PLL is disabled
- * @note This can be selected for SPDIFRX
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SPDIFRX\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SPDIFRX\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SPDIFRX\n
- * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SPDIFRX
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
-}
-#endif /* SPDIFRX */
-
-#if defined(RCC_PLLCFGR_PLLR)
-#if defined(SAI1)
-/**
- * @brief Configure PLL used for SAI clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI are disabled
- * @note PLLN/PLLR can be written only when PLL is disabled
- * @note This can be selected for SAI
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SAI\n
- * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SAI\n
- * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SAI\n
- * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SAI\n
- * DCKCFGR PLLDIVR LL_RCC_PLL_ConfigDomain_SAI
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- * @param PLLDIVR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLDIVR_DIV_1 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_7 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_8 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_9 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_10 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_11 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_12 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_13 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_14 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_15 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_16 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_17 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_18 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_19 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_20 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_21 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_22 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_23 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_24 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_25 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_26 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_27 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_28 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_29 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_30 (*)
- * @arg @ref LL_RCC_PLLDIVR_DIV_31 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-#if defined(RCC_DCKCFGR_PLLDIVR)
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLDIVR)
-#else
-__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
-#endif /* RCC_DCKCFGR_PLLDIVR */
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
- Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
-#if defined(RCC_DCKCFGR_PLLDIVR)
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLDIVR, PLLDIVR);
-#endif /* RCC_DCKCFGR_PLLDIVR */
-}
-#endif /* SAI1 */
-#endif /* RCC_PLLCFGR_PLLR */
-
-/**
- * @brief Configure PLL clock source
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_SetMainSource
- * @param PLLSource This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource);
-}
-
-/**
- * @brief Get the oscillator used as PLL clock source.
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_GetMainSource
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC));
-}
-
-/**
- * @brief Get Main PLL multiplication factor for VCO
- * @rmtoll PLLCFGR PLLN LL_RCC_PLL_GetN
- * @retval Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetN(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
-}
-
-/**
- * @brief Get Main PLL division factor for PLLP
- * @rmtoll PLLCFGR PLLP LL_RCC_PLL_GetP
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLP_DIV_2
- * @arg @ref LL_RCC_PLLP_DIV_4
- * @arg @ref LL_RCC_PLLP_DIV_6
- * @arg @ref LL_RCC_PLLP_DIV_8
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetP(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP));
-}
-
-/**
- * @brief Get Main PLL division factor for PLLQ
- * @note used for PLL48MCLK selected for USB, RNG, SDIO (48 MHz clock)
- * @rmtoll PLLCFGR PLLQ LL_RCC_PLL_GetQ
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLQ_DIV_2
- * @arg @ref LL_RCC_PLLQ_DIV_3
- * @arg @ref LL_RCC_PLLQ_DIV_4
- * @arg @ref LL_RCC_PLLQ_DIV_5
- * @arg @ref LL_RCC_PLLQ_DIV_6
- * @arg @ref LL_RCC_PLLQ_DIV_7
- * @arg @ref LL_RCC_PLLQ_DIV_8
- * @arg @ref LL_RCC_PLLQ_DIV_9
- * @arg @ref LL_RCC_PLLQ_DIV_10
- * @arg @ref LL_RCC_PLLQ_DIV_11
- * @arg @ref LL_RCC_PLLQ_DIV_12
- * @arg @ref LL_RCC_PLLQ_DIV_13
- * @arg @ref LL_RCC_PLLQ_DIV_14
- * @arg @ref LL_RCC_PLLQ_DIV_15
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetQ(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ));
-}
-
-#if defined(RCC_PLLCFGR_PLLR)
-/**
- * @brief Get Main PLL division factor for PLLR
- * @note used for PLLCLK (system clock)
- * @rmtoll PLLCFGR PLLR LL_RCC_PLL_GetR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLR_DIV_2
- * @arg @ref LL_RCC_PLLR_DIV_3
- * @arg @ref LL_RCC_PLLR_DIV_4
- * @arg @ref LL_RCC_PLLR_DIV_5
- * @arg @ref LL_RCC_PLLR_DIV_6
- * @arg @ref LL_RCC_PLLR_DIV_7
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetR(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR));
-}
-#endif /* RCC_PLLCFGR_PLLR */
-
-#if defined(RCC_DCKCFGR_PLLDIVR)
-/**
- * @brief Get Main PLL division factor for PLLDIVR
- * @note used for PLLSAICLK (SAI1 and SAI2 clock)
- * @rmtoll DCKCFGR PLLDIVR LL_RCC_PLL_GetDIVR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLDIVR_DIV_1
- * @arg @ref LL_RCC_PLLDIVR_DIV_2
- * @arg @ref LL_RCC_PLLDIVR_DIV_3
- * @arg @ref LL_RCC_PLLDIVR_DIV_4
- * @arg @ref LL_RCC_PLLDIVR_DIV_5
- * @arg @ref LL_RCC_PLLDIVR_DIV_6
- * @arg @ref LL_RCC_PLLDIVR_DIV_7
- * @arg @ref LL_RCC_PLLDIVR_DIV_8
- * @arg @ref LL_RCC_PLLDIVR_DIV_9
- * @arg @ref LL_RCC_PLLDIVR_DIV_10
- * @arg @ref LL_RCC_PLLDIVR_DIV_11
- * @arg @ref LL_RCC_PLLDIVR_DIV_12
- * @arg @ref LL_RCC_PLLDIVR_DIV_13
- * @arg @ref LL_RCC_PLLDIVR_DIV_14
- * @arg @ref LL_RCC_PLLDIVR_DIV_15
- * @arg @ref LL_RCC_PLLDIVR_DIV_16
- * @arg @ref LL_RCC_PLLDIVR_DIV_17
- * @arg @ref LL_RCC_PLLDIVR_DIV_18
- * @arg @ref LL_RCC_PLLDIVR_DIV_19
- * @arg @ref LL_RCC_PLLDIVR_DIV_20
- * @arg @ref LL_RCC_PLLDIVR_DIV_21
- * @arg @ref LL_RCC_PLLDIVR_DIV_22
- * @arg @ref LL_RCC_PLLDIVR_DIV_23
- * @arg @ref LL_RCC_PLLDIVR_DIV_24
- * @arg @ref LL_RCC_PLLDIVR_DIV_25
- * @arg @ref LL_RCC_PLLDIVR_DIV_26
- * @arg @ref LL_RCC_PLLDIVR_DIV_27
- * @arg @ref LL_RCC_PLLDIVR_DIV_28
- * @arg @ref LL_RCC_PLLDIVR_DIV_29
- * @arg @ref LL_RCC_PLLDIVR_DIV_30
- * @arg @ref LL_RCC_PLLDIVR_DIV_31
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetDIVR(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLDIVR));
-}
-#endif /* RCC_DCKCFGR_PLLDIVR */
-
-/**
- * @brief Get Division factor for the main PLL and other PLL
- * @rmtoll PLLCFGR PLLM LL_RCC_PLL_GetDivider
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLM_DIV_2
- * @arg @ref LL_RCC_PLLM_DIV_3
- * @arg @ref LL_RCC_PLLM_DIV_4
- * @arg @ref LL_RCC_PLLM_DIV_5
- * @arg @ref LL_RCC_PLLM_DIV_6
- * @arg @ref LL_RCC_PLLM_DIV_7
- * @arg @ref LL_RCC_PLLM_DIV_8
- * @arg @ref LL_RCC_PLLM_DIV_9
- * @arg @ref LL_RCC_PLLM_DIV_10
- * @arg @ref LL_RCC_PLLM_DIV_11
- * @arg @ref LL_RCC_PLLM_DIV_12
- * @arg @ref LL_RCC_PLLM_DIV_13
- * @arg @ref LL_RCC_PLLM_DIV_14
- * @arg @ref LL_RCC_PLLM_DIV_15
- * @arg @ref LL_RCC_PLLM_DIV_16
- * @arg @ref LL_RCC_PLLM_DIV_17
- * @arg @ref LL_RCC_PLLM_DIV_18
- * @arg @ref LL_RCC_PLLM_DIV_19
- * @arg @ref LL_RCC_PLLM_DIV_20
- * @arg @ref LL_RCC_PLLM_DIV_21
- * @arg @ref LL_RCC_PLLM_DIV_22
- * @arg @ref LL_RCC_PLLM_DIV_23
- * @arg @ref LL_RCC_PLLM_DIV_24
- * @arg @ref LL_RCC_PLLM_DIV_25
- * @arg @ref LL_RCC_PLLM_DIV_26
- * @arg @ref LL_RCC_PLLM_DIV_27
- * @arg @ref LL_RCC_PLLM_DIV_28
- * @arg @ref LL_RCC_PLLM_DIV_29
- * @arg @ref LL_RCC_PLLM_DIV_30
- * @arg @ref LL_RCC_PLLM_DIV_31
- * @arg @ref LL_RCC_PLLM_DIV_32
- * @arg @ref LL_RCC_PLLM_DIV_33
- * @arg @ref LL_RCC_PLLM_DIV_34
- * @arg @ref LL_RCC_PLLM_DIV_35
- * @arg @ref LL_RCC_PLLM_DIV_36
- * @arg @ref LL_RCC_PLLM_DIV_37
- * @arg @ref LL_RCC_PLLM_DIV_38
- * @arg @ref LL_RCC_PLLM_DIV_39
- * @arg @ref LL_RCC_PLLM_DIV_40
- * @arg @ref LL_RCC_PLLM_DIV_41
- * @arg @ref LL_RCC_PLLM_DIV_42
- * @arg @ref LL_RCC_PLLM_DIV_43
- * @arg @ref LL_RCC_PLLM_DIV_44
- * @arg @ref LL_RCC_PLLM_DIV_45
- * @arg @ref LL_RCC_PLLM_DIV_46
- * @arg @ref LL_RCC_PLLM_DIV_47
- * @arg @ref LL_RCC_PLLM_DIV_48
- * @arg @ref LL_RCC_PLLM_DIV_49
- * @arg @ref LL_RCC_PLLM_DIV_50
- * @arg @ref LL_RCC_PLLM_DIV_51
- * @arg @ref LL_RCC_PLLM_DIV_52
- * @arg @ref LL_RCC_PLLM_DIV_53
- * @arg @ref LL_RCC_PLLM_DIV_54
- * @arg @ref LL_RCC_PLLM_DIV_55
- * @arg @ref LL_RCC_PLLM_DIV_56
- * @arg @ref LL_RCC_PLLM_DIV_57
- * @arg @ref LL_RCC_PLLM_DIV_58
- * @arg @ref LL_RCC_PLLM_DIV_59
- * @arg @ref LL_RCC_PLLM_DIV_60
- * @arg @ref LL_RCC_PLLM_DIV_61
- * @arg @ref LL_RCC_PLLM_DIV_62
- * @arg @ref LL_RCC_PLLM_DIV_63
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
-}
-
-/**
- * @brief Configure Spread Spectrum used for PLL
- * @note These bits must be written before enabling PLL
- * @rmtoll SSCGR MODPER LL_RCC_PLL_ConfigSpreadSpectrum\n
- * SSCGR INCSTEP LL_RCC_PLL_ConfigSpreadSpectrum\n
- * SSCGR SPREADSEL LL_RCC_PLL_ConfigSpreadSpectrum
- * @param Mod Between Min_Data=0 and Max_Data=8191
- * @param Inc Between Min_Data=0 and Max_Data=32767
- * @param Sel This parameter can be one of the following values:
- * @arg @ref LL_RCC_SPREAD_SELECT_CENTER
- * @arg @ref LL_RCC_SPREAD_SELECT_DOWN
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_ConfigSpreadSpectrum(uint32_t Mod, uint32_t Inc, uint32_t Sel)
-{
- MODIFY_REG(RCC->SSCGR, RCC_SSCGR_MODPER | RCC_SSCGR_INCSTEP | RCC_SSCGR_SPREADSEL, Mod | (Inc << RCC_SSCGR_INCSTEP_Pos) | Sel);
-}
-
-/**
- * @brief Get Spread Spectrum Modulation Period for PLL
- * @rmtoll SSCGR MODPER LL_RCC_PLL_GetPeriodModulation
- * @retval Between Min_Data=0 and Max_Data=8191
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetPeriodModulation(void)
-{
- return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_MODPER));
-}
-
-/**
- * @brief Get Spread Spectrum Incrementation Step for PLL
- * @note Must be written before enabling PLL
- * @rmtoll SSCGR INCSTEP LL_RCC_PLL_GetStepIncrementation
- * @retval Between Min_Data=0 and Max_Data=32767
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetStepIncrementation(void)
-{
- return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_INCSTEP) >> RCC_SSCGR_INCSTEP_Pos);
-}
-
-/**
- * @brief Get Spread Spectrum Selection for PLL
- * @note Must be written before enabling PLL
- * @rmtoll SSCGR SPREADSEL LL_RCC_PLL_GetSpreadSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_SPREAD_SELECT_CENTER
- * @arg @ref LL_RCC_SPREAD_SELECT_DOWN
- */
-__STATIC_INLINE uint32_t LL_RCC_PLL_GetSpreadSelection(void)
-{
- return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_SPREADSEL));
-}
-
-/**
- * @brief Enable Spread Spectrum for PLL.
- * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Enable(void)
-{
- SET_BIT(RCC->SSCGR, RCC_SSCGR_SSCGEN);
-}
-
-/**
- * @brief Disable Spread Spectrum for PLL.
- * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Disable(void)
-{
- CLEAR_BIT(RCC->SSCGR, RCC_SSCGR_SSCGEN);
-}
-
-/**
- * @}
- */
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/** @defgroup RCC_LL_EF_PLLI2S PLLI2S
- * @{
- */
-
-/**
- * @brief Enable PLLI2S
- * @rmtoll CR PLLI2SON LL_RCC_PLLI2S_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_Enable(void)
-{
- SET_BIT(RCC->CR, RCC_CR_PLLI2SON);
-}
-
-/**
- * @brief Disable PLLI2S
- * @rmtoll CR PLLI2SON LL_RCC_PLLI2S_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_Disable(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_PLLI2SON);
-}
-
-/**
- * @brief Check if PLLI2S Ready
- * @rmtoll CR PLLI2SRDY LL_RCC_PLLI2S_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_IsReady(void)
-{
- return (READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) == (RCC_CR_PLLI2SRDY));
-}
-
-#if (defined(RCC_DCKCFGR_PLLI2SDIVQ) || defined(RCC_DCKCFGR_PLLI2SDIVR))
-/**
- * @brief Configure PLLI2S used for SAI domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLQ/PLLR can be written only when PLLI2S is disabled
- * @note This can be selected for SAI
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * DCKCFGR PLLI2SDIVQ LL_RCC_PLLI2S_ConfigDomain_SAI\n
- * DCKCFGR PLLI2SDIVR LL_RCC_PLLI2S_ConfigDomain_SAI
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
- *
- * (*) value not defined in all devices.
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param PLLN Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLQ_R This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SQ_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SQ_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SR_DIV_7 (*)
- *
- * (*) value not defined in all devices.
- * @param PLLDIVQ_R This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31 (*)
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30 (*)
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31 (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ_R, uint32_t PLLDIVQ_R)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
- MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos);
-#if defined(RCC_DCKCFGR_PLLI2SDIVQ)
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SQ, PLLQ_R);
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVQ, PLLDIVQ_R);
-#else
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR, PLLQ_R);
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVR, PLLDIVQ_R);
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ */
-}
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ && RCC_DCKCFGR_PLLI2SDIVR */
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
-/**
- * @brief Configure PLLI2S used for 48Mhz domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLQ can be written only when PLLI2S is disabled
- * @note This can be selected for RNG, USB, SDIO
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_48M\n
- * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_48M\n
- * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_48M\n
- * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_48M\n
- * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_48M\n
- * PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_ConfigDomain_48M
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
- *
- * (*) value not defined in all devices.
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLQ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SQ_DIV_2
- * @arg @ref LL_RCC_PLLI2SQ_DIV_3
- * @arg @ref LL_RCC_PLLI2SQ_DIV_4
- * @arg @ref LL_RCC_PLLI2SQ_DIV_5
- * @arg @ref LL_RCC_PLLI2SQ_DIV_6
- * @arg @ref LL_RCC_PLLI2SQ_DIV_7
- * @arg @ref LL_RCC_PLLI2SQ_DIV_8
- * @arg @ref LL_RCC_PLLI2SQ_DIV_9
- * @arg @ref LL_RCC_PLLI2SQ_DIV_10
- * @arg @ref LL_RCC_PLLI2SQ_DIV_11
- * @arg @ref LL_RCC_PLLI2SQ_DIV_12
- * @arg @ref LL_RCC_PLLI2SQ_DIV_13
- * @arg @ref LL_RCC_PLLI2SQ_DIV_14
- * @arg @ref LL_RCC_PLLI2SQ_DIV_15
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
- MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SQ, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLQ);
-}
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
-
-#if defined(SPDIFRX)
-/**
- * @brief Configure PLLI2S used for SPDIFRX domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLP can be written only when PLLI2S is disabled
- * @note This can be selected for SPDIFRX
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
- * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
- * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
- * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
- * PLLI2SCFGR PLLI2SP LL_RCC_PLLI2S_ConfigDomain_SPDIFRX
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLP This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SP_DIV_2
- * @arg @ref LL_RCC_PLLI2SP_DIV_4
- * @arg @ref LL_RCC_PLLI2SP_DIV_6
- * @arg @ref LL_RCC_PLLI2SP_DIV_8
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SP, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLP);
-}
-#endif /* SPDIFRX */
-
-/**
- * @brief Configure PLLI2S used for I2S1 domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLR can be written only when PLLI2S is disabled
- * @note This can be selected for I2S
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_I2S\n
- * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_I2S\n
- * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_I2S\n
- * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_I2S\n
- * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_I2S\n
- * PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_ConfigDomain_I2S
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
- *
- * (*) value not defined in all devices.
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- * @param PLLN Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SR_DIV_2
- * @arg @ref LL_RCC_PLLI2SR_DIV_3
- * @arg @ref LL_RCC_PLLI2SR_DIV_4
- * @arg @ref LL_RCC_PLLI2SR_DIV_5
- * @arg @ref LL_RCC_PLLI2SR_DIV_6
- * @arg @ref LL_RCC_PLLI2SR_DIV_7
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
- MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
- MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
-}
-
-/**
- * @brief Get I2SPLL multiplication factor for VCO
- * @rmtoll PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_GetN
- * @retval Between 50/192(*) and 432
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetN(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
-}
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ)
-/**
- * @brief Get I2SPLL division factor for PLLI2SQ
- * @rmtoll PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_GetQ
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SQ_DIV_2
- * @arg @ref LL_RCC_PLLI2SQ_DIV_3
- * @arg @ref LL_RCC_PLLI2SQ_DIV_4
- * @arg @ref LL_RCC_PLLI2SQ_DIV_5
- * @arg @ref LL_RCC_PLLI2SQ_DIV_6
- * @arg @ref LL_RCC_PLLI2SQ_DIV_7
- * @arg @ref LL_RCC_PLLI2SQ_DIV_8
- * @arg @ref LL_RCC_PLLI2SQ_DIV_9
- * @arg @ref LL_RCC_PLLI2SQ_DIV_10
- * @arg @ref LL_RCC_PLLI2SQ_DIV_11
- * @arg @ref LL_RCC_PLLI2SQ_DIV_12
- * @arg @ref LL_RCC_PLLI2SQ_DIV_13
- * @arg @ref LL_RCC_PLLI2SQ_DIV_14
- * @arg @ref LL_RCC_PLLI2SQ_DIV_15
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SQ));
-}
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ */
-
-/**
- * @brief Get I2SPLL division factor for PLLI2SR
- * @note used for PLLI2SCLK (I2S clock)
- * @rmtoll PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_GetR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SR_DIV_2
- * @arg @ref LL_RCC_PLLI2SR_DIV_3
- * @arg @ref LL_RCC_PLLI2SR_DIV_4
- * @arg @ref LL_RCC_PLLI2SR_DIV_5
- * @arg @ref LL_RCC_PLLI2SR_DIV_6
- * @arg @ref LL_RCC_PLLI2SR_DIV_7
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
-}
-
-#if defined(RCC_PLLI2SCFGR_PLLI2SP)
-/**
- * @brief Get I2SPLL division factor for PLLI2SP
- * @note used for PLLSPDIFRXCLK (SPDIFRX clock)
- * @rmtoll PLLI2SCFGR PLLI2SP LL_RCC_PLLI2S_GetP
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SP_DIV_2
- * @arg @ref LL_RCC_PLLI2SP_DIV_4
- * @arg @ref LL_RCC_PLLI2SP_DIV_6
- * @arg @ref LL_RCC_PLLI2SP_DIV_8
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetP(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SP));
-}
-#endif /* RCC_PLLI2SCFGR_PLLI2SP */
-
-#if defined(RCC_DCKCFGR_PLLI2SDIVQ)
-/**
- * @brief Get I2SPLL division factor for PLLI2SDIVQ
- * @note used PLLSAICLK selected (SAI clock)
- * @rmtoll DCKCFGR PLLI2SDIVQ LL_RCC_PLLI2S_GetDIVQ
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31
- * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDIVQ(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVQ));
-}
-#endif /* RCC_DCKCFGR_PLLI2SDIVQ */
-
-#if defined(RCC_DCKCFGR_PLLI2SDIVR)
-/**
- * @brief Get I2SPLL division factor for PLLI2SDIVR
- * @note used PLLSAICLK selected (SAI clock)
- * @rmtoll DCKCFGR PLLI2SDIVR LL_RCC_PLLI2S_GetDIVR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30
- * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDIVR(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVR));
-}
-#endif /* RCC_DCKCFGR_PLLI2SDIVR */
-
-/**
- * @brief Get division factor for PLLI2S input clock
- * @rmtoll PLLCFGR PLLM LL_RCC_PLLI2S_GetDivider\n
- * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_GetDivider
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLI2SM_DIV_2
- * @arg @ref LL_RCC_PLLI2SM_DIV_3
- * @arg @ref LL_RCC_PLLI2SM_DIV_4
- * @arg @ref LL_RCC_PLLI2SM_DIV_5
- * @arg @ref LL_RCC_PLLI2SM_DIV_6
- * @arg @ref LL_RCC_PLLI2SM_DIV_7
- * @arg @ref LL_RCC_PLLI2SM_DIV_8
- * @arg @ref LL_RCC_PLLI2SM_DIV_9
- * @arg @ref LL_RCC_PLLI2SM_DIV_10
- * @arg @ref LL_RCC_PLLI2SM_DIV_11
- * @arg @ref LL_RCC_PLLI2SM_DIV_12
- * @arg @ref LL_RCC_PLLI2SM_DIV_13
- * @arg @ref LL_RCC_PLLI2SM_DIV_14
- * @arg @ref LL_RCC_PLLI2SM_DIV_15
- * @arg @ref LL_RCC_PLLI2SM_DIV_16
- * @arg @ref LL_RCC_PLLI2SM_DIV_17
- * @arg @ref LL_RCC_PLLI2SM_DIV_18
- * @arg @ref LL_RCC_PLLI2SM_DIV_19
- * @arg @ref LL_RCC_PLLI2SM_DIV_20
- * @arg @ref LL_RCC_PLLI2SM_DIV_21
- * @arg @ref LL_RCC_PLLI2SM_DIV_22
- * @arg @ref LL_RCC_PLLI2SM_DIV_23
- * @arg @ref LL_RCC_PLLI2SM_DIV_24
- * @arg @ref LL_RCC_PLLI2SM_DIV_25
- * @arg @ref LL_RCC_PLLI2SM_DIV_26
- * @arg @ref LL_RCC_PLLI2SM_DIV_27
- * @arg @ref LL_RCC_PLLI2SM_DIV_28
- * @arg @ref LL_RCC_PLLI2SM_DIV_29
- * @arg @ref LL_RCC_PLLI2SM_DIV_30
- * @arg @ref LL_RCC_PLLI2SM_DIV_31
- * @arg @ref LL_RCC_PLLI2SM_DIV_32
- * @arg @ref LL_RCC_PLLI2SM_DIV_33
- * @arg @ref LL_RCC_PLLI2SM_DIV_34
- * @arg @ref LL_RCC_PLLI2SM_DIV_35
- * @arg @ref LL_RCC_PLLI2SM_DIV_36
- * @arg @ref LL_RCC_PLLI2SM_DIV_37
- * @arg @ref LL_RCC_PLLI2SM_DIV_38
- * @arg @ref LL_RCC_PLLI2SM_DIV_39
- * @arg @ref LL_RCC_PLLI2SM_DIV_40
- * @arg @ref LL_RCC_PLLI2SM_DIV_41
- * @arg @ref LL_RCC_PLLI2SM_DIV_42
- * @arg @ref LL_RCC_PLLI2SM_DIV_43
- * @arg @ref LL_RCC_PLLI2SM_DIV_44
- * @arg @ref LL_RCC_PLLI2SM_DIV_45
- * @arg @ref LL_RCC_PLLI2SM_DIV_46
- * @arg @ref LL_RCC_PLLI2SM_DIV_47
- * @arg @ref LL_RCC_PLLI2SM_DIV_48
- * @arg @ref LL_RCC_PLLI2SM_DIV_49
- * @arg @ref LL_RCC_PLLI2SM_DIV_50
- * @arg @ref LL_RCC_PLLI2SM_DIV_51
- * @arg @ref LL_RCC_PLLI2SM_DIV_52
- * @arg @ref LL_RCC_PLLI2SM_DIV_53
- * @arg @ref LL_RCC_PLLI2SM_DIV_54
- * @arg @ref LL_RCC_PLLI2SM_DIV_55
- * @arg @ref LL_RCC_PLLI2SM_DIV_56
- * @arg @ref LL_RCC_PLLI2SM_DIV_57
- * @arg @ref LL_RCC_PLLI2SM_DIV_58
- * @arg @ref LL_RCC_PLLI2SM_DIV_59
- * @arg @ref LL_RCC_PLLI2SM_DIV_60
- * @arg @ref LL_RCC_PLLI2SM_DIV_61
- * @arg @ref LL_RCC_PLLI2SM_DIV_62
- * @arg @ref LL_RCC_PLLI2SM_DIV_63
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDivider(void)
-{
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM));
-#else
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
-}
-
-/**
- * @brief Get the oscillator used as PLL clock source.
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_GetMainSource\n
- * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_GetMainSource
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetMainSource(void)
-{
-#if defined(RCC_PLLI2SCFGR_PLLI2SSRC)
- uint32_t pllsrc = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC);
- uint32_t plli2sssrc0 = READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SSRC);
- uint32_t plli2sssrc1 = READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SSRC) >> 15U;
- return (uint32_t)(pllsrc | plli2sssrc0 | plli2sssrc1);
-#else
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC));
-#endif /* RCC_PLLI2SCFGR_PLLI2SSRC */
-}
-
-/**
- * @}
- */
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/** @defgroup RCC_LL_EF_PLLSAI PLLSAI
- * @{
- */
-
-/**
- * @brief Enable PLLSAI
- * @rmtoll CR PLLSAION LL_RCC_PLLSAI_Enable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLSAI_Enable(void)
-{
- SET_BIT(RCC->CR, RCC_CR_PLLSAION);
-}
-
-/**
- * @brief Disable PLLSAI
- * @rmtoll CR PLLSAION LL_RCC_PLLSAI_Disable
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLSAI_Disable(void)
-{
- CLEAR_BIT(RCC->CR, RCC_CR_PLLSAION);
-}
-
-/**
- * @brief Check if PLLSAI Ready
- * @rmtoll CR PLLSAIRDY LL_RCC_PLLSAI_IsReady
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_IsReady(void)
-{
- return (READ_BIT(RCC->CR, RCC_CR_PLLSAIRDY) == (RCC_CR_PLLSAIRDY));
-}
-
-/**
- * @brief Configure PLLSAI used for SAI domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLQ can be written only when PLLSAI is disabled
- * @note This can be selected for SAI
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_SAI\n
- * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_SAI\n
- * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_ConfigDomain_SAI\n
- * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_SAI\n
- * PLLSAICFGR PLLSAIQ LL_RCC_PLLSAI_ConfigDomain_SAI\n
- * DCKCFGR PLLSAIDIVQ LL_RCC_PLLSAI_ConfigDomain_SAI
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param PLLN Between 49/50(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLQ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIQ_DIV_15
- * @param PLLDIVQ This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ, uint32_t PLLDIVQ)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
-#if defined(RCC_PLLSAICFGR_PLLSAIM)
- MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLSAICFGR_PLLSAIM */
- MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIQ, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLQ);
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVQ, PLLDIVQ);
-}
-
-#if defined(RCC_PLLSAICFGR_PLLSAIP)
-/**
- * @brief Configure PLLSAI used for 48Mhz domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLP can be written only when PLLSAI is disabled
- * @note This can be selected for USB, RNG, SDIO
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_48M\n
- * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_48M\n
- * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_ConfigDomain_48M\n
- * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_48M\n
- * PLLSAICFGR PLLSAIP LL_RCC_PLLSAI_ConfigDomain_48M
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param PLLN Between 50 and 432
- * @param PLLP This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIP_DIV_2
- * @arg @ref LL_RCC_PLLSAIP_DIV_4
- * @arg @ref LL_RCC_PLLSAIP_DIV_6
- * @arg @ref LL_RCC_PLLSAIP_DIV_8
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
-#if defined(RCC_PLLSAICFGR_PLLSAIM)
- MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM, PLLM);
-#else
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
-#endif /* RCC_PLLSAICFGR_PLLSAIM */
- MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIP, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLP);
-}
-#endif /* RCC_PLLSAICFGR_PLLSAIP */
-
-#if defined(LTDC)
-/**
- * @brief Configure PLLSAI used for LTDC domain clock
- * @note PLL Source and PLLM Divider can be written only when PLL,
- * PLLI2S and PLLSAI(*) are disabled
- * @note PLLN/PLLR can be written only when PLLSAI is disabled
- * @note This can be selected for LTDC
- * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_LTDC\n
- * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_LTDC\n
- * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_LTDC\n
- * PLLSAICFGR PLLSAIR LL_RCC_PLLSAI_ConfigDomain_LTDC\n
- * DCKCFGR PLLSAIDIVR LL_RCC_PLLSAI_ConfigDomain_LTDC
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSOURCE_HSI
- * @arg @ref LL_RCC_PLLSOURCE_HSE
- * @param PLLM This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- * @param PLLN Between 49/50(*) and 432
- *
- * (*) value not defined in all devices.
- * @param PLLR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIR_DIV_2
- * @arg @ref LL_RCC_PLLSAIR_DIV_3
- * @arg @ref LL_RCC_PLLSAIR_DIV_4
- * @arg @ref LL_RCC_PLLSAIR_DIV_5
- * @arg @ref LL_RCC_PLLSAIR_DIV_6
- * @arg @ref LL_RCC_PLLSAIR_DIV_7
- * @param PLLDIVR This parameter can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLDIVR)
-{
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);
- MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIR, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLR);
- MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVR, PLLDIVR);
-}
-#endif /* LTDC */
-
-/**
- * @brief Get division factor for PLLSAI input clock
- * @rmtoll PLLCFGR PLLM LL_RCC_PLLSAI_GetDivider\n
- * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_GetDivider
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIM_DIV_2
- * @arg @ref LL_RCC_PLLSAIM_DIV_3
- * @arg @ref LL_RCC_PLLSAIM_DIV_4
- * @arg @ref LL_RCC_PLLSAIM_DIV_5
- * @arg @ref LL_RCC_PLLSAIM_DIV_6
- * @arg @ref LL_RCC_PLLSAIM_DIV_7
- * @arg @ref LL_RCC_PLLSAIM_DIV_8
- * @arg @ref LL_RCC_PLLSAIM_DIV_9
- * @arg @ref LL_RCC_PLLSAIM_DIV_10
- * @arg @ref LL_RCC_PLLSAIM_DIV_11
- * @arg @ref LL_RCC_PLLSAIM_DIV_12
- * @arg @ref LL_RCC_PLLSAIM_DIV_13
- * @arg @ref LL_RCC_PLLSAIM_DIV_14
- * @arg @ref LL_RCC_PLLSAIM_DIV_15
- * @arg @ref LL_RCC_PLLSAIM_DIV_16
- * @arg @ref LL_RCC_PLLSAIM_DIV_17
- * @arg @ref LL_RCC_PLLSAIM_DIV_18
- * @arg @ref LL_RCC_PLLSAIM_DIV_19
- * @arg @ref LL_RCC_PLLSAIM_DIV_20
- * @arg @ref LL_RCC_PLLSAIM_DIV_21
- * @arg @ref LL_RCC_PLLSAIM_DIV_22
- * @arg @ref LL_RCC_PLLSAIM_DIV_23
- * @arg @ref LL_RCC_PLLSAIM_DIV_24
- * @arg @ref LL_RCC_PLLSAIM_DIV_25
- * @arg @ref LL_RCC_PLLSAIM_DIV_26
- * @arg @ref LL_RCC_PLLSAIM_DIV_27
- * @arg @ref LL_RCC_PLLSAIM_DIV_28
- * @arg @ref LL_RCC_PLLSAIM_DIV_29
- * @arg @ref LL_RCC_PLLSAIM_DIV_30
- * @arg @ref LL_RCC_PLLSAIM_DIV_31
- * @arg @ref LL_RCC_PLLSAIM_DIV_32
- * @arg @ref LL_RCC_PLLSAIM_DIV_33
- * @arg @ref LL_RCC_PLLSAIM_DIV_34
- * @arg @ref LL_RCC_PLLSAIM_DIV_35
- * @arg @ref LL_RCC_PLLSAIM_DIV_36
- * @arg @ref LL_RCC_PLLSAIM_DIV_37
- * @arg @ref LL_RCC_PLLSAIM_DIV_38
- * @arg @ref LL_RCC_PLLSAIM_DIV_39
- * @arg @ref LL_RCC_PLLSAIM_DIV_40
- * @arg @ref LL_RCC_PLLSAIM_DIV_41
- * @arg @ref LL_RCC_PLLSAIM_DIV_42
- * @arg @ref LL_RCC_PLLSAIM_DIV_43
- * @arg @ref LL_RCC_PLLSAIM_DIV_44
- * @arg @ref LL_RCC_PLLSAIM_DIV_45
- * @arg @ref LL_RCC_PLLSAIM_DIV_46
- * @arg @ref LL_RCC_PLLSAIM_DIV_47
- * @arg @ref LL_RCC_PLLSAIM_DIV_48
- * @arg @ref LL_RCC_PLLSAIM_DIV_49
- * @arg @ref LL_RCC_PLLSAIM_DIV_50
- * @arg @ref LL_RCC_PLLSAIM_DIV_51
- * @arg @ref LL_RCC_PLLSAIM_DIV_52
- * @arg @ref LL_RCC_PLLSAIM_DIV_53
- * @arg @ref LL_RCC_PLLSAIM_DIV_54
- * @arg @ref LL_RCC_PLLSAIM_DIV_55
- * @arg @ref LL_RCC_PLLSAIM_DIV_56
- * @arg @ref LL_RCC_PLLSAIM_DIV_57
- * @arg @ref LL_RCC_PLLSAIM_DIV_58
- * @arg @ref LL_RCC_PLLSAIM_DIV_59
- * @arg @ref LL_RCC_PLLSAIM_DIV_60
- * @arg @ref LL_RCC_PLLSAIM_DIV_61
- * @arg @ref LL_RCC_PLLSAIM_DIV_62
- * @arg @ref LL_RCC_PLLSAIM_DIV_63
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDivider(void)
-{
-#if defined(RCC_PLLSAICFGR_PLLSAIM)
- return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM));
-#else
- return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
-#endif /* RCC_PLLSAICFGR_PLLSAIM */
-}
-
-/**
- * @brief Get SAIPLL multiplication factor for VCO
- * @rmtoll PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_GetN
- * @retval Between 49/50(*) and 432
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetN(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN) >> RCC_PLLSAICFGR_PLLSAIN_Pos);
-}
-
-/**
- * @brief Get SAIPLL division factor for PLLSAIQ
- * @rmtoll PLLSAICFGR PLLSAIQ LL_RCC_PLLSAI_GetQ
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIQ_DIV_15
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetQ(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIQ));
-}
-
-#if defined(RCC_PLLSAICFGR_PLLSAIR)
-/**
- * @brief Get SAIPLL division factor for PLLSAIR
- * @note used for PLLSAICLK (SAI clock)
- * @rmtoll PLLSAICFGR PLLSAIR LL_RCC_PLLSAI_GetR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIR_DIV_2
- * @arg @ref LL_RCC_PLLSAIR_DIV_3
- * @arg @ref LL_RCC_PLLSAIR_DIV_4
- * @arg @ref LL_RCC_PLLSAIR_DIV_5
- * @arg @ref LL_RCC_PLLSAIR_DIV_6
- * @arg @ref LL_RCC_PLLSAIR_DIV_7
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetR(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIR));
-}
-#endif /* RCC_PLLSAICFGR_PLLSAIR */
-
-#if defined(RCC_PLLSAICFGR_PLLSAIP)
-/**
- * @brief Get SAIPLL division factor for PLLSAIP
- * @note used for PLL48MCLK (48M domain clock)
- * @rmtoll PLLSAICFGR PLLSAIP LL_RCC_PLLSAI_GetP
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIP_DIV_2
- * @arg @ref LL_RCC_PLLSAIP_DIV_4
- * @arg @ref LL_RCC_PLLSAIP_DIV_6
- * @arg @ref LL_RCC_PLLSAIP_DIV_8
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetP(void)
-{
- return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIP));
-}
-#endif /* RCC_PLLSAICFGR_PLLSAIP */
-
-/**
- * @brief Get SAIPLL division factor for PLLSAIDIVQ
- * @note used PLLSAICLK selected (SAI clock)
- * @rmtoll DCKCFGR PLLSAIDIVQ LL_RCC_PLLSAI_GetDIVQ
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
- * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDIVQ(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVQ));
-}
-
-#if defined(RCC_DCKCFGR_PLLSAIDIVR)
-/**
- * @brief Get SAIPLL division factor for PLLSAIDIVR
- * @note used for LTDC domain clock
- * @rmtoll DCKCFGR PLLSAIDIVR LL_RCC_PLLSAI_GetDIVR
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
- * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
- */
-__STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDIVR(void)
-{
- return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVR));
-}
-#endif /* RCC_DCKCFGR_PLLSAIDIVR */
-
-/**
- * @}
- */
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
- * @{
- */
-
-/**
- * @brief Clear LSI ready interrupt flag
- * @rmtoll CIR LSIRDYC LL_RCC_ClearFlag_LSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC);
-}
-
-/**
- * @brief Clear LSE ready interrupt flag
- * @rmtoll CIR LSERDYC LL_RCC_ClearFlag_LSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_LSERDYC);
-}
-
-/**
- * @brief Clear HSI ready interrupt flag
- * @rmtoll CIR HSIRDYC LL_RCC_ClearFlag_HSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_HSIRDYC);
-}
-
-/**
- * @brief Clear HSE ready interrupt flag
- * @rmtoll CIR HSERDYC LL_RCC_ClearFlag_HSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_HSERDYC);
-}
-
-/**
- * @brief Clear PLL ready interrupt flag
- * @rmtoll CIR PLLRDYC LL_RCC_ClearFlag_PLLRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLRDYC);
-}
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Clear PLLI2S ready interrupt flag
- * @rmtoll CIR PLLI2SRDYC LL_RCC_ClearFlag_PLLI2SRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_PLLI2SRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYC);
-}
-
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Clear PLLSAI ready interrupt flag
- * @rmtoll CIR PLLSAIRDYC LL_RCC_ClearFlag_PLLSAIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_PLLSAIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYC);
-}
-
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @brief Clear Clock security system interrupt flag
- * @rmtoll CIR CSSC LL_RCC_ClearFlag_HSECSS
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_CSSC);
-}
-
-/**
- * @brief Check if LSI ready interrupt occurred or not
- * @rmtoll CIR LSIRDYF LL_RCC_IsActiveFlag_LSIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYF) == (RCC_CIR_LSIRDYF));
-}
-
-/**
- * @brief Check if LSE ready interrupt occurred or not
- * @rmtoll CIR LSERDYF LL_RCC_IsActiveFlag_LSERDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYF) == (RCC_CIR_LSERDYF));
-}
-
-/**
- * @brief Check if HSI ready interrupt occurred or not
- * @rmtoll CIR HSIRDYF LL_RCC_IsActiveFlag_HSIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYF) == (RCC_CIR_HSIRDYF));
-}
-
-/**
- * @brief Check if HSE ready interrupt occurred or not
- * @rmtoll CIR HSERDYF LL_RCC_IsActiveFlag_HSERDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYF) == (RCC_CIR_HSERDYF));
-}
-
-/**
- * @brief Check if PLL ready interrupt occurred or not
- * @rmtoll CIR PLLRDYF LL_RCC_IsActiveFlag_PLLRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYF) == (RCC_CIR_PLLRDYF));
-}
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Check if PLLI2S ready interrupt occurred or not
- * @rmtoll CIR PLLI2SRDYF LL_RCC_IsActiveFlag_PLLI2SRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLI2SRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYF) == (RCC_CIR_PLLI2SRDYF));
-}
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Check if PLLSAI ready interrupt occurred or not
- * @rmtoll CIR PLLSAIRDYF LL_RCC_IsActiveFlag_PLLSAIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLSAIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYF) == (RCC_CIR_PLLSAIRDYF));
-}
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @brief Check if Clock security system interrupt occurred or not
- * @rmtoll CIR CSSF LL_RCC_IsActiveFlag_HSECSS
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_CSSF) == (RCC_CIR_CSSF));
-}
-
-/**
- * @brief Check if RCC flag Independent Watchdog reset is set or not.
- * @rmtoll CSR IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
-}
-
-/**
- * @brief Check if RCC flag Low Power reset is set or not.
- * @rmtoll CSR LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
-}
-
-/**
- * @brief Check if RCC flag Pin reset is set or not.
- * @rmtoll CSR PINRSTF LL_RCC_IsActiveFlag_PINRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
-}
-
-/**
- * @brief Check if RCC flag POR/PDR reset is set or not.
- * @rmtoll CSR PORRSTF LL_RCC_IsActiveFlag_PORRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
-}
-
-/**
- * @brief Check if RCC flag Software reset is set or not.
- * @rmtoll CSR SFTRSTF LL_RCC_IsActiveFlag_SFTRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
-}
-
-/**
- * @brief Check if RCC flag Window Watchdog reset is set or not.
- * @rmtoll CSR WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
-}
-
-#if defined(RCC_CSR_BORRSTF)
-/**
- * @brief Check if RCC flag BOR reset is set or not.
- * @rmtoll CSR BORRSTF LL_RCC_IsActiveFlag_BORRST
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_BORRST(void)
-{
- return (READ_BIT(RCC->CSR, RCC_CSR_BORRSTF) == (RCC_CSR_BORRSTF));
-}
-#endif /* RCC_CSR_BORRSTF */
-
-/**
- * @brief Set RMVF bit to clear the reset flags.
- * @rmtoll CSR RMVF LL_RCC_ClearResetFlags
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_ClearResetFlags(void)
-{
- SET_BIT(RCC->CSR, RCC_CSR_RMVF);
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_IT_Management IT Management
- * @{
- */
-
-/**
- * @brief Enable LSI ready interrupt
- * @rmtoll CIR LSIRDYIE LL_RCC_EnableIT_LSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
-}
-
-/**
- * @brief Enable LSE ready interrupt
- * @rmtoll CIR LSERDYIE LL_RCC_EnableIT_LSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
-}
-
-/**
- * @brief Enable HSI ready interrupt
- * @rmtoll CIR HSIRDYIE LL_RCC_EnableIT_HSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
-}
-
-/**
- * @brief Enable HSE ready interrupt
- * @rmtoll CIR HSERDYIE LL_RCC_EnableIT_HSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
-}
-
-/**
- * @brief Enable PLL ready interrupt
- * @rmtoll CIR PLLRDYIE LL_RCC_EnableIT_PLLRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
-}
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Enable PLLI2S ready interrupt
- * @rmtoll CIR PLLI2SRDYIE LL_RCC_EnableIT_PLLI2SRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_PLLI2SRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE);
-}
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Enable PLLSAI ready interrupt
- * @rmtoll CIR PLLSAIRDYIE LL_RCC_EnableIT_PLLSAIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_EnableIT_PLLSAIRDY(void)
-{
- SET_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE);
-}
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @brief Disable LSI ready interrupt
- * @rmtoll CIR LSIRDYIE LL_RCC_DisableIT_LSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
-}
-
-/**
- * @brief Disable LSE ready interrupt
- * @rmtoll CIR LSERDYIE LL_RCC_DisableIT_LSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
-}
-
-/**
- * @brief Disable HSI ready interrupt
- * @rmtoll CIR HSIRDYIE LL_RCC_DisableIT_HSIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
-}
-
-/**
- * @brief Disable HSE ready interrupt
- * @rmtoll CIR HSERDYIE LL_RCC_DisableIT_HSERDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
-}
-
-/**
- * @brief Disable PLL ready interrupt
- * @rmtoll CIR PLLRDYIE LL_RCC_DisableIT_PLLRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
-}
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Disable PLLI2S ready interrupt
- * @rmtoll CIR PLLI2SRDYIE LL_RCC_DisableIT_PLLI2SRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_PLLI2SRDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE);
-}
-
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Disable PLLSAI ready interrupt
- * @rmtoll CIR PLLSAIRDYIE LL_RCC_DisableIT_PLLSAIRDY
- * @retval None
- */
-__STATIC_INLINE void LL_RCC_DisableIT_PLLSAIRDY(void)
-{
- CLEAR_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE);
-}
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @brief Checks if LSI ready interrupt source is enabled or disabled.
- * @rmtoll CIR LSIRDYIE LL_RCC_IsEnabledIT_LSIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYIE) == (RCC_CIR_LSIRDYIE));
-}
-
-/**
- * @brief Checks if LSE ready interrupt source is enabled or disabled.
- * @rmtoll CIR LSERDYIE LL_RCC_IsEnabledIT_LSERDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYIE) == (RCC_CIR_LSERDYIE));
-}
-
-/**
- * @brief Checks if HSI ready interrupt source is enabled or disabled.
- * @rmtoll CIR HSIRDYIE LL_RCC_IsEnabledIT_HSIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYIE) == (RCC_CIR_HSIRDYIE));
-}
-
-/**
- * @brief Checks if HSE ready interrupt source is enabled or disabled.
- * @rmtoll CIR HSERDYIE LL_RCC_IsEnabledIT_HSERDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYIE) == (RCC_CIR_HSERDYIE));
-}
-
-/**
- * @brief Checks if PLL ready interrupt source is enabled or disabled.
- * @rmtoll CIR PLLRDYIE LL_RCC_IsEnabledIT_PLLRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYIE) == (RCC_CIR_PLLRDYIE));
-}
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Checks if PLLI2S ready interrupt source is enabled or disabled.
- * @rmtoll CIR PLLI2SRDYIE LL_RCC_IsEnabledIT_PLLI2SRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLI2SRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE) == (RCC_CIR_PLLI2SRDYIE));
-}
-
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Checks if PLLSAI ready interrupt source is enabled or disabled.
- * @rmtoll CIR PLLSAIRDYIE LL_RCC_IsEnabledIT_PLLSAIRDY
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLSAIRDY(void)
-{
- return (READ_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE) == (RCC_CIR_PLLSAIRDYIE));
-}
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup RCC_LL_EF_Init De-initialization function
- * @{
- */
-ErrorStatus LL_RCC_DeInit(void);
-/**
- * @}
- */
-
-/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
- * @{
- */
-void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
-#if defined(FMPI2C1)
-uint32_t LL_RCC_GetFMPI2CClockFreq(uint32_t FMPI2CxSource);
-#endif /* FMPI2C1 */
-#if defined(LPTIM1)
-uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource);
-#endif /* LPTIM1 */
-#if defined(SAI1)
-uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource);
-#endif /* SAI1 */
-#if defined(SDIO)
-uint32_t LL_RCC_GetSDIOClockFreq(uint32_t SDIOxSource);
-#endif /* SDIO */
-#if defined(RNG)
-uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource);
-#endif /* RNG */
-#if defined(USB_OTG_FS) || defined(USB_OTG_HS)
-uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
-#endif /* USB_OTG_FS || USB_OTG_HS */
-#if defined(DFSDM1_Channel0)
-uint32_t LL_RCC_GetDFSDMClockFreq(uint32_t DFSDMxSource);
-uint32_t LL_RCC_GetDFSDMAudioClockFreq(uint32_t DFSDMxSource);
-#endif /* DFSDM1_Channel0 */
-uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource);
-#if defined(CEC)
-uint32_t LL_RCC_GetCECClockFreq(uint32_t CECxSource);
-#endif /* CEC */
-#if defined(LTDC)
-uint32_t LL_RCC_GetLTDCClockFreq(uint32_t LTDCxSource);
-#endif /* LTDC */
-#if defined(SPDIFRX)
-uint32_t LL_RCC_GetSPDIFRXClockFreq(uint32_t SPDIFRXxSource);
-#endif /* SPDIFRX */
-#if defined(DSI)
-uint32_t LL_RCC_GetDSIClockFreq(uint32_t DSIxSource);
-#endif /* DSI */
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* defined(RCC) */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_RCC_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h
deleted file mode 100644
index 48bcc1a4c5fb117cf219930fb754a4e7455e7212..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h
+++ /dev/null
@@ -1,1711 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_system.h
- * @author MCD Application Team
- * @brief Header file of SYSTEM LL module.
- *
- ******************************************************************************
- * @attention
- *
- *Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The LL SYSTEM driver contains a set of generic APIs that can be
- used by user:
- (+) Some of the FLASH features need to be handled in the SYSTEM file.
- (+) Access to DBGCMU registers
- (+) Access to SYSCFG registers
-
- @endverbatim
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_SYSTEM_H
-#define __STM32F4xx_LL_SYSTEM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU)
-
-/** @defgroup SYSTEM_LL SYSTEM
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
- * @{
- */
-
-/** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP
-* @{
-*/
-#define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000 /*!< Main Flash memory mapped at 0x00000000 */
-#define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 /*!< System Flash memory mapped at 0x00000000 */
-#if defined(FSMC_Bank1)
-#define LL_SYSCFG_REMAP_FSMC SYSCFG_MEMRMP_MEM_MODE_1 /*!< FSMC(NOR/PSRAM 1 and 2) mapped at 0x00000000 */
-#endif /* FSMC_Bank1 */
-#if defined(FMC_Bank1)
-#define LL_SYSCFG_REMAP_FMC SYSCFG_MEMRMP_MEM_MODE_1 /*!< FMC(NOR/PSRAM 1 and 2) mapped at 0x00000000 */
-#define LL_SYSCFG_REMAP_SDRAM SYSCFG_MEMRMP_MEM_MODE_2 /*!< FMC/SDRAM mapped at 0x00000000 */
-#endif /* FMC_Bank1 */
-#define LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0) /*!< SRAM1 mapped at 0x00000000 */
-
-/**
- * @}
- */
-
-#if defined(SYSCFG_PMC_MII_RMII_SEL)
- /** @defgroup SYSTEM_LL_EC_PMC SYSCFG PMC
-* @{
-*/
-#define LL_SYSCFG_PMC_ETHMII (uint32_t)0x00000000 /*!< ETH Media MII interface */
-#define LL_SYSCFG_PMC_ETHRMII (uint32_t)SYSCFG_PMC_MII_RMII_SEL /*!< ETH Media RMII interface */
-
-/**
- * @}
- */
-#endif /* SYSCFG_PMC_MII_RMII_SEL */
-
-
-
-#if defined(SYSCFG_MEMRMP_UFB_MODE)
-/** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG BANK MODE
- * @{
- */
-#define LL_SYSCFG_BANKMODE_BANK1 (uint32_t)0x00000000 /*!< Flash Bank 1 base address mapped at 0x0800 0000 (AXI) and 0x0020 0000 (TCM)
- and Flash Bank 2 base address mapped at 0x0810 0000 (AXI) and 0x0030 0000 (TCM)*/
-#define LL_SYSCFG_BANKMODE_BANK2 SYSCFG_MEMRMP_UFB_MODE /*!< Flash Bank 2 base address mapped at 0x0800 0000 (AXI) and 0x0020 0000(TCM)
- and Flash Bank 1 base address mapped at 0x0810 0000 (AXI) and 0x0030 0000(TCM) */
-/**
- * @}
- */
-#endif /* SYSCFG_MEMRMP_UFB_MODE */
-/** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
- * @{
- */
-#if defined(SYSCFG_CFGR_FMPI2C1_SCL)
-#define LL_SYSCFG_I2C_FASTMODEPLUS_SCL SYSCFG_CFGR_FMPI2C1_SCL /*!< Enable Fast Mode Plus on FMPI2C_SCL pin */
-#define LL_SYSCFG_I2C_FASTMODEPLUS_SDA SYSCFG_CFGR_FMPI2C1_SDA /*!< Enable Fast Mode Plus on FMPI2C_SDA pin*/
-#endif /* SYSCFG_CFGR_FMPI2C1_SCL */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI PORT
- * @{
- */
-#define LL_SYSCFG_EXTI_PORTA (uint32_t)0 /*!< EXTI PORT A */
-#define LL_SYSCFG_EXTI_PORTB (uint32_t)1 /*!< EXTI PORT B */
-#define LL_SYSCFG_EXTI_PORTC (uint32_t)2 /*!< EXTI PORT C */
-#define LL_SYSCFG_EXTI_PORTD (uint32_t)3 /*!< EXTI PORT D */
-#define LL_SYSCFG_EXTI_PORTE (uint32_t)4 /*!< EXTI PORT E */
-#if defined(GPIOF)
-#define LL_SYSCFG_EXTI_PORTF (uint32_t)5 /*!< EXTI PORT F */
-#endif /* GPIOF */
-#if defined(GPIOG)
-#define LL_SYSCFG_EXTI_PORTG (uint32_t)6 /*!< EXTI PORT G */
-#endif /* GPIOG */
-#define LL_SYSCFG_EXTI_PORTH (uint32_t)7 /*!< EXTI PORT H */
-#if defined(GPIOI)
-#define LL_SYSCFG_EXTI_PORTI (uint32_t)8 /*!< EXTI PORT I */
-#endif /* GPIOI */
-#if defined(GPIOJ)
-#define LL_SYSCFG_EXTI_PORTJ (uint32_t)9 /*!< EXTI PORT J */
-#endif /* GPIOJ */
-#if defined(GPIOK)
-#define LL_SYSCFG_EXTI_PORTK (uint32_t)10 /*!< EXTI PORT k */
-#endif /* GPIOK */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI LINE
- * @{
- */
-#define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16 | 0) /*!< EXTI_POSITION_0 | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16 | 0) /*!< EXTI_POSITION_4 | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16 | 0) /*!< EXTI_POSITION_8 | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16 | 0) /*!< EXTI_POSITION_12 | EXTICR[0] */
-#define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16 | 1) /*!< EXTI_POSITION_0 | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16 | 1) /*!< EXTI_POSITION_4 | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16 | 1) /*!< EXTI_POSITION_8 | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16 | 1) /*!< EXTI_POSITION_12 | EXTICR[1] */
-#define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16 | 2) /*!< EXTI_POSITION_0 | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16 | 2) /*!< EXTI_POSITION_4 | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16 | 2) /*!< EXTI_POSITION_8 | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16 | 2) /*!< EXTI_POSITION_12 | EXTICR[2] */
-#define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16 | 3) /*!< EXTI_POSITION_0 | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16 | 3) /*!< EXTI_POSITION_4 | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16 | 3) /*!< EXTI_POSITION_8 | EXTICR[3] */
-#define LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16 | 3) /*!< EXTI_POSITION_12 | EXTICR[3] */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_TIMBREAK SYSCFG TIMER BREAK
- * @{
- */
-#if defined(SYSCFG_CFGR2_LOCKUP_LOCK)
-#define LL_SYSCFG_TIMBREAK_LOCKUP SYSCFG_CFGR2_LOCKUP_LOCK /*!< Enables and locks the LOCKUP output of CortexM4
- with Break Input of TIM1/8 */
-#define LL_SYSCFG_TIMBREAK_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Enables and locks the PVD connection with TIM1/8 Break Input
- and also the PVDE and PLS bits of the Power Control Interface */
-#endif /* SYSCFG_CFGR2_CLL */
-/**
- * @}
- */
-
-#if defined(SYSCFG_MCHDLYCR_BSCKSEL)
-/** @defgroup SYSTEM_LL_DFSDM_BitStream_ClockSource SYSCFG MCHDLY BCKKSEL
- * @{
- */
-#define LL_SYSCFG_BITSTREAM_CLOCK_TIM2OC1 (uint32_t)0x00000000
-#define LL_SYSCFG_BITSTREAM_CLOCK_DFSDM2 SYSCFG_MCHDLYCR_BSCKSEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM_MCHDLYEN SYSCFG MCHDLY MCHDLYEN
- * @{
- */
-#define LL_SYSCFG_DFSDM1_MCHDLYEN SYSCFG_MCHDLYCR_MCHDLY1EN
-#define LL_SYSCFG_DFSDM2_MCHDLYEN SYSCFG_MCHDLYCR_MCHDLY2EN
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM_DataIn0_Source SYSCFG MCHDLY DFSDMD0SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM1_DataIn0 SYSCFG_MCHDLYCR_DFSDM1D0SEL
-#define LL_SYSCFG_DFSDM2_DataIn0 SYSCFG_MCHDLYCR_DFSDM2D0SEL
-
-#define LL_SYSCFG_DFSDM1_DataIn0_PAD (uint32_t)((SYSCFG_MCHDLYCR_DFSDM1D0SEL << 16) | 0x00000000)
-#define LL_SYSCFG_DFSDM1_DataIn0_DM (uint32_t)((SYSCFG_MCHDLYCR_DFSDM1D0SEL << 16) | SYSCFG_MCHDLYCR_DFSDM1D0SEL)
-#define LL_SYSCFG_DFSDM2_DataIn0_PAD (uint32_t)((SYSCFG_MCHDLYCR_DFSDM2D0SEL << 16) | 0x00000000)
-#define LL_SYSCFG_DFSDM2_DataIn0_DM (uint32_t)((SYSCFG_MCHDLYCR_DFSDM2D0SEL << 16) | SYSCFG_MCHDLYCR_DFSDM2D0SEL)
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM_DataIn2_Source SYSCFG MCHDLY DFSDMD2SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM1_DataIn2 SYSCFG_MCHDLYCR_DFSDM1D2SEL
-#define LL_SYSCFG_DFSDM2_DataIn2 SYSCFG_MCHDLYCR_DFSDM2D2SEL
-
-#define LL_SYSCFG_DFSDM1_DataIn2_PAD (uint32_t)((SYSCFG_MCHDLYCR_DFSDM1D2SEL << 16) | 0x00000000)
-#define LL_SYSCFG_DFSDM1_DataIn2_DM (uint32_t)((SYSCFG_MCHDLYCR_DFSDM1D2SEL << 16) | SYSCFG_MCHDLYCR_DFSDM1D2SEL)
-#define LL_SYSCFG_DFSDM2_DataIn2_PAD (uint32_t)((SYSCFG_MCHDLYCR_DFSDM2D2SEL << 16) | 0x00000000)
-#define LL_SYSCFG_DFSDM2_DataIn2_DM (uint32_t)((SYSCFG_MCHDLYCR_DFSDM2D2SEL << 16) | SYSCFG_MCHDLYCR_DFSDM2D2SEL)
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM1_TIM4OC2_BitstreamDistribution SYSCFG MCHDLY DFSDM1CK02SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN0 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN2 SYSCFG_MCHDLYCR_DFSDM1CK02SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM1_TIM4OC1_BitstreamDistribution SYSCFG MCHDLY DFSDM1CK13SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN1 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN3 SYSCFG_MCHDLYCR_DFSDM1CK13SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM1_CLKIN_SourceSelection SYSCFG MCHDLY DFSDMCFG
- * @{
- */
-#define LL_SYSCFG_DFSDM1_CKIN_PAD (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM1_CKIN_DM SYSCFG_MCHDLYCR_DFSDM1CFG
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM1_CLKOUT_SourceSelection SYSCFG MCHDLY DFSDM1CKOSEL
- * @{
- */
-#define LL_SYSCFG_DFSDM1_CKOUT (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM1_CKOUT_M27 SYSCFG_MCHDLYCR_DFSDM1CKOSEL
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_DFSDM2_DataIn4_SourceSelection SYSCFG MCHDLY DFSDM2D4SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_DataIn4_PAD (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_DataIn4_DM SYSCFG_MCHDLYCR_DFSDM2D4SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_DataIn6_SourceSelection SYSCFG MCHDLY DFSDM2D6SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_DataIn6_PAD (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_DataIn6_DM SYSCFG_MCHDLYCR_DFSDM2D6SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_TIM3OC4_BitstreamDistribution SYSCFG MCHDLY DFSDM2CK04SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN0 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN4 SYSCFG_MCHDLYCR_DFSDM2CK04SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_TIM3OC3_BitstreamDistribution SYSCFG MCHDLY DFSDM2CK15SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN1 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN5 SYSCFG_MCHDLYCR_DFSDM2CK15SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_TIM3OC2_BitstreamDistribution SYSCFG MCHDLY DFSDM2CK26SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN2 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN6 SYSCFG_MCHDLYCR_DFSDM2CK26SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_TIM3OC1_BitstreamDistribution SYSCFG MCHDLY DFSDM2CK37SEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN3 (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN7 SYSCFG_MCHDLYCR_DFSDM2CK37SEL
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_CLKIN_SourceSelection SYSCFG MCHDLY DFSDM2CFG
- * @{
- */
-#define LL_SYSCFG_DFSDM2_CKIN_PAD (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_CKIN_DM SYSCFG_MCHDLYCR_DFSDM2CFG
-/**
- * @}
- */
-/** @defgroup SYSTEM_LL_DFSDM2_CLKOUT_SourceSelection SYSCFG MCHDLY DFSDM2CKOSEL
- * @{
- */
-#define LL_SYSCFG_DFSDM2_CKOUT (uint32_t)0x00000000
-#define LL_SYSCFG_DFSDM2_CKOUT_M27 SYSCFG_MCHDLYCR_DFSDM2CKOSEL
-/**
- * @}
- */
-#endif /* SYSCFG_MCHDLYCR_BSCKSEL */
-
-/** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment
- * @{
- */
-#define LL_DBGMCU_TRACE_NONE 0x00000000U /*!< TRACE pins not assigned (default state) */
-#define LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN /*!< TRACE pin assignment for Asynchronous Mode */
-#define LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_0) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 */
-#define LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_1) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 */
-#define LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
- * @{
- */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM2_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM2_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM3_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM3_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM4_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP /*!< TIM4 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM4_STOP */
-#define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP /*!< TIM5 counter stopped when core is halted */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM6_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP /*!< TIM6 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM6_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM7_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< TIM7 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM7_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM12_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM12_STOP DBGMCU_APB1_FZ_DBG_TIM12_STOP /*!< TIM12 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM12_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM13_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM13_STOP DBGMCU_APB1_FZ_DBG_TIM13_STOP /*!< TIM13 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM13_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_TIM14_STOP)
-#define LL_DBGMCU_APB1_GRP1_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP /*!< TIM14 counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_TIM14_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_LPTIM_STOP)
-#define LL_DBGMCU_APB1_GRP1_LPTIM_STOP DBGMCU_APB1_FZ_DBG_LPTIM_STOP /*!< LPTIM counter stopped when core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_LPTIM_STOP */
-#define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP /*!< RTC counter stopped when core is halted */
-#define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP /*!< Debug Window Watchdog stopped when Core is halted */
-#define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP /*!< Debug Independent Watchdog stopped when Core is halted */
-#define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
-#define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT /*!< I2C2 SMBUS timeout mode stopped when Core is halted */
-#if defined(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)
-#define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT /*!< I2C3 SMBUS timeout mode stopped when Core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT */
-#if defined(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT)
-#define LL_DBGMCU_APB1_GRP1_I2C4_STOP DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT /*!< I2C4 SMBUS timeout mode stopped when Core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT */
-#if defined(DBGMCU_APB1_FZ_DBG_CAN1_STOP)
-#define LL_DBGMCU_APB1_GRP1_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP /*!< CAN1 debug stopped when Core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_CAN1_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_CAN2_STOP)
-#define LL_DBGMCU_APB1_GRP1_CAN2_STOP DBGMCU_APB1_FZ_DBG_CAN2_STOP /*!< CAN2 debug stopped when Core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_CAN2_STOP */
-#if defined(DBGMCU_APB1_FZ_DBG_CAN3_STOP)
-#define LL_DBGMCU_APB1_GRP1_CAN3_STOP DBGMCU_APB1_FZ_DBG_CAN3_STOP /*!< CAN3 debug stopped when Core is halted */
-#endif /* DBGMCU_APB1_FZ_DBG_CAN3_STOP */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
- * @{
- */
-#define LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP /*!< TIM1 counter stopped when core is halted */
-#if defined(DBGMCU_APB2_FZ_DBG_TIM8_STOP)
-#define LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2_FZ_DBG_TIM8_STOP /*!< TIM8 counter stopped when core is halted */
-#endif /* DBGMCU_APB2_FZ_DBG_TIM8_STOP */
-#define LL_DBGMCU_APB2_GRP1_TIM9_STOP DBGMCU_APB2_FZ_DBG_TIM9_STOP /*!< TIM9 counter stopped when core is halted */
-#if defined(DBGMCU_APB2_FZ_DBG_TIM10_STOP)
-#define LL_DBGMCU_APB2_GRP1_TIM10_STOP DBGMCU_APB2_FZ_DBG_TIM10_STOP /*!< TIM10 counter stopped when core is halted */
-#endif /* DBGMCU_APB2_FZ_DBG_TIM10_STOP */
-#define LL_DBGMCU_APB2_GRP1_TIM11_STOP DBGMCU_APB2_FZ_DBG_TIM11_STOP /*!< TIM11 counter stopped when core is halted */
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
- * @{
- */
-#define LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero wait state */
-#define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One wait state */
-#define LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two wait states */
-#define LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three wait states */
-#define LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four wait states */
-#define LL_FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH five wait state */
-#define LL_FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH six wait state */
-#define LL_FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH seven wait states */
-#define LL_FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH eight wait states */
-#define LL_FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH nine wait states */
-#define LL_FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH ten wait states */
-#define LL_FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH eleven wait states */
-#define LL_FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH twelve wait states */
-#define LL_FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH thirteen wait states */
-#define LL_FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH fourteen wait states */
-#define LL_FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH fifteen wait states */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
- * @{
- */
-
-/** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG
- * @{
- */
-/**
- * @brief Set memory mapping at address 0x00000000
- * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory
- * @param Memory This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_REMAP_FLASH
- * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
- * @arg @ref LL_SYSCFG_REMAP_SRAM
- * @arg @ref LL_SYSCFG_REMAP_FSMC (*)
- * @arg @ref LL_SYSCFG_REMAP_FMC (*)
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
-{
- MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, Memory);
-}
-
-/**
- * @brief Get memory mapping at address 0x00000000
- * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_REMAP_FLASH
- * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
- * @arg @ref LL_SYSCFG_REMAP_SRAM
- * @arg @ref LL_SYSCFG_REMAP_FSMC (*)
- * @arg @ref LL_SYSCFG_REMAP_FMC (*)
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE));
-}
-
-#if defined(SYSCFG_MEMRMP_SWP_FMC)
-/**
- * @brief Enables the FMC Memory Mapping Swapping
- * @rmtoll SYSCFG_MEMRMP SWP_FMC LL_SYSCFG_EnableFMCMemorySwapping
- * @note SDRAM is accessible at 0x60000000 and NOR/RAM
- * is accessible at 0xC0000000
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_EnableFMCMemorySwapping(void)
-{
- SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_SWP_FMC_0);
-}
-
-/**
- * @brief Disables the FMC Memory Mapping Swapping
- * @rmtoll SYSCFG_MEMRMP SWP_FMC LL_SYSCFG_DisableFMCMemorySwapping
- * @note SDRAM is accessible at 0xC0000000 (default mapping)
- * and NOR/RAM is accessible at 0x60000000 (default mapping)
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DisableFMCMemorySwapping(void)
-{
- CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_SWP_FMC);
-}
-
-#endif /* SYSCFG_MEMRMP_SWP_FMC */
-/**
- * @brief Enables the Compensation cell Power Down
- * @rmtoll SYSCFG_CMPCR CMP_PD LL_SYSCFG_EnableCompensationCell
- * @note The I/O compensation cell can be used only when the device supply
- * voltage ranges from 2.4 to 3.6 V
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_EnableCompensationCell(void)
-{
- SET_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD);
-}
-
-/**
- * @brief Disables the Compensation cell Power Down
- * @rmtoll SYSCFG_CMPCR CMP_PD LL_SYSCFG_DisableCompensationCell
- * @note The I/O compensation cell can be used only when the device supply
- * voltage ranges from 2.4 to 3.6 V
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DisableCompensationCell(void)
-{
- CLEAR_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD);
-}
-
-/**
- * @brief Get Compensation Cell ready Flag
- * @rmtoll SYSCFG_CMPCR READY LL_SYSCFG_IsActiveFlag_CMPCR
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_CMPCR(void)
-{
- return (READ_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_READY) == (SYSCFG_CMPCR_READY));
-}
-
-#if defined(SYSCFG_PMC_MII_RMII_SEL)
-/**
- * @brief Select Ethernet PHY interface
- * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_SetPHYInterface
- * @param Interface This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_PMC_ETHMII
- * @arg @ref LL_SYSCFG_PMC_ETHRMII
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_SetPHYInterface(uint32_t Interface)
-{
- MODIFY_REG(SYSCFG->PMC, SYSCFG_PMC_MII_RMII_SEL, Interface);
-}
-
-/**
- * @brief Get Ethernet PHY interface
- * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_GetPHYInterface
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_PMC_ETHMII
- * @arg @ref LL_SYSCFG_PMC_ETHRMII
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetPHYInterface(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->PMC, SYSCFG_PMC_MII_RMII_SEL));
-}
-#endif /* SYSCFG_PMC_MII_RMII_SEL */
-
-
-
-#if defined(SYSCFG_MEMRMP_UFB_MODE)
-/**
- * @brief Select Flash bank mode (Bank flashed at 0x08000000)
- * @rmtoll SYSCFG_MEMRMP UFB_MODE LL_SYSCFG_SetFlashBankMode
- * @param Bank This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_BANKMODE_BANK1
- * @arg @ref LL_SYSCFG_BANKMODE_BANK2
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank)
-{
- MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_UFB_MODE, Bank);
-}
-
-/**
- * @brief Get Flash bank mode (Bank flashed at 0x08000000)
- * @rmtoll SYSCFG_MEMRMP UFB_MODE LL_SYSCFG_GetFlashBankMode
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_BANKMODE_BANK1
- * @arg @ref LL_SYSCFG_BANKMODE_BANK2
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_UFB_MODE));
-}
-#endif /* SYSCFG_MEMRMP_UFB_MODE */
-
-#if defined(SYSCFG_CFGR_FMPI2C1_SCL)
-/**
- * @brief Enable the I2C fast mode plus driving capability.
- * @rmtoll SYSCFG_CFGR FMPI2C1_SCL LL_SYSCFG_EnableFastModePlus\n
- * SYSCFG_CFGR FMPI2C1_SDA LL_SYSCFG_EnableFastModePlus
- * @param ConfigFastModePlus This parameter can be a combination of the following values:
- * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_SCL
- * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_SDA
- * (*) value not defined in all devices
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
-{
- SET_BIT(SYSCFG->CFGR, ConfigFastModePlus);
-}
-
-/**
- * @brief Disable the I2C fast mode plus driving capability.
- * @rmtoll SYSCFG_CFGR FMPI2C1_SCL LL_SYSCFG_DisableFastModePlus\n
- * SYSCFG_CFGR FMPI2C1_SDA LL_SYSCFG_DisableFastModePlus\n
- * @param ConfigFastModePlus This parameter can be a combination of the following values:
- * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_SCL
- * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_SDA
- * (*) value not defined in all devices
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
-{
- CLEAR_BIT(SYSCFG->CFGR, ConfigFastModePlus);
-}
-#endif /* SYSCFG_CFGR_FMPI2C1_SCL */
-
-/**
- * @brief Configure source input for the EXTI external interrupt.
- * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource\n
- * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource\n
- * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource\n
- * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource
- * @param Port This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_EXTI_PORTA
- * @arg @ref LL_SYSCFG_EXTI_PORTB
- * @arg @ref LL_SYSCFG_EXTI_PORTC
- * @arg @ref LL_SYSCFG_EXTI_PORTD
- * @arg @ref LL_SYSCFG_EXTI_PORTE
- * @arg @ref LL_SYSCFG_EXTI_PORTF (*)
- * @arg @ref LL_SYSCFG_EXTI_PORTG (*)
- * @arg @ref LL_SYSCFG_EXTI_PORTH
- *
- * (*) value not defined in all devices
- * @param Line This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_EXTI_LINE0
- * @arg @ref LL_SYSCFG_EXTI_LINE1
- * @arg @ref LL_SYSCFG_EXTI_LINE2
- * @arg @ref LL_SYSCFG_EXTI_LINE3
- * @arg @ref LL_SYSCFG_EXTI_LINE4
- * @arg @ref LL_SYSCFG_EXTI_LINE5
- * @arg @ref LL_SYSCFG_EXTI_LINE6
- * @arg @ref LL_SYSCFG_EXTI_LINE7
- * @arg @ref LL_SYSCFG_EXTI_LINE8
- * @arg @ref LL_SYSCFG_EXTI_LINE9
- * @arg @ref LL_SYSCFG_EXTI_LINE10
- * @arg @ref LL_SYSCFG_EXTI_LINE11
- * @arg @ref LL_SYSCFG_EXTI_LINE12
- * @arg @ref LL_SYSCFG_EXTI_LINE13
- * @arg @ref LL_SYSCFG_EXTI_LINE14
- * @arg @ref LL_SYSCFG_EXTI_LINE15
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line)
-{
- MODIFY_REG(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16), Port << POSITION_VAL((Line >> 16)));
-}
-
-/**
- * @brief Get the configured defined for specific EXTI Line
- * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource\n
- * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource\n
- * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource\n
- * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource
- * @param Line This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_EXTI_LINE0
- * @arg @ref LL_SYSCFG_EXTI_LINE1
- * @arg @ref LL_SYSCFG_EXTI_LINE2
- * @arg @ref LL_SYSCFG_EXTI_LINE3
- * @arg @ref LL_SYSCFG_EXTI_LINE4
- * @arg @ref LL_SYSCFG_EXTI_LINE5
- * @arg @ref LL_SYSCFG_EXTI_LINE6
- * @arg @ref LL_SYSCFG_EXTI_LINE7
- * @arg @ref LL_SYSCFG_EXTI_LINE8
- * @arg @ref LL_SYSCFG_EXTI_LINE9
- * @arg @ref LL_SYSCFG_EXTI_LINE10
- * @arg @ref LL_SYSCFG_EXTI_LINE11
- * @arg @ref LL_SYSCFG_EXTI_LINE12
- * @arg @ref LL_SYSCFG_EXTI_LINE13
- * @arg @ref LL_SYSCFG_EXTI_LINE14
- * @arg @ref LL_SYSCFG_EXTI_LINE15
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_EXTI_PORTA
- * @arg @ref LL_SYSCFG_EXTI_PORTB
- * @arg @ref LL_SYSCFG_EXTI_PORTC
- * @arg @ref LL_SYSCFG_EXTI_PORTD
- * @arg @ref LL_SYSCFG_EXTI_PORTE
- * @arg @ref LL_SYSCFG_EXTI_PORTF (*)
- * @arg @ref LL_SYSCFG_EXTI_PORTG (*)
- * @arg @ref LL_SYSCFG_EXTI_PORTH
- * (*) value not defined in all devices
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line)
-{
- return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16)) >> POSITION_VAL(Line >> 16));
-}
-
-#if defined(SYSCFG_CFGR2_LOCKUP_LOCK)
-/**
- * @brief Set connections to TIM1/8 break inputs
- * @rmtoll SYSCFG_CFGR2 LockUp Lock LL_SYSCFG_SetTIMBreakInputs \n
- * SYSCFG_CFGR2 PVD Lock LL_SYSCFG_SetTIMBreakInputs
- * @param Break This parameter can be a combination of the following values:
- * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP
- * @arg @ref LL_SYSCFG_TIMBREAK_PVD
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_SetTIMBreakInputs(uint32_t Break)
-{
- MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_PVD_LOCK, Break);
-}
-
-/**
- * @brief Get connections to TIM1/8 Break inputs
- * @rmtoll SYSCFG_CFGR2 LockUp Lock LL_SYSCFG_SetTIMBreakInputs \n
- * SYSCFG_CFGR2 PVD Lock LL_SYSCFG_SetTIMBreakInputs
- * @retval Returned value can be can be a combination of the following values:
- * @arg @ref LL_SYSCFG_TIMBREAK_LOCKUP
- * @arg @ref LL_SYSCFG_TIMBREAK_PVD
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_GetTIMBreakInputs(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK | SYSCFG_CFGR2_PVD_LOCK));
-}
-#endif /* SYSCFG_CFGR2_LOCKUP_LOCK */
-#if defined(SYSCFG_MCHDLYCR_BSCKSEL)
-/**
- * @brief Select the DFSDM2 or TIM2_OC1 as clock source for the bitstream clock.
- * @rmtoll SYSCFG_MCHDLYCR BSCKSEL LL_SYSCFG_DFSDM_SetBitstreamClockSourceSelection
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_BITSTREAM_CLOCK_DFSDM2
- * @arg @ref LL_SYSCFG_BITSTREAM_CLOCK_TIM2OC1
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM_SetBitstreamClockSourceSelection(uint32_t ClockSource)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_BSCKSEL, ClockSource);
-}
-/**
- * @brief Get the DFSDM2 or TIM2_OC1 as clock source for the bitstream clock.
- * @rmtoll SYSCFG_MCHDLYCR BSCKSEL LL_SYSCFG_DFSDM_GetBitstreamClockSourceSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_BITSTREAM_CLOCK_DFSDM2
- * @arg @ref LL_SYSCFG_BITSTREAM_CLOCK_TIM2OC1
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM_GetBitstreamClockSourceSelection(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_BSCKSEL));
-}
-/**
- * @brief Enables the DFSDM1 or DFSDM2 Delay clock
- * @rmtoll SYSCFG_MCHDLYCR MCHDLYEN LL_SYSCFG_DFSDM_EnableDelayClock
- * @param MCHDLY This parameter can be one of the following values
- * @arg @ref LL_SYSCFG_DFSDM1_MCHDLYEN
- * @arg @ref LL_SYSCFG_DFSDM2_MCHDLYEN
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM_EnableDelayClock(uint32_t MCHDLY)
-{
- SET_BIT(SYSCFG->MCHDLYCR, MCHDLY);
-}
-
-/**
- * @brief Disables the DFSDM1 or the DFSDM2 Delay clock
- * @rmtoll SYSCFG_MCHDLYCR MCHDLY1EN LL_SYSCFG_DFSDM1_DisableDelayClock
- * @param MCHDLY This parameter can be one of the following values
- * @arg @ref LL_SYSCFG_DFSDM1_MCHDLYEN
- * @arg @ref LL_SYSCFG_DFSDM2_MCHDLYEN
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM_DisableDelayClock(uint32_t MCHDLY)
-{
- CLEAR_BIT(SYSCFG->MCHDLYCR, MCHDLY);
-}
-
-/**
- * @brief Select the source for DFSDM1 or DFSDM2 DatIn0
- * @rmtoll SYSCFG_MCHDLYCR DFSDMD0SEL LL_SYSCFG_DFSDM_SetDataIn0Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn0_DM
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM_SetDataIn0Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, (Source >> 16), (Source & 0x0000FFFF));
-}
-/**
- * @brief Get the source for DFSDM1 or DFSDM2 DatIn0.
- * @rmtoll SYSCFG_MCHDLYCR DFSDMD0SEL LL_SYSCFG_DFSDM_GetDataIn0Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn0
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn0_DM
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM_GetDataIn0Source(uint32_t Source)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, Source));
-}
-/**
- * @brief Select the source for DFSDM1 or DFSDM2 DatIn2
- * @rmtoll SYSCFG_MCHDLYCR DFSDMD2SEL LL_SYSCFG_DFSDM_SetDataIn2Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn2_DM
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM_SetDataIn2Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, (Source >> 16), (Source & 0x0000FFFF));
-}
-/**
- * @brief Get the source for DFSDM1 or DFSDM2 DatIn2.
- * @rmtoll SYSCFG_MCHDLYCR DFSDMD2SEL LL_SYSCFG_DFSDM_GetDataIn2Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn2
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_DataIn2_DM
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM_GetDataIn2Source(uint32_t Source)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, Source));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM4 OC2
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CK02SEL LL_SYSCFG_DFSDM1_SetTIM4OC2BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN0
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN2
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM1_SetTIM4OC2BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CK02SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM4 OC2
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1D2SEL LL_SYSCFG_DFSDM1_GetTIM4OC2BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN0
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC2_CLKIN2
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM1_GetTIM4OC2BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CK02SEL));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM4 OC1
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CK13SEL LL_SYSCFG_DFSDM1_SetTIM4OC1BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN1
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN3
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM1_SetTIM4OC1BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CK13SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM4 OC1
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1D2SEL LL_SYSCFG_DFSDM1_GetTIM4OC1BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN1
- * @arg @ref LL_SYSCFG_DFSDM1_TIM4OC1_CLKIN3
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM1_GetTIM4OC1BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CK13SEL));
-}
-
-/**
- * @brief Select the DFSDM1 Clock In
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CFG LL_SYSCFG_DFSDM1_SetClockInSourceSelection
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_CKIN_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_CKIN_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM1_SetClockInSourceSelection(uint32_t ClockSource)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CFG, ClockSource);
-}
-/**
- * @brief GET the DFSDM1 Clock In
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CFG LL_SYSCFG_DFSDM1_GetClockInSourceSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_CKIN_PAD
- * @arg @ref LL_SYSCFG_DFSDM1_CKIN_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM1_GetClockInSourceSelection(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CFG));
-}
-
-/**
- * @brief Select the DFSDM1 Clock Out
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CKOSEL LL_SYSCFG_DFSDM1_SetClockOutSourceSelection
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_CKOUT
- * @arg @ref LL_SYSCFG_DFSDM1_CKOUT_M27
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM1_SetClockOutSourceSelection(uint32_t ClockSource)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CKOSEL, ClockSource);
-}
-/**
- * @brief GET the DFSDM1 Clock Out
- * @rmtoll SYSCFG_MCHDLYCR DFSDM1CKOSEL LL_SYSCFG_DFSDM1_GetClockOutSourceSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM1_CKOUT
- * @arg @ref LL_SYSCFG_DFSDM1_CKOUT_M27
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM1_GetClockOutSourceSelection(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM1CKOSEL));
-}
-
-/**
- * @brief Enables the DFSDM2 Delay clock
- * @rmtoll SYSCFG_MCHDLYCR MCHDLY2EN LL_SYSCFG_DFSDM2_EnableDelayClock
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_EnableDelayClock(void)
-{
- SET_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_MCHDLY2EN);
-}
-
-/**
- * @brief Disables the DFSDM2 Delay clock
- * @rmtoll SYSCFG_MCHDLYCR MCHDLY2EN LL_SYSCFG_DFSDM2_DisableDelayClock
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_DisableDelayClock(void)
-{
- CLEAR_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_MCHDLY2EN);
-}
-/**
- * @brief Select the source for DFSDM2 DatIn0
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D0SEL LL_SYSCFG_DFSDM2_SetDataIn0Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetDataIn0Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D0SEL, Source);
-}
-/**
- * @brief Get the source for DFSDM2 DatIn0.
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D0SEL LL_SYSCFG_DFSDM2_GetDataIn0Source
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn0_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetDataIn0Source(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D0SEL));
-}
-
-/**
- * @brief Select the source for DFSDM2 DatIn2
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D2SEL LL_SYSCFG_DFSDM2_SetDataIn2Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetDataIn2Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D2SEL, Source);
-}
-/**
- * @brief Get the source for DFSDM2 DatIn2.
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D2SEL LL_SYSCFG_DFSDM2_GetDataIn2Source
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn2_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetDataIn2Source(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D2SEL));
-}
-
-/**
- * @brief Select the source for DFSDM2 DatIn4
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D4SEL LL_SYSCFG_DFSDM2_SetDataIn4Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn4_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn4_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetDataIn4Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D4SEL, Source);
-}
-/**
- * @brief Get the source for DFSDM2 DatIn4.
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D4SEL LL_SYSCFG_DFSDM2_GetDataIn4Source
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn4_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn4_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetDataIn4Source(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D4SEL));
-}
-
-/**
- * @brief Select the source for DFSDM2 DatIn6
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D6SEL LL_SYSCFG_DFSDM2_SetDataIn6Source
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn6_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn6_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetDataIn6Source(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D6SEL, Source);
-}
-/**
- * @brief Get the source for DFSDM2 DatIn6.
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2D6SEL LL_SYSCFG_DFSDM2_GetDataIn6Source
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn6_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_DataIn6_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetDataIn6Source(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2D6SEL));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM3 OC4
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK04SEL LL_SYSCFG_DFSDM2_SetTIM3OC4BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN0
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN4
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetTIM3OC4BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK04SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM3 OC4
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK04SEL LL_SYSCFG_DFSDM2_GetTIM3OC4BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN0
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC4_CLKIN4
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetTIM3OC4BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK04SEL));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM3 OC3
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK15SEL LL_SYSCFG_DFSDM2_SetTIM3OC3BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN1
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN5
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetTIM3OC3BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK15SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM3 OC4
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK04SEL LL_SYSCFG_DFSDM2_GetTIM3OC3BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN1
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC3_CLKIN5
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetTIM3OC3BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK15SEL));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM3 OC2
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK26SEL LL_SYSCFG_DFSDM2_SetTIM3OC2BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN2
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN6
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetTIM3OC2BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK26SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM3 OC2
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK04SEL LL_SYSCFG_DFSDM2_GetTIM3OC2BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN2
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC2_CLKIN6
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetTIM3OC2BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK26SEL));
-}
-
-/**
- * @brief Select the distribution of the bitsream lock gated by TIM3 OC1
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK37SEL LL_SYSCFG_DFSDM2_SetTIM3OC1BitStreamDistribution
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN3
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN7
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetTIM3OC1BitStreamDistribution(uint32_t Source)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK37SEL, Source);
-}
-/**
- * @brief Get the distribution of the bitsream lock gated by TIM3 OC1
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CK37SEL LL_SYSCFG_DFSDM2_GetTIM3OC1BitStreamDistribution
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN3
- * @arg @ref LL_SYSCFG_DFSDM2_TIM3OC1_CLKIN7
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetTIM3OC1BitStreamDistribution(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CK37SEL));
-}
-
-/**
- * @brief Select the DFSDM2 Clock In
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CFG LL_SYSCFG_DFSDM2_SetClockInSourceSelection
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_CKIN_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_CKIN_DM
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetClockInSourceSelection(uint32_t ClockSource)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CFG, ClockSource);
-}
-/**
- * @brief GET the DFSDM2 Clock In
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CFG LL_SYSCFG_DFSDM2_GetClockInSourceSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_CKIN_PAD
- * @arg @ref LL_SYSCFG_DFSDM2_CKIN_DM
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetClockInSourceSelection(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CFG));
-}
-
-/**
- * @brief Select the DFSDM2 Clock Out
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CKOSEL LL_SYSCFG_DFSDM2_SetClockOutSourceSelection
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_CKOUT
- * @arg @ref LL_SYSCFG_DFSDM2_CKOUT_M27
- * @retval None
- */
-__STATIC_INLINE void LL_SYSCFG_DFSDM2_SetClockOutSourceSelection(uint32_t ClockSource)
-{
- MODIFY_REG(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CKOSEL, ClockSource);
-}
-/**
- * @brief GET the DFSDM2 Clock Out
- * @rmtoll SYSCFG_MCHDLYCR DFSDM2CKOSEL LL_SYSCFG_DFSDM2_GetClockOutSourceSelection
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_SYSCFG_DFSDM2_CKOUT
- * @arg @ref LL_SYSCFG_DFSDM2_CKOUT_M27
- * @retval None
- */
-__STATIC_INLINE uint32_t LL_SYSCFG_DFSDM2_GetClockOutSourceSelection(void)
-{
- return (uint32_t)(READ_BIT(SYSCFG->MCHDLYCR, SYSCFG_MCHDLYCR_DFSDM2CKOSEL));
-}
-
-#endif /* SYSCFG_MCHDLYCR_BSCKSEL */
-/**
- * @}
- */
-
-
-/** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
- * @{
- */
-
-/**
- * @brief Return the device identifier
- * @note For STM32F405/407xx and STM32F415/417xx devices, the device ID is 0x413
- * @note For STM32F42xxx and STM32F43xxx devices, the device ID is 0x419
- * @note For STM32F401xx devices, the device ID is 0x423
- * @note For STM32F401xx devices, the device ID is 0x433
- * @note For STM32F411xx devices, the device ID is 0x431
- * @note For STM32F410xx devices, the device ID is 0x458
- * @note For STM32F412xx devices, the device ID is 0x441
- * @note For STM32F413xx and STM32423xx devices, the device ID is 0x463
- * @note For STM32F446xx devices, the device ID is 0x421
- * @note For STM32F469xx and STM32F479xx devices, the device ID is 0x434
- * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID
- * @retval Values between Min_Data=0x00 and Max_Data=0xFFF
- */
-__STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
-{
- return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
-}
-
-/**
- * @brief Return the device revision identifier
- * @note This field indicates the revision of the device.
- For example, it is read as RevA -> 0x1000, Cat 2 revZ -> 0x1001, rev1 -> 0x1003, rev2 ->0x1007, revY -> 0x100F for STM32F405/407xx and STM32F415/417xx devices
- For example, it is read as RevA -> 0x1000, Cat 2 revY -> 0x1003, rev1 -> 0x1007, rev3 ->0x2001 for STM32F42xxx and STM32F43xxx devices
- For example, it is read as RevZ -> 0x1000, Cat 2 revA -> 0x1001 for STM32F401xB/C devices
- For example, it is read as RevA -> 0x1000, Cat 2 revZ -> 0x1001 for STM32F401xD/E devices
- For example, it is read as RevA -> 0x1000 for STM32F411xx,STM32F413/423xx,STM32F469/423xx, STM32F446xx and STM32F410xx devices
- For example, it is read as RevZ -> 0x1001, Cat 2 revB -> 0x2000, revC -> 0x3000 for STM32F412xx devices
- * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID
- * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
- */
-__STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
-{
- return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos);
-}
-
-/**
- * @brief Enable the Debug Module during SLEEP mode
- * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
- * @brief Disable the Debug Module during SLEEP mode
- * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
- * @brief Enable the Debug Module during STOP mode
- * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
- * @brief Disable the Debug Module during STOP mode
- * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
- * @brief Enable the Debug Module during STANDBY mode
- * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
- * @brief Disable the Debug Module during STANDBY mode
- * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
- * @brief Set Trace pin assignment control
- * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_SetTracePinAssignment\n
- * DBGMCU_CR TRACE_MODE LL_DBGMCU_SetTracePinAssignment
- * @param PinAssignment This parameter can be one of the following values:
- * @arg @ref LL_DBGMCU_TRACE_NONE
- * @arg @ref LL_DBGMCU_TRACE_ASYNCH
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment)
-{
- MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE, PinAssignment);
-}
-
-/**
- * @brief Get Trace pin assignment control
- * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_GetTracePinAssignment\n
- * DBGMCU_CR TRACE_MODE LL_DBGMCU_GetTracePinAssignment
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_DBGMCU_TRACE_NONE
- * @arg @ref LL_DBGMCU_TRACE_ASYNCH
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
- * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
- */
-__STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void)
-{
- return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE));
-}
-
-/**
- * @brief Freeze APB1 peripherals (group1 peripherals)
- * @rmtoll DBGMCU_APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_LPTIM_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C4_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C4_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN3_STOP (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
-{
- SET_BIT(DBGMCU->APB1FZ, Periphs);
-}
-
-/**
- * @brief Unfreeze APB1 peripherals (group1 peripherals)
- * @rmtoll DBGMCU_APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_LPTIM_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_I2C4_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
- * DBGMCU_APB1_FZ DBG_CAN3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_I2C4_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP (*)
- * @arg @ref LL_DBGMCU_APB1_GRP1_CAN3_STOP (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
-{
- CLEAR_BIT(DBGMCU->APB1FZ, Periphs);
-}
-
-/**
- * @brief Freeze APB2 peripherals
- * @rmtoll DBGMCU_APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
-{
- SET_BIT(DBGMCU->APB2FZ, Periphs);
-}
-
-/**
- * @brief Unfreeze APB2 peripherals
- * @rmtoll DBGMCU_APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
- * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph
- * @param Periphs This parameter can be a combination of the following values:
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP (*)
- * @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP (*)
- *
- * (*) value not defined in all devices.
- * @retval None
- */
-__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
-{
- CLEAR_BIT(DBGMCU->APB2FZ, Periphs);
-}
-/**
- * @}
- */
-
-/** @defgroup SYSTEM_LL_EF_FLASH FLASH
- * @{
- */
-
-/**
- * @brief Set FLASH Latency
- * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency
- * @param Latency This parameter can be one of the following values:
- * @arg @ref LL_FLASH_LATENCY_0
- * @arg @ref LL_FLASH_LATENCY_1
- * @arg @ref LL_FLASH_LATENCY_2
- * @arg @ref LL_FLASH_LATENCY_3
- * @arg @ref LL_FLASH_LATENCY_4
- * @arg @ref LL_FLASH_LATENCY_5
- * @arg @ref LL_FLASH_LATENCY_6
- * @arg @ref LL_FLASH_LATENCY_7
- * @arg @ref LL_FLASH_LATENCY_8
- * @arg @ref LL_FLASH_LATENCY_9
- * @arg @ref LL_FLASH_LATENCY_10
- * @arg @ref LL_FLASH_LATENCY_11
- * @arg @ref LL_FLASH_LATENCY_12
- * @arg @ref LL_FLASH_LATENCY_13
- * @arg @ref LL_FLASH_LATENCY_14
- * @arg @ref LL_FLASH_LATENCY_15
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
-{
- MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
-}
-
-/**
- * @brief Get FLASH Latency
- * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_FLASH_LATENCY_0
- * @arg @ref LL_FLASH_LATENCY_1
- * @arg @ref LL_FLASH_LATENCY_2
- * @arg @ref LL_FLASH_LATENCY_3
- * @arg @ref LL_FLASH_LATENCY_4
- * @arg @ref LL_FLASH_LATENCY_5
- * @arg @ref LL_FLASH_LATENCY_6
- * @arg @ref LL_FLASH_LATENCY_7
- * @arg @ref LL_FLASH_LATENCY_8
- * @arg @ref LL_FLASH_LATENCY_9
- * @arg @ref LL_FLASH_LATENCY_10
- * @arg @ref LL_FLASH_LATENCY_11
- * @arg @ref LL_FLASH_LATENCY_12
- * @arg @ref LL_FLASH_LATENCY_13
- * @arg @ref LL_FLASH_LATENCY_14
- * @arg @ref LL_FLASH_LATENCY_15
- */
-__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
-{
- return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
-}
-
-/**
- * @brief Enable Prefetch
- * @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
-{
- SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
-}
-
-/**
- * @brief Disable Prefetch
- * @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
-{
- CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
-}
-
-/**
- * @brief Check if Prefetch buffer is enabled
- * @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
-{
- return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN));
-}
-
-/**
- * @brief Enable Instruction cache
- * @rmtoll FLASH_ACR ICEN LL_FLASH_EnableInstCache
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_EnableInstCache(void)
-{
- SET_BIT(FLASH->ACR, FLASH_ACR_ICEN);
-}
-
-/**
- * @brief Disable Instruction cache
- * @rmtoll FLASH_ACR ICEN LL_FLASH_DisableInstCache
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_DisableInstCache(void)
-{
- CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN);
-}
-
-/**
- * @brief Enable Data cache
- * @rmtoll FLASH_ACR DCEN LL_FLASH_EnableDataCache
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_EnableDataCache(void)
-{
- SET_BIT(FLASH->ACR, FLASH_ACR_DCEN);
-}
-
-/**
- * @brief Disable Data cache
- * @rmtoll FLASH_ACR DCEN LL_FLASH_DisableDataCache
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_DisableDataCache(void)
-{
- CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN);
-}
-
-/**
- * @brief Enable Instruction cache reset
- * @note bit can be written only when the instruction cache is disabled
- * @rmtoll FLASH_ACR ICRST LL_FLASH_EnableInstCacheReset
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_EnableInstCacheReset(void)
-{
- SET_BIT(FLASH->ACR, FLASH_ACR_ICRST);
-}
-
-/**
- * @brief Disable Instruction cache reset
- * @rmtoll FLASH_ACR ICRST LL_FLASH_DisableInstCacheReset
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_DisableInstCacheReset(void)
-{
- CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST);
-}
-
-/**
- * @brief Enable Data cache reset
- * @note bit can be written only when the data cache is disabled
- * @rmtoll FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_EnableDataCacheReset(void)
-{
- SET_BIT(FLASH->ACR, FLASH_ACR_DCRST);
-}
-
-/**
- * @brief Disable Data cache reset
- * @rmtoll FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset
- * @retval None
- */
-__STATIC_INLINE void LL_FLASH_DisableDataCacheReset(void)
-{
- CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST);
-}
-
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_SYSTEM_H */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h
deleted file mode 100644
index 64f59b08f8f9ebed860d9782b69acc64a7ee933a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h
+++ /dev/null
@@ -1,2521 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_usart.h
- * @author MCD Application Team
- * @brief Header file of USART LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_USART_H
-#define __STM32F4xx_LL_USART_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-#if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
-
-/** @defgroup USART_LL USART
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup USART_LL_Private_Constants USART Private Constants
- * @{
- */
-
-/* Defines used for the bit position in the register and perform offsets*/
-#define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_Private_Macros USART Private Macros
- * @{
- */
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_ES_INIT USART Exported Init structures
- * @{
- */
-
-/**
- * @brief LL USART Init Structure definition
- */
-typedef struct
-{
- uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
-
- uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
- This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
-
- uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
- This parameter can be a value of @ref USART_LL_EC_STOPBITS.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
-
- uint32_t Parity; /*!< Specifies the parity mode.
- This parameter can be a value of @ref USART_LL_EC_PARITY.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
-
- uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
- This parameter can be a value of @ref USART_LL_EC_DIRECTION.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
-
- uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
- This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
-
- uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
- This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
-
- This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
-
-} LL_USART_InitTypeDef;
-
-/**
- * @brief LL USART Clock Init Structure definition
- */
-typedef struct
-{
- uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
- This parameter can be a value of @ref USART_LL_EC_CLOCK.
-
- USART HW configuration can be modified afterwards using unitary functions
- @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
- For more details, refer to description of this function. */
-
- uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
- This parameter can be a value of @ref USART_LL_EC_POLARITY.
-
- USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
- For more details, refer to description of this function. */
-
- uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
- This parameter can be a value of @ref USART_LL_EC_PHASE.
-
- USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
- For more details, refer to description of this function. */
-
- uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
- data bit (MSB) has to be output on the SCLK pin in synchronous mode.
- This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
-
- USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
- For more details, refer to description of this function. */
-
-} LL_USART_ClockInitTypeDef;
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup USART_LL_Exported_Constants USART Exported Constants
- * @{
- */
-
-/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
- * @brief Flags defines which can be used with LL_USART_ReadReg function
- * @{
- */
-#define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
-#define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
-#define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
-#define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
-#define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
-#define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
-#define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
-#define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
-#define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
-#define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_IT IT Defines
- * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
- * @{
- */
-#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
-#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
-#define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
-#define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
-#define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
-#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
-#define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
-#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_DIRECTION Communication Direction
- * @{
- */
-#define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
-#define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
-#define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
-#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_PARITY Parity Control
- * @{
- */
-#define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
-#define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
-#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_WAKEUP Wakeup
- * @{
- */
-#define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
-#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_DATAWIDTH Datawidth
- * @{
- */
-#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
-#define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
- * @{
- */
-#define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
-#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_EC_CLOCK Clock Signal
- * @{
- */
-
-#define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
-#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
-/**
- * @}
- */
-#endif /*USE_FULL_LL_DRIVER*/
-
-/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
- * @{
- */
-#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
-#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_PHASE Clock Phase
- * @{
- */
-#define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
-#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_POLARITY Clock Polarity
- * @{
- */
-#define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
-#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_STOPBITS Stop Bits
- * @{
- */
-#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
-#define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
-#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
-#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_HWCONTROL Hardware Control
- * @{
- */
-#define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
-#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
-#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
-#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
- * @{
- */
-#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
-#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
- * @{
- */
-#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
-#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-/** @defgroup USART_LL_Exported_Macros USART Exported Macros
- * @{
- */
-
-/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
- * @{
- */
-
-/**
- * @brief Write a value in USART register
- * @param __INSTANCE__ USART Instance
- * @param __REG__ Register to be written
- * @param __VALUE__ Value to be written in the register
- * @retval None
- */
-#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in USART register
- * @param __INSTANCE__ USART Instance
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
- * @{
- */
-
-/**
- * @brief Compute USARTDIV value according to Peripheral Clock and
- * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
- * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
- * @param __BAUDRATE__ Baud rate value to achieve
- * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
- */
-#define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(2*((uint64_t)(__BAUDRATE__)))))
-#define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
-#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8)\
- + 50) / 100)
-/* UART BRR = mantissa + overflow + fraction
- = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
-#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
- ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
- (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
-
-/**
- * @brief Compute USARTDIV value according to Peripheral Clock and
- * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
- * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
- * @param __BAUDRATE__ Baud rate value to achieve
- * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
- */
-#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(4*((uint64_t)(__BAUDRATE__)))))
-#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
-#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16)\
- + 50) / 100)
-/* USART BRR = mantissa + overflow + fraction
- = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
-#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
- (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
- (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup USART_LL_Exported_Functions USART Exported Functions
- * @{
- */
-
-/** @defgroup USART_LL_EF_Configuration Configuration functions
- * @{
- */
-
-/**
- * @brief USART Enable
- * @rmtoll CR1 UE LL_USART_Enable
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR1, USART_CR1_UE);
-}
-
-/**
- * @brief USART Disable (all USART prescalers and outputs are disabled)
- * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
- * and current operations are discarded. The configuration of the USART is kept, but all the status
- * flags, in the USARTx_SR are set to their default values.
- * @rmtoll CR1 UE LL_USART_Disable
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
-}
-
-/**
- * @brief Indicate if USART is enabled
- * @rmtoll CR1 UE LL_USART_IsEnabled
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
-}
-
-/**
- * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
- * @rmtoll CR1 RE LL_USART_EnableDirectionRx
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
-}
-
-/**
- * @brief Receiver Disable
- * @rmtoll CR1 RE LL_USART_DisableDirectionRx
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
-}
-
-/**
- * @brief Transmitter Enable
- * @rmtoll CR1 TE LL_USART_EnableDirectionTx
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE);
-}
-
-/**
- * @brief Transmitter Disable
- * @rmtoll CR1 TE LL_USART_DisableDirectionTx
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
-}
-
-/**
- * @brief Configure simultaneously enabled/disabled states
- * of Transmitter and Receiver
- * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
- * CR1 TE LL_USART_SetTransferDirection
- * @param USARTx USART Instance
- * @param TransferDirection This parameter can be one of the following values:
- * @arg @ref LL_USART_DIRECTION_NONE
- * @arg @ref LL_USART_DIRECTION_RX
- * @arg @ref LL_USART_DIRECTION_TX
- * @arg @ref LL_USART_DIRECTION_TX_RX
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
-{
- ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
-}
-
-/**
- * @brief Return enabled/disabled states of Transmitter and Receiver
- * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
- * CR1 TE LL_USART_GetTransferDirection
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_DIRECTION_NONE
- * @arg @ref LL_USART_DIRECTION_RX
- * @arg @ref LL_USART_DIRECTION_TX
- * @arg @ref LL_USART_DIRECTION_TX_RX
- */
-__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
-}
-
-/**
- * @brief Configure Parity (enabled/disabled and parity mode if enabled).
- * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
- * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
- * (9th or 8th bit depending on data width) and parity is checked on the received data.
- * @rmtoll CR1 PS LL_USART_SetParity\n
- * CR1 PCE LL_USART_SetParity
- * @param USARTx USART Instance
- * @param Parity This parameter can be one of the following values:
- * @arg @ref LL_USART_PARITY_NONE
- * @arg @ref LL_USART_PARITY_EVEN
- * @arg @ref LL_USART_PARITY_ODD
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
-{
- MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
-}
-
-/**
- * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
- * @rmtoll CR1 PS LL_USART_GetParity\n
- * CR1 PCE LL_USART_GetParity
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_PARITY_NONE
- * @arg @ref LL_USART_PARITY_EVEN
- * @arg @ref LL_USART_PARITY_ODD
- */
-__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
-}
-
-/**
- * @brief Set Receiver Wake Up method from Mute mode.
- * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
- * @param USARTx USART Instance
- * @param Method This parameter can be one of the following values:
- * @arg @ref LL_USART_WAKEUP_IDLELINE
- * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
-{
- MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
-}
-
-/**
- * @brief Return Receiver Wake Up method from Mute mode
- * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_WAKEUP_IDLELINE
- * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
- */
-__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
-}
-
-/**
- * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
- * @rmtoll CR1 M LL_USART_SetDataWidth
- * @param USARTx USART Instance
- * @param DataWidth This parameter can be one of the following values:
- * @arg @ref LL_USART_DATAWIDTH_8B
- * @arg @ref LL_USART_DATAWIDTH_9B
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
-{
- MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
-}
-
-/**
- * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
- * @rmtoll CR1 M LL_USART_GetDataWidth
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_DATAWIDTH_8B
- * @arg @ref LL_USART_DATAWIDTH_9B
- */
-__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
-}
-
-/**
- * @brief Set Oversampling to 8-bit or 16-bit mode
- * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
- * @param USARTx USART Instance
- * @param OverSampling This parameter can be one of the following values:
- * @arg @ref LL_USART_OVERSAMPLING_16
- * @arg @ref LL_USART_OVERSAMPLING_8
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
-{
- MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
-}
-
-/**
- * @brief Return Oversampling mode
- * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_OVERSAMPLING_16
- * @arg @ref LL_USART_OVERSAMPLING_8
- */
-__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
-}
-
-/**
- * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
- * @param USARTx USART Instance
- * @param LastBitClockPulse This parameter can be one of the following values:
- * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
- * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
-}
-
-/**
- * @brief Retrieve Clock pulse of the last data bit output configuration
- * (Last bit Clock pulse output to the SCLK pin or not)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
- * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
- */
-__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
-}
-
-/**
- * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CPHA LL_USART_SetClockPhase
- * @param USARTx USART Instance
- * @param ClockPhase This parameter can be one of the following values:
- * @arg @ref LL_USART_PHASE_1EDGE
- * @arg @ref LL_USART_PHASE_2EDGE
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
-}
-
-/**
- * @brief Return phase of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CPHA LL_USART_GetClockPhase
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_PHASE_1EDGE
- * @arg @ref LL_USART_PHASE_2EDGE
- */
-__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
-}
-
-/**
- * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
- * @param USARTx USART Instance
- * @param ClockPolarity This parameter can be one of the following values:
- * @arg @ref LL_USART_POLARITY_LOW
- * @arg @ref LL_USART_POLARITY_HIGH
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
-}
-
-/**
- * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_POLARITY_LOW
- * @arg @ref LL_USART_POLARITY_HIGH
- */
-__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
-}
-
-/**
- * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
- * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
- * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
- * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
- * CR2 CPOL LL_USART_ConfigClock\n
- * CR2 LBCL LL_USART_ConfigClock
- * @param USARTx USART Instance
- * @param Phase This parameter can be one of the following values:
- * @arg @ref LL_USART_PHASE_1EDGE
- * @arg @ref LL_USART_PHASE_2EDGE
- * @param Polarity This parameter can be one of the following values:
- * @arg @ref LL_USART_POLARITY_LOW
- * @arg @ref LL_USART_POLARITY_HIGH
- * @param LBCPOutput This parameter can be one of the following values:
- * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
- * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
-}
-
-/**
- * @brief Enable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
- * @brief Disable Clock output on SCLK pin
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
- * @brief Indicate if Clock output on SCLK pin is enabled
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
-}
-
-/**
- * @brief Set the length of the stop bits
- * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
- * @param USARTx USART Instance
- * @param StopBits This parameter can be one of the following values:
- * @arg @ref LL_USART_STOPBITS_0_5
- * @arg @ref LL_USART_STOPBITS_1
- * @arg @ref LL_USART_STOPBITS_1_5
- * @arg @ref LL_USART_STOPBITS_2
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
- * @brief Retrieve the length of the stop bits
- * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_STOPBITS_0_5
- * @arg @ref LL_USART_STOPBITS_1
- * @arg @ref LL_USART_STOPBITS_1_5
- * @arg @ref LL_USART_STOPBITS_2
- */
-__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
-}
-
-/**
- * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
- * @note Call of this function is equivalent to following function call sequence :
- * - Data Width configuration using @ref LL_USART_SetDataWidth() function
- * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
- * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
- * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
- * CR1 PCE LL_USART_ConfigCharacter\n
- * CR1 M LL_USART_ConfigCharacter\n
- * CR2 STOP LL_USART_ConfigCharacter
- * @param USARTx USART Instance
- * @param DataWidth This parameter can be one of the following values:
- * @arg @ref LL_USART_DATAWIDTH_8B
- * @arg @ref LL_USART_DATAWIDTH_9B
- * @param Parity This parameter can be one of the following values:
- * @arg @ref LL_USART_PARITY_NONE
- * @arg @ref LL_USART_PARITY_EVEN
- * @arg @ref LL_USART_PARITY_ODD
- * @param StopBits This parameter can be one of the following values:
- * @arg @ref LL_USART_STOPBITS_0_5
- * @arg @ref LL_USART_STOPBITS_1
- * @arg @ref LL_USART_STOPBITS_1_5
- * @arg @ref LL_USART_STOPBITS_2
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
- uint32_t StopBits)
-{
- MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
- MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
-}
-
-/**
- * @brief Set Address of the USART node.
- * @note This is used in multiprocessor communication during Mute mode or Stop mode,
- * for wake up with address mark detection.
- * @rmtoll CR2 ADD LL_USART_SetNodeAddress
- * @param USARTx USART Instance
- * @param NodeAddress 4 bit Address of the USART node.
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
-}
-
-/**
- * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
- * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
- * @rmtoll CR2 ADD LL_USART_GetNodeAddress
- * @param USARTx USART Instance
- * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
- */
-__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
-}
-
-/**
- * @brief Enable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
- * @brief Disable RTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
-}
-
-/**
- * @brief Enable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
- * @brief Disable CTS HW Flow Control
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
-}
-
-/**
- * @brief Configure HW Flow Control mode (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
- * CR3 CTSE LL_USART_SetHWFlowCtrl
- * @param USARTx USART Instance
- * @param HardwareFlowControl This parameter can be one of the following values:
- * @arg @ref LL_USART_HWCONTROL_NONE
- * @arg @ref LL_USART_HWCONTROL_RTS
- * @arg @ref LL_USART_HWCONTROL_CTS
- * @arg @ref LL_USART_HWCONTROL_RTS_CTS
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
-{
- MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
-}
-
-/**
- * @brief Return HW Flow Control configuration (both CTS and RTS)
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
- * CR3 CTSE LL_USART_GetHWFlowCtrl
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_HWCONTROL_NONE
- * @arg @ref LL_USART_HWCONTROL_RTS
- * @arg @ref LL_USART_HWCONTROL_CTS
- * @arg @ref LL_USART_HWCONTROL_RTS_CTS
- */
-__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
-}
-
-/**
- * @brief Enable One bit sampling method
- * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
-}
-
-/**
- * @brief Disable One bit sampling method
- * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
-}
-
-/**
- * @brief Indicate if One bit sampling method is enabled
- * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
-}
-
-/**
- * @brief Configure USART BRR register for achieving expected Baud Rate value.
- * @note Compute and set USARTDIV value in BRR Register (full BRR content)
- * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
- * @note Peripheral clock and Baud rate values provided as function parameters should be valid
- * (Baud rate value != 0)
- * @rmtoll BRR BRR LL_USART_SetBaudRate
- * @param USARTx USART Instance
- * @param PeriphClk Peripheral Clock
- * @param OverSampling This parameter can be one of the following values:
- * @arg @ref LL_USART_OVERSAMPLING_16
- * @arg @ref LL_USART_OVERSAMPLING_8
- * @param BaudRate Baud Rate
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
- uint32_t BaudRate)
-{
- if (OverSampling == LL_USART_OVERSAMPLING_8)
- {
- USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
- }
- else
- {
- USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
- }
-}
-
-/**
- * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
- * (full BRR content), and to used Peripheral Clock and Oversampling mode values
- * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
- * @rmtoll BRR BRR LL_USART_GetBaudRate
- * @param USARTx USART Instance
- * @param PeriphClk Peripheral Clock
- * @param OverSampling This parameter can be one of the following values:
- * @arg @ref LL_USART_OVERSAMPLING_16
- * @arg @ref LL_USART_OVERSAMPLING_8
- * @retval Baud Rate
- */
-__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
-{
- uint32_t usartdiv = 0x0U;
- uint32_t brrresult = 0x0U;
-
- usartdiv = USARTx->BRR;
-
- if (OverSampling == LL_USART_OVERSAMPLING_8)
- {
- if ((usartdiv & 0xFFF7U) != 0U)
- {
- usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
- brrresult = (PeriphClk * 2U) / usartdiv;
- }
- }
- else
- {
- if ((usartdiv & 0xFFFFU) != 0U)
- {
- brrresult = PeriphClk / usartdiv;
- }
- }
- return (brrresult);
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
- * @{
- */
-
-/**
- * @brief Enable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll CR3 IREN LL_USART_EnableIrda
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
- * @brief Disable IrDA mode
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll CR3 IREN LL_USART_DisableIrda
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
- * @brief Indicate if IrDA mode is enabled
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
-}
-
-/**
- * @brief Configure IrDA Power Mode (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
- * @param USARTx USART Instance
- * @param PowerMode This parameter can be one of the following values:
- * @arg @ref LL_USART_IRDA_POWER_NORMAL
- * @arg @ref LL_USART_IRDA_POWER_LOW
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
-{
- MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
-}
-
-/**
- * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_IRDA_POWER_NORMAL
- * @arg @ref LL_USART_PHASE_2EDGE
- */
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
-}
-
-/**
- * @brief Set Irda prescaler value, used for dividing the USART clock source
- * to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
- * @param USARTx USART Instance
- * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
-{
- MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
-}
-
-/**
- * @brief Return Irda prescaler value, used for dividing the USART clock source
- * to achieve the Irda Low Power frequency (8 bits value)
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
- * @param USARTx USART Instance
- * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
- */
-__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
- * @{
- */
-
-/**
- * @brief Enable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_NACK);
-}
-
-/**
- * @brief Disable Smartcard NACK transmission
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
-}
-
-/**
- * @brief Indicate if Smartcard NACK transmission is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
-}
-
-/**
- * @brief Enable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
- * @brief Disable Smartcard mode
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
- * @brief Indicate if Smartcard mode is enabled
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
-}
-
-/**
- * @brief Set Smartcard prescaler value, used for dividing the USART clock
- * source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
- * @param USARTx USART Instance
- * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
-{
- MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
-}
-
-/**
- * @brief Return Smartcard prescaler value, used for dividing the USART clock
- * source to provide the SMARTCARD Clock (5 bits value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
- * @param USARTx USART Instance
- * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
- */
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
-}
-
-/**
- * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
- * (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
- * @param USARTx USART Instance
- * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
-{
- MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
-}
-
-/**
- * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
- * (GT[7:0] bits : Guard time value)
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
- * @param USARTx USART Instance
- * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
- */
-__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
- * @{
- */
-
-/**
- * @brief Enable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
- * Half-Duplex mode is supported by the USARTx instance.
- * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
- * @brief Disable Single Wire Half-Duplex mode
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
- * Half-Duplex mode is supported by the USARTx instance.
- * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
- * @brief Indicate if Single Wire Half-Duplex mode is enabled
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
- * Half-Duplex mode is supported by the USARTx instance.
- * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
- * @{
- */
-
-/**
- * @brief Set LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
- * @param USARTx USART Instance
- * @param LINBDLength This parameter can be one of the following values:
- * @arg @ref LL_USART_LINBREAK_DETECT_10B
- * @arg @ref LL_USART_LINBREAK_DETECT_11B
- * @retval None
- */
-__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
-{
- MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
-}
-
-/**
- * @brief Return LIN Break Detection Length
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
- * @param USARTx USART Instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_USART_LINBREAK_DETECT_10B
- * @arg @ref LL_USART_LINBREAK_DETECT_11B
- */
-__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
-{
- return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
-}
-
-/**
- * @brief Enable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LINEN LL_USART_EnableLIN
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
- * @brief Disable LIN mode
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LINEN LL_USART_DisableLIN
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
- * @brief Indicate if LIN mode is enabled
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
- * @{
- */
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
- * @note In UART mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - CLKEN bit in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - IREN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * @note Other remaining configurations items related to Asynchronous Mode
- * (as Baud Rate, Word length, Parity, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
- * CR2 CLKEN LL_USART_ConfigAsyncMode\n
- * CR3 SCEN LL_USART_ConfigAsyncMode\n
- * CR3 IREN LL_USART_ConfigAsyncMode\n
- * CR3 HDSEL LL_USART_ConfigAsyncMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
-{
- /* In Asynchronous mode, the following bits must be kept cleared:
- - LINEN, CLKEN bits in the USART_CR2 register,
- - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
- * @note In Synchronous mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - IREN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * This function also sets the USART in Synchronous mode.
- * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
- * Synchronous mode is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
- * @note Other remaining configurations items related to Synchronous Mode
- * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
- * CR2 CLKEN LL_USART_ConfigSyncMode\n
- * CR3 SCEN LL_USART_ConfigSyncMode\n
- * CR3 IREN LL_USART_ConfigSyncMode\n
- * CR3 HDSEL LL_USART_ConfigSyncMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
-{
- /* In Synchronous mode, the following bits must be kept cleared:
- - LINEN bit in the USART_CR2 register,
- - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
- /* set the UART/USART in Synchronous mode */
- SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in LIN Mode
- * @note In LIN mode, the following bits must be kept cleared:
- * - STOP and CLKEN bits in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - IREN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * This function also set the UART/USART in LIN mode.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
- * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
- * @note Other remaining configurations items related to LIN Mode
- * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
- * CR2 STOP LL_USART_ConfigLINMode\n
- * CR2 LINEN LL_USART_ConfigLINMode\n
- * CR3 IREN LL_USART_ConfigLINMode\n
- * CR3 SCEN LL_USART_ConfigLINMode\n
- * CR3 HDSEL LL_USART_ConfigLINMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
-{
- /* In LIN mode, the following bits must be kept cleared:
- - STOP and CLKEN bits in the USART_CR2 register,
- - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
- /* Set the UART/USART in LIN mode */
- SET_BIT(USARTx->CR2, USART_CR2_LINEN);
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
- * @note In Half Duplex mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - CLKEN bit in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - IREN bit in the USART_CR3 register,
- * This function also sets the UART/USART in Half Duplex mode.
- * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
- * Half-Duplex mode is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
- * @note Other remaining configurations items related to Half Duplex Mode
- * (as Baud Rate, Word length, Parity, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
- * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
- * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
- * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
- * CR3 IREN LL_USART_ConfigHalfDuplexMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
-{
- /* In Half Duplex mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
- /* set the UART/USART in Half Duplex mode */
- SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
- * @note In Smartcard mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - IREN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * This function also configures Stop bits to 1.5 bits and
- * sets the USART in Smartcard mode (SCEN bit).
- * Clock Output is also enabled (CLKEN).
- * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- * Smartcard feature is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
- * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
- * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
- * @note Other remaining configurations items related to Smartcard Mode
- * (as Baud Rate, Word length, Parity, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
- * CR2 STOP LL_USART_ConfigSmartcardMode\n
- * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
- * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
- * CR3 SCEN LL_USART_ConfigSmartcardMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
-{
- /* In Smartcard mode, the following bits must be kept cleared:
- - LINEN bit in the USART_CR2 register,
- - IREN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
- /* Configure Stop bits to 1.5 bits */
- /* Synchronous mode is activated by default */
- SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
- /* set the UART/USART in Smartcard mode */
- SET_BIT(USARTx->CR3, USART_CR3_SCEN);
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Irda Mode
- * @note In IRDA mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - STOP and CLKEN bits in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * This function also sets the UART/USART in IRDA mode (IREN bit).
- * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
- * IrDA feature is supported by the USARTx instance.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
- * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
- * @note Other remaining configurations items related to Irda Mode
- * (as Baud Rate, Word length, Power mode, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
- * CR2 CLKEN LL_USART_ConfigIrdaMode\n
- * CR2 STOP LL_USART_ConfigIrdaMode\n
- * CR3 SCEN LL_USART_ConfigIrdaMode\n
- * CR3 HDSEL LL_USART_ConfigIrdaMode\n
- * CR3 IREN LL_USART_ConfigIrdaMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
-{
- /* In IRDA mode, the following bits must be kept cleared:
- - LINEN, STOP and CLKEN bits in the USART_CR2 register,
- - SCEN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
- /* set the UART/USART in IRDA mode */
- SET_BIT(USARTx->CR3, USART_CR3_IREN);
-}
-
-/**
- * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
- * (several USARTs connected in a network, one of the USARTs can be the master,
- * its TX output connected to the RX inputs of the other slaves USARTs).
- * @note In MultiProcessor mode, the following bits must be kept cleared:
- * - LINEN bit in the USART_CR2 register,
- * - CLKEN bit in the USART_CR2 register,
- * - SCEN bit in the USART_CR3 register,
- * - IREN bit in the USART_CR3 register,
- * - HDSEL bit in the USART_CR3 register.
- * @note Call of this function is equivalent to following function call sequence :
- * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
- * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
- * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
- * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
- * @note Other remaining configurations items related to Multi processor Mode
- * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
- * dedicated functions
- * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
- * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
- * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
- * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
- * CR3 IREN LL_USART_ConfigMultiProcessMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
-{
- /* In Multi Processor mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
- CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
- * @{
- */
-
-/**
- * @brief Check if the USART Parity Error Flag is set or not
- * @rmtoll SR PE LL_USART_IsActiveFlag_PE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
-}
-
-/**
- * @brief Check if the USART Framing Error Flag is set or not
- * @rmtoll SR FE LL_USART_IsActiveFlag_FE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
-}
-
-/**
- * @brief Check if the USART Noise error detected Flag is set or not
- * @rmtoll SR NF LL_USART_IsActiveFlag_NE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
-}
-
-/**
- * @brief Check if the USART OverRun Error Flag is set or not
- * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
-}
-
-/**
- * @brief Check if the USART IDLE line detected Flag is set or not
- * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
-}
-
-/**
- * @brief Check if the USART Read Data Register Not Empty Flag is set or not
- * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
-}
-
-/**
- * @brief Check if the USART Transmission Complete Flag is set or not
- * @rmtoll SR TC LL_USART_IsActiveFlag_TC
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
-}
-
-/**
- * @brief Check if the USART Transmit Data Register Empty Flag is set or not
- * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
-}
-
-/**
- * @brief Check if the USART LIN Break Detection Flag is set or not
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
-}
-
-/**
- * @brief Check if the USART CTS Flag is set or not
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
-}
-
-/**
- * @brief Check if the USART Send Break Flag is set or not
- * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
-}
-
-/**
- * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
- * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
-}
-
-/**
- * @brief Clear Parity Error Flag
- * @note Clearing this flag is done by a read access to the USARTx_SR
- * register followed by a read access to the USARTx_DR register.
- * @note Please also consider that when clearing this flag, other flags as
- * NE, FE, ORE, IDLE would also be cleared.
- * @rmtoll SR PE LL_USART_ClearFlag_PE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
-{
- __IO uint32_t tmpreg;
- tmpreg = USARTx->SR;
- (void) tmpreg;
- tmpreg = USARTx->DR;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear Framing Error Flag
- * @note Clearing this flag is done by a read access to the USARTx_SR
- * register followed by a read access to the USARTx_DR register.
- * @note Please also consider that when clearing this flag, other flags as
- * PE, NE, ORE, IDLE would also be cleared.
- * @rmtoll SR FE LL_USART_ClearFlag_FE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
-{
- __IO uint32_t tmpreg;
- tmpreg = USARTx->SR;
- (void) tmpreg;
- tmpreg = USARTx->DR;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear Noise detected Flag
- * @note Clearing this flag is done by a read access to the USARTx_SR
- * register followed by a read access to the USARTx_DR register.
- * @note Please also consider that when clearing this flag, other flags as
- * PE, FE, ORE, IDLE would also be cleared.
- * @rmtoll SR NF LL_USART_ClearFlag_NE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
-{
- __IO uint32_t tmpreg;
- tmpreg = USARTx->SR;
- (void) tmpreg;
- tmpreg = USARTx->DR;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear OverRun Error Flag
- * @note Clearing this flag is done by a read access to the USARTx_SR
- * register followed by a read access to the USARTx_DR register.
- * @note Please also consider that when clearing this flag, other flags as
- * PE, NE, FE, IDLE would also be cleared.
- * @rmtoll SR ORE LL_USART_ClearFlag_ORE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
-{
- __IO uint32_t tmpreg;
- tmpreg = USARTx->SR;
- (void) tmpreg;
- tmpreg = USARTx->DR;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear IDLE line detected Flag
- * @note Clearing this flag is done by a read access to the USARTx_SR
- * register followed by a read access to the USARTx_DR register.
- * @note Please also consider that when clearing this flag, other flags as
- * PE, NE, FE, ORE would also be cleared.
- * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
-{
- __IO uint32_t tmpreg;
- tmpreg = USARTx->SR;
- (void) tmpreg;
- tmpreg = USARTx->DR;
- (void) tmpreg;
-}
-
-/**
- * @brief Clear Transmission Complete Flag
- * @rmtoll SR TC LL_USART_ClearFlag_TC
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
-{
- WRITE_REG(USARTx->SR, ~(USART_SR_TC));
-}
-
-/**
- * @brief Clear RX Not Empty Flag
- * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
-{
- WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
-}
-
-/**
- * @brief Clear LIN Break Detection Flag
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll SR LBD LL_USART_ClearFlag_LBD
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
-{
- WRITE_REG(USARTx->SR, ~(USART_SR_LBD));
-}
-
-/**
- * @brief Clear CTS Interrupt Flag
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
-{
- WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_IT_Management IT_Management
- * @{
- */
-
-/**
- * @brief Enable IDLE Interrupt
- * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
- * @brief Enable RX Not Empty Interrupt
- * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
- * @brief Enable Transmission Complete Interrupt
- * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
- * @brief Enable TX Empty Interrupt
- * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
- * @brief Enable Parity Error Interrupt
- * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
- * @brief Enable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
-}
-
-/**
- * @brief Enable Error Interrupt
- * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
- * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
- * 0: Interrupt is inhibited
- * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
- * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);
-}
-
-/**
- * @brief Enable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
- * @brief Disable IDLE Interrupt
- * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-}
-
-/**
- * @brief Disable RX Not Empty Interrupt
- * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-}
-
-/**
- * @brief Disable Transmission Complete Interrupt
- * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
-}
-
-/**
- * @brief Disable TX Empty Interrupt
- * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
-}
-
-/**
- * @brief Disable Parity Error Interrupt
- * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
-}
-
-/**
- * @brief Disable LIN Break Detection Interrupt
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
-}
-
-/**
- * @brief Disable Error Interrupt
- * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
- * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
- * 0: Interrupt is inhibited
- * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
- * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
-}
-
-/**
- * @brief Disable CTS Interrupt
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
-}
-
-/**
- * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
- * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
-}
-
-/**
- * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
- * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
-}
-
-/**
- * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
- * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
-}
-
-/**
- * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
- * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
-}
-
-/**
- * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
- * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
-}
-
-/**
- * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- * LIN feature is supported by the USARTx instance.
- * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
-}
-
-/**
- * @brief Check if the USART Error Interrupt is enabled or disabled.
- * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
-}
-
-/**
- * @brief Check if the USART CTS Interrupt is enabled or disabled.
- * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
- * Hardware Flow control feature is supported by the USARTx instance.
- * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_DMA_Management DMA_Management
- * @{
- */
-
-/**
- * @brief Enable DMA Mode for reception
- * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
- * @brief Disable DMA Mode for reception
- * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
-}
-
-/**
- * @brief Check if DMA Mode is enabled for reception
- * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
-}
-
-/**
- * @brief Enable DMA Mode for transmission
- * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
-{
- ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
- * @brief Disable DMA Mode for transmission
- * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
-{
- ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
-}
-
-/**
- * @brief Check if DMA Mode is enabled for transmission
- * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
- * @param USARTx USART Instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
-{
- return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
-}
-
-/**
- * @brief Get the data register address used for DMA transfer
- * @rmtoll DR DR LL_USART_DMA_GetRegAddr
- * @note Address of Data Register is valid for both Transmit and Receive transfers.
- * @param USARTx USART Instance
- * @retval Address of data register
- */
-__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
-{
- /* return address of DR register */
- return ((uint32_t) &(USARTx->DR));
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Data_Management Data_Management
- * @{
- */
-
-/**
- * @brief Read Receiver Data register (Receive Data value, 8 bits)
- * @rmtoll DR DR LL_USART_ReceiveData8
- * @param USARTx USART Instance
- * @retval Value between Min_Data=0x00 and Max_Data=0xFF
- */
-__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
-{
- return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
-}
-
-/**
- * @brief Read Receiver Data register (Receive Data value, 9 bits)
- * @rmtoll DR DR LL_USART_ReceiveData9
- * @param USARTx USART Instance
- * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
- */
-__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
-{
- return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
-}
-
-/**
- * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
- * @rmtoll DR DR LL_USART_TransmitData8
- * @param USARTx USART Instance
- * @param Value between Min_Data=0x00 and Max_Data=0xFF
- * @retval None
- */
-__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
-{
- USARTx->DR = Value;
-}
-
-/**
- * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
- * @rmtoll DR DR LL_USART_TransmitData9
- * @param USARTx USART Instance
- * @param Value between Min_Data=0x00 and Max_Data=0x1FF
- * @retval None
- */
-__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
-{
- USARTx->DR = Value & 0x1FFU;
-}
-
-/**
- * @}
- */
-
-/** @defgroup USART_LL_EF_Execution Execution
- * @{
- */
-
-/**
- * @brief Request Break sending
- * @rmtoll CR1 SBK LL_USART_RequestBreakSending
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR1, USART_CR1_SBK);
-}
-
-/**
- * @brief Put USART in Mute mode
- * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
-{
- SET_BIT(USARTx->CR1, USART_CR1_RWU);
-}
-
-/**
- * @brief Put USART in Active mode
- * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
- * @param USARTx USART Instance
- * @retval None
- */
-__STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
-{
- CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
-}
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
- * @{
- */
-ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
-ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
-void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
-ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
-void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_USART_H */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h
deleted file mode 100644
index 8b6cdfea493a94ae21245bf233cb77332d865d70..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h
+++ /dev/null
@@ -1,307 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_ll_utils.h
- * @author MCD Application Team
- * @brief Header file of UTILS LL module.
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The LL UTILS driver contains a set of generic APIs that can be
- used by user:
- (+) Device electronic signature
- (+) Timing functions
- (+) PLL configuration functions
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_LL_UTILS_H
-#define __STM32F4xx_LL_UTILS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx.h"
-
-/** @addtogroup STM32F4xx_LL_Driver
- * @{
- */
-
-/** @defgroup UTILS_LL UTILS
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
- * @{
- */
-
-/* Max delay can be used in LL_mDelay */
-#define LL_MAX_DELAY 0xFFFFFFFFU
-
-/**
- * @brief Unique device ID register base address
- */
-#define UID_BASE_ADDRESS UID_BASE
-
-/**
- * @brief Flash size data register base address
- */
-#define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
-
-/**
- * @brief Package data register base address
- */
-#define PACKAGE_BASE_ADDRESS PACKAGE_BASE
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
- * @{
- */
-/**
- * @}
- */
-/* Exported types ------------------------------------------------------------*/
-/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
- * @{
- */
-/**
- * @brief UTILS PLL structure definition
- */
-typedef struct
-{
- uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
- This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_PLL_ConfigDomain_SYS(). */
-
- uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
- This parameter must be a number between Min_Data = @ref RCC_PLLN_MIN_VALUE
- and Max_Data = @ref RCC_PLLN_MIN_VALUE
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_PLL_ConfigDomain_SYS(). */
-
- uint32_t PLLP; /*!< Division for the main system clock.
- This parameter can be a value of @ref RCC_LL_EC_PLLP_DIV
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_PLL_ConfigDomain_SYS(). */
-} LL_UTILS_PLLInitTypeDef;
-
-/**
- * @brief UTILS System, AHB and APB buses clock configuration structure definition
- */
-typedef struct
-{
- uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
- This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_SetAHBPrescaler(). */
-
- uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
- This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_SetAPB1Prescaler(). */
-
- uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
- This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
-
- This feature can be modified afterwards using unitary function
- @ref LL_RCC_SetAPB2Prescaler(). */
-
-} LL_UTILS_ClkInitTypeDef;
-
-/**
- * @}
- */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
- * @{
- */
-
-/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
- * @{
- */
-#define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
-#define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
-/**
- * @}
- */
-
-/** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
- * @{
- */
-#define LL_UTILS_PACKAGETYPE_WLCSP36_UFQFPN48_LQFP64 0x00000000U /*!< WLCSP36 or UFQFPN48 or LQFP64 package type */
-#define LL_UTILS_PACKAGETYPE_WLCSP168_FBGA169_LQFP100_LQFP64_UFQFPN48 0x00000100U /*!< WLCSP168 or FBGA169 or LQFP100 or LQFP64 or UFQFPN48 package type */
-#define LL_UTILS_PACKAGETYPE_WLCSP64_WLCSP81_LQFP176_UFBGA176 0x00000200U /*!< WLCSP64 or WLCSP81 or LQFP176 or UFBGA176 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP144_UFBGA144_UFBGA144_UFBGA100 0x00000300U /*!< LQFP144 or UFBGA144 or UFBGA144 or UFBGA100 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP100_LQFP208_TFBGA216 0x00000400U /*!< LQFP100 or LQFP208 or TFBGA216 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP208_TFBGA216 0x00000500U /*!< LQFP208 or TFBGA216 package type */
-#define LL_UTILS_PACKAGETYPE_TQFP64_UFBGA144_LQFP144 0x00000700U /*!< TQFP64 or UFBGA144 or LQFP144 package type */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
- * @{
- */
-
-/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
- * @{
- */
-
-/**
- * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
- * @retval UID[31:0]
- */
-__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
-{
- return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
-}
-
-/**
- * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
- * @retval UID[63:32]
- */
-__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
-{
- return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
-}
-
-/**
- * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
- * @retval UID[95:64]
- */
-__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
-{
- return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
-}
-
-/**
- * @brief Get Flash memory size
- * @note This bitfield indicates the size of the device Flash memory expressed in
- * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
- * @retval FLASH_SIZE[15:0]: Flash memory size
- */
-__STATIC_INLINE uint32_t LL_GetFlashSize(void)
-{
- return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFF);
-}
-
-/**
- * @brief Get Package type
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP36_UFQFPN48_LQFP64 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP168_FBGA169_LQFP100_LQFP64_UFQFPN48 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP64_WLCSP81_LQFP176_UFBGA176 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_UFBGA144_UFBGA144_UFBGA100 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_LQFP208_TFBGA216 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_LQFP208_TFBGA216 (*)
- * @arg @ref LL_UTILS_PACKAGETYPE_TQFP64_UFBGA144_LQFP144 (*)
- *
- * (*) value not defined in all devices.
- */
-__STATIC_INLINE uint32_t LL_GetPackageType(void)
-{
- return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x0700U);
-}
-
-/**
- * @}
- */
-
-/** @defgroup UTILS_LL_EF_DELAY DELAY
- * @{
- */
-
-/**
- * @brief This function configures the Cortex-M SysTick source of the time base.
- * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
- * @note When a RTOS is used, it is recommended to avoid changing the SysTick
- * configuration by calling this function, for a delay use rather osDelay RTOS service.
- * @param Ticks Number of ticks
- * @retval None
- */
-__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
-{
- /* Configure the SysTick to have interrupt in 1ms time base */
- SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
-}
-
-void LL_Init1msTick(uint32_t HCLKFrequency);
-void LL_mDelay(uint32_t Delay);
-
-/**
- * @}
- */
-
-/** @defgroup UTILS_EF_SYSTEM SYSTEM
- * @{
- */
-
-void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
-ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
-ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
- LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
- LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_LL_UTILS_H */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/LICENSE.txt
deleted file mode 100644
index b40364c28f3652a3ef7e5e6450ad4648d711f28a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/LICENSE.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-This software component is provided to you as part of a software package and
-applicable license terms are in the Package_license file. If you received this
-software component outside of a package or without applicable license terms,
-the terms of the BSD-3-Clause license shall apply.
-You may obtain a copy of the BSD-3-Clause at:
-https://opensource.org/licenses/BSD-3-Clause
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c
deleted file mode 100644
index 9977a70c1781b7dad1a1958da0564b9420bf01dc..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c
+++ /dev/null
@@ -1,615 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal.c
- * @author MCD Application Team
- * @brief HAL module driver.
- * This is the common part of the HAL initialization
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The common HAL driver contains a set of generic and common APIs that can be
- used by the PPP peripheral drivers and the user to start using the HAL.
- [..]
- The HAL contains two APIs' categories:
- (+) Common HAL APIs
- (+) Services HAL APIs
-
- @endverbatim
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup HAL HAL
- * @brief HAL module driver.
- * @{
- */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup HAL_Private_Constants
- * @{
- */
-/**
- * @brief STM32F4xx HAL Driver version number V1.8.1
- */
-#define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
-#define __STM32F4xx_HAL_VERSION_SUB1 (0x08U) /*!< [23:16] sub1 version */
-#define __STM32F4xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
-#define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
-#define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\
- |(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\
- |(__STM32F4xx_HAL_VERSION_SUB2 << 8U )\
- |(__STM32F4xx_HAL_VERSION_RC))
-
-#define IDCODE_DEVID_MASK 0x00000FFFU
-
-/* ------------ RCC registers bit address in the alias region ----------- */
-#define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
-/* --- MEMRMP Register ---*/
-/* Alias word address of UFB_MODE bit */
-#define MEMRMP_OFFSET SYSCFG_OFFSET
-#define UFB_MODE_BIT_NUMBER SYSCFG_MEMRMP_UFB_MODE_Pos
-#define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32U) + (UFB_MODE_BIT_NUMBER * 4U))
-
-/* --- CMPCR Register ---*/
-/* Alias word address of CMP_PD bit */
-#define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20U)
-#define CMP_PD_BIT_NUMBER SYSCFG_CMPCR_CMP_PD_Pos
-#define CMPCR_CMP_PD_BB (uint32_t)(PERIPH_BB_BASE + (CMPCR_OFFSET * 32U) + (CMP_PD_BIT_NUMBER * 4U))
-
-/* --- MCHDLYCR Register ---*/
-/* Alias word address of BSCKSEL bit */
-#define MCHDLYCR_OFFSET (SYSCFG_OFFSET + 0x30U)
-#define BSCKSEL_BIT_NUMBER SYSCFG_MCHDLYCR_BSCKSEL_Pos
-#define MCHDLYCR_BSCKSEL_BB (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET * 32U) + (BSCKSEL_BIT_NUMBER * 4U))
-/**
- * @}
- */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @addtogroup HAL_Private_Variables
- * @{
- */
-__IO uint32_t uwTick;
-uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
-HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
-/**
- * @}
- */
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup HAL_Exported_Functions HAL Exported Functions
- * @{
- */
-
-/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
- * @brief Initialization and de-initialization functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and Configuration functions #####
- ===============================================================================
- [..] This section provides functions allowing to:
- (+) Initializes the Flash interface the NVIC allocation and initial clock
- configuration. It initializes the systick also when timeout is needed
- and the backup domain when enabled.
- (+) De-Initializes common part of the HAL.
- (+) Configure the time base source to have 1ms time base with a dedicated
- Tick interrupt priority.
- (++) SysTick timer is used by default as source of time base, but user
- can eventually implement his proper time base source (a general purpose
- timer for example or other time source), keeping in mind that Time base
- duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
- handled in milliseconds basis.
- (++) Time base configuration function (HAL_InitTick ()) is called automatically
- at the beginning of the program after reset by HAL_Init() or at any time
- when clock is configured, by HAL_RCC_ClockConfig().
- (++) Source of time base is configured to generate interrupts at regular
- time intervals. Care must be taken if HAL_Delay() is called from a
- peripheral ISR process, the Tick interrupt line must have higher priority
- (numerically lower) than the peripheral interrupt. Otherwise the caller
- ISR process will be blocked.
- (++) functions affecting time base configurations are declared as __weak
- to make override possible in case of other implementations in user file.
-@endverbatim
- * @{
- */
-
-/**
- * @brief This function is used to initialize the HAL Library; it must be the first
- * instruction to be executed in the main program (before to call any other
- * HAL function), it performs the following:
- * Configure the Flash prefetch, instruction and Data caches.
- * Configures the SysTick to generate an interrupt each 1 millisecond,
- * which is clocked by the HSI (at this stage, the clock is not yet
- * configured and thus the system is running from the internal HSI at 16 MHz).
- * Set NVIC Group Priority to 4.
- * Calls the HAL_MspInit() callback function defined in user file
- * "stm32f4xx_hal_msp.c" to do the global low level hardware initialization
- *
- * @note SysTick is used as time base for the HAL_Delay() function, the application
- * need to ensure that the SysTick time base is always set to 1 millisecond
- * to have correct HAL operation.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_Init(void)
-{
- /* Configure Flash prefetch, Instruction cache, Data cache */
-#if (INSTRUCTION_CACHE_ENABLE != 0U)
- __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
-#endif /* INSTRUCTION_CACHE_ENABLE */
-
-#if (DATA_CACHE_ENABLE != 0U)
- __HAL_FLASH_DATA_CACHE_ENABLE();
-#endif /* DATA_CACHE_ENABLE */
-
-#if (PREFETCH_ENABLE != 0U)
- __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
- /* Set Interrupt Group Priority */
- HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-
- /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
- HAL_InitTick(TICK_INT_PRIORITY);
-
- /* Init the low level hardware */
- HAL_MspInit();
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief This function de-Initializes common part of the HAL and stops the systick.
- * This function is optional.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DeInit(void)
-{
- /* Reset of all peripherals */
- __HAL_RCC_APB1_FORCE_RESET();
- __HAL_RCC_APB1_RELEASE_RESET();
-
- __HAL_RCC_APB2_FORCE_RESET();
- __HAL_RCC_APB2_RELEASE_RESET();
-
- __HAL_RCC_AHB1_FORCE_RESET();
- __HAL_RCC_AHB1_RELEASE_RESET();
-
- __HAL_RCC_AHB2_FORCE_RESET();
- __HAL_RCC_AHB2_RELEASE_RESET();
-
- __HAL_RCC_AHB3_FORCE_RESET();
- __HAL_RCC_AHB3_RELEASE_RESET();
-
- /* De-Init the low level hardware */
- HAL_MspDeInit();
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Initialize the MSP.
- * @retval None
- */
-__weak void HAL_MspInit(void)
-{
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes the MSP.
- * @retval None
- */
-__weak void HAL_MspDeInit(void)
-{
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief This function configures the source of the time base.
- * The time source is configured to have 1ms time base with a dedicated
- * Tick interrupt priority.
- * @note This function is called automatically at the beginning of program after
- * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
- * @note In the default implementation, SysTick timer is the source of time base.
- * It is used to generate interrupts at regular time intervals.
- * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
- * The SysTick interrupt must have higher priority (numerically lower)
- * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
- * The function is declared as __weak to be overwritten in case of other
- * implementation in user file.
- * @param TickPriority Tick interrupt priority.
- * @retval HAL status
- */
-__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
- /* Configure the SysTick to have interrupt in 1ms time basis*/
- if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- {
- return HAL_ERROR;
- }
-
- /* Configure the SysTick IRQ priority */
- if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- {
- HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- uwTickPrio = TickPriority;
- }
- else
- {
- return HAL_ERROR;
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
- * @brief HAL Control functions
- *
-@verbatim
- ===============================================================================
- ##### HAL Control functions #####
- ===============================================================================
- [..] This section provides functions allowing to:
- (+) Provide a tick value in millisecond
- (+) Provide a blocking delay in millisecond
- (+) Suspend the time base source interrupt
- (+) Resume the time base source interrupt
- (+) Get the HAL API driver version
- (+) Get the device identifier
- (+) Get the device revision identifier
- (+) Enable/Disable Debug module during SLEEP mode
- (+) Enable/Disable Debug module during STOP mode
- (+) Enable/Disable Debug module during STANDBY mode
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief This function is called to increment a global variable "uwTick"
- * used as application time base.
- * @note In the default implementation, this variable is incremented each 1ms
- * in SysTick ISR.
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
-__weak void HAL_IncTick(void)
-{
- uwTick += uwTickFreq;
-}
-
-/**
- * @brief Provides a tick value in millisecond.
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval tick value
- */
-__weak uint32_t HAL_GetTick(void)
-{
- return uwTick;
-}
-
-/**
- * @brief This function returns a tick priority.
- * @retval tick priority
- */
-uint32_t HAL_GetTickPrio(void)
-{
- return uwTickPrio;
-}
-
-/**
- * @brief Set new tick Freq.
- * @retval Status
- */
-HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
-{
- HAL_StatusTypeDef status = HAL_OK;
- HAL_TickFreqTypeDef prevTickFreq;
-
- assert_param(IS_TICKFREQ(Freq));
-
- if (uwTickFreq != Freq)
- {
- /* Back up uwTickFreq frequency */
- prevTickFreq = uwTickFreq;
-
- /* Update uwTickFreq global variable used by HAL_InitTick() */
- uwTickFreq = Freq;
-
- /* Apply the new tick Freq */
- status = HAL_InitTick(uwTickPrio);
-
- if (status != HAL_OK)
- {
- /* Restore previous tick frequency */
- uwTickFreq = prevTickFreq;
- }
- }
-
- return status;
-}
-
-/**
- * @brief Return tick frequency.
- * @retval tick period in Hz
- */
-HAL_TickFreqTypeDef HAL_GetTickFreq(void)
-{
- return uwTickFreq;
-}
-
-/**
- * @brief This function provides minimum delay (in milliseconds) based
- * on variable incremented.
- * @note In the default implementation , SysTick timer is the source of time base.
- * It is used to generate interrupts at regular time intervals where uwTick
- * is incremented.
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @param Delay specifies the delay time length, in milliseconds.
- * @retval None
- */
-__weak void HAL_Delay(uint32_t Delay)
-{
- uint32_t tickstart = HAL_GetTick();
- uint32_t wait = Delay;
-
- /* Add a freq to guarantee minimum wait */
- if (wait < HAL_MAX_DELAY)
- {
- wait += (uint32_t)(uwTickFreq);
- }
-
- while((HAL_GetTick() - tickstart) < wait)
- {
- }
-}
-
-/**
- * @brief Suspend Tick increment.
- * @note In the default implementation , SysTick timer is the source of time base. It is
- * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
- * is called, the SysTick interrupt will be disabled and so Tick increment
- * is suspended.
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
-__weak void HAL_SuspendTick(void)
-{
- /* Disable SysTick Interrupt */
- SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
-}
-
-/**
- * @brief Resume Tick increment.
- * @note In the default implementation , SysTick timer is the source of time base. It is
- * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
- * is called, the SysTick interrupt will be enabled and so Tick increment
- * is resumed.
- * @note This function is declared as __weak to be overwritten in case of other
- * implementations in user file.
- * @retval None
- */
-__weak void HAL_ResumeTick(void)
-{
- /* Enable SysTick Interrupt */
- SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
-}
-
-/**
- * @brief Returns the HAL revision
- * @retval version : 0xXYZR (8bits for each decimal, R for RC)
- */
-uint32_t HAL_GetHalVersion(void)
-{
- return __STM32F4xx_HAL_VERSION;
-}
-
-/**
- * @brief Returns the device revision identifier.
- * @retval Device revision identifier
- */
-uint32_t HAL_GetREVID(void)
-{
- return((DBGMCU->IDCODE) >> 16U);
-}
-
-/**
- * @brief Returns the device identifier.
- * @retval Device identifier
- */
-uint32_t HAL_GetDEVID(void)
-{
- return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
-}
-
-/**
- * @brief Enable the Debug Module during SLEEP mode
- * @retval None
- */
-void HAL_DBGMCU_EnableDBGSleepMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
- * @brief Disable the Debug Module during SLEEP mode
- * @retval None
- */
-void HAL_DBGMCU_DisableDBGSleepMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
-}
-
-/**
- * @brief Enable the Debug Module during STOP mode
- * @retval None
- */
-void HAL_DBGMCU_EnableDBGStopMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
- * @brief Disable the Debug Module during STOP mode
- * @retval None
- */
-void HAL_DBGMCU_DisableDBGStopMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
- * @brief Enable the Debug Module during STANDBY mode
- * @retval None
- */
-void HAL_DBGMCU_EnableDBGStandbyMode(void)
-{
- SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
- * @brief Disable the Debug Module during STANDBY mode
- * @retval None
- */
-void HAL_DBGMCU_DisableDBGStandbyMode(void)
-{
- CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
- * @brief Enables the I/O Compensation Cell.
- * @note The I/O compensation cell can be used only when the device supply
- * voltage ranges from 2.4 to 3.6 V.
- * @retval None
- */
-void HAL_EnableCompensationCell(void)
-{
- *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Power-down the I/O Compensation Cell.
- * @note The I/O compensation cell can be used only when the device supply
- * voltage ranges from 2.4 to 3.6 V.
- * @retval None
- */
-void HAL_DisableCompensationCell(void)
-{
- *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)DISABLE;
-}
-
-/**
- * @brief Returns first word of the unique device identifier (UID based on 96 bits)
- * @retval Device identifier
- */
-uint32_t HAL_GetUIDw0(void)
-{
- return (READ_REG(*((uint32_t *)UID_BASE)));
-}
-
-/**
- * @brief Returns second word of the unique device identifier (UID based on 96 bits)
- * @retval Device identifier
- */
-uint32_t HAL_GetUIDw1(void)
-{
- return (READ_REG(*((uint32_t *)(UID_BASE + 4U))));
-}
-
-/**
- * @brief Returns third word of the unique device identifier (UID based on 96 bits)
- * @retval Device identifier
- */
-uint32_t HAL_GetUIDw2(void)
-{
- return (READ_REG(*((uint32_t *)(UID_BASE + 8U))));
-}
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Enables the Internal FLASH Bank Swapping.
- *
- * @note This function can be used only for STM32F42xxx/43xxx/469xx/479xx devices.
- *
- * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
- * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
- *
- * @retval None
- */
-void HAL_EnableMemorySwappingBank(void)
-{
- *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables the Internal FLASH Bank Swapping.
- *
- * @note This function can be used only for STM32F42xxx/43xxx/469xx/479xx devices.
- *
- * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x00000000)
- * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
- *
- * @retval None
- */
-void HAL_DisableMemorySwappingBank(void)
-{
- *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)DISABLE;
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c
deleted file mode 100644
index 5970852df7af3239cc2097ae8ee412734ef29e25..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c
+++ /dev/null
@@ -1,502 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_cortex.c
- * @author MCD Application Team
- * @brief CORTEX HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the CORTEX:
- * + Initialization and de-initialization functions
- * + Peripheral Control functions
- *
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
-
- [..]
- *** How to configure Interrupts using CORTEX HAL driver ***
- ===========================================================
- [..]
- This section provides functions allowing to configure the NVIC interrupts (IRQ).
- The Cortex-M4 exceptions are managed by CMSIS functions.
-
- (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
- function according to the following table.
- (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
- (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
- (#) please refer to programming manual for details in how to configure priority.
-
- -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
- The pending IRQ priority will be managed only by the sub priority.
-
- -@- IRQ priority order (sorted by highest to lowest priority):
- (+@) Lowest preemption priority
- (+@) Lowest sub priority
- (+@) Lowest hardware priority (IRQ number)
-
- [..]
- *** How to configure Systick using CORTEX HAL driver ***
- ========================================================
- [..]
- Setup SysTick Timer for time base.
-
- (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
- is a CMSIS function that:
- (++) Configures the SysTick Reload register with value passed as function parameter.
- (++) Configures the SysTick IRQ priority to the lowest value 0x0F.
- (++) Resets the SysTick Counter register.
- (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
- (++) Enables the SysTick Interrupt.
- (++) Starts the SysTick Counter.
-
- (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
- __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
- HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
- inside the stm32f4xx_hal_cortex.h file.
-
- (+) You can change the SysTick IRQ priority by calling the
- HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
- call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
-
- (+) To adjust the SysTick time base, use the following formula:
-
- Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
- (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
- (++) Reload Value should not exceed 0xFFFFFF
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup CORTEX CORTEX
- * @brief CORTEX HAL module driver
- * @{
- */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
- * @{
- */
-
-
-/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ==============================================================================
- ##### Initialization and de-initialization functions #####
- ==============================================================================
- [..]
- This section provides the CORTEX HAL driver functions allowing to configure Interrupts
- Systick functionalities
-
-@endverbatim
- * @{
- */
-
-
-/**
- * @brief Sets the priority grouping field (preemption priority and subpriority)
- * using the required unlock sequence.
- * @param PriorityGroup The priority grouping bits length.
- * This parameter can be one of the following values:
- * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
- * 4 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
- * 3 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
- * 2 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
- * 1 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
- * 0 bits for subpriority
- * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
- * The pending IRQ priority will be managed only by the subpriority.
- * @retval None
- */
-void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
-
- /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
- NVIC_SetPriorityGrouping(PriorityGroup);
-}
-
-/**
- * @brief Sets the priority of an interrupt.
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @param PreemptPriority The preemption priority for the IRQn channel.
- * This parameter can be a value between 0 and 15
- * A lower priority value indicates a higher priority
- * @param SubPriority the subpriority level for the IRQ channel.
- * This parameter can be a value between 0 and 15
- * A lower priority value indicates a higher priority.
- * @retval None
- */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t prioritygroup = 0x00U;
-
- /* Check the parameters */
- assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
- assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-
- prioritygroup = NVIC_GetPriorityGrouping();
-
- NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
-}
-
-/**
- * @brief Enables a device specific interrupt in the NVIC interrupt controller.
- * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
- * function should be called before.
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval None
- */
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Enable interrupt */
- NVIC_EnableIRQ(IRQn);
-}
-
-/**
- * @brief Disables a device specific interrupt in the NVIC interrupt controller.
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval None
- */
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Disable interrupt */
- NVIC_DisableIRQ(IRQn);
-}
-
-/**
- * @brief Initiates a system reset request to reset the MCU.
- * @retval None
- */
-void HAL_NVIC_SystemReset(void)
-{
- /* System Reset */
- NVIC_SystemReset();
-}
-
-/**
- * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- * Counter is in free running mode to generate periodic interrupts.
- * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
- * @retval status: - 0 Function succeeded.
- * - 1 Function failed.
- */
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
-{
- return SysTick_Config(TicksNumb);
-}
-/**
- * @}
- */
-
-/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
- * @brief Cortex control functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral Control functions #####
- ==============================================================================
- [..]
- This subsection provides a set of functions allowing to control the CORTEX
- (NVIC, SYSTICK, MPU) functionalities.
-
-
-@endverbatim
- * @{
- */
-
-#if (__MPU_PRESENT == 1U)
-/**
- * @brief Disables the MPU
- * @retval None
- */
-void HAL_MPU_Disable(void)
-{
- /* Make sure outstanding transfers are done */
- __DMB();
-
- /* Disable fault exceptions */
- SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-
- /* Disable the MPU and clear the control register*/
- MPU->CTRL = 0U;
-}
-
-/**
- * @brief Enable the MPU.
- * @param MPU_Control Specifies the control mode of the MPU during hard fault,
- * NMI, FAULTMASK and privileged access to the default memory
- * This parameter can be one of the following values:
- * @arg MPU_HFNMI_PRIVDEF_NONE
- * @arg MPU_HARDFAULT_NMI
- * @arg MPU_PRIVILEGED_DEFAULT
- * @arg MPU_HFNMI_PRIVDEF
- * @retval None
- */
-void HAL_MPU_Enable(uint32_t MPU_Control)
-{
- /* Enable the MPU */
- MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-
- /* Enable fault exceptions */
- SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-
- /* Ensure MPU setting take effects */
- __DSB();
- __ISB();
-}
-
-/**
- * @brief Initializes and configures the Region and the memory to be protected.
- * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
- * the initialization and configuration information.
- * @retval None
- */
-void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
-{
- /* Check the parameters */
- assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
- assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
-
- /* Set the Region number */
- MPU->RNR = MPU_Init->Number;
-
- if ((MPU_Init->Enable) != RESET)
- {
- /* Check the parameters */
- assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
- assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
- assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
- assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
- assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
- assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
- assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
- assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
-
- MPU->RBAR = MPU_Init->BaseAddress;
- MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
- ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
- ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
- ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
- ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
- ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
- ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
- ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
- ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
- }
- else
- {
- MPU->RBAR = 0x00U;
- MPU->RASR = 0x00U;
- }
-}
-#endif /* __MPU_PRESENT */
-
-/**
- * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
- * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
- */
-uint32_t HAL_NVIC_GetPriorityGrouping(void)
-{
- /* Get the PRIGROUP[10:8] field value */
- return NVIC_GetPriorityGrouping();
-}
-
-/**
- * @brief Gets the priority of an interrupt.
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @param PriorityGroup the priority grouping bits length.
- * This parameter can be one of the following values:
- * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
- * 4 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
- * 3 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
- * 2 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
- * 1 bits for subpriority
- * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
- * 0 bits for subpriority
- * @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0).
- * @param pSubPriority Pointer on the Subpriority value (starting from 0).
- * @retval None
- */
-void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
- /* Get priority for Cortex-M system or device specific interrupts */
- NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
-}
-
-/**
- * @brief Sets Pending bit of an external interrupt.
- * @param IRQn External interrupt number
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval None
- */
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Set interrupt pending */
- NVIC_SetPendingIRQ(IRQn);
-}
-
-/**
- * @brief Gets Pending Interrupt (reads the pending register in the NVIC
- * and returns the pending bit for the specified interrupt).
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval status: - 0 Interrupt status is not pending.
- * - 1 Interrupt status is pending.
- */
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Return 1 if pending else 0 */
- return NVIC_GetPendingIRQ(IRQn);
-}
-
-/**
- * @brief Clears the pending bit of an external interrupt.
- * @param IRQn External interrupt number.
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval None
- */
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Clear pending interrupt */
- NVIC_ClearPendingIRQ(IRQn);
-}
-
-/**
- * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
- * @param IRQn External interrupt number
- * This parameter can be an enumerator of IRQn_Type enumeration
- * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
- * @retval status: - 0 Interrupt status is not pending.
- * - 1 Interrupt status is pending.
- */
-uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
-{
- /* Check the parameters */
- assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-
- /* Return 1 if active else 0 */
- return NVIC_GetActive(IRQn);
-}
-
-/**
- * @brief Configures the SysTick clock source.
- * @param CLKSource specifies the SysTick clock source.
- * This parameter can be one of the following values:
- * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
- * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
- * @retval None
- */
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
-{
- /* Check the parameters */
- assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
- if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
- {
- SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
- }
- else
- {
- SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
- }
-}
-
-/**
- * @brief This function handles SYSTICK interrupt request.
- * @retval None
- */
-void HAL_SYSTICK_IRQHandler(void)
-{
- HAL_SYSTICK_Callback();
-}
-
-/**
- * @brief SYSTICK callback.
- * @retval None
- */
-__weak void HAL_SYSTICK_Callback(void)
-{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_SYSTICK_Callback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c
deleted file mode 100644
index 2bc5f27c104eed640dbccd465fdd4c0aba01f43f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c
+++ /dev/null
@@ -1,1305 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_dma.c
- * @author MCD Application Team
- * @brief DMA HAL module driver.
- *
- * This file provides firmware functions to manage the following
- * functionalities of the Direct Memory Access (DMA) peripheral:
- * + Initialization and de-initialization functions
- * + IO operation functions
- * + Peripheral State and errors functions
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- (#) Enable and configure the peripheral to be connected to the DMA Stream
- (except for internal SRAM/FLASH memories: no initialization is
- necessary) please refer to Reference manual for connection between peripherals
- and DMA requests.
-
- (#) For a given Stream, program the required configuration through the following parameters:
- Transfer Direction, Source and Destination data formats,
- Circular, Normal or peripheral flow control mode, Stream Priority level,
- Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
- Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
-
- -@- Prior to HAL_DMA_Init() the clock must be enabled for DMA through the following macros:
- __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE().
-
- *** Polling mode IO operation ***
- =================================
- [..]
- (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
- address and destination address and the Length of data to be transferred.
- (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
- case a fixed Timeout can be configured by User depending from his application.
- (+) Use HAL_DMA_Abort() function to abort the current transfer.
-
- *** Interrupt mode IO operation ***
- ===================================
- [..]
- (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
- (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
- (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
- Source address and destination address and the Length of data to be transferred. In this
- case the DMA interrupt is configured
- (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
- (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
- add his own function by customization of function pointer XferCpltCallback and
- XferErrorCallback (i.e a member of DMA handle structure).
- [..]
- (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
- detection.
-
- (#) Use HAL_DMA_Abort_IT() function to abort the current transfer
-
- -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
-
- -@- The FIFO is used mainly to reduce bus usage and to allow data packing/unpacking: it is
- possible to set different Data Sizes for the Peripheral and the Memory (ie. you can set
- Half-Word data size for the peripheral to access its data register and set Word data size
- for the Memory to gain in access time. Each two half words will be packed and written in
- a single access to a Word in the Memory).
-
- -@- When FIFO is disabled, it is not allowed to configure different Data Sizes for Source
- and Destination. In this case the Peripheral Data Size will be applied to both Source
- and Destination.
-
- *** DMA HAL driver macros list ***
- =============================================
- [..]
- Below the list of most used macros in DMA HAL driver.
-
- (+) __HAL_DMA_ENABLE: Enable the specified DMA Stream.
- (+) __HAL_DMA_DISABLE: Disable the specified DMA Stream.
- (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Stream interrupt has occurred or not.
-
- [..]
- (@) You can refer to the DMA HAL driver header file for more useful macros
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup DMA DMA
- * @brief DMA HAL module driver
- * @{
- */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-
-/* Private types -------------------------------------------------------------*/
-typedef struct
-{
- __IO uint32_t ISR; /*!< DMA interrupt status register */
- __IO uint32_t Reserved0;
- __IO uint32_t IFCR; /*!< DMA interrupt flag clear register */
-} DMA_Base_Registers;
-
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup DMA_Private_Constants
- * @{
- */
- #define HAL_TIMEOUT_DMA_ABORT 5U /* 5 ms */
-/**
- * @}
- */
-/* Private macros ------------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/** @addtogroup DMA_Private_Functions
- * @{
- */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma);
-
-/**
- * @}
- */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @addtogroup DMA_Exported_Functions
- * @{
- */
-
-/** @addtogroup DMA_Exported_Functions_Group1
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..]
- This section provides functions allowing to initialize the DMA Stream source
- and destination addresses, incrementation and data sizes, transfer direction,
- circular/normal mode selection, memory-to-memory mode selection and Stream priority value.
- [..]
- The HAL_DMA_Init() function follows the DMA configuration procedures as described in
- reference manual.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Initialize the DMA according to the specified
- * parameters in the DMA_InitTypeDef and create the associated handle.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
-{
- uint32_t tmp = 0U;
- uint32_t tickstart = HAL_GetTick();
- DMA_Base_Registers *regs;
-
- /* Check the DMA peripheral state */
- if(hdma == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
- assert_param(IS_DMA_CHANNEL(hdma->Init.Channel));
- assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
- assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
- assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
- assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
- assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
- assert_param(IS_DMA_MODE(hdma->Init.Mode));
- assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
- assert_param(IS_DMA_FIFO_MODE_STATE(hdma->Init.FIFOMode));
- /* Check the memory burst, peripheral burst and FIFO threshold parameters only
- when FIFO mode is enabled */
- if(hdma->Init.FIFOMode != DMA_FIFOMODE_DISABLE)
- {
- assert_param(IS_DMA_FIFO_THRESHOLD(hdma->Init.FIFOThreshold));
- assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
- assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
- }
-
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
-
- /* Allocate lock resource */
- __HAL_UNLOCK(hdma);
-
- /* Disable the peripheral */
- __HAL_DMA_DISABLE(hdma);
-
- /* Check if the DMA Stream is effectively disabled */
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- {
- /* Check for the Timeout */
- if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_TIMEOUT;
-
- return HAL_TIMEOUT;
- }
- }
-
- /* Get the CR register value */
- tmp = hdma->Instance->CR;
-
- /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
- tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
- DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
- DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
- DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
-
- /* Prepare the DMA Stream configuration */
- tmp |= hdma->Init.Channel | hdma->Init.Direction |
- hdma->Init.PeriphInc | hdma->Init.MemInc |
- hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- hdma->Init.Mode | hdma->Init.Priority;
-
- /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- {
- /* Get memory burst and peripheral burst */
- tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
- }
-
- /* Write to DMA Stream CR register */
- hdma->Instance->CR = tmp;
-
- /* Get the FCR register value */
- tmp = hdma->Instance->FCR;
-
- /* Clear Direct mode and FIFO threshold bits */
- tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
-
- /* Prepare the DMA Stream FIFO configuration */
- tmp |= hdma->Init.FIFOMode;
-
- /* The FIFO threshold is not used when the FIFO mode is disabled */
- if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
- {
- /* Get the FIFO threshold */
- tmp |= hdma->Init.FIFOThreshold;
-
- /* Check compatibility between FIFO threshold level and size of the memory burst */
- /* for INCR4, INCR8, INCR16 bursts */
- if (hdma->Init.MemBurst != DMA_MBURST_SINGLE)
- {
- if (DMA_CheckFifoParam(hdma) != HAL_OK)
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- return HAL_ERROR;
- }
- }
- }
-
- /* Write to DMA Stream FCR */
- hdma->Instance->FCR = tmp;
-
- /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
- DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
- regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
-
- /* Clear all interrupt flags */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
- /* Initialize the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the DMA peripheral
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
-{
- DMA_Base_Registers *regs;
-
- /* Check the DMA peripheral state */
- if(hdma == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the DMA peripheral state */
- if(hdma->State == HAL_DMA_STATE_BUSY)
- {
- /* Return error status */
- return HAL_BUSY;
- }
-
- /* Check the parameters */
- assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
-
- /* Disable the selected DMA Streamx */
- __HAL_DMA_DISABLE(hdma);
-
- /* Reset DMA Streamx control register */
- hdma->Instance->CR = 0U;
-
- /* Reset DMA Streamx number of data to transfer register */
- hdma->Instance->NDTR = 0U;
-
- /* Reset DMA Streamx peripheral address register */
- hdma->Instance->PAR = 0U;
-
- /* Reset DMA Streamx memory 0 address register */
- hdma->Instance->M0AR = 0U;
-
- /* Reset DMA Streamx memory 1 address register */
- hdma->Instance->M1AR = 0U;
-
- /* Reset DMA Streamx FIFO control register */
- hdma->Instance->FCR = 0x00000021U;
-
- /* Get DMA steam Base Address */
- regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
-
- /* Clean all callbacks */
- hdma->XferCpltCallback = NULL;
- hdma->XferHalfCpltCallback = NULL;
- hdma->XferM1CpltCallback = NULL;
- hdma->XferM1HalfCpltCallback = NULL;
- hdma->XferErrorCallback = NULL;
- hdma->XferAbortCallback = NULL;
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
-
- /* Reset the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
- /* Reset the DMA state */
- hdma->State = HAL_DMA_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(hdma);
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @addtogroup DMA_Exported_Functions_Group2
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
- [..] This section provides functions allowing to:
- (+) Configure the source, destination address and data length and Start DMA transfer
- (+) Configure the source, destination address and data length and
- Start DMA transfer with interrupt
- (+) Abort DMA transfer
- (+) Poll for transfer complete
- (+) Handle DMA interrupt request
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Starts the DMA Transfer.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Process locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
- /* Configure the source, destination address and the data length */
- DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-
- /* Enable the Peripheral */
- __HAL_DMA_ENABLE(hdma);
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
-
- /* Return error status */
- status = HAL_BUSY;
- }
- return status;
-}
-
-/**
- * @brief Start the DMA Transfer with interrupt enabled.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Process locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
- /* Configure the source, destination address and the data length */
- DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
-
- /* Enable Common interrupts*/
- hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
-
- if(hdma->XferHalfCpltCallback != NULL)
- {
- hdma->Instance->CR |= DMA_IT_HT;
- }
-
- /* Enable the Peripheral */
- __HAL_DMA_ENABLE(hdma);
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
-
- /* Return error status */
- status = HAL_BUSY;
- }
-
- return status;
-}
-
-/**
- * @brief Aborts the DMA Transfer.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- *
- * @note After disabling a DMA Stream, a check for wait until the DMA Stream is
- * effectively disabled is added. If a Stream is disabled
- * while a data transfer is ongoing, the current data will be transferred
- * and the Stream will be effectively disabled only after the transfer of
- * this single data is finished.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
-{
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
-
- uint32_t tickstart = HAL_GetTick();
-
- if(hdma->State != HAL_DMA_STATE_BUSY)
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
- return HAL_ERROR;
- }
- else
- {
- /* Disable all the transfer interrupts */
- hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
- hdma->Instance->FCR &= ~(DMA_IT_FE);
-
- if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
- {
- hdma->Instance->CR &= ~(DMA_IT_HT);
- }
-
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
-
- /* Check if the DMA Stream is effectively disabled */
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET)
- {
- /* Check for the Timeout */
- if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
- return HAL_TIMEOUT;
- }
- }
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
-
- /* Change the DMA state*/
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- }
- return HAL_OK;
-}
-
-/**
- * @brief Aborts the DMA Transfer in Interrupt mode.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
-{
- if(hdma->State != HAL_DMA_STATE_BUSY)
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- return HAL_ERROR;
- }
- else
- {
- /* Set Abort State */
- hdma->State = HAL_DMA_STATE_ABORT;
-
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Polling for transfer complete.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param CompleteLevel Specifies the DMA level complete.
- * @note The polling mode is kept in this version for legacy. it is recommended to use the IT model instead.
- * This model could be used for debug purpose.
- * @note The HAL_DMA_PollForTransfer API cannot be used in circular and double buffering mode (automatic circular mode).
- * @param Timeout Timeout duration.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t mask_cpltlevel;
- uint32_t tickstart = HAL_GetTick();
- uint32_t tmpisr;
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs;
-
- if(HAL_DMA_STATE_BUSY != hdma->State)
- {
- /* No transfer ongoing */
- hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- __HAL_UNLOCK(hdma);
- return HAL_ERROR;
- }
-
- /* Polling mode not supported in circular mode and double buffering mode */
- if ((hdma->Instance->CR & DMA_SxCR_CIRC) != RESET)
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
- return HAL_ERROR;
- }
-
- /* Get the level transfer complete flag */
- if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
- {
- /* Transfer Complete flag */
- mask_cpltlevel = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
- }
- else
- {
- /* Half Transfer Complete flag */
- mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
- }
-
- regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
- tmpisr = regs->ISR;
-
- while(((tmpisr & mask_cpltlevel) == RESET) && ((hdma->ErrorCode & HAL_DMA_ERROR_TE) == RESET))
- {
- /* Check for the Timeout (Not applicable in circular mode)*/
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
- {
- /* Update error code */
- hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
- return HAL_TIMEOUT;
- }
- }
-
- /* Get the ISR register value */
- tmpisr = regs->ISR;
-
- if((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_TE;
-
- /* Clear the transfer error flag */
- regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
- }
-
- if((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_FE;
-
- /* Clear the FIFO error flag */
- regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
- }
-
- if((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_DME;
-
- /* Clear the Direct Mode error flag */
- regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
- }
- }
-
- if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
- {
- if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
- {
- HAL_DMA_Abort(hdma);
-
- /* Clear the half transfer and transfer complete flags */
- regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;
-
- /* Change the DMA state */
- hdma->State= HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
- return HAL_ERROR;
- }
- }
-
- /* Get the level transfer complete flag */
- if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
- {
- /* Clear the half transfer and transfer complete flags */
- regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex;
-
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- }
- else
- {
- /* Clear the half transfer and transfer complete flags */
- regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex;
- }
-
- return status;
-}
-
-/**
- * @brief Handles DMA interrupt request.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval None
- */
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
-{
- uint32_t tmpisr;
- __IO uint32_t count = 0U;
- uint32_t timeout = SystemCoreClock / 9600U;
-
- /* calculate DMA base and stream number */
- DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
-
- tmpisr = regs->ISR;
-
- /* Transfer Error Interrupt management ***************************************/
- if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
- {
- /* Disable the transfer error interrupt */
- hdma->Instance->CR &= ~(DMA_IT_TE);
-
- /* Clear the transfer error flag */
- regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_TE;
- }
- }
- /* FIFO Error Interrupt management ******************************************/
- if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
- {
- /* Clear the FIFO error flag */
- regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_FE;
- }
- }
- /* Direct Mode Error Interrupt management ***********************************/
- if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
- {
- /* Clear the direct mode error flag */
- regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
-
- /* Update error code */
- hdma->ErrorCode |= HAL_DMA_ERROR_DME;
- }
- }
- /* Half Transfer Complete Interrupt management ******************************/
- if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
- {
- /* Clear the half transfer complete flag */
- regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
-
- /* Multi_Buffering mode enabled */
- if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
- {
- /* Current memory buffer used is Memory 0 */
- if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
- {
- if(hdma->XferHalfCpltCallback != NULL)
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferM1HalfCpltCallback != NULL)
- {
- /* Half transfer callback */
- hdma->XferM1HalfCpltCallback(hdma);
- }
- }
- }
- else
- {
- /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
- if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
- {
- /* Disable the half transfer interrupt */
- hdma->Instance->CR &= ~(DMA_IT_HT);
- }
-
- if(hdma->XferHalfCpltCallback != NULL)
- {
- /* Half transfer callback */
- hdma->XferHalfCpltCallback(hdma);
- }
- }
- }
- }
- /* Transfer Complete Interrupt management ***********************************/
- if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)
- {
- if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
- {
- /* Clear the transfer complete flag */
- regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
-
- if(HAL_DMA_STATE_ABORT == hdma->State)
- {
- /* Disable all the transfer interrupts */
- hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
- hdma->Instance->FCR &= ~(DMA_IT_FE);
-
- if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
- {
- hdma->Instance->CR &= ~(DMA_IT_HT);
- }
-
- /* Clear all interrupt flags at correct offset within the register */
- regs->IFCR = 0x3FU << hdma->StreamIndex;
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
-
- if(hdma->XferAbortCallback != NULL)
- {
- hdma->XferAbortCallback(hdma);
- }
- return;
- }
-
- if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
- {
- /* Current memory buffer used is Memory 0 */
- if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
- {
- if(hdma->XferM1CpltCallback != NULL)
- {
- /* Transfer complete Callback for memory1 */
- hdma->XferM1CpltCallback(hdma);
- }
- }
- /* Current memory buffer used is Memory 1 */
- else
- {
- if(hdma->XferCpltCallback != NULL)
- {
- /* Transfer complete Callback for memory0 */
- hdma->XferCpltCallback(hdma);
- }
- }
- }
- /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
- else
- {
- if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
- {
- /* Disable the transfer complete interrupt */
- hdma->Instance->CR &= ~(DMA_IT_TC);
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- }
-
- if(hdma->XferCpltCallback != NULL)
- {
- /* Transfer complete callback */
- hdma->XferCpltCallback(hdma);
- }
- }
- }
- }
-
- /* manage error case */
- if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
- {
- if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
- {
- hdma->State = HAL_DMA_STATE_ABORT;
-
- /* Disable the stream */
- __HAL_DMA_DISABLE(hdma);
-
- do
- {
- if (++count > timeout)
- {
- break;
- }
- }
- while((hdma->Instance->CR & DMA_SxCR_EN) != RESET);
-
- /* Change the DMA state */
- hdma->State = HAL_DMA_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hdma);
- }
-
- if(hdma->XferErrorCallback != NULL)
- {
- /* Transfer error callback */
- hdma->XferErrorCallback(hdma);
- }
- }
-}
-
-/**
- * @brief Register callbacks
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param CallbackID User Callback identifier
- * a DMA_HandleTypeDef structure as parameter.
- * @param pCallback pointer to private callback function which has pointer to
- * a DMA_HandleTypeDef structure as parameter.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma))
-{
-
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- switch (CallbackID)
- {
- case HAL_DMA_XFER_CPLT_CB_ID:
- hdma->XferCpltCallback = pCallback;
- break;
-
- case HAL_DMA_XFER_HALFCPLT_CB_ID:
- hdma->XferHalfCpltCallback = pCallback;
- break;
-
- case HAL_DMA_XFER_M1CPLT_CB_ID:
- hdma->XferM1CpltCallback = pCallback;
- break;
-
- case HAL_DMA_XFER_M1HALFCPLT_CB_ID:
- hdma->XferM1HalfCpltCallback = pCallback;
- break;
-
- case HAL_DMA_XFER_ERROR_CB_ID:
- hdma->XferErrorCallback = pCallback;
- break;
-
- case HAL_DMA_XFER_ABORT_CB_ID:
- hdma->XferAbortCallback = pCallback;
- break;
-
- default:
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hdma);
-
- return status;
-}
-
-/**
- * @brief UnRegister callbacks
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param CallbackID User Callback identifier
- * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- switch (CallbackID)
- {
- case HAL_DMA_XFER_CPLT_CB_ID:
- hdma->XferCpltCallback = NULL;
- break;
-
- case HAL_DMA_XFER_HALFCPLT_CB_ID:
- hdma->XferHalfCpltCallback = NULL;
- break;
-
- case HAL_DMA_XFER_M1CPLT_CB_ID:
- hdma->XferM1CpltCallback = NULL;
- break;
-
- case HAL_DMA_XFER_M1HALFCPLT_CB_ID:
- hdma->XferM1HalfCpltCallback = NULL;
- break;
-
- case HAL_DMA_XFER_ERROR_CB_ID:
- hdma->XferErrorCallback = NULL;
- break;
-
- case HAL_DMA_XFER_ABORT_CB_ID:
- hdma->XferAbortCallback = NULL;
- break;
-
- case HAL_DMA_XFER_ALL_CB_ID:
- hdma->XferCpltCallback = NULL;
- hdma->XferHalfCpltCallback = NULL;
- hdma->XferM1CpltCallback = NULL;
- hdma->XferM1HalfCpltCallback = NULL;
- hdma->XferErrorCallback = NULL;
- hdma->XferAbortCallback = NULL;
- break;
-
- default:
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hdma);
-
- return status;
-}
-
-/**
- * @}
- */
-
-/** @addtogroup DMA_Exported_Functions_Group3
- *
-@verbatim
- ===============================================================================
- ##### State and Errors functions #####
- ===============================================================================
- [..]
- This subsection provides functions allowing to
- (+) Check the DMA state
- (+) Get error code
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Returns the DMA state.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL state
- */
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
-{
- return hdma->State;
-}
-
-/**
- * @brief Return the DMA error code
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval DMA Error Code
- */
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
-{
- return hdma->ErrorCode;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @addtogroup DMA_Private_Functions
- * @{
- */
-
-/**
- * @brief Sets the DMA Transfer parameter.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- /* Clear DBM bit */
- hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
-
- /* Configure DMA Stream data length */
- hdma->Instance->NDTR = DataLength;
-
- /* Memory to Peripheral */
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- {
- /* Configure DMA Stream destination address */
- hdma->Instance->PAR = DstAddress;
-
- /* Configure DMA Stream source address */
- hdma->Instance->M0AR = SrcAddress;
- }
- /* Peripheral to Memory */
- else
- {
- /* Configure DMA Stream source address */
- hdma->Instance->PAR = SrcAddress;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M0AR = DstAddress;
- }
-}
-
-/**
- * @brief Returns the DMA Stream base address depending on stream number
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval Stream base address
- */
-static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
-{
- uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;
-
- /* lookup table for necessary bitshift of flags within status registers */
- static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
- hdma->StreamIndex = flagBitshiftOffset[stream_number];
-
- if (stream_number > 3U)
- {
- /* return pointer to HISR and HIFCR */
- hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U);
- }
- else
- {
- /* return pointer to LISR and LIFCR */
- hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU));
- }
-
- return hdma->StreamBaseAddress;
-}
-
-/**
- * @brief Check compatibility between FIFO threshold level and size of the memory burst
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @retval HAL status
- */
-static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmp = hdma->Init.FIFOThreshold;
-
- /* Memory Data size equal to Byte */
- if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
- {
- switch (tmp)
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- {
- status = HAL_ERROR;
- }
- break;
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- {
- status = HAL_ERROR;
- }
- break;
- case DMA_FIFO_THRESHOLD_FULL:
- break;
- default:
- break;
- }
- }
-
- /* Memory Data size equal to Half-Word */
- else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
- {
- switch (tmp)
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- status = HAL_ERROR;
- break;
- case DMA_FIFO_THRESHOLD_HALFFULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- {
- status = HAL_ERROR;
- }
- break;
- case DMA_FIFO_THRESHOLD_FULL:
- if (hdma->Init.MemBurst == DMA_MBURST_INC16)
- {
- status = HAL_ERROR;
- }
- break;
- default:
- break;
- }
- }
-
- /* Memory Data size equal to Word */
- else
- {
- switch (tmp)
- {
- case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- case DMA_FIFO_THRESHOLD_HALFFULL:
- case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
- status = HAL_ERROR;
- break;
- case DMA_FIFO_THRESHOLD_FULL:
- if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
- {
- status = HAL_ERROR;
- }
- break;
- default:
- break;
- }
- }
-
- return status;
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_DMA_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c
deleted file mode 100644
index d38cfcd64abf6e9d43f5de7f9b0a2f98d2891514..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c
+++ /dev/null
@@ -1,313 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_dma_ex.c
- * @author MCD Application Team
- * @brief DMA Extension HAL module driver
- * This file provides firmware functions to manage the following
- * functionalities of the DMA Extension peripheral:
- * + Extended features functions
- *
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The DMA Extension HAL driver can be used as follows:
- (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
- for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
-
- -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
- -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
- -@- In Multi (Double) buffer mode, it is possible to update the base address for
- the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup DMAEx DMAEx
- * @brief DMA Extended HAL module driver
- * @{
- */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private Constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/** @addtogroup DMAEx_Private_Functions
- * @{
- */
-static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-/**
- * @}
- */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @addtogroup DMAEx_Exported_Functions
- * @{
- */
-
-
-/** @addtogroup DMAEx_Exported_Functions_Group1
- *
-@verbatim
- ===============================================================================
- ##### Extended features functions #####
- ===============================================================================
- [..] This section provides functions allowing to:
- (+) Configure the source, destination address and data length and
- Start MultiBuffer DMA transfer
- (+) Configure the source, destination address and data length and
- Start MultiBuffer DMA transfer with interrupt
- (+) Change on the fly the memory0 or memory1 address.
-
-@endverbatim
- * @{
- */
-
-
-/**
- * @brief Starts the multi_buffer DMA Transfer.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Memory-to-memory transfer not supported in double buffering mode */
- if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
- status = HAL_ERROR;
- }
- else
- {
- /* Process Locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
-
- /* Enable the double buffer mode */
- hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M1AR = SecondMemAddress;
-
- /* Configure the source, destination address and the data length */
- DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
-
- /* Enable the peripheral */
- __HAL_DMA_ENABLE(hdma);
- }
- else
- {
- /* Return error status */
- status = HAL_BUSY;
- }
- }
- return status;
-}
-
-/**
- * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-
- /* Memory-to-memory transfer not supported in double buffering mode */
- if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
- {
- hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
- return HAL_ERROR;
- }
-
- /* Check callback functions */
- if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
- {
- hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
- return HAL_ERROR;
- }
-
- /* Process locked */
- __HAL_LOCK(hdma);
-
- if(HAL_DMA_STATE_READY == hdma->State)
- {
- /* Change DMA peripheral state */
- hdma->State = HAL_DMA_STATE_BUSY;
-
- /* Initialize the error code */
- hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
- /* Enable the Double buffer mode */
- hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M1AR = SecondMemAddress;
-
- /* Configure the source, destination address and the data length */
- DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
-
- /* Clear all flags */
- __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
- __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
- __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
- __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
- __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
-
- /* Enable Common interrupts*/
- hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
- hdma->Instance->FCR |= DMA_IT_FE;
-
- if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
- {
- hdma->Instance->CR |= DMA_IT_HT;
- }
-
- /* Enable the peripheral */
- __HAL_DMA_ENABLE(hdma);
- }
- else
- {
- /* Process unlocked */
- __HAL_UNLOCK(hdma);
-
- /* Return error status */
- status = HAL_BUSY;
- }
- return status;
-}
-
-/**
- * @brief Change the memory0 or memory1 address on the fly.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param Address The new address
- * @param memory the memory to be changed, This parameter can be one of
- * the following values:
- * MEMORY0 /
- * MEMORY1
- * @note The MEMORY0 address can be changed only when the current transfer use
- * MEMORY1 and the MEMORY1 address can be changed only when the current
- * transfer use MEMORY0.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
-{
- if(memory == MEMORY0)
- {
- /* change the memory0 address */
- hdma->Instance->M0AR = Address;
- }
- else
- {
- /* change the memory1 address */
- hdma->Instance->M1AR = Address;
- }
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @addtogroup DMAEx_Private_Functions
- * @{
- */
-
-/**
- * @brief Set the DMA Transfer parameter.
- * @param hdma pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA Stream.
- * @param SrcAddress The source memory Buffer address
- * @param DstAddress The destination memory Buffer address
- * @param DataLength The length of data to be transferred from source to destination
- * @retval HAL status
- */
-static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
- /* Configure DMA Stream data length */
- hdma->Instance->NDTR = DataLength;
-
- /* Peripheral to Memory */
- if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
- {
- /* Configure DMA Stream destination address */
- hdma->Instance->PAR = DstAddress;
-
- /* Configure DMA Stream source address */
- hdma->Instance->M0AR = SrcAddress;
- }
- /* Memory to Peripheral */
- else
- {
- /* Configure DMA Stream source address */
- hdma->Instance->PAR = SrcAddress;
-
- /* Configure DMA Stream destination address */
- hdma->Instance->M0AR = DstAddress;
- }
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_DMA_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c
deleted file mode 100644
index f0eff705eaa5ea1466c535abcd32200aabeb9f38..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c
+++ /dev/null
@@ -1,547 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_exti.c
- * @author MCD Application Team
- * @brief EXTI HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Extended Interrupts and events controller (EXTI) peripheral:
- * + Initialization and de-initialization functions
- * + IO operation functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2018 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### EXTI Peripheral features #####
- ==============================================================================
- [..]
- (+) Each Exti line can be configured within this driver.
-
- (+) Exti line can be configured in 3 different modes
- (++) Interrupt
- (++) Event
- (++) Both of them
-
- (+) Configurable Exti lines can be configured with 3 different triggers
- (++) Rising
- (++) Falling
- (++) Both of them
-
- (+) When set in interrupt mode, configurable Exti lines have two different
- interrupts pending registers which allow to distinguish which transition
- occurs:
- (++) Rising edge pending interrupt
- (++) Falling
-
- (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
- be selected through multiplexer.
-
- ##### How to use this driver #####
- ==============================================================================
- [..]
-
- (#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
- (++) Choose the interrupt line number by setting "Line" member from
- EXTI_ConfigTypeDef structure.
- (++) Configure the interrupt and/or event mode using "Mode" member from
- EXTI_ConfigTypeDef structure.
- (++) For configurable lines, configure rising and/or falling trigger
- "Trigger" member from EXTI_ConfigTypeDef structure.
- (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
- member from GPIO_InitTypeDef structure.
-
- (#) Get current Exti configuration of a dedicated line using
- HAL_EXTI_GetConfigLine().
- (++) Provide exiting handle as parameter.
- (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
-
- (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
- (++) Provide exiting handle as parameter.
-
- (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
- (++) Provide exiting handle as first parameter.
- (++) Provide which callback will be registered using one value from
- EXTI_CallbackIDTypeDef.
- (++) Provide callback function pointer.
-
- (#) Get interrupt pending bit using HAL_EXTI_GetPending().
-
- (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
-
- (#) Generate software interrupt using HAL_EXTI_GenerateSWI().
-
- @endverbatim
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @addtogroup EXTI
- * @{
- */
-/** MISRA C:2012 deviation rule has been granted for following rule:
- * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
- * of bounds [0,3] in following API :
- * HAL_EXTI_SetConfigLine
- * HAL_EXTI_GetConfigLine
- * HAL_EXTI_ClearConfigLine
- */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private defines -----------------------------------------------------------*/
-/** @defgroup EXTI_Private_Constants EXTI Private Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup EXTI_Exported_Functions
- * @{
- */
-
-/** @addtogroup EXTI_Exported_Functions_Group1
- * @brief Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Configuration functions #####
- ===============================================================================
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Set configuration of a dedicated Exti line.
- * @param hexti Exti handle.
- * @param pExtiConfig Pointer on EXTI configuration to be set.
- * @retval HAL Status.
- */
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
-{
- uint32_t regval;
- uint32_t linepos;
- uint32_t maskline;
-
- /* Check null pointer */
- if ((hexti == NULL) || (pExtiConfig == NULL))
- {
- return HAL_ERROR;
- }
-
- /* Check parameters */
- assert_param(IS_EXTI_LINE(pExtiConfig->Line));
- assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
-
- /* Assign line number to handle */
- hexti->Line = pExtiConfig->Line;
-
- /* Compute line mask */
- linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
- maskline = (1uL << linepos);
-
- /* Configure triggers for configurable lines */
- if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
- {
- assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
-
- /* Configure rising trigger */
- /* Mask or set line */
- if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
- {
- EXTI->RTSR |= maskline;
- }
- else
- {
- EXTI->RTSR &= ~maskline;
- }
-
- /* Configure falling trigger */
- /* Mask or set line */
- if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
- {
- EXTI->FTSR |= maskline;
- }
- else
- {
- EXTI->FTSR &= ~maskline;
- }
-
-
- /* Configure gpio port selection in case of gpio exti line */
- if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
- {
- assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
- assert_param(IS_EXTI_GPIO_PIN(linepos));
-
- regval = SYSCFG->EXTICR[linepos >> 2u];
- regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
- regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
- SYSCFG->EXTICR[linepos >> 2u] = regval;
- }
- }
-
- /* Configure interrupt mode : read current mode */
- /* Mask or set line */
- if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
- {
- EXTI->IMR |= maskline;
- }
- else
- {
- EXTI->IMR &= ~maskline;
- }
-
- /* Configure event mode : read current mode */
- /* Mask or set line */
- if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
- {
- EXTI->EMR |= maskline;
- }
- else
- {
- EXTI->EMR &= ~maskline;
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Get configuration of a dedicated Exti line.
- * @param hexti Exti handle.
- * @param pExtiConfig Pointer on structure to store Exti configuration.
- * @retval HAL Status.
- */
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
-{
- uint32_t regval;
- uint32_t linepos;
- uint32_t maskline;
-
- /* Check null pointer */
- if ((hexti == NULL) || (pExtiConfig == NULL))
- {
- return HAL_ERROR;
- }
-
- /* Check the parameter */
- assert_param(IS_EXTI_LINE(hexti->Line));
-
- /* Store handle line number to configuration structure */
- pExtiConfig->Line = hexti->Line;
-
- /* Compute line mask */
- linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
- maskline = (1uL << linepos);
-
- /* 1] Get core mode : interrupt */
-
- /* Check if selected line is enable */
- if ((EXTI->IMR & maskline) != 0x00u)
- {
- pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
- }
- else
- {
- pExtiConfig->Mode = EXTI_MODE_NONE;
- }
-
- /* Get event mode */
- /* Check if selected line is enable */
- if ((EXTI->EMR & maskline) != 0x00u)
- {
- pExtiConfig->Mode |= EXTI_MODE_EVENT;
- }
-
- /* Get default Trigger and GPIOSel configuration */
- pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
- pExtiConfig->GPIOSel = 0x00u;
-
- /* 2] Get trigger for configurable lines : rising */
- if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
- {
- /* Check if configuration of selected line is enable */
- if ((EXTI->RTSR & maskline) != 0x00u)
- {
- pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
- }
-
- /* Get falling configuration */
- /* Check if configuration of selected line is enable */
- if ((EXTI->FTSR & maskline) != 0x00u)
- {
- pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
- }
-
- /* Get Gpio port selection for gpio lines */
- if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
- {
- assert_param(IS_EXTI_GPIO_PIN(linepos));
-
- regval = (SYSCFG->EXTICR[linepos >> 2u] << 16u );
- pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 28u);
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Clear whole configuration of a dedicated Exti line.
- * @param hexti Exti handle.
- * @retval HAL Status.
- */
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
-{
- uint32_t regval;
- uint32_t linepos;
- uint32_t maskline;
-
- /* Check null pointer */
- if (hexti == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameter */
- assert_param(IS_EXTI_LINE(hexti->Line));
-
- /* compute line mask */
- linepos = (hexti->Line & EXTI_PIN_MASK);
- maskline = (1uL << linepos);
-
- /* 1] Clear interrupt mode */
- EXTI->IMR = (EXTI->IMR & ~maskline);
-
- /* 2] Clear event mode */
- EXTI->EMR = (EXTI->EMR & ~maskline);
-
- /* 3] Clear triggers in case of configurable lines */
- if ((hexti->Line & EXTI_CONFIG) != 0x00u)
- {
- EXTI->RTSR = (EXTI->RTSR & ~maskline);
- EXTI->FTSR = (EXTI->FTSR & ~maskline);
-
- /* Get Gpio port selection for gpio lines */
- if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
- {
- assert_param(IS_EXTI_GPIO_PIN(linepos));
-
- regval = SYSCFG->EXTICR[linepos >> 2u];
- regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
- SYSCFG->EXTICR[linepos >> 2u] = regval;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Register callback for a dedicated Exti line.
- * @param hexti Exti handle.
- * @param CallbackID User callback identifier.
- * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
- * @param pPendingCbfn function pointer to be stored as callback.
- * @retval HAL Status.
- */
-HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- switch (CallbackID)
- {
- case HAL_EXTI_COMMON_CB_ID:
- hexti->PendingCallback = pPendingCbfn;
- break;
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- return status;
-}
-
-/**
- * @brief Store line number as handle private field.
- * @param hexti Exti handle.
- * @param ExtiLine Exti line number.
- * This parameter can be from 0 to @ref EXTI_LINE_NB.
- * @retval HAL Status.
- */
-HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
-{
- /* Check the parameters */
- assert_param(IS_EXTI_LINE(ExtiLine));
-
- /* Check null pointer */
- if (hexti == NULL)
- {
- return HAL_ERROR;
- }
- else
- {
- /* Store line number as handle private field */
- hexti->Line = ExtiLine;
-
- return HAL_OK;
- }
-}
-
-/**
- * @}
- */
-
-/** @addtogroup EXTI_Exported_Functions_Group2
- * @brief EXTI IO functions.
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Handle EXTI interrupt request.
- * @param hexti Exti handle.
- * @retval none.
- */
-void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
-{
- uint32_t regval;
- uint32_t maskline;
-
- /* Compute line mask */
- maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
-
- /* Get pending bit */
- regval = (EXTI->PR & maskline);
- if (regval != 0x00u)
- {
- /* Clear pending bit */
- EXTI->PR = maskline;
-
- /* Call callback */
- if (hexti->PendingCallback != NULL)
- {
- hexti->PendingCallback();
- }
- }
-}
-
-/**
- * @brief Get interrupt pending bit of a dedicated line.
- * @param hexti Exti handle.
- * @param Edge Specify which pending edge as to be checked.
- * This parameter can be one of the following values:
- * @arg @ref EXTI_TRIGGER_RISING_FALLING
- * This parameter is kept for compatibility with other series.
- * @retval 1 if interrupt is pending else 0.
- */
-uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
-{
- uint32_t regval;
- uint32_t linepos;
- uint32_t maskline;
-
- /* Check parameters */
- assert_param(IS_EXTI_LINE(hexti->Line));
- assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
- assert_param(IS_EXTI_PENDING_EDGE(Edge));
-
- /* Compute line mask */
- linepos = (hexti->Line & EXTI_PIN_MASK);
- maskline = (1uL << linepos);
-
- /* return 1 if bit is set else 0 */
- regval = ((EXTI->PR & maskline) >> linepos);
- return regval;
-}
-
-/**
- * @brief Clear interrupt pending bit of a dedicated line.
- * @param hexti Exti handle.
- * @param Edge Specify which pending edge as to be clear.
- * This parameter can be one of the following values:
- * @arg @ref EXTI_TRIGGER_RISING_FALLING
- * This parameter is kept for compatibility with other series.
- * @retval None.
- */
-void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
-{
- uint32_t maskline;
-
- /* Check parameters */
- assert_param(IS_EXTI_LINE(hexti->Line));
- assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
- assert_param(IS_EXTI_PENDING_EDGE(Edge));
-
- /* Compute line mask */
- maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
-
- /* Clear Pending bit */
- EXTI->PR = maskline;
-}
-
-/**
- * @brief Generate a software interrupt for a dedicated line.
- * @param hexti Exti handle.
- * @retval None.
- */
-void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
-{
- uint32_t maskline;
-
- /* Check parameters */
- assert_param(IS_EXTI_LINE(hexti->Line));
- assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
-
- /* Compute line mask */
- maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
-
- /* Generate Software interrupt */
- EXTI->SWIER = maskline;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* HAL_EXTI_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c
deleted file mode 100644
index d18f66ff26dd38061aa4c0602b552326689161c3..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash.c
- * @author MCD Application Team
- * @brief FLASH HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the internal FLASH memory:
- * + Program operations functions
- * + Memory Control functions
- * + Peripheral Errors functions
- *
- @verbatim
- ==============================================================================
- ##### FLASH peripheral features #####
- ==============================================================================
-
- [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses
- to the Flash memory. It implements the erase and program Flash memory operations
- and the read and write protection mechanisms.
-
- [..] The Flash memory interface accelerates code execution with a system of instruction
- prefetch and cache lines.
-
- [..] The FLASH main features are:
- (+) Flash memory read operations
- (+) Flash memory program/erase operations
- (+) Read / write protections
- (+) Prefetch on I-Code
- (+) 64 cache lines of 128 bits on I-Code
- (+) 8 cache lines of 128 bits on D-Code
-
-
- ##### How to use this driver #####
- ==============================================================================
- [..]
- This driver provides functions and macros to configure and program the FLASH
- memory of all STM32F4xx devices.
-
- (#) FLASH Memory IO Programming functions:
- (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
- HAL_FLASH_Lock() functions
- (++) Program functions: byte, half word, word and double word
- (++) There Two modes of programming :
- (+++) Polling mode using HAL_FLASH_Program() function
- (+++) Interrupt mode using HAL_FLASH_Program_IT() function
-
- (#) Interrupts and flags management functions :
- (++) Handle FLASH interrupts by calling HAL_FLASH_IRQHandler()
- (++) Wait for last FLASH operation according to its status
- (++) Get error flag status by calling HAL_SetErrorCode()
-
- [..]
- In addition to these functions, this driver includes a set of macros allowing
- to handle the following operations:
- (+) Set the latency
- (+) Enable/Disable the prefetch buffer
- (+) Enable/Disable the Instruction cache and the Data cache
- (+) Reset the Instruction cache and the Data cache
- (+) Enable/Disable the FLASH interrupts
- (+) Monitor the FLASH flags status
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup FLASH FLASH
- * @brief FLASH HAL module driver
- * @{
- */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup FLASH_Private_Constants
- * @{
- */
-#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
-/**
- * @}
- */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @addtogroup FLASH_Private_Variables
- * @{
- */
-/* Variable used for Erase sectors under interruption */
-FLASH_ProcessTypeDef pFlash;
-/**
- * @}
- */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-/* Program operations */
-static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data);
-static void FLASH_Program_Word(uint32_t Address, uint32_t Data);
-static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data);
-static void FLASH_Program_Byte(uint32_t Address, uint8_t Data);
-static void FLASH_SetErrorCode(void);
-
-HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Functions FLASH Exported Functions
- * @{
- */
-
-/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions
- * @brief Programming operation functions
- *
-@verbatim
- ===============================================================================
- ##### Programming operation functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to manage the FLASH
- program operations.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Program byte, halfword, word or double word at a specified address
- * @param TypeProgram Indicate the way to program at a specified address.
- * This parameter can be a value of @ref FLASH_Type_Program
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed
- *
- * @retval HAL_StatusTypeDef HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
-{
- HAL_StatusTypeDef status = HAL_ERROR;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
- /* Check the parameters */
- assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if(status == HAL_OK)
- {
- if(TypeProgram == FLASH_TYPEPROGRAM_BYTE)
- {
- /*Program byte (8-bit) at a specified address.*/
- FLASH_Program_Byte(Address, (uint8_t) Data);
- }
- else if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
- {
- /*Program halfword (16-bit) at a specified address.*/
- FLASH_Program_HalfWord(Address, (uint16_t) Data);
- }
- else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
- {
- /*Program word (32-bit) at a specified address.*/
- FLASH_Program_Word(Address, (uint32_t) Data);
- }
- else
- {
- /*Program double word (64-bit) at a specified address.*/
- FLASH_Program_DoubleWord(Address, Data);
- }
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- /* If the program operation is completed, disable the PG Bit */
- FLASH->CR &= (~FLASH_CR_PG);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
-
- return status;
-}
-
-/**
- * @brief Program byte, halfword, word or double word at a specified address with interrupt enabled.
- * @param TypeProgram Indicate the way to program at a specified address.
- * This parameter can be a value of @ref FLASH_Type_Program
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
- /* Check the parameters */
- assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-
- /* Enable End of FLASH Operation interrupt */
- __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
-
- /* Enable Error source interrupt */
- __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
-
- pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM;
- pFlash.Address = Address;
-
- if(TypeProgram == FLASH_TYPEPROGRAM_BYTE)
- {
- /*Program byte (8-bit) at a specified address.*/
- FLASH_Program_Byte(Address, (uint8_t) Data);
- }
- else if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
- {
- /*Program halfword (16-bit) at a specified address.*/
- FLASH_Program_HalfWord(Address, (uint16_t) Data);
- }
- else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
- {
- /*Program word (32-bit) at a specified address.*/
- FLASH_Program_Word(Address, (uint32_t) Data);
- }
- else
- {
- /*Program double word (64-bit) at a specified address.*/
- FLASH_Program_DoubleWord(Address, Data);
- }
-
- return status;
-}
-
-/**
- * @brief This function handles FLASH interrupt request.
- * @retval None
- */
-void HAL_FLASH_IRQHandler(void)
-{
- uint32_t addresstmp = 0U;
-
- /* Check FLASH operation error flags */
-#if defined(FLASH_SR_RDERR)
- if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
- FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_RDERR)) != RESET)
-#else
- if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
- FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)) != RESET)
-#endif /* FLASH_SR_RDERR */
- {
- if(pFlash.ProcedureOnGoing == FLASH_PROC_SECTERASE)
- {
- /*return the faulty sector*/
- addresstmp = pFlash.Sector;
- pFlash.Sector = 0xFFFFFFFFU;
- }
- else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
- {
- /*return the faulty bank*/
- addresstmp = pFlash.Bank;
- }
- else
- {
- /*return the faulty address*/
- addresstmp = pFlash.Address;
- }
-
- /*Save the Error code*/
- FLASH_SetErrorCode();
-
- /* FLASH error interrupt user callback */
- HAL_FLASH_OperationErrorCallback(addresstmp);
-
- /*Stop the procedure ongoing*/
- pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
- }
-
- /* Check FLASH End of Operation flag */
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
- {
- /* Clear FLASH End of Operation pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-
- if(pFlash.ProcedureOnGoing == FLASH_PROC_SECTERASE)
- {
- /*Nb of sector to erased can be decreased*/
- pFlash.NbSectorsToErase--;
-
- /* Check if there are still sectors to erase*/
- if(pFlash.NbSectorsToErase != 0U)
- {
- addresstmp = pFlash.Sector;
- /*Indicate user which sector has been erased*/
- HAL_FLASH_EndOfOperationCallback(addresstmp);
-
- /*Increment sector number*/
- pFlash.Sector++;
- addresstmp = pFlash.Sector;
- FLASH_Erase_Sector(addresstmp, pFlash.VoltageForErase);
- }
- else
- {
- /*No more sectors to Erase, user callback can be called.*/
- /*Reset Sector and stop Erase sectors procedure*/
- pFlash.Sector = addresstmp = 0xFFFFFFFFU;
- pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-
- /* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches() ;
-
- /* FLASH EOP interrupt user callback */
- HAL_FLASH_EndOfOperationCallback(addresstmp);
- }
- }
- else
- {
- if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
- {
- /* MassErase ended. Return the selected bank */
- /* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches() ;
-
- /* FLASH EOP interrupt user callback */
- HAL_FLASH_EndOfOperationCallback(pFlash.Bank);
- }
- else
- {
- /*Program ended. Return the selected address*/
- /* FLASH EOP interrupt user callback */
- HAL_FLASH_EndOfOperationCallback(pFlash.Address);
- }
- pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
- }
- }
-
- if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
- {
- /* Operation is completed, disable the PG, SER, SNB and MER Bits */
- CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_SER | FLASH_CR_SNB | FLASH_MER_BIT));
-
- /* Disable End of FLASH Operation interrupt */
- __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP);
-
- /* Disable Error source interrupt */
- __HAL_FLASH_DISABLE_IT(FLASH_IT_ERR);
-
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
- }
-}
-
-/**
- * @brief FLASH end of operation interrupt callback
- * @param ReturnValue The value saved in this parameter depends on the ongoing procedure
- * Mass Erase: Bank number which has been requested to erase
- * Sectors Erase: Sector which has been erased
- * (if 0xFFFFFFFFU, it means that all the selected sectors have been erased)
- * Program: Address which was selected for data program
- * @retval None
- */
-__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(ReturnValue);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_FLASH_EndOfOperationCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief FLASH operation error interrupt callback
- * @param ReturnValue The value saved in this parameter depends on the ongoing procedure
- * Mass Erase: Bank number which has been requested to erase
- * Sectors Erase: Sector number which returned an error
- * Program: Address which was selected for data program
- * @retval None
- */
-__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(ReturnValue);
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_FLASH_OperationErrorCallback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions
- * @brief management functions
- *
-@verbatim
- ===============================================================================
- ##### Peripheral Control functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to control the FLASH
- memory operations.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Unlock the FLASH control register access
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_Unlock(void)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
- {
- /* Authorize the FLASH Registers access */
- WRITE_REG(FLASH->KEYR, FLASH_KEY1);
- WRITE_REG(FLASH->KEYR, FLASH_KEY2);
-
- /* Verify Flash is unlocked */
- if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
- {
- status = HAL_ERROR;
- }
- }
-
- return status;
-}
-
-/**
- * @brief Locks the FLASH control register access
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_Lock(void)
-{
- /* Set the LOCK Bit to lock the FLASH Registers access */
- FLASH->CR |= FLASH_CR_LOCK;
-
- return HAL_OK;
-}
-
-/**
- * @brief Unlock the FLASH Option Control Registers access.
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
-{
- if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
- {
- /* Authorizes the Option Byte register programming */
- FLASH->OPTKEYR = FLASH_OPT_KEY1;
- FLASH->OPTKEYR = FLASH_OPT_KEY2;
- }
- else
- {
- return HAL_ERROR;
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Lock the FLASH Option Control Registers access.
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void)
-{
- /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
- FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;
-
- return HAL_OK;
-}
-
-/**
- * @brief Launch the option byte loading.
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASH_OB_Launch(void)
-{
- /* Set the OPTSTRT bit in OPTCR register */
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT;
-
- /* Wait for last operation to be completed */
- return(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE));
-}
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Exported_Functions_Group3 Peripheral State and Errors functions
- * @brief Peripheral Errors functions
- *
-@verbatim
- ===============================================================================
- ##### Peripheral Errors functions #####
- ===============================================================================
- [..]
- This subsection permits to get in run-time Errors of the FLASH peripheral.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Get the specific FLASH error flag.
- * @retval FLASH_ErrorCode: The returned value can be a combination of:
- * @arg HAL_FLASH_ERROR_RD: FLASH Read Protection error flag (PCROP)
- * @arg HAL_FLASH_ERROR_PGS: FLASH Programming Sequence error flag
- * @arg HAL_FLASH_ERROR_PGP: FLASH Programming Parallelism error flag
- * @arg HAL_FLASH_ERROR_PGA: FLASH Programming Alignment error flag
- * @arg HAL_FLASH_ERROR_WRP: FLASH Write protected error flag
- * @arg HAL_FLASH_ERROR_OPERATION: FLASH operation Error flag
- */
-uint32_t HAL_FLASH_GetError(void)
-{
- return pFlash.ErrorCode;
-}
-
-/**
- * @}
- */
-
-/**
- * @brief Wait for a FLASH operation to complete.
- * @param Timeout maximum flash operationtimeout
- * @retval HAL Status
- */
-HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
-{
- uint32_t tickstart = 0U;
-
- /* Clear Error Code */
- pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
- /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
- Even if the FLASH operation fails, the BUSY flag will be reset and an error
- flag will be set */
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET)
- {
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Check FLASH End of Operation flag */
- if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
- {
- /* Clear FLASH End of Operation pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
- }
-#if defined(FLASH_SR_RDERR)
- if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
- FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_RDERR)) != RESET)
-#else
- if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
- FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)) != RESET)
-#endif /* FLASH_SR_RDERR */
- {
- /*Save the error code*/
- FLASH_SetErrorCode();
- return HAL_ERROR;
- }
-
- /* If there is no error flag set */
- return HAL_OK;
-
-}
-
-/**
- * @brief Program a double word (64-bit) at a specified address.
- * @note This function must be used when the device voltage range is from
- * 2.7V to 3.6V and Vpp in the range 7V to 9V.
- *
- * @note If an erase and a program operations are requested simultaneously,
- * the erase operation is performed before the program one.
- *
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed.
- * @retval None
- */
-static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data)
-{
- /* Check the parameters */
- assert_param(IS_FLASH_ADDRESS(Address));
-
- /* If the previous operation is completed, proceed to program the new data */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD;
- FLASH->CR |= FLASH_CR_PG;
-
- /* Program first word */
- *(__IO uint32_t*)Address = (uint32_t)Data;
-
- /* Barrier to ensure programming is performed in 2 steps, in right order
- (independently of compiler optimization behavior) */
- __ISB();
-
- /* Program second word */
- *(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32);
-}
-
-
-/**
- * @brief Program word (32-bit) at a specified address.
- * @note This function must be used when the device voltage range is from
- * 2.7V to 3.6V.
- *
- * @note If an erase and a program operations are requested simultaneously,
- * the erase operation is performed before the program one.
- *
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed.
- * @retval None
- */
-static void FLASH_Program_Word(uint32_t Address, uint32_t Data)
-{
- /* Check the parameters */
- assert_param(IS_FLASH_ADDRESS(Address));
-
- /* If the previous operation is completed, proceed to program the new data */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= FLASH_PSIZE_WORD;
- FLASH->CR |= FLASH_CR_PG;
-
- *(__IO uint32_t*)Address = Data;
-}
-
-/**
- * @brief Program a half-word (16-bit) at a specified address.
- * @note This function must be used when the device voltage range is from
- * 2.1V to 3.6V.
- *
- * @note If an erase and a program operations are requested simultaneously,
- * the erase operation is performed before the program one.
- *
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed.
- * @retval None
- */
-static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
-{
- /* Check the parameters */
- assert_param(IS_FLASH_ADDRESS(Address));
-
- /* If the previous operation is completed, proceed to program the new data */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= FLASH_PSIZE_HALF_WORD;
- FLASH->CR |= FLASH_CR_PG;
-
- *(__IO uint16_t*)Address = Data;
-}
-
-/**
- * @brief Program byte (8-bit) at a specified address.
- * @note This function must be used when the device voltage range is from
- * 1.8V to 3.6V.
- *
- * @note If an erase and a program operations are requested simultaneously,
- * the erase operation is performed before the program one.
- *
- * @param Address specifies the address to be programmed.
- * @param Data specifies the data to be programmed.
- * @retval None
- */
-static void FLASH_Program_Byte(uint32_t Address, uint8_t Data)
-{
- /* Check the parameters */
- assert_param(IS_FLASH_ADDRESS(Address));
-
- /* If the previous operation is completed, proceed to program the new data */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= FLASH_PSIZE_BYTE;
- FLASH->CR |= FLASH_CR_PG;
-
- *(__IO uint8_t*)Address = Data;
-}
-
-/**
- * @brief Set the specific FLASH error flag.
- * @retval None
- */
-static void FLASH_SetErrorCode(void)
-{
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
-
- /* Clear FLASH write protection error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR);
- }
-
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
-
- /* Clear FLASH Programming alignment error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGAERR);
- }
-
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGPERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_PGP;
-
- /* Clear FLASH Programming parallelism error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGPERR);
- }
-
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_PGS;
-
- /* Clear FLASH Programming sequence error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGSERR);
- }
-#if defined(FLASH_SR_RDERR)
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
-
- /* Clear FLASH Proprietary readout protection error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_RDERR);
- }
-#endif /* FLASH_SR_RDERR */
- if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
- {
- pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
-
- /* Clear FLASH Operation error pending bit */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR);
- }
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c
deleted file mode 100644
index abff6d733627b62e87b31946f95e061c48cae1ee..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c
+++ /dev/null
@@ -1,1347 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash_ex.c
- * @author MCD Application Team
- * @brief Extended FLASH HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the FLASH extension peripheral:
- * + Extended programming operations functions
- *
- @verbatim
- ==============================================================================
- ##### Flash Extension features #####
- ==============================================================================
-
- [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
- STM32F429xx/439xx devices contains the following additional features
-
- (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
- capability (RWW)
- (+) Dual bank memory organization
- (+) PCROP protection for all banks
-
- ##### How to use this driver #####
- ==============================================================================
- [..] This driver provides functions to configure and program the FLASH memory
- of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
- devices. It includes
- (#) FLASH Memory Erase functions:
- (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
- HAL_FLASH_Lock() functions
- (++) Erase function: Erase sector, erase all sectors
- (++) There are two modes of erase :
- (+++) Polling Mode using HAL_FLASHEx_Erase()
- (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
-
- (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
- (++) Set/Reset the write protection
- (++) Set the Read protection Level
- (++) Set the BOR level
- (++) Program the user Option Bytes
- (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
- (++) Extended space (bank 2) erase function
- (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
- (++) Dual Boot activation
- (++) Write protection configuration for bank 2
- (++) PCROP protection configuration and control for both banks
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup FLASHEx FLASHEx
- * @brief FLASH HAL Extension module driver
- * @{
- */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup FLASHEx_Private_Constants
- * @{
- */
-#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
-/**
- * @}
- */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @addtogroup FLASHEx_Private_Variables
- * @{
- */
-extern FLASH_ProcessTypeDef pFlash;
-/**
- * @}
- */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup FLASHEx_Private_Functions
- * @{
- */
-/* Option bytes control */
-static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
-static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
-static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
-static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
-static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
-static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
-static uint8_t FLASH_OB_GetUser(void);
-static uint16_t FLASH_OB_GetWRP(void);
-static uint8_t FLASH_OB_GetRDP(void);
-static uint8_t FLASH_OB_GetBOR(void);
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
- defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
-static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
- STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
-static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
-static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
- * @{
- */
-
-/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
- * @brief Extended IO operation functions
- *
-@verbatim
- ===============================================================================
- ##### Extended programming operation functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to manage the Extension FLASH
- programming operations.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Perform a mass erase or erase the specified FLASH memory sectors
- * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
- * contains the configuration information for the erasing.
- *
- * @param[out] SectorError pointer to variable that
- * contains the configuration information on faulty sector in case of error
- * (0xFFFFFFFFU means that all the sectors have been correctly erased)
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
-{
- HAL_StatusTypeDef status = HAL_ERROR;
- uint32_t index = 0U;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
- /* Check the parameters */
- assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- /*Initialization of SectorError variable*/
- *SectorError = 0xFFFFFFFFU;
-
- if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
- {
- /*Mass erase to be done*/
- FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- /* if the erase operation is completed, disable the MER Bit */
- FLASH->CR &= (~FLASH_MER_BIT);
- }
- else
- {
- /* Check the parameters */
- assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
-
- /* Erase by sector by sector to be done*/
- for (index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
- {
- FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- /* If the erase operation is completed, disable the SER and SNB Bits */
- CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
-
- if (status != HAL_OK)
- {
- /* In case of error, stop erase procedure and return the faulty sector*/
- *SectorError = index;
- break;
- }
- }
- }
- /* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches();
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
-
- return status;
-}
-
-/**
- * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
- * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
- * contains the configuration information for the erasing.
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
- /* Check the parameters */
- assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-
- /* Enable End of FLASH Operation interrupt */
- __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
-
- /* Enable Error source interrupt */
- __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
-
- /* Clear pending flags (if any) */
- __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | \
- FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
-
- if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
- {
- /*Mass erase to be done*/
- pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
- pFlash.Bank = pEraseInit->Banks;
- FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
- }
- else
- {
- /* Erase by sector to be done*/
-
- /* Check the parameters */
- assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
-
- pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
- pFlash.NbSectorsToErase = pEraseInit->NbSectors;
- pFlash.Sector = pEraseInit->Sector;
- pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
-
- /*Erase 1st sector and wait for IT*/
- FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
- }
-
- return status;
-}
-
-/**
- * @brief Program option bytes
- * @param pOBInit pointer to an FLASH_OBInitStruct structure that
- * contains the configuration information for the programming.
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
-{
- HAL_StatusTypeDef status = HAL_ERROR;
-
- /* Process Locked */
- __HAL_LOCK(&pFlash);
-
- /* Check the parameters */
- assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
-
- /*Write protection configuration*/
- if ((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
- {
- assert_param(IS_WRPSTATE(pOBInit->WRPState));
- if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
- {
- /*Enable of Write protection on the selected Sector*/
- status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
- }
- else
- {
- /*Disable of Write protection on the selected Sector*/
- status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
- }
- }
-
- /*Read protection configuration*/
- if ((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
- {
- status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
- }
-
- /*USER configuration*/
- if ((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
- {
- status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_IWDG_SW,
- pOBInit->USERConfig & OB_STOP_NO_RST,
- pOBInit->USERConfig & OB_STDBY_NO_RST);
- }
-
- /*BOR Level configuration*/
- if ((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
- {
- status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(&pFlash);
-
- return status;
-}
-
-/**
- * @brief Get the Option byte configuration
- * @param pOBInit pointer to an FLASH_OBInitStruct structure that
- * contains the configuration information for the programming.
- *
- * @retval None
- */
-void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
-{
- pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
-
- /*Get WRP*/
- pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
-
- /*Get RDP Level*/
- pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
-
- /*Get USER*/
- pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
-
- /*Get BOR Level*/
- pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
-}
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Program option bytes
- * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
- * contains the configuration information for the programming.
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
-{
- HAL_StatusTypeDef status = HAL_ERROR;
-
- /* Check the parameters */
- assert_param(IS_OBEX(pAdvOBInit->OptionType));
-
- /*Program PCROP option byte*/
- if (((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
- {
- /* Check the parameters */
- assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
- if ((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
- {
- /*Enable of Write protection on the selected Sector*/
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
- defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
- status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
-#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
- status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
- }
- else
- {
- /*Disable of Write protection on the selected Sector*/
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
- defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
- status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
-#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
- status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
- }
- }
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
- /*Program BOOT config option byte*/
- if (((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
- {
- status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
- }
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
- return status;
-}
-
-/**
- * @brief Get the OBEX byte configuration
- * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
- * contains the configuration information for the programming.
- *
- * @retval None
- */
-void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
-{
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
- defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
- /*Get Sector*/
- pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
-#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
- /*Get Sector for Bank1*/
- pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
-
- /*Get Sector for Bank2*/
- pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
-
- /*Get Boot config OB*/
- pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-}
-
-/**
- * @brief Select the Protection Mode
- *
- * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
- * Global Read Out Protection modification (from level1 to level0)
- * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
- * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
- * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
- * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
-{
- uint8_t optiontmp = 0xFF;
-
- /* Mask SPRMOD bit */
- optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
-
- /* Update Option Byte */
- *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
-
- return HAL_OK;
-}
-
-/**
- * @brief Deselect the Protection Mode
- *
- * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
- * Global Read Out Protection modification (from level1 to level0)
- * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
- * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
- * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
- * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
- *
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
-{
- uint8_t optiontmp = 0xFF;
-
- /* Mask SPRMOD bit */
- optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
-
- /* Update Option Byte */
- *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
-
- return HAL_OK;
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
- STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
- * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
- * @retval The FLASH Write Protection Option Bytes value
- */
-uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
-{
- /* Return the FLASH write protection Register value */
- return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-/**
- * @}
- */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Full erase of FLASH memory sectors
- * @param VoltageRange The device voltage range which defines the erase parallelism.
- * This parameter can be one of the following values:
- * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
- * the operation will be done by byte (8-bit)
- * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
- * the operation will be done by half word (16-bit)
- * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
- * the operation will be done by word (32-bit)
- * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
- * the operation will be done by double word (64-bit)
- *
- * @param Banks Banks to be erased
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: Bank1 to be erased
- * @arg FLASH_BANK_2: Bank2 to be erased
- * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
- *
- * @retval HAL Status
- */
-static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
-{
- /* Check the parameters */
- assert_param(IS_VOLTAGERANGE(VoltageRange));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* if the previous operation is completed, proceed to erase all sectors */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
-
- if (Banks == FLASH_BANK_BOTH)
- {
- /* bank1 & bank2 will be erased*/
- FLASH->CR |= FLASH_MER_BIT;
- }
- else if (Banks == FLASH_BANK_1)
- {
- /*Only bank1 will be erased*/
- FLASH->CR |= FLASH_CR_MER1;
- }
- else
- {
- /*Only bank2 will be erased*/
- FLASH->CR |= FLASH_CR_MER2;
- }
- FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
-}
-
-/**
- * @brief Erase the specified FLASH memory sector
- * @param Sector FLASH sector to erase
- * The value of this parameter depend on device used within the same series
- * @param VoltageRange The device voltage range which defines the erase parallelism.
- * This parameter can be one of the following values:
- * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
- * the operation will be done by byte (8-bit)
- * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
- * the operation will be done by half word (16-bit)
- * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
- * the operation will be done by word (32-bit)
- * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
- * the operation will be done by double word (64-bit)
- *
- * @retval None
- */
-void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
-{
- uint32_t tmp_psize = 0U;
-
- /* Check the parameters */
- assert_param(IS_FLASH_SECTOR(Sector));
- assert_param(IS_VOLTAGERANGE(VoltageRange));
-
- if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
- {
- tmp_psize = FLASH_PSIZE_BYTE;
- }
- else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
- {
- tmp_psize = FLASH_PSIZE_HALF_WORD;
- }
- else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
- {
- tmp_psize = FLASH_PSIZE_WORD;
- }
- else
- {
- tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
- }
-
- /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
- if (Sector > FLASH_SECTOR_11)
- {
- Sector += 4U;
- }
- /* If the previous operation is completed, proceed to erase the sector */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= tmp_psize;
- CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
- FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
- FLASH->CR |= FLASH_CR_STRT;
-}
-
-/**
- * @brief Enable the write protection of the desired bank1 or bank 2 sectors
- *
- * @note When the memory read protection level is selected (RDP level = 1),
- * it is not possible to program or erase the flash sector i if CortexM4
- * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
- * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
- *
- * @param WRPSector specifies the sector(s) to be write protected.
- * This parameter can be one of the following values:
- * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
- * @arg OB_WRP_SECTOR_All
- * @note BANK2 starts from OB_WRP_SECTOR_12
- *
- * @param Banks Enable write protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: WRP on all sectors of bank1
- * @arg FLASH_BANK_2: WRP on all sectors of bank2
- * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
- *
- * @retval HAL FLASH State
- */
-static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_WRP_SECTOR(WRPSector));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
- (WRPSector < OB_WRP_SECTOR_12))
- {
- if (WRPSector == OB_WRP_SECTOR_All)
- {
- /*Write protection on all sector of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~(WRPSector >> 12));
- }
- else
- {
- /*Write protection done on sectors of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
- }
- }
- else
- {
- /*Write protection done on sectors of BANK2*/
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
- }
-
- /*Write protection on all sector of BANK2*/
- if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
- {
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector >> 12));
- }
- }
-
- }
- return status;
-}
-
-/**
- * @brief Disable the write protection of the desired bank1 or bank 2 sectors
- *
- * @note When the memory read protection level is selected (RDP level = 1),
- * it is not possible to program or erase the flash sector i if CortexM4
- * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
- * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
- *
- * @param WRPSector specifies the sector(s) to be write protected.
- * This parameter can be one of the following values:
- * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
- * @arg OB_WRP_Sector_All
- * @note BANK2 starts from OB_WRP_SECTOR_12
- *
- * @param Banks Disable write protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: Bank1 to be erased
- * @arg FLASH_BANK_2: Bank2 to be erased
- * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_WRP_SECTOR(WRPSector));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- if (((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
- (WRPSector < OB_WRP_SECTOR_12))
- {
- if (WRPSector == OB_WRP_SECTOR_All)
- {
- /*Write protection on all sector of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
- }
- else
- {
- /*Write protection done on sectors of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
- }
- }
- else
- {
- /*Write protection done on sectors of BANK2*/
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
- }
-
- /*Write protection on all sector of BANK2*/
- if ((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
- {
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector >> 12);
- }
- }
-
- }
-
- return status;
-}
-
-/**
- * @brief Configure the Dual Bank Boot.
- *
- * @note This function can be used only for STM32F42xxx/43xxx devices.
- *
- * @param BootConfig specifies the Dual Bank Boot Option byte.
- * This parameter can be one of the following values:
- * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
- * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
- * @retval None
- */
-static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_BOOT(BootConfig));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- /* Set Dual Bank Boot */
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
- }
-
- return status;
-}
-
-/**
- * @brief Enable the read/write protection (PCROP) of the desired
- * sectors of Bank 1 and/or Bank 2.
- * @note This function can be used only for STM32F42xxx/43xxx devices.
- * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
- * @arg OB_PCROP_SECTOR__All
- * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
- * @arg OB_PCROP_SECTOR__All
- * @param Banks Enable PCROP protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: WRP on all sectors of bank1
- * @arg FLASH_BANK_2: WRP on all sectors of bank2
- * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
- {
- assert_param(IS_OB_PCROP(SectorBank1));
- /*Write protection done on sectors of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
- }
- else
- {
- assert_param(IS_OB_PCROP(SectorBank2));
- /*Write protection done on sectors of BANK2*/
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
- }
-
- /*Write protection on all sector of BANK2*/
- if (Banks == FLASH_BANK_BOTH)
- {
- assert_param(IS_OB_PCROP(SectorBank2));
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- /*Write protection done on sectors of BANK2*/
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
- }
- }
-
- }
-
- return status;
-}
-
-
-/**
- * @brief Disable the read/write protection (PCROP) of the desired
- * sectors of Bank 1 and/or Bank 2.
- * @note This function can be used only for STM32F42xxx/43xxx devices.
- * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
- * @arg OB_PCROP_SECTOR__All
- * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
- * @arg OB_PCROP_SECTOR__All
- * @param Banks Disable PCROP protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: WRP on all sectors of bank1
- * @arg FLASH_BANK_2: WRP on all sectors of bank2
- * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- if ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
- {
- assert_param(IS_OB_PCROP(SectorBank1));
- /*Write protection done on sectors of BANK1*/
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
- }
- else
- {
- /*Write protection done on sectors of BANK2*/
- assert_param(IS_OB_PCROP(SectorBank2));
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
- }
-
- /*Write protection on all sector of BANK2*/
- if (Banks == FLASH_BANK_BOTH)
- {
- assert_param(IS_OB_PCROP(SectorBank2));
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- /*Write protection done on sectors of BANK2*/
- *(__IO uint16_t *)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
- }
- }
-
- }
-
- return status;
-
-}
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
- defined(STM32F423xx)
-/**
- * @brief Mass erase of FLASH memory
- * @param VoltageRange The device voltage range which defines the erase parallelism.
- * This parameter can be one of the following values:
- * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
- * the operation will be done by byte (8-bit)
- * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
- * the operation will be done by half word (16-bit)
- * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
- * the operation will be done by word (32-bit)
- * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
- * the operation will be done by double word (64-bit)
- *
- * @param Banks Banks to be erased
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: Bank1 to be erased
- *
- * @retval None
- */
-static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
-{
- /* Check the parameters */
- assert_param(IS_VOLTAGERANGE(VoltageRange));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* If the previous operation is completed, proceed to erase all sectors */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= FLASH_CR_MER;
- FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U);
-}
-
-/**
- * @brief Erase the specified FLASH memory sector
- * @param Sector FLASH sector to erase
- * The value of this parameter depend on device used within the same series
- * @param VoltageRange The device voltage range which defines the erase parallelism.
- * This parameter can be one of the following values:
- * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
- * the operation will be done by byte (8-bit)
- * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
- * the operation will be done by half word (16-bit)
- * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
- * the operation will be done by word (32-bit)
- * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
- * the operation will be done by double word (64-bit)
- *
- * @retval None
- */
-void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
-{
- uint32_t tmp_psize = 0U;
-
- /* Check the parameters */
- assert_param(IS_FLASH_SECTOR(Sector));
- assert_param(IS_VOLTAGERANGE(VoltageRange));
-
- if (VoltageRange == FLASH_VOLTAGE_RANGE_1)
- {
- tmp_psize = FLASH_PSIZE_BYTE;
- }
- else if (VoltageRange == FLASH_VOLTAGE_RANGE_2)
- {
- tmp_psize = FLASH_PSIZE_HALF_WORD;
- }
- else if (VoltageRange == FLASH_VOLTAGE_RANGE_3)
- {
- tmp_psize = FLASH_PSIZE_WORD;
- }
- else
- {
- tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
- }
-
- /* If the previous operation is completed, proceed to erase the sector */
- CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
- FLASH->CR |= tmp_psize;
- CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
- FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
- FLASH->CR |= FLASH_CR_STRT;
-}
-
-/**
- * @brief Enable the write protection of the desired bank 1 sectors
- *
- * @note When the memory read protection level is selected (RDP level = 1),
- * it is not possible to program or erase the flash sector i if CortexM4
- * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
- * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
- *
- * @param WRPSector specifies the sector(s) to be write protected.
- * The value of this parameter depend on device used within the same series
- *
- * @param Banks Enable write protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: WRP on all sectors of bank1
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_WRP_SECTOR(WRPSector));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
- }
-
- return status;
-}
-
-/**
- * @brief Disable the write protection of the desired bank 1 sectors
- *
- * @note When the memory read protection level is selected (RDP level = 1),
- * it is not possible to program or erase the flash sector i if CortexM4
- * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
- * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
- *
- * @param WRPSector specifies the sector(s) to be write protected.
- * The value of this parameter depend on device used within the same series
- *
- * @param Banks Enable write protection on all the sectors for the specific bank
- * This parameter can be one of the following values:
- * @arg FLASH_BANK_1: WRP on all sectors of bank1
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_WRP_SECTOR(WRPSector));
- assert_param(IS_FLASH_BANK(Banks));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
- }
-
- return status;
-}
-#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
- STM32F413xx || STM32F423xx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
- defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Enable the read/write protection (PCROP) of the desired sectors.
- * @note This function can be used only for STM32F401xx devices.
- * @param Sector specifies the sector(s) to be read/write protected or unprotected.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
- * @arg OB_PCROP_Sector_All
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_PCROP(Sector));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
- }
-
- return status;
-}
-
-
-/**
- * @brief Disable the read/write protection (PCROP) of the desired sectors.
- * @note This function can be used only for STM32F401xx devices.
- * @param Sector specifies the sector(s) to be read/write protected or unprotected.
- * This parameter can be one of the following values:
- * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
- * @arg OB_PCROP_Sector_All
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_PCROP(Sector));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint16_t *)OPTCR_BYTE2_ADDRESS &= (~Sector);
- }
-
- return status;
-
-}
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
- STM32F413xx || STM32F423xx */
-
-/**
- * @brief Set the read protection level.
- * @param Level specifies the read protection level.
- * This parameter can be one of the following values:
- * @arg OB_RDP_LEVEL_0: No protection
- * @arg OB_RDP_LEVEL_1: Read protection of the memory
- * @arg OB_RDP_LEVEL_2: Full chip protection
- *
- * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
- *
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_RDP_LEVEL(Level));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- *(__IO uint8_t *)OPTCR_BYTE1_ADDRESS = Level;
- }
-
- return status;
-}
-
-/**
- * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
- * @param Iwdg Selects the IWDG mode
- * This parameter can be one of the following values:
- * @arg OB_IWDG_SW: Software IWDG selected
- * @arg OB_IWDG_HW: Hardware IWDG selected
- * @param Stop Reset event when entering STOP mode.
- * This parameter can be one of the following values:
- * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
- * @arg OB_STOP_RST: Reset generated when entering in STOP
- * @param Stdby Reset event when entering Standby mode.
- * This parameter can be one of the following values:
- * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
- * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
-{
- uint8_t optiontmp = 0xFF;
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_OB_IWDG_SOURCE(Iwdg));
- assert_param(IS_OB_STOP_SOURCE(Stop));
- assert_param(IS_OB_STDBY_SOURCE(Stdby));
-
- /* Wait for last operation to be completed */
- status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
- if (status == HAL_OK)
- {
- /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
- optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
-
- /* Update User Option Byte */
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
- }
-
- return status;
-}
-
-/**
- * @brief Set the BOR Level.
- * @param Level specifies the Option Bytes BOR Reset Level.
- * This parameter can be one of the following values:
- * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
- * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
- * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
- * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
- * @retval HAL Status
- */
-static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
-{
- /* Check the parameters */
- assert_param(IS_OB_BOR_LEVEL(Level));
-
- /* Set the BOR Level */
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
- *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
-
- return HAL_OK;
-
-}
-
-/**
- * @brief Return the FLASH User Option Byte value.
- * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
- * and RST_STDBY(Bit2).
- */
-static uint8_t FLASH_OB_GetUser(void)
-{
- /* Return the User Option Byte */
- return ((uint8_t)(FLASH->OPTCR & 0xE0));
-}
-
-/**
- * @brief Return the FLASH Write Protection Option Bytes value.
- * @retval uint16_t FLASH Write Protection Option Bytes value
- */
-static uint16_t FLASH_OB_GetWRP(void)
-{
- /* Return the FLASH write protection Register value */
- return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
-}
-
-/**
- * @brief Returns the FLASH Read Protection level.
- * @retval FLASH ReadOut Protection Status:
- * This parameter can be one of the following values:
- * @arg OB_RDP_LEVEL_0: No protection
- * @arg OB_RDP_LEVEL_1: Read protection of the memory
- * @arg OB_RDP_LEVEL_2: Full chip protection
- */
-static uint8_t FLASH_OB_GetRDP(void)
-{
- uint8_t readstatus = OB_RDP_LEVEL_0;
-
- if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
- {
- readstatus = OB_RDP_LEVEL_2;
- }
- else if (*(__IO uint8_t *)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_0)
- {
- readstatus = OB_RDP_LEVEL_0;
- }
- else
- {
- readstatus = OB_RDP_LEVEL_1;
- }
-
- return readstatus;
-}
-
-/**
- * @brief Returns the FLASH BOR level.
- * @retval uint8_t The FLASH BOR level:
- * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
- * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
- * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
- * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
- */
-static uint8_t FLASH_OB_GetBOR(void)
-{
- /* Return the FLASH BOR level */
- return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
-}
-
-/**
- * @brief Flush the instruction and data caches
- * @retval None
- */
-void FLASH_FlushCaches(void)
-{
- /* Flush instruction cache */
- if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET)
- {
- /* Disable instruction cache */
- __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
- /* Reset instruction cache */
- __HAL_FLASH_INSTRUCTION_CACHE_RESET();
- /* Enable instruction cache */
- __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
- }
-
- /* Flush data cache */
- if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
- {
- /* Disable data cache */
- __HAL_FLASH_DATA_CACHE_DISABLE();
- /* Reset data cache */
- __HAL_FLASH_DATA_CACHE_RESET();
- /* Enable data cache */
- __HAL_FLASH_DATA_CACHE_ENABLE();
- }
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c
deleted file mode 100644
index fdc5a4cdf9c77c4f5ee97184dcb6ef82c3d5b897..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_flash_ramfunc.c
- * @author MCD Application Team
- * @brief FLASH RAMFUNC module driver.
- * This file provides a FLASH firmware functions which should be
- * executed from internal SRAM
- * + Stop/Start the flash interface while System Run
- * + Enable/Disable the flash sleep while System Run
- @verbatim
- ==============================================================================
- ##### APIs executed from Internal RAM #####
- ==============================================================================
- [..]
- *** ARM Compiler ***
- --------------------
- [..] RAM functions are defined using the toolchain options.
- Functions that are be executed in RAM should reside in a separate
- source module. Using the 'Options for File' dialog you can simply change
- the 'Code / Const' area of a module to a memory space in physical RAM.
- Available memory areas are declared in the 'Target' tab of the
- Options for Target' dialog.
-
- *** ICCARM Compiler ***
- -----------------------
- [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
-
- *** GNU Compiler ***
- --------------------
- [..] RAM functions are defined using a specific toolchain attribute
- "__attribute__((section(".RamFunc")))".
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup FLASH_RAMFUNC FLASH RAMFUNC
- * @brief FLASH functions executed from RAM
- * @{
- */
-#ifdef HAL_FLASH_MODULE_ENABLED
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
- defined(STM32F412Rx) || defined(STM32F412Cx)
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions
- * @{
- */
-
-/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM
- * @brief Peripheral Extended features functions
- *
-@verbatim
-
- ===============================================================================
- ##### ramfunc functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions that should be executed from RAM
- transfers.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Stop the flash interface while System Run
- * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
- * @note This mode couldn't be set while executing with the flash itself.
- * It should be done with specific routine executed from RAM.
- * @retval HAL status
- */
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void)
-{
- /* Enable Power ctrl clock */
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Stop the flash interface while System Run */
- SET_BIT(PWR->CR, PWR_CR_FISSR);
-
- return HAL_OK;
-}
-
-/**
- * @brief Start the flash interface while System Run
- * @note This mode is only available for STM32F411xx/STM32F446xx devices.
- * @note This mode couldn't be set while executing with the flash itself.
- * It should be done with specific routine executed from RAM.
- * @retval HAL status
- */
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void)
-{
- /* Enable Power ctrl clock */
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Start the flash interface while System Run */
- CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
-
- return HAL_OK;
-}
-
-/**
- * @brief Enable the flash sleep while System Run
- * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
- * @note This mode could n't be set while executing with the flash itself.
- * It should be done with specific routine executed from RAM.
- * @retval HAL status
- */
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void)
-{
- /* Enable Power ctrl clock */
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Enable the flash sleep while System Run */
- SET_BIT(PWR->CR, PWR_CR_FMSSR);
-
- return HAL_OK;
-}
-
-/**
- * @brief Disable the flash sleep while System Run
- * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
- * @note This mode couldn't be set while executing with the flash itself.
- * It should be done with specific routine executed from RAM.
- * @retval HAL status
- */
-__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void)
-{
- /* Enable Power ctrl clock */
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Disable the flash sleep while System Run */
- CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
-#endif /* HAL_FLASH_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c
deleted file mode 100644
index 184fe58e023514767c0be8b551dbca96c82e1653..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c
+++ /dev/null
@@ -1,533 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_gpio.c
- * @author MCD Application Team
- * @brief GPIO HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the General Purpose Input/Output (GPIO) peripheral:
- * + Initialization and de-initialization functions
- * + IO operation functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### GPIO Peripheral features #####
- ==============================================================================
- [..]
- Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
- port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
- in several modes:
- (+) Input mode
- (+) Analog mode
- (+) Output mode
- (+) Alternate function mode
- (+) External interrupt/event lines
-
- [..]
- During and just after reset, the alternate functions and external interrupt
- lines are not active and the I/O ports are configured in input floating mode.
-
- [..]
- All GPIO pins have weak internal pull-up and pull-down resistors, which can be
- activated or not.
-
- [..]
- In Output or Alternate mode, each IO can be configured on open-drain or push-pull
- type and the IO speed can be selected depending on the VDD value.
-
- [..]
- All ports have external interrupt/event capability. To use external interrupt
- lines, the port must be configured in input mode. All available GPIO pins are
- connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
-
- [..]
- The external interrupt/event controller consists of up to 23 edge detectors
- (16 lines are connected to GPIO) for generating event/interrupt requests (each
- input line can be independently configured to select the type (interrupt or event)
- and the corresponding trigger event (rising or falling or both). Each line can
- also be masked independently.
-
- ##### How to use this driver #####
- ==============================================================================
- [..]
- (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
-
- (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
- (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
- (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
- structure.
- (++) In case of Output or alternate function mode selection: the speed is
- configured through "Speed" member from GPIO_InitTypeDef structure.
- (++) In alternate mode is selection, the alternate function connected to the IO
- is configured through "Alternate" member from GPIO_InitTypeDef structure.
- (++) Analog mode is required when a pin is to be used as ADC channel
- or DAC output.
- (++) In case of external interrupt/event selection the "Mode" member from
- GPIO_InitTypeDef structure select the type (interrupt or event) and
- the corresponding trigger event (rising or falling or both).
-
- (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
- mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
- HAL_NVIC_EnableIRQ().
-
- (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
-
- (#) To set/reset the level of a pin configured in output mode use
- HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
-
- (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
-
-
- (#) During and just after reset, the alternate functions are not
- active and the GPIO pins are configured in input floating mode (except JTAG
- pins).
-
- (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
- (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
- priority over the GPIO function.
-
- (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
- general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
- The HSE has priority over the GPIO function.
-
- @endverbatim
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup GPIO GPIO
- * @brief GPIO HAL module driver
- * @{
- */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup GPIO_Private_Constants GPIO Private Constants
- * @{
- */
-
-#define GPIO_NUMBER 16U
-/**
- * @}
- */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup GPIO_Exported_Functions GPIO Exported Functions
- * @{
- */
-
-/** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..]
- This section provides functions allowing to initialize and de-initialize the GPIOs
- to be ready for use.
-
-@endverbatim
- * @{
- */
-
-
-/**
- * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
- * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
- * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
- * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
- * the configuration information for the specified GPIO peripheral.
- * @retval None
- */
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{
- uint32_t position;
- uint32_t ioposition = 0x00U;
- uint32_t iocurrent = 0x00U;
- uint32_t temp = 0x00U;
-
- /* Check the parameters */
- assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
- assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
- assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
-
- /* Configure the port pins */
- for(position = 0U; position < GPIO_NUMBER; position++)
- {
- /* Get the IO position */
- ioposition = 0x01U << position;
- /* Get the current IO position */
- iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
-
- if(iocurrent == ioposition)
- {
- /*--------------------- GPIO Mode Configuration ------------------------*/
- /* In case of Output or Alternate function mode selection */
- if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
- (GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- {
- /* Check the Speed parameter */
- assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
- /* Configure the IO Speed */
- temp = GPIOx->OSPEEDR;
- temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
- temp |= (GPIO_Init->Speed << (position * 2U));
- GPIOx->OSPEEDR = temp;
-
- /* Configure the IO Output Type */
- temp = GPIOx->OTYPER;
- temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
- GPIOx->OTYPER = temp;
- }
-
- if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
- {
- /* Check the parameters */
- assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
-
- /* Activate the Pull-up or Pull down resistor for the current IO */
- temp = GPIOx->PUPDR;
- temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
- temp |= ((GPIO_Init->Pull) << (position * 2U));
- GPIOx->PUPDR = temp;
- }
-
- /* In case of Alternate function mode selection */
- if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- {
- /* Check the Alternate function parameter */
- assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
- /* Configure Alternate function mapped with the current IO */
- temp = GPIOx->AFR[position >> 3U];
- temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
- temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
- GPIOx->AFR[position >> 3U] = temp;
- }
-
- /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
- temp = GPIOx->MODER;
- temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
- temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
- GPIOx->MODER = temp;
-
- /*--------------------- EXTI Mode Configuration ------------------------*/
- /* Configure the External Interrupt or event for the current IO */
- if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
- {
- /* Enable SYSCFG Clock */
- __HAL_RCC_SYSCFG_CLK_ENABLE();
-
- temp = SYSCFG->EXTICR[position >> 2U];
- temp &= ~(0x0FU << (4U * (position & 0x03U)));
- temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
- SYSCFG->EXTICR[position >> 2U] = temp;
-
- /* Clear Rising Falling edge configuration */
- temp = EXTI->RTSR;
- temp &= ~((uint32_t)iocurrent);
- if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
- {
- temp |= iocurrent;
- }
- EXTI->RTSR = temp;
-
- temp = EXTI->FTSR;
- temp &= ~((uint32_t)iocurrent);
- if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
- {
- temp |= iocurrent;
- }
- EXTI->FTSR = temp;
-
- temp = EXTI->EMR;
- temp &= ~((uint32_t)iocurrent);
- if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
- {
- temp |= iocurrent;
- }
- EXTI->EMR = temp;
-
- /* Clear EXTI line configuration */
- temp = EXTI->IMR;
- temp &= ~((uint32_t)iocurrent);
- if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
- {
- temp |= iocurrent;
- }
- EXTI->IMR = temp;
- }
- }
- }
-}
-
-/**
- * @brief De-initializes the GPIOx peripheral registers to their default reset values.
- * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
- * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
- * @param GPIO_Pin specifies the port bit to be written.
- * This parameter can be one of GPIO_PIN_x where x can be (0..15).
- * @retval None
- */
-void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
-{
- uint32_t position;
- uint32_t ioposition = 0x00U;
- uint32_t iocurrent = 0x00U;
- uint32_t tmp = 0x00U;
-
- /* Check the parameters */
- assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-
- /* Configure the port pins */
- for(position = 0U; position < GPIO_NUMBER; position++)
- {
- /* Get the IO position */
- ioposition = 0x01U << position;
- /* Get the current IO position */
- iocurrent = (GPIO_Pin) & ioposition;
-
- if(iocurrent == ioposition)
- {
- /*------------------------- EXTI Mode Configuration --------------------*/
- tmp = SYSCFG->EXTICR[position >> 2U];
- tmp &= (0x0FU << (4U * (position & 0x03U)));
- if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))))
- {
- /* Clear EXTI line configuration */
- EXTI->IMR &= ~((uint32_t)iocurrent);
- EXTI->EMR &= ~((uint32_t)iocurrent);
-
- /* Clear Rising Falling edge configuration */
- EXTI->FTSR &= ~((uint32_t)iocurrent);
- EXTI->RTSR &= ~((uint32_t)iocurrent);
-
- /* Configure the External Interrupt or event for the current IO */
- tmp = 0x0FU << (4U * (position & 0x03U));
- SYSCFG->EXTICR[position >> 2U] &= ~tmp;
- }
-
- /*------------------------- GPIO Mode Configuration --------------------*/
- /* Configure IO Direction in Input Floating Mode */
- GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U));
-
- /* Configure the default Alternate Function in current IO */
- GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
-
- /* Deactivate the Pull-up and Pull-down resistor for the current IO */
- GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
-
- /* Configure the default value IO Output Type */
- GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
-
- /* Configure the default value for IO Speed */
- GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
- }
- }
-}
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
- * @brief GPIO Read and Write
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Reads the specified input port pin.
- * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
- * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
- * @param GPIO_Pin specifies the port bit to read.
- * This parameter can be GPIO_PIN_x where x can be (0..15).
- * @retval The input port pin value.
- */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
- GPIO_PinState bitstatus;
-
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
-
- if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
- {
- bitstatus = GPIO_PIN_SET;
- }
- else
- {
- bitstatus = GPIO_PIN_RESET;
- }
- return bitstatus;
-}
-
-/**
- * @brief Sets or clears the selected data port bit.
- *
- * @note This function uses GPIOx_BSRR register to allow atomic read/modify
- * accesses. In this way, there is no risk of an IRQ occurring between
- * the read and the modify access.
- *
- * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
- * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
- * @param GPIO_Pin specifies the port bit to be written.
- * This parameter can be one of GPIO_PIN_x where x can be (0..15).
- * @param PinState specifies the value to be written to the selected bit.
- * This parameter can be one of the GPIO_PinState enum values:
- * @arg GPIO_PIN_RESET: to clear the port pin
- * @arg GPIO_PIN_SET: to set the port pin
- * @retval None
- */
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
-{
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
- assert_param(IS_GPIO_PIN_ACTION(PinState));
-
- if(PinState != GPIO_PIN_RESET)
- {
- GPIOx->BSRR = GPIO_Pin;
- }
- else
- {
- GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
- }
-}
-
-/**
- * @brief Toggles the specified GPIO pins.
- * @param GPIOx Where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
- * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
- * @param GPIO_Pin Specifies the pins to be toggled.
- * @retval None
- */
-void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
- uint32_t odr;
-
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
-
- /* get current Output Data Register value */
- odr = GPIOx->ODR;
-
- /* Set selected pins that were at low level, and reset ones that were high */
- GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
-}
-
-/**
- * @brief Locks GPIO Pins configuration registers.
- * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
- * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
- * @note The configuration of the locked GPIO pins can no longer be modified
- * until the next reset.
- * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F4 family
- * @param GPIO_Pin specifies the port bit to be locked.
- * This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
- * @retval None
- */
-HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
- __IO uint32_t tmp = GPIO_LCKR_LCKK;
-
- /* Check the parameters */
- assert_param(IS_GPIO_PIN(GPIO_Pin));
-
- /* Apply lock key write sequence */
- tmp |= GPIO_Pin;
- /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
- GPIOx->LCKR = tmp;
- /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
- GPIOx->LCKR = GPIO_Pin;
- /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
- GPIOx->LCKR = tmp;
- /* Read LCKR register. This read is mandatory to complete key lock sequence */
- tmp = GPIOx->LCKR;
-
- /* Read again in order to confirm lock is active */
- if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
- {
- return HAL_OK;
- }
- else
- {
- return HAL_ERROR;
- }
-}
-
-/**
- * @brief This function handles EXTI interrupt request.
- * @param GPIO_Pin Specifies the pins connected EXTI line
- * @retval None
- */
-void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
-{
- /* EXTI line interrupt detected */
- if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
- {
- __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
- HAL_GPIO_EXTI_Callback(GPIO_Pin);
- }
-}
-
-/**
- * @brief EXTI line detection callbacks.
- * @param GPIO_Pin Specifies the pins connected EXTI line
- * @retval None
- */
-__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(GPIO_Pin);
- /* NOTE: This function Should not be modified, when the callback is needed,
- the HAL_GPIO_EXTI_Callback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-#endif /* HAL_GPIO_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c
deleted file mode 100644
index 44487dcb7cd60bcd7cebeda6923a8c02d44f96e2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c
+++ /dev/null
@@ -1,7524 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_i2c.c
- * @author MCD Application Team
- * @brief I2C HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Inter Integrated Circuit (I2C) peripheral:
- * + Initialization and de-initialization functions
- * + IO operation functions
- * + Peripheral State, Mode and Error functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The I2C HAL driver can be used as follows:
-
- (#) Declare a I2C_HandleTypeDef handle structure, for example:
- I2C_HandleTypeDef hi2c;
-
- (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
- (##) Enable the I2Cx interface clock
- (##) I2C pins configuration
- (+++) Enable the clock for the I2C GPIOs
- (+++) Configure I2C pins as alternate function open-drain
- (##) NVIC configuration if you need to use interrupt process
- (+++) Configure the I2Cx interrupt priority
- (+++) Enable the NVIC I2C IRQ Channel
- (##) DMA Configuration if you need to use DMA process
- (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
- (+++) Enable the DMAx interface clock using
- (+++) Configure the DMA handle parameters
- (+++) Configure the DMA Tx or Rx stream
- (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
- (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
- the DMA Tx or Rx stream
-
- (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
- Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
-
- (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
- (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit() API.
-
- (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
-
- (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
-
- *** Polling mode IO operation ***
- =================================
- [..]
- (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
- (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
- (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
- (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
-
- *** Polling mode IO MEM operation ***
- =====================================
- [..]
- (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
- (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
-
-
- *** Interrupt mode IO operation ***
- ===================================
- [..]
- (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
- (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
- (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
- (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
- (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
- (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
- (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
- (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-
- *** Interrupt mode or DMA mode IO sequential operation ***
- ==========================================================
- [..]
- (@) These interfaces allow to manage a sequential transfer with a repeated start condition
- when a direction change during transfer
- [..]
- (+) A specific option field manage the different steps of a sequential transfer
- (+) Option field values are defined through I2C_XferOptions_definition and are listed below:
- (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in no sequential mode
- (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
- and data to transfer without a final stop condition
- (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
- and data to transfer without a final stop condition, an then permit a call the same master sequential interface
- several times (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit_IT()
- or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_DMA())
- (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
- and with new data to transfer if the direction change or manage only the new data to transfer
- if no direction change and without a final stop condition in both cases
- (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
- and with new data to transfer if the direction change or manage only the new data to transfer
- if no direction change and with a final stop condition in both cases
- (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential
- interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
- Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
- or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
- or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
- or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
- Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the opposite interface Receive or Transmit
- without stopping the communication and so generate a restart condition.
- (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
- interface.
- Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
- or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
- or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
- or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
- Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
-
- (+) Different sequential I2C interfaces are listed below:
- (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Seq_Transmit_IT()
- or using HAL_I2C_Master_Seq_Transmit_DMA()
- (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
- (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Seq_Receive_IT()
- or using HAL_I2C_Master_Seq_Receive_DMA()
- (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
- (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
- (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
- (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
- add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
- (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
- (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Seq_Transmit_IT()
- or using HAL_I2C_Slave_Seq_Transmit_DMA()
- (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
- (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Seq_Receive_IT()
- or using HAL_I2C_Slave_Seq_Receive_DMA()
- (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
- (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
- *** Interrupt mode IO MEM operation ***
- =======================================
- [..]
- (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
- HAL_I2C_Mem_Write_IT()
- (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
- (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
- HAL_I2C_Mem_Read_IT()
- (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
- *** DMA mode IO operation ***
- ==============================
- [..]
- (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
- HAL_I2C_Master_Transmit_DMA()
- (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
- (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
- HAL_I2C_Master_Receive_DMA()
- (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
- (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
- HAL_I2C_Slave_Transmit_DMA()
- (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
- (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
- HAL_I2C_Slave_Receive_DMA()
- (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback()
- (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
- (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-
- *** DMA mode IO MEM operation ***
- =================================
- [..]
- (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
- HAL_I2C_Mem_Write_DMA()
- (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
- (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
- HAL_I2C_Mem_Read_DMA()
- (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
- add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
- (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
-
- *** I2C HAL driver macros list ***
- ==================================
- [..]
- Below the list of most used macros in I2C HAL driver.
-
- (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
- (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
- (+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
- (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
- (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
- (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
-
- *** Callback registration ***
- =============================================
- [..]
- The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
- allows the user to configure dynamically the driver callbacks.
- Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback()
- to register an interrupt callback.
- [..]
- Function HAL_I2C_RegisterCallback() allows to register following callbacks:
- (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
- (+) MasterRxCpltCallback : callback for Master reception end of transfer.
- (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
- (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
- (+) ListenCpltCallback : callback for end of listen mode.
- (+) MemTxCpltCallback : callback for Memory transmission end of transfer.
- (+) MemRxCpltCallback : callback for Memory reception end of transfer.
- (+) ErrorCallback : callback for error detection.
- (+) AbortCpltCallback : callback for abort completion process.
- (+) MspInitCallback : callback for Msp Init.
- (+) MspDeInitCallback : callback for Msp DeInit.
- This function takes as parameters the HAL peripheral handle, the Callback ID
- and a pointer to the user callback function.
- [..]
- For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCallback().
- [..]
- Use function HAL_I2C_UnRegisterCallback to reset a callback to the default
- weak function.
- HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
- and the Callback ID.
- This function allows to reset following callbacks:
- (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
- (+) MasterRxCpltCallback : callback for Master reception end of transfer.
- (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
- (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
- (+) ListenCpltCallback : callback for end of listen mode.
- (+) MemTxCpltCallback : callback for Memory transmission end of transfer.
- (+) MemRxCpltCallback : callback for Memory reception end of transfer.
- (+) ErrorCallback : callback for error detection.
- (+) AbortCpltCallback : callback for abort completion process.
- (+) MspInitCallback : callback for Msp Init.
- (+) MspDeInitCallback : callback for Msp DeInit.
- [..]
- For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback().
- [..]
- By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET
- all callbacks are set to the corresponding weak functions:
- examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback().
- Exception done for MspInit and MspDeInit functions that are
- reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when
- these callbacks are null (not registered beforehand).
- If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit()
- keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
- [..]
- Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only.
- Exception done MspInit/MspDeInit functions that can be registered/unregistered
- in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state,
- thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
- Then, the user first registers the MspInit/MspDeInit user callbacks
- using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit()
- or HAL_I2C_Init() function.
- [..]
- When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
- not defined, the callback registration feature is not available and all callbacks
- are set to the corresponding weak functions.
-
-
-
- [..]
- (@) You can refer to the I2C HAL driver header file for more useful macros
-
- @endverbatim
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup I2C I2C
- * @brief I2C HAL module driver
- * @{
- */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup I2C_Private_Define
- * @{
- */
-#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
-#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
-#define I2C_TIMEOUT_STOP_FLAG 5U /*!< Timeout 5 ms */
-#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
-
-/* Private define for @ref PreviousState usage */
-#define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */
-#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
-#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
-
-/**
- * @}
- */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @defgroup I2C_Private_Functions I2C Private Functions
- * @{
- */
-/* Private functions to handle DMA transfer */
-static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAError(DMA_HandleTypeDef *hdma);
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
-
-static void I2C_ITError(I2C_HandleTypeDef *hi2c);
-
-static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-
-/* Private functions to handle flags during polling transfer */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c);
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
-
-/* Private functions for I2C transfer IRQ handler */
-static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
-static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
-static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
-static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
-static void I2C_Master_SB(I2C_HandleTypeDef *hi2c);
-static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
-static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
-
-static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
-static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
-static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
-static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
-static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags);
-static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
-static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
-
-static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c);
-
-/* Private function to Convert Specific options */
-static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Functions I2C Exported Functions
- * @{
- */
-
-/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..] This subsection provides a set of functions allowing to initialize and
- deinitialize the I2Cx peripheral:
-
- (+) User must Implement HAL_I2C_MspInit() function in which he configures
- all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
-
- (+) Call the function HAL_I2C_Init() to configure the selected device with
- the selected configuration:
- (++) Communication Speed
- (++) Duty cycle
- (++) Addressing mode
- (++) Own Address 1
- (++) Dual Addressing mode
- (++) Own Address 2
- (++) General call mode
- (++) Nostretch mode
-
- (+) Call the function HAL_I2C_DeInit() to restore the default configuration
- of the selected I2Cx peripheral.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Initializes the I2C according to the specified parameters
- * in the I2C_InitTypeDef and initialize the associated handle.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{
- uint32_t freqrange;
- uint32_t pclk1;
-
- /* Check the I2C handle allocation */
- if (hi2c == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
- assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
- assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
- assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
- assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
- assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
- assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
- assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
- assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
-
- if (hi2c->State == HAL_I2C_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- hi2c->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- /* Init the I2C Callback settings */
- hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
- hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
- hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
- hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
- hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
- hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */
- hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */
- hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */
- hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
- hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */
-
- if (hi2c->MspInitCallback == NULL)
- {
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
- }
-
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- hi2c->MspInitCallback(hi2c);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- HAL_I2C_MspInit(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the selected I2C peripheral */
- __HAL_I2C_DISABLE(hi2c);
-
- /*Reset I2C*/
- hi2c->Instance->CR1 |= I2C_CR1_SWRST;
- hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
-
- /* Get PCLK1 frequency */
- pclk1 = HAL_RCC_GetPCLK1Freq();
-
- /* Check the minimum allowed PCLK1 frequency */
- if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
- {
- return HAL_ERROR;
- }
-
- /* Calculate frequency range */
- freqrange = I2C_FREQRANGE(pclk1);
-
- /*---------------------------- I2Cx CR2 Configuration ----------------------*/
- /* Configure I2Cx: Frequency range */
- MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
-
- /*---------------------------- I2Cx TRISE Configuration --------------------*/
- /* Configure I2Cx: Rise Time */
- MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
-
- /*---------------------------- I2Cx CCR Configuration ----------------------*/
- /* Configure I2Cx: Speed */
- MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
-
- /*---------------------------- I2Cx CR1 Configuration ----------------------*/
- /* Configure I2Cx: Generalcall and NoStretch mode */
- MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
-
- /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
- /* Configure I2Cx: Own Address1 and addressing mode */
- MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
-
- /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
- /* Configure I2Cx: Dual mode and Own Address2 */
- MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
-
- /* Enable the selected I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
-
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitialize the I2C peripheral.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
-{
- /* Check the I2C handle allocation */
- if (hi2c == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the I2C Peripheral Clock */
- __HAL_I2C_DISABLE(hi2c);
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- if (hi2c->MspDeInitCallback == NULL)
- {
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
- }
-
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- hi2c->MspDeInitCallback(hi2c);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_I2C_MspDeInit(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->State = HAL_I2C_STATE_RESET;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initialize the I2C MSP.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitialize the I2C MSP.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MspDeInit could be implemented in the user file
- */
-}
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-/**
- * @brief Register a User I2C Callback
- * To be used instead of the weak predefined callback
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param CallbackID ID of the callback to be registered
- * This parameter can be one of the following values:
- * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
- * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
- * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
- * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
- * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
- * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
- * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
- * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
- * @param pCallback pointer to the Callback function
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if (pCallback == NULL)
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- return HAL_ERROR;
- }
- /* Process locked */
- __HAL_LOCK(hi2c);
-
- if (HAL_I2C_STATE_READY == hi2c->State)
- {
- switch (CallbackID)
- {
- case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
- hi2c->MasterTxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
- hi2c->MasterRxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
- hi2c->SlaveTxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
- hi2c->SlaveRxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_LISTEN_COMPLETE_CB_ID :
- hi2c->ListenCpltCallback = pCallback;
- break;
-
- case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
- hi2c->MemTxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
- hi2c->MemRxCpltCallback = pCallback;
- break;
-
- case HAL_I2C_ERROR_CB_ID :
- hi2c->ErrorCallback = pCallback;
- break;
-
- case HAL_I2C_ABORT_CB_ID :
- hi2c->AbortCpltCallback = pCallback;
- break;
-
- case HAL_I2C_MSPINIT_CB_ID :
- hi2c->MspInitCallback = pCallback;
- break;
-
- case HAL_I2C_MSPDEINIT_CB_ID :
- hi2c->MspDeInitCallback = pCallback;
- break;
-
- default :
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (HAL_I2C_STATE_RESET == hi2c->State)
- {
- switch (CallbackID)
- {
- case HAL_I2C_MSPINIT_CB_ID :
- hi2c->MspInitCallback = pCallback;
- break;
-
- case HAL_I2C_MSPDEINIT_CB_ID :
- hi2c->MspDeInitCallback = pCallback;
- break;
-
- default :
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
- return status;
-}
-
-/**
- * @brief Unregister an I2C Callback
- * I2C callback is redirected to the weak predefined callback
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param CallbackID ID of the callback to be unregistered
- * This parameter can be one of the following values:
- * This parameter can be one of the following values:
- * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
- * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
- * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
- * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
- * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
- * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
- * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
- * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
- * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(hi2c);
-
- if (HAL_I2C_STATE_READY == hi2c->State)
- {
- switch (CallbackID)
- {
- case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
- hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
- break;
-
- case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
- hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
- break;
-
- case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
- hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
- break;
-
- case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
- hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
- break;
-
- case HAL_I2C_LISTEN_COMPLETE_CB_ID :
- hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
- break;
-
- case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
- hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */
- break;
-
- case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
- hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */
- break;
-
- case HAL_I2C_ERROR_CB_ID :
- hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */
- break;
-
- case HAL_I2C_ABORT_CB_ID :
- hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
- break;
-
- case HAL_I2C_MSPINIT_CB_ID :
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
- break;
-
- case HAL_I2C_MSPDEINIT_CB_ID :
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
- break;
-
- default :
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (HAL_I2C_STATE_RESET == hi2c->State)
- {
- switch (CallbackID)
- {
- case HAL_I2C_MSPINIT_CB_ID :
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
- break;
-
- case HAL_I2C_MSPDEINIT_CB_ID :
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
- break;
-
- default :
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
- return status;
-}
-
-/**
- * @brief Register the Slave Address Match I2C Callback
- * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pCallback pointer to the Address Match Callback function
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if (pCallback == NULL)
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- return HAL_ERROR;
- }
- /* Process locked */
- __HAL_LOCK(hi2c);
-
- if (HAL_I2C_STATE_READY == hi2c->State)
- {
- hi2c->AddrCallback = pCallback;
- }
- else
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
- return status;
-}
-
-/**
- * @brief UnRegister the Slave Address Match I2C Callback
- * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined callback
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(hi2c);
-
- if (HAL_I2C_STATE_READY == hi2c->State)
- {
- hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */
- }
- else
- {
- /* Update the error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(hi2c);
- return status;
-}
-
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
- * @brief Data transfers functions
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to manage the I2C data
- transfers.
-
- (#) There are two modes of transfer:
- (++) Blocking mode : The communication is performed in the polling mode.
- The status of all data processing is returned by the same function
- after finishing transfer.
- (++) No-Blocking mode : The communication is performed using Interrupts
- or DMA. These functions return the status of the transfer startup.
- The end of the data processing will be indicated through the
- dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
- using DMA mode.
-
- (#) Blocking mode functions are :
- (++) HAL_I2C_Master_Transmit()
- (++) HAL_I2C_Master_Receive()
- (++) HAL_I2C_Slave_Transmit()
- (++) HAL_I2C_Slave_Receive()
- (++) HAL_I2C_Mem_Write()
- (++) HAL_I2C_Mem_Read()
- (++) HAL_I2C_IsDeviceReady()
-
- (#) No-Blocking mode functions with Interrupt are :
- (++) HAL_I2C_Master_Transmit_IT()
- (++) HAL_I2C_Master_Receive_IT()
- (++) HAL_I2C_Slave_Transmit_IT()
- (++) HAL_I2C_Slave_Receive_IT()
- (++) HAL_I2C_Mem_Write_IT()
- (++) HAL_I2C_Mem_Read_IT()
- (++) HAL_I2C_Master_Seq_Transmit_IT()
- (++) HAL_I2C_Master_Seq_Receive_IT()
- (++) HAL_I2C_Slave_Seq_Transmit_IT()
- (++) HAL_I2C_Slave_Seq_Receive_IT()
- (++) HAL_I2C_EnableListen_IT()
- (++) HAL_I2C_DisableListen_IT()
- (++) HAL_I2C_Master_Abort_IT()
-
- (#) No-Blocking mode functions with DMA are :
- (++) HAL_I2C_Master_Transmit_DMA()
- (++) HAL_I2C_Master_Receive_DMA()
- (++) HAL_I2C_Slave_Transmit_DMA()
- (++) HAL_I2C_Slave_Receive_DMA()
- (++) HAL_I2C_Mem_Write_DMA()
- (++) HAL_I2C_Mem_Read_DMA()
- (++) HAL_I2C_Master_Seq_Transmit_DMA()
- (++) HAL_I2C_Master_Seq_Receive_DMA()
- (++) HAL_I2C_Slave_Seq_Transmit_DMA()
- (++) HAL_I2C_Slave_Seq_Receive_DMA()
-
- (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
- (++) HAL_I2C_MasterTxCpltCallback()
- (++) HAL_I2C_MasterRxCpltCallback()
- (++) HAL_I2C_SlaveTxCpltCallback()
- (++) HAL_I2C_SlaveRxCpltCallback()
- (++) HAL_I2C_MemTxCpltCallback()
- (++) HAL_I2C_MemRxCpltCallback()
- (++) HAL_I2C_AddrCallback()
- (++) HAL_I2C_ListenCpltCallback()
- (++) HAL_I2C_ErrorCallback()
- (++) HAL_I2C_AbortCpltCallback()
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Transmits in master mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address */
- if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- while (hi2c->XferSize > 0U)
- {
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- hi2c->XferSize--;
-
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- hi2c->XferSize--;
- }
-
- /* Wait until BTF flag is set */
- if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receives in master mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address */
- if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- if (hi2c->XferSize == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else if (hi2c->XferSize == 1U)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else if (hi2c->XferSize == 2U)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable Pos */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while (hi2c->XferSize > 0U)
- {
- if (hi2c->XferSize <= 3U)
- {
- /* One byte */
- if (hi2c->XferSize == 1U)
- {
- /* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- /* Two bytes */
- else if (hi2c->XferSize == 2U)
- {
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- /* 3 Last bytes */
- else
- {
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
- else
- {
- /* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmits in slave mode an amount of data in blocking mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* If 10bit addressing mode is selected */
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
- {
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while (hi2c->XferSize > 0U)
- {
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- return HAL_ERROR;
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- hi2c->XferSize--;
-
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- hi2c->XferSize--;
- }
- }
-
- /* Wait until AF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in blocking mode
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == (uint16_t)0))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- while (hi2c->XferSize > 0U)
- {
- /* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- return HAL_ERROR;
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
-
- /* Wait until STOP flag is set */
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- return HAL_ERROR;
- }
-
- /* Clear STOP flag */
- __HAL_I2C_CLEAR_STOPFLAG(hi2c);
-
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
- HAL_StatusTypeDef dmaxferstatus;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
- if (hi2c->XferSize > 0U)
- {
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in master mode an amount of data in non-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
- HAL_StatusTypeDef dmaxferstatus;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
-
- if (hi2c->XferSize > 0U)
- {
- if (hi2c->hdmarx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- HAL_StatusTypeDef dmaxferstatus;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
-
- return HAL_OK;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
- HAL_StatusTypeDef dmaxferstatus;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- if (hi2c->hdmarx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- return HAL_OK;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Write an amount of data in blocking mode to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address and Memory Address */
- if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- while (hi2c->XferSize > 0U)
- {
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
-
- /* Wait until BTF flag is set */
- if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Read an amount of data in blocking mode from a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Send Slave Address and Memory Address */
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- if (hi2c->XferSize == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else if (hi2c->XferSize == 1U)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else if (hi2c->XferSize == 2U)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable Pos */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- while (hi2c->XferSize > 0U)
- {
- if (hi2c->XferSize <= 3U)
- {
- /* One byte */
- if (hi2c->XferSize == 1U)
- {
- /* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- /* Two bytes */
- else if (hi2c->XferSize == 2U)
- {
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- /* 3 Last bytes */
- else
- {
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Wait until BTF flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
- else
- {
- /* Wait until RXNE flag is set */
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
-
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferSize--;
- hi2c->XferCount--;
- }
- }
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- if (hi2c->XferSize > 0U)
- {
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- }
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- __IO uint32_t count = 0U;
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- if (hi2c->XferSize > 0U)
- {
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferM1CpltCallback = NULL;
- hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Send Slave Address and Memory Address */
- if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- /* Abort the ongoing DMA */
- dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmatx);
-
- /* Prevent unused argument(s) compilation and MISRA warning */
- UNUSED(dmaxferstatus);
-
- /* Set the unused I2C DMA transfer complete callback to NULL */
- hi2c->hdmatx->XferCpltCallback = NULL;
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->XferSize = 0U;
- hi2c->XferCount = 0U;
-
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- return HAL_OK;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be read
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
- /* Init tickstart for timeout management*/
- uint32_t tickstart = HAL_GetTick();
- __IO uint32_t count = 0U;
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Check the parameters */
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MEM;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->Devaddress = DevAddress;
- hi2c->Memaddress = MemAddress;
- hi2c->MemaddSize = MemAddSize;
- hi2c->EventCount = 0U;
-
- if (hi2c->XferSize > 0U)
- {
- if (hi2c->hdmarx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferM1CpltCallback = NULL;
- hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Send Slave Address and Memory Address */
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- /* Abort the ongoing DMA */
- dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
-
- /* Prevent unused argument(s) compilation and MISRA warning */
- UNUSED(dmaxferstatus);
-
- /* Set the unused I2C DMA transfer complete callback to NULL */
- hi2c->hdmarx->XferCpltCallback = NULL;
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->XferSize = 0U;
- hi2c->XferCount = 0U;
-
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- return HAL_ERROR;
- }
-
- if (hi2c->XferSize == 1U)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- else
- {
- /* Enable Last DMA bit */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Send Slave Address and Memory Address */
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Checks if target device is ready for communication.
- * @note This function is used with Memory devices
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param Trials Number of trials
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
- /* Get tick */
- uint32_t tickstart = HAL_GetTick();
- uint32_t I2C_Trials = 0U;
- FlagStatus tmp1;
- FlagStatus tmp2;
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_BUSY;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- do
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR or AF flag are set */
- /* Get tick */
- tickstart = HAL_GetTick();
-
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
- while ((hi2c->State != HAL_I2C_STATE_TIMEOUT) && (tmp1 == RESET) && (tmp2 == RESET))
- {
- if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->State = HAL_I2C_STATE_TIMEOUT;
- }
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Check if the ADDR flag has been set */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Clear ADDR Flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_OK;
- }
- else
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Clear AF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Wait until BUSY flag is reset */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
- }
-
- /* Increment Trials */
- I2C_Trials++;
- }
- while (I2C_Trials < Trials);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- __IO uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0x00U;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA.
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- __IO uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0x00U;
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- if (hi2c->XferSize > 0U)
- {
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
- /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
- if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
- {
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- }
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- __IO uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0U;
- uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
- {
- if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable Pos */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- /* Remove Enabling of IT_BUF, mean RXNE treatment, treat the 2 bytes through BTF */
- enableIT &= ~I2C_IT_BUF;
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
-
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable interrupts */
- __HAL_I2C_ENABLE_IT(hi2c, enableIT);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in master mode an amount of data in non-blocking mode with DMA
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- __IO uint32_t Prev_State = 0x00U;
- __IO uint32_t count = 0U;
- uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- /* Check Busy Flag only if FIRST call of Master interface */
- if ((READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP) || (XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
- {
- /* Wait until BUSY flag is reset */
- count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- /* Clear Last DMA bit */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX;
- hi2c->Mode = HAL_I2C_MODE_MASTER;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
- hi2c->Devaddress = DevAddress;
-
- Prev_State = hi2c->PreviousState;
-
- if (hi2c->XferSize > 0U)
- {
- if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
- {
- if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable Pos */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- /* Enable Last DMA bit */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- if ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_OTHER_AND_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
- {
- /* Enable Last DMA bit */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
- }
- }
- if (hi2c->hdmarx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- if (dmaxferstatus == HAL_OK)
- {
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Update interrupt for only EVT and ERR */
- enableIT = (I2C_IT_EVT | I2C_IT_ERR);
- }
- else
- {
- /* Update interrupt for only ERR */
- enableIT = I2C_IT_ERR;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* If XferOptions is not associated to a new frame, mean no start bit is request, enable directly the DMA request */
- /* In other cases, DMA request is enabled after Slave address treatment in IRQHandler */
- if ((XferOptions == I2C_NEXT_FRAME) || (XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP))
- {
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, enableIT);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
- /* Mean Previous state is same as current state */
- if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable interrupts */
- __HAL_I2C_ENABLE_IT(hi2c, enableIT);
- }
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential transmit in slave mode an amount of data in non-blocking mode with DMA
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
- /* and then toggle the HAL slave RX state to TX state */
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
- {
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- /* Abort DMA Xfer if any */
- if (hi2c->hdmarx != NULL)
- {
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
- }
- }
- }
- }
- else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
- {
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Abort DMA Xfer if any */
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA TX */
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
- }
- }
- }
- }
- else
- {
- /* Nothing to do */
- }
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
-
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmatx->XferHalfCpltCallback = NULL;
- hi2c->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Enable DMA Request */
- hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
-
- return HAL_OK;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
-
- /* Enable EVT, BUF and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sequential receive in slave mode an amount of data in non-blocking mode with DMA
- * @note This interface allow to manage repeated start condition when a direction change during transfer
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param pData Pointer to data buffer
- * @param Size Amount of data to be sent
- * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
- HAL_StatusTypeDef dmaxferstatus;
-
- /* Check the parameters */
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
- /* and then toggle the HAL slave RX state to TX state */
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
- {
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- /* Abort DMA Xfer if any */
- if (hi2c->hdmarx != NULL)
- {
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
- }
- }
- }
- }
- else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
- {
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Abort DMA Xfer if any */
- if (hi2c->hdmatx != NULL)
- {
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA TX */
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
- }
- }
- }
- }
- else
- {
- /* Nothing to do */
- }
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Disable Pos */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
-
- hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_SLAVE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Prepare transfer parameters */
- hi2c->pBuffPtr = pData;
- hi2c->XferCount = Size;
- hi2c->XferSize = hi2c->XferCount;
- hi2c->XferOptions = XferOptions;
-
- if (hi2c->hdmarx != NULL)
- {
- /* Set the I2C DMA transfer complete callback */
- hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
- /* Set the DMA error callback */
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
- /* Set the unused DMA callbacks to NULL */
- hi2c->hdmarx->XferHalfCpltCallback = NULL;
- hi2c->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_LISTEN;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- if (dmaxferstatus == HAL_OK)
- {
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Note : The I2C interrupts must be enabled after unlocking current process
- to avoid the risk of I2C interrupt handle execution before current
- process unlock */
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- /* Update I2C state */
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Update I2C error code */
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Enable the Address listen mode with Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
-{
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Check if the I2C is already enabled */
- if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
- {
- /* Enable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
- }
-
- /* Enable Address Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable EVT and ERR interrupt */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Disable the Address listen mode with Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of tmp to prevent undefined behavior of volatile usage */
- uint32_t tmp;
-
- /* Disable Address listen mode only if a transfer is not ongoing */
- if (hi2c->State == HAL_I2C_STATE_LISTEN)
- {
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Disable Address Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Abort a master I2C IT or DMA process communication with Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
-
- /* Prevent unused argument(s) compilation warning */
- UNUSED(DevAddress);
-
- /* Abort Master transfer during Receive or Transmit process */
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && (CurrentMode == HAL_I2C_MODE_MASTER))
- {
- /* Process Locked */
- __HAL_LOCK(hi2c);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_ABORT;
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->XferCount = 0U;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
- I2C_ITError(hi2c);
-
- return HAL_OK;
- }
- else
- {
- /* Wrong usage of abort function */
- /* This function should be used only in case of abort monitored by master device */
- /* Or periphal is not in busy state, mean there is no active sequence to be abort */
- return HAL_ERROR;
- }
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-
-/**
- * @brief This function handles I2C event interrupt request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
- uint32_t sr1itflags;
- uint32_t sr2itflags = 0U;
- uint32_t itsources = READ_REG(hi2c->Instance->CR2);
- uint32_t CurrentXferOptions = hi2c->XferOptions;
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- /* Master or Memory mode selected */
- if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
- {
- sr2itflags = READ_REG(hi2c->Instance->SR2);
- sr1itflags = READ_REG(hi2c->Instance->SR1);
-
- /* Exit IRQ event until Start Bit detected in case of Other frame requested */
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) == RESET) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(CurrentXferOptions) == 1U))
- {
- return;
- }
-
- /* SB Set ----------------------------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- /* Convert OTHER_xxx XferOptions if any */
- I2C_ConvertOtherXferOptions(hi2c);
-
- I2C_Master_SB(hi2c);
- }
- /* ADD10 Set -------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADD10) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_Master_ADD10(hi2c);
- }
- /* ADDR Set --------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_Master_ADDR(hi2c);
- }
- /* I2C in mode Transmitter -----------------------------------------------*/
- else if (I2C_CHECK_FLAG(sr2itflags, I2C_FLAG_TRA) != RESET)
- {
- /* Do not check buffer and BTF flag if a Xfer DMA is on going */
- if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
- {
- /* TXE set and BTF reset -----------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
- {
- I2C_MasterTransmit_TXE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- if (CurrentState == HAL_I2C_STATE_BUSY_TX)
- {
- I2C_MasterTransmit_BTF(hi2c);
- }
- else /* HAL_I2C_MODE_MEM */
- {
- if (CurrentMode == HAL_I2C_MODE_MEM)
- {
- I2C_MemoryTransmit_TXE_BTF(hi2c);
- }
- }
- }
- else
- {
- /* Do nothing */
- }
- }
- }
- /* I2C in mode Receiver --------------------------------------------------*/
- else
- {
- /* Do not check buffer and BTF flag if a Xfer DMA is on going */
- if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN)
- {
- /* RXNE set and BTF reset -----------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
- {
- I2C_MasterReceive_RXNE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_MasterReceive_BTF(hi2c);
- }
- else
- {
- /* Do nothing */
- }
- }
- }
- }
- /* Slave mode selected */
- else
- {
- /* If an error is detected, read only SR1 register to prevent */
- /* a clear of ADDR flags by reading SR2 after reading SR1 in Error treatment */
- if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
- sr1itflags = READ_REG(hi2c->Instance->SR1);
- }
- else
- {
- sr2itflags = READ_REG(hi2c->Instance->SR2);
- sr1itflags = READ_REG(hi2c->Instance->SR1);
- }
-
- /* ADDR set --------------------------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- /* Now time to read SR2, this will clear ADDR flag automatically */
- if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
- sr2itflags = READ_REG(hi2c->Instance->SR2);
- }
- I2C_Slave_ADDR(hi2c, sr2itflags);
- }
- /* STOPF set --------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_Slave_STOPF(hi2c);
- }
- /* I2C in mode Transmitter -----------------------------------------------*/
- else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
- {
- /* TXE set and BTF reset -----------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
- {
- I2C_SlaveTransmit_TXE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_SlaveTransmit_BTF(hi2c);
- }
- else
- {
- /* Do nothing */
- }
- }
- /* I2C in mode Receiver --------------------------------------------------*/
- else
- {
- /* RXNE set and BTF reset ----------------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
- {
- I2C_SlaveReceive_RXNE(hi2c);
- }
- /* BTF set -------------------------------------------------------------*/
- else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
- {
- I2C_SlaveReceive_BTF(hi2c);
- }
- else
- {
- /* Do nothing */
- }
- }
- }
-}
-
-/**
- * @brief This function handles I2C error interrupt request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
- HAL_I2C_ModeTypeDef tmp1;
- uint32_t tmp2;
- HAL_I2C_StateTypeDef tmp3;
- uint32_t tmp4;
- uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
- uint32_t itsources = READ_REG(hi2c->Instance->CR2);
- uint32_t error = HAL_I2C_ERROR_NONE;
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
-
- /* I2C Bus error interrupt occurred ----------------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
- {
- error |= HAL_I2C_ERROR_BERR;
-
- /* Clear BERR flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
- }
-
- /* I2C Arbitration Lost error interrupt occurred ---------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
- {
- error |= HAL_I2C_ERROR_ARLO;
-
- /* Clear ARLO flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
- }
-
- /* I2C Acknowledge failure error interrupt occurred ------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
- {
- tmp1 = CurrentMode;
- tmp2 = hi2c->XferCount;
- tmp3 = hi2c->State;
- tmp4 = hi2c->PreviousState;
- if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
- ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
- ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
- {
- I2C_Slave_AF(hi2c);
- }
- else
- {
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- error |= HAL_I2C_ERROR_AF;
-
- /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
- if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- }
- }
-
- /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
- if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
- {
- error |= HAL_I2C_ERROR_OVR;
- /* Clear OVR flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
- }
-
- /* Call the Error Callback in case of Error detected -----------------------*/
- if (error != HAL_I2C_ERROR_NONE)
- {
- hi2c->ErrorCode |= error;
- I2C_ITError(hi2c);
- }
-}
-
-/**
- * @brief Master Tx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Master Rx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
- */
-}
-
-/** @brief Slave Tx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Slave Rx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Slave Address Match callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition
- * @param AddrMatchCode Address Match Code
- * @retval None
- */
-__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
- UNUSED(TransferDirection);
- UNUSED(AddrMatchCode);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_AddrCallback() could be implemented in the user file
- */
-}
-
-/**
- * @brief Listen Complete callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_ListenCpltCallback() could be implemented in the user file
- */
-}
-
-/**
- * @brief Memory Tx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MemTxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Memory Rx Transfer completed callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_MemRxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief I2C error callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_ErrorCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief I2C abort callback.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval None
- */
-__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(hi2c);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_I2C_AbortCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
- * @brief Peripheral State, Mode and Error functions
- *
-@verbatim
- ===============================================================================
- ##### Peripheral State, Mode and Error functions #####
- ===============================================================================
- [..]
- This subsection permit to get in run-time the status of the peripheral
- and the data flow.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Return the I2C handle state.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL state
- */
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
-{
- /* Return I2C handle state */
- return hi2c->State;
-}
-
-/**
- * @brief Returns the I2C Master, Slave, Memory or no mode.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval HAL mode
- */
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
-{
- return hi2c->Mode;
-}
-
-/**
- * @brief Return the I2C error code.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval I2C Error Code
- */
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
-{
- return hi2c->ErrorCode;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @addtogroup I2C_Private_Functions
- * @{
- */
-
-/**
- * @brief Handle TXE flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if ((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
- {
- /* Call TxCpltCallback() directly if no stop mode is set */
- if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
- {
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterTxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else /* Generate Stop condition then Call TxCpltCallback() */
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemTxCpltCallback(hi2c);
-#else
- HAL_I2C_MemTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterTxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- }
- else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
- ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
- {
- if (hi2c->XferCount == 0U)
- {
- /* Disable BUF interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
- }
- else
- {
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- I2C_MemoryTransmit_TXE_BTF(hi2c);
- }
- else
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- }
- }
- else
- {
- /* Do nothing */
- }
-}
-
-/**
- * @brief Handle BTF flag for Master transmitter
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- if (hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- else
- {
- /* Call TxCpltCallback() directly if no stop mode is set */
- if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
- {
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterTxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else /* Generate Stop condition then Call TxCpltCallback() */
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemTxCpltCallback(hi2c);
-#else
- HAL_I2C_MemTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterTxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- }
- }
- else
- {
- /* Do nothing */
- }
-}
-
-/**
- * @brief Handle TXE and BTF flag for Memory transmitter
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- if (hi2c->EventCount == 0U)
- {
- /* If Memory address size is 8Bit */
- if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount += 2U;
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- }
- else if (hi2c->EventCount == 1U)
- {
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
-
- hi2c->EventCount++;
- }
- else if (hi2c->EventCount == 2U)
- {
- if (CurrentState == HAL_I2C_STATE_BUSY_RX)
- {
- /* Generate Restart */
- hi2c->Instance->CR1 |= I2C_CR1_START;
-
- hi2c->EventCount++;
- }
- else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
- {
- /* Generate Stop condition then Call TxCpltCallback() */
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemTxCpltCallback(hi2c);
-#else
- HAL_I2C_MemTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- /* Do nothing */
- }
- }
- else
- {
- /* Do nothing */
- }
-}
-
-/**
- * @brief Handle RXNE flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
-{
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- uint32_t tmp;
-
- tmp = hi2c->XferCount;
- if (tmp > 3U)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- if (hi2c->XferCount == (uint16_t)3)
- {
- /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
- on BTF subroutine */
- /* Disable BUF interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
- }
- }
- else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
- {
- if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_NONE;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemRxCpltCallback(hi2c);
-#else
- HAL_I2C_MemRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterRxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call user error callback */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ErrorCallback(hi2c);
-#else
- HAL_I2C_ErrorCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
- on BTF subroutine if there is a reception delay between N-1 and N byte */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
- }
- }
-}
-
-/**
- * @brief Handle BTF flag for Master receiver
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if (hi2c->XferCount == 4U)
- {
- /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
- on BTF subroutine if there is a reception delay between N-1 and N byte */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- else if (hi2c->XferCount == 3U)
- {
- /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
- on BTF subroutine if there is a reception delay between N-1 and N byte */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME))
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
- else if (hi2c->XferCount == 2U)
- {
- /* Prepare next transfer or stop current transfer */
- if ((CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP))
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- else if ((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_NEXT_FRAME))
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else
- {
- /* Do nothing */
- }
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- hi2c->State = HAL_I2C_STATE_READY;
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_NONE;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemRxCpltCallback(hi2c);
-#else
- HAL_I2C_MemRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterRxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
-}
-
-/**
- * @brief Handle SB flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_Master_SB(I2C_HandleTypeDef *hi2c)
-{
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- if (hi2c->EventCount == 0U)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
- }
- else
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
- }
- }
- else
- {
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave 7 Bits address */
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
- }
- else
- {
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
- }
-
- if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
- || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
- {
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
- }
- else
- {
- if (hi2c->EventCount == 0U)
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
- }
- else if (hi2c->EventCount == 1U)
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
- }
- else
- {
- /* Do nothing */
- }
- }
- }
-}
-
-/**
- * @brief Handle ADD10 flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
-{
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
-
- if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
- || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
- {
- /* Enable DMA Request */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
- }
-}
-
-/**
- * @brief Handle ADDR flag for Master
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
- uint32_t Prev_State = hi2c->PreviousState;
-
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
- {
- if ((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else if ((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Restart */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- hi2c->EventCount++;
- }
- else
- {
- if (hi2c->XferCount == 0U)
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- else if (hi2c->XferCount == 1U)
- {
- if (CurrentXferOptions == I2C_NO_OPTION_FRAME)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- }
- /* Prepare next transfer or stop current transfer */
- else if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
- && ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (CurrentXferOptions == I2C_FIRST_FRAME)))
- {
- if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- }
- else if (hi2c->XferCount == 2U)
- {
- if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Enable Pos */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
-
- if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
- {
- /* Enable Last DMA bit */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
- else
- {
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME)))
- {
- /* Enable Last DMA bit */
- SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-
- /* Reset Event counter */
- hi2c->EventCount = 0U;
- }
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
- }
-}
-
-/**
- * @brief Handle TXE flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- if (hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
- {
- /* Last Byte is received, disable Interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- /* Set state at HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveTxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
-}
-
-/**
- * @brief Handle BTF flag for Slave transmitter
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
-{
- if (hi2c->XferCount != 0U)
- {
- /* Write data to DR */
- hi2c->Instance->DR = *hi2c->pBuffPtr;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
-}
-
-/**
- * @brief Handle RXNE flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- if (hi2c->XferCount != 0U)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
-
- if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
- {
- /* Last Byte is received, disable Interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
-
- /* Set state at HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveRxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
-}
-
-/**
- * @brief Handle BTF flag for Slave receiver
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
-{
- if (hi2c->XferCount != 0U)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
-}
-
-/**
- * @brief Handle ADD flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param IT2Flags Interrupt2 flags to handle.
- * @retval None
- */
-static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags)
-{
- uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
- uint16_t SlaveAddrCode;
-
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- /* Disable BUF interrupt, BUF enabling is manage through slave specific interface */
- __HAL_I2C_DISABLE_IT(hi2c, (I2C_IT_BUF));
-
- /* Transfer Direction requested by Master */
- if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_TRA) == RESET)
- {
- TransferDirection = I2C_DIRECTION_TRANSMIT;
- }
-
- if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_DUALF) == RESET)
- {
- SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress1;
- }
- else
- {
- SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress2;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- /* Call Slave Addr callback */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
-#else
- HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
- }
-}
-
-/**
- * @brief Handle STOPF flag for Slave
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear STOPF flag */
- __HAL_I2C_CLEAR_STOPFLAG(hi2c);
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* If a DMA is ongoing, Update handle size context */
- if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- if ((CurrentState == HAL_I2C_STATE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
- {
- hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmarx));
-
- if (hi2c->XferCount != 0U)
- {
- /* Set ErrorCode corresponding to a Non-Acknowledge */
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
- }
-
- /* Disable, stop the current DMA */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Abort DMA Xfer if any */
- if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY)
- {
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
- }
- }
- }
- else
- {
- hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmatx));
-
- if (hi2c->XferCount != 0U)
- {
- /* Set ErrorCode corresponding to a Non-Acknowledge */
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
- }
-
- /* Disable, stop the current DMA */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- /* Abort DMA Xfer if any */
- if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY)
- {
- /* Set the I2C DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
- /* Abort DMA TX */
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
- }
- }
- }
- }
-
- /* All data are not transferred, so set error code accordingly */
- if (hi2c->XferCount != 0U)
- {
- /* Store Last receive data if any */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
-
- /* Store Last receive data if any */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
-
- /* Update counter */
- hi2c->XferCount--;
- }
-
- if (hi2c->XferCount != 0U)
- {
- /* Set ErrorCode corresponding to a Non-Acknowledge */
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
- }
- }
-
- if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
- /* Call the corresponding callback to inform upper layer of End of Transfer */
- I2C_ITError(hi2c);
- }
- else
- {
- if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
- {
- /* Set state at HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveRxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-
- if (hi2c->State == HAL_I2C_STATE_LISTEN)
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ListenCpltCallback(hi2c);
-#else
- HAL_I2C_ListenCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- if ((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveRxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- }
-}
-
-/**
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @retval None
- */
-static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- if (((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
- (CurrentState == HAL_I2C_STATE_LISTEN))
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ListenCpltCallback(hi2c);
-#else
- HAL_I2C_ListenCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else if (CurrentState == HAL_I2C_STATE_BUSY_TX)
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
- /* Clear AF flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveTxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- /* Clear AF flag only */
- /* State Listen, but XferOptions == FIRST or NEXT */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
- }
-}
-
-/**
- * @brief I2C interrupts error process
- * @param hi2c I2C handle.
- * @retval None
- */
-static void I2C_ITError(I2C_HandleTypeDef *hi2c)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
- uint32_t CurrentError;
-
- if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
- {
- /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
- hi2c->Instance->CR1 &= ~I2C_CR1_POS;
- }
-
- if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- /* keep HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_LISTEN;
- }
- else
- {
- /* If state is an abort treatment on going, don't change state */
- /* This change will be do later */
- if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT))
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
- hi2c->PreviousState = I2C_STATE_NONE;
- }
-
- /* Abort DMA transfer */
- if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
- {
- hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
-
- if (hi2c->hdmatx->State != HAL_DMA_STATE_READY)
- {
- /* Set the DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
- {
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Call Directly XferAbortCallback function in case of error */
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
- }
- }
- else
- {
- /* Set the DMA Abort callback :
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
- {
- /* Store Last receive data if any */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
- }
-
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
- }
- }
- }
- else if (hi2c->State == HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Store Last receive data if any */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
- }
-
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->AbortCpltCallback(hi2c);
-#else
- HAL_I2C_AbortCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- /* Store Last receive data if any */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
- {
- /* Read data from DR */
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
-
- /* Increment Buffer pointer */
- hi2c->pBuffPtr++;
- }
-
- /* Call user error callback */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ErrorCallback(hi2c);
-#else
- HAL_I2C_ErrorCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-
- /* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */
- CurrentError = hi2c->ErrorCode;
-
- if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \
- ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \
- ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \
- ((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR))
- {
- /* Disable EVT, BUF and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
- }
-
- /* So may inform upper layer that listen phase is stopped */
- /* during NACK error treatment */
- CurrentState = hi2c->State;
- if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
- {
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ListenCpltCallback(hi2c);
-#else
- HAL_I2C_ListenCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- /* Generate Start condition if first transfer */
- if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
- else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
- {
- /* Generate ReStart */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
- else
- {
- /* Do nothing */
- }
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
- }
- else
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
-
- /* Wait until ADD10 flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
- }
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address for read request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start condition if first transfer */
- if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
- {
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
- else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
- {
- /* Generate ReStart */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
- }
- else
- {
- /* Do nothing */
- }
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
- {
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
- }
- else
- {
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
-
- /* Wait until ADD10 flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Generate Restart */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- /* Send header of slave address */
- hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
- }
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address followed by internal memory address for write request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* If Memory address size is 8Bit */
- if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
-
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Master sends target device address followed by internal memory address for read request.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param DevAddress Target device address: The device 7 bits address value
- * in datasheet must be shifted to the left before calling the interface
- * @param MemAddress Internal memory address
- * @param MemAddSize Size of internal memory address
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* Generate Start */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Clear ADDR flag */
- __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
-
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* If Memory address size is 8Bit */
- if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
- {
- /* Send Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
- /* If Memory address size is 16Bit */
- else
- {
- /* Send MSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
-
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Send LSB of Memory Address */
- hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
- }
-
- /* Wait until TXE flag is set */
- if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
- {
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
- return HAL_ERROR;
- }
-
- /* Generate Restart */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
- /* Wait until SB flag is set */
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
- {
- if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
- {
- hi2c->ErrorCode = HAL_I2C_WRONG_START;
- }
- return HAL_TIMEOUT;
- }
-
- /* Send slave address */
- hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
-
- /* Wait until ADDR flag is set */
- if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief DMA I2C process complete callback.
- * @param hdma DMA handle
- * @retval None
- */
-static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
-{
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
-
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
- HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
- uint32_t CurrentXferOptions = hi2c->XferOptions;
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Clear Complete callback */
- if (hi2c->hdmatx != NULL)
- {
- hi2c->hdmatx->XferCpltCallback = NULL;
- }
- if (hi2c->hdmarx != NULL)
- {
- hi2c->hdmarx->XferCpltCallback = NULL;
- }
-
- if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
- {
- /* Disable DMA Request */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- hi2c->XferCount = 0U;
-
- if (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)
- {
- /* Set state at HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveTxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveTxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
- {
- /* Set state at HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
- hi2c->State = HAL_I2C_STATE_LISTEN;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->SlaveRxCpltCallback(hi2c);
-#else
- HAL_I2C_SlaveRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- /* Do nothing */
- }
-
- /* Enable EVT and ERR interrupt to treat end of transfer in IRQ handler */
- __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
- }
- /* Check current Mode, in case of treatment DMA handler have been preempted by a prior interrupt */
- else if (hi2c->Mode != HAL_I2C_MODE_NONE)
- {
- if (hi2c->XferCount == (uint16_t)1)
- {
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
- }
-
- /* Disable EVT and ERR interrupt */
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
-
- /* Prepare next transfer or stop current transfer */
- if ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_OTHER_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME))
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
- }
-
- /* Disable Last DMA */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
-
- /* Disable DMA Request */
- CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
- hi2c->XferCount = 0U;
-
- /* Check if Errors has been detected during transfer */
- if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
- {
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ErrorCallback(hi2c);
-#else
- HAL_I2C_ErrorCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->State = HAL_I2C_STATE_READY;
-
- if (hi2c->Mode == HAL_I2C_MODE_MEM)
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_NONE;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MemRxCpltCallback(hi2c);
-#else
- HAL_I2C_MemRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->MasterRxCpltCallback(hi2c);
-#else
- HAL_I2C_MasterRxCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- }
- }
- else
- {
- /* Do nothing */
- }
-}
-
-/**
- * @brief DMA I2C communication error callback.
- * @param hdma DMA handle
- * @retval None
- */
-static void I2C_DMAError(DMA_HandleTypeDef *hdma)
-{
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
-
- /* Clear Complete callback */
- if (hi2c->hdmatx != NULL)
- {
- hi2c->hdmatx->XferCpltCallback = NULL;
- }
- if (hi2c->hdmarx != NULL)
- {
- hi2c->hdmarx->XferCpltCallback = NULL;
- }
-
- /* Ignore DMA FIFO error */
- if (HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
- {
- /* Disable Acknowledge */
- hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
-
- hi2c->XferCount = 0U;
-
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
-
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
-
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ErrorCallback(hi2c);
-#else
- HAL_I2C_ErrorCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @brief DMA I2C communication abort callback
- * (To be called at end of DMA Abort procedure).
- * @param hdma DMA handle.
- * @retval None
- */
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
-{
- __IO uint32_t count = 0U;
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */
-
- /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
- HAL_I2C_StateTypeDef CurrentState = hi2c->State;
-
- /* During abort treatment, check that there is no pending STOP request */
- /* Wait until STOP flag is reset */
- count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- if (count == 0U)
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
- break;
- }
- count--;
- }
- while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
-
- /* Clear Complete callback */
- if (hi2c->hdmatx != NULL)
- {
- hi2c->hdmatx->XferCpltCallback = NULL;
- }
- if (hi2c->hdmarx != NULL)
- {
- hi2c->hdmarx->XferCpltCallback = NULL;
- }
-
- /* Disable Acknowledge */
- CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- hi2c->XferCount = 0U;
-
- /* Reset XferAbortCallback */
- if (hi2c->hdmatx != NULL)
- {
- hi2c->hdmatx->XferAbortCallback = NULL;
- }
- if (hi2c->hdmarx != NULL)
- {
- hi2c->hdmarx->XferAbortCallback = NULL;
- }
-
- /* Disable I2C peripheral to prevent dummy data in buffer */
- __HAL_I2C_DISABLE(hi2c);
-
- /* Check if come from abort from user */
- if (hi2c->State == HAL_I2C_STATE_ABORT)
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->AbortCpltCallback(hi2c);
-#else
- HAL_I2C_AbortCpltCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
- else
- {
- if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
- {
- /* Renable I2C peripheral */
- __HAL_I2C_ENABLE(hi2c);
-
- /* Enable Acknowledge */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
- /* keep HAL_I2C_STATE_LISTEN */
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_LISTEN;
- }
- else
- {
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- }
-
- /* Call the corresponding callback to inform upper layer of End of Transfer */
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
- hi2c->ErrorCallback(hi2c);
-#else
- HAL_I2C_ErrorCallback(hi2c);
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @brief This function handles I2C Communication Timeout.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param Flag specifies the I2C flag to check.
- * @param Status The new Flag status (SET or RESET).
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
-{
- /* Wait until flag is set */
- while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
- {
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for Master addressing phase.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for I2C module
- * @param Flag specifies the I2C flag to check.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
-{
- while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
- {
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- {
- /* Generate Stop */
- SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
-
- /* Clear AF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
- {
- /* Check if a NACK is detected */
- if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
- {
- /* Check if a NACK is detected */
- if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- {
- /* Check if a NACK is detected */
- if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
- {
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of STOP request through Interrupt.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c)
-{
- __IO uint32_t count = 0U;
-
- /* Wait until STOP flag is reset */
- count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U);
- do
- {
- count--;
- if (count == 0U)
- {
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- return HAL_ERROR;
- }
- }
- while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP);
-
- return HAL_OK;
-}
-
-/**
- * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @param Timeout Timeout duration
- * @param Tickstart Tick start value
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
- {
- /* Check if a STOPF is detected */
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
- {
- /* Clear STOP Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
-
- /* Check for the Timeout */
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- {
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief This function handles Acknowledge failed detection during an I2C Communication.
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2C.
- * @retval HAL status
- */
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
-{
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
- {
- /* Clear NACKF Flag */
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
- hi2c->PreviousState = I2C_STATE_NONE;
- hi2c->State = HAL_I2C_STATE_READY;
- hi2c->Mode = HAL_I2C_MODE_NONE;
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hi2c);
-
- return HAL_ERROR;
- }
- return HAL_OK;
-}
-
-/**
- * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions.
- * @param hi2c I2C handle.
- * @retval None
- */
-static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
-{
- /* if user set XferOptions to I2C_OTHER_FRAME */
- /* it request implicitly to generate a restart condition */
- /* set XferOptions to I2C_FIRST_FRAME */
- if (hi2c->XferOptions == I2C_OTHER_FRAME)
- {
- hi2c->XferOptions = I2C_FIRST_FRAME;
- }
- /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */
- /* it request implicitly to generate a restart condition */
- /* then generate a stop condition at the end of transfer */
- /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */
- else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME)
- {
- hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME;
- }
- else
- {
- /* Nothing to do */
- }
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c
deleted file mode 100644
index 351f4fda7ab673f462c22cd5a4364a3f5290bd00..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_i2c_ex.c
- * @author MCD Application Team
- * @brief I2C Extension HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of I2C extension peripheral:
- * + Extension features functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### I2C peripheral extension features #####
- ==============================================================================
-
- [..] Comparing to other previous devices, the I2C interface for STM32F427xx/437xx/
- 429xx/439xx devices contains the following additional features :
-
- (+) Possibility to disable or enable Analog Noise Filter
- (+) Use of a configured Digital Noise Filter
-
- ##### How to use this driver #####
- ==============================================================================
- [..] This driver provides functions to configure Noise Filter
- (#) Configure I2C Analog noise filter using the function HAL_I2C_AnalogFilter_Config()
- (#) Configure I2C Digital noise filter using the function HAL_I2C_DigitalFilter_Config()
-
- @endverbatim
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup I2CEx I2CEx
- * @brief I2C HAL module driver
- * @{
- */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-#if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup I2CEx_Exported_Functions I2C Exported Functions
- * @{
- */
-
-
-/** @defgroup I2CEx_Exported_Functions_Group1 Extension features functions
- * @brief Extension features functions
- *
-@verbatim
- ===============================================================================
- ##### Extension features functions #####
- ===============================================================================
- [..] This section provides functions allowing to:
- (+) Configure Noise Filters
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Configures I2C Analog noise filter.
- * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2Cx peripheral.
- * @param AnalogFilter new state of the Analog filter.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
-{
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
- assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the selected I2C peripheral */
- __HAL_I2C_DISABLE(hi2c);
-
- /* Reset I2Cx ANOFF bit */
- hi2c->Instance->FLTR &= ~(I2C_FLTR_ANOFF);
-
- /* Disable the analog filter */
- hi2c->Instance->FLTR |= AnalogFilter;
-
- __HAL_I2C_ENABLE(hi2c);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Configures I2C Digital noise filter.
- * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
- * the configuration information for the specified I2Cx peripheral.
- * @param DigitalFilter Coefficient of digital noise filter between 0x00 and 0x0F.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
-{
- uint16_t tmpreg = 0;
-
- /* Check the parameters */
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
- assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
-
- if (hi2c->State == HAL_I2C_STATE_READY)
- {
- hi2c->State = HAL_I2C_STATE_BUSY;
-
- /* Disable the selected I2C peripheral */
- __HAL_I2C_DISABLE(hi2c);
-
- /* Get the old register value */
- tmpreg = hi2c->Instance->FLTR;
-
- /* Reset I2Cx DNF bit [3:0] */
- tmpreg &= ~(I2C_FLTR_DNF);
-
- /* Set I2Cx DNF coefficient */
- tmpreg |= DigitalFilter;
-
- /* Store the new register value */
- hi2c->Instance->FLTR = tmpreg;
-
- __HAL_I2C_ENABLE(hi2c);
-
- hi2c->State = HAL_I2C_STATE_READY;
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-#endif
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c
deleted file mode 100644
index bf60fc00483c16cc36029d7e5ec299248b853cee..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c
+++ /dev/null
@@ -1,571 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_pwr.c
- * @author MCD Application Team
- * @brief PWR HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Power Controller (PWR) peripheral:
- * + Initialization and de-initialization functions
- * + Peripheral Control functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup PWR PWR
- * @brief PWR HAL module driver
- * @{
- */
-
-#ifdef HAL_PWR_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup PWR_Private_Constants
- * @{
- */
-
-/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
- * @{
- */
-#define PVD_MODE_IT 0x00010000U
-#define PVD_MODE_EVT 0x00020000U
-#define PVD_RISING_EDGE 0x00000001U
-#define PVD_FALLING_EDGE 0x00000002U
-/**
- * @}
- */
-
-/**
- * @}
- */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup PWR_Exported_Functions PWR Exported Functions
- * @{
- */
-
-/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and de-initialization functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..]
- After reset, the backup domain (RTC registers, RTC backup data
- registers and backup SRAM) is protected against possible unwanted
- write accesses.
- To enable access to the RTC Domain and RTC registers, proceed as follows:
- (+) Enable the Power Controller (PWR) APB1 interface clock using the
- __HAL_RCC_PWR_CLK_ENABLE() macro.
- (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
- * @retval None
- */
-void HAL_PWR_DeInit(void)
-{
- __HAL_RCC_PWR_FORCE_RESET();
- __HAL_RCC_PWR_RELEASE_RESET();
-}
-
-/**
- * @brief Enables access to the backup domain (RTC registers, RTC
- * backup data registers and backup SRAM).
- * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
- * Backup Domain Access should be kept enabled.
- * @note The following sequence is required to bypass the delay between
- * DBP bit programming and the effective enabling of the backup domain.
- * Please check the Errata Sheet for more details under "Possible delay
- * in backup domain protection disabling/enabling after programming the
- * DBP bit" section.
- * @retval None
- */
-void HAL_PWR_EnableBkUpAccess(void)
-{
- __IO uint32_t dummyread;
- *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
- dummyread = PWR->CR;
- UNUSED(dummyread);
-}
-
-/**
- * @brief Disables access to the backup domain (RTC registers, RTC
- * backup data registers and backup SRAM).
- * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
- * Backup Domain Access should be kept enabled.
- * @note The following sequence is required to bypass the delay between
- * DBP bit programming and the effective disabling of the backup domain.
- * Please check the Errata Sheet for more details under "Possible delay
- * in backup domain protection disabling/enabling after programming the
- * DBP bit" section.
- * @retval None
- */
-void HAL_PWR_DisableBkUpAccess(void)
-{
- __IO uint32_t dummyread;
- *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
- dummyread = PWR->CR;
- UNUSED(dummyread);
-}
-
-/**
- * @}
- */
-
-/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
- * @brief Low Power modes configuration functions
- *
-@verbatim
-
- ===============================================================================
- ##### Peripheral Control functions #####
- ===============================================================================
-
- *** PVD configuration ***
- =========================
- [..]
- (+) The PVD is used to monitor the VDD power supply by comparing it to a
- threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
- (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
- than the PVD threshold. This event is internally connected to the EXTI
- line16 and can generate an interrupt if enabled. This is done through
- __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
- (+) The PVD is stopped in Standby mode.
-
- *** Wake-up pin configuration ***
- ================================
- [..]
- (+) Wake-up pin is used to wake up the system from Standby mode. This pin is
- forced in input pull-down configuration and is active on rising edges.
- (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00.
- (++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13
- (++) For STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx there are three Wake-Up pins: Pin1 on PA.00, Pin2 on PC.00 and Pin3 on PC.01
-
- *** Low Power modes configuration ***
- =====================================
- [..]
- The devices feature 3 low-power modes:
- (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
- (+) Stop mode: all clocks are stopped, regulator running, regulator
- in low power mode
- (+) Standby mode: 1.2V domain powered off.
-
- *** Sleep mode ***
- ==================
- [..]
- (+) Entry:
- The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
- functions with
- (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
- (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-
- -@@- The Regulator parameter is not used for the STM32F4 family
- and is kept as parameter just to maintain compatibility with the
- lower power families (STM32L).
- (+) Exit:
- Any peripheral interrupt acknowledged by the nested vectored interrupt
- controller (NVIC) can wake up the device from Sleep mode.
-
- *** Stop mode ***
- =================
- [..]
- In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
- and the HSE RC oscillators are disabled. Internal SRAM and register contents
- are preserved.
- The voltage regulator can be configured either in normal or low-power mode.
- To minimize the consumption In Stop mode, FLASH can be powered off before
- entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
- It can be switched on again by software after exiting the Stop mode using
- the HAL_PWREx_DisableFlashPowerDown() function.
-
- (+) Entry:
- The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
- function with:
- (++) Main regulator ON.
- (++) Low Power regulator ON.
- (+) Exit:
- Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
-
- *** Standby mode ***
- ====================
- [..]
- (+)
- The Standby mode allows to achieve the lowest power consumption. It is based
- on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
- The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
- the HSE oscillator are also switched off. SRAM and register contents are lost
- except for the RTC registers, RTC backup registers, backup SRAM and Standby
- circuitry.
-
- The voltage regulator is OFF.
-
- (++) Entry:
- (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
- (++) Exit:
- (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up,
- tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
-
- *** Auto-wake-up (AWU) from low-power mode ***
- =============================================
- [..]
-
- (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
- Wake-up event, a tamper event or a time-stamp event, without depending on
- an external interrupt (Auto-wake-up mode).
-
- (+) RTC auto-wake-up (AWU) from the Stop and Standby modes
-
- (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
- configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
-
- (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
- is necessary to configure the RTC to detect the tamper or time stamp event using the
- HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
-
- (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to
- configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
- * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
- * information for the PVD.
- * @note Refer to the electrical characteristics of your device datasheet for
- * more details about the voltage threshold corresponding to each
- * detection level.
- * @retval None
- */
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
-{
- /* Check the parameters */
- assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
- assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
-
- /* Set PLS[7:5] bits according to PVDLevel value */
- MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
-
- /* Clear any previous config. Keep it clear if no event or IT mode is selected */
- __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
- __HAL_PWR_PVD_EXTI_DISABLE_IT();
- __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
- __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
-
- /* Configure interrupt mode */
- if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
- {
- __HAL_PWR_PVD_EXTI_ENABLE_IT();
- }
-
- /* Configure event mode */
- if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
- {
- __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
- }
-
- /* Configure the edge */
- if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
- {
- __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
- }
-
- if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
- {
- __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
- }
-}
-
-/**
- * @brief Enables the Power Voltage Detector(PVD).
- * @retval None
- */
-void HAL_PWR_EnablePVD(void)
-{
- *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables the Power Voltage Detector(PVD).
- * @retval None
- */
-void HAL_PWR_DisablePVD(void)
-{
- *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
-}
-
-/**
- * @brief Enables the Wake-up PINx functionality.
- * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
- * This parameter can be one of the following values:
- * @arg PWR_WAKEUP_PIN1
- * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices
- * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices
- * @retval None
- */
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
-{
- /* Check the parameter */
- assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-
- /* Enable the wake up pin */
- SET_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
- * @brief Disables the Wake-up PINx functionality.
- * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
- * This parameter can be one of the following values:
- * @arg PWR_WAKEUP_PIN1
- * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices
- * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices
- * @retval None
- */
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
-{
- /* Check the parameter */
- assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-
- /* Disable the wake up pin */
- CLEAR_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
- * @brief Enters Sleep mode.
- *
- * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
- *
- * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
- * systick interrupt when used as time base for Timeout
- *
- * @param Regulator Specifies the regulator state in SLEEP mode.
- * This parameter can be one of the following values:
- * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
- * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
- * @note This parameter is not used for the STM32F4 family and is kept as parameter
- * just to maintain compatibility with the lower power families.
- * @param SLEEPEntry Specifies if SLEEP mode in entered with WFI or WFE instruction.
- * This parameter can be one of the following values:
- * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
- * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
- * @retval None
- */
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
-{
- /* Check the parameters */
- assert_param(IS_PWR_REGULATOR(Regulator));
- assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
-
- /* Clear SLEEPDEEP bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-
- /* Select SLEEP mode entry -------------------------------------------------*/
- if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
- {
- /* Request Wait For Interrupt */
- __WFI();
- }
- else
- {
- /* Request Wait For Event */
- __SEV();
- __WFE();
- __WFE();
- }
-}
-
-/**
- * @brief Enters Stop mode.
- * @note In Stop mode, all I/O pins keep the same state as in Run mode.
- * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
- * the HSI RC oscillator is selected as system clock.
- * @note When the voltage regulator operates in low power mode, an additional
- * startup delay is incurred when waking up from Stop mode.
- * By keeping the internal regulator ON during Stop mode, the consumption
- * is higher although the startup time is reduced.
- * @param Regulator Specifies the regulator state in Stop mode.
- * This parameter can be one of the following values:
- * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
- * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
- * @param STOPEntry Specifies if Stop mode in entered with WFI or WFE instruction.
- * This parameter can be one of the following values:
- * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
- * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
- * @retval None
- */
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
-{
- /* Check the parameters */
- assert_param(IS_PWR_REGULATOR(Regulator));
- assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
-
- /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */
- MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator);
-
- /* Set SLEEPDEEP bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-
- /* Select Stop mode entry --------------------------------------------------*/
- if(STOPEntry == PWR_STOPENTRY_WFI)
- {
- /* Request Wait For Interrupt */
- __WFI();
- }
- else
- {
- /* Request Wait For Event */
- __SEV();
- __WFE();
- __WFE();
- }
- /* Reset SLEEPDEEP bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-}
-
-/**
- * @brief Enters Standby mode.
- * @note In Standby mode, all I/O pins are high impedance except for:
- * - Reset pad (still available)
- * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
- * Alarm out, or RTC clock calibration out.
- * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
- * - WKUP pin 1 (PA0) if enabled.
- * @retval None
- */
-void HAL_PWR_EnterSTANDBYMode(void)
-{
- /* Select Standby mode */
- SET_BIT(PWR->CR, PWR_CR_PDDS);
-
- /* Set SLEEPDEEP bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
-
- /* This option is used to ensure that store operations are completed */
-#if defined ( __CC_ARM)
- __force_stores();
-#endif
- /* Request Wait For Interrupt */
- __WFI();
-}
-
-/**
- * @brief This function handles the PWR PVD interrupt request.
- * @note This API should be called under the PVD_IRQHandler().
- * @retval None
- */
-void HAL_PWR_PVD_IRQHandler(void)
-{
- /* Check PWR Exti flag */
- if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
- {
- /* PWR PVD interrupt user callback */
- HAL_PWR_PVDCallback();
-
- /* Clear PWR Exti pending bit */
- __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
- }
-}
-
-/**
- * @brief PWR PVD interrupt callback
- * @retval None
- */
-__weak void HAL_PWR_PVDCallback(void)
-{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_PWR_PVDCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
- * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
- * re-enters SLEEP mode when an interruption handling is over.
- * Setting this bit is useful when the processor is expected to run only on
- * interruptions handling.
- * @retval None
- */
-void HAL_PWR_EnableSleepOnExit(void)
-{
- /* Set SLEEPONEXIT bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
- * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
- * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
- * re-enters SLEEP mode when an interruption handling is over.
- * @retval None
- */
-void HAL_PWR_DisableSleepOnExit(void)
-{
- /* Clear SLEEPONEXIT bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-/**
- * @brief Enables CORTEX M4 SEVONPEND bit.
- * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
- * WFE to wake up when an interrupt moves from inactive to pended.
- * @retval None
- */
-void HAL_PWR_EnableSEVOnPend(void)
-{
- /* Set SEVONPEND bit of Cortex System Control Register */
- SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
- * @brief Disables CORTEX M4 SEVONPEND bit.
- * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
- * WFE to wake up when an interrupt moves from inactive to pended.
- * @retval None
- */
-void HAL_PWR_DisableSEVOnPend(void)
-{
- /* Clear SEVONPEND bit of Cortex System Control Register */
- CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* HAL_PWR_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c
deleted file mode 100644
index 1acca556b7d48ed6b94f984b0e572a9401bb056c..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c
+++ /dev/null
@@ -1,600 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_pwr_ex.c
- * @author MCD Application Team
- * @brief Extended PWR HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of PWR extension peripheral:
- * + Peripheral Extended features functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup PWREx PWREx
- * @brief PWR HAL module driver
- * @{
- */
-
-#ifdef HAL_PWR_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup PWREx_Private_Constants
- * @{
- */
-#define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
-#define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
-#define PWR_BKPREG_TIMEOUT_VALUE 1000U
-#define PWR_VOSRDY_TIMEOUT_VALUE 1000U
-/**
- * @}
- */
-
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup PWREx_Exported_Functions PWREx Exported Functions
- * @{
- */
-
-/** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
- * @brief Peripheral Extended features functions
- *
-@verbatim
-
- ===============================================================================
- ##### Peripheral extended features functions #####
- ===============================================================================
-
- *** Main and Backup Regulators configuration ***
- ================================================
- [..]
- (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
- the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
- retained even in Standby or VBAT mode when the low power backup regulator
- is enabled. It can be considered as an internal EEPROM when VBAT is
- always present. You can use the HAL_PWREx_EnableBkUpReg() function to
- enable the low power backup regulator.
-
- (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
- the backup SRAM is powered from VDD which replaces the VBAT power supply to
- save battery life.
-
- (+) The backup SRAM is not mass erased by a tamper event. It is read
- protected to prevent confidential data, such as cryptographic private
- key, from being accessed. The backup SRAM can be erased only through
- the Flash interface when a protection level change from level 1 to
- level 0 is requested.
- -@- Refer to the description of Read protection (RDP) in the Flash
- programming manual.
-
- (+) The main internal regulator can be configured to have a tradeoff between
- performance and power consumption when the device does not operate at
- the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
- macro which configure VOS bit in PWR_CR register
-
- Refer to the product datasheets for more details.
-
- *** FLASH Power Down configuration ****
- =======================================
- [..]
- (+) By setting the FPDS bit in the PWR_CR register by using the
- HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
- down mode when the device enters Stop mode. When the Flash memory
- is in power down mode, an additional startup delay is incurred when
- waking up from Stop mode.
-
- (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when the PLL
- is OFF and the HSI or HSE clock source is selected as system clock.
- The new value programmed is active only when the PLL is ON.
- When the PLL is OFF, the voltage scale 3 is automatically selected.
- Refer to the datasheets for more details.
-
- *** Over-Drive and Under-Drive configuration ****
- =================================================
- [..]
- (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
- 2 operating modes available:
- (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
- voltage scaling (scale 1, scale 2 or scale 3)
- (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
- higher frequency than the normal mode for a given voltage scaling (scale 1,
- scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
- disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow
- the sequence described in Reference manual.
-
- (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low power regulator
- supplies a low power voltage to the 1.2V domain, thus preserving the content of registers
- and internal SRAM. 2 operating modes are available:
- (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
- available when the main regulator or the low power regulator is used in Scale 3 or
- low voltage mode.
- (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
- available when the main regulator or the low power regulator is in low voltage mode.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Enables the Backup Regulator.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
-{
- uint32_t tickstart = 0U;
-
- *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till Backup regulator ready flag is set */
- while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Disables the Backup Regulator.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
-{
- uint32_t tickstart = 0U;
-
- *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till Backup regulator ready flag is set */
- while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Enables the Flash Power Down in Stop mode.
- * @retval None
- */
-void HAL_PWREx_EnableFlashPowerDown(void)
-{
- *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables the Flash Power Down in Stop mode.
- * @retval None
- */
-void HAL_PWREx_DisableFlashPowerDown(void)
-{
- *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
-}
-
-/**
- * @brief Return Voltage Scaling Range.
- * @retval The configured scale for the regulator voltage(VOS bit field).
- * The returned value can be one of the following:
- * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
- * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
- * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
- */
-uint32_t HAL_PWREx_GetVoltageRange(void)
-{
- return (PWR->CR & PWR_CR_VOS);
-}
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
-/**
- * @brief Configures the main internal regulator output voltage.
- * @param VoltageScaling specifies the regulator output voltage to achieve
- * a tradeoff between performance and power consumption.
- * This parameter can be one of the following values:
- * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
- * the maximum value of fHCLK = 168 MHz.
- * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
- * the maximum value of fHCLK = 144 MHz.
- * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
- * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
- * When moving from Range 2 to Range 1, the system frequency can be increased to
- * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
-{
- uint32_t tickstart = 0U;
-
- assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
-
- /* Enable PWR RCC Clock Peripheral */
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Set Range */
- __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
- while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
- {
- if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-#elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
- defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || \
- defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
- defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Configures the main internal regulator output voltage.
- * @param VoltageScaling specifies the regulator output voltage to achieve
- * a tradeoff between performance and power consumption.
- * This parameter can be one of the following values:
- * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
- * the maximum value of fHCLK is 168 MHz. It can be extended to
- * 180 MHz by activating the over-drive mode.
- * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
- * the maximum value of fHCLK is 144 MHz. It can be extended to,
- * 168 MHz by activating the over-drive mode.
- * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode,
- * the maximum value of fHCLK is 120 MHz.
- * @note To update the system clock frequency(SYSCLK):
- * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
- * - Call the HAL_RCC_OscConfig() to configure the PLL.
- * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
- * - Set the new system clock frequency using the HAL_RCC_ClockConfig().
- * @note The scale can be modified only when the HSI or HSE clock source is selected
- * as system clock source, otherwise the API returns HAL_ERROR.
- * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
- * value in the PWR_CR1 register are not taken in account.
- * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.
- * @note The new voltage scale is active only when the PLL is ON.
- * @retval HAL Status
- */
-HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
-{
- uint32_t tickstart = 0U;
-
- assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
-
- /* Enable PWR RCC Clock Peripheral */
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Check if the PLL is used as system clock or not */
- if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
- {
- /* Disable the main PLL */
- __HAL_RCC_PLL_DISABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
- /* Wait till PLL is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Set Range */
- __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
-
- /* Enable the main PLL */
- __HAL_RCC_PLL_ENABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
- while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
- {
- if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- return HAL_OK;
-}
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
- defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Enables Main Regulator low voltage mode.
- * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
- * STM32F413xx/STM32F423xx devices.
- * @retval None
- */
-void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
-{
- *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables Main Regulator low voltage mode.
- * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
- * STM32F413xx/STM32F423xxdevices.
- * @retval None
- */
-void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
-{
- *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE;
-}
-
-/**
- * @brief Enables Low Power Regulator low voltage mode.
- * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
- * STM32F413xx/STM32F423xx devices.
- * @retval None
- */
-void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
-{
- *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables Low Power Regulator low voltage mode.
- * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx/
- * STM32F413xx/STM32F423xx devices.
- * @retval None
- */
-void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
-{
- *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE;
-}
-
-#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx ||
- STM32F413xx || STM32F423xx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Activates the Over-Drive mode.
- * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
- * This mode allows the CPU and the core logic to operate at a higher frequency
- * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
- * @note It is recommended to enter or exit Over-drive mode when the application is not running
- * critical tasks and when the system clock source is either HSI or HSE.
- * During the Over-drive switch activation, no peripheral clocks should be enabled.
- * The peripheral clocks must be enabled once the Over-drive mode is activated.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
-{
- uint32_t tickstart = 0U;
-
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable the Over-drive to extend the clock frequency to 180 Mhz */
- __HAL_PWR_OVERDRIVE_ENABLE();
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
- {
- if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Enable the Over-drive switch */
- __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
- {
- if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Deactivates the Over-Drive mode.
- * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devices.
- * This mode allows the CPU and the core logic to operate at a higher frequency
- * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
- * @note It is recommended to enter or exit Over-drive mode when the application is not running
- * critical tasks and when the system clock source is either HSI or HSE.
- * During the Over-drive switch activation, no peripheral clocks should be enabled.
- * The peripheral clocks must be enabled once the Over-drive mode is activated.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
-{
- uint32_t tickstart = 0U;
-
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Disable the Over-drive switch */
- __HAL_PWR_OVERDRIVESWITCHING_DISABLE();
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
- {
- if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Disable the Over-drive */
- __HAL_PWR_OVERDRIVE_DISABLE();
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
- {
- if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Enters in Under-Drive STOP mode.
- *
- * @note This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx devices.
- *
- * @note This mode can be selected only when the Under-Drive is already active
- *
- * @note This mode is enabled only with STOP low power mode.
- * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
- * mode is only available when the main regulator or the low power regulator
- * is in low voltage mode
- *
- * @note If the Under-drive mode was enabled, it is automatically disabled after
- * exiting Stop mode.
- * When the voltage regulator operates in Under-drive mode, an additional
- * startup delay is induced when waking up from Stop mode.
- *
- * @note In Stop mode, all I/O pins keep the same state as in Run mode.
- *
- * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
- * the HSI RC oscillator is selected as system clock.
- *
- * @note When the voltage regulator operates in low power mode, an additional
- * startup delay is incurred when waking up from Stop mode.
- * By keeping the internal regulator ON during Stop mode, the consumption
- * is higher although the startup time is reduced.
- *
- * @param Regulator specifies the regulator state in STOP mode.
- * This parameter can be one of the following values:
- * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
- * and Flash memory in power-down when the device is in Stop under-drive mode
- * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
- * and Flash memory in power-down when the device is in Stop under-drive mode
- * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
- * This parameter can be one of the following values:
- * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
- * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
- * @retval None
- */
-HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
-{
- uint32_t tmpreg1 = 0U;
-
- /* Check the parameters */
- assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
- assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
-
- /* Enable Power ctrl clock */
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Enable the Under-drive Mode ---------------------------------------------*/
- /* Clear Under-drive flag */
- __HAL_PWR_CLEAR_ODRUDR_FLAG();
-
- /* Enable the Under-drive */
- __HAL_PWR_UNDERDRIVE_ENABLE();
-
- /* Select the regulator state in STOP mode ---------------------------------*/
- tmpreg1 = PWR->CR;
- /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
- tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS);
-
- /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
- tmpreg1 |= Regulator;
-
- /* Store the new value */
- PWR->CR = tmpreg1;
-
- /* Set SLEEPDEEP bit of Cortex System Control Register */
- SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
-
- /* Select STOP mode entry --------------------------------------------------*/
- if(STOPEntry == PWR_SLEEPENTRY_WFI)
- {
- /* Request Wait For Interrupt */
- __WFI();
- }
- else
- {
- /* Request Wait For Event */
- __WFE();
- }
- /* Reset SLEEPDEEP bit of Cortex System Control Register */
- SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
-
- return HAL_OK;
-}
-
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* HAL_PWR_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
deleted file mode 100644
index 79364b62f74fd4bf41334d8df7025bf9483b4ecb..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
+++ /dev/null
@@ -1,1122 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_rcc.c
- * @author MCD Application Team
- * @brief RCC HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Reset and Clock Control (RCC) peripheral:
- * + Initialization and de-initialization functions
- * + Peripheral Control functions
- *
- @verbatim
- ==============================================================================
- ##### RCC specific features #####
- ==============================================================================
- [..]
- After reset the device is running from Internal High Speed oscillator
- (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
- and I-Cache are disabled, and all peripherals are off except internal
- SRAM, Flash and JTAG.
- (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
- all peripherals mapped on these busses are running at HSI speed.
- (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
- (+) All GPIOs are in input floating state, except the JTAG pins which
- are assigned to be used for debug purpose.
-
- [..]
- Once the device started from reset, the user application has to:
- (+) Configure the clock source to be used to drive the System clock
- (if the application needs higher frequency/performance)
- (+) Configure the System clock frequency and Flash settings
- (+) Configure the AHB and APB busses prescalers
- (+) Enable the clock for the peripheral(s) to be used
- (+) Configure the clock source(s) for peripherals which clocks are not
- derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
-
- ##### RCC Limitations #####
- ==============================================================================
- [..]
- A delay between an RCC peripheral clock enable and the effective peripheral
- enabling should be taken into account in order to manage the peripheral read/write
- from/to registers.
- (+) This delay depends on the peripheral mapping.
- (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
- after the clock enable bit is set on the hardware register
- (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
- after the clock enable bit is set on the hardware register
-
- [..]
- Implemented Workaround:
- (+) For AHB & APB peripherals, a dummy read to the peripheral register has been
- inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
-
- @endverbatim
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup RCC RCC
- * @brief RCC HAL module driver
- * @{
- */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup RCC_Private_Constants
- * @{
- */
-
-/* Private macro -------------------------------------------------------------*/
-#define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
-#define MCO1_GPIO_PORT GPIOA
-#define MCO1_PIN GPIO_PIN_8
-
-#define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
-#define MCO2_GPIO_PORT GPIOC
-#define MCO2_PIN GPIO_PIN_9
-/**
- * @}
- */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup RCC_Private_Variables RCC Private Variables
- * @{
- */
-/**
- * @}
- */
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup RCC_Exported_Functions RCC Exported Functions
- * @{
- */
-
-/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and de-initialization functions #####
- ===============================================================================
- [..]
- This section provides functions allowing to configure the internal/external oscillators
- (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
- and APB2).
-
- [..] Internal/external clock and PLL configuration
- (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
- the PLL as System clock source.
-
- (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
- clock source.
-
- (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
- through the PLL as System clock source. Can be used also as RTC clock source.
-
- (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
-
- (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
- (++) The first output is used to generate the high speed system clock (up to 168 MHz)
- (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
- the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
-
- (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
- and if a HSE clock failure occurs(HSE used directly or through PLL as System
- clock source), the System clocks automatically switched to HSI and an interrupt
- is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
- (Non-Maskable Interrupt) exception vector.
-
- (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
- clock (through a configurable prescaler) on PA8 pin.
-
- (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
- clock (through a configurable prescaler) on PC9 pin.
-
- [..] System, AHB and APB busses clocks configuration
- (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
- HSE and PLL.
- The AHB clock (HCLK) is derived from System clock through configurable
- prescaler and used to clock the CPU, memory and peripherals mapped
- on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
- from AHB clock through configurable prescalers and used to clock
- the peripherals mapped on these busses. You can use
- "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
-
- (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
- frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
- Depending on the device voltage range, the maximum frequency should
- be adapted accordingly (refer to the product datasheets for more details).
-
- (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices,
- the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz.
- Depending on the device voltage range, the maximum frequency should
- be adapted accordingly (refer to the product datasheets for more details).
-
- (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
- PCLK2 84 MHz and PCLK1 42 MHz.
- Depending on the device voltage range, the maximum frequency should
- be adapted accordingly (refer to the product datasheets for more details).
-
- (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz,
- PCLK2 100 MHz and PCLK1 50 MHz.
- Depending on the device voltage range, the maximum frequency should
- be adapted accordingly (refer to the product datasheets for more details).
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Resets the RCC clock configuration to the default reset state.
- * @note The default reset state of the clock configuration is given below:
- * - HSI ON and used as system clock source
- * - HSE and PLL OFF
- * - AHB, APB1 and APB2 prescaler set to 1.
- * - CSS, MCO1 and MCO2 OFF
- * - All interrupts disabled
- * @note This function doesn't modify the configuration of the
- * - Peripheral clocks
- * - LSI, LSE and RTC clocks
- * @retval HAL status
- */
-__weak HAL_StatusTypeDef HAL_RCC_DeInit(void)
-{
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the RCC Oscillators according to the specified parameters in the
- * RCC_OscInitTypeDef.
- * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
- * contains the configuration information for the RCC Oscillators.
- * @note The PLL is not disabled when used as system clock.
- * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
- * supported by this API. User should request a transition to LSE Off
- * first and then LSE On or LSE Bypass.
- * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
- * supported by this API. User should request a transition to HSE Off
- * first and then HSE On or HSE Bypass.
- * @retval HAL status
- */
-__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- uint32_t tickstart, pll_config;
-
- /* Check Null pointer */
- if(RCC_OscInitStruct == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
- /*------------------------------- HSE Configuration ------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
- /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
- {
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- {
- return HAL_ERROR;
- }
- }
- else
- {
- /* Set the new HSE configuration ---------------------------------------*/
- __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
-
- /* Check the HSE State */
- if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
- {
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till HSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till HSE is bypassed or disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- }
- /*----------------------------- HSI Configuration --------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
- assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-
- /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
- {
- /* When HSI is used as system clock it will not disabled */
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- {
- return HAL_ERROR;
- }
- /* Otherwise, just the calibration is allowed */
- else
- {
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- }
- }
- else
- {
- /* Check the HSI State */
- if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
- {
- /* Enable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_ENABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- }
- else
- {
- /* Disable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_DISABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- }
- /*------------------------------ LSI Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
- /* Check the LSI State */
- if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
- {
- /* Enable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_ENABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_DISABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- /*------------------------------ LSE Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- {
- FlagStatus pwrclkchanged = RESET;
-
- /* Check the parameters */
- assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
- /* Update LSE configuration in Backup Domain control register */
- /* Requires to enable write access to Backup Domain of necessary */
- if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- {
- __HAL_RCC_PWR_CLK_ENABLE();
- pwrclkchanged = SET;
- }
-
- if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- {
- /* Enable write access to Backup domain */
- SET_BIT(PWR->CR, PWR_CR_DBP);
-
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
-
- while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- {
- if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Set the new LSE configuration -----------------------------------------*/
- __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- /* Check the LSE State */
- if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Restore clock configuration if changed */
- if(pwrclkchanged == SET)
- {
- __HAL_RCC_PWR_CLK_DISABLE();
- }
- }
- /*-------------------------------- PLL Configuration -----------------------*/
- /* Check the parameters */
- assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
- if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- {
- /* Check if the PLL is used as system clock or not */
- if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
- {
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- {
- /* Check the parameters */
- assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
- assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
- assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
- assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
- assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
-
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Configure the main PLL clock source, multiplication and division factors. */
- WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
- RCC_OscInitStruct->PLL.PLLM | \
- (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
- (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
- (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- else
- {
- /* Check if there is a request to disable the PLL used as System clock source */
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
- {
- return HAL_ERROR;
- }
- else
- {
- /* Do not return HAL_ERROR if request repeats the current configuration */
- pll_config = RCC->PLLCFGR;
-#if defined (RCC_PLLCFGR_PLLR)
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
-#else
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
-#endif
- {
- return HAL_ERROR;
- }
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
- * parameters in the RCC_ClkInitStruct.
- * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
- * contains the configuration information for the RCC peripheral.
- * @param FLatency FLASH Latency, this parameter depend on device selected
- *
- * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
- * and updated by HAL_RCC_GetHCLKFreq() function called within this function
- *
- * @note The HSI is used (enabled by hardware) as system clock source after
- * startup from Reset, wake-up from STOP and STANDBY mode, or in case
- * of failure of the HSE used directly or indirectly as system clock
- * (if the Clock Security System CSS is enabled).
- *
- * @note A switch from one clock source to another occurs only if the target
- * clock source is ready (clock stable after startup delay or PLL locked).
- * If a clock source which is not yet ready is selected, the switch will
- * occur when the clock source will be ready.
- *
- * @note Depending on the device voltage range, the software has to set correctly
- * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
- * (for more details refer to section above "Initialization/de-initialization functions")
- * @retval None
- */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
-{
- uint32_t tickstart;
-
- /* Check Null pointer */
- if(RCC_ClkInitStruct == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
- assert_param(IS_FLASH_LATENCY(FLatency));
-
- /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
- must be correctly programmed according to the frequency of the CPU clock
- (HCLK) and the supply voltage of the device. */
-
- /* Increasing the number of wait states because of higher CPU frequency */
- if(FLatency > __HAL_FLASH_GET_LATENCY())
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- {
- return HAL_ERROR;
- }
- }
-
- /*-------------------------- HCLK Configuration --------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- {
- /* Set the highest APBx dividers in order to ensure that we do not go through
- a non-spec phase whatever we decrease or increase HCLK. */
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- }
-
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- {
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- }
-
- assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- }
-
- /*------------------------- SYSCLK Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- {
- assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-
- /* HSE is selected as System Clock Source */
- if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- {
- /* Check the HSE ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- {
- return HAL_ERROR;
- }
- }
- /* PLL is selected as System Clock Source */
- else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
- (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
- {
- /* Check the PLL ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- {
- return HAL_ERROR;
- }
- }
- /* HSI is selected as System Clock Source */
- else
- {
- /* Check the HSI ready flag */
- if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- {
- return HAL_ERROR;
- }
- }
-
- __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- {
- if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Decreasing the number of wait states because of lower CPU frequency */
- if(FLatency < __HAL_FLASH_GET_LATENCY())
- {
- /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
- __HAL_FLASH_SET_LATENCY(FLatency);
-
- /* Check that the new number of wait states is taken into account to access the Flash
- memory by reading the FLASH_ACR register */
- if(__HAL_FLASH_GET_LATENCY() != FLatency)
- {
- return HAL_ERROR;
- }
- }
-
- /*-------------------------- PCLK1 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- }
-
- /*-------------------------- PCLK2 Configuration ---------------------------*/
- if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- {
- assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
- }
-
- /* Update the SystemCoreClock global variable */
- SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
-
- /* Configure the source of time base considering new system clocks settings */
- HAL_InitTick (uwTickPrio);
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
- * @brief RCC clocks control functions
- *
-@verbatim
- ===============================================================================
- ##### Peripheral Control functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to control the RCC Clocks
- frequencies.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
- * @note PA8/PC9 should be configured in alternate function mode.
- * @param RCC_MCOx specifies the output direction for the clock source.
- * This parameter can be one of the following values:
- * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
- * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
- * @param RCC_MCOSource specifies the clock source to output.
- * This parameter can be one of the following values:
- * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
- * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
- * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
- * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for all STM32F4 devices except STM32F410xx
- * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for STM32F410Rx devices
- * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
- * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
- * @param RCC_MCODiv specifies the MCOx prescaler.
- * This parameter can be one of the following values:
- * @arg RCC_MCODIV_1: no division applied to MCOx clock
- * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
- * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
- * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
- * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
- * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have
- * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5).
- * @retval None
- */
-void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
-{
- GPIO_InitTypeDef GPIO_InitStruct;
- /* Check the parameters */
- assert_param(IS_RCC_MCO(RCC_MCOx));
- assert_param(IS_RCC_MCODIV(RCC_MCODiv));
- /* RCC_MCO1 */
- if(RCC_MCOx == RCC_MCO1)
- {
- assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
-
- /* MCO1 Clock Enable */
- __MCO1_CLK_ENABLE();
-
- /* Configure the MCO1 pin in alternate function mode */
- GPIO_InitStruct.Pin = MCO1_PIN;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
- HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
-
- /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
- MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
-
- /* This RCC MCO1 enable feature is available only on STM32F410xx devices */
-#if defined(RCC_CFGR_MCO1EN)
- __HAL_RCC_MCO1_ENABLE();
-#endif /* RCC_CFGR_MCO1EN */
- }
-#if defined(RCC_CFGR_MCO2)
- else
- {
- assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
-
- /* MCO2 Clock Enable */
- __MCO2_CLK_ENABLE();
-
- /* Configure the MCO2 pin in alternate function mode */
- GPIO_InitStruct.Pin = MCO2_PIN;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
- HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
-
- /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
- MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U)));
-
- /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */
-#if defined(RCC_CFGR_MCO2EN)
- __HAL_RCC_MCO2_ENABLE();
-#endif /* RCC_CFGR_MCO2EN */
- }
-#endif /* RCC_CFGR_MCO2 */
-}
-
-/**
- * @brief Enables the Clock Security System.
- * @note If a failure is detected on the HSE oscillator clock, this oscillator
- * is automatically disabled and an interrupt is generated to inform the
- * software about the failure (Clock Security System Interrupt, CSSI),
- * allowing the MCU to perform rescue operations. The CSSI is linked to
- * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
- * @retval None
- */
-void HAL_RCC_EnableCSS(void)
-{
- *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
-}
-
-/**
- * @brief Disables the Clock Security System.
- * @retval None
- */
-void HAL_RCC_DisableCSS(void)
-{
- *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
-}
-
-/**
- * @brief Returns the SYSCLK frequency
- *
- * @note The system frequency computed by this function is not the real
- * frequency in the chip. It is calculated based on the predefined
- * constant and the selected clock source:
- * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
- * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
- * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
- * or HSI_VALUE(*) multiplied/divided by the PLL factors.
- * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 16 MHz) but the real value may vary depending on the variations
- * in voltage and temperature.
- * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 25 MHz), user has to ensure that HSE_VALUE is same as the real
- * frequency of the crystal used. Otherwise, this function may
- * have wrong result.
- *
- * @note The result of this function could be not correct when using fractional
- * value for HSE crystal.
- *
- * @note This function can be used by the user application to compute the
- * baudrate for the communication peripherals or configure other parameters.
- *
- * @note Each time SYSCLK changes, this function must be called to update the
- * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
- *
- *
- * @retval SYSCLK frequency
- */
-__weak uint32_t HAL_RCC_GetSysClockFreq(void)
-{
- uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
- uint32_t sysclockfreq = 0U;
-
- /* Get SYSCLK source -------------------------------------------------------*/
- switch (RCC->CFGR & RCC_CFGR_SWS)
- {
- case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
- {
- sysclockfreq = HSI_VALUE;
- break;
- }
- case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
- {
- sysclockfreq = HSE_VALUE;
- break;
- }
- case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
- {
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLP */
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
- {
- /* HSE used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
-
- sysclockfreq = pllvco/pllp;
- break;
- }
- default:
- {
- sysclockfreq = HSI_VALUE;
- break;
- }
- }
- return sysclockfreq;
-}
-
-/**
- * @brief Returns the HCLK frequency
- * @note Each time HCLK changes, this function must be called to update the
- * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
- *
- * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
- * and updated within this function
- * @retval HCLK frequency
- */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
- return SystemCoreClock;
-}
-
-/**
- * @brief Returns the PCLK1 frequency
- * @note Each time PCLK1 changes, this function must be called to update the
- * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK1 frequency
- */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
- /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
-}
-
-/**
- * @brief Returns the PCLK2 frequency
- * @note Each time PCLK2 changes, this function must be called to update the
- * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
- * @retval PCLK2 frequency
- */
-uint32_t HAL_RCC_GetPCLK2Freq(void)
-{
- /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
- return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
-}
-
-/**
- * @brief Configures the RCC_OscInitStruct according to the internal
- * RCC configuration registers.
- * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-__weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- /* Set all possible values for the Oscillator type parameter ---------------*/
- RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
-
- /* Get the HSE configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
- }
- else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_ON;
- }
- else
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
- }
-
- /* Get the HSI configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
- {
- RCC_OscInitStruct->HSIState = RCC_HSI_ON;
- }
- else
- {
- RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
- }
-
- RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
-
- /* Get the LSE configuration -----------------------------------------------*/
- if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
- }
- else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_ON;
- }
- else
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
- }
-
- /* Get the LSI configuration -----------------------------------------------*/
- if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
- {
- RCC_OscInitStruct->LSIState = RCC_LSI_ON;
- }
- else
- {
- RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
- }
-
- /* Get the PLL configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
- {
- RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
- }
- else
- {
- RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
- }
- RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
- RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
- RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
- RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1U) >> RCC_PLLCFGR_PLLP_Pos);
- RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos);
-}
-
-/**
- * @brief Configures the RCC_ClkInitStruct according to the internal
- * RCC configuration registers.
- * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
- * will be configured.
- * @param pFLatency Pointer on the Flash Latency.
- * @retval None
- */
-void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
-{
- /* Set all possible values for the Clock type parameter --------------------*/
- RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-
- /* Get the SYSCLK configuration --------------------------------------------*/
- RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
-
- /* Get the HCLK configuration ----------------------------------------------*/
- RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
-
- /* Get the APB1 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
-
- /* Get the APB2 configuration ----------------------------------------------*/
- RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
-
- /* Get the Flash Wait State (Latency) configuration ------------------------*/
- *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
-}
-
-/**
- * @brief This function handles the RCC CSS interrupt request.
- * @note This API should be called under the NMI_Handler().
- * @retval None
- */
-void HAL_RCC_NMI_IRQHandler(void)
-{
- /* Check RCC CSSF flag */
- if(__HAL_RCC_GET_IT(RCC_IT_CSS))
- {
- /* RCC Clock Security System interrupt user callback */
- HAL_RCC_CSSCallback();
-
- /* Clear RCC CSS pending bit */
- __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
- }
-}
-
-/**
- * @brief RCC Clock Security System interrupt callback
- * @retval None
- */
-__weak void HAL_RCC_CSSCallback(void)
-{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_RCC_CSSCallback could be implemented in the user file
- */
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* HAL_RCC_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c
deleted file mode 100644
index dd89656e530f3b256b2dc67763a577012dbd57c8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c
+++ /dev/null
@@ -1,3784 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_rcc_ex.c
- * @author MCD Application Team
- * @brief Extension RCC HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities RCC extension peripheral:
- * + Extended Peripheral Control functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file in
- * the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup RCCEx RCCEx
- * @brief RCCEx HAL module driver
- * @{
- */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup RCCEx_Private_Constants
- * @{
- */
-/**
- * @}
- */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
- * @{
- */
-
-/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
- * @brief Extended Peripheral Control functions
- *
-@verbatim
- ===============================================================================
- ##### Extended Peripheral Control functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to control the RCC Clocks
- frequencies.
- [..]
- (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
- select the RTC clock source; in this case the Backup domain will be reset in
- order to modify the RTC Clock source, as consequence RTC registers (including
- the backup registers) and RCC_BDCR register are set to their reset values.
-
-@endverbatim
- * @{
- */
-
-#if defined(STM32F446xx)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified
- * parameters in the RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals
- * clocks(I2S, SAI, LTDC RTC and TIM).
- *
- * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
- * the RTC clock source; in this case the Backup domain will be reset in
- * order to modify the RTC Clock source, as consequence RTC registers (including
- * the backup registers) and RCC_BDCR register are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
- uint32_t plli2sp = 0U;
- uint32_t plli2sq = 0U;
- uint32_t plli2sr = 0U;
- uint32_t pllsaip = 0U;
- uint32_t pllsaiq = 0U;
- uint32_t plli2sused = 0U;
- uint32_t pllsaiused = 0U;
-
- /* Check the peripheral clock selection parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*------------------------ I2S APB1 configuration --------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- I2S APB2 configuration ----------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*--------------------------- SAI1 configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
-
- /* Configure SAI1 Clock source */
- __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
- {
- pllsaiused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*-------------------------- SAI2 configuration ----------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
-
- /* Configure SAI2 Clock source */
- __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
-
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
- {
- pllsaiused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------------- RTC configuration --------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- TIM configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- /* Configure Timer Prescaler */
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- FMPI2C1 Configuration -----------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
-
- /* Configure the FMPI2C1 clock source */
- __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------ CEC Configuration -------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
- {
- /* Check the parameters */
- assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
-
- /* Configure the CEC clock source */
- __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------------- CLK48 Configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection));
-
- /* Configure the CLK48 clock source */
- __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
-
- /* Enable the PLLSAI when it's used as clock source for CLK48 */
- if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)
- {
- pllsaiused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------------- SDIO Configuration -------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO)
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
-
- /* Configure the SDIO clock source */
- __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------ SPDIFRX Configuration ---------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
- {
- /* Check the parameters */
- assert_param(IS_RCC_SPDIFRXCLKSOURCE(PeriphClkInit->SpdifClockSelection));
-
- /* Configure the SPDIFRX clock source */
- __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifClockSelection);
- /* Enable the PLLI2S when it's used as clock source for SPDIFRX */
- if(PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- PLLI2S Configuration ------------------------*/
- /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S on APB1,
- I2S on APB2 or SPDIFRX */
- if((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- {
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /* check for common PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
- /*------ In Case of PLLI2S is selected as source clock for I2S -----------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
- /* Read PLLI2SP/PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
- plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
- plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /*------- In Case of PLLI2S is selected as source clock for SAI ----------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
- {
- /* Check for PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- /* Check for PLLI2S/DIVQ parameters */
- assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
- /* Read PLLI2SP/PLLI2SR value from PLLI2SCFGR register (this value is not needed for SAI configuration) */
- plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
- plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr);
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- }
-
- /*------ In Case of PLLI2S is selected as source clock for SPDIFRX -------*/
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) && (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
- /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */
- plli2sq = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
- plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, plli2sq, plli2sr);
- }
-
- /*----------------- In Case of PLLI2S is just selected -----------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- {
- /* Check for Parameters */
- assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------------- PLLSAI Configuration -----------------------*/
- /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, CLK48 or SDIO */
- if(pllsaiused == 1U)
- {
- /* Disable PLLSAI Clock */
- __HAL_RCC_PLLSAI_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is disabled */
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /* Check the PLLSAI division factors */
- assert_param(IS_RCC_PLLSAIM_VALUE(PeriphClkInit->PLLSAI.PLLSAIM));
- assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
- /*------ In Case of PLLSAI is selected as source clock for SAI -----------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
- {
- /* check for PLLSAIQ Parameter */
- assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
- /* check for PLLSAI/DIVQ Parameter */
- assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
- /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
- pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN , pllsaip, PeriphClkInit->PLLSAI.PLLSAIQ, 0U);
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- }
-
- /*------ In Case of PLLSAI is selected as source clock for CLK48 ---------*/
- /* In Case of PLLI2S is selected as source clock for CLK48 */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
- /* Read PLLSAIQ value from PLLI2SCFGR register (this value is not need for SAI configuration) */
- pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* Configure the PLLSAI division factors */
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLI2SN/PLLSAIM) */
- /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, pllsaiq, 0U);
- }
-
- /* Enable PLLSAI Clock */
- __HAL_RCC_PLLSAI_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is ready */
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Get the RCC_PeriphCLKInitTypeDef according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S_APB1 | RCC_PERIPHCLK_I2S_APB2 |\
- RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 |\
- RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC |\
- RCC_PERIPHCLK_CEC | RCC_PERIPHCLK_FMPI2C1 |\
- RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_SDIO |\
- RCC_PERIPHCLK_SPDIFRX;
-
- /* Get the PLLI2S Clock configuration --------------------------------------*/
- PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM) >> RCC_PLLI2SCFGR_PLLI2SM_Pos);
- PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
- PeriphClkInit->PLLI2S.PLLI2SP = (uint32_t)((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
- PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- /* Get the PLLSAI Clock configuration --------------------------------------*/
- PeriphClkInit->PLLSAI.PLLSAIM = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM) >> RCC_PLLSAICFGR_PLLSAIM_Pos);
- PeriphClkInit->PLLSAI.PLLSAIN = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> RCC_PLLSAICFGR_PLLSAIN_Pos);
- PeriphClkInit->PLLSAI.PLLSAIP = (uint32_t)((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U);
- PeriphClkInit->PLLSAI.PLLSAIQ = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* Get the PLLSAI/PLLI2S division factors ----------------------------------*/
- PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) >> RCC_DCKCFGR_PLLI2SDIVQ_Pos);
- PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> RCC_DCKCFGR_PLLSAIDIVQ_Pos);
-
- /* Get the SAI1 clock configuration ----------------------------------------*/
- PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE();
-
- /* Get the SAI2 clock configuration ----------------------------------------*/
- PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE();
-
- /* Get the I2S APB1 clock configuration ------------------------------------*/
- PeriphClkInit->I2sApb1ClockSelection = __HAL_RCC_GET_I2S_APB1_SOURCE();
-
- /* Get the I2S APB2 clock configuration ------------------------------------*/
- PeriphClkInit->I2sApb2ClockSelection = __HAL_RCC_GET_I2S_APB2_SOURCE();
-
- /* Get the RTC Clock configuration -----------------------------------------*/
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
- /* Get the CEC clock configuration -----------------------------------------*/
- PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
-
- /* Get the FMPI2C1 clock configuration -------------------------------------*/
- PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
-
- /* Get the CLK48 clock configuration ----------------------------------------*/
- PeriphClkInit->Clk48ClockSelection = __HAL_RCC_GET_CLK48_SOURCE();
-
- /* Get the SDIO clock configuration ----------------------------------------*/
- PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
-
- /* Get the SPDIFRX clock configuration -------------------------------------*/
- PeriphClkInit->SpdifClockSelection = __HAL_RCC_GET_SPDIFRX_SOURCE();
-
- /* Get the TIM Prescaler configuration -------------------------------------*/
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
-}
-
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_SAI1: SAI1 peripheral clock
- * @arg RCC_PERIPHCLK_SAI2: SAI2 peripheral clock
- * @arg RCC_PERIPHCLK_I2S_APB1: I2S APB1 peripheral clock
- * @arg RCC_PERIPHCLK_I2S_APB2: I2S APB2 peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- uint32_t tmpreg1 = 0U;
- /* This variable used to store the SAI clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- /* This variable used to store the SAI clock source */
- uint32_t saiclocksource = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_SAI1:
- case RCC_PERIPHCLK_SAI2:
- {
- saiclocksource = RCC->DCKCFGR;
- saiclocksource &= (RCC_DCKCFGR_SAI1SRC | RCC_DCKCFGR_SAI2SRC);
- switch (saiclocksource)
- {
- case 0U: /* PLLSAI is the clock source for SAI*/
- {
- /* Configure the PLLSAI division factor */
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLSAIM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
- {
- /* In Case the PLL Source is HSI (Internal Clock) */
- vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM));
- }
- else
- {
- /* In Case the PLL Source is HSE (External Clock) */
- vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIM)));
- }
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- tmpreg1 = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
- frequency = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U))/(tmpreg1);
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- tmpreg1 = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
- frequency = frequency/(tmpreg1);
- break;
- }
- case RCC_DCKCFGR_SAI1SRC_0: /* PLLI2S is the clock source for SAI*/
- case RCC_DCKCFGR_SAI2SRC_0: /* PLLI2S is the clock source for SAI*/
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
- {
- /* In Case the PLL Source is HSI (Internal Clock) */
- vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* In Case the PLL Source is HSE (External Clock) */
- vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM)));
- }
-
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- tmpreg1 = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
- frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg1);
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- tmpreg1 = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
- frequency = frequency/(tmpreg1);
- break;
- }
- case RCC_DCKCFGR_SAI1SRC_1: /* PLLR is the clock source for SAI*/
- case RCC_DCKCFGR_SAI2SRC_1: /* PLLR is the clock source for SAI*/
- {
- /* Configure the PLLI2S division factor */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
- {
- /* In Case the PLL Source is HSI (Internal Clock) */
- vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* In Case the PLL Source is HSE (External Clock) */
- vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- /* SAI_CLK_x = PLL_VCO Output/PLLR */
- tmpreg1 = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U;
- frequency = (vcoinput * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U))/(tmpreg1);
- break;
- }
- case RCC_DCKCFGR_SAI1SRC: /* External clock is the clock source for SAI*/
- {
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- case RCC_DCKCFGR_SAI2SRC: /* PLLSRC(HSE or HSI) is the clock source for SAI*/
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
- {
- /* In Case the PLL Source is HSI (Internal Clock) */
- frequency = (uint32_t)(HSI_VALUE);
- }
- else
- {
- /* In Case the PLL Source is HSE (External Clock) */
- frequency = (uint32_t)(HSE_VALUE);
- }
- break;
- }
- default :
- {
- break;
- }
- }
- break;
- }
- case RCC_PERIPHCLK_I2S_APB1:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_APB1_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_PLLI2S:
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
-
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is PLL VCO Output divided by PLLR used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_PLLR:
- {
- /* Configure the PLL division factor R */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U) & (RCC_PLLCFGR_PLLN >> 6U)));
- /* I2S_CLK = PLL_VCO Output/PLLR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U) & (RCC_PLLCFGR_PLLR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is HSI or HSE depending from PLL source Clock */
- case RCC_I2SAPB1CLKSOURCE_PLLSRC:
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- frequency = HSE_VALUE;
- }
- else
- {
- frequency = HSI_VALUE;
- }
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- case RCC_PERIPHCLK_I2S_APB2:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_APB2_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_PLLI2S:
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
-
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is PLL VCO Output divided by PLLR used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_PLLR:
- {
- /* Configure the PLL division factor R */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U) & (RCC_PLLCFGR_PLLN >> 6U)));
- /* I2S_CLK = PLL_VCO Output/PLLR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U) & (RCC_PLLCFGR_PLLR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is HSI or HSE depending from PLL source Clock */
- case RCC_I2SAPB2CLKSOURCE_PLLSRC:
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- frequency = HSE_VALUE;
- }
- else
- {
- frequency = HSI_VALUE;
- }
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F446xx */
-
-#if defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified
- * parameters in the RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals
- * clocks(I2S, SAI, LTDC, RTC and TIM).
- *
- * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
- * the RTC clock source; in this case the Backup domain will be reset in
- * order to modify the RTC Clock source, as consequence RTC registers (including
- * the backup registers) and RCC_BDCR register are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
- uint32_t pllsaip = 0U;
- uint32_t pllsaiq = 0U;
- uint32_t pllsair = 0U;
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*--------------------------- CLK48 Configuration --------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection));
-
- /* Configure the CLK48 clock source */
- __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------ SDIO Configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO)
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
-
- /* Configure the SDIO clock source */
- __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------- SAI/I2S Configuration (PLLI2S) -------------------*/
- /*------------------- Common configuration SAI/I2S -------------------------*/
- /* In Case of SAI or I2S Clock Configuration through PLLI2S, PLLI2SN division
- factor is common parameters for both peripherals */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /*---------------------- I2S configuration -------------------------------*/
- /* In Case of I2S Clock Configuration through PLLI2S, PLLI2SR must be added
- only for I2S configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /*---------------------------- SAI configuration -------------------------*/
- /* In Case of SAI Clock Configuration through PLLI2S, PLLI2SQ and PLLI2S_DIVQ must
- be added only for SAI configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == (RCC_PERIPHCLK_SAI_PLLI2S))
- {
- /* Check the PLLI2S division factors */
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
- /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ , tmpreg1);
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- }
-
- /*----------------- In Case of PLLI2S is just selected -----------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- {
- /* Check for Parameters */
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
- /* Configure the PLLI2S multiplication and division factors */
- __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------- SAI/LTDC Configuration (PLLSAI) ------------------*/
- /*----------------------- Common configuration SAI/LTDC --------------------*/
- /* In Case of SAI, LTDC or CLK48 Clock Configuration through PLLSAI, PLLSAIN division
- factor is common parameters for these peripherals */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) &&
- (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)))
- {
- /* Check the PLLSAI division factors */
- assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
- /* Disable PLLSAI Clock */
- __HAL_RCC_PLLSAI_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is disabled */
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /*---------------------------- SAI configuration -------------------------*/
- /* In Case of SAI Clock Configuration through PLLSAI, PLLSAIQ and PLLSAI_DIVQ must
- be added only for SAI configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == (RCC_PERIPHCLK_SAI_PLLSAI))
- {
- assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
- assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
- /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
- pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U);
- /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
- pllsair = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, pllsaip, PeriphClkInit->PLLSAI.PLLSAIQ, pllsair);
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- }
-
- /*---------------------------- LTDC configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- {
- assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
- assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
-
- /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
- pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U);
- /* Read PLLSAIQ value from PLLSAICFGR register (this value is not need for SAI configuration) */
- pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, pllsaip, pllsaiq, PeriphClkInit->PLLSAI.PLLSAIR);
- /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- }
-
- /*---------------------------- CLK48 configuration ------------------------*/
- /* Configure the PLLSAI when it is used as clock source for CLK48 */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == (RCC_PERIPHCLK_CLK48)) &&
- (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP))
- {
- assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
-
- /* Read PLLSAIQ value from PLLSAICFGR register (this value is not need for SAI configuration) */
- pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
- pllsair = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* CLK48_CLK(first level) = PLLSAI_VCO Output/PLLSAIP */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP, pllsaiq, pllsair);
- }
-
- /* Enable PLLSAI Clock */
- __HAL_RCC_PLLSAI_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is ready */
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
-
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- RTC configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- TIM configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
- return HAL_OK;
-}
-
-/**
- * @brief Configures the RCC_PeriphCLKInitTypeDef according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_SAI_PLLSAI |\
- RCC_PERIPHCLK_SAI_PLLI2S | RCC_PERIPHCLK_LTDC |\
- RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC |\
- RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_SDIO;
-
- /* Get the PLLI2S Clock configuration --------------------------------------*/
- PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
- PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- /* Get the PLLSAI Clock configuration --------------------------------------*/
- PeriphClkInit->PLLSAI.PLLSAIN = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> RCC_PLLSAICFGR_PLLSAIN_Pos);
- PeriphClkInit->PLLSAI.PLLSAIR = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- PeriphClkInit->PLLSAI.PLLSAIQ = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* Get the PLLSAI/PLLI2S division factors ----------------------------------*/
- PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) >> RCC_DCKCFGR_PLLI2SDIVQ_Pos);
- PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> RCC_DCKCFGR_PLLSAIDIVQ_Pos);
- PeriphClkInit->PLLSAIDivR = (uint32_t)(RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVR);
- /* Get the RTC Clock configuration -----------------------------------------*/
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
- /* Get the CLK48 clock configuration -------------------------------------*/
- PeriphClkInit->Clk48ClockSelection = __HAL_RCC_GET_CLK48_SOURCE();
-
- /* Get the SDIO clock configuration ----------------------------------------*/
- PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
-
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
-}
-
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- /* This variable used to store the I2S clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_I2S:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SCLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SCLKSOURCE_PLLI2S:
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F469xx || STM32F479xx */
-
-#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified
- * parameters in the RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals
- * clocks(I2S, LTDC RTC and TIM).
- *
- * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
- * the RTC clock source; in this case the Backup domain will be reset in
- * order to modify the RTC Clock source, as consequence RTC registers (including
- * the backup registers) and RCC_BDCR register are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
-#if defined(STM32F413xx) || defined(STM32F423xx)
- uint32_t plli2sq = 0U;
-#endif /* STM32F413xx || STM32F423xx */
- uint32_t plli2sused = 0U;
-
- /* Check the peripheral clock selection parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*----------------------------------- I2S APB1 configuration ---------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------------------- I2S APB2 configuration ---------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
-
- /* Configure I2S Clock source */
- __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
- /* Enable the PLLI2S when it's used as clock source for I2S */
- if(PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /*----------------------- SAI1 Block A configuration -----------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIA) == (RCC_PERIPHCLK_SAIA))
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAIACLKSOURCE(PeriphClkInit->SaiAClockSelection));
-
- /* Configure SAI1 Clock source */
- __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(PeriphClkInit->SaiAClockSelection);
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)
- {
- plli2sused = 1U;
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLR)
- {
- /* Check for PLL/DIVR parameters */
- assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
- __HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------- SAI1 Block B configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == (RCC_PERIPHCLK_SAIB))
- {
- /* Check the parameters */
- assert_param(IS_RCC_SAIBCLKSOURCE(PeriphClkInit->SaiBClockSelection));
-
- /* Configure SAI1 Clock source */
- __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG(PeriphClkInit->SaiBClockSelection);
- /* Enable the PLLI2S when it's used as clock source for SAI */
- if(PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)
- {
- plli2sused = 1U;
- }
- /* Enable the PLLSAI when it's used as clock source for SAI */
- if(PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLR)
- {
- /* Check for PLL/DIVR parameters */
- assert_param(IS_RCC_PLL_DIVR_VALUE(PeriphClkInit->PLLDivR));
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
- __HAL_RCC_PLL_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLDivR);
- }
- }
- /*--------------------------------------------------------------------------*/
-#endif /* STM32F413xx || STM32F423xx */
-
- /*------------------------------------ RTC configuration -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------------ TIM configuration -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- /* Configure Timer Prescaler */
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------------- FMPI2C1 Configuration --------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
-
- /* Configure the FMPI2C1 clock source */
- __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------------- CLK48 Configuration ----------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
- {
- /* Check the parameters */
- assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection));
-
- /* Configure the SDIO clock source */
- __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
-
- /* Enable the PLLI2S when it's used as clock source for CLK48 */
- if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)
- {
- plli2sused = 1U;
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*------------------------------------- SDIO Configuration -----------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO)
- {
- /* Check the parameters */
- assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
-
- /* Configure the SDIO clock source */
- __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*-------------------------------------- PLLI2S Configuration --------------*/
- /* PLLI2S is configured when a peripheral will use it as source clock : I2S on APB1 or
- I2S on APB2*/
- if((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
- {
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /* check for common PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SCLKSOURCE(PeriphClkInit->PLLI2SSelection));
- assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
- /*-------------------- Set the PLL I2S clock -----------------------------*/
- __HAL_RCC_PLL_I2S_CONFIG(PeriphClkInit->PLLI2SSelection);
-
- /*------- In Case of PLLI2S is selected as source clock for I2S ----------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) && (PeriphClkInit->SdioClockSelection == RCC_SDIOCLKSOURCE_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLI2SQ)))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM)*/
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /*------- In Case of PLLI2S is selected as source clock for SAI ----------*/
- if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIA) == RCC_PERIPHCLK_SAIA) && (PeriphClkInit->SaiAClockSelection == RCC_SAIACLKSOURCE_PLLI2SR)) ||
- ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAIB) == RCC_PERIPHCLK_SAIB) && (PeriphClkInit->SaiBClockSelection == RCC_SAIBCLKSOURCE_PLLI2SR)))
- {
- /* Check for PLLI2S Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- /* Check for PLLI2S/DIVR parameters */
- assert_param(IS_RCC_PLLI2S_DIVR_VALUE(PeriphClkInit->PLLI2SDivR));
-
- /* Read PLLI2SQ value from PLLI2SCFGR register (this value is not needed for SAI configuration) */
- plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR);
-
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLI2SDivR);
- }
-#endif /* STM32F413xx || STM32F423xx */
-
- /*----------------- In Case of PLLI2S is just selected ------------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- {
- /* Check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
-
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM)*/
- /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*-------------------- DFSDM1 clock source configuration -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
-
- /* Configure the DFSDM1 interface clock source */
- __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*-------------------- DFSDM1 Audio clock source configuration -------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1_AUDIO) == RCC_PERIPHCLK_DFSDM1_AUDIO)
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection));
-
- /* Configure the DFSDM1 Audio interface clock source */
- __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /*-------------------- DFSDM2 clock source configuration -------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM2) == RCC_PERIPHCLK_DFSDM2)
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM2CLKSOURCE(PeriphClkInit->Dfsdm2ClockSelection));
-
- /* Configure the DFSDM1 interface clock source */
- __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*-------------------- DFSDM2 Audio clock source configuration -------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM2_AUDIO) == RCC_PERIPHCLK_DFSDM2_AUDIO)
- {
- /* Check the parameters */
- assert_param(IS_RCC_DFSDM2AUDIOCLKSOURCE(PeriphClkInit->Dfsdm2AudioClockSelection));
-
- /* Configure the DFSDM1 Audio interface clock source */
- __HAL_RCC_DFSDM2AUDIO_CONFIG(PeriphClkInit->Dfsdm2AudioClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- LPTIM1 Configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_LPTIM1CLKSOURCE(PeriphClkInit->Lptim1ClockSelection));
-
- /* Configure the LPTIM1 clock source */
- __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-#endif /* STM32F413xx || STM32F423xx */
-
- return HAL_OK;
-}
-
-/**
- * @brief Get the RCC_PeriphCLKInitTypeDef according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
-#if defined(STM32F413xx) || defined(STM32F423xx)
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S_APB1 | RCC_PERIPHCLK_I2S_APB2 |\
- RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC |\
- RCC_PERIPHCLK_FMPI2C1 | RCC_PERIPHCLK_CLK48 |\
- RCC_PERIPHCLK_SDIO | RCC_PERIPHCLK_DFSDM1 |\
- RCC_PERIPHCLK_DFSDM1_AUDIO | RCC_PERIPHCLK_DFSDM2 |\
- RCC_PERIPHCLK_DFSDM2_AUDIO | RCC_PERIPHCLK_LPTIM1 |\
- RCC_PERIPHCLK_SAIA | RCC_PERIPHCLK_SAIB;
-#else /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S_APB1 | RCC_PERIPHCLK_I2S_APB2 |\
- RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC |\
- RCC_PERIPHCLK_FMPI2C1 | RCC_PERIPHCLK_CLK48 |\
- RCC_PERIPHCLK_SDIO | RCC_PERIPHCLK_DFSDM1 |\
- RCC_PERIPHCLK_DFSDM1_AUDIO;
-#endif /* STM32F413xx || STM32F423xx */
-
-
-
- /* Get the PLLI2S Clock configuration --------------------------------------*/
- PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM) >> RCC_PLLI2SCFGR_PLLI2SM_Pos);
- PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
- PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /* Get the PLL/PLLI2S division factors -------------------------------------*/
- PeriphClkInit->PLLI2SDivR = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) >> RCC_DCKCFGR_PLLI2SDIVR_Pos);
- PeriphClkInit->PLLDivR = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> RCC_DCKCFGR_PLLDIVR_Pos);
-#endif /* STM32F413xx || STM32F423xx */
-
- /* Get the I2S APB1 clock configuration ------------------------------------*/
- PeriphClkInit->I2sApb1ClockSelection = __HAL_RCC_GET_I2S_APB1_SOURCE();
-
- /* Get the I2S APB2 clock configuration ------------------------------------*/
- PeriphClkInit->I2sApb2ClockSelection = __HAL_RCC_GET_I2S_APB2_SOURCE();
-
- /* Get the RTC Clock configuration -----------------------------------------*/
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
- /* Get the FMPI2C1 clock configuration -------------------------------------*/
- PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
-
- /* Get the CLK48 clock configuration ---------------------------------------*/
- PeriphClkInit->Clk48ClockSelection = __HAL_RCC_GET_CLK48_SOURCE();
-
- /* Get the SDIO clock configuration ----------------------------------------*/
- PeriphClkInit->SdioClockSelection = __HAL_RCC_GET_SDIO_SOURCE();
-
- /* Get the DFSDM1 clock configuration --------------------------------------*/
- PeriphClkInit->Dfsdm1ClockSelection = __HAL_RCC_GET_DFSDM1_SOURCE();
-
- /* Get the DFSDM1 Audio clock configuration --------------------------------*/
- PeriphClkInit->Dfsdm1AudioClockSelection = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE();
-
-#if defined(STM32F413xx) || defined(STM32F423xx)
- /* Get the DFSDM2 clock configuration --------------------------------------*/
- PeriphClkInit->Dfsdm2ClockSelection = __HAL_RCC_GET_DFSDM2_SOURCE();
-
- /* Get the DFSDM2 Audio clock configuration --------------------------------*/
- PeriphClkInit->Dfsdm2AudioClockSelection = __HAL_RCC_GET_DFSDM2AUDIO_SOURCE();
-
- /* Get the LPTIM1 clock configuration --------------------------------------*/
- PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE();
-
- /* Get the SAI1 Block Aclock configuration ---------------------------------*/
- PeriphClkInit->SaiAClockSelection = __HAL_RCC_GET_SAI_BLOCKA_SOURCE();
-
- /* Get the SAI1 Block B clock configuration --------------------------------*/
- PeriphClkInit->SaiBClockSelection = __HAL_RCC_GET_SAI_BLOCKB_SOURCE();
-#endif /* STM32F413xx || STM32F423xx */
-
- /* Get the TIM Prescaler configuration -------------------------------------*/
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
-}
-
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(I2S..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_I2S_APB1: I2S APB1 peripheral clock
- * @arg RCC_PERIPHCLK_I2S_APB2: I2S APB2 peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- /* This variable used to store the I2S clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_I2S_APB1:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_APB1_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_PLLI2S:
- {
- if((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SSRC) == RCC_PLLI2SCFGR_PLLI2SSRC)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(EXTERNAL_CLOCK_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- }
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is PLL VCO Output divided by PLLR used as I2S clock */
- case RCC_I2SAPB1CLKSOURCE_PLLR:
- {
- /* Configure the PLL division factor R */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U) & (RCC_PLLCFGR_PLLN >> 6U)));
- /* I2S_CLK = PLL_VCO Output/PLLR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U) & (RCC_PLLCFGR_PLLR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is HSI or HSE depending from PLL source Clock */
- case RCC_I2SAPB1CLKSOURCE_PLLSRC:
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- frequency = HSE_VALUE;
- }
- else
- {
- frequency = HSI_VALUE;
- }
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- case RCC_PERIPHCLK_I2S_APB2:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_APB2_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_PLLI2S:
- {
- if((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SSRC) == RCC_PLLI2SCFGR_PLLI2SSRC)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(EXTERNAL_CLOCK_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- }
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is PLL VCO Output divided by PLLR used as I2S clock */
- case RCC_I2SAPB2CLKSOURCE_PLLR:
- {
- /* Configure the PLL division factor R */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U) & (RCC_PLLCFGR_PLLN >> 6U)));
- /* I2S_CLK = PLL_VCO Output/PLLR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U) & (RCC_PLLCFGR_PLLR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is HSI or HSE depending from PLL source Clock */
- case RCC_I2SAPB2CLKSOURCE_PLLSRC:
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- frequency = HSE_VALUE;
- }
- else
- {
- frequency = HSI_VALUE;
- }
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified parameters in the
- * RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals clocks(I2S and RTC clocks).
- *
- * @note A caution to be taken when HAL_RCCEx_PeriphCLKConfig() is used to select RTC clock selection, in this case
- * the Reset of Backup domain will be applied in order to modify the RTC Clock source as consequence all backup
- * domain (RTC and RCC_BDCR register expect BKPSRAM) will be reset
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*---------------------------- RTC configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- TIM configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- FMPI2C1 Configuration -----------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
-
- /* Configure the FMPI2C1 clock source */
- __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- LPTIM1 Configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
- {
- /* Check the parameters */
- assert_param(IS_RCC_LPTIM1CLKSOURCE(PeriphClkInit->Lptim1ClockSelection));
-
- /* Configure the LPTIM1 clock source */
- __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
- }
-
- /*---------------------------- I2S Configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S)
- {
- /* Check the parameters */
- assert_param(IS_RCC_I2SAPBCLKSOURCE(PeriphClkInit->I2SClockSelection));
-
- /* Configure the I2S clock source */
- __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2SClockSelection);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the RCC_OscInitStruct according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_FMPI2C1 | RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC;
-
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
- /* Get the FMPI2C1 clock configuration -------------------------------------*/
- PeriphClkInit->Fmpi2c1ClockSelection = __HAL_RCC_GET_FMPI2C1_SOURCE();
-
- /* Get the I2S clock configuration -----------------------------------------*/
- PeriphClkInit->I2SClockSelection = __HAL_RCC_GET_I2S_SOURCE();
-
-
-}
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- /* This variable used to store the I2S clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_I2S:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SAPBCLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLL VCO Output divided by PLLR used as I2S clock */
- case RCC_I2SAPBCLKSOURCE_PLLR:
- {
- /* Configure the PLL division factor R */
- /* PLL_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLL_VCO Output = PLL_VCO Input * PLLN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U) & (RCC_PLLCFGR_PLLN >> 6U)));
- /* I2S_CLK = PLL_VCO Output/PLLR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U) & (RCC_PLLCFGR_PLLR >> 28U)));
- break;
- }
- /* Check if I2S clock selection is HSI or HSE depending from PLL source Clock */
- case RCC_I2SAPBCLKSOURCE_PLLSRC:
- {
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- frequency = HSE_VALUE;
- }
- else
- {
- frequency = HSI_VALUE;
- }
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified
- * parameters in the RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals
- * clocks(I2S, SAI, LTDC RTC and TIM).
- *
- * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
- * the RTC clock source; in this case the Backup domain will be reset in
- * order to modify the RTC Clock source, as consequence RTC registers (including
- * the backup registers) and RCC_BDCR register are set to their reset values.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*----------------------- SAI/I2S Configuration (PLLI2S) -------------------*/
- /*----------------------- Common configuration SAI/I2S ---------------------*/
- /* In Case of SAI or I2S Clock Configuration through PLLI2S, PLLI2SN division
- factor is common parameters for both peripherals */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /*---------------------------- I2S configuration -------------------------*/
- /* In Case of I2S Clock Configuration through PLLI2S, PLLI2SR must be added
- only for I2S configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /*---------------------------- SAI configuration -------------------------*/
- /* In Case of SAI Clock Configuration through PLLI2S, PLLI2SQ and PLLI2S_DIVQ must
- be added only for SAI configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == (RCC_PERIPHCLK_SAI_PLLI2S))
- {
- /* Check the PLLI2S division factors */
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
-
- /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */
- tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
- __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ , tmpreg1);
- /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
- __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
- }
-
- /*----------------- In Case of PLLI2S is just selected -----------------*/
- if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
- {
- /* Check for Parameters */
- assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
-
- /* Configure the PLLI2S multiplication and division factors */
- __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
- }
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*----------------------- SAI/LTDC Configuration (PLLSAI) ------------------*/
- /*----------------------- Common configuration SAI/LTDC --------------------*/
- /* In Case of SAI or LTDC Clock Configuration through PLLSAI, PLLSAIN division
- factor is common parameters for both peripherals */
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC))
- {
- /* Check the PLLSAI division factors */
- assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
-
- /* Disable PLLSAI Clock */
- __HAL_RCC_PLLSAI_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is disabled */
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /*---------------------------- SAI configuration -------------------------*/
- /* In Case of SAI Clock Configuration through PLLSAI, PLLSAIQ and PLLSAI_DIVQ must
- be added only for SAI configuration */
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == (RCC_PERIPHCLK_SAI_PLLSAI))
- {
- assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
- assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
-
- /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
- /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
- }
-
- /*---------------------------- LTDC configuration ------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
- {
- assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
- assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
-
- /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
- tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
- /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
- /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg1, PeriphClkInit->PLLSAI.PLLSAIR);
- /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
- __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
- }
- /* Enable PLLSAI Clock */
- __HAL_RCC_PLLSAI_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLSAI is ready */
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- RTC configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
- /*--------------------------------------------------------------------------*/
-
- /*---------------------------- TIM configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
- return HAL_OK;
-}
-
-/**
- * @brief Configures the PeriphClkInit according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_SAI_PLLSAI | RCC_PERIPHCLK_SAI_PLLI2S | RCC_PERIPHCLK_LTDC | RCC_PERIPHCLK_TIM | RCC_PERIPHCLK_RTC;
-
- /* Get the PLLI2S Clock configuration -----------------------------------------------*/
- PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
- PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
- PeriphClkInit->PLLI2S.PLLI2SQ = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
- /* Get the PLLSAI Clock configuration -----------------------------------------------*/
- PeriphClkInit->PLLSAI.PLLSAIN = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> RCC_PLLSAICFGR_PLLSAIN_Pos);
- PeriphClkInit->PLLSAI.PLLSAIR = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
- PeriphClkInit->PLLSAI.PLLSAIQ = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
- /* Get the PLLSAI/PLLI2S division factors -----------------------------------------------*/
- PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) >> RCC_DCKCFGR_PLLI2SDIVQ_Pos);
- PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> RCC_DCKCFGR_PLLSAIDIVQ_Pos);
- PeriphClkInit->PLLSAIDivR = (uint32_t)(RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVR);
- /* Get the RTC Clock configuration -----------------------------------------------*/
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
-}
-
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- /* This variable used to store the I2S clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_I2S:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SCLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SCLKSOURCE_PLLI2S:
- {
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
- defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
-/**
- * @brief Initializes the RCC extended peripherals clocks according to the specified parameters in the
- * RCC_PeriphCLKInitTypeDef.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * contains the configuration information for the Extended Peripherals clocks(I2S and RTC clocks).
- *
- * @note A caution to be taken when HAL_RCCEx_PeriphCLKConfig() is used to select RTC clock selection, in this case
- * the Reset of Backup domain will be applied in order to modify the RTC Clock source as consequence all backup
- * domain (RTC and RCC_BDCR register expect BKPSRAM) will be reset
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tickstart = 0U;
- uint32_t tmpreg1 = 0U;
-
- /* Check the parameters */
- assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-
- /*---------------------------- I2S configuration ---------------------------*/
- if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
- (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
- {
- /* check for Parameters */
- assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
- assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
-#if defined(STM32F411xE)
- assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
-#endif /* STM32F411xE */
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
-#if defined(STM32F411xE)
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_I2SCLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR);
-#else
- /* Configure the PLLI2S division factors */
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
- /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
-#endif /* STM32F411xE */
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
- /* Get tick */
- tickstart = HAL_GetTick();
- /* Wait till PLLI2S is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
- }
-
- /*---------------------------- RTC configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
- {
- /* Check for RTC Parameters used to output RTCCLK */
- assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable write access to Backup domain */
- PWR->CR |= PWR_CR_DBP;
-
- /* Get tick */
- tickstart = HAL_GetTick();
-
- while((PWR->CR & PWR_CR_DBP) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
- tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
- if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
- {
- /* Store the content of BDCR register before the reset of Backup Domain */
- tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
- /* RTC Clock selection can be changed only if the Backup Domain is reset */
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
- /* Restore the Content of BDCR register */
- RCC->BDCR = tmpreg1;
-
- /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
- if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
- {
- /* Get tick */
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- }
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
- /*---------------------------- TIM configuration ---------------------------*/
- if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
- {
- __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
- }
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
- return HAL_OK;
-}
-
-/**
- * @brief Configures the RCC_OscInitStruct according to the internal
- * RCC configuration registers.
- * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
- * will be configured.
- * @retval None
- */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
-{
- uint32_t tempreg;
-
- /* Set all possible values for the extended clock type parameter------------*/
- PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_RTC;
-
- /* Get the PLLI2S Clock configuration --------------------------------------*/
- PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
- PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
-#if defined(STM32F411xE)
- PeriphClkInit->PLLI2S.PLLI2SM = (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM);
-#endif /* STM32F411xE */
- /* Get the RTC Clock configuration -----------------------------------------*/
- tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
- PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
-
-#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
- /* Get the TIM Prescaler configuration -------------------------------------*/
- if ((RCC->DCKCFGR & RCC_DCKCFGR_TIMPRE) == RESET)
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_DESACTIVATED;
- }
- else
- {
- PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
- }
-#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
-}
-
-/**
- * @brief Return the peripheral clock frequency for a given peripheral(SAI..)
- * @note Return 0 if peripheral clock identifier not managed by this API
- * @param PeriphClk Peripheral clock identifier
- * This parameter can be one of the following values:
- * @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
- * @retval Frequency in KHz
- */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
- /* This variable used to store the I2S clock frequency (value in Hz) */
- uint32_t frequency = 0U;
- /* This variable used to store the VCO Input (value in Hz) */
- uint32_t vcoinput = 0U;
- uint32_t srcclk = 0U;
- /* This variable used to store the VCO Output (value in Hz) */
- uint32_t vcooutput = 0U;
- switch (PeriphClk)
- {
- case RCC_PERIPHCLK_I2S:
- {
- /* Get the current I2S source */
- srcclk = __HAL_RCC_GET_I2S_SOURCE();
- switch (srcclk)
- {
- /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
- case RCC_I2SCLKSOURCE_EXT:
- {
- /* Set the I2S clock to the external clock value */
- frequency = EXTERNAL_CLOCK_VALUE;
- break;
- }
- /* Check if I2S clock selection is PLLI2S VCO output clock divided by PLLI2SR used as I2S clock */
- case RCC_I2SCLKSOURCE_PLLI2S:
- {
-#if defined(STM32F411xE)
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
- }
-#else
- /* Configure the PLLI2S division factor */
- /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
- if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
- else
- {
- /* Get the I2S source clock value */
- vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
- }
-#endif /* STM32F411xE */
- /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
- vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
- /* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
- frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
- break;
- }
- /* Clock not enabled for I2S*/
- default:
- {
- frequency = 0U;
- break;
- }
- }
- break;
- }
- }
- return frequency;
-}
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Select LSE mode
- *
- * @note This mode is only available for STM32F410xx/STM32F411xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices.
- *
- * @param Mode specifies the LSE mode.
- * This parameter can be one of the following values:
- * @arg RCC_LSE_LOWPOWER_MODE: LSE oscillator in low power mode selection
- * @arg RCC_LSE_HIGHDRIVE_MODE: LSE oscillator in High Drive mode selection
- * @retval None
- */
-void HAL_RCCEx_SelectLSEMode(uint8_t Mode)
-{
- /* Check the parameters */
- assert_param(IS_RCC_LSE_MODE(Mode));
- if(Mode == RCC_LSE_HIGHDRIVE_MODE)
- {
- SET_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
- }
- else
- {
- CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
- }
-}
-
-#endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-/** @defgroup RCCEx_Exported_Functions_Group2 Extended Clock management functions
- * @brief Extended Clock management functions
- *
-@verbatim
- ===============================================================================
- ##### Extended clock management functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to control the
- activation or deactivation of PLLI2S, PLLSAI.
-@endverbatim
- * @{
- */
-
-#if defined(RCC_PLLI2S_SUPPORT)
-/**
- * @brief Enable PLLI2S.
- * @param PLLI2SInit pointer to an RCC_PLLI2SInitTypeDef structure that
- * contains the configuration information for the PLLI2S
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_EnablePLLI2S(RCC_PLLI2SInitTypeDef *PLLI2SInit)
-{
- uint32_t tickstart;
-
- /* Check for parameters */
- assert_param(IS_RCC_PLLI2SN_VALUE(PLLI2SInit->PLLI2SN));
- assert_param(IS_RCC_PLLI2SR_VALUE(PLLI2SInit->PLLI2SR));
-#if defined(RCC_PLLI2SCFGR_PLLI2SM)
- assert_param(IS_RCC_PLLI2SM_VALUE(PLLI2SInit->PLLI2SM));
-#endif /* RCC_PLLI2SCFGR_PLLI2SM */
-#if defined(RCC_PLLI2SCFGR_PLLI2SP)
- assert_param(IS_RCC_PLLI2SP_VALUE(PLLI2SInit->PLLI2SP));
-#endif /* RCC_PLLI2SCFGR_PLLI2SP */
-#if defined(RCC_PLLI2SCFGR_PLLI2SQ)
- assert_param(IS_RCC_PLLI2SQ_VALUE(PLLI2SInit->PLLI2SQ));
-#endif /* RCC_PLLI2SCFGR_PLLI2SQ */
-
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
-
- /* Wait till PLLI2S is disabled */
- tickstart = HAL_GetTick();
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /* Configure the PLLI2S division factors */
-#if defined(STM32F446xx)
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- /* I2SPCLK = PLLI2S_VCO / PLLI2SP */
- /* I2SQCLK = PLLI2S_VCO / PLLI2SQ */
- /* I2SRCLK = PLLI2S_VCO / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, \
- PLLI2SInit->PLLI2SP, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
-#elif defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
- defined(STM32F413xx) || defined(STM32F423xx)
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM)*/
- /* I2SQCLK = PLLI2S_VCO / PLLI2SQ */
- /* I2SRCLK = PLLI2S_VCO / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, \
- PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
-#elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
- defined(STM32F469xx) || defined(STM32F479xx)
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * PLLI2SN */
- /* I2SQCLK = PLLI2S_VCO / PLLI2SQ */
- /* I2SRCLK = PLLI2S_VCO / PLLI2SR */
- __HAL_RCC_PLLI2S_SAICLK_CONFIG(PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SQ, PLLI2SInit->PLLI2SR);
-#elif defined(STM32F411xE)
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
- /* I2SRCLK = PLLI2S_VCO / PLLI2SR */
- __HAL_RCC_PLLI2S_I2SCLK_CONFIG(PLLI2SInit->PLLI2SM, PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SR);
-#else
- /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x PLLI2SN */
- /* I2SRCLK = PLLI2S_VCO / PLLI2SR */
- __HAL_RCC_PLLI2S_CONFIG(PLLI2SInit->PLLI2SN, PLLI2SInit->PLLI2SR);
-#endif /* STM32F446xx */
-
- /* Enable the PLLI2S */
- __HAL_RCC_PLLI2S_ENABLE();
-
- /* Wait till PLLI2S is ready */
- tickstart = HAL_GetTick();
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Disable PLLI2S.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_DisablePLLI2S(void)
-{
- uint32_t tickstart;
-
- /* Disable the PLLI2S */
- __HAL_RCC_PLLI2S_DISABLE();
-
- /* Wait till PLLI2S is disabled */
- tickstart = HAL_GetTick();
- while(READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
-/**
- * @brief Enable PLLSAI.
- * @param PLLSAIInit pointer to an RCC_PLLSAIInitTypeDef structure that
- * contains the configuration information for the PLLSAI
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI(RCC_PLLSAIInitTypeDef *PLLSAIInit)
-{
- uint32_t tickstart;
-
- /* Check for parameters */
- assert_param(IS_RCC_PLLSAIN_VALUE(PLLSAIInit->PLLSAIN));
- assert_param(IS_RCC_PLLSAIQ_VALUE(PLLSAIInit->PLLSAIQ));
-#if defined(RCC_PLLSAICFGR_PLLSAIM)
- assert_param(IS_RCC_PLLSAIM_VALUE(PLLSAIInit->PLLSAIM));
-#endif /* RCC_PLLSAICFGR_PLLSAIM */
-#if defined(RCC_PLLSAICFGR_PLLSAIP)
- assert_param(IS_RCC_PLLSAIP_VALUE(PLLSAIInit->PLLSAIP));
-#endif /* RCC_PLLSAICFGR_PLLSAIP */
-#if defined(RCC_PLLSAICFGR_PLLSAIR)
- assert_param(IS_RCC_PLLSAIR_VALUE(PLLSAIInit->PLLSAIR));
-#endif /* RCC_PLLSAICFGR_PLLSAIR */
-
- /* Disable the PLLSAI */
- __HAL_RCC_PLLSAI_DISABLE();
-
- /* Wait till PLLSAI is disabled */
- tickstart = HAL_GetTick();
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- /* Configure the PLLSAI division factors */
-#if defined(STM32F446xx)
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLSAIN/PLLSAIM) */
- /* SAIPCLK = PLLSAI_VCO / PLLSAIP */
- /* SAIQCLK = PLLSAI_VCO / PLLSAIQ */
- /* SAIRCLK = PLLSAI_VCO / PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIM, PLLSAIInit->PLLSAIN, \
- PLLSAIInit->PLLSAIP, PLLSAIInit->PLLSAIQ, 0U);
-#elif defined(STM32F469xx) || defined(STM32F479xx)
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * PLLSAIN */
- /* SAIPCLK = PLLSAI_VCO / PLLSAIP */
- /* SAIQCLK = PLLSAI_VCO / PLLSAIQ */
- /* SAIRCLK = PLLSAI_VCO / PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIN, PLLSAIInit->PLLSAIP, \
- PLLSAIInit->PLLSAIQ, PLLSAIInit->PLLSAIR);
-#else
- /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x PLLSAIN */
- /* SAIQCLK = PLLSAI_VCO / PLLSAIQ */
- /* SAIRCLK = PLLSAI_VCO / PLLSAIR */
- __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIN, PLLSAIInit->PLLSAIQ, PLLSAIInit->PLLSAIR);
-#endif /* STM32F446xx */
-
- /* Enable the PLLSAI */
- __HAL_RCC_PLLSAI_ENABLE();
-
- /* Wait till PLLSAI is ready */
- tickstart = HAL_GetTick();
- while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Disable PLLSAI.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI(void)
-{
- uint32_t tickstart;
-
- /* Disable the PLLSAI */
- __HAL_RCC_PLLSAI_DISABLE();
-
- /* Wait till PLLSAI is disabled */
- tickstart = HAL_GetTick();
- while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
- {
- if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- {
- /* return in case of Timeout detected */
- return HAL_TIMEOUT;
- }
- }
-
- return HAL_OK;
-}
-
-#endif /* RCC_PLLSAI_SUPPORT */
-
-/**
- * @}
- */
-
-#if defined(STM32F446xx)
-/**
- * @brief Returns the SYSCLK frequency
- *
- * @note This function implementation is valid only for STM32F446xx devices.
- * @note This function add the PLL/PLLR System clock source
- *
- * @note The system frequency computed by this function is not the real
- * frequency in the chip. It is calculated based on the predefined
- * constant and the selected clock source:
- * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
- * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
- * @note If SYSCLK source is PLL or PLLR, function returns values based on HSE_VALUE(**)
- * or HSI_VALUE(*) multiplied/divided by the PLL factors.
- * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 16 MHz) but the real value may vary depending on the variations
- * in voltage and temperature.
- * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 25 MHz), user has to ensure that HSE_VALUE is same as the real
- * frequency of the crystal used. Otherwise, this function may
- * have wrong result.
- *
- * @note The result of this function could be not correct when using fractional
- * value for HSE crystal.
- *
- * @note This function can be used by the user application to compute the
- * baudrate for the communication peripherals or configure other parameters.
- *
- * @note Each time SYSCLK changes, this function must be called to update the
- * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
- *
- *
- * @retval SYSCLK frequency
- */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
- uint32_t pllm = 0U;
- uint32_t pllvco = 0U;
- uint32_t pllp = 0U;
- uint32_t pllr = 0U;
- uint32_t sysclockfreq = 0U;
-
- /* Get SYSCLK source -------------------------------------------------------*/
- switch (RCC->CFGR & RCC_CFGR_SWS)
- {
- case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
- {
- sysclockfreq = HSI_VALUE;
- break;
- }
- case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
- {
- sysclockfreq = HSE_VALUE;
- break;
- }
- case RCC_CFGR_SWS_PLL: /* PLL/PLLP used as system clock source */
- {
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLP */
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
- {
- /* HSE used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
-
- sysclockfreq = pllvco/pllp;
- break;
- }
- case RCC_CFGR_SWS_PLLR: /* PLL/PLLR used as system clock source */
- {
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
- SYSCLK = PLL_VCO / PLLR */
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
- if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
- {
- /* HSE used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
- }
- pllr = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos);
-
- sysclockfreq = pllvco/pllr;
- break;
- }
- default:
- {
- sysclockfreq = HSI_VALUE;
- break;
- }
- }
- return sysclockfreq;
-}
-#endif /* STM32F446xx */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @brief Resets the RCC clock configuration to the default reset state.
- * @note The default reset state of the clock configuration is given below:
- * - HSI ON and used as system clock source
- * - HSE, PLL, PLLI2S and PLLSAI OFF
- * - AHB, APB1 and APB2 prescaler set to 1.
- * - CSS, MCO1 and MCO2 OFF
- * - All interrupts disabled
- * @note This function doesn't modify the configuration of the
- * - Peripheral clocks
- * - LSI, LSE and RTC clocks
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCC_DeInit(void)
-{
- uint32_t tickstart;
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Set HSION bit to the reset value */
- SET_BIT(RCC->CR, RCC_CR_HSION);
-
- /* Wait till HSI is ready */
- while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET)
- {
- if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Set HSITRIM[4:0] bits to the reset value */
- SET_BIT(RCC->CR, RCC_CR_HSITRIM_4);
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Reset CFGR register */
- CLEAR_REG(RCC->CFGR);
-
- /* Wait till clock switch is ready */
- while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET)
- {
- if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Clear HSEON, HSEBYP and CSSON bits */
- CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_CSSON);
-
- /* Wait till HSE is disabled */
- while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET)
- {
- if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Clear PLLON bit */
- CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
-
- /* Wait till PLL is disabled */
- while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET)
- {
- if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
-#if defined(RCC_PLLI2S_SUPPORT)
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Reset PLLI2SON bit */
- CLEAR_BIT(RCC->CR, RCC_CR_PLLI2SON);
-
- /* Wait till PLLI2S is disabled */
- while (READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) != RESET)
- {
- if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-#endif /* RCC_PLLI2S_SUPPORT */
-
-#if defined(RCC_PLLSAI_SUPPORT)
- /* Get Start Tick */
- tickstart = HAL_GetTick();
-
- /* Reset PLLSAI bit */
- CLEAR_BIT(RCC->CR, RCC_CR_PLLSAION);
-
- /* Wait till PLLSAI is disabled */
- while (READ_BIT(RCC->CR, RCC_CR_PLLSAIRDY) != RESET)
- {
- if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-#endif /* RCC_PLLSAI_SUPPORT */
-
- /* Once PLL, PLLI2S and PLLSAI are OFF, reset PLLCFGR register to default value */
-#if defined(STM32F412Cx) || defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || \
- defined(STM32F423xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
- RCC->PLLCFGR = RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLR_1;
-#elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
- RCC->PLLCFGR = RCC_PLLCFGR_PLLR_0 | RCC_PLLCFGR_PLLR_1 | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_0 | RCC_PLLCFGR_PLLQ_1 | RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLQ_3;
-#else
- RCC->PLLCFGR = RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2;
-#endif /* STM32F412Cx || STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
- /* Reset PLLI2SCFGR register to default value */
-#if defined(STM32F412Cx) || defined(STM32F412Rx) || defined(STM32F412Vx) || defined(STM32F412Zx) || defined(STM32F413xx) || \
- defined(STM32F423xx) || defined(STM32F446xx)
- RCC->PLLI2SCFGR = RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SR_1;
-#elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
- RCC->PLLI2SCFGR = RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1;
-#elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
- RCC->PLLI2SCFGR = RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SR_1;
-#elif defined(STM32F411xE)
- RCC->PLLI2SCFGR = RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1;
-#endif /* STM32F412Cx || STM32F412Rx || STM32F412Vx || STM32F412Zx || STM32F413xx || STM32F423xx || STM32F446xx */
-
- /* Reset PLLSAICFGR register */
-#if defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
- RCC->PLLSAICFGR = RCC_PLLSAICFGR_PLLSAIN_6 | RCC_PLLSAICFGR_PLLSAIN_7 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIR_1;
-#elif defined(STM32F446xx)
- RCC->PLLSAICFGR = RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIN_6 | RCC_PLLSAICFGR_PLLSAIN_7 | RCC_PLLSAICFGR_PLLSAIQ_2;
-#endif /* STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
- /* Disable all interrupts */
- CLEAR_BIT(RCC->CIR, RCC_CIR_LSIRDYIE | RCC_CIR_LSERDYIE | RCC_CIR_HSIRDYIE | RCC_CIR_HSERDYIE | RCC_CIR_PLLRDYIE);
-
-#if defined(RCC_CIR_PLLI2SRDYIE)
- CLEAR_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE);
-#endif /* RCC_CIR_PLLI2SRDYIE */
-
-#if defined(RCC_CIR_PLLSAIRDYIE)
- CLEAR_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE);
-#endif /* RCC_CIR_PLLSAIRDYIE */
-
- /* Clear all interrupt flags */
- SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR_PLLRDYC | RCC_CIR_CSSC);
-
-#if defined(RCC_CIR_PLLI2SRDYC)
- SET_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYC);
-#endif /* RCC_CIR_PLLI2SRDYC */
-
-#if defined(RCC_CIR_PLLSAIRDYC)
- SET_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYC);
-#endif /* RCC_CIR_PLLSAIRDYC */
-
- /* Clear LSION bit */
- CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
-
- /* Reset all CSR flags */
- SET_BIT(RCC->CSR, RCC_CSR_RMVF);
-
- /* Update the SystemCoreClock global variable */
- SystemCoreClock = HSI_VALUE;
-
- /* Adapt Systick interrupt period */
- if(HAL_InitTick(uwTickPrio) != HAL_OK)
- {
- return HAL_ERROR;
- }
- else
- {
- return HAL_OK;
- }
-}
-
-#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
- defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
-/**
- * @brief Initializes the RCC Oscillators according to the specified parameters in the
- * RCC_OscInitTypeDef.
- * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
- * contains the configuration information for the RCC Oscillators.
- * @note The PLL is not disabled when used as system clock.
- * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
- * supported by this API. User should request a transition to LSE Off
- * first and then LSE On or LSE Bypass.
- * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
- * supported by this API. User should request a transition to HSE Off
- * first and then HSE On or HSE Bypass.
- * @note This function add the PLL/PLLR factor management during PLL configuration this feature
- * is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- uint32_t tickstart, pll_config;
-
- /* Check Null pointer */
- if(RCC_OscInitStruct == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
- /*------------------------------- HSE Configuration ------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
- /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
-#if defined(STM32F446xx)
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
-#else
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
-#endif /* STM32F446xx */
- {
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- {
- return HAL_ERROR;
- }
- }
- else
- {
- /* Set the new HSE configuration ---------------------------------------*/
- __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
-
- /* Check the HSE State */
- if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSE is bypassed or disabled */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- }
- /*----------------------------- HSI Configuration --------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- {
- /* Check the parameters */
- assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
- assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-
- /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
-#if defined(STM32F446xx)
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
-#else
- if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
- ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
-#endif /* STM32F446xx */
- {
- /* When HSI is used as system clock it will not disabled */
- if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- {
- return HAL_ERROR;
- }
- /* Otherwise, just the calibration is allowed */
- else
- {
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- }
- }
- else
- {
- /* Check the HSI State */
- if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
- {
- /* Enable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_ENABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
- __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- }
- else
- {
- /* Disable the Internal High Speed oscillator (HSI). */
- __HAL_RCC_HSI_DISABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till HSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- }
- /*------------------------------ LSI Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- {
- /* Check the parameters */
- assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
- /* Check the LSI State */
- if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
- {
- /* Enable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_ENABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Disable the Internal Low Speed oscillator (LSI). */
- __HAL_RCC_LSI_DISABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSI is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- /*------------------------------ LSE Configuration -------------------------*/
- if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- {
- FlagStatus pwrclkchanged = RESET;
-
- /* Check the parameters */
- assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
- /* Update LSE configuration in Backup Domain control register */
- /* Requires to enable write access to Backup Domain of necessary */
- if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- {
- __HAL_RCC_PWR_CLK_ENABLE();
- pwrclkchanged = SET;
- }
-
- if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- {
- /* Enable write access to Backup domain */
- SET_BIT(PWR->CR, PWR_CR_DBP);
-
- /* Wait for Backup domain Write protection disable */
- tickstart = HAL_GetTick();
-
- while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- {
- if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Set the new LSE configuration -----------------------------------------*/
- __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- /* Check the LSE State */
- if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till LSE is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Restore clock configuration if changed */
- if(pwrclkchanged == SET)
- {
- __HAL_RCC_PWR_CLK_DISABLE();
- }
- }
- /*-------------------------------- PLL Configuration -----------------------*/
- /* Check the parameters */
- assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
- if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- {
- /* Check if the PLL is used as system clock or not */
- if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
- {
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- {
- /* Check the parameters */
- assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
- assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
- assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
- assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
- assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
- assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
-
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
-
- /* Configure the main PLL clock source, multiplication and division factors. */
- WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
- RCC_OscInitStruct->PLL.PLLM | \
- (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
- (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
- (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \
- (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)));
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- else
- {
- /* Disable the main PLL. */
- __HAL_RCC_PLL_DISABLE();
-
- /* Get Start Tick*/
- tickstart = HAL_GetTick();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- {
- if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- {
- return HAL_TIMEOUT;
- }
- }
- }
- }
- else
- {
- /* Check if there is a request to disable the PLL used as System clock source */
- if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
- {
- return HAL_ERROR;
- }
- else
- {
- /* Do not return HAL_ERROR if request repeats the current configuration */
- pll_config = RCC->PLLCFGR;
-#if defined (RCC_PLLCFGR_PLLR)
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
-#else
- if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
- (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
-#endif
- {
- return HAL_ERROR;
- }
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Configures the RCC_OscInitStruct according to the internal
- * RCC configuration registers.
- * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that will be configured.
- *
- * @note This function is only available in case of STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices.
- * @note This function add the PLL/PLLR factor management
- * @retval None
- */
-void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
-{
- /* Set all possible values for the Oscillator type parameter ---------------*/
- RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
-
- /* Get the HSE configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
- }
- else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_ON;
- }
- else
- {
- RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
- }
-
- /* Get the HSI configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
- {
- RCC_OscInitStruct->HSIState = RCC_HSI_ON;
- }
- else
- {
- RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
- }
-
- RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
-
- /* Get the LSE configuration -----------------------------------------------*/
- if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
- }
- else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_ON;
- }
- else
- {
- RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
- }
-
- /* Get the LSI configuration -----------------------------------------------*/
- if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
- {
- RCC_OscInitStruct->LSIState = RCC_LSI_ON;
- }
- else
- {
- RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
- }
-
- /* Get the PLL configuration -----------------------------------------------*/
- if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
- {
- RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
- }
- else
- {
- RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
- }
- RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
- RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
- RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
- RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1U) >> RCC_PLLCFGR_PLLP_Pos);
- RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos);
- RCC_OscInitStruct->PLL.PLLR = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos);
-}
-#endif /* STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
-
-#endif /* HAL_RCC_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c
deleted file mode 100644
index eb3f5c37ad4ff987644cfab9590912834008724f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c
+++ /dev/null
@@ -1,7621 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_tim.c
- * @author MCD Application Team
- * @brief TIM HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Timer (TIM) peripheral:
- * + TIM Time Base Initialization
- * + TIM Time Base Start
- * + TIM Time Base Start Interruption
- * + TIM Time Base Start DMA
- * + TIM Output Compare/PWM Initialization
- * + TIM Output Compare/PWM Channel Configuration
- * + TIM Output Compare/PWM Start
- * + TIM Output Compare/PWM Start Interruption
- * + TIM Output Compare/PWM Start DMA
- * + TIM Input Capture Initialization
- * + TIM Input Capture Channel Configuration
- * + TIM Input Capture Start
- * + TIM Input Capture Start Interruption
- * + TIM Input Capture Start DMA
- * + TIM One Pulse Initialization
- * + TIM One Pulse Channel Configuration
- * + TIM One Pulse Start
- * + TIM Encoder Interface Initialization
- * + TIM Encoder Interface Start
- * + TIM Encoder Interface Start Interruption
- * + TIM Encoder Interface Start DMA
- * + Commutation Event configuration with Interruption and DMA
- * + TIM OCRef clear configuration
- * + TIM External Clock configuration
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### TIMER Generic features #####
- ==============================================================================
- [..] The Timer features include:
- (#) 16-bit up, down, up/down auto-reload counter.
- (#) 16-bit programmable prescaler allowing dividing (also on the fly) the
- counter clock frequency either by any factor between 1 and 65536.
- (#) Up to 4 independent channels for:
- (++) Input Capture
- (++) Output Compare
- (++) PWM generation (Edge and Center-aligned Mode)
- (++) One-pulse mode output
- (#) Synchronization circuit to control the timer with external signals and to interconnect
- several timers together.
- (#) Supports incremental encoder for positioning purposes
-
- ##### How to use this driver #####
- ==============================================================================
- [..]
- (#) Initialize the TIM low level resources by implementing the following functions
- depending on the selected feature:
- (++) Time Base : HAL_TIM_Base_MspInit()
- (++) Input Capture : HAL_TIM_IC_MspInit()
- (++) Output Compare : HAL_TIM_OC_MspInit()
- (++) PWM generation : HAL_TIM_PWM_MspInit()
- (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
- (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
-
- (#) Initialize the TIM low level resources :
- (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
- (##) TIM pins configuration
- (+++) Enable the clock for the TIM GPIOs using the following function:
- __HAL_RCC_GPIOx_CLK_ENABLE();
- (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
-
- (#) The external Clock can be configured, if needed (the default clock is the
- internal clock from the APBx), using the following function:
- HAL_TIM_ConfigClockSource, the clock configuration should be done before
- any start function.
-
- (#) Configure the TIM in the desired functioning mode using one of the
- Initialization function of this driver:
- (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
- (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
- Output Compare signal.
- (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
- PWM signal.
- (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
- external signal.
- (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
- in One Pulse Mode.
- (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
-
- (#) Activate the TIM peripheral using one of the start functions depending from the feature used:
- (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
- (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
- (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
- (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
- (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
- (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
-
- (#) The DMA Burst is managed with the two following functions:
- HAL_TIM_DMABurst_WriteStart()
- HAL_TIM_DMABurst_ReadStart()
-
- *** Callback registration ***
- =============================================
-
- [..]
- The compilation define USE_HAL_TIM_REGISTER_CALLBACKS when set to 1
- allows the user to configure dynamically the driver callbacks.
-
- [..]
- Use Function HAL_TIM_RegisterCallback() to register a callback.
- HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle,
- the Callback ID and a pointer to the user callback function.
-
- [..]
- Use function HAL_TIM_UnRegisterCallback() to reset a callback to the default
- weak function.
- HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
- and the Callback ID.
-
- [..]
- These functions allow to register/unregister following callbacks:
- (+) Base_MspInitCallback : TIM Base Msp Init Callback.
- (+) Base_MspDeInitCallback : TIM Base Msp DeInit Callback.
- (+) IC_MspInitCallback : TIM IC Msp Init Callback.
- (+) IC_MspDeInitCallback : TIM IC Msp DeInit Callback.
- (+) OC_MspInitCallback : TIM OC Msp Init Callback.
- (+) OC_MspDeInitCallback : TIM OC Msp DeInit Callback.
- (+) PWM_MspInitCallback : TIM PWM Msp Init Callback.
- (+) PWM_MspDeInitCallback : TIM PWM Msp DeInit Callback.
- (+) OnePulse_MspInitCallback : TIM One Pulse Msp Init Callback.
- (+) OnePulse_MspDeInitCallback : TIM One Pulse Msp DeInit Callback.
- (+) Encoder_MspInitCallback : TIM Encoder Msp Init Callback.
- (+) Encoder_MspDeInitCallback : TIM Encoder Msp DeInit Callback.
- (+) HallSensor_MspInitCallback : TIM Hall Sensor Msp Init Callback.
- (+) HallSensor_MspDeInitCallback : TIM Hall Sensor Msp DeInit Callback.
- (+) PeriodElapsedCallback : TIM Period Elapsed Callback.
- (+) PeriodElapsedHalfCpltCallback : TIM Period Elapsed half complete Callback.
- (+) TriggerCallback : TIM Trigger Callback.
- (+) TriggerHalfCpltCallback : TIM Trigger half complete Callback.
- (+) IC_CaptureCallback : TIM Input Capture Callback.
- (+) IC_CaptureHalfCpltCallback : TIM Input Capture half complete Callback.
- (+) OC_DelayElapsedCallback : TIM Output Compare Delay Elapsed Callback.
- (+) PWM_PulseFinishedCallback : TIM PWM Pulse Finished Callback.
- (+) PWM_PulseFinishedHalfCpltCallback : TIM PWM Pulse Finished half complete Callback.
- (+) ErrorCallback : TIM Error Callback.
- (+) CommutationCallback : TIM Commutation Callback.
- (+) CommutationHalfCpltCallback : TIM Commutation half complete Callback.
- (+) BreakCallback : TIM Break Callback.
-
- [..]
-By default, after the Init and when the state is HAL_TIM_STATE_RESET
-all interrupt callbacks are set to the corresponding weak functions:
- examples HAL_TIM_TriggerCallback(), HAL_TIM_ErrorCallback().
-
- [..]
- Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
- functionalities in the Init / DeInit only when these callbacks are null
- (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init / DeInit
- keep and use the user MspInit / MspDeInit callbacks(registered beforehand)
-
- [..]
- Callbacks can be registered / unregistered in HAL_TIM_STATE_READY state only.
- Exception done MspInit / MspDeInit that can be registered / unregistered
- in HAL_TIM_STATE_READY or HAL_TIM_STATE_RESET state,
- thus registered(user) MspInit / DeInit callbacks can be used during the Init / DeInit.
- In that case first register the MspInit/MspDeInit user callbacks
- using HAL_TIM_RegisterCallback() before calling DeInit or Init function.
-
- [..]
- When The compilation define USE_HAL_TIM_REGISTER_CALLBACKS is set to 0 or
- not defined, the callback registration feature is not available and all callbacks
- are set to the corresponding weak functions.
-
- @endverbatim
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup TIM TIM
- * @brief TIM HAL module driver
- * @{
- */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup TIM_Private_Functions
- * @{
- */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter);
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter);
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter);
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource);
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig);
-/**
- * @}
- */
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup TIM_Exported_Functions TIM Exported Functions
- * @{
- */
-
-/** @defgroup TIM_Exported_Functions_Group1 TIM Time Base functions
- * @brief Time Base functions
- *
-@verbatim
- ==============================================================================
- ##### Time Base functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM base.
- (+) De-initialize the TIM base.
- (+) Start the Time Base.
- (+) Stop the Time Base.
- (+) Start the Time Base and enable interrupt.
- (+) Stop the Time Base and disable interrupt.
- (+) Start the Time Base and enable DMA transfer.
- (+) Stop the Time Base and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM Time base Unit according to the specified
- * parameters in the TIM_HandleTypeDef and initialize the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
-{
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->Base_MspInitCallback == NULL)
- {
- htim->Base_MspInitCallback = HAL_TIM_Base_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->Base_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- HAL_TIM_Base_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Set the Time Base configuration */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM Base peripheral
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->Base_MspDeInitCallback == NULL)
- {
- htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->Base_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_TIM_Base_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Change the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM Base MSP.
- * @param htim TIM Base handle
- * @retval None
- */
-__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_Base_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM Base MSP.
- * @param htim TIM Base handle
- * @retval None
- */
-__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_Base_MspDeInit could be implemented in the user file
- */
-}
-
-
-/**
- * @brief Starts the TIM Base generation.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- /* Check the TIM state */
- if (htim->State != HAL_TIM_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Base generation.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_READY;
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Base generation in interrupt mode.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- /* Check the TIM state */
- if (htim->State != HAL_TIM_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Enable the TIM Update interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Base generation in interrupt mode.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- /* Disable the TIM Update interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_READY;
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Base generation in DMA mode.
- * @param htim TIM Base handle
- * @param pData The source Buffer address.
- * @param Length The length of data to be transferred from memory to peripheral.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-
- /* Set the TIM state */
- if (htim->State == HAL_TIM_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (htim->State == HAL_TIM_STATE_READY)
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- htim->State = HAL_TIM_STATE_BUSY;
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- /* Set the DMA Period elapsed callbacks */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
- htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Enable the TIM Update DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Base generation in DMA mode.
- * @param htim TIM Base handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-
- /* Disable the TIM Update DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
-
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_READY;
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group2 TIM Output Compare functions
- * @brief TIM Output Compare functions
- *
-@verbatim
- ==============================================================================
- ##### TIM Output Compare functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM Output Compare.
- (+) De-initialize the TIM Output Compare.
- (+) Start the TIM Output Compare.
- (+) Stop the TIM Output Compare.
- (+) Start the TIM Output Compare and enable interrupt.
- (+) Stop the TIM Output Compare and disable interrupt.
- (+) Start the TIM Output Compare and enable DMA transfer.
- (+) Stop the TIM Output Compare and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM Output Compare according to the specified
- * parameters in the TIM_HandleTypeDef and initializes the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init()
- * @param htim TIM Output Compare handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim)
-{
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->OC_MspInitCallback == NULL)
- {
- htim->OC_MspInitCallback = HAL_TIM_OC_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->OC_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_OC_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Init the base time for the Output Compare */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM peripheral
- * @param htim TIM Output Compare handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->OC_MspDeInitCallback == NULL)
- {
- htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->OC_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_OC_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Change the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM Output Compare MSP.
- * @param htim TIM Output Compare handle
- * @retval None
- */
-__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OC_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM Output Compare MSP.
- * @param htim TIM Output Compare handle
- * @retval None
- */
-__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OC_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the TIM Output Compare signal generation.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Disable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Output Compare signal generation in interrupt mode.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Enable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation in interrupt mode.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Starts the TIM Output Compare signal generation in DMA mode.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param pData The source Buffer address.
- * @param Length The length of data to be transferred from memory to TIM peripheral
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Set the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Enable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Enable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 4 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation in DMA mode.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Output compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group3 TIM PWM functions
- * @brief TIM PWM functions
- *
-@verbatim
- ==============================================================================
- ##### TIM PWM functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM PWM.
- (+) De-initialize the TIM PWM.
- (+) Start the TIM PWM.
- (+) Stop the TIM PWM.
- (+) Start the TIM PWM and enable interrupt.
- (+) Stop the TIM PWM and disable interrupt.
- (+) Start the TIM PWM and enable DMA transfer.
- (+) Stop the TIM PWM and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM PWM Time Base according to the specified
- * parameters in the TIM_HandleTypeDef and initializes the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
- * @param htim TIM PWM handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
-{
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->PWM_MspInitCallback == NULL)
- {
- htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->PWM_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_PWM_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Init the base time for the PWM */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM peripheral
- * @param htim TIM PWM handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->PWM_MspDeInitCallback == NULL)
- {
- htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->PWM_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_PWM_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Change the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM PWM MSP.
- * @param htim TIM PWM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM PWM MSP.
- * @param htim TIM PWM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the PWM signal generation.
- * @param htim TIM handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the PWM signal generation.
- * @param htim TIM PWM handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the PWM signal generation in interrupt mode.
- * @param htim TIM PWM handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Enable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the PWM signal generation in interrupt mode.
- * @param htim TIM PWM handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Starts the TIM PWM signal generation in DMA mode.
- * @param htim TIM PWM handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param pData The source Buffer address.
- * @param Length The length of data to be transferred from memory to TIM peripheral
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Set the TIM channel state */
- if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Enable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Output Capture/Compare 3 request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 4 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM PWM signal generation in DMA mode.
- * @param htim TIM PWM handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group4 TIM Input Capture functions
- * @brief TIM Input Capture functions
- *
-@verbatim
- ==============================================================================
- ##### TIM Input Capture functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM Input Capture.
- (+) De-initialize the TIM Input Capture.
- (+) Start the TIM Input Capture.
- (+) Stop the TIM Input Capture.
- (+) Start the TIM Input Capture and enable interrupt.
- (+) Stop the TIM Input Capture and disable interrupt.
- (+) Start the TIM Input Capture and enable DMA transfer.
- (+) Stop the TIM Input Capture and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM Input Capture Time base according to the specified
- * parameters in the TIM_HandleTypeDef and initializes the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init()
- * @param htim TIM Input Capture handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
-{
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->IC_MspInitCallback == NULL)
- {
- htim->IC_MspInitCallback = HAL_TIM_IC_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->IC_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_IC_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Init the base time for the input capture */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM peripheral
- * @param htim TIM Input Capture handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->IC_MspDeInitCallback == NULL)
- {
- htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->IC_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_IC_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Change the TIM channels state */
- TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM Input Capture MSP.
- * @param htim TIM Input Capture handle
- * @retval None
- */
-__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM Input Capture MSP.
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the TIM Input Capture measurement.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpsmcr;
- HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
- HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Input Capture measurement.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Disable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Input Capture measurement in interrupt mode.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
- HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM channel state */
- if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Enable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Input Capture measurement in interrupt mode.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Starts the TIM Input Capture measurement in DMA mode.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @param pData The destination Buffer address.
- * @param Length The length of data to be transferred from TIM peripheral to memory.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
- HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
- assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
- /* Set the TIM channel state */
- if ((channel_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_state == HAL_TIM_CHANNEL_STATE_BUSY))
- {
- return HAL_BUSY;
- }
- else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY))
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- /* Enable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 4 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Input Capture measurement in DMA mode.
- * @param htim TIM Input Capture handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
- assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channel */
- TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Disable the TIM Capture/Compare 4 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group5 TIM One Pulse functions
- * @brief TIM One Pulse functions
- *
-@verbatim
- ==============================================================================
- ##### TIM One Pulse functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM One Pulse.
- (+) De-initialize the TIM One Pulse.
- (+) Start the TIM One Pulse.
- (+) Stop the TIM One Pulse.
- (+) Start the TIM One Pulse and enable interrupt.
- (+) Stop the TIM One Pulse and disable interrupt.
- (+) Start the TIM One Pulse and enable DMA transfer.
- (+) Stop the TIM One Pulse and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM One Pulse Time Base according to the specified
- * parameters in the TIM_HandleTypeDef and initializes the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init()
- * @note When the timer instance is initialized in One Pulse mode, timer
- * channels 1 and channel 2 are reserved and cannot be used for other
- * purpose.
- * @param htim TIM One Pulse handle
- * @param OnePulseMode Select the One pulse mode.
- * This parameter can be one of the following values:
- * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
- * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
-{
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_OPM_MODE(OnePulseMode));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->OnePulse_MspInitCallback == NULL)
- {
- htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->OnePulse_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_OnePulse_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Configure the Time base in the One Pulse Mode */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Reset the OPM Bit */
- htim->Instance->CR1 &= ~TIM_CR1_OPM;
-
- /* Configure the OPM Mode */
- htim->Instance->CR1 |= OnePulseMode;
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM One Pulse
- * @param htim TIM One Pulse handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->OnePulse_MspDeInitCallback == NULL)
- {
- htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->OnePulse_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_TIM_OnePulse_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM One Pulse MSP.
- * @param htim TIM One Pulse handle
- * @retval None
- */
-__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OnePulse_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM One Pulse MSP.
- * @param htim TIM One Pulse handle
- * @retval None
- */
-__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the TIM One Pulse signal generation.
- * @note Though OutputChannel parameter is deprecated and ignored by the function
- * it has been kept to avoid HAL_TIM API compatibility break.
- * @note The pulse output channel is determined when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel See note above
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Prevent unused argument(s) compilation warning */
- UNUSED(OutputChannel);
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Capture compare and the Input Capture channels
- (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
- if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
- if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
- whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
-
- No need to enable the counter, it's enabled automatically by hardware
- (the counter starts in response to a stimulus and generate a pulse */
-
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM One Pulse signal generation.
- * @note Though OutputChannel parameter is deprecated and ignored by the function
- * it has been kept to avoid HAL_TIM API compatibility break.
- * @note The pulse output channel is determined when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel See note above
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(OutputChannel);
-
- /* Disable the Capture compare and the Input Capture channels
- (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
- if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
- if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
- whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
-
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM One Pulse signal generation in interrupt mode.
- * @note Though OutputChannel parameter is deprecated and ignored by the function
- * it has been kept to avoid HAL_TIM API compatibility break.
- * @note The pulse output channel is determined when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel See note above
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Prevent unused argument(s) compilation warning */
- UNUSED(OutputChannel);
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Capture compare and the Input Capture channels
- (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
- if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
- if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
- whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
-
- No need to enable the counter, it's enabled automatically by hardware
- (the counter starts in response to a stimulus and generate a pulse */
-
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Enable the main output */
- __HAL_TIM_MOE_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM One Pulse signal generation in interrupt mode.
- * @note Though OutputChannel parameter is deprecated and ignored by the function
- * it has been kept to avoid HAL_TIM API compatibility break.
- * @note The pulse output channel is determined when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel See note above
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(OutputChannel);
-
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-
- /* Disable the Capture compare and the Input Capture channels
- (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
- if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
- if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
- whatever the combination, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
- {
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions
- * @brief TIM Encoder functions
- *
-@verbatim
- ==============================================================================
- ##### TIM Encoder functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure the TIM Encoder.
- (+) De-initialize the TIM Encoder.
- (+) Start the TIM Encoder.
- (+) Stop the TIM Encoder.
- (+) Start the TIM Encoder and enable interrupt.
- (+) Stop the TIM Encoder and disable interrupt.
- (+) Start the TIM Encoder and enable DMA transfer.
- (+) Stop the TIM Encoder and disable DMA transfer.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM Encoder Interface and initialize the associated handle.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init()
- * @note Encoder mode and External clock mode 2 are not compatible and must not be selected together
- * Ex: A call for @ref HAL_TIM_Encoder_Init will erase the settings of @ref HAL_TIM_ConfigClockSource
- * using TIM_CLOCKSOURCE_ETRMODE2 and vice versa
- * @note When the timer instance is initialized in Encoder mode, timer
- * channels 1 and channel 2 are reserved and cannot be used for other
- * purpose.
- * @param htim TIM Encoder Interface handle
- * @param sConfig TIM Encoder Interface configuration structure
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
-{
- uint32_t tmpsmcr;
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
- assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
- assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
- assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity));
- assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
- assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
- assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy weak callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->Encoder_MspInitCallback == NULL)
- {
- htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->Encoder_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIM_Encoder_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Reset the SMS and ECE bits */
- htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE);
-
- /* Configure the Time base in the Encoder Mode */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
-
- /* Get the TIMx CCMR1 register value */
- tmpccmr1 = htim->Instance->CCMR1;
-
- /* Get the TIMx CCER register value */
- tmpccer = htim->Instance->CCER;
-
- /* Set the encoder Mode */
- tmpsmcr |= sConfig->EncoderMode;
-
- /* Select the Capture Compare 1 and the Capture Compare 2 as input */
- tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
- tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
-
- /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
- tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
- tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
- tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
- tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
-
- /* Set the TI1 and the TI2 Polarities */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
- tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
- tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
-
- /* Write to TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
-
- /* Write to TIMx CCMR1 */
- htim->Instance->CCMR1 = tmpccmr1;
-
- /* Write to TIMx CCER */
- htim->Instance->CCER = tmpccer;
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-
-/**
- * @brief DeInitializes the TIM Encoder interface
- * @param htim TIM Encoder Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->Encoder_MspDeInitCallback == NULL)
- {
- htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->Encoder_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_TIM_Encoder_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM Encoder Interface MSP.
- * @param htim TIM Encoder Interface handle
- * @retval None
- */
-__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_Encoder_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM Encoder Interface MSP.
- * @param htim TIM Encoder Interface handle
- * @retval None
- */
-__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the TIM Encoder Interface.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Set the TIM channel(s) state */
- if (Channel == TIM_CHANNEL_1)
- {
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
-
- /* Enable the encoder interface channels */
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- break;
- }
-
- default :
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- break;
- }
- }
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Encoder Interface.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channels 1 and 2
- (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
- break;
- }
-
- default :
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
- break;
- }
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel(s) state */
- if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2))
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Encoder Interface in interrupt mode.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Set the TIM channel(s) state */
- if (Channel == TIM_CHANNEL_1)
- {
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
-
- /* Enable the encoder interface channels */
- /* Enable the capture compare Interrupts 1 and/or 2 */
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- default :
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
- }
-
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Encoder Interface in interrupt mode.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channels 1 and 2
- (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
- if (Channel == TIM_CHANNEL_1)
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
- /* Disable the capture compare Interrupts 1 */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- /* Disable the capture compare Interrupts 2 */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- }
- else
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- /* Disable the capture compare Interrupts 1 and 2 */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel(s) state */
- if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2))
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Encoder Interface in DMA mode.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @param pData1 The destination Buffer address for IC1.
- * @param pData2 The destination Buffer address for IC2.
- * @param Length The length of data to be transferred from TIM peripheral to memory.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1,
- uint32_t *pData2, uint16_t Length)
-{
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Set the TIM channel(s) state */
- if (Channel == TIM_CHANNEL_1)
- {
- if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
- {
- return HAL_BUSY;
- }
- else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
- {
- if ((pData1 == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- if ((channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY))
- {
- return HAL_BUSY;
- }
- else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
- {
- if ((pData2 == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
- }
- else
- {
- if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_BUSY))
- {
- return HAL_BUSY;
- }
- else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
- && (channel_2_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
- {
- if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
- }
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Input Capture DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError;
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Input Capture DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- break;
- }
-
- default:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
-
- /* Enable the TIM Input Capture DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- /* Enable the TIM Input Capture DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-
- /* Enable the Capture compare channel */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral */
- __HAL_TIM_ENABLE(htim);
-
- break;
- }
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Encoder Interface in DMA mode.
- * @param htim TIM Encoder Interface handle
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channels 1 and 2
- (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
- if (Channel == TIM_CHANNEL_1)
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
- /* Disable the capture compare DMA Request 1 */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- /* Disable the capture compare DMA Request 2 */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- }
- else
- {
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
- /* Disable the capture compare DMA Request 1 and 2 */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- }
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel(s) state */
- if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2))
- {
- TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management
- * @brief TIM IRQ handler management
- *
-@verbatim
- ==============================================================================
- ##### IRQ handler management #####
- ==============================================================================
- [..]
- This section provides Timer IRQ handler function.
-
-@endverbatim
- * @{
- */
-/**
- * @brief This function handles TIM interrupts requests.
- * @param htim TIM handle
- * @retval None
- */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
-{
- /* Capture compare 1 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
- {
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Output compare event */
- else
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- }
- }
- }
- /* Capture compare 2 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- /* Input capture event */
- if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Output compare event */
- else
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- }
- }
- /* Capture compare 3 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Output compare event */
- else
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- }
- }
- /* Capture compare 4 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- /* Input capture event */
- if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- /* Output compare event */
- else
- {
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->OC_DelayElapsedCallback(htim);
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_OC_DelayElapsedCallback(htim);
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- }
- }
- /* TIM Update event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PeriodElapsedCallback(htim);
-#else
- HAL_TIM_PeriodElapsedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Break input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->BreakCallback(htim);
-#else
- HAL_TIMEx_BreakCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM Trigger detection event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->TriggerCallback(htim);
-#else
- HAL_TIM_TriggerCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
- /* TIM commutation event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
- {
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
- {
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->CommutationCallback(htim);
-#else
- HAL_TIMEx_CommutCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
- }
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions
- * @brief TIM Peripheral Control functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral Control functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
- (+) Configure External Clock source.
- (+) Configure Complementary channels, break features and dead time.
- (+) Configure Master and the Slave synchronization.
- (+) Configure the DMA Burst Mode.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Initializes the TIM Output Compare Channels according to the specified
- * parameters in the TIM_OC_InitTypeDef.
- * @param htim TIM Output Compare handle
- * @param sConfig TIM Output Compare configuration structure
- * @param Channel TIM Channels to configure
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
- TIM_OC_InitTypeDef *sConfig,
- uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CHANNELS(Channel));
- assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
- assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- /* Configure the TIM Channel 1 in Output Compare */
- TIM_OC1_SetConfig(htim->Instance, sConfig);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- /* Configure the TIM Channel 2 in Output Compare */
- TIM_OC2_SetConfig(htim->Instance, sConfig);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
- /* Configure the TIM Channel 3 in Output Compare */
- TIM_OC3_SetConfig(htim->Instance, sConfig);
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
- /* Configure the TIM Channel 4 in Output Compare */
- TIM_OC4_SetConfig(htim->Instance, sConfig);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Initializes the TIM Input Capture Channels according to the specified
- * parameters in the TIM_IC_InitTypeDef.
- * @param htim TIM IC handle
- * @param sConfig TIM Input Capture configuration structure
- * @param Channel TIM Channel to configure
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
- assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
- assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- if (Channel == TIM_CHANNEL_1)
- {
- /* TI1 Configuration */
- TIM_TI1_SetConfig(htim->Instance,
- sConfig->ICPolarity,
- sConfig->ICSelection,
- sConfig->ICFilter);
-
- /* Reset the IC1PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
- /* Set the IC1PSC value */
- htim->Instance->CCMR1 |= sConfig->ICPrescaler;
- }
- else if (Channel == TIM_CHANNEL_2)
- {
- /* TI2 Configuration */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- TIM_TI2_SetConfig(htim->Instance,
- sConfig->ICPolarity,
- sConfig->ICSelection,
- sConfig->ICFilter);
-
- /* Reset the IC2PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
- /* Set the IC2PSC value */
- htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U);
- }
- else if (Channel == TIM_CHANNEL_3)
- {
- /* TI3 Configuration */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
- TIM_TI3_SetConfig(htim->Instance,
- sConfig->ICPolarity,
- sConfig->ICSelection,
- sConfig->ICFilter);
-
- /* Reset the IC3PSC Bits */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
-
- /* Set the IC3PSC value */
- htim->Instance->CCMR2 |= sConfig->ICPrescaler;
- }
- else if (Channel == TIM_CHANNEL_4)
- {
- /* TI4 Configuration */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
- TIM_TI4_SetConfig(htim->Instance,
- sConfig->ICPolarity,
- sConfig->ICSelection,
- sConfig->ICFilter);
-
- /* Reset the IC4PSC Bits */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
-
- /* Set the IC4PSC value */
- htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U);
- }
- else
- {
- status = HAL_ERROR;
- }
-
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Initializes the TIM PWM channels according to the specified
- * parameters in the TIM_OC_InitTypeDef.
- * @param htim TIM PWM handle
- * @param sConfig TIM PWM configuration structure
- * @param Channel TIM Channels to be configured
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
- TIM_OC_InitTypeDef *sConfig,
- uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CHANNELS(Channel));
- assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
- assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
- assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- /* Configure the Channel 1 in PWM mode */
- TIM_OC1_SetConfig(htim->Instance, sConfig);
-
- /* Set the Preload enable bit for channel1 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
- htim->Instance->CCMR1 |= sConfig->OCFastMode;
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- /* Configure the Channel 2 in PWM mode */
- TIM_OC2_SetConfig(htim->Instance, sConfig);
-
- /* Set the Preload enable bit for channel2 */
- htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
- htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
- /* Configure the Channel 3 in PWM mode */
- TIM_OC3_SetConfig(htim->Instance, sConfig);
-
- /* Set the Preload enable bit for channel3 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
- htim->Instance->CCMR2 |= sConfig->OCFastMode;
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
- /* Configure the Channel 4 in PWM mode */
- TIM_OC4_SetConfig(htim->Instance, sConfig);
-
- /* Set the Preload enable bit for channel4 */
- htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
-
- /* Configure the Output Fast mode */
- htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
- htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Initializes the TIM One Pulse Channels according to the specified
- * parameters in the TIM_OnePulse_InitTypeDef.
- * @param htim TIM One Pulse handle
- * @param sConfig TIM One Pulse configuration structure
- * @param OutputChannel TIM output channel to configure
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @param InputChannel TIM input Channel to configure
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @note To output a waveform with a minimum delay user can enable the fast
- * mode by calling the @ref __HAL_TIM_ENABLE_OCxFAST macro. Then CCx
- * output is forced in response to the edge detection on TIx input,
- * without taking in account the comparison.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
- uint32_t OutputChannel, uint32_t InputChannel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- TIM_OC_InitTypeDef temp1;
-
- /* Check the parameters */
- assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
- assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
-
- if (OutputChannel != InputChannel)
- {
- /* Process Locked */
- __HAL_LOCK(htim);
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Extract the Output compare configuration from sConfig structure */
- temp1.OCMode = sConfig->OCMode;
- temp1.Pulse = sConfig->Pulse;
- temp1.OCPolarity = sConfig->OCPolarity;
- temp1.OCNPolarity = sConfig->OCNPolarity;
- temp1.OCIdleState = sConfig->OCIdleState;
- temp1.OCNIdleState = sConfig->OCNIdleState;
-
- switch (OutputChannel)
- {
- case TIM_CHANNEL_1:
- {
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- TIM_OC1_SetConfig(htim->Instance, &temp1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- TIM_OC2_SetConfig(htim->Instance, &temp1);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- switch (InputChannel)
- {
- case TIM_CHANNEL_1:
- {
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
- sConfig->ICSelection, sConfig->ICFilter);
-
- /* Reset the IC1PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
- /* Select the Trigger source */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= TIM_TS_TI1FP1;
-
- /* Select the Slave Mode */
- htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
- sConfig->ICSelection, sConfig->ICFilter);
-
- /* Reset the IC2PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
- /* Select the Trigger source */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= TIM_TS_TI2FP2;
-
- /* Select the Slave Mode */
- htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
- }
-
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return status;
- }
- else
- {
- return HAL_ERROR;
- }
-}
-
-/**
- * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
- * @param htim TIM handle
- * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write
- * This parameter can be one of the following values:
- * @arg TIM_DMABASE_CR1
- * @arg TIM_DMABASE_CR2
- * @arg TIM_DMABASE_SMCR
- * @arg TIM_DMABASE_DIER
- * @arg TIM_DMABASE_SR
- * @arg TIM_DMABASE_EGR
- * @arg TIM_DMABASE_CCMR1
- * @arg TIM_DMABASE_CCMR2
- * @arg TIM_DMABASE_CCER
- * @arg TIM_DMABASE_CNT
- * @arg TIM_DMABASE_PSC
- * @arg TIM_DMABASE_ARR
- * @arg TIM_DMABASE_RCR
- * @arg TIM_DMABASE_CCR1
- * @arg TIM_DMABASE_CCR2
- * @arg TIM_DMABASE_CCR3
- * @arg TIM_DMABASE_CCR4
- * @arg TIM_DMABASE_BDTR
- * @param BurstRequestSrc TIM DMA Request sources
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: TIM update Interrupt source
- * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
- * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
- * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
- * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
- * @arg TIM_DMA_COM: TIM Commutation DMA source
- * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
- * @param BurstBuffer The Buffer address.
- * @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
- * @note This function should be used only when BurstLength is equal to DMA data transfer length.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
-{
- HAL_StatusTypeDef status;
-
- status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
- ((BurstLength) >> 8U) + 1U);
-
-
-
- return status;
-}
-
-/**
- * @brief Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral
- * @param htim TIM handle
- * @param BurstBaseAddress TIM Base address from where the DMA will start the Data write
- * This parameter can be one of the following values:
- * @arg TIM_DMABASE_CR1
- * @arg TIM_DMABASE_CR2
- * @arg TIM_DMABASE_SMCR
- * @arg TIM_DMABASE_DIER
- * @arg TIM_DMABASE_SR
- * @arg TIM_DMABASE_EGR
- * @arg TIM_DMABASE_CCMR1
- * @arg TIM_DMABASE_CCMR2
- * @arg TIM_DMABASE_CCER
- * @arg TIM_DMABASE_CNT
- * @arg TIM_DMABASE_PSC
- * @arg TIM_DMABASE_ARR
- * @arg TIM_DMABASE_RCR
- * @arg TIM_DMABASE_CCR1
- * @arg TIM_DMABASE_CCR2
- * @arg TIM_DMABASE_CCR3
- * @arg TIM_DMABASE_CCR4
- * @arg TIM_DMABASE_BDTR
- * @param BurstRequestSrc TIM DMA Request sources
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: TIM update Interrupt source
- * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
- * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
- * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
- * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
- * @arg TIM_DMA_COM: TIM Commutation DMA source
- * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
- * @param BurstBuffer The Buffer address.
- * @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
- * @param DataLength Data length. This parameter can be one value
- * between 1 and 0xFFFF.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
- uint32_t BurstLength, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
- assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
- assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
- assert_param(IS_TIM_DMA_LENGTH(BurstLength));
- assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
-
- if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY)
- {
- if ((BurstBuffer == NULL) && (BurstLength > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY;
- }
- }
- else
- {
- /* nothing to do */
- }
-
- switch (BurstRequestSrc)
- {
- case TIM_DMA_UPDATE:
- {
- /* Set the DMA Period elapsed callbacks */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
- htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC1:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC2:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC3:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC4:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
- htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_COM:
- {
- /* Set the DMA commutation callbacks */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_TRIGGER:
- {
- /* Set the DMA trigger callbacks */
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer,
- (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Configure the DMA Burst Mode */
- htim->Instance->DCR = (BurstBaseAddress | BurstLength);
- /* Enable the TIM DMA Request */
- __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM DMA Burst mode
- * @param htim TIM handle
- * @param BurstRequestSrc TIM DMA Request sources to disable
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-
- /* Abort the DMA transfer (at least disable the DMA stream) */
- switch (BurstRequestSrc)
- {
- case TIM_DMA_UPDATE:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]);
- break;
- }
- case TIM_DMA_CC1:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
- case TIM_DMA_CC2:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
- case TIM_DMA_CC3:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
- case TIM_DMA_CC4:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
- break;
- }
- case TIM_DMA_COM:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]);
- break;
- }
- case TIM_DMA_TRIGGER:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]);
- break;
- }
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the TIM Update DMA request */
- __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
- * @param htim TIM handle
- * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read
- * This parameter can be one of the following values:
- * @arg TIM_DMABASE_CR1
- * @arg TIM_DMABASE_CR2
- * @arg TIM_DMABASE_SMCR
- * @arg TIM_DMABASE_DIER
- * @arg TIM_DMABASE_SR
- * @arg TIM_DMABASE_EGR
- * @arg TIM_DMABASE_CCMR1
- * @arg TIM_DMABASE_CCMR2
- * @arg TIM_DMABASE_CCER
- * @arg TIM_DMABASE_CNT
- * @arg TIM_DMABASE_PSC
- * @arg TIM_DMABASE_ARR
- * @arg TIM_DMABASE_RCR
- * @arg TIM_DMABASE_CCR1
- * @arg TIM_DMABASE_CCR2
- * @arg TIM_DMABASE_CCR3
- * @arg TIM_DMABASE_CCR4
- * @arg TIM_DMABASE_BDTR
- * @param BurstRequestSrc TIM DMA Request sources
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: TIM update Interrupt source
- * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
- * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
- * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
- * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
- * @arg TIM_DMA_COM: TIM Commutation DMA source
- * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
- * @param BurstBuffer The Buffer address.
- * @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
- * @note This function should be used only when BurstLength is equal to DMA data transfer length.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
-{
- HAL_StatusTypeDef status;
-
- status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength,
- ((BurstLength) >> 8U) + 1U);
-
-
- return status;
-}
-
-/**
- * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
- * @param htim TIM handle
- * @param BurstBaseAddress TIM Base address from where the DMA will start the Data read
- * This parameter can be one of the following values:
- * @arg TIM_DMABASE_CR1
- * @arg TIM_DMABASE_CR2
- * @arg TIM_DMABASE_SMCR
- * @arg TIM_DMABASE_DIER
- * @arg TIM_DMABASE_SR
- * @arg TIM_DMABASE_EGR
- * @arg TIM_DMABASE_CCMR1
- * @arg TIM_DMABASE_CCMR2
- * @arg TIM_DMABASE_CCER
- * @arg TIM_DMABASE_CNT
- * @arg TIM_DMABASE_PSC
- * @arg TIM_DMABASE_ARR
- * @arg TIM_DMABASE_RCR
- * @arg TIM_DMABASE_CCR1
- * @arg TIM_DMABASE_CCR2
- * @arg TIM_DMABASE_CCR3
- * @arg TIM_DMABASE_CCR4
- * @arg TIM_DMABASE_BDTR
- * @param BurstRequestSrc TIM DMA Request sources
- * This parameter can be one of the following values:
- * @arg TIM_DMA_UPDATE: TIM update Interrupt source
- * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
- * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
- * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
- * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
- * @arg TIM_DMA_COM: TIM Commutation DMA source
- * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
- * @param BurstBuffer The Buffer address.
- * @param BurstLength DMA Burst length. This parameter can be one value
- * between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
- * @param DataLength Data length. This parameter can be one value
- * between 1 and 0xFFFF.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
- uint32_t BurstLength, uint32_t DataLength)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
- assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
- assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
- assert_param(IS_TIM_DMA_LENGTH(BurstLength));
- assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
-
- if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY)
- {
- if ((BurstBuffer == NULL) && (BurstLength > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY;
- }
- }
- else
- {
- /* nothing to do */
- }
- switch (BurstRequestSrc)
- {
- case TIM_DMA_UPDATE:
- {
- /* Set the DMA Period elapsed callbacks */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
- htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC1:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC2:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC3:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_CC4:
- {
- /* Set the DMA capture callbacks */
- htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_COM:
- {
- /* Set the DMA commutation callbacks */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- case TIM_DMA_TRIGGER:
- {
- /* Set the DMA trigger callbacks */
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
- DataLength) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- break;
- }
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Configure the DMA Burst Mode */
- htim->Instance->DCR = (BurstBaseAddress | BurstLength);
-
- /* Enable the TIM DMA Request */
- __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stop the DMA burst reading
- * @param htim TIM handle
- * @param BurstRequestSrc TIM DMA Request sources to disable.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-
- /* Abort the DMA transfer (at least disable the DMA stream) */
- switch (BurstRequestSrc)
- {
- case TIM_DMA_UPDATE:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_UPDATE]);
- break;
- }
- case TIM_DMA_CC1:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
- case TIM_DMA_CC2:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
- case TIM_DMA_CC3:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
- case TIM_DMA_CC4:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
- break;
- }
- case TIM_DMA_COM:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_COMMUTATION]);
- break;
- }
- case TIM_DMA_TRIGGER:
- {
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_TRIGGER]);
- break;
- }
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the TIM Update DMA request */
- __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Generate a software event
- * @param htim TIM handle
- * @param EventSource specifies the event source.
- * This parameter can be one of the following values:
- * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source
- * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
- * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source
- * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source
- * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source
- * @arg TIM_EVENTSOURCE_COM: Timer COM event source
- * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source
- * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source
- * @note Basic timers can only generate an update event.
- * @note TIM_EVENTSOURCE_COM is relevant only with advanced timer instances.
- * @note TIM_EVENTSOURCE_BREAK are relevant only for timer instances
- * supporting a break input.
- * @retval HAL status
- */
-
-HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- assert_param(IS_TIM_EVENT_SOURCE(EventSource));
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- /* Change the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Set the event sources */
- htim->Instance->EGR = EventSource;
-
- /* Change the TIM state */
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Configures the OCRef clear feature
- * @param htim TIM handle
- * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that
- * contains the OCREF clear feature and parameters for the TIM peripheral.
- * @param Channel specifies the TIM Channel
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @arg TIM_CHANNEL_4: TIM Channel 4
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
- TIM_ClearInputConfigTypeDef *sClearInputConfig,
- uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
- assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- switch (sClearInputConfig->ClearInputSource)
- {
- case TIM_CLEARINPUTSOURCE_NONE:
- {
- /* Clear the OCREF clear selection bit and the the ETR Bits */
- CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP));
- break;
- }
-
- case TIM_CLEARINPUTSOURCE_ETR:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
- assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
- assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
-
- /* When OCRef clear feature is used with ETR source, ETR prescaler must be off */
- if (sClearInputConfig->ClearInputPrescaler != TIM_CLEARINPUTPRESCALER_DIV1)
- {
- htim->State = HAL_TIM_STATE_READY;
- __HAL_UNLOCK(htim);
- return HAL_ERROR;
- }
-
- TIM_ETR_SetConfig(htim->Instance,
- sClearInputConfig->ClearInputPrescaler,
- sClearInputConfig->ClearInputPolarity,
- sClearInputConfig->ClearInputFilter);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 1 */
- SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 1 */
- CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
- }
- break;
- }
- case TIM_CHANNEL_2:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 2 */
- SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 2 */
- CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
- }
- break;
- }
- case TIM_CHANNEL_3:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 3 */
- SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 3 */
- CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
- }
- break;
- }
- case TIM_CHANNEL_4:
- {
- if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
- {
- /* Enable the OCREF clear feature for Channel 4 */
- SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
- }
- else
- {
- /* Disable the OCREF clear feature for Channel 4 */
- CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
- }
- break;
- }
- default:
- break;
- }
- }
-
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Configures the clock source to be used
- * @param htim TIM handle
- * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
- * contains the clock source information for the TIM peripheral.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Process Locked */
- __HAL_LOCK(htim);
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Check the parameters */
- assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
-
- /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
- tmpsmcr = htim->Instance->SMCR;
- tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- htim->Instance->SMCR = tmpsmcr;
-
- switch (sClockSourceConfig->ClockSource)
- {
- case TIM_CLOCKSOURCE_INTERNAL:
- {
- assert_param(IS_TIM_INSTANCE(htim->Instance));
- break;
- }
-
- case TIM_CLOCKSOURCE_ETRMODE1:
- {
- /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
- assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
-
- /* Check ETR input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
- /* Configure the ETR Clock source */
- TIM_ETR_SetConfig(htim->Instance,
- sClockSourceConfig->ClockPrescaler,
- sClockSourceConfig->ClockPolarity,
- sClockSourceConfig->ClockFilter);
-
- /* Select the External clock mode1 and the ETRF trigger */
- tmpsmcr = htim->Instance->SMCR;
- tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
- /* Write to TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- break;
- }
-
- case TIM_CLOCKSOURCE_ETRMODE2:
- {
- /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
- assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
-
- /* Check ETR input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
- /* Configure the ETR Clock source */
- TIM_ETR_SetConfig(htim->Instance,
- sClockSourceConfig->ClockPrescaler,
- sClockSourceConfig->ClockPolarity,
- sClockSourceConfig->ClockFilter);
- /* Enable the External clock mode2 */
- htim->Instance->SMCR |= TIM_SMCR_ECE;
- break;
- }
-
- case TIM_CLOCKSOURCE_TI1:
- {
- /* Check whether or not the timer instance supports external clock mode 1 */
- assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
- /* Check TI1 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
- TIM_TI1_ConfigInputStage(htim->Instance,
- sClockSourceConfig->ClockPolarity,
- sClockSourceConfig->ClockFilter);
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
- break;
- }
-
- case TIM_CLOCKSOURCE_TI2:
- {
- /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
- assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
- /* Check TI2 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
- TIM_TI2_ConfigInputStage(htim->Instance,
- sClockSourceConfig->ClockPolarity,
- sClockSourceConfig->ClockFilter);
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
- break;
- }
-
- case TIM_CLOCKSOURCE_TI1ED:
- {
- /* Check whether or not the timer instance supports external clock mode 1 */
- assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
- /* Check TI1 input conditioning related parameters */
- assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
- assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
- TIM_TI1_ConfigInputStage(htim->Instance,
- sClockSourceConfig->ClockPolarity,
- sClockSourceConfig->ClockFilter);
- TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
- break;
- }
-
- case TIM_CLOCKSOURCE_ITR0:
- case TIM_CLOCKSOURCE_ITR1:
- case TIM_CLOCKSOURCE_ITR2:
- case TIM_CLOCKSOURCE_ITR3:
- {
- /* Check whether or not the timer instance supports internal trigger input */
- assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
-
- TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Selects the signal connected to the TI1 input: direct from CH1_input
- * or a XOR combination between CH1_input, CH2_input & CH3_input
- * @param htim TIM handle.
- * @param TI1_Selection Indicate whether or not channel 1 is connected to the
- * output of a XOR gate.
- * This parameter can be one of the following values:
- * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
- * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
- * pins are connected to the TI1 input (XOR combination)
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
-{
- uint32_t tmpcr2;
-
- /* Check the parameters */
- assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
-
- /* Get the TIMx CR2 register value */
- tmpcr2 = htim->Instance->CR2;
-
- /* Reset the TI1 selection */
- tmpcr2 &= ~TIM_CR2_TI1S;
-
- /* Set the TI1 selection */
- tmpcr2 |= TI1_Selection;
-
- /* Write to TIMxCR2 */
- htim->Instance->CR2 = tmpcr2;
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the TIM in Slave mode
- * @param htim TIM handle.
- * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that
- * contains the selected trigger (internal trigger input, filtered
- * timer input or external trigger input) and the Slave mode
- * (Disable, Reset, Gated, Trigger, External clock mode 1).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
-{
- /* Check the parameters */
- assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
- assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
- assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
- __HAL_LOCK(htim);
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK)
- {
- htim->State = HAL_TIM_STATE_READY;
- __HAL_UNLOCK(htim);
- return HAL_ERROR;
- }
-
- /* Disable Trigger Interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
-
- /* Disable Trigger DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the TIM in Slave mode in interrupt mode
- * @param htim TIM handle.
- * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that
- * contains the selected trigger (internal trigger input, filtered
- * timer input or external trigger input) and the Slave mode
- * (Disable, Reset, Gated, Trigger, External clock mode 1).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig)
-{
- /* Check the parameters */
- assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
- assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
- assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
- __HAL_LOCK(htim);
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- if (TIM_SlaveTimer_SetConfig(htim, sSlaveConfig) != HAL_OK)
- {
- htim->State = HAL_TIM_STATE_READY;
- __HAL_UNLOCK(htim);
- return HAL_ERROR;
- }
-
- /* Enable Trigger Interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
-
- /* Disable Trigger DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Read the captured value from Capture Compare unit
- * @param htim TIM handle.
- * @param Channel TIM Channels to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @arg TIM_CHANNEL_4: TIM Channel 4 selected
- * @retval Captured value
- */
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpreg = 0U;
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
- /* Return the capture 1 value */
- tmpreg = htim->Instance->CCR1;
-
- break;
- }
- case TIM_CHANNEL_2:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
- /* Return the capture 2 value */
- tmpreg = htim->Instance->CCR2;
-
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
- /* Return the capture 3 value */
- tmpreg = htim->Instance->CCR3;
-
- break;
- }
-
- case TIM_CHANNEL_4:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
- /* Return the capture 4 value */
- tmpreg = htim->Instance->CCR4;
-
- break;
- }
-
- default:
- break;
- }
-
- return tmpreg;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
- * @brief TIM Callbacks functions
- *
-@verbatim
- ==============================================================================
- ##### TIM Callbacks functions #####
- ==============================================================================
- [..]
- This section provides TIM callback functions:
- (+) TIM Period elapsed callback
- (+) TIM Output Compare callback
- (+) TIM Input capture callback
- (+) TIM Trigger callback
- (+) TIM Error callback
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Period elapsed callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Period elapsed half complete callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_PeriodElapsedHalfCpltCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PeriodElapsedHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Output Compare callback in non-blocking mode
- * @param htim TIM OC handle
- * @retval None
- */
-__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Input Capture callback in non-blocking mode
- * @param htim TIM IC handle
- * @retval None
- */
-__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_CaptureCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Input Capture half complete callback in non-blocking mode
- * @param htim TIM IC handle
- * @retval None
- */
-__weak void HAL_TIM_IC_CaptureHalfCpltCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_IC_CaptureHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief PWM Pulse finished callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief PWM Pulse finished half complete callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_PWM_PulseFinishedHalfCpltCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_PWM_PulseFinishedHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Hall Trigger detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_TriggerCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Hall Trigger detection half complete callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_TriggerHalfCpltCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_TriggerHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Timer error callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIM_ErrorCallback could be implemented in the user file
- */
-}
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-/**
- * @brief Register a User TIM callback to be used instead of the weak predefined callback
- * @param htim tim handle
- * @param CallbackID ID of the callback to be registered
- * This parameter can be one of the following values:
- * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID
- * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID
- * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID
- * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID
- * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID
- * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID
- * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID
- * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID
- * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID
- * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID
- * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID
- * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID
- * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID
- * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID
- * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID
- * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID
- * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID
- * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID
- * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID
- * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID
- * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID
- * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID
- * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callback ID
- * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID
- * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID
- * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID
- * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID
- * @param pCallback pointer to the callback function
- * @retval status
- */
-HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID,
- pTIM_CallbackTypeDef pCallback)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if (pCallback == NULL)
- {
- return HAL_ERROR;
- }
- /* Process locked */
- __HAL_LOCK(htim);
-
- if (htim->State == HAL_TIM_STATE_READY)
- {
- switch (CallbackID)
- {
- case HAL_TIM_BASE_MSPINIT_CB_ID :
- htim->Base_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_BASE_MSPDEINIT_CB_ID :
- htim->Base_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_IC_MSPINIT_CB_ID :
- htim->IC_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_IC_MSPDEINIT_CB_ID :
- htim->IC_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_OC_MSPINIT_CB_ID :
- htim->OC_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_OC_MSPDEINIT_CB_ID :
- htim->OC_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_MSPINIT_CB_ID :
- htim->PWM_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_MSPDEINIT_CB_ID :
- htim->PWM_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID :
- htim->OnePulse_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID :
- htim->OnePulse_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_ENCODER_MSPINIT_CB_ID :
- htim->Encoder_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_ENCODER_MSPDEINIT_CB_ID :
- htim->Encoder_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID :
- htim->HallSensor_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID :
- htim->HallSensor_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_PERIOD_ELAPSED_CB_ID :
- htim->PeriodElapsedCallback = pCallback;
- break;
-
- case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID :
- htim->PeriodElapsedHalfCpltCallback = pCallback;
- break;
-
- case HAL_TIM_TRIGGER_CB_ID :
- htim->TriggerCallback = pCallback;
- break;
-
- case HAL_TIM_TRIGGER_HALF_CB_ID :
- htim->TriggerHalfCpltCallback = pCallback;
- break;
-
- case HAL_TIM_IC_CAPTURE_CB_ID :
- htim->IC_CaptureCallback = pCallback;
- break;
-
- case HAL_TIM_IC_CAPTURE_HALF_CB_ID :
- htim->IC_CaptureHalfCpltCallback = pCallback;
- break;
-
- case HAL_TIM_OC_DELAY_ELAPSED_CB_ID :
- htim->OC_DelayElapsedCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_PULSE_FINISHED_CB_ID :
- htim->PWM_PulseFinishedCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID :
- htim->PWM_PulseFinishedHalfCpltCallback = pCallback;
- break;
-
- case HAL_TIM_ERROR_CB_ID :
- htim->ErrorCallback = pCallback;
- break;
-
- case HAL_TIM_COMMUTATION_CB_ID :
- htim->CommutationCallback = pCallback;
- break;
-
- case HAL_TIM_COMMUTATION_HALF_CB_ID :
- htim->CommutationHalfCpltCallback = pCallback;
- break;
-
- case HAL_TIM_BREAK_CB_ID :
- htim->BreakCallback = pCallback;
- break;
-
- default :
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (htim->State == HAL_TIM_STATE_RESET)
- {
- switch (CallbackID)
- {
- case HAL_TIM_BASE_MSPINIT_CB_ID :
- htim->Base_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_BASE_MSPDEINIT_CB_ID :
- htim->Base_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_IC_MSPINIT_CB_ID :
- htim->IC_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_IC_MSPDEINIT_CB_ID :
- htim->IC_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_OC_MSPINIT_CB_ID :
- htim->OC_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_OC_MSPDEINIT_CB_ID :
- htim->OC_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_MSPINIT_CB_ID :
- htim->PWM_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_PWM_MSPDEINIT_CB_ID :
- htim->PWM_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID :
- htim->OnePulse_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID :
- htim->OnePulse_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_ENCODER_MSPINIT_CB_ID :
- htim->Encoder_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_ENCODER_MSPDEINIT_CB_ID :
- htim->Encoder_MspDeInitCallback = pCallback;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID :
- htim->HallSensor_MspInitCallback = pCallback;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID :
- htim->HallSensor_MspDeInitCallback = pCallback;
- break;
-
- default :
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return status;
-}
-
-/**
- * @brief Unregister a TIM callback
- * TIM callback is redirected to the weak predefined callback
- * @param htim tim handle
- * @param CallbackID ID of the callback to be unregistered
- * This parameter can be one of the following values:
- * @arg @ref HAL_TIM_BASE_MSPINIT_CB_ID Base MspInit Callback ID
- * @arg @ref HAL_TIM_BASE_MSPDEINIT_CB_ID Base MspDeInit Callback ID
- * @arg @ref HAL_TIM_IC_MSPINIT_CB_ID IC MspInit Callback ID
- * @arg @ref HAL_TIM_IC_MSPDEINIT_CB_ID IC MspDeInit Callback ID
- * @arg @ref HAL_TIM_OC_MSPINIT_CB_ID OC MspInit Callback ID
- * @arg @ref HAL_TIM_OC_MSPDEINIT_CB_ID OC MspDeInit Callback ID
- * @arg @ref HAL_TIM_PWM_MSPINIT_CB_ID PWM MspInit Callback ID
- * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID
- * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID
- * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID
- * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID
- * @arg @ref HAL_TIM_ENCODER_MSPDEINIT_CB_ID Encoder MspDeInit Callback ID
- * @arg @ref HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID Hall Sensor MspInit Callback ID
- * @arg @ref HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID Hall Sensor MspDeInit Callback ID
- * @arg @ref HAL_TIM_PERIOD_ELAPSED_CB_ID Period Elapsed Callback ID
- * @arg @ref HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID Period Elapsed half complete Callback ID
- * @arg @ref HAL_TIM_TRIGGER_CB_ID Trigger Callback ID
- * @arg @ref HAL_TIM_TRIGGER_HALF_CB_ID Trigger half complete Callback ID
- * @arg @ref HAL_TIM_IC_CAPTURE_CB_ID Input Capture Callback ID
- * @arg @ref HAL_TIM_IC_CAPTURE_HALF_CB_ID Input Capture half complete Callback ID
- * @arg @ref HAL_TIM_OC_DELAY_ELAPSED_CB_ID Output Compare Delay Elapsed Callback ID
- * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_CB_ID PWM Pulse Finished Callback ID
- * @arg @ref HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID PWM Pulse Finished half complete Callback ID
- * @arg @ref HAL_TIM_ERROR_CB_ID Error Callback ID
- * @arg @ref HAL_TIM_COMMUTATION_CB_ID Commutation Callback ID
- * @arg @ref HAL_TIM_COMMUTATION_HALF_CB_ID Commutation half complete Callback ID
- * @arg @ref HAL_TIM_BREAK_CB_ID Break Callback ID
- * @retval status
- */
-HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_CallbackIDTypeDef CallbackID)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(htim);
-
- if (htim->State == HAL_TIM_STATE_READY)
- {
- switch (CallbackID)
- {
- case HAL_TIM_BASE_MSPINIT_CB_ID :
- /* Legacy weak Base MspInit Callback */
- htim->Base_MspInitCallback = HAL_TIM_Base_MspInit;
- break;
-
- case HAL_TIM_BASE_MSPDEINIT_CB_ID :
- /* Legacy weak Base Msp DeInit Callback */
- htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit;
- break;
-
- case HAL_TIM_IC_MSPINIT_CB_ID :
- /* Legacy weak IC Msp Init Callback */
- htim->IC_MspInitCallback = HAL_TIM_IC_MspInit;
- break;
-
- case HAL_TIM_IC_MSPDEINIT_CB_ID :
- /* Legacy weak IC Msp DeInit Callback */
- htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit;
- break;
-
- case HAL_TIM_OC_MSPINIT_CB_ID :
- /* Legacy weak OC Msp Init Callback */
- htim->OC_MspInitCallback = HAL_TIM_OC_MspInit;
- break;
-
- case HAL_TIM_OC_MSPDEINIT_CB_ID :
- /* Legacy weak OC Msp DeInit Callback */
- htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit;
- break;
-
- case HAL_TIM_PWM_MSPINIT_CB_ID :
- /* Legacy weak PWM Msp Init Callback */
- htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit;
- break;
-
- case HAL_TIM_PWM_MSPDEINIT_CB_ID :
- /* Legacy weak PWM Msp DeInit Callback */
- htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID :
- /* Legacy weak One Pulse Msp Init Callback */
- htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID :
- /* Legacy weak One Pulse Msp DeInit Callback */
- htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit;
- break;
-
- case HAL_TIM_ENCODER_MSPINIT_CB_ID :
- /* Legacy weak Encoder Msp Init Callback */
- htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit;
- break;
-
- case HAL_TIM_ENCODER_MSPDEINIT_CB_ID :
- /* Legacy weak Encoder Msp DeInit Callback */
- htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID :
- /* Legacy weak Hall Sensor Msp Init Callback */
- htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID :
- /* Legacy weak Hall Sensor Msp DeInit Callback */
- htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
- break;
-
- case HAL_TIM_PERIOD_ELAPSED_CB_ID :
- /* Legacy weak Period Elapsed Callback */
- htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback;
- break;
-
- case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID :
- /* Legacy weak Period Elapsed half complete Callback */
- htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback;
- break;
-
- case HAL_TIM_TRIGGER_CB_ID :
- /* Legacy weak Trigger Callback */
- htim->TriggerCallback = HAL_TIM_TriggerCallback;
- break;
-
- case HAL_TIM_TRIGGER_HALF_CB_ID :
- /* Legacy weak Trigger half complete Callback */
- htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback;
- break;
-
- case HAL_TIM_IC_CAPTURE_CB_ID :
- /* Legacy weak IC Capture Callback */
- htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback;
- break;
-
- case HAL_TIM_IC_CAPTURE_HALF_CB_ID :
- /* Legacy weak IC Capture half complete Callback */
- htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback;
- break;
-
- case HAL_TIM_OC_DELAY_ELAPSED_CB_ID :
- /* Legacy weak OC Delay Elapsed Callback */
- htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback;
- break;
-
- case HAL_TIM_PWM_PULSE_FINISHED_CB_ID :
- /* Legacy weak PWM Pulse Finished Callback */
- htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback;
- break;
-
- case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID :
- /* Legacy weak PWM Pulse Finished half complete Callback */
- htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback;
- break;
-
- case HAL_TIM_ERROR_CB_ID :
- /* Legacy weak Error Callback */
- htim->ErrorCallback = HAL_TIM_ErrorCallback;
- break;
-
- case HAL_TIM_COMMUTATION_CB_ID :
- /* Legacy weak Commutation Callback */
- htim->CommutationCallback = HAL_TIMEx_CommutCallback;
- break;
-
- case HAL_TIM_COMMUTATION_HALF_CB_ID :
- /* Legacy weak Commutation half complete Callback */
- htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback;
- break;
-
- case HAL_TIM_BREAK_CB_ID :
- /* Legacy weak Break Callback */
- htim->BreakCallback = HAL_TIMEx_BreakCallback;
- break;
-
- default :
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (htim->State == HAL_TIM_STATE_RESET)
- {
- switch (CallbackID)
- {
- case HAL_TIM_BASE_MSPINIT_CB_ID :
- /* Legacy weak Base MspInit Callback */
- htim->Base_MspInitCallback = HAL_TIM_Base_MspInit;
- break;
-
- case HAL_TIM_BASE_MSPDEINIT_CB_ID :
- /* Legacy weak Base Msp DeInit Callback */
- htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit;
- break;
-
- case HAL_TIM_IC_MSPINIT_CB_ID :
- /* Legacy weak IC Msp Init Callback */
- htim->IC_MspInitCallback = HAL_TIM_IC_MspInit;
- break;
-
- case HAL_TIM_IC_MSPDEINIT_CB_ID :
- /* Legacy weak IC Msp DeInit Callback */
- htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit;
- break;
-
- case HAL_TIM_OC_MSPINIT_CB_ID :
- /* Legacy weak OC Msp Init Callback */
- htim->OC_MspInitCallback = HAL_TIM_OC_MspInit;
- break;
-
- case HAL_TIM_OC_MSPDEINIT_CB_ID :
- /* Legacy weak OC Msp DeInit Callback */
- htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit;
- break;
-
- case HAL_TIM_PWM_MSPINIT_CB_ID :
- /* Legacy weak PWM Msp Init Callback */
- htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit;
- break;
-
- case HAL_TIM_PWM_MSPDEINIT_CB_ID :
- /* Legacy weak PWM Msp DeInit Callback */
- htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID :
- /* Legacy weak One Pulse Msp Init Callback */
- htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit;
- break;
-
- case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID :
- /* Legacy weak One Pulse Msp DeInit Callback */
- htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit;
- break;
-
- case HAL_TIM_ENCODER_MSPINIT_CB_ID :
- /* Legacy weak Encoder Msp Init Callback */
- htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit;
- break;
-
- case HAL_TIM_ENCODER_MSPDEINIT_CB_ID :
- /* Legacy weak Encoder Msp DeInit Callback */
- htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID :
- /* Legacy weak Hall Sensor Msp Init Callback */
- htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
- break;
-
- case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID :
- /* Legacy weak Hall Sensor Msp DeInit Callback */
- htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
- break;
-
- default :
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return status;
-}
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions
- * @brief TIM Peripheral State functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral State functions #####
- ==============================================================================
- [..]
- This subsection permits to get in run-time the status of the peripheral
- and the data flow.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Return the TIM Base handle state.
- * @param htim TIM Base handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM OC handle state.
- * @param htim TIM Output Compare handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM PWM handle state.
- * @param htim TIM handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM Input Capture handle state.
- * @param htim TIM IC handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM One Pulse Mode handle state.
- * @param htim TIM OPM handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM Encoder Mode handle state.
- * @param htim TIM Encoder Interface handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return the TIM Encoder Mode handle state.
- * @param htim TIM handle
- * @retval Active channel
- */
-HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim)
-{
- return htim->Channel;
-}
-
-/**
- * @brief Return actual state of the TIM channel.
- * @param htim TIM handle
- * @param Channel TIM Channel
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @arg TIM_CHANNEL_4: TIM Channel 4
- * @arg TIM_CHANNEL_5: TIM Channel 5
- * @arg TIM_CHANNEL_6: TIM Channel 6
- * @retval TIM Channel state
- */
-HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_TIM_ChannelStateTypeDef channel_state;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
- channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
-
- return channel_state;
-}
-
-/**
- * @brief Return actual state of a DMA burst operation.
- * @param htim TIM handle
- * @retval DMA burst state
- */
-HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
-
- return htim->DMABurstState;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Private_Functions TIM Private Functions
- * @{
- */
-
-/**
- * @brief TIM DMA error callback
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIM_DMAError(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- else
- {
- htim->State = HAL_TIM_STATE_READY;
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->ErrorCallback(htim);
-#else
- HAL_TIM_ErrorCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA Delay Pulse complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA Delay Pulse half complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PWM_PulseFinishedHalfCpltCallback(htim);
-#else
- HAL_TIM_PWM_PulseFinishedHalfCpltCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA Capture complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureCallback(htim);
-#else
- HAL_TIM_IC_CaptureCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA Capture half complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->IC_CaptureHalfCpltCallback(htim);
-#else
- HAL_TIM_IC_CaptureHalfCpltCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA Period Elapse complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (htim->hdma[TIM_DMA_ID_UPDATE]->Init.Mode == DMA_NORMAL)
- {
- htim->State = HAL_TIM_STATE_READY;
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PeriodElapsedCallback(htim);
-#else
- HAL_TIM_PeriodElapsedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief TIM DMA Period Elapse half complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMAPeriodElapsedHalfCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PeriodElapsedHalfCpltCallback(htim);
-#else
- HAL_TIM_PeriodElapsedHalfCpltCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief TIM DMA Trigger callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (htim->hdma[TIM_DMA_ID_TRIGGER]->Init.Mode == DMA_NORMAL)
- {
- htim->State = HAL_TIM_STATE_READY;
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->TriggerCallback(htim);
-#else
- HAL_TIM_TriggerCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief TIM DMA Trigger half complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->TriggerHalfCpltCallback(htim);
-#else
- HAL_TIM_TriggerHalfCpltCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief Time Base configuration
- * @param TIMx TIM peripheral
- * @param Structure TIM Base configuration structure
- * @retval None
- */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
- uint32_t tmpcr1;
- tmpcr1 = TIMx->CR1;
-
- /* Set TIM Time Base Unit parameters ---------------------------------------*/
- if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- {
- /* Select the Counter Mode */
- tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- tmpcr1 |= Structure->CounterMode;
- }
-
- if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- {
- /* Set the clock division */
- tmpcr1 &= ~TIM_CR1_CKD;
- tmpcr1 |= (uint32_t)Structure->ClockDivision;
- }
-
- /* Set the auto-reload preload */
- MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
-
- TIMx->CR1 = tmpcr1;
-
- /* Set the Autoreload value */
- TIMx->ARR = (uint32_t)Structure->Period ;
-
- /* Set the Prescaler value */
- TIMx->PSC = Structure->Prescaler;
-
- if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
- {
- /* Set the Repetition Counter value */
- TIMx->RCR = Structure->RepetitionCounter;
- }
-
- /* Generate an update event to reload the Prescaler
- and the repetition counter (only for advanced timer) value immediately */
- TIMx->EGR = TIM_EGR_UG;
-}
-
-/**
- * @brief Timer Output Compare 1 configuration
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- TIMx->CCER &= ~TIM_CCER_CC1E;
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
-
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
-
- /* Reset the Output Compare Mode Bits */
- tmpccmrx &= ~TIM_CCMR1_OC1M;
- tmpccmrx &= ~TIM_CCMR1_CC1S;
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC1P;
- /* Set the Output Compare Polarity */
- tmpccer |= OC_Config->OCPolarity;
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
- {
- /* Check parameters */
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC1NP;
- /* Set the Output N Polarity */
- tmpccer |= OC_Config->OCNPolarity;
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC1NE;
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- {
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS1;
- tmpcr2 &= ~TIM_CR2_OIS1N;
- /* Set the Output Idle state */
- tmpcr2 |= OC_Config->OCIdleState;
- /* Set the Output N Idle state */
- tmpcr2 |= OC_Config->OCNIdleState;
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
-
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
-
- /* Set the Capture Compare Register value */
- TIMx->CCR1 = OC_Config->Pulse;
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Timer Output Compare 2 configuration
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
-
- /* Get the TIMx CCMR1 register value */
- tmpccmrx = TIMx->CCMR1;
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR1_OC2M;
- tmpccmrx &= ~TIM_CCMR1_CC2S;
-
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC2P;
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 4U);
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC2NP;
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 4U);
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC2NE;
-
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- {
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS2;
- tmpcr2 &= ~TIM_CR2_OIS2N;
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 2U);
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 2U);
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
-
- /* Write to TIMx CCMR1 */
- TIMx->CCMR1 = tmpccmrx;
-
- /* Set the Capture Compare Register value */
- TIMx->CCR2 = OC_Config->Pulse;
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Timer Output Compare 3 configuration
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 3: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC3E;
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
-
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC3M;
- tmpccmrx &= ~TIM_CCMR2_CC3S;
- /* Select the Output Compare Mode */
- tmpccmrx |= OC_Config->OCMode;
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC3P;
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 8U);
-
- if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
- {
- assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
- /* Reset the Output N Polarity level */
- tmpccer &= ~TIM_CCER_CC3NP;
- /* Set the Output N Polarity */
- tmpccer |= (OC_Config->OCNPolarity << 8U);
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC3NE;
- }
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- {
- /* Check parameters */
- assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare and Output Compare N IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS3;
- tmpcr2 &= ~TIM_CR2_OIS3N;
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 4U);
- /* Set the Output N Idle state */
- tmpcr2 |= (OC_Config->OCNIdleState << 4U);
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
-
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
-
- /* Set the Capture Compare Register value */
- TIMx->CCR3 = OC_Config->Pulse;
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Timer Output Compare 4 configuration
- * @param TIMx to select the TIM peripheral
- * @param OC_Config The output configuration structure
- * @retval None
- */
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
- uint32_t tmpccmrx;
- uint32_t tmpccer;
- uint32_t tmpcr2;
-
- /* Disable the Channel 4: Reset the CC4E Bit */
- TIMx->CCER &= ~TIM_CCER_CC4E;
-
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
- /* Get the TIMx CR2 register value */
- tmpcr2 = TIMx->CR2;
-
- /* Get the TIMx CCMR2 register value */
- tmpccmrx = TIMx->CCMR2;
-
- /* Reset the Output Compare mode and Capture/Compare selection Bits */
- tmpccmrx &= ~TIM_CCMR2_OC4M;
- tmpccmrx &= ~TIM_CCMR2_CC4S;
-
- /* Select the Output Compare Mode */
- tmpccmrx |= (OC_Config->OCMode << 8U);
-
- /* Reset the Output Polarity level */
- tmpccer &= ~TIM_CCER_CC4P;
- /* Set the Output Compare Polarity */
- tmpccer |= (OC_Config->OCPolarity << 12U);
-
- if (IS_TIM_BREAK_INSTANCE(TIMx))
- {
- /* Check parameters */
- assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
- /* Reset the Output Compare IDLE State */
- tmpcr2 &= ~TIM_CR2_OIS4;
-
- /* Set the Output Idle state */
- tmpcr2 |= (OC_Config->OCIdleState << 6U);
- }
-
- /* Write to TIMx CR2 */
- TIMx->CR2 = tmpcr2;
-
- /* Write to TIMx CCMR2 */
- TIMx->CCMR2 = tmpccmrx;
-
- /* Set the Capture Compare Register value */
- TIMx->CCR4 = OC_Config->Pulse;
-
- /* Write to TIMx CCER */
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Slave Timer configuration function
- * @param htim TIM handle
- * @param sSlaveConfig Slave timer configuration
- * @retval None
- */
-static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
-
- /* Reset the Trigger Selection Bits */
- tmpsmcr &= ~TIM_SMCR_TS;
- /* Set the Input Trigger source */
- tmpsmcr |= sSlaveConfig->InputTrigger;
-
- /* Reset the slave mode Bits */
- tmpsmcr &= ~TIM_SMCR_SMS;
- /* Set the slave mode */
- tmpsmcr |= sSlaveConfig->SlaveMode;
-
- /* Write to TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
-
- /* Configure the trigger prescaler, filter, and polarity */
- switch (sSlaveConfig->InputTrigger)
- {
- case TIM_TS_ETRF:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
- assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
- assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
- /* Configure the ETR Trigger source */
- TIM_ETR_SetConfig(htim->Instance,
- sSlaveConfig->TriggerPrescaler,
- sSlaveConfig->TriggerPolarity,
- sSlaveConfig->TriggerFilter);
- break;
- }
-
- case TIM_TS_TI1F_ED:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
- if (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED)
- {
- return HAL_ERROR;
- }
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- tmpccer = htim->Instance->CCER;
- htim->Instance->CCER &= ~TIM_CCER_CC1E;
- tmpccmr1 = htim->Instance->CCMR1;
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U);
-
- /* Write to TIMx CCMR1 and CCER registers */
- htim->Instance->CCMR1 = tmpccmr1;
- htim->Instance->CCER = tmpccer;
- break;
- }
-
- case TIM_TS_TI1FP1:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
- assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
- /* Configure TI1 Filter and Polarity */
- TIM_TI1_ConfigInputStage(htim->Instance,
- sSlaveConfig->TriggerPolarity,
- sSlaveConfig->TriggerFilter);
- break;
- }
-
- case TIM_TS_TI2FP2:
- {
- /* Check the parameters */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
- assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
- /* Configure TI2 Filter and Polarity */
- TIM_TI2_ConfigInputStage(htim->Instance,
- sSlaveConfig->TriggerPolarity,
- sSlaveConfig->TriggerFilter);
- break;
- }
-
- case TIM_TS_ITR0:
- case TIM_TS_ITR1:
- case TIM_TS_ITR2:
- case TIM_TS_ITR3:
- {
- /* Check the parameter */
- assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- return status;
-}
-
-/**
- * @brief Configure the TI1 as Input.
- * @param TIMx to select the TIM peripheral.
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICSelection specifies the input to be used.
- * This parameter can be one of the following values:
- * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 1 is selected to be connected to IC1.
- * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 1 is selected to be connected to IC2.
- * @arg TIM_ICSELECTION_TRC: TIM Input 1 is selected to be connected to TRC.
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1
- * (on channel2 path) is used as the input signal. Therefore CCMR1 must be
- * protected against un-initialized filter and polarity values.
- */
-void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- TIMx->CCER &= ~TIM_CCER_CC1E;
- tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
-
- /* Select the Input */
- if (IS_TIM_CC2_INSTANCE(TIMx) != RESET)
- {
- tmpccmr1 &= ~TIM_CCMR1_CC1S;
- tmpccmr1 |= TIM_ICSelection;
- }
- else
- {
- tmpccmr1 |= TIM_CCMR1_CC1S_0;
- }
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F);
-
- /* Select the Polarity and set the CC1E Bit */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1;
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Configure the Polarity and Filter for TI1.
- * @param TIMx to select the TIM peripheral.
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 1: Reset the CC1E Bit */
- tmpccer = TIMx->CCER;
- TIMx->CCER &= ~TIM_CCER_CC1E;
- tmpccmr1 = TIMx->CCMR1;
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC1F;
- tmpccmr1 |= (TIM_ICFilter << 4U);
-
- /* Select the Polarity and set the CC1E Bit */
- tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- tmpccer |= TIM_ICPolarity;
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1;
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Configure the TI2 as Input.
- * @param TIMx to select the TIM peripheral
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICSelection specifies the input to be used.
- * This parameter can be one of the following values:
- * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 2 is selected to be connected to IC2.
- * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 2 is selected to be connected to IC1.
- * @arg TIM_ICSELECTION_TRC: TIM Input 2 is selected to be connected to TRC.
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2
- * (on channel1 path) is used as the input signal. Therefore CCMR1 must be
- * protected against un-initialized filter and polarity values.
- */
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
- tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
-
- /* Select the Input */
- tmpccmr1 &= ~TIM_CCMR1_CC2S;
- tmpccmr1 |= (TIM_ICSelection << 8U);
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC2F;
- tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F);
-
- /* Select the Polarity and set the CC2E Bit */
- tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1 ;
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Configure the Polarity and Filter for TI2.
- * @param TIMx to select the TIM peripheral.
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- */
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr1;
- uint32_t tmpccer;
-
- /* Disable the Channel 2: Reset the CC2E Bit */
- TIMx->CCER &= ~TIM_CCER_CC2E;
- tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
-
- /* Set the filter */
- tmpccmr1 &= ~TIM_CCMR1_IC2F;
- tmpccmr1 |= (TIM_ICFilter << 12U);
-
- /* Select the Polarity and set the CC2E Bit */
- tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- tmpccer |= (TIM_ICPolarity << 4U);
-
- /* Write to TIMx CCMR1 and CCER registers */
- TIMx->CCMR1 = tmpccmr1 ;
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Configure the TI3 as Input.
- * @param TIMx to select the TIM peripheral
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICSelection specifies the input to be used.
- * This parameter can be one of the following values:
- * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 3 is selected to be connected to IC3.
- * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 3 is selected to be connected to IC4.
- * @arg TIM_ICSELECTION_TRC: TIM Input 3 is selected to be connected to TRC.
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @retval None
- * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4
- * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
- * protected against un-initialized filter and polarity values.
- */
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr2;
- uint32_t tmpccer;
-
- /* Disable the Channel 3: Reset the CC3E Bit */
- TIMx->CCER &= ~TIM_CCER_CC3E;
- tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
-
- /* Select the Input */
- tmpccmr2 &= ~TIM_CCMR2_CC3S;
- tmpccmr2 |= TIM_ICSelection;
-
- /* Set the filter */
- tmpccmr2 &= ~TIM_CCMR2_IC3F;
- tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F);
-
- /* Select the Polarity and set the CC3E Bit */
- tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
- tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
-
- /* Write to TIMx CCMR2 and CCER registers */
- TIMx->CCMR2 = tmpccmr2;
- TIMx->CCER = tmpccer;
-}
-
-/**
- * @brief Configure the TI4 as Input.
- * @param TIMx to select the TIM peripheral
- * @param TIM_ICPolarity The Input Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ICPOLARITY_RISING
- * @arg TIM_ICPOLARITY_FALLING
- * @arg TIM_ICPOLARITY_BOTHEDGE
- * @param TIM_ICSelection specifies the input to be used.
- * This parameter can be one of the following values:
- * @arg TIM_ICSELECTION_DIRECTTI: TIM Input 4 is selected to be connected to IC4.
- * @arg TIM_ICSELECTION_INDIRECTTI: TIM Input 4 is selected to be connected to IC3.
- * @arg TIM_ICSELECTION_TRC: TIM Input 4 is selected to be connected to TRC.
- * @param TIM_ICFilter Specifies the Input Capture Filter.
- * This parameter must be a value between 0x00 and 0x0F.
- * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3
- * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
- * protected against un-initialized filter and polarity values.
- * @retval None
- */
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
- uint32_t TIM_ICFilter)
-{
- uint32_t tmpccmr2;
- uint32_t tmpccer;
-
- /* Disable the Channel 4: Reset the CC4E Bit */
- TIMx->CCER &= ~TIM_CCER_CC4E;
- tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
-
- /* Select the Input */
- tmpccmr2 &= ~TIM_CCMR2_CC4S;
- tmpccmr2 |= (TIM_ICSelection << 8U);
-
- /* Set the filter */
- tmpccmr2 &= ~TIM_CCMR2_IC4F;
- tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F);
-
- /* Select the Polarity and set the CC4E Bit */
- tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
- tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
-
- /* Write to TIMx CCMR2 and CCER registers */
- TIMx->CCMR2 = tmpccmr2;
- TIMx->CCER = tmpccer ;
-}
-
-/**
- * @brief Selects the Input Trigger source
- * @param TIMx to select the TIM peripheral
- * @param InputTriggerSource The Input Trigger source.
- * This parameter can be one of the following values:
- * @arg TIM_TS_ITR0: Internal Trigger 0
- * @arg TIM_TS_ITR1: Internal Trigger 1
- * @arg TIM_TS_ITR2: Internal Trigger 2
- * @arg TIM_TS_ITR3: Internal Trigger 3
- * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
- * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
- * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
- * @arg TIM_TS_ETRF: External Trigger input
- * @retval None
- */
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
-{
- uint32_t tmpsmcr;
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = TIMx->SMCR;
- /* Reset the TS Bits */
- tmpsmcr &= ~TIM_SMCR_TS;
- /* Set the Input Trigger source and the slave mode*/
- tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
-}
-/**
- * @brief Configures the TIMx External Trigger (ETR).
- * @param TIMx to select the TIM peripheral
- * @param TIM_ExtTRGPrescaler The external Trigger Prescaler.
- * This parameter can be one of the following values:
- * @arg TIM_ETRPRESCALER_DIV1: ETRP Prescaler OFF.
- * @arg TIM_ETRPRESCALER_DIV2: ETRP frequency divided by 2.
- * @arg TIM_ETRPRESCALER_DIV4: ETRP frequency divided by 4.
- * @arg TIM_ETRPRESCALER_DIV8: ETRP frequency divided by 8.
- * @param TIM_ExtTRGPolarity The external Trigger Polarity.
- * This parameter can be one of the following values:
- * @arg TIM_ETRPOLARITY_INVERTED: active low or falling edge active.
- * @arg TIM_ETRPOLARITY_NONINVERTED: active high or rising edge active.
- * @param ExtTRGFilter External Trigger Filter.
- * This parameter must be a value between 0x00 and 0x0F
- * @retval None
- */
-void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
- uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
-{
- uint32_t tmpsmcr;
-
- tmpsmcr = TIMx->SMCR;
-
- /* Reset the ETR Bits */
- tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-
- /* Set the Prescaler, the Filter value and the Polarity */
- tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
-
- /* Write to TIMx SMCR */
- TIMx->SMCR = tmpsmcr;
-}
-
-/**
- * @brief Enables or disables the TIM Capture Compare Channel x.
- * @param TIMx to select the TIM peripheral
- * @param Channel specifies the TIM Channel
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @arg TIM_CHANNEL_4: TIM Channel 4
- * @param ChannelState specifies the TIM Channel CCxE bit new state.
- * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
- * @retval None
- */
-void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
-{
- uint32_t tmp;
-
- /* Check the parameters */
- assert_param(IS_TIM_CC1_INSTANCE(TIMx));
- assert_param(IS_TIM_CHANNELS(Channel));
-
- tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
-
- /* Reset the CCxE Bit */
- TIMx->CCER &= ~tmp;
-
- /* Set or reset the CCxE Bit */
- TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
-}
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
-/**
- * @brief Reset interrupt callbacks to the legacy weak callbacks.
- * @param htim pointer to a TIM_HandleTypeDef structure that contains
- * the configuration information for TIM module.
- * @retval None
- */
-void TIM_ResetCallback(TIM_HandleTypeDef *htim)
-{
- /* Reset the TIM callback to the legacy weak callbacks */
- htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback;
- htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback;
- htim->TriggerCallback = HAL_TIM_TriggerCallback;
- htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback;
- htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback;
- htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback;
- htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback;
- htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback;
- htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback;
- htim->ErrorCallback = HAL_TIM_ErrorCallback;
- htim->CommutationCallback = HAL_TIMEx_CommutCallback;
- htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback;
- htim->BreakCallback = HAL_TIMEx_BreakCallback;
-}
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c
deleted file mode 100644
index 1b59f15865e8a5bd07a0574eeef10d907be141cf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c
+++ /dev/null
@@ -1,2428 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_tim_ex.c
- * @author MCD Application Team
- * @brief TIM HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Timer Extended peripheral:
- * + Time Hall Sensor Interface Initialization
- * + Time Hall Sensor Interface Start
- * + Time Complementary signal break and dead time configuration
- * + Time Master and Slave synchronization configuration
- * + Timer remapping capabilities configuration
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### TIMER Extended features #####
- ==============================================================================
- [..]
- The Timer Extended features include:
- (#) Complementary outputs with programmable dead-time for :
- (++) Output Compare
- (++) PWM generation (Edge and Center-aligned Mode)
- (++) One-pulse mode output
- (#) Synchronization circuit to control the timer with external signals and to
- interconnect several timers together.
- (#) Break input to put the timer output signals in reset state or in a known state.
- (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
- positioning purposes
-
- ##### How to use this driver #####
- ==============================================================================
- [..]
- (#) Initialize the TIM low level resources by implementing the following functions
- depending on the selected feature:
- (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
-
- (#) Initialize the TIM low level resources :
- (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
- (##) TIM pins configuration
- (+++) Enable the clock for the TIM GPIOs using the following function:
- __HAL_RCC_GPIOx_CLK_ENABLE();
- (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
-
- (#) The external Clock can be configured, if needed (the default clock is the
- internal clock from the APBx), using the following function:
- HAL_TIM_ConfigClockSource, the clock configuration should be done before
- any start function.
-
- (#) Configure the TIM in the desired functioning mode using one of the
- initialization function of this driver:
- (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
- Timer Hall Sensor Interface and the commutation event with the corresponding
- Interrupt and DMA request if needed (Note that One Timer is used to interface
- with the Hall sensor Interface and another Timer should be used to use
- the commutation event).
-
- (#) Activate the TIM peripheral using one of the start functions:
- (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
- HAL_TIMEx_OCN_Start_IT()
- (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
- HAL_TIMEx_PWMN_Start_IT()
- (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
- (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
- HAL_TIMEx_HallSensor_Start_IT().
-
- @endverbatim
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup TIMEx TIMEx
- * @brief TIM Extended HAL module driver
- * @{
- */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
-static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
- * @{
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
- * @brief Timer Hall Sensor functions
- *
-@verbatim
- ==============================================================================
- ##### Timer Hall Sensor functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Initialize and configure TIM HAL Sensor.
- (+) De-initialize TIM HAL Sensor.
- (+) Start the Hall Sensor Interface.
- (+) Stop the Hall Sensor Interface.
- (+) Start the Hall Sensor Interface and enable interrupts.
- (+) Stop the Hall Sensor Interface and disable interrupts.
- (+) Start the Hall Sensor Interface and enable DMA transfers.
- (+) Stop the Hall Sensor Interface and disable DMA transfers.
-
-@endverbatim
- * @{
- */
-/**
- * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
- * @note When the timer instance is initialized in Hall Sensor Interface mode,
- * timer channels 1 and channel 2 are reserved and cannot be used for
- * other purpose.
- * @param htim TIM Hall Sensor Interface handle
- * @param sConfig TIM Hall Sensor configuration structure
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
-{
- TIM_OC_InitTypeDef OC_Config;
-
- /* Check the TIM handle allocation */
- if (htim == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
- assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
- assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
- assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
- assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
- assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
-
- if (htim->State == HAL_TIM_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- htim->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- /* Reset interrupt callbacks to legacy week callbacks */
- TIM_ResetCallback(htim);
-
- if (htim->HallSensor_MspInitCallback == NULL)
- {
- htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
- }
- /* Init the low level hardware : GPIO, CLOCK, NVIC */
- htim->HallSensor_MspInitCallback(htim);
-#else
- /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
- HAL_TIMEx_HallSensor_MspInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- }
-
- /* Set the TIM state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Configure the Time base in the Encoder Mode */
- TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
- /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
- TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
-
- /* Reset the IC1PSC Bits */
- htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
- /* Set the IC1PSC value */
- htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
-
- /* Enable the Hall sensor interface (XOR function of the three inputs) */
- htim->Instance->CR2 |= TIM_CR2_TI1S;
-
- /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= TIM_TS_TI1F_ED;
-
- /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
- htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
-
- /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
- OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
- OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
- OC_Config.OCMode = TIM_OCMODE_PWM2;
- OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
- OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
- OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
- OC_Config.Pulse = sConfig->Commutation_Delay;
-
- TIM_OC2_SetConfig(htim->Instance, &OC_Config);
-
- /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
- register to 101 */
- htim->Instance->CR2 &= ~TIM_CR2_MMS;
- htim->Instance->CR2 |= TIM_TRGO_OC2REF;
-
- /* Initialize the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
-
- /* Initialize the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Initialize the TIM state*/
- htim->State = HAL_TIM_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the TIM Hall Sensor interface
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_INSTANCE(htim->Instance));
-
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Disable the TIM Peripheral Clock */
- __HAL_TIM_DISABLE(htim);
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- if (htim->HallSensor_MspDeInitCallback == NULL)
- {
- htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
- }
- /* DeInit the low level hardware */
- htim->HallSensor_MspDeInitCallback(htim);
-#else
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- HAL_TIMEx_HallSensor_MspDeInit(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- /* Change the DMA burst operation state */
- htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
-
- /* Change the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
-
- /* Change TIM state */
- htim->State = HAL_TIM_STATE_RESET;
-
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the TIM Hall Sensor MSP.
- * @param htim TIM Hall Sensor Interface handle
- * @retval None
- */
-__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief DeInitializes TIM Hall Sensor MSP.
- * @param htim TIM Hall Sensor Interface handle
- * @retval None
- */
-__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
- */
-}
-
-/**
- * @brief Starts the TIM Hall Sensor Interface.
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
-{
- uint32_t tmpsmcr;
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Input Capture channel 1
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Hall sensor Interface.
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channels 1, 2 and 3
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
-{
- uint32_t tmpsmcr;
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the capture compare Interrupts 1 event */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
- /* Enable the Input Capture channel 1
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channel 1
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
- /* Disable the capture compare Interrupts event */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Hall Sensor Interface in DMA mode.
- * @param htim TIM Hall Sensor Interface handle
- * @param pData The destination Buffer address.
- * @param Length The length of data to be transferred from TIM peripheral to memory.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
-{
- uint32_t tmpsmcr;
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
-
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Set the TIM channel state */
- if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
- || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
- {
- return HAL_BUSY;
- }
- else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
- && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- /* Enable the Input Capture channel 1
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
- /* Set the DMA Input Capture 1 Callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
- /* Enable the DMA stream for Capture 1*/
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the capture compare 1 Interrupt */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Hall Sensor Interface in DMA mode.
- * @param htim TIM Hall Sensor Interface handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
-{
- /* Check the parameters */
- assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
-
- /* Disable the Input Capture channel 1
- (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
- TIM_CHANNEL_2 and TIM_CHANNEL_3) */
- TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-
- /* Disable the capture compare Interrupts 1 event */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channel state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
- * @brief Timer Complementary Output Compare functions
- *
-@verbatim
- ==============================================================================
- ##### Timer Complementary Output Compare functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Start the Complementary Output Compare/PWM.
- (+) Stop the Complementary Output Compare/PWM.
- (+) Start the Complementary Output Compare/PWM and enable interrupts.
- (+) Stop the Complementary Output Compare/PWM and disable interrupts.
- (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
- (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Starts the TIM Output Compare signal generation on the complementary
- * output.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation on the complementary
- * output.
- * @param htim TIM handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Disable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM Output Compare signal generation in interrupt mode
- * on the complementary output.
- * @param htim TIM OC handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Output Compare interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Output Compare interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Output Compare interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the TIM Break interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
- /* Enable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation in interrupt mode
- * on the complementary output.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpccer;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Output Compare interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Output Compare interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Output Compare interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the TIM Break interrupt (only if no more channel is active) */
- tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
- {
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
- }
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Starts the TIM Output Compare signal generation in DMA mode
- * on the complementary output.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @param pData The source Buffer address.
- * @param Length The length of data to be transferred from memory to TIM peripheral
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Set the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Output Compare DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Output Compare DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Output Compare DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM Output Compare signal generation in DMA mode
- * on the complementary output.
- * @param htim TIM Output Compare handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Output Compare DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Output Compare DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Output Compare DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the Capture compare channel N */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
- * @brief Timer Complementary PWM functions
- *
-@verbatim
- ==============================================================================
- ##### Timer Complementary PWM functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Start the Complementary PWM.
- (+) Stop the Complementary PWM.
- (+) Start the Complementary PWM and enable interrupts.
- (+) Stop the Complementary PWM and disable interrupts.
- (+) Start the Complementary PWM and enable DMA transfers.
- (+) Stop the Complementary PWM and disable DMA transfers.
- (+) Start the Complementary Input Capture measurement.
- (+) Stop the Complementary Input Capture.
- (+) Start the Complementary Input Capture and enable interrupts.
- (+) Stop the Complementary Input Capture and disable interrupts.
- (+) Start the Complementary Input Capture and enable DMA transfers.
- (+) Stop the Complementary Input Capture and disable DMA transfers.
- (+) Start the Complementary One Pulse generation.
- (+) Stop the Complementary One Pulse.
- (+) Start the Complementary One Pulse and enable interrupts.
- (+) Stop the Complementary One Pulse and disable interrupts.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Starts the PWM signal generation on the complementary output.
- * @param htim TIM handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the PWM signal generation on the complementary output.
- * @param htim TIM handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Disable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the PWM signal generation in interrupt mode on the
- * complementary output.
- * @param htim TIM handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Check the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Enable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the TIM Break interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
- /* Enable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the PWM signal generation in interrupt mode on the
- * complementary output.
- * @param htim TIM handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpccer;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the TIM Break interrupt (only if no more channel is active) */
- tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
- {
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
- }
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Starts the TIM PWM signal generation in DMA mode on the
- * complementary output
- * @param htim TIM handle
- * @param Channel TIM Channel to be enabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @param pData The source Buffer address.
- * @param Length The length of data to be transferred from memory to TIM peripheral
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
- HAL_StatusTypeDef status = HAL_OK;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- /* Set the TIM complementary channel state */
- if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
- {
- return HAL_BUSY;
- }
- else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
- {
- if ((pData == NULL) && (Length > 0U))
- {
- return HAL_ERROR;
- }
- else
- {
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
- }
- }
- else
- {
- return HAL_ERROR;
- }
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Set the DMA compare callbacks */
- htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
- htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
-
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
-
- /* Enable the DMA stream */
- if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
- Length) != HAL_OK)
- {
- /* Return error status */
- return HAL_ERROR;
- }
- /* Enable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Enable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
- else
- {
- __HAL_TIM_ENABLE(htim);
- }
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
- * output
- * @param htim TIM handle
- * @param Channel TIM Channel to be disabled
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
- switch (Channel)
- {
- case TIM_CHANNEL_1:
- {
- /* Disable the TIM Capture/Compare 1 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
- break;
- }
-
- case TIM_CHANNEL_2:
- {
- /* Disable the TIM Capture/Compare 2 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
- break;
- }
-
- case TIM_CHANNEL_3:
- {
- /* Disable the TIM Capture/Compare 3 DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
- (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
- break;
- }
-
- default:
- status = HAL_ERROR;
- break;
- }
-
- if (status == HAL_OK)
- {
- /* Disable the complementary PWM output */
- TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM complementary channel state */
- TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
- }
-
- /* Return function status */
- return status;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
- * @brief Timer Complementary One Pulse functions
- *
-@verbatim
- ==============================================================================
- ##### Timer Complementary One Pulse functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Start the Complementary One Pulse generation.
- (+) Stop the Complementary One Pulse.
- (+) Start the Complementary One Pulse and enable interrupts.
- (+) Stop the Complementary One Pulse and disable interrupts.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Starts the TIM One Pulse signal generation on the complementary
- * output.
- * @note OutputChannel must match the pulse output channel chosen when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel pulse output channel to enable
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the complementary One Pulse output channel and the Input Capture channel */
- TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM One Pulse signal generation on the complementary
- * output.
- * @note OutputChannel must match the pulse output channel chosen when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel pulse output channel to disable
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
- /* Disable the complementary One Pulse output channel and the Input Capture channel */
- TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
- * complementary channel.
- * @note OutputChannel must match the pulse output channel chosen when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel pulse output channel to enable
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
- HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
- HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
- HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
- /* Check the TIM channels state */
- if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
- || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
- {
- return HAL_ERROR;
- }
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
-
- /* Enable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
- /* Enable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-
- /* Enable the complementary One Pulse output channel and the Input Capture channel */
- TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
- TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
-
- /* Enable the Main Output */
- __HAL_TIM_MOE_ENABLE(htim);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
- * complementary channel.
- * @note OutputChannel must match the pulse output channel chosen when calling
- * @ref HAL_TIM_OnePulse_ConfigChannel().
- * @param htim TIM One Pulse handle
- * @param OutputChannel pulse output channel to disable
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1 selected
- * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
- uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
- /* Disable the TIM Capture/Compare 1 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
- /* Disable the TIM Capture/Compare 2 interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-
- /* Disable the complementary One Pulse output channel and the Input Capture channel */
- TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
- TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
-
- /* Disable the Main Output */
- __HAL_TIM_MOE_DISABLE(htim);
-
- /* Disable the Peripheral */
- __HAL_TIM_DISABLE(htim);
-
- /* Set the TIM channels state */
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
-
- /* Return function status */
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
- * @brief Peripheral Control functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral Control functions #####
- ==============================================================================
- [..]
- This section provides functions allowing to:
- (+) Configure the commutation event in case of use of the Hall sensor interface.
- (+) Configure Output channels for OC and PWM mode.
-
- (+) Configure Complementary channels, break features and dead time.
- (+) Configure Master synchronization.
- (+) Configure timer remapping capabilities.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Configure the TIM commutation event sequence.
- * @note This function is mandatory to use the commutation event in order to
- * update the configuration at each commutation detection on the TRGI input of the Timer,
- * the typical use of this feature is with the use of another Timer(interface Timer)
- * configured in Hall sensor interface, this interface Timer will generate the
- * commutation at its TRGO output (connected to Timer used in this function) each time
- * the TI1 of the Interface Timer detect a commutation at its input TI1.
- * @param htim TIM handle
- * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
- * This parameter can be one of the following values:
- * @arg TIM_TS_ITR0: Internal trigger 0 selected
- * @arg TIM_TS_ITR1: Internal trigger 1 selected
- * @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
- * @arg TIM_TS_NONE: No trigger is needed
- * @param CommutationSource the Commutation Event source
- * This parameter can be one of the following values:
- * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
- * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource)
-{
- /* Check the parameters */
- assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
- assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
- __HAL_LOCK(htim);
-
- if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
- (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
- {
- /* Select the Input trigger */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= InputTrigger;
- }
-
- /* Select the Capture Compare preload feature */
- htim->Instance->CR2 |= TIM_CR2_CCPC;
- /* Select the Commutation event source */
- htim->Instance->CR2 &= ~TIM_CR2_CCUS;
- htim->Instance->CR2 |= CommutationSource;
-
- /* Disable Commutation Interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
-
- /* Disable Commutation DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configure the TIM commutation event sequence with interrupt.
- * @note This function is mandatory to use the commutation event in order to
- * update the configuration at each commutation detection on the TRGI input of the Timer,
- * the typical use of this feature is with the use of another Timer(interface Timer)
- * configured in Hall sensor interface, this interface Timer will generate the
- * commutation at its TRGO output (connected to Timer used in this function) each time
- * the TI1 of the Interface Timer detect a commutation at its input TI1.
- * @param htim TIM handle
- * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
- * This parameter can be one of the following values:
- * @arg TIM_TS_ITR0: Internal trigger 0 selected
- * @arg TIM_TS_ITR1: Internal trigger 1 selected
- * @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
- * @arg TIM_TS_NONE: No trigger is needed
- * @param CommutationSource the Commutation Event source
- * This parameter can be one of the following values:
- * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
- * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource)
-{
- /* Check the parameters */
- assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
- assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
- __HAL_LOCK(htim);
-
- if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
- (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
- {
- /* Select the Input trigger */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= InputTrigger;
- }
-
- /* Select the Capture Compare preload feature */
- htim->Instance->CR2 |= TIM_CR2_CCPC;
- /* Select the Commutation event source */
- htim->Instance->CR2 &= ~TIM_CR2_CCUS;
- htim->Instance->CR2 |= CommutationSource;
-
- /* Disable Commutation DMA request */
- __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
-
- /* Enable the Commutation Interrupt */
- __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configure the TIM commutation event sequence with DMA.
- * @note This function is mandatory to use the commutation event in order to
- * update the configuration at each commutation detection on the TRGI input of the Timer,
- * the typical use of this feature is with the use of another Timer(interface Timer)
- * configured in Hall sensor interface, this interface Timer will generate the
- * commutation at its TRGO output (connected to Timer used in this function) each time
- * the TI1 of the Interface Timer detect a commutation at its input TI1.
- * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
- * @param htim TIM handle
- * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
- * This parameter can be one of the following values:
- * @arg TIM_TS_ITR0: Internal trigger 0 selected
- * @arg TIM_TS_ITR1: Internal trigger 1 selected
- * @arg TIM_TS_ITR2: Internal trigger 2 selected
- * @arg TIM_TS_ITR3: Internal trigger 3 selected
- * @arg TIM_TS_NONE: No trigger is needed
- * @param CommutationSource the Commutation Event source
- * This parameter can be one of the following values:
- * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
- * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
- uint32_t CommutationSource)
-{
- /* Check the parameters */
- assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
- assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
- __HAL_LOCK(htim);
-
- if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
- (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
- {
- /* Select the Input trigger */
- htim->Instance->SMCR &= ~TIM_SMCR_TS;
- htim->Instance->SMCR |= InputTrigger;
- }
-
- /* Select the Capture Compare preload feature */
- htim->Instance->CR2 |= TIM_CR2_CCPC;
- /* Select the Commutation event source */
- htim->Instance->CR2 &= ~TIM_CR2_CCUS;
- htim->Instance->CR2 |= CommutationSource;
-
- /* Enable the Commutation DMA Request */
- /* Set the DMA Commutation Callback */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
- /* Set the DMA error callback */
- htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
-
- /* Disable Commutation Interrupt */
- __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
-
- /* Enable the Commutation DMA Request */
- __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the TIM in master mode.
- * @param htim TIM handle.
- * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
- * contains the selected trigger output (TRGO) and the Master/Slave
- * mode.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig)
-{
- uint32_t tmpcr2;
- uint32_t tmpsmcr;
-
- /* Check the parameters */
- assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
- assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
- assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
-
- /* Check input state */
- __HAL_LOCK(htim);
-
- /* Change the handler state */
- htim->State = HAL_TIM_STATE_BUSY;
-
- /* Get the TIMx CR2 register value */
- tmpcr2 = htim->Instance->CR2;
-
- /* Get the TIMx SMCR register value */
- tmpsmcr = htim->Instance->SMCR;
-
- /* Reset the MMS Bits */
- tmpcr2 &= ~TIM_CR2_MMS;
- /* Select the TRGO source */
- tmpcr2 |= sMasterConfig->MasterOutputTrigger;
-
- /* Update TIMx CR2 */
- htim->Instance->CR2 = tmpcr2;
-
- if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- {
- /* Reset the MSM Bit */
- tmpsmcr &= ~TIM_SMCR_MSM;
- /* Set master mode */
- tmpsmcr |= sMasterConfig->MasterSlaveMode;
-
- /* Update TIMx SMCR */
- htim->Instance->SMCR = tmpsmcr;
- }
-
- /* Change the htim state */
- htim->State = HAL_TIM_STATE_READY;
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
- * and the AOE(automatic output enable).
- * @param htim TIM handle
- * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
- * contains the BDTR Register configuration information for the TIM peripheral.
- * @note Interrupts can be generated when an active level is detected on the
- * break input, the break 2 input or the system break input. Break
- * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
- TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
-{
- /* Keep this variable initialized to 0 as it is used to configure BDTR register */
- uint32_t tmpbdtr = 0U;
-
- /* Check the parameters */
- assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
- assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
- assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
- assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
- assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
- assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
- assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
- assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
-
- /* Check input state */
- __HAL_LOCK(htim);
-
- /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
- the OSSI State, the dead time value and the Automatic Output Enable Bit */
-
- /* Set the BDTR bits */
- MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
- MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
- MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
- MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
- MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
-
-
- /* Set TIMx_BDTR */
- htim->Instance->BDTR = tmpbdtr;
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @brief Configures the TIMx Remapping input capabilities.
- * @param htim TIM handle.
- * @param Remap specifies the TIM remapping source.
- * For TIM1, the parameter can have the following values: (**)
- * @arg TIM_TIM1_TIM3_TRGO: TIM1 ITR2 is connected to TIM3 TRGO
- * @arg TIM_TIM1_LPTIM: TIM1 ITR2 is connected to LPTIM1 output
- *
- * For TIM2, the parameter can have the following values: (**)
- * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 is connected to TIM8 TRGO (*)
- * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 is connected to PTP trigger output (*)
- * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 is connected to OTG FS SOF
- * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 is connected to OTG FS SOF
- *
- * For TIM5, the parameter can have the following values:
- * @arg TIM_TIM5_GPIO: TIM5 TI4 is connected to GPIO
- * @arg TIM_TIM5_LSI: TIM5 TI4 is connected to LSI
- * @arg TIM_TIM5_LSE: TIM5 TI4 is connected to LSE
- * @arg TIM_TIM5_RTC: TIM5 TI4 is connected to the RTC wakeup interrupt
- * @arg TIM_TIM5_TIM3_TRGO: TIM5 ITR1 is connected to TIM3 TRGO (*)
- * @arg TIM_TIM5_LPTIM: TIM5 ITR1 is connected to LPTIM1 output (*)
- *
- * For TIM9, the parameter can have the following values: (**)
- * @arg TIM_TIM9_TIM3_TRGO: TIM9 ITR1 is connected to TIM3 TRGO
- * @arg TIM_TIM9_LPTIM: TIM9 ITR1 is connected to LPTIM1 output
- *
- * For TIM11, the parameter can have the following values:
- * @arg TIM_TIM11_GPIO: TIM11 TI1 is connected to GPIO
- * @arg TIM_TIM11_HSE: TIM11 TI1 is connected to HSE_RTC clock
- * @arg TIM_TIM11_SPDIFRX: TIM11 TI1 is connected to SPDIFRX_FRAME_SYNC (*)
- *
- * (*) Value not defined in all devices. \n
- * (**) Register not available in all devices.
- *
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
-{
-
- /* Check parameters */
- assert_param(IS_TIM_REMAP(htim->Instance, Remap));
-
- __HAL_LOCK(htim);
-
-#if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM9_ITR1_RMP)
- if ((Remap & LPTIM_REMAP_MASK) == LPTIM_REMAP_MASK)
- {
- /* Connect TIMx internal trigger to LPTIM1 output */
- __HAL_RCC_LPTIM1_CLK_ENABLE();
- MODIFY_REG(LPTIM1->OR,
- (LPTIM_OR_TIM1_ITR2_RMP | LPTIM_OR_TIM5_ITR1_RMP | LPTIM_OR_TIM9_ITR1_RMP),
- Remap & ~(LPTIM_REMAP_MASK));
- }
- else
- {
- /* Set the Timer remapping configuration */
- WRITE_REG(htim->Instance->OR, Remap);
- }
-#else
- /* Set the Timer remapping configuration */
- WRITE_REG(htim->Instance->OR, Remap);
-#endif /* LPTIM_OR_TIM1_ITR2_RMP && LPTIM_OR_TIM5_ITR1_RMP && LPTIM_OR_TIM9_ITR1_RMP */
-
- __HAL_UNLOCK(htim);
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
- * @brief Extended Callbacks functions
- *
-@verbatim
- ==============================================================================
- ##### Extended Callbacks functions #####
- ==============================================================================
- [..]
- This section provides Extended TIM callback functions:
- (+) Timer Commutation callback
- (+) Timer Break callback
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Hall commutation changed callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_CommutCallback could be implemented in the user file
- */
-}
-/**
- * @brief Hall commutation changed half complete callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Hall Break detection callback in non-blocking mode
- * @param htim TIM handle
- * @retval None
- */
-__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(htim);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_TIMEx_BreakCallback could be implemented in the user file
- */
-}
-/**
- * @}
- */
-
-/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
- * @brief Extended Peripheral State functions
- *
-@verbatim
- ==============================================================================
- ##### Extended Peripheral State functions #####
- ==============================================================================
- [..]
- This subsection permits to get in run-time the status of the peripheral
- and the data flow.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Return the TIM Hall Sensor interface handle state.
- * @param htim TIM Hall Sensor handle
- * @retval HAL state
- */
-HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
-{
- return htim->State;
-}
-
-/**
- * @brief Return actual state of the TIM complementary channel.
- * @param htim TIM handle
- * @param ChannelN TIM Complementary channel
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @retval TIM Complementary channel state
- */
-HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
-{
- HAL_TIM_ChannelStateTypeDef channel_state;
-
- /* Check the parameters */
- assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
-
- channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
-
- return channel_state;
-}
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
- * @{
- */
-
-/**
- * @brief TIM DMA Commutation callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- /* Change the htim state */
- htim->State = HAL_TIM_STATE_READY;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->CommutationCallback(htim);
-#else
- HAL_TIMEx_CommutCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief TIM DMA Commutation half complete callback.
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- /* Change the htim state */
- htim->State = HAL_TIM_STATE_READY;
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->CommutationHalfCpltCallback(htim);
-#else
- HAL_TIMEx_CommutHalfCpltCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-}
-
-
-/**
- * @brief TIM DMA Delay Pulse complete callback (complementary channel).
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-
- if (hdma->Init.Mode == DMA_NORMAL)
- {
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
- }
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->PWM_PulseFinishedCallback(htim);
-#else
- HAL_TIM_PWM_PulseFinishedCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief TIM DMA error callback (complementary channel)
- * @param hdma pointer to DMA handle.
- * @retval None
- */
-static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
-{
- TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- }
- else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
- {
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- }
- else
- {
- /* nothing to do */
- }
-
-#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- htim->ErrorCallback(htim);
-#else
- HAL_TIM_ErrorCallback(htim);
-#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
-
- htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
- * @brief Enables or disables the TIM Capture Compare Channel xN.
- * @param TIMx to select the TIM peripheral
- * @param Channel specifies the TIM Channel
- * This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
- * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
- * @retval None
- */
-static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
-{
- uint32_t tmp;
-
- tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
-
- /* Reset the CCxNE Bit */
- TIMx->CCER &= ~tmp;
-
- /* Set or reset the CCxNE Bit */
- TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
-}
-/**
- * @}
- */
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
deleted file mode 100644
index d958ad64e92bd8750419d4dba1058f5b99f8b949..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
+++ /dev/null
@@ -1,3751 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32f4xx_hal_uart.c
- * @author MCD Application Team
- * @brief UART HAL module driver.
- * This file provides firmware functions to manage the following
- * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
- * + Initialization and de-initialization functions
- * + IO operation functions
- * + Peripheral Control functions
- * + Peripheral State and Errors functions
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2016 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- @verbatim
- ==============================================================================
- ##### How to use this driver #####
- ==============================================================================
- [..]
- The UART HAL driver can be used as follows:
-
- (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
- (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
- (##) Enable the USARTx interface clock.
- (##) UART pins configuration:
- (+++) Enable the clock for the UART GPIOs.
- (+++) Configure the UART TX/RX pins as alternate function pull-up.
- (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
- and HAL_UART_Receive_IT() APIs):
- (+++) Configure the USARTx interrupt priority.
- (+++) Enable the NVIC USART IRQ handle.
- (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
- and HAL_UART_Receive_DMA() APIs):
- (+++) Declare a DMA handle structure for the Tx/Rx stream.
- (+++) Enable the DMAx interface clock.
- (+++) Configure the declared DMA handle structure with the required
- Tx/Rx parameters.
- (+++) Configure the DMA Tx/Rx stream.
- (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
- (+++) Configure the priority and enable the NVIC for the transfer complete
- interrupt on the DMA Tx/Rx stream.
- (+++) Configure the USARTx interrupt priority and enable the NVIC USART IRQ handle
- (used for last byte sending completion detection in DMA non circular mode)
-
- (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
- flow control and Mode(Receiver/Transmitter) in the huart Init structure.
-
- (#) For the UART asynchronous mode, initialize the UART registers by calling
- the HAL_UART_Init() API.
-
- (#) For the UART Half duplex mode, initialize the UART registers by calling
- the HAL_HalfDuplex_Init() API.
-
- (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
-
- (#) For the Multi-Processor mode, initialize the UART registers by calling
- the HAL_MultiProcessor_Init() API.
-
- [..]
- (@) The specific UART interrupts (Transmission complete interrupt,
- RXNE interrupt and Error Interrupts) will be managed using the macros
- __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
- and receive process.
-
- [..]
- (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
- low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
- HAL_UART_MspInit() API.
-
- ##### Callback registration #####
- ==================================
-
- [..]
- The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
- allows the user to configure dynamically the driver callbacks.
-
- [..]
- Use Function HAL_UART_RegisterCallback() to register a user callback.
- Function HAL_UART_RegisterCallback() allows to register following callbacks:
- (+) TxHalfCpltCallback : Tx Half Complete Callback.
- (+) TxCpltCallback : Tx Complete Callback.
- (+) RxHalfCpltCallback : Rx Half Complete Callback.
- (+) RxCpltCallback : Rx Complete Callback.
- (+) ErrorCallback : Error Callback.
- (+) AbortCpltCallback : Abort Complete Callback.
- (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
- (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
- (+) MspInitCallback : UART MspInit.
- (+) MspDeInitCallback : UART MspDeInit.
- This function takes as parameters the HAL peripheral handle, the Callback ID
- and a pointer to the user callback function.
-
- [..]
- Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
- weak (surcharged) function.
- HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
- and the Callback ID.
- This function allows to reset following callbacks:
- (+) TxHalfCpltCallback : Tx Half Complete Callback.
- (+) TxCpltCallback : Tx Complete Callback.
- (+) RxHalfCpltCallback : Rx Half Complete Callback.
- (+) RxCpltCallback : Rx Complete Callback.
- (+) ErrorCallback : Error Callback.
- (+) AbortCpltCallback : Abort Complete Callback.
- (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
- (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
- (+) MspInitCallback : UART MspInit.
- (+) MspDeInitCallback : UART MspDeInit.
-
- [..]
- For specific callback RxEventCallback, use dedicated registration/reset functions:
- respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
-
- [..]
- By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
- all callbacks are set to the corresponding weak (surcharged) functions:
- examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
- Exception done for MspInit and MspDeInit functions that are respectively
- reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
- and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
- If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
- keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
-
- [..]
- Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
- Exception done MspInit/MspDeInit that can be registered/unregistered
- in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
- MspInit/DeInit callbacks can be used during the Init/DeInit.
- In that case first register the MspInit/MspDeInit user callbacks
- using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
- or HAL_UART_Init() function.
-
- [..]
- When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
- not defined, the callback registration feature is not available
- and weak (surcharged) callbacks are used.
-
- [..]
- Three operation modes are available within this driver :
-
- *** Polling mode IO operation ***
- =================================
- [..]
- (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
- (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
-
- *** Interrupt mode IO operation ***
- ===================================
- [..]
- (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
- (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_TxCpltCallback
- (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
- (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_RxCpltCallback
- (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_UART_ErrorCallback
-
- *** DMA mode IO operation ***
- ==============================
- [..]
- (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
- (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
- (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_TxCpltCallback
- (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
- (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
- (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
- add his own code by customization of function pointer HAL_UART_RxCpltCallback
- (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
- add his own code by customization of function pointer HAL_UART_ErrorCallback
- (+) Pause the DMA Transfer using HAL_UART_DMAPause()
- (+) Resume the DMA Transfer using HAL_UART_DMAResume()
- (+) Stop the DMA Transfer using HAL_UART_DMAStop()
-
-
- [..] This subsection also provides a set of additional functions providing enhanced reception
- services to user. (For example, these functions allow application to handle use cases
- where number of data to be received is unknown).
-
- (#) Compared to standard reception services which only consider number of received
- data elements as reception completion criteria, these functions also consider additional events
- as triggers for updating reception status to caller :
- (+) Detection of inactivity period (RX line has not been active for a given period).
- (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally high state)
- for 1 frame time, after last received byte.
-
- (#) There are two mode of transfer:
- (+) Blocking mode: The reception is performed in polling mode, until either expected number of data is received,
- or till IDLE event occurs. Reception is handled only during function execution.
- When function exits, no data reception could occur. HAL status and number of actually received data elements,
- are returned by function after finishing transfer.
- (+) Non-Blocking mode: The reception is performed using Interrupts or DMA.
- These API's return the HAL status.
- The end of the data processing will be indicated through the
- dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode.
- The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process
- The HAL_UART_ErrorCallback()user callback will be executed when a reception error is detected.
-
- (#) Blocking mode API:
- (+) HAL_UARTEx_ReceiveToIdle()
-
- (#) Non-Blocking mode API with Interrupt:
- (+) HAL_UARTEx_ReceiveToIdle_IT()
-
- (#) Non-Blocking mode API with DMA:
- (+) HAL_UARTEx_ReceiveToIdle_DMA()
-
-
- *** UART HAL driver macros list ***
- =============================================
- [..]
- Below the list of most used macros in UART HAL driver.
-
- (+) __HAL_UART_ENABLE: Enable the UART peripheral
- (+) __HAL_UART_DISABLE: Disable the UART peripheral
- (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
- (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
- (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
- (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
- (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
-
- [..]
- (@) You can refer to the UART HAL driver header file for more useful macros
-
- @endverbatim
- [..]
- (@) Additional remark: If the parity is enabled, then the MSB bit of the data written
- in the data register is transmitted but is changed by the parity bit.
- Depending on the frame length defined by the M bit (8-bits or 9-bits),
- the possible UART frame formats are as listed in the following table:
- +-------------------------------------------------------------+
- | M bit | PCE bit | UART frame |
- |---------------------|---------------------------------------|
- | 0 | 0 | | SB | 8 bit data | STB | |
- |---------|-----------|---------------------------------------|
- | 0 | 1 | | SB | 7 bit data | PB | STB | |
- |---------|-----------|---------------------------------------|
- | 1 | 0 | | SB | 9 bit data | STB | |
- |---------|-----------|---------------------------------------|
- | 1 | 1 | | SB | 8 bit data | PB | STB | |
- +-------------------------------------------------------------+
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f4xx_hal.h"
-
-/** @addtogroup STM32F4xx_HAL_Driver
- * @{
- */
-
-/** @defgroup UART UART
- * @brief HAL UART module driver
- * @{
- */
-#ifdef HAL_UART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @addtogroup UART_Private_Constants
- * @{
- */
-/**
- * @}
- */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup UART_Private_Functions UART Private Functions
- * @{
- */
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAError(DMA_HandleTypeDef *hdma);
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
-static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
-static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
-static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
- uint32_t Tickstart, uint32_t Timeout);
-static void UART_SetConfig(UART_HandleTypeDef *huart);
-
-/**
- * @}
- */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup UART_Exported_Functions UART Exported Functions
- * @{
- */
-
-/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
- ##### Initialization and Configuration functions #####
- ===============================================================================
- [..]
- This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
- in asynchronous mode.
- (+) For the asynchronous mode only these parameters can be configured:
- (++) Baud Rate
- (++) Word Length
- (++) Stop Bit
- (++) Parity: If the parity is enabled, then the MSB bit of the data written
- in the data register is transmitted but is changed by the parity bit.
- Depending on the frame length defined by the M bit (8-bits or 9-bits),
- please refer to Reference manual for possible UART frame formats.
- (++) Hardware flow control
- (++) Receiver/transmitter modes
- (++) Over Sampling Method
- [..]
- The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
- follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor configuration
- procedures (details for the procedures are available in reference manual
- (RM0430 for STM32F4X3xx MCUs and RM0402 for STM32F412xx MCUs
- RM0383 for STM32F411xC/E MCUs and RM0401 for STM32F410xx MCUs
- RM0090 for STM32F4X5xx/STM32F4X7xx/STM32F429xx/STM32F439xx MCUs
- RM0390 for STM32F446xx MCUs and RM0386 for STM32F469xx/STM32F479xx MCUs)).
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Initializes the UART mode according to the specified parameters in
- * the UART_InitTypeDef and create the associated handle.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
- /* Check the UART handle allocation */
- if (huart == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
- {
- /* The hardware flow control is available only for USART1, USART2, USART3 and USART6.
- Except for STM32F446xx devices, that is available for USART1, USART2, USART3, USART6, UART4 and UART5.
- */
- assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
- assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
- }
- else
- {
- assert_param(IS_UART_INSTANCE(huart->Instance));
- }
- assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
- assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
-
- if (huart->gState == HAL_UART_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- UART_InitCallbacksToDefault(huart);
-
- if (huart->MspInitCallback == NULL)
- {
- huart->MspInitCallback = HAL_UART_MspInit;
- }
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the peripheral */
- __HAL_UART_DISABLE(huart);
-
- /* Set the UART Communication parameters */
- UART_SetConfig(huart);
-
- /* In asynchronous mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-
- /* Enable the peripheral */
- __HAL_UART_ENABLE(huart);
-
- /* Initialize the UART state */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the half-duplex mode according to the specified
- * parameters in the UART_InitTypeDef and create the associated handle.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
-{
- /* Check the UART handle allocation */
- if (huart == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
- assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
- assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
-
- if (huart->gState == HAL_UART_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- UART_InitCallbacksToDefault(huart);
-
- if (huart->MspInitCallback == NULL)
- {
- huart->MspInitCallback = HAL_UART_MspInit;
- }
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the peripheral */
- __HAL_UART_DISABLE(huart);
-
- /* Set the UART Communication parameters */
- UART_SetConfig(huart);
-
- /* In half-duplex mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
-
- /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
- SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
-
- /* Enable the peripheral */
- __HAL_UART_ENABLE(huart);
-
- /* Initialize the UART state*/
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the LIN mode according to the specified
- * parameters in the UART_InitTypeDef and create the associated handle.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param BreakDetectLength Specifies the LIN break detection length.
- * This parameter can be one of the following values:
- * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
- * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
-{
- /* Check the UART handle allocation */
- if (huart == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the LIN UART instance */
- assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
-
- /* Check the Break detection length parameter */
- assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
- assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
- assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
-
- if (huart->gState == HAL_UART_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- UART_InitCallbacksToDefault(huart);
-
- if (huart->MspInitCallback == NULL)
- {
- huart->MspInitCallback = HAL_UART_MspInit;
- }
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the peripheral */
- __HAL_UART_DISABLE(huart);
-
- /* Set the UART Communication parameters */
- UART_SetConfig(huart);
-
- /* In LIN mode, the following bits must be kept cleared:
- - CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_CLKEN));
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
-
- /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
- SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
-
- /* Set the USART LIN Break detection length. */
- CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
- SET_BIT(huart->Instance->CR2, BreakDetectLength);
-
- /* Enable the peripheral */
- __HAL_UART_ENABLE(huart);
-
- /* Initialize the UART state*/
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief Initializes the Multi-Processor mode according to the specified
- * parameters in the UART_InitTypeDef and create the associated handle.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param Address USART address
- * @param WakeUpMethod specifies the USART wake-up method.
- * This parameter can be one of the following values:
- * @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection
- * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
-{
- /* Check the UART handle allocation */
- if (huart == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
-
- /* Check the Address & wake up method parameters */
- assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
- assert_param(IS_UART_ADDRESS(Address));
- assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
- assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
-
- if (huart->gState == HAL_UART_STATE_RESET)
- {
- /* Allocate lock resource and initialize it */
- huart->Lock = HAL_UNLOCKED;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- UART_InitCallbacksToDefault(huart);
-
- if (huart->MspInitCallback == NULL)
- {
- huart->MspInitCallback = HAL_UART_MspInit;
- }
-
- /* Init the low level hardware */
- huart->MspInitCallback(huart);
-#else
- /* Init the low level hardware : GPIO, CLOCK */
- HAL_UART_MspInit(huart);
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- }
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the peripheral */
- __HAL_UART_DISABLE(huart);
-
- /* Set the UART Communication parameters */
- UART_SetConfig(huart);
-
- /* In Multi-Processor mode, the following bits must be kept cleared:
- - LINEN and CLKEN bits in the USART_CR2 register,
- - SCEN, HDSEL and IREN bits in the USART_CR3 register */
- CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-
- /* Set the USART address node */
- CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
- SET_BIT(huart->Instance->CR2, Address);
-
- /* Set the wake up method by setting the WAKE bit in the CR1 register */
- CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
- SET_BIT(huart->Instance->CR1, WakeUpMethod);
-
- /* Enable the peripheral */
- __HAL_UART_ENABLE(huart);
-
- /* Initialize the UART state */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief DeInitializes the UART peripheral.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
-{
- /* Check the UART handle allocation */
- if (huart == NULL)
- {
- return HAL_ERROR;
- }
-
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the Peripheral */
- __HAL_UART_DISABLE(huart);
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- if (huart->MspDeInitCallback == NULL)
- {
- huart->MspDeInitCallback = HAL_UART_MspDeInit;
- }
- /* DeInit the low level hardware */
- huart->MspDeInitCallback(huart);
-#else
- /* DeInit the low level hardware */
- HAL_UART_MspDeInit(huart);
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_RESET;
- huart->RxState = HAL_UART_STATE_RESET;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Process Unlock */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief UART MSP Init.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_MspInit could be implemented in the user file
- */
-}
-
-/**
- * @brief UART MSP DeInit.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_MspDeInit could be implemented in the user file
- */
-}
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-/**
- * @brief Register a User UART Callback
- * To be used instead of the weak predefined callback
- * @param huart uart handle
- * @param CallbackID ID of the callback to be registered
- * This parameter can be one of the following values:
- * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
- * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
- * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
- * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
- * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
- * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
- * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
- * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
- * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
- * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
- * @param pCallback pointer to the Callback function
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
- pUART_CallbackTypeDef pCallback)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if (pCallback == NULL)
- {
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- return HAL_ERROR;
- }
- /* Process locked */
- __HAL_LOCK(huart);
-
- if (huart->gState == HAL_UART_STATE_READY)
- {
- switch (CallbackID)
- {
- case HAL_UART_TX_HALFCOMPLETE_CB_ID :
- huart->TxHalfCpltCallback = pCallback;
- break;
-
- case HAL_UART_TX_COMPLETE_CB_ID :
- huart->TxCpltCallback = pCallback;
- break;
-
- case HAL_UART_RX_HALFCOMPLETE_CB_ID :
- huart->RxHalfCpltCallback = pCallback;
- break;
-
- case HAL_UART_RX_COMPLETE_CB_ID :
- huart->RxCpltCallback = pCallback;
- break;
-
- case HAL_UART_ERROR_CB_ID :
- huart->ErrorCallback = pCallback;
- break;
-
- case HAL_UART_ABORT_COMPLETE_CB_ID :
- huart->AbortCpltCallback = pCallback;
- break;
-
- case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
- huart->AbortTransmitCpltCallback = pCallback;
- break;
-
- case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
- huart->AbortReceiveCpltCallback = pCallback;
- break;
-
- case HAL_UART_MSPINIT_CB_ID :
- huart->MspInitCallback = pCallback;
- break;
-
- case HAL_UART_MSPDEINIT_CB_ID :
- huart->MspDeInitCallback = pCallback;
- break;
-
- default :
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (huart->gState == HAL_UART_STATE_RESET)
- {
- switch (CallbackID)
- {
- case HAL_UART_MSPINIT_CB_ID :
- huart->MspInitCallback = pCallback;
- break;
-
- case HAL_UART_MSPDEINIT_CB_ID :
- huart->MspDeInitCallback = pCallback;
- break;
-
- default :
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(huart);
-
- return status;
-}
-
-/**
- * @brief Unregister an UART Callback
- * UART callaback is redirected to the weak predefined callback
- * @param huart uart handle
- * @param CallbackID ID of the callback to be unregistered
- * This parameter can be one of the following values:
- * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
- * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
- * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
- * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
- * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
- * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
- * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
- * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
- * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
- * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(huart);
-
- if (HAL_UART_STATE_READY == huart->gState)
- {
- switch (CallbackID)
- {
- case HAL_UART_TX_HALFCOMPLETE_CB_ID :
- huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
- break;
-
- case HAL_UART_TX_COMPLETE_CB_ID :
- huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
- break;
-
- case HAL_UART_RX_HALFCOMPLETE_CB_ID :
- huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
- break;
-
- case HAL_UART_RX_COMPLETE_CB_ID :
- huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
- break;
-
- case HAL_UART_ERROR_CB_ID :
- huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
- break;
-
- case HAL_UART_ABORT_COMPLETE_CB_ID :
- huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
- break;
-
- case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
- huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
- break;
-
- case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
- huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
- break;
-
- case HAL_UART_MSPINIT_CB_ID :
- huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
- break;
-
- case HAL_UART_MSPDEINIT_CB_ID :
- huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
- break;
-
- default :
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else if (HAL_UART_STATE_RESET == huart->gState)
- {
- switch (CallbackID)
- {
- case HAL_UART_MSPINIT_CB_ID :
- huart->MspInitCallback = HAL_UART_MspInit;
- break;
-
- case HAL_UART_MSPDEINIT_CB_ID :
- huart->MspDeInitCallback = HAL_UART_MspDeInit;
- break;
-
- default :
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- break;
- }
- }
- else
- {
- /* Update the error code */
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- /* Return error status */
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(huart);
-
- return status;
-}
-
-/**
- * @brief Register a User UART Rx Event Callback
- * To be used instead of the weak predefined callback
- * @param huart Uart handle
- * @param pCallback Pointer to the Rx Event Callback function
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- if (pCallback == NULL)
- {
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- return HAL_ERROR;
- }
-
- /* Process locked */
- __HAL_LOCK(huart);
-
- if (huart->gState == HAL_UART_STATE_READY)
- {
- huart->RxEventCallback = pCallback;
- }
- else
- {
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(huart);
-
- return status;
-}
-
-/**
- * @brief UnRegister the UART Rx Event Callback
- * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback
- * @param huart Uart handle
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
-{
- HAL_StatusTypeDef status = HAL_OK;
-
- /* Process locked */
- __HAL_LOCK(huart);
-
- if (huart->gState == HAL_UART_STATE_READY)
- {
- huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
- }
- else
- {
- huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
-
- status = HAL_ERROR;
- }
-
- /* Release Lock */
- __HAL_UNLOCK(huart);
- return status;
-}
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
-/**
- * @}
- */
-
-/** @defgroup UART_Exported_Functions_Group2 IO operation functions
- * @brief UART Transmit and Receive functions
- *
-@verbatim
- ===============================================================================
- ##### IO operation functions #####
- ===============================================================================
- This subsection provides a set of functions allowing to manage the UART asynchronous
- and Half duplex data transfers.
-
- (#) There are two modes of transfer:
- (+) Blocking mode: The communication is performed in polling mode.
- The HAL status of all data processing is returned by the same function
- after finishing transfer.
- (+) Non-Blocking mode: The communication is performed using Interrupts
- or DMA, these API's return the HAL status.
- The end of the data processing will be indicated through the
- dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
- using DMA mode.
- The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
- will be executed respectively at the end of the transmit or receive process
- The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected.
-
- (#) Blocking mode API's are :
- (+) HAL_UART_Transmit()
- (+) HAL_UART_Receive()
-
- (#) Non-Blocking mode API's with Interrupt are :
- (+) HAL_UART_Transmit_IT()
- (+) HAL_UART_Receive_IT()
- (+) HAL_UART_IRQHandler()
-
- (#) Non-Blocking mode API's with DMA are :
- (+) HAL_UART_Transmit_DMA()
- (+) HAL_UART_Receive_DMA()
- (+) HAL_UART_DMAPause()
- (+) HAL_UART_DMAResume()
- (+) HAL_UART_DMAStop()
-
- (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
- (+) HAL_UART_TxHalfCpltCallback()
- (+) HAL_UART_TxCpltCallback()
- (+) HAL_UART_RxHalfCpltCallback()
- (+) HAL_UART_RxCpltCallback()
- (+) HAL_UART_ErrorCallback()
-
- (#) Non-Blocking mode transfers could be aborted using Abort API's :
- (+) HAL_UART_Abort()
- (+) HAL_UART_AbortTransmit()
- (+) HAL_UART_AbortReceive()
- (+) HAL_UART_Abort_IT()
- (+) HAL_UART_AbortTransmit_IT()
- (+) HAL_UART_AbortReceive_IT()
-
- (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
- (+) HAL_UART_AbortCpltCallback()
- (+) HAL_UART_AbortTransmitCpltCallback()
- (+) HAL_UART_AbortReceiveCpltCallback()
-
- (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced reception services:
- (+) HAL_UARTEx_RxEventCallback()
-
- (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
- Errors are handled as follows :
- (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
- to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
- Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
- and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
- If user wants to abort it, Abort services should be called by user.
- (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
- This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
- Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
-
- -@- In the Half duplex communication, it is forbidden to run the transmit
- and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Sends an amount of data in blocking mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the sent data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 provided through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be sent
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- const uint8_t *pdata8bits;
- const uint16_t *pdata16bits;
- uint32_t tickstart = 0U;
-
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_BUSY_TX;
-
- /* Init tickstart for timeout management */
- tickstart = HAL_GetTick();
-
- huart->TxXferSize = Size;
- huart->TxXferCount = Size;
-
- /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- {
- pdata8bits = NULL;
- pdata16bits = (const uint16_t *) pData;
- }
- else
- {
- pdata8bits = pData;
- pdata16bits = NULL;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- while (huart->TxXferCount > 0U)
- {
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
- if (pdata8bits == NULL)
- {
- huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
- pdata16bits++;
- }
- else
- {
- huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
- pdata8bits++;
- }
- huart->TxXferCount--;
- }
-
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
-
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receives an amount of data in blocking mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the received data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 available through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
- uint8_t *pdata8bits;
- uint16_t *pdata16bits;
- uint32_t tickstart = 0U;
-
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->RxState = HAL_UART_STATE_BUSY_RX;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Init tickstart for timeout management */
- tickstart = HAL_GetTick();
-
- huart->RxXferSize = Size;
- huart->RxXferCount = Size;
-
- /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- {
- pdata8bits = NULL;
- pdata16bits = (uint16_t *) pData;
- }
- else
- {
- pdata8bits = pData;
- pdata16bits = NULL;
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- /* Check the remain data to be received */
- while (huart->RxXferCount > 0U)
- {
- if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
- {
- return HAL_TIMEOUT;
- }
- if (pdata8bits == NULL)
- {
- *pdata16bits = (uint16_t)(huart->Instance->DR & 0x01FF);
- pdata16bits++;
- }
- else
- {
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
- }
- else
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
- }
- pdata8bits++;
- }
- huart->RxXferCount--;
- }
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sends an amount of data in non blocking mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the sent data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 provided through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
-{
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->pTxBuffPtr = pData;
- huart->TxXferSize = Size;
- huart->TxXferCount = Size;
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_BUSY_TX;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- /* Enable the UART Transmit data register empty Interrupt */
- __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receives an amount of data in non blocking mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the received data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 available through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- /* Set Reception type to Standard reception */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- return (UART_Start_Receive_IT(huart, pData, Size));
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Sends an amount of data in DMA mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the sent data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 provided through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be sent
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
-{
- const uint32_t *tmp;
-
- /* Check that a Tx process is not already ongoing */
- if (huart->gState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->pTxBuffPtr = pData;
- huart->TxXferSize = Size;
- huart->TxXferCount = Size;
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->gState = HAL_UART_STATE_BUSY_TX;
-
- /* Set the UART DMA transfer complete callback */
- huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
-
- /* Set the DMA error callback */
- huart->hdmatx->XferErrorCallback = UART_DMAError;
-
- /* Set the DMA abort callback */
- huart->hdmatx->XferAbortCallback = NULL;
-
- /* Enable the UART transmit DMA stream */
- tmp = (const uint32_t *)&pData;
- HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size);
-
- /* Clear the TC flag in the SR register by writing 0 to it */
- __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- /* Enable the DMA transfer for transmit request by setting the DMAT bit
- in the UART CR3 register */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receives an amount of data in DMA mode.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
- * the received data is handled as a set of u16. In this case, Size must indicate the number
- * of u16 available through pData.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @note When the UART parity is enabled (PCE = 1) the received data contains the parity bit.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- /* Set Reception type to Standard reception */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- return (UART_Start_Receive_DMA(huart, pData, Size));
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Pauses the DMA Transfer.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
-{
- uint32_t dmarequest = 0x00U;
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
- if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
- {
- /* Disable the UART DMA Tx request */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- }
-
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
- if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
- {
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Disable the UART DMA Rx request */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Resumes the DMA Transfer.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
-{
- /* Process Locked */
- __HAL_LOCK(huart);
-
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- {
- /* Enable the UART DMA Tx request */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
- }
-
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- {
- /* Clear the Overrun flag before resuming the Rx transfer*/
- __HAL_UART_CLEAR_OREFLAG(huart);
-
- /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
- if (huart->Init.Parity != UART_PARITY_NONE)
- {
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- }
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Enable the UART DMA Rx request */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- }
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Stops the DMA Transfer.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
-{
- uint32_t dmarequest = 0x00U;
- /* The Lock is not implemented on this API to allow the user application
- to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
- when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
- and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
- */
-
- /* Stop UART DMA Tx request if ongoing */
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
- if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Abort the UART DMA Tx stream */
- if (huart->hdmatx != NULL)
- {
- HAL_DMA_Abort(huart->hdmatx);
- }
- UART_EndTxTransfer(huart);
- }
-
- /* Stop UART DMA Rx request if ongoing */
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
- if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream */
- if (huart->hdmarx != NULL)
- {
- HAL_DMA_Abort(huart->hdmarx);
- }
- UART_EndRxTransfer(huart);
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Receive an amount of data in blocking mode till either the expected number of data is received or an IDLE event occurs.
- * @note HAL_OK is returned if reception is completed (expected number of data has been received)
- * or if reception is stopped after IDLE event (less than the expected number of data has been received)
- * In this case, RxLen output parameter indicates number of data available in reception buffer.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
- * the received data is handled as a set of uint16_t. In this case, Size must indicate the number
- * of uint16_t available through pData.
- * @param huart UART handle.
- * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
- * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
- * @param RxLen Number of data elements finally received (could be lower than Size, in case reception ends on IDLE event)
- * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
- uint32_t Timeout)
-{
- uint8_t *pdata8bits;
- uint16_t *pdata16bits;
- uint32_t tickstart;
-
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- __HAL_LOCK(huart);
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->RxState = HAL_UART_STATE_BUSY_RX;
- huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
-
- /* Init tickstart for timeout management */
- tickstart = HAL_GetTick();
-
- huart->RxXferSize = Size;
- huart->RxXferCount = Size;
-
- /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- {
- pdata8bits = NULL;
- pdata16bits = (uint16_t *) pData;
- }
- else
- {
- pdata8bits = pData;
- pdata16bits = NULL;
- }
-
- __HAL_UNLOCK(huart);
-
- /* Initialize output number of received elements */
- *RxLen = 0U;
-
- /* as long as data have to be received */
- while (huart->RxXferCount > 0U)
- {
- /* Check if IDLE flag is set */
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE))
- {
- /* Clear IDLE flag in ISR */
- __HAL_UART_CLEAR_IDLEFLAG(huart);
-
- /* If Set, but no data ever received, clear flag without exiting loop */
- /* If Set, and data has already been received, this means Idle Event is valid : End reception */
- if (*RxLen > 0U)
- {
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
- }
- }
-
- /* Check if RXNE flag is set */
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE))
- {
- if (pdata8bits == NULL)
- {
- *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
- pdata16bits++;
- }
- else
- {
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
- }
- else
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
- }
-
- pdata8bits++;
- }
- /* Increment number of received elements */
- *RxLen += 1U;
- huart->RxXferCount--;
- }
-
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
- {
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_TIMEOUT;
- }
- }
- }
-
- /* Set number of received elements in output parameter : RxLen */
- *RxLen = huart->RxXferSize - huart->RxXferCount;
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
-
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive an amount of data in interrupt mode till either the expected number of data is received or an IDLE event occurs.
- * @note Reception is initiated by this function call. Further progress of reception is achieved thanks
- * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of reception indicating
- * number of received data elements.
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
- * the received data is handled as a set of uint16_t. In this case, Size must indicate the number
- * of uint16_t available through pData.
- * @param huart UART handle.
- * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
- * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- HAL_StatusTypeDef status;
-
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- __HAL_LOCK(huart);
-
- /* Set Reception type to reception till IDLE Event*/
- huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
-
- status = UART_Start_Receive_IT(huart, pData, Size);
-
- /* Check Rx process has been successfully started */
- if (status == HAL_OK)
- {
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- __HAL_UART_CLEAR_IDLEFLAG(huart);
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
- else
- {
- /* In case of errors already pending when reception is started,
- Interrupts may have already been raised and lead to reception abortion.
- (Overrun error for instance).
- In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
- status = HAL_ERROR;
- }
- }
-
- return status;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Receive an amount of data in DMA mode till either the expected number of data is received or an IDLE event occurs.
- * @note Reception is initiated by this function call. Further progress of reception is achieved thanks
- * to DMA services, transferring automatically received data elements in user reception buffer and
- * calling registered callbacks at half/end of reception. UART IDLE events are also used to consider
- * reception phase as ended. In all cases, callback execution will indicate number of received data elements.
- * @note When the UART parity is enabled (PCE = 1), the received data contain
- * the parity bit (MSB position).
- * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M = 01),
- * the received data is handled as a set of uint16_t. In this case, Size must indicate the number
- * of uint16_t available through pData.
- * @param huart UART handle.
- * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
- * @param Size Amount of data elements (uint8_t or uint16_t) to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- HAL_StatusTypeDef status;
-
- /* Check that a Rx process is not already ongoing */
- if (huart->RxState == HAL_UART_STATE_READY)
- {
- if ((pData == NULL) || (Size == 0U))
- {
- return HAL_ERROR;
- }
-
- __HAL_LOCK(huart);
-
- /* Set Reception type to reception till IDLE Event*/
- huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
-
- status = UART_Start_Receive_DMA(huart, pData, Size);
-
- /* Check Rx process has been successfully started */
- if (status == HAL_OK)
- {
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- __HAL_UART_CLEAR_IDLEFLAG(huart);
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
- else
- {
- /* In case of errors already pending when reception is started,
- Interrupts may have already been raised and lead to reception abortion.
- (Overrun error for instance).
- In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
- status = HAL_ERROR;
- }
- }
-
- return status;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Abort ongoing transfers (blocking mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Tx and Rx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
- * - Set handle State to READY
- * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
-{
- /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
- }
-
- /* Disable the UART DMA Tx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Abort the UART DMA Tx stream: use blocking DMA Abort API (no callback) */
- if (huart->hdmatx != NULL)
- {
- /* Set the UART DMA Abort callback to Null.
- No call back execution at end of DMA abort procedure */
- huart->hdmatx->XferAbortCallback = NULL;
-
- if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
- {
- if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
-
- return HAL_TIMEOUT;
- }
- }
- }
- }
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream: use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
- {
- /* Set the UART DMA Abort callback to Null.
- No call back execution at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = NULL;
-
- if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
- {
- if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
-
- return HAL_TIMEOUT;
- }
- }
- }
- }
-
- /* Reset Tx and Rx transfer counters */
- huart->TxXferCount = 0x00U;
- huart->RxXferCount = 0x00U;
-
- /* Reset ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
-
- /* Restore huart->RxState and huart->gState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->gState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- return HAL_OK;
-}
-
-/**
- * @brief Abort ongoing Transmit transfer (blocking mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Tx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
- * - Set handle State to READY
- * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
-{
- /* Disable TXEIE and TCIE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
- /* Disable the UART DMA Tx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmatx != NULL)
- {
- /* Set the UART DMA Abort callback to Null.
- No call back execution at end of DMA abort procedure */
- huart->hdmatx->XferAbortCallback = NULL;
-
- if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
- {
- if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
-
- return HAL_TIMEOUT;
- }
- }
- }
- }
-
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0x00U;
-
- /* Restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
- * @brief Abort ongoing Receive transfer (blocking mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Rx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
- * - Set handle State to READY
- * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
-{
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
- }
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
- {
- /* Set the UART DMA Abort callback to Null.
- No call back execution at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = NULL;
-
- if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
- {
- if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
- {
- /* Set error code to DMA */
- huart->ErrorCode = HAL_UART_ERROR_DMA;
-
- return HAL_TIMEOUT;
- }
- }
- }
- }
-
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0x00U;
-
- /* Restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- return HAL_OK;
-}
-
-/**
- * @brief Abort ongoing transfers (Interrupt mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Tx and Rx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
- * - Set handle State to READY
- * - At abort completion, call user abort complete callback
- * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
- * considered as completed only when user abort complete callback is executed (not when exiting function).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
-{
- uint32_t AbortCplt = 0x01U;
-
- /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
- }
-
- /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
- before any call to DMA Abort functions */
- /* DMA Tx Handle is valid */
- if (huart->hdmatx != NULL)
- {
- /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
- Otherwise, set it to NULL */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
- {
- huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
- }
- else
- {
- huart->hdmatx->XferAbortCallback = NULL;
- }
- }
- /* DMA Rx Handle is valid */
- if (huart->hdmarx != NULL)
- {
- /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
- Otherwise, set it to NULL */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
- }
- else
- {
- huart->hdmarx->XferAbortCallback = NULL;
- }
- }
-
- /* Disable the UART DMA Tx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
- {
- /* Disable DMA Tx at UART level */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Abort the UART DMA Tx stream : use non blocking DMA Abort API (callback) */
- if (huart->hdmatx != NULL)
- {
- /* UART Tx DMA Abort callback has already been initialised :
- will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
- /* Abort DMA TX */
- if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
- {
- huart->hdmatx->XferAbortCallback = NULL;
- }
- else
- {
- AbortCplt = 0x00U;
- }
- }
- }
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream : use non blocking DMA Abort API (callback) */
- if (huart->hdmarx != NULL)
- {
- /* UART Rx DMA Abort callback has already been initialised :
- will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- {
- huart->hdmarx->XferAbortCallback = NULL;
- AbortCplt = 0x01U;
- }
- else
- {
- AbortCplt = 0x00U;
- }
- }
- }
-
- /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
- if (AbortCplt == 0x01U)
- {
- /* Reset Tx and Rx transfer counters */
- huart->TxXferCount = 0x00U;
- huart->RxXferCount = 0x00U;
-
- /* Reset ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
-
- /* Restore huart->gState and huart->RxState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* As no DMA to be aborted, call directly user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort complete callback */
- huart->AbortCpltCallback(huart);
-#else
- /* Call legacy weak Abort complete callback */
- HAL_UART_AbortCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Abort ongoing Transmit transfer (Interrupt mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Tx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
- * - Set handle State to READY
- * - At abort completion, call user abort complete callback
- * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
- * considered as completed only when user abort complete callback is executed (not when exiting function).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
-{
- /* Disable TXEIE and TCIE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
- /* Disable the UART DMA Tx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Abort the UART DMA Tx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmatx != NULL)
- {
- /* Set the UART DMA Abort callback :
- will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
- huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
-
- /* Abort DMA TX */
- if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
- {
- /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
- huart->hdmatx->XferAbortCallback(huart->hdmatx);
- }
- }
- else
- {
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0x00U;
-
- /* Restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
- /* As no DMA to be aborted, call directly user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Transmit Complete Callback */
- huart->AbortTransmitCpltCallback(huart);
-#else
- /* Call legacy weak Abort Transmit Complete Callback */
- HAL_UART_AbortTransmitCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0x00U;
-
- /* Restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
- /* As no DMA to be aborted, call directly user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Transmit Complete Callback */
- huart->AbortTransmitCpltCallback(huart);
-#else
- /* Call legacy weak Abort Transmit Complete Callback */
- HAL_UART_AbortTransmitCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief Abort ongoing Receive transfer (Interrupt mode).
- * @param huart UART handle.
- * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
- * This procedure performs following operations :
- * - Disable UART Interrupts (Rx)
- * - Disable the DMA transfer in the peripheral register (if enabled)
- * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
- * - Set handle State to READY
- * - At abort completion, call user abort complete callback
- * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
- * considered as completed only when user abort complete callback is executed (not when exiting function).
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
-{
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
- }
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream : use blocking DMA Abort API (no callback) */
- if (huart->hdmarx != NULL)
- {
- /* Set the UART DMA Abort callback :
- will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
-
- /* Abort DMA RX */
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- {
- /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
- huart->hdmarx->XferAbortCallback(huart->hdmarx);
- }
- }
- else
- {
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0x00U;
-
- /* Restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* As no DMA to be aborted, call directly user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Receive Complete Callback */
- huart->AbortReceiveCpltCallback(huart);
-#else
- /* Call legacy weak Abort Receive Complete Callback */
- HAL_UART_AbortReceiveCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0x00U;
-
- /* Restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* As no DMA to be aborted, call directly user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Receive Complete Callback */
- huart->AbortReceiveCpltCallback(huart);
-#else
- /* Call legacy weak Abort Receive Complete Callback */
- HAL_UART_AbortReceiveCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-
- return HAL_OK;
-}
-
-/**
- * @brief This function handles UART interrupt request.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
-{
- uint32_t isrflags = READ_REG(huart->Instance->SR);
- uint32_t cr1its = READ_REG(huart->Instance->CR1);
- uint32_t cr3its = READ_REG(huart->Instance->CR3);
- uint32_t errorflags = 0x00U;
- uint32_t dmarequest = 0x00U;
-
- /* If no error occurs */
- errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
- if (errorflags == RESET)
- {
- /* UART in mode Receiver -------------------------------------------------*/
- if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
- {
- UART_Receive_IT(huart);
- return;
- }
- }
-
- /* If some errors occur */
- if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET)
- || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
- {
- /* UART parity error interrupt occurred ----------------------------------*/
- if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
- {
- huart->ErrorCode |= HAL_UART_ERROR_PE;
- }
-
- /* UART noise error interrupt occurred -----------------------------------*/
- if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
- {
- huart->ErrorCode |= HAL_UART_ERROR_NE;
- }
-
- /* UART frame error interrupt occurred -----------------------------------*/
- if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
- {
- huart->ErrorCode |= HAL_UART_ERROR_FE;
- }
-
- /* UART Over-Run interrupt occurred --------------------------------------*/
- if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET)
- || ((cr3its & USART_CR3_EIE) != RESET)))
- {
- huart->ErrorCode |= HAL_UART_ERROR_ORE;
- }
-
- /* Call UART Error Call back function if need be --------------------------*/
- if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- {
- /* UART in mode Receiver -----------------------------------------------*/
- if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
- {
- UART_Receive_IT(huart);
- }
-
- /* If Overrun error occurs, or if any error occurs in DMA mode reception,
- consider error as blocking */
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
- if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
- {
- /* Blocking error : transfer is aborted
- Set the UART state ready to be able to start again the process,
- Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
- UART_EndRxTransfer(huart);
-
- /* Disable the UART DMA Rx request if enabled */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* Abort the UART DMA Rx stream */
- if (huart->hdmarx != NULL)
- {
- /* Set the UART DMA Abort callback :
- will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
- huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
- if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- {
- /* Call Directly XferAbortCallback function in case of error */
- huart->hdmarx->XferAbortCallback(huart->hdmarx);
- }
- }
- else
- {
- /* Call user error callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Call user error callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- }
- else
- {
- /* Non Blocking error : transfer could go on.
- Error is notified to user through user error callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- }
- }
- return;
- } /* End if some error occurs */
-
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- && ((isrflags & USART_SR_IDLE) != 0U)
- && ((cr1its & USART_SR_IDLE) != 0U))
- {
- __HAL_UART_CLEAR_IDLEFLAG(huart);
-
- /* Check if DMA mode is enabled in UART */
- if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- {
- /* DMA mode enabled */
- /* Check received length : If all expected data are received, do nothing,
- (DMA cplt callback will be called).
- Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
- uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
- if ((nb_remaining_rx_data > 0U)
- && (nb_remaining_rx_data < huart->RxXferSize))
- {
- /* Reception is not complete */
- huart->RxXferCount = nb_remaining_rx_data;
-
- /* In Normal mode, end DMA xfer and HAL UART Rx process*/
- if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
- {
- /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
- in the UART CR3 register */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
-
- /* Last bytes received, so no need as the abort is immediate */
- (void)HAL_DMA_Abort(huart->hdmarx);
- }
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
-#else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- return;
- }
- else
- {
- /* DMA mode not enabled */
- /* Check received length : If all expected data are received, do nothing.
- Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
- uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
- if ((huart->RxXferCount > 0U)
- && (nb_rx_data > 0U))
- {
- /* Disable the UART Parity Error Interrupt and RXNE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxEventCallback(huart, nb_rx_data);
-#else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- return;
- }
- }
-
- /* UART in mode Transmitter ------------------------------------------------*/
- if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
- {
- UART_Transmit_IT(huart);
- return;
- }
-
- /* UART in mode Transmitter end --------------------------------------------*/
- if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
- {
- UART_EndTransmit_IT(huart);
- return;
- }
-}
-
-/**
- * @brief Tx Transfer completed callbacks.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_TxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Tx Half Transfer completed callbacks.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_TxHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Rx Transfer completed callbacks.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_RxCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief Rx Half Transfer completed callbacks.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_RxHalfCpltCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief UART error callbacks.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- /* NOTE: This function should not be modified, when the callback is needed,
- the HAL_UART_ErrorCallback could be implemented in the user file
- */
-}
-
-/**
- * @brief UART Abort Complete callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_AbortCpltCallback can be implemented in the user file.
- */
-}
-
-/**
- * @brief UART Abort Complete callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
- */
-}
-
-/**
- * @brief UART Abort Receive Complete callback.
- * @param huart UART handle.
- * @retval None
- */
-__weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
- */
-}
-
-/**
- * @brief Reception Event Callback (Rx event notification called after use of advanced reception service).
- * @param huart UART handle
- * @param Size Number of data available in application reception buffer (indicates a position in
- * reception buffer until which, data are available)
- * @retval None
- */
-__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
-{
- /* Prevent unused argument(s) compilation warning */
- UNUSED(huart);
- UNUSED(Size);
-
- /* NOTE : This function should not be modified, when the callback is needed,
- the HAL_UARTEx_RxEventCallback can be implemented in the user file.
- */
-}
-
-/**
- * @}
- */
-
-/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
- * @brief UART control functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral Control functions #####
- ==============================================================================
- [..]
- This subsection provides a set of functions allowing to control the UART:
- (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
- (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
- (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
- (+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode
- (+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Transmits break characters.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
-{
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Send break characters */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
-
- huart->gState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Enters the UART in mute mode.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
-{
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
-
- huart->gState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Exits the UART mute mode: wake up software.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
-{
- /* Check the parameters */
- assert_param(IS_UART_INSTANCE(huart->Instance));
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
-
- huart->gState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Enables the UART transmitter and disables the UART receiver.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
-{
- uint32_t tmpreg = 0x00U;
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /*-------------------------- USART CR1 Configuration -----------------------*/
- tmpreg = huart->Instance->CR1;
-
- /* Clear TE and RE bits */
- tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
-
- /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
- tmpreg |= (uint32_t)USART_CR1_TE;
-
- /* Write to USART CR1 */
- WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
-
- huart->gState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @brief Enables the UART receiver and disables the UART transmitter.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
-{
- uint32_t tmpreg = 0x00U;
-
- /* Process Locked */
- __HAL_LOCK(huart);
-
- huart->gState = HAL_UART_STATE_BUSY;
-
- /*-------------------------- USART CR1 Configuration -----------------------*/
- tmpreg = huart->Instance->CR1;
-
- /* Clear TE and RE bits */
- tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
-
- /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
- tmpreg |= (uint32_t)USART_CR1_RE;
-
- /* Write to USART CR1 */
- WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
-
- huart->gState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_OK;
-}
-
-/**
- * @}
- */
-
-/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
- * @brief UART State and Errors functions
- *
-@verbatim
- ==============================================================================
- ##### Peripheral State and Errors functions #####
- ==============================================================================
- [..]
- This subsection provides a set of functions allowing to return the State of
- UART communication process, return Peripheral Errors occurred during communication
- process
- (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
- (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
-
-@endverbatim
- * @{
- */
-
-/**
- * @brief Returns the UART state.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL state
- */
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
-{
- uint32_t temp1 = 0x00U, temp2 = 0x00U;
- temp1 = huart->gState;
- temp2 = huart->RxState;
-
- return (HAL_UART_StateTypeDef)(temp1 | temp2);
-}
-
-/**
- * @brief Return the UART error code
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART.
- * @retval UART Error Code
- */
-uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
-{
- return huart->ErrorCode;
-}
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup UART_Private_Functions UART Private Functions
- * @{
- */
-
-/**
- * @brief Initialize the callbacks to their default values.
- * @param huart UART handle.
- * @retval none
- */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
-{
- /* Init the UART Callback settings */
- huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
- huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
- huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
- huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
- huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
- huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
- huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
- huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
- huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
-
-}
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
-/**
- * @brief DMA UART transmit process complete callback.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- /* DMA Normal mode*/
- if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
- {
- huart->TxXferCount = 0x00U;
-
- /* Disable the DMA transfer for transmit request by setting the DMAT bit
- in the UART CR3 register */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
- /* Enable the UART Transmit Complete Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-
- }
- /* DMA Circular mode */
- else
- {
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx complete callback*/
- huart->TxCpltCallback(huart);
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @brief DMA UART transmit process half complete callback
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx complete callback*/
- huart->TxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxHalfCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief DMA UART receive process complete callback.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- /* DMA Normal mode*/
- if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
- {
- huart->RxXferCount = 0U;
-
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Disable the DMA transfer for the receiver request by setting the DMAR bit
- in the UART CR3 register */
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
-
- /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
- }
-
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : use Rx Event callback */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
-#else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- else
- {
- /* In other cases : use Rx Complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
-#else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @brief DMA UART receive process half complete callback
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : use Rx Event callback */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize / 2U);
-#else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- else
- {
- /* In other cases : use Rx Half Complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Half complete callback*/
- huart->RxHalfCpltCallback(huart);
-#else
- /*Call legacy weak Rx Half complete callback*/
- HAL_UART_RxHalfCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-}
-
-/**
- * @brief DMA UART communication error callback.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMAError(DMA_HandleTypeDef *hdma)
-{
- uint32_t dmarequest = 0x00U;
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- /* Stop UART DMA Tx request if ongoing */
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
- if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
- {
- huart->TxXferCount = 0x00U;
- UART_EndTxTransfer(huart);
- }
-
- /* Stop UART DMA Rx request if ongoing */
- dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
- if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
- {
- huart->RxXferCount = 0x00U;
- UART_EndRxTransfer(huart);
- }
-
- huart->ErrorCode |= HAL_UART_ERROR_DMA;
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief This function handles UART Communication Timeout. It waits
- * until a flag is no longer in the specified status.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @param Flag specifies the UART flag to check.
- * @param Status The actual Flag status (SET or RESET).
- * @param Tickstart Tick start value
- * @param Timeout Timeout duration
- * @retval HAL status
- */
-static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
- uint32_t Tickstart, uint32_t Timeout)
-{
- /* Wait until flag is set */
- while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- {
- /* Check for the Timeout */
- if (Timeout != HAL_MAX_DELAY)
- {
- if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
- {
- /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- return HAL_TIMEOUT;
- }
- }
- }
- return HAL_OK;
-}
-
-/**
- * @brief Start Receive operation in interrupt mode.
- * @note This function could be called by all HAL UART API providing reception in Interrupt mode.
- * @note When calling this function, parameters validity is considered as already checked,
- * i.e. Rx State, buffer address, ...
- * UART Handle is assumed as Locked.
- * @param huart UART handle.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- huart->pRxBuffPtr = pData;
- huart->RxXferSize = Size;
- huart->RxXferCount = Size;
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->RxState = HAL_UART_STATE_BUSY_RX;
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- if (huart->Init.Parity != UART_PARITY_NONE)
- {
- /* Enable the UART Parity Error Interrupt */
- __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
- }
-
- /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
-
- /* Enable the UART Data Register not empty Interrupt */
- __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
-
- return HAL_OK;
-}
-
-/**
- * @brief Start Receive operation in DMA mode.
- * @note This function could be called by all HAL UART API providing reception in DMA mode.
- * @note When calling this function, parameters validity is considered as already checked,
- * i.e. Rx State, buffer address, ...
- * UART Handle is assumed as Locked.
- * @param huart UART handle.
- * @param pData Pointer to data buffer (u8 or u16 data elements).
- * @param Size Amount of data elements (u8 or u16) to be received.
- * @retval HAL status
- */
-HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- uint32_t *tmp;
-
- huart->pRxBuffPtr = pData;
- huart->RxXferSize = Size;
-
- huart->ErrorCode = HAL_UART_ERROR_NONE;
- huart->RxState = HAL_UART_STATE_BUSY_RX;
-
- /* Set the UART DMA transfer complete callback */
- huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
-
- /* Set the UART DMA Half transfer complete callback */
- huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
-
- /* Set the DMA error callback */
- huart->hdmarx->XferErrorCallback = UART_DMAError;
-
- /* Set the DMA abort callback */
- huart->hdmarx->XferAbortCallback = NULL;
-
- /* Enable the DMA stream */
- tmp = (uint32_t *)&pData;
- HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size);
-
- /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */
- __HAL_UART_CLEAR_OREFLAG(huart);
-
- /* Process Unlocked */
- __HAL_UNLOCK(huart);
-
- if (huart->Init.Parity != UART_PARITY_NONE)
- {
- /* Enable the UART Parity Error Interrupt */
- ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- }
-
- /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* Enable the DMA transfer for the receiver request by setting the DMAR bit
- in the UART CR3 register */
- ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
- return HAL_OK;
-}
-
-/**
- * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
-{
- /* Disable TXEIE and TCIE interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
- /* At end of Tx process, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-}
-
-/**
- * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
- * @param huart UART handle.
- * @retval None
- */
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
-{
- /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
- /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- }
-
- /* At end of Rx process, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-}
-
-/**
- * @brief DMA UART communication abort callback, when initiated by HAL services on Error
- * (To be called at end of DMA Abort procedure following error occurrence).
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- huart->RxXferCount = 0x00U;
- huart->TxXferCount = 0x00U;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered error callback*/
- huart->ErrorCallback(huart);
-#else
- /*Call legacy weak error callback*/
- HAL_UART_ErrorCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief DMA UART Tx communication abort callback, when initiated by user
- * (To be called at end of DMA Tx Abort procedure following user abort request).
- * @note When this callback is executed, User Abort complete call back is called only if no
- * Abort still ongoing for Rx DMA Handle.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- huart->hdmatx->XferAbortCallback = NULL;
-
- /* Check if an Abort process is still ongoing */
- if (huart->hdmarx != NULL)
- {
- if (huart->hdmarx->XferAbortCallback != NULL)
- {
- return;
- }
- }
-
- /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
- huart->TxXferCount = 0x00U;
- huart->RxXferCount = 0x00U;
-
- /* Reset ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
-
- /* Restore huart->gState and huart->RxState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Call user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort complete callback */
- huart->AbortCpltCallback(huart);
-#else
- /* Call legacy weak Abort complete callback */
- HAL_UART_AbortCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief DMA UART Rx communication abort callback, when initiated by user
- * (To be called at end of DMA Rx Abort procedure following user abort request).
- * @note When this callback is executed, User Abort complete call back is called only if no
- * Abort still ongoing for Tx DMA Handle.
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- huart->hdmarx->XferAbortCallback = NULL;
-
- /* Check if an Abort process is still ongoing */
- if (huart->hdmatx != NULL)
- {
- if (huart->hdmatx->XferAbortCallback != NULL)
- {
- return;
- }
- }
-
- /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
- huart->TxXferCount = 0x00U;
- huart->RxXferCount = 0x00U;
-
- /* Reset ErrorCode */
- huart->ErrorCode = HAL_UART_ERROR_NONE;
-
- /* Restore huart->gState and huart->RxState to Ready */
- huart->gState = HAL_UART_STATE_READY;
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Call user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort complete callback */
- huart->AbortCpltCallback(huart);
-#else
- /* Call legacy weak Abort complete callback */
- HAL_UART_AbortCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
- * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
- * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
- * and leads to user Tx Abort Complete callback execution).
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- huart->TxXferCount = 0x00U;
-
- /* Restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
- /* Call user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Transmit Complete Callback */
- huart->AbortTransmitCpltCallback(huart);
-#else
- /* Call legacy weak Abort Transmit Complete Callback */
- HAL_UART_AbortTransmitCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
- * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
- * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
- * and leads to user Rx Abort Complete callback execution).
- * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
- * the configuration information for the specified DMA module.
- * @retval None
- */
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
- UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
- huart->RxXferCount = 0x00U;
-
- /* Restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Call user Abort complete callback */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /* Call registered Abort Receive Complete Callback */
- huart->AbortReceiveCpltCallback(huart);
-#else
- /* Call legacy weak Abort Receive Complete Callback */
- HAL_UART_AbortReceiveCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
-
-/**
- * @brief Sends an amount of data in non blocking mode.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
-{
- const uint16_t *tmp;
-
- /* Check that a Tx process is ongoing */
- if (huart->gState == HAL_UART_STATE_BUSY_TX)
- {
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- {
- tmp = (const uint16_t *) huart->pTxBuffPtr;
- huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
- huart->pTxBuffPtr += 2U;
- }
- else
- {
- huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
- }
-
- if (--huart->TxXferCount == 0U)
- {
- /* Disable the UART Transmit Data Register Empty Interrupt */
- __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
-
- /* Enable the UART Transmit Complete Interrupt */
- __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
- }
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Wraps up transmission in non blocking mode.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
-{
- /* Disable the UART Transmit Complete Interrupt */
- __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
-
- /* Tx process is ended, restore huart->gState to Ready */
- huart->gState = HAL_UART_STATE_READY;
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Tx complete callback*/
- huart->TxCpltCallback(huart);
-#else
- /*Call legacy weak Tx complete callback*/
- HAL_UART_TxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-
- return HAL_OK;
-}
-
-/**
- * @brief Receives an amount of data in non blocking mode
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval HAL status
- */
-static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
-{
- uint8_t *pdata8bits;
- uint16_t *pdata16bits;
-
- /* Check that a Rx process is ongoing */
- if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- {
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- {
- pdata8bits = NULL;
- pdata16bits = (uint16_t *) huart->pRxBuffPtr;
- *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
- huart->pRxBuffPtr += 2U;
- }
- else
- {
- pdata8bits = (uint8_t *) huart->pRxBuffPtr;
- pdata16bits = NULL;
-
- if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE)))
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
- }
- else
- {
- *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
- }
- huart->pRxBuffPtr += 1U;
- }
-
- if (--huart->RxXferCount == 0U)
- {
- /* Disable the UART Data Register not empty Interrupt */
- __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
-
- /* Disable the UART Parity Error Interrupt */
- __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
-
- /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
- __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
-
- /* Rx process is completed, restore huart->RxState to Ready */
- huart->RxState = HAL_UART_STATE_READY;
-
- /* Check current reception Mode :
- If Reception till IDLE event has been selected : */
- if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- {
- /* Set reception type to Standard */
- huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
-
- /* Disable IDLE interrupt */
- ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
-
- /* Check if IDLE flag is set */
- if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE))
- {
- /* Clear IDLE flag in ISR */
- __HAL_UART_CLEAR_IDLEFLAG(huart);
- }
-
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx Event callback*/
- huart->RxEventCallback(huart, huart->RxXferSize);
-#else
- /*Call legacy weak Rx Event callback*/
- HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
- else
- {
- /* Standard reception API called */
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- /*Call registered Rx complete callback*/
- huart->RxCpltCallback(huart);
-#else
- /*Call legacy weak Rx complete callback*/
- HAL_UART_RxCpltCallback(huart);
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
- }
-
- return HAL_OK;
- }
- return HAL_OK;
- }
- else
- {
- return HAL_BUSY;
- }
-}
-
-/**
- * @brief Configures the UART peripheral.
- * @param huart Pointer to a UART_HandleTypeDef structure that contains
- * the configuration information for the specified UART module.
- * @retval None
- */
-static void UART_SetConfig(UART_HandleTypeDef *huart)
-{
- uint32_t tmpreg;
- uint32_t pclk;
-
- /* Check the parameters */
- assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
- assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
- assert_param(IS_UART_PARITY(huart->Init.Parity));
- assert_param(IS_UART_MODE(huart->Init.Mode));
-
- /*-------------------------- USART CR2 Configuration -----------------------*/
- /* Configure the UART Stop Bits: Set STOP[13:12] bits
- according to huart->Init.StopBits value */
- MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
-
- /*-------------------------- USART CR1 Configuration -----------------------*/
- /* Configure the UART Word Length, Parity and mode:
- Set the M bits according to huart->Init.WordLength value
- Set PCE and PS bits according to huart->Init.Parity value
- Set TE and RE bits according to huart->Init.Mode value
- Set OVER8 bit according to huart->Init.OverSampling value */
-
- tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
- MODIFY_REG(huart->Instance->CR1,
- (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
- tmpreg);
-
- /*-------------------------- USART CR3 Configuration -----------------------*/
- /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
- MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
-
-
-#if defined(USART6) && defined(UART9) && defined(UART10)
- if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10))
- {
- pclk = HAL_RCC_GetPCLK2Freq();
- }
-#elif defined(USART6)
- if ((huart->Instance == USART1) || (huart->Instance == USART6))
- {
- pclk = HAL_RCC_GetPCLK2Freq();
- }
-#else
- if (huart->Instance == USART1)
- {
- pclk = HAL_RCC_GetPCLK2Freq();
- }
-#endif /* USART6 */
- else
- {
- pclk = HAL_RCC_GetPCLK1Freq();
- }
- /*-------------------------- USART BRR Configuration ---------------------*/
- if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- {
- huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
- }
- else
- {
- huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
- }
-}
-
-/**
- * @}
- */
-
-#endif /* HAL_UART_MODULE_ENABLED */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_FLASH.ld b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_FLASH.ld
deleted file mode 100644
index 510366f60deae6655276db806930cb1caf015896..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_FLASH.ld
+++ /dev/null
@@ -1,175 +0,0 @@
-/**
- ******************************************************************************
- * @file LinkerScript.ld
- * @author Auto-generated by STM32CubeIDE
- * Abstract : Linker script for NUCLEO-F401RE Board embedding STM32F401RETx Device from stm32f4 series
- * 512Kbytes FLASH
- * 96Kbytes RAM
- *
- * Set heap size, stack size and stack location according
- * to application requirements.
- *
- * Set memory bank area and size if external memory is used
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200 ; /* required amount of heap */
-_Min_Stack_Size = 0x400 ; /* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
- FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
-}
-
-/* Sections */
-SECTIONS
-{
- /* The startup code into "FLASH" Rom type memory */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data into "FLASH" Rom type memory */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data into "FLASH" Rom type memory */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : {
- . = ALIGN(4);
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- . = ALIGN(4);
- } >FLASH
-
- .ARM : {
- . = ALIGN(4);
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- . = ALIGN(4);
- } >FLASH
-
- .preinit_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- .init_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- .fini_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- /* Used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections into "RAM" Ram type memory */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
-
- } >RAM AT> FLASH
-
- /* Uninitialized data section into "RAM" Ram type memory */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss section */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
- ._user_heap_stack :
- {
- . = ALIGN(8);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(8);
- } >RAM
-
- /* Remove information from the compiler libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_RAM.ld b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_RAM.ld
deleted file mode 100644
index e4de7df31efffb78849c671cde8591998d5a5732..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/STM32F401RETX_RAM.ld
+++ /dev/null
@@ -1,175 +0,0 @@
-/**
- ******************************************************************************
- * @file LinkerScript.ld
- * @author Auto-generated by STM32CubeIDE
- * Abstract : Linker script for NUCLEO-F401RE Board embedding STM32F401RETx Device from stm32f4 series
- * 512Kbytes FLASH
- * 96Kbytes RAM
- *
- * Set heap size, stack size and stack location according
- * to application requirements.
- *
- * Set memory bank area and size if external memory is used
- ******************************************************************************
- * @attention
- *
- * <h2><center>© Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
- FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
-}
-
-/* Sections */
-SECTIONS
-{
- /* The startup code into "RAM" Ram type memory */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >RAM
-
- /* The program code and other data into "RAM" Ram type memory */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >RAM
-
- /* Constant data into "RAM" Ram type memory */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >RAM
-
- .ARM.extab : {
- . = ALIGN(4);
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- . = ALIGN(4);
- } >RAM
-
- .ARM : {
- . = ALIGN(4);
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- . = ALIGN(4);
- } >RAM
-
- .preinit_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- . = ALIGN(4);
- } >RAM
-
- .init_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- . = ALIGN(4);
- } >RAM
-
- .fini_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- . = ALIGN(4);
- } >RAM
-
- /* Used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections into "RAM" Ram type memory */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
-
- } >RAM
-
- /* Uninitialized data section into "RAM" Ram type memory */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss section */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
- ._user_heap_stack :
- {
- . = ALIGN(8);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(8);
- } >RAM
-
- /* Remove information from the compiler libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/l5cxv0_f401.ioc b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/l5cxv0_f401.ioc
deleted file mode 100644
index 001a5fc72cd096b71f59a212b1de437df137719b..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/CubeIDE_F401RE_Example/l5cxv0_f401.ioc
+++ /dev/null
@@ -1,276 +0,0 @@
-#MicroXplorer Configuration settings - do not modify
-File.Version=6
-GPIO.groupedBy=Group By Peripherals
-I2C1.I2C_Mode=I2C_Standard
-I2C1.IPParameters=I2C_Mode
-KeepUserPlacement=false
-Mcu.CPN=STM32F401RET6
-Mcu.Family=STM32F4
-Mcu.IP0=I2C1
-Mcu.IP1=NVIC
-Mcu.IP2=RCC
-Mcu.IP3=SYS
-Mcu.IP4=USART2
-Mcu.IPNb=5
-Mcu.Name=STM32F401R(D-E)Tx
-Mcu.Package=LQFP64
-Mcu.Pin0=PC13-ANTI_TAMP
-Mcu.Pin1=PC14-OSC32_IN
-Mcu.Pin10=PA5
-Mcu.Pin11=PB0
-Mcu.Pin12=PB10
-Mcu.Pin13=PC7
-Mcu.Pin14=PA8
-Mcu.Pin15=PA9
-Mcu.Pin16=PA10
-Mcu.Pin17=PA13
-Mcu.Pin18=PA14
-Mcu.Pin19=PB3
-Mcu.Pin2=PC15-OSC32_OUT
-Mcu.Pin20=PB4
-Mcu.Pin21=PB5
-Mcu.Pin22=PB8
-Mcu.Pin23=PB9
-Mcu.Pin24=VP_SYS_VS_Systick
-Mcu.Pin3=PH0 - OSC_IN
-Mcu.Pin4=PH1 - OSC_OUT
-Mcu.Pin5=PC0
-Mcu.Pin6=PA0-WKUP
-Mcu.Pin7=PA2
-Mcu.Pin8=PA3
-Mcu.Pin9=PA4
-Mcu.PinsNb=25
-Mcu.ThirdPartyNb=0
-Mcu.UserConstants=
-Mcu.UserName=STM32F401RETx
-MxCube.Version=6.6.1
-MxDb.Version=DB.6.0.60
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI9_5_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.ForceEnableDMAVector=true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:false
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
-PA0-WKUP.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
-PA0-WKUP.GPIO_Label=PWR_EN_L
-PA0-WKUP.GPIO_PuPd=GPIO_NOPULL
-PA0-WKUP.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PA0-WKUP.Locked=true
-PA0-WKUP.PinState=GPIO_PIN_SET
-PA0-WKUP.Signal=GPIO_Output
-PA10.GPIOParameters=GPIO_Label
-PA10.GPIO_Label=INT_R
-PA10.Locked=true
-PA10.Signal=GPXTI10
-PA13.GPIOParameters=GPIO_Label
-PA13.GPIO_Label=TMS
-PA13.Locked=true
-PA13.Mode=Serial_Wire
-PA13.Signal=SYS_JTMS-SWDIO
-PA14.GPIOParameters=GPIO_Label
-PA14.GPIO_Label=TCK
-PA14.Locked=true
-PA14.Mode=Serial_Wire
-PA14.Signal=SYS_JTCK-SWCLK
-PA2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
-PA2.GPIO_Label=USART_TX
-PA2.GPIO_Mode=GPIO_MODE_AF_PP
-PA2.GPIO_PuPd=GPIO_NOPULL
-PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
-PA2.Locked=true
-PA2.Mode=Asynchronous
-PA2.Signal=USART2_TX
-PA3.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
-PA3.GPIO_Label=USART_RX
-PA3.GPIO_Mode=GPIO_MODE_AF_PP
-PA3.GPIO_PuPd=GPIO_NOPULL
-PA3.GPIO_Speed=GPIO_SPEED_FREQ_LOW
-PA3.Locked=true
-PA3.Mode=Asynchronous
-PA3.Signal=USART2_RX
-PA4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PA4.GPIO_Label=INT_C
-PA4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PA4.GPIO_PuPd=GPIO_NOPULL
-PA4.Locked=true
-PA4.Signal=GPXTI4
-PA5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
-PA5.GPIO_Label=LD2 [Green Led]
-PA5.GPIO_Mode=GPIO_MODE_OUTPUT_PP
-PA5.GPIO_PuPd=GPIO_NOPULL
-PA5.GPIO_Speed=GPIO_SPEED_FREQ_LOW
-PA5.Locked=true
-PA5.Signal=GPIO_Output
-PA8.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
-PA8.GPIO_Label=I2C_RST_L
-PA8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
-PA8.GPIO_PuPd=GPIO_NOPULL
-PA8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PA8.Locked=true
-PA8.PinState=GPIO_PIN_RESET
-PA8.Signal=GPIO_Output
-PA9.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
-PA9.GPIO_Label=I2C_RST_R
-PA9.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
-PA9.GPIO_PuPd=GPIO_NOPULL
-PA9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PA9.Locked=true
-PA9.PinState=GPIO_PIN_RESET
-PA9.Signal=GPIO_Output
-PB0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
-PB0.GPIO_Label=PWR_EN_C
-PB0.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
-PB0.GPIO_PuPd=GPIO_NOPULL
-PB0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PB0.Locked=true
-PB0.PinState=GPIO_PIN_SET
-PB0.Signal=GPIO_Output
-PB10.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
-PB10.GPIO_Label=LPn_L
-PB10.GPIO_PuPd=GPIO_NOPULL
-PB10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PB10.Locked=true
-PB10.PinState=GPIO_PIN_SET
-PB10.Signal=GPIO_Output
-PB3.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
-PB3.GPIO_Label=I2C_RST_C
-PB3.GPIO_PuPd=GPIO_NOPULL
-PB3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PB3.Locked=true
-PB3.PinState=GPIO_PIN_RESET
-PB3.Signal=GPIO_Output
-PB4.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
-PB4.GPIO_Label=LPn_C
-PB4.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
-PB4.GPIO_PuPd=GPIO_NOPULL
-PB4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PB4.Locked=true
-PB4.PinState=GPIO_PIN_SET
-PB4.Signal=GPIO_Output
-PB5.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
-PB5.GPIO_Label=LPn_R
-PB5.GPIO_PuPd=GPIO_NOPULL
-PB5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PB5.Locked=true
-PB5.PinState=GPIO_PIN_SET
-PB5.Signal=GPIO_Output
-PB8.GPIOParameters=GPIO_Pu
-PB8.GPIO_Pu=GPIO_PULLUP
-PB8.Locked=true
-PB8.Mode=I2C
-PB8.Signal=I2C1_SCL
-PB9.GPIOParameters=GPIO_Pu
-PB9.GPIO_Pu=GPIO_PULLUP
-PB9.Locked=true
-PB9.Mode=I2C
-PB9.Signal=I2C1_SDA
-PC0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label
-PC0.GPIO_Label=PWR_EN_R
-PC0.GPIO_PuPd=GPIO_NOPULL
-PC0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
-PC0.Locked=true
-PC0.PinState=GPIO_PIN_SET
-PC0.Signal=GPIO_Output
-PC13-ANTI_TAMP.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC13-ANTI_TAMP.GPIO_Label=B1 [Blue PushButton]
-PC13-ANTI_TAMP.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC13-ANTI_TAMP.GPIO_PuPd=GPIO_NOPULL
-PC13-ANTI_TAMP.Locked=true
-PC13-ANTI_TAMP.Signal=GPXTI13
-PC14-OSC32_IN.Locked=true
-PC14-OSC32_IN.Mode=LSE-External-Oscillator
-PC14-OSC32_IN.Signal=RCC_OSC32_IN
-PC15-OSC32_OUT.Locked=true
-PC15-OSC32_OUT.Mode=LSE-External-Oscillator
-PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
-PC7.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
-PC7.GPIO_Label=INT_L
-PC7.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC7.Locked=true
-PC7.Signal=GPXTI7
-PH0\ -\ OSC_IN.Locked=true
-PH0\ -\ OSC_IN.Mode=HSE-External-Clock-Source
-PH0\ -\ OSC_IN.Signal=RCC_OSC_IN
-PH1\ -\ OSC_OUT.Locked=true
-PH1\ -\ OSC_OUT.Mode=HSE-External-Clock-Source
-PH1\ -\ OSC_OUT.Signal=RCC_OSC_OUT
-PinOutPanel.RotationAngle=0
-ProjectManager.AskForMigrate=true
-ProjectManager.BackupPrevious=false
-ProjectManager.CompilerOptimize=6
-ProjectManager.ComputerToolchain=false
-ProjectManager.CoupleFile=false
-ProjectManager.CustomerFirmwarePackage=
-ProjectManager.DefaultFWLocation=true
-ProjectManager.DeletePrevious=true
-ProjectManager.DeviceId=STM32F401RETx
-ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1
-ProjectManager.FreePins=false
-ProjectManager.HalAssertFull=false
-ProjectManager.HeapSize=0x200
-ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=true
-ProjectManager.LibraryCopy=1
-ProjectManager.MainLocation=Core/Src
-ProjectManager.NoMain=false
-ProjectManager.PreviousToolchain=STM32CubeIDE
-ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=l5cxv0_f401.ioc
-ProjectManager.ProjectName=l5cxv0_f401
-ProjectManager.RegisterCallBack=
-ProjectManager.StackSize=0x400
-ProjectManager.TargetToolchain=STM32CubeIDE
-ProjectManager.ToolChainLocation=
-ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_I2C1_Init-I2C1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true
-RCC.48MHZClocksFreq_Value=48000000
-RCC.AHBFreq_Value=84000000
-RCC.APB1CLKDivider=RCC_HCLK_DIV2
-RCC.APB1Freq_Value=42000000
-RCC.APB1TimFreq_Value=84000000
-RCC.APB2Freq_Value=84000000
-RCC.APB2TimFreq_Value=84000000
-RCC.CortexFreq_Value=84000000
-RCC.FCLKCortexFreq_Value=84000000
-RCC.HCLKFreq_Value=84000000
-RCC.HSE_VALUE=8000000
-RCC.HSI_VALUE=16000000
-RCC.I2SClocksFreq_Value=96000000
-RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLN,PLLP,PLLQ,PLLQCLKFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
-RCC.LSI_VALUE=32000
-RCC.MCO2PinFreq_Value=84000000
-RCC.PLLCLKFreq_Value=84000000
-RCC.PLLN=336
-RCC.PLLP=RCC_PLLP_DIV4
-RCC.PLLQ=7
-RCC.PLLQCLKFreq_Value=48000000
-RCC.RTCFreq_Value=32000
-RCC.RTCHSEDivFreq_Value=4000000
-RCC.SYSCLKFreq_VALUE=84000000
-RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.VCOI2SOutputFreq_Value=192000000
-RCC.VCOInputFreq_Value=1000000
-RCC.VCOOutputFreq_Value=336000000
-RCC.VcooutputI2S=96000000
-SH.GPXTI10.0=GPIO_EXTI10
-SH.GPXTI10.ConfNb=1
-SH.GPXTI13.0=GPIO_EXTI13
-SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
-SH.GPXTI7.0=GPIO_EXTI7
-SH.GPXTI7.ConfNb=1
-USART2.IPParameters=VirtualMode
-USART2.VirtualMode=VM_ASYNC
-VP_SYS_VS_Systick.Mode=SysTick
-VP_SYS_VS_Systick.Signal=SYS_VS_Systick
-board=NUCLEO-F401RE
-boardIOC=true
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Docs/README.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Docs/README.txt
deleted file mode 100644
index 9b12d4065798c8002d1f61525322de603ab776cb..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Docs/README.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-VL53L5CX ULD user manual UM2884 is avaliable on below link:
-https://www.st.com/resource/en/user_manual/um2884-a-guide-to-using-the-vl53l5cx-multizone-timeofflight-ranging-sensor-with-a-wide-field-of-view-ultra-lite-driver-uld-stmicroelectronics.pdf
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_10_motion_indicator.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_10_motion_indicator.c
deleted file mode 100644
index f73933544cc46b18c9c80f5732ecded2faa49940..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_10_motion_indicator.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD motion indicator */
-/***********************************/
-/*
-* This example shows the VL53L5CX motion indicator capabilities.
-* To use this example, user needs to be sure that macro
-* VL53L5CX_DISABLE_MOTION_INDICATOR is NOT enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_plugin_motion_indicator.h"
-
-int example10(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_Motion_Configuration motion_config; /* Motion configuration*/
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Program motion indicator */
- /*********************************/
-
- /* Create motion indicator with resolution 4x4 */
- status = vl53l5cx_motion_indicator_init(&Dev, &motion_config, VL53L5CX_RESOLUTION_4X4);
- if(status)
- {
- printf("Motion indicator init failed with status : %u\n", status);
- return status;
- }
-
- /* (Optional) Change the min and max distance used to detect motions. The
- * difference between min and max must never be >1500mm, and minimum never be <400mm,
- * otherwise the function below returns error 127 */
- status = vl53l5cx_motion_indicator_set_distance_motion(&Dev, &motion_config, 1000, 2000);
- if(status)
- {
- printf("Motion indicator set distance motion failed with status : %u\n", status);
- return status;
- }
-
- /* If user want to change the resolution, he also needs to update the motion indicator resolution */
- //status = vl53l5cx_set_resolution(&Dev, VL53L5CX_RESOLUTION_4X4);
- //status = vl53l5cx_motion_indicator_set_resolution(&Dev, &motion_config, VL53L5CX_RESOLUTION_4X4);
-
- /* Increase ranging frequency for the example */
- status = vl53l5cx_set_ranging_frequency_hz(&Dev, 2);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Motion power : %3lu\n",
- i,
- Results.motion_indicator.motion[motion_config.map_id[i]]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_11_motion_indicator_with_detection_thresholds.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_11_motion_indicator_with_detection_thresholds.c
deleted file mode 100644
index ba337cda9974c394a8a0df2b7a2d0423cf411e3d..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_11_motion_indicator_with_detection_thresholds.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/************************************************************/
-/* VL53L5CX ULD motion indicator with detection thresholds */
-/************************************************************/
-/*
-* This example shows how to use the motion indicator with detection threshold.
-* This kind of configuration might be used for user detection applications.
-* To use this example, user needs to be sure that macro
-* VL53L5CX_DISABLE_MOTION_INDICATOR is NOT enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_plugin_motion_indicator.h"
-#include "vl53l5cx_plugin_detection_thresholds.h"
-
-// #define UNUSED(x) (void)(x)
-
-/* This function needs to be filled by the customer. It allows knowing when
- * the VL53L5CX interrupt is raised on GPIO1. This is the only way to use detection thresholds.
- */
-/*
-int WaitForL5Interrupt(VL53L5CX_Configuration * pDev) {
-
- //Add your implementation here ...
- UNUSED(pDev);
-
- return 0;
-}
-*/
-extern int WaitForL5Interrupt(VL53L5CX_Configuration * pDev);
-extern int IntCount;
-
-int example11(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_Motion_Configuration motion_config; /* Motion configuration*/
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Program motion indicator */
- /*********************************/
-
- /* Create motion indicator with resolution 8x8 */
- status = vl53l5cx_motion_indicator_init(&Dev, &motion_config, VL53L5CX_RESOLUTION_8X8);
- if(status)
- {
- printf("Motion indicator init failed with status : %u\n", status);
- return status;
- }
-
- /* (Optional) Change the min and max distance used to detect motions. The
- * difference between min and max must never be >1500mm, and minimum never be <400mm,
- * otherwise the function below returns error 127 */
- status = vl53l5cx_motion_indicator_set_distance_motion(&Dev, &motion_config, 1000, 2000);
- if(status)
- {
- printf("Motion indicator set distance motion failed with status : %u\n", status);
- return status;
- }
-
- /* If user want to change the resolution, he also needs to update the motion indicator resolution */
- //status = vl53l5cx_set_resolution(&Dev, VL53L5CX_RESOLUTION_4X4);
- //status = vl53l5cx_motion_indicator_set_resolution(&Dev, &motion_config, VL53L5CX_RESOLUTION_4X4);
-
-
- /* Set the device in AUTONOMOUS and set a small integration time to reduce power consumption */
- status = vl53l5cx_set_resolution(&Dev, VL53L5CX_RESOLUTION_8X8);
- status = vl53l5cx_set_ranging_mode(&Dev, VL53L5CX_RANGING_MODE_AUTONOMOUS);
- status = vl53l5cx_set_ranging_frequency_hz(&Dev, 2);
- status = vl53l5cx_set_integration_time_ms(&Dev, 10);
-
-
- /*********************************/
- /* Program detection thresholds */
- /*********************************/
-
- /* In this example, we want 1 thresholds per zone for a 8x8 resolution */
- /* Create array of thresholds (size cannot be changed) */
- VL53L5CX_DetectionThresholds thresholds[VL53L5CX_NB_THRESHOLDS];
-
- /* Set all values to 0 */
- memset(&thresholds, 0, sizeof(thresholds));
-
- /* Add thresholds for all zones (64 zones in resolution 4x4, or 64 in 8x8) */
- for(i = 0; i < 64; i++){
- thresholds[i].zone_num = i;
- thresholds[i].measurement = VL53L5CX_MOTION_INDICATOR;
- thresholds[i].type = VL53L5CX_GREATER_THAN_MAX_CHECKER;
- thresholds[i].mathematic_operation = VL53L5CX_OPERATION_NONE;
-
- /* The value 44 is given as example. All motion above 44 will be considered as a movement */
- thresholds[i].param_low_thresh = 44;
- thresholds[i].param_high_thresh = 44;
- }
-
- /* The last thresholds must be clearly indicated. As we have 64
- * checkers, the last one is the 63 */
- thresholds[63].zone_num = VL53L5CX_LAST_THRESHOLD | thresholds[63].zone_num;
-
- /* Send array of thresholds to the sensor */
- vl53l5cx_set_detection_thresholds(&Dev, thresholds);
-
- /* Enable detection thresholds */
- vl53l5cx_set_detection_thresholds_enable(&Dev, 1);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- IntCount = 0;
- status = vl53l5cx_start_ranging(&Dev);
- printf("Waiting for a movement into the FOV between 1m and 2m...\n");
-
- loop = 0;
- while(loop < 10)
- {
- /* Function WaitForL5Interrupt() does not exists, and must be
- * implemented by user. It allows catching the interrupt raised on
- * pin A3 (INT), when the checkers detect the programmed
- * conditions.
- */
-
- isReady = WaitForL5Interrupt(&Dev);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 8x8 mode by default, we have a total
- * of 64 zones to print. For this example, only the data of first zone are
- * print */
- for(i = 0; i < 64; i++)
- {
- if(Results.motion_indicator.motion[motion_config.map_id[i]] >= 44)
- {
- printf(" Movement detected in this zone : %3d !\n", i);
- }
- }
- printf("\n");
- loop++;
- }
-
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_1_ranging_basic.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_1_ranging_basic.c
deleted file mode 100644
index cd8acf9b698f6d7671af941764380d3b7c2b778e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_1_ranging_basic.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD basic example */
-/***********************************/
-/*
-* This example is the most basic. It initializes the VL53L5CX ULD, and starts
-* a ranging to capture 10 frames.
-*
-* By default, ULD is configured to have the following settings :
-* - Resolution 4x4
-* - Ranging period 1Hz
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example1(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_2_get_set_params.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_2_get_set_params.c
deleted file mode 100644
index e73e2d7c1b5431b86c2871e154267e942731ad72..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_2_get_set_params.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD get/set params */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to get/set params. It
-* initializes the VL53L5CX ULD, set a configuration, and starts
-* a ranging to capture 10 frames.
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example2(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- uint32_t integration_time_ms;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Set some params */
- /*********************************/
-
- /* Set resolution in 8x8. WARNING : As others settings depend to this
- * one, it must be the first to use.
- */
- status = vl53l5cx_set_resolution(&Dev, VL53L5CX_RESOLUTION_8X8);
- if(status)
- {
- printf("vl53l5cx_set_resolution failed, status %u\n", status);
- return status;
- }
-
- /* Set ranging frequency to 10Hz.
- * Using 4x4, min frequency is 1Hz and max is 60Hz
- * Using 8x8, min frequency is 1Hz and max is 15Hz
- */
- status = vl53l5cx_set_ranging_frequency_hz(&Dev, 10);
- if(status)
- {
- printf("vl53l5cx_set_ranging_frequency_hz failed, status %u\n", status);
- return status;
- }
-
- /* Set target order to closest */
- status = vl53l5cx_set_target_order(&Dev, VL53L5CX_TARGET_ORDER_CLOSEST);
- if(status)
- {
- printf("vl53l5cx_set_target_order failed, status %u\n", status);
- return status;
- }
-
- /* Get current integration time */
- status = vl53l5cx_get_integration_time_ms(&Dev, &integration_time_ms);
- if(status)
- {
- printf("vl53l5cx_get_integration_time_ms failed, status %u\n", status);
- return status;
- }
- printf("Current integration time is : %d ms\n", integration_time_ms);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 8x8 mode, we have a total
- * of 64 zones to print. For this example, only the data of
- * first zone are print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 64; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_3_ranging_modes.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_3_ranging_modes.c
deleted file mode 100644
index 506426303fd360e7bc65b00ffaf5bc5807f0802a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_3_ranging_modes.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD ranging mode */
-/***********************************/
-/*
-* This example shows the differences between ranging modes of VL53L5CX
-* (mode continuous and autonomous). For both modes, it initializes the VL53L5CX
-* ULD, set the mode, and starts a ranging to capture 10 frames.
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example3(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Set ranging mode autonomous */
- /*********************************/
-
- status = vl53l5cx_set_ranging_mode(&Dev, VL53L5CX_RANGING_MODE_AUTONOMOUS);
- if(status)
- {
- printf("vl53l5cx_set_ranging_mode failed, status %u\n", status);
- return status;
- }
-
- /* Using autonomous mode, the integration time can be updated (not possible
- * using continuous) */
- status = vl53l5cx_set_integration_time_ms(&Dev, 20);
-
- /* Start a ranging session */
- status = vl53l5cx_start_ranging(&Dev);
- printf("Start ranging autonomous\n");
-
- loop = 0;
- while(loop < 10)
- {
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("Stop ranging autonomous\n");
-
-
- /*********************************/
- /* Set ranging mode continuous */
- /*********************************/
-
- /* In continuous mode, the integration time cannot be programmed
- * (automatically set to maximum value) */
-
- status = vl53l5cx_set_ranging_mode(&Dev, VL53L5CX_RANGING_MODE_CONTINUOUS);
- if(status)
- {
- printf("vl53l5cx_set_ranging_mode failed, status %u\n", status);
- return status;
- }
-
- /* Trying to update value below will have no impact on integration time */
- //status = vl53l5cx_set_integration_time_ms(&Dev, 20);
-
- /* Start a ranging session */
- status = vl53l5cx_start_ranging(&Dev);
- printf("Start ranging continuous\n");
-
- loop = 0;
- while(loop < 10)
- {
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("Stop ranging continuous\n");
-
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_4_power_modes.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_4_power_modes.c
deleted file mode 100644
index ceb5615db84796e84a9ae6486f8c5768d87565a1..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_4_power_modes.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD power mode */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to change power mode. It
-* initializes the VL53L5CX ULD, set a configuration, change the power mode, and
-* starts a ranging to capture 10 frames.
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example4(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
- /*********************************/
- /* Change the power mode */
- /*********************************/
-
- /* For the example, we don't want to use the sensor during 10 seconds. In order to reduce
- * the power consumption, the sensor is set to low power mode.
- */
- status = vl53l5cx_set_power_mode(&Dev, VL53L5CX_POWER_MODE_SLEEP);
- if(status)
- {
- printf("vl53l5cx_set_power_mode failed, status %u\n", status);
- return status;
- }
- printf("VL53L5CX is now sleeping\n");
-
- /* We wait 5 seconds, only for the example */
- printf("Waiting 5 seconds for the example...\n");
- VL53L5CX_WaitMs(&(Dev.platform), 5000);
-
- /* After 5 seconds, the sensor needs to be restarted */
- status = vl53l5cx_set_power_mode(&Dev, VL53L5CX_POWER_MODE_WAKEUP);
- if(status)
- {
- printf("vl53l5cx_set_power_mode failed, status %u\n", status);
- return status;
- }
- printf("VL53L5CX is now waking up\n");
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_5_multiple_targets_per_zone.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_5_multiple_targets_per_zone.c
deleted file mode 100644
index 0ce775d754626096f0e977cc3b1eb21877688de7..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_5_multiple_targets_per_zone.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD multiple targets */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to get/set params. It
-* initializes the VL53L5CX ULD, set a configuration, and starts
-* a ranging to capture 10 frames.
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example5(void)
-{
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i, j;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Set nb target per zone */
- /*********************************/
-
- /* Each zone can output between 1 and 4 targets. By default the output
- * is set to 1 targets, but user can change it using macro
- * VL53L5CX_NB_TARGET_PER_ZONE located in file 'platform.h'.
- */
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- /* Print per zone results. These results are the same for all targets */
- printf("Zone %3u : %2u, %6lu, %6lu, ",
- i,
- Results.nb_target_detected[i],
- Results.ambient_per_spad[i],
- Results.nb_spads_enabled[i]);
-
- for(j = 0; j < VL53L5CX_NB_TARGET_PER_ZONE; j++)
- {
- /* Print per target results. These results depends of the target nb */
- uint16_t idx = VL53L5CX_NB_TARGET_PER_ZONE * i + j;
- printf("Target[%1u] : %2u, %4d, %6lu, %3u, ",
- j,
- Results.target_status[idx],
- Results.distance_mm[idx],
- Results.signal_per_spad[idx],
- Results.range_sigma_mm[idx]);
- }
- printf("\n");
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_6_I2C_and_RAM_optimization.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_6_I2C_and_RAM_optimization.c
deleted file mode 100644
index d4d814cc2ddd9fe3d698dad1b4395f2d4d1588a7..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_6_I2C_and_RAM_optimization.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/**************************************/
-/* VL53L5CX ULD I2C/RAM optimization */
-/**************************************/
-/*
-* This example shows the possibility of VL53L5CX to reduce I2C transactions
-* and RAM footprint. It initializes the VL53L5CX ULD, and starts
-* a ranging to capture 10 frames.
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int example6(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Reduce RAM & I2C access */
- /*********************************/
-
- /* Results can be tuned in order to reduce I2C access and RAM footprints.
- * The 'platform.h' file contains macros used to disable output. If user declare
- * one of these macros, the results will not be sent through I2C, and the array will not
- * be created into the VL53L5CX_ResultsData structure.
- * For the minimum size, ST recommends 1 targets per zone, and only keep distance_mm,
- * target_status, and nb_target_detected. The following macros can be defined into file 'platform.h':
- *
- * #define VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- * #define VL53L5CX_DISABLE_NB_SPADS_ENABLED
- * #define VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- * #define VL53L5CX_DISABLE_RANGE_SIGMA_MM
- * #define VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- * #define VL53L5CX_DISABLE_MOTION_INDICATOR
- */
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_7_calibrate_xtalk.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_7_calibrate_xtalk.c
deleted file mode 100644
index 7650f2d042d97877edf819fd289cb9d40af50ab2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_7_calibrate_xtalk.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD calibrate Xtalk */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to calibrate Xtalk. It
-* initializes the VL53L5CX ULD, perform a Xtalk calibration, and starts
-* a ranging to capture 10 frames.
-
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_plugin_xtalk.h"
-
-int example7(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
- /* Buffer containing Xtalk data */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Start Xtalk calibration */
- /*********************************/
-
- /* Start Xtalk calibration with a 3% reflective target at 600mm for the
- * sensor, using 4 samples.
- */
- printf("Running Xtalk calibration...\n");
-
- status = vl53l5cx_calibrate_xtalk(&Dev, 3, 4, 600);
- if(status)
- {
- printf("vl53l5cx_calibrate_xtalk failed, status %u\n", status);
- return status;
- }else
- {
- printf("Xtalk calibration done\n");
-
- /* Get Xtalk calibration data, in order to use them later */
- status = vl53l5cx_get_caldata_xtalk(&Dev, xtalk_data);
-
- /* Set Xtalk calibration data */
- status = vl53l5cx_set_caldata_xtalk(&Dev, xtalk_data);
- }
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_8_vizualize_xtalk_data.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_8_vizualize_xtalk_data.c
deleted file mode 100644
index 12fd123c0e7379e1694a1a883eaf0d96adc364db..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_8_vizualize_xtalk_data.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD visualize Xtalk */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to visualize Xtalk data. It
-* initializes the VL53L5CX ULD, perform a Xtalk calibration, and starts
-* a ranging to capture 10 frames.
-
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_plugin_xtalk.h"
-
-int example8(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
- /* Buffer containing Xtalk data */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Start Xtalk calibration */
- /*********************************/
-
- /* Start Xtalk calibration with a 3% reflective target at 600mm for the
- * sensor, using 4 samples.
- */
-
- printf("Running Xtalk calibration...\n");
-
- status = vl53l5cx_calibrate_xtalk(&Dev, 3, 4, 600);
- if(status)
- {
- printf("vl53l5cx_calibrate_xtalk failed, status %u\n", status);
- return status;
- }else
- {
- printf("Xtalk calibration done\n");
-
- /* Get Xtalk calibration data, in order to use them later */
- status = vl53l5cx_get_caldata_xtalk(&Dev, xtalk_data);
-
- /* Set Xtalk calibration data */
- status = vl53l5cx_set_caldata_xtalk(&Dev, xtalk_data);
- }
-
- /* (Optional) Visualize Xtalk grid and Xtalk shape */
- uint32_t i, j;
- union Block_header *bh_ptr;
- uint32_t xtalk_signal_kcps_grid[VL53L5CX_RESOLUTION_8X8];
- uint16_t xtalk_shape_bins[144];
-
- /* Swap buffer */
- VL53L5CX_SwapBuffer(xtalk_data, VL53L5CX_XTALK_BUFFER_SIZE);
-
- /* Get data */
- for(i = 0; i < VL53L5CX_XTALK_BUFFER_SIZE; i = i + 4)
- {
- bh_ptr = (union Block_header *)&(xtalk_data[i]);
- if (bh_ptr->idx == 0xA128){
- printf("Xtalk shape bins located at position %#06x\n", i);
- for (j = 0; j < 144; j++){
- memcpy(&(xtalk_shape_bins[j]), &(xtalk_data[i + 4 + j * 2]), 2);
- printf("xtalk_shape_bins[%d] = %u\n", j, xtalk_shape_bins[j]);
- }
- }
- if (bh_ptr->idx == 0x9FFC){
- printf("Xtalk signal kcps located at position %#06x\n", i);
- for (j = 0; j < VL53L5CX_RESOLUTION_8X8; j++){
- memcpy(&(xtalk_signal_kcps_grid[j]), &(xtalk_data[i + 4 + j * 4]), 4);
- xtalk_signal_kcps_grid[j] /= 2048;
- printf("xtalk_signal_kcps_grid[%d] = %d\n", j, xtalk_signal_kcps_grid[j]);
- }
- }
- }
-
- /* Re-Swap buffer (in case of re-using data later) */
- VL53L5CX_SwapBuffer(xtalk_data, VL53L5CX_XTALK_BUFFER_SIZE);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_9_detection_thresholds.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_9_detection_thresholds.c
deleted file mode 100644
index e8834301d3bcbf1d74bc414cbdc00b20d147b63b..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Examples/Example_9_detection_thresholds.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD interrupt checkers */
-/***********************************/
-/*
-* This example shows the possibility of VL53L5CX to program detection thresholds. It
-* initializes the VL53L5CX ULD, create 2 thresholds per zone for a 4x4 resolution,
-* and starts a ranging to capture 10 frames.
-
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_plugin_detection_thresholds.h"
-
-// #define UNUSED(x) (void)(x)
-
-/* This function needs to be filled by the customer. It allows knowing when
- * the VL53L5CX interrupt is raised on GPIO1. This is the only way to use detection thresholds.
- */
-/*
-int WaitForL5Interrupt(VL53L5CX_Configuration * pDev) {
-
- //Add your implementation here ...
- UNUSED(pDev);
-
- return 0;
-}
-*/
-extern int WaitForL5Interrupt(VL53L5CX_Configuration * pDev);
-extern int IntCount;
-
-int example9(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
- /*********************************/
- /* Program detection thresholds */
- /*********************************/
-
- /* In this example, we want 2 thresholds per zone for a 4x4 resolution */
- /* Create array of thresholds (size cannot be changed) */
- VL53L5CX_DetectionThresholds thresholds[VL53L5CX_NB_THRESHOLDS];
-
- /* Set all values to 0 */
- memset(&thresholds, 0, sizeof(thresholds));
-
- /* Add thresholds for all zones (16 zones in resolution 4x4, or 64 in 8x8) */
- for(i = 0; i < 16; i++){
- /* The first wanted thresholds is GREATER_THAN mode. Please note that the
- * first one must always be set with a mathematic_operation
- * VL53L5CX_OPERATION_NONE.
- * For this example, the signal thresholds is set to 150 kcps/spads
- * (the format is automatically updated inside driver)
- */
- thresholds[2*i].zone_num = i;
- thresholds[2*i].measurement = VL53L5CX_SIGNAL_PER_SPAD_KCPS;
- thresholds[2*i].type = VL53L5CX_GREATER_THAN_MAX_CHECKER;
- thresholds[2*i].mathematic_operation = VL53L5CX_OPERATION_NONE;
- thresholds[2*i].param_low_thresh = 150;
- thresholds[2*i].param_high_thresh = 150;
-
- /* The second wanted checker is IN_WINDOW mode. We will set a
- * mathematical thresholds VL53L5CX_OPERATION_OR, to add the previous
- * checker to this one.
- * For this example, distance thresholds are set between 200mm and
- * 400mm (the format is automatically updated inside driver).
- */
- thresholds[2*i+1].zone_num = i;
- thresholds[2*i+1].measurement = VL53L5CX_DISTANCE_MM;
- thresholds[2*i+1].type = VL53L5CX_IN_WINDOW;
- thresholds[2*i+1].mathematic_operation = VL53L5CX_OPERATION_OR;
- thresholds[2*i+1].param_low_thresh = 200;
- thresholds[2*i+1].param_high_thresh = 400;
- }
-
- /* The last thresholds must be clearly indicated. As we have 32
- * checkers (16 zones x 2), the last one is the 31 */
- thresholds[31].zone_num = VL53L5CX_LAST_THRESHOLD | thresholds[31].zone_num;
-
- /* Send array of thresholds to the sensor */
- vl53l5cx_set_detection_thresholds(&Dev, thresholds);
-
- /* Enable detection thresholds */
- vl53l5cx_set_detection_thresholds_enable(&Dev, 1);
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_set_ranging_frequency_hz(&Dev, 10);
-
- IntCount = 0;
- status = vl53l5cx_start_ranging(&Dev);
- printf("Put an object between 200mm and 400mm to catch an interrupt\n");
-
- loop = 0;
- while(loop < 100)
- {
- /* Function WaitForL5Interrupt() does not exists, and must be
- * implemented by user. It allows catching the interrupt raised on
- * pin A3 (INT), when the checkers detect the programmed
- * conditions.
- */
-
- isReady = WaitForL5Interrupt(&Dev);
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of
- * first zone are print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm, Signal : %5lu kcps/SPADs\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.signal_per_spad[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/LICENSE.txt
deleted file mode 100644
index b40364c28f3652a3ef7e5e6450ad4648d711f28a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/LICENSE.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-This software component is provided to you as part of a software package and
-applicable license terms are in the Package_license file. If you received this
-software component outside of a package or without applicable license terms,
-the terms of the BSD-3-Clause license shall apply.
-You may obtain a copy of the BSD-3-Clause at:
-https://opensource.org/licenses/BSD-3-Clause
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.c
deleted file mode 100644
index b5d2ca9f58b95600ee1d24adfb84824198913c8d..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-
-#include "platform.h"
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform)
-{
- uint8_t status = 0;
-
- /* (Optional) Need to be implemented by customer. This function returns 0 if OK */
-
- /* Set pin LPN to LOW */
- /* Set pin AVDD to LOW */
- /* Set pin VDDIO to LOW */
- VL53L5CX_WaitMs(p_platform, 100);
-
- /* Set pin LPN of to HIGH */
- /* Set pin AVDD of to HIGH */
- /* Set pin VDDIO of to HIGH */
- VL53L5CX_WaitMs(p_platform, 100);
-
- return status;
-}
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size)
-{
- uint32_t i, tmp;
-
- /* Example of possible implementation using <string.h> */
- for(i = 0; i < size; i = i + 4)
- {
- tmp = (
- buffer[i]<<24)
- |(buffer[i+1]<<16)
- |(buffer[i+2]<<8)
- |(buffer[i+3]);
-
- memcpy(&(buffer[i]), &tmp, 4);
- }
-}
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.h
deleted file mode 100644
index 9b23c0d11134d268753579edaab0cfbbbe58e1f0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/Platform/platform.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef _PLATFORM_H_
-#define _PLATFORM_H_
-#pragma once
-
-#include <stdint.h>
-#include <string.h>
-
-/**
- * @brief Structure VL53L5CX_Platform needs to be filled by the customer,
- * depending on his platform. At least, it contains the VL53L5CX I2C address.
- * Some additional fields can be added, as descriptors, or platform
- * dependencies. Anything added into this structure is visible into the platform
- * layer.
- */
-
-typedef struct
-{
- /* To be filled with customer's platform. At least an I2C address/descriptor
- * needs to be added */
- /* Example for most standard platform : I2C address of sensor */
- uint16_t address;
-
-} VL53L5CX_Platform;
-
-/*
- * @brief The macro below is used to define the number of target per zone sent
- * through I2C. This value can be changed by user, in order to tune I2C
- * transaction, and also the total memory size (a lower number of target per
- * zone means a lower RAM). The value must be between 1 and 4.
- */
-
-#define VL53L5CX_NB_TARGET_PER_ZONE 1U
-
-/*
- * @brief The macro below can be used to avoid data conversion into the driver.
- * By default there is a conversion between firmware and user data. Using this macro
- * allows to use the firmware format instead of user format. The firmware format allows
- * an increased precision.
- */
-
-// #define VL53L5CX_USE_RAW_FORMAT
-
-/*
- * @brief All macro below are used to configure the sensor output. User can
- * define some macros if he wants to disable selected output, in order to reduce
- * I2C access.
- */
-
-// #define VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-// #define VL53L5CX_DISABLE_NB_SPADS_ENABLED
-// #define VL53L5CX_DISABLE_NB_TARGET_DETECTED
-// #define VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-// #define VL53L5CX_DISABLE_RANGE_SIGMA_MM
-// #define VL53L5CX_DISABLE_DISTANCE_MM
-// #define VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-// #define VL53L5CX_DISABLE_TARGET_STATUS
-// #define VL53L5CX_DISABLE_MOTION_INDICATOR
-
-/**
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) *p_values : Pointer of value to read.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value);
-
-/**
- * @brief Mandatory function used to write one single byte.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) value : Pointer of value to write.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value);
-
-/**
- * @brief Mandatory function used to read multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to read.
- * @param (uint8_t) *p_values : Buffer of bytes to read.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Mandatory function used to write multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to write.
- * @param (uint8_t) *p_values : Buffer of bytes to write.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Optional function, only used to perform an hardware reset of the
- * sensor. This function is not used in the API, but it can be used by the host.
- * This function is not mandatory to fill if user don't want to reset the
- * sensor.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform);
-
-/**
- * @brief Mandatory function, used to swap a buffer. The buffer size is always a
- * multiple of 4 (4, 8, 12, 16, ...).
- * @param (uint8_t*) buffer : Buffer to swap, generally uint32_t
- * @param (uint16_t) size : Buffer size to swap
- */
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size);
-/**
- * @brief Mandatory function, used to wait during an amount of time. It must be
- * filled as it's used into the API.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint32_t) TimeMs : Time to wait in ms.
- * @return (uint8_t) status : 0 if wait is finished.
- */
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs);
-
-#endif // _PLATFORM_H_
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/LICENSE.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/LICENSE.txt
deleted file mode 100644
index b40364c28f3652a3ef7e5e6450ad4648d711f28a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/LICENSE.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-This software component is provided to you as part of a software package and
-applicable license terms are in the Package_license file. If you received this
-software component outside of a package or without applicable license terms,
-the terms of the BSD-3-Clause license shall apply.
-You may obtain a copy of the BSD-3-Clause at:
-https://opensource.org/licenses/BSD-3-Clause
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_api.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_api.h
deleted file mode 100644
index 0e870ac0b4a620dbc9c473db4e2919db875d2db8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_api.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_API_H_
-#define VL53L5CX_API_H_
-
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-#pragma anon_unions
-#endif
-
-
-
-#include "platform.h"
-
-/**
- * @brief Current driver version.
- */
-
-#define VL53L5CX_API_REVISION "VL53L5CX_2.0.0"
-
-/**
- * @brief Default I2C address of VL53L5CX sensor. Can be changed using function
- * vl53l5cx_set_i2c_address() function is called.
- */
-
-#define VL53L5CX_DEFAULT_I2C_ADDRESS ((uint16_t)0x52)
-
-/**
- * @brief Macro VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8 allows
- * setting sensor in 4x4 mode or 8x8 mode, using function
- * vl53l5cx_set_resolution().
- */
-
-#define VL53L5CX_RESOLUTION_4X4 ((uint8_t) 16U)
-#define VL53L5CX_RESOLUTION_8X8 ((uint8_t) 64U)
-
-
-/**
- * @brief Macro VL53L5CX_TARGET_ORDER_STRONGEST or VL53L5CX_TARGET_ORDER_CLOSEST
- * are used to select the target order for data output.
- */
-
-#define VL53L5CX_TARGET_ORDER_CLOSEST ((uint8_t) 1U)
-#define VL53L5CX_TARGET_ORDER_STRONGEST ((uint8_t) 2U)
-
-/**
- * @brief Macro VL53L5CX_RANGING_MODE_CONTINUOUS and
- * VL53L5CX_RANGING_MODE_AUTONOMOUS are used to change the ranging mode.
- * Autonomous mode can be used to set a precise integration time, whereas
- * continuous is always maximum.
- */
-
-#define VL53L5CX_RANGING_MODE_CONTINUOUS ((uint8_t) 1U)
-#define VL53L5CX_RANGING_MODE_AUTONOMOUS ((uint8_t) 3U)
-
-/**
- * @brief The default power mode is VL53L5CX_POWER_MODE_WAKEUP. User can choose
- * the mode VL53L5CX_POWER_MODE_SLEEP to save power consumption is the device
- * is not used. The low power mode retains the firmware and the configuration.
- * Both modes can be changed using function vl53l5cx_set_power_mode().
- */
-
-#define VL53L5CX_POWER_MODE_SLEEP ((uint8_t) 0U)
-#define VL53L5CX_POWER_MODE_WAKEUP ((uint8_t) 1U)
-
-/**
- * @brief Macro VL53L5CX_STATUS_OK indicates that VL53L5 sensor has no error.
- * Macro VL53L5CX_STATUS_ERROR indicates that something is wrong (value,
- * I2C access, ...). Macro VL53L5CX_MCU_ERROR is used to indicate a MCU issue.
- */
-
-#define VL53L5CX_STATUS_OK ((uint8_t) 0U)
-#define VL53L5CX_STATUS_TIMEOUT_ERROR ((uint8_t) 1U)
-#define VL53L5CX_STATUS_CORRUPTED_FRAME ((uint8_t) 2U)
-#define VL53L5CX_STATUS_CRC_CSUM_FAILED ((uint8_t) 3U)
-#define VL53L5CX_STATUS_XTALK_FAILED ((uint8_t) 4U)
-#define VL53L5CX_MCU_ERROR ((uint8_t) 66U)
-#define VL53L5CX_STATUS_INVALID_PARAM ((uint8_t) 127U)
-#define VL53L5CX_STATUS_ERROR ((uint8_t) 255U)
-
-/**
- * @brief Definitions for Range results block headers
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0xDB840401U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0xDBC40404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0xDEC40402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0xDF440402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0xE0440401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0xE0840401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xD85808C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0xDB84U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0xDBC4U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0xDEC4U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0xDF44U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0xE044U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0xE084U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xD858U)
-
-#else
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0x57D00401U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0x58900404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0x64900402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0x66900402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0x6A900401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0x6B900401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xCC5008C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0x57D0U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0x5890U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0x6490U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0x6690U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0x6A90U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0x6B90U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xCC50U)
-#endif
-
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_NVM_DATA_SIZE ((uint16_t)492U)
-#define VL53L5CX_CONFIGURATION_SIZE ((uint16_t)972U)
-#define VL53L5CX_OFFSET_BUFFER_SIZE ((uint16_t)488U)
-#define VL53L5CX_XTALK_BUFFER_SIZE ((uint16_t)776U)
-
-#define VL53L5CX_DCI_ZONE_CONFIG ((uint16_t)0x5450U)
-#define VL53L5CX_DCI_FREQ_HZ ((uint16_t)0x5458U)
-#define VL53L5CX_DCI_INT_TIME ((uint16_t)0x545CU)
-#define VL53L5CX_DCI_FW_NB_TARGET ((uint16_t)0x5478)
-#define VL53L5CX_DCI_RANGING_MODE ((uint16_t)0xAD30U)
-#define VL53L5CX_DCI_DSS_CONFIG ((uint16_t)0xAD38U)
-#define VL53L5CX_DCI_VHV_CONFIG ((uint16_t)0xAD60U)
-#define VL53L5CX_DCI_TARGET_ORDER ((uint16_t)0xAE64U)
-#define VL53L5CX_DCI_SHARPENER ((uint16_t)0xAED8U)
-#define VL53L5CX_DCI_INTERNAL_CP ((uint16_t)0xB39CU)
-#define VL53L5CX_DCI_SYNC_PIN ((uint16_t)0xB5F0U)
-#define VL53L5CX_DCI_MOTION_DETECTOR_CFG ((uint16_t)0xBFACU)
-#define VL53L5CX_DCI_SINGLE_RANGE ((uint16_t)0xD964U)
-#define VL53L5CX_DCI_OUTPUT_CONFIG ((uint16_t)0xD968U)
-#define VL53L5CX_DCI_OUTPUT_ENABLES ((uint16_t)0xD970U)
-#define VL53L5CX_DCI_OUTPUT_LIST ((uint16_t)0xD980U)
-#define VL53L5CX_DCI_PIPE_CONTROL ((uint16_t)0xDB80U)
-#define VL53L5CX_GLARE_FILTER ((uint16_t)0xE108U)
-
-
-#define VL53L5CX_UI_CMD_STATUS ((uint16_t)0x2C00U)
-#define VL53L5CX_UI_CMD_START ((uint16_t)0x2C04U)
-#define VL53L5CX_UI_CMD_END ((uint16_t)0x2FFFU)
-
-/**
- * @brief Inner values for API. Max buffer size depends of the selected output.
- */
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-#define L5CX_AMB_SIZE 260U
-#else
-#define L5CX_AMB_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
-#define L5CX_SPAD_SIZE 260U
-#else
-#define L5CX_SPAD_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
-#define L5CX_NTAR_SIZE 68U
-#else
-#define L5CX_NTAR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-#define L5CX_SPS_SIZE ((256U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SPS_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
-#define L5CX_SIGR_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SIGR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
-#define L5CX_DIST_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_DIST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-#define L5CX_RFLEST_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_RFLEST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
-#define L5CX_STA_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_STA_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
-#define L5CX_MOT_SIZE 144U
-#else
-#define L5CX_MOT_SIZE 0U
-#endif
-
-/**
- * @brief Macro VL53L5CX_MAX_RESULTS_SIZE indicates the maximum size used by
- * output through I2C. Value 40 corresponds to headers + meta-data + common-data
- * and 20 corresponds to the footer.
- */
-
-#define VL53L5CX_MAX_RESULTS_SIZE ( 40U \
- + L5CX_AMB_SIZE + L5CX_SPAD_SIZE + L5CX_NTAR_SIZE + L5CX_SPS_SIZE \
- + L5CX_SIGR_SIZE + L5CX_DIST_SIZE + L5CX_RFLEST_SIZE + L5CX_STA_SIZE \
- + L5CX_MOT_SIZE + 20U)
-
-/**
- * @brief Macro VL53L5CX_TEMPORARY_BUFFER_SIZE can be used to know the size of
- * the temporary buffer. The minimum size is 1024, and the maximum depends of
- * the output configuration.
- */
-
-#if VL53L5CX_MAX_RESULTS_SIZE < 1024U
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) 1024U)
-#else
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) VL53L5CX_MAX_RESULTS_SIZE)
-#endif
-
-
-/**
- * @brief Structure VL53L5CX_Configuration contains the sensor configuration.
- * User MUST not manually change these field, except for the sensor address.
- */
-
-typedef struct
-{
- /* Platform, filled by customer into the 'platform.h' file */
- VL53L5CX_Platform platform;
- /* Results streamcount, value auto-incremented at each range */
- uint8_t streamcount;
- /* Size of data read though I2C */
- uint32_t data_read_size;
- /* Address of default configuration buffer */
- uint8_t *default_configuration;
- /* Address of default Xtalk buffer */
- uint8_t *default_xtalk;
- /* Offset buffer */
- uint8_t offset_data[VL53L5CX_OFFSET_BUFFER_SIZE];
- /* Xtalk buffer */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
- /* Temporary buffer used for internal driver processing */
- uint8_t temp_buffer[VL53L5CX_TEMPORARY_BUFFER_SIZE];
- /* Auto-stop flag for stopping the sensor */
- uint8_t is_auto_stop_enabled;
-} VL53L5CX_Configuration;
-
-
-/**
- * @brief Structure VL53L5CX_ResultsData contains the ranging results of
- * VL53L5CX. If user wants more than 1 target per zone, the results can be split
- * into 2 sub-groups :
- * - Per zone results. These results are common to all targets (ambient_per_spad
- * , nb_target_detected and nb_spads_enabled).
- * - Per target results : These results are different relative to the detected
- * target (signal_per_spad, range_sigma_mm, distance_mm, reflectance,
- * target_status).
- */
-
-typedef struct
-{
- /* Internal sensor silicon temperature */
- int8_t silicon_temp_degc;
-
- /* Ambient noise in kcps/spads */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- uint32_t ambient_per_spad[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of valid target detected for 1 zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- uint8_t nb_target_detected[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of spads enabled for this ranging */
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- uint32_t nb_spads_enabled[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Signal returned to the sensor in kcps/spads */
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- uint32_t signal_per_spad[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Sigma of the current distance in mm */
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- uint16_t range_sigma_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Measured distance in mm */
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- int16_t distance_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Estimated reflectance in percent */
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- uint8_t reflectance[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Status indicating the measurement validity (5 & 9 means ranging OK)*/
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- uint8_t target_status[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Motion detector results */
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- struct
- {
- uint32_t global_indicator_1;
- uint32_t global_indicator_2;
- uint8_t status;
- uint8_t nb_of_detected_aggregates;
- uint8_t nb_of_aggregates;
- uint8_t spare;
- uint32_t motion[32];
- } motion_indicator;
-#endif
-
-} VL53L5CX_ResultsData;
-
-
-union Block_header {
- uint32_t bytes;
- struct {
- uint32_t type : 4;
- uint32_t size : 12;
- uint32_t idx : 16;
- };
-};
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive);
-
-/**
- * @brief Mandatory function used to initialize the sensor. This function must
- * be called after a power on, to load the firmware into the VL53L5CX. It takes
- * a few hundred milliseconds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if initialization is OK.
- */
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to change the I2C address of the sensor. If
- * multiple VL53L5 sensors are connected to the same I2C line, all other LPn
- * pins needs to be set to Low. The default sensor address is 0x52.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) i2c_address : New I2C address.
- * @return (uint8_t) status : 0 if new address is OK
- */
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address);
-
-/**
- * @brief This function is used to get the current sensor power mode.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_power_mode : Current power mode. The value of this
- * pointer is equal to 0 if the sensor is in low power,
- * (VL53L5CX_POWER_MODE_SLEEP), or 1 if sensor is in standard mode
- * (VL53L5CX_POWER_MODE_WAKEUP).
- * @return (uint8_t) status : 0 if power mode is OK
- */
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode);
-
-/**
- * @brief This function is used to set the sensor in Low Power mode, for
- * example if the sensor is not used during a long time. The macro
- * VL53L5CX_POWER_MODE_SLEEP can be used to enable the low power mode. When user
- * want to restart the sensor, he can use macro VL53L5CX_POWER_MODE_WAKEUP.
- * Please ensure that the device is not streaming before calling the function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) power_mode : Selected power mode (VL53L5CX_POWER_MODE_SLEEP
- * or VL53L5CX_POWER_MODE_WAKEUP)
- * @return (uint8_t) status : 0 if power mode is OK, or 127 if power mode
- * requested by user is not valid.
- */
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode);
-
-/**
- * @brief This function starts a ranging session. When the sensor streams, host
- * cannot change settings 'on-the-fly'.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if start is OK.
- */
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function stops the ranging session. It must be used when the
- * sensor streams, after calling vl53l5cx_start_ranging().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if stop is OK
- */
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function checks if a new data is ready by polling I2C. If a new
- * data is ready, a flag will be raised.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_isReady : Value of this pointer be updated to 0 if data
- * is not ready, or 1 if a new data is ready.
- * @return (uint8_t) status : 0 if I2C reading is OK
- */
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady);
-
-/**
- * @brief This function gets the ranging data, using the selected output and the
- * resolution.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_ResultsData) *p_results : VL53L5 results structure.
- * @return (uint8_t) status : 0 data are successfully get.
- */
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results);
-
-/**
- * @brief This function gets the current resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_resolution : Value of this pointer will be equal to 16
- * for 4x4 mode, and 64 for 8x8 mode.
- * @return (uint8_t) status : 0 if resolution is OK.
- */
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution);
-
-/**
- * @brief This function sets a new resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) resolution : Use macro VL53L5CX_RESOLUTION_4X4 or
- * VL53L5CX_RESOLUTION_8X8 to set the resolution.
- * @return (uint8_t) status : 0 if set resolution is OK.
- */
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution);
-
-/**
- * @brief This function gets the current ranging frequency in Hz. Ranging
- * frequency corresponds to the time between each measurement.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_frequency_hz: Contains the ranging frequency in Hz.
- * @return (uint8_t) status : 0 if ranging frequency is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz);
-
-/**
- * @brief This function sets a new ranging frequency in Hz. Ranging frequency
- * corresponds to the measurements frequency. This setting depends of
- * the resolution, so please select your resolution before using this function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) frequency_hz : Contains the ranging frequency in Hz.
- * - For 4x4, min and max allowed values are : [1;60]
- * - For 8x8, min and max allowed values are : [1;15]
- * @return (uint8_t) status : 0 if ranging frequency is OK, or 127 if the value
- * is not correct.
- */
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz);
-
-/**
- * @brief This function gets the current integration time in ms.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_time_ms: Contains integration time in ms.
- * @return (uint8_t) status : 0 if integration time is OK.
- */
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms);
-
-/**
- * @brief This function sets a new integration time in ms. Integration time must
- * be computed to be lower than the ranging period, for a selected resolution.
- * Please note that this function has no impact on ranging mode continous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) time_ms : Contains the integration time in ms. For all
- * resolutions and frequency, the minimum value is 2ms, and the maximum is
- * 1000ms.
- * @return (uint8_t) status : 0 if set integration time is OK.
- */
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms);
-
-/**
- * @brief This function gets the current sharpener in percent. Sharpener can be
- * changed to blur more or less zones depending of the application.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_sharpener_percent: Contains the sharpener in percent.
- * @return (uint8_t) status : 0 if get sharpener is OK.
- */
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent);
-
-/**
- * @brief This function sets a new sharpener value in percent. Sharpener can be
- * changed to blur more or less zones depending of the application. Min value is
- * 0 (disabled), and max is 99.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) sharpener_percent : Value between 0 (disabled) and 99%.
- * @return (uint8_t) status : 0 if set sharpener is OK.
- */
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent);
-
-/**
- * @brief This function gets the current target order (closest or strongest).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_target_order: Contains the target order.
- * @return (uint8_t) status : 0 if get target order is OK.
- */
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order);
-
-/**
- * @brief This function sets a new target order. Please use macros
- * VL53L5CX_TARGET_ORDER_STRONGEST and VL53L5CX_TARGET_ORDER_CLOSEST to define
- * the new output order. By default, the sensor is configured with the strongest
- * output.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) target_order : Required target order.
- * @return (uint8_t) status : 0 if set target order is OK, or 127 if target
- * order is unknown.
- */
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order);
-
-/**
- * @brief This function is used to get the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_ranging_mode : current ranging mode
- * @return (uint8_t) status : 0 if get ranging mode is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode);
-
-/**
- * @brief This function is used to set the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) ranging_mode : Use macros VL53L5CX_RANGING_MODE_CONTINUOUS,
- * VL53L5CX_RANGING_MODE_CONTINUOUS.
- * @return (uint8_t) status : 0 if set ranging mode is OK.
- */
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode);
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to get the number of frames between 2 temperature
- * compensation.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_repeat_count : Number of frames before next temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count);
-
-/**
- * @brief This function is used to set a periodic temperature compensation. By
- * setting a repeat count different to 0 the firmware automatically runs a
- * temperature calibration every N frames.
- * default the repeat count is set to 0
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) repeat_count : Number of frames between temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count);
-
-/**
- * @brief This function can be used to read 'extra data' from DCI. Using a known
- * index, the function fills the casted structure passed in argument.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ....
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to write 'extra data' to DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to replace 'extra data' in DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @param (uint8_t) *new_data : Contains the new fields.
- * @param (uint16_t) new_data_size : New data size.
- * @param (uint16_t) new_data_pos : New data position into the buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos);
-
-#endif //VL53L5CX_API_H_
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h
deleted file mode 100644
index 35eaff8b0efc6ee9eaebd24338d2a214c986fdea..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_buffers.h
+++ /dev/null
@@ -1,22012 +0,0 @@
-
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef VL53L5CX_BUFFERS_H_
-#define VL53L5CX_BUFFERS_H_
-
-#include "platform.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_RANGING 2
-#else
-#define VL53L5CX_FW_NBTAR_RANGING VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief This buffer contains the VL53L5CX firmware (MM1.8)
- */
-
-const uint8_t VL53L5CX_FIRMWARE[] = {
-
- 0xe0, 0x00, 0x03, 0x08,
- 0xe0, 0x00, 0x0a, 0xc8,
- 0xe0, 0x00, 0x05, 0x08,
- 0xe0, 0x64, 0x08, 0x48,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x64, 0x2e, 0x28,
- 0xe0, 0x64, 0x31, 0xe8,
- 0xe0, 0x64, 0x35, 0x48,
- 0xe0, 0x64, 0x3b, 0x88,
- 0xe0, 0x68, 0x04, 0x68,
- 0xe0, 0x68, 0x17, 0x68,
- 0xe0, 0x68, 0x1b, 0x48,
- 0xe0, 0x68, 0x1e, 0xc8,
- 0xe0, 0x68, 0x25, 0x28,
- 0xe0, 0x68, 0x28, 0x48,
- 0xe0, 0x00, 0x09, 0xe8,
- 0xe0, 0x00, 0x09, 0xc8,
- 0xe0, 0x00, 0x09, 0xa8,
- 0xe0, 0x00, 0x09, 0x88,
- 0xe0, 0x00, 0x09, 0x68,
- 0xe0, 0x00, 0x09, 0x48,
- 0xf8, 0x02, 0x00, 0x06,
- 0xc1, 0xc3, 0x81, 0x01,
- 0x1e, 0x06, 0xa1, 0x0b,
- 0x1a, 0x06, 0x81, 0x00,
- 0x99, 0x23, 0xe1, 0x00,
- 0x97, 0xb3, 0x97, 0xe3,
- 0x06, 0x2c, 0x97, 0x73,
- 0x06, 0x34, 0xe2, 0xc0,
- 0x06, 0x2c, 0xfc, 0x80,
- 0xc1, 0x83, 0xe3, 0x40,
- 0xe2, 0xc0, 0x06, 0x1c,
- 0xfc, 0x98, 0x06, 0x34,
- 0xfc, 0x9c, 0x06, 0x34,
- 0xe3, 0x40, 0x06, 0x1c,
- 0x69, 0x38, 0xc1, 0x83,
- 0xc1, 0x43, 0xe8, 0x00,
- 0xc1, 0xc3, 0x81, 0x05,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0xf4, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xff, 0x84, 0x07, 0xfc,
- 0x9a, 0x14, 0xd8, 0x04,
- 0xe4, 0x30, 0x04, 0x60,
- 0xfc, 0x12, 0x4c, 0x06,
- 0xe0, 0xd0, 0x4c, 0x4a,
- 0xc1, 0xc3, 0x82, 0x15,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf8, 0x04, 0x17, 0x0c,
- 0x81, 0x93, 0x81, 0x83,
- 0xe2, 0xc0, 0x0c, 0x2c,
- 0x1c, 0x8c, 0xd1, 0x67,
- 0xe3, 0x6b, 0xe4, 0x04,
- 0xe5, 0x6b, 0x8e, 0x05,
- 0x80, 0x64, 0x03, 0x88,
- 0x04, 0xd8, 0xe7, 0x6b,
- 0xe9, 0x6b, 0x80, 0x64,
- 0xeb, 0x6b, 0x8a, 0xc5,
- 0x80, 0x64, 0x06, 0x08,
- 0x0a, 0x58, 0xed, 0x6b,
- 0xf1, 0x6b, 0x80, 0x64,
- 0x80, 0x64, 0x07, 0x28,
- 0x08, 0x78, 0xf3, 0x6b,
- 0xf5, 0x6b, 0x80, 0x64,
- 0xf7, 0x6b, 0x8a, 0xc5,
- 0xf9, 0x6b, 0x8c, 0x05,
- 0xfb, 0x6b, 0x8c, 0x45,
- 0x0c, 0x0a, 0x8a, 0x45,
- 0x8a, 0x65, 0xe4, 0xb4,
- 0xe4, 0xb8, 0x0c, 0x0a,
- 0x0a, 0x78, 0x84, 0x45,
- 0x40, 0x06, 0xe0, 0x64,
- 0x40, 0x4a, 0xfc, 0x12,
- 0x80, 0xd5, 0xe0, 0xd0,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x1f, 0x0c, 0xc1, 0xc3,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf7, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xc1, 0xc3, 0xc1, 0x43,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x60, 0x00, 0x06, 0xda,
- 0x0a, 0x20, 0xa1, 0x0b,
- 0x18, 0x30, 0x64, 0x00,
- 0x0e, 0x24, 0xe4, 0x00,
- 0x02, 0x0a, 0x37, 0x80,
- 0x0c, 0x06, 0x80, 0x00,
- 0x08, 0x34, 0x20, 0x00,
- 0x0a, 0x70, 0xb7, 0x80,
- 0x58, 0x42, 0xa4, 0x04,
- 0x81, 0x61, 0x32, 0x98,
- 0x21, 0x2b, 0xaa, 0x45,
- 0x06, 0x0a, 0x8c, 0xbb,
- 0x0c, 0x10, 0x00, 0x00,
- 0x04, 0x00, 0xe4, 0x00,
- 0x18, 0x1a, 0x64, 0x00,
- 0xa8, 0x25, 0xe0, 0x00,
- 0x08, 0x04, 0xa1, 0x1d,
- 0x0e, 0x14, 0x57, 0x80,
- 0x10, 0x06, 0xd7, 0x80,
- 0x04, 0x40, 0x40, 0x00,
- 0x08, 0x54, 0xc4, 0x04,
- 0x4c, 0x72, 0x76, 0x80,
- 0x10, 0xc4, 0xd2, 0xa0,
- 0x14, 0x40, 0x76, 0x80,
- 0x0e, 0x64, 0xa4, 0x80,
- 0x12, 0x24, 0xf6, 0x80,
- 0xa1, 0x6b, 0x76, 0x80,
- 0x3c, 0x01, 0x54, 0x80,
- 0x8c, 0x8b, 0x40, 0x00,
- 0x04, 0x80, 0x08, 0x90,
- 0xdc, 0x00, 0x48, 0x70,
- 0x84, 0x9b, 0x28, 0xa3,
- 0xec, 0x04, 0x0e, 0xa0,
- 0x9e, 0xe5, 0xa0, 0x7d,
- 0x96, 0x4b, 0x21, 0x7b,
- 0x0e, 0x8a, 0x86, 0x45,
- 0x0e, 0x9a, 0xe5, 0x00,
- 0x00, 0x06, 0x44, 0x80,
- 0x16, 0xa0, 0x80, 0x00,
- 0x08, 0x54, 0x2c, 0x84,
- 0xc0, 0x00, 0x28, 0x9c,
- 0x20, 0x01, 0x0e, 0x4a,
- 0x00, 0x54, 0x40, 0x00,
- 0x00, 0xc4, 0xa8, 0xac,
- 0xc0, 0x00, 0x28, 0x9d,
- 0x0f, 0x9c, 0x14, 0x54,
- 0x40, 0x02, 0x88, 0x5b,
- 0x80, 0xcb, 0x99, 0xa8,
- 0x61, 0x84, 0x00, 0x84,
- 0xe1, 0x84, 0x08, 0x94,
- 0x12, 0x84, 0x01, 0xcb,
- 0x32, 0x4f, 0xe0, 0xfc,
- 0xe4, 0x04, 0x1c, 0x70,
- 0x4b, 0x0a, 0x01, 0xa1,
- 0x58, 0xda, 0x84, 0x10,
- 0x94, 0xbb, 0x64, 0x00,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x1c, 0x70, 0xc6, 0x1f,
- 0x00, 0xc4, 0x24, 0x08,
- 0x0e, 0x54, 0xa0, 0x84,
- 0x08, 0x54, 0x21, 0xfc,
- 0x40, 0x02, 0xa0, 0x84,
- 0xa1, 0xeb, 0x39, 0x9c,
- 0x3c, 0x00, 0x58, 0x00,
- 0xbc, 0x00, 0x4a, 0x40,
- 0x1d, 0x5a, 0x08, 0xc5,
- 0x0e, 0xe0, 0xe0, 0x04,
- 0x0d, 0xcb, 0xec, 0x04,
- 0xe1, 0xfc, 0x00, 0xa4,
- 0x4b, 0x0a, 0x42, 0xb7,
- 0x58, 0xfa, 0x84, 0x08,
- 0x08, 0xc4, 0x64, 0x18,
- 0x10, 0xa4, 0xe0, 0xfc,
- 0x40, 0x0a, 0x60, 0x84,
- 0x20, 0xbf, 0xed, 0x8c,
- 0x00, 0x54, 0x90, 0xab,
- 0x14, 0x84, 0x61, 0x84,
- 0x28, 0x0f, 0x9c, 0x80,
- 0x91, 0x94, 0x48, 0x22,
- 0x13, 0xb0, 0x4a, 0x62,
- 0x4c, 0x50, 0xc3, 0xc7,
- 0x80, 0x5b, 0x1c, 0x00,
- 0x27, 0xf0, 0x4e, 0xd8,
- 0x9c, 0x00, 0x44, 0x40,
- 0x96, 0x0b, 0x21, 0x1d,
- 0x57, 0x80, 0x04, 0xa4,
- 0xd7, 0x80, 0x02, 0xb4,
- 0x40, 0x00, 0x06, 0x06,
- 0xc4, 0x04, 0x04, 0x20,
- 0x52, 0x8c, 0x42, 0x12,
- 0x40, 0x10, 0x94, 0x6b,
- 0x4c, 0x20, 0x5c, 0x00,
- 0x80, 0x1b, 0xdc, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x8c, 0x1b, 0x7f, 0xc5,
- 0x80, 0x6b, 0x7f, 0xa5,
- 0x96, 0x7b, 0x73, 0xe5,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0xc1, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0xa0, 0x85, 0x98, 0x6b,
- 0x76, 0x80, 0x0a, 0x14,
- 0x08, 0x24, 0xa1, 0x2b,
- 0x06, 0x0a, 0x76, 0x80,
- 0x0c, 0x04, 0x80, 0x00,
- 0x98, 0x8b, 0x76, 0x80,
- 0x06, 0x1a, 0x1e, 0xc5,
- 0x18, 0x34, 0xe0, 0x00,
- 0xa1, 0x1b, 0x76, 0x80,
- 0xa4, 0x80, 0x0e, 0x40,
- 0x3c, 0x01, 0x4e, 0xc0,
- 0x08, 0x60, 0xc0, 0x00,
- 0x48, 0x50, 0x04, 0x80,
- 0xa8, 0x73, 0xdc, 0x00,
- 0xec, 0x04, 0x0a, 0x70,
- 0x9a, 0xc5, 0xa0, 0x5d,
- 0x90, 0xcb, 0x21, 0x5b,
- 0x0a, 0x8a, 0x86, 0x45,
- 0x0a, 0x9a, 0xe5, 0x00,
- 0x08, 0x06, 0x44, 0x80,
- 0x10, 0x70, 0x80, 0x00,
- 0x0a, 0x4a, 0x2c, 0x84,
- 0xc0, 0x00, 0x20, 0x00,
- 0x28, 0x95, 0x08, 0x34,
- 0x0c, 0x24, 0x40, 0x00,
- 0x08, 0x24, 0x8f, 0x94,
- 0x18, 0x24, 0x28, 0xa0,
- 0xc0, 0x00, 0x28, 0x94,
- 0x19, 0x98, 0x48, 0x42,
- 0x88, 0x3b, 0x98, 0x2b,
- 0x61, 0x84, 0x08, 0x14,
- 0xe0, 0xfc, 0x0c, 0x14,
- 0x61, 0x84, 0x18, 0x04,
- 0x2c, 0xcf, 0x89, 0x3b,
- 0xe4, 0x10, 0x46, 0xda,
- 0x04, 0x30, 0x45, 0x0a,
- 0xe4, 0x04, 0x12, 0x50,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x12, 0x50, 0x81, 0xc1,
- 0x0c, 0x24, 0x24, 0x08,
- 0x08, 0x34, 0xa1, 0xfc,
- 0x0a, 0x24, 0x20, 0x84,
- 0x48, 0x42, 0xa0, 0x84,
- 0xa1, 0x9b, 0x39, 0x98,
- 0x3c, 0x00, 0x46, 0x40,
- 0xbc, 0x00, 0x44, 0x50,
- 0x13, 0x5a, 0x18, 0x6b,
- 0x88, 0xc5, 0xe0, 0x04,
- 0xec, 0x04, 0x0e, 0x90,
- 0x46, 0xfa, 0x03, 0x3b,
- 0x45, 0x0a, 0xe4, 0x04,
- 0x0a, 0x24, 0x04, 0x00,
- 0x10, 0x34, 0xe1, 0x84,
- 0xc2, 0x67, 0x60, 0xfc,
- 0x60, 0x84, 0x1c, 0xc4,
- 0xed, 0x8c, 0x40, 0x0a,
- 0x61, 0x84, 0x08, 0x34,
- 0x10, 0xc4, 0xb0, 0x5f,
- 0x9c, 0xcb, 0x61, 0xfc,
- 0x50, 0x02, 0x30, 0x6f,
- 0x44, 0x12, 0x91, 0x88,
- 0x88, 0x3b, 0x13, 0x8c,
- 0x1c, 0x00, 0x42, 0x20,
- 0x40, 0x80, 0x8a, 0x2b,
- 0x18, 0xe4, 0x1c, 0x00,
- 0x4f, 0xd8, 0x9c, 0x80,
- 0x18, 0x0b, 0xa7, 0xec,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x75, 0xf5, 0xff, 0x95,
- 0xc1, 0xc3, 0x90, 0x5b,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x80, 0x8b, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0x04, 0x6b, 0x82, 0x9b,
- 0x80, 0xe5, 0x86, 0x7b,
- 0x06, 0x0a, 0xa1, 0x2b,
- 0x40, 0x0a, 0x80, 0x00,
- 0x80, 0xe5, 0xe5, 0x9c,
- 0x84, 0x1b, 0x81, 0x21,
- 0x0c, 0x0c, 0x84, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x68, 0x00, 0x41, 0x88,
- 0x00, 0xbb, 0x84, 0x1b,
- 0x02, 0xab, 0x90, 0x0b,
- 0x41, 0x18, 0x8e, 0x1b,
- 0x00, 0x7b, 0xe8, 0x00,
- 0x40, 0xd8, 0x92, 0x0b,
- 0x8c, 0x1b, 0x68, 0x00,
- 0x44, 0xb2, 0x81, 0x31,
- 0x42, 0xa2, 0xf0, 0x8c,
- 0x86, 0x23, 0xf2, 0x9c,
- 0x42, 0x12, 0x7d, 0x85,
- 0xc1, 0xc3, 0xf2, 0x80,
- 0xe6, 0x86, 0x4a, 0x0e,
- 0xe7, 0x06, 0x58, 0x0e,
- 0x66, 0x06, 0x46, 0x0e,
- 0xe1, 0xc0, 0x08, 0x54,
- 0x67, 0x86, 0x44, 0x0e,
- 0xe0, 0xc0, 0x00, 0xc4,
- 0x02, 0xc4, 0x60, 0x57,
- 0x8a, 0x03, 0xe1, 0xc0,
- 0xf2, 0x90, 0x42, 0x12,
- 0x5d, 0x93, 0x86, 0x03,
- 0xf2, 0x88, 0x42, 0x12,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc1, 0x7c, 0x02, 0x14,
- 0xdc, 0x00, 0x40, 0x10,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x08, 0x00, 0x14,
- 0xc1, 0x7c, 0x02, 0x14,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x08,
- 0xdd, 0x93, 0x99, 0x8c,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x00, 0x06,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x88, 0x00, 0x14,
- 0xc0, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x88,
- 0xdd, 0x93, 0x99, 0x8c,
- 0x81, 0x41, 0x61, 0x0b,
- 0x06, 0x14, 0x8a, 0x25,
- 0xe1, 0x1b, 0x76, 0x80,
- 0x76, 0x80, 0x04, 0x04,
- 0x08, 0x85, 0x81, 0x41,
- 0x06, 0x30, 0xa4, 0x33,
- 0x04, 0x04, 0x6c, 0x04,
- 0xa0, 0x3d, 0xe1, 0x84,
- 0xa1, 0x3b, 0x86, 0xe5,
- 0xc8, 0x8c, 0x02, 0x14,
- 0x64, 0x04, 0x18, 0x30,
- 0xe4, 0x08, 0x43, 0x1a,
- 0x24, 0x08, 0x18, 0x30,
- 0xa0, 0x84, 0x02, 0x14,
- 0x0a, 0xc0, 0x21, 0xcb,
- 0x19, 0x5a, 0xec, 0x04,
- 0x82, 0x45, 0xe0, 0x04,
- 0xc2, 0x47, 0x40, 0x1d,
- 0x1c, 0x80, 0x08, 0x44,
- 0x91, 0x84, 0x40, 0x02,
- 0x27, 0xfc, 0x4a, 0x98,
- 0x5d, 0x93, 0xc3, 0x17,
- 0x7f, 0xe5, 0x88, 0x0b,
- 0x7d, 0x55, 0x80, 0x4b,
- 0xc1, 0xc3, 0x88, 0x3b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x00, 0x6b,
- 0xe8, 0x04, 0x50, 0x48,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x00, 0x15, 0x80, 0x04,
- 0xa1, 0x1b, 0xe0, 0x3c,
- 0xdc, 0x38, 0x42, 0x08,
- 0x68, 0x04, 0x57, 0xc8,
- 0xc1, 0xc3, 0x8c, 0x0b,
- 0xfa, 0x04, 0x04, 0x7c,
- 0x74, 0xa9, 0x46, 0x4e,
- 0x49, 0x0e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x88, 0x25, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x84, 0x25, 0xf0, 0x0c,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0x60, 0x01, 0x00, 0x98,
- 0x04, 0x20, 0x80, 0x00,
- 0xc1, 0x16, 0xec, 0x04,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x04, 0x20, 0xfe, 0x65,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x85, 0xc1, 0x1e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x48,
- 0x45, 0xc8, 0xc1, 0x16,
- 0xfb, 0xf5, 0x87, 0xfc,
- 0xe1, 0x98, 0x41, 0x46,
- 0x61, 0x91, 0x43, 0x06,
- 0x80, 0x1e, 0xc0, 0x00,
- 0x81, 0x11, 0x9b, 0x01,
- 0x81, 0x31, 0x81, 0x21,
- 0xe8, 0x04, 0x4a, 0x88,
- 0x8c, 0x45, 0xa1, 0x0b,
- 0x74, 0xa9, 0x06, 0xce,
- 0x48, 0x4e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x8a, 0x45, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x86, 0x25, 0xf0, 0x0c,
- 0xf0, 0x0c, 0x4c, 0x10,
- 0xe4, 0x18, 0x4a, 0x5a,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0xa0, 0x00, 0x01, 0x28,
- 0x60, 0x01, 0x00, 0xa8,
- 0xc5, 0x50, 0x80, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x00, 0x4a, 0xc1, 0x56,
- 0xfe, 0x45, 0xf8, 0x0c,
- 0x04, 0x20, 0xc5, 0x54,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x65, 0xc1, 0x5e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x88,
- 0xc1, 0x56, 0xc5, 0x50,
- 0x87, 0xfc, 0x45, 0x88,
- 0x47, 0x86, 0xfb, 0x65,
- 0x08, 0xf0, 0xe1, 0x90,
- 0x8c, 0x4e, 0xe4, 0x30,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x81, 0x61, 0xff, 0x65,
- 0x00, 0x46, 0xe1, 0x6b,
- 0x4c, 0x08, 0xe1, 0xa4,
- 0x8b, 0x04, 0xdc, 0x38,
- 0xfe, 0x24, 0x89, 0x14,
- 0xe8, 0x6c, 0x65, 0x68,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x75, 0x78, 0xff, 0x65,
- 0x0c, 0x7c, 0xef, 0xfc,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x80, 0x55, 0xa1, 0x1b,
- 0x0a, 0x00, 0x83, 0x11,
- 0x40, 0x06, 0xe5, 0x50,
- 0x40, 0x4a, 0xfc, 0x12,
- 0xd7, 0xf4, 0xe0, 0xd0,
- 0xc1, 0xc3, 0x82, 0xb5,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0x3f,
- 0xf4, 0x04, 0x0b, 0x2f,
- 0xf4, 0x04, 0x0b, 0x1f,
- 0xf4, 0x04, 0x0b, 0x0f,
- 0x0a, 0x50, 0x81, 0x35,
- 0x40, 0x5a, 0xec, 0x40,
- 0x44, 0x06, 0xe0, 0xbc,
- 0x44, 0x6a, 0xbc, 0x22,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x98,
- 0x0a, 0xff, 0xc0, 0x00,
- 0xc1, 0xc3, 0xf4, 0x04,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0xf5,
- 0xf4, 0x04, 0x0b, 0xe5,
- 0xf4, 0x04, 0x0b, 0xd5,
- 0xf4, 0x04, 0x0b, 0xc5,
- 0xf4, 0x04, 0x0b, 0xb5,
- 0xf4, 0x04, 0x0b, 0xa5,
- 0xf4, 0x04, 0x0b, 0x95,
- 0xf4, 0x04, 0x0b, 0x85,
- 0x0a, 0xff, 0x81, 0x55,
- 0x0a, 0x50, 0xf4, 0x04,
- 0xd7, 0xe4, 0xec, 0x80,
- 0xd7, 0xb4, 0xd7, 0xd4,
- 0xd7, 0x94, 0xd7, 0xa4,
- 0xd7, 0x74, 0xd7, 0x84,
- 0x82, 0x0b, 0x94, 0x64,
- 0xfa, 0x00, 0x5c, 0x08,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0xe4, 0x40, 0x04, 0x8a,
- 0x21, 0x2b, 0x80, 0xa5,
- 0x82, 0x15, 0x80, 0x3b,
- 0x46, 0x12, 0x81, 0xf5,
- 0x06, 0x4a, 0xf9, 0x80,
- 0x82, 0xb5, 0xf8, 0x0c,
- 0x04, 0x20, 0x80, 0x3b,
- 0x04, 0x4a, 0xec, 0x04,
- 0xc5, 0x48, 0xe4, 0x00,
- 0x45, 0x88, 0xcd, 0x46,
- 0x0c, 0x4c, 0x87, 0xfc,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x6c, 0x40, 0x0a, 0x20,
- 0x49, 0x27, 0xe1, 0xc1,
- 0x04, 0x20, 0x8a, 0xcf,
- 0x06, 0xc0, 0x6c, 0x04,
- 0x04, 0x4a, 0xe4, 0x40,
- 0x48, 0x12, 0x64, 0x00,
- 0x00, 0x33, 0xf0, 0x8c,
- 0x02, 0x75, 0x80, 0x6b,
- 0x02, 0x85, 0xf0, 0x10,
- 0x02, 0x95, 0xf8, 0x0c,
- 0x02, 0xa5, 0xf8, 0x08,
- 0x4c, 0x75, 0xf8, 0x04,
- 0x4c, 0x85, 0xf0, 0x10,
- 0x4c, 0x95, 0xf8, 0x0c,
- 0x4c, 0xa5, 0xf8, 0x08,
- 0x44, 0x08, 0xf8, 0x04,
- 0x44, 0x52, 0x87, 0xf8,
- 0xe9, 0x2d, 0xf1, 0xb0,
- 0x0a, 0x20, 0x86, 0x95,
- 0xc5, 0x27, 0x6c, 0x10,
- 0x61, 0x88, 0x0e, 0x54,
- 0xec, 0x04, 0x0c, 0x20,
- 0x64, 0x04, 0x18, 0x70,
- 0xe4, 0x00, 0x0c, 0x4a,
- 0x04, 0x74, 0x44, 0xc7,
- 0x42, 0x42, 0xe0, 0x88,
- 0x86, 0x7b, 0x70, 0xb0,
- 0xdd, 0x8e, 0xd1, 0x84,
- 0x87, 0xfc, 0x4d, 0x88,
- 0x71, 0x88, 0x44, 0x52,
- 0xa1, 0x2b, 0x98, 0x33,
- 0xf7, 0xe5, 0xec, 0xf5,
- 0x88, 0x1b, 0x21, 0x2b,
- 0xf7, 0xa5, 0xec, 0x75,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x78, 0x0c, 0x00, 0x0a,
- 0x82, 0x25, 0x80, 0x3b,
- 0x94, 0xa5, 0xa1, 0x2b,
- 0x04, 0x20, 0x4d, 0x16,
- 0x06, 0x4a, 0xec, 0x04,
- 0xfe, 0x25, 0xf8, 0x0c,
- 0x90, 0x95, 0xe9, 0x2d,
- 0x7a, 0x80, 0x08, 0x14,
- 0xe4, 0x40, 0x04, 0x8a,
- 0xe0, 0xa0, 0x0a, 0x44,
- 0x08, 0x54, 0xa8, 0x5f,
- 0x06, 0xf5, 0xe0, 0xc0,
- 0x0c, 0x24, 0xaa, 0x4f,
- 0x0a, 0x20, 0x61, 0x90,
- 0x61, 0xc1, 0xec, 0x40,
- 0xec, 0x04, 0x0c, 0x60,
- 0x0c, 0x4a, 0x0a, 0xcf,
- 0x4e, 0x32, 0xe4, 0x00,
- 0x86, 0x2b, 0x70, 0xb0,
- 0xe4, 0x40, 0x06, 0x70,
- 0xf0, 0x10, 0x44, 0x45,
- 0xf8, 0x0c, 0x44, 0x45,
- 0xf8, 0x08, 0x44, 0x45,
- 0xf8, 0x04, 0x44, 0x45,
- 0x87, 0xfc, 0x4c, 0x08,
- 0xf1, 0xb0, 0x44, 0x52,
- 0x86, 0x95, 0xe9, 0x2d,
- 0xf9, 0xc1, 0x07, 0x51,
- 0x4a, 0x52, 0xa4, 0x53,
- 0x04, 0x53, 0xfa, 0xb0,
- 0xec, 0x10, 0x04, 0x20,
- 0x0e, 0x24, 0x08, 0x51,
- 0x45, 0x57, 0xe1, 0x88,
- 0xe4, 0x04, 0x18, 0x70,
- 0x6c, 0x04, 0x0c, 0x50,
- 0xe0, 0x88, 0x0a, 0x74,
- 0x64, 0x00, 0x0c, 0x4a,
- 0xdd, 0x4e, 0x86, 0x7b,
- 0x87, 0xfc, 0x4d, 0xc8,
- 0xaa, 0x23, 0x44, 0xc7,
- 0xa1, 0x2b, 0x98, 0x33,
- 0x04, 0x20, 0x82, 0x05,
- 0x04, 0x4a, 0xec, 0x04,
- 0xcd, 0x16, 0xe4, 0x00,
- 0x87, 0xfc, 0x45, 0xc8,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x04, 0x4a, 0x00, 0x7b,
- 0x40, 0x72, 0xe0, 0x10,
- 0x1e, 0xf0, 0x79, 0x88,
- 0x00, 0x0c, 0xed, 0x20,
- 0x00, 0x1a, 0x62, 0x00,
- 0x11, 0x0e, 0xf8, 0x0c,
- 0x1b, 0x0e, 0x82, 0x8b,
- 0x20, 0x01, 0x00, 0x26,
- 0x5e, 0x05, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x35,
- 0x23, 0x3e, 0xef, 0x8d,
- 0x5e, 0x17, 0xa4, 0x0b,
- 0x9d, 0x2e, 0xe0, 0xfc,
- 0x23, 0x88, 0xa1, 0x0e,
- 0x00, 0x24, 0xc0, 0x00,
- 0xc4, 0x1b, 0x61, 0x88,
- 0xc0, 0x3b, 0x7d, 0x41,
- 0x7a, 0x10, 0x42, 0x12,
- 0xfa, 0x10, 0x46, 0x32,
- 0x84, 0x13, 0x00, 0x33,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x82, 0x31, 0x7c, 0x3e,
- 0x00, 0x20, 0x19, 0x1e,
- 0x97, 0x3e, 0xec, 0x04,
- 0x00, 0x84, 0xfe, 0x0e,
- 0xaf, 0x8b, 0x61, 0x84,
- 0x54, 0x0a, 0x15, 0x8e,
- 0x2e, 0xa5, 0xe6, 0x8a,
- 0x00, 0x80, 0x8e, 0xa3,
- 0x10, 0x8a, 0x6c, 0x04,
- 0x40, 0x0a, 0xe4, 0xa4,
- 0x56, 0x72, 0xe6, 0x8a,
- 0x40, 0x70, 0x70, 0x80,
- 0xa2, 0xb5, 0xdc, 0x00,
- 0x00, 0x84, 0x0f, 0xbe,
- 0x23, 0xb4, 0xe1, 0x8c,
- 0xe6, 0x8a, 0x4c, 0x0a,
- 0x60, 0x84, 0x00, 0x64,
- 0xf0, 0x98, 0x50, 0x72,
- 0x8e, 0x03, 0x0d, 0x0e,
- 0x8e, 0x0b, 0x0b, 0x0e,
- 0x56, 0x08, 0x90, 0x1b,
- 0x13, 0x8e, 0xfc, 0x38,
- 0x0b, 0x84, 0x80, 0x9b,
- 0x90, 0x1b, 0x90, 0x0b,
- 0xfc, 0x38, 0x56, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x0e, 0x0b, 0x84, 0xd5,
- 0xa3, 0x24, 0x90, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0x8e, 0x0b, 0x21, 0x0d,
- 0x81, 0xc5, 0x82, 0x85,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x90, 0x1b, 0x0e, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0x21, 0x0d, 0xfc, 0x38,
- 0x80, 0x45, 0x8e, 0x0b,
- 0x93, 0x0e, 0x90, 0x0b,
- 0x50, 0xa2, 0x2c, 0x0b,
- 0x23, 0x64, 0xf1, 0x98,
- 0xf0, 0x98, 0x56, 0xa2,
- 0x90, 0x0b, 0x0b, 0x0e,
- 0x4c, 0x08, 0x94, 0x1b,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x09, 0xbe, 0x94, 0x0b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xa5, 0x82, 0x9d,
- 0x84, 0xd5, 0xa0, 0x0d,
- 0x90, 0x0b, 0x09, 0x64,
- 0x8c, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x01, 0xd5, 0xa1, 0x0d,
- 0x9c, 0x00, 0x50, 0x60,
- 0x82, 0x55, 0xa1, 0x0d,
- 0x90, 0x0b, 0x09, 0xa4,
- 0x94, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x55, 0xa1, 0x0d,
- 0x8f, 0xb4, 0x90, 0xab,
- 0x8d, 0x14, 0x8b, 0x94,
- 0x96, 0x93, 0xa3, 0x64,
- 0x71, 0x84, 0x40, 0xb2,
- 0x8d, 0x0e, 0x92, 0x1b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x92, 0x0b, 0x00, 0x8b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xc5, 0x82, 0x8d,
- 0xa0, 0x0d, 0x15, 0x84,
- 0x0d, 0x64, 0x86, 0x15,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x8c, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x4c, 0xb0, 0x01, 0xe5,
- 0x15, 0x84, 0x9c, 0x00,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x0d, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x95, 0xa1, 0x0d,
- 0x8c, 0xbb, 0x01, 0x35,
- 0x93, 0x04, 0x92, 0xbb,
- 0x94, 0x1b, 0x23, 0x64,
- 0x4c, 0x08, 0x93, 0x0e,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x96, 0x1b, 0x94, 0x0b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x13, 0xa4, 0x84, 0xd5,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x94, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x81, 0xd5, 0x82, 0xa5,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x13, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x56, 0x60, 0xa1, 0x0d,
- 0x96, 0xab, 0x9c, 0x00,
- 0x00, 0x2a, 0x9b, 0x04,
- 0x01, 0x18, 0xe0, 0x00,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x14, 0x84, 0x35,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x24, 0xe4, 0x00,
- 0xc1, 0x3e, 0xa8, 0x34,
- 0x43, 0x08, 0xe9, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa8, 0x14, 0x9c, 0x04,
- 0xa8, 0x0e, 0x9c, 0x1e,
- 0x19, 0x14, 0x81, 0xb5,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x28, 0xe4, 0x00,
- 0xc1, 0x36, 0xa8, 0x38,
- 0x43, 0x08, 0xe9, 0x26,
- 0x1d, 0x14, 0x87, 0xfc,
- 0xec, 0x04, 0x00, 0x80,
- 0x50, 0x0a, 0x81, 0x61,
- 0x40, 0x72, 0x66, 0x86,
- 0x1b, 0x0e, 0xf0, 0x84,
- 0x0e, 0x83, 0x80, 0xab,
- 0x90, 0xbb, 0x80, 0x9b,
- 0x8c, 0xd5, 0xd6, 0xad,
- 0x8e, 0x1b, 0x14, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0xa0, 0x0d, 0xfc, 0x38,
- 0xa1, 0x0b, 0x8a, 0xf5,
- 0x9d, 0x04, 0x92, 0x05,
- 0xa1, 0x0b, 0x8d, 0xb5,
- 0xc0, 0x40, 0x1e, 0x05,
- 0x01, 0x28, 0x88, 0xd5,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x24, 0x84, 0x55,
- 0x96, 0x1b, 0x90, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x80, 0x44, 0x84, 0x34,
- 0xc1, 0x3e, 0xc5, 0x4e,
- 0x87, 0xfc, 0x45, 0x08,
- 0xac, 0x04, 0x83, 0x15,
- 0xac, 0x1e, 0xa0, 0x14,
- 0x81, 0xc5, 0xa0, 0x0e,
- 0x96, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x90, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x21, 0x04, 0x87, 0xfc,
- 0x80, 0x83, 0x83, 0x61,
- 0xd6, 0xad, 0x80, 0xb3,
- 0x16, 0x0b, 0x94, 0xf5,
- 0xa3, 0x24, 0x8e, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0xf2, 0xc5, 0xa1, 0x0d,
- 0x40, 0x01, 0x03, 0x98,
- 0x1e, 0x07, 0x80, 0x00,
- 0x8e, 0x35, 0xe0, 0xfc,
- 0x96, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x94, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x87, 0x85, 0x87, 0xfc,
- 0x40, 0x01, 0x01, 0x28,
- 0x1e, 0x07, 0x80, 0x00,
- 0x84, 0x55, 0xe0, 0xfc,
- 0x94, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x92, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x83, 0x15, 0x87, 0xfc,
- 0xa8, 0x14, 0xa4, 0x04,
- 0xa8, 0x0e, 0xa4, 0x1e,
- 0x19, 0x24, 0x81, 0xc5,
- 0x94, 0x1b, 0x92, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x48, 0x80, 0x38,
- 0xc5, 0x36, 0xc1, 0x46,
- 0x87, 0xfc, 0x45, 0x08,
- 0x83, 0x61, 0x1d, 0x04,
- 0x71, 0x95, 0x80, 0x93,
- 0xa8, 0x04, 0x80, 0xa3,
- 0xa8, 0x1e, 0xac, 0x14,
- 0x81, 0xc5, 0xac, 0x0e,
- 0x94, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x96, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x1d, 0x04, 0x87, 0xfc,
- 0x21, 0x04, 0x83, 0x61,
- 0x6f, 0x35, 0x80, 0xa3,
- 0x1d, 0x14, 0x80, 0xb3,
- 0x95, 0x04, 0xa1, 0x6b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0x00, 0x0e, 0x88,
- 0xf0, 0x80, 0x58, 0x72,
- 0x71, 0x9c, 0x42, 0x92,
- 0xf1, 0xa4, 0x40, 0xa2,
- 0x92, 0x2b, 0x01, 0x1d,
- 0x44, 0xa0, 0x0e, 0x3b,
- 0x46, 0x90, 0x9c, 0x00,
- 0x48, 0x22, 0x9c, 0x00,
- 0xa1, 0x4b, 0xf1, 0x8c,
- 0x1e, 0x07, 0x8a, 0x25,
- 0x42, 0xa2, 0x60, 0xfc,
- 0x84, 0x55, 0xf1, 0x90,
- 0xfd, 0x31, 0x45, 0x47,
- 0x44, 0x22, 0xc8, 0x2b,
- 0x8e, 0x3b, 0x7a, 0x0c,
- 0x82, 0x21, 0x88, 0x23,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x54, 0x8c, 0x44,
- 0xc5, 0x4e, 0xcd, 0x5e,
- 0x87, 0xfc, 0x45, 0x08,
- 0x08, 0x30, 0x83, 0x35,
- 0xfd, 0x51, 0x6c, 0x04,
- 0x82, 0x21, 0x24, 0x43,
- 0xfa, 0x14, 0x48, 0x42,
- 0x26, 0x23, 0x88, 0x23,
- 0x04, 0x4a, 0x8e, 0x3b,
- 0x8c, 0x48, 0xe4, 0x00,
- 0xcd, 0x56, 0x84, 0x58,
- 0x45, 0x08, 0xc5, 0x46,
- 0x1d, 0x24, 0x87, 0xfc,
- 0xf1, 0xa0, 0x42, 0xc2,
- 0xf1, 0xac, 0x52, 0x82,
- 0x44, 0x92, 0xa4, 0x13,
- 0xa1, 0x2b, 0xfb, 0x84,
- 0x1e, 0x07, 0x8c, 0x45,
- 0x84, 0xb5, 0xe0, 0xfc,
- 0x61, 0x88, 0x02, 0x24,
- 0x42, 0x3b, 0xfd, 0x41,
- 0xf1, 0x88, 0x44, 0xc2,
- 0xfa, 0x10, 0x46, 0x32,
- 0x02, 0x30, 0x82, 0x33,
- 0x02, 0x4a, 0xe4, 0x04,
- 0xa8, 0x34, 0xe4, 0x00,
- 0xe9, 0x4e, 0x88, 0x44,
- 0x43, 0x08, 0xc9, 0x3e,
- 0x83, 0xb5, 0x87, 0xfc,
- 0x06, 0xb0, 0x7e, 0x14,
- 0x30, 0x33, 0xec, 0x04,
- 0x90, 0x13, 0x82, 0x21,
- 0x42, 0x12, 0xb8, 0x13,
- 0xfd, 0x31, 0x7a, 0x8c,
- 0xfa, 0x0c, 0x46, 0x12,
- 0xf1, 0x84, 0x42, 0x32,
- 0xe4, 0x00, 0x02, 0x4a,
- 0x46, 0xc2, 0x28, 0x58,
- 0x0e, 0x48, 0xf1, 0x88,
- 0xec, 0x04, 0x04, 0x20,
- 0x8e, 0x56, 0xe9, 0x46,
- 0x87, 0xfc, 0x42, 0x08,
- 0x98, 0x6b, 0x1d, 0x14,
- 0x82, 0x45, 0xc2, 0x0d,
- 0xef, 0xf8, 0x7e, 0x08,
- 0x8e, 0x0b, 0x00, 0x1b,
- 0xa3, 0x34, 0x9d, 0x24,
- 0xef, 0xfc, 0x5c, 0x68,
- 0xc2, 0x9d, 0x9d, 0x14,
- 0x7d, 0x58, 0xa8, 0x05,
- 0x92, 0x0b, 0x6f, 0xf8,
- 0xf1, 0xa4, 0x4e, 0x62,
- 0x80, 0x8b, 0x1d, 0x24,
- 0xf9, 0x88, 0x40, 0x72,
- 0x00, 0x0a, 0x11, 0x04,
- 0x5e, 0x07, 0xf8, 0x0c,
- 0x1b, 0x0e, 0xe0, 0xfc,
- 0xc0, 0x00, 0x00, 0x26,
- 0x40, 0x34, 0x5e, 0x05,
- 0x1e, 0x08, 0xef, 0x8d,
- 0x40, 0x8a, 0x9f, 0xfc,
- 0x84, 0x0d, 0xe6, 0x8a,
- 0x0e, 0x03, 0xa0, 0xc5,
- 0xf0, 0x88, 0x50, 0x72,
- 0x00, 0x24, 0x19, 0x0e,
- 0x44, 0x1b, 0xe1, 0x88,
- 0x40, 0x3b, 0xfd, 0x21,
- 0xfa, 0x08, 0x42, 0x12,
- 0x44, 0x32, 0x1d, 0x34,
- 0x80, 0x23, 0xfa, 0x08,
- 0xe4, 0x04, 0x16, 0x20,
- 0x0c, 0x10, 0x86, 0x13,
- 0xce, 0x8d, 0xe4, 0x04,
- 0x90, 0x9b, 0x8a, 0xc5,
- 0x92, 0xab, 0x21, 0x94,
- 0x94, 0x1b, 0x23, 0x24,
- 0x92, 0x0b, 0x94, 0x93,
- 0xfc, 0x38, 0x44, 0x08,
- 0x88, 0x75, 0xa3, 0x0d,
- 0xa1, 0x0b, 0x9b, 0x04,
- 0x1e, 0x07, 0x82, 0xe5,
- 0x84, 0x35, 0xe0, 0xfc,
- 0x64, 0x00, 0x16, 0x4a,
- 0x96, 0x1b, 0x92, 0x0b,
- 0x80, 0x34, 0xa8, 0x24,
- 0xc1, 0x2e, 0xe9, 0x3e,
- 0x87, 0xfc, 0x43, 0x08,
- 0xa8, 0x04, 0x83, 0x05,
- 0xa8, 0x1e, 0xa4, 0x14,
- 0x81, 0xb5, 0xa4, 0x0e,
- 0x64, 0x00, 0x0c, 0x4a,
- 0x8c, 0x1b, 0x92, 0x0b,
- 0x80, 0x38, 0xa8, 0x28,
- 0xc1, 0x26, 0xe9, 0x36,
- 0x87, 0xfc, 0x43, 0x08,
- 0xf4, 0xb5, 0xce, 0x9d,
- 0x19, 0x04, 0x9d, 0x04,
- 0xc1, 0x8d, 0x80, 0x83,
- 0x87, 0xd5, 0xf2, 0xb5,
- 0x82, 0x0d, 0x1b, 0xb4,
- 0x8e, 0x25, 0x99, 0xce,
- 0xfc, 0x84, 0xbe, 0x64,
- 0x82, 0x81, 0x82, 0x61,
- 0x8a, 0xc5, 0xce, 0xbd,
- 0x21, 0x94, 0x96, 0x9b,
- 0x23, 0x24, 0x92, 0xab,
- 0x94, 0x93, 0x94, 0x1b,
- 0x44, 0x08, 0x92, 0x0b,
- 0xa3, 0x0d, 0xfc, 0x38,
- 0x01, 0x18, 0x88, 0x75,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x10, 0x4a, 0x84, 0x35,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x24, 0x90, 0x1b,
- 0xe9, 0x3e, 0x80, 0x34,
- 0x43, 0x08, 0xc1, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa4, 0x14, 0xa8, 0x04,
- 0xa4, 0x0e, 0xa8, 0x1e,
- 0x0c, 0x4a, 0x81, 0xb5,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x28, 0x8c, 0x1b,
- 0xe9, 0x36, 0x80, 0x38,
- 0x43, 0x08, 0xc1, 0x26,
- 0xce, 0x9d, 0x87, 0xfc,
- 0x9d, 0x04, 0xf4, 0xb5,
- 0x80, 0xb3, 0x19, 0x04,
- 0xf2, 0xb5, 0xc1, 0xbd,
- 0xe5, 0x20, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0xfc, 0x80, 0x5b,
- 0x40, 0x06, 0xe2, 0xc0,
- 0xd5, 0x6e, 0xfc, 0x12,
- 0xd5, 0x8e, 0xd5, 0x7e,
- 0x40, 0x5a, 0xd5, 0x9e,
- 0x42, 0x06, 0xe0, 0xbc,
- 0xd5, 0xae, 0xbc, 0x22,
- 0xd5, 0xde, 0xd5, 0xbe,
- 0x42, 0x6a, 0xd5, 0xee,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x78,
- 0xc1, 0xc3, 0xc0, 0x00,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf0, 0x04, 0x4b, 0x85,
- 0xf0, 0x04, 0x4b, 0x95,
- 0xf0, 0x04, 0x4b, 0xa5,
- 0xf0, 0x04, 0x4b, 0xb5,
- 0xf0, 0x04, 0x4b, 0xc5,
- 0xf0, 0x04, 0x4b, 0xd5,
- 0xf0, 0x04, 0x4b, 0xe5,
- 0xf0, 0x04, 0x4b, 0xf5,
- 0xc2, 0x1f, 0x81, 0xa5,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xe0, 0xd0, 0x40, 0x4a,
- 0x82, 0xb5, 0xd5, 0x2e,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x4b, 0x0f, 0xc1, 0xc3,
- 0x4b, 0x1f, 0xf0, 0x04,
- 0x4b, 0x2f, 0xf0, 0x04,
- 0x4b, 0x3f, 0xf0, 0x04,
- 0x81, 0x65, 0xf0, 0x04,
- 0xd5, 0x1e, 0xc2, 0x1f,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0x94, 0xfe, 0xd5, 0x1e,
- 0xdd, 0x93, 0x81, 0x01,
- 0xe0, 0x04, 0x19, 0x86,
- 0xa3, 0xcd, 0xc1, 0xc3,
- 0x18, 0x4a, 0x82, 0xa5,
- 0x43, 0x46, 0xe0, 0x00,
- 0x02, 0x15, 0xe1, 0x98,
- 0x42, 0x05, 0x80, 0x00,
- 0x41, 0xfe, 0x80, 0x00,
- 0xbf, 0xff, 0x1f, 0xfd,
- 0x43, 0x46, 0xdd, 0x93,
- 0x84, 0x14, 0xe1, 0x98,
- 0x41, 0xfe, 0x84, 0xce,
- 0xff, 0xff, 0x7f, 0xfd,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0x7c, 0x0e, 0x82, 0x6b,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x02, 0x05, 0x80, 0x14,
- 0xa1, 0x0b, 0xe1, 0x48,
- 0x02, 0x10, 0x9a, 0xe5,
- 0xc0, 0x01, 0x65, 0x21,
- 0xbe, 0x14, 0xbe, 0x1e,
- 0x80, 0x8b, 0xfe, 0x1e,
- 0xa3, 0x0d, 0xa2, 0x04,
- 0x40, 0x1b, 0x92, 0x55,
- 0x14, 0x00, 0xfd, 0x21,
- 0x4e, 0x12, 0x64, 0x04,
- 0x44, 0x07, 0xfa, 0x08,
- 0x10, 0x03, 0x94, 0x73,
- 0xe4, 0x00, 0x0e, 0x6a,
- 0xe6, 0x10, 0x16, 0x00,
- 0xa1, 0x6b, 0x14, 0x0b,
- 0x14, 0x00, 0x00, 0xe5,
- 0x16, 0x15, 0xec, 0x04,
- 0x8d, 0x1b, 0xe0, 0x80,
- 0x22, 0x14, 0x8a, 0xf5,
- 0xec, 0x08, 0x00, 0x00,
- 0xf8, 0x80, 0x16, 0x25,
- 0x50, 0x05, 0x83, 0xab,
- 0x02, 0x06, 0x00, 0x04,
- 0x56, 0x15, 0xc0, 0x00,
- 0xa1, 0x2b, 0x58, 0x80,
- 0x10, 0x15, 0x88, 0x25,
- 0x83, 0x31, 0x61, 0x88,
- 0x00, 0x34, 0x22, 0x94,
- 0x80, 0x1f, 0xe8, 0x80,
- 0x82, 0x65, 0xa1, 0x1b,
- 0xe1, 0x8c, 0x10, 0x15,
- 0x2c, 0x14, 0x80, 0x1f,
- 0x82, 0x05, 0xa1, 0x1b,
- 0x44, 0x08, 0x82, 0x0b,
- 0x81, 0x75, 0xfc, 0x38,
- 0xfc, 0x38, 0x44, 0x08,
- 0xfc, 0x04, 0x81, 0x45,
- 0xfc, 0x38, 0x44, 0x08,
- 0x81, 0x9b, 0xa2, 0x04,
- 0xfe, 0x04, 0x88, 0x35,
- 0x91, 0x0b, 0x80, 0x04,
- 0x4e, 0x68, 0x86, 0xb5,
- 0x3f, 0xff, 0x47, 0xe5,
- 0xec, 0x10, 0x16, 0xb0,
- 0xa1, 0x0b, 0x81, 0x01,
- 0xa2, 0x04, 0x86, 0x25,
- 0xa1, 0x0b, 0x20, 0x04,
- 0xa1, 0x0b, 0x82, 0xb5,
- 0xfe, 0x74, 0x84, 0x65,
- 0x90, 0x0b, 0x1c, 0x0e,
- 0x68, 0x01, 0x40, 0x08,
- 0x9c, 0x84, 0xc0, 0x00,
- 0xe8, 0x75, 0xa1, 0x8b,
- 0x7e, 0x8e, 0x81, 0x95,
- 0xe6, 0xd5, 0xa1, 0x0b,
- 0xbe, 0x04, 0x81, 0x55,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xa0, 0xf1, 0xe4, 0xf5,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x83, 0x01, 0x00, 0x1b,
- 0xef, 0xfc, 0x76, 0x08,
- 0x81, 0x05, 0xc1, 0x43,
- 0xfa, 0x80, 0x02, 0x14,
- 0x00, 0x06, 0xe1, 0x1b,
- 0x00, 0x06, 0x94, 0x22,
- 0xdd, 0x93, 0xd4, 0x62,
- 0xf8, 0x00, 0x04, 0x0c,
- 0x6c, 0x50, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x03, 0x4a,
- 0x82, 0x6b, 0x3c, 0x5e,
- 0xfc, 0x1e, 0xbe, 0x5e,
- 0x42, 0x66, 0x8e, 0x05,
- 0x0c, 0x4a, 0xf0, 0x02,
- 0x06, 0x34, 0x64, 0x7c,
- 0x5e, 0x15, 0xfa, 0x80,
- 0x4a, 0x0e, 0x00, 0x04,
- 0x5e, 0x25, 0x9f, 0xfc,
- 0x06, 0x1a, 0x00, 0x08,
- 0x1e, 0x25, 0xe4, 0x00,
- 0x44, 0x22, 0x80, 0x04,
- 0x5e, 0x25, 0x98, 0x14,
- 0x1e, 0x25, 0x80, 0x00,
- 0x1e, 0x55, 0x80, 0x00,
- 0x4a, 0x50, 0x80, 0x08,
- 0x44, 0x22, 0x90, 0x7c,
- 0x5e, 0x25, 0x99, 0x94,
- 0x1e, 0x25, 0x80, 0x04,
- 0x42, 0x20, 0x80, 0x04,
- 0x18, 0x14, 0x9c, 0x00,
- 0x40, 0x00, 0x3c, 0xb5,
- 0xbc, 0x34, 0x18, 0x14,
- 0x02, 0x44, 0x00, 0xd5,
- 0xe1, 0x1b, 0xfa, 0x80,
- 0xdc, 0x3c, 0x18, 0xc4,
- 0xe2, 0x32, 0x00, 0x66,
- 0x42, 0x0e, 0x28, 0xf1,
- 0xc0, 0x10, 0x60, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x87, 0x75, 0xf0, 0x00,
- 0x01, 0x7e, 0x28, 0xf1,
- 0x0c, 0x0c, 0xff, 0xf8,
- 0xdd, 0x93, 0xf0, 0x00,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x01, 0x4a,
- 0xbe, 0x2e, 0xbc, 0x2e,
- 0x86, 0x85, 0xfc, 0x2e,
- 0xe4, 0x7c, 0x00, 0x0a,
- 0x44, 0x06, 0x84, 0x45,
- 0x3e, 0x2e, 0xf0, 0x02,
- 0xfc, 0x1e, 0xc1, 0x21,
- 0x84, 0x1f, 0xbe, 0x14,
- 0xbc, 0x14, 0xbc, 0x1e,
- 0xbe, 0x29, 0xfc, 0x24,
- 0xbe, 0x1e, 0xa4, 0x1f,
- 0x00, 0x06, 0xbe, 0x14,
- 0x81, 0x55, 0xe2, 0x06,
- 0xf8, 0x7e, 0x40, 0x06,
- 0xf0, 0xfe, 0x00, 0x06,
- 0x5d, 0x93, 0x81, 0x01,
- 0x7f, 0xe5, 0xa0, 0xf1,
- 0xff, 0xf8, 0x01, 0xae,
- 0xe2, 0xc0, 0x04, 0x1c,
- 0x04, 0x1f, 0xc1, 0x11,
- 0xf0, 0x7c, 0x44, 0x00,
- 0x02, 0x1c, 0xa4, 0x1f,
- 0xdd, 0x93, 0xe3, 0x40,
- 0xe4, 0x7c, 0x04, 0x0a,
- 0x40, 0x88, 0x04, 0x24,
- 0x00, 0x00, 0x06, 0x0e,
- 0x08, 0x30, 0x80, 0x10,
- 0x48, 0x12, 0x04, 0x10,
- 0x58, 0x02, 0xd0, 0x88,
- 0x02, 0x06, 0x71, 0x90,
- 0xff, 0xfc, 0x60, 0x00,
- 0x00, 0xc4, 0x83, 0xc7,
- 0x02, 0x0f, 0xf0, 0x80,
- 0x70, 0x01, 0x42, 0xc0,
- 0x61, 0x0b, 0xdf, 0xfc,
- 0x73, 0xfd, 0x40, 0xc0,
- 0x48, 0x07, 0xc0, 0x03,
- 0x00, 0xa5, 0xd0, 0x17,
- 0x5d, 0x93, 0xa2, 0x0f,
- 0xff, 0xf8, 0x01, 0x8e,
- 0x60, 0x01, 0x02, 0x86,
- 0xa2, 0x0f, 0xf8, 0x00,
- 0x40, 0x06, 0x90, 0x0e,
- 0xa1, 0x0d, 0xfc, 0x12,
- 0x40, 0x06, 0x82, 0xc5,
- 0xa1, 0x0d, 0xfc, 0x1a,
- 0x40, 0x06, 0x82, 0x15,
- 0x02, 0x06, 0xfc, 0x0a,
- 0xc0, 0x20, 0x60, 0x01,
- 0x80, 0x75, 0x83, 0x0d,
- 0xf3, 0x72, 0x00, 0x46,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x86, 0x4b, 0x08, 0x8b,
- 0x81, 0x71, 0x3e, 0x2e,
- 0x40, 0x5a, 0x00, 0x6b,
- 0x7c, 0x7e, 0xe5, 0x06,
- 0x42, 0x5a, 0x81, 0x31,
- 0x88, 0x2b, 0x65, 0x86,
- 0xef, 0xf8, 0x4f, 0x68,
- 0x67, 0xd1, 0x00, 0x00,
- 0x44, 0x86, 0x40, 0x01,
- 0x42, 0x12, 0xe0, 0x3c,
- 0x81, 0x31, 0x72, 0x9c,
- 0xef, 0xf8, 0x45, 0x68,
- 0x00, 0x00, 0x17, 0xa4,
- 0xc0, 0x04, 0x64, 0x01,
- 0x72, 0x9c, 0x42, 0x12,
- 0x19, 0x74, 0xd7, 0x07,
- 0xe0, 0xd4, 0x16, 0x14,
- 0xff, 0x01, 0x20, 0xbf,
- 0x00, 0x14, 0x01, 0xbb,
- 0x57, 0xfe, 0xe1, 0xac,
- 0xa1, 0x0b, 0x1f, 0xfc,
- 0x60, 0x38, 0x14, 0x09,
- 0xdf, 0xfc, 0x57, 0xfe,
- 0x81, 0x11, 0x1b, 0x94,
- 0x0a, 0xf0, 0x1c, 0x24,
- 0x15, 0x04, 0xe4, 0x20,
- 0xbe, 0x44, 0xa1, 0x0b,
- 0x80, 0x08, 0x00, 0x1b,
- 0x06, 0x14, 0x80, 0x04,
- 0x90, 0x1b, 0x7b, 0x00,
- 0xe8, 0x00, 0x43, 0xc8,
- 0xfc, 0x04, 0xbc, 0x0e,
- 0xe0, 0x18, 0x0e, 0x49,
- 0x68, 0x34, 0xaa, 0x24,
- 0x50, 0x82, 0xa0, 0x1b,
- 0x8e, 0x0b, 0x7b, 0x90,
- 0x68, 0x38, 0x4a, 0x68,
- 0x3e, 0x0e, 0x8c, 0x4b,
- 0x85, 0x05, 0x81, 0xa1,
- 0x0e, 0x29, 0xd9, 0x0a,
- 0x42, 0xba, 0xe0, 0x1c,
- 0x48, 0xba, 0xe5, 0x02,
- 0x06, 0x20, 0x65, 0x82,
- 0x83, 0x01, 0xe4, 0x1c,
- 0x02, 0x03, 0xa7, 0x0f,
- 0x42, 0x42, 0x81, 0x11,
- 0x90, 0x21, 0x72, 0x84,
- 0xef, 0xf8, 0x50, 0x48,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x82, 0xa1, 0x40, 0x3f,
- 0x41, 0xfe, 0xc5, 0x0d,
- 0x00, 0x3f, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x3f, 0x1f, 0xfd,
- 0x91, 0xad, 0xe5, 0x0e,
- 0xbe, 0x04, 0xf8, 0x15,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x98, 0xf1, 0x00, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x58, 0x96, 0x21, 0x1b,
- 0x02, 0x14, 0xe0, 0x08,
- 0x18, 0x06, 0x40, 0xac,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xa1, 0x4b, 0x41, 0x06,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x08, 0x58, 0x96,
- 0xff, 0x11, 0x82, 0x65,
- 0x02, 0x44, 0x02, 0x3d,
- 0x60, 0x37, 0xe1, 0x04,
- 0x91, 0x80, 0x02, 0x14,
- 0x42, 0x1a, 0x86, 0x13,
- 0x20, 0x23, 0xe0, 0x92,
- 0x82, 0x23, 0x98, 0x0b,
- 0xdd, 0x93, 0x94, 0x2e,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x11, 0x02, 0x6b,
- 0x60, 0x00, 0x45, 0x06,
- 0x66, 0xd8, 0x8c, 0x0b,
- 0x81, 0x71, 0x6f, 0xf8,
- 0x66, 0x00, 0x00, 0x60,
- 0xe4, 0xc0, 0x02, 0x60,
- 0x91, 0x21, 0x01, 0xa5,
- 0x04, 0x20, 0x06, 0x7e,
- 0x40, 0x73, 0xec, 0x04,
- 0x42, 0x75, 0xf8, 0x20,
- 0xc1, 0x7c, 0xf0, 0x08,
- 0xfc, 0xf5, 0xa1, 0x2b,
- 0x7f, 0xf4, 0x41, 0x0e,
- 0xe0, 0x38, 0x03, 0x06,
- 0x60, 0x28, 0x05, 0x06,
- 0xff, 0xd4, 0x47, 0x0e,
- 0x48, 0x62, 0x81, 0xf5,
- 0x00, 0x00, 0x71, 0x80,
- 0x92, 0x7e, 0xec, 0x20,
- 0x48, 0x62, 0x10, 0x7e,
- 0x10, 0x7e, 0xf0, 0x88,
- 0xf0, 0x84, 0x48, 0x62,
- 0x82, 0x11, 0x10, 0x76,
- 0x87, 0x0b, 0x88, 0x21,
- 0x41, 0xf6, 0xfc, 0x35,
- 0x81, 0x11, 0x60, 0x0c,
- 0x6f, 0x40, 0x4c, 0x01,
- 0x67, 0x44, 0x00, 0x60,
- 0x63, 0x98, 0xc0, 0x03,
- 0x8f, 0x21, 0x6f, 0xf8,
- 0x65, 0x61, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0x08,
- 0xc0, 0x03, 0x67, 0x61,
- 0x05, 0x06, 0x01, 0x95,
- 0x06, 0x7e, 0xe0, 0x08,
- 0xec, 0x04, 0x04, 0x20,
- 0xf0, 0x08, 0x42, 0x75,
- 0xa1, 0x2b, 0xc1, 0x7c,
- 0x0c, 0x4c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6f, 0xd1, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x00, 0x09, 0x82, 0x45,
- 0xc0, 0x06, 0x60, 0x2d,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xf0, 0x80, 0x44, 0x12,
- 0xec, 0x70, 0x04, 0x29,
- 0x84, 0x05, 0xa1, 0x2b,
- 0xe0, 0x3c, 0x02, 0x29,
- 0xe6, 0x82, 0x40, 0x2a,
- 0x02, 0x09, 0x80, 0x13,
- 0xc0, 0x05, 0x6b, 0x71,
- 0xec, 0x14, 0x00, 0x00,
- 0xe4, 0x08, 0x00, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x3c, 0x02, 0x39,
- 0x67, 0x70, 0x02, 0x10,
- 0x0a, 0x04, 0xc0, 0x03,
- 0x04, 0x20, 0x60, 0x8c,
- 0x04, 0x55, 0xe6, 0x40,
- 0x58, 0x22, 0x7c, 0x14,
- 0x46, 0x3a, 0xf0, 0x94,
- 0x81, 0x71, 0x66, 0x82,
- 0x08, 0x34, 0xb2, 0x64,
- 0xc2, 0x37, 0x60, 0x88,
- 0xfc, 0x10, 0x02, 0x45,
- 0x48, 0x62, 0x88, 0x53,
- 0x86, 0x13, 0x72, 0x9c,
- 0x08, 0x04, 0x32, 0x4e,
- 0x30, 0x5e, 0xe0, 0x88,
- 0x02, 0x13, 0x84, 0x43,
- 0x40, 0x01, 0x6c, 0x01,
- 0x08, 0x35, 0x80, 0x23,
- 0x82, 0x33, 0xe2, 0x00,
- 0xe2, 0x00, 0x48, 0x35,
- 0xec, 0x00, 0x04, 0x09,
- 0x44, 0x01, 0x82, 0x01,
- 0x0c, 0x0c, 0xec, 0x00,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfe, 0x04, 0x04, 0x0c,
- 0x48, 0x22, 0x08, 0x6b,
- 0x21, 0x4b, 0xf9, 0x8c,
- 0x08, 0x65, 0x8a, 0x7b,
- 0xe0, 0x08, 0x48, 0x96,
- 0x61, 0x84, 0x08, 0x24,
- 0xe0, 0xfc, 0x0a, 0x34,
- 0x0a, 0x34, 0x2a, 0x4f,
- 0x88, 0x03, 0xe1, 0x84,
- 0x6f, 0xf4, 0x71, 0x88,
- 0xf2, 0x84, 0x42, 0x52,
- 0x64, 0x1c, 0x43, 0x4a,
- 0x42, 0x1a, 0x81, 0x41,
- 0x41, 0x6a, 0xe0, 0x1c,
- 0x42, 0x0a, 0xe4, 0x18,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x09, 0x04, 0xed, 0x80,
- 0xdc, 0x00, 0x4c, 0x00,
- 0xdc, 0x00, 0x4e, 0x10,
- 0x80, 0x6e, 0x82, 0x7e,
- 0x0c, 0x0c, 0x88, 0x0b,
- 0xdd, 0x93, 0xf6, 0x04,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x67, 0xfd, 0x00, 0x25,
- 0x81, 0x51, 0x40, 0x01,
- 0x86, 0x44, 0x84, 0x34,
- 0xe0, 0x18, 0x02, 0xc5,
- 0x6f, 0xc9, 0x00, 0x21,
- 0x84, 0x33, 0x40, 0x05,
- 0x60, 0x50, 0x02, 0x6b,
- 0xf2, 0x94, 0x48, 0x42,
- 0x6f, 0xcd, 0x00, 0x01,
- 0x02, 0x55, 0xc0, 0x05,
- 0x84, 0xc3, 0x60, 0x1c,
- 0x82, 0x61, 0x06, 0x4e,
- 0x42, 0xc5, 0x84, 0x3e,
- 0x80, 0x53, 0x60, 0x18,
- 0xe0, 0x1c, 0x42, 0x55,
- 0xe0, 0x50, 0x42, 0x63,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x39,
- 0xc8, 0x44, 0x81, 0xc1,
- 0x46, 0x3a, 0xca, 0x54,
- 0xc4, 0x37, 0xe6, 0x82,
- 0x06, 0x35, 0x82, 0x33,
- 0x86, 0x43, 0xe7, 0xdc,
- 0x72, 0xb0, 0x46, 0x52,
- 0xca, 0x3e, 0x80, 0x13,
- 0x02, 0x01, 0xc8, 0x4e,
- 0x04, 0x35, 0xea, 0x70,
- 0x80, 0x33, 0xe0, 0x20,
- 0xe0, 0x20, 0x44, 0x35,
- 0xe0, 0x54, 0x04, 0x3b,
- 0xeb, 0x70, 0x02, 0x01,
- 0xe0, 0x24, 0x04, 0x15,
- 0x44, 0x33, 0x82, 0x31,
- 0x80, 0x13, 0xe0, 0x54,
- 0xe0, 0x24, 0x44, 0x15,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x3c, 0x02, 0x39,
- 0xe0, 0x58, 0x04, 0x4b,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xe0, 0x14, 0x04, 0x35,
- 0x80, 0x13, 0xc4, 0x07,
- 0xe7, 0xdc, 0x02, 0x05,
- 0xe0, 0x10, 0x04, 0x15,
- 0x81, 0x01, 0x00, 0x13,
- 0x72, 0x80, 0x40, 0x32,
- 0x44, 0x05, 0x82, 0x41,
- 0x44, 0x15, 0xe0, 0x14,
- 0x44, 0x43, 0xe0, 0x10,
- 0xdd, 0x93, 0xe0, 0x58,
- 0x60, 0x58, 0x00, 0x29,
- 0x0a, 0x39, 0x84, 0x5b,
- 0x0a, 0x49, 0xef, 0x40,
- 0x02, 0x39, 0xef, 0x44,
- 0x40, 0x01, 0x60, 0x51,
- 0x4a, 0x21, 0xc7, 0x2d,
- 0xc8, 0x2d, 0x4f, 0x40,
- 0x6f, 0x48, 0x4a, 0x21,
- 0xe4, 0xa0, 0x08, 0x00,
- 0x4f, 0x44, 0x4a, 0x21,
- 0x00, 0x35, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x20,
- 0x60, 0x30, 0x02, 0xc3,
- 0x67, 0x60, 0x0a, 0x50,
- 0x02, 0x13, 0xc0, 0x03,
- 0x98, 0x0b, 0xe0, 0xc0,
- 0xe0, 0x00, 0x24, 0x68,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x02, 0x7b,
- 0x60, 0x50, 0x0e, 0x2b,
- 0x0e, 0xab, 0x81, 0x81,
- 0x0e, 0x9b, 0xe0, 0x54,
- 0x18, 0x8e, 0xe0, 0x58,
- 0x9a, 0x8e, 0xa1, 0x2b,
- 0x4c, 0x23, 0xd8, 0x8e,
- 0x4c, 0xa3, 0xe0, 0x18,
- 0x4c, 0x93, 0xe0, 0x1c,
- 0x84, 0xc5, 0xe0, 0x20,
- 0x06, 0x24, 0x1c, 0x04,
- 0x9e, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x65, 0x88,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x14, 0x0a, 0x98, 0x0e,
- 0x04, 0xa4, 0x68, 0x00,
- 0x84, 0xc5, 0xfb, 0x80,
- 0x06, 0x24, 0x5c, 0x04,
- 0xde, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x63, 0xe8,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x12, 0x0a, 0x9a, 0x0e,
- 0x04, 0x94, 0x68, 0x00,
- 0x86, 0x05, 0xfb, 0x80,
- 0x60, 0x10, 0x0e, 0x05,
- 0xe1, 0x84, 0x06, 0x24,
- 0xe0, 0x14, 0x0e, 0x15,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x62, 0x28,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x84, 0x3b, 0x01, 0x01,
- 0x46, 0x01, 0x8a, 0x06,
- 0x8e, 0x06, 0xf0, 0x08,
- 0x02, 0x0b, 0x8c, 0x06,
- 0xa1, 0x0b, 0xe0, 0x50,
- 0x02, 0xc5, 0x88, 0x45,
- 0x06, 0x04, 0x60, 0x18,
- 0x7f, 0x51, 0xe1, 0x84,
- 0x86, 0x6b, 0xa6, 0x4b,
- 0x4c, 0x40, 0x8a, 0xcd,
- 0x18, 0x63, 0x9c, 0x00,
- 0xff, 0xf8, 0x18, 0x0e,
- 0xe0, 0x82, 0x4e, 0x6a,
- 0xe0, 0x1c, 0x02, 0x65,
- 0x4a, 0x72, 0x0a, 0x6d,
- 0x46, 0x40, 0xfa, 0x30,
- 0x0a, 0x52, 0x1c, 0x00,
- 0x08, 0x56, 0xe9, 0xfc,
- 0x40, 0x3a, 0x8c, 0x33,
- 0x40, 0x02, 0xe0, 0x82,
- 0x00, 0x02, 0xfa, 0x30,
- 0x8a, 0x06, 0xe9, 0xfc,
- 0xe0, 0x54, 0x02, 0x0b,
- 0x88, 0x45, 0xa1, 0x0b,
- 0x60, 0x20, 0x02, 0xc5,
- 0xe1, 0x84, 0x06, 0x04,
- 0xa6, 0x4b, 0x7f, 0x51,
- 0x8a, 0xcd, 0x86, 0x6b,
- 0x9c, 0x00, 0x4c, 0x40,
- 0x60, 0x24, 0x02, 0xc5,
- 0x4c, 0x6a, 0x98, 0x63,
- 0x02, 0x0e, 0x60, 0x82,
- 0x8a, 0xcd, 0xff, 0xf8,
- 0x1c, 0x00, 0x46, 0x40,
- 0xfa, 0x04, 0x4c, 0x62,
- 0x0a, 0x62, 0x18, 0x33,
- 0x40, 0x3a, 0xe9, 0xfc,
- 0xc8, 0x56, 0xe0, 0x82,
- 0xfa, 0x04, 0x40, 0x02,
- 0xe9, 0xfc, 0x00, 0x02,
- 0x0c, 0x0c, 0xca, 0x06,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x89, 0x04, 0x84, 0x7a,
- 0x04, 0x89, 0x86, 0x1a,
- 0xd6, 0x58, 0xe0, 0x10,
- 0x80, 0x7c, 0x88, 0x98,
- 0xc8, 0xc8, 0x8a, 0x78,
- 0x04, 0x29, 0xca, 0x68,
- 0x02, 0x1c, 0xe0, 0x14,
- 0xe1, 0x84, 0x02, 0x84,
- 0x60, 0x10, 0x40, 0x51,
- 0x0a, 0x24, 0x98, 0x13,
- 0xc2, 0x17, 0x61, 0x84,
- 0x02, 0x10, 0x0c, 0x53,
- 0x40, 0x11, 0xec, 0x04,
- 0xc2, 0x57, 0x60, 0x1c,
- 0x6c, 0x04, 0x02, 0x50,
- 0x40, 0x11, 0xc2, 0x87,
- 0xc2, 0x27, 0x60, 0x20,
- 0x60, 0x28, 0x40, 0x21,
- 0x66, 0x40, 0x04, 0x40,
- 0x06, 0x19, 0xc0, 0x03,
- 0x81, 0x31, 0x60, 0x38,
- 0xe0, 0x14, 0x40, 0x91,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x24, 0x40, 0x81,
- 0x49, 0x48, 0x81, 0x95,
- 0xec, 0x04, 0x0a, 0x30,
- 0xec, 0x04, 0x02, 0x10,
- 0x46, 0x40, 0xc9, 0x5d,
- 0xa1, 0x1b, 0x9c, 0x00,
- 0x40, 0x31, 0xfc, 0xf5,
- 0x81, 0x01, 0x60, 0x2c,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf0, 0x80, 0x46, 0x22,
- 0xec, 0x70, 0x06, 0x39,
- 0x86, 0xa5, 0xa1, 0x3b,
- 0xe0, 0x3c, 0x04, 0x39,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xf0, 0x80, 0x46, 0x22,
- 0x6b, 0x71, 0x06, 0x39,
- 0x06, 0x30, 0xc0, 0x05,
- 0xe2, 0x3d, 0xec, 0x14,
- 0xc2, 0x07, 0x84, 0x15,
- 0x04, 0x03, 0x80, 0x23,
- 0xc0, 0x02, 0x63, 0xb9,
- 0x86, 0x12, 0x84, 0x22,
- 0x41, 0x1a, 0x85, 0x0d,
- 0x40, 0x0a, 0xe0, 0x04,
- 0x00, 0x0c, 0xe1, 0x84,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x1d, 0x04,
- 0x88, 0x8b, 0x7c, 0x5e,
- 0x90, 0x1b, 0x7e, 0x1e,
- 0x00, 0x06, 0x3e, 0x0e,
- 0x8b, 0x6e, 0xe0, 0x04,
- 0xe0, 0x38, 0x04, 0xb9,
- 0x81, 0x45, 0x89, 0x6e,
- 0x00, 0x00, 0x45, 0x6e,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x7c, 0x04, 0xfe, 0x95,
- 0x12, 0x20, 0x87, 0x41,
- 0x40, 0x03, 0x65, 0x71,
- 0xe6, 0x40, 0x14, 0x30,
- 0x66, 0x41, 0x0e, 0x30,
- 0x80, 0x6e, 0xc0, 0x03,
- 0xc2, 0x6e, 0x82, 0x4e,
- 0x00, 0x06, 0x40, 0x6e,
- 0xbe, 0x14, 0xe0, 0x08,
- 0x86, 0x4e, 0x84, 0x0e,
- 0xc4, 0x6e, 0xc6, 0x6e,
- 0x9c, 0x28, 0x85, 0xe5,
- 0x86, 0xa5, 0xa1, 0x2b,
- 0x00, 0x09, 0xfe, 0x04,
- 0xc1, 0x2d, 0xe0, 0x10,
- 0x3e, 0x14, 0x82, 0x45,
- 0xe0, 0x08, 0x00, 0x46,
- 0x87, 0x01, 0x04, 0x0e,
- 0xa4, 0x08, 0x86, 0x0e,
- 0xc6, 0x0e, 0xc4, 0x6e,
- 0x06, 0xf0, 0x2a, 0x14,
- 0x28, 0x04, 0xe4, 0x40,
- 0x7f, 0xfd, 0x49, 0xfe,
- 0x3c, 0x3e, 0xcf, 0xff,
- 0x5e, 0x18, 0x81, 0x31,
- 0x81, 0x51, 0x6f, 0xfc,
- 0x81, 0x95, 0x89, 0x04,
- 0x83, 0x01, 0x7c, 0x24,
- 0x88, 0x0e, 0x87, 0x11,
- 0xa4, 0x18, 0x8a, 0x1e,
- 0xca, 0x1e, 0xc8, 0x6e,
- 0x16, 0xb0, 0x61, 0x0e,
- 0x02, 0x91, 0xec, 0x04,
- 0x82, 0x71, 0x90, 0xa1,
- 0xf4, 0x55, 0xa1, 0xbb,
- 0xb8, 0xf1, 0x7c, 0x04,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xc0, 0x08, 0x4c, 0x96,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x6b, 0x0a, 0x9b,
- 0x80, 0xbb, 0x06, 0x7b,
- 0x64, 0xd1, 0x00, 0x90,
- 0x84, 0x8b, 0x40, 0x01,
- 0x08, 0x90, 0x02, 0xab,
- 0x3c, 0x0e, 0xe4, 0x90,
- 0x64, 0x91, 0x0a, 0x90,
- 0x0e, 0x2b, 0xc0, 0x01,
- 0x78, 0x58, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x98, 0xf1, 0x80, 0xa5,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x04, 0x90, 0xdd, 0x93,
- 0x96, 0x0b, 0x64, 0x30,
- 0x6f, 0xfc, 0x65, 0x88,
- 0x7c, 0x8e, 0x8c, 0x1b,
- 0xe4, 0x80, 0x10, 0x90,
- 0x8c, 0x1b, 0x16, 0x0b,
- 0x6f, 0xfc, 0x6b, 0x48,
- 0x3c, 0x9e, 0x90, 0x2b,
- 0x7c, 0x24, 0x96, 0x0b,
- 0x0e, 0x3b, 0x94, 0x1b,
- 0x70, 0x18, 0x8c, 0x4b,
- 0x90, 0x5b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x82, 0x9b, 0x04, 0x8b,
- 0x86, 0x7b, 0x08, 0x6b,
- 0x6f, 0x48, 0x10, 0x19,
- 0x67, 0x60, 0x04, 0x80,
- 0x12, 0x09, 0xc0, 0x03,
- 0x8c, 0x3b, 0x60, 0x10,
- 0xe8, 0x04, 0x59, 0x68,
- 0xe0, 0x10, 0x0e, 0x05,
- 0xe0, 0x34, 0x0e, 0x1b,
- 0xef, 0x48, 0x10, 0x29,
- 0xe0, 0x10, 0x12, 0x39,
- 0xe0, 0x8c, 0x0e, 0x49,
- 0x81, 0x01, 0x18, 0x0e,
- 0x4c, 0x21, 0xd8, 0x1c,
- 0x4c, 0x31, 0xe0, 0x18,
- 0x4c, 0x41, 0xe0, 0x1c,
- 0x0c, 0x4c, 0xe0, 0x20,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x81, 0xb1, 0x13, 0xa4,
- 0x6e, 0x40, 0x02, 0x22,
- 0x11, 0x74, 0x88, 0x8b,
- 0x28, 0x5e, 0x86, 0x6b,
- 0x0f, 0xbe, 0x81, 0x91,
- 0x81, 0x55, 0x81, 0x21,
- 0x82, 0x21, 0x41, 0x34,
- 0xfa, 0x24, 0x52, 0x32,
- 0xfe, 0x75, 0xc3, 0x2d,
- 0x41, 0xfe, 0xa0, 0x9d,
- 0x80, 0x3f, 0x1f, 0xfd,
- 0x80, 0x00, 0x54, 0x05,
- 0x06, 0xf0, 0x90, 0x05,
- 0x92, 0x0b, 0x64, 0x70,
- 0x90, 0x2b, 0x0a, 0x1b,
- 0xe8, 0x34, 0x5e, 0x48,
- 0x8e, 0x15, 0xa1, 0x0b,
- 0x90, 0x1b, 0x12, 0x0b,
- 0x68, 0x34, 0x61, 0x48,
- 0xa1, 0x0b, 0x8e, 0x2b,
- 0x8f, 0x84, 0x8c, 0x35,
- 0x54, 0xb5, 0xa1, 0x8b,
- 0x40, 0x96, 0x00, 0x00,
- 0x8a, 0x45, 0x80, 0x08,
- 0x98, 0x1a, 0x9c, 0x04,
- 0xc7, 0x07, 0x9a, 0x2a,
- 0x80, 0x95, 0xc3, 0x0d,
- 0x81, 0x01, 0x44, 0x0d,
- 0x40, 0x12, 0x88, 0x25,
- 0x04, 0x06, 0x70, 0x88,
- 0x42, 0xb2, 0xff, 0x40,
- 0x81, 0x31, 0x72, 0xac,
- 0xef, 0xf4, 0x4e, 0x28,
- 0x60, 0xfc, 0x04, 0x14,
- 0x24, 0x0f, 0xc3, 0x07,
- 0x01, 0x31, 0xc3, 0x17,
- 0x44, 0x38, 0x90, 0x2b,
- 0x04, 0x04, 0xef, 0xf4,
- 0xff, 0x31, 0x60, 0xa0,
- 0xd0, 0x17, 0x71, 0x07,
- 0xa2, 0x0f, 0x07, 0x2b,
- 0x1f, 0xfc, 0x45, 0xfe,
- 0x45, 0xfe, 0xa1, 0x0b,
- 0xa8, 0x2e, 0xdf, 0xfc,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x84, 0x03, 0x04, 0x13,
- 0x61, 0x8a, 0x40, 0x0a,
- 0x42, 0x1a, 0x82, 0x11,
- 0x04, 0x20, 0x61, 0x8a,
- 0x18, 0x04, 0xec, 0x04,
- 0x0c, 0x04, 0x60, 0x88,
- 0x08, 0xc5, 0xe0, 0x8c,
- 0x4e, 0x52, 0x7c, 0x30,
- 0x0a, 0x65, 0xf0, 0x98,
- 0x85, 0x0d, 0x7c, 0x18,
- 0xca, 0xc7, 0x9e, 0x84,
- 0x12, 0xc4, 0xa6, 0xc3,
- 0x8c, 0xc3, 0x61, 0x7c,
- 0xf2, 0xa0, 0x4c, 0x92,
- 0x0c, 0x04, 0x1e, 0x6e,
- 0x1c, 0xce, 0xe0, 0x84,
- 0x0c, 0xcb, 0x8a, 0x63,
- 0x00, 0x06, 0x69, 0x00,
- 0x00, 0x00, 0x80, 0x00,
- 0x83, 0x0b, 0xc4, 0x04,
- 0x4c, 0xc3, 0x82, 0xc1,
- 0xf6, 0xd5, 0xe9, 0x00,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0xfc, 0x18, 0x24,
- 0x04, 0xc3, 0xa2, 0x03,
- 0x03, 0xc7, 0x86, 0x03,
- 0x0b, 0xc4, 0x81, 0x81,
- 0x4c, 0x0a, 0xb8, 0x03,
- 0x00, 0x34, 0x61, 0x8e,
- 0x09, 0x04, 0xe0, 0x88,
- 0xf0, 0x80, 0x4e, 0x42,
- 0x0c, 0x13, 0x94, 0x8e,
- 0x42, 0x1a, 0xc4, 0x67,
- 0x88, 0x63, 0x61, 0x8e,
- 0xb0, 0x8e, 0x80, 0x8e,
- 0xc4, 0x17, 0x02, 0x23,
- 0x61, 0x8e, 0x46, 0x2a,
- 0xf0, 0x84, 0x44, 0x42,
- 0x42, 0x42, 0xc4, 0x37,
- 0x06, 0x70, 0x70, 0x8c,
- 0x82, 0x7b, 0xec, 0x10,
- 0x14, 0x94, 0xd9, 0x84,
- 0x10, 0x93, 0xc6, 0x6d,
- 0xdc, 0x00, 0x4c, 0x40,
- 0xdd, 0x84, 0x94, 0x9e,
- 0xc6, 0x7d, 0x30, 0x94,
- 0x4e, 0x40, 0x10, 0x93,
- 0x30, 0x9e, 0xdc, 0x00,
- 0xfc, 0x35, 0x85, 0x6b,
- 0xc9, 0xc4, 0x80, 0x54,
- 0x98, 0x53, 0xc6, 0x2d,
- 0x44, 0x40, 0x00, 0x5e,
- 0x83, 0x2b, 0xdc, 0x00,
- 0x0c, 0x0c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x4c, 0x42, 0x08, 0x13,
- 0x4c, 0x6a, 0xf0, 0x80,
- 0x82, 0x11, 0x61, 0x92,
- 0x61, 0x92, 0x42, 0x1a,
- 0xe0, 0x88, 0x18, 0x44,
- 0xd6, 0x07, 0x7e, 0x3e,
- 0xc4, 0x67, 0x19, 0x34,
- 0x4f, 0xfe, 0x44, 0x17,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x52, 0x52, 0x0a, 0xc3,
- 0x3e, 0x3e, 0xf0, 0x84,
- 0xf0, 0x98, 0x54, 0x52,
- 0x06, 0xc0, 0x0c, 0x7e,
- 0x7c, 0x5e, 0xec, 0x10,
- 0xfc, 0xa8, 0x16, 0x04,
- 0x81, 0xc1, 0x01, 0x41,
- 0x81, 0x11, 0x01, 0x81,
- 0xe9, 0x64, 0x83, 0xf5,
- 0xc6, 0xad, 0x7e, 0x04,
- 0x1e, 0xa5, 0xca, 0x67,
- 0x4e, 0x62, 0x40, 0x08,
- 0x21, 0x7d, 0xf1, 0x80,
- 0x0c, 0x06, 0x8e, 0x6b,
- 0xa0, 0x2d, 0x40, 0x00,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x61, 0x7c, 0x0e, 0x64,
- 0x40, 0x6a, 0x8c, 0x43,
- 0x58, 0x72, 0x64, 0x2e,
- 0x4c, 0x6a, 0xf2, 0xb0,
- 0x80, 0x83, 0xe4, 0xae,
- 0x72, 0x84, 0x42, 0x62,
- 0x64, 0x00, 0x16, 0xb0,
- 0x93, 0xab, 0xc0, 0x08,
- 0x18, 0xca, 0xf8, 0x35,
- 0x18, 0x1a, 0xe0, 0x00,
- 0x08, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x08, 0x45, 0xed, 0x80,
- 0x80, 0x08, 0x40, 0x96,
- 0x61, 0x84, 0x00, 0x44,
- 0xe0, 0xfc, 0x04, 0xc4,
- 0x04, 0xc4, 0x24, 0x0f,
- 0x10, 0x03, 0xe1, 0x84,
- 0x42, 0x12, 0x98, 0x3b,
- 0x88, 0x2b, 0x72, 0x88,
- 0xef, 0xf0, 0x69, 0x48,
- 0xe0, 0x00, 0x03, 0x4a,
- 0x02, 0x1a, 0x3e, 0x14,
- 0x00, 0x6a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x00, 0x06, 0xed, 0x80,
- 0x04, 0x0e, 0xc0, 0x00,
- 0xa0, 0xf1, 0x81, 0x01,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x4c, 0x52, 0x0d, 0x04,
- 0x0c, 0x23, 0xf0, 0x80,
- 0xf0, 0x94, 0x4e, 0x12,
- 0x61, 0x96, 0x58, 0x2a,
- 0xec, 0x04, 0x10, 0x50,
- 0xc4, 0x87, 0x02, 0x71,
- 0x18, 0x33, 0x8f, 0x24,
- 0x46, 0x3a, 0xc4, 0xc7,
- 0x42, 0x02, 0x61, 0x96,
- 0x4c, 0x6a, 0xf0, 0xb0,
- 0x82, 0x9b, 0x61, 0x96,
- 0x61, 0x96, 0x4e, 0x7a,
- 0xc4, 0x37, 0x81, 0x51,
- 0x70, 0x8c, 0x58, 0x02,
- 0xf0, 0xa0, 0x46, 0x02,
- 0xe5, 0xa4, 0x81, 0x65,
- 0x94, 0x53, 0xc6, 0x9d,
- 0xdc, 0x00, 0x52, 0x00,
- 0xfe, 0x55, 0x99, 0x9b,
- 0xa3, 0x4d, 0x44, 0x67,
- 0xc4, 0x77, 0x04, 0x63,
- 0x80, 0x00, 0x0c, 0x95,
- 0x52, 0x92, 0x02, 0x65,
- 0xff, 0x91, 0x90, 0x94,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0x95, 0x8a, 0x9b,
- 0x52, 0x92, 0xa0, 0x00,
- 0x18, 0x9e, 0xb1, 0x94,
- 0x04, 0x83, 0x84, 0x73,
- 0x83, 0xd5, 0xff, 0x91,
- 0xc5, 0xb4, 0xf1, 0xa4,
- 0x4a, 0xa2, 0x8a, 0xa3,
- 0x0c, 0xa5, 0xf1, 0xac,
- 0x02, 0x45, 0x80, 0x00,
- 0x90, 0x94, 0x54, 0xa2,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0xa5, 0x8a, 0xab,
- 0x54, 0xa2, 0xa0, 0x00,
- 0x18, 0xae, 0xb1, 0x94,
- 0xe4, 0x0c, 0x59, 0x1a,
- 0x3c, 0x01, 0x58, 0x00,
- 0x43, 0x1a, 0x40, 0x00,
- 0x42, 0x00, 0xe4, 0x0c,
- 0xc0, 0x00, 0x3c, 0x01,
- 0x64, 0x10, 0x14, 0x60,
- 0x55, 0x1a, 0x84, 0x6b,
- 0x4c, 0xa0, 0xe4, 0x20,
- 0x4c, 0x1a, 0xbc, 0x00,
- 0x3d, 0xb8, 0xe0, 0x1c,
- 0xc3, 0xff, 0x3f, 0xfd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0xca, 0x37, 0x00, 0x8b,
- 0xe1, 0xfc, 0x14, 0x84,
- 0x00, 0xa4, 0x90, 0xa3,
- 0x80, 0x33, 0xe1, 0x04,
- 0x60, 0xa2, 0x40, 0x3a,
- 0xe1, 0x7c, 0x06, 0x54,
- 0x61, 0x7c, 0x18, 0x04,
- 0x56, 0xc2, 0xaa, 0x03,
- 0x46, 0x02, 0xf3, 0x8c,
- 0x17, 0x34, 0xf9, 0xac,
- 0x41, 0xfe, 0xa1, 0x3b,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x80, 0x08, 0x4e, 0x96,
- 0x0a, 0x44, 0x90, 0x05,
- 0xa4, 0x43, 0x61, 0x7c,
- 0x61, 0x7c, 0x18, 0x24,
- 0x4a, 0x52, 0xff, 0x21,
- 0x81, 0x71, 0x73, 0xb0,
- 0x44, 0x72, 0x04, 0x5d,
- 0x3e, 0x1e, 0xf1, 0x80,
- 0x12, 0x44, 0x80, 0xcb,
- 0xe0, 0x57, 0x61, 0xc0,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf3, 0xac, 0x42, 0x72,
- 0xe0, 0x47, 0x7c, 0x3e,
- 0x60, 0x84, 0x06, 0xb4,
- 0xe1, 0xfc, 0x0c, 0x04,
- 0x60, 0x84, 0x04, 0x04,
- 0x56, 0x10, 0xb2, 0x5f,
- 0x40, 0xc2, 0x1c, 0x00,
- 0x42, 0xb2, 0xf0, 0x90,
- 0xac, 0x3f, 0x72, 0x94,
- 0xef, 0xf0, 0x5c, 0xe8,
- 0x02, 0xa4, 0x95, 0xb4,
- 0xd6, 0xb7, 0x7c, 0x00,
- 0xa2, 0x83, 0x3e, 0x14,
- 0xa3, 0x8b, 0x7c, 0x34,
- 0x04, 0x01, 0x00, 0x00,
- 0xd6, 0x17, 0x80, 0x04,
- 0x02, 0x04, 0x82, 0x03,
- 0x96, 0x1f, 0xe1, 0x7c,
- 0x40, 0x1a, 0x80, 0x13,
- 0x00, 0x02, 0xe1, 0xae,
- 0x00, 0x02, 0xe0, 0x00,
- 0xc7, 0xff, 0x6b, 0xfd,
- 0x8e, 0x0b, 0x0c, 0x0e,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0xa4, 0x13, 0x1b, 0x74,
- 0xa4, 0x03, 0x09, 0x3e,
- 0x8a, 0x9b, 0x1f, 0x64,
- 0x46, 0x72, 0x1d, 0x84,
- 0x56, 0x3a, 0xf0, 0x88,
- 0x88, 0x2b, 0x61, 0x9e,
- 0x7c, 0x4e, 0x99, 0xa4,
- 0x16, 0x13, 0x8e, 0x4b,
- 0x7e, 0x1e, 0x96, 0x03,
- 0x21, 0xb4, 0xa0, 0x13,
- 0x3c, 0x6e, 0x93, 0x1d,
- 0xc4, 0x04, 0x12, 0x10,
- 0x70, 0xa4, 0x42, 0x02,
- 0x02, 0x10, 0x94, 0x3b,
- 0x90, 0x5b, 0x6c, 0x04,
- 0xef, 0xfc, 0x69, 0x68,
- 0x86, 0x15, 0xa1, 0x0b,
- 0x94, 0x3b, 0x7e, 0x14,
- 0x8e, 0x4b, 0x3c, 0xbe,
- 0x90, 0x5b, 0x7c, 0x24,
- 0xe4, 0x04, 0x00, 0x10,
- 0x6f, 0xfc, 0x68, 0xa8,
- 0xa1, 0x0b, 0xb2, 0x03,
- 0x18, 0x04, 0x82, 0x75,
- 0x40, 0x0a, 0xd6, 0x77,
- 0x98, 0x0e, 0xe1, 0x1e,
- 0x40, 0x0a, 0xac, 0x04,
- 0x2c, 0x0e, 0xe1, 0x1e,
- 0x98, 0x24, 0x81, 0x01,
- 0xc2, 0x2d, 0xac, 0x14,
- 0x40, 0x00, 0x4c, 0x15,
- 0xdc, 0x00, 0x42, 0x20,
- 0xc0, 0x00, 0x56, 0x25,
- 0xc0, 0x00, 0x0c, 0x35,
- 0x44, 0x30, 0x09, 0x34,
- 0xa8, 0xf1, 0xdc, 0x00,
- 0x4c, 0x35, 0xc6, 0x2d,
- 0x16, 0x15, 0xc0, 0x00,
- 0xc7, 0x1d, 0xc0, 0x00,
- 0xc0, 0x00, 0x56, 0x35,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x84, 0x9b, 0x11, 0x1e,
- 0x93, 0x4e, 0x95, 0x5e,
- 0x97, 0x3e, 0x8f, 0x0e,
- 0xb3, 0x14, 0x8c, 0x08,
- 0x19, 0x1e, 0xa1, 0x0b,
- 0x9d, 0x1e, 0x81, 0x11,
- 0x84, 0x45, 0x9b, 0x1e,
- 0xe0, 0x04, 0x00, 0x02,
- 0x85, 0xb3, 0x81, 0x13,
- 0x8b, 0xf3, 0x99, 0x04,
- 0xe5, 0x80, 0x00, 0x00,
- 0xf8, 0x60, 0x40, 0x15,
- 0xf8, 0x30, 0x40, 0x15,
- 0x40, 0x15, 0xc1, 0x1e,
- 0x40, 0x15, 0xe0, 0x2c,
- 0x97, 0x04, 0xe0, 0x5c,
- 0xa1, 0x0b, 0x82, 0x08,
- 0x31, 0xb4, 0xa2, 0x25,
- 0xaf, 0x84, 0x81, 0x71,
- 0x13, 0x24, 0xad, 0xa4,
- 0xe0, 0x84, 0x00, 0x74,
- 0x7c, 0x00, 0x04, 0x43,
- 0xf0, 0x80, 0x42, 0x22,
- 0xe0, 0x90, 0x02, 0x23,
- 0x82, 0x45, 0x84, 0x4d,
- 0x06, 0x74, 0x19, 0x04,
- 0x80, 0x33, 0xe0, 0x88,
- 0x02, 0x55, 0x86, 0x1b,
- 0x84, 0x04, 0xf0, 0x30,
- 0x19, 0x04, 0x85, 0xf5,
- 0xe0, 0x88, 0x06, 0x74,
- 0x44, 0x42, 0x09, 0x2e,
- 0x0d, 0x7e, 0xfa, 0x08,
- 0x00, 0x33, 0x82, 0x21,
- 0x06, 0x1b, 0xa8, 0x23,
- 0xe6, 0x40, 0x0c, 0x30,
- 0xf0, 0x30, 0x02, 0x55,
- 0x02, 0xc5, 0x84, 0x04,
- 0x05, 0x13, 0xe0, 0x60,
- 0xec, 0x04, 0x04, 0x40,
- 0x8b, 0x4e, 0x85, 0x33,
- 0xe8, 0x00, 0x31, 0x3c,
- 0x70, 0x88, 0x4e, 0xa2,
- 0x82, 0x71, 0x82, 0x21,
- 0xe1, 0xaa, 0x4e, 0x7a,
- 0x10, 0x45, 0xc4, 0x77,
- 0x88, 0x03, 0xfc, 0x1c,
- 0xe4, 0x44, 0x84, 0x0e,
- 0x8c, 0x5e, 0x88, 0x53,
- 0xfc, 0x1c, 0x16, 0x45,
- 0x98, 0xce, 0x88, 0xc3,
- 0x8b, 0x44, 0x8d, 0x74,
- 0x20, 0x51, 0x89, 0x24,
- 0xe0, 0x88, 0x0c, 0x74,
- 0x08, 0x44, 0x4b, 0x57,
- 0x0c, 0x5e, 0xfb, 0x80,
- 0x1e, 0x55, 0xca, 0x0d,
- 0x40, 0x02, 0x40, 0x30,
- 0x06, 0x74, 0xd1, 0x94,
- 0x82, 0x21, 0x40, 0x88,
- 0xfa, 0x80, 0x18, 0xa4,
- 0xd0, 0x94, 0x46, 0x32,
- 0x40, 0x60, 0x46, 0x05,
- 0xf1, 0x90, 0x46, 0x22,
- 0x06, 0x34, 0x0f, 0x04,
- 0x00, 0x09, 0xfb, 0x00,
- 0x19, 0x04, 0xe0, 0x30,
- 0x80, 0x63, 0xa1, 0x0b,
- 0xe6, 0x40, 0x00, 0x60,
- 0xc0, 0x00, 0x00, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0x00, 0x00, 0x40, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0xa6, 0x04, 0x91, 0x44,
- 0x50, 0x58, 0x84, 0x14,
- 0xe4, 0xd0, 0x08, 0xf0,
- 0x08, 0xf0, 0x7c, 0x4e,
- 0xbe, 0x4e, 0xe4, 0xe0,
- 0x95, 0x44, 0xbc, 0xce,
- 0xe8, 0x00, 0x62, 0x08,
- 0x82, 0x71, 0x21, 0x0b,
- 0x80, 0x34, 0x1e, 0x15,
- 0x80, 0xc0, 0x4c, 0x15,
- 0x86, 0x18, 0x97, 0x14,
- 0xde, 0xd5, 0x83, 0x7d,
- 0x02, 0x0b, 0x80, 0x1b,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x1e, 0x05, 0xa9, 0x0e,
- 0x97, 0x2e, 0xe0, 0xac,
- 0xe0, 0xb4, 0x1e, 0x25,
- 0x1e, 0x05, 0x9d, 0x0e,
- 0x19, 0x5e, 0xe0, 0xa0,
- 0xe6, 0x40, 0x18, 0x20,
- 0x99, 0x51, 0x15, 0x1e,
- 0x1e, 0x05, 0xa3, 0x0e,
- 0x1e, 0x15, 0xe0, 0x9c,
- 0x1e, 0x65, 0xe0, 0xb0,
- 0x13, 0x0e, 0xe0, 0xa8,
- 0x1e, 0xb5, 0x81, 0x01,
- 0x1e, 0x75, 0xe0, 0xa4,
- 0xbd, 0x0e, 0xe0, 0x98,
- 0xb9, 0x0e, 0xbb, 0x0e,
- 0xb5, 0x0e, 0xb7, 0x0e,
- 0xb1, 0x0e, 0xb3, 0x0e,
- 0x81, 0x45, 0xaf, 0x0e,
- 0x0a, 0x50, 0x71, 0x0c,
- 0xa1, 0x5b, 0xec, 0x04,
- 0x29, 0x54, 0xfe, 0x95,
- 0xe6, 0x40, 0x14, 0x20,
- 0x12, 0x10, 0x1b, 0x7e,
- 0x25, 0x6e, 0xe4, 0xc0,
- 0xe5, 0x80, 0x0c, 0x40,
- 0x65, 0x01, 0x18, 0x50,
- 0x0a, 0x50, 0x40, 0x02,
- 0xc0, 0x04, 0x66, 0x01,
- 0x10, 0x10, 0x21, 0xce,
- 0x1f, 0x5e, 0xe6, 0x40,
- 0xe0, 0x08, 0x44, 0x96,
- 0x81, 0x71, 0x27, 0x3e,
- 0x93, 0x95, 0xab, 0xbe,
- 0x02, 0x0a, 0xa4, 0x14,
- 0xc7, 0xff, 0x63, 0xfd,
- 0xa1, 0x0b, 0x8a, 0x05,
- 0x25, 0xb4, 0x86, 0xd5,
- 0xad, 0x2e, 0x96, 0x3b,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0x78, 0x30, 0x0c, 0x13,
- 0xa3, 0x24, 0x96, 0x4b,
- 0x6b, 0x58, 0xa9, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x03, 0x82, 0xb5,
- 0x81, 0x21, 0x78, 0xc0,
- 0x78, 0x30, 0x0c, 0x13,
- 0xab, 0x34, 0x96, 0x4b,
- 0x6a, 0x98, 0xa1, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xa7, 0x34, 0x84, 0x45,
- 0xad, 0x24, 0xab, 0xb4,
- 0xe2, 0xa4, 0x04, 0x0a,
- 0x0f, 0xfc, 0x43, 0xf6,
- 0x80, 0x08, 0x44, 0x96,
- 0x80, 0x00, 0x54, 0x13,
- 0x88, 0x91, 0x02, 0x71,
- 0x84, 0x61, 0x04, 0xa1,
- 0x84, 0x81, 0x0d, 0x85,
- 0x81, 0x21, 0x2b, 0xb4,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0xf8, 0x30, 0x0c, 0x13,
- 0x96, 0x3b, 0x1d, 0x44,
- 0x68, 0xb8, 0x9f, 0x54,
- 0x27, 0x34, 0xe8, 0x00,
- 0xad, 0x24, 0xa1, 0x0b,
- 0x20, 0x02, 0xf8, 0x95,
- 0xe5, 0xa0, 0x04, 0xf0,
- 0x06, 0xf0, 0x18, 0x12,
- 0x3e, 0x2e, 0xe5, 0xd0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0x96, 0x03, 0x11, 0x3e,
- 0xe1, 0xae, 0x40, 0x0a,
- 0xbc, 0x3e, 0x9b, 0xb4,
- 0x2b, 0x34, 0xad, 0x0e,
- 0xa1, 0x44, 0x96, 0x2b,
- 0xef, 0xfc, 0x4c, 0xe8,
- 0x00, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0xc0,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x96, 0x2b, 0x11, 0x04,
- 0xa9, 0x44, 0xab, 0x34,
- 0x2d, 0x04, 0xbc, 0x0e,
- 0x4b, 0xf8, 0x86, 0xbb,
- 0x97, 0x04, 0xef, 0xfc,
- 0xe0, 0x30, 0x00, 0x09,
- 0x84, 0x05, 0xa1, 0x0b,
- 0x65, 0x70, 0x00, 0xf0,
- 0xe5, 0x80, 0x04, 0xf0,
- 0x0a, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0x90,
- 0xbc, 0x2e, 0x96, 0x3b,
- 0x9b, 0x24, 0xad, 0x04,
- 0x4a, 0xb8, 0x9f, 0x44,
- 0xbd, 0x04, 0xef, 0xfc,
- 0x99, 0x24, 0x95, 0x14,
- 0xbb, 0x04, 0xad, 0x0e,
- 0xb5, 0x34, 0xb3, 0xb4,
- 0x84, 0x1a, 0x91, 0x0e,
- 0x8b, 0x2e, 0x8d, 0xae,
- 0xaf, 0x04, 0x93, 0x24,
- 0x89, 0x2e, 0xb1, 0xc4,
- 0xfc, 0xbe, 0xfe, 0x0e,
- 0xbe, 0xce, 0xab, 0xb4,
- 0xb9, 0x44, 0xbc, 0x3e,
- 0x9b, 0x04, 0xb7, 0x54,
- 0x91, 0x34, 0xad, 0x24,
- 0xe8, 0x18, 0x75, 0x68,
- 0x81, 0x01, 0x00, 0x2b,
- 0xf1, 0xd5, 0xa7, 0x34,
- 0x83, 0x7d, 0x8e, 0x18,
- 0x1e, 0xf0, 0xd8, 0xd5,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x3e, 0x2e,
- 0x00, 0x50, 0x00, 0x9b,
- 0x19, 0x11, 0xe7, 0x60,
- 0x81, 0x85, 0x81, 0x21,
- 0x78, 0x60, 0x40, 0x23,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x30, 0x40, 0x23,
- 0xa1, 0x1b, 0xc1, 0x2c,
- 0x0c, 0x50, 0xfe, 0x15,
- 0x0e, 0x40, 0x67, 0x60,
- 0x7c, 0x3e, 0xe4, 0xc0,
- 0xbe, 0xb4, 0x81, 0xa1,
- 0x9c, 0x04, 0x85, 0xd5,
- 0x63, 0xfd, 0x00, 0x0a,
- 0x88, 0xa5, 0xc7, 0xff,
- 0x78, 0x30, 0x0e, 0x15,
- 0xa0, 0x24, 0x96, 0x0b,
- 0xe0, 0x42, 0xa4, 0x3a,
- 0x42, 0x98, 0xe4, 0x58,
- 0x09, 0x0e, 0xe8, 0x00,
- 0x9c, 0x14, 0x96, 0x0b,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x42, 0x08,
- 0x96, 0x0b, 0x7e, 0x0e,
- 0xe0, 0x30, 0x0e, 0x15,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x41, 0x68,
- 0xfc, 0x34, 0xfe, 0x14,
- 0xf8, 0x60, 0x4c, 0x13,
- 0x98, 0x0c, 0x89, 0x14,
- 0xf8, 0x30, 0x4c, 0x13,
- 0x84, 0x61, 0x02, 0xa1,
- 0x8e, 0x08, 0x88, 0x71,
- 0xf4, 0x55, 0x81, 0xad,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x18, 0x0e, 0x24, 0x13,
- 0x44, 0x1a, 0xf0, 0x00,
- 0x40, 0x1a, 0xe4, 0x82,
- 0x02, 0x24, 0xe4, 0x02,
- 0x82, 0xcf, 0xe1, 0x7c,
- 0x81, 0x01, 0x00, 0xc3,
- 0xf2, 0x84, 0x42, 0x22,
- 0x64, 0x01, 0x04, 0xc0,
- 0x42, 0x12, 0xc0, 0x80,
- 0x18, 0x14, 0xf2, 0x80,
- 0xe1, 0xc7, 0xe1, 0x7c,
- 0x42, 0x12, 0x98, 0x23,
- 0xe1, 0x27, 0x72, 0x80,
- 0xa2, 0x2f, 0xe0, 0x17,
- 0x08, 0x0e, 0x08, 0x23,
- 0x42, 0x2a, 0xff, 0x00,
- 0x44, 0x2a, 0xe4, 0x8e,
- 0x06, 0x14, 0xe4, 0x0e,
- 0x86, 0x4f, 0xe1, 0x7c,
- 0x42, 0x12, 0x88, 0x23,
- 0x04, 0x20, 0xf2, 0x8c,
- 0xc0, 0x08, 0x64, 0x01,
- 0xf2, 0x80, 0x42, 0x12,
- 0xe1, 0x7c, 0x06, 0x14,
- 0x86, 0x23, 0xe9, 0x37,
- 0x72, 0x80, 0x42, 0x12,
- 0xe8, 0x17, 0xd9, 0x27,
- 0x02, 0x0e, 0x22, 0x2f,
- 0x42, 0x22, 0xf8, 0x00,
- 0x02, 0x12, 0xfa, 0x04,
- 0xc0, 0x7f, 0x6b, 0xfd,
- 0x40, 0x10, 0xa1, 0x1d,
- 0xa0, 0x5d, 0x1c, 0x00,
- 0x40, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0x9c, 0x00,
- 0xfa, 0x3c, 0x04, 0xcc,
- 0x88, 0x6b, 0x00, 0x8b,
- 0x60, 0x2c, 0x10, 0x09,
- 0x01, 0xa1, 0x83, 0x41,
- 0x20, 0x34, 0xc8, 0x27,
- 0x21, 0x4f, 0x86, 0x7b,
- 0x0f, 0xae, 0x82, 0x0b,
- 0x0d, 0xae, 0x84, 0x1b,
- 0x52, 0x98, 0x88, 0x2b,
- 0x58, 0xae, 0xe8, 0x30,
- 0x1a, 0xae, 0x80, 0x9b,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x92, 0x1b, 0x0e, 0x0b,
- 0xe8, 0x30, 0x57, 0xa8,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x06, 0xf0, 0x0f, 0x04,
- 0x22, 0x14, 0xe4, 0x60,
- 0x58, 0x0e, 0x92, 0x2b,
- 0x53, 0x98, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x18, 0x1e, 0x05,
- 0x00, 0x04, 0x4c, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0xf2, 0x3c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x9b, 0x00, 0x7b,
- 0x60, 0x2c, 0x0e, 0x09,
- 0x0e, 0x29, 0x84, 0x6b,
- 0x83, 0x51, 0x60, 0x30,
- 0x60, 0x10, 0x0e, 0x4b,
- 0x21, 0x5f, 0x81, 0xb1,
- 0x1c, 0x34, 0x86, 0xab,
- 0x7c, 0xbe, 0x82, 0x0b,
- 0xe8, 0x88, 0x04, 0x54,
- 0x88, 0x1b, 0x3e, 0xbe,
- 0xe8, 0x30, 0x4f, 0x08,
- 0x00, 0x90, 0x00, 0x8b,
- 0x01, 0x95, 0xe4, 0xc0,
- 0x41, 0xbe, 0x99, 0x11,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x34, 0x40, 0xb5,
- 0xe0, 0x2c, 0x40, 0xb5,
- 0xfe, 0x15, 0xa1, 0x1b,
- 0x65, 0x80, 0x14, 0xa0,
- 0x05, 0xc5, 0xe0, 0x91,
- 0xa1, 0x0b, 0x81, 0x01,
- 0x28, 0x04, 0x88, 0xd5,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x68, 0x30, 0x53, 0x08,
- 0xa1, 0x0b, 0x90, 0x1b,
- 0x7c, 0x04, 0x86, 0xd5,
- 0xe4, 0x10, 0x06, 0xf0,
- 0xa4, 0x0e, 0x90, 0x2b,
- 0x9e, 0x14, 0xa8, 0x04,
- 0xe8, 0x30, 0x4e, 0xe8,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x06, 0xf0, 0x3e, 0x04,
- 0x90, 0x2b, 0xe4, 0x10,
- 0xf8, 0x30, 0x52, 0x05,
- 0xe0, 0x60, 0x14, 0x05,
- 0x4e, 0x18, 0x9e, 0x14,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x04, 0x1e, 0x05,
- 0x00, 0x30, 0x52, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0x88, 0xa1, 0x02, 0xb1,
- 0x9a, 0x18, 0x88, 0x91,
- 0xf4, 0x95, 0x83, 0xbd,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x7b, 0x11, 0x24,
- 0x88, 0x9b, 0x15, 0xa4,
- 0xff, 0x81, 0x13, 0xb4,
- 0x41, 0xf6, 0xa1, 0x2b,
- 0x4c, 0x96, 0x0f, 0xfc,
- 0x8a, 0x05, 0x80, 0x08,
- 0x44, 0x2a, 0x2b, 0x3f,
- 0x46, 0x3a, 0xe6, 0x8a,
- 0x81, 0x61, 0x66, 0x8e,
- 0x42, 0x3a, 0x8f, 0x1e,
- 0x46, 0x3a, 0xe5, 0x02,
- 0x00, 0x24, 0x65, 0x82,
- 0x82, 0x03, 0xe1, 0x84,
- 0x72, 0x98, 0x42, 0x32,
- 0x73, 0x98, 0x81, 0x31,
- 0x0f, 0x24, 0xef, 0xec,
- 0x41, 0xfe, 0x91, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0x5f, 0xfc, 0x41, 0xfe,
- 0x02, 0x94, 0xa1, 0x9b,
- 0x81, 0x81, 0x41, 0x84,
- 0x50, 0x9c, 0x42, 0x12,
- 0x50, 0x1a, 0x84, 0x73,
- 0x80, 0x73, 0x40, 0x26,
- 0x40, 0x8a, 0x8e, 0x83,
- 0xac, 0x8e, 0xf0, 0x0a,
- 0x8c, 0x0b, 0x28, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe6, 0x82, 0x40, 0x1a,
- 0x64, 0x01, 0x00, 0x00,
- 0xdf, 0x07, 0xc0, 0x40,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x5d, 0x93, 0xc0, 0x3f,
- 0xfb, 0x80, 0x00, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x7b, 0x04, 0x9b,
- 0x81, 0x61, 0x00, 0x5b,
- 0x81, 0x11, 0x12, 0x0b,
- 0x81, 0xb1, 0x01, 0xa1,
- 0x03, 0x0a, 0x81, 0xc5,
- 0x82, 0x75, 0xe2, 0x3c,
- 0xf0, 0x08, 0x00, 0x25,
- 0xf8, 0x04, 0x00, 0x45,
- 0x56, 0x42, 0x84, 0xa3,
- 0x82, 0x11, 0x72, 0xac,
- 0xfc, 0x95, 0x8f, 0x1d,
- 0x60, 0x00, 0x17, 0x4a,
- 0xe1, 0x84, 0x00, 0xa4,
- 0x60, 0x00, 0x16, 0x1a,
- 0xe0, 0xfc, 0x02, 0xb4,
- 0x60, 0x00, 0x14, 0x6a,
- 0x7e, 0x0e, 0xa2, 0x0f,
- 0xe5, 0x80, 0x42, 0x0a,
- 0x61, 0x88, 0x42, 0x1a,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x42, 0x2a, 0x7c, 0x0e,
- 0x3e, 0x3e, 0xed, 0x80,
- 0xe4, 0x30, 0x10, 0x30,
- 0x5e, 0x27, 0x89, 0x5e,
- 0x89, 0xa5, 0xe0, 0x5c,
- 0x60, 0x1c, 0x4c, 0xca,
- 0x44, 0x0a, 0x81, 0x01,
- 0x40, 0x0a, 0xe1, 0x80,
- 0x8e, 0xe5, 0xe9, 0x9c,
- 0x81, 0x01, 0x26, 0x24,
- 0x04, 0xca, 0xa4, 0x14,
- 0x04, 0x1a, 0xe0, 0x00,
- 0x02, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x1e, 0x27, 0xe1, 0x88,
- 0x42, 0x0a, 0xe0, 0x5c,
- 0x8a, 0xa5, 0xed, 0x80,
- 0x64, 0x7c, 0x0b, 0x0a,
- 0x00, 0x50, 0x82, 0x3b,
- 0x46, 0x20, 0x6c, 0x80,
- 0x44, 0x52, 0x9c, 0x00,
- 0x02, 0x06, 0x7b, 0x80,
- 0x00, 0x22, 0xc0, 0x00,
- 0x20, 0x23, 0xec, 0x7c,
- 0xef, 0x80, 0x08, 0x14,
- 0x6c, 0x00, 0x0a, 0x04,
- 0x7e, 0x04, 0xa1, 0x3f,
- 0x48, 0x52, 0xa1, 0x1f,
- 0x04, 0x22, 0x78, 0x90,
- 0xa8, 0x3f, 0xec, 0x04,
- 0x82, 0x03, 0x7c, 0x14,
- 0x94, 0x2b, 0x25, 0x3f,
- 0x72, 0x84, 0x42, 0x32,
- 0x69, 0xf8, 0x96, 0x3b,
- 0x09, 0x54, 0xef, 0xec,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x82, 0x61, 0x61, 0x0c,
- 0x0c, 0x0a, 0x90, 0x91,
- 0xec, 0xb5, 0xe2, 0x40,
- 0xb0, 0xf1, 0x3e, 0x04,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x1c, 0x40, 0x51,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x02, 0x10, 0x0a, 0x28,
- 0x08, 0x14, 0xec, 0x04,
- 0xe0, 0x31, 0x61, 0xfc,
- 0x83, 0x41, 0x08, 0x13,
- 0x83, 0x17, 0x03, 0xa5,
- 0x78, 0x30, 0x06, 0x5b,
- 0xec, 0x04, 0x04, 0x20,
- 0x82, 0x60, 0x80, 0xc0,
- 0x46, 0xc3, 0x8a, 0xc3,
- 0xcd, 0x5a, 0xf8, 0x60,
- 0x0a, 0xc4, 0x0a, 0x63,
- 0x18, 0x64, 0xfb, 0x00,
- 0x4a, 0x42, 0x7b, 0x00,
- 0x46, 0x63, 0xf1, 0x94,
- 0x98, 0x53, 0x60, 0x2c,
- 0xfb, 0x14, 0x4a, 0x12,
- 0xe0, 0x5c, 0x46, 0x53,
- 0xf8, 0xf5, 0xa1, 0x2b,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x88, 0x0c, 0x34,
- 0x01, 0x45, 0x8a, 0x7b,
- 0xf0, 0x98, 0x58, 0x52,
- 0xd9, 0x7d, 0xdd, 0x2e,
- 0x06, 0x13, 0xfe, 0xd5,
- 0x44, 0x0a, 0x86, 0x03,
- 0x82, 0x11, 0x61, 0x8e,
- 0x61, 0x8e, 0x46, 0x1a,
- 0xf0, 0x98, 0x40, 0x42,
- 0x0c, 0x34, 0xc4, 0x27,
- 0x42, 0x42, 0x60, 0x88,
- 0x46, 0x52, 0xf0, 0x88,
- 0x44, 0x42, 0x70, 0x88,
- 0x81, 0x95, 0xf0, 0x98,
- 0xc1, 0x1d, 0xc5, 0x64,
- 0x42, 0x40, 0xcd, 0x6e,
- 0xd9, 0x3d, 0x1c, 0x00,
- 0x9c, 0x00, 0x46, 0x50,
- 0xfc, 0xf5, 0x85, 0x1b,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x00, 0x34, 0x00, 0x8b,
- 0x06, 0x03, 0xe1, 0xfc,
- 0x1f, 0x14, 0x82, 0xbb,
- 0x0d, 0x3e, 0x83, 0x07,
- 0x1d, 0x34, 0x8a, 0x6b,
- 0x23, 0x74, 0x84, 0x5b,
- 0x21, 0xa4, 0xa0, 0x2b,
- 0x3e, 0x1e, 0x82, 0x9b,
- 0x0b, 0x4e, 0x90, 0x0b,
- 0x7e, 0x2e, 0x81, 0x41,
- 0x09, 0x3e, 0xaa, 0x23,
- 0x3c, 0x3e, 0x96, 0x1b,
- 0x7c, 0x5e, 0x8a, 0x3b,
- 0x6c, 0xd8, 0x8c, 0x5b,
- 0xa1, 0x0b, 0xef, 0xf8,
- 0x09, 0x04, 0x86, 0x75,
- 0x3e, 0xae, 0x81, 0x41,
- 0x7e, 0x24, 0x96, 0x1b,
- 0x3c, 0x0e, 0x8c, 0x5b,
- 0x8d, 0x34, 0x90, 0x0b,
- 0xef, 0xf8, 0x6c, 0x08,
- 0x82, 0xd5, 0xa1, 0x0b,
- 0x81, 0x41, 0x0d, 0x24,
- 0x96, 0x1b, 0x7e, 0x04,
- 0x8c, 0x5b, 0x3e, 0x7e,
- 0x09, 0x04, 0xfc, 0x34,
- 0x3c, 0x0e, 0x80, 0x23,
- 0x6b, 0x18, 0x90, 0x0b,
- 0x16, 0x1b, 0xef, 0xf8,
- 0x0b, 0x64, 0x96, 0x8d,
- 0x09, 0x0e, 0x8c, 0xbb,
- 0x0a, 0x55, 0x94, 0x4b,
- 0x25, 0x94, 0x92, 0x0b,
- 0xfa, 0x20, 0x42, 0x12,
- 0xb0, 0x13, 0x82, 0x11,
- 0xa7, 0x14, 0x83, 0x13,
- 0x83, 0xb3, 0x8d, 0x1e,
- 0xe8, 0x00, 0x31, 0xec,
- 0x70, 0xa0, 0x46, 0xb2,
- 0x46, 0x3a, 0x80, 0x1b,
- 0x82, 0x81, 0x61, 0xae,
- 0x00, 0xa5, 0xc4, 0x37,
- 0x88, 0x0b, 0x7c, 0x0c,
- 0x7c, 0x0c, 0x08, 0x55,
- 0xf0, 0x8c, 0x44, 0x92,
- 0xfc, 0x0c, 0x0e, 0xc5,
- 0x71, 0x98, 0x48, 0xa2,
- 0x0a, 0x43, 0x8c, 0xa3,
- 0x38, 0x43, 0xb4, 0x53,
- 0x08, 0x4e, 0x98, 0x53,
- 0x0d, 0x14, 0x80, 0x4b,
- 0x82, 0x33, 0x82, 0x0b,
- 0x09, 0x04, 0x8c, 0x5e,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x80, 0xbb, 0x29, 0x04,
- 0x82, 0x8b, 0x2f, 0x74,
- 0x43, 0xfe, 0x13, 0x4e,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x8a, 0x6b, 0x0f, 0x2e,
- 0xb1, 0x44, 0xb3, 0x24,
- 0x81, 0x01, 0x7e, 0x0e,
- 0x9c, 0x0e, 0x91, 0x3e,
- 0x97, 0x0e, 0x99, 0x0e,
- 0x41, 0xf6, 0x15, 0x0e,
- 0x8b, 0x4e, 0xe0, 0x0c,
- 0x8d, 0x2e, 0x90, 0x0c,
- 0xad, 0x94, 0x88, 0x1e,
- 0x91, 0xa4, 0xab, 0x54,
- 0x40, 0x62, 0x89, 0x7e,
- 0x42, 0x0a, 0xf0, 0xac,
- 0xc4, 0x17, 0xe1, 0x9a,
- 0xfc, 0x04, 0x0a, 0x25,
- 0x84, 0xa5, 0xa1, 0x2b,
- 0x84, 0xe5, 0xa1, 0x2d,
- 0xfc, 0x04, 0x12, 0x15,
- 0x8e, 0x95, 0xa1, 0x1d,
- 0x40, 0x0a, 0x82, 0x01,
- 0xc4, 0x07, 0xe1, 0x9a,
- 0xfc, 0x00, 0x0a, 0x15,
- 0x8c, 0x95, 0xa1, 0x1d,
- 0x7c, 0x00, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x81, 0xa5, 0x8a, 0xf5,
- 0xfc, 0x04, 0x12, 0x05,
- 0x8a, 0x45, 0xa1, 0x0b,
- 0x7c, 0x04, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x03, 0x01, 0x88, 0xa5,
- 0xe4, 0xb0, 0x02, 0xf0,
- 0x8a, 0x7b, 0x1c, 0x0e,
- 0x0a, 0xf0, 0x0b, 0x04,
- 0x14, 0x2b, 0xe4, 0xc0,
- 0x00, 0xbc, 0x8c, 0x3b,
- 0xe4, 0xa0, 0x00, 0xf0,
- 0x96, 0x0b, 0x3e, 0x0e,
- 0x8f, 0x14, 0xbc, 0x1e,
- 0x56, 0x58, 0xfe, 0x44,
- 0x0d, 0x04, 0xef, 0xf8,
- 0x99, 0x24, 0x96, 0x1b,
- 0x3e, 0x0e, 0x97, 0x34,
- 0x95, 0x44, 0x94, 0x0b,
- 0x93, 0x54, 0xbc, 0x6e,
- 0xef, 0xf8, 0x68, 0x08,
- 0x8e, 0x5b, 0x09, 0x74,
- 0xe2, 0xa4, 0x00, 0x0a,
- 0x81, 0x01, 0x80, 0x75,
- 0x82, 0xb1, 0x9c, 0x0e,
- 0x80, 0x85, 0x91, 0xbd,
- 0xa1, 0x0b, 0x9c, 0x04,
- 0x01, 0x01, 0xea, 0xe5,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x60, 0x14, 0x0c, 0x19,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x94, 0x75, 0xf4, 0x1d,
- 0xe0, 0x18, 0x0c, 0x29,
- 0x92, 0xf5, 0xf0, 0x2d,
- 0xe6, 0x86, 0x50, 0x2a,
- 0xe5, 0x00, 0x11, 0x0a,
- 0x19, 0x21, 0x92, 0x55,
- 0x76, 0xd8, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xec,
- 0x64, 0x30, 0x00, 0x70,
- 0xe0, 0x04, 0x02, 0x06,
- 0x81, 0x91, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0x60, 0xfe, 0x95,
- 0x81, 0xb1, 0x64, 0x90,
- 0x81, 0x11, 0x01, 0x95,
- 0xe5, 0x00, 0x02, 0x8a,
- 0x41, 0x24, 0x80, 0xe5,
- 0x56, 0x22, 0x82, 0x11,
- 0xd1, 0x1d, 0xfa, 0xac,
- 0x00, 0xb4, 0xfe, 0x15,
- 0xd8, 0xb7, 0x61, 0xd0,
- 0x98, 0x71, 0x0f, 0x0e,
- 0x81, 0xa1, 0x48, 0x61,
- 0x81, 0x01, 0x03, 0xd5,
- 0x40, 0x96, 0x18, 0x24,
- 0xa1, 0x2b, 0xe0, 0x08,
- 0x0f, 0x14, 0x84, 0x85,
- 0xe1, 0x84, 0x00, 0x24,
- 0x81, 0x31, 0x16, 0x03,
- 0x6f, 0xec, 0x50, 0x08,
- 0xf2, 0xa4, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x81, 0x01, 0x1c, 0x0c,
- 0x84, 0x71, 0x02, 0xa1,
- 0xd1, 0xad, 0x88, 0x61,
- 0x15, 0x0a, 0x80, 0xc5,
- 0x80, 0x75, 0xe4, 0xfc,
- 0xf6, 0xe5, 0xa1, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x86, 0x6b, 0x04, 0x88,
- 0x60, 0x10, 0x02, 0x19,
- 0x00, 0xa9, 0x81, 0x91,
- 0x06, 0x0e, 0x60, 0x10,
- 0xc0, 0x00, 0x72, 0xc0,
- 0x88, 0xbb, 0x1d, 0x9e,
- 0x42, 0x96, 0x7e, 0x1e,
- 0xc0, 0x01, 0x67, 0xb9,
- 0x8b, 0x1e, 0x80, 0x04,
- 0x11, 0x0e, 0x8d, 0x1e,
- 0x63, 0x21, 0x41, 0x56,
- 0x15, 0x0e, 0xc0, 0x01,
- 0x6e, 0xa1, 0x00, 0x06,
- 0x1b, 0x0e, 0xc0, 0x01,
- 0x8f, 0x1e, 0x84, 0x0b,
- 0x19, 0x1e, 0x93, 0x1e,
- 0x97, 0x3e, 0x8c, 0x1b,
- 0xe8, 0x00, 0x48, 0xc8,
- 0x6c, 0x04, 0x00, 0xa0,
- 0xe0, 0x08, 0x42, 0xc6,
- 0x74, 0x1c, 0x01, 0x0a,
- 0x09, 0x0e, 0x81, 0x01,
- 0x80, 0x88, 0x00, 0xa4,
- 0x04, 0x50, 0x02, 0xf0,
- 0xe0, 0x10, 0x10, 0x1a,
- 0x1c, 0x00, 0x02, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x00, 0x10, 0x5e, 0x05,
- 0x09, 0x04, 0xb1, 0x8b,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x08, 0x42, 0xc6,
- 0x42, 0xc6, 0xa1, 0x0b,
- 0xe5, 0xad, 0x00, 0x08,
- 0x8a, 0x95, 0xfc, 0x1e,
- 0xa1, 0x0b, 0xfc, 0x04,
- 0x7e, 0x14, 0x8a, 0x35,
- 0x0e, 0x0b, 0x90, 0x7b,
- 0x49, 0x98, 0x96, 0x2b,
- 0x18, 0xb1, 0xe8, 0x00,
- 0x04, 0x06, 0x81, 0x11,
- 0x96, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x72, 0xc8,
- 0xe6, 0x9e, 0x4e, 0x7a,
- 0x00, 0x06, 0x83, 0x75,
- 0xe7, 0xad, 0x61, 0x00,
- 0x84, 0x15, 0x9d, 0x0e,
- 0x00, 0xf0, 0x18, 0x34,
- 0x1a, 0x44, 0xe4, 0xe0,
- 0xe1, 0xec, 0x0b, 0x76,
- 0x90, 0x1b, 0x3e, 0x0e,
- 0xfe, 0x24, 0x89, 0x04,
- 0x92, 0x0b, 0x3c, 0x0e,
- 0xe8, 0x00, 0x40, 0xc8,
- 0x6d, 0x0c, 0x9d, 0x04,
- 0x93, 0x7b, 0x82, 0x91,
- 0x7c, 0x04, 0xfa, 0x35,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x61, 0x06, 0x4e, 0x0a,
- 0xe0, 0x88, 0x12, 0x24,
- 0x60, 0x06, 0x50, 0x0a,
- 0x0f, 0x44, 0x88, 0xcb,
- 0x4e, 0x9a, 0x86, 0x6b,
- 0x81, 0x11, 0x66, 0x9e,
- 0xe6, 0xa2, 0x50, 0x9a,
- 0x8e, 0x63, 0x0d, 0x34,
- 0x40, 0x2a, 0x10, 0xc3,
- 0x10, 0x1e, 0xe6, 0x8a,
- 0xf0, 0xa4, 0x4e, 0x62,
- 0x65, 0x0e, 0x44, 0x3a,
- 0xf0, 0xa4, 0x50, 0xc2,
- 0xe5, 0x8e, 0x46, 0x3a,
- 0x8f, 0xad, 0x81, 0xc5,
- 0x46, 0xaa, 0x56, 0xaa,
- 0xc4, 0x10, 0x14, 0xa0,
- 0xd0, 0xa4, 0x56, 0xb2,
- 0x42, 0x12, 0x7e, 0x35,
- 0x88, 0xc1, 0xd0, 0xac,
- 0x52, 0xca, 0x91, 0xcd,
- 0x54, 0x60, 0x46, 0xb2,
- 0xfc, 0x15, 0xdc, 0x00,
- 0xe1, 0x84, 0x18, 0x04,
- 0x42, 0x5a, 0x02, 0xc3,
- 0x40, 0xca, 0xe6, 0x96,
- 0x0c, 0x0c, 0xe0, 0x02,
- 0x81, 0x35, 0xf0, 0x7c,
- 0xc1, 0xc3, 0x8b, 0x45,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x48, 0x0a, 0x08, 0x6b,
- 0x40, 0x0a, 0xe5, 0x06,
- 0x0a, 0x24, 0x65, 0x86,
- 0x02, 0x44, 0xe1, 0x84,
- 0xe8, 0x47, 0x61, 0xb0,
- 0x18, 0x34, 0x68, 0x07,
- 0x20, 0x1f, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x34,
- 0x40, 0x42, 0xa0, 0x5f,
- 0x41, 0xb8, 0xf0, 0x94,
- 0x42, 0x12, 0x6f, 0xec,
- 0x04, 0x06, 0xf2, 0xb0,
- 0x40, 0x40, 0x60, 0x01,
- 0x84, 0x03, 0xff, 0x31,
- 0x81, 0x31, 0x07, 0x0b,
- 0x72, 0x8c, 0x42, 0x12,
- 0x9f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x40, 0x0a, 0xdf, 0xfc,
- 0x02, 0x04, 0xf0, 0x0a,
- 0x84, 0x13, 0xe1, 0x84,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x14, 0x44, 0x01,
- 0x08, 0x3c, 0x81, 0x31,
- 0x0a, 0x3c, 0xaf, 0x41,
- 0xfc, 0x00, 0x06, 0x14,
- 0x60, 0x18, 0x44, 0x01,
- 0xe4, 0x1c, 0x00, 0x30,
- 0x60, 0x1c, 0x44, 0x01,
- 0xec, 0x04, 0x00, 0x30,
- 0x60, 0x20, 0x44, 0x01,
- 0x44, 0x41, 0xc2, 0x17,
- 0x83, 0x01, 0x60, 0x10,
- 0xe0, 0x24, 0x44, 0x11,
- 0xe0, 0x28, 0x44, 0x11,
- 0xe0, 0x2c, 0x44, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0x2e, 0x00, 0x38,
- 0xa1, 0x3b, 0xff, 0xfc,
- 0x82, 0x08, 0x84, 0x45,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x71, 0x80, 0x48, 0x22,
- 0x26, 0x23, 0x90, 0x01,
- 0x40, 0x00, 0x90, 0x31,
- 0x40, 0x01, 0x73, 0xc1,
- 0x73, 0xc1, 0x46, 0x30,
- 0x06, 0x23, 0xc0, 0x01,
- 0x81, 0x35, 0x88, 0x03,
- 0xff, 0xfc, 0x00, 0x2e,
- 0x86, 0x0e, 0x84, 0x2e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x86, 0x7b, 0x09, 0x0e,
- 0x61, 0x84, 0x00, 0x14,
- 0xe0, 0xac, 0x06, 0x74,
- 0x88, 0x6b, 0x20, 0x23,
- 0x84, 0x13, 0x86, 0x23,
- 0xe1, 0x0e, 0x40, 0x1a,
- 0xe1, 0x0e, 0x42, 0x2a,
- 0xe1, 0xac, 0x04, 0x04,
- 0x61, 0x1e, 0x56, 0x2a,
- 0xe1, 0xac, 0x04, 0x14,
- 0xe1, 0x1e, 0x50, 0x2a,
- 0xe4, 0x04, 0x04, 0xb0,
- 0x61, 0x1e, 0x54, 0x2a,
- 0xe0, 0x80, 0x04, 0x06,
- 0x06, 0x84, 0x22, 0x23,
- 0x06, 0x23, 0xe0, 0xac,
- 0xf1, 0x84, 0x42, 0x02,
- 0x04, 0xb4, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xe0, 0xac,
- 0x3e, 0x0e, 0xa4, 0x03,
- 0x85, 0xb5, 0x90, 0x9b,
- 0x82, 0x35, 0x91, 0x9b,
- 0xe0, 0x2c, 0x52, 0x1a,
- 0xa0, 0x10, 0x1e, 0x05,
- 0xa0, 0x0c, 0x1e, 0x15,
- 0xa0, 0x00, 0x01, 0x68,
- 0xe0, 0x20, 0x52, 0x1a,
- 0xa0, 0x00, 0x00, 0x88,
- 0x52, 0x1a, 0x09, 0x04,
- 0x00, 0xf8, 0xe0, 0x2c,
- 0xc0, 0x00, 0x20, 0x01,
- 0x80, 0x10, 0x1e, 0x05,
- 0x80, 0x08, 0x1e, 0x15,
- 0x17, 0x9b, 0x80, 0xc5,
- 0x80, 0xb5, 0x81, 0x01,
- 0xbe, 0x14, 0x89, 0x04,
- 0xe8, 0x00, 0x4b, 0x08,
- 0x60, 0x88, 0x02, 0x94,
- 0x0c, 0x25, 0x82, 0x91,
- 0x8c, 0x13, 0x7c, 0x04,
- 0xe1, 0x1e, 0x52, 0x9a,
- 0x84, 0x2e, 0x80, 0x23,
- 0xf4, 0xb5, 0x95, 0x9b,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x84, 0x7b, 0x02, 0x8b,
- 0x86, 0x6b, 0x00, 0x9b,
- 0x00, 0x06, 0x1c, 0x14,
- 0xe0, 0x24, 0xe0, 0x80,
- 0x43, 0x38, 0xa4, 0x34,
- 0xa0, 0x44, 0xe8, 0x00,
- 0x9e, 0x14, 0x98, 0x0e,
- 0x88, 0x0b, 0x60, 0x24,
- 0x42, 0xb8, 0xa4, 0x34,
- 0x9a, 0x0e, 0xe8, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x60, 0x24, 0x0e, 0x19,
- 0x10, 0x49, 0x83, 0x21,
- 0x86, 0x6b, 0x60, 0x24,
- 0x60, 0x28, 0x0e, 0x59,
- 0x1c, 0x04, 0x80, 0x9b,
- 0x22, 0x34, 0xa3, 0x2f,
- 0xe0, 0x90, 0x02, 0x44,
- 0x68, 0x2c, 0x48, 0x88,
- 0xe8, 0x94, 0x14, 0x24,
- 0x9c, 0x24, 0xa4, 0x14,
- 0x22, 0x34, 0x98, 0x0e,
- 0x04, 0x0b, 0xcf, 0x17,
- 0x47, 0xd8, 0x94, 0x2b,
- 0x1a, 0x0e, 0xe8, 0x2c,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x40, 0x3a, 0x00, 0x6b,
- 0x02, 0x7b, 0xe5, 0x0a,
- 0xe5, 0x8a, 0x42, 0x3a,
- 0x00, 0x00, 0x01, 0x81,
- 0xc0, 0x01, 0x67, 0xd1,
- 0x72, 0xa0, 0x42, 0x12,
- 0xe0, 0x3c, 0x44, 0x86,
- 0x6f, 0xe8, 0x71, 0x48,
- 0x7f, 0x21, 0x81, 0x31,
- 0x85, 0x0b, 0x81, 0x31,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x42, 0x7a, 0xdf, 0xfc,
- 0x44, 0x7a, 0xe5, 0x02,
- 0x00, 0x64, 0x65, 0x82,
- 0x82, 0x03, 0xe0, 0x9c,
- 0x72, 0xa0, 0x42, 0x22,
- 0xe0, 0xa0, 0x04, 0x64,
- 0xef, 0xe8, 0x6f, 0xe8,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0xc5, 0x0d, 0xc0, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0xa1, 0x1b, 0x00, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x0c, 0xc0, 0x3f,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xa1, 0x1b, 0x00, 0x5b,
- 0x60, 0x08, 0x40, 0x96,
- 0x64, 0x00, 0x18, 0x50,
- 0x00, 0x06, 0xc0, 0x80,
- 0x07, 0x0a, 0x40, 0x00,
- 0x40, 0xc6, 0xe6, 0x40,
- 0x19, 0x0a, 0x40, 0x00,
- 0xc0, 0xff, 0x67, 0xfc,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x5c, 0x08, 0xa1, 0x0b,
- 0x18, 0x14, 0xda, 0x00,
- 0xa1, 0x5d, 0x61, 0xfc,
- 0xe0, 0x57, 0x02, 0xc3,
- 0xd6, 0x37, 0x03, 0xc7,
- 0xd1, 0x80, 0x18, 0xc4,
- 0x42, 0xca, 0x8a, 0xc3,
- 0x84, 0x13, 0xe0, 0x86,
- 0xe0, 0x00, 0x02, 0x12,
- 0xe1, 0x0e, 0x42, 0x1a,
- 0xdd, 0x93, 0x90, 0x1e,
- 0x65, 0x06, 0x44, 0x0a,
- 0x42, 0x0a, 0x81, 0x31,
- 0x00, 0x20, 0xe5, 0x86,
- 0xc0, 0x04, 0x64, 0x01,
- 0xf2, 0x8c, 0x42, 0x12,
- 0x5c, 0x08, 0xee, 0x1d,
- 0x41, 0xfe, 0x5a, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0xd7, 0x07, 0x6a, 0x17,
- 0xa2, 0x0f, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x7e, 0x3e,
- 0x88, 0xbb, 0x09, 0x2e,
- 0xe0, 0x34, 0x04, 0x09,
- 0x8d, 0x6e, 0xfc, 0x1e,
- 0xe8, 0x0d, 0x3e, 0x0e,
- 0x60, 0x24, 0x02, 0xa9,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x15, 0x0a, 0x98, 0x15,
- 0x96, 0xb5, 0xe6, 0x40,
- 0x89, 0x04, 0xfc, 0x14,
- 0x75, 0x18, 0xfe, 0x34,
- 0x04, 0x10, 0x6f, 0xfc,
- 0xa1, 0x0b, 0xe4, 0x30,
- 0x7c, 0x04, 0x94, 0x95,
- 0x89, 0x14, 0x96, 0x3b,
- 0x72, 0xd8, 0xfe, 0x24,
- 0x00, 0xb0, 0xef, 0xfc,
- 0x81, 0x11, 0x64, 0x20,
- 0x55, 0x1d, 0x81, 0x75,
- 0x16, 0x25, 0x81, 0x21,
- 0x82, 0x11, 0x40, 0x04,
- 0x02, 0x0a, 0xc1, 0x2e,
- 0xfe, 0x15, 0xe2, 0x40,
- 0x89, 0x11, 0x7e, 0x04,
- 0xb0, 0x01, 0x01, 0x75,
- 0x78, 0x10, 0x40, 0x65,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc1, 0x6e,
- 0x09, 0x74, 0xfe, 0x55,
- 0x7e, 0x84, 0x90, 0xb1,
- 0xbc, 0xbe, 0x81, 0x01,
- 0xc0, 0x71, 0x7c, 0x94,
- 0xb0, 0x81, 0x05, 0xb5,
- 0x8a, 0x75, 0xa1, 0x0b,
- 0x90, 0x6b, 0x0b, 0x6e,
- 0x89, 0x84, 0xfe, 0x14,
- 0xf8, 0x10, 0x0e, 0x25,
- 0xa0, 0x04, 0x86, 0x14,
- 0x73, 0xd8, 0xa4, 0x34,
- 0x22, 0x24, 0xef, 0xfc,
- 0x1c, 0x04, 0x80, 0xbb,
- 0xe4, 0x60, 0x08, 0xf0,
- 0x60, 0x10, 0x12, 0x15,
- 0x76, 0x98, 0x94, 0x3b,
- 0x8c, 0x8b, 0x6f, 0xfc,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x78, 0x10, 0x50, 0xb5,
- 0x8d, 0x24, 0x94, 0x3b,
- 0x89, 0x04, 0xa0, 0x2e,
- 0x00, 0x14, 0xbc, 0x44,
- 0x68, 0x78, 0x96, 0x0b,
- 0x0b, 0x64, 0xef, 0xfc,
- 0x88, 0x81, 0x88, 0x71,
- 0xbe, 0x14, 0x82, 0x61,
- 0xf4, 0xb5, 0xc3, 0x6d,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x80, 0x6b, 0x06, 0x4a,
- 0x04, 0xc9, 0x84, 0x0a,
- 0x4c, 0x45, 0xe0, 0xc0,
- 0x02, 0x49, 0xed, 0xac,
- 0x4c, 0x05, 0xe0, 0x20,
- 0xc4, 0x0a, 0xed, 0xa8,
- 0xee, 0x24, 0x4c, 0x45,
- 0xe0, 0xcc, 0x04, 0x49,
- 0xed, 0xb0, 0x4c, 0x05,
- 0xe0, 0xc8, 0x04, 0x09,
- 0xe0, 0xc4, 0x04, 0x79,
- 0xed, 0xc0, 0x4c, 0x45,
- 0xe0, 0xd0, 0x04, 0x41,
- 0xed, 0xbc, 0x4c, 0x05,
- 0xe0, 0x2c, 0x04, 0x05,
- 0xed, 0xb4, 0x4c, 0xc5,
- 0xed, 0xb8, 0x4c, 0x75,
- 0xe0, 0xd4, 0x04, 0xc1,
- 0xe0, 0xd8, 0x04, 0x71,
- 0xed, 0xc4, 0x4c, 0x45,
- 0xe0, 0xe0, 0x04, 0x49,
- 0xee, 0x28, 0x4c, 0x05,
- 0xe0, 0xdc, 0x04, 0x01,
- 0xed, 0xc8, 0x4c, 0xc5,
- 0xed, 0xcc, 0x4c, 0x75,
- 0xed, 0xd4, 0x4c, 0x45,
- 0xe0, 0xf0, 0x04, 0x49,
- 0xe0, 0xe4, 0x04, 0xc9,
- 0xe0, 0xec, 0x04, 0x79,
- 0xed, 0xd0, 0x4c, 0x05,
- 0xe0, 0xe8, 0x04, 0x09,
- 0xed, 0xe4, 0x4c, 0x45,
- 0xed, 0xd8, 0x4c, 0xc5,
- 0xed, 0xe0, 0x4c, 0x75,
- 0x8a, 0xc4, 0x88, 0x44,
- 0xca, 0x84, 0xc8, 0x74,
- 0xe0, 0xf8, 0x04, 0x91,
- 0xe0, 0xfc, 0x04, 0xa1,
- 0x6d, 0xdc, 0x4c, 0x05,
- 0x4c, 0xc5, 0x81, 0x01,
- 0x4c, 0x75, 0xed, 0xf0,
- 0x4c, 0x85, 0xed, 0xf4,
- 0x4c, 0x95, 0xed, 0xf8,
- 0x4c, 0xa5, 0xee, 0x48,
- 0x4c, 0x05, 0xee, 0x4c,
- 0x4c, 0x45, 0xed, 0xe8,
- 0x06, 0x45, 0xed, 0xec,
- 0x04, 0xc5, 0xe0, 0x34,
- 0x04, 0x75, 0xe0, 0x10,
- 0x4c, 0x45, 0xe0, 0x14,
- 0x06, 0x45, 0xee, 0x50,
- 0x04, 0x85, 0xe0, 0x38,
- 0x04, 0x95, 0xe0, 0x18,
- 0x04, 0xa5, 0xe0, 0x1c,
- 0x4c, 0xc5, 0xe0, 0x20,
- 0x4c, 0x75, 0xee, 0x70,
- 0x4c, 0x95, 0xee, 0x74,
- 0x4c, 0xa5, 0xee, 0x7c,
- 0x83, 0xa1, 0x6e, 0x80,
- 0xee, 0x54, 0x4c, 0x45,
- 0xee, 0x78, 0x4c, 0x85,
- 0x04, 0xc5, 0x8c, 0x44,
- 0xa1, 0x94, 0xe0, 0x24,
- 0xee, 0x84, 0x4c, 0x45,
- 0xa4, 0x88, 0x8e, 0x44,
- 0x4c, 0x45, 0x9b, 0x74,
- 0xcc, 0x44, 0xee, 0x88,
- 0x4c, 0x45, 0xa7, 0xb4,
- 0xce, 0x44, 0xee, 0x8c,
- 0xee, 0x90, 0x4c, 0x45,
- 0xe0, 0x10, 0x06, 0x45,
- 0xee, 0x94, 0x4c, 0x45,
- 0xe0, 0x14, 0x06, 0x45,
- 0xee, 0x98, 0x4c, 0x45,
- 0xe0, 0x18, 0x06, 0x45,
- 0xee, 0x9c, 0x4c, 0x45,
- 0xe0, 0x1c, 0x06, 0x45,
- 0xee, 0xa0, 0x4c, 0x45,
- 0xe0, 0x20, 0x06, 0x45,
- 0xee, 0xa4, 0x4c, 0x45,
- 0xe0, 0x24, 0x06, 0x45,
- 0xee, 0xa8, 0x4c, 0x45,
- 0xe0, 0x28, 0x06, 0x45,
- 0xee, 0xac, 0x4c, 0x45,
- 0xe0, 0x2c, 0x06, 0x45,
- 0xee, 0xb0, 0x4c, 0x45,
- 0xe0, 0x30, 0x06, 0x35,
- 0xee, 0xb8, 0x4c, 0xc5,
- 0x4c, 0x35, 0x99, 0xc4,
- 0x97, 0x34, 0xee, 0xb4,
- 0x6d, 0x88, 0x4c, 0xc5,
- 0x7f, 0xfc, 0x59, 0xe6,
- 0x9f, 0x44, 0xc0, 0x20,
- 0xed, 0x84, 0x4c, 0x35,
- 0x4c, 0x85, 0xc8, 0x34,
- 0x9d, 0x84, 0xed, 0x80,
- 0x6d, 0x8c, 0x4c, 0x45,
- 0x67, 0xfc, 0x04, 0x30,
- 0x58, 0x2d, 0xc0, 0xff,
- 0xe0, 0x08, 0x18, 0x06,
- 0x01, 0x7c, 0x18, 0x34,
- 0x23, 0x44, 0xff, 0x21,
- 0x81, 0xc0, 0x18, 0xc4,
- 0x6d, 0x94, 0x4c, 0x75,
- 0x90, 0xb0, 0x46, 0x32,
- 0x18, 0x34, 0x25, 0x34,
- 0x4c, 0x85, 0x81, 0x40,
- 0x0e, 0x60, 0x6d, 0x90,
- 0xc0, 0x0d, 0x66, 0x00,
- 0xee, 0x34, 0x4c, 0x55,
- 0xee, 0x04, 0x4c, 0x25,
- 0x95, 0x34, 0xfc, 0x3e,
- 0x6d, 0xa4, 0x4c, 0xc5,
- 0xff, 0xf4, 0x59, 0xce,
- 0x6d, 0x9c, 0x4c, 0x45,
- 0xff, 0xf8, 0x08, 0x8e,
- 0x0c, 0x85, 0x99, 0x4b,
- 0x50, 0x82, 0xcd, 0x9c,
- 0x08, 0x40, 0x51, 0x90,
- 0x50, 0xa1, 0xcc, 0x04,
- 0xfc, 0xf5, 0xc0, 0x00,
- 0x6e, 0x3c, 0x4c, 0x05,
- 0x67, 0x00, 0x00, 0x60,
- 0x4c, 0x05, 0xc0, 0x06,
- 0x00, 0x60, 0x6d, 0x98,
- 0xc0, 0x02, 0x65, 0x00,
- 0x6e, 0x20, 0x4c, 0x35,
- 0xe0, 0x80, 0x06, 0x8a,
- 0x66, 0x01, 0x06, 0x60,
- 0x50, 0xc6, 0x40, 0x04,
- 0x4c, 0x65, 0xe0, 0x00,
- 0x4c, 0x05, 0xed, 0xa0,
- 0x4c, 0x35, 0xee, 0x2c,
- 0x4c, 0x25, 0xee, 0x30,
- 0x88, 0x75, 0xee, 0x14,
- 0xed, 0xf8, 0x0c, 0x35,
- 0xee, 0x28, 0x0c, 0x45,
- 0x86, 0xb5, 0x87, 0x4d,
- 0xed, 0xb4, 0x0c, 0x25,
- 0xe4, 0x08, 0x00, 0x20,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x61, 0x08, 0x18, 0x04,
- 0x58, 0x02, 0xa1, 0x01,
- 0xa9, 0xcd, 0xf1, 0xb0,
- 0xbe, 0xbe, 0x82, 0xd5,
- 0xed, 0xc4, 0x0c, 0xc5,
- 0xed, 0xc8, 0x0c, 0xb5,
- 0x80, 0xf5, 0x96, 0xcd,
- 0xee, 0x7c, 0x0c, 0xc5,
- 0xee, 0x80, 0x0c, 0xb5,
- 0x80, 0xc5, 0x96, 0xcd,
- 0x98, 0xf1, 0x10, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0xc5, 0xdd, 0x93,
- 0xaa, 0xcd, 0xed, 0xcc,
- 0x20, 0x41, 0xfe, 0x15,
- 0xa6, 0x43, 0x98, 0x33,
- 0xfc, 0x75, 0xa9, 0x4d,
- 0xed, 0xd0, 0x0c, 0x35,
- 0xfa, 0xf5, 0xac, 0x3d,
- 0xe4, 0x04, 0x06, 0x20,
- 0xe1, 0xfc, 0x08, 0x34,
- 0x46, 0x02, 0x06, 0x43,
- 0x83, 0x47, 0xf1, 0xb0,
- 0xf8, 0xb5, 0x89, 0x3d,
- 0xed, 0xb8, 0x0c, 0x45,
- 0xee, 0x24, 0x0c, 0xc5,
- 0x98, 0x43, 0x86, 0x43,
- 0xf6, 0xb5, 0x85, 0x4d,
- 0x6d, 0xd8, 0x0c, 0x45,
- 0x51, 0xf6, 0x91, 0x31,
- 0xa2, 0x4d, 0xe0, 0x0c,
- 0x3e, 0xb4, 0x82, 0xf5,
- 0x09, 0x06, 0xa1, 0x4b,
- 0x18, 0x86, 0x00, 0x00,
- 0x86, 0x05, 0x80, 0x00,
- 0x49, 0xf6, 0x23, 0x4b,
- 0x11, 0xc1, 0xe0, 0x0c,
- 0x84, 0x65, 0x89, 0x21,
- 0x3e, 0xb4, 0x83, 0x85,
- 0x49, 0xf6, 0xa5, 0x4b,
- 0x59, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x49, 0xf6,
- 0xe0, 0x0c, 0x59, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x58, 0x4c, 0x45,
- 0xee, 0x5c, 0x4c, 0xc5,
- 0xee, 0x60, 0x4c, 0x25,
- 0xed, 0xe0, 0x0c, 0x45,
- 0x82, 0x35, 0xa2, 0x4d,
- 0x84, 0xc5, 0xa1, 0x4b,
- 0x41, 0xf6, 0x23, 0x4b,
- 0x04, 0x65, 0xe0, 0x0c,
- 0x83, 0x75, 0x89, 0x21,
- 0x41, 0xf6, 0xa5, 0x4b,
- 0x47, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x64, 0x4c, 0x05,
- 0xee, 0x68, 0x4c, 0x35,
- 0xee, 0x6c, 0x4c, 0x25,
- 0x4c, 0x55, 0xc6, 0x0a,
- 0x40, 0x02, 0xee, 0x34,
- 0x4c, 0x05, 0xfa, 0x14,
- 0x8e, 0x0b, 0x6e, 0x34,
- 0xe8, 0x0c, 0x54, 0x48,
- 0x68, 0x0c, 0x46, 0xe8,
- 0x53, 0xb8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x68, 0x04,
- 0x68, 0x08, 0x72, 0x28,
- 0x0c, 0x05, 0x8e, 0x0b,
- 0x0c, 0x15, 0xee, 0x38,
- 0x4c, 0xa5, 0xee, 0x20,
- 0x4c, 0x05, 0xee, 0x18,
- 0xbe, 0x0d, 0x6e, 0x3c,
- 0x6e, 0x1c, 0x4c, 0xa5,
- 0x90, 0x84, 0x40, 0x02,
- 0x0e, 0x3c, 0x4c, 0x05,
- 0x00, 0x00, 0x82, 0x03,
- 0x81, 0x11, 0x6c, 0x04,
- 0xee, 0x40, 0x4c, 0x05,
- 0x6e, 0x44, 0x4c, 0x05,
- 0xbe, 0x1e, 0x81, 0x01,
- 0xbe, 0x04, 0x8f, 0x55,
- 0xe3, 0x1c, 0x01, 0x0a,
- 0xa1, 0xab, 0xd6, 0xd5,
- 0x0c, 0x05, 0x84, 0xd5,
- 0xa7, 0x0b, 0xee, 0x1c,
- 0xa5, 0x0b, 0x82, 0x25,
- 0xa3, 0x0b, 0x82, 0x65,
- 0x4a, 0xf8, 0x82, 0x95,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x6c, 0x18, 0x81, 0x85,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x55, 0x18, 0x81, 0x45,
- 0x8e, 0x0b, 0x68, 0x00,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x80, 0xf5, 0xa3, 0xab,
- 0x8e, 0x0b, 0x7c, 0x14,
- 0xfc, 0x38, 0x42, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x8a, 0x35, 0xa5, 0xab,
- 0x6e, 0x08, 0x0c, 0x15,
- 0x0c, 0x05, 0x87, 0x21,
- 0x84, 0x11, 0xee, 0x40,
- 0x4c, 0x15, 0x83, 0x0d,
- 0x40, 0x10, 0x4e, 0x40,
- 0x0c, 0x15, 0xdc, 0x00,
- 0x01, 0x0a, 0x6e, 0x28,
- 0x01, 0x16, 0xe0, 0x40,
- 0x4c, 0x05, 0x80, 0x00,
- 0x0c, 0x05, 0x8e, 0x40,
- 0x82, 0x0d, 0x6e, 0x20,
- 0x84, 0x04, 0x02, 0x10,
- 0x8e, 0x40, 0x4c, 0x15,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0xee, 0x3c, 0x0c, 0x15,
- 0xec, 0x38, 0x00, 0x00,
- 0x4c, 0x05, 0x80, 0x1d,
- 0x8e, 0x0b, 0x4e, 0x3c,
- 0xfc, 0x38, 0x56, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x88, 0x15, 0xa7, 0xab,
- 0x6e, 0x40, 0x0c, 0x05,
- 0x0c, 0x15, 0x87, 0x21,
- 0x01, 0x0a, 0xee, 0x08,
- 0x01, 0x16, 0xe0, 0x40,
- 0x84, 0x11, 0x00, 0x00,
- 0x0e, 0x40, 0x4c, 0x05,
- 0x0c, 0x05, 0x83, 0x0d,
- 0x4c, 0x15, 0xee, 0x20,
- 0x0c, 0x15, 0xce, 0x40,
- 0x40, 0x0a, 0xee, 0x3c,
- 0x00, 0x00, 0xe6, 0x8a,
- 0x80, 0x1d, 0xec, 0x18,
- 0x4e, 0x3c, 0x4c, 0x05,
- 0x50, 0x38, 0x8e, 0x0b,
- 0x0c, 0xa5, 0xe8, 0x08,
- 0x3e, 0x04, 0xee, 0x18,
- 0x82, 0x01, 0xaf, 0xab,
- 0x00, 0x0c, 0xbe, 0x0e,
- 0xa1, 0x0b, 0xe2, 0x00,
- 0x0c, 0x05, 0xe2, 0x65,
- 0x81, 0x11, 0x6e, 0x04,
- 0x26, 0x06, 0x82, 0x01,
- 0xfa, 0x80, 0x00, 0x04,
- 0x0c, 0x25, 0x83, 0x95,
- 0x00, 0x00, 0x6d, 0x9c,
- 0x0c, 0x45, 0xec, 0x04,
- 0x02, 0x23, 0xee, 0x20,
- 0x04, 0x33, 0x84, 0x11,
- 0x04, 0x53, 0xe0, 0x30,
- 0x58, 0x3a, 0xe0, 0x60,
- 0x46, 0x5a, 0xe1, 0x92,
- 0x44, 0xc3, 0xe1, 0x92,
- 0x46, 0x8a, 0xe0, 0x30,
- 0x46, 0x32, 0xe8, 0x30,
- 0x44, 0x33, 0xd0, 0x90,
- 0xa1, 0x0b, 0xe0, 0x60,
- 0x59, 0x95, 0xf8, 0xf5,
- 0xc1, 0xc3, 0x81, 0x81,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x54, 0x8e, 0x2d, 0x84,
- 0xc0, 0x10, 0x64, 0x11,
- 0x13, 0xae, 0xaf, 0x94,
- 0x63, 0xd1, 0x14, 0x4e,
- 0x91, 0xae, 0xc0, 0x10,
- 0x8d, 0x8e, 0x8f, 0x9e,
- 0xa1, 0xc4, 0xab, 0xa4,
- 0xa9, 0x74, 0xa5, 0x64,
- 0xa3, 0x84, 0xa7, 0x94,
- 0x89, 0x7e, 0x8b, 0xae,
- 0xfc, 0x6e, 0xfe, 0x9e,
- 0xbc, 0xce, 0xbe, 0x8e,
- 0xef, 0xfc, 0x57, 0x68,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xa1, 0x0d, 0xe0, 0x88,
- 0x0c, 0x15, 0x80, 0xb5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xa5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x0c, 0x15, 0x8b, 0xc5,
- 0x0c, 0x25, 0xe1, 0x40,
- 0x0c, 0x75, 0xe0, 0xa8,
- 0x46, 0x22, 0xe0, 0x18,
- 0x87, 0x0b, 0xf0, 0x84,
- 0x0c, 0x35, 0x82, 0x55,
- 0xa1, 0x3b, 0xe0, 0x7c,
- 0x0c, 0x35, 0x80, 0xd5,
- 0x46, 0x0a, 0xe0, 0x74,
- 0x92, 0x95, 0xe0, 0x80,
- 0xe1, 0xd0, 0x0c, 0x19,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x03, 0x21, 0x82, 0x25,
- 0x63, 0x38, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe8, 0x08,
- 0x4c, 0x05, 0xe0, 0xa8,
- 0x0c, 0x15, 0xe0, 0x88,
- 0x87, 0x51, 0x60, 0xc4,
- 0xe0, 0x34, 0x0c, 0x35,
- 0xe0, 0xa0, 0x0c, 0x45,
- 0xe0, 0xbc, 0x4c, 0x15,
- 0x48, 0x4a, 0x82, 0x33,
- 0x4a, 0x32, 0x66, 0x96,
- 0x09, 0x5d, 0xf1, 0x88,
- 0x4c, 0x55, 0x85, 0x51,
- 0x48, 0x42, 0x60, 0x98,
- 0x4c, 0x55, 0x90, 0x88,
- 0x06, 0x40, 0x60, 0x9c,
- 0x48, 0x32, 0x8c, 0x04,
- 0xc4, 0x2b, 0x71, 0x88,
- 0x18, 0x24, 0x44, 0x47,
- 0x0e, 0x55, 0xe0, 0x88,
- 0x98, 0x73, 0x7c, 0x10,
- 0xe0, 0xac, 0x0c, 0x45,
- 0x08, 0x25, 0xc4, 0x57,
- 0x0a, 0x34, 0xfc, 0x14,
- 0x8e, 0x53, 0xe0, 0x88,
- 0x00, 0x00, 0x82, 0x3d,
- 0x4c, 0x05, 0x84, 0x08,
- 0x82, 0xa5, 0x80, 0xc0,
- 0x06, 0x30, 0x57, 0xc4,
- 0xc4, 0xc7, 0xec, 0x04,
- 0xfc, 0x30, 0x08, 0xc5,
- 0xfc, 0x75, 0x84, 0xcd,
- 0x60, 0xbc, 0x4c, 0x35,
- 0xfd, 0xc5, 0x98, 0x2b,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x0c, 0x25, 0xdd, 0x93,
- 0x06, 0x14, 0x60, 0x84,
- 0x0c, 0x45, 0xe0, 0x88,
- 0x86, 0x73, 0x60, 0x78,
- 0x82, 0x3b, 0x01, 0x51,
- 0x4c, 0x25, 0x82, 0x21,
- 0x82, 0x43, 0x60, 0x84,
- 0x0e, 0xc5, 0x83, 0x45,
- 0xdd, 0x84, 0xf8, 0x10,
- 0xe0, 0x20, 0x0c, 0x95,
- 0xc4, 0x87, 0xc4, 0xc7,
- 0xfc, 0x30, 0x12, 0xc5,
- 0xfc, 0x20, 0x12, 0x85,
- 0xf1, 0xb0, 0x58, 0x82,
- 0x4a, 0xc2, 0x0a, 0xcd,
- 0x46, 0x10, 0xfa, 0x14,
- 0x82, 0x11, 0x5c, 0x00,
- 0xfa, 0x85, 0x88, 0x1d,
- 0x0c, 0x55, 0x98, 0x14,
- 0x0c, 0x45, 0xe0, 0x3c,
- 0x02, 0x10, 0xe0, 0x1c,
- 0x03, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0x48, 0x33, 0x86, 0x53,
- 0x48, 0x53, 0xe0, 0x30,
- 0xda, 0x85, 0xe0, 0x60,
- 0x82, 0x01, 0x03, 0x11,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xe0, 0x9c, 0x4c, 0x15,
- 0xe0, 0xbc, 0x4c, 0x05,
- 0xc1, 0xc3, 0xf9, 0x25,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x0c, 0x15, 0x80, 0x6b,
- 0xa1, 0x1d, 0xe0, 0x8c,
- 0x0c, 0x05, 0x82, 0x35,
- 0x80, 0x1d, 0xe0, 0x88,
- 0x0c, 0x05, 0x80, 0xa5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xe5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x0c, 0x55, 0xdd, 0x93,
- 0x0c, 0x25, 0xe1, 0x44,
- 0x0c, 0xc5, 0xe0, 0xa8,
- 0x0c, 0x35, 0xe0, 0x18,
- 0x0c, 0x4b, 0xe0, 0xb4,
- 0x44, 0x52, 0x60, 0x48,
- 0x0c, 0x2b, 0xf1, 0x88,
- 0x85, 0x1b, 0x60, 0x50,
- 0xe0, 0xc8, 0x0c, 0x85,
- 0xe0, 0xcc, 0x0c, 0x75,
- 0x0c, 0x95, 0x82, 0x75,
- 0xa1, 0x9b, 0xe0, 0x80,
- 0x0c, 0x95, 0x80, 0xf5,
- 0x52, 0x0a, 0xe0, 0x74,
- 0x0f, 0xb8, 0xe0, 0x80,
- 0x0c, 0x55, 0xc0, 0x00,
- 0x54, 0x86, 0x60, 0x70,
- 0x52, 0x02, 0xe0, 0x3c,
- 0xaa, 0xa3, 0xf1, 0x84,
- 0x96, 0x45, 0x94, 0x9d,
- 0x60, 0x94, 0x0c, 0x55,
- 0x95, 0x5b, 0xfd, 0xa1,
- 0x0c, 0x55, 0x94, 0xa5,
- 0x14, 0x50, 0xe0, 0x34,
- 0x16, 0xa4, 0xe4, 0x04,
- 0x96, 0xa3, 0xe1, 0xfc,
- 0x8a, 0xa3, 0x83, 0xa7,
- 0x92, 0x45, 0x95, 0x9d,
- 0x70, 0x84, 0x52, 0x02,
- 0x02, 0x91, 0xc6, 0x37,
- 0x14, 0x94, 0xa0, 0x31,
- 0xcb, 0x37, 0x61, 0xfc,
- 0xf9, 0xa1, 0x14, 0x93,
- 0x0c, 0xa5, 0xc2, 0x97,
- 0x94, 0x9f, 0x60, 0x10,
- 0x18, 0x95, 0x92, 0xc3,
- 0xb2, 0xc4, 0xf8, 0x0c,
- 0x14, 0xa5, 0xc4, 0x97,
- 0xc4, 0xc7, 0x7c, 0x24,
- 0x64, 0x10, 0x16, 0xa0,
- 0xc7, 0xb7, 0x86, 0xa3,
- 0x66, 0x92, 0x48, 0xba,
- 0x7f, 0xfc, 0x57, 0x8e,
- 0x08, 0x40, 0xc3, 0xff,
- 0xc9, 0x47, 0xe5, 0x00,
- 0x60, 0x20, 0x0c, 0xb5,
- 0x88, 0xa3, 0x96, 0x4f,
- 0xf0, 0x0a, 0x48, 0xaa,
- 0xfc, 0x24, 0x16, 0x95,
- 0xfc, 0x30, 0x16, 0xc5,
- 0xe6, 0x8a, 0x44, 0x4a,
- 0x04, 0x20, 0xa6, 0x93,
- 0x98, 0x93, 0x66, 0x00,
- 0x84, 0x9d, 0xd1, 0x27,
- 0x0c, 0x25, 0x84, 0xa5,
- 0x98, 0x34, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x45,
- 0x4c, 0x25, 0x82, 0x21,
- 0x06, 0x30, 0x60, 0x84,
- 0x07, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0xf1, 0x94, 0x46, 0x02,
- 0xe0, 0x30, 0x48, 0x33,
- 0xe0, 0x60, 0x48, 0x03,
- 0x0c, 0x05, 0xde, 0x65,
- 0xff, 0x91, 0x61, 0x34,
- 0x60, 0x94, 0x4c, 0x95,
- 0x73, 0x58, 0x8c, 0x2b,
- 0x0c, 0x35, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x8c,
- 0x48, 0x32, 0xe0, 0x88,
- 0x86, 0x1b, 0x71, 0x80,
- 0x61, 0x3c, 0x4c, 0x45,
- 0x42, 0x40, 0x85, 0x4d,
- 0xab, 0x0d, 0x1c, 0x00,
- 0xe1, 0x3c, 0x4c, 0x15,
- 0x0c, 0x09, 0x82, 0xd5,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x00, 0x26, 0xe0, 0x90,
- 0x4c, 0x05, 0xc0, 0x00,
- 0x4c, 0x05, 0xc0, 0x98,
- 0x00, 0x30, 0x40, 0x9c,
- 0x94, 0x35, 0xcc, 0x10,
- 0x60, 0x34, 0x0c, 0x05,
- 0xf1, 0x88, 0x48, 0x32,
- 0x86, 0xe5, 0x88, 0x0d,
- 0xe4, 0x04, 0x02, 0x00,
- 0x06, 0x14, 0xa8, 0x13,
- 0x0c, 0x35, 0xe1, 0xfc,
- 0x86, 0x13, 0x60, 0x84,
- 0x0c, 0x15, 0x83, 0x17,
- 0xa2, 0x23, 0x60, 0x1c,
- 0x84, 0x03, 0x02, 0x31,
- 0x60, 0x84, 0x4c, 0x35,
- 0x4c, 0x25, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x88,
- 0x60, 0x30, 0x42, 0x23,
- 0x4c, 0x05, 0x8f, 0x21,
- 0x42, 0x03, 0xe0, 0x8c,
- 0x4c, 0x25, 0xe0, 0x60,
- 0xe7, 0x55, 0xe0, 0x98,
- 0x60, 0x38, 0x0c, 0x05,
- 0xf1, 0x88, 0x4a, 0x12,
- 0xe0, 0xa4, 0x0c, 0x45,
- 0x89, 0x5d, 0x80, 0x43,
- 0x30, 0x23, 0x8a, 0x45,
- 0xf0, 0x9c, 0x40, 0x32,
- 0x60, 0x88, 0x4c, 0x25,
- 0x4c, 0x05, 0x8c, 0x1b,
- 0x68, 0xb8, 0xe0, 0x8c,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x1c,
- 0x4c, 0x05, 0xe0, 0x88,
- 0x82, 0x11, 0x60, 0x8c,
- 0x60, 0x84, 0x4c, 0x15,
- 0x02, 0x23, 0xc2, 0x17,
- 0x44, 0x03, 0x8f, 0x11,
- 0x8c, 0x0b, 0x60, 0x60,
- 0xe0, 0x30, 0x44, 0x33,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x08, 0x10, 0xa8,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x15, 0xfd, 0x11,
- 0xe1, 0x35, 0xe0, 0x94,
- 0x60, 0xa0, 0x0c, 0x05,
- 0x0c, 0x35, 0x87, 0x21,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x40, 0x0a, 0xe0, 0x48,
- 0x4c, 0x25, 0xe6, 0x8a,
- 0x46, 0x12, 0x60, 0x98,
- 0x00, 0x00, 0xf1, 0x8c,
- 0xa8, 0x13, 0x6c, 0x18,
- 0x60, 0xbc, 0x4c, 0x35,
- 0x4c, 0x25, 0x80, 0x3d,
- 0x4c, 0x95, 0xe0, 0x9c,
- 0x4c, 0x15, 0xe0, 0x94,
- 0x4c, 0x05, 0xe0, 0xc0,
- 0xdd, 0x75, 0xc0, 0xbc,
- 0x60, 0x78, 0x0c, 0x05,
- 0x44, 0x52, 0x81, 0x31,
- 0x00, 0x54, 0x71, 0x80,
- 0x00, 0xc3, 0xe0, 0x88,
- 0x83, 0x55, 0x8a, 0x0b,
- 0x18, 0x75, 0xf3, 0x44,
- 0x0c, 0x85, 0xf8, 0x0c,
- 0xc4, 0x47, 0xe0, 0x20,
- 0x10, 0x45, 0xc4, 0x77,
- 0x10, 0x75, 0xfc, 0x10,
- 0x48, 0x72, 0xfc, 0x1c,
- 0x06, 0x4d, 0xf1, 0x90,
- 0xfa, 0x0c, 0x46, 0x42,
- 0x5c, 0x00, 0x40, 0x50,
- 0xec, 0x04, 0x0a, 0x50,
- 0xfa, 0x65, 0x85, 0x5d,
- 0xe0, 0x84, 0x0c, 0x25,
- 0x0c, 0x45, 0x98, 0x34,
- 0x0c, 0x55, 0xe0, 0x3c,
- 0x82, 0x21, 0x60, 0x1c,
- 0x60, 0x84, 0x4c, 0x25,
- 0xec, 0x04, 0x06, 0x30,
- 0xc2, 0x27, 0x07, 0x2d,
- 0x46, 0x02, 0x04, 0x53,
- 0x4a, 0x33, 0xf1, 0x90,
- 0x4a, 0x03, 0xe0, 0x30,
- 0x2a, 0xe8, 0xe0, 0x60,
- 0x85, 0x01, 0x9f, 0xfc,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x60, 0x9c, 0x4c, 0x05,
- 0xec, 0x04, 0x00, 0x10,
- 0xc1, 0xc3, 0xf5, 0x05,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x87, 0x81, 0x00, 0x6b,
- 0xe0, 0x90, 0x0c, 0x05,
- 0xe0, 0x18, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x60, 0x98, 0x4c, 0x85,
- 0xac, 0xd5, 0xa1, 0x0d,
- 0xe0, 0x8c, 0x0c, 0x25,
- 0xac, 0x45, 0x85, 0x0d,
- 0x60, 0x20, 0x0c, 0x55,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x25,
- 0xf0, 0x88, 0x46, 0x12,
- 0xf8, 0x10, 0x06, 0x45,
- 0xf8, 0x08, 0x06, 0xc5,
- 0x78, 0x18, 0x06, 0x35,
- 0x0a, 0x25, 0xc4, 0x27,
- 0xc4, 0x47, 0x7c, 0x08,
- 0x7c, 0x10, 0x0a, 0x45,
- 0x0a, 0xc5, 0xc4, 0xc7,
- 0xc4, 0x37, 0x7c, 0x30,
- 0xfc, 0x0c, 0x0a, 0x35,
- 0xa6, 0xc3, 0xa8, 0x23,
- 0x90, 0x65, 0x84, 0xcd,
- 0xe0, 0x34, 0x0c, 0x25,
- 0x06, 0x24, 0x84, 0x21,
- 0xfd, 0x37, 0xe1, 0x7c,
- 0x85, 0x27, 0x86, 0x23,
- 0x4c, 0x05, 0xa4, 0x03,
- 0x04, 0x04, 0x60, 0x90,
- 0x02, 0x45, 0xe0, 0x88,
- 0x46, 0x12, 0x7c, 0x08,
- 0x8e, 0x34, 0xf0, 0x88,
- 0xc4, 0x47, 0x9a, 0x24,
- 0x04, 0x35, 0xc4, 0x37,
- 0x04, 0x45, 0xfc, 0x0c,
- 0x48, 0x32, 0xfc, 0x10,
- 0x89, 0x31, 0x71, 0x90,
- 0x0a, 0x00, 0x85, 0x45,
- 0x18, 0x04, 0x6c, 0x04,
- 0x02, 0xc5, 0xe0, 0x88,
- 0x12, 0x54, 0x7c, 0x30,
- 0x02, 0x95, 0xe0, 0x88,
- 0xc4, 0xc7, 0xfc, 0x24,
- 0x7c, 0x30, 0x04, 0xc5,
- 0x04, 0x95, 0xc4, 0x97,
- 0xb2, 0xc3, 0xfc, 0x24,
- 0x82, 0xf5, 0xa3, 0xcd,
- 0xe4, 0x08, 0x12, 0x40,
- 0xe1, 0x7c, 0x14, 0x94,
- 0x94, 0x93, 0xfd, 0xa7,
- 0x93, 0xcd, 0x85, 0x97,
- 0x00, 0x90, 0x4c, 0x55,
- 0x9c, 0x00, 0x40, 0x50,
- 0x9c, 0x00, 0x48, 0xc0,
- 0xec, 0x04, 0x06, 0x30,
- 0xf6, 0x95, 0xa1, 0x3b,
- 0x8c, 0x1b, 0x03, 0x21,
- 0xe8, 0x04, 0x7d, 0x28,
- 0x61, 0x3c, 0x0c, 0x45,
- 0x0c, 0x35, 0xff, 0xc1,
- 0x12, 0x60, 0x60, 0x34,
- 0x0c, 0x15, 0xe6, 0x20,
- 0x0c, 0x25, 0xe0, 0x94,
- 0x4a, 0x42, 0xe0, 0x88,
- 0x40, 0x52, 0xf1, 0x8c,
- 0x99, 0x1b, 0x7b, 0x00,
- 0xfa, 0x00, 0x44, 0x22,
- 0xe0, 0x90, 0x4c, 0x25,
- 0x0c, 0x15, 0xb0, 0x45,
- 0x98, 0x1d, 0xe0, 0x84,
- 0x0c, 0x05, 0xae, 0x05,
- 0x14, 0x14, 0x60, 0x1c,
- 0x0c, 0xc5, 0xe0, 0x84,
- 0x80, 0xa3, 0xe0, 0xa4,
- 0xe0, 0x30, 0x14, 0x53,
- 0xf1, 0xb0, 0x56, 0x52,
- 0x0f, 0x38, 0x97, 0x2d,
- 0x02, 0x11, 0x80, 0x00,
- 0x4c, 0x15, 0x84, 0x33,
- 0x08, 0x14, 0x60, 0x84,
- 0x08, 0x03, 0xe0, 0x84,
- 0x0c, 0xa5, 0x91, 0x11,
- 0x4c, 0x15, 0xe0, 0x50,
- 0x8c, 0x1b, 0x60, 0x50,
- 0xe0, 0x30, 0x40, 0x23,
- 0x60, 0x60, 0x40, 0x33,
- 0xfb, 0x00, 0x00, 0x34,
- 0xe8, 0x08, 0x55, 0xe8,
- 0x0c, 0x15, 0x98, 0x24,
- 0x0c, 0x35, 0xe0, 0x84,
- 0x4c, 0xa5, 0xe0, 0x1c,
- 0x04, 0x20, 0x60, 0x50,
- 0x05, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x04, 0x14,
- 0x46, 0x03, 0x84, 0x33,
- 0xa0, 0xa5, 0xe0, 0x60,
- 0x0c, 0x25, 0xa5, 0x35,
- 0xff, 0x11, 0x60, 0x94,
- 0x86, 0xb5, 0x83, 0x2b,
- 0x61, 0x3c, 0x0c, 0x25,
- 0x0c, 0x05, 0x82, 0x71,
- 0x0a, 0x74, 0x60, 0x34,
- 0x98, 0x44, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0x60, 0x8c, 0x0c, 0x05,
- 0x4c, 0x25, 0xa0, 0x23,
- 0x08, 0x40, 0x60, 0x90,
- 0x0a, 0x33, 0xec, 0x04,
- 0x4c, 0x25, 0x89, 0x7d,
- 0x4c, 0x75, 0xe0, 0x94,
- 0x46, 0x23, 0xe0, 0x84,
- 0x46, 0x03, 0xe0, 0x30,
- 0x98, 0x65, 0xe0, 0x60,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x4c, 0x25,
- 0xf1, 0x80, 0x48, 0x22,
- 0x8e, 0x25, 0x86, 0x4d,
- 0x60, 0x34, 0x0c, 0x35,
- 0xec, 0x04, 0x04, 0x20,
- 0x60, 0xbc, 0x4c, 0x25,
- 0x4c, 0x45, 0x85, 0x41,
- 0x4c, 0x45, 0xe0, 0x98,
- 0x80, 0x33, 0x60, 0x9c,
- 0x60, 0x94, 0x4c, 0x15,
- 0xec, 0x0c, 0x06, 0x30,
- 0x60, 0xc0, 0x4c, 0x35,
- 0x92, 0x15, 0x86, 0x2d,
- 0x60, 0x3c, 0x0c, 0x15,
- 0x0c, 0x25, 0x82, 0x71,
- 0x06, 0x74, 0x60, 0x1c,
- 0x4c, 0x75, 0xe0, 0x84,
- 0x80, 0x13, 0xe0, 0x84,
- 0x60, 0x8c, 0x4c, 0x15,
- 0x44, 0x03, 0x86, 0x23,
- 0x44, 0x13, 0xe0, 0x30,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x8a, 0xe5, 0xe0, 0x84,
- 0x7b, 0x00, 0x00, 0x14,
- 0x4f, 0x38, 0x8c, 0x1b,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0xc2, 0x17, 0xe0, 0x1c,
- 0x44, 0x03, 0x82, 0x23,
- 0x85, 0x15, 0xe0, 0x60,
- 0x86, 0xf5, 0xa1, 0x7d,
- 0x60, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x04, 0x74,
- 0xe0, 0x40, 0x0c, 0x35,
- 0x04, 0x23, 0x82, 0x23,
- 0x46, 0x3a, 0xe0, 0x30,
- 0xa0, 0x23, 0xe0, 0xa2,
- 0x82, 0xa5, 0x86, 0x2d,
- 0x02, 0x09, 0x8e, 0x13,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x42, 0x01,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x8e, 0x13, 0xc2, 0x77,
- 0xe0, 0x30, 0x42, 0x03,
- 0x4c, 0x05, 0x8f, 0x01,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0xe0, 0xa4, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xf1, 0x80, 0x40, 0x52,
- 0x81, 0x2d, 0x02, 0x11,
- 0xe0, 0x84, 0x4c, 0x15,
- 0x98, 0x44, 0x94, 0x25,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0xe0, 0x8c, 0x0c, 0x05,
- 0xec, 0x04, 0x18, 0x40,
- 0x18, 0x14, 0x19, 0x1d,
- 0x86, 0xc3, 0xe0, 0x84,
- 0xe0, 0x30, 0x58, 0x53,
- 0xe0, 0x60, 0x58, 0x03,
- 0x0c, 0x09, 0xf8, 0x05,
- 0x0c, 0x55, 0xe1, 0xd0,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x02, 0xa5, 0xe0, 0x84,
- 0xf0, 0x88, 0x40, 0x52,
- 0x68, 0x08, 0x49, 0xe8,
- 0x0c, 0x15, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x90,
- 0x98, 0x44, 0xe0, 0x1c,
- 0x08, 0x40, 0x02, 0x11,
- 0x0a, 0x14, 0xec, 0x04,
- 0x89, 0x1d, 0x60, 0x84,
- 0x60, 0x84, 0x4c, 0x15,
- 0x46, 0x03, 0x8a, 0x33,
- 0x87, 0x01, 0x60, 0x60,
- 0x60, 0x30, 0x46, 0x23,
- 0x80, 0x00, 0x00, 0x76,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x8b, 0xa5, 0xee, 0xa5,
- 0x60, 0x60, 0x14, 0xa3,
- 0x48, 0xa2, 0x86, 0xc3,
- 0xa4, 0x43, 0xfb, 0x10,
- 0x8e, 0x05, 0x98, 0x4d,
- 0x82, 0x11, 0x18, 0x44,
- 0x60, 0x84, 0x4c, 0x15,
- 0x08, 0x40, 0x84, 0x33,
- 0x09, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x08, 0x14,
- 0x40, 0x23, 0x88, 0x03,
- 0x40, 0x33, 0xe0, 0x30,
- 0xe8, 0x25, 0xe0, 0x60,
- 0x0c, 0x35, 0x87, 0xf5,
- 0x08, 0x14, 0x60, 0x1c,
- 0x0c, 0x05, 0xe0, 0x84,
- 0x88, 0x33, 0xe0, 0x8c,
- 0xe0, 0x30, 0x46, 0x23,
- 0xe0, 0x60, 0x46, 0x03,
- 0xe1, 0xd0, 0x0c, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x00, 0x04, 0x82, 0xe5,
- 0x8c, 0x1b, 0x7b, 0x00,
- 0xe8, 0x08, 0x45, 0x48,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0x44, 0x03, 0x86, 0x23,
- 0x98, 0x04, 0xe0, 0x60,
- 0xe0, 0x98, 0x4c, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0xde, 0x65, 0x81, 0x1d,
- 0x0c, 0x35, 0x83, 0xb5,
- 0xa4, 0x53, 0x60, 0x40,
- 0xe0, 0xa2, 0x46, 0x3a,
- 0x82, 0xa5, 0x86, 0x5d,
- 0x00, 0x19, 0x82, 0x03,
- 0x82, 0x11, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x40, 0x11,
- 0xe0, 0x90, 0x0c, 0x25,
- 0xe0, 0x1c, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x84, 0x06, 0x14,
- 0x40, 0x23, 0x86, 0x03,
- 0x4c, 0x85, 0xe0, 0x30,
- 0xa4, 0x04, 0xe0, 0x98,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x0c, 0x25,
- 0x86, 0x2d, 0x80, 0x33,
- 0x0c, 0x35, 0x86, 0xc5,
- 0x80, 0x33, 0xe0, 0x34,
- 0x90, 0xa5, 0x87, 0x2d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe4, 0x04, 0x08, 0x10,
- 0x60, 0x3c, 0x0c, 0x35,
- 0xe0, 0x84, 0x02, 0x44,
- 0xe0, 0x84, 0x4c, 0x45,
- 0x44, 0x03, 0x82, 0x23,
- 0x42, 0x32, 0x60, 0x30,
- 0x44, 0x13, 0xf0, 0x80,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x30, 0xf8, 0xe0, 0x84,
- 0xe7, 0xb5, 0xdf, 0xfc,
- 0x86, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0xe0, 0x40, 0x0c, 0x45,
- 0x06, 0x33, 0x84, 0x33,
- 0x48, 0x4a, 0xe0, 0x30,
- 0xa0, 0x33, 0xe0, 0xa2,
- 0x82, 0x85, 0x88, 0x3d,
- 0x04, 0x09, 0x82, 0x23,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x44, 0x01,
- 0x0c, 0x25, 0xa4, 0x04,
- 0x0c, 0x15, 0xe0, 0x1c,
- 0x06, 0x14, 0xe0, 0x84,
- 0x86, 0x23, 0xe0, 0x84,
- 0xe0, 0x30, 0x44, 0x03,
- 0x8f, 0x01, 0x02, 0x71,
- 0x60, 0x98, 0x4c, 0x05,
- 0x31, 0x88, 0x8f, 0x1b,
- 0x8c, 0x0b, 0xdf, 0xfc,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x04, 0x27, 0x08,
- 0xe0, 0xfc, 0x0c, 0x05,
- 0xe1, 0x00, 0x0c, 0x15,
- 0xe0, 0x94, 0x4c, 0x25,
- 0x60, 0x98, 0x4c, 0x85,
- 0xf1, 0x80, 0x40, 0x22,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x25, 0xa2, 0x23,
- 0xe1, 0x25, 0xe0, 0xc0,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0x24,
- 0x60, 0x20, 0x00, 0x15,
- 0x00, 0x45, 0x81, 0x71,
- 0x88, 0x34, 0xe0, 0xa0,
- 0xc8, 0xc4, 0x8a, 0x54,
- 0x00, 0x35, 0xca, 0x24,
- 0x86, 0x53, 0x60, 0x18,
- 0x58, 0x52, 0x98, 0x53,
- 0x82, 0x5b, 0x70, 0x88,
- 0x04, 0x40, 0x55, 0xce,
- 0x81, 0xd5, 0xec, 0x10,
- 0x82, 0x71, 0x02, 0x84,
- 0x7c, 0x18, 0x10, 0x85,
- 0xf0, 0x98, 0x52, 0x82,
- 0x60, 0x10, 0x12, 0x95,
- 0xb0, 0xc3, 0x88, 0x61,
- 0xd5, 0xce, 0x92, 0xc3,
- 0xfc, 0x75, 0x85, 0x7d,
- 0x60, 0x88, 0x18, 0x44,
- 0xec, 0x04, 0x08, 0x40,
- 0x70, 0xb0, 0x4a, 0x12,
- 0x0a, 0x50, 0x98, 0x33,
- 0x18, 0xc0, 0x6c, 0x30,
- 0x81, 0xf5, 0xec, 0x40,
- 0x82, 0x21, 0x4d, 0x74,
- 0x02, 0x85, 0x82, 0x64,
- 0xc4, 0x77, 0xfc, 0x30,
- 0x7c, 0x30, 0x0c, 0x95,
- 0x0c, 0x65, 0x88, 0xc1,
- 0xb2, 0x83, 0xfc, 0x1c,
- 0xd5, 0x8e, 0x8c, 0x83,
- 0xfc, 0x35, 0x89, 0x2d,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x75,
- 0x00, 0x35, 0xff, 0x61,
- 0x81, 0x11, 0x60, 0xc0,
- 0x60, 0x18, 0x00, 0x25,
- 0x40, 0x15, 0x81, 0x81,
- 0x40, 0x65, 0xe0, 0x7c,
- 0x00, 0x15, 0xe0, 0x88,
- 0x00, 0xc5, 0xe0, 0xb4,
- 0x40, 0x65, 0xe0, 0xa8,
- 0x25, 0x3e, 0xe1, 0x40,
- 0xe0, 0x88, 0x06, 0x74,
- 0x60, 0xd8, 0x00, 0x35,
- 0x00, 0x45, 0x86, 0x23,
- 0x16, 0x20, 0x60, 0x6c,
- 0x4a, 0xca, 0xec, 0x40,
- 0x81, 0x21, 0x66, 0x86,
- 0x46, 0x86, 0x21, 0x3e,
- 0x28, 0x33, 0xe0, 0x3c,
- 0x1b, 0x3e, 0xa0, 0x51,
- 0xe4, 0x40, 0x06, 0x10,
- 0x08, 0x10, 0x0b, 0x37,
- 0x7c, 0x3e, 0xe4, 0x10,
- 0xe4, 0x08, 0x06, 0x10,
- 0xcb, 0x57, 0x02, 0x11,
- 0x85, 0x37, 0x07, 0x47,
- 0x83, 0x17, 0x19, 0x5e,
- 0x81, 0x51, 0x3e, 0x4e,
- 0x81, 0x41, 0x09, 0x3e,
- 0x00, 0x15, 0x95, 0x1e,
- 0x93, 0x1e, 0xe0, 0xdc,
- 0xe0, 0xe0, 0x00, 0x15,
- 0x00, 0x15, 0xfe, 0x1e,
- 0x8d, 0x1e, 0xe0, 0x28,
- 0xe0, 0x2c, 0x00, 0x15,
- 0x00, 0x15, 0x91, 0x1e,
- 0x8f, 0xce, 0xe0, 0x24,
- 0x1d, 0x1e, 0xa3, 0x7e,
- 0xe0, 0x84, 0x02, 0xc4,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x8e, 0xc3, 0x2b, 0x1e,
- 0x81, 0x11, 0x3c, 0xce,
- 0x1a, 0x38, 0x97, 0x1e,
- 0x0a, 0xa0, 0xe0, 0x00,
- 0x0b, 0x0a, 0xe4, 0x04,
- 0x1a, 0x48, 0xe7, 0x20,
- 0x16, 0x15, 0xc0, 0x00,
- 0xa2, 0x4d, 0x60, 0x10,
- 0x5e, 0x45, 0xad, 0x6e,
- 0x5e, 0x25, 0xc0, 0x5c,
- 0x98, 0xf5, 0xc0, 0x4c,
- 0xc4, 0x17, 0x27, 0xbe,
- 0x60, 0xac, 0x00, 0x35,
- 0x19, 0x74, 0x8c, 0xbb,
- 0x06, 0xc5, 0x8e, 0x6b,
- 0xab, 0x34, 0xfc, 0x04,
- 0x04, 0xcd, 0xae, 0xc3,
- 0x2b, 0x3e, 0x88, 0x33,
- 0x9c, 0x00, 0x58, 0x20,
- 0x4e, 0x60, 0x0e, 0x05,
- 0x29, 0x8e, 0x9c, 0x00,
- 0xaf, 0x4e, 0x98, 0x8b,
- 0xe0, 0xb0, 0x00, 0x35,
- 0x8b, 0xc4, 0x8f, 0x44,
- 0xfc, 0x04, 0x06, 0x15,
- 0x60, 0x84, 0x06, 0x14,
- 0x88, 0x33, 0x8e, 0x13,
- 0xe0, 0x32, 0x46, 0x3a,
- 0x46, 0x3a, 0x9d, 0xc4,
- 0x90, 0xcb, 0x66, 0xb2,
- 0xe5, 0x00, 0x06, 0x30,
- 0x46, 0x3a, 0xcf, 0x37,
- 0x0d, 0x34, 0xe6, 0x92,
- 0x42, 0x1a, 0x86, 0x13,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8e,
- 0xd1, 0x17, 0xe6, 0x00,
- 0x1e, 0x45, 0x82, 0xcd,
- 0x58, 0x20, 0x00, 0x5c,
- 0x1e, 0x85, 0x9c, 0x00,
- 0x1e, 0x75, 0x80, 0x50,
- 0x82, 0x65, 0x80, 0x44,
- 0x96, 0x6b, 0x2f, 0x44,
- 0xe0, 0x88, 0x40, 0x95,
- 0xa1, 0x4b, 0xa9, 0x84,
- 0x81, 0x11, 0x80, 0xc5,
- 0x81, 0xe5, 0xab, 0x1e,
- 0x96, 0x6b, 0x01, 0xe5,
- 0x83, 0x41, 0x3c, 0x14,
- 0xe1, 0x40, 0x40, 0x95,
- 0x94, 0x13, 0xa5, 0x24,
- 0x7b, 0x08, 0x44, 0x12,
- 0xa5, 0x2e, 0x81, 0x11,
- 0xa3, 0x74, 0xab, 0x1e,
- 0xab, 0x24, 0x9b, 0x14,
- 0x82, 0x2d, 0xa7, 0xb4,
- 0xc0, 0x00, 0x13, 0xf8,
- 0x12, 0x78, 0xa3, 0x4d,
- 0x4c, 0x80, 0x40, 0x00,
- 0x27, 0xce, 0xdc, 0x00,
- 0x16, 0x15, 0x83, 0x21,
- 0xaf, 0x2e, 0xe0, 0x10,
- 0x60, 0x20, 0x16, 0x25,
- 0xe0, 0x88, 0x08, 0x14,
- 0xe0, 0x20, 0x00, 0x35,
- 0xe0, 0x10, 0x00, 0x15,
- 0xc4, 0x27, 0x21, 0xc4,
- 0xfc, 0x10, 0x06, 0x65,
- 0xfc, 0x08, 0x06, 0x25,
- 0x7c, 0x10, 0x02, 0x45,
- 0x10, 0x05, 0x99, 0xad,
- 0x93, 0xc4, 0x8c, 0x23,
- 0x9e, 0x65, 0x99, 0xad,
- 0x83, 0xad, 0xfe, 0x14,
- 0xee, 0x34, 0xaa, 0x85,
- 0xfc, 0xc4, 0x82, 0x14,
- 0x02, 0x15, 0xc4, 0x37,
- 0x42, 0xc2, 0xfc, 0x0c,
- 0x18, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x8c,
- 0xc2, 0x67, 0xf1, 0xb0,
- 0x1e, 0x95, 0x90, 0x6d,
- 0x4c, 0x80, 0x00, 0x58,
- 0x0f, 0xb8, 0x9c, 0x00,
- 0x29, 0x8e, 0x80, 0x00,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x40, 0xc4,
- 0xb3, 0x11, 0x1f, 0x1e,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x18, 0x25, 0x9d, 0x14,
- 0x10, 0x20, 0x7c, 0x0c,
- 0x1f, 0x34, 0xe4, 0x08,
- 0x4e, 0x7a, 0xc5, 0x87,
- 0x82, 0xcb, 0x66, 0x86,
- 0xad, 0x11, 0x08, 0x83,
- 0x48, 0x3a, 0x10, 0x71,
- 0x49, 0x77, 0xe6, 0x86,
- 0xe0, 0x98, 0x02, 0x24,
- 0x06, 0x06, 0x0e, 0x83,
- 0x02, 0x83, 0xe0, 0x04,
- 0x10, 0x43, 0x83, 0x11,
- 0x13, 0xe5, 0x8f, 0x81,
- 0x1f, 0x5e, 0x83, 0x71,
- 0x16, 0x15, 0x80, 0x5b,
- 0x16, 0x65, 0xf8, 0x30,
- 0x16, 0x75, 0xf8, 0x20,
- 0x29, 0x8e, 0xf8, 0x10,
- 0x2c, 0x84, 0xc4, 0x17,
- 0x06, 0xc5, 0xc4, 0x67,
- 0xc4, 0x77, 0x7c, 0x04,
- 0xfc, 0x18, 0x06, 0x65,
- 0x7c, 0x1c, 0x06, 0x75,
- 0x06, 0x35, 0xc4, 0x87,
- 0x29, 0x04, 0xfc, 0x20,
- 0x8e, 0x63, 0x98, 0x63,
- 0x86, 0x63, 0x15, 0x34,
- 0x7a, 0x18, 0x46, 0x32,
- 0xe0, 0x84, 0x0c, 0x24,
- 0x80, 0x6d, 0xa6, 0x63,
- 0x1d, 0x84, 0x92, 0x45,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x0a, 0x0b,
- 0x84, 0x43, 0x42, 0xc4,
- 0x66, 0xa2, 0x4e, 0x7a,
- 0x9f, 0x54, 0xc4, 0x47,
- 0x7c, 0x04, 0x18, 0x15,
- 0x45, 0x77, 0x84, 0x71,
- 0x08, 0x73, 0x90, 0xcb,
- 0x02, 0x73, 0x91, 0x81,
- 0x48, 0x72, 0x90, 0x11,
- 0x04, 0x14, 0x70, 0x8c,
- 0x06, 0x06, 0xe1, 0x90,
- 0x89, 0x11, 0x60, 0x08,
- 0x87, 0x71, 0x0b, 0xf5,
- 0xf8, 0x10, 0x16, 0x75,
- 0xc4, 0x77, 0xac, 0xc4,
- 0x7c, 0x1c, 0x06, 0x65,
- 0x06, 0x35, 0xc4, 0xc7,
- 0x89, 0xc4, 0xfc, 0x30,
- 0x46, 0xc2, 0x8c, 0x33,
- 0x4c, 0x22, 0xfa, 0x0c,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x9e, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x02, 0x15, 0xe4, 0x10,
- 0xc7, 0xc7, 0x7c, 0x1c,
- 0x84, 0x43, 0x1d, 0x74,
- 0x02, 0x43, 0x91, 0x81,
- 0x44, 0xca, 0x88, 0x11,
- 0x86, 0x43, 0x66, 0x9e,
- 0x8e, 0xcb, 0x44, 0x47,
- 0x06, 0x06, 0x04, 0x21,
- 0x45, 0x27, 0xe0, 0x08,
- 0x04, 0x43, 0x85, 0x71,
- 0xe1, 0x8c, 0x04, 0x14,
- 0x85, 0x11, 0x07, 0x35,
- 0x8a, 0x0b, 0x00, 0x6b,
- 0xa3, 0x74, 0xad, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x8d, 0x55, 0x9f, 0x54,
- 0xc4, 0x77, 0xac, 0x74,
- 0xfc, 0x1c, 0x06, 0x15,
- 0x42, 0x32, 0xbe, 0x34,
- 0x06, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x84,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x92, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x00, 0x35, 0xe4, 0x10,
- 0xc7, 0xc7, 0x60, 0x14,
- 0x84, 0x43, 0x1d, 0x84,
- 0x7c, 0x1c, 0x06, 0x35,
- 0x58, 0xca, 0x87, 0x71,
- 0x10, 0xc1, 0xe6, 0xa2,
- 0x49, 0xc7, 0x86, 0x13,
- 0x18, 0x43, 0x84, 0x31,
- 0x10, 0xcb, 0xc4, 0x17,
- 0x04, 0x34, 0x82, 0x43,
- 0x8f, 0x81, 0x61, 0x88,
- 0x60, 0x04, 0x06, 0x06,
- 0x44, 0x2a, 0x89, 0x11,
- 0x82, 0x23, 0xe6, 0xb2,
- 0x11, 0x24, 0xef, 0x2f,
- 0x42, 0x4a, 0x84, 0x43,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x86, 0x13, 0xe6, 0x8a,
- 0x82, 0x6d, 0xf1, 0x1f,
- 0x80, 0x50, 0x1e, 0x65,
- 0x80, 0x58, 0x1e, 0x95,
- 0x80, 0x44, 0x1e, 0x75,
- 0xaf, 0x44, 0x88, 0xc5,
- 0xe0, 0x88, 0x40, 0x95,
- 0x23, 0x74, 0x97, 0x14,
- 0xa7, 0xc4, 0xa3, 0x4b,
- 0x97, 0x1e, 0x82, 0x11,
- 0x00, 0x15, 0x84, 0x95,
- 0x8e, 0xa3, 0x60, 0xf0,
- 0x60, 0xa0, 0x00, 0x25,
- 0x85, 0x41, 0x87, 0x31,
- 0x44, 0x2a, 0x94, 0x13,
- 0x06, 0x10, 0x66, 0x8e,
- 0x85, 0x3d, 0xe4, 0x10,
- 0x40, 0x48, 0x5e, 0x15,
- 0x40, 0x15, 0x83, 0x11,
- 0x81, 0xb5, 0xe0, 0x7c,
- 0x81, 0x95, 0xad, 0x94,
- 0x90, 0x6b, 0x2d, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x81, 0x35, 0xa3, 0x74,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x88, 0xb1, 0x0c, 0x8b,
- 0x92, 0x6b, 0x18, 0x2b,
- 0x8a, 0xab, 0x25, 0x14,
- 0xf0, 0xa8, 0x52, 0x72,
- 0x25, 0xa8, 0x82, 0x9d,
- 0xa1, 0x6d, 0x9f, 0xfc,
- 0x97, 0x24, 0x82, 0x15,
- 0xe0, 0xf0, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x88, 0x40, 0x65,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0xff, 0x31, 0x01, 0x21,
- 0x60, 0x80, 0x40, 0x25,
- 0xe0, 0x3c, 0x4a, 0x86,
- 0x60, 0x6c, 0x00, 0x25,
- 0x00, 0x15, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0xb4,
- 0x60, 0x8c, 0x40, 0x35,
- 0x40, 0x35, 0x81, 0x91,
- 0xa4, 0x53, 0x61, 0x44,
- 0x60, 0xc0, 0x00, 0x35,
- 0xe4, 0x40, 0x04, 0x10,
- 0x60, 0xa8, 0x00, 0xc5,
- 0x00, 0x45, 0x8b, 0x27,
- 0xa9, 0x3e, 0xe0, 0xbc,
- 0xe0, 0x18, 0x00, 0xa5,
- 0x04, 0x10, 0x09, 0x2e,
- 0x07, 0x27, 0xe4, 0x10,
- 0xe6, 0x86, 0x46, 0xca,
- 0x44, 0x42, 0x7e, 0x2e,
- 0x44, 0x27, 0xf1, 0xb0,
- 0x50, 0xa2, 0xa0, 0x31,
- 0x04, 0x10, 0x70, 0x88,
- 0x02, 0x11, 0xe4, 0x08,
- 0x05, 0x27, 0xcb, 0x37,
- 0x1f, 0x3e, 0x83, 0x17,
- 0xe0, 0x88, 0x06, 0x44,
- 0x86, 0xa3, 0x21, 0x5e,
- 0x81, 0x31, 0x0f, 0x2e,
- 0x00, 0x15, 0x9b, 0x1e,
- 0xa5, 0x1e, 0xe0, 0xe4,
- 0xe0, 0xe8, 0x00, 0x15,
- 0x00, 0x15, 0x99, 0x1e,
- 0x8d, 0x1e, 0xe0, 0xec,
- 0xe0, 0x28, 0x00, 0x15,
- 0x00, 0x15, 0x93, 0x1e,
- 0x97, 0x1e, 0xe0, 0x2c,
- 0xe0, 0x24, 0x00, 0x15,
- 0x23, 0x1e, 0x95, 0xce,
- 0xe0, 0x84, 0x02, 0xc4,
- 0xb8, 0x1b, 0x11, 0x1e,
- 0xff, 0x11, 0x7c, 0x1e,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x81, 0xc1, 0x1d, 0x1e,
- 0x0d, 0x0a, 0xb1, 0xa5,
- 0x18, 0xb8, 0xe3, 0x1c,
- 0xa2, 0xcd, 0xc0, 0x00,
- 0x5c, 0x00, 0x4e, 0x30,
- 0xdc, 0x00, 0x46, 0xc0,
- 0x2d, 0xae, 0x96, 0x55,
- 0x20, 0x24, 0x8c, 0xab,
- 0x00, 0x15, 0x88, 0x6b,
- 0x98, 0xb3, 0x60, 0xac,
- 0xc4, 0x27, 0x9f, 0x44,
- 0xfc, 0x08, 0x02, 0x15,
- 0xf1, 0x90, 0x4e, 0x12,
- 0x0c, 0x05, 0x86, 0x7d,
- 0x9c, 0x00, 0x4e, 0x30,
- 0x8e, 0x9b, 0x2f, 0x9e,
- 0xe0, 0xb0, 0x00, 0x55,
- 0x91, 0x74, 0x95, 0x14,
- 0xfc, 0x08, 0x0a, 0x25,
- 0x60, 0x84, 0x0a, 0x24,
- 0x82, 0x53, 0x88, 0x23,
- 0xe0, 0x1e, 0x4a, 0x5a,
- 0x4a, 0x5a, 0xa3, 0x74,
- 0x92, 0x7b, 0x66, 0x9e,
- 0xe5, 0x00, 0x0a, 0x50,
- 0x4a, 0x5a, 0xcf, 0x57,
- 0x93, 0x14, 0xe6, 0x86,
- 0x44, 0x2a, 0x8a, 0x23,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x86,
- 0xd1, 0x27, 0xe6, 0x00,
- 0x1e, 0x95, 0x84, 0x7d,
- 0x4e, 0x30, 0x00, 0x5c,
- 0x82, 0x05, 0x9c, 0x00,
- 0xa1, 0xcb, 0x0c, 0x4b,
- 0xe0, 0x8c, 0x40, 0x45,
- 0x01, 0xe5, 0x80, 0xa5,
- 0x01, 0xd5, 0x81, 0xb1,
- 0x7c, 0x24, 0x8c, 0x4b,
- 0x40, 0x45, 0x81, 0xb1,
- 0x83, 0xc1, 0x61, 0x44,
- 0x88, 0x23, 0xa9, 0x14,
- 0xfa, 0x04, 0x42, 0x22,
- 0xaf, 0x94, 0xa9, 0x1e,
- 0x94, 0x6b, 0x21, 0x14,
- 0x82, 0xbd, 0xad, 0xa4,
- 0xc0, 0x00, 0x13, 0x48,
- 0x83, 0x31, 0x23, 0xcd,
- 0x5c, 0x00, 0x46, 0xc0,
- 0xdc, 0x00, 0x4a, 0x90,
- 0xc0, 0x00, 0x11, 0xb8,
- 0xad, 0xbe, 0xab, 0x7e,
- 0xf8, 0x10, 0x14, 0x25,
- 0xe0, 0x20, 0x00, 0x55,
- 0xf8, 0x20, 0x14, 0xc5,
- 0xc4, 0x27, 0x25, 0x14,
- 0xfc, 0x08, 0x0a, 0xb5,
- 0x60, 0x10, 0x00, 0x25,
- 0x0a, 0x75, 0xc4, 0xc7,
- 0x83, 0x6d, 0x7c, 0x30,
- 0xfc, 0x30, 0x04, 0xc5,
- 0x8e, 0xb3, 0x0e, 0x65,
- 0x83, 0x6d, 0x99, 0x14,
- 0x8d, 0x14, 0x9c, 0x25,
- 0x83, 0x6d, 0xa8, 0x74,
- 0x02, 0x14, 0xa6, 0x85,
- 0x89, 0x24, 0xc4, 0x77,
- 0xfc, 0x1c, 0x02, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x8c, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0x80, 0x00, 0x0f, 0xa8,
- 0x12, 0xc0, 0x2f, 0x9e,
- 0x27, 0x8e, 0xe4, 0x10,
- 0xc0, 0x14, 0xc7, 0x97,
- 0xb3, 0x11, 0x3e, 0x1e,
- 0xe6, 0x86, 0x50, 0xba,
- 0x3e, 0xb4, 0xa3, 0x14,
- 0xc5, 0x87, 0x84, 0x81,
- 0x66, 0x86, 0x52, 0x9a,
- 0x16, 0xb5, 0x98, 0x83,
- 0xad, 0xc1, 0x7c, 0x1c,
- 0x58, 0x2a, 0x10, 0x91,
- 0x49, 0x97, 0xe6, 0xb2,
- 0xe0, 0x04, 0x0e, 0x06,
- 0x04, 0xb4, 0x12, 0x83,
- 0x04, 0x83, 0xe0, 0x98,
- 0x10, 0xc3, 0x83, 0x91,
- 0x13, 0x45, 0x8f, 0x81,
- 0xa7, 0x8e, 0x83, 0x21,
- 0x14, 0x75, 0xa8, 0x24,
- 0x14, 0x85, 0xe0, 0x10,
- 0x2f, 0x9e, 0xe0, 0x20,
- 0x14, 0x95, 0xc4, 0x27,
- 0xc4, 0x77, 0x60, 0x30,
- 0x7c, 0x08, 0x0a, 0x15,
- 0x0a, 0x75, 0xc4, 0x87,
- 0x0a, 0x85, 0xfc, 0x1c,
- 0xc4, 0x97, 0x7c, 0x20,
- 0xfc, 0x24, 0x0a, 0x55,
- 0x82, 0x73, 0x1b, 0x14,
- 0x90, 0x73, 0x2f, 0x94,
- 0x0a, 0xb4, 0x0a, 0x73,
- 0x4e, 0x12, 0xe0, 0x84,
- 0xae, 0x53, 0xfa, 0x1c,
- 0x90, 0xe5, 0x92, 0x5d,
- 0x10, 0xc0, 0x23, 0x94,
- 0x42, 0x14, 0xe4, 0x10,
- 0x96, 0xc3, 0xc7, 0x87,
- 0x66, 0xa6, 0x50, 0x8a,
- 0x02, 0x15, 0xc4, 0xc7,
- 0x84, 0x81, 0xfc, 0x08,
- 0x98, 0x83, 0xc5, 0x87,
- 0x90, 0x11, 0x02, 0x83,
- 0x70, 0x9c, 0x58, 0x82,
- 0xe1, 0x90, 0x16, 0x14,
- 0x91, 0x81, 0x12, 0x1b,
- 0x0e, 0x06, 0x0b, 0x95,
- 0xa7, 0x8e, 0xe0, 0x08,
- 0x14, 0x15, 0xa8, 0x84,
- 0xc4, 0x87, 0xe0, 0x10,
- 0x7c, 0x20, 0x0a, 0x75,
- 0x0a, 0x15, 0xc4, 0x17,
- 0x8f, 0x54, 0xfc, 0x04,
- 0x4e, 0x52, 0x8e, 0x13,
- 0x4a, 0xb2, 0xfa, 0x04,
- 0xc2, 0x57, 0xf1, 0x9c,
- 0x86, 0x65, 0x92, 0x5d,
- 0x85, 0x91, 0x2f, 0x9e,
- 0x7c, 0x20, 0x04, 0x15,
- 0xe4, 0x10, 0x04, 0xc0,
- 0xc7, 0x27, 0x23, 0x84,
- 0x02, 0xc3, 0x96, 0xc3,
- 0x44, 0x2a, 0x88, 0x11,
- 0x8e, 0xc3, 0x66, 0xa2,
- 0x16, 0x14, 0x44, 0xc7,
- 0x04, 0x21, 0xe1, 0x8c,
- 0x45, 0x27, 0x90, 0x1b,
- 0x04, 0xc3, 0x91, 0x81,
- 0xe0, 0x08, 0x0e, 0x06,
- 0x85, 0x21, 0x05, 0xd5,
- 0x92, 0x5b, 0x0d, 0x05,
- 0xc4, 0x77, 0x7e, 0x24,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x84, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0xaf, 0x9e, 0x98, 0x05,
- 0x10, 0xc0, 0x27, 0x8e,
- 0x00, 0x15, 0xe4, 0x10,
- 0xc7, 0x87, 0x60, 0x14,
- 0x96, 0xc3, 0x23, 0x94,
- 0x7c, 0x1c, 0x02, 0x15,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xe6, 0xa6, 0x50, 0x8a,
- 0x82, 0x23, 0x10, 0x81,
- 0x84, 0x11, 0x49, 0x87,
- 0xc4, 0x27, 0x10, 0xc3,
- 0x61, 0x88, 0x16, 0x14,
- 0x12, 0x1b, 0x84, 0xc3,
- 0x07, 0x21, 0x8f, 0x81,
- 0x42, 0xba, 0x89, 0x91,
- 0x92, 0x13, 0xe6, 0x86,
- 0xe5, 0x1f, 0x17, 0x24,
- 0x42, 0xca, 0x82, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x8e, 0x13, 0xe6, 0x8a,
- 0x82, 0x5d, 0xf1, 0x1f,
- 0x80, 0x5c, 0x1e, 0x55,
- 0x40, 0x45, 0x88, 0xc5,
- 0xa3, 0x3b, 0x60, 0x8c,
- 0x88, 0x2b, 0x1d, 0x14,
- 0x48, 0x20, 0x27, 0x84,
- 0xad, 0xb4, 0xdc, 0x00,
- 0x82, 0x11, 0x2b, 0x74,
- 0x86, 0x95, 0x9d, 0x1e,
- 0x60, 0xf4, 0x00, 0x15,
- 0x98, 0x4b, 0x84, 0xcb,
- 0x71, 0x84, 0x46, 0x22,
- 0x02, 0x30, 0xff, 0x21,
- 0x29, 0x24, 0xec, 0x40,
- 0x95, 0x14, 0x84, 0x1d,
- 0x5c, 0x00, 0x44, 0x30,
- 0x1e, 0x25, 0x83, 0x3d,
- 0x83, 0x11, 0x40, 0x50,
- 0x60, 0x80, 0x40, 0x15,
- 0x8b, 0x4e, 0x85, 0x31,
- 0x81, 0x45, 0xa9, 0x2e,
- 0xad, 0xb4, 0xa7, 0x84,
- 0x06, 0xcb, 0xab, 0x74,
- 0x08, 0x40, 0x82, 0x61,
- 0x10, 0x80, 0x6c, 0x04,
- 0x14, 0xa0, 0xec, 0x10,
- 0x8a, 0x9b, 0x6c, 0x10,
- 0x8e, 0x3b, 0x01, 0x45,
- 0x92, 0x5b, 0x7f, 0x35,
- 0x83, 0x4d, 0xa9, 0x14,
- 0x9f, 0xfc, 0x27, 0x58,
- 0xa1, 0x3d, 0x8b, 0x34,
- 0x9d, 0x24, 0x82, 0x15,
- 0xe0, 0xf4, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x8c, 0x40, 0x35,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x85,
- 0x40, 0x15, 0xff, 0x11,
- 0x00, 0x15, 0xe0, 0x90,
- 0x91, 0x1e, 0xe0, 0xc0,
- 0xe0, 0x30, 0x00, 0x15,
- 0xe0, 0x18, 0x00, 0xb5,
- 0x00, 0x15, 0x8d, 0x1e,
- 0x8b, 0x1e, 0xe0, 0x24,
- 0xe0, 0x64, 0x00, 0x15,
- 0x89, 0xbe, 0xfe, 0x8e,
- 0x81, 0x11, 0x0f, 0x1e,
- 0x81, 0x11, 0x13, 0x1e,
- 0x81, 0x11, 0x3e, 0x1e,
- 0xad, 0xb5, 0xfc, 0x1e,
- 0xe3, 0x1c, 0x05, 0x0a,
- 0xc0, 0x00, 0x16, 0xe8,
- 0x60, 0x20, 0x00, 0x75,
- 0xe0, 0x88, 0x06, 0xa4,
- 0x7c, 0x0c, 0x16, 0x85,
- 0x8f, 0x14, 0x82, 0x21,
- 0x0e, 0x95, 0xc4, 0x87,
- 0xa1, 0x1b, 0x7c, 0x20,
- 0x96, 0xc5, 0x93, 0x2e,
- 0xb4, 0x13, 0xfe, 0x14,
- 0x96, 0x45, 0xb0, 0x1d,
- 0x60, 0xb4, 0x00, 0x15,
- 0x06, 0x55, 0x96, 0x33,
- 0x06, 0x25, 0xfa, 0x10,
- 0xc4, 0x57, 0xe0, 0x20,
- 0x7c, 0x14, 0x0e, 0x45,
- 0x0e, 0xc5, 0xc4, 0x27,
- 0x04, 0x10, 0x7c, 0x08,
- 0x87, 0x27, 0xe4, 0x10,
- 0xfa, 0x10, 0x44, 0x22,
- 0x60, 0x10, 0x00, 0x95,
- 0x08, 0x24, 0x92, 0xc3,
- 0x4c, 0xc2, 0xe0, 0x84,
- 0x12, 0x85, 0xf1, 0x90,
- 0xa3, 0x6d, 0x7c, 0x20,
- 0xa4, 0xb5, 0xbc, 0x8e,
- 0x60, 0x14, 0x00, 0x45,
- 0x8b, 0x94, 0xc2, 0x67,
- 0x7c, 0x14, 0x08, 0x45,
- 0xe4, 0x10, 0x0a, 0x80,
- 0x98, 0x83, 0x47, 0x57,
- 0xe6, 0xa6, 0x4a, 0x5a,
- 0x64, 0x08, 0x16, 0x40,
- 0x45, 0xb7, 0x88, 0x23,
- 0x56, 0xba, 0x90, 0x51,
- 0xc9, 0x57, 0x66, 0xa6,
- 0xc4, 0x27, 0x0a, 0x83,
- 0x84, 0x83, 0x08, 0xb1,
- 0xc7, 0xb7, 0x0d, 0x44,
- 0x44, 0x8a, 0x96, 0x83,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x92,
- 0xcf, 0x27, 0xe5, 0x00,
- 0x1e, 0xb5, 0x84, 0x6d,
- 0x9a, 0xe5, 0x80, 0x10,
- 0x84, 0x6d, 0xfc, 0x24,
- 0xc0, 0x90, 0x40, 0xa5,
- 0x89, 0xb4, 0xbe, 0x24,
- 0xc0, 0x08, 0x5e, 0x65,
- 0x98, 0xb5, 0xa1, 0x2b,
- 0xe0, 0xf8, 0x00, 0x25,
- 0x44, 0xa2, 0x91, 0x44,
- 0x48, 0x22, 0xf1, 0x88,
- 0x83, 0x21, 0x7a, 0x10,
- 0xbe, 0x2e, 0x91, 0x4e,
- 0x00, 0x65, 0x8b, 0xa5,
- 0x42, 0xb2, 0x60, 0xb4,
- 0x02, 0x45, 0xf0, 0x8c,
- 0x00, 0xb5, 0xfa, 0x10,
- 0x06, 0x60, 0xe0, 0x14,
- 0x44, 0x47, 0xe4, 0x10,
- 0x0e, 0x25, 0x87, 0x37,
- 0x16, 0xc5, 0xfc, 0x10,
- 0x4a, 0x32, 0xfc, 0x20,
- 0x04, 0x94, 0x7a, 0x08,
- 0x06, 0x54, 0xe0, 0x84,
- 0x46, 0x22, 0xe0, 0x84,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0xc0, 0x10, 0x1e, 0xb5,
- 0x16, 0x45, 0xa2, 0x55,
- 0x50, 0xc2, 0x7c, 0x10,
- 0x3c, 0xce, 0xf0, 0xa4,
- 0xe4, 0x08, 0x16, 0xc0,
- 0xc5, 0xb7, 0x0b, 0xc4,
- 0x84, 0x41, 0x08, 0x83,
- 0x8a, 0x83, 0x45, 0x47,
- 0x66, 0xb2, 0x56, 0xba,
- 0x48, 0x4a, 0xc4, 0x87,
- 0xc2, 0x37, 0x66, 0xb2,
- 0x88, 0xb1, 0x0d, 0x54,
- 0xc7, 0xb7, 0x08, 0x41,
- 0x96, 0x43, 0xc7, 0x47,
- 0x48, 0x4a, 0x90, 0x43,
- 0x48, 0x4a, 0xf0, 0x0a,
- 0x08, 0x40, 0xe6, 0x96,
- 0xcf, 0x47, 0xe5, 0x00,
- 0x1e, 0xb5, 0x88, 0x3d,
- 0x1e, 0xc5, 0x80, 0x10,
- 0x98, 0x65, 0x80, 0x00,
- 0x89, 0xb4, 0xfc, 0x44,
- 0x40, 0xa5, 0x88, 0x3d,
- 0x5e, 0x35, 0xc0, 0x90,
- 0xbe, 0x34, 0xc0, 0x08,
- 0xa1, 0x3b, 0xbc, 0xc4,
- 0x00, 0x35, 0x96, 0x15,
- 0x91, 0x44, 0xe0, 0xf8,
- 0xf1, 0x8c, 0x46, 0xa2,
- 0x7a, 0x10, 0x48, 0x32,
- 0x91, 0x4e, 0x83, 0x31,
- 0x89, 0xd5, 0xbe, 0x3e,
- 0x10, 0xa0, 0x0c, 0x34,
- 0x04, 0x84, 0xec, 0x04,
- 0xa0, 0x11, 0x60, 0x88,
- 0x7c, 0x08, 0x16, 0x65,
- 0x02, 0x24, 0x8b, 0x17,
- 0x0e, 0x45, 0xc4, 0x37,
- 0xc4, 0x67, 0xfc, 0x0c,
- 0xfc, 0x18, 0x04, 0x25,
- 0xfa, 0x08, 0x46, 0x12,
- 0xe0, 0x88, 0x02, 0x34,
- 0xa2, 0xa5, 0x89, 0x1d,
- 0xe0, 0x8c, 0x02, 0x34,
- 0xf1, 0x84, 0x42, 0xc2,
- 0xa0, 0xf5, 0xa3, 0x1d,
- 0xb3, 0x41, 0x40, 0x24,
- 0x66, 0x92, 0x48, 0xca,
- 0x8b, 0xc4, 0xc2, 0x17,
- 0x7c, 0x18, 0x04, 0x25,
- 0x3c, 0x64, 0x84, 0x41,
- 0x0a, 0x60, 0xc5, 0x47,
- 0x8c, 0x43, 0x64, 0x10,
- 0xad, 0x61, 0x47, 0x57,
- 0xe6, 0xb2, 0x4a, 0x5a,
- 0x66, 0xb2, 0x58, 0x2a,
- 0x10, 0x51, 0xcc, 0x27,
- 0xe6, 0x9a, 0x46, 0x3a,
- 0x82, 0xc1, 0x49, 0x57,
- 0xc3, 0xc7, 0x0a, 0x43,
- 0x86, 0x43, 0x0d, 0x34,
- 0x98, 0x43, 0x84, 0x43,
- 0xf0, 0x0a, 0x44, 0x4a,
- 0xe6, 0x8e, 0x44, 0x2a,
- 0xe5, 0x00, 0x04, 0x20,
- 0x84, 0x1d, 0xcf, 0x27,
- 0xfc, 0x24, 0x96, 0xc5,
- 0x40, 0xa5, 0x84, 0x1d,
- 0x5e, 0x15, 0xc0, 0x90,
- 0x89, 0xb5, 0xc0, 0x08,
- 0x10, 0xa0, 0x02, 0x44,
- 0x04, 0x54, 0xec, 0x04,
- 0xe0, 0x88, 0x06, 0x84,
- 0x7c, 0x0c, 0x16, 0x35,
- 0x8b, 0x67, 0xa0, 0x61,
- 0x02, 0x34, 0xc4, 0x57,
- 0x08, 0x35, 0xe0, 0x88,
- 0x0e, 0x45, 0xfc, 0x04,
- 0x4c, 0x62, 0xfc, 0x14,
- 0x06, 0x64, 0xfa, 0x0c,
- 0x89, 0x3d, 0xe0, 0x88,
- 0x06, 0x64, 0x90, 0x05,
- 0x46, 0x22, 0xe0, 0x8c,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0x40, 0x24, 0x8e, 0x55,
- 0xe4, 0x08, 0x08, 0xc0,
- 0xc5, 0x47, 0x0b, 0x74,
- 0xc4, 0xc7, 0x39, 0x51,
- 0x7c, 0x04, 0x04, 0x15,
- 0x48, 0x4a, 0x9b, 0x21,
- 0xc2, 0x37, 0x66, 0x9e,
- 0xe6, 0x8a, 0x44, 0x9a,
- 0x4a, 0x6a, 0x08, 0x41,
- 0x04, 0xc3, 0xe6, 0x96,
- 0xe6, 0x9e, 0x44, 0x1a,
- 0xcc, 0x17, 0x47, 0x47,
- 0x82, 0x21, 0x08, 0xc3,
- 0xc3, 0x27, 0x0a, 0xc3,
- 0x0d, 0x24, 0x82, 0xc3,
- 0x42, 0xca, 0x84, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8a,
- 0xcf, 0x17, 0xe5, 0x00,
- 0x84, 0x65, 0x82, 0x3d,
- 0x82, 0x3d, 0xfc, 0x14,
- 0xc0, 0x90, 0x40, 0xa5,
- 0xc0, 0x08, 0x5e, 0x35,
- 0xa1, 0x1b, 0xbe, 0x14,
- 0x00, 0x15, 0x82, 0x55,
- 0x11, 0x14, 0xe0, 0xf8,
- 0x42, 0xa2, 0xa2, 0xa3,
- 0x11, 0x1e, 0xfa, 0x04,
- 0xbe, 0x1e, 0x83, 0x11,
- 0x90, 0xab, 0x11, 0x14,
- 0x83, 0xad, 0x93, 0x24,
- 0x9f, 0xfc, 0x29, 0x28,
- 0xd0, 0xf1, 0x01, 0x11,
- 0xe0, 0x98, 0x40, 0x15,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0xac, 0x00, 0x15,
- 0x00, 0x25, 0x81, 0x41,
- 0x81, 0x51, 0x60, 0xa0,
- 0x81, 0x85, 0x84, 0x34,
- 0x06, 0xcd, 0xc5, 0xc4,
- 0xfb, 0x30, 0x46, 0x32,
- 0x1c, 0x00, 0x48, 0x50,
- 0x85, 0x5d, 0x82, 0x51,
- 0x40, 0x45, 0xfe, 0x15,
- 0xdd, 0x93, 0xe0, 0xb8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x18, 0x02, 0x65,
- 0x8e, 0x35, 0xa3, 0x2b,
- 0xe0, 0x4c, 0x02, 0x55,
- 0x94, 0x65, 0x81, 0x5d,
- 0x08, 0x04, 0x06, 0xc4,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x88, 0x63, 0x7c, 0x10,
- 0x6c, 0x04, 0x0e, 0x00,
- 0x80, 0x4b, 0x83, 0x81,
- 0xe0, 0x88, 0x06, 0x24,
- 0xfc, 0x0c, 0x18, 0x35,
- 0x86, 0xab, 0x03, 0xf5,
- 0xf8, 0x04, 0x0c, 0x95,
- 0x18, 0x95, 0xc4, 0x97,
- 0x95, 0x9d, 0xfc, 0x24,
- 0x87, 0x9d, 0x82, 0xa5,
- 0x02, 0xa5, 0x82, 0x65,
- 0x16, 0xa4, 0xe0, 0xb4,
- 0xf7, 0xb7, 0xe1, 0x7c,
- 0x8e, 0xbb, 0x16, 0xa3,
- 0x94, 0x9d, 0x8b, 0xa7,
- 0xa3, 0x8b, 0x80, 0x95,
- 0x88, 0xbb, 0x82, 0x75,
- 0x0c, 0x60, 0x02, 0x81,
- 0x0e, 0x70, 0xec, 0x10,
- 0x92, 0xab, 0x6c, 0x04,
- 0x8a, 0x8d, 0x96, 0x4b,
- 0x98, 0x54, 0xf8, 0x45,
- 0x18, 0x55, 0xc4, 0x57,
- 0x81, 0xc5, 0xfc, 0x14,
- 0x04, 0x04, 0x06, 0x34,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x08, 0x24, 0xfc, 0x08,
- 0x06, 0x55, 0xe0, 0x88,
- 0x80, 0x4b, 0x7c, 0x10,
- 0x02, 0xc5, 0x8a, 0x3b,
- 0xc4, 0x27, 0x60, 0x20,
- 0xe3, 0x40, 0x02, 0x19,
- 0xfc, 0x08, 0x18, 0x25,
- 0xe6, 0x86, 0x46, 0x3a,
- 0xe6, 0x86, 0x42, 0x5a,
- 0x86, 0x53, 0x04, 0x21,
- 0x82, 0x23, 0x85, 0x27,
- 0x48, 0x00, 0x85, 0x5d,
- 0x88, 0x0b, 0xdc, 0x00,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x80, 0x1e, 0xf0,
- 0xe0, 0x84, 0x00, 0x15,
- 0xb0, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x00, 0x25,
- 0xe0, 0x84, 0x12, 0x14,
- 0x12, 0x73, 0x84, 0x93,
- 0xa1, 0x7d, 0xe0, 0x30,
- 0x00, 0x45, 0xae, 0xd5,
- 0x87, 0x51, 0x60, 0xa0,
- 0xe0, 0x60, 0x12, 0x33,
- 0xe6, 0x96, 0x50, 0x4a,
- 0xac, 0xa5, 0x91, 0x3d,
- 0xac, 0x75, 0xa1, 0x3d,
- 0xac, 0x25, 0x91, 0x7d,
- 0x0c, 0x70, 0x09, 0x2e,
- 0x00, 0x45, 0xe4, 0x0c,
- 0x00, 0xa5, 0xe0, 0xb4,
- 0xa0, 0x41, 0xe0, 0xd4,
- 0x61, 0x7c, 0x0a, 0x44,
- 0xfa, 0x80, 0x04, 0xa4,
- 0xf7, 0x57, 0x0f, 0x2e,
- 0x04, 0xa4, 0x0a, 0x43,
- 0x0b, 0x47, 0xe1, 0xa0,
- 0x0d, 0x4e, 0xe1, 0xa7,
- 0xe0, 0x88, 0x08, 0x64,
- 0x60, 0x18, 0x00, 0x55,
- 0xfa, 0x80, 0x16, 0x24,
- 0xfe, 0x2e, 0xfc, 0xae,
- 0x54, 0x52, 0x0b, 0x5e,
- 0x01, 0x51, 0xf0, 0x90,
- 0x81, 0xc5, 0x81, 0x41,
- 0x82, 0x61, 0x69, 0x24,
- 0xe0, 0x20, 0x00, 0xc5,
- 0x18, 0x25, 0xc4, 0x27,
- 0x84, 0x21, 0xfc, 0x08,
- 0x48, 0x22, 0x85, 0x27,
- 0x86, 0x6d, 0xfa, 0x10,
- 0x0f, 0xc4, 0xfc, 0x85,
- 0x12, 0x23, 0xa0, 0x1d,
- 0x8e, 0xc3, 0xc0, 0x2c,
- 0xf0, 0xac, 0x4e, 0xc2,
- 0x5b, 0x1c, 0x4e, 0x22,
- 0x9c, 0xf5, 0xa3, 0xcd,
- 0x89, 0x2d, 0x8d, 0x24,
- 0x04, 0xb0, 0x9c, 0x85,
- 0xfa, 0x2d, 0xec, 0x04,
- 0x91, 0x7d, 0x9c, 0x15,
- 0x0d, 0x24, 0x9a, 0xc5,
- 0xe1, 0x84, 0x06, 0xb4,
- 0x0c, 0xc0, 0x0b, 0xa4,
- 0x3e, 0x1e, 0xe4, 0x04,
- 0xe0, 0x88, 0x02, 0x64,
- 0xa8, 0x23, 0x0f, 0x1e,
- 0x82, 0xa3, 0x44, 0x27,
- 0x81, 0x91, 0x26, 0x23,
- 0x60, 0xae, 0x46, 0x2a,
- 0xe0, 0x88, 0x04, 0x44,
- 0x8c, 0x8b, 0x01, 0xb1,
- 0x03, 0x15, 0xa6, 0xcb,
- 0x69, 0x24, 0xa4, 0xc3,
- 0x82, 0x14, 0x82, 0x81,
- 0x02, 0x15, 0xc4, 0x27,
- 0xc4, 0x17, 0xfc, 0x08,
- 0xa6, 0xc3, 0x18, 0x13,
- 0x60, 0x00, 0x04, 0x12,
- 0xe8, 0x00, 0x02, 0x12,
- 0xa2, 0x93, 0x04, 0xb3,
- 0xfc, 0x05, 0x8e, 0x8d,
- 0x18, 0x90, 0x0b, 0x84,
- 0x0f, 0x14, 0xe4, 0x08,
- 0xe4, 0x08, 0x06, 0xb0,
- 0x03, 0x25, 0x89, 0x94,
- 0x61, 0x14, 0x82, 0x83,
- 0xc0, 0x24, 0x82, 0x61,
- 0x04, 0x15, 0xc4, 0x17,
- 0x00, 0x25, 0xfc, 0x04,
- 0x44, 0x2a, 0xe0, 0x24,
- 0x8a, 0x13, 0x66, 0x86,
- 0xe5, 0x00, 0x04, 0x20,
- 0x4a, 0x12, 0xcf, 0x27,
- 0x8e, 0x6d, 0xf0, 0x88,
- 0xfe, 0x14, 0xfa, 0xe5,
- 0xf4, 0x20, 0x02, 0x8a,
- 0x0c, 0x34, 0x88, 0xd5,
- 0x85, 0xc7, 0x61, 0x08,
- 0xf1, 0xb0, 0x46, 0x62,
- 0x86, 0xe5, 0xa0, 0x3d,
- 0x60, 0xd0, 0x00, 0x05,
- 0x7c, 0x24, 0x8c, 0xc3,
- 0x42, 0xca, 0x8a, 0xc3,
- 0xd1, 0x07, 0xf0, 0x0a,
- 0xfa, 0x80, 0x00, 0x04,
- 0xe6, 0x92, 0x40, 0x0a,
- 0xe6, 0x8a, 0x42, 0x1a,
- 0x05, 0x07, 0x84, 0x01,
- 0xe6, 0x00, 0x02, 0x10,
- 0x91, 0x17, 0x06, 0x03,
- 0x82, 0x0d, 0x3e, 0x04,
- 0xd0, 0xa4, 0x40, 0x02,
- 0xc1, 0xe0, 0x00, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0xc1, 0xe0, 0x40, 0x11,
- 0x0c, 0x0c, 0xc0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0xa8, 0x00, 0x15,
- 0x00, 0x75, 0x81, 0x41,
- 0x00, 0x25, 0xe0, 0xac,
- 0x00, 0xa5, 0xe0, 0xb0,
- 0xa3, 0x1d, 0x60, 0xa0,
- 0x88, 0x4e, 0x9c, 0x4e,
- 0x83, 0x13, 0x84, 0x35,
- 0x8d, 0xf3, 0x83, 0x33,
- 0x9c, 0xc4, 0x82, 0x54,
- 0xfc, 0x10, 0x0a, 0x55,
- 0x9c, 0x5e, 0x98, 0x53,
- 0x88, 0xc4, 0xc0, 0x54,
- 0x7c, 0x10, 0x0a, 0x55,
- 0x98, 0x53, 0x88, 0x41,
- 0x02, 0x54, 0x88, 0x5e,
- 0xf1, 0x84, 0x48, 0xa2,
- 0x18, 0x70, 0x23, 0x4d,
- 0x4c, 0x70, 0xe4, 0x10,
- 0x08, 0x55, 0xdc, 0x00,
- 0xdc, 0x00, 0x50, 0x50,
- 0x60, 0x88, 0x06, 0x44,
- 0x7c, 0x3e, 0x8e, 0x6b,
- 0xe0, 0x88, 0x16, 0x14,
- 0xfe, 0x0c, 0x0c, 0x95,
- 0x82, 0xa1, 0x7e, 0xae,
- 0xa2, 0xa3, 0x09, 0x13,
- 0x8a, 0xab, 0x3e, 0xae,
- 0x89, 0x73, 0x83, 0x33,
- 0x7c, 0x2c, 0x14, 0xa5,
- 0xcd, 0x84, 0x94, 0x3b,
- 0x14, 0x93, 0xb0, 0x93,
- 0xf1, 0x9e, 0x86, 0xab,
- 0xbe, 0xc4, 0xfc, 0x84,
- 0x02, 0x54, 0xfe, 0xa4,
- 0xc4, 0xc7, 0x8a, 0x83,
- 0x0e, 0xa0, 0x8e, 0xc3,
- 0x48, 0x9a, 0xec, 0x04,
- 0x00, 0xd8, 0xe0, 0x1c,
- 0x0e, 0x10, 0xa0, 0x00,
- 0x8f, 0x13, 0xec, 0x04,
- 0x87, 0x73, 0x83, 0x33,
- 0xe1, 0x74, 0xd9, 0x34,
- 0xae, 0x33, 0xd5, 0x94,
- 0xf1, 0x3e, 0x92, 0x33,
- 0x18, 0x20, 0x40, 0x54,
- 0x88, 0x75, 0xe4, 0x10,
- 0x60, 0x88, 0x0e, 0x44,
- 0x0c, 0x85, 0x84, 0x6b,
- 0x06, 0xa0, 0x7e, 0x1c,
- 0x09, 0x13, 0xe4, 0x04,
- 0xf1, 0x84, 0x48, 0x32,
- 0x06, 0x14, 0x07, 0x33,
- 0x30, 0xac, 0xe0, 0x88,
- 0x8a, 0x9b, 0x68, 0x00,
- 0x7c, 0x0c, 0x12, 0x95,
- 0xe9, 0xb4, 0x92, 0xab,
- 0x12, 0x83, 0xb6, 0x83,
- 0xf1, 0x8e, 0x94, 0x9b,
- 0x46, 0x52, 0x40, 0x54,
- 0xc4, 0x47, 0xf0, 0x9c,
- 0x20, 0x01, 0x00, 0xa8,
- 0x58, 0x22, 0x40, 0x00,
- 0x83, 0x05, 0xf0, 0x90,
- 0x8a, 0x3b, 0x04, 0x6b,
- 0xa0, 0x00, 0x00, 0xd8,
- 0xec, 0x04, 0x00, 0x10,
- 0x83, 0x33, 0x81, 0x13,
- 0xd9, 0x04, 0x87, 0x73,
- 0xd5, 0x24, 0xcd, 0x14,
- 0x84, 0x03, 0xa2, 0x03,
- 0xa0, 0xf1, 0xf1, 0x0e,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x60, 0xa0, 0x02, 0x35,
- 0x02, 0x25, 0x87, 0x41,
- 0x46, 0x3a, 0xe0, 0x50,
- 0x48, 0x22, 0xe6, 0x92,
- 0x06, 0x30, 0xf0, 0x80,
- 0x87, 0x4d, 0xec, 0x04,
- 0x02, 0x35, 0x8a, 0xa5,
- 0x08, 0x04, 0x60, 0x18,
- 0x83, 0xc1, 0xe0, 0x88,
- 0xfc, 0x10, 0x06, 0x55,
- 0xc4, 0x57, 0x86, 0x44,
- 0xfc, 0x14, 0x08, 0x55,
- 0x0c, 0x00, 0x83, 0xf5,
- 0x0e, 0x04, 0x64, 0x04,
- 0x06, 0x75, 0xe0, 0x88,
- 0x10, 0x64, 0x7c, 0x1c,
- 0x06, 0x85, 0xe0, 0x88,
- 0xc4, 0x77, 0xfc, 0x20,
- 0x7c, 0x1c, 0x08, 0x95,
- 0x08, 0x75, 0xc4, 0x87,
- 0x93, 0x7d, 0xfc, 0x20,
- 0x8b, 0x7d, 0x82, 0x05,
- 0x02, 0x85, 0x80, 0xc5,
- 0xca, 0x77, 0x60, 0xb4,
- 0x80, 0x95, 0x90, 0x7d,
- 0x80, 0x6b, 0x23, 0xcb,
- 0x02, 0xc1, 0x80, 0xb5,
- 0x84, 0xcd, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xf8, 0x25,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0x60, 0xa0, 0x00, 0x55,
- 0x00, 0x45, 0x81, 0x31,
- 0x02, 0x54, 0xe0, 0x18,
- 0x04, 0x54, 0x60, 0x88,
- 0x81, 0xc5, 0xe0, 0x8c,
- 0x4a, 0x42, 0x08, 0xcb,
- 0x71, 0x3e, 0xf0, 0x84,
- 0x94, 0x3e, 0x84, 0x43,
- 0x82, 0x31, 0x10, 0x3e,
- 0x60, 0xa0, 0x00, 0x55,
- 0x8b, 0x3d, 0x98, 0x4b,
- 0xdd, 0x93, 0xfc, 0x95,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x81, 0x31, 0x2d, 0x0d,
- 0x04, 0x55, 0xac, 0x35,
- 0x04, 0x45, 0xe1, 0x04,
- 0x04, 0xa5, 0xe1, 0x08,
- 0x13, 0x5e, 0xe1, 0x0c,
- 0xf1, 0x94, 0x56, 0x12,
- 0x4a, 0x12, 0x11, 0x4e,
- 0x04, 0x95, 0xf1, 0x90,
- 0x40, 0x12, 0x61, 0x10,
- 0x04, 0x85, 0xf1, 0xa8,
- 0x58, 0x52, 0x61, 0x14,
- 0x04, 0x45, 0xf9, 0xac,
- 0x4c, 0xc2, 0x61, 0x18,
- 0x0f, 0x1e, 0xf9, 0x80,
- 0xf1, 0xa4, 0x4e, 0x12,
- 0x58, 0x12, 0x0d, 0x7e,
- 0x2c, 0x7f, 0xf1, 0xa0,
- 0xf1, 0x90, 0x48, 0x12,
- 0xb8, 0x7f, 0x0b, 0xce,
- 0xa1, 0x7d, 0xa8, 0x7f,
- 0x7c, 0x4e, 0xa2, 0x75,
- 0xe0, 0x88, 0x02, 0xb4,
- 0xc4, 0x57, 0x09, 0xae,
- 0xfe, 0x8e, 0xbe, 0x9e,
- 0xe0, 0x18, 0x04, 0x95,
- 0xe1, 0x1c, 0x04, 0x85,
- 0xe0, 0xb4, 0x04, 0xa5,
- 0xfc, 0x14, 0x12, 0x75,
- 0xfc, 0x04, 0x12, 0x15,
- 0xe0, 0x20, 0x04, 0x55,
- 0xc4, 0x17, 0xc4, 0x77,
- 0xfc, 0x04, 0x0a, 0x45,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xe1, 0x20, 0x04, 0x75,
- 0xe6, 0xa2, 0x50, 0x4a,
- 0xf1, 0x90, 0x48, 0x12,
- 0x66, 0x9e, 0x4e, 0x4a,
- 0x90, 0x7d, 0xb4, 0x83,
- 0x04, 0x45, 0x98, 0xe5,
- 0x0c, 0x04, 0x61, 0x24,
- 0x12, 0x35, 0xe0, 0x88,
- 0x93, 0x04, 0xfc, 0x18,
- 0x0a, 0x35, 0xc4, 0x37,
- 0x42, 0x32, 0xfc, 0x0c,
- 0x42, 0x1a, 0xf1, 0x84,
- 0x92, 0x4b, 0x66, 0x92,
- 0x8c, 0x25, 0x8e, 0x1d,
- 0xc4, 0xb7, 0x8d, 0xb4,
- 0xfc, 0x2c, 0x08, 0x05,
- 0x0a, 0x65, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x46, 0x62, 0xe1, 0x28,
- 0x46, 0x3a, 0xf1, 0x8c,
- 0x91, 0x04, 0xe6, 0x82,
- 0x88, 0x25, 0x82, 0x3d,
- 0xc4, 0xa7, 0x8b, 0xa4,
- 0xfc, 0x28, 0x08, 0x05,
- 0x0a, 0x95, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x42, 0x92, 0xe1, 0x2c,
- 0x42, 0x1a, 0xf1, 0x98,
- 0x89, 0x04, 0xe6, 0x82,
- 0x84, 0x25, 0x86, 0x1d,
- 0x04, 0x35, 0xfc, 0x04,
- 0xc4, 0x07, 0xe1, 0x30,
- 0xfc, 0x00, 0x08, 0x05,
- 0x0a, 0x05, 0xc4, 0x07,
- 0xb2, 0x03, 0xfc, 0x00,
- 0xe6, 0x8e, 0x40, 0x0a,
- 0x82, 0x0d, 0x7e, 0x04,
- 0x80, 0x04, 0x1e, 0x05,
- 0x88, 0x75, 0xa9, 0x0d,
- 0xe0, 0x74, 0x04, 0x15,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x8f, 0xc4, 0x86, 0xc5,
- 0xaf, 0xcd, 0xa0, 0xc3,
- 0xc4, 0xc7, 0x86, 0x55,
- 0x18, 0x15, 0x88, 0xc3,
- 0x18, 0x25, 0xf8, 0x18,
- 0xf0, 0x34, 0xf8, 0x08,
- 0x0a, 0x15, 0xc4, 0x17,
- 0xc4, 0x27, 0x7c, 0x04,
- 0x7c, 0x08, 0x0a, 0x25,
- 0x0a, 0x35, 0xc4, 0x37,
- 0xa4, 0x13, 0xfc, 0x0c,
- 0x84, 0x1d, 0xa6, 0x23,
- 0x8c, 0x10, 0x00, 0x00,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x06, 0x0b, 0x80, 0x3b,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x7b, 0x0b, 0x2e,
- 0x02, 0x40, 0x09, 0x0e,
- 0x00, 0x08, 0xe4, 0xc0,
- 0xe7, 0x00, 0x04, 0x40,
- 0x66, 0x40, 0x0a, 0x40,
- 0x01, 0xf5, 0x99, 0xc1,
- 0x42, 0x65, 0x81, 0x61,
- 0x18, 0xc0, 0x78, 0x30,
- 0xc5, 0x6e, 0xec, 0x04,
- 0x42, 0x65, 0xd5, 0x6c,
- 0x4a, 0x63, 0xe0, 0x2c,
- 0xc9, 0x66, 0xe0, 0x2c,
- 0xe0, 0x2c, 0x44, 0x61,
- 0xfc, 0x55, 0xa1, 0xcb,
- 0x60, 0x88, 0x02, 0x04,
- 0x7c, 0x0e, 0xc2, 0x07,
- 0xe7, 0x00, 0x00, 0x40,
- 0x00, 0x40, 0x3e, 0x0e,
- 0x7e, 0x1e, 0xe6, 0x40,
- 0xe4, 0xc0, 0x12, 0x30,
- 0x64, 0xc0, 0x14, 0x40,
- 0xe6, 0x40, 0x0c, 0x30,
- 0x81, 0x81, 0x11, 0x0e,
- 0x12, 0x05, 0x8d, 0x45,
- 0x99, 0x21, 0x78, 0x30,
- 0x43, 0x38, 0x9c, 0x1a,
- 0x1c, 0x1a, 0xe8, 0x1c,
- 0x7f, 0xfd, 0x57, 0xfe,
- 0x40, 0x02, 0xcf, 0xff,
- 0x99, 0x21, 0x7b, 0xac,
- 0xf8, 0x30, 0x54, 0x05,
- 0x42, 0x78, 0xe5, 0x04,
- 0x69, 0x0e, 0xe8, 0x1c,
- 0x8f, 0x9e, 0x99, 0x21,
- 0xe0, 0x2c, 0x12, 0x05,
- 0x41, 0xf8, 0x9c, 0x1a,
- 0x59, 0x3a, 0xe8, 0x1c,
- 0xfb, 0xac, 0x40, 0x02,
- 0x99, 0x21, 0x1e, 0x1a,
- 0x54, 0x05, 0x8d, 0xae,
- 0x86, 0x0b, 0x60, 0x2c,
- 0xe8, 0x1c, 0x41, 0x48,
- 0x99, 0x21, 0x11, 0xb4,
- 0x0c, 0x03, 0xed, 0x0c,
- 0x9e, 0x1a, 0xe0, 0x5c,
- 0xe8, 0x1c, 0x42, 0xa8,
- 0x60, 0x2c, 0x0c, 0x03,
- 0x1e, 0x1a, 0x80, 0xab,
- 0x42, 0x38, 0x99, 0x21,
- 0x0c, 0x03, 0xe8, 0x1c,
- 0x80, 0x9b, 0x60, 0x8c,
- 0x99, 0x21, 0x1e, 0x1a,
- 0xe8, 0x1c, 0x41, 0xc8,
- 0x89, 0x34, 0xfc, 0x24,
- 0x42, 0x22, 0xfe, 0x44,
- 0xb4, 0x23, 0x71, 0xa4,
- 0x92, 0x23, 0x00, 0x13,
- 0x40, 0x2a, 0x8e, 0x38,
- 0x44, 0x1a, 0xe0, 0x92,
- 0x11, 0x44, 0xe0, 0x92,
- 0x02, 0x02, 0xa1, 0x3b,
- 0x92, 0x0b, 0x60, 0x00,
- 0x60, 0x00, 0x06, 0x22,
- 0xeb, 0xfc, 0x04, 0x12,
- 0x02, 0x32, 0x3e, 0x34,
- 0x00, 0x06, 0xeb, 0xfc,
- 0xa1, 0x9d, 0x40, 0x00,
- 0x9c, 0x00, 0x40, 0x90,
- 0x60, 0x30, 0x48, 0x03,
- 0x0c, 0x26, 0x90, 0x33,
- 0x46, 0x11, 0x82, 0x81,
- 0x8f, 0x94, 0xe0, 0x30,
- 0x91, 0xbe, 0x8d, 0xa4,
- 0x82, 0x08, 0x8b, 0x04,
- 0xe6, 0x55, 0x81, 0x8d,
- 0xc8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x84, 0x00, 0x44,
- 0x7c, 0x00, 0x0a, 0x03,
- 0xf0, 0x80, 0x58, 0x52,
- 0xe0, 0x90, 0x18, 0xc3,
- 0xfd, 0x01, 0x20, 0xc3,
- 0x80, 0xcd, 0x3c, 0x04,
- 0x97, 0x80, 0x18, 0xc4,
- 0x44, 0x04, 0x18, 0xc0,
- 0x86, 0x15, 0xa3, 0x1d,
- 0xe6, 0x8a, 0x44, 0xca,
- 0xe5, 0x0e, 0x58, 0x2a,
- 0x65, 0x8e, 0x44, 0x2a,
- 0x18, 0xc0, 0x81, 0x31,
- 0xc1, 0x00, 0x64, 0x01,
- 0x72, 0x8c, 0x44, 0x22,
- 0xde, 0x27, 0xe3, 0xc7,
- 0x02, 0xcd, 0xa4, 0xcf,
- 0x80, 0xf5, 0x93, 0x11,
- 0x0a, 0x29, 0x88, 0x53,
- 0xe2, 0x2d, 0xe1, 0xe0,
- 0x8b, 0x11, 0x80, 0x55,
- 0x40, 0x11, 0x88, 0x03,
- 0xdd, 0x93, 0xe3, 0x90,
- 0x18, 0x24, 0x42, 0x5a,
- 0x98, 0x33, 0xe0, 0x88,
- 0xe0, 0x30, 0x06, 0x35,
- 0xc3, 0x5d, 0xc6, 0x57,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0x94, 0x4a, 0x12,
- 0x82, 0x15, 0xcb, 0x3d,
- 0xe0, 0x10, 0x00, 0x0b,
- 0x82, 0x03, 0xc6, 0x07,
- 0x5c, 0x08, 0xc0, 0x3d,
- 0x04, 0x43, 0x9a, 0x00,
- 0x48, 0x01, 0x85, 0x01,
- 0xdd, 0x93, 0xe3, 0x90,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x30, 0x1e, 0xf0,
- 0x1e, 0x25, 0x9b, 0x2e,
- 0xb7, 0xc4, 0xe0, 0x88,
- 0x99, 0x41, 0x1d, 0x4e,
- 0x1e, 0x25, 0x95, 0x2e,
- 0x0c, 0xc0, 0x60, 0x84,
- 0xb5, 0xb4, 0xe7, 0x90,
- 0x1e, 0x25, 0x97, 0x2e,
- 0x99, 0x2e, 0xe0, 0x80,
- 0xa3, 0x2e, 0xbf, 0x24,
- 0x91, 0x2e, 0xbd, 0x24,
- 0x93, 0x2e, 0xbb, 0x24,
- 0x0f, 0x2e, 0xb9, 0x24,
- 0x81, 0x45, 0x81, 0x21,
- 0x08, 0x40, 0x59, 0x26,
- 0xa1, 0x4b, 0xec, 0x04,
- 0x1f, 0x1e, 0xfe, 0x95,
- 0xe5, 0x80, 0x0a, 0x50,
- 0x60, 0x00, 0x4f, 0x06,
- 0xe0, 0x08, 0x11, 0x06,
- 0x81, 0x91, 0x21, 0x3e,
- 0x16, 0x15, 0x87, 0xd5,
- 0x02, 0x0a, 0xfc, 0x1c,
- 0xc7, 0xff, 0x63, 0xfd,
- 0x48, 0xc2, 0x8c, 0x65,
- 0x8d, 0x11, 0x70, 0xa4,
- 0xe3, 0x90, 0x48, 0x11,
- 0xa1, 0x1b, 0x80, 0x1a,
- 0x94, 0x24, 0x80, 0xe5,
- 0x02, 0x86, 0xc3, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x82, 0x1a, 0xc3, 0x90,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x70, 0x9c, 0x44, 0xc2,
- 0x04, 0x25, 0xce, 0x17,
- 0xc2, 0x2d, 0xe0, 0x30,
- 0xc0, 0x00, 0x02, 0x36,
- 0xc3, 0x90, 0x48, 0x11,
- 0xc0, 0x1a, 0xa5, 0x5e,
- 0x82, 0x05, 0xa1, 0x1b,
- 0xfc, 0x20, 0x18, 0x2b,
- 0x02, 0x36, 0xc2, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x23, 0x14, 0xc3, 0x90,
- 0x16, 0x3b, 0x92, 0x2b,
- 0x00, 0x6b, 0x98, 0x4b,
- 0x78, 0x78, 0x98, 0xab,
- 0x21, 0x34, 0xef, 0xfc,
- 0x25, 0x54, 0x94, 0xcb,
- 0x02, 0x91, 0x8c, 0x0b,
- 0x08, 0x71, 0x88, 0x51,
- 0x8e, 0x18, 0x84, 0x81,
- 0xf0, 0x55, 0x83, 0x9d,
- 0x02, 0x29, 0x9f, 0x14,
- 0x04, 0x0a, 0xe0, 0x34,
- 0x84, 0x85, 0xe3, 0xfc,
- 0x98, 0x5b, 0x15, 0x24,
- 0x0d, 0x2e, 0x9d, 0x44,
- 0x8b, 0x2e, 0x89, 0x21,
- 0x89, 0x2e, 0x97, 0x24,
- 0xfe, 0x2e, 0x8f, 0x24,
- 0xfc, 0x2e, 0x99, 0x24,
- 0xbe, 0x2e, 0x91, 0x24,
- 0xbc, 0x2e, 0x93, 0x24,
- 0x40, 0x98, 0x9b, 0x24,
- 0x01, 0x01, 0xe8, 0x00,
- 0xe5, 0x30, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x00, 0x1e, 0xf0,
- 0x84, 0x8b, 0x7c, 0x0e,
- 0x95, 0x5e, 0xbb, 0x04,
- 0x11, 0x0e, 0xfe, 0x4e,
- 0xb7, 0x04, 0xa3, 0x0b,
- 0xb3, 0x04, 0xbe, 0x0e,
- 0xb1, 0x04, 0x8b, 0x0e,
- 0x8e, 0x28, 0x89, 0x0e,
- 0x86, 0x75, 0x97, 0x2e,
- 0x81, 0x71, 0x03, 0x65,
- 0x8e, 0x03, 0x95, 0x04,
- 0xe3, 0x90, 0x00, 0x09,
- 0x82, 0xd5, 0xad, 0x0b,
- 0x8e, 0x4b, 0x7c, 0x04,
- 0x8b, 0x34, 0x89, 0x24,
- 0xe0, 0x20, 0x00, 0x13,
- 0xfe, 0x54, 0x95, 0x04,
- 0xbe, 0x04, 0xbc, 0x0e,
- 0xef, 0xfc, 0x70, 0x68,
- 0x82, 0x71, 0x97, 0x24,
- 0xfa, 0x75, 0x8f, 0x2b,
- 0xe0, 0x00, 0x39, 0x98,
- 0xe0, 0x30, 0x02, 0x09,
- 0xb5, 0xb4, 0x95, 0x14,
- 0xa1, 0x0b, 0x1f, 0x0e,
- 0x02, 0x10, 0x15, 0x01,
- 0x1d, 0x0e, 0xe7, 0x90,
- 0xc0, 0x00, 0x00, 0x46,
- 0xc0, 0x38, 0x5e, 0x05,
- 0x9b, 0x0e, 0xbd, 0x04,
- 0x81, 0xa5, 0xb9, 0x04,
- 0x04, 0x20, 0x04, 0x38,
- 0xad, 0x3b, 0xec, 0x04,
- 0x80, 0x38, 0x1e, 0x35,
- 0x00, 0x00, 0x42, 0x31,
- 0xa1, 0x2b, 0x82, 0x11,
- 0x09, 0x94, 0xfc, 0xd5,
- 0xe2, 0x00, 0x00, 0x2a,
- 0x81, 0xa1, 0x0b, 0x74,
- 0x60, 0x08, 0x0d, 0x06,
- 0x40, 0x0a, 0x81, 0x31,
- 0x96, 0x2b, 0x66, 0xa6,
- 0x40, 0x09, 0x0c, 0x06,
- 0x42, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe5, 0x1e,
- 0x02, 0x10, 0xe5, 0x9e,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0xa8, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x17,
- 0x81, 0x11, 0x22, 0x0f,
- 0xef, 0xd8, 0x53, 0x28,
- 0x66, 0xa6, 0x44, 0x6a,
- 0x64, 0x00, 0x00, 0x00,
- 0x42, 0x12, 0xc1, 0x00,
- 0xe3, 0x07, 0x72, 0xa8,
- 0x65, 0x1e, 0x46, 0x2a,
- 0x44, 0x2a, 0xde, 0x17,
- 0x4c, 0x02, 0x65, 0x9e,
- 0x06, 0x30, 0xf9, 0x84,
- 0x40, 0x08, 0x64, 0x01,
- 0x40, 0x22, 0x81, 0x11,
- 0xd9, 0x37, 0x72, 0xa8,
- 0x96, 0x2b, 0x68, 0x07,
- 0x81, 0x31, 0x26, 0x0f,
- 0xef, 0xd8, 0x51, 0x68,
- 0x00, 0x00, 0x17, 0x34,
- 0xc1, 0x00, 0x64, 0x01,
- 0x42, 0x12, 0x1b, 0x44,
- 0x5e, 0x17, 0xf2, 0xa8,
- 0x04, 0x34, 0xe3, 0x07,
- 0xa2, 0x0f, 0x60, 0x88,
- 0xa6, 0x1b, 0x08, 0x23,
- 0x64, 0x01, 0x06, 0x40,
- 0x04, 0x20, 0x40, 0x09,
- 0xc0, 0x09, 0x64, 0x01,
- 0x60, 0x08, 0x48, 0x86,
- 0x11, 0xb4, 0x81, 0x51,
- 0x85, 0x25, 0x81, 0xc1,
- 0xa9, 0xbb, 0x15, 0xa4,
- 0xfc, 0x10, 0x14, 0x73,
- 0x14, 0x95, 0x8c, 0x7e,
- 0x46, 0x95, 0xfc, 0x14,
- 0x52, 0xa2, 0x60, 0xc0,
- 0x12, 0xa9, 0xf1, 0xb0,
- 0x46, 0xa5, 0xe3, 0x90,
- 0x82, 0x95, 0xe1, 0x80,
- 0x88, 0x7e, 0x8c, 0x73,
- 0x0e, 0x75, 0x95, 0x74,
- 0x44, 0x75, 0xfc, 0x14,
- 0x12, 0x79, 0xe0, 0xc0,
- 0x44, 0x75, 0xe3, 0x90,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x41, 0x6c, 0x04,
- 0x88, 0x31, 0x08, 0x21,
- 0x99, 0x1b, 0x88, 0x51,
- 0x1f, 0x24, 0xf6, 0xd5,
- 0x1b, 0x44, 0x81, 0x51,
- 0x91, 0xb4, 0x81, 0xc1,
- 0x60, 0x88, 0x06, 0x24,
- 0x19, 0x3e, 0xa4, 0x1b,
- 0x0f, 0x3e, 0x88, 0x33,
- 0xe5, 0xe0, 0x04, 0x80,
- 0x65, 0x81, 0x06, 0x30,
- 0x08, 0x40, 0x40, 0x09,
- 0xc0, 0x0a, 0x67, 0x81,
- 0x08, 0x62, 0x85, 0x15,
- 0xf0, 0x94, 0x52, 0x42,
- 0x52, 0x65, 0xa9, 0xbb,
- 0x10, 0x75, 0xf9, 0x80,
- 0x52, 0x75, 0xfc, 0x14,
- 0x4e, 0x82, 0x78, 0xc0,
- 0x0e, 0xa9, 0xf1, 0xb0,
- 0xa4, 0xae, 0xe2, 0x40,
- 0x00, 0x63, 0x82, 0xb5,
- 0xf0, 0x94, 0x52, 0x32,
- 0x10, 0x65, 0xa4, 0x6e,
- 0x52, 0x65, 0xfc, 0x14,
- 0x0e, 0x69, 0xe0, 0xc0,
- 0x52, 0x65, 0xe2, 0x40,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x21, 0x6c, 0x04,
- 0x99, 0x1b, 0x88, 0x51,
- 0x11, 0x04, 0xf6, 0xf5,
- 0x17, 0x54, 0xff, 0x81,
- 0x9f, 0x14, 0x81, 0x41,
- 0x00, 0x4a, 0x1b, 0x34,
- 0x00, 0x0c, 0xe0, 0x0c,
- 0x04, 0x54, 0xe2, 0x00,
- 0x00, 0x14, 0x68, 0x80,
- 0x42, 0x0a, 0xe8, 0x80,
- 0x81, 0x35, 0xe6, 0x8a,
- 0x82, 0x41, 0x4d, 0x8e,
- 0xfe, 0xb5, 0x83, 0x4d,
- 0x0e, 0x04, 0x1b, 0x14,
- 0x81, 0x41, 0xe0, 0x88,
- 0x65, 0x81, 0x06, 0x10,
- 0x93, 0x3e, 0xc0, 0x09,
- 0x1b, 0xc4, 0x85, 0x95,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x82, 0x9b, 0x13, 0x64,
- 0x8a, 0xc3, 0x9f, 0xa4,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x91, 0x14, 0xf4, 0xf5,
- 0x0a, 0x48, 0xa9, 0x1b,
- 0x03, 0x68, 0xc0, 0x00,
- 0xc0, 0x00, 0x40, 0x01,
- 0x66, 0x96, 0x42, 0x0a,
- 0x9b, 0x34, 0x81, 0x41,
- 0x05, 0xb5, 0xc4, 0x17,
- 0x1b, 0x54, 0x86, 0x13,
- 0xf0, 0x94, 0x46, 0x42,
- 0xc4, 0x37, 0x13, 0x64,
- 0x82, 0x9b, 0x1f, 0xa4,
- 0x0a, 0x30, 0x8a, 0x33,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0x30,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0x3b, 0x94, 0x34,
- 0x0c, 0x35, 0x82, 0xe5,
- 0xa1, 0x3b, 0xe1, 0x80,
- 0xb0, 0x34, 0x82, 0x65,
- 0xb6, 0x33, 0x98, 0xb4,
- 0xf0, 0x80, 0x16, 0x34,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xd5, 0x8b, 0x4b,
- 0x1b, 0x14, 0x87, 0x45,
- 0x99, 0x34, 0x81, 0x41,
- 0x06, 0x10, 0x86, 0x13,
- 0xc0, 0x09, 0x65, 0x81,
- 0x85, 0x95, 0x93, 0x3e,
- 0x0a, 0x44, 0x1b, 0xc4,
- 0x13, 0x64, 0xe0, 0x88,
- 0x9f, 0xa4, 0x82, 0x9b,
- 0x0a, 0xc0, 0x8a, 0xc3,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0xc0,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0xbb, 0x94, 0xb4,
- 0x0c, 0xb5, 0x82, 0xe5,
- 0xa1, 0xbb, 0xe1, 0x80,
- 0xb0, 0xb4, 0x82, 0x65,
- 0xa6, 0xb3, 0x98, 0x34,
- 0xf0, 0x80, 0x16, 0xb4,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xf5, 0x8b, 0x4b,
- 0x42, 0x0a, 0x9f, 0x34,
- 0x99, 0x44, 0xe6, 0x96,
- 0x86, 0x13, 0x1b, 0x34,
- 0x06, 0x13, 0xc4, 0x17,
- 0x06, 0x30, 0x88, 0x33,
- 0x40, 0x09, 0x65, 0x81,
- 0x93, 0x3e, 0x81, 0x41,
- 0x1b, 0xc4, 0x85, 0x95,
- 0x13, 0x64, 0x88, 0x53,
- 0x1f, 0xa4, 0xc4, 0x57,
- 0x8a, 0xc3, 0x82, 0x9b,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x1b, 0x94, 0xf4, 0xf5,
- 0x8d, 0x05, 0x81, 0x41,
- 0x66, 0x82, 0x42, 0x4a,
- 0x7f, 0xfc, 0x55, 0xfe,
- 0x13, 0x9e, 0xdf, 0xff,
- 0x0d, 0x1e, 0x92, 0x3b,
- 0x59, 0xfe, 0xff, 0x51,
- 0x5f, 0xff, 0x7f, 0xfd,
- 0x03, 0x85, 0xff, 0x61,
- 0x8c, 0x14, 0x81, 0x91,
- 0x84, 0x05, 0x91, 0x1b,
- 0x4a, 0x60, 0x95, 0x1d,
- 0x58, 0xa0, 0x5c, 0x00,
- 0x02, 0x75, 0xdc, 0x00,
- 0xdc, 0x00, 0x4c, 0x90,
- 0x92, 0xbb, 0x19, 0x1d,
- 0x1c, 0x00, 0x56, 0x50,
- 0xfb, 0x30, 0x58, 0x12,
- 0x94, 0x1b, 0x96, 0x5b,
- 0x88, 0x31, 0x02, 0x91,
- 0x81, 0x9d, 0x82, 0xab,
- 0x13, 0x94, 0xfa, 0x35,
- 0x8c, 0x85, 0x91, 0x5b,
- 0xf1, 0xa8, 0x42, 0xc2,
- 0xe1, 0xdc, 0x03, 0x0a,
- 0x58, 0xa0, 0x08, 0x55,
- 0x1b, 0x94, 0xdc, 0x00,
- 0xe0, 0x88, 0x02, 0x44,
- 0x60, 0x88, 0x06, 0x64,
- 0xe0, 0x88, 0x16, 0x54,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x0c, 0x12, 0x35,
- 0xe9, 0xc0, 0x02, 0x15,
- 0xfc, 0x2c, 0x12, 0x95,
- 0xf1, 0x8c, 0x46, 0x12,
- 0x06, 0x34, 0x32, 0x13,
- 0x13, 0x94, 0xf0, 0x80,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4a, 0x60, 0x87, 0x1d,
- 0x58, 0xa0, 0x1c, 0x00,
- 0x8a, 0x6b, 0x9c, 0x00,
- 0x81, 0x31, 0x12, 0x1b,
- 0x45, 0x8e, 0x81, 0x35,
- 0x81, 0x3d, 0x82, 0x31,
- 0x8d, 0x14, 0xfe, 0xb5,
- 0x82, 0x63, 0x1b, 0x14,
- 0x82, 0x63, 0xc4, 0x67,
- 0x02, 0x41, 0x98, 0xce,
- 0x85, 0x4d, 0x8e, 0x93,
- 0x1b, 0x34, 0xe8, 0x15,
- 0x8d, 0x35, 0x81, 0x91,
- 0x43, 0xfe, 0x13, 0x9e,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0xff, 0x41, 0x06, 0xbb,
- 0x7f, 0xfd, 0x4b, 0xfe,
- 0xff, 0xc1, 0x5f, 0xff,
- 0x81, 0x91, 0x03, 0x85,
- 0x91, 0xab, 0xac, 0xa4,
- 0x83, 0xad, 0x84, 0x05,
- 0x5c, 0x00, 0x48, 0xc0,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x58, 0x90, 0x02, 0x75,
- 0x0b, 0xad, 0xdc, 0x00,
- 0x4c, 0x40, 0x92, 0x6b,
- 0x4a, 0xa2, 0x1c, 0x00,
- 0x8c, 0x4b, 0xfb, 0x14,
- 0x02, 0x91, 0x82, 0xab,
- 0x94, 0x1b, 0x8e, 0xb3,
- 0xfa, 0x35, 0x85, 0x9d,
- 0x91, 0x4b, 0x13, 0x94,
- 0x4c, 0x52, 0x8e, 0x45,
- 0x0d, 0x0a, 0xf1, 0x84,
- 0x08, 0x55, 0xe1, 0xdc,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x0c, 0x94, 0x1b, 0xa4,
- 0x12, 0xc4, 0xe0, 0x88,
- 0x16, 0x44, 0x60, 0x88,
- 0x14, 0x63, 0xe0, 0x88,
- 0x67, 0x01, 0x14, 0xa0,
- 0x14, 0x95, 0xc0, 0x09,
- 0x0c, 0x65, 0xfc, 0x24,
- 0x14, 0xa5, 0xea, 0x20,
- 0x52, 0x62, 0xfc, 0x2c,
- 0x34, 0x63, 0xf1, 0xa4,
- 0xf0, 0x80, 0x12, 0x94,
- 0xf0, 0x80, 0x0c, 0x64,
- 0x93, 0x6d, 0x13, 0x94,
- 0x1c, 0x00, 0x48, 0xc0,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x01, 0x11, 0x88, 0xcb,
- 0x85, 0x6d, 0x81, 0x61,
- 0x50, 0x84, 0x48, 0x32,
- 0xc4, 0x04, 0x0c, 0x60,
- 0x40, 0x00, 0x48, 0x85,
- 0xd0, 0x9c, 0x42, 0x12,
- 0x42, 0xca, 0xfc, 0xf5,
- 0x9b, 0x44, 0xe6, 0x82,
- 0xc4, 0x17, 0x92, 0x13,
- 0x84, 0x5e, 0x88, 0x13,
- 0x88, 0x31, 0x02, 0x91,
- 0xe6, 0xb5, 0x81, 0x9d,
- 0x02, 0x2a, 0x91, 0x14,
- 0x0c, 0x28, 0xe0, 0x10,
- 0xc0, 0x00, 0x40, 0x01,
- 0xff, 0x31, 0x1b, 0x64,
- 0x81, 0xc1, 0x7f, 0x41,
- 0x13, 0x6e, 0x8b, 0x75,
- 0x7f, 0xb1, 0x8c, 0x5b,
- 0x03, 0x45, 0xff, 0x61,
- 0x8a, 0x9b, 0x81, 0x11,
- 0xfe, 0x1c, 0x12, 0xa5,
- 0x19, 0xa4, 0x91, 0xab,
- 0xdc, 0x00, 0x46, 0xa0,
- 0xdc, 0x00, 0x56, 0x10,
- 0xfc, 0x28, 0x0a, 0x55,
- 0x48, 0x50, 0x91, 0x5b,
- 0x4c, 0x10, 0x5c, 0x00,
- 0x02, 0x11, 0xdc, 0x00,
- 0x85, 0x1d, 0x92, 0x5b,
- 0x91, 0xbb, 0x80, 0xa5,
- 0x91, 0x6b, 0xfa, 0x65,
- 0x91, 0xbb, 0xfa, 0x25,
- 0x91, 0x6b, 0x8c, 0x85,
- 0x42, 0x32, 0x8c, 0x45,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0x95, 0xe1, 0xdc,
- 0x02, 0xc4, 0x1b, 0x94,
- 0x0a, 0xb4, 0xe0, 0x88,
- 0x14, 0x64, 0x60, 0x88,
- 0x12, 0x13, 0xe0, 0x88,
- 0x67, 0x01, 0x12, 0x90,
- 0x12, 0x55, 0xc0, 0x09,
- 0x02, 0x15, 0xfc, 0x14,
- 0x12, 0x95, 0xea, 0x20,
- 0x4a, 0x12, 0xfc, 0x28,
- 0x32, 0x13, 0xf1, 0x94,
- 0xf0, 0x80, 0x0a, 0x54,
- 0xf0, 0x80, 0x02, 0x14,
- 0x80, 0x95, 0x83, 0x5d,
- 0x89, 0x3d, 0x81, 0x85,
- 0x9f, 0x14, 0x80, 0xc5,
- 0xe6, 0x82, 0x4a, 0x6a,
- 0x98, 0x13, 0x01, 0x55,
- 0x66, 0x82, 0x42, 0xba,
- 0x1b, 0x54, 0x98, 0x5b,
- 0xc4, 0x17, 0x8a, 0x13,
- 0x84, 0x8e, 0x8a, 0x13,
- 0x82, 0xc1, 0x13, 0x64,
- 0x9f, 0x54, 0x88, 0x61,
- 0x8b, 0xcb, 0x97, 0x14,
- 0x42, 0x0a, 0xe8, 0xf5,
- 0x81, 0x51, 0x66, 0x86,
- 0xc4, 0x17, 0x9b, 0x24,
- 0x54, 0x22, 0x0b, 0x85,
- 0x19, 0x2e, 0xf0, 0x84,
- 0x14, 0x1b, 0x84, 0xbb,
- 0x7f, 0xc1, 0xff, 0x21,
- 0x81, 0xe5, 0x81, 0x61,
- 0x91, 0x9b, 0xed, 0x94,
- 0x46, 0x90, 0x45, 0x94,
- 0x44, 0x60, 0xdc, 0x00,
- 0x91, 0x9b, 0xdc, 0x00,
- 0x5c, 0x00, 0x58, 0x60,
- 0xdc, 0x00, 0x48, 0x90,
- 0x81, 0x6d, 0x82, 0x61,
- 0x91, 0x2b, 0x80, 0xa5,
- 0x91, 0xcb, 0xfc, 0x05,
- 0x91, 0x2b, 0xfa, 0xc5,
- 0x91, 0xcb, 0x8c, 0xc5,
- 0x42, 0x32, 0x8c, 0x85,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0xd5, 0xe1, 0xdc,
- 0x02, 0x54, 0x1b, 0x94,
- 0x14, 0xbb, 0xe0, 0x88,
- 0xe0, 0x88, 0x0c, 0x24,
- 0xe0, 0x88, 0x14, 0xc4,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x18, 0x12, 0x65,
- 0xe9, 0xc0, 0x02, 0x15,
- 0x7c, 0x28, 0x12, 0x95,
- 0x4c, 0x12, 0x96, 0xab,
- 0x32, 0x13, 0xf1, 0x98,
- 0xf0, 0x80, 0x0c, 0x64,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4c, 0xca, 0x01, 0x55,
- 0x46, 0xca, 0xe0, 0x04,
- 0x17, 0x14, 0xe0, 0x10,
- 0xdc, 0x00, 0x58, 0x20,
- 0x02, 0x06, 0x9b, 0x24,
- 0x8a, 0x13, 0xc0, 0x00,
- 0xe6, 0x82, 0x42, 0x1a,
- 0xc4, 0x17, 0x98, 0x13,
- 0x84, 0x8e, 0x84, 0x13,
- 0x82, 0x51, 0x19, 0x24,
- 0x8e, 0x23, 0x8e, 0xa3,
- 0x83, 0x5b, 0x97, 0x14,
- 0x97, 0x24, 0xea, 0x35,
- 0x9b, 0xb4, 0x9f, 0x14,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0x00, 0x13, 0x8f, 0x34,
- 0x1d, 0x94, 0xc4, 0x07,
- 0x4c, 0xb2, 0xc4, 0x17,
- 0x80, 0xb3, 0x70, 0x84,
- 0x81, 0x11, 0x09, 0x15,
- 0x82, 0xab, 0x15, 0x04,
- 0x86, 0x2b, 0x0f, 0x3e,
- 0x8c, 0x4b, 0x16, 0x3b,
- 0x82, 0x03, 0x1b, 0x14,
- 0x67, 0x90, 0x00, 0x00,
- 0x81, 0x65, 0x81, 0x51,
- 0x88, 0x41, 0x02, 0x51,
- 0x88, 0x21, 0x08, 0x31,
- 0x9f, 0xc4, 0x88, 0x11,
- 0x88, 0x45, 0x99, 0x5d,
- 0x93, 0xcb, 0x80, 0xc8,
- 0x84, 0xc4, 0xfc, 0xd5,
- 0x84, 0x15, 0x91, 0xcb,
- 0x5f, 0xfd, 0x3f, 0x28,
- 0x88, 0xc4, 0xc3, 0xff,
- 0x80, 0xf5, 0x91, 0xcb,
- 0x91, 0xcb, 0x8c, 0xc4,
- 0x90, 0xc4, 0x80, 0x95,
- 0xf8, 0xe5, 0x91, 0xcb,
- 0x80, 0x16, 0x89, 0x11,
- 0x7c, 0x04, 0x81, 0xd5,
- 0x89, 0x24, 0x94, 0x4b,
- 0x00, 0x13, 0x8b, 0x34,
- 0x95, 0x04, 0xe0, 0x20,
- 0xbc, 0x0e, 0xfe, 0x54,
- 0x77, 0x58, 0xbe, 0x04,
- 0x1b, 0x04, 0xef, 0xf8,
- 0x0f, 0x34, 0x94, 0x1b,
- 0x17, 0x24, 0x82, 0x11,
- 0x0e, 0x03, 0x8e, 0x63,
- 0x1b, 0x0e, 0x8e, 0xb3,
- 0x85, 0x1b, 0x8e, 0x33,
- 0x1e, 0xf0, 0xf0, 0x15,
- 0x0c, 0x0c, 0xe5, 0x00,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0xab,
- 0x60, 0x94, 0x00, 0x34,
- 0xe1, 0x84, 0x02, 0xa4,
- 0x82, 0x03, 0x25, 0xc4,
- 0x60, 0x2a, 0x40, 0x0a,
- 0x29, 0x84, 0xa1, 0x71,
- 0x42, 0x02, 0x81, 0x61,
- 0x40, 0xc2, 0x7b, 0xb0,
- 0xa2, 0x73, 0xfa, 0x80,
- 0xf3, 0x98, 0x42, 0x62,
- 0x40, 0x12, 0x80, 0x73,
- 0xcb, 0x77, 0x72, 0x98,
- 0xe0, 0xec, 0x02, 0x04,
- 0x0e, 0x04, 0x2e, 0x1f,
- 0x0b, 0x1e, 0xe1, 0x94,
- 0xfa, 0x90, 0x40, 0x22,
- 0x44, 0x42, 0x2e, 0x1f,
- 0x21, 0x1b, 0xfb, 0x88,
- 0xef, 0xfc, 0x43, 0xf6,
- 0xa4, 0x03, 0x20, 0x1c,
- 0x73, 0x98, 0x42, 0x62,
- 0x80, 0x08, 0x4c, 0x96,
- 0x80, 0x00, 0x10, 0x18,
- 0x48, 0xaa, 0x9f, 0x24,
- 0x89, 0x7e, 0xe6, 0xaa,
- 0x06, 0x44, 0x06, 0x23,
- 0x3e, 0x5e, 0xe1, 0x84,
- 0x06, 0x23, 0xca, 0x27,
- 0x44, 0x2a, 0x82, 0x3b,
- 0x84, 0xc3, 0xe0, 0x12,
- 0xf2, 0x98, 0x44, 0x62,
- 0x4e, 0x22, 0xa0, 0xc1,
- 0xcb, 0xc7, 0x72, 0x98,
- 0x60, 0xec, 0x16, 0x74,
- 0x38, 0xbf, 0xcb, 0x77,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x56, 0xca, 0xc0, 0x3f,
- 0x80, 0x2b, 0x64, 0x08,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0xe1, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x57, 0xfe,
- 0x0e, 0x06, 0x40, 0x3f,
- 0x57, 0x58, 0xc0, 0x00,
- 0x04, 0x04, 0xef, 0xd4,
- 0xd0, 0x17, 0x61, 0xe0,
- 0x45, 0xfe, 0x24, 0x1f,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xff, 0xa1, 0x50, 0x07,
- 0x42, 0xca, 0x7c, 0x9e,
- 0x7e, 0x8e, 0xe4, 0x08,
- 0xe0, 0x08, 0x42, 0x1a,
- 0x40, 0x6a, 0x0b, 0x94,
- 0x09, 0x84, 0xe0, 0x28,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0x6d, 0x80, 0x42, 0x0a,
- 0x41, 0xfe, 0x92, 0x2b,
- 0x43, 0xfe, 0x5f, 0xfc,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x6f, 0xd4, 0x4b, 0xe8,
- 0x12, 0x2b, 0x90, 0x3b,
- 0x4b, 0x98, 0x90, 0x3b,
- 0x02, 0x3b, 0xef, 0xd4,
- 0x23, 0xa4, 0x80, 0x2b,
- 0xe0, 0x28, 0x44, 0x6a,
- 0x06, 0xca, 0x21, 0x84,
- 0x1d, 0x94, 0xe5, 0xfc,
- 0xe1, 0xfc, 0x06, 0x1a,
- 0x65, 0x80, 0x42, 0x0a,
- 0x42, 0x1a, 0x96, 0x0b,
- 0x8e, 0x1b, 0x61, 0x88,
- 0xed, 0x80, 0x42, 0x0a,
- 0x5f, 0xfc, 0x45, 0xfe,
- 0xc0, 0x04, 0x47, 0xf6,
- 0xef, 0xd4, 0x53, 0x68,
- 0x47, 0xfe, 0x3e, 0x24,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x89, 0xb4, 0xa7, 0x74,
- 0x44, 0x62, 0x84, 0x93,
- 0x7e, 0x84, 0xf2, 0x98,
- 0x44, 0x22, 0x90, 0x93,
- 0x7c, 0x94, 0xf2, 0x98,
- 0x44, 0x22, 0x92, 0xa3,
- 0x54, 0xca, 0x72, 0x98,
- 0x04, 0x1a, 0xe4, 0x0c,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x04, 0x06, 0xe1, 0x80,
- 0x55, 0xfe, 0x40, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x61, 0xe0, 0x06, 0xa4,
- 0x50, 0xa7, 0xd0, 0x27,
- 0x14, 0x03, 0xa6, 0x2f,
- 0x42, 0x12, 0xff, 0xa1,
- 0x45, 0xfe, 0x72, 0x88,
- 0xdf, 0xff, 0x7f, 0xfc,
- 0x64, 0x08, 0x42, 0xca,
- 0x42, 0x1a, 0x84, 0x71,
- 0xc7, 0x77, 0x60, 0x08,
- 0xe0, 0x28, 0x40, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0xa1, 0x1b, 0xdf, 0xfc,
- 0x0b, 0x24, 0x82, 0x45,
- 0x45, 0xf8, 0x96, 0x3b,
- 0x01, 0x31, 0xef, 0xd4,
- 0x4f, 0x18, 0x8e, 0x2b,
- 0x81, 0x95, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4e, 0xc8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x45, 0x28,
- 0x43, 0xfe, 0xa1, 0x1d,
- 0x5f, 0xff, 0x1f, 0xfd,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x44, 0x68,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x01, 0x31, 0xc5, 0x17,
- 0x4d, 0x38, 0x8e, 0x2b,
- 0x81, 0xe5, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4c, 0xe8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x43, 0x48,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x21, 0x1d, 0xc5, 0x17,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x04, 0x14, 0xc7, 0xff,
- 0xff, 0x31, 0x01, 0x88,
- 0x01, 0x88, 0x00, 0x04,
- 0x80, 0xf8, 0x02, 0x14,
- 0x19, 0x84, 0x46, 0x02,
- 0x46, 0x5a, 0xa1, 0x2b,
- 0x40, 0x9a, 0x60, 0x28,
- 0x40, 0x0a, 0xe5, 0x26,
- 0x47, 0xfe, 0xe1, 0x84,
- 0x04, 0x06, 0x5f, 0xfc,
- 0x00, 0x33, 0xc0, 0x00,
- 0xe5, 0xa6, 0x40, 0x9a,
- 0x40, 0x22, 0x95, 0x3b,
- 0x47, 0xfe, 0x72, 0x80,
- 0xa1, 0x0b, 0x9f, 0xfc,
- 0xdf, 0xfc, 0x47, 0xfe,
- 0xf0, 0x0a, 0x40, 0x3a,
- 0x0c, 0x0b, 0xa0, 0x0c,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x81, 0x41, 0x01, 0xb5,
- 0x82, 0x41, 0x49, 0x54,
- 0x98, 0x5d, 0xc5, 0xc4,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0xb0, 0x4a, 0x52,
- 0x81, 0x4d, 0xcd, 0x5e,
- 0x5d, 0x93, 0xfc, 0xd5,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x67, 0x90, 0x0a, 0x30,
- 0xe6, 0xa0, 0x18, 0x30,
- 0x81, 0x61, 0x0f, 0x4e,
- 0x48, 0x06, 0x08, 0x8b,
- 0x03, 0xa5, 0xe0, 0x24,
- 0x20, 0x66, 0x80, 0x9b,
- 0x18, 0xa3, 0xa5, 0x1b,
- 0x16, 0x0e, 0x40, 0x00,
- 0x14, 0x78, 0xd0, 0x00,
- 0x00, 0x01, 0x16, 0x06,
- 0x06, 0xa5, 0x90, 0x00,
- 0xf2, 0x7d, 0x00, 0x00,
- 0x48, 0x4a, 0x80, 0xb5,
- 0x54, 0xa2, 0xe4, 0x9c,
- 0x65, 0xae, 0x90, 0xac,
- 0x08, 0x31, 0x82, 0x61,
- 0x04, 0xc1, 0x82, 0x51,
- 0x8a, 0xa8, 0x82, 0x81,
- 0xf8, 0xd5, 0x95, 0x6d,
- 0x88, 0xd5, 0xe5, 0xad,
- 0x82, 0x41, 0x8f, 0x44,
- 0x88, 0x5b, 0x03, 0x31,
- 0x81, 0xc1, 0x03, 0xb5,
- 0x78, 0x04, 0x0a, 0x69,
- 0x94, 0x78, 0xa5, 0x1b,
- 0xe0, 0x88, 0x10, 0x64,
- 0x7c, 0x20, 0x00, 0x85,
- 0xe0, 0x88, 0x12, 0x74,
- 0xfc, 0x24, 0x00, 0x95,
- 0x93, 0x8d, 0x80, 0x95,
- 0x81, 0x75, 0x80, 0x95,
- 0x80, 0xa5, 0x92, 0x8d,
- 0x78, 0x04, 0x4a, 0x71,
- 0x94, 0x66, 0x83, 0xc1,
- 0x82, 0x31, 0x0a, 0xa8,
- 0x0c, 0xa4, 0x82, 0x51,
- 0x8d, 0x3d, 0xfa, 0x80,
- 0xa3, 0xcd, 0xf8, 0x95,
- 0x81, 0x01, 0xf6, 0xc5,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x90, 0x1e, 0xf0,
- 0xe0, 0x84, 0x1e, 0x75,
- 0xa7, 0x4e, 0x9d, 0x5e,
- 0xaf, 0x2e, 0xa1, 0x3e,
- 0x9e, 0x14, 0xa9, 0x1e,
- 0xe0, 0x20, 0x0e, 0x05,
- 0xe0, 0x8c, 0x1e, 0x85,
- 0xe0, 0x88, 0x1e, 0x65,
- 0xe0, 0x80, 0x1e, 0xa5,
- 0x82, 0x0b, 0x25, 0x0e,
- 0x47, 0xf8, 0xad, 0x1e,
- 0x1f, 0x0e, 0xe8, 0x14,
- 0x0e, 0x05, 0x83, 0xc1,
- 0x4c, 0x05, 0xe0, 0x18,
- 0x0e, 0x09, 0xeb, 0x54,
- 0xdc, 0x34, 0xe0, 0x58,
- 0x00, 0x60, 0x31, 0x0e,
- 0xc0, 0x0b, 0x65, 0x41,
- 0x9e, 0x48, 0xab, 0x0e,
- 0xe0, 0x20, 0x0e, 0x1b,
- 0x5c, 0x58, 0x9c, 0x28,
- 0x4c, 0x35, 0xa9, 0xcf,
- 0x4c, 0x21, 0xeb, 0x50,
- 0xc0, 0x02, 0x6d, 0x69,
- 0x04, 0xc4, 0x1e, 0x04,
- 0x4c, 0x13, 0xe8, 0x94,
- 0xc0, 0x01, 0x66, 0xb1,
- 0x6d, 0x6d, 0x4c, 0x41,
- 0x4c, 0x51, 0xc0, 0x02,
- 0xc0, 0x02, 0x6d, 0x71,
- 0xe8, 0x14, 0x4b, 0x28,
- 0x60, 0x18, 0x0e, 0x05,
- 0x0e, 0x29, 0x80, 0x9b,
- 0x90, 0xbb, 0x60, 0x4c,
- 0xf0, 0x14, 0x56, 0x05,
- 0xe0, 0x48, 0x0e, 0x09,
- 0x14, 0x19, 0x9b, 0xae,
- 0x81, 0xa1, 0x60, 0x34,
- 0xe0, 0x90, 0x0e, 0x39,
- 0xe0, 0x94, 0x0e, 0x49,
- 0x78, 0x18, 0x56, 0x01,
- 0xe7, 0xf4, 0x03, 0x0a,
- 0x78, 0x10, 0x56, 0x31,
- 0x00, 0x10, 0x81, 0x01,
- 0x02, 0x70, 0x04, 0x04,
- 0x56, 0x41, 0xe4, 0x60,
- 0x90, 0x4b, 0x78, 0x0c,
- 0xf8, 0x14, 0x56, 0x21,
- 0xe0, 0x1c, 0x0e, 0x35,
- 0x50, 0x01, 0xa3, 0x1e,
- 0x99, 0x01, 0x60, 0x48,
- 0x50, 0xa1, 0xac, 0x06,
- 0x50, 0xa1, 0xe0, 0x54,
- 0xab, 0x04, 0xe0, 0x58,
- 0xb1, 0x24, 0xad, 0x14,
- 0xef, 0xe0, 0x74, 0x68,
- 0x8d, 0x51, 0x21, 0x0b,
- 0x2f, 0xc4, 0x90, 0xa5,
- 0xb1, 0x14, 0x80, 0xab,
- 0x64, 0x01, 0x00, 0x60,
- 0x04, 0x70, 0x40, 0x09,
- 0x01, 0x65, 0xe4, 0xa0,
- 0x49, 0x44, 0x82, 0x3b,
- 0xec, 0x04, 0x06, 0x30,
- 0xa1, 0x3b, 0xc1, 0x4e,
- 0x1e, 0x05, 0xfe, 0x75,
- 0xa1, 0xab, 0x60, 0x90,
- 0x9d, 0x0e, 0x96, 0xd5,
- 0xe0, 0xa4, 0x18, 0x09,
- 0x12, 0xc5, 0xa1, 0x0b,
- 0x84, 0x60, 0x12, 0x80,
- 0x64, 0x60, 0x12, 0x80,
- 0xe4, 0x80, 0x02, 0xc0,
- 0x64, 0xe0, 0x04, 0xc0,
- 0xe5, 0xf0, 0x06, 0xc0,
- 0x64, 0x01, 0x00, 0x60,
- 0x08, 0x60, 0x40, 0x09,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0x01, 0x0a, 0x60,
- 0x18, 0x60, 0x40, 0x04,
- 0xc0, 0x06, 0x67, 0x01,
- 0x8d, 0xbe, 0x8f, 0x9e,
- 0x89, 0x5e, 0x8b, 0xce,
- 0xfc, 0x6e, 0xfe, 0x4e,
- 0xb1, 0x04, 0xbe, 0x0e,
- 0xa5, 0x54, 0xa7, 0x44,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xef, 0xe8, 0x72, 0x08,
- 0x80, 0xab, 0x31, 0x14,
- 0xa1, 0xab, 0x2f, 0xc4,
- 0x05, 0xe5, 0x88, 0xa5,
- 0xaf, 0xc4, 0x95, 0x51,
- 0xe0, 0x70, 0x18, 0x09,
- 0xee, 0x45, 0xa1, 0x0b,
- 0xe0, 0x74, 0x18, 0x09,
- 0x96, 0xf5, 0xa3, 0x0b,
- 0xa1, 0x14, 0xa3, 0x04,
- 0x00, 0x34, 0x9d, 0x24,
- 0xe4, 0x40, 0x00, 0xc0,
- 0xa0, 0x11, 0x46, 0x54,
- 0xfc, 0x2e, 0xfe, 0x6e,
- 0x3c, 0x1e, 0xbe, 0x0e,
- 0x29, 0x04, 0x92, 0x1b,
- 0x9f, 0x24, 0x98, 0x9b,
- 0x65, 0xb8, 0xb1, 0x44,
- 0x21, 0x0b, 0xef, 0xd8,
- 0x90, 0x85, 0x8f, 0x51,
- 0x92, 0xcb, 0x00, 0xab,
- 0x00, 0xc0, 0xf3, 0xd5,
- 0x96, 0x2b, 0x66, 0xf0,
- 0x6f, 0xe4, 0x43, 0xc8,
- 0x80, 0xab, 0x92, 0x3b,
- 0x82, 0x65, 0xa1, 0xab,
- 0x9d, 0x04, 0x97, 0x51,
- 0x1e, 0xf0, 0x00, 0xae,
- 0x02, 0x5e, 0xe5, 0x90,
- 0x0c, 0x0c, 0x94, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x02, 0x80, 0x27, 0x04,
- 0x04, 0x60, 0xe6, 0x70,
- 0x40, 0x09, 0x64, 0x01,
- 0x92, 0x4b, 0x96, 0x3b,
- 0xe0, 0x2c, 0x00, 0x59,
- 0xfe, 0x1e, 0xaf, 0x04,
- 0x31, 0x14, 0xa7, 0x1e,
- 0xfc, 0x6e, 0xa0, 0x01,
- 0x99, 0x2e, 0xbe, 0x2e,
- 0x8e, 0x1b, 0x3c, 0x1e,
- 0xa3, 0x24, 0x97, 0x0e,
- 0xef, 0xe0, 0x48, 0x08,
- 0x80, 0xab, 0x1d, 0x04,
- 0x99, 0x51, 0x21, 0xab,
- 0x23, 0x9e, 0xf6, 0x95,
- 0x64, 0xd1, 0x0e, 0x80,
- 0x2b, 0x04, 0xc0, 0x02,
- 0x2d, 0x14, 0x96, 0x2b,
- 0xa7, 0x34, 0x8e, 0x4b,
- 0xef, 0xe0, 0x6d, 0x48,
- 0xa1, 0xab, 0x80, 0xab,
- 0x79, 0xc5, 0x8a, 0xa5,
- 0x12, 0x09, 0x9d, 0x51,
- 0x92, 0xcb, 0x60, 0x70,
- 0xd6, 0x05, 0xa1, 0x0b,
- 0x60, 0x58, 0x0e, 0x09,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x02,
- 0x40, 0x04, 0x66, 0x01,
- 0x67, 0x01, 0x08, 0x60,
- 0x5b, 0x78, 0xc0, 0x06,
- 0x8c, 0x1b, 0x68, 0x10,
- 0x91, 0x51, 0x21, 0x0b,
- 0xaf, 0xc4, 0xd0, 0xb5,
- 0x18, 0x09, 0xb1, 0x14,
- 0xa1, 0x0b, 0xe0, 0x70,
- 0x02, 0x0b, 0xd0, 0x45,
- 0xe4, 0xa0, 0x04, 0x70,
- 0x64, 0x01, 0x06, 0x60,
- 0x8c, 0x1b, 0x40, 0x09,
- 0xef, 0xfc, 0x65, 0xe8,
- 0x80, 0xab, 0x31, 0x14,
- 0x93, 0x51, 0x2f, 0xc4,
- 0x2d, 0x7e, 0xe9, 0x15,
- 0x66, 0x31, 0x04, 0x80,
- 0xa5, 0x74, 0xc0, 0x01,
- 0xfc, 0x2e, 0x99, 0x94,
- 0x00, 0x70, 0x2b, 0x2e,
- 0x3e, 0x9e, 0xe4, 0x40,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x96, 0x2b, 0x77, 0x17,
- 0x82, 0x03, 0x23, 0x34,
- 0x0a, 0x04, 0x2f, 0x04,
- 0x15, 0x5e, 0xe1, 0x14,
- 0x31, 0x04, 0x8e, 0x4b,
- 0xe7, 0x00, 0x02, 0x00,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xe8, 0x04, 0x48, 0x08,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0a, 0xf6, 0x60, 0x35,
- 0x2f, 0x04, 0xc0, 0x00,
- 0xad, 0x24, 0x96, 0x3b,
- 0x00, 0x09, 0xa1, 0x14,
- 0x8f, 0x2e, 0xe3, 0x04,
- 0xb0, 0x11, 0x2b, 0x24,
- 0x8d, 0x2e, 0xa3, 0x44,
- 0x8b, 0x6e, 0xb1, 0x24,
- 0xfe, 0x2e, 0x89, 0x9e,
- 0x9f, 0x64, 0x95, 0x24,
- 0x3e, 0x7e, 0xfc, 0x2e,
- 0xbc, 0x0e, 0x8c, 0x5b,
- 0x97, 0x24, 0xa9, 0x04,
- 0xef, 0xe0, 0x4b, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0x46, 0x58, 0x75,
- 0x2f, 0x04, 0xc0, 0x00,
- 0x21, 0x74, 0x8c, 0x2b,
- 0xab, 0x64, 0x96, 0x3b,
- 0x00, 0x00, 0x2d, 0x94,
- 0x02, 0x70, 0xe7, 0x10,
- 0x8c, 0x4b, 0xe4, 0x40,
- 0x6f, 0xe0, 0x58, 0xe8,
- 0x00, 0xab, 0x92, 0x5b,
- 0x21, 0xab, 0x8e, 0x2b,
- 0x52, 0xd5, 0x92, 0x7b,
- 0xc0, 0x00, 0x0b, 0xc6,
- 0x08, 0x80, 0x2f, 0x04,
- 0xc0, 0x03, 0x64, 0x91,
- 0x64, 0x70, 0x02, 0x20,
- 0x16, 0x2b, 0x84, 0x9b,
- 0x25, 0x4e, 0x8e, 0x3b,
- 0xe7, 0x20, 0x00, 0x00,
- 0xef, 0xf4, 0x78, 0x28,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0xd6, 0x4e, 0x75,
- 0x12, 0x0b, 0xc0, 0x00,
- 0x25, 0x34, 0x96, 0x1b,
- 0x4c, 0xb8, 0x8e, 0x2b,
- 0x80, 0xab, 0xe8, 0x04,
- 0x4c, 0x15, 0xa1, 0xab,
- 0xc0, 0x00, 0x0b, 0xe6,
- 0x12, 0x15, 0xaf, 0x74,
- 0x12, 0x2b, 0xe0, 0x10,
- 0xa9, 0x94, 0xe0, 0x3c,
- 0x0e, 0x0b, 0xb1, 0x44,
- 0x0e, 0x39, 0xe1, 0x88,
- 0x91, 0x9e, 0xe3, 0x20,
- 0x8d, 0x2e, 0x8f, 0x4e,
- 0x9f, 0x14, 0x8b, 0x1e,
- 0x00, 0x70, 0x09, 0x0e,
- 0xa3, 0x44, 0xe7, 0x30,
- 0x9b, 0x14, 0xfe, 0x1e,
- 0xa5, 0x34, 0xfc, 0x3e,
- 0x04, 0x10, 0x27, 0x54,
- 0x3e, 0x3e, 0xe4, 0x40,
- 0xbc, 0x6e, 0x96, 0x3b,
- 0xef, 0xf8, 0x43, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x5f, 0xfc, 0x30, 0xb8,
- 0xc0, 0x00, 0x0b, 0xf6,
- 0x63, 0x80, 0x0e, 0x19,
- 0x64, 0x50, 0x08, 0x80,
- 0x12, 0x0b, 0xc0, 0x04,
- 0xa5, 0x34, 0x96, 0x2b,
- 0xef, 0xfc, 0x5c, 0x68,
- 0x4a, 0x06, 0x00, 0xab,
- 0xdf, 0xa5, 0xe0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xab, 0x19, 0x14,
- 0x84, 0x9b, 0x15, 0x74,
- 0x86, 0x6b, 0x3e, 0x5e,
- 0x88, 0xbb, 0x7c, 0x1e,
- 0x60, 0x40, 0x12, 0x89,
- 0x47, 0xf8, 0x94, 0x1b,
- 0x8e, 0x3b, 0x68, 0x00,
- 0xe0, 0x44, 0x12, 0x09,
- 0x82, 0xe5, 0xa6, 0x0d,
- 0x86, 0x65, 0xa9, 0x0b,
- 0x8c, 0x25, 0xad, 0x0b,
- 0xaf, 0x0b, 0x7c, 0xb4,
- 0x10, 0x0b, 0x9a, 0x15,
- 0x61, 0xf8, 0x8e, 0x1b,
- 0xa3, 0x0d, 0xef, 0xd8,
- 0x8d, 0x15, 0x8c, 0x25,
- 0x8e, 0x45, 0xa5, 0x0b,
- 0xa7, 0x0b, 0x7c, 0xb4,
- 0x02, 0x60, 0x96, 0x95,
- 0x90, 0x0b, 0x64, 0x20,
- 0x6f, 0xdc, 0x41, 0x08,
- 0xa3, 0x0d, 0x8e, 0x2b,
- 0x8b, 0x35, 0x82, 0x25,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xd8, 0x60, 0xa8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x92, 0x95,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x61, 0xa8,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x69, 0xb8, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x92, 0x1b, 0x14, 0x0b,
- 0x6f, 0xd8, 0x6d, 0x68,
- 0x87, 0xb5, 0x8c, 0x2b,
- 0x64, 0x20, 0x02, 0x60,
- 0x7e, 0xf8, 0x90, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xd8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x8c, 0x55,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x60, 0x08,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x6a, 0x78, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x0e, 0x09, 0x85, 0x65,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x84, 0xe5, 0xa1, 0x0b,
- 0x67, 0xfd, 0x0e, 0x15,
- 0x97, 0x04, 0xc0, 0x01,
- 0x6f, 0xc9, 0x0e, 0x29,
- 0x0e, 0x39, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x60, 0x09, 0x0e, 0x4b,
- 0xc2, 0x1e, 0xc0, 0x03,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x58, 0x56, 0x21,
- 0xe0, 0x5c, 0x56, 0x31,
- 0xe0, 0x30, 0x56, 0x43,
- 0x6f, 0xd8, 0x5b, 0x48,
- 0x7c, 0xb4, 0x8e, 0x0b,
- 0x80, 0xb5, 0xa3, 0x0d,
- 0x8e, 0x0b, 0x3e, 0x14,
- 0xef, 0xd8, 0x63, 0x48,
- 0x98, 0xf1, 0x01, 0x01,
- 0x40, 0x16, 0x2c, 0x0e,
- 0x2e, 0x0e, 0xe0, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x6b, 0x02, 0x8b,
- 0x86, 0x7b, 0x60, 0x28,
- 0xa0, 0x08, 0xa2, 0x18,
- 0xe8, 0x10, 0x62, 0x68,
- 0x60, 0x58, 0x10, 0x19,
- 0xa2, 0x04, 0x80, 0x2b,
- 0x66, 0x78, 0xe0, 0x34,
- 0xc8, 0x17, 0x68, 0x10,
- 0xe0, 0x44, 0x0c, 0x19,
- 0x9c, 0x55, 0xa5, 0x1b,
- 0x4e, 0x05, 0xe0, 0x14,
- 0xc0, 0x01, 0x67, 0xdd,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0x98, 0x34, 0x9a, 0x24,
- 0x67, 0xe1, 0x4e, 0x15,
- 0x0c, 0x19, 0xc0, 0x01,
- 0x4e, 0x03, 0xe0, 0x38,
- 0xc0, 0x02, 0x6f, 0xe1,
- 0xe0, 0x54, 0x0c, 0x09,
- 0x67, 0xe9, 0x4e, 0x25,
- 0x4e, 0x35, 0xc0, 0x01,
- 0xc0, 0x01, 0x67, 0xed,
- 0x6f, 0xc9, 0x4e, 0x11,
- 0xa1, 0x0b, 0x40, 0x05,
- 0x60, 0x3c, 0x0c, 0x19,
- 0x0c, 0x29, 0x81, 0x01,
- 0x0c, 0x39, 0xe0, 0x40,
- 0x4e, 0x11, 0xe0, 0x48,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x6f, 0xd1, 0x4e, 0x01,
- 0x4e, 0x21, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd5,
- 0x6f, 0xd9, 0x4e, 0x31,
- 0xb0, 0xa5, 0xc0, 0x05,
- 0x60, 0x51, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x01,
- 0xc0, 0x03, 0x64, 0x91,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x35,
- 0xf0, 0x88, 0x48, 0x12,
- 0x4e, 0x35, 0x84, 0x63,
- 0x40, 0x01, 0x67, 0xf9,
- 0xe0, 0x84, 0x06, 0x04,
- 0x60, 0x60, 0x08, 0x45,
- 0x06, 0x5b, 0x82, 0x33,
- 0x80, 0x13, 0x61, 0x20,
- 0x68, 0x01, 0x4e, 0x45,
- 0x83, 0x41, 0x40, 0x01,
- 0x60, 0x09, 0x4e, 0x53,
- 0x0c, 0x25, 0xc0, 0x03,
- 0x06, 0x3b, 0xe1, 0xbc,
- 0x4e, 0x41, 0xe1, 0x50,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x67, 0xfd, 0x4e, 0x25,
- 0x4e, 0x33, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x0d,
- 0xe3, 0x00, 0x02, 0x09,
- 0x60, 0x21, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x30,
- 0xc0, 0x06, 0x60, 0x25,
- 0xe3, 0x60, 0x02, 0x09,
- 0x60, 0x29, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x90,
- 0xc0, 0x06, 0x60, 0x2d,
- 0x0c, 0x29, 0x91, 0x45,
- 0x06, 0x70, 0x60, 0x40,
- 0xe0, 0x14, 0xe4, 0x70,
- 0xe0, 0x10, 0x4e, 0x05,
- 0x08, 0x24, 0x1a, 0x04,
- 0x4e, 0x15, 0xe0, 0x88,
- 0x86, 0x43, 0x60, 0x14,
- 0x60, 0x3c, 0x0e, 0x59,
- 0xe0, 0x84, 0x10, 0x24,
- 0x8c, 0x0b, 0x10, 0x0e,
- 0x70, 0x15, 0x00, 0x15,
- 0x86, 0x83, 0x40, 0x02,
- 0x60, 0x54, 0x0c, 0xc9,
- 0x44, 0x5a, 0x84, 0x33,
- 0x48, 0x15, 0xe6, 0x8a,
- 0x00, 0x1b, 0xe1, 0x00,
- 0xc0, 0x04, 0x78, 0x11,
- 0x78, 0x19, 0x00, 0x49,
- 0x50, 0x13, 0xc0, 0x08,
- 0x42, 0x52, 0x64, 0x00,
- 0x46, 0x41, 0xfb, 0xb0,
- 0x58, 0x72, 0x6a, 0x00,
- 0x00, 0x49, 0xf0, 0x88,
- 0xc0, 0x08, 0x78, 0x15,
- 0xec, 0x00, 0x46, 0x11,
- 0xeb, 0x00, 0x46, 0x41,
- 0x78, 0x11, 0x00, 0x49,
- 0x46, 0x41, 0xc0, 0x08,
- 0x08, 0x24, 0x6d, 0x00,
- 0x00, 0x59, 0xe0, 0x84,
- 0x40, 0x08, 0x78, 0x09,
- 0x0e, 0x43, 0xc4, 0x27,
- 0x04, 0x70, 0x84, 0x73,
- 0x40, 0x07, 0x67, 0x71,
- 0x67, 0x71, 0x08, 0x40,
- 0x46, 0x51, 0xc0, 0x11,
- 0x06, 0xc0, 0x6e, 0x00,
- 0xc0, 0x13, 0x67, 0x70,
- 0x81, 0x51, 0x07, 0x65,
- 0x7c, 0x14, 0x00, 0xc9,
- 0x64, 0x90, 0x10, 0x60,
- 0x0e, 0xc4, 0xc0, 0x03,
- 0x10, 0x95, 0xe0, 0x88,
- 0x54, 0x82, 0x7c, 0x1c,
- 0x8c, 0x73, 0xf0, 0x9c,
- 0x78, 0x01, 0x44, 0x95,
- 0x12, 0xc4, 0x40, 0x02,
- 0x14, 0xa5, 0xe0, 0x84,
- 0x90, 0x93, 0x60, 0x60,
- 0x61, 0x20, 0x12, 0xbb,
- 0x44, 0xa5, 0x98, 0x83,
- 0x48, 0xb3, 0xe4, 0x00,
- 0xc0, 0x02, 0x78, 0x01,
- 0xe1, 0xbc, 0x0e, 0x75,
- 0xe1, 0x50, 0x12, 0x9b,
- 0x4e, 0x32, 0x49, 0x7e,
- 0x51, 0x9c, 0xf0, 0x94,
- 0x10, 0xc9, 0x82, 0x51,
- 0x9c, 0xc6, 0xe3, 0x00,
- 0xe3, 0x30, 0x10, 0xc9,
- 0xe4, 0x00, 0x4e, 0xc1,
- 0xe3, 0x60, 0x10, 0xc9,
- 0xe8, 0x00, 0x4e, 0xc1,
- 0xe3, 0x90, 0x10, 0xc9,
- 0xec, 0x00, 0x4e, 0xc1,
- 0xf2, 0x75, 0x83, 0x5d,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x84, 0xbb, 0x0b, 0x1e,
- 0x80, 0xab, 0x2b, 0x14,
- 0x81, 0x81, 0x3c, 0x5e,
- 0x86, 0x6b, 0x3e, 0x4e,
- 0x8d, 0x1e, 0xae, 0x04,
- 0xaf, 0x74, 0xa5, 0x14,
- 0xfe, 0x1e, 0xa7, 0x94,
- 0x4f, 0xb8, 0x8f, 0x8e,
- 0x16, 0x39, 0xe8, 0x10,
- 0x98, 0x1a, 0xe0, 0x94,
- 0xa5, 0x3b, 0x9a, 0x2a,
- 0xe0, 0x10, 0x52, 0x13,
- 0xe0, 0x14, 0x52, 0x23,
- 0x09, 0x0e, 0x8a, 0x55,
- 0x74, 0x01, 0x00, 0x0e,
- 0xbe, 0x7e, 0xc0, 0x07,
- 0x83, 0x01, 0x26, 0x0e,
- 0x85, 0x01, 0x7c, 0x0e,
- 0x2d, 0x64, 0xa1, 0x8c,
- 0xfa, 0x80, 0x02, 0x04,
- 0x94, 0x0b, 0x29, 0x74,
- 0x8d, 0x34, 0xfe, 0x24,
- 0xe8, 0x00, 0x4d, 0x28,
- 0x60, 0x94, 0x16, 0x19,
- 0x12, 0x2b, 0x94, 0x0b,
- 0x49, 0x98, 0x8c, 0x3b,
- 0x0b, 0x64, 0xe8, 0x00,
- 0x16, 0x29, 0x94, 0x0b,
- 0x8e, 0x4b, 0x60, 0x90,
- 0xe0, 0x94, 0x16, 0x19,
- 0x68, 0x00, 0x4e, 0x88,
- 0x8d, 0x14, 0x8c, 0x3b,
- 0x89, 0x04, 0xbe, 0x74,
- 0x8f, 0x05, 0xfc, 0x94,
- 0x16, 0x19, 0xa3, 0x34,
- 0xcc, 0x28, 0xe0, 0x90,
- 0x82, 0x95, 0xc5, 0x1d,
- 0xc5, 0x1d, 0xce, 0x28,
- 0x00, 0x14, 0x1e, 0x65,
- 0x80, 0x00, 0x12, 0x26,
- 0x00, 0x18, 0x1e, 0x15,
- 0x80, 0x00, 0x50, 0xc6,
- 0x09, 0x0e, 0x96, 0xe5,
- 0xf0, 0x84, 0x40, 0x32,
- 0x60, 0x20, 0x00, 0x19,
- 0xe4, 0x70, 0x04, 0xf0,
- 0xe1, 0x20, 0x00, 0x09,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x80, 0x02, 0xf0,
- 0x60, 0x84, 0x5e, 0x01,
- 0x59, 0x78, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x00, 0x8b, 0x80, 0xe5,
- 0x8b, 0x64, 0x87, 0x91,
- 0x89, 0x04, 0x8d, 0x14,
- 0x0f, 0x04, 0x89, 0x55,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x04,
- 0x0c, 0x13, 0xc4, 0x07,
- 0x02, 0x1b, 0x80, 0x63,
- 0x0c, 0x05, 0xe2, 0x48,
- 0x52, 0x13, 0xe0, 0x24,
- 0x02, 0xf0, 0x60, 0x28,
- 0xa6, 0x0e, 0xe4, 0x80,
- 0x57, 0xb8, 0xbe, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x8b, 0x11, 0x21, 0x0b,
- 0x88, 0xf5, 0xfc, 0x1e,
- 0x04, 0xf0, 0x0f, 0x04,
- 0xfe, 0x14, 0xe4, 0x70,
- 0x02, 0x15, 0xc4, 0x07,
- 0x8c, 0x03, 0x60, 0x10,
- 0xe0, 0x24, 0x00, 0x05,
- 0x02, 0xf0, 0x02, 0x03,
- 0xe6, 0x0e, 0xe4, 0x80,
- 0x56, 0x58, 0xbc, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x8c, 0x1b, 0x0f, 0x04,
- 0x04, 0xf0, 0x21, 0x64,
- 0xc2, 0x07, 0xe4, 0x70,
- 0x02, 0xf0, 0x02, 0x03,
- 0x00, 0x0b, 0xe4, 0x80,
- 0x52, 0x03, 0xe0, 0x18,
- 0x8c, 0x0b, 0x60, 0x3c,
- 0xe8, 0x00, 0x55, 0x28,
- 0x84, 0x65, 0xa1, 0x0b,
- 0x80, 0x8b, 0x0b, 0x64,
- 0x8b, 0x91, 0x0d, 0x14,
- 0x02, 0x1b, 0x89, 0x04,
- 0x44, 0x18, 0xe1, 0xa8,
- 0x4c, 0x03, 0xef, 0xe0,
- 0x90, 0x0b, 0x60, 0x18,
- 0xc8, 0xf1, 0x1c, 0x8e,
- 0x0c, 0x0c, 0x9e, 0x9e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xbe, 0x7e, 0x8f, 0x04,
- 0x80, 0x63, 0xc2, 0x07,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0xe0, 0x38, 0x52, 0x03,
- 0xe0, 0x94, 0x16, 0x09,
- 0xc1, 0xc3, 0xeb, 0xb5,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x3b, 0x06, 0x6b,
- 0x44, 0x06, 0x02, 0x7b,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x57, 0xb8, 0x86, 0x1b,
- 0xa6, 0x7d, 0xef, 0xd0,
- 0xa9, 0x7b, 0x82, 0x25,
- 0xad, 0x7b, 0x80, 0xa5,
- 0xaf, 0x7b, 0x82, 0x25,
- 0x01, 0x85, 0x86, 0x95,
- 0xa5, 0x7b, 0x81, 0x01,
- 0xa7, 0x7b, 0x82, 0x85,
- 0x81, 0x01, 0x84, 0xd5,
- 0x4c, 0x03, 0xda, 0x0e,
- 0x02, 0x06, 0x60, 0x28,
- 0x4c, 0x13, 0xe1, 0x00,
- 0x81, 0xd5, 0xe0, 0x38,
- 0xda, 0x0e, 0x81, 0x01,
- 0xe0, 0x28, 0x4c, 0x03,
- 0x60, 0x30, 0x4c, 0x03,
- 0xe1, 0x00, 0x00, 0x06,
- 0xe0, 0x38, 0x4c, 0x03,
- 0xe0, 0x3c, 0x4c, 0x03,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0x44, 0x46, 0x02, 0x8b,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x54, 0x98, 0x8e, 0x1b,
- 0xad, 0x8b, 0xef, 0xd0,
- 0xe0, 0x0c, 0x10, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x80, 0x00, 0x00, 0x06,
- 0x80, 0x70, 0x4c, 0x01,
- 0xa5, 0x8b, 0x82, 0xe5,
- 0x01, 0x21, 0x82, 0xb5,
- 0xe4, 0x80, 0x00, 0x60,
- 0x60, 0x70, 0x4c, 0x21,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x0c, 0x0c, 0x99, 0x21,
- 0x13, 0x18, 0xf2, 0x0c,
- 0x0c, 0x0c, 0xff, 0xd0,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x8c, 0x35, 0xa5, 0x1b,
- 0x6f, 0xd1, 0x06, 0x09,
- 0x06, 0x19, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd9,
- 0x6f, 0xc9, 0x06, 0x29,
- 0x06, 0x59, 0xc0, 0x05,
- 0x40, 0x05, 0x6f, 0xcd,
- 0x48, 0x11, 0xa1, 0x0b,
- 0x48, 0x21, 0xe0, 0x34,
- 0x48, 0x51, 0xe0, 0x20,
- 0x48, 0x01, 0xe0, 0x24,
- 0x9a, 0xc5, 0xe0, 0x30,
- 0x67, 0xf9, 0x06, 0x05,
- 0x06, 0x1b, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x09,
- 0x60, 0x2d, 0x06, 0x29,
- 0x48, 0x05, 0xc0, 0x06,
- 0x48, 0x13, 0xe0, 0x10,
- 0x06, 0x05, 0xe0, 0xe0,
- 0xc0, 0x01, 0x68, 0x01,
- 0x60, 0x0d, 0x06, 0x1b,
- 0x48, 0x21, 0xc0, 0x03,
- 0x48, 0x05, 0xe2, 0x80,
- 0x48, 0x13, 0xe0, 0x40,
- 0x8b, 0x45, 0xe1, 0x10,
- 0x60, 0x3c, 0x06, 0x59,
- 0xf0, 0x88, 0x40, 0x32,
- 0x6e, 0x70, 0x00, 0x19,
- 0xe6, 0x80, 0x18, 0x40,
- 0x81, 0x71, 0x01, 0x61,
- 0xe0, 0x34, 0x48, 0x11,
- 0xea, 0x70, 0x00, 0x19,
- 0xe0, 0x20, 0x48, 0x11,
- 0xeb, 0x70, 0x00, 0x19,
- 0xe0, 0x24, 0x48, 0x11,
- 0xe6, 0x8a, 0x42, 0x5a,
- 0xec, 0x70, 0x00, 0x09,
- 0x60, 0x84, 0x04, 0x14,
- 0xe0, 0x88, 0x0a, 0x14,
- 0x10, 0x02, 0x86, 0x23,
- 0x00, 0x10, 0x6c, 0x30,
- 0xc0, 0x16, 0x67, 0x70,
- 0x67, 0x71, 0x02, 0x20,
- 0x04, 0x50, 0x40, 0x0f,
- 0xc0, 0x0b, 0x67, 0x71,
- 0x60, 0x30, 0x48, 0x81,
- 0xe5, 0x00, 0x0a, 0x40,
- 0x02, 0x9b, 0x85, 0x35,
- 0x50, 0x32, 0x7c, 0x18,
- 0x10, 0x85, 0xf0, 0x88,
- 0x40, 0x04, 0x78, 0x01,
- 0xf0, 0x98, 0x54, 0xc2,
- 0x78, 0x60, 0x54, 0x93,
- 0xf0, 0x98, 0x52, 0x12,
- 0x78, 0x30, 0x4a, 0x85,
- 0x06, 0x85, 0x84, 0x61,
- 0x88, 0x21, 0x7c, 0x08,
- 0xe4, 0x00, 0x12, 0x9b,
- 0x50, 0x32, 0x55, 0x8e,
- 0x54, 0x93, 0xf0, 0x9c,
- 0x52, 0xc2, 0x78, 0x30,
- 0x10, 0x89, 0xf0, 0x9c,
- 0x82, 0x71, 0x7c, 0x00,
- 0x08, 0x89, 0xa4, 0x86,
- 0x10, 0x84, 0xe0, 0x30,
- 0x91, 0x7d, 0xfa, 0x80,
- 0x0c, 0x4c, 0xf6, 0x75,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x8c, 0x04, 0x0c,
- 0x60, 0x38, 0x46, 0x11,
- 0x46, 0x21, 0x81, 0x51,
- 0x04, 0x30, 0x60, 0x3c,
- 0xc0, 0x01, 0x64, 0x70,
- 0x60, 0x18, 0x46, 0x53,
- 0x64, 0x70, 0x18, 0x30,
- 0x0c, 0x30, 0xc0, 0x02,
- 0x40, 0x02, 0x66, 0x71,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x81, 0x71, 0x03, 0x25,
- 0x79, 0x00, 0x44, 0x55,
- 0xf0, 0x9c, 0x50, 0x62,
- 0xf1, 0x5c, 0xc9, 0x5e,
- 0x63, 0x00, 0x50, 0x71,
- 0xa0, 0x56, 0x82, 0x71,
- 0xe1, 0x00, 0x50, 0x51,
- 0xe2, 0x00, 0x50, 0x51,
- 0xe4, 0x00, 0x50, 0x11,
- 0xe1, 0x00, 0x0e, 0x0a,
- 0x04, 0x30, 0xfa, 0xd5,
- 0x40, 0x16, 0x67, 0x71,
- 0xe0, 0x10, 0x18, 0x06,
- 0x49, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x18, 0xc0,
- 0xfe, 0x95, 0xa1, 0xcb,
- 0x67, 0xf1, 0x46, 0x55,
- 0x04, 0x06, 0x40, 0x01,
- 0x46, 0x55, 0xef, 0xf0,
- 0xc0, 0x01, 0x67, 0xed,
- 0x67, 0xe9, 0x46, 0x55,
- 0x46, 0x11, 0xc0, 0x01,
- 0x40, 0x05, 0x6f, 0xd9,
- 0x46, 0x23, 0x88, 0x1b,
- 0xc0, 0x02, 0x6f, 0xe9,
- 0x60, 0x2d, 0x46, 0x51,
- 0x0c, 0x0c, 0xc0, 0x06,
- 0x24, 0x38, 0xf0, 0x8c,
- 0xc1, 0xc3, 0xff, 0xd4,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0xe0, 0x18, 0x00, 0x79,
- 0xe0, 0x28, 0x00, 0x39,
- 0xe0, 0x20, 0x00, 0xc9,
- 0x08, 0x70, 0x06, 0x68,
- 0x4a, 0x3a, 0xec, 0x04,
- 0x00, 0x49, 0xe6, 0x92,
- 0x00, 0x89, 0xe0, 0x14,
- 0x52, 0x52, 0x60, 0x1c,
- 0x00, 0x59, 0xf0, 0xb0,
- 0x81, 0x01, 0x60, 0x24,
- 0xd2, 0x6d, 0x04, 0x18,
- 0x40, 0xc6, 0x08, 0x0e,
- 0x8e, 0x55, 0xe0, 0x00,
- 0xec, 0x04, 0x12, 0x40,
- 0xe6, 0xa6, 0x52, 0x5a,
- 0xd2, 0x1d, 0x90, 0x93,
- 0xd9, 0x6d, 0x8c, 0x75,
- 0xd1, 0x1d, 0x8c, 0x35,
- 0xa1, 0x3b, 0x8a, 0xf5,
- 0xa1, 0x5b, 0x8a, 0xa5,
- 0x52, 0xc2, 0x8a, 0x65,
- 0x12, 0x8a, 0xf9, 0xa0,
- 0x88, 0xd5, 0xf0, 0x00,
- 0x88, 0x95, 0xf0, 0x7d,
- 0x88, 0x55, 0xf4, 0x4d,
- 0xec, 0x08, 0x12, 0x40,
- 0xf4, 0xf4, 0x13, 0x0a,
- 0xe5, 0x7d, 0x86, 0xb5,
- 0x4e, 0x32, 0x86, 0x75,
- 0xa2, 0x7f, 0xf9, 0x94,
- 0x0e, 0x8a, 0xac, 0x7f,
- 0x84, 0x95, 0xf0, 0x00,
- 0x4e, 0x1a, 0xb0, 0x13,
- 0xa1, 0x7b, 0xe1, 0x16,
- 0xb8, 0x63, 0x82, 0xf5,
- 0xe1, 0x0e, 0x58, 0x6a,
- 0x82, 0x55, 0xa1, 0xcb,
- 0xe0, 0x0e, 0x40, 0x6a,
- 0xe0, 0x16, 0x42, 0x1a,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x08, 0x0e, 0x82, 0x03,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x80, 0xab, 0x3d, 0x04,
- 0x81, 0x91, 0x25, 0x5e,
- 0x84, 0x8b, 0x15, 0x4e,
- 0x16, 0x30, 0x13, 0x0e,
- 0x3b, 0x04, 0xe5, 0x20,
- 0xe0, 0x08, 0x0d, 0x06,
- 0x81, 0x71, 0x21, 0x1e,
- 0xa3, 0x0e, 0xa9, 0x9e,
- 0x27, 0x0e, 0xb9, 0x04,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1b, 0x0e, 0xc0, 0x02,
- 0x66, 0x01, 0x00, 0xa0,
- 0x19, 0x0e, 0xc0, 0x04,
- 0x67, 0x01, 0x00, 0xa0,
- 0x17, 0x0e, 0xc0, 0x06,
- 0x64, 0x01, 0x00, 0xa0,
- 0x1f, 0x0e, 0xc0, 0x09,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1d, 0x0e, 0xc0, 0x0b,
- 0x8d, 0x85, 0x81, 0x01,
- 0x98, 0x55, 0xa1, 0x0b,
- 0x78, 0x90, 0x16, 0x03,
- 0xac, 0x12, 0x94, 0x5b,
- 0xa7, 0x34, 0xa5, 0x24,
- 0x72, 0xf8, 0xa3, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa1, 0x34, 0x94, 0xf5,
- 0x16, 0x03, 0x9d, 0x44,
- 0xac, 0x12, 0xf8, 0x90,
- 0xe0, 0x30, 0x16, 0x23,
- 0x8b, 0x4e, 0x8c, 0x38,
- 0xa7, 0x54, 0x9f, 0x44,
- 0x97, 0x44, 0x89, 0x4e,
- 0x99, 0x44, 0xfe, 0x4e,
- 0x9b, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x74, 0x38, 0xa5, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0x93, 0x44, 0x8e, 0xf5,
- 0x16, 0x03, 0xa1, 0x34,
- 0x2c, 0x12, 0xf8, 0x90,
- 0xf0, 0xa4, 0x4a, 0x42,
- 0x60, 0x30, 0x16, 0x23,
- 0x8e, 0x38, 0x8c, 0x43,
- 0xe0, 0x51, 0x0f, 0x5e,
- 0x09, 0x4e, 0x8b, 0x5e,
- 0xe5, 0x40, 0x08, 0xf0,
- 0x9d, 0x44, 0xfe, 0x4e,
- 0xa7, 0x54, 0x91, 0x5e,
- 0x9f, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x79, 0x78, 0x95, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa9, 0x04, 0x88, 0x35,
- 0x11, 0x04, 0x8f, 0xc4,
- 0x00, 0x34, 0xa3, 0x0b,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x58, 0x35,
- 0xc0, 0x60, 0x58, 0x35,
- 0xa1, 0x44, 0x84, 0xb5,
- 0x16, 0x03, 0x93, 0x24,
- 0x50, 0x58, 0xf8, 0x90,
- 0xe5, 0x80, 0x08, 0xc0,
- 0x04, 0x23, 0xac, 0x12,
- 0x89, 0x4e, 0xfc, 0x18,
- 0xfe, 0xce, 0xa7, 0x44,
- 0xbe, 0x4e, 0xfc, 0xae,
- 0x3c, 0x4e, 0x95, 0x44,
- 0x6b, 0xd8, 0x83, 0x41,
- 0x02, 0x71, 0xef, 0xd8,
- 0x04, 0xb1, 0x88, 0x91,
- 0xa2, 0x18, 0x84, 0x61,
- 0xe4, 0xf5, 0x83, 0x7d,
- 0xe5, 0x50, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x84, 0xab, 0x06, 0xb8,
- 0x60, 0x10, 0x00, 0x23,
- 0x02, 0x14, 0x99, 0x41,
- 0x00, 0x0b, 0x81, 0x51,
- 0x3e, 0x0e, 0xe0, 0x14,
- 0xe7, 0x60, 0x00, 0x30,
- 0x41, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x08, 0x40,
- 0xfe, 0x95, 0xa1, 0x4b,
- 0x6c, 0x04, 0x00, 0x10,
- 0x7f, 0xfc, 0x49, 0xee,
- 0x3e, 0x04, 0xcf, 0xff,
- 0xe4, 0x10, 0x41, 0x4a,
- 0xe0, 0x04, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xec, 0x04, 0x00, 0x00,
- 0x6f, 0xf9, 0x01, 0x5a,
- 0x40, 0xc6, 0x40, 0x0f,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x17, 0x5a, 0xed, 0x80,
- 0x42, 0x0a, 0xe4, 0x30,
- 0x00, 0x06, 0xed, 0x80,
- 0xbc, 0x0e, 0xc0, 0x00,
- 0x80, 0x00, 0x13, 0xc8,
- 0x60, 0x0a, 0x40, 0x2e,
- 0xe7, 0x60, 0x12, 0x30,
- 0xe6, 0xa0, 0x10, 0x30,
- 0xe5, 0x02, 0x44, 0x1a,
- 0xe5, 0x82, 0x48, 0x1a,
- 0x02, 0x24, 0x09, 0x2e,
- 0x7e, 0x4e, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x44,
- 0xc3, 0x47, 0x20, 0x1f,
- 0x8b, 0x4e, 0xfc, 0x1e,
- 0x20, 0x12, 0xa5, 0x35,
- 0xa8, 0x34, 0x81, 0x01,
- 0x40, 0x1a, 0xa0, 0x1d,
- 0x42, 0x3a, 0xc6, 0x86,
- 0x40, 0x3a, 0xe5, 0x82,
- 0x04, 0x14, 0xe5, 0x02,
- 0x06, 0x20, 0xf6, 0x80,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x00, 0x5b, 0xe4, 0x7c,
- 0xfb, 0x8c, 0x48, 0x22,
- 0x6c, 0x7c, 0x06, 0x42,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x68, 0x8c, 0x18, 0x54,
- 0x4a, 0x00, 0x81, 0x51,
- 0x0c, 0x34, 0x1c, 0x00,
- 0x0e, 0x54, 0xec, 0x00,
- 0xa6, 0x43, 0x6f, 0x8c,
- 0x78, 0x9c, 0x4c, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xac, 0xcf, 0x0b, 0x64,
- 0x68, 0x90, 0x08, 0xc4,
- 0x48, 0x3b, 0xa7, 0x5f,
- 0x4d, 0x4a, 0xca, 0xcb,
- 0x4c, 0x1a, 0xe4, 0x0c,
- 0x8c, 0x3b, 0x60, 0x0c,
- 0x42, 0x0a, 0x7c, 0x64,
- 0x4d, 0x6a, 0xe5, 0x80,
- 0x42, 0x1a, 0xe4, 0x30,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x40, 0x52, 0xed, 0x80,
- 0x4e, 0x20, 0x50, 0x98,
- 0x08, 0xf5, 0xdc, 0x00,
- 0xd2, 0x8c, 0x42, 0x42,
- 0x08, 0x65, 0xa1, 0x2b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x6c, 0x04, 0x0e, 0x20,
- 0x0f, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0x02, 0x20, 0x1c, 0x00,
- 0x44, 0x72, 0xec, 0x84,
- 0x00, 0x06, 0x7b, 0x84,
- 0x02, 0x22, 0xc0, 0x00,
- 0x08, 0x04, 0xec, 0x7c,
- 0x0a, 0x14, 0x6f, 0x84,
- 0x22, 0x23, 0xec, 0x00,
- 0x23, 0x3f, 0xa3, 0x0f,
- 0xf8, 0x90, 0x48, 0x52,
- 0xa8, 0x3f, 0x0b, 0x14,
- 0x6c, 0x04, 0x04, 0x22,
- 0xa5, 0x3f, 0x8c, 0x03,
- 0xf2, 0x84, 0x42, 0x32,
- 0xfe, 0x34, 0x89, 0x24,
- 0xef, 0xcc, 0x47, 0x28,
- 0x00, 0x70, 0x00, 0x2b,
- 0x08, 0x70, 0xe4, 0x2c,
- 0x01, 0x0a, 0x6c, 0x54,
- 0x03, 0x31, 0xe4, 0x7c,
- 0xfb, 0x90, 0x48, 0x02,
- 0x00, 0x00, 0x06, 0x06,
- 0xe4, 0x80, 0x00, 0xca,
- 0x62, 0x00, 0x00, 0x0c,
- 0xec, 0x7c, 0x0a, 0x42,
- 0x6f, 0x94, 0x18, 0x04,
- 0xec, 0x00, 0x0c, 0x54,
- 0xab, 0x3f, 0x2a, 0x43,
- 0x78, 0xb0, 0x58, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xab, 0x0f, 0x38, 0x3f,
- 0x44, 0xaa, 0x29, 0x3f,
- 0x47, 0x1d, 0xe4, 0x00,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x42, 0x1a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xa1, 0x1b, 0x9e, 0xc5,
- 0xbe, 0x44, 0x8e, 0xf5,
- 0xf6, 0x80, 0x00, 0x24,
- 0xf6, 0x80, 0x02, 0x44,
- 0x02, 0x8a, 0x80, 0x13,
- 0x90, 0x75, 0xe4, 0x80,
- 0x64, 0x74, 0x0f, 0x0a,
- 0x9c, 0x15, 0x83, 0x41,
- 0xbd, 0x11, 0x3e, 0x04,
- 0x40, 0x2a, 0xae, 0x13,
- 0x04, 0x44, 0x66, 0x82,
- 0x02, 0x70, 0xe8, 0x84,
- 0x04, 0x20, 0x64, 0x08,
- 0xa3, 0x2f, 0xec, 0x04,
- 0xf8, 0x08, 0x46, 0x02,
- 0x98, 0xd5, 0x85, 0x3b,
- 0x6c, 0x80, 0x06, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x46, 0x12, 0x01, 0x21,
- 0x04, 0x16, 0xfb, 0x8c,
- 0x02, 0xca, 0x40, 0x00,
- 0x08, 0x0c, 0xe4, 0x80,
- 0x02, 0x32, 0x62, 0x00,
- 0x0a, 0x44, 0xec, 0x7c,
- 0x18, 0x14, 0x6f, 0x84,
- 0x22, 0x33, 0xec, 0x00,
- 0x4a, 0xc2, 0xa3, 0x2f,
- 0xa3, 0x4f, 0x78, 0x94,
- 0x06, 0x32, 0x2a, 0x2f,
- 0x27, 0x2f, 0xec, 0x04,
- 0x81, 0x11, 0x88, 0x03,
- 0x42, 0x22, 0x07, 0x55,
- 0x04, 0x0b, 0xf2, 0x84,
- 0xbe, 0x24, 0x81, 0x31,
- 0xef, 0xcc, 0x49, 0x68,
- 0x64, 0x08, 0x06, 0x70,
- 0x07, 0x0a, 0x81, 0x21,
- 0x01, 0xe5, 0xe4, 0x7c,
- 0xc0, 0x00, 0x04, 0x16,
- 0x64, 0x08, 0x06, 0x70,
- 0xe5, 0x12, 0x40, 0x2a,
- 0x65, 0x92, 0x42, 0x2a,
- 0xe4, 0x7c, 0x07, 0x0a,
- 0x04, 0x06, 0x83, 0x21,
- 0x08, 0x70, 0x80, 0x00,
- 0x06, 0xca, 0x6c, 0x78,
- 0x0a, 0x0c, 0xe4, 0x80,
- 0x48, 0x32, 0x62, 0x00,
- 0x06, 0x42, 0xfb, 0x90,
- 0x18, 0x54, 0xec, 0x7c,
- 0x0c, 0x34, 0x6f, 0x8c,
- 0x26, 0x43, 0xec, 0x00,
- 0x58, 0x62, 0xa7, 0x2f,
- 0xa7, 0x5f, 0x78, 0xb0,
- 0x08, 0x42, 0x38, 0x2f,
- 0x29, 0x2f, 0xec, 0x04,
- 0x42, 0x12, 0x8a, 0x03,
- 0x4c, 0x78, 0xf2, 0x88,
- 0x04, 0x70, 0x6f, 0xcc,
- 0x00, 0x8a, 0xe4, 0x0c,
- 0x41, 0xf6, 0xe7, 0xfc,
- 0xa1, 0x1b, 0x00, 0x0c,
- 0xc0, 0x0c, 0x41, 0xf6,
- 0x16, 0xb0, 0xa4, 0x06,
- 0x82, 0x91, 0x6c, 0x04,
- 0x84, 0x81, 0x08, 0xa1,
- 0x02, 0x44, 0x81, 0x95,
- 0x86, 0x71, 0x68, 0x84,
- 0xef, 0x0f, 0x82, 0x03,
- 0x00, 0x02, 0x7f, 0x45,
- 0xa1, 0xbb, 0xef, 0xfc,
- 0xdf, 0xfc, 0x2d, 0xd8,
- 0xb0, 0xf1, 0x3c, 0x04,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x80, 0xcb, 0x06, 0x1d,
- 0x7a, 0x0c, 0x4c, 0x12,
- 0xfb, 0x04, 0x42, 0x32,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf1, 0x84, 0x46, 0x62,
- 0x1c, 0x00, 0x44, 0x00,
- 0x67, 0x0f, 0xff, 0x01,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x69, 0x8c, 0x0e, 0xc4,
- 0xf8, 0x98, 0x40, 0x02,
- 0x84, 0x03, 0xae, 0x0f,
- 0x79, 0x08, 0x4c, 0x02,
- 0xf9, 0x30, 0x4e, 0x02,
- 0xa1, 0x6d, 0x8e, 0x6f,
- 0x04, 0x04, 0x84, 0xf5,
- 0xbf, 0x61, 0x70, 0x80,
- 0x46, 0x62, 0x63, 0x2f,
- 0x42, 0x29, 0xf1, 0x8c,
- 0x04, 0x24, 0xa7, 0xcf,
- 0x06, 0xc4, 0x76, 0x80,
- 0x04, 0x20, 0xfc, 0x7c,
- 0x42, 0x22, 0xec, 0x04,
- 0x22, 0x63, 0xf1, 0x84,
- 0x6d, 0x3f, 0xa3, 0x0f,
- 0x03, 0x35, 0x84, 0x1b,
- 0xa3, 0x1d, 0x86, 0x03,
- 0x41, 0xfc, 0x04, 0x24,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x02, 0x75, 0xdf, 0xff,
- 0xd0, 0x88, 0x40, 0x02,
- 0x60, 0x01, 0x06, 0x06,
- 0xc3, 0x07, 0x60, 0x00,
- 0x02, 0x10, 0x06, 0x2f,
- 0xa4, 0x0f, 0xec, 0x04,
- 0x94, 0x1e, 0x90, 0x0e,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x88, 0x9b, 0x1d, 0x34,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x50, 0x22, 0x06, 0x2d,
- 0x58, 0x90, 0xfa, 0x0c,
- 0x52, 0x00, 0x1c, 0x00,
- 0x21, 0x04, 0x9c, 0x00,
- 0xfb, 0x08, 0x46, 0x32,
- 0x71, 0x8c, 0x54, 0x82,
- 0x9c, 0x00, 0x4c, 0x50,
- 0x4a, 0x10, 0x7e, 0xce,
- 0x0d, 0x0e, 0x9c, 0x00,
- 0x1f, 0x04, 0x8c, 0x1b,
- 0x09, 0x5e, 0x94, 0x2b,
- 0x0b, 0x0e, 0x86, 0x8b,
- 0x43, 0x78, 0x98, 0x0b,
- 0x00, 0x7b, 0xef, 0xcc,
- 0x7f, 0x01, 0x82, 0xbb,
- 0x7c, 0xae, 0xff, 0x11,
- 0x42, 0xf8, 0x94, 0x2b,
- 0x09, 0xa4, 0xef, 0xcc,
- 0xe1, 0x7c, 0x04, 0x64,
- 0x78, 0x88, 0x40, 0x02,
- 0xf8, 0x88, 0x42, 0x12,
- 0xb6, 0x1f, 0x2e, 0x0f,
- 0x56, 0x02, 0x3e, 0x6e,
- 0x4e, 0x12, 0xf0, 0xa4,
- 0x40, 0x72, 0xf2, 0xa8,
- 0x42, 0x72, 0x79, 0x28,
- 0x82, 0x0f, 0xf9, 0x18,
- 0x98, 0x35, 0xa1, 0x0d,
- 0xe1, 0x7c, 0x02, 0x74,
- 0xf0, 0x84, 0x40, 0xb2,
- 0x72, 0x84, 0x44, 0x72,
- 0x44, 0x1f, 0xc2, 0x0f,
- 0x40, 0xf8, 0x90, 0x2b,
- 0x21, 0x1b, 0xef, 0xcc,
- 0x00, 0x14, 0xbf, 0xc1,
- 0x81, 0x11, 0x56, 0x80,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0xec, 0x04, 0x0c, 0x00,
- 0x44, 0x62, 0x7c, 0x84,
- 0x00, 0x20, 0xf1, 0xa0,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x48, 0x22, 0xe4, 0x7c,
- 0x42, 0xb0, 0x7b, 0x80,
- 0x00, 0x42, 0x9c, 0x00,
- 0x56, 0x70, 0x6c, 0x7c,
- 0x06, 0x14, 0x9c, 0x00,
- 0x0a, 0x04, 0x6f, 0x80,
- 0x46, 0x52, 0xec, 0x00,
- 0xa1, 0xbf, 0x78, 0x8c,
- 0x4e, 0xb2, 0x7e, 0xb4,
- 0x47, 0xf6, 0xf9, 0x8c,
- 0xb0, 0xc3, 0x60, 0x00,
- 0x71, 0xa0, 0x4a, 0x32,
- 0x0b, 0x0a, 0xa0, 0x43,
- 0x58, 0x52, 0x64, 0x7c,
- 0x1e, 0xb5, 0xfb, 0xb0,
- 0x96, 0x5b, 0x00, 0x04,
- 0x6c, 0x04, 0x10, 0x42,
- 0xec, 0x7c, 0x08, 0xc2,
- 0x40, 0x00, 0x0a, 0x06,
- 0xec, 0x00, 0x14, 0x44,
- 0x6f, 0x90, 0x12, 0x54,
- 0x10, 0x14, 0xb1, 0x7f,
- 0x40, 0xa2, 0x68, 0x80,
- 0x02, 0xb4, 0xf8, 0xa4,
- 0xa8, 0xc3, 0x68, 0x90,
- 0x00, 0xc2, 0x20, 0x1f,
- 0x21, 0x1f, 0xec, 0x04,
- 0xe8, 0x90, 0x00, 0x54,
- 0x7c, 0x7c, 0x02, 0x14,
- 0xf1, 0x88, 0x44, 0x32,
- 0xef, 0xc8, 0x7b, 0xe8,
- 0x03, 0xd5, 0x90, 0x03,
- 0xf2, 0x9c, 0x42, 0x12,
- 0xff, 0x01, 0x23, 0x8d,
- 0x02, 0x06, 0x82, 0xf5,
- 0x60, 0x00, 0x60, 0x01,
- 0xe0, 0xfc, 0x00, 0x74,
- 0xc3, 0x77, 0x43, 0xb7,
- 0xb6, 0x0f, 0x02, 0xaf,
- 0x79, 0xa8, 0x42, 0x72,
- 0xec, 0x04, 0x0c, 0x80,
- 0x7f, 0xa7, 0x81, 0xa5,
- 0x7f, 0xfd, 0x43, 0xfe,
- 0x01, 0x21, 0xdf, 0xff,
- 0x42, 0x22, 0x94, 0x03,
- 0x90, 0x6b, 0x72, 0x84,
- 0x88, 0x0e, 0x8b, 0x24,
- 0x0d, 0x04, 0x8a, 0x1e,
- 0x80, 0x6e, 0xb8, 0xf1,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x76, 0x80, 0x14, 0x24,
- 0xe0, 0x00, 0x48, 0xc6,
- 0xb4, 0x43, 0x19, 0x51,
- 0x09, 0x0a, 0x34, 0x53,
- 0x4a, 0x42, 0xe4, 0x7c,
- 0x81, 0xc1, 0x7b, 0x94,
- 0x6c, 0x7c, 0x08, 0x52,
- 0x9c, 0x00, 0x58, 0x00,
- 0x00, 0x00, 0x00, 0x06,
- 0xe4, 0xb0, 0x12, 0x10,
- 0x6f, 0x90, 0x02, 0xc4,
- 0xec, 0x00, 0x16, 0x44,
- 0x78, 0x84, 0x42, 0xb2,
- 0x28, 0x53, 0xa9, 0x0f,
- 0x02, 0x52, 0xa2, 0x0f,
- 0x86, 0xa3, 0x6c, 0x04,
- 0x68, 0x84, 0x02, 0x04,
- 0xe8, 0x90, 0x00, 0xc4,
- 0x6f, 0xc8, 0x5b, 0x08,
- 0x81, 0x81, 0x81, 0x31,
- 0xff, 0x21, 0x34, 0x93,
- 0x84, 0x9d, 0x1e, 0x1e,
- 0x82, 0x85, 0x9c, 0x0e,
- 0x12, 0x8a, 0x18, 0x9e,
- 0x8a, 0x55, 0xe0, 0xfc,
- 0x6f, 0xc8, 0x74, 0x28,
- 0xec, 0xf8, 0x04, 0x90,
- 0x51, 0xe6, 0x05, 0x25,
- 0x32, 0x2b, 0xe0, 0x00,
- 0x05, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0xc1, 0x11, 0x1c, 0x00,
- 0x42, 0x22, 0xb2, 0x13,
- 0x04, 0x12, 0xfb, 0x84,
- 0x08, 0x34, 0xec, 0x7c,
- 0x81, 0x31, 0x68, 0x88,
- 0x1c, 0x00, 0x46, 0x00,
- 0xec, 0x00, 0x0a, 0x24,
- 0x6f, 0x88, 0x00, 0x34,
- 0x40, 0x52, 0xa4, 0x13,
- 0x20, 0x4f, 0xf8, 0x80,
- 0xec, 0x04, 0x00, 0x12,
- 0x68, 0x80, 0x02, 0x44,
- 0xe8, 0x88, 0x00, 0x34,
- 0x9e, 0x1e, 0x9c, 0x0e,
- 0x0c, 0x4c, 0x98, 0x8e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x88, 0x7b, 0x52, 0xc4,
- 0xf0, 0x14, 0x0e, 0x65,
- 0xe6, 0x82, 0x52, 0x1a,
- 0x60, 0x90, 0x58, 0x0a,
- 0x04, 0x16, 0x83, 0xc1,
- 0xa1, 0x6b, 0x40, 0x00,
- 0x44, 0xc2, 0x0d, 0xb4,
- 0x12, 0x24, 0x91, 0x88,
- 0x42, 0x3a, 0xa3, 0x2b,
- 0x8f, 0xa4, 0xe6, 0x86,
- 0x08, 0x24, 0x11, 0x84,
- 0x19, 0xc4, 0x9b, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x10, 0x90, 0x4e, 0x72,
- 0xe0, 0x88, 0x08, 0x14,
- 0x0a, 0x70, 0x14, 0x7e,
- 0x2c, 0x5e, 0xe4, 0x10,
- 0x17, 0x64, 0x90, 0x71,
- 0xf0, 0x90, 0x4a, 0x72,
- 0x14, 0x90, 0x28, 0x5e,
- 0x0a, 0x94, 0xe4, 0x0c,
- 0x12, 0xa4, 0x60, 0x88,
- 0x7d, 0x97, 0xe1, 0x7c,
- 0xf0, 0x94, 0x56, 0x72,
- 0xf9, 0x71, 0x12, 0xa3,
- 0x70, 0x84, 0x52, 0xb2,
- 0x20, 0x9e, 0x8e, 0xaf,
- 0x10, 0x34, 0x94, 0xb3,
- 0x12, 0x04, 0x60, 0x88,
- 0x54, 0xb2, 0xe0, 0x88,
- 0x50, 0xb2, 0x70, 0xa0,
- 0x18, 0xae, 0xf0, 0xa4,
- 0x30, 0x3e, 0x90, 0x33,
- 0xe0, 0xe0, 0x44, 0x0a,
- 0x02, 0x06, 0x13, 0x34,
- 0x95, 0x24, 0xc0, 0x00,
- 0xc0, 0x00, 0x46, 0x15,
- 0x86, 0x01, 0x82, 0x95,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x80, 0x83, 0x8e, 0x0f,
- 0x8a, 0x83, 0x10, 0x43,
- 0x90, 0x13, 0x0c, 0x4e,
- 0x0c, 0x0c, 0x88, 0x1e,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0xab, 0x02, 0x7b,
- 0x61, 0x7c, 0x10, 0x74,
- 0x10, 0x03, 0x86, 0x6b,
- 0x52, 0x72, 0x84, 0xbb,
- 0x50, 0x9f, 0xf2, 0xa0,
- 0x10, 0x0b, 0xc0, 0x8f,
- 0x6c, 0x78, 0x92, 0x1b,
- 0xa1, 0x1b, 0xef, 0xc8,
- 0xd6, 0x80, 0x00, 0x14,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0x60, 0x80, 0x01, 0x0a,
- 0xec, 0x84, 0x02, 0x00,
- 0x82, 0x55, 0xa8, 0x1e,
- 0x41, 0xfe, 0x7f, 0x77,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0x81, 0x01, 0x00, 0x73,
- 0xa8, 0x0e, 0x98, 0x7e,
- 0x56, 0x1b, 0x85, 0x15,
- 0x82, 0x03, 0x90, 0x2b,
- 0x6c, 0x80, 0x02, 0x00,
- 0xe4, 0x7c, 0x01, 0x0a,
- 0x7b, 0x84, 0x40, 0x02,
- 0xc0, 0x00, 0x04, 0x06,
- 0x6c, 0x7c, 0x02, 0x02,
- 0x9c, 0x00, 0x50, 0x90,
- 0x6f, 0x84, 0x04, 0x24,
- 0xec, 0x00, 0x06, 0x14,
- 0x44, 0x32, 0x22, 0x03,
- 0x23, 0x8f, 0xf8, 0x88,
- 0xec, 0x04, 0x00, 0x02,
- 0xa1, 0x7d, 0x24, 0x8f,
- 0xe8, 0x80, 0x00, 0x84,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0c, 0x4c, 0x98, 0x0e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x0a, 0x6b,
- 0x61, 0x7c, 0x02, 0x64,
- 0xe1, 0x7c, 0x06, 0x74,
- 0x81, 0xa1, 0x02, 0x43,
- 0x58, 0x62, 0x11, 0xb4,
- 0x06, 0x03, 0xf2, 0x84,
- 0xf9, 0x04, 0x50, 0xc2,
- 0x72, 0x8c, 0x4a, 0x72,
- 0x58, 0x42, 0xc6, 0x0f,
- 0xc6, 0x5f, 0x79, 0x04,
- 0xe5, 0xb2, 0x42, 0x0a,
- 0xe5, 0x32, 0x46, 0x5a,
- 0xe5, 0xb2, 0x48, 0x5a,
- 0x42, 0x8a, 0x02, 0x33,
- 0x48, 0x42, 0xe5, 0x02,
- 0x52, 0x8a, 0x72, 0xa8,
- 0x06, 0x13, 0xe5, 0x82,
- 0xe5, 0x22, 0x46, 0x5a,
- 0x72, 0xa4, 0x48, 0x42,
- 0xe5, 0xa2, 0x4a, 0x5a,
- 0x70, 0x8c, 0x50, 0x42,
- 0xe5, 0x32, 0x40, 0x0a,
- 0xf2, 0xa8, 0x48, 0x52,
- 0xf9, 0x90, 0x46, 0x82,
- 0x8e, 0x85, 0xa1, 0x3b,
- 0x06, 0x44, 0x0f, 0x2e,
- 0x4a, 0x82, 0xe1, 0x7c,
- 0x58, 0x42, 0xf0, 0x8c,
- 0x07, 0xcb, 0xf2, 0x8c,
- 0x06, 0xc4, 0xc6, 0xcf,
- 0x90, 0xcb, 0x56, 0x80,
- 0x99, 0x0c, 0x4a, 0x52,
- 0x96, 0x80, 0x06, 0x54,
- 0x84, 0x80, 0x06, 0x30,
- 0xec, 0x04, 0x0a, 0x30,
- 0xe4, 0x7c, 0x0b, 0x0a,
- 0x1c, 0x00, 0x58, 0x40,
- 0xec, 0x84, 0x08, 0x30,
- 0x7b, 0x90, 0x4a, 0x52,
- 0xc0, 0x00, 0x10, 0x06,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6f, 0x90, 0x12, 0x84,
- 0xec, 0x00, 0x14, 0x44,
- 0x52, 0xa2, 0x29, 0xcf,
- 0x28, 0x53, 0xf8, 0xa4,
- 0x12, 0x16, 0xb2, 0xcf,
- 0x0a, 0x52, 0x60, 0x04,
- 0x26, 0x93, 0xec, 0x04,
- 0xe8, 0x94, 0x14, 0xc4,
- 0x92, 0x2b, 0x29, 0x8f,
- 0xef, 0xc8, 0x62, 0x48,
- 0xb4, 0x1f, 0x0f, 0x24,
- 0x81, 0xa1, 0x30, 0x0f,
- 0x01, 0xe5, 0x84, 0xb3,
- 0xa1, 0x1d, 0xb2, 0xb3,
- 0x56, 0xb2, 0x02, 0x65,
- 0x04, 0xb3, 0x90, 0x88,
- 0xe0, 0xfc, 0x06, 0x14,
- 0xc3, 0x17, 0x43, 0x07,
- 0x16, 0xb0, 0x26, 0x0f,
- 0x21, 0xbd, 0xec, 0x04,
- 0xe0, 0x00, 0x04, 0xb2,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0x04, 0x8a, 0xdf, 0xfc,
- 0xff, 0x81, 0x60, 0xfc,
- 0x60, 0x38, 0x80, 0xf5,
- 0x04, 0x20, 0x6f, 0xc8,
- 0x45, 0xe6, 0xec, 0xf8,
- 0x4e, 0x6f, 0xe0, 0x00,
- 0xf1, 0x80, 0x48, 0xa2,
- 0x90, 0x6d, 0x13, 0x54,
- 0x40, 0x40, 0x15, 0x44,
- 0x46, 0xa2, 0x9c, 0x00,
- 0x42, 0x30, 0xf3, 0x84,
- 0x96, 0x1e, 0x9c, 0x00,
- 0x90, 0x2e, 0x94, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x11, 0x58, 0x04,
- 0x6b, 0xc8, 0x04, 0xf6,
- 0x58, 0x18, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xc8,
- 0xc2, 0x17, 0x61, 0xfc,
- 0x7c, 0x7c, 0x00, 0x04,
- 0x84, 0x03, 0xa2, 0x2f,
- 0x7c, 0x7c, 0x02, 0x04,
- 0x00, 0x13, 0xff, 0x07,
- 0x70, 0x01, 0x00, 0x0e,
- 0x41, 0x1d, 0xcf, 0xff,
- 0xe1, 0xc0, 0x00, 0x14,
- 0x00, 0x00, 0x58, 0x1e,
- 0x80, 0x3f, 0x0f, 0xfd,
- 0x45, 0xf6, 0x5c, 0x14,
- 0x40, 0x22, 0xc3, 0xfc,
- 0x00, 0x9a, 0xd1, 0x80,
- 0xc0, 0x3f, 0x63, 0x4d,
- 0x20, 0x01, 0x00, 0xf8,
- 0xdd, 0x17, 0x40, 0x00,
- 0x6d, 0x8d, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x3e,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x14, 0x43, 0x06,
- 0x00, 0x9a, 0x8f, 0xa5,
- 0xc0, 0x3f, 0x61, 0xc9,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x3c, 0x6f, 0x2d,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x86, 0x66, 0x86,
- 0x8d, 0x95, 0xe0, 0x30,
- 0x61, 0xbd, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x3e,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x75, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x38,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x80, 0x03, 0x86,
- 0x00, 0x9a, 0x8b, 0x85,
- 0xc0, 0x3c, 0x60, 0x71,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x30, 0x6d, 0xf5,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x03, 0x86, 0x66, 0x86,
- 0x89, 0x75, 0xe1, 0x28,
- 0x61, 0xc9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x37,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6f, 0x29, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x24,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe2, 0x54, 0x03, 0x06,
- 0x00, 0x9a, 0x87, 0x65,
- 0xc0, 0x2f, 0x61, 0x49,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x16, 0x6f, 0xc9,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x06, 0x66, 0x86,
- 0x85, 0x55, 0xe4, 0x10,
- 0x63, 0xf9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x22,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x59, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x0a,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe6, 0x28, 0x42, 0x06,
- 0x07, 0x21, 0x83, 0x45,
- 0x62, 0xd9, 0x00, 0x9a,
- 0x42, 0x1a, 0xc0, 0x12,
- 0x40, 0x0a, 0xe6, 0x8a,
- 0x40, 0x00, 0x26, 0x87,
- 0x29, 0x59, 0x43, 0x06,
- 0x00, 0x00, 0xc0, 0x00,
- 0x80, 0x02, 0x2d, 0xb9,
- 0x26, 0x86, 0x40, 0x0a,
- 0xa8, 0x24, 0x02, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0xd1, 0x80, 0x00, 0x04,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0xe0, 0x30, 0x02, 0x29,
- 0xe0, 0x90, 0x44, 0x0a,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x42, 0x05,
- 0x84, 0x24, 0x80, 0xf5,
- 0x04, 0x16, 0xa1, 0x2b,
- 0x40, 0x22, 0x80, 0x00,
- 0x44, 0x2a, 0x91, 0x80,
- 0xe4, 0x50, 0x0c, 0x10,
- 0x81, 0x71, 0x23, 0x0b,
- 0xc4, 0x27, 0x81, 0x11,
- 0x90, 0x88, 0x4c, 0x62,
- 0x6f, 0xc8, 0x6c, 0x08,
- 0x98, 0x7e, 0x8c, 0x0b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x61, 0x1e, 0xf0,
- 0x13, 0x3e, 0xc0, 0x01,
- 0x0e, 0x09, 0x80, 0x7b,
- 0x81, 0x21, 0x60, 0x4c,
- 0x60, 0xbc, 0x5e, 0x25,
- 0x5e, 0x25, 0x88, 0x6b,
- 0x81, 0xa1, 0x60, 0xb4,
- 0x0a, 0xf0, 0x1d, 0x0e,
- 0xc0, 0x01, 0x64, 0x51,
- 0x5e, 0x25, 0xdc, 0x34,
- 0x5e, 0x25, 0xe0, 0xac,
- 0x5e, 0x25, 0xe0, 0x9c,
- 0xa1, 0x3b, 0x60, 0x8c,
- 0x06, 0x34, 0x3f, 0x2e,
- 0x5e, 0x25, 0xc1, 0x54,
- 0x5e, 0x25, 0xe1, 0x04,
- 0x5e, 0x25, 0xe1, 0x00,
- 0x5e, 0x25, 0xe0, 0xfc,
- 0x5e, 0x25, 0xe0, 0xf8,
- 0x5e, 0x25, 0xe0, 0xf4,
- 0x5e, 0x25, 0xe0, 0xf0,
- 0x5e, 0x25, 0xe0, 0xec,
- 0x5e, 0x25, 0xe0, 0xe8,
- 0x5e, 0x25, 0xe0, 0xe4,
- 0x5e, 0x25, 0xe0, 0xe0,
- 0x5e, 0x25, 0xe0, 0xdc,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x5e, 0x25, 0xe0, 0xd4,
- 0x5e, 0x25, 0xe0, 0xd0,
- 0x5e, 0x25, 0xe0, 0xcc,
- 0x5e, 0x25, 0xe0, 0xc8,
- 0x5e, 0x25, 0xe0, 0xc4,
- 0x5e, 0x25, 0xe0, 0xc0,
- 0x5e, 0x25, 0xe0, 0xb8,
- 0x5e, 0x25, 0xe0, 0xb0,
- 0x5e, 0x25, 0xe0, 0xa8,
- 0x5e, 0x25, 0xe0, 0xa4,
- 0x5e, 0x25, 0xe0, 0x98,
- 0x5e, 0x25, 0xe0, 0x94,
- 0x5e, 0x25, 0xe0, 0x88,
- 0xbd, 0x2e, 0xe0, 0x84,
- 0x44, 0x3a, 0xbb, 0x2e,
- 0x87, 0x31, 0x46, 0x8e,
- 0x80, 0x0c, 0x0e, 0x25,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x04, 0x24, 0x97, 0x1e,
- 0xa3, 0x2d, 0x81, 0x38,
- 0xc4, 0x00, 0x04, 0x06,
- 0x81, 0x21, 0x19, 0x2e,
- 0x93, 0x14, 0x98, 0x2e,
- 0x60, 0x20, 0x42, 0x31,
- 0x04, 0x2e, 0x81, 0x31,
- 0xe7, 0xc0, 0x02, 0xf0,
- 0x04, 0xf0, 0x0d, 0x1e,
- 0x0b, 0x2e, 0xe7, 0xd0,
- 0xe7, 0xe0, 0x02, 0xf0,
- 0x04, 0xf0, 0x09, 0x1e,
- 0x7e, 0x2e, 0xe7, 0xf0,
- 0x64, 0x01, 0x02, 0xf0,
- 0x7c, 0x1e, 0xc0, 0x01,
- 0x64, 0x11, 0x04, 0xf0,
- 0x3e, 0x2e, 0xc0, 0x01,
- 0x64, 0x31, 0x02, 0xf0,
- 0x3c, 0x1e, 0xc0, 0x01,
- 0x91, 0x0e, 0x83, 0x21,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x55, 0x88,
- 0xe1, 0x14, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x00, 0x3c, 0x58,
- 0xe1, 0x0c, 0x1e, 0x05,
- 0xa1, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x00, 0xb6,
- 0x80, 0x00, 0x4c, 0x05,
- 0x80, 0x00, 0x3b, 0xb8,
- 0x67, 0x60, 0x00, 0xf0,
- 0x64, 0x40, 0x0a, 0xf0,
- 0x0d, 0x0e, 0xc0, 0x01,
- 0xe7, 0x70, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe7, 0x80,
- 0xe7, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe7, 0xa0,
- 0xe7, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0xc0, 0x01, 0x64, 0x21,
- 0x81, 0x21, 0x3c, 0x0e,
- 0x81, 0x31, 0x11, 0x04,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x52, 0x48,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc1, 0x14, 0x1e, 0x05,
- 0xc0, 0x00, 0x00, 0x05,
- 0xc0, 0x00, 0x34, 0x28,
- 0x61, 0x08, 0x1e, 0x05,
- 0xe5, 0x80, 0x08, 0xf0,
- 0x61, 0x0c, 0x1e, 0x15,
- 0xe5, 0x70, 0x0a, 0xf0,
- 0x80, 0x04, 0x81, 0x31,
- 0x81, 0x11, 0x04, 0x24,
- 0xef, 0xfc, 0x4a, 0x68,
- 0x06, 0xf0, 0x33, 0x14,
- 0xb1, 0x04, 0xe5, 0x30,
- 0x7c, 0x3e, 0xaf, 0x24,
- 0xe5, 0x40, 0x06, 0xf0,
- 0x80, 0x4b, 0x3e, 0x3e,
- 0x82, 0x5b, 0x3c, 0x2e,
- 0xef, 0xfc, 0x5a, 0x28,
- 0x81, 0x61, 0x1b, 0x7e,
- 0x2f, 0xb8, 0x91, 0x54,
- 0x0e, 0x09, 0xe0, 0x00,
- 0x81, 0x11, 0x60, 0x40,
- 0xe0, 0x9c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x15,
- 0x40, 0x00, 0x3d, 0x1e,
- 0x1e, 0x05, 0xf3, 0xf8,
- 0xad, 0x0b, 0x60, 0xf4,
- 0xe0, 0x98, 0x5e, 0x15,
- 0xe0, 0x94, 0x5e, 0x15,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x84, 0x5e, 0x15,
- 0xbb, 0x1e, 0xbf, 0x1e,
- 0x88, 0xf5, 0x95, 0x6e,
- 0x60, 0xf0, 0x1e, 0x35,
- 0xe7, 0x10, 0x0c, 0xf0,
- 0x18, 0xf0, 0x00, 0x44,
- 0xab, 0x14, 0xe6, 0xc0,
- 0x7c, 0x6e, 0x8c, 0x30,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0xa9, 0x04, 0xbe, 0xce,
- 0xbc, 0x3e, 0xa7, 0x24,
- 0xef, 0xfc, 0x57, 0x28,
- 0x60, 0xb4, 0x1e, 0x15,
- 0xe7, 0x00, 0x06, 0xf0,
- 0x60, 0xb0, 0x1e, 0x05,
- 0x1e, 0x25, 0x8c, 0x4b,
- 0x51, 0xb8, 0xe0, 0xc4,
- 0x1e, 0x25, 0xef, 0xfc,
- 0x1e, 0x35, 0xe0, 0xdc,
- 0x1e, 0x05, 0xe0, 0xd8,
- 0x1e, 0x15, 0xe0, 0xc0,
- 0x81, 0x95, 0xe0, 0xc4,
- 0xe0, 0xf0, 0x1e, 0x15,
- 0xe0, 0xdc, 0x1e, 0x25,
- 0xe0, 0xd8, 0x1e, 0x35,
- 0x84, 0x10, 0x80, 0x04,
- 0x08, 0xf0, 0x08, 0x24,
- 0x0c, 0x30, 0xe5, 0xc0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0xef, 0xf8, 0x73, 0x48,
- 0x81, 0x91, 0x01, 0x81,
- 0x0e, 0x09, 0xa9, 0xd5,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0x75,
- 0x0c, 0xf0, 0x60, 0xf8,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x60, 0xfc,
- 0xab, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x29, 0x04,
- 0xa7, 0x24, 0xe1, 0x7c,
- 0x52, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x4d, 0x88,
- 0xe0, 0xe4, 0x1e, 0x25,
- 0xe0, 0xe0, 0x1e, 0x35,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0x1e, 0x05, 0x81, 0xd5,
- 0x1e, 0x15, 0xe0, 0xfc,
- 0x1e, 0x25, 0xe0, 0xf8,
- 0x1e, 0x35, 0xe0, 0xe4,
- 0x00, 0x05, 0xe0, 0xe0,
- 0x02, 0x11, 0xfc, 0x20,
- 0x04, 0x25, 0xfc, 0x24,
- 0x08, 0xf0, 0x7c, 0x20,
- 0x06, 0x31, 0xe7, 0x50,
- 0x0a, 0xf0, 0x7c, 0x24,
- 0x6e, 0xb8, 0xe7, 0x40,
- 0x1e, 0x25, 0xef, 0xf8,
- 0xa3, 0x2d, 0xe0, 0xd4,
- 0xdc, 0x04, 0x80, 0x95,
- 0x82, 0xc5, 0xa1, 0x0b,
- 0x60, 0xd0, 0x1e, 0x15,
- 0x08, 0xf0, 0x84, 0x0b,
- 0x0a, 0xf0, 0x67, 0x50,
- 0x19, 0x24, 0xe7, 0x40,
- 0x6d, 0x98, 0x9d, 0x31,
- 0x1e, 0x25, 0xef, 0xf8,
- 0x1e, 0x35, 0xe0, 0xd4,
- 0x08, 0xf0, 0x60, 0xd0,
- 0x0a, 0xf0, 0xe6, 0xa0,
- 0x83, 0x01, 0x66, 0x90,
- 0x6f, 0xf8, 0x7d, 0xe8,
- 0x0e, 0x09, 0x81, 0x11,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0xf5,
- 0x0c, 0xf0, 0x61, 0x00,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x61, 0x04,
- 0xb3, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x31, 0x04,
- 0xaf, 0x24, 0xe1, 0x7c,
- 0x4c, 0xb8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x47, 0x48,
- 0xe0, 0xec, 0x1e, 0x15,
- 0xe0, 0xe8, 0x1e, 0x25,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xfc, 0x20, 0x02, 0x45,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0xfc, 0x24, 0x04, 0x31,
- 0x1e, 0x05, 0x83, 0x15,
- 0x1e, 0x35, 0xe1, 0x04,
- 0x1e, 0x15, 0xe0, 0xe8,
- 0x1e, 0x25, 0xe0, 0xec,
- 0x00, 0x05, 0xe1, 0x00,
- 0x02, 0x45, 0xfc, 0x20,
- 0x04, 0x11, 0xfc, 0x20,
- 0x06, 0x31, 0xfc, 0x24,
- 0x28, 0x2b, 0xfc, 0x24,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x6f, 0xf8, 0x68, 0x48,
- 0xe7, 0x20, 0x0a, 0xf0,
- 0xa5, 0x8e, 0xa3, 0x9e,
- 0xa1, 0x0b, 0xdc, 0x04,
- 0x17, 0x14, 0x84, 0x25,
- 0x53, 0x38, 0x8e, 0x0b,
- 0x1e, 0x05, 0xef, 0xfc,
- 0x80, 0x2b, 0x60, 0xcc,
- 0x60, 0xc8, 0x1e, 0x15,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x67, 0x20, 0x0a, 0xf0,
- 0x66, 0xd8, 0x9d, 0x31,
- 0x1e, 0x65, 0xef, 0xf8,
- 0x12, 0xf0, 0x60, 0xcc,
- 0x1e, 0x35, 0xe7, 0x40,
- 0x0e, 0xf0, 0x60, 0xc8,
- 0xfc, 0x9e, 0xe6, 0xe0,
- 0x0a, 0x64, 0x3e, 0x7e,
- 0x1e, 0x15, 0xe1, 0x7c,
- 0x8c, 0x4b, 0x60, 0xac,
- 0xe0, 0xa8, 0x1e, 0x05,
- 0xe0, 0xa4, 0x1e, 0x25,
- 0xbc, 0x3e, 0x9f, 0x3e,
- 0x46, 0xf8, 0xa1, 0x5e,
- 0x1e, 0xb5, 0xef, 0xfc,
- 0x1e, 0x85, 0xe0, 0xbc,
- 0x1e, 0xa5, 0xe0, 0xb8,
- 0x96, 0x1b, 0xe0, 0xd0,
- 0x6d, 0x38, 0x90, 0x0b,
- 0x94, 0x2b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x67, 0x05, 0x00, 0xea,
- 0x42, 0x0a, 0xc9, 0x27,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0xa5, 0xed, 0x80,
- 0x72, 0x7d, 0x10, 0x06,
- 0x81, 0x01, 0x40, 0x02,
- 0x60, 0xb8, 0x5e, 0x85,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x81, 0xb1, 0x60, 0xbc,
- 0xe0, 0xd0, 0x5e, 0x05,
- 0x60, 0x9c, 0x1e, 0x15,
- 0xe6, 0x50, 0x06, 0xf0,
- 0x06, 0xf0, 0x7c, 0x3e,
- 0x3e, 0x3e, 0xe6, 0x60,
- 0x1e, 0x05, 0x90, 0x4b,
- 0x96, 0x5b, 0x60, 0x98,
- 0xe0, 0x94, 0x1e, 0x25,
- 0x66, 0xb8, 0xbc, 0xae,
- 0x1f, 0x34, 0xef, 0xf8,
- 0xfc, 0x9e, 0x8c, 0x4b,
- 0x1e, 0x15, 0xbe, 0x7e,
- 0x1e, 0x05, 0xe0, 0xbc,
- 0x1e, 0x25, 0xe0, 0xb8,
- 0xbc, 0x3e, 0xe0, 0xd0,
- 0x42, 0xb8, 0xa1, 0x54,
- 0x1e, 0x35, 0xef, 0xfc,
- 0x18, 0xf0, 0x60, 0xd0,
- 0x7c, 0xce, 0xe6, 0x10,
- 0xe6, 0x20, 0x18, 0xf0,
- 0x1e, 0x15, 0xbe, 0xce,
- 0x1e, 0x05, 0xe0, 0x8c,
- 0x1e, 0x25, 0xe0, 0x88,
- 0x1e, 0x55, 0xe0, 0x84,
- 0x1e, 0x45, 0xe0, 0xbc,
- 0xbc, 0x3e, 0xe0, 0xb8,
- 0xef, 0xf8, 0x64, 0x88,
- 0x60, 0xa4, 0x1e, 0x35,
- 0xe5, 0xd0, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe5, 0xe0,
- 0xbd, 0x04, 0xbf, 0x14,
- 0x1e, 0x55, 0xbb, 0x24,
- 0x1e, 0x45, 0xe0, 0xac,
- 0xbc, 0x3e, 0xe0, 0xa8,
- 0xef, 0xf8, 0x63, 0x68,
- 0xa5, 0x84, 0xa3, 0x94,
- 0x82, 0x91, 0x9b, 0x74,
- 0x9d, 0x04, 0x88, 0x81,
- 0x2b, 0x28, 0x93, 0x0b,
- 0x39, 0x44, 0xdf, 0xfc,
- 0xe5, 0xd0, 0x0c, 0xf0,
- 0x0e, 0xf0, 0x37, 0x34,
- 0xfc, 0x6e, 0xe5, 0xe0,
- 0x0a, 0x44, 0x3e, 0x7e,
- 0xbf, 0x14, 0xe1, 0x7c,
- 0xbb, 0x24, 0xbd, 0x04,
- 0x7e, 0xb8, 0xbc, 0x3e,
- 0x7c, 0x6e, 0xef, 0xf8,
- 0x3e, 0x7e, 0x81, 0x31,
- 0x3f, 0x14, 0x83, 0x41,
- 0xbd, 0x04, 0x81, 0x51,
- 0xbc, 0x3e, 0xbb, 0x24,
- 0xef, 0xf8, 0x61, 0x28,
- 0x81, 0x51, 0x39, 0x04,
- 0xbb, 0x94, 0xb7, 0x14,
- 0x3d, 0x44, 0xbf, 0x34,
- 0xe9, 0x84, 0x04, 0x04,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x37, 0x6e, 0xbe, 0x61,
- 0xf1, 0x84, 0x42, 0x62,
- 0x6c, 0x80, 0x04, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x7b, 0x88, 0x50, 0x12,
- 0x9c, 0x00, 0x4a, 0x00,
- 0x6c, 0x7c, 0x0e, 0x82,
- 0x81, 0x7c, 0x00, 0x04,
- 0x6f, 0x9c, 0x02, 0x54,
- 0xec, 0x00, 0x04, 0x74,
- 0x54, 0x22, 0x0c, 0x9d,
- 0x16, 0x04, 0xf8, 0x84,
- 0xae, 0x83, 0x68, 0x9c,
- 0x82, 0xa5, 0xa5, 0x5e,
- 0x71, 0x98, 0x44, 0x92,
- 0x62, 0x38, 0x88, 0x0b,
- 0x86, 0x1b, 0x6f, 0xc4,
- 0x82, 0x3b, 0x00, 0x4b,
- 0x8c, 0x9b, 0x3d, 0x4e,
- 0xbb, 0x6e, 0xbf, 0x3e,
- 0xb4, 0xbf, 0x37, 0x9d,
- 0x14, 0x82, 0x02, 0xf5,
- 0x04, 0x90, 0xec, 0x04,
- 0x88, 0x0b, 0x6c, 0x28,
- 0x6f, 0xc4, 0x61, 0x28,
- 0x00, 0x4b, 0x86, 0x1b,
- 0x3d, 0x4e, 0x95, 0x91,
- 0xbf, 0x3e, 0x82, 0x3b,
- 0x25, 0x24, 0xbb, 0x9e,
- 0xf9, 0x8c, 0x40, 0x42,
- 0x02, 0xb4, 0x21, 0x0b,
- 0x02, 0x35, 0xe8, 0xa8,
- 0xe8, 0x9c, 0x00, 0x24,
- 0x83, 0x41, 0x01, 0x21,
- 0x83, 0x21, 0x3f, 0x2e,
- 0x81, 0x31, 0x3d, 0x2e,
- 0x6f, 0xc4, 0x45, 0xa8,
- 0x3f, 0x1e, 0x88, 0x2b,
- 0x1e, 0x15, 0xb2, 0x63,
- 0x0e, 0xf0, 0x60, 0x9c,
- 0x1e, 0x35, 0xe6, 0x60,
- 0x1e, 0x25, 0xe0, 0x98,
- 0x3b, 0x6e, 0xe0, 0x94,
- 0xe6, 0x50, 0x0c, 0xf0,
- 0x86, 0x0b, 0x3d, 0x0e,
- 0x86, 0x4b, 0x7c, 0x6e,
- 0x82, 0x5b, 0x3e, 0x7e,
- 0x77, 0x58, 0xbc, 0x2e,
- 0xbb, 0x34, 0xef, 0xf8,
- 0xbe, 0x7e, 0xfc, 0x6e,
- 0xe0, 0x9c, 0x1e, 0x15,
- 0xe0, 0x98, 0x1e, 0x05,
- 0xe0, 0x94, 0x1e, 0x25,
- 0xbd, 0x44, 0xbf, 0x54,
- 0x76, 0x78, 0xbc, 0x3e,
- 0x1e, 0x35, 0xef, 0xf8,
- 0x81, 0x71, 0x60, 0x98,
- 0xe0, 0x9c, 0x1e, 0x55,
- 0xe0, 0x8c, 0x1e, 0x15,
- 0x60, 0x94, 0x1e, 0x35,
- 0xf1, 0x8c, 0x48, 0x72,
- 0x73, 0x94, 0x4a, 0x72,
- 0xe6, 0x10, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe6, 0x20,
- 0xe0, 0x88, 0x1e, 0x05,
- 0xe0, 0x84, 0x1e, 0x25,
- 0x57, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x65, 0xef, 0xf8,
- 0xff, 0x01, 0x60, 0x8c,
- 0xe0, 0x84, 0x1e, 0x85,
- 0x1e, 0x95, 0x80, 0x6d,
- 0x0c, 0x06, 0x40, 0x88,
- 0x5e, 0x75, 0x80, 0x00,
- 0x8c, 0x1b, 0x00, 0x8c,
- 0x00, 0x88, 0x5e, 0x75,
- 0x12, 0x06, 0x90, 0x2b,
- 0x5a, 0x78, 0x80, 0x00,
- 0x92, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x64, 0x01, 0x00, 0xea,
- 0x42, 0x0a, 0xc1, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0x25, 0xed, 0x80,
- 0x60, 0x8c, 0x5e, 0x75,
- 0x5e, 0x05, 0xff, 0x01,
- 0x81, 0xa1, 0x60, 0x88,
- 0xff, 0x01, 0x03, 0x05,
- 0xe0, 0x44, 0x10, 0x8a,
- 0x04, 0x80, 0x82, 0xf5,
- 0x92, 0x0b, 0x6c, 0x40,
- 0x6f, 0xc4, 0x58, 0x88,
- 0x81, 0xa1, 0x8c, 0x1b,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x05,
- 0x91, 0x54, 0x9b, 0x74,
- 0x21, 0x01, 0x85, 0x55,
- 0x30, 0x03, 0xe1, 0x11,
- 0x44, 0x02, 0xb0, 0x13,
- 0x01, 0x0a, 0x7b, 0x84,
- 0x12, 0x1b, 0xe4, 0x7c,
- 0xec, 0x7c, 0x00, 0x22,
- 0x40, 0x00, 0x02, 0x06,
- 0x9c, 0x00, 0x52, 0x60,
- 0x6f, 0x80, 0x06, 0x14,
- 0xec, 0x00, 0x08, 0x04,
- 0xa1, 0x9f, 0x20, 0x23,
- 0x46, 0x42, 0x11, 0x54,
- 0x26, 0x9f, 0xf8, 0x8c,
- 0xec, 0x04, 0x04, 0x22,
- 0x00, 0x14, 0x1b, 0x74,
- 0x25, 0x9f, 0xe8, 0x80,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x5e, 0x95, 0xe0, 0x88,
- 0x95, 0x64, 0xe0, 0x8c,
- 0x1e, 0x25, 0x93, 0x34,
- 0x1e, 0x45, 0xe1, 0x04,
- 0x02, 0x64, 0x60, 0xf8,
- 0x1e, 0x35, 0xe0, 0x88,
- 0x86, 0x13, 0x61, 0x00,
- 0x82, 0x61, 0x46, 0x0e,
- 0x1e, 0x15, 0x9d, 0xc4,
- 0x00, 0xc4, 0xe0, 0xfc,
- 0x98, 0x33, 0x60, 0x88,
- 0x80, 0x13, 0x00, 0x23,
- 0x61, 0x04, 0x5e, 0x25,
- 0x1e, 0x25, 0x98, 0x43,
- 0x5e, 0x35, 0xe0, 0xf4,
- 0x1e, 0x35, 0xe1, 0x00,
- 0x5e, 0x15, 0xe0, 0xf0,
- 0x88, 0x21, 0x60, 0xfc,
- 0xe0, 0xec, 0x1e, 0x15,
- 0x60, 0xf4, 0x5e, 0x25,
- 0x1e, 0x25, 0x82, 0x31,
- 0x5e, 0x45, 0xe0, 0xe4,
- 0x80, 0x13, 0x60, 0xf8,
- 0xe0, 0xe8, 0x1e, 0x45,
- 0x60, 0xdc, 0x1e, 0x05,
- 0x5e, 0x35, 0x80, 0x23,
- 0x1e, 0x35, 0xe0, 0xf0,
- 0x98, 0x43, 0x60, 0xe0,
- 0x60, 0xec, 0x5e, 0x15,
- 0x1e, 0x15, 0x88, 0x01,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x98, 0x33, 0x60, 0xe4,
- 0x60, 0xe8, 0x5e, 0x45,
- 0x5e, 0x35, 0xa1, 0x21,
- 0x82, 0x11, 0x60, 0xe0,
- 0xe0, 0x84, 0x5e, 0x25,
- 0xe0, 0xdc, 0x5e, 0x05,
- 0xe0, 0xd8, 0x5e, 0x15,
- 0x10, 0x68, 0x8b, 0x6b,
- 0x13, 0x04, 0xdf, 0xfc,
- 0x01, 0xb5, 0x81, 0x11,
- 0x41, 0x24, 0x98, 0x01,
- 0xec, 0x04, 0x0a, 0x50,
- 0x45, 0x4a, 0x9e, 0x34,
- 0x04, 0x0c, 0xe4, 0x0c,
- 0x84, 0x13, 0xe2, 0x00,
- 0xfc, 0xd5, 0xa1, 0x5b,
- 0xe0, 0x58, 0x0e, 0x09,
- 0x1e, 0x05, 0x93, 0x34,
- 0x81, 0x1d, 0x61, 0x14,
- 0xe2, 0x00, 0x04, 0x0c,
- 0x8e, 0xae, 0x8c, 0x2e,
- 0x46, 0x11, 0x80, 0x04,
- 0x89, 0x11, 0x60, 0x24,
- 0xa5, 0x0b, 0x93, 0x24,
- 0xc0, 0x00, 0x02, 0x66,
- 0xe0, 0x20, 0x44, 0x11,
- 0xa5, 0x0b, 0x17, 0x34,
- 0x93, 0x14, 0x86, 0x45,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xce, 0x14, 0x80, 0xe5,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x00, 0x30, 0x0e, 0x25,
- 0x0e, 0x19, 0x84, 0x30,
- 0xad, 0x1b, 0xe0, 0x40,
- 0x40, 0x0c, 0x06, 0x15,
- 0xc4, 0x30, 0x00, 0x30,
- 0xab, 0x0b, 0x8a, 0xf5,
- 0x80, 0x0c, 0x06, 0x05,
- 0x9c, 0x94, 0x00, 0x04,
- 0x80, 0x0c, 0x46, 0x05,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xa5, 0x1b, 0x80, 0x14,
- 0x0e, 0x19, 0x82, 0x75,
- 0x04, 0x10, 0xe0, 0x40,
- 0xa1, 0x1b, 0x6c, 0x18,
- 0xe4, 0x08, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xce, 0x14, 0x88, 0xf5,
- 0xe0, 0x44, 0x0e, 0x29,
- 0xf0, 0xc0, 0x42, 0x10,
- 0x44, 0x10, 0x29, 0x2b,
- 0xce, 0x2e, 0xfc, 0x04,
- 0x80, 0x04, 0x80, 0xf5,
- 0x42, 0x10, 0xa5, 0x0b,
- 0x46, 0x15, 0x9c, 0x0c,
- 0xce, 0x14, 0x80, 0x0c,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x00, 0x30, 0x82, 0x05,
- 0x89, 0x21, 0x64, 0x30,
- 0x91, 0x21, 0x81, 0x25,
- 0x80, 0x1e, 0xa4, 0x1f,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x42, 0x01, 0x93, 0x14,
- 0x1e, 0xf0, 0xe0, 0x28,
- 0xc0, 0x01, 0x64, 0x61,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xa3, 0x1b, 0xdd, 0x93,
- 0x93, 0x14, 0xfa, 0x35,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xfd, 0x45, 0xf4, 0xa5,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x82, 0x9b, 0x23, 0x3e,
- 0xe0, 0x98, 0x1e, 0x35,
- 0xa5, 0x0e, 0xab, 0x4e,
- 0x06, 0x19, 0xa7, 0x3e,
- 0x1e, 0xb5, 0xe0, 0x90,
- 0x00, 0x89, 0xe0, 0xa8,
- 0x80, 0x13, 0xe0, 0x48,
- 0x60, 0x70, 0x02, 0x61,
- 0xac, 0x1e, 0x81, 0x11,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x4c, 0x00, 0x19,
- 0xa9, 0x1e, 0xe6, 0x24,
- 0x60, 0x50, 0x00, 0xa9,
- 0xe0, 0x80, 0x44, 0x0a,
- 0x97, 0x5e, 0xce, 0x78,
- 0x24, 0x14, 0x82, 0xe5,
- 0xe0, 0x84, 0x44, 0x1a,
- 0x02, 0x0c, 0xa1, 0x1b,
- 0xa4, 0x1e, 0xe2, 0x00,
- 0xa0, 0x00, 0x00, 0x78,
- 0x92, 0x1b, 0x01, 0x01,
- 0xef, 0xf8, 0x74, 0xe8,
- 0x44, 0x0a, 0xe6, 0x24,
- 0x00, 0x16, 0xe0, 0x88,
- 0x42, 0x90, 0x40, 0x00,
- 0x74, 0x58, 0xdc, 0x00,
- 0x00, 0xf0, 0xcf, 0xf8,
- 0x0a, 0xf0, 0x65, 0x60,
- 0x0d, 0x0e, 0xe5, 0xd0,
- 0xe5, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe5, 0x70,
- 0xe5, 0xa0, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe5, 0x80,
- 0xe5, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0x3c, 0x0e, 0xe5, 0xc0,
- 0x29, 0x14, 0x83, 0x21,
- 0x0c, 0x3b, 0x94, 0x0b,
- 0x52, 0x78, 0x92, 0x4b,
- 0x66, 0x04, 0xef, 0xf8,
- 0xe1, 0x31, 0x81, 0x11,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0xc0, 0x74, 0x1e, 0x05,
- 0xc0, 0x00, 0x40, 0x15,
- 0x12, 0x05, 0xa7, 0x44,
- 0x08, 0x19, 0xc0, 0x0c,
- 0x86, 0x0f, 0xe0, 0x94,
- 0x25, 0x54, 0xe6, 0x0e,
- 0xfc, 0x10, 0x44, 0x10,
- 0x1f, 0xe8, 0xab, 0x2b,
- 0x15, 0x9e, 0xc0, 0x00,
- 0x1c, 0x08, 0xa1, 0x6d,
- 0xbb, 0x04, 0xc0, 0x00,
- 0xa5, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x1f, 0x58,
- 0x60, 0xa0, 0x1e, 0x05,
- 0x14, 0x70, 0xc8, 0x77,
- 0x00, 0x25, 0xe4, 0x40,
- 0x94, 0x04, 0xe0, 0x10,
- 0xff, 0x01, 0x00, 0x23,
- 0x00, 0x24, 0x80, 0x2d,
- 0x52, 0x0a, 0xc1, 0xac,
- 0x82, 0x15, 0xc1, 0x2a,
- 0xd7, 0x07, 0xa4, 0x0b,
- 0x40, 0x0a, 0xa0, 0x0b,
- 0x12, 0x00, 0xe1, 0xaa,
- 0x0a, 0x09, 0xec, 0x04,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x44, 0x20, 0xe0, 0x94,
- 0x40, 0x07, 0x13, 0xfd,
- 0xc0, 0xc0, 0x06, 0x94,
- 0x40, 0x28, 0x1e, 0x25,
- 0xd9, 0x88, 0x46, 0x32,
- 0x40, 0x08, 0x44, 0x35,
- 0x0a, 0x19, 0xab, 0x1b,
- 0x08, 0x25, 0x80, 0x68,
- 0xab, 0x34, 0xe0, 0x18,
- 0x52, 0x92, 0x23, 0x14,
- 0x0c, 0x24, 0x90, 0x84,
- 0x84, 0x18, 0xe1, 0x20,
- 0xa7, 0x1b, 0x52, 0x18,
- 0x06, 0x29, 0x82, 0x15,
- 0x85, 0x1b, 0xe0, 0x2c,
- 0x06, 0x29, 0x84, 0x15,
- 0x81, 0x75, 0xe0, 0x28,
- 0xe0, 0x24, 0x06, 0x29,
- 0x82, 0x35, 0x85, 0x1b,
- 0xe0, 0x20, 0x06, 0x29,
- 0x82, 0x11, 0x02, 0x21,
- 0x4c, 0x2a, 0x9f, 0x1e,
- 0x81, 0x35, 0xe6, 0x9a,
- 0x9f, 0x1e, 0x83, 0x11,
- 0x88, 0x25, 0xa1, 0x6b,
- 0x02, 0x64, 0x1f, 0x24,
- 0x83, 0x2d, 0xe0, 0x84,
- 0x08, 0x15, 0x86, 0x85,
- 0x40, 0x0a, 0x60, 0x20,
- 0x9d, 0x6e, 0xe0, 0x88,
- 0xe6, 0xa2, 0x46, 0x1a,
- 0x84, 0xd5, 0x9b, 0x3e,
- 0x40, 0x3a, 0x9f, 0x24,
- 0x81, 0x31, 0x66, 0xa2,
- 0x60, 0x0a, 0x44, 0x2e,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x77, 0x58, 0x93, 0x2e,
- 0x04, 0x14, 0xef, 0xc0,
- 0xa1, 0x2b, 0xe1, 0x94,
- 0x0c, 0x24, 0x8e, 0x25,
- 0x87, 0xe5, 0xf6, 0x80,
- 0xac, 0x0e, 0x89, 0x01,
- 0x1f, 0x04, 0xb1, 0x55,
- 0xe1, 0x94, 0x02, 0x34,
- 0x76, 0x80, 0x02, 0x14,
- 0xe0, 0x00, 0x44, 0x06,
- 0x8e, 0xbb, 0x1f, 0x74,
- 0x76, 0x80, 0x00, 0x04,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x00, 0x10, 0x20, 0x23,
- 0x19, 0x2e, 0xec, 0x18,
- 0x33, 0x44, 0x80, 0x2d,
- 0x91, 0x88, 0x42, 0x02,
- 0x08, 0x84, 0x00, 0x34,
- 0x84, 0x14, 0x02, 0x10,
- 0x51, 0x80, 0x42, 0x22,
- 0xc0, 0x00, 0x04, 0x56,
- 0x00, 0x34, 0x2d, 0x34,
- 0x40, 0x0a, 0xc9, 0x04,
- 0x42, 0x22, 0x66, 0x9e,
- 0xbd, 0x1e, 0xd1, 0x84,
- 0x8c, 0x30, 0x90, 0x24,
- 0xe0, 0x9a, 0x40, 0x0a,
- 0xef, 0xf4, 0x6f, 0xc8,
- 0xad, 0x14, 0xbd, 0x04,
- 0x40, 0x7e, 0x84, 0x06,
- 0x93, 0x0e, 0xe0, 0x1e,
- 0x04, 0x04, 0x8d, 0xa5,
- 0x06, 0x14, 0x61, 0x94,
- 0xa6, 0x2f, 0xe0, 0xec,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x04, 0x60, 0xc0, 0x61,
- 0x80, 0x4b, 0x6c, 0x14,
- 0x64, 0x7c, 0x05, 0x0a,
- 0x48, 0x10, 0x8e, 0xbb,
- 0x02, 0x60, 0x1c, 0x00,
- 0x1d, 0x74, 0xec, 0x94,
- 0xfb, 0x84, 0x42, 0x22,
- 0xec, 0x7c, 0x06, 0x12,
- 0x68, 0x8c, 0x0a, 0x44,
- 0x48, 0x00, 0x81, 0x41,
- 0x18, 0x34, 0x1c, 0x00,
- 0x00, 0x44, 0xec, 0x00,
- 0x44, 0x7a, 0x6f, 0x8c,
- 0x40, 0xc2, 0xe6, 0xaa,
- 0xa6, 0x13, 0x78, 0x80,
- 0x00, 0x12, 0x20, 0x5f,
- 0x02, 0x54, 0xec, 0x04,
- 0x00, 0x44, 0x68, 0x80,
- 0x44, 0x2a, 0xe8, 0x8c,
- 0x81, 0x31, 0x66, 0x9e,
- 0xef, 0xc0, 0x67, 0x28,
- 0x80, 0x2b, 0x27, 0x04,
- 0xab, 0x2e, 0xc0, 0x08,
- 0x4e, 0x62, 0xa3, 0x1e,
- 0x84, 0x0b, 0x71, 0x80,
- 0x6f, 0xc0, 0x75, 0xe8,
- 0x1d, 0x64, 0x8e, 0x2b,
- 0x00, 0x14, 0xa1, 0x1b,
- 0x00, 0x04, 0xd6, 0x80,
- 0x00, 0x00, 0x96, 0x80,
- 0xae, 0x03, 0x84, 0x80,
- 0xe0, 0x80, 0x01, 0x0a,
- 0xc0, 0x54, 0x1e, 0x05,
- 0x42, 0x16, 0x82, 0x95,
- 0x2b, 0x04, 0xe0, 0x00,
- 0xf1, 0x80, 0x44, 0x12,
- 0xa3, 0x14, 0xa1, 0x2e,
- 0xef, 0xc0, 0x74, 0x68,
- 0xa2, 0x73, 0xa1, 0x14,
- 0x0a, 0xf0, 0x33, 0x44,
- 0xad, 0x14, 0xe5, 0xe0,
- 0x90, 0x24, 0xbd, 0x7e,
- 0x8e, 0x1b, 0x04, 0x30,
- 0xef, 0xf4, 0x69, 0x68,
- 0x46, 0x06, 0x1f, 0x24,
- 0xbd, 0x04, 0xe0, 0x00,
- 0x04, 0x24, 0xad, 0x14,
- 0xa4, 0x33, 0xf6, 0x80,
- 0x99, 0x3e, 0x84, 0x06,
- 0x60, 0x9c, 0x1e, 0x05,
- 0x25, 0x54, 0x9e, 0xb1,
- 0xa7, 0x44, 0x81, 0xc1,
- 0x40, 0x6a, 0xab, 0x0e,
- 0x92, 0x6b, 0x66, 0x9a,
- 0x93, 0xb5, 0x91, 0x0e,
- 0xf0, 0x84, 0x44, 0x92,
- 0x04, 0x0c, 0xd5, 0x2d,
- 0x0a, 0x29, 0xe2, 0x00,
- 0xa4, 0x0f, 0x60, 0x64,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x44, 0x4a, 0x80, 0x85,
- 0x86, 0x65, 0xe0, 0x90,
- 0xe1, 0x7c, 0x06, 0x64,
- 0x06, 0x63, 0x96, 0x3f,
- 0x95, 0x6d, 0x94, 0x3b,
- 0x40, 0x00, 0x06, 0x06,
- 0xe0, 0x8c, 0x44, 0x0a,
- 0x40, 0x54, 0x1e, 0x35,
- 0x04, 0x64, 0xa6, 0x63,
- 0x44, 0x22, 0xe0, 0x88,
- 0x04, 0x20, 0xd0, 0x8c,
- 0xc0, 0x09, 0x04, 0x01,
- 0x90, 0x90, 0x44, 0x22,
- 0x84, 0xa0, 0x04, 0x20,
- 0x84, 0x73, 0x88, 0x24,
- 0x82, 0x11, 0x02, 0x61,
- 0xf4, 0xb5, 0x83, 0x8b,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x0a, 0x09, 0x80, 0xc5,
- 0x40, 0x4a, 0xe0, 0x64,
- 0x98, 0xa5, 0xe0, 0x90,
- 0x00, 0x74, 0x1b, 0x14,
- 0x19, 0x34, 0xe0, 0x94,
- 0xe0, 0x88, 0x0a, 0xc4,
- 0xa2, 0x03, 0xb7, 0x44,
- 0xf0, 0x80, 0x04, 0x04,
- 0xe1, 0x94, 0x02, 0x24,
- 0xf6, 0x80, 0x02, 0x14,
- 0xec, 0x18, 0x02, 0x10,
- 0x42, 0x12, 0x82, 0x3d,
- 0x04, 0x24, 0x91, 0x8c,
- 0x02, 0x10, 0x08, 0x84,
- 0x42, 0x32, 0x84, 0x14,
- 0x06, 0x56, 0x51, 0x84,
- 0x04, 0x24, 0xc0, 0x00,
- 0x42, 0x32, 0x49, 0x04,
- 0x1f, 0x34, 0xd1, 0x84,
- 0x9d, 0x04, 0xa1, 0x0d,
- 0x44, 0x2a, 0xbd, 0x1e,
- 0xb1, 0x34, 0xe6, 0x8e,
- 0xe0, 0x82, 0x40, 0x2a,
- 0x7c, 0x14, 0x08, 0x25,
- 0x06, 0x31, 0x8a, 0x43,
- 0x21, 0x5e, 0xfc, 0x30,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0a, 0xf0, 0x23, 0xce,
- 0x61, 0x78, 0xe5, 0xe0,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xb1, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0xe0, 0x64, 0x0a, 0x09,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x93, 0x04, 0x88, 0x85,
- 0xb5, 0x44, 0xa1, 0x24,
- 0xe6, 0x9e, 0x40, 0x0a,
- 0x84, 0x7b, 0x2f, 0x34,
- 0xf6, 0x80, 0x02, 0x04,
- 0xa4, 0x1d, 0x11, 0x54,
- 0x80, 0x00, 0x02, 0x06,
- 0xcc, 0x08, 0x02, 0x10,
- 0xa3, 0x0f, 0x3d, 0x1e,
- 0x7c, 0x1c, 0x08, 0x25,
- 0x40, 0x0a, 0x8e, 0x43,
- 0x0a, 0xf0, 0x60, 0x16,
- 0x06, 0x31, 0xe5, 0xe0,
- 0x5e, 0xf8, 0xfc, 0x30,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xaf, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0x90, 0x93, 0x02, 0xc1,
- 0x81, 0xcb, 0xa9, 0x04,
- 0x40, 0x00, 0x0e, 0x06,
- 0xc0, 0x00, 0x02, 0x06,
- 0x00, 0x06, 0x62, 0x55,
- 0x97, 0x14, 0xc0, 0x00,
- 0x0a, 0x49, 0xb9, 0x34,
- 0x84, 0x08, 0xe0, 0x54,
- 0x8c, 0x24, 0x86, 0x18,
- 0xe6, 0x82, 0x40, 0x1a,
- 0xe4, 0x04, 0x02, 0x20,
- 0xe6, 0x92, 0x48, 0x0a,
- 0x89, 0x1b, 0x8c, 0x1e,
- 0x3b, 0x04, 0x80, 0xd5,
- 0x80, 0x1e, 0x85, 0x11,
- 0x83, 0x65, 0x95, 0x34,
- 0xa1, 0x2d, 0x15, 0x34,
- 0xa1, 0x0b, 0x84, 0x75,
- 0x0a, 0x29, 0x84, 0x25,
- 0x04, 0x24, 0xe0, 0x40,
- 0x04, 0x0a, 0xfc, 0x00,
- 0x82, 0x55, 0xf0, 0x18,
- 0xe1, 0x82, 0x40, 0x1a,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x02, 0x56, 0x00, 0x74,
- 0x40, 0x15, 0x80, 0x00,
- 0x0a, 0x09, 0x80, 0x00,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x82, 0x85, 0xe0, 0x80,
- 0x80, 0x14, 0xbb, 0x04,
- 0x06, 0x15, 0xa5, 0x1b,
- 0x42, 0x10, 0x80, 0x0c,
- 0x46, 0x15, 0x9c, 0x10,
- 0x83, 0x11, 0x00, 0x0c,
- 0x1e, 0xf0, 0x80, 0x1e,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x60, 0x50, 0x00, 0x19,
- 0x00, 0x29, 0x82, 0x6b,
- 0x81, 0xc1, 0x60, 0x4c,
- 0x0a, 0x10, 0x90, 0xce,
- 0x0e, 0x14, 0x64, 0x0c,
- 0x00, 0x59, 0xe0, 0x88,
- 0x52, 0x50, 0x60, 0x64,
- 0xc0, 0x01, 0x73, 0xf0,
- 0x66, 0x86, 0x50, 0x2a,
- 0x48, 0xc5, 0x92, 0x73,
- 0x12, 0x80, 0xe0, 0x10,
- 0xc4, 0x87, 0x64, 0x0c,
- 0x73, 0xf1, 0x52, 0x90,
- 0x90, 0x73, 0x41, 0xff,
- 0x60, 0x84, 0x4a, 0x0a,
- 0x10, 0x06, 0x92, 0x73,
- 0x40, 0x40, 0x00, 0x01,
- 0x4c, 0x85, 0x90, 0x71,
- 0x52, 0x92, 0x40, 0x04,
- 0x4e, 0x72, 0x90, 0xa0,
- 0x10, 0x06, 0x10, 0xa4,
- 0x4c, 0xc5, 0x80, 0x00,
- 0x12, 0x74, 0x00, 0x04,
- 0x4a, 0x0a, 0xe1, 0x88,
- 0xb2, 0x8f, 0x60, 0x80,
- 0x0e, 0x74, 0x1a, 0x8e,
- 0x10, 0x84, 0x80, 0x84,
- 0xa8, 0x71, 0x1c, 0xc4,
- 0x00, 0x04, 0x4c, 0x85,
- 0xdc, 0xc0, 0x10, 0x84,
- 0x40, 0x04, 0x4c, 0x85,
- 0x60, 0x44, 0x0e, 0x8a,
- 0x08, 0xa5, 0xc0, 0x18,
- 0x80, 0x00, 0x00, 0x66,
- 0xe0, 0x40, 0x00, 0x79,
- 0x86, 0xd5, 0xee, 0x7d,
- 0xe0, 0x0c, 0x10, 0x36,
- 0xe4, 0x9c, 0x50, 0x4a,
- 0x00, 0x89, 0x86, 0x35,
- 0xf3, 0x8d, 0xe0, 0x48,
- 0x00, 0x76, 0x04, 0xc5,
- 0x06, 0x89, 0x80, 0x00,
- 0xfc, 0x8d, 0xe0, 0x2c,
- 0x06, 0x89, 0x82, 0xb5,
- 0xfc, 0x8d, 0xe0, 0x24,
- 0x06, 0x89, 0x82, 0x35,
- 0xfc, 0x8d, 0xe0, 0x28,
- 0x06, 0x39, 0x80, 0xb5,
- 0xff, 0x3d, 0xe0, 0x20,
- 0x01, 0x35, 0x82, 0x15,
- 0x93, 0x01, 0x91, 0x01,
- 0x0c, 0x0c, 0x90, 0x0e,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x60, 0x44, 0x00, 0x09,
- 0x18, 0xce, 0xe0, 0x27,
- 0x4c, 0x25, 0xa2, 0x2f,
- 0x2b, 0x0b, 0xe0, 0x10,
- 0xfe, 0xac, 0x01, 0xf6,
- 0x81, 0x01, 0x58, 0x0e,
- 0x00, 0x00, 0x01, 0x06,
- 0x5a, 0x0e, 0xad, 0x7b,
- 0xdc, 0x94, 0x00, 0x04,
- 0x40, 0x0c, 0x4c, 0x05,
- 0xe0, 0x80, 0x4a, 0x4a,
- 0x40, 0x00, 0x00, 0x06,
- 0xdc, 0x00, 0x42, 0x60,
- 0xcf, 0xf8, 0x48, 0x88,
- 0x8c, 0x1b, 0x03, 0x01,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xf8, 0x08, 0x28,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0x6b,
- 0x0e, 0x60, 0x3e, 0x2e,
- 0x08, 0x8b, 0xec, 0x04,
- 0x3c, 0x9e, 0x86, 0xab,
- 0x01, 0x21, 0x81, 0x01,
- 0x01, 0x41, 0x89, 0x31,
- 0x56, 0x98, 0x8e, 0x1b,
- 0x8c, 0x5b, 0x6f, 0xcc,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x81, 0x01, 0x3e, 0xae,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x11, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x55, 0xc8,
- 0x80, 0xa5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x81, 0x01, 0x3e, 0x8e,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x21, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x54, 0xc8,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x86, 0x05, 0xa1, 0x1b,
- 0x88, 0x0d, 0xff, 0x41,
- 0xc1, 0xac, 0x08, 0x04,
- 0xc1, 0x06, 0x48, 0x4a,
- 0xd1, 0x90, 0x48, 0x12,
- 0x17, 0x80, 0x08, 0x04,
- 0x73, 0xfc, 0x40, 0x00,
- 0x08, 0x44, 0xc0, 0x07,
- 0x08, 0x40, 0x81, 0x2c,
- 0x42, 0x4a, 0x84, 0x04,
- 0x88, 0x16, 0xe1, 0x86,
- 0x81, 0x01, 0x0c, 0x0e,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xe0, 0x08, 0x40, 0x96,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0xe0, 0x1e, 0xf0,
- 0x88, 0x6b, 0x00, 0xbb,
- 0x60, 0x18, 0x16, 0x89,
- 0x06, 0x7b, 0x84, 0x4b,
- 0x04, 0xf0, 0x82, 0xab,
- 0x06, 0xf0, 0x64, 0xd0,
- 0x09, 0x4e, 0xe4, 0xa0,
- 0x7d, 0x38, 0x88, 0x0b,
- 0x90, 0x1b, 0x6f, 0xfc,
- 0x64, 0xc0, 0x04, 0xf0,
- 0xe4, 0x90, 0x06, 0xf0,
- 0x90, 0x1b, 0x14, 0x0b,
- 0xef, 0xfc, 0x7c, 0xa8,
- 0x64, 0xb0, 0x04, 0xf0,
- 0xe4, 0x80, 0x06, 0xf0,
- 0x8e, 0x0b, 0x0b, 0x7e,
- 0x6f, 0xfc, 0x7c, 0x28,
- 0x1e, 0x09, 0x90, 0x1b,
- 0x98, 0xb1, 0x60, 0xd0,
- 0x60, 0xc0, 0x1e, 0x39,
- 0xe0, 0x84, 0x04, 0x84,
- 0x60, 0xb0, 0x1e, 0x59,
- 0x42, 0x07, 0x96, 0x23,
- 0xec, 0x08, 0x04, 0x20,
- 0x70, 0x80, 0x42, 0xb2,
- 0x00, 0x10, 0xc2, 0x37,
- 0x4e, 0xb2, 0x6c, 0x08,
- 0x57, 0x0d, 0xf0, 0x8c,
- 0x42, 0x57, 0x84, 0x9b,
- 0x9c, 0x00, 0x52, 0x00,
- 0x6c, 0x08, 0x00, 0x70,
- 0xf0, 0x94, 0x46, 0xb2,
- 0x84, 0x5b, 0x57, 0x0d,
- 0x1c, 0x00, 0x4a, 0x00,
- 0xec, 0x08, 0x00, 0x30,
- 0x84, 0xcb, 0x57, 0x0d,
- 0x58, 0x00, 0x15, 0x04,
- 0xfc, 0x0e, 0x9c, 0x00,
- 0x0b, 0x04, 0x89, 0x04,
- 0x13, 0x04, 0x81, 0xab,
- 0xe0, 0x00, 0x54, 0x1a,
- 0xed, 0x84, 0x40, 0x0a,
- 0x91, 0x04, 0xbe, 0x0e,
- 0x81, 0x01, 0x3c, 0x0e,
- 0x91, 0x95, 0xfe, 0x0e,
- 0x8a, 0xab, 0x0f, 0x8e,
- 0x8e, 0x5b, 0x04, 0x8a,
- 0xa4, 0x0a, 0x8d, 0x9e,
- 0x89, 0x94, 0xfc, 0x74,
- 0x40, 0x0a, 0xb0, 0x03,
- 0x0f, 0x2a, 0x66, 0x9e,
- 0xc0, 0x08, 0x64, 0x00,
- 0x52, 0x1a, 0x8b, 0x74,
- 0x0e, 0x00, 0x60, 0x1c,
- 0xc0, 0x04, 0x64, 0x00,
- 0x40, 0x0d, 0x41, 0x26,
- 0xd7, 0x77, 0x40, 0x00,
- 0x40, 0x0d, 0x5e, 0x05,
- 0x8c, 0x9b, 0x40, 0x00,
- 0x20, 0x00, 0x01, 0x88,
- 0xa0, 0x00, 0x0c, 0x06,
- 0xb0, 0x0a, 0x8c, 0x6a,
- 0xac, 0x03, 0xbc, 0x44,
- 0x66, 0x92, 0x40, 0x0a,
- 0x64, 0x00, 0x09, 0x1a,
- 0x49, 0x26, 0xc0, 0x08,
- 0xc0, 0x00, 0x20, 0x0d,
- 0x20, 0x0d, 0x5e, 0x45,
- 0x00, 0x00, 0x40, 0x00,
- 0xc0, 0x04, 0x64, 0x01,
- 0x80, 0x63, 0xd7, 0x07,
- 0x06, 0x25, 0x8e, 0x83,
- 0x80, 0x00, 0x0e, 0x06,
- 0x82, 0x4b, 0x14, 0x7a,
- 0xbe, 0x14, 0xa8, 0x0a,
- 0x40, 0x0a, 0xae, 0x03,
- 0x03, 0x1a, 0x66, 0x86,
- 0xc0, 0x08, 0x64, 0x00,
- 0x20, 0x0d, 0x43, 0x26,
- 0x5e, 0x15, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x0d,
- 0x64, 0x01, 0x00, 0x00,
- 0x57, 0x07, 0xc0, 0x04,
- 0x80, 0x73, 0x88, 0x1b,
- 0x7b, 0x80, 0x00, 0x64,
- 0xfb, 0x80, 0x0c, 0x84,
- 0x7a, 0x80, 0x4c, 0x62,
- 0xe4, 0x08, 0x00, 0x10,
- 0x7b, 0x80, 0x02, 0x74,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x7a, 0x98, 0x42, 0x12,
- 0x59, 0x1c, 0x92, 0x6b,
- 0x42, 0x00, 0x96, 0x1b,
- 0x00, 0x50, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0x7b, 0x64, 0x08,
- 0x4e, 0x00, 0x0d, 0x44,
- 0x00, 0x30, 0xbc, 0x00,
- 0x96, 0x3b, 0x64, 0x08,
- 0x64, 0x08, 0x41, 0x1a,
- 0x46, 0x00, 0x96, 0x9b,
- 0x00, 0x40, 0x3c, 0x00,
- 0x0f, 0x84, 0xe4, 0x08,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x3c, 0x00, 0x52, 0x00,
- 0xe4, 0x08, 0x00, 0xa0,
- 0x64, 0x08, 0x41, 0x1a,
- 0x4a, 0x00, 0x96, 0x5b,
- 0x00, 0xc0, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0xcb, 0x64, 0x08,
- 0x3c, 0x00, 0x58, 0x00,
- 0xec, 0x04, 0x10, 0x80,
- 0xe0, 0x00, 0x10, 0x1a,
- 0x3f, 0xfd, 0x37, 0x68,
- 0x7e, 0x04, 0xc3, 0xff,
- 0x0c, 0x0c, 0xf0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x71, 0x88, 0x44, 0x12,
- 0xe1, 0xf5, 0x82, 0x33,
- 0x84, 0x01, 0xc2, 0x07,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe1, 0xcc, 0x08, 0x24,
- 0x60, 0xb8, 0x02, 0x04,
- 0x06, 0x24, 0xda, 0x07,
- 0xa0, 0x4f, 0x61, 0xc8,
- 0x79, 0x84, 0x44, 0x32,
- 0xfc, 0x7c, 0x00, 0x44,
- 0x60, 0x10, 0x02, 0x06,
- 0x75, 0x98, 0x81, 0x31,
- 0x08, 0x4c, 0xef, 0xbc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x2b, 0x04, 0x6b,
- 0x4e, 0x96, 0x21, 0x2b,
- 0x82, 0xc5, 0xe0, 0x08,
- 0x60, 0xc8, 0x00, 0x14,
- 0xe1, 0x84, 0x06, 0x24,
- 0xdd, 0x17, 0x06, 0x03,
- 0x81, 0x31, 0x01, 0x71,
- 0x6f, 0xbc, 0x74, 0x48,
- 0xf2, 0x9c, 0x42, 0x12,
- 0x8e, 0x0b, 0x98, 0x0e,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xdc, 0x07, 0xe5, 0x27,
- 0xa4, 0x0f, 0x5d, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x82, 0x2b, 0x42, 0x07,
- 0x81, 0x11, 0x04, 0x01,
- 0x7a, 0x80, 0x00, 0x04,
- 0x7b, 0x98, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xbc,
- 0xa2, 0x2f, 0xe1, 0xa0,
- 0x41, 0xfe, 0xa1, 0x2b,
- 0x00, 0x04, 0xdf, 0xfc,
- 0x08, 0x4c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x7a, 0x08,
- 0x02, 0x64, 0x84, 0x6b,
- 0x82, 0x03, 0xe1, 0x84,
- 0xe0, 0x1a, 0x40, 0x0a,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x69, 0x29, 0x43, 0x86,
- 0x44, 0x1a, 0xc0, 0x01,
- 0x40, 0x1a, 0xe5, 0x02,
- 0x81, 0x11, 0x65, 0x82,
- 0x64, 0x01, 0x04, 0x20,
- 0x40, 0x02, 0xc2, 0x00,
- 0xe5, 0x27, 0x72, 0x84,
- 0x5d, 0x93, 0xdc, 0x07,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x04, 0x34, 0x83, 0x31,
- 0xa3, 0x3f, 0x68, 0x88,
- 0x42, 0x2a, 0x82, 0x21,
- 0x80, 0x13, 0xe6, 0x8e,
- 0x00, 0x14, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0xef, 0xfc, 0x77, 0x28,
- 0x84, 0x61, 0xc2, 0x67,
- 0xfa, 0x80, 0x02, 0x64,
- 0xe6, 0x9e, 0x42, 0x1a,
- 0xe5, 0x02, 0x44, 0x1a,
- 0x65, 0x82, 0x40, 0x1a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x27,
- 0x0c, 0x4c, 0xa4, 0x0f,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x81, 0x11, 0x21, 0x0b,
- 0x00, 0x00, 0x84, 0x65,
- 0x04, 0x0e, 0x6c, 0x04,
- 0x46, 0x02, 0xff, 0xf0,
- 0xa1, 0x3b, 0xf8, 0x08,
- 0x41, 0x84, 0x00, 0x04,
- 0xc4, 0x04, 0x02, 0x10,
- 0x02, 0x14, 0xfe, 0x35,
- 0x00, 0x04, 0x7b, 0x80,
- 0xd0, 0x17, 0xfa, 0x80,
- 0x5d, 0x93, 0xa0, 0x1f,
- 0xfb, 0x80, 0x00, 0x14,
- 0x7a, 0x80, 0x02, 0x04,
- 0xa1, 0x1f, 0xd1, 0x07,
- 0x00, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0xe4, 0x04,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x02, 0x48, 0x2a,
- 0xe5, 0x82, 0x4a, 0x2a,
- 0x65, 0x06, 0x40, 0x3a,
- 0x42, 0x3a, 0x88, 0x2b,
- 0x8a, 0x3b, 0x65, 0x86,
- 0xef, 0xbc, 0x73, 0x88,
- 0x60, 0x01, 0x04, 0x06,
- 0x81, 0x31, 0x42, 0x00,
- 0x42, 0x12, 0x84, 0x03,
- 0xf9, 0x07, 0x72, 0x8c,
- 0x60, 0x90, 0x04, 0x14,
- 0x24, 0x0f, 0xf9, 0x17,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x08, 0x4c, 0xdf, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x21, 0x1b,
- 0x81, 0x71, 0x0a, 0x45,
- 0x88, 0xe5, 0xa1, 0x2b,
- 0x7e, 0x81, 0x06, 0x0e,
- 0x48, 0x1a, 0x40, 0x00,
- 0x4a, 0x0a, 0xe5, 0x0a,
- 0x40, 0x0a, 0xe5, 0x0e,
- 0x46, 0x1a, 0xe5, 0x8e,
- 0x18, 0x54, 0x65, 0x8a,
- 0x56, 0x07, 0xe1, 0xd4,
- 0xe1, 0x84, 0x02, 0x44,
- 0x00, 0x34, 0x20, 0xcf,
- 0x56, 0x57, 0xe0, 0xfc,
- 0x04, 0x34, 0xa0, 0x1f,
- 0x40, 0x12, 0x61, 0x84,
- 0x42, 0x22, 0xf0, 0x94,
- 0x88, 0x2b, 0x72, 0xb0,
- 0xef, 0xbc, 0x66, 0x68,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x01, 0x65, 0xa1, 0x1b,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x4e, 0x96, 0x01, 0x01,
- 0x18, 0x0e, 0xe0, 0x08,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x7f, 0xfd, 0x47, 0xfe,
- 0x86, 0x0d, 0xc0, 0x3f,
- 0x00, 0x00, 0x06, 0x02,
- 0x08, 0x3e, 0xa1, 0x1b,
- 0x80, 0x00, 0x02, 0x06,
- 0x40, 0x9c, 0x06, 0x34,
- 0xc1, 0x84, 0x08, 0x14,
- 0x50, 0x90, 0x46, 0x32,
- 0x42, 0x3a, 0x81, 0x01,
- 0x40, 0x96, 0x40, 0x06,
- 0x88, 0x1e, 0x80, 0x08,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8a, 0x25, 0xa1, 0x2b,
- 0x0a, 0x02, 0x06, 0x13,
- 0x06, 0x14, 0xe0, 0x00,
- 0x03, 0x0a, 0x7a, 0x80,
- 0x08, 0x30, 0xf4, 0x7c,
- 0x81, 0x11, 0x6c, 0x80,
- 0x7b, 0x90, 0x46, 0x32,
- 0x00, 0x32, 0x81, 0x41,
- 0x48, 0x50, 0x6c, 0x7c,
- 0x0a, 0x06, 0x9c, 0x00,
- 0x18, 0x44, 0x00, 0x00,
- 0x0c, 0x04, 0xef, 0x80,
- 0xa0, 0x33, 0x6c, 0x00,
- 0x78, 0xb0, 0x58, 0x62,
- 0x21, 0x4f, 0xa1, 0x5f,
- 0xe1, 0x84, 0x00, 0x24,
- 0x06, 0x32, 0x38, 0x5f,
- 0x27, 0x5f, 0xec, 0x04,
- 0x42, 0x52, 0x88, 0x03,
- 0x81, 0x31, 0x72, 0x84,
- 0xef, 0xbc, 0x61, 0x28,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xa1, 0x2b, 0x00, 0x3b,
- 0xe5, 0x06, 0x40, 0x3a,
- 0xe5, 0x86, 0x42, 0x3a,
- 0x06, 0x20, 0x82, 0x65,
- 0x83, 0x41, 0x6c, 0x04,
- 0x81, 0x31, 0x27, 0x4f,
- 0x6f, 0x38, 0x88, 0x03,
- 0x42, 0x12, 0x6f, 0xbc,
- 0xff, 0x21, 0xf2, 0x8c,
- 0x41, 0xfe, 0x85, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x00, 0x04, 0x4c,
- 0xa3, 0x2d, 0x00, 0x3b,
- 0xe4, 0x06, 0x40, 0x3a,
- 0xe4, 0x86, 0x42, 0x3a,
- 0x08, 0x20, 0x86, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x90, 0x08, 0x34,
- 0x21, 0x1d, 0x81, 0xc1,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0x71, 0x90, 0x4c, 0xc2,
- 0xe8, 0x88, 0x04, 0x34,
- 0x73, 0x94, 0x58, 0xc2,
- 0xdc, 0x00, 0x48, 0x60,
- 0x5c, 0x00, 0x4a, 0xc0,
- 0x42, 0x52, 0x88, 0x03,
- 0x06, 0x24, 0x72, 0x84,
- 0x50, 0x78, 0xe1, 0x7c,
- 0x03, 0x4a, 0xef, 0xbc,
- 0x02, 0x1a, 0xe0, 0x00,
- 0x00, 0xea, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x80, 0xf5, 0xed, 0x80,
- 0x7f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x4c, 0xdf, 0xff,
- 0xdd, 0x93, 0xf6, 0x00,
- 0x06, 0x06, 0x7f, 0x21,
- 0xe0, 0x00, 0x60, 0x01,
- 0xe0, 0x08, 0x43, 0x4a,
- 0xe0, 0x08, 0x42, 0x1a,
- 0xe4, 0x0c, 0x41, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x00, 0x01, 0x00, 0x06,
- 0x0c, 0x4c, 0xe0, 0x00,
- 0xdd, 0x93, 0xf6, 0x00,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x86, 0x6b, 0x04, 0x4b,
- 0x70, 0x90, 0x08, 0x09,
- 0x08, 0x29, 0x81, 0x51,
- 0x12, 0x10, 0x78, 0x8c,
- 0x08, 0x39, 0xe6, 0x00,
- 0x14, 0x10, 0x78, 0x84,
- 0x18, 0x06, 0xe4, 0xc0,
- 0xff, 0xf8, 0x57, 0xce,
- 0x4e, 0x46, 0x1a, 0x26,
- 0x58, 0x56, 0xe0, 0x00,
- 0xda, 0x36, 0x81, 0x81,
- 0x89, 0xa5, 0x8f, 0x4e,
- 0xf0, 0xa0, 0x40, 0x42,
- 0xe0, 0x40, 0x00, 0x19,
- 0x8a, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x60, 0x00, 0x19,
- 0x8a, 0x25, 0xa1, 0x1b,
- 0xa1, 0x1b, 0xa4, 0x1a,
- 0x08, 0x19, 0x88, 0xc5,
- 0x44, 0x62, 0x7c, 0x20,
- 0x44, 0x11, 0xf0, 0xa0,
- 0x00, 0x19, 0xe0, 0x10,
- 0x44, 0x11, 0xe0, 0x20,
- 0x00, 0x19, 0xe0, 0x30,
- 0x44, 0x11, 0xe0, 0x40,
- 0x00, 0x09, 0xe0, 0x50,
- 0x44, 0x01, 0xe0, 0x60,
- 0xa4, 0x2a, 0xe0, 0x70,
- 0xaa, 0x14, 0xa8, 0x04,
- 0xe1, 0x84, 0x06, 0x24,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xbc, 0x56, 0x28,
- 0xf2, 0x94, 0x42, 0x12,
- 0x42, 0x62, 0x0f, 0x44,
- 0x04, 0x0e, 0xf0, 0x9c,
- 0x12, 0x0b, 0x81, 0x51,
- 0x81, 0xf5, 0xf8, 0x20,
- 0xf0, 0xa0, 0x40, 0x62,
- 0xe0, 0x10, 0x40, 0x51,
- 0xe0, 0x30, 0x40, 0x51,
- 0xe0, 0x50, 0x40, 0x51,
- 0x60, 0x70, 0x40, 0x51,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x81, 0x01, 0x00, 0x5e,
- 0x71, 0xac, 0x42, 0x62,
- 0x04, 0x0c, 0x82, 0x81,
- 0xec, 0x08, 0x16, 0xb0,
- 0x88, 0x71, 0x04, 0x91,
- 0xb1, 0x8b, 0x90, 0xa1,
- 0x81, 0x01, 0xec, 0xd5,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x06, 0x00, 0x06, 0x28,
- 0x60, 0x01, 0xe6, 0x00,
- 0xe6, 0x10, 0x08, 0x10,
- 0x65, 0x10, 0x0a, 0x10,
- 0x59, 0xc6, 0xf8, 0x11,
- 0x81, 0x61, 0x60, 0x00,
- 0x02, 0x79, 0x83, 0xf5,
- 0xa1, 0x7b, 0xf8, 0x20,
- 0x84, 0x78, 0x84, 0xa5,
- 0x84, 0x45, 0xa1, 0x7b,
- 0x80, 0x84, 0x94, 0x74,
- 0x06, 0xab, 0x82, 0x94,
- 0x10, 0x7a, 0xf8, 0x20,
- 0x0c, 0xba, 0x8e, 0x83,
- 0xf2, 0x98, 0x52, 0x92,
- 0x00, 0x8e, 0x82, 0x9e,
- 0x46, 0xa3, 0x8e, 0xa3,
- 0x82, 0xb1, 0x78, 0x20,
- 0x02, 0xc1, 0x8c, 0xbc,
- 0x04, 0x41, 0x84, 0x31,
- 0x08, 0x51, 0x90, 0x01,
- 0x0e, 0xc0, 0x82, 0x11,
- 0x85, 0x7d, 0xec, 0xf0,
- 0x0c, 0x0c, 0xf6, 0xf5,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x06, 0x28,
- 0x83, 0x81, 0x44, 0x38,
- 0x80, 0x7b, 0x46, 0x08,
- 0x91, 0x11, 0x25, 0x8f,
- 0x6f, 0xfc, 0x5c, 0xe8,
- 0xe8, 0x8c, 0x12, 0x84,
- 0x14, 0x04, 0x1c, 0x14,
- 0x1e, 0x34, 0xe0, 0x90,
- 0x02, 0x0b, 0x90, 0x2b,
- 0x64, 0x18, 0x94, 0x1b,
- 0x1c, 0x14, 0xef, 0xfc,
- 0x98, 0x0e, 0x92, 0x2b,
- 0x02, 0x0b, 0x9e, 0x34,
- 0x63, 0x98, 0x94, 0x1b,
- 0x9c, 0x24, 0xef, 0xfc,
- 0x0e, 0x1b, 0x9a, 0x0e,
- 0x1e, 0x34, 0xe0, 0x10,
- 0x63, 0x18, 0x84, 0x0b,
- 0x92, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x88, 0x7b, 0x44, 0x48,
- 0x81, 0x01, 0x00, 0x9b,
- 0x84, 0x6b, 0x0a, 0x8b,
- 0x86, 0x0b, 0x0b, 0x0e,
- 0x90, 0x2b, 0x0e, 0x1b,
- 0x68, 0x00, 0x43, 0x48,
- 0xab, 0x9b, 0x88, 0x3b,
- 0xa5, 0x9b, 0x84, 0x05,
- 0x0c, 0x60, 0x02, 0xe5,
- 0xa7, 0x9b, 0x84, 0x10,
- 0xa9, 0x9b, 0x82, 0x45,
- 0x40, 0x80, 0x02, 0x25,
- 0xa3, 0x9b, 0x9c, 0x00,
- 0x08, 0x61, 0x86, 0x75,
- 0x81, 0x25, 0x8e, 0x0b,
- 0x0d, 0x14, 0x90, 0x61,
- 0xe4, 0x50, 0x06, 0xf0,
- 0x62, 0x98, 0x98, 0x24,
- 0x0b, 0x14, 0xef, 0xfc,
- 0xe0, 0x00, 0x00, 0x1a,
- 0x61, 0x9c, 0x4e, 0x0a,
- 0x0f, 0x24, 0x81, 0x01,
- 0x20, 0x01, 0x02, 0x06,
- 0x02, 0x06, 0xc0, 0x00,
- 0x88, 0x1e, 0xc0, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x40, 0xc6, 0xdd, 0x93,
- 0x4e, 0x0a, 0x60, 0x08,
- 0x4e, 0x1a, 0xe9, 0x9c,
- 0x81, 0x11, 0x61, 0x9c,
- 0xc1, 0xc3, 0xfd, 0xf5,
- 0x84, 0x03, 0xa7, 0x2f,
- 0x5c, 0x08, 0xc3, 0x0d,
- 0x00, 0x06, 0x1a, 0x00,
- 0x5d, 0x93, 0x80, 0x00,
- 0xf1, 0x80, 0x40, 0x12,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x64, 0x61, 0x00, 0x00,
- 0x81, 0x41, 0x40, 0x03,
- 0xfc, 0x1e, 0xbe, 0x0e,
- 0x06, 0x08, 0x8b, 0xf5,
- 0x01, 0xb1, 0x81, 0xa1,
- 0x81, 0x4d, 0x81, 0x71,
- 0x7e, 0x4e, 0x92, 0x65,
- 0x02, 0x09, 0x88, 0x13,
- 0x81, 0xa1, 0x60, 0xb0,
- 0x60, 0xf0, 0x02, 0x39,
- 0x02, 0x49, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0x90,
- 0x60, 0xd0, 0x02, 0x29,
- 0x42, 0x0a, 0x9d, 0x11,
- 0x80, 0x33, 0x66, 0x86,
- 0x81, 0x71, 0x3e, 0x54,
- 0x88, 0x23, 0x08, 0x13,
- 0xc4, 0x17, 0x09, 0x4e,
- 0x81, 0x41, 0x02, 0x53,
- 0x18, 0x85, 0x83, 0x25,
- 0xc0, 0x01, 0x78, 0x31,
- 0x10, 0xa3, 0xf1, 0x94,
- 0x48, 0x42, 0x81, 0x81,
- 0x92, 0xb3, 0xf2, 0xa0,
- 0x72, 0xa0, 0x4c, 0x62,
- 0x82, 0x11, 0x82, 0x71,
- 0xfc, 0x55, 0x85, 0x1d,
- 0xf0, 0x51, 0x02, 0x01,
- 0x1e, 0x15, 0x87, 0x0d,
- 0x58, 0x50, 0x40, 0x10,
- 0xfc, 0xf5, 0xdc, 0x00,
- 0x84, 0xd5, 0xe5, 0x7d,
- 0x61, 0x84, 0x10, 0x74,
- 0x40, 0x82, 0x81, 0x91,
- 0x81, 0x31, 0x70, 0xa8,
- 0x72, 0xa4, 0x42, 0x42,
- 0x44, 0x18, 0x8e, 0x2b,
- 0x00, 0xab, 0xef, 0xbc,
- 0xf0, 0xac, 0x40, 0x82,
- 0x72, 0xa4, 0x42, 0x62,
- 0x43, 0x98, 0x81, 0x31,
- 0x8e, 0x2b, 0x6f, 0xbc,
- 0xfc, 0x14, 0x80, 0xbb,
- 0x00, 0x44, 0xfe, 0x44,
- 0x06, 0x10, 0x60, 0x88,
- 0x04, 0x44, 0xe5, 0x10,
- 0x86, 0x03, 0x60, 0x84,
- 0x82, 0x41, 0x04, 0x33,
- 0x40, 0xb5, 0x80, 0xae,
- 0x46, 0x73, 0xe0, 0x20,
- 0x84, 0x08, 0xe0, 0x80,
- 0xe8, 0x15, 0x81, 0x4d,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0xc1, 0x30, 0x01,
- 0x82, 0x7b, 0x7c, 0x0e,
- 0x0c, 0x70, 0x0d, 0xce,
- 0x0b, 0xce, 0xe4, 0xf0,
- 0x89, 0xce, 0x81, 0xa1,
- 0xfc, 0x94, 0xfe, 0xce,
- 0x1e, 0x08, 0x89, 0x55,
- 0x8d, 0xce, 0x81, 0x11,
- 0x01, 0xad, 0xfe, 0xce,
- 0x89, 0xce, 0x81, 0x01,
- 0x8c, 0x05, 0x8b, 0xce,
- 0x70, 0xa8, 0x56, 0x62,
- 0xf0, 0xa8, 0x50, 0x92,
- 0x78, 0xe0, 0x16, 0x09,
- 0xe4, 0x30, 0x04, 0xf0,
- 0x78, 0xa0, 0x16, 0x19,
- 0xe4, 0x60, 0x0a, 0xf0,
- 0xf8, 0x20, 0x10, 0x39,
- 0xe0, 0x20, 0x10, 0x49,
- 0x9b, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x43, 0x08,
- 0x78, 0xc0, 0x16, 0x09,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x78, 0x80, 0x16, 0x19,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0xfc, 0x28, 0x12, 0x39,
- 0xe0, 0x40, 0x10, 0x49,
- 0x93, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x42, 0x08,
- 0x81, 0xc1, 0x7e, 0x04,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xa1, 0x1b, 0x8b, 0x14,
- 0x7e, 0xce, 0x80, 0xb5,
- 0x0b, 0xce, 0x81, 0x11,
- 0x0d, 0x24, 0x81, 0x01,
- 0xf0, 0xa8, 0x48, 0x62,
- 0x82, 0xa1, 0x09, 0x34,
- 0xf8, 0x20, 0x48, 0x01,
- 0xf8, 0x60, 0x48, 0x21,
- 0xf8, 0x40, 0x48, 0x31,
- 0x9c, 0x08, 0x90, 0x16,
- 0xee, 0x55, 0x81, 0xad,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x58, 0x12, 0x00, 0x33,
- 0x14, 0x3e, 0xf0, 0x80,
- 0xf0, 0x90, 0x40, 0x32,
- 0x00, 0x00, 0x19, 0x0d,
- 0x00, 0x1b, 0xec, 0x04,
- 0x02, 0xc0, 0x81, 0x51,
- 0x3c, 0x14, 0x8c, 0x04,
- 0xfb, 0x04, 0x44, 0x22,
- 0x82, 0x35, 0x84, 0x3d,
- 0x88, 0x5b, 0x04, 0x0d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xd1, 0x8c, 0x40, 0x02,
- 0xd0, 0x88, 0x4a, 0x02,
- 0xdd, 0x93, 0x84, 0x5e,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x8b, 0x0a, 0x6b,
- 0x84, 0x7b, 0x11, 0x94,
- 0x8c, 0x1b, 0x08, 0x0b,
- 0x6f, 0xfc, 0x69, 0x88,
- 0x01, 0x01, 0x90, 0x2b,
- 0x85, 0x65, 0x91, 0xa1,
- 0x88, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0x12, 0x45, 0x81, 0x31,
- 0x90, 0x2b, 0x60, 0x40,
- 0xe0, 0x60, 0x12, 0x55,
- 0xbe, 0x9e, 0x9c, 0x08,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0xe4, 0x80, 0x04, 0x90,
- 0x60, 0x40, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9e, 0x08, 0xe0, 0x60,
- 0x90, 0x2b, 0x3e, 0x2e,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x69, 0xe8,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x55,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x7b, 0x15, 0x84,
- 0x84, 0x6b, 0x17, 0x94,
- 0x8e, 0x2b, 0x13, 0x04,
- 0x6f, 0xfc, 0x65, 0xc8,
- 0x01, 0x01, 0x90, 0x1b,
- 0xe0, 0x08, 0x14, 0xc6,
- 0xa1, 0x0b, 0x85, 0x75,
- 0x12, 0x15, 0x88, 0x55,
- 0x81, 0x31, 0x68, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x8e, 0x2b,
- 0x98, 0x08, 0xe6, 0x90,
- 0x3c, 0x1e, 0xbe, 0x9e,
- 0x67, 0x38, 0x90, 0x1b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x12, 0x15, 0x84, 0x55,
- 0x04, 0x90, 0x68, 0xc0,
- 0xc0, 0x02, 0x64, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9a, 0x08, 0xe6, 0x90,
- 0x8e, 0x2b, 0x3e, 0x2e,
- 0x90, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x66, 0x08,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x35,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x80, 0x9b, 0x15, 0x84,
- 0x84, 0x7b, 0x0a, 0x6b,
- 0x00, 0x80, 0x82, 0xab,
- 0x08, 0x80, 0x64, 0x50,
- 0x3c, 0x0e, 0xe4, 0x10,
- 0xe4, 0x40, 0x0a, 0x80,
- 0xef, 0xfc, 0x77, 0x68,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x67, 0xa0, 0x02, 0x80,
- 0xe7, 0x60, 0x00, 0x80,
- 0x04, 0x80, 0x7e, 0x1e,
- 0x7c, 0x2e, 0xe7, 0x90,
- 0x3e, 0x0e, 0x94, 0x1b,
- 0x7a, 0x38, 0x8e, 0x2b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0xa0, 0xf1, 0x80, 0xa5,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x17, 0x44, 0xdd, 0x93,
- 0x0e, 0x1b, 0x92, 0x0b,
- 0x10, 0x3b, 0x8c, 0x2b,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0x81, 0x15, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x86, 0x8b, 0x08, 0x6b,
- 0x84, 0x7b, 0x02, 0x0b,
- 0x6f, 0xfc, 0x6d, 0x88,
- 0x10, 0x0b, 0x8c, 0x1b,
- 0x66, 0x38, 0x8c, 0x1b,
- 0x10, 0x09, 0xef, 0xfc,
- 0x00, 0x00, 0xe3, 0x58,
- 0xe2, 0x0d, 0xec, 0x0c,
- 0x1c, 0x00, 0x40, 0x70,
- 0x9c, 0x00, 0x42, 0x60,
- 0x8f, 0xfc, 0x5a, 0xe8,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x62, 0x01, 0x02, 0x5b,
- 0x81, 0xc1, 0x40, 0x01,
- 0x0c, 0xc4, 0x85, 0x95,
- 0x0e, 0x64, 0xfb, 0x80,
- 0x82, 0x63, 0x60, 0x84,
- 0x60, 0x01, 0x0c, 0x89,
- 0x82, 0x73, 0x40, 0x02,
- 0xe8, 0x00, 0x0e, 0x7b,
- 0x06, 0xa5, 0xc4, 0x87,
- 0xc4, 0x77, 0x7c, 0x20,
- 0xfc, 0x1c, 0x00, 0x95,
- 0x50, 0x82, 0xd3, 0xad,
- 0x50, 0x95, 0xd0, 0x8c,
- 0x04, 0x89, 0xc0, 0x00,
- 0xa1, 0x8b, 0xe0, 0x30,
- 0x0c, 0x60, 0x82, 0xc5,
- 0x40, 0x08, 0x64, 0x01,
- 0x98, 0x68, 0x80, 0x73,
- 0xc4, 0x67, 0x9c, 0x74,
- 0x7c, 0x18, 0x08, 0x85,
- 0x88, 0x63, 0xcf, 0x77,
- 0x98, 0x8e, 0x8e, 0x83,
- 0x58, 0x8a, 0x82, 0xc1,
- 0xf4, 0xd5, 0xec, 0x14,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x81, 0xc1, 0x0f, 0x4e,
- 0x81, 0x61, 0x0d, 0x3e,
- 0x64, 0x09, 0x00, 0x39,
- 0x87, 0x45, 0xc0, 0x02,
- 0x60, 0x34, 0x02, 0x99,
- 0xfa, 0x80, 0x0e, 0xc4,
- 0x60, 0x30, 0x02, 0xb9,
- 0x04, 0x85, 0xc4, 0x77,
- 0xa1, 0xbb, 0xfc, 0x1c,
- 0xe5, 0xa6, 0x54, 0x8a,
- 0x65, 0x26, 0x50, 0x8a,
- 0xf0, 0x9c, 0x52, 0x22,
- 0xd1, 0x87, 0xf0, 0xa7,
- 0x56, 0x82, 0x0f, 0x84,
- 0x8e, 0x83, 0xf9, 0xa8,
- 0x8d, 0xa4, 0xa0, 0xbe,
- 0x8e, 0xa3, 0x02, 0xc5,
- 0xc6, 0x5a, 0xa8, 0x64,
- 0xe5, 0x16, 0x48, 0x6a,
- 0xe5, 0x96, 0x4a, 0x6a,
- 0xee, 0x57, 0xd3, 0x47,
- 0xf9, 0x94, 0x4c, 0x42,
- 0xa0, 0xbe, 0x8c, 0xb3,
- 0x80, 0x73, 0x24, 0x44,
- 0x4e, 0x45, 0x82, 0xc1,
- 0xa8, 0x44, 0xe9, 0x04,
- 0xe9, 0x44, 0x4e, 0x45,
- 0x4e, 0x65, 0xa0, 0x44,
- 0x4e, 0x45, 0xe9, 0xc4,
- 0x58, 0x8a, 0xe9, 0x84,
- 0xf2, 0x75, 0xf4, 0x0c,
- 0x0c, 0xcc, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x81, 0x41, 0x19, 0x31,
- 0x18, 0x54, 0x83, 0x95,
- 0x4c, 0x12, 0x60, 0x84,
- 0x02, 0xc3, 0xf0, 0x94,
- 0x18, 0x5b, 0x82, 0x41,
- 0x0c, 0xc9, 0xe8, 0x00,
- 0xc0, 0x02, 0x60, 0x01,
- 0xe0, 0x88, 0x0c, 0x54,
- 0x7c, 0x18, 0x00, 0x65,
- 0x04, 0xc5, 0xc4, 0xc7,
- 0xd9, 0x6d, 0xfc, 0x30,
- 0xd0, 0x80, 0x4a, 0x52,
- 0x0c, 0x01, 0x4a, 0x31,
- 0x02, 0xcb, 0xc0, 0x04,
- 0x40, 0x01, 0x62, 0x01,
- 0xfb, 0x80, 0x0a, 0x44,
- 0xf8, 0x55, 0xd9, 0x5d,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xef, 0x10, 0x1e, 0xf0,
- 0x84, 0x8b, 0x02, 0x6b,
- 0x64, 0x09, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x02,
- 0x65, 0x10, 0x02, 0xf0,
- 0xe6, 0x10, 0x04, 0xf0,
- 0x81, 0x31, 0x01, 0x65,
- 0x00, 0x00, 0x49, 0x3e,
- 0xc5, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x66, 0x10, 0x12, 0xf0,
- 0xe5, 0x10, 0x14, 0xf0,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x92, 0x3b, 0x10, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x16, 0xf0, 0x94, 0x4b,
- 0x8c, 0x0b, 0x64, 0x10,
- 0x92, 0x2b, 0x10, 0x1b,
- 0x96, 0x4b, 0x14, 0x3b,
- 0xef, 0xfc, 0x76, 0xc8,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x6f, 0xfc, 0x7a, 0xc8,
- 0x01, 0x01, 0x96, 0x2b,
- 0xe7, 0x10, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xff, 0x01, 0x00, 0x24,
- 0x83, 0x2d, 0x84, 0x14,
- 0x00, 0x00, 0x00, 0x06,
- 0x5d, 0x93, 0x82, 0x2d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x9b, 0x7e, 0x2e,
- 0x02, 0x06, 0x3e, 0x0e,
- 0x09, 0x21, 0xe0, 0x10,
- 0x68, 0xf1, 0x06, 0x4e,
- 0x4e, 0xf8, 0xc0, 0x10,
- 0x92, 0x0b, 0x6f, 0xbc,
- 0x81, 0x11, 0x01, 0x01,
- 0x81, 0x01, 0x09, 0x0e,
- 0x83, 0x81, 0x11, 0x1e,
- 0x81, 0xa1, 0x0f, 0x1e,
- 0x81, 0x31, 0x7c, 0x0e,
- 0x0d, 0x3e, 0x91, 0xa5,
- 0xe0, 0x88, 0x00, 0x74,
- 0x12, 0x05, 0x8b, 0x1e,
- 0x4c, 0x78, 0xfc, 0x00,
- 0x0c, 0x74, 0xe8, 0x00,
- 0x01, 0x0a, 0x60, 0x84,
- 0xc0, 0x01, 0x64, 0x00,
- 0x4c, 0x03, 0x92, 0x63,
- 0x00, 0x04, 0x68, 0x00,
- 0x1e, 0x15, 0x80, 0x84,
- 0x40, 0x02, 0x80, 0x04,
- 0x00, 0xb3, 0x90, 0x84,
- 0x00, 0x01, 0x0c, 0x01,
- 0xc0, 0x0c, 0x41, 0x26,
- 0xc0, 0x08, 0x5e, 0x05,
- 0x47, 0xfc, 0x57, 0xf6,
- 0xfb, 0xfc, 0x10, 0x0a,
- 0x7e, 0xa4, 0x86, 0xc5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x64, 0x70, 0x06, 0xf0,
- 0x14, 0x19, 0x96, 0x0b,
- 0x47, 0xb8, 0xe0, 0x28,
- 0x14, 0x09, 0xe8, 0x00,
- 0x80, 0x8b, 0x60, 0x2c,
- 0xa1, 0x0b, 0x28, 0x02,
- 0x40, 0x0e, 0x82, 0x45,
- 0x42, 0x06, 0x60, 0x2e,
- 0x40, 0x0a, 0xe0, 0xf8,
- 0xaa, 0x12, 0xe0, 0x86,
- 0xfa, 0x04, 0x40, 0x02,
- 0x81, 0x11, 0x09, 0x0e,
- 0x81, 0xa1, 0x09, 0x05,
- 0x00, 0x8a, 0x8b, 0x04,
- 0x14, 0xa0, 0xf4, 0x3c,
- 0x02, 0xf6, 0x04, 0x04,
- 0x0c, 0xe5, 0x80, 0x00,
- 0x80, 0x00, 0x10, 0x06,
- 0x89, 0x14, 0x8f, 0x04,
- 0xf1, 0x80, 0x40, 0xb2,
- 0xf0, 0x80, 0x00, 0x04,
- 0x82, 0xc5, 0x83, 0x0d,
- 0x04, 0xf0, 0x7e, 0x04,
- 0x06, 0xf0, 0xe4, 0x80,
- 0x00, 0x19, 0xe4, 0x70,
- 0x96, 0x0b, 0x60, 0x28,
- 0xe8, 0x00, 0x44, 0x28,
- 0x81, 0x81, 0x02, 0xa1,
- 0x0b, 0x04, 0x83, 0xf5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x06, 0xf0, 0x7e, 0xa4,
- 0x82, 0x01, 0xe4, 0x70,
- 0xe0, 0x28, 0x14, 0x19,
- 0x96, 0x0b, 0x0b, 0x0e,
- 0xe8, 0x00, 0x43, 0xc8,
- 0x60, 0x2c, 0x14, 0x09,
- 0x28, 0x02, 0x80, 0x8b,
- 0x82, 0x45, 0xa1, 0x0b,
- 0x60, 0x2e, 0x40, 0x0e,
- 0xe0, 0xf8, 0x42, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0x40, 0x02, 0xaa, 0x12,
- 0x09, 0x0e, 0xfa, 0x04,
- 0x8b, 0x14, 0x81, 0xa1,
- 0x92, 0x73, 0x0d, 0x34,
- 0x4e, 0x11, 0x8f, 0x04,
- 0xc0, 0x02, 0x60, 0x01,
- 0x6c, 0x00, 0x4c, 0xa3,
- 0x4c, 0x03, 0x82, 0x31,
- 0xc0, 0x01, 0x64, 0x09,
- 0x62, 0x01, 0x12, 0x0b,
- 0x0e, 0x34, 0x40, 0x01,
- 0xc1, 0x7d, 0xfb, 0x80,
- 0x00, 0x10, 0xdc, 0x35,
- 0x52, 0x01, 0xe4, 0x04,
- 0xc0, 0x02, 0x64, 0x09,
- 0xc8, 0xf1, 0x7c, 0x04,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x0a, 0x44, 0x88, 0x44,
- 0xaa, 0x43, 0xe9, 0x04,
- 0x81, 0x01, 0x00, 0x43,
- 0xc3, 0x4f, 0x08, 0x4e,
- 0xdd, 0x93, 0x8c, 0x4e,
- 0xa3, 0x0f, 0x0c, 0x0e,
- 0x81, 0x01, 0x08, 0x0e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x09,
- 0xa1, 0x0b, 0x80, 0x3b,
- 0x40, 0x96, 0x06, 0x65,
- 0x48, 0x3a, 0x80, 0x08,
- 0x40, 0x3a, 0xe0, 0x02,
- 0x08, 0x44, 0xe1, 0x02,
- 0x82, 0x43, 0xfa, 0x80,
- 0xec, 0x70, 0x08, 0x49,
- 0x81, 0x01, 0x49, 0x0d,
- 0x86, 0x13, 0x82, 0xa5,
- 0x6b, 0x71, 0x02, 0x19,
- 0xf4, 0x1d, 0xc0, 0x05,
- 0x46, 0x06, 0x80, 0xf5,
- 0x46, 0x4a, 0xe0, 0x64,
- 0x83, 0x11, 0x64, 0x84,
- 0x81, 0x11, 0x80, 0x45,
- 0xdd, 0x93, 0x88, 0x16,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x7b,
- 0x67, 0x71, 0x10, 0x70,
- 0x12, 0x70, 0x40, 0x11,
- 0xc0, 0x03, 0x67, 0x71,
- 0x81, 0xa1, 0x3e, 0xbe,
- 0x81, 0x01, 0x01, 0x61,
- 0x00, 0xa4, 0x85, 0x25,
- 0x04, 0xf0, 0x7b, 0x80,
- 0x7c, 0x58, 0xe4, 0x20,
- 0x8e, 0x1b, 0x6f, 0xfc,
- 0xa1, 0x1b, 0x91, 0x18,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x56, 0x15, 0x9f, 0xff,
- 0x82, 0xe5, 0x80, 0x00,
- 0x45, 0xfe, 0x20, 0x1a,
- 0xcf, 0xff, 0x7f, 0xfd,
- 0xfb, 0x80, 0x0c, 0x64,
- 0xe0, 0x17, 0x82, 0x61,
- 0xac, 0x1e, 0xb4, 0x1f,
- 0xc4, 0x1d, 0xa4, 0x14,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x88, 0xb1, 0x02, 0xa1,
- 0x88, 0x91, 0x04, 0x81,
- 0x60, 0x01, 0x14, 0x0a,
- 0xf6, 0x95, 0xc0, 0x01,
- 0x98, 0xf1, 0x3e, 0x14,
- 0x62, 0x01, 0x42, 0x63,
- 0x0c, 0x0c, 0xc0, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x81, 0x01, 0x5d, 0x93,
- 0x60, 0x38, 0x00, 0x19,
- 0xa1, 0x1b, 0x81, 0x21,
- 0x00, 0x00, 0x02, 0x16,
- 0x80, 0x08, 0x40, 0x96,
- 0xcc, 0x2a, 0x86, 0x25,
- 0xe0, 0x28, 0x06, 0x09,
- 0x7c, 0xc0, 0x08, 0x24,
- 0x48, 0x4a, 0xe2, 0x27,
- 0x02, 0x10, 0x66, 0x86,
- 0x01, 0x0a, 0xec, 0x04,
- 0x40, 0xc6, 0x64, 0x40,
- 0x44, 0x2a, 0xe0, 0x00,
- 0x08, 0x06, 0x60, 0x12,
- 0x00, 0x06, 0xf0, 0x00,
- 0x42, 0x2a, 0x80, 0x00,
- 0x42, 0x42, 0xe6, 0x86,
- 0xce, 0x2c, 0xf1, 0x84,
- 0xe0, 0x10, 0x46, 0x13,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x80, 0x8b, 0x06, 0x6b,
- 0x60, 0x38, 0x0c, 0x09,
- 0x21, 0x0b, 0x84, 0x7b,
- 0x86, 0x95, 0x81, 0x01,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xfc, 0x78, 0xe8,
- 0x40, 0x96, 0x00, 0xab,
- 0x14, 0x0a, 0xe0, 0x08,
- 0x84, 0x45, 0xe2, 0xa4,
- 0x67, 0x71, 0x12, 0x80,
- 0x8e, 0x1b, 0x40, 0x03,
- 0x8c, 0x2b, 0x12, 0x0b,
- 0xef, 0xfc, 0x69, 0x48,
- 0x41, 0x26, 0x00, 0x8b,
- 0xa1, 0x8b, 0xe0, 0x0c,
- 0x9c, 0x00, 0x50, 0xa0,
- 0xe3, 0xc8, 0x10, 0x0a,
- 0x0c, 0x0c, 0x80, 0x95,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x8e, 0x1b, 0x12, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xa1, 0x0b, 0x8c, 0x2b,
- 0xdc, 0x00, 0x50, 0x00,
- 0x0c, 0x0c, 0x90, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe1, 0x00, 0x1e, 0x06,
- 0x61, 0x9c, 0x00, 0x46,
- 0x66, 0x38, 0x83, 0x11,
- 0xc1, 0xc3, 0xef, 0xb8,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x73, 0xd8, 0x81, 0x11,
- 0x81, 0x81, 0x6f, 0xbc,
- 0x60, 0x00, 0x42, 0x76,
- 0x62, 0x98, 0x8c, 0x0b,
- 0x7e, 0xd8, 0xe8, 0x24,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x01, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x0c, 0x2b, 0xef, 0xdc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xf5, 0x42, 0x20,
- 0x44, 0x4a, 0x40, 0xff,
- 0x4c, 0x13, 0xe0, 0x98,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x70, 0x00, 0x39,
- 0xf3, 0xec, 0x44, 0x30,
- 0xf8, 0x70, 0x40, 0x21,
- 0x4c, 0x81, 0x84, 0x45,
- 0x40, 0x2b, 0x6c, 0x21,
- 0x73, 0xf9, 0x42, 0x10,
- 0x4c, 0x13, 0xc0, 0xff,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x20, 0x40, 0x81,
- 0xf8, 0x10, 0x00, 0x19,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xf8, 0x10, 0x40, 0x11,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf8, 0x30, 0x00, 0x19,
- 0x40, 0x11, 0xc8, 0x19,
- 0x40, 0x81, 0xf8, 0x30,
- 0x00, 0x09, 0xe0, 0x30,
- 0x40, 0x0a, 0xf8, 0x30,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x43, 0xf6, 0x1c, 0x04,
- 0xff, 0xc0, 0x6f, 0xfd,
- 0x02, 0x0e, 0x02, 0x0f,
- 0x40, 0x00, 0xf0, 0x00,
- 0xc3, 0x00, 0x7c, 0x01,
- 0x9c, 0x04, 0x9c, 0x0e,
- 0x9c, 0x0e, 0x82, 0x0f,
- 0x6e, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x38, 0x63, 0x11,
- 0x41, 0xc6, 0xa3, 0x0b,
- 0x00, 0x20, 0x12, 0xfd,
- 0x00, 0x01, 0x02, 0x06,
- 0x4c, 0x81, 0xbf, 0xc1,
- 0x80, 0x38, 0x03, 0x11,
- 0x80, 0x00, 0x40, 0x15,
- 0x68, 0x00, 0x5f, 0xa8,
- 0x42, 0x86, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x24, 0x5b, 0x08,
- 0xef, 0xfc, 0x76, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8b, 0x11, 0x00, 0x6b,
- 0xe8, 0x28, 0x56, 0x88,
- 0x61, 0x24, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x06,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x16, 0x81, 0x11,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x08, 0xef, 0xdc,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x0c, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x13, 0x7d,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x5c, 0xa8,
- 0xe8, 0x00, 0x5c, 0x08,
- 0x61, 0x44, 0x40, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0xec, 0x04, 0x02, 0x00,
- 0x84, 0x95, 0xe7, 0x1d,
- 0xec, 0x2c, 0x02, 0x00,
- 0x84, 0xb5, 0xe7, 0x1d,
- 0xec, 0x10, 0x02, 0x00,
- 0x84, 0xd5, 0xe5, 0x1d,
- 0x86, 0x25, 0xad, 0x0b,
- 0x86, 0x65, 0xb3, 0x0b,
- 0x86, 0xb5, 0xb5, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x20, 0x58, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x58,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x40, 0x35, 0x48,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x08, 0x38, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x54,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x4c, 0x10, 0xc8,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0xb5, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0x75, 0xf2, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x01, 0x01,
- 0x68, 0x20, 0x7d, 0xa8,
- 0x03, 0x46, 0x81, 0x61,
- 0x83, 0x31, 0x61, 0x4c,
- 0x08, 0x36, 0x84, 0x24,
- 0xe1, 0x14, 0x44, 0xc6,
- 0x90, 0x36, 0x88, 0x44,
- 0x08, 0x66, 0x88, 0x24,
- 0x84, 0x14, 0x87, 0x21,
- 0x83, 0x11, 0x04, 0x26,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x20, 0x3c, 0x68,
- 0x61, 0x14, 0x40, 0xc6,
- 0x80, 0x04, 0x83, 0x11,
- 0xc1, 0x83, 0x80, 0x16,
- 0xdd, 0x93, 0xc7, 0x13,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x40, 0x96, 0xb3, 0x0b,
- 0x4c, 0x01, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0x40, 0x66, 0x82, 0x25,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x40, 0xf8, 0xe8, 0x50,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0xd1, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x15,
- 0x6c, 0x79, 0x0c, 0x19,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0x01, 0xe6, 0x86,
- 0x67, 0xf9, 0x00, 0x8a,
- 0x41, 0xd6, 0xc0, 0x03,
- 0x0e, 0x66, 0x00, 0x3c,
- 0x00, 0x04, 0x80, 0x04,
- 0xa1, 0x7b, 0x5a, 0x80,
- 0x66, 0x31, 0x4c, 0x03,
- 0x82, 0x45, 0xc0, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x68, 0x0c, 0x70, 0x48,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x47, 0xb8, 0x98, 0x75,
- 0x8c, 0x0b, 0x68, 0x44,
- 0x6c, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2b,
- 0x88, 0x55, 0xb3, 0x0b,
- 0x92, 0xd5, 0xa1, 0x7b,
- 0x68, 0x3c, 0x72, 0xc8,
- 0x00, 0x7b, 0x8c, 0x0b,
- 0xe1, 0x34, 0x41, 0x06,
- 0x02, 0x96, 0x00, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x0e, 0x00, 0x16,
- 0x0c, 0x19, 0xff, 0xf8,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xe3, 0xf0, 0x02, 0x0a,
- 0xc4, 0x04, 0x00, 0x10,
- 0x6c, 0xfd, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xe8, 0x04, 0x4b, 0xe8,
- 0x8c, 0x15, 0xa1, 0x7b,
- 0x21, 0x7b, 0x87, 0x85,
- 0xe0, 0x00, 0x40, 0x66,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8a, 0x15, 0xc0, 0x2b,
- 0x61, 0x4c, 0x55, 0x46,
- 0x66, 0xe0, 0x10, 0x60,
- 0x28, 0x04, 0xc0, 0xa3,
- 0x67, 0x61, 0x12, 0x60,
- 0x02, 0x60, 0xc0, 0x9f,
- 0x40, 0x54, 0x65, 0xc1,
- 0x65, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x54,
- 0x40, 0x54, 0x66, 0xd1,
- 0x5e, 0xd8, 0x90, 0x4b,
- 0x92, 0x5b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x28, 0x04, 0x82, 0xf5,
- 0x66, 0x31, 0x02, 0x60,
- 0x08, 0x60, 0xc0, 0xad,
- 0x40, 0xa1, 0x64, 0x71,
- 0x61, 0x78, 0x90, 0x2b,
- 0x92, 0x3b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x38, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x0c,
- 0x80, 0x55, 0xa1, 0x0b,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x28, 0x04, 0xdd, 0x93,
- 0x64, 0x81, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x99,
- 0x40, 0xa2, 0x65, 0x21,
- 0x50, 0xd8, 0x90, 0x1b,
- 0x73, 0x95, 0xef, 0xf8,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0x64, 0x51, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x03,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x87, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x64, 0x39, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x02,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x18, 0x03, 0x46,
- 0x64, 0x18, 0x01, 0x4a,
- 0x84, 0x14, 0xc0, 0x01,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xdd, 0x93, 0x84, 0x06,
- 0x66, 0x61, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x66, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x86, 0xc5, 0x80, 0x00,
- 0x64, 0x99, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x56, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x84, 0x85, 0x80, 0x00,
- 0x66, 0xc9, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x02,
- 0x04, 0x46, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x82, 0x45, 0x80, 0x00,
- 0x64, 0x95, 0x03, 0x0a,
- 0x03, 0x06, 0x40, 0x02,
- 0x04, 0x14, 0xe1, 0x04,
- 0x04, 0x26, 0x87, 0x21,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x04, 0x03, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x79, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x03, 0x0a, 0xc4, 0x17,
- 0xc0, 0x0f, 0x66, 0x81,
- 0x02, 0x8a, 0x86, 0xf5,
- 0xc0, 0x0f, 0x64, 0xf5,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x06,
- 0x80, 0x00, 0x02, 0x15,
- 0x02, 0x8a, 0x84, 0x85,
- 0xc0, 0x0c, 0x66, 0xcd,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x16,
- 0x80, 0x00, 0x02, 0x15,
- 0x03, 0x0a, 0x82, 0x45,
- 0x40, 0x0a, 0x64, 0xa1,
- 0xe1, 0x04, 0x02, 0xc6,
- 0x85, 0x21, 0x04, 0x14,
- 0x80, 0x00, 0x04, 0x36,
- 0x02, 0xc6, 0x84, 0x26,
- 0x84, 0x14, 0xe1, 0x04,
- 0x40, 0x11, 0x84, 0x18,
- 0xc0, 0x2b, 0x65, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x05, 0x86,
- 0x88, 0x28, 0x88, 0x24,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x09, 0x0e, 0x0d,
- 0xc1, 0x18, 0x05, 0x46,
- 0xc0, 0x00, 0x04, 0x25,
- 0x81, 0xb0, 0x02, 0x14,
- 0x40, 0x00, 0x04, 0x29,
- 0x84, 0x04, 0x02, 0x10,
- 0xc4, 0x04, 0x04, 0x20,
- 0xc0, 0x0a, 0x42, 0x1a,
- 0x6e, 0x01, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xe1, 0x24, 0x01, 0x46,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x06, 0x04, 0x26,
- 0x84, 0x14, 0xe1, 0x14,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x94,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x24, 0x01, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x26, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x18, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0x25, 0x1b, 0xc0, 0x0b,
- 0xe1, 0x24, 0x03, 0x46,
- 0x82, 0x45, 0x84, 0x24,
- 0x42, 0x4a, 0x88, 0x18,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x0c, 0x0c, 0x83, 0x11,
- 0x23, 0xf8, 0xf2, 0xfc,
- 0x3e, 0x0e, 0xe0, 0x20,
- 0x88, 0x18, 0x8c, 0x0b,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x86, 0x08, 0x16,
- 0x75, 0x78, 0xe0, 0x0c,
- 0x81, 0x21, 0x68, 0x50,
- 0x61, 0x44, 0x10, 0xc6,
- 0xe1, 0x48, 0x53, 0x86,
- 0xff, 0xa1, 0x20, 0x04,
- 0xe1, 0x24, 0x57, 0x46,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x4e, 0x00,
- 0x80, 0xc5, 0xa1, 0x7b,
- 0x6f, 0xa9, 0x0c, 0x05,
- 0xa5, 0x0b, 0xc0, 0x0b,
- 0xa4, 0x04, 0x82, 0xd5,
- 0x94, 0x0d, 0x80, 0x00,
- 0x0c, 0x29, 0x84, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x02, 0x96,
- 0x68, 0x0c, 0x59, 0x28,
- 0x81, 0x95, 0x8c, 0x0b,
- 0x80, 0x08, 0xa0, 0x04,
- 0x01, 0x55, 0xc7, 0x07,
- 0xf0, 0x04, 0x4e, 0x00,
- 0xef, 0xfc, 0x52, 0xe8,
- 0x80, 0x04, 0xac, 0x04,
- 0xf8, 0x35, 0xa1, 0x0b,
- 0x83, 0x11, 0x3e, 0x04,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x20, 0x28,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x36, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0x78, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x3e, 0x0e, 0x81, 0x81,
- 0xe1, 0x24, 0x01, 0xc6,
- 0x55, 0x46, 0x00, 0x04,
- 0x80, 0x86, 0xe1, 0x24,
- 0x80, 0x64, 0xa8, 0x04,
- 0x8e, 0x0b, 0x00, 0x14,
- 0xe8, 0x20, 0x74, 0xa8,
- 0x43, 0xa6, 0x03, 0x91,
- 0x03, 0x21, 0xe0, 0x0c,
- 0x70, 0x38, 0x8e, 0x0b,
- 0x41, 0x86, 0xe8, 0x50,
- 0x80, 0x14, 0xe1, 0x14,
- 0x03, 0x46, 0x04, 0x8c,
- 0x84, 0x14, 0xe1, 0x24,
- 0xc4, 0x29, 0x84, 0x28,
- 0x43, 0x46, 0x04, 0x26,
- 0x04, 0x14, 0xe1, 0x18,
- 0x84, 0xb8, 0x83, 0x21,
- 0x02, 0xc6, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x24,
- 0x02, 0x86, 0x04, 0x96,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x00, 0x9c,
- 0xe8, 0x50, 0x6e, 0x88,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0xa9, 0x11,
- 0x8e, 0x0b, 0x00, 0x96,
- 0xe8, 0x20, 0x72, 0x08,
- 0x60, 0x0c, 0x02, 0x86,
- 0x6d, 0xb8, 0x81, 0x21,
- 0x8e, 0x0b, 0x68, 0x50,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0x52, 0x00, 0xc7, 0x07,
- 0x12, 0x0a, 0xf0, 0x04,
- 0x80, 0xc5, 0xfb, 0xfc,
- 0x6f, 0xa9, 0x0e, 0x05,
- 0xa3, 0x0b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x86, 0xb5,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x02, 0xa6,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0xe8, 0x0c, 0x50, 0xa8,
- 0x00, 0xc6, 0x81, 0x85,
- 0x80, 0x04, 0xe1, 0x44,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x52, 0x00,
- 0x80, 0x04, 0xa8, 0x04,
- 0xf4, 0x45, 0x81, 0x6b,
- 0x8e, 0x0b, 0x2b, 0x11,
- 0xe8, 0x20, 0x6e, 0x08,
- 0x00, 0x14, 0xa8, 0x04,
- 0x6d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xc6, 0xe8, 0x20,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xbe, 0x04, 0x83, 0x11,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x16, 0x08,
- 0x70, 0x01, 0x00, 0x06,
- 0x02, 0x06, 0x40, 0x20,
- 0xff, 0xc0, 0x60, 0x01,
- 0xdd, 0x93, 0x80, 0x1e,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x81, 0x01, 0x04, 0x6b,
- 0x68, 0x20, 0x55, 0x08,
- 0x43, 0x86, 0x81, 0x11,
- 0x49, 0xc6, 0x61, 0x48,
- 0x04, 0x24, 0xe1, 0x48,
- 0x70, 0x01, 0x02, 0x06,
- 0x04, 0x34, 0xc0, 0x20,
- 0x88, 0x58, 0xa1, 0x8b,
- 0x08, 0x48, 0x90, 0x24,
- 0x60, 0x01, 0x04, 0x06,
- 0x0c, 0xc9, 0xff, 0xc0,
- 0x40, 0x2b, 0x6c, 0x19,
- 0xa6, 0x5f, 0x84, 0x3f,
- 0x60, 0xc7, 0xd0, 0x47,
- 0x46, 0x52, 0xa8, 0x5f,
- 0x0c, 0x49, 0xf9, 0xb0,
- 0xc0, 0x2c, 0x0c, 0xfd,
- 0xc0, 0xe0, 0x08, 0x44,
- 0x44, 0x22, 0x00, 0xb5,
- 0xa1, 0x7b, 0xd0, 0x90,
- 0x49, 0xfe, 0x80, 0xc5,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xa4, 0x3f, 0x88, 0x3f,
- 0x83, 0x11, 0x04, 0x3e,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x20, 0x12, 0x08,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x50, 0x06, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0xa0,
- 0x40, 0x2d, 0x67, 0xcd,
- 0x20, 0x9e, 0x81, 0x91,
- 0xe1, 0x4c, 0x05, 0xc6,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xc0, 0x00, 0x00, 0x16,
- 0x0c, 0xf5, 0x4c, 0x01,
- 0x40, 0x06, 0x40, 0x2c,
- 0x80, 0x04, 0xe1, 0x4c,
- 0x88, 0x04, 0x80, 0x74,
- 0xe1, 0xe0, 0x16, 0x74,
- 0xe0, 0xe0, 0x14, 0xb4,
- 0xfc, 0xc0, 0x02, 0xa4,
- 0x00, 0x74, 0x00, 0x1e,
- 0x08, 0x14, 0xe1, 0xc0,
- 0xfc, 0xc4, 0x04, 0xa4,
- 0xf0, 0x10, 0x00, 0x0a,
- 0x94, 0x05, 0x84, 0x2e,
- 0xf0, 0x08, 0x00, 0x0a,
- 0x00, 0x0a, 0x98, 0x85,
- 0xaa, 0x65, 0xf0, 0x0c,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x40, 0x00, 0x13, 0x68,
- 0xc1, 0x4c, 0x17, 0xc6,
- 0x02, 0x56, 0x04, 0xab,
- 0x6e, 0xd8, 0xe0, 0x10,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x61, 0x98, 0x05, 0x46,
- 0xfb, 0x80, 0x00, 0x74,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x02, 0x06, 0x40, 0x20,
- 0xc0, 0x20, 0x73, 0x01,
- 0x40, 0x12, 0x20, 0x43,
- 0x20, 0x14, 0xf1, 0x80,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x84,
- 0xd5, 0x8e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x1f, 0x15, 0xf6, 0x15,
- 0x02, 0x56, 0x94, 0x2b,
- 0x8c, 0x0b, 0x60, 0x80,
- 0x68, 0x20, 0x6a, 0xa8,
- 0x0c, 0x0b, 0x84, 0x7b,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x40, 0x00, 0xac, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xef, 0xf8, 0x7c, 0x08,
- 0x8e, 0x2b, 0x1b, 0xa5,
- 0x02, 0x56, 0x3e, 0x2e,
- 0x69, 0x38, 0xe0, 0x20,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x7b, 0x80, 0x00, 0x74,
- 0x72, 0xfc, 0x43, 0xc6,
- 0x40, 0x12, 0xc0, 0x20,
- 0x02, 0x46, 0x71, 0x80,
- 0xc0, 0x20, 0x72, 0xc0,
- 0x04, 0x10, 0x00, 0x34,
- 0x09, 0x91, 0xe4, 0x00,
- 0x17, 0xc6, 0x88, 0x11,
- 0x08, 0x3e, 0xe1, 0x4c,
- 0xe1, 0x98, 0x05, 0x46,
- 0x08, 0xca, 0x85, 0xa5,
- 0xec, 0x08, 0x0a, 0x40,
- 0x0a, 0x34, 0x77, 0x5d,
- 0x4a, 0x50, 0xe1, 0x90,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x80, 0x00, 0x08, 0x16,
- 0x66, 0x96, 0x48, 0x4a,
- 0x20, 0x74, 0xe1, 0x37,
- 0x46, 0xc0, 0x86, 0xc3,
- 0x41, 0xff, 0x73, 0xf1,
- 0xe1, 0x88, 0x0a, 0x44,
- 0x8a, 0xcb, 0x08, 0x01,
- 0x82, 0x7b, 0x0e, 0x33,
- 0x4d, 0xa4, 0x81, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xa1, 0xcb, 0xdd, 0xae,
- 0x00, 0x34, 0xfe, 0x75,
- 0xfb, 0x80, 0x18, 0x94,
- 0x88, 0xc3, 0x44, 0x57,
- 0x12, 0xc0, 0x0a, 0x13,
- 0xc5, 0x3e, 0xe4, 0x10,
- 0xf0, 0x3c, 0x48, 0x30,
- 0xf4, 0x95, 0xbf, 0x4b,
- 0x91, 0xf5, 0xbe, 0x24,
- 0x60, 0x40, 0x02, 0x56,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x4c, 0x91, 0xe8, 0x20,
- 0x40, 0x38, 0x64, 0xc5,
- 0x4a, 0x58, 0x8c, 0x0b,
- 0x45, 0xd8, 0xe8, 0x00,
- 0x0c, 0x0b, 0xef, 0xfc,
- 0x40, 0x15, 0x6e, 0x09,
- 0xff, 0xfc, 0x03, 0xee,
- 0xe8, 0x00, 0x0e, 0x0a,
- 0x42, 0x00, 0x82, 0x0f,
- 0x40, 0x00, 0x7c, 0x04,
- 0x4c, 0x13, 0xfd, 0x04,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x98, 0x03, 0x86,
- 0x4c, 0x03, 0x84, 0x9e,
- 0x40, 0x15, 0x6e, 0x09,
- 0xfb, 0x80, 0x00, 0x74,
- 0x62, 0xe5, 0x4c, 0xb1,
- 0x17, 0xc6, 0x40, 0x15,
- 0x8e, 0x05, 0xe1, 0x4c,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x05, 0x46, 0x40, 0x20,
- 0x02, 0x06, 0xe1, 0x98,
- 0x40, 0x20, 0x73, 0x01,
- 0x20, 0x14, 0xa0, 0x43,
- 0xf1, 0x80, 0x40, 0x12,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x94,
- 0xd5, 0x9e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x0c, 0x19, 0xf6, 0x15,
- 0x40, 0x15, 0x62, 0x65,
- 0xe1, 0x4c, 0x00, 0x46,
- 0x88, 0x19, 0x80, 0x04,
- 0x44, 0x20, 0x80, 0x28,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x0c, 0x09, 0x80, 0x26,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x6c, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x45, 0x88,
- 0x00, 0x60, 0x20, 0x44,
- 0xc0, 0x54, 0x65, 0x01,
- 0x7b, 0x80, 0x04, 0x04,
- 0x19, 0x11, 0x81, 0x01,
- 0x72, 0xc1, 0x06, 0x46,
- 0x4f, 0x58, 0xc0, 0x20,
- 0x2c, 0x14, 0xe8, 0x00,
- 0x00, 0x2e, 0x9f, 0x21,
- 0x7c, 0x51, 0x4e, 0xa0,
- 0x84, 0x7e, 0xc3, 0x00,
- 0xef, 0xf8, 0x6d, 0xe8,
- 0xa9, 0x91, 0x0e, 0x2b,
- 0x60, 0x01, 0x02, 0x06,
- 0x00, 0x94, 0x7f, 0xc0,
- 0x2c, 0x24, 0xfb, 0x80,
- 0xa0, 0x1f, 0x84, 0x1f,
- 0x7c, 0x01, 0x40, 0x10,
- 0x88, 0x0e, 0xc3, 0x00,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x80, 0x95, 0xe0, 0x98,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x8c, 0x0b, 0xdd, 0x93,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0xa5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0x86, 0x00, 0x6b,
- 0x80, 0x14, 0xe1, 0x48,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xbc,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0x7c, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0xef, 0xf8, 0x7a, 0x68,
- 0x83, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x22, 0x78, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0x08, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x61, 0x45, 0x00, 0x29,
- 0x0a, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x65, 0xc1,
- 0x62, 0x11, 0x00, 0x39,
- 0x91, 0xc1, 0x40, 0x15,
- 0x81, 0x71, 0x01, 0x61,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x1d, 0x00, 0x19,
- 0x40, 0x21, 0xc0, 0x15,
- 0x40, 0x15, 0x63, 0x09,
- 0x40, 0x31, 0x81, 0x21,
- 0xc0, 0x15, 0x63, 0x0d,
- 0x06, 0x10, 0x07, 0xc5,
- 0x0c, 0x4a, 0xe4, 0x40,
- 0x0c, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x0e, 0x06, 0x04, 0x10,
- 0x94, 0x84, 0x80, 0x00,
- 0x50, 0x0a, 0x51, 0x84,
- 0x82, 0x25, 0xe4, 0x9c,
- 0x6c, 0x34, 0x12, 0x80,
- 0x12, 0xda, 0xa1, 0x8b,
- 0x42, 0x0a, 0xe4, 0x08,
- 0x80, 0x95, 0xed, 0x80,
- 0x82, 0x61, 0x02, 0x71,
- 0xbf, 0x8b, 0x85, 0x05,
- 0xa1, 0x6b, 0x88, 0x25,
- 0x00, 0x95, 0x82, 0x45,
- 0xc0, 0x0d, 0x69, 0x6d,
- 0x12, 0xc0, 0x93, 0x6b,
- 0x40, 0x93, 0x84, 0x20,
- 0x80, 0x16, 0x0b, 0xe1,
- 0xf0, 0x3c, 0x52, 0x80,
- 0x02, 0xa5, 0xb9, 0x9b,
- 0x9b, 0x80, 0x18, 0xc4,
- 0xa1, 0x9b, 0x49, 0x87,
- 0x73, 0xfd, 0x50, 0x80,
- 0x18, 0xc4, 0x40, 0x0f,
- 0x50, 0x8a, 0xfb, 0x80,
- 0x90, 0xc3, 0xc6, 0xa6,
- 0x88, 0xc1, 0x7d, 0x05,
- 0xe5, 0xfc, 0x0d, 0x0a,
- 0x40, 0x23, 0xf0, 0xa5,
- 0x40, 0x0a, 0x68, 0x95,
- 0xfb, 0x80, 0x08, 0xc4,
- 0x68, 0x89, 0x40, 0x13,
- 0x88, 0x33, 0x40, 0x0a,
- 0x6f, 0xf1, 0x06, 0x8a,
- 0x0a, 0x34, 0x40, 0x2b,
- 0x00, 0x49, 0xfb, 0x80,
- 0x00, 0x2d, 0x07, 0xcd,
- 0x40, 0x13, 0x88, 0x11,
- 0x40, 0x0a, 0x68, 0x8d,
- 0xec, 0x04, 0x02, 0x30,
- 0x68, 0x91, 0x40, 0x33,
- 0x06, 0x06, 0x40, 0x0a,
- 0xc0, 0x20, 0x70, 0x01,
- 0x68, 0x85, 0x40, 0x13,
- 0x02, 0x14, 0x40, 0x0a,
- 0x48, 0x40, 0xfb, 0x80,
- 0xa6, 0x1f, 0x1c, 0x20,
- 0x07, 0xcd, 0x40, 0x41,
- 0x00, 0x45, 0x80, 0x2d,
- 0xc0, 0x0d, 0x69, 0x69,
- 0x64, 0xf9, 0x40, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x89, 0x41, 0x09, 0x5b,
- 0x0e, 0x09, 0x00, 0x2b,
- 0x40, 0x43, 0xc0, 0x15,
- 0xc0, 0x0a, 0x68, 0x81,
- 0x12, 0xfd, 0x44, 0x20,
- 0x40, 0x23, 0xc0, 0xff,
- 0x40, 0x15, 0x0e, 0x09,
- 0xe1, 0x40, 0x04, 0x46,
- 0x00, 0x86, 0x08, 0x24,
- 0x88, 0x1e, 0xe1, 0x40,
- 0x80, 0x1e, 0x80, 0x04,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x98, 0x0b, 0x46,
- 0xe0, 0x90, 0x0c, 0x14,
- 0x4e, 0x00, 0x14, 0xca,
- 0x0c, 0x64, 0xf0, 0x3c,
- 0xa1, 0x0b, 0x7b, 0x80,
- 0x00, 0x16, 0x2e, 0x6f,
- 0x58, 0x22, 0x80, 0x00,
- 0x40, 0x1a, 0x71, 0xb0,
- 0x04, 0xc4, 0xe6, 0x82,
- 0x02, 0xc4, 0x60, 0xc0,
- 0x24, 0x6f, 0xfb, 0x80,
- 0x49, 0x6e, 0x86, 0x2b,
- 0x94, 0x5a, 0xc5, 0x07,
- 0x02, 0x00, 0x02, 0x53,
- 0x4a, 0x50, 0xe4, 0x04,
- 0xc1, 0xff, 0x73, 0xf1,
- 0x8a, 0x43, 0x01, 0x65,
- 0x00, 0x00, 0x51, 0x54,
- 0xc9, 0x5e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x40, 0x32, 0xc4, 0x17,
- 0x0c, 0x0c, 0xf0, 0x84,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x36, 0x6e, 0x01,
- 0x40, 0x60, 0xa3, 0x0b,
- 0x4f, 0x78, 0x9c, 0x00,
- 0x41, 0x06, 0x88, 0x00,
- 0x02, 0x96, 0x61, 0x34,
- 0x00, 0x04, 0xe0, 0x04,
- 0xe1, 0xa0, 0x50, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x71, 0x40, 0x2b,
- 0x00, 0x16, 0xa0, 0x7e,
- 0x0c, 0x0b, 0x81, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x67, 0xb8, 0x81, 0x01,
- 0x7e, 0x0e, 0xe8, 0x1c,
- 0xe1, 0x48, 0x41, 0x86,
- 0x41, 0xc6, 0x00, 0x14,
- 0xfc, 0x1e, 0xe1, 0x48,
- 0x80, 0x04, 0x84, 0x18,
- 0x0c, 0x29, 0x80, 0x08,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x68, 0x89, 0x0c, 0x0b,
- 0x06, 0x04, 0x40, 0x0a,
- 0x02, 0x29, 0xe0, 0xa0,
- 0x3e, 0x3e, 0xa6, 0x1f,
- 0x24, 0x1f, 0xf0, 0x27,
- 0x4c, 0x15, 0xc5, 0x07,
- 0x40, 0x02, 0x68, 0x01,
- 0x64, 0x31, 0x06, 0x60,
- 0x83, 0x11, 0xc0, 0x28,
- 0x46, 0x75, 0xc1, 0x1d,
- 0x02, 0x10, 0x58, 0x04,
- 0x7e, 0x75, 0xc4, 0x04,
- 0xc4, 0x10, 0x06, 0x30,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x08, 0x60, 0x40, 0x1c,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x65, 0xc1, 0x0a, 0x60,
- 0x81, 0xb1, 0x40, 0xd9,
- 0xbc, 0x0e, 0x81, 0xa1,
- 0xf8, 0x04, 0x46, 0x05,
- 0x09, 0x0e, 0xa0, 0x04,
- 0xe1, 0x98, 0x01, 0x46,
- 0x81, 0x01, 0x00, 0x9a,
- 0x14, 0x4a, 0x8b, 0x85,
- 0x14, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x16, 0x06, 0x04, 0x10,
- 0x94, 0x14, 0x80, 0x00,
- 0x42, 0x0a, 0x51, 0x14,
- 0x90, 0xe5, 0xe4, 0xac,
- 0x84, 0x25, 0xa1, 0xab,
- 0x69, 0x6d, 0x0c, 0x25,
- 0x85, 0xab, 0xc0, 0x0d,
- 0x08, 0x91, 0x0c, 0x0b,
- 0x40, 0x00, 0x80, 0x0a,
- 0x80, 0xff, 0x13, 0xf1,
- 0x90, 0x98, 0x40, 0x02,
- 0x06, 0x00, 0x0e, 0xa5,
- 0x80, 0x28, 0x04, 0x01,
- 0xec, 0x34, 0x04, 0x10,
- 0x80, 0xb5, 0xe4, 0x2d,
- 0xbf, 0x1b, 0x4d, 0x1e,
- 0x87, 0x25, 0x8a, 0xd5,
- 0x8a, 0x65, 0xa1, 0x1b,
- 0x70, 0x3c, 0x58, 0x10,
- 0xe1, 0xc0, 0x04, 0x14,
- 0xb9, 0xcb, 0x0c, 0x1e,
- 0x84, 0x8b, 0x01, 0x71,
- 0x49, 0x17, 0x82, 0x45,
- 0x4e, 0x10, 0xa1, 0xcb,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x4e, 0x7a, 0x80, 0x8b,
- 0xc5, 0x77, 0xc6, 0xb2,
- 0x92, 0x23, 0x09, 0x14,
- 0x73, 0xf1, 0x40, 0x20,
- 0x88, 0x31, 0x41, 0xff,
- 0x02, 0x03, 0x86, 0x2b,
- 0x81, 0xa5, 0x8e, 0x1b,
- 0x02, 0x10, 0x21, 0x8b,
- 0x00, 0xc5, 0xec, 0x04,
- 0x88, 0x01, 0x00, 0x00,
- 0x00, 0x00, 0x44, 0xc5,
- 0xa1, 0x1b, 0x88, 0x21,
- 0x44, 0x77, 0xfc, 0xd5,
- 0x8e, 0x33, 0x90, 0x0b,
- 0x82, 0xa1, 0x02, 0xb1,
- 0xe5, 0xfc, 0x15, 0x0a,
- 0x9d, 0x01, 0xe8, 0xe5,
- 0x9f, 0x01, 0x0c, 0x0e,
- 0xbc, 0x04, 0x8e, 0x0e,
- 0xfc, 0x04, 0xcc, 0x0e,
- 0x0c, 0x19, 0x80, 0x08,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf0, 0x17, 0xbe, 0x24,
- 0xa2, 0x0f, 0xa4, 0x0f,
- 0x68, 0x01, 0x4c, 0x05,
- 0x8c, 0x0b, 0x40, 0x02,
- 0xe8, 0x10, 0x4a, 0xc8,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x80, 0x18, 0x82, 0x65,
- 0x42, 0x10, 0x80, 0x28,
- 0x44, 0x20, 0xf0, 0x80,
- 0xa2, 0x2f, 0xf3, 0x7c,
- 0xf8, 0x80, 0x42, 0x20,
- 0x7e, 0x04, 0x80, 0x16,
- 0x5b, 0xb8, 0x83, 0x11,
- 0x01, 0x86, 0xe8, 0x1c,
- 0x80, 0x04, 0xe1, 0x98,
- 0x0c, 0x0b, 0xa3, 0x0b,
- 0x80, 0x15, 0x0e, 0x09,
- 0x9c, 0xa4, 0x00, 0x04,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x80, 0x85, 0x80, 0x15,
- 0x68, 0x00, 0x49, 0xc8,
- 0x03, 0x01, 0x8c, 0x0b,
- 0x45, 0x18, 0x81, 0x11,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0x1c, 0x38, 0xf2, 0x7c,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x63, 0x09, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x15,
- 0x00, 0xc9, 0x91, 0x15,
- 0x40, 0x36, 0x6e, 0x09,
- 0xfa, 0x80, 0x08, 0x24,
- 0x63, 0x0d, 0x00, 0x69,
- 0x46, 0x02, 0x40, 0x15,
- 0x06, 0x59, 0xf0, 0x90,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x58, 0x6a, 0xa1, 0xcb,
- 0x0c, 0x30, 0x66, 0x92,
- 0xc0, 0xdb, 0x66, 0x10,
- 0x6e, 0x11, 0x46, 0x51,
- 0x86, 0x45, 0xc0, 0x36,
- 0x7a, 0x80, 0x0e, 0xc4,
- 0x12, 0x84, 0x81, 0x81,
- 0xcb, 0x9d, 0xfa, 0x80,
- 0x54, 0x92, 0x84, 0x05,
- 0x56, 0x02, 0xf0, 0x9c,
- 0x16, 0xb9, 0xf0, 0xa8,
- 0xc0, 0x1a, 0x6e, 0x41,
- 0x7c, 0x85, 0xb9, 0xbb,
- 0x84, 0x04, 0x10, 0x80,
- 0x94, 0xcb, 0x32, 0x53,
- 0x81, 0x45, 0x98, 0x56,
- 0x81, 0x71, 0x0b, 0x9b,
- 0x0a, 0x8a, 0x80, 0xa5,
- 0x83, 0x71, 0x74, 0x08,
- 0x18, 0x76, 0x80, 0x75,
- 0x18, 0xc4, 0x8e, 0x5b,
- 0x0c, 0x00, 0x7a, 0x80,
- 0xc0, 0x58, 0x66, 0x40,
- 0x60, 0x88, 0x0e, 0xc4,
- 0xe0, 0x88, 0x12, 0x44,
- 0x7c, 0x1c, 0x0c, 0x85,
- 0x66, 0x10, 0x14, 0x00,
- 0x14, 0x93, 0xc0, 0xdb,
- 0x0a, 0x0a, 0x8c, 0x73,
- 0x82, 0x21, 0x7b, 0xfc,
- 0xe0, 0x40, 0x52, 0x85,
- 0xe8, 0x00, 0x0e, 0x85,
- 0x62, 0x40, 0x52, 0x85,
- 0xe0, 0x84, 0x10, 0xc4,
- 0x64, 0x00, 0x0e, 0x75,
- 0x18, 0x63, 0x8c, 0x83,
- 0xd0, 0x80, 0x58, 0xc2,
- 0x61, 0x40, 0x52, 0x75,
- 0xe0, 0x84, 0x12, 0x44,
- 0x68, 0x01, 0x10, 0x7b,
- 0x94, 0x93, 0x40, 0x01,
- 0x52, 0x73, 0x88, 0xa3,
- 0x10, 0x7b, 0xe6, 0x80,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xe7, 0x80, 0x52, 0x73,
- 0x60, 0x01, 0x0c, 0x79,
- 0x54, 0x71, 0xc0, 0x04,
- 0xc0, 0x01, 0x61, 0x01,
- 0x64, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0xc0, 0x01, 0x62, 0x01,
- 0x68, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0x40, 0x01, 0x63, 0x01,
- 0x18, 0x49, 0x81, 0x41,
- 0xc0, 0x1a, 0x0e, 0x41,
- 0x62, 0x11, 0x46, 0x41,
- 0x44, 0x8a, 0xc0, 0x38,
- 0xde, 0xd5, 0xf4, 0x04,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x1c, 0x50, 0xc8,
- 0x0c, 0x1b, 0x81, 0x11,
- 0x40, 0x0a, 0x68, 0x91,
- 0x00, 0x60, 0x80, 0x7b,
- 0x40, 0x28, 0x64, 0x01,
- 0x70, 0x01, 0x04, 0x06,
- 0x88, 0x11, 0xc0, 0x20,
- 0xc5, 0x17, 0x01, 0x65,
- 0x02, 0x10, 0x41, 0x34,
- 0xc9, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x1b,
- 0x61, 0x48, 0x41, 0x86,
- 0x80, 0x04, 0x8c, 0x2b,
- 0xe0, 0x19, 0x80, 0x18,
- 0x83, 0x01, 0x00, 0x16,
- 0x6f, 0xf8, 0x79, 0x88,
- 0x50, 0xd8, 0x81, 0x11,
- 0x7d, 0x18, 0xef, 0xf8,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x83, 0x11, 0x40, 0x1c,
- 0x4c, 0x03, 0x82, 0x01,
- 0x40, 0x1c, 0x61, 0x8d,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x0d, 0xb8, 0xf2, 0x84,
- 0xc1, 0xc3, 0xe0, 0x1c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x43, 0x86, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x48,
- 0xe0, 0x98, 0x06, 0x04,
- 0xf1, 0x00, 0x46, 0x30,
- 0x44, 0x20, 0x84, 0x28,
- 0x26, 0x2f, 0xf2, 0xfc,
- 0xe1, 0x98, 0x07, 0x86,
- 0x0c, 0x0e, 0x84, 0x26,
- 0x0c, 0x1b, 0x82, 0x09,
- 0x40, 0x15, 0x6e, 0x09,
- 0x42, 0x10, 0xd0, 0x07,
- 0xc0, 0xfe, 0x73, 0xfd,
- 0x4c, 0x13, 0xa0, 0x1f,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xef, 0xf8, 0x4d, 0xc8,
- 0x81, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x35, 0xd8, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xe1, 0x00, 0x01, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xc7, 0x13, 0xc1, 0x83,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x65, 0x39, 0x4c, 0x01,
- 0x04, 0x60, 0x40, 0x2c,
- 0xc0, 0xb1, 0x65, 0x41,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x42, 0x88,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x4e, 0x28,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x68, 0x48, 0x59, 0x88,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x45, 0x76, 0x01, 0x11,
- 0x09, 0x31, 0xe0, 0x00,
- 0x5d, 0x58, 0x8c, 0x0b,
- 0xa3, 0x8b, 0xe8, 0x48,
- 0xa1, 0x0b, 0xfc, 0xb5,
- 0x0c, 0x0b, 0xfc, 0x75,
- 0x52, 0x38, 0x8e, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x01, 0x11, 0xfa, 0xb5,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xb1, 0x45,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xc0, 0x1e, 0xf0,
- 0x60, 0x04, 0x46, 0x86,
- 0x40, 0x31, 0xa5, 0x1b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xa1, 0x81, 0x0e, 0xa5,
- 0xaa, 0x35, 0xa3, 0x1b,
- 0x60, 0x0c, 0x41, 0xe6,
- 0xe0, 0x0c, 0x59, 0xe6,
- 0x01, 0xa6, 0x17, 0x0e,
- 0x11, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0x26,
- 0x01, 0x86, 0x0f, 0x0e,
- 0x15, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x00, 0x06,
- 0xa1, 0x01, 0x0b, 0x0e,
- 0x00, 0x06, 0x09, 0x0e,
- 0x7e, 0x0e, 0xe0, 0x04,
- 0x7c, 0x0e, 0xa1, 0x01,
- 0xe0, 0x04, 0x01, 0x86,
- 0x01, 0x86, 0x0d, 0x0e,
- 0x3e, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0xa6,
- 0x49, 0xf6, 0x3c, 0x0e,
- 0x4b, 0xa6, 0xe0, 0x0c,
- 0x03, 0xa6, 0x60, 0x0c,
- 0x07, 0x06, 0xe0, 0x0c,
- 0x11, 0x06, 0x60, 0x04,
- 0x0d, 0xa6, 0xe0, 0x04,
- 0x13, 0xa6, 0x60, 0x04,
- 0x0f, 0xa6, 0xe0, 0x0c,
- 0x55, 0xa6, 0x60, 0x0c,
- 0x13, 0xce, 0xe0, 0x0c,
- 0xe0, 0x0c, 0x41, 0xe6,
- 0x57, 0xf6, 0x05, 0x95,
- 0x00, 0x06, 0xe0, 0x0c,
- 0x89, 0x11, 0x60, 0x08,
- 0x91, 0x01, 0x13, 0x0e,
- 0x40, 0x06, 0x17, 0x0e,
- 0x0d, 0x0e, 0xe0, 0x00,
- 0x15, 0x0e, 0x85, 0x01,
- 0x0b, 0x0e, 0x83, 0x01,
- 0x09, 0x0e, 0x81, 0x01,
- 0x7e, 0x0e, 0xa1, 0x01,
- 0x7c, 0x0e, 0x83, 0x01,
- 0x0f, 0x0e, 0x81, 0x01,
- 0x11, 0x0e, 0x85, 0x01,
- 0x3e, 0x0e, 0x81, 0x01,
- 0xe0, 0x00, 0x40, 0x06,
- 0x81, 0x31, 0x3c, 0x0e,
- 0x81, 0x91, 0x01, 0x61,
- 0x14, 0x06, 0x01, 0x51,
- 0x01, 0x01, 0xe0, 0x04,
- 0x16, 0x06, 0x81, 0x41,
- 0x81, 0xc1, 0xe0, 0x08,
- 0x8b, 0xc4, 0x88, 0xc6,
- 0x89, 0xc4, 0x8a, 0xc6,
- 0xfe, 0xc4, 0xc8, 0xc6,
- 0xfc, 0xc4, 0xca, 0xc6,
- 0xe0, 0x18, 0x44, 0x81,
- 0xe0, 0x14, 0x44, 0x31,
- 0xe0, 0x10, 0x44, 0xc1,
- 0xe0, 0x1c, 0x44, 0x31,
- 0xe0, 0x20, 0x44, 0x31,
- 0x44, 0x31, 0x95, 0x34,
- 0x8f, 0x34, 0xe0, 0x24,
- 0xe0, 0x28, 0x44, 0x31,
- 0x44, 0x31, 0x8d, 0x34,
- 0x91, 0x34, 0xe0, 0x2c,
- 0xe0, 0x30, 0x44, 0x31,
- 0x44, 0x31, 0xbe, 0x34,
- 0xbc, 0x34, 0xe0, 0x34,
- 0xe0, 0x3c, 0x44, 0x61,
- 0xe0, 0x40, 0x44, 0x61,
- 0xe0, 0x38, 0x44, 0x31,
- 0xe0, 0x48, 0x44, 0x91,
- 0xe0, 0x4c, 0x44, 0x71,
- 0xe0, 0x44, 0x44, 0x11,
- 0xe0, 0x50, 0x44, 0x11,
- 0xe0, 0x58, 0x44, 0xa1,
- 0xe0, 0x54, 0x44, 0x51,
- 0xe0, 0x5c, 0x44, 0x51,
- 0xe0, 0x60, 0x44, 0x51,
- 0xe0, 0x68, 0x44, 0x01,
- 0x44, 0x01, 0x93, 0x04,
- 0x97, 0x04, 0xe0, 0x6c,
- 0xe0, 0x78, 0x44, 0xb1,
- 0xe0, 0x74, 0x44, 0x41,
- 0xe0, 0x64, 0x44, 0x01,
- 0xe0, 0x70, 0x44, 0x01,
- 0xe0, 0x7c, 0x44, 0x41,
- 0xe0, 0xf1, 0x01, 0x01,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x80, 0x6b, 0x25, 0x1b,
- 0x81, 0x01, 0x04, 0x25,
- 0x92, 0x95, 0xa3, 0x1b,
- 0x65, 0x41, 0x02, 0x60,
- 0x8c, 0x0b, 0x40, 0xb1,
- 0xe8, 0x48, 0x62, 0xe8,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x4c, 0x01, 0x83, 0x01,
- 0xc0, 0x2c, 0x65, 0x39,
- 0x42, 0x86, 0x87, 0xe5,
- 0x04, 0x06, 0x60, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x60, 0x11, 0x02, 0x06,
- 0x3e, 0x1e, 0xc4, 0x00,
- 0x09, 0x1c, 0x83, 0x11,
- 0x15, 0x16, 0xa1, 0x11,
- 0xe0, 0x00, 0x42, 0x06,
- 0x85, 0x71, 0x1f, 0x16,
- 0x89, 0x11, 0x25, 0x16,
- 0x31, 0x16, 0xab, 0x16,
- 0xaf, 0x26, 0x91, 0x11,
- 0x04, 0x06, 0x35, 0x26,
- 0x97, 0x06, 0xe0, 0x08,
- 0x9b, 0x76, 0x99, 0x06,
- 0xa1, 0x76, 0x9d, 0x06,
- 0xa7, 0x06, 0xa3, 0x06,
- 0xad, 0x06, 0xa9, 0x06,
- 0xb7, 0x06, 0xb3, 0x06,
- 0xbb, 0x16, 0xb9, 0x06,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x10, 0x02, 0xf0,
- 0xbf, 0x26, 0xbd, 0x06,
- 0xe0, 0x84, 0x5e, 0x01,
- 0x60, 0x8c, 0x5e, 0x01,
- 0x5e, 0x21, 0x8c, 0x0b,
- 0x5e, 0xf8, 0xe0, 0x88,
- 0xa1, 0x0b, 0xe8, 0x48,
- 0x4c, 0x71, 0x80, 0xb5,
- 0xc0, 0x2c, 0x65, 0x39,
- 0xc8, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0xcc,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x64, 0x90, 0x02, 0xf0,
- 0xe4, 0x80, 0x04, 0xf0,
- 0xe8, 0x10, 0x49, 0x68,
- 0x60, 0x90, 0x1e, 0x89,
- 0xe0, 0x04, 0x0e, 0x2a,
- 0xe0, 0x80, 0x1e, 0x79,
- 0x40, 0x01, 0x01, 0x88,
- 0x04, 0x60, 0xc0, 0x00,
- 0x40, 0xb1, 0x65, 0xc1,
- 0x01, 0x55, 0x99, 0x31,
- 0x49, 0x16, 0x81, 0x11,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x65, 0xf1, 0x04, 0x60,
- 0x9d, 0x31, 0x40, 0xb1,
- 0x49, 0x1c, 0x81, 0x45,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x15, 0xc6, 0x01, 0x91,
- 0x07, 0x85, 0xea, 0xf0,
- 0xa1, 0x0b, 0x81, 0xb1,
- 0x40, 0x62, 0x8e, 0x15,
- 0x04, 0x74, 0x70, 0xa8,
- 0x00, 0x9c, 0xfa, 0x80,
- 0xe0, 0x90, 0x00, 0x84,
- 0x79, 0x9c, 0x42, 0x02,
- 0xf0, 0xac, 0x40, 0x62,
- 0x6e, 0xf1, 0x40, 0x11,
- 0x43, 0xf6, 0x40, 0x2b,
- 0x80, 0x00, 0x40, 0x0d,
- 0x60, 0x31, 0x40, 0x91,
- 0x40, 0x11, 0xc0, 0x2c,
- 0x80, 0x2c, 0x42, 0xb1,
- 0x43, 0xf1, 0x40, 0x11,
- 0x02, 0xb4, 0x00, 0x2c,
- 0x40, 0x91, 0xfa, 0x80,
- 0x00, 0x2c, 0x41, 0x71,
- 0x4f, 0x58, 0x8c, 0x0b,
- 0x1e, 0x89, 0xe8, 0x00,
- 0x00, 0x80, 0x60, 0x90,
- 0x02, 0x04, 0xe4, 0x04,
- 0x82, 0xb1, 0x7a, 0x80,
- 0x04, 0x80, 0x84, 0xa1,
- 0x43, 0x4a, 0xe4, 0x24,
- 0x02, 0x0c, 0xe4, 0x08,
- 0x50, 0x00, 0x62, 0x00,
- 0x02, 0x73, 0xdc, 0x00,
- 0x17, 0x0a, 0x81, 0x01,
- 0xf2, 0x05, 0xe5, 0x3c,
- 0xf6, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xee, 0x50, 0x1e, 0xf0,
- 0xa1, 0x1b, 0x00, 0x6b,
- 0x65, 0x39, 0x0c, 0x09,
- 0x84, 0x8b, 0x40, 0x2c,
- 0x42, 0x66, 0x8a, 0x25,
- 0xa5, 0x0b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x91, 0x40, 0x2b,
- 0x81, 0xb1, 0x02, 0xc5,
- 0x8c, 0x0b, 0x05, 0x11,
- 0xef, 0xfc, 0x72, 0x68,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0xc0, 0x00, 0x0b, 0xa8,
- 0x68, 0x04, 0x54, 0x48,
- 0x80, 0xbb, 0x8c, 0x0b,
- 0xe4, 0x40, 0x10, 0x8a,
- 0xa1, 0xbb, 0xa2, 0x75,
- 0x0c, 0x29, 0xa2, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x04, 0x63, 0xe8,
- 0x56, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x9e, 0xd5, 0x81, 0x81,
- 0x23, 0x0b, 0x95, 0x25,
- 0xe0, 0x04, 0x40, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x82, 0x05, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xfc, 0x70, 0x08,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x00, 0xc6, 0xa4, 0x95,
- 0x02, 0xf0, 0x60, 0x08,
- 0x01, 0x55, 0xe4, 0x20,
- 0x45, 0xb6, 0x81, 0xb1,
- 0xec, 0x04, 0x00, 0x00,
- 0xfe, 0x95, 0xa1, 0x0b,
- 0x10, 0x60, 0x01, 0x01,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x15, 0x06, 0x3c, 0x0e,
- 0x89, 0x55, 0xe0, 0x04,
- 0x78, 0x81, 0x10, 0x09,
- 0x95, 0x11, 0x40, 0x01,
- 0x61, 0x90, 0x12, 0x04,
- 0x42, 0x9a, 0x9e, 0x09,
- 0x82, 0x03, 0xe6, 0x86,
- 0xe6, 0x30, 0x01, 0x0a,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xb7, 0x1b, 0x84, 0x14,
- 0x0c, 0x29, 0x82, 0xf5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x03, 0x36,
- 0x68, 0x04, 0x5f, 0xa8,
- 0x0f, 0x36, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xe0, 0x08, 0x00, 0xc6,
- 0xa1, 0xbb, 0x88, 0x05,
- 0x4e, 0xb0, 0x06, 0xd5,
- 0x20, 0x18, 0xdc, 0x00,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x61, 0x40, 0x14, 0x0a,
- 0x88, 0x16, 0x80, 0x23,
- 0x00, 0x04, 0x5e, 0x95,
- 0x80, 0x00, 0x0e, 0x06,
- 0x80, 0x00, 0x5e, 0x95,
- 0x3e, 0x04, 0x82, 0xc5,
- 0x00, 0x04, 0x81, 0x71,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbe, 0x0e, 0xfb, 0x80,
- 0x00, 0x04, 0xbc, 0x04,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbc, 0x0e, 0xfa, 0x80,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x8e, 0xbb, 0x82, 0x81,
- 0xee, 0x75, 0xa1, 0xab,
- 0x8c, 0xf5, 0xa1, 0xbb,
- 0x00, 0x04, 0xbc, 0x04,
- 0xc4, 0x07, 0xfa, 0x80,
- 0x0e, 0x00, 0x3e, 0x04,
- 0x12, 0x04, 0xe4, 0x10,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0x68, 0x00, 0x54, 0xa8,
- 0x03, 0xd5, 0xc4, 0x97,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x40, 0xf6, 0x88, 0xd5,
- 0x40, 0x00, 0x61, 0xa1,
- 0x81, 0xb5, 0x81, 0x11,
- 0x60, 0x80, 0x42, 0x0a,
- 0x10, 0x29, 0x90, 0x2b,
- 0x06, 0xf0, 0x5c, 0x00,
- 0x02, 0x33, 0xe4, 0x20,
- 0x8c, 0x26, 0x82, 0x11,
- 0xe2, 0x30, 0x02, 0x0a,
- 0x0c, 0x0b, 0xfc, 0x95,
- 0x4b, 0x58, 0x90, 0x1b,
- 0x00, 0xbb, 0xe8, 0x04,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x82, 0x75, 0xa1, 0xbb,
- 0x7a, 0x80, 0x02, 0x94,
- 0xfa, 0x80, 0x04, 0x74,
- 0x64, 0x20, 0x06, 0xf0,
- 0x49, 0x98, 0x8c, 0x0b,
- 0x80, 0xbb, 0xe8, 0x48,
- 0x1e, 0xf0, 0x16, 0x0b,
- 0x0c, 0x0c, 0xe6, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0x8b, 0x00, 0x9b,
- 0x0c, 0x90, 0x7c, 0x2e,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xf0, 0xa0, 0x54, 0x62,
- 0xe2, 0x80, 0x14, 0x19,
- 0xe8, 0x00, 0x4c, 0x88,
- 0x80, 0x7b, 0x42, 0x87,
- 0x67, 0xc0, 0x00, 0xa0,
- 0x3c, 0x6e, 0x90, 0x63,
- 0x65, 0x45, 0x12, 0x90,
- 0x3e, 0x0e, 0xc0, 0xb1,
- 0x01, 0xa1, 0x81, 0xb1,
- 0x05, 0x55, 0x81, 0x81,
- 0xfc, 0x24, 0x81, 0x61,
- 0xf8, 0x04, 0x12, 0x09,
- 0x44, 0x0a, 0xa4, 0x18,
- 0xd0, 0x07, 0xe0, 0x80,
- 0x48, 0x00, 0x4d, 0x08,
- 0x0e, 0x0f, 0xa2, 0x0f,
- 0xfb, 0x80, 0x02, 0x64,
- 0x82, 0x45, 0x83, 0x0b,
- 0x10, 0x84, 0x03, 0x11,
- 0x14, 0xa4, 0xfa, 0x80,
- 0xb7, 0x1f, 0x7b, 0x80,
- 0x82, 0x81, 0x22, 0xaf,
- 0x3f, 0xbb, 0x80, 0x6b,
- 0x1e, 0x05, 0x82, 0xb1,
- 0x84, 0x91, 0x00, 0x04,
- 0x80, 0x00, 0x40, 0x81,
- 0x80, 0x00, 0x1e, 0x05,
- 0x80, 0x00, 0x40, 0xa3,
- 0xe0, 0x40, 0x16, 0x0a,
- 0x01, 0x01, 0xf6, 0x75,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xe5, 0x7c, 0x03, 0x0a,
- 0x04, 0x14, 0x82, 0xb5,
- 0x8e, 0x19, 0x61, 0x8c,
- 0x00, 0x09, 0x84, 0x03,
- 0xc0, 0x2c, 0x65, 0xc1,
- 0xe4, 0x84, 0x40, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x64, 0x71, 0x00, 0x00,
- 0x04, 0x14, 0x40, 0xaf,
- 0x00, 0x0b, 0xe0, 0x84,
- 0x80, 0x13, 0x7c, 0x08,
- 0xe5, 0x00, 0x02, 0x19,
- 0x68, 0x4c, 0x68, 0x28,
- 0xd0, 0x07, 0x82, 0x11,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0x9b, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0xab, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0x9b, 0x88, 0x25,
- 0xa1, 0xab, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x50, 0x68,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x45, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe0, 0x2a, 0x40, 0x0a,
- 0xe0, 0x26, 0x42, 0x1a,
- 0xe6, 0xa2, 0x40, 0x0a,
- 0xe0, 0x26, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0xab, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0x9b, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0xab, 0x86, 0xe5,
- 0xa1, 0x9b, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x4d, 0x28,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x05, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe1, 0x26, 0x40, 0x0a,
- 0xe1, 0x2a, 0x42, 0x1a,
- 0xe6, 0xaa, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x90, 0x04, 0x14,
- 0x44, 0x2a, 0xa9, 0x31,
- 0x06, 0x14, 0x66, 0x8e,
- 0x8e, 0x39, 0xe1, 0x84,
- 0x81, 0x21, 0x04, 0x03,
- 0x81, 0x31, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0xe5,
- 0xc0, 0x9c, 0x67, 0x81,
- 0x70, 0x14, 0x00, 0x49,
- 0xe0, 0x80, 0x42, 0x0a,
- 0xc1, 0x90, 0x08, 0x44,
- 0x25, 0x4f, 0x9e, 0x49,
- 0xa8, 0x3f, 0x88, 0x21,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x5d, 0x93, 0xfc, 0x95,
- 0xfb, 0x80, 0x00, 0x34,
- 0x9f, 0x21, 0x01, 0x11,
- 0x81, 0x31, 0x03, 0x95,
- 0x68, 0x84, 0x08, 0x24,
- 0xfb, 0x80, 0x06, 0x34,
- 0xe3, 0x4f, 0x80, 0x4f,
- 0x61, 0x8c, 0x0a, 0x44,
- 0xe1, 0x84, 0x18, 0x44,
- 0x84, 0xc9, 0x02, 0x59,
- 0x18, 0x44, 0x38, 0x5f,
- 0x46, 0x47, 0xe0, 0x84,
- 0x38, 0x5f, 0x88, 0xc9,
- 0xa8, 0x5f, 0x90, 0x49,
- 0x88, 0x11, 0x23, 0x5f,
- 0x02, 0x0a, 0xaa, 0x3f,
- 0xf8, 0xf5, 0xe0, 0x40,
- 0x00, 0x34, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x9d, 0x81, 0x00, 0xab,
- 0x81, 0x91, 0x1e, 0x0b,
- 0x9d, 0x11, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0xa0, 0xfe, 0x95,
- 0x40, 0xb1, 0x65, 0xf1,
- 0x81, 0x45, 0x9d, 0x11,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x85, 0xc5, 0xfe, 0x95,
- 0x70, 0xa4, 0x4c, 0xa2,
- 0xfa, 0x80, 0x0e, 0x94,
- 0x6e, 0xf1, 0x0c, 0xb9,
- 0x94, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x71, 0x08,
- 0x00, 0x0a, 0x8e, 0x1b,
- 0x86, 0xb5, 0xf0, 0x04,
- 0x6c, 0xe9, 0x14, 0x09,
- 0x0c, 0x19, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfa, 0x80, 0x02, 0x14,
- 0x84, 0x35, 0x83, 0x0b,
- 0x73, 0xc0, 0x40, 0xb0,
- 0x47, 0x07, 0x9e, 0x1b,
- 0x02, 0x2b, 0x9e, 0xb9,
- 0x83, 0x31, 0x7c, 0x00,
- 0x80, 0x13, 0x37, 0x3f,
- 0xa6, 0x2f, 0x94, 0x0b,
- 0x8e, 0x1b, 0x04, 0x2c,
- 0xe8, 0x00, 0x42, 0x48,
- 0x12, 0x0a, 0x82, 0x91,
- 0xf4, 0x75, 0xe1, 0x40,
- 0x64, 0x8d, 0x00, 0xe6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x9d, 0x21, 0x01, 0x65,
- 0x04, 0x20, 0x45, 0x3a,
- 0xc1, 0x3c, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x2b,
- 0x64, 0x8d, 0x40, 0xa6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x45, 0x2a, 0x81, 0x55,
- 0xec, 0x04, 0x10, 0x80,
- 0xa1, 0x8b, 0xc1, 0x2c,
- 0x77, 0x58, 0xfe, 0x75,
- 0x94, 0x0b, 0x68, 0x44,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x83, 0x31, 0x00, 0x13,
- 0x6e, 0xf1, 0x02, 0x19,
- 0x04, 0x14, 0xc0, 0x2b,
- 0x9e, 0x19, 0x61, 0x8c,
- 0xa3, 0x3f, 0x3c, 0x29,
- 0x00, 0x2b, 0x84, 0x03,
- 0xc0, 0x16, 0x62, 0xf9,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x62, 0xf9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x02, 0xf0, 0x00, 0x9b,
- 0x5c, 0x18, 0xe4, 0xc0,
- 0x04, 0xf0, 0x68, 0x0c,
- 0x12, 0x39, 0xe4, 0xb0,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x12, 0x09,
- 0x12, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x4d, 0x12, 0x89,
- 0x12, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x39,
- 0x40, 0x3a, 0x8d, 0x3e,
- 0x12, 0x39, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x66, 0x86, 0x54, 0x8a,
- 0xe1, 0x88, 0x02, 0x04,
- 0x52, 0x01, 0x91, 0x01,
- 0x40, 0x26, 0x64, 0x81,
- 0x0f, 0x2e, 0xc5, 0xa7,
- 0x52, 0x21, 0x92, 0x0b,
- 0xc0, 0x26, 0x64, 0x91,
- 0x52, 0x31, 0x89, 0x3e,
- 0xc0, 0x26, 0x64, 0xb1,
- 0x12, 0xb9, 0x8b, 0x1e,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x12, 0x69,
- 0x52, 0x11, 0xc0, 0x2b,
- 0x40, 0x26, 0x64, 0xd1,
- 0xe4, 0xa0, 0x02, 0xf0,
- 0x64, 0xf1, 0x52, 0xa1,
- 0x67, 0xd8, 0xc0, 0x26,
- 0x80, 0x7b, 0xe8, 0x0c,
- 0xa6, 0x55, 0xa1, 0x7b,
- 0x06, 0x64, 0x45, 0xb7,
- 0x7c, 0xbe, 0xe1, 0x88,
- 0x80, 0x65, 0xa1, 0xbb,
- 0x82, 0xf5, 0xa1, 0x3b,
- 0x6c, 0x1d, 0x12, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x12, 0x0b, 0xe0, 0x08,
- 0x7a, 0x78, 0x86, 0x6b,
- 0x4e, 0x96, 0x68, 0x00,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xa0, 0x85, 0x8c, 0x3b,
- 0xc5, 0x87, 0x0d, 0x04,
- 0x4b, 0xf6, 0x7c, 0x14,
- 0x48, 0x8a, 0xe0, 0x0c,
- 0x81, 0xb1, 0x60, 0x0e,
- 0x44, 0x0a, 0xc5, 0x07,
- 0x8f, 0x04, 0xe0, 0x06,
- 0xbe, 0x2e, 0x8b, 0x14,
- 0x02, 0x03, 0xbc, 0x4e,
- 0xe6, 0x8a, 0x42, 0x4a,
- 0x00, 0x00, 0x09, 0x24,
- 0xfe, 0x0e, 0xec, 0x04,
- 0x00, 0xa0, 0x84, 0xa3,
- 0x81, 0xa1, 0x6c, 0x04,
- 0x52, 0x11, 0x8d, 0x0e,
- 0xc0, 0x2c, 0x65, 0x3d,
- 0x4c, 0x92, 0x8b, 0xe5,
- 0x0c, 0x09, 0xf0, 0xac,
- 0xc0, 0x2b, 0x6e, 0xf1,
- 0x62, 0xb1, 0x4c, 0x51,
- 0x4c, 0x51, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xf0, 0x3c, 0x42, 0x00,
- 0x92, 0xd5, 0xc5, 0x1d,
- 0xc8, 0x1d, 0x8d, 0x44,
- 0x7e, 0x14, 0x92, 0x75,
- 0xc2, 0x0d, 0xc9, 0x07,
- 0x8f, 0x14, 0x90, 0xf5,
- 0x90, 0x95, 0xc3, 0x0d,
- 0x61, 0x8c, 0x00, 0xb4,
- 0xf0, 0x1c, 0x44, 0xb0,
- 0x83, 0x41, 0x3e, 0x09,
- 0x04, 0x44, 0x12, 0x03,
- 0x00, 0x19, 0xe8, 0x88,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x08, 0xa4, 0x86, 0x8b,
- 0x0a, 0xf0, 0x7a, 0x80,
- 0x7c, 0x14, 0xe4, 0x90,
- 0xf9, 0x88, 0x58, 0x12,
- 0x04, 0x34, 0x0b, 0x34,
- 0x40, 0xc1, 0xfa, 0x80,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x02, 0x14, 0x92, 0x0b,
- 0x62, 0xd8, 0xfa, 0x80,
- 0x06, 0x34, 0x6f, 0xfc,
- 0x80, 0x7b, 0xfa, 0x80,
- 0x8a, 0x15, 0xa1, 0x7b,
- 0x0a, 0xf0, 0x3e, 0x04,
- 0x1e, 0x49, 0xe4, 0x80,
- 0x1e, 0x39, 0xe0, 0x90,
- 0x3c, 0x04, 0xe0, 0xa0,
- 0xfa, 0x80, 0x02, 0x04,
- 0x63, 0xf1, 0x4c, 0x41,
- 0x04, 0x04, 0xc0, 0x2c,
- 0x92, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x64, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x1e, 0x09, 0x84, 0x75,
- 0x82, 0xa1, 0x60, 0x80,
- 0x4b, 0xf6, 0x10, 0x3b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0x82, 0xb1, 0x89, 0x24,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0x40, 0x98, 0xe8, 0x25,
- 0x92, 0x0b, 0x68, 0x00,
- 0x0e, 0x0b, 0x80, 0x7b,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x81, 0x00, 0x6b,
- 0x6c, 0x59, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x02, 0xf0, 0x8a, 0x85,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x0c, 0x5d, 0x88,
- 0x88, 0xd5, 0xa1, 0x0b,
- 0x6f, 0xdc, 0x40, 0x06,
- 0x80, 0x08, 0x81, 0x91,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x04, 0xf1, 0x00, 0x60,
- 0x00, 0x60, 0xc0, 0xad,
- 0x80, 0xad, 0x04, 0xf9,
- 0x03, 0x15, 0x80, 0x0a,
- 0xfb, 0x80, 0x0e, 0x04,
- 0x7a, 0x80, 0x02, 0x84,
- 0xe4, 0x10, 0x08, 0xf0,
- 0x8c, 0x0b, 0x01, 0x21,
- 0x68, 0x00, 0x42, 0x88,
- 0x7c, 0x0a, 0x8e, 0x3b,
- 0xfb, 0x80, 0x12, 0x94,
- 0x80, 0x93, 0x82, 0x81,
- 0xc1, 0x8d, 0xfc, 0x04,
- 0x4c, 0x93, 0xfc, 0x15,
- 0xc0, 0x16, 0x62, 0x99,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x82, 0xf5, 0xfc, 0x1d,
- 0x02, 0x14, 0x83, 0x31,
- 0x82, 0x11, 0xfa, 0x80,
- 0xf4, 0x38, 0x03, 0x0a,
- 0x08, 0x14, 0x82, 0x15,
- 0x08, 0x34, 0xfa, 0x80,
- 0x80, 0x4f, 0xe8, 0x90,
- 0xfc, 0x85, 0xa1, 0x4b,
- 0x81, 0x01, 0x08, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xf8, 0x00, 0x10, 0xfc,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x80, 0x5b, 0x02, 0x9b,
- 0x63, 0xfc, 0x12, 0x0a,
- 0xfc, 0x2e, 0x81, 0x01,
- 0x90, 0x0c, 0xbe, 0x4e,
- 0x80, 0x00, 0x0b, 0x98,
- 0x10, 0x50, 0x49, 0x37,
- 0xc0, 0xb0, 0x66, 0xb1,
- 0x0e, 0x50, 0x3c, 0x3e,
- 0xc0, 0xb0, 0x64, 0x31,
- 0x81, 0xa1, 0x01, 0xb1,
- 0x81, 0x61, 0x7e, 0x5e,
- 0x0e, 0x09, 0x85, 0x85,
- 0x93, 0x0b, 0xe3, 0xc0,
- 0xfc, 0x04, 0x88, 0x35,
- 0x80, 0xf5, 0xa3, 0x0b,
- 0x6c, 0xe9, 0x0a, 0x09,
- 0xa0, 0x18, 0xc0, 0x2c,
- 0x86, 0x15, 0x83, 0x0b,
- 0x7a, 0x80, 0x02, 0xb4,
- 0x55, 0x78, 0x8a, 0x0b,
- 0x00, 0x0a, 0xef, 0xfc,
- 0x1e, 0x55, 0xf0, 0x04,
- 0x82, 0xd5, 0xc0, 0x0c,
- 0x02, 0xa4, 0x1c, 0x08,
- 0x04, 0xf0, 0xe0, 0x88,
- 0x82, 0xa1, 0x64, 0x50,
- 0x82, 0x23, 0x7e, 0x54,
- 0x80, 0x63, 0x70, 0xad,
- 0x80, 0x45, 0x88, 0xbe,
- 0x02, 0xb1, 0x81, 0x95,
- 0x82, 0x71, 0x82, 0x81,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0xa1, 0xab, 0xf4, 0xe5,
- 0x0a, 0x8b, 0x9e, 0xe5,
- 0xc0, 0x15, 0x6a, 0x7d,
- 0xc9, 0x87, 0xbc, 0x14,
- 0xfb, 0x80, 0x00, 0x14,
- 0x6a, 0x81, 0x0a, 0x0b,
- 0xd1, 0x0d, 0x40, 0x15,
- 0x9c, 0x00, 0x50, 0x10,
- 0xfb, 0x80, 0x02, 0x84,
- 0xc0, 0x1d, 0xc9, 0x07,
- 0xdc, 0x00, 0x50, 0x00,
- 0xec, 0x18, 0x51, 0x0a,
- 0x3e, 0x14, 0x84, 0x65,
- 0xe0, 0x90, 0x00, 0x64,
- 0x00, 0xf0, 0x04, 0x0c,
- 0x01, 0x95, 0xe4, 0x50,
- 0x41, 0x24, 0x9f, 0x11,
- 0xec, 0x04, 0x14, 0xa0,
- 0x44, 0x11, 0x8a, 0x23,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xfe, 0x15, 0xa1, 0xab,
- 0x81, 0x31, 0x8b, 0x75,
- 0x00, 0x34, 0x85, 0x05,
- 0x02, 0xf0, 0x60, 0x88,
- 0x02, 0x15, 0xe4, 0x50,
- 0x00, 0x14, 0xfc, 0x00,
- 0x8a, 0x03, 0xe0, 0x84,
- 0x6e, 0x39, 0x00, 0x2b,
- 0x81, 0x01, 0x40, 0x15,
- 0x82, 0x85, 0xa1, 0x2b,
- 0x44, 0x4a, 0x81, 0x01,
- 0x44, 0x20, 0xe0, 0x80,
- 0x40, 0xff, 0x13, 0xf9,
- 0xc4, 0x04, 0x00, 0x00,
- 0x04, 0x24, 0x7e, 0x35,
- 0x0a, 0x13, 0xc1, 0x84,
- 0x42, 0x01, 0x82, 0x31,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xf8, 0x15, 0x95, 0x3b,
- 0x94, 0x7b, 0x21, 0x06,
- 0x83, 0x23, 0xa1, 0x43,
- 0x4e, 0x8a, 0xab, 0xe3,
- 0x8a, 0x25, 0xec, 0x20,
- 0x64, 0x50, 0x12, 0xf0,
- 0x82, 0xb1, 0xff, 0xb1,
- 0x88, 0x45, 0xd5, 0xbd,
- 0x00, 0x50, 0x24, 0x64,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xe4, 0x40, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x64,
- 0x00, 0x0b, 0x80, 0x63,
- 0x0c, 0x19, 0xfc, 0x04,
- 0x73, 0xd8, 0xe5, 0x00,
- 0x21, 0x08, 0xef, 0xfc,
- 0x0c, 0x19, 0x88, 0x91,
- 0x83, 0x0b, 0xe5, 0x00,
- 0x05, 0x01, 0x02, 0x60,
- 0x0e, 0x74, 0x40, 0x01,
- 0x42, 0x01, 0xdb, 0x80,
- 0x0e, 0x70, 0x40, 0x00,
- 0x7e, 0x54, 0xc4, 0x04,
- 0xec, 0x20, 0x4e, 0x8a,
- 0xc1, 0xc3, 0xf6, 0xb5,
- 0xc8, 0x77, 0x3e, 0x04,
- 0x01, 0x01, 0x80, 0x7c,
- 0x18, 0xfc, 0xf8, 0xf1,
- 0x0c, 0x0c, 0xf0, 0x00,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x46, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x28,
- 0x84, 0x34, 0x83, 0x21,
- 0x65, 0x75, 0x00, 0x19,
- 0x00, 0x45, 0xc0, 0x1b,
- 0xc0, 0x06, 0x6d, 0x49,
- 0x65, 0x79, 0x00, 0x09,
- 0x82, 0x31, 0x40, 0x1b,
- 0xa1, 0x11, 0x23, 0x2f,
- 0x88, 0x0b, 0x21, 0x2f,
- 0xef, 0xe8, 0x75, 0x48,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x88, 0x7b, 0x00, 0x8b,
- 0x65, 0x0d, 0x10, 0x09,
- 0x82, 0x6b, 0x40, 0x2b,
- 0x60, 0x88, 0x02, 0x74,
- 0x10, 0x13, 0x84, 0xab,
- 0x23, 0x0b, 0x81, 0x21,
- 0x42, 0x25, 0x86, 0x9b,
- 0xc0, 0x0b, 0x61, 0xa5,
- 0xa7, 0x0b, 0x82, 0x25,
- 0x10, 0x0b, 0x8c, 0x75,
- 0x40, 0x15, 0x6a, 0x79,
- 0x91, 0x0c, 0x81, 0xb1,
- 0x3e, 0x5e, 0x85, 0x05,
- 0x66, 0x91, 0x00, 0x10,
- 0x7c, 0x0e, 0xc0, 0xb1,
- 0x42, 0xb8, 0x90, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x02, 0xf0, 0x49, 0x07,
- 0x3c, 0x1e, 0xe4, 0x40,
- 0xfb, 0x80, 0x16, 0x04,
- 0x64, 0x30, 0x0a, 0xf0,
- 0x0c, 0x1b, 0x90, 0x0b,
- 0x12, 0x3b, 0x94, 0x2b,
- 0x43, 0xb8, 0x96, 0x4b,
- 0x7e, 0x14, 0xe8, 0x00,
- 0xfc, 0x24, 0xa1, 0x0b,
- 0x84, 0x35, 0x88, 0x1e,
- 0xbe, 0x54, 0x91, 0x0a,
- 0xfb, 0x80, 0x06, 0x04,
- 0x04, 0x16, 0x97, 0x3b,
- 0x40, 0x80, 0x40, 0x00,
- 0x42, 0x70, 0xdc, 0x00,
- 0x48, 0x50, 0x5c, 0x00,
- 0x6c, 0xd8, 0xdc, 0x00,
- 0x81, 0x01, 0xcf, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x81, 0x01, 0x91,
- 0x40, 0x72, 0x83, 0x25,
- 0x00, 0x09, 0xf0, 0xa4,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x8d, 0x0b, 0x82, 0x25,
- 0x02, 0x94, 0x80, 0xf5,
- 0x8e, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x44, 0x88,
- 0x82, 0x91, 0x80, 0x83,
- 0xe1, 0x40, 0x12, 0x0a,
- 0x90, 0x0b, 0xfa, 0xb5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x40, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0x19, 0x14, 0x82, 0xbb,
- 0x08, 0x8b, 0x8a, 0x7b,
- 0x00, 0x08, 0x86, 0x9b,
- 0x7e, 0x1e, 0x84, 0xab,
- 0x64, 0xf8, 0x91, 0x11,
- 0x00, 0x2b, 0xef, 0xe8,
- 0xe4, 0x40, 0x00, 0xf0,
- 0x0a, 0x84, 0x3e, 0x0e,
- 0x3c, 0x7e, 0xe0, 0x90,
- 0x64, 0xe1, 0x06, 0x60,
- 0x16, 0x0b, 0xc0, 0xad,
- 0x4d, 0xf8, 0x94, 0x1b,
- 0x92, 0x4b, 0x6f, 0xb4,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0x58, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x81, 0x01, 0x23, 0x0b,
- 0x09, 0x04, 0x80, 0xe5,
- 0xc9, 0x07, 0x81, 0x71,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x7e, 0x14, 0xc0, 0xff,
- 0x04, 0x0c, 0xa8, 0xf1,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0e, 0x00, 0x02, 0x6b,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x64, 0x71, 0x10, 0x00,
- 0x81, 0x01, 0x40, 0xaf,
- 0x60, 0x04, 0x13, 0x06,
- 0x83, 0x75, 0x9d, 0xa1,
- 0x78, 0x81, 0x0e, 0x19,
- 0x44, 0x10, 0xc0, 0x01,
- 0xc9, 0x17, 0x70, 0x3c,
- 0xe6, 0xaa, 0x44, 0x2a,
- 0x8d, 0x2b, 0x82, 0x23,
- 0x80, 0x00, 0x0e, 0x19,
- 0x80, 0x00, 0x10, 0x0b,
- 0x08, 0x48, 0x67, 0x28,
- 0x84, 0x04, 0x02, 0x10,
- 0x6c, 0x04, 0x12, 0x90,
- 0x84, 0x81, 0x82, 0x71,
- 0xfa, 0x35, 0xa1, 0x9b,
- 0x0c, 0x0c, 0xd0, 0x07,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x5d, 0xf8, 0xe2, 0x80,
- 0x43, 0xf6, 0xe8, 0x48,
- 0x05, 0x86, 0x60, 0x0c,
- 0x7b, 0x98, 0xe0, 0x10,
- 0x8c, 0x0b, 0x6f, 0xa8,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0x3e, 0x38, 0xf2, 0x00,
- 0xc1, 0xc3, 0xe0, 0x40,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x40, 0x96, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x06, 0x82, 0x7b,
- 0x8c, 0x0b, 0x62, 0x80,
- 0xe8, 0x48, 0x5c, 0x08,
- 0xe4, 0x40, 0x0e, 0x8a,
- 0x0c, 0x29, 0x82, 0xd5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x00, 0x4d, 0xa8,
- 0x50, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x8c, 0x85, 0x81, 0x71,
- 0x61, 0x88, 0x00, 0x74,
- 0x06, 0x09, 0x91, 0x91,
- 0x04, 0x94, 0x83, 0x11,
- 0xa1, 0x1f, 0x69, 0x80,
- 0x40, 0x22, 0xc8, 0x27,
- 0x81, 0x11, 0x79, 0x84,
- 0x44, 0x12, 0x81, 0xa5,
- 0x04, 0x4a, 0xf9, 0x1c,
- 0x44, 0x62, 0xf8, 0x0c,
- 0x82, 0x11, 0x50, 0x84,
- 0xc0, 0x00, 0x44, 0x01,
- 0xe0, 0x40, 0x02, 0x0a,
- 0x01, 0x11, 0xfc, 0xb5,
- 0x0c, 0x0b, 0x9f, 0x21,
- 0x67, 0xb8, 0x8c, 0x3b,
- 0x80, 0x8b, 0xe8, 0x40,
- 0x84, 0x55, 0xa1, 0x8b,
- 0x6a, 0xa9, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x00, 0x60, 0x84, 0x35,
- 0x40, 0x8b, 0x66, 0xb1,
- 0xe0, 0x10, 0x02, 0x06,
- 0x41, 0x1e, 0x81, 0x45,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x95, 0xa1, 0x9b,
- 0x90, 0x0b, 0x81, 0x81,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0x0c, 0x0b, 0xdd, 0x93,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x1c, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x00, 0x4c, 0x46,
- 0xe0, 0x04, 0x45, 0x36,
- 0x40, 0x21, 0x98, 0x14,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x98, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x46, 0x04, 0x26,
- 0x62, 0x58, 0xe0, 0x1c,
- 0x83, 0x21, 0x68, 0x44,
- 0x80, 0x18, 0x98, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x0c, 0x0c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x41, 0x86, 0x00, 0x3b,
- 0x00, 0x04, 0xe1, 0x48,
- 0xe0, 0x04, 0x09, 0x46,
- 0x6c, 0x1d, 0x46, 0x41,
- 0x80, 0x48, 0xc0, 0x2b,
- 0xfc, 0x9c, 0x08, 0x44,
- 0x41, 0xc6, 0x00, 0x46,
- 0x80, 0x04, 0xe1, 0x48,
- 0x83, 0x01, 0x00, 0x16,
- 0x6c, 0x25, 0x46, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x6f, 0xf0, 0x78, 0xa8,
- 0x08, 0x0c, 0x86, 0x2b,
- 0x0f, 0xd8, 0xf2, 0x80,
- 0xc1, 0xc3, 0xff, 0xf0,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x14, 0x4d, 0x48,
- 0x81, 0x81, 0x81, 0x11,
- 0x68, 0x28, 0x6f, 0xc8,
- 0x12, 0x86, 0x80, 0x7b,
- 0xa4, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xbc,
- 0xe8, 0x30, 0x72, 0xc8,
- 0x95, 0x11, 0x03, 0xa1,
- 0x8c, 0x0b, 0x03, 0x21,
- 0xe8, 0x44, 0x5e, 0x28,
- 0xe1, 0x10, 0x41, 0x46,
- 0x84, 0x86, 0x80, 0x14,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0x00, 0x16, 0xe0, 0x19,
- 0x79, 0xb8, 0x8c, 0x0b,
- 0x00, 0xc6, 0xef, 0xfc,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x18, 0x41, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x14, 0x41, 0x06,
- 0x80, 0x18, 0x80, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0x41, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x14,
- 0x00, 0x86, 0x83, 0x11,
- 0xe1, 0x14, 0x41, 0x86,
- 0x00, 0x8c, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x00, 0x86, 0x80, 0x04,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x08, 0x78, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0xab,
- 0x80, 0x7b, 0x21, 0xab,
- 0x41, 0x9c, 0x0c, 0xa4,
- 0xe0, 0x04, 0x01, 0x16,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x84, 0x9b, 0x40, 0x2b,
- 0x50, 0x04, 0x4c, 0x60,
- 0x47, 0x38, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x14,
- 0x42, 0x56, 0x00, 0x8b,
- 0x5c, 0xf8, 0xe0, 0x00,
- 0x8e, 0x0b, 0x68, 0x14,
- 0x01, 0x06, 0x21, 0x6b,
- 0x4e, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x01, 0x26, 0x88, 0xa5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x76, 0x48,
- 0x41, 0xc6, 0x92, 0x2b,
- 0x40, 0x20, 0x72, 0xfd,
- 0x60, 0x01, 0x02, 0x06,
- 0x80, 0x04, 0xff, 0xc0,
- 0x02, 0x06, 0x02, 0x0f,
- 0xc0, 0x20, 0x72, 0xc1,
- 0xfc, 0xc4, 0x00, 0x04,
- 0x01, 0xc6, 0x04, 0x0e,
- 0x80, 0x04, 0xe1, 0x98,
- 0x84, 0x75, 0xa3, 0x0b,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8e, 0x0b, 0x40, 0x20,
- 0xef, 0xec, 0x76, 0xe8,
- 0x01, 0x36, 0x81, 0xf5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x81, 0x95, 0x92, 0x2b,
- 0x68, 0x00, 0x41, 0x68,
- 0x42, 0x96, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x60, 0x00,
- 0xe8, 0x14, 0x59, 0x08,
- 0x60, 0x00, 0x42, 0x66,
- 0x58, 0xb8, 0x8e, 0x0b,
- 0x03, 0x11, 0xe8, 0x14,
- 0x42, 0x58, 0x90, 0x0b,
- 0x8c, 0x0b, 0xe8, 0x14,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x72, 0xf9, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xff,
- 0x40, 0x15, 0x6e, 0x09,
- 0x4c, 0x01, 0x81, 0x01,
- 0xc0, 0x2b, 0x64, 0xd5,
- 0xe8, 0x00, 0x7d, 0x68,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xe8, 0x18, 0x5e, 0x48,
- 0x68, 0x00, 0x7c, 0x88,
- 0x47, 0xf8, 0x8c, 0x0b,
- 0xa1, 0x7b, 0xe8, 0x0c,
- 0x49, 0xf8, 0x86, 0x25,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x68, 0x00, 0x41, 0x88,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xf0, 0x69, 0x28,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0a, 0x78, 0xf2, 0x84,
- 0x0c, 0x0c, 0xe0, 0x0c,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x63, 0x49, 0x00, 0x19,
- 0x06, 0x56, 0x40, 0x2d,
- 0xc0, 0x01, 0x60, 0x01,
- 0x64, 0x01, 0x40, 0x35,
- 0x83, 0x31, 0x40, 0x05,
- 0x68, 0x15, 0x40, 0x33,
- 0x81, 0x21, 0x40, 0x0a,
- 0x65, 0x45, 0x40, 0x31,
- 0x07, 0x06, 0x40, 0x22,
- 0x40, 0x31, 0xe0, 0x08,
- 0x40, 0x1b, 0x65, 0x6d,
- 0x40, 0x31, 0xe0, 0x19,
- 0x40, 0x22, 0x65, 0x4d,
- 0x40, 0x31, 0xa1, 0x41,
- 0x40, 0x28, 0x64, 0x89,
- 0x40, 0x11, 0xaf, 0x31,
- 0x40, 0x2d, 0x63, 0x49,
- 0x60, 0x11, 0x02, 0x26,
- 0x40, 0x31, 0xc0, 0xc0,
- 0x40, 0x28, 0x64, 0x91,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x63, 0x29, 0x40, 0x15,
- 0x91, 0x11, 0x40, 0x0b,
- 0x67, 0xc9, 0x40, 0x31,
- 0x06, 0x06, 0x40, 0x2d,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x13, 0x69, 0x85,
- 0xe0, 0x8c, 0x06, 0x06,
- 0x68, 0x11, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x0a,
- 0x40, 0x27, 0x63, 0x15,
- 0xe0, 0x10, 0x03, 0x86,
- 0x69, 0x91, 0x40, 0x13,
- 0x43, 0x86, 0x40, 0x13,
- 0x40, 0x33, 0xe0, 0x00,
- 0x40, 0x13, 0x69, 0x95,
- 0xe0, 0x00, 0x46, 0x86,
- 0x63, 0x31, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x27,
- 0x63, 0x35, 0x40, 0x31,
- 0x00, 0x3b, 0xc0, 0x27,
- 0xc0, 0x0a, 0x69, 0x31,
- 0x6c, 0x61, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x22,
- 0x6c, 0x65, 0x40, 0x11,
- 0x9d, 0x11, 0x40, 0x22,
- 0x6f, 0xb1, 0x40, 0x11,
- 0x02, 0x34, 0x40, 0x22,
- 0x40, 0x21, 0xfc, 0xa8,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x68, 0x09, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x0d,
- 0x61, 0x1d, 0x40, 0x25,
- 0x95, 0x21, 0x40, 0x0a,
- 0x65, 0x65, 0x40, 0x41,
- 0x40, 0x43, 0xc0, 0x1b,
- 0xc0, 0x14, 0x62, 0x41,
- 0x64, 0x8d, 0x40, 0x21,
- 0x40, 0x43, 0xc0, 0x28,
- 0xc0, 0x13, 0x69, 0x81,
- 0x63, 0x11, 0x40, 0x41,
- 0x40, 0x21, 0xc0, 0x27,
- 0xc0, 0x22, 0x6f, 0xb5,
- 0x69, 0x31, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x0a,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x0c, 0x14, 0x86,
- 0x63, 0xc0, 0x04, 0x0e,
- 0x40, 0xa3, 0xc0, 0xbb,
- 0x40, 0x15, 0x6d, 0xb5,
- 0xef, 0xfc, 0x55, 0xf6,
- 0x6d, 0xc1, 0x40, 0xa3,
- 0x55, 0xf6, 0x40, 0x15,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xe0, 0x7c, 0x07, 0x06,
- 0x63, 0x69, 0x40, 0xa1,
- 0x55, 0xf6, 0x40, 0x2d,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x64, 0x59, 0x40, 0x25,
- 0x05, 0x06, 0x40, 0x05,
- 0x40, 0xa5, 0xe0, 0x08,
- 0x40, 0x0b, 0x64, 0xe1,
- 0xe0, 0x04, 0x57, 0xc6,
- 0x64, 0xe5, 0x40, 0xa5,
- 0xbd, 0xa1, 0x40, 0x0b,
- 0x6e, 0x25, 0x40, 0x21,
- 0x83, 0x21, 0x40, 0x29,
- 0x6e, 0x81, 0x40, 0xb1,
- 0xb7, 0xb1, 0x40, 0x2c,
- 0x63, 0xa9, 0x40, 0xa1,
- 0x14, 0x56, 0x40, 0x2d,
- 0xc0, 0x20, 0x70, 0x01,
- 0x6a, 0xe1, 0x40, 0x33,
- 0x12, 0x06, 0x40, 0x15,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x1c, 0x62, 0x6d,
- 0xe0, 0x00, 0x46, 0x86,
- 0x60, 0x24, 0x0d, 0x86,
- 0xe0, 0x5c, 0x11, 0xc6,
- 0x6e, 0x89, 0x40, 0xb1,
- 0xab, 0xb1, 0x40, 0x2c,
- 0x62, 0x25, 0x40, 0x33,
- 0x46, 0xc6, 0x40, 0x1c,
- 0x40, 0x21, 0xe0, 0x00,
- 0x40, 0x2b, 0x65, 0x11,
- 0x40, 0x21, 0xa3, 0x51,
- 0x40, 0x2b, 0x65, 0xd1,
- 0xe0, 0x40, 0x0e, 0x06,
- 0x66, 0x81, 0x40, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x66, 0x85, 0x40, 0x21,
- 0x91, 0xc1, 0x40, 0x2b,
- 0x6b, 0x8d, 0x40, 0x21,
- 0x85, 0x41, 0x40, 0x2b,
- 0x6b, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x61,
- 0x6e, 0x5d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x61,
- 0x6e, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x99,
- 0x63, 0x31, 0x40, 0x21,
- 0x40, 0xa5, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x64, 0xed,
- 0x64, 0xf1, 0x40, 0xa5,
- 0x8d, 0xa1, 0x40, 0x0b,
- 0x68, 0x1d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x69, 0xd9,
- 0x69, 0xdd, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x7d,
- 0x64, 0xd5, 0x40, 0x21,
- 0xa9, 0x21, 0x40, 0x38,
- 0x6b, 0x1d, 0x40, 0x63,
- 0x0c, 0x06, 0x40, 0x15,
- 0x40, 0x83, 0xf9, 0x00,
- 0x40, 0x15, 0x6d, 0xb1,
- 0xe0, 0xcc, 0x10, 0xd6,
- 0x6e, 0x95, 0x40, 0xb1,
- 0x16, 0xc6, 0x40, 0x2c,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2d, 0x63, 0xd1,
- 0x72, 0xbd, 0x55, 0xf6,
- 0x40, 0x23, 0xc0, 0x20,
- 0x40, 0x1c, 0x62, 0x11,
- 0xe0, 0x10, 0x44, 0xc6,
- 0x62, 0x29, 0x40, 0x33,
- 0x07, 0x06, 0x40, 0x1c,
- 0x40, 0x91, 0xe0, 0x18,
- 0xc0, 0x29, 0x6e, 0x21,
- 0x6e, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x29,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0x40, 0x51, 0xb5, 0x91,
- 0x40, 0x2b, 0x65, 0xc9,
- 0xef, 0xf0, 0x4b, 0x86,
- 0x6d, 0x95, 0x40, 0x65,
- 0x0c, 0x0e, 0x40, 0x0a,
- 0x40, 0x83, 0xff, 0xc0,
- 0x40, 0x15, 0x6d, 0xb9,
- 0xe0, 0x00, 0x50, 0x66,
- 0x63, 0x49, 0x40, 0xb1,
- 0x17, 0x86, 0x40, 0x2d,
- 0x40, 0x23, 0xe0, 0x60,
- 0x40, 0x1c, 0x62, 0x15,
- 0x40, 0x33, 0xa1, 0x21,
- 0x40, 0x1c, 0x62, 0x2d,
- 0xe0, 0xf8, 0x46, 0x06,
- 0x63, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x39,
- 0x63, 0xd9, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0x40, 0x2d, 0x64, 0x09,
- 0x60, 0x01, 0x12, 0x06,
- 0x40, 0xa5, 0xc0, 0x20,
- 0xc0, 0x0b, 0x64, 0xf9,
- 0x64, 0xfd, 0x40, 0xa5,
- 0x14, 0x66, 0x40, 0x0b,
- 0xc0, 0x20, 0x68, 0x01,
- 0x6b, 0x19, 0x40, 0x53,
- 0x99, 0x51, 0x40, 0x15,
- 0x6d, 0x99, 0x40, 0x65,
- 0x89, 0x61, 0x40, 0x0a,
- 0x6d, 0x9d, 0x40, 0x75,
- 0x8b, 0x71, 0x40, 0x0a,
- 0x6b, 0x95, 0x40, 0x81,
- 0x8f, 0x81, 0x40, 0x2b,
- 0x69, 0xa9, 0x40, 0xb3,
- 0x87, 0xb1, 0x40, 0x16,
- 0x62, 0x31, 0x40, 0x33,
- 0x46, 0x46, 0x40, 0x1c,
- 0x40, 0x95, 0xe0, 0xf8,
- 0xc0, 0x0b, 0x65, 0x05,
- 0x65, 0x09, 0x40, 0x95,
- 0xb9, 0x91, 0x40, 0x0b,
- 0x65, 0x11, 0x40, 0xa5,
- 0x40, 0xa5, 0xc0, 0x0b,
- 0x40, 0x0b, 0x65, 0x15,
- 0x40, 0x23, 0x93, 0xa1,
- 0xc0, 0x1c, 0x62, 0x21,
- 0x62, 0x41, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0x40, 0x1c, 0x62, 0x45,
- 0xe0, 0x18, 0x04, 0x06,
- 0x62, 0x05, 0x40, 0x11,
- 0x40, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x65, 0x31,
- 0x65, 0xcd, 0x40, 0xc1,
- 0x40, 0x51, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x66, 0x41,
- 0x6a, 0xa1, 0x40, 0x71,
- 0x40, 0x61, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6a, 0xa5,
- 0x6b, 0x89, 0x40, 0x61,
- 0x40, 0x81, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x6e, 0x59, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x6e, 0x69, 0x40, 0x61,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x6e, 0x8d, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0xa5,
- 0x63, 0x25, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x35,
- 0x63, 0x41, 0x40, 0x41,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x63, 0x59, 0x40, 0xb1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x5d,
- 0x63, 0x61, 0x40, 0x61,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x63, 0x6d, 0x40, 0x11,
- 0x40, 0xb1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x71,
- 0x63, 0xa1, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xa5,
- 0x63, 0xd5, 0x40, 0x71,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x40, 0x71,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x40, 0x71,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x39,
- 0x64, 0x61, 0x40, 0xa1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0x64, 0x69, 0x40, 0x91,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x65, 0x31,
- 0x65, 0x35, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x68, 0x11,
- 0x6a, 0x31, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x6a, 0x39, 0x40, 0xb1,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x71,
- 0x64, 0xd1, 0x40, 0x11,
- 0x40, 0x13, 0xc0, 0x38,
- 0xc0, 0x1c, 0x62, 0x19,
- 0x62, 0x1d, 0x40, 0x53,
- 0x40, 0x33, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x35,
- 0x62, 0x39, 0x40, 0x13,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x3d,
- 0x62, 0x49, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x4d,
- 0x62, 0x51, 0x40, 0x23,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x55,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x4c, 0x44, 0x46,
- 0xe4, 0x50, 0x0a, 0x00,
- 0x91, 0xc1, 0x0a, 0x14,
- 0x0c, 0x86, 0x48, 0x34,
- 0xc0, 0x00, 0x61, 0x95,
- 0x4e, 0x86, 0x08, 0x44,
- 0xc0, 0x00, 0x61, 0x95,
- 0xe6, 0x86, 0x44, 0x3a,
- 0x61, 0x90, 0x06, 0x44,
- 0xe4, 0x10, 0x08, 0x00,
- 0x55, 0x8a, 0x83, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xc9, 0x87, 0xd1, 0x92,
- 0x66, 0xa2, 0x50, 0x2a,
- 0xe1, 0xf4, 0x14, 0x94,
- 0x50, 0x8a, 0x86, 0xa9,
- 0x94, 0x93, 0x60, 0x0e,
- 0xfb, 0x00, 0x12, 0x94,
- 0x50, 0x8a, 0x85, 0x97,
- 0xd9, 0x9e, 0xe6, 0x86,
- 0xa1, 0xcb, 0xdd, 0x8e,
- 0x00, 0x12, 0xfa, 0x75,
- 0x61, 0x99, 0x04, 0x86,
- 0x02, 0x02, 0xc0, 0x00,
- 0x61, 0x99, 0x06, 0xc6,
- 0x88, 0x1e, 0xc0, 0x00,
- 0x0c, 0x4c, 0x8c, 0x0e,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x04, 0xc6, 0x00, 0x02,
- 0xc0, 0x00, 0x61, 0x99,
- 0x84, 0x0d, 0x88, 0x24,
- 0x5a, 0x00, 0x5c, 0x08,
- 0xc0, 0x00, 0x00, 0x06,
- 0x61, 0x95, 0x04, 0x86,
- 0x88, 0x34, 0xc0, 0x00,
- 0x44, 0x86, 0x87, 0x0d,
- 0xc0, 0x00, 0x01, 0x95,
- 0xc0, 0x00, 0x04, 0x25,
- 0x04, 0x35, 0x8e, 0xb5,
- 0x87, 0x0d, 0xe0, 0x1c,
- 0x01, 0x99, 0x04, 0x46,
- 0x04, 0x25, 0x80, 0x00,
- 0x8c, 0x85, 0x80, 0x00,
- 0x83, 0x31, 0x01, 0xa5,
- 0xfa, 0x80, 0x08, 0x34,
- 0x08, 0x45, 0xc4, 0x47,
- 0x80, 0x4d, 0xfc, 0x08,
- 0x82, 0x31, 0x80, 0xb5,
- 0xf4, 0x18, 0x07, 0x0a,
- 0x06, 0x30, 0xfc, 0xc5,
- 0x0a, 0x34, 0xec, 0x04,
- 0x08, 0x50, 0xfa, 0x80,
- 0xc4, 0x57, 0x64, 0x04,
- 0x7c, 0x08, 0x0a, 0x35,
- 0x08, 0x25, 0xc4, 0x47,
- 0xa6, 0x23, 0xfc, 0x08,
- 0x06, 0x05, 0xa1, 0x2b,
- 0x80, 0x00, 0x04, 0x06,
- 0x61, 0x95, 0x58, 0x86,
- 0x46, 0x02, 0x40, 0x00,
- 0x0a, 0x55, 0xf1, 0x8c,
- 0x08, 0x45, 0xfc, 0x30,
- 0xaa, 0x43, 0xfc, 0x30,
- 0xe1, 0x7c, 0x18, 0x44,
- 0x98, 0x43, 0xf5, 0xc7,
- 0x46, 0x3a, 0x8d, 0x47,
- 0x44, 0x3a, 0xe6, 0x92,
- 0xcc, 0x27, 0xe0, 0x8a,
- 0x04, 0x14, 0x8a, 0x23,
- 0x61, 0x99, 0x06, 0x86,
- 0x8c, 0x34, 0xc0, 0x00,
- 0xfa, 0x00, 0x40, 0x32,
- 0xe6, 0x82, 0x40, 0x0a,
- 0xe0, 0x82, 0x40, 0x2a,
- 0xe4, 0x00, 0x42, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x7c, 0x2e,
- 0x86, 0x6b, 0x62, 0x18,
- 0x75, 0xb8, 0xbe, 0x1e,
- 0x60, 0x08, 0xef, 0xfc,
- 0x81, 0xa1, 0x91, 0x81,
- 0xe1, 0x00, 0x00, 0x0a,
- 0x10, 0x46, 0x09, 0x15,
- 0x7c, 0x14, 0xc0, 0x00,
- 0x00, 0x04, 0x96, 0x03,
- 0x80, 0x13, 0xfa, 0x80,
- 0xec, 0x00, 0x02, 0x19,
- 0x88, 0x85, 0xc3, 0xad,
- 0x40, 0x0a, 0xbe, 0x14,
- 0x94, 0x03, 0xe6, 0x86,
- 0xfa, 0x80, 0x0e, 0x04,
- 0x60, 0x84, 0x00, 0x74,
- 0xe0, 0x88, 0x02, 0x74,
- 0x7c, 0x04, 0x0c, 0x15,
- 0x00, 0x03, 0x8c, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0x61, 0x9c, 0x04, 0x14,
- 0xe4, 0x30, 0x02, 0xf0,
- 0xc5, 0x07, 0x7e, 0x2e,
- 0x00, 0xf0, 0x11, 0x0c,
- 0x76, 0x98, 0xe4, 0x40,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x50, 0x98, 0x4e, 0x72,
- 0xc0, 0x00, 0x00, 0xe6,
- 0x0c, 0x01, 0x4e, 0x01,
- 0x82, 0x91, 0xc0, 0x04,
- 0xfa, 0x80, 0x00, 0x94,
- 0xf4, 0x15, 0xd1, 0x0d,
- 0x82, 0x11, 0xbc, 0x14,
- 0xfa, 0x80, 0x00, 0x14,
- 0x56, 0x0a, 0xd1, 0x0d,
- 0x12, 0x06, 0x46, 0xa2,
- 0x5e, 0x15, 0xc0, 0x00,
- 0xfc, 0x35, 0xc0, 0x00,
- 0xbe, 0x04, 0x82, 0xa1,
- 0x7c, 0x75, 0x81, 0xab,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0xe4, 0x5d, 0xc2, 0x58,
- 0x40, 0x08, 0x98, 0x95,
- 0x8f, 0x5e, 0x81, 0x41,
- 0x61, 0x00, 0x00, 0x0a,
- 0x0b, 0x95, 0x91, 0x01,
- 0xc0, 0x00, 0x00, 0x46,
- 0x10, 0x74, 0x98, 0x73,
- 0x4e, 0x12, 0xfa, 0x80,
- 0x0e, 0x99, 0xf0, 0xa0,
- 0xd3, 0x4d, 0xec, 0x00,
- 0x50, 0x8a, 0x8e, 0x85,
- 0x88, 0x83, 0xe6, 0x96,
- 0xfa, 0x80, 0x10, 0x84,
- 0xf0, 0xa0, 0x54, 0x22,
- 0x6c, 0x01, 0x14, 0xb9,
- 0xbd, 0xbb, 0xc0, 0x04,
- 0x21, 0x4b, 0x8c, 0x15,
- 0x64, 0x01, 0x0e, 0x70,
- 0x8a, 0x15, 0xc0, 0x03,
- 0x88, 0xd5, 0xa5, 0x9b,
- 0x64, 0x04, 0x12, 0x80,
- 0x64, 0x00, 0x14, 0xa0,
- 0x56, 0x22, 0xc0, 0x13,
- 0x06, 0x84, 0x70, 0xa4,
- 0x16, 0xb9, 0xe0, 0x84,
- 0x40, 0x04, 0x6c, 0x01,
- 0x84, 0x83, 0xc4, 0x87,
- 0x16, 0x94, 0x28, 0xb6,
- 0x14, 0x20, 0xe0, 0x84,
- 0x40, 0x0e, 0x64, 0x01,
- 0x14, 0x5b, 0xc4, 0x97,
- 0x86, 0xa3, 0x7c, 0x2c,
- 0x04, 0x55, 0xa8, 0x5c,
- 0x20, 0x5e, 0xfc, 0x24,
- 0x64, 0x01, 0x0a, 0x20,
- 0x0a, 0x8b, 0xc0, 0x0c,
- 0x86, 0x53, 0x7c, 0x2c,
- 0x8f, 0x54, 0x94, 0x8c,
- 0x06, 0x90, 0x9c, 0x98,
- 0x9c, 0x36, 0xec, 0x04,
- 0x0e, 0x64, 0x82, 0x61,
- 0xc1, 0x7d, 0xfa, 0x80,
- 0x8d, 0x34, 0xee, 0x15,
- 0x18, 0x34, 0x82, 0x31,
- 0xc1, 0xcd, 0xfa, 0x80,
- 0x46, 0x82, 0x58, 0xca,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xc0, 0x18, 0x5e, 0x35,
- 0x82, 0x41, 0xfc, 0x35,
- 0x7c, 0x95, 0x8b, 0x4b,
- 0xc0, 0x00, 0x06, 0x06,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x14, 0x42, 0x46,
- 0x84, 0x18, 0x84, 0x14,
- 0x6b, 0xf1, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0xe1, 0x4c, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x00, 0x00, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x4c, 0x00, 0x06,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x83, 0x31, 0x00, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0x88, 0x3e, 0x80, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x81, 0x31, 0x00, 0x04,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0xdd, 0x93, 0x88, 0x3e,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x04,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x08,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xf4,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x10,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xec,
- 0xdd, 0x93, 0x80, 0x00,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x0c, 0x7b, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x61, 0x34, 0x56, 0x86,
- 0x2c, 0x04, 0x80, 0x7b,
- 0xe1, 0x4c, 0x13, 0x06,
- 0x83, 0x21, 0x03, 0xa1,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x0c, 0x15, 0x80, 0x86,
- 0xc0, 0x0b, 0x69, 0xf9,
- 0x40, 0x86, 0xa1, 0x1b,
- 0x00, 0x15, 0x8f, 0xdc,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xe8, 0x40, 0x4d, 0xc8,
- 0x83, 0x11, 0x2c, 0x04,
- 0x40, 0x46, 0x00, 0xa6,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa4, 0x04, 0x80, 0xa6,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x8c, 0x0b, 0x00, 0x86,
- 0xe8, 0x10, 0x67, 0xa8,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xe8, 0x0c, 0x78, 0xc8,
- 0x67, 0xcd, 0x0c, 0x09,
- 0xa4, 0x09, 0xc0, 0x2d,
- 0x82, 0x75, 0xa5, 0x0b,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x80, 0xd5,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x2c, 0x12, 0x28,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x97, 0x11, 0x00, 0x6b,
- 0xe8, 0x10, 0x4d, 0x28,
- 0xef, 0xdc, 0x42, 0x46,
- 0x40, 0x00, 0x84, 0x08,
- 0x84, 0x06, 0xf3, 0xf8,
- 0x62, 0x65, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x15,
- 0x22, 0x58, 0xe0, 0x8c,
- 0x0c, 0x09, 0x80, 0x00,
- 0xc0, 0x2d, 0x6b, 0x85,
- 0x21, 0xf8, 0xa1, 0x0b,
- 0x06, 0x60, 0x80, 0x00,
- 0x40, 0xb6, 0x67, 0xa1,
- 0xe0, 0x04, 0x00, 0x06,
- 0x64, 0x50, 0x04, 0xf0,
- 0x81, 0x45, 0x81, 0x11,
- 0x00, 0x00, 0x49, 0x16,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x19, 0x21, 0xfe, 0x95,
- 0x3e, 0x3e, 0x81, 0x51,
- 0x1b, 0x48, 0x81, 0x01,
- 0x00, 0x0a, 0xe0, 0x00,
- 0x1b, 0x48, 0xf0, 0x00,
- 0x52, 0x5a, 0xc0, 0x00,
- 0x86, 0x93, 0xe6, 0x8a,
- 0xe0, 0x20, 0x12, 0xa9,
- 0x12, 0x49, 0xa1, 0xab,
- 0x15, 0xf8, 0x80, 0x28,
- 0x12, 0xb9, 0x80, 0x00,
- 0xb1, 0xab, 0x60, 0x2c,
- 0xe0, 0x28, 0x12, 0x49,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x40, 0x40, 0x7c, 0x0e,
- 0x89, 0x0e, 0xf0, 0xfc,
- 0xac, 0x05, 0xfe, 0x4e,
- 0x1e, 0x05, 0xb3, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x49, 0x90, 0x98,
- 0x80, 0x15, 0x0f, 0x41,
- 0x80, 0x00, 0x0b, 0xa8,
- 0x8e, 0xe5, 0xb5, 0xab,
- 0x1e, 0x05, 0xb7, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x41, 0x90, 0x98,
- 0x80, 0x15, 0x0e, 0x41,
- 0x0c, 0x09, 0xaa, 0xc5,
- 0x40, 0x15, 0x62, 0x11,
- 0x89, 0xc4, 0xb9, 0xab,
- 0xe6, 0x82, 0x40, 0xca,
- 0x9a, 0x80, 0x00, 0x04,
- 0x90, 0x98, 0x40, 0x02,
- 0x0e, 0x41, 0x00, 0x49,
- 0xa6, 0xe5, 0x80, 0x1a,
- 0xa4, 0x25, 0xbb, 0xab,
- 0x8a, 0x45, 0xbd, 0xab,
- 0x81, 0x41, 0x3f, 0xab,
- 0x14, 0x0a, 0xa6, 0x05,
- 0x0c, 0x45, 0xe0, 0x40,
- 0x80, 0x0d, 0x08, 0x59,
- 0x14, 0x0a, 0xa2, 0x85,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x80, 0x0d, 0x08, 0x5d,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x0c, 0x49, 0xe0, 0x48,
- 0x80, 0x36, 0x01, 0x85,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x86, 0x85, 0xe0, 0x4c,
- 0xe0, 0x50, 0x14, 0x0a,
- 0x89, 0x04, 0x88, 0x15,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0xe5, 0x00, 0x45,
- 0x8f, 0x35, 0xc0, 0x0d,
- 0xc2, 0x07, 0x89, 0x04,
- 0x00, 0x4b, 0x8c, 0x03,
- 0xc0, 0x0a, 0x6d, 0xa1,
- 0x89, 0x04, 0x8f, 0x25,
- 0x00, 0x41, 0x8c, 0x03,
- 0xc0, 0x15, 0x6e, 0x41,
- 0x6d, 0x41, 0x00, 0x01,
- 0x0d, 0x35, 0xc0, 0x15,
- 0x89, 0x04, 0xa0, 0x43,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0x65, 0x00, 0x45,
- 0x8b, 0xb5, 0xc0, 0x0d,
- 0x08, 0x04, 0x09, 0x24,
- 0x3c, 0x5e, 0xfa, 0x80,
- 0x8c, 0x23, 0x89, 0x01,
- 0x6f, 0x41, 0x04, 0x39,
- 0x81, 0x21, 0x40, 0x15,
- 0x0e, 0x24, 0x85, 0x45,
- 0x88, 0x73, 0xfa, 0x80,
- 0x0e, 0x70, 0x8c, 0x73,
- 0xc0, 0x6b, 0x66, 0x41,
- 0x11, 0x0a, 0x98, 0x8b,
- 0x06, 0x35, 0xf4, 0x1c,
- 0xc4, 0x04, 0x04, 0x20,
- 0x70, 0x10, 0x00, 0x0a,
- 0xe4, 0x04, 0x18, 0x80,
- 0x1c, 0x58, 0xfc, 0xd5,
- 0xfa, 0x80, 0x10, 0x84,
- 0x10, 0x89, 0x8c, 0x83,
- 0xc0, 0x2e, 0x67, 0xc1,
- 0xfa, 0x80, 0x0a, 0x54,
- 0xfa, 0x80, 0x10, 0x84,
- 0xfa, 0x35, 0x91, 0x5b,
- 0x93, 0xc1, 0x04, 0x0b,
- 0x89, 0x21, 0x7b, 0xf5,
- 0xf4, 0x0c, 0x44, 0x8a,
- 0x18, 0x06, 0x76, 0x75,
- 0x00, 0x0a, 0xc0, 0x00,
- 0x04, 0x04, 0x70, 0x10,
- 0xa2, 0x15, 0xfa, 0x80,
- 0xe0, 0x80, 0x56, 0x1a,
- 0xa0, 0x00, 0x08, 0x58,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0x44, 0xe4, 0x50,
- 0xbc, 0x54, 0x83, 0x21,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x5c, 0x10, 0x06, 0x29,
- 0xf0, 0x90, 0x40, 0x32,
- 0x44, 0x20, 0xbe, 0x34,
- 0x80, 0x26, 0xd0, 0x04,
- 0x89, 0x04, 0x95, 0x05,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x64, 0xd1, 0x00, 0x45,
- 0x81, 0x75, 0xc0, 0x05,
- 0xc4, 0x07, 0x89, 0x04,
- 0x00, 0x45, 0x8c, 0x03,
- 0xc0, 0x05, 0x65, 0xd1,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x4b, 0xfc, 0x00,
- 0x80, 0x00, 0x08, 0xf8,
- 0xe0, 0x24, 0x12, 0x09,
- 0x84, 0x45, 0xab, 0x0b,
- 0x84, 0x65, 0xa3, 0x0b,
- 0x88, 0x65, 0xa5, 0x0b,
- 0x88, 0x85, 0xa7, 0x0b,
- 0x8a, 0x85, 0xa9, 0x0b,
- 0xa0, 0x15, 0xa1, 0x0b,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x90, 0x35,
- 0x82, 0x65, 0x80, 0x4d,
- 0xa4, 0x04, 0x87, 0xd5,
- 0x81, 0x4b, 0x03, 0x95,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x95,
- 0x8c, 0x85, 0x80, 0x4d,
- 0x04, 0xf0, 0x7c, 0x04,
- 0x89, 0x44, 0xe4, 0x50,
- 0x60, 0x80, 0x40, 0x0a,
- 0x04, 0x09, 0x83, 0x01,
- 0x07, 0x35, 0xdc, 0x10,
- 0xd0, 0x04, 0x40, 0x00,
- 0x01, 0xe5, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x4d,
- 0x09, 0xc4, 0x80, 0x4d,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x65, 0xfc, 0x30,
- 0xa4, 0x04, 0x83, 0x15,
- 0x09, 0xc4, 0x81, 0x4b,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x05, 0xfc, 0x30,
- 0x46, 0x4a, 0x7e, 0x44,
- 0x04, 0x06, 0xe0, 0x80,
- 0x01, 0x85, 0x80, 0x00,
- 0x7e, 0x44, 0x84, 0x3b,
- 0xe0, 0x80, 0x46, 0x0a,
- 0x46, 0x20, 0x83, 0x31,
- 0x98, 0x03, 0xd0, 0x04,
- 0xbe, 0x34, 0x80, 0x36,
- 0x7c, 0x04, 0x81, 0xd5,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x40, 0x4a, 0x89, 0x44,
- 0x81, 0x01, 0x60, 0x80,
- 0xdc, 0x10, 0x04, 0x09,
- 0x88, 0x23, 0x7e, 0x44,
- 0x07, 0x15, 0x88, 0x06,
- 0xbc, 0x54, 0x99, 0x21,
- 0x56, 0x4a, 0x84, 0x55,
- 0x82, 0xe5, 0xe0, 0x80,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0xc4, 0xe4, 0x50,
- 0xfe, 0x44, 0x81, 0x21,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x5c, 0x30, 0x06, 0x29,
- 0xf0, 0xb0, 0x40, 0x32,
- 0xfb, 0xe5, 0x80, 0x26,
- 0x01, 0x0a, 0x3e, 0x34,
- 0x84, 0xf5, 0xf4, 0x0c,
- 0x86, 0x85, 0xaf, 0xab,
- 0x8a, 0x85, 0xa5, 0xab,
- 0x8c, 0x25, 0xa7, 0xab,
- 0x8c, 0xc5, 0xa9, 0xab,
- 0x8e, 0x85, 0xab, 0xab,
- 0x90, 0x25, 0xad, 0xab,
- 0x82, 0x35, 0xa3, 0xab,
- 0xc2, 0x27, 0x88, 0x23,
- 0x04, 0x43, 0x8c, 0x23,
- 0x40, 0x0c, 0x6d, 0x21,
- 0xef, 0x55, 0x99, 0x21,
- 0xfe, 0x44, 0x99, 0x21,
- 0x72, 0x00, 0x40, 0x40,
- 0x09, 0x45, 0x82, 0x51,
- 0x08, 0x23, 0xcf, 0x07,
- 0x66, 0x41, 0x00, 0x60,
- 0x06, 0x24, 0xc0, 0x58,
- 0x80, 0x23, 0x60, 0x84,
- 0x64, 0x01, 0x04, 0x29,
- 0x86, 0x03, 0x40, 0x04,
- 0x6c, 0x01, 0x00, 0x43,
- 0xbe, 0x34, 0xc0, 0x01,
- 0x07, 0x05, 0xc8, 0x27,
- 0x88, 0x23, 0x84, 0x43,
- 0x8c, 0x23, 0xc4, 0x27,
- 0x68, 0x91, 0x04, 0x45,
- 0x85, 0x85, 0xc0, 0x05,
- 0xc4, 0x27, 0x88, 0x23,
- 0x04, 0x45, 0x8c, 0x23,
- 0xc0, 0x06, 0x60, 0x91,
- 0x88, 0x23, 0x85, 0x15,
- 0x8c, 0x23, 0xc2, 0x27,
- 0x69, 0x21, 0x04, 0x4b,
- 0x99, 0x21, 0x40, 0x0c,
- 0x88, 0x23, 0xe9, 0x65,
- 0x04, 0x49, 0x8c, 0x23,
- 0x40, 0x1a, 0x6a, 0x41,
- 0xe7, 0xf5, 0x99, 0x21,
- 0x00, 0x60, 0x08, 0x23,
- 0xc0, 0x58, 0x66, 0x41,
- 0x60, 0x84, 0x06, 0x24,
- 0x04, 0x29, 0x80, 0x23,
- 0x40, 0x04, 0x60, 0x01,
- 0x00, 0x43, 0x86, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xc8, 0x27, 0xbe, 0x34,
- 0x65, 0x75, 0xa4, 0x43,
- 0x0b, 0x0a, 0x99, 0x21,
- 0x24, 0xc8, 0xe4, 0xfc,
- 0x4c, 0x15, 0x9f, 0xfc,
- 0x40, 0x0b, 0x69, 0xed,
- 0x4c, 0x15, 0x81, 0x01,
- 0x40, 0x0b, 0x69, 0xe9,
- 0x85, 0xa5, 0x81, 0x21,
- 0x64, 0x50, 0x06, 0xf0,
- 0xec, 0x80, 0x08, 0x10,
- 0x7c, 0x04, 0x06, 0x39,
- 0xfb, 0x90, 0x4a, 0x12,
- 0x64, 0x7c, 0x03, 0x0a,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6c, 0x00, 0x10, 0x44,
- 0x06, 0xcb, 0xa8, 0x53,
- 0x18, 0x06, 0x82, 0x11,
- 0x0e, 0xc4, 0x80, 0x00,
- 0x81, 0xc1, 0x68, 0x90,
- 0x9c, 0x00, 0x58, 0x30,
- 0x6f, 0x90, 0x06, 0xc4,
- 0x46, 0x82, 0xa9, 0xcf,
- 0xb8, 0x0f, 0x78, 0x8c,
- 0x06, 0x52, 0x26, 0x7f,
- 0x4c, 0x05, 0xec, 0x04,
- 0x40, 0x0b, 0x69, 0xe9,
- 0xae, 0x2f, 0xa7, 0x7f,
- 0x69, 0xed, 0x4c, 0x25,
- 0x02, 0x0a, 0xc0, 0x0b,
- 0xf4, 0xb5, 0xe1, 0x00,
- 0xa1, 0x0b, 0xa4, 0x0f,
- 0x0c, 0x09, 0x88, 0x05,
- 0xc0, 0x38, 0x64, 0xc5,
- 0x64, 0xc1, 0x0c, 0x19,
- 0x43, 0x0d, 0xc0, 0x38,
- 0x64, 0xc5, 0x00, 0x60,
- 0x86, 0xf5, 0xc0, 0xe1,
- 0xef, 0xdc, 0x42, 0x46,
- 0x88, 0x18, 0x82, 0x2b,
- 0x88, 0x16, 0xc2, 0x19,
- 0x6e, 0x0d, 0x0c, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0x80, 0x00, 0x02, 0x16,
- 0x03, 0x11, 0x4c, 0x11,
- 0x81, 0xf5, 0x80, 0x38,
- 0xc2, 0x09, 0x84, 0x08,
- 0x83, 0x25, 0x84, 0x06,
- 0xef, 0xdc, 0x40, 0x46,
- 0x84, 0x08, 0x80, 0x1b,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x00, 0x60, 0x04, 0x06,
- 0xc0, 0xe1, 0x64, 0xc5,
- 0x02, 0x0a, 0x80, 0x18,
- 0x02, 0x10, 0xe3, 0xfc,
- 0x40, 0x11, 0xc4, 0x04,
- 0x1e, 0xf0, 0xc0, 0x00,
- 0x0c, 0x0c, 0xe5, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xef, 0xdc, 0x40, 0x46,
- 0x80, 0x28, 0x80, 0x18,
- 0x04, 0x19, 0xc2, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x26, 0xa2, 0x2f,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xef, 0xdc, 0x02, 0x86,
- 0xe0, 0x70, 0x02, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x64, 0xd5, 0x00, 0x29,
- 0xa7, 0x2b, 0xc0, 0x2b,
- 0x80, 0x00, 0x02, 0x29,
- 0x9c, 0x20, 0x44, 0x20,
- 0x80, 0x00, 0x42, 0x21,
- 0xff, 0xfc, 0x14, 0x68,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x51, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x49, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x45, 0xe8,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x55, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x4d, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x43, 0x08,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xec, 0x04, 0x02, 0x00,
- 0xf4, 0x1c, 0x03, 0x0a,
- 0x0c, 0x19, 0x82, 0xd5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xec, 0x04, 0x04, 0x10,
- 0xf4, 0x24, 0x05, 0x0a,
- 0x40, 0x0a, 0x80, 0xd5,
- 0x00, 0x8a, 0xe6, 0x86,
- 0x84, 0x35, 0xe5, 0x44,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0f, 0xf6, 0x40, 0x2b,
- 0x03, 0xf6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf8, 0x40, 0x48,
- 0x0d, 0x78, 0xa3, 0x0b,
- 0x0c, 0x19, 0x80, 0x00,
- 0xc0, 0x15, 0x61, 0x41,
- 0x61, 0x51, 0x0c, 0x09,
- 0x04, 0x14, 0x40, 0x15,
- 0x44, 0x0a, 0xfa, 0x80,
- 0x05, 0x0a, 0xe6, 0x8a,
- 0x82, 0x95, 0xe4, 0xa0,
- 0x61, 0x45, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xe6, 0x8a, 0x44, 0x3a,
- 0xe4, 0x84, 0x04, 0x8a,
- 0x0c, 0x29, 0x84, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x76,
- 0x60, 0x08, 0x42, 0x76,
- 0x7d, 0xf8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x80, 0x00, 0x0b, 0x28,
- 0x61, 0x41, 0x0c, 0x19,
- 0x0c, 0x09, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x04,
- 0x61, 0x49, 0x0c, 0x39,
- 0x42, 0x2a, 0xc0, 0x15,
- 0x86, 0x13, 0xe6, 0x86,
- 0xe4, 0xa0, 0x03, 0x0a,
- 0x0c, 0x19, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x45,
- 0x61, 0x55, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x02, 0x8a, 0x86, 0x13,
- 0x84, 0x15, 0xe4, 0x84,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x76, 0x40, 0x2b,
- 0x42, 0x76, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x7b, 0x08,
- 0xa0, 0x65, 0xa3, 0x0b,
- 0x61, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x15,
- 0x86, 0xd5, 0xf0, 0x10,
- 0x61, 0x55, 0x0c, 0x09,
- 0xa9, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x86, 0x35,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x06,
- 0x60, 0x08, 0x42, 0x06,
- 0x78, 0xd8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x98, 0x05,
- 0xc0, 0x15, 0x61, 0x49,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x84, 0x65,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x82, 0xa5,
- 0xc0, 0x15, 0x61, 0x51,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x55,
- 0xf8, 0x0c, 0x00, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x16,
- 0x60, 0x08, 0x42, 0x16,
- 0x76, 0x98, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x8e, 0x85,
- 0xc0, 0x15, 0x61, 0x41,
- 0x88, 0xb5, 0xa3, 0x0b,
- 0x61, 0x45, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x88, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0xec, 0x10, 0x00, 0x00,
- 0xf4, 0x30, 0x01, 0x0a,
- 0x0c, 0x09, 0x82, 0x55,
- 0x40, 0x15, 0x61, 0x55,
- 0x00, 0x00, 0x81, 0x71,
- 0x00, 0x8a, 0xec, 0x10,
- 0x88, 0x35, 0xf4, 0x34,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x36, 0x40, 0x2b,
- 0x42, 0x36, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x74, 0x28,
- 0x03, 0x55, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x61, 0x51, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0xa9, 0x0b, 0x82, 0x05,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xa9, 0x0b, 0x01, 0x65,
- 0x61, 0x55, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0x81, 0x71, 0x00, 0xd5,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x26, 0x40, 0x2b,
- 0x42, 0x26, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x71, 0xe8,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0xcc,
- 0x81, 0x01, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x99, 0x06, 0xc0, 0x16,
- 0x42, 0x4a, 0x91, 0x06,
- 0x42, 0x06, 0x60, 0x80,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x80, 0x00, 0x0c, 0x58,
- 0x6f, 0xfc, 0x6d, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0xc0, 0x00, 0x0b, 0xf8,
- 0x61, 0x41, 0x0c, 0x09,
- 0x04, 0xf0, 0x40, 0x15,
- 0x0c, 0x19, 0xe4, 0x20,
- 0xc0, 0x15, 0x61, 0x45,
- 0x66, 0x82, 0x40, 0x1a,
- 0xe4, 0x30, 0x02, 0xf0,
- 0x63, 0x09, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x4b, 0x88,
- 0x61, 0x49, 0x0c, 0x09,
- 0x99, 0x18, 0xc0, 0x15,
- 0x61, 0x4d, 0x0c, 0x29,
- 0x11, 0x38, 0xc0, 0x15,
- 0x0c, 0x09, 0xc5, 0x07,
- 0x40, 0x15, 0x61, 0x41,
- 0x4c, 0x11, 0x80, 0x13,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe1, 0x88, 0x08, 0x24,
- 0x61, 0x51, 0x0c, 0x19,
- 0x86, 0x43, 0x40, 0x15,
- 0x61, 0x55, 0x0c, 0x29,
- 0xa3, 0x0b, 0x40, 0x15,
- 0x61, 0x45, 0x0c, 0x39,
- 0x4c, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x6c, 0x51, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x06, 0x0a, 0x80, 0x95,
- 0x9c, 0x45, 0xf0, 0x04,
- 0xf4, 0x0c, 0x07, 0x0a,
- 0x4c, 0x21, 0x84, 0x55,
- 0x40, 0x2b, 0x6c, 0x4d,
- 0x4c, 0x31, 0xea, 0x0d,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x63, 0x58, 0x8c, 0x25,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x9c, 0x55, 0xa1, 0x0b,
- 0x6c, 0x41, 0x0c, 0x09,
- 0x85, 0xe5, 0xc0, 0x2b,
- 0xf0, 0x10, 0x06, 0x0a,
- 0x68, 0x0d, 0x86, 0x15,
- 0x4c, 0x21, 0x89, 0x31,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x45, 0x4c, 0x31,
- 0x86, 0x85, 0xc0, 0x2b,
- 0x6f, 0xfc, 0x62, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x96, 0xb5,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x86, 0x15, 0xab, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xfd, 0x15, 0x8c, 0x0b,
- 0x6f, 0xfc, 0x64, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x92, 0xf5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xf4, 0x95, 0xe8, 0x0d,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x4c, 0x01,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x00, 0x04,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0x40, 0x1a, 0xc0, 0x2b,
- 0x0c, 0x19, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0x40, 0x2b,
- 0x04, 0x16, 0xe0, 0x40,
- 0x4c, 0x21, 0x80, 0x00,
- 0x80, 0x2c, 0x0c, 0x81,
- 0x6c, 0x49, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0x00, 0x2b, 0x0c, 0x6d,
- 0xfa, 0x80, 0x02, 0x14,
- 0x0c, 0x69, 0x4c, 0x01,
- 0x44, 0x3a, 0x80, 0x2b,
- 0x40, 0x1a, 0xe6, 0x8a,
- 0x40, 0x2a, 0xe6, 0x82,
- 0x4c, 0x01, 0xe0, 0x02,
- 0x40, 0x2c, 0x6c, 0x79,
- 0xfa, 0x80, 0x02, 0x04,
- 0x66, 0x31, 0x4c, 0x13,
- 0x44, 0x98, 0xc0, 0x16,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x6f, 0xf0, 0x64, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x73, 0xb8, 0x80, 0xf5,
- 0x8c, 0x0b, 0x68, 0x24,
- 0x68, 0x30, 0x4f, 0x08,
- 0x21, 0x11, 0x8c, 0x0b,
- 0x4c, 0x11, 0x83, 0x21,
- 0xc0, 0x1b, 0x65, 0x61,
- 0x65, 0x41, 0x4c, 0x21,
- 0x0c, 0xcc, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x68, 0x11, 0x00, 0x49,
- 0x00, 0x39, 0xc0, 0x27,
- 0x40, 0x27, 0x68, 0x15,
- 0x08, 0x8a, 0x81, 0x01,
- 0x08, 0x44, 0xe5, 0x40,
- 0x00, 0x40, 0x81, 0x88,
- 0x06, 0x8a, 0x0c, 0x50,
- 0x04, 0x06, 0xe5, 0x00,
- 0x06, 0x34, 0x81, 0x01,
- 0x00, 0x34, 0x81, 0x88,
- 0x00, 0x00, 0x9a, 0x80,
- 0x88, 0x06, 0x8c, 0x40,
- 0xa1, 0x3b, 0x84, 0x38,
- 0xc4, 0x08, 0x06, 0x30,
- 0xc1, 0x88, 0x06, 0x34,
- 0xc0, 0x00, 0x42, 0x31,
- 0xc0, 0x00, 0x04, 0x09,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0xda, 0x80, 0x00, 0x04,
- 0xc4, 0x08, 0x00, 0x00,
- 0xc1, 0x88, 0x00, 0x04,
- 0x40, 0x00, 0x44, 0x01,
- 0xdd, 0x93, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x40, 0xc8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x8b, 0x55, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x44, 0x1a, 0xc0, 0x2b,
- 0xa1, 0x2b, 0xe5, 0x02,
- 0x0c, 0x39, 0x86, 0x05,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x49, 0x0c, 0x49,
- 0x0c, 0x59, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x41, 0x0c, 0xc9,
- 0x46, 0x4a, 0xc0, 0x2b,
- 0x48, 0xca, 0xe5, 0x0e,
- 0x46, 0x4a, 0xe5, 0x16,
- 0x44, 0x3a, 0xe5, 0x0e,
- 0x03, 0x65, 0xe0, 0x0a,
- 0xef, 0xfc, 0x04, 0x22,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x56, 0x40, 0x2b,
- 0x42, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x5c, 0xc8,
- 0x88, 0x05, 0xa3, 0x0b,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2b,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x04, 0x24, 0xc0, 0x2b,
- 0xc2, 0x07, 0x7a, 0x80,
- 0x04, 0x22, 0x01, 0x71,
- 0x4c, 0x01, 0xed, 0x00,
- 0x40, 0x1b, 0x63, 0x05,
- 0x4c, 0x11, 0xc2, 0x17,
- 0x40, 0x1b, 0x63, 0x01,
- 0xe0, 0x04, 0x00, 0x06,
- 0x63, 0x09, 0x4c, 0x01,
- 0x4c, 0x21, 0xc0, 0x1b,
- 0xc0, 0x1b, 0x63, 0x0d,
- 0x63, 0x11, 0x4c, 0x71,
- 0x8e, 0x0b, 0xc0, 0x1b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x6b,
- 0x63, 0x0d, 0x0c, 0x79,
- 0x02, 0xf0, 0x40, 0x1b,
- 0x0c, 0x99, 0xe4, 0x20,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0xa9,
- 0xfc, 0x0e, 0xc0, 0x2b,
- 0x3c, 0x06, 0x89, 0x06,
- 0x45, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xc0, 0x00, 0x10, 0x06,
- 0x00, 0x08, 0x1e, 0x85,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x74, 0xf8, 0x9e, 0x2b,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8e, 0x65, 0xa1, 0x8b,
- 0x6c, 0x3d, 0x0c, 0x39,
- 0x02, 0x90, 0x40, 0x2b,
- 0x3c, 0x48, 0xec, 0x04,
- 0xec, 0x04, 0x04, 0xa0,
- 0x6c, 0x39, 0x0c, 0x59,
- 0x81, 0xc1, 0x40, 0x2b,
- 0xa8, 0x33, 0x89, 0x08,
- 0x60, 0x8c, 0x08, 0x34,
- 0x64, 0x20, 0x06, 0x60,
- 0xa0, 0x53, 0xc0, 0x6d,
- 0xc6, 0x57, 0x05, 0x45,
- 0x12, 0x44, 0x02, 0xc1,
- 0x51, 0xcd, 0xfa, 0x80,
- 0xf0, 0x94, 0x54, 0x12,
- 0x79, 0x00, 0x46, 0xa1,
- 0xf0, 0xa4, 0x56, 0x22,
- 0x82, 0x25, 0x8c, 0xb6,
- 0x6c, 0x51, 0x0c, 0x99,
- 0x0a, 0x54, 0x40, 0x2b,
- 0xc2, 0x97, 0xfa, 0x80,
- 0x92, 0x53, 0x01, 0xd5,
- 0x6c, 0x55, 0x0c, 0x49,
- 0x81, 0xc1, 0x40, 0x2b,
- 0x6c, 0x39, 0x0c, 0x59,
- 0xc2, 0x47, 0xc0, 0x2b,
- 0x92, 0x43, 0x20, 0x53,
- 0x0e, 0x70, 0xc6, 0x57,
- 0x82, 0x31, 0x6c, 0x04,
- 0xf6, 0xb5, 0xa1, 0x7b,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x51, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0xc1, 0xc3, 0x87, 0x25,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x7b,
- 0x82, 0x6b, 0x7c, 0x0e,
- 0x02, 0xf0, 0x3e, 0x0e,
- 0x7e, 0x98, 0xe4, 0x20,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x41, 0x18, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xfc, 0x04, 0x82, 0x35,
- 0x40, 0x1a, 0xbe, 0x14,
- 0x00, 0x02, 0xe6, 0x82,
- 0x18, 0x0e, 0xef, 0xfc,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x55, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x4d, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0xc1, 0xc3, 0x81, 0x25,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x85, 0xa1, 0x3b,
- 0xe5, 0x0a, 0x40, 0x1a,
- 0xe0, 0x0e, 0x40, 0x0a,
- 0xef, 0xfc, 0x00, 0x02,
- 0x81, 0x01, 0x10, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x56,
- 0x6f, 0xf4, 0x4e, 0xe8,
- 0xe0, 0x08, 0x4c, 0x56,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xc6, 0xc1, 0x83,
- 0x43, 0x26, 0x61, 0x48,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x48,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x9c,
- 0xef, 0xe4, 0x56, 0xa8,
- 0x6f, 0x9c, 0x62, 0x48,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x36,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x55, 0x18, 0x80, 0x16,
- 0x60, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x53, 0x98, 0x80, 0x16,
- 0x5f, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x76,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x52, 0x18, 0x80, 0x16,
- 0x5d, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x96,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x50, 0x98, 0x80, 0x16,
- 0x5c, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xa6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4f, 0x18, 0x80, 0x16,
- 0x5a, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xe6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4d, 0x98, 0x80, 0x16,
- 0x59, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe2, 0xc0, 0x00, 0x2c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4c, 0x38, 0x80, 0x16,
- 0x57, 0xd8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfe, 0x1c, 0x04, 0xcc,
- 0x6f, 0xf8, 0x46, 0x28,
- 0x80, 0x7b, 0x80, 0x6b,
- 0xe0, 0x00, 0x0e, 0x2a,
- 0x40, 0x01, 0x05, 0xf8,
- 0x05, 0x01, 0x80, 0x00,
- 0x4c, 0x01, 0x81, 0x91,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x94, 0x00, 0x06,
- 0x10, 0x60, 0x00, 0x9e,
- 0xc0, 0xaf, 0x64, 0x1d,
- 0xef, 0xe8, 0x7d, 0x68,
- 0x82, 0x65, 0xa1, 0x0b,
- 0xa0, 0x06, 0x87, 0x01,
- 0xef, 0xf8, 0x45, 0x28,
- 0xef, 0xf8, 0x45, 0x68,
- 0xef, 0xe4, 0x49, 0xe8,
- 0xef, 0xe8, 0x7d, 0x08,
- 0x45, 0x86, 0x01, 0x11,
- 0x6a, 0xd8, 0xee, 0x10,
- 0x8c, 0x0b, 0x6f, 0x9c,
- 0x6f, 0xdc, 0x00, 0x86,
- 0x6a, 0x78, 0x81, 0x11,
- 0x44, 0xc6, 0x6f, 0x9c,
- 0x00, 0x86, 0xe0, 0x00,
- 0x42, 0x86, 0x60, 0x0c,
- 0x4c, 0x15, 0xe0, 0x3c,
- 0x40, 0x0e, 0x60, 0xd9,
- 0x60, 0x01, 0x02, 0x06,
- 0x4c, 0x05, 0xc0, 0x7d,
- 0xc0, 0x0e, 0x60, 0xcd,
- 0x60, 0xd1, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x0e,
- 0x40, 0x0e, 0x60, 0xd5,
- 0x4c, 0x05, 0x8b, 0x01,
- 0x40, 0x0e, 0x60, 0xdd,
- 0x4c, 0x15, 0x83, 0x01,
- 0x40, 0x0a, 0x6d, 0x49,
- 0xe0, 0x50, 0x03, 0xe6,
- 0x6e, 0x91, 0x4c, 0x01,
- 0x00, 0x06, 0x40, 0x2c,
- 0x4c, 0x13, 0xe4, 0x00,
- 0x40, 0x16, 0x67, 0x39,
- 0xe0, 0x00, 0x42, 0x16,
- 0x67, 0x3d, 0x4c, 0x03,
- 0x00, 0x76, 0x40, 0x16,
- 0xc0, 0x20, 0x60, 0x09,
- 0x6e, 0x01, 0x4c, 0x13,
- 0x87, 0x11, 0x40, 0x15,
- 0x4c, 0x11, 0x80, 0x96,
- 0xc0, 0x38, 0x64, 0xc1,
- 0x00, 0x06, 0x83, 0x05,
- 0x10, 0x60, 0x61, 0x94,
- 0xc0, 0xaf, 0x64, 0x1c,
- 0x23, 0x1b, 0x80, 0x14,
- 0x4c, 0x11, 0x83, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x15,
- 0xef, 0xe4, 0x5a, 0xa8,
- 0x64, 0x60, 0x18, 0xf0,
- 0x60, 0x18, 0x8c, 0x0b,
- 0x8d, 0x04, 0xe8, 0x10,
- 0x82, 0x55, 0xa1, 0x0b,
- 0xa1, 0x9b, 0x8f, 0x94,
- 0x01, 0x46, 0x80, 0xe5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa3, 0x0b, 0x80, 0x04,
- 0x5e, 0xd8, 0x88, 0x95,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x10, 0xb6, 0x20, 0x28,
- 0x02, 0xb6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf0, 0x78, 0x68,
- 0x68, 0x38, 0x4a, 0xc8,
- 0x51, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x7d, 0x38, 0xa1, 0x8b,
- 0x50, 0x00, 0x6f, 0xf4,
- 0x7d, 0x58, 0x9c, 0x00,
- 0x41, 0xd8, 0xef, 0xf4,
- 0x01, 0x01, 0xef, 0xe4,
- 0x6a, 0x18, 0x83, 0x11,
- 0x8c, 0x2b, 0x6f, 0xe4,
- 0x0c, 0xcc, 0x90, 0x0b,
- 0xdd, 0x93, 0xf6, 0x1c,
- 0x68, 0x0c, 0x7a, 0x48,
- 0x00, 0x8b, 0x8c, 0x0b,
- 0xa1, 0x8b, 0x8c, 0x0b,
- 0x48, 0x78, 0x80, 0x85,
- 0xfb, 0xf5, 0xef, 0xf4,
- 0xe8, 0x14, 0x64, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x7a, 0x18, 0xf6, 0x55,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0xe8, 0x00, 0x45, 0x88,
- 0x40, 0x01, 0x04, 0x48,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xef, 0xf4, 0x47, 0x68,
- 0x6f, 0xf0, 0x7f, 0x08,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xe4, 0x66, 0xa8,
- 0x68, 0x00, 0x48, 0x28,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x97, 0x11, 0x61, 0x4c,
- 0xa3, 0x9b, 0x00, 0x04,
- 0x81, 0x81, 0x01, 0x91,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x4c,
- 0x80, 0x16, 0x9d, 0x11,
- 0x74, 0x58, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x02, 0x0e, 0x80, 0x8b,
- 0x40, 0x10, 0x60, 0x01,
- 0xe5, 0x40, 0x00, 0x06,
- 0x02, 0x2b, 0x81, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0x02, 0x33, 0xc9, 0x34,
- 0xc6, 0x9f, 0x84, 0x1b,
- 0xfe, 0x15, 0xa1, 0x0b,
- 0x72, 0xfd, 0x41, 0xc6,
- 0x00, 0x9e, 0xc0, 0x20,
- 0x44, 0x18, 0x8c, 0x0b,
- 0xa1, 0x8b, 0xe8, 0x38,
- 0x81, 0x35, 0xe4, 0xb5,
- 0xe8, 0x38, 0x43, 0xc8,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0x6f, 0xe8, 0x6f, 0x08,
- 0x80, 0x8b, 0x8e, 0x2b,
- 0xe2, 0x55, 0xa1, 0x8b,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x0b, 0x03, 0x31,
- 0xe8, 0x34, 0x4d, 0xe8,
- 0x80, 0x8b, 0x71, 0x35,
- 0x61, 0x20, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0x01, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0xdd, 0x93, 0x80, 0x16,
- 0x62, 0x65, 0x00, 0x09,
- 0x02, 0x46, 0x40, 0x15,
- 0x04, 0x14, 0xe1, 0x4c,
- 0x88, 0x09, 0x81, 0x31,
- 0x44, 0x20, 0x84, 0x28,
- 0x20, 0x2f, 0xf3, 0xec,
- 0xe1, 0x34, 0x40, 0x86,
- 0x83, 0x11, 0x04, 0x26,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x01, 0x06,
- 0x88, 0x36, 0x80, 0x24,
- 0x88, 0x16, 0x80, 0x24,
- 0x00, 0x36, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x06,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x00, 0x86,
- 0x43, 0x06, 0x00, 0x04,
- 0x80, 0x16, 0xe0, 0x00,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x68, 0x05, 0x00, 0x1b,
- 0x00, 0x2b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x01,
- 0x68, 0x15, 0x00, 0x3b,
- 0x00, 0x4b, 0xc0, 0x0a,
- 0x40, 0x0a, 0x68, 0x09,
- 0x00, 0x2b, 0xe0, 0x17,
- 0x40, 0x0a, 0x68, 0x0d,
- 0x00, 0x5b, 0xa4, 0x1f,
- 0x40, 0x0a, 0x68, 0x11,
- 0x80, 0x1e, 0xe0, 0x37,
- 0x28, 0x2f, 0xe0, 0x27,
- 0x82, 0x2e, 0xaa, 0x3f,
- 0xdd, 0x93, 0xc0, 0x3e,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0xa0, 0x55, 0xa8,
- 0x01, 0x06, 0x81, 0x11,
- 0x4f, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x44, 0x06,
- 0x88, 0x44, 0x9c, 0x34,
- 0x00, 0x1c, 0xc2, 0x19,
- 0x46, 0x01, 0xa1, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x10, 0x16, 0x83, 0x11,
- 0x88, 0x04, 0x83, 0x11,
- 0x41, 0xf6, 0x00, 0x66,
- 0x54, 0x18, 0xe0, 0x3c,
- 0x7b, 0xd8, 0xef, 0xa0,
- 0x1c, 0x04, 0xe8, 0x14,
- 0x4d, 0x18, 0x81, 0x11,
- 0xa8, 0xf1, 0xe8, 0x08,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x06, 0xc1, 0x83,
- 0x45, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x46, 0x86,
- 0x8c, 0x54, 0x88, 0x44,
- 0x00, 0x1c, 0xc4, 0x19,
- 0x48, 0x01, 0xa3, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x16, 0x83, 0x11,
- 0x8c, 0x04, 0x81, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x67, 0xcd, 0x00, 0x19,
- 0xc8, 0x19, 0xc0, 0x2d,
- 0x67, 0xcd, 0x40, 0x11,
- 0x83, 0x11, 0x40, 0x2d,
- 0xe8, 0x08, 0x49, 0x88,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x4e, 0x48,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa5, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x47, 0x08,
- 0xe1, 0x38, 0x4f, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x45,
- 0x45, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x38,
- 0xc8, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x98, 0x04, 0x80, 0x16,
- 0xe8, 0x34, 0x75, 0x68,
- 0x02, 0x26, 0x18, 0x04,
- 0x45, 0x18, 0xe0, 0x10,
- 0x9c, 0x04, 0xe8, 0x08,
- 0x40, 0x0a, 0x80, 0x08,
- 0x84, 0xc5, 0xe0, 0x84,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x38, 0x45, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0x80, 0x1c, 0xd0, 0x19,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x26,
- 0x43, 0x78, 0x98, 0x04,
- 0x41, 0xf6, 0xe8, 0x08,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x49, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x47, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa7, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x87, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x40, 0xa8,
- 0xe1, 0x3c, 0x0e, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x84, 0xe5,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0xe0, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x36, 0x00, 0x16,
- 0x98, 0x04, 0xe0, 0x10,
- 0xe8, 0x04, 0x7e, 0xe8,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x05,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x94,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x36,
- 0x7d, 0x38, 0x98, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x40, 0x0a, 0x80, 0x08,
- 0x8a, 0x05, 0xe0, 0x88,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0x98, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc8, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x38,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x00, 0x1b, 0x98, 0x04,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x02, 0x14,
- 0x6e, 0x09, 0x40, 0x13,
- 0x02, 0x36, 0x40, 0x15,
- 0x7a, 0x98, 0xe0, 0x40,
- 0x4c, 0x38, 0xe8, 0x04,
- 0x41, 0xf6, 0xef, 0xe0,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x40, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x7e, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa9, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x2b,
- 0xe8, 0x04, 0x77, 0xa8,
- 0xe1, 0x3c, 0x0f, 0x06,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x9c,
- 0xc2, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x10, 0x02, 0x46,
- 0x75, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0x96,
- 0xe8, 0x04, 0x4c, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa0,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x42, 0xa6,
- 0x4a, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x20, 0x02, 0x46,
- 0xe8, 0x04, 0x73, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa4,
- 0xc8, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xec,
- 0xe0, 0x0c, 0x42, 0xb6,
- 0x48, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x40, 0x02, 0x46,
- 0xe8, 0x04, 0x71, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x8c, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa8,
- 0xd0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xdc,
- 0xe0, 0x80, 0x02, 0x46,
- 0x6f, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xc6,
- 0xe8, 0x04, 0x46, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xac,
- 0xe0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x00, 0x02, 0x46,
- 0x6d, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xd6,
- 0xe8, 0x04, 0x44, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xc5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xb0,
- 0x00, 0x04, 0x8c, 0x08,
- 0x8c, 0x06, 0xfc, 0x94,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0x7c, 0x42, 0x10,
- 0x02, 0x46, 0x00, 0x16,
- 0x98, 0x04, 0xe2, 0x00,
- 0xe8, 0x04, 0x6b, 0xc8,
- 0x42, 0xe6, 0x18, 0x04,
- 0x42, 0x58, 0xe0, 0x0c,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x42, 0x0a, 0x80, 0x18,
- 0x86, 0xc5, 0xe0, 0x98,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0xc6,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0xb4, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0xfc, 0x98, 0x00, 0x04,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf2, 0xfc,
- 0xe4, 0x00, 0x02, 0x46,
- 0x69, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xf6,
- 0xe8, 0x04, 0x40, 0x48,
- 0x00, 0x00, 0x9c, 0x04,
- 0x82, 0x0d, 0xff, 0x11,
- 0x00, 0xc6, 0x86, 0xb5,
- 0x80, 0x14, 0xe1, 0x3c,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x9c,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x03, 0x06, 0x00, 0x16,
- 0x84, 0x2a, 0xe1, 0x98,
- 0x04, 0x24, 0x98, 0x04,
- 0x04, 0x2c, 0xfc, 0xb8,
- 0xe8, 0x00, 0x02, 0x46,
- 0xe8, 0x04, 0x67, 0xa8,
- 0x43, 0x06, 0x18, 0x04,
- 0x7f, 0x98, 0xe0, 0x0c,
- 0x41, 0xf6, 0xe8, 0x00,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x6d, 0xa8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x6b, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0x03, 0x06, 0x61, 0x4c,
- 0x1c, 0x04, 0xe1, 0x98,
- 0xe1, 0x3c, 0x46, 0x46,
- 0xab, 0x41, 0x04, 0x2a,
- 0x40, 0x41, 0x8c, 0x54,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x7c, 0xbc, 0x00, 0x24,
- 0x04, 0x0c, 0x83, 0x21,
- 0x94, 0x26, 0x8b, 0x11,
- 0x80, 0x66, 0x8c, 0x04,
- 0x63, 0x98, 0x9c, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0xef, 0xe0, 0x71, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x69, 0xb8, 0x83, 0x11,
- 0xa8, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x8c, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x67, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0xad, 0x01, 0x61, 0x4c,
- 0x83, 0x81, 0x1c, 0x14,
- 0x6c, 0x1d, 0x42, 0x01,
- 0x83, 0x01, 0x40, 0x2b,
- 0xef, 0xe4, 0x72, 0x88,
- 0xe1, 0x3c, 0x41, 0xc6,
- 0x04, 0x86, 0x80, 0x14,
- 0x80, 0x04, 0x8d, 0x11,
- 0x9c, 0x04, 0x80, 0x66,
- 0xe8, 0x04, 0x5f, 0xc8,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x66, 0x18, 0x83, 0x11,
- 0xa0, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x8c, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0x6f, 0x9c, 0x64, 0x28,
- 0x4f, 0x06, 0x81, 0x61,
- 0xaf, 0x01, 0x61, 0x4c,
- 0x42, 0x01, 0x9c, 0x14,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6e, 0xf8, 0x81, 0x01,
- 0x1c, 0x04, 0xef, 0xe4,
- 0x5c, 0x98, 0x8f, 0x11,
- 0x00, 0x86, 0xe8, 0x04,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf8, 0xc0, 0x02, 0x0a,
- 0x80, 0x18, 0x80, 0xe5,
- 0xf0, 0xc0, 0x42, 0x10,
- 0xe0, 0x80, 0x02, 0x0a,
- 0x9c, 0x14, 0x82, 0xb5,
- 0x6c, 0x15, 0x02, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x00, 0x19, 0xe0, 0x84,
- 0x80, 0x18, 0xc0, 0x70,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x9c, 0x04, 0x80, 0x16,
- 0x6c, 0x15, 0x00, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x84, 0x45, 0xe0, 0x84,
- 0x68, 0x04, 0x5a, 0x88,
- 0xe0, 0x10, 0x02, 0x76,
- 0x68, 0xd8, 0x9c, 0x04,
- 0x9c, 0x04, 0xef, 0xe4,
- 0x6e, 0x09, 0x00, 0x1b,
- 0x42, 0x10, 0xc0, 0x15,
- 0xc0, 0xfd, 0x73, 0xfd,
- 0x6e, 0x09, 0x40, 0x13,
- 0x01, 0x46, 0xc0, 0x15,
- 0x83, 0x11, 0x61, 0x40,
- 0x00, 0x16, 0x80, 0x04,
- 0x00, 0x66, 0x83, 0x11,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0xef, 0x9c, 0x5f, 0x88,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x41, 0x06,
- 0xe1, 0x40, 0x42, 0xc6,
- 0xb1, 0x31, 0x00, 0x04,
- 0x83, 0x41, 0x04, 0x24,
- 0x6c, 0x1d, 0x40, 0x31,
- 0x08, 0x46, 0xc0, 0x2b,
- 0x84, 0x14, 0x81, 0x21,
- 0x91, 0x11, 0x04, 0x26,
- 0xe8, 0x04, 0x55, 0xa8,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x4f, 0x06,
- 0xe1, 0x34, 0x42, 0xc6,
- 0xb3, 0x21, 0x1c, 0x04,
- 0x4d, 0xc6, 0x04, 0x14,
- 0x40, 0x21, 0xe1, 0x98,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x18, 0x16, 0x84, 0x18,
- 0x52, 0x78, 0x93, 0x11,
- 0x98, 0x08, 0xe8, 0x04,
- 0x82, 0xe5, 0xa7, 0x0b,
- 0x84, 0xa5, 0xa3, 0x0b,
- 0x86, 0x65, 0xa5, 0x0b,
- 0x88, 0x55, 0xa1, 0x0b,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x98, 0xe0, 0x10,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x85, 0xc1, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x18, 0xe0, 0x80,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x05, 0xc7, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x98, 0xe0, 0x20,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x85, 0xc3, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x18, 0xe0, 0x40,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x01, 0xc5, 0x13,
- 0x00, 0x46, 0x98, 0x06,
- 0x83, 0x11, 0x61, 0x44,
- 0x81, 0x21, 0x00, 0x04,
- 0x80, 0x16, 0xa8, 0xf1,
- 0x1f, 0x0c, 0x80, 0x26,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x00, 0x5e, 0xe8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0xc0, 0x00, 0x1d, 0x48,
- 0x63, 0x29, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xdd,
- 0x63, 0x21, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x25,
- 0x61, 0x84, 0x08, 0x34,
- 0x54, 0x78, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x1b, 0xf8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0x39,
- 0x6c, 0xe5, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x53, 0x28,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x1a, 0xa8,
- 0x63, 0x49, 0x0c, 0x39,
- 0x01, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xed,
- 0x63, 0x41, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x61, 0x84, 0x08, 0x34,
- 0x51, 0xd8, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x19, 0x58, 0xa1, 0x0b,
- 0x0c, 0x3b, 0xc0, 0x00,
- 0x40, 0x16, 0x69, 0xa9,
- 0x6c, 0xf9, 0x01, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x50, 0x88,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x18, 0x08,
- 0x63, 0x71, 0x0c, 0x39,
- 0x41, 0xce, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x09,
- 0x63, 0x61, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x61, 0x84, 0x08, 0x34,
- 0x4f, 0x38, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x16, 0xb8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0xa9,
- 0x6d, 0x31, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4d, 0xe8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x15, 0x68,
- 0x63, 0xd9, 0x0c, 0x39,
- 0x40, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x39,
- 0x63, 0xd1, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xd5,
- 0x61, 0x84, 0x08, 0x34,
- 0x4c, 0x98, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x14, 0x18, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x09,
- 0x6d, 0x41, 0x01, 0x4e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4b, 0x48,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x12, 0xc8,
- 0x64, 0x39, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x4d,
- 0x64, 0x31, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x35,
- 0x4a, 0x18, 0x82, 0x39,
- 0x86, 0x4b, 0x6f, 0x9c,
- 0x11, 0x98, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x69,
- 0x6d, 0x55, 0x00, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x61,
- 0x64, 0x65, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x48, 0xc8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x10, 0x48,
- 0x6f, 0x9c, 0x4f, 0x48,
- 0x41, 0xf6, 0x81, 0x01,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x47, 0x88,
- 0x63, 0x29, 0x0c, 0x09,
- 0x03, 0xc6, 0x40, 0x2d,
- 0x84, 0x14, 0xe1, 0x38,
- 0x82, 0x09, 0xc7, 0x07,
- 0x42, 0x46, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x38,
- 0xc0, 0x2d, 0x63, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x38, 0x40, 0xc6,
- 0x0c, 0x29, 0x80, 0x14,
- 0xc0, 0x2d, 0x63, 0x49,
- 0xc9, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x04, 0x84, 0x36,
- 0x63, 0x49, 0x0c, 0x19,
- 0x80, 0x28, 0xc0, 0x2d,
- 0x84, 0x19, 0xc9, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x00, 0x26, 0xa2, 0x2f,
- 0xe1, 0x38, 0x41, 0xc6,
- 0x0c, 0x2b, 0x80, 0x14,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x14, 0x84, 0x36,
- 0x69, 0xa9, 0x0c, 0x2b,
- 0x84, 0x38, 0xc0, 0x16,
- 0x84, 0x29, 0xcb, 0x27,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x84, 0x36, 0xa4, 0x3f,
- 0x0c, 0x1b, 0x80, 0x04,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x17, 0x80, 0x28,
- 0x44, 0x20, 0x88, 0x19,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x00, 0x86, 0x00, 0x26,
- 0x0c, 0x19, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x3c, 0x01, 0x46,
- 0x64, 0xe1, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x01, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xe5,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x03, 0xc6,
- 0x63, 0xa9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xa9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x3c, 0x40, 0xc6,
- 0x64, 0xed, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xf1,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x43, 0x46,
- 0x63, 0xd9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x43, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xd9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x00, 0x46,
- 0x64, 0xf9, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x00, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x02, 0xc6,
- 0x64, 0x09, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x03, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x09,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x01, 0xc6,
- 0x65, 0x05, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x40, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x09,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x42, 0x46,
- 0x64, 0x39, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x41, 0x46,
- 0x65, 0x11, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x15,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x43, 0xc6,
- 0x64, 0x69, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x02, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x44,
- 0xc0, 0x2d, 0x64, 0x69,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x84, 0x55, 0xbf, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0xa6, 0x40, 0x2b,
- 0x02, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x48, 0x08,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x63, 0x21,
- 0x63, 0x25, 0x0c, 0x19,
- 0x7a, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x94, 0x35,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x19,
- 0x7a, 0x38, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x90, 0xf5,
- 0xc0, 0x2d, 0x63, 0x41,
- 0x63, 0x45, 0x0c, 0x19,
- 0x79, 0x98, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8e, 0xb5,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x19,
- 0x78, 0xf8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8c, 0x75,
- 0xc0, 0x2d, 0x63, 0x61,
- 0x63, 0x65, 0x0c, 0x19,
- 0x78, 0x58, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8a, 0x35,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x19,
- 0x77, 0xb8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x86, 0xf5,
- 0xc0, 0x2d, 0x63, 0xd1,
- 0x63, 0xd5, 0x0c, 0x19,
- 0x77, 0x18, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x84, 0xb5,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x19,
- 0x76, 0x78, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x82, 0x75,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x0c, 0x19,
- 0x75, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x64, 0x61, 0x0c, 0x09,
- 0x0c, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0x98, 0x34, 0xe8,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x40, 0x38, 0xc0, 0x2b,
- 0xa3, 0x0b, 0xef, 0xec,
- 0x41, 0xf6, 0x82, 0x55,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x98, 0x6f, 0x08,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xff, 0xd8, 0x39, 0xe8,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x3e, 0x38, 0xf2, 0x0c,
- 0x4e, 0x46, 0xff, 0xe8,
- 0x0e, 0x09, 0xef, 0xdc,
- 0xc2, 0x09, 0xf8, 0x10,
- 0xf8, 0x10, 0x4e, 0x01,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x42, 0x36, 0x8c, 0xf5,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x5b, 0x88,
- 0x60, 0x04, 0x42, 0x46,
- 0x57, 0x38, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x81, 0x81, 0x1c, 0x08,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x9c, 0x08, 0x9c, 0x06,
- 0xf3, 0xf4, 0x40, 0x00,
- 0x4e, 0x81, 0x9c, 0x06,
- 0x0c, 0x0b, 0xe0, 0x30,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0xf8, 0x8c, 0x0b,
- 0x75, 0xf8, 0xe8, 0x20,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x44, 0x01, 0x86,
- 0x00, 0x86, 0x80, 0x04,
- 0x58, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xe8, 0x00,
- 0x34, 0x78, 0xf2, 0x0c,
- 0x42, 0x56, 0xff, 0xd8,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x58, 0x28,
- 0x6e, 0x09, 0x0c, 0x0b,
- 0x02, 0x06, 0x40, 0x15,
- 0xff, 0xc0, 0x60, 0x01,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x41, 0xc6, 0x40, 0x15,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x02, 0x0f, 0x80, 0x04,
- 0x72, 0xc1, 0x02, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0x04, 0x0e, 0xfc, 0xc4,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8c, 0x0b, 0xc0, 0x20,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xff, 0xd8, 0x32, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x25, 0xa1, 0x1b,
- 0x6f, 0x98, 0x66, 0xc8,
- 0x40, 0x06, 0x83, 0x11,
- 0x0c, 0x0c, 0xfa, 0x02,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x7a, 0x02, 0x4c, 0x06,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x98, 0x66, 0x08,
- 0x8c, 0x0b, 0x81, 0x11,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x12, 0x06, 0x00, 0x6b,
- 0x14, 0xc6, 0xe0, 0x08,
- 0x57, 0x46, 0x61, 0x14,
- 0x10, 0x86, 0xe1, 0x10,
- 0x81, 0x01, 0x61, 0x3c,
- 0x81, 0x71, 0x09, 0x95,
- 0x6c, 0x1d, 0x4c, 0x91,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x44, 0x88,
- 0x14, 0x15, 0xa1, 0x0b,
- 0x02, 0x19, 0xc0, 0x00,
- 0x8e, 0x75, 0xc0, 0x00,
- 0x68, 0x00, 0x48, 0xc8,
- 0x28, 0x14, 0x8c, 0x0b,
- 0x84, 0x18, 0xa1, 0x0b,
- 0x42, 0x0a, 0x8c, 0x95,
- 0x8c, 0x25, 0xe0, 0x84,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x00, 0x4d, 0x08,
- 0xe0, 0xc8, 0x00, 0x0a,
- 0x62, 0x38, 0x8a, 0xb5,
- 0x2c, 0x04, 0xe8, 0x1c,
- 0x83, 0x21, 0x81, 0x11,
- 0x95, 0x11, 0x00, 0x16,
- 0x68, 0x30, 0x4d, 0x88,
- 0x2c, 0x04, 0x8c, 0x0b,
- 0x80, 0x16, 0x83, 0x11,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x16, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0xa0, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0xa0, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x00, 0x41, 0x26,
- 0xe8, 0x7d, 0x82, 0x71,
- 0x0c, 0x4c, 0xee, 0x05,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x7a, 0xc8,
- 0x0e, 0x16, 0x80, 0x6b,
- 0x42, 0xc6, 0x60, 0x08,
- 0x4c, 0x71, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x86,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0x65,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x7a, 0x08,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x02, 0x16, 0x40, 0x2b,
- 0x6e, 0x58, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4f, 0x48,
- 0x4f, 0x18, 0x81, 0x95,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xd5, 0xe0, 0x84,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x78, 0x58, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x26,
- 0x60, 0x08, 0x02, 0x26,
- 0x6c, 0x78, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x76, 0x08,
- 0x00, 0x26, 0x80, 0x6b,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x45, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x46,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0xa5,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x75, 0x48,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x69, 0x68,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4a, 0x68,
- 0x4a, 0x38, 0x83, 0x75,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xe5, 0xe0, 0x84,
- 0xef, 0xec, 0x73, 0xc8,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x67, 0xe8,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x00, 0x86, 0x81, 0x71,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0xef, 0xec, 0x70, 0xe8,
- 0x60, 0x08, 0x00, 0x36,
- 0xe0, 0x04, 0x42, 0x26,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x30, 0x40, 0x68,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x52, 0xc6, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x24,
- 0x80, 0x28, 0xa4, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0xa5, 0xe0, 0x80,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x70, 0x38, 0xfe, 0x25,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x10, 0x66,
- 0x60, 0x08, 0x02, 0x66,
- 0x64, 0x58, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0x45, 0x58, 0x80, 0x95,
- 0x81, 0xe5, 0xe8, 0x30,
- 0xe8, 0x30, 0x45, 0x28,
- 0x80, 0x08, 0xa4, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x10, 0x06, 0x00, 0xe5,
- 0x69, 0x7d, 0x80, 0x00,
- 0xe0, 0x00, 0x51, 0x26,
- 0x90, 0x0b, 0x80, 0xa5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x6e, 0x18, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x76,
- 0x60, 0x08, 0x02, 0x76,
- 0x62, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xe0, 0x6c, 0x02, 0x0a,
- 0x04, 0xcd, 0x00, 0x25,
- 0x9a, 0xa5, 0x80, 0x05,
- 0x00, 0x25, 0xa5, 0x1b,
- 0x80, 0x0b, 0x0a, 0x0d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x0d, 0x40, 0x25,
- 0x98, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xa7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x15,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x15, 0x40, 0x25,
- 0x96, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa9, 0x1b,
- 0x80, 0x0b, 0x0a, 0x11,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x11, 0x40, 0x25,
- 0x94, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xab, 0x1b,
- 0x80, 0x0b, 0x0a, 0x19,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x19, 0x40, 0x25,
- 0x92, 0x05, 0x80, 0x0b,
- 0x00, 0x25, 0xad, 0x1b,
- 0x80, 0x0b, 0x0a, 0x1d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x1d, 0x40, 0x25,
- 0x8e, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xaf, 0x1b,
- 0x80, 0x0b, 0x0a, 0x21,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x21, 0x40, 0x25,
- 0x8c, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xb1, 0x1b,
- 0x80, 0x0b, 0x0a, 0x25,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x25, 0x40, 0x25,
- 0x8a, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xb3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x29,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x29, 0x40, 0x25,
- 0x88, 0x05, 0x80, 0x0b,
- 0x86, 0xc5, 0xb5, 0x1b,
- 0x00, 0x25, 0xb7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x2d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x2d, 0x40, 0x25,
- 0x84, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x09,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x09, 0x40, 0x25,
- 0x82, 0x45, 0x80, 0x0b,
- 0xfc, 0x04, 0x44, 0x10,
- 0xe0, 0x74, 0x04, 0x0a,
- 0x83, 0x21, 0x80, 0xb5,
- 0x6a, 0x31, 0x40, 0x25,
- 0x00, 0x25, 0xc0, 0x0b,
- 0x40, 0x0b, 0x6a, 0x01,
- 0x64, 0x01, 0x06, 0x00,
- 0xc6, 0x27, 0xc0, 0xba,
- 0x44, 0x86, 0x04, 0x33,
- 0x46, 0x15, 0xe0, 0x00,
- 0x42, 0x06, 0xe0, 0x34,
- 0x46, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x38,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0a, 0x05,
- 0x80, 0x00, 0x04, 0x06,
- 0x0a, 0x01, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0a, 0x05,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6b, 0x75, 0x00, 0x25,
- 0x06, 0x00, 0x40, 0x0b,
- 0xc0, 0xbb, 0x65, 0xd1,
- 0xe0, 0x00, 0x4a, 0x86,
- 0x86, 0x23, 0xc6, 0x27,
- 0x46, 0x06, 0xc8, 0x1e,
- 0x00, 0x45, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x98, 0x21, 0x4a, 0x3e,
- 0x4a, 0x4a, 0x82, 0x41,
- 0x40, 0x45, 0xe1, 0x16,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x00, 0x35, 0xa1, 0x5b,
- 0x00, 0x0b, 0x0b, 0x79,
- 0x80, 0x00, 0x08, 0x06,
- 0x0b, 0x75, 0x40, 0x45,
- 0x06, 0x30, 0x80, 0x0b,
- 0x40, 0x35, 0x84, 0x04,
- 0x00, 0x0b, 0x0b, 0x79,
- 0xf0, 0x24, 0x02, 0x0a,
- 0x02, 0x0a, 0x98, 0xa5,
- 0x88, 0xc5, 0xf0, 0x04,
- 0xf0, 0x08, 0x02, 0x0a,
- 0x02, 0x0a, 0x9a, 0x65,
- 0x8a, 0x85, 0xf0, 0x0c,
- 0xf0, 0x10, 0x02, 0x0a,
- 0x02, 0x0a, 0x9c, 0x25,
- 0x9e, 0x45, 0xf0, 0x14,
- 0xf0, 0x18, 0x02, 0x0a,
- 0x02, 0x0a, 0x8a, 0xe5,
- 0x8e, 0x05, 0xf0, 0x1c,
- 0xf0, 0x20, 0x02, 0x0a,
- 0x02, 0x0a, 0x90, 0x25,
- 0x5c, 0x08, 0xf0, 0x00,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6c, 0xbd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xbd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xe5,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xe9,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xf1,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xd5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xfd,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x01,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xdd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xdd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x05,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x09,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xc5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xed,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xcd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xcd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xf5,
- 0x00, 0x35, 0xdd, 0x93,
- 0x40, 0x0b, 0x6c, 0xd1,
- 0x60, 0x15, 0x02, 0x0a,
- 0x82, 0x31, 0xc0, 0x08,
- 0x6c, 0xd1, 0x40, 0x35,
- 0x88, 0x34, 0xc0, 0x0b,
- 0x6c, 0xf9, 0x40, 0x35,
- 0x84, 0x45, 0xc0, 0x0b,
- 0x60, 0x15, 0x02, 0x0a,
- 0x5c, 0x08, 0xc0, 0x04,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6d, 0x0d,
- 0x82, 0x11, 0x88, 0x24,
- 0x6d, 0x0d, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x15,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6d, 0x1d, 0x00, 0x35,
- 0x08, 0x00, 0x40, 0x0b,
- 0xc0, 0xbd, 0x64, 0x71,
- 0x6d, 0x25, 0x00, 0x25,
- 0xc6, 0x37, 0xc0, 0x0b,
- 0x86, 0x43, 0x02, 0x21,
- 0x6d, 0x25, 0x40, 0x25,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x42, 0x06, 0xd2, 0x1e,
- 0x48, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x10,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0d, 0x21,
- 0x80, 0x00, 0x04, 0x06,
- 0x0d, 0x1d, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0d, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0b, 0x6f, 0xa5,
- 0x8a, 0xa5, 0xa1, 0x0b,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x66, 0x8a, 0x44, 0x0a,
- 0xe0, 0x88, 0x06, 0x04,
- 0xf0, 0x8c, 0x4e, 0x62,
- 0x00, 0x20, 0x8c, 0x23,
- 0x40, 0xbd, 0x67, 0xc1,
- 0x6a, 0x38, 0xa9, 0x21,
- 0x40, 0x06, 0xef, 0x90,
- 0x4e, 0x05, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6d, 0xc9,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0x82, 0x01, 0xc0, 0x0b,
- 0x6d, 0xe9, 0x4c, 0x05,
- 0x00, 0x4a, 0x40, 0x0b,
- 0x0c, 0x05, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0d, 0xed,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0d, 0xe9, 0x4c, 0x15,
- 0x00, 0x00, 0xc0, 0x0b,
- 0x4c, 0x05, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0d, 0xed,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6e, 0xb1, 0x00, 0x25,
- 0x86, 0x3a, 0xc0, 0x0b,
- 0xf0, 0x08, 0x02, 0x4b,
- 0x18, 0x24, 0x06, 0x5a,
- 0x04, 0x1a, 0xe0, 0x8c,
- 0x00, 0xc3, 0xc4, 0x27,
- 0x58, 0x53, 0x80, 0x23,
- 0xc0, 0x17, 0x6d, 0x7d,
- 0x6d, 0x79, 0x58, 0x13,
- 0x58, 0x33, 0xc0, 0x17,
- 0xc0, 0x17, 0x6d, 0x75,
- 0x6d, 0x71, 0x58, 0x43,
- 0x42, 0x06, 0xc0, 0x17,
- 0x44, 0x15, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6e, 0x91,
- 0x6e, 0xb1, 0x00, 0x15,
- 0x82, 0x11, 0xc0, 0x0b,
- 0x6e, 0xb1, 0x40, 0x15,
- 0x02, 0x4a, 0x40, 0x0b,
- 0x00, 0x15, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0e, 0xb5,
- 0xc0, 0x00, 0x04, 0x06,
- 0x0e, 0xb1, 0x40, 0x25,
- 0x02, 0x10, 0xc0, 0x0b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0e, 0xb5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6f, 0x19, 0x00, 0x25,
- 0xc6, 0x34, 0xc0, 0x0b,
- 0x60, 0x90, 0x08, 0x24,
- 0x00, 0x43, 0xc4, 0x27,
- 0x48, 0x35, 0x80, 0x23,
- 0xc0, 0x0b, 0x6f, 0x2d,
- 0x48, 0x35, 0xc4, 0x34,
- 0xc0, 0x0b, 0x6f, 0x29,
- 0x48, 0x35, 0x86, 0x34,
- 0xc0, 0x0b, 0x6f, 0x25,
- 0x48, 0x15, 0x84, 0x14,
- 0xc0, 0x0b, 0x6f, 0x21,
- 0xfc, 0x06, 0x42, 0x06,
- 0x6e, 0xf9, 0x44, 0x15,
- 0x00, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6f, 0x19,
- 0x40, 0x15, 0x82, 0x11,
- 0x40, 0x0b, 0x6f, 0x19,
- 0xf8, 0x1c, 0x02, 0x4a,
- 0x0f, 0x1d, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x0b,
- 0x40, 0x25, 0xc0, 0x00,
- 0xc0, 0x0b, 0x0f, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0x0f, 0x1d, 0x40, 0x15,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x61, 0x4c, 0x4d, 0x06,
- 0xe1, 0x98, 0x03, 0x46,
- 0x81, 0x21, 0x18, 0x04,
- 0x6e, 0x10, 0x47, 0x86,
- 0xe1, 0x00, 0x0a, 0xc6,
- 0x03, 0x86, 0x04, 0x0c,
- 0x04, 0x2e, 0xe1, 0x98,
- 0xe1, 0x98, 0x03, 0xc6,
- 0x02, 0x86, 0x04, 0x2e,
- 0x40, 0x25, 0xe1, 0xa4,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x00, 0x00, 0x46,
- 0x04, 0x86, 0x00, 0x1e,
- 0x08, 0x3e, 0xe1, 0x00,
- 0x66, 0xa1, 0x08, 0x10,
- 0x02, 0x10, 0xc0, 0xbf,
- 0x40, 0xb9, 0x67, 0xf1,
- 0xe1, 0x00, 0x05, 0x06,
- 0x94, 0x4e, 0x98, 0x04,
- 0x76, 0xf8, 0x88, 0x1e,
- 0x18, 0x04, 0xef, 0xf0,
- 0x40, 0x71, 0xb5, 0x71,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xf4, 0x4e, 0xa8,
- 0x42, 0xc6, 0x18, 0x04,
- 0x84, 0x0e, 0xe1, 0x98,
- 0xe8, 0x2c, 0x49, 0xa8,
- 0x45, 0x86, 0x18, 0x14,
- 0x88, 0x0e, 0xe1, 0x98,
- 0x68, 0x2c, 0x49, 0x88,
- 0x42, 0x86, 0x82, 0x0b,
- 0x04, 0x0e, 0xe1, 0x98,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x94, 0x66, 0x08,
- 0x00, 0x1c, 0x81, 0x11,
- 0x50, 0x06, 0xe2, 0xc0,
- 0xc0, 0x00, 0x61, 0x99,
- 0x00, 0x46, 0x20, 0x0e,
- 0x56, 0x18, 0xe1, 0x9c,
- 0xa0, 0x04, 0xef, 0x94,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x64, 0xd8, 0x83, 0x11,
- 0x83, 0x81, 0x6f, 0x94,
- 0x43, 0x86, 0x18, 0x04,
- 0xc4, 0x80, 0x60, 0x15,
- 0x69, 0xfd, 0x40, 0x15,
- 0x03, 0x96, 0x40, 0x0b,
- 0xd9, 0x84, 0x63, 0x09,
- 0x6c, 0x1d, 0x40, 0x71,
- 0x40, 0x15, 0xc0, 0x2b,
- 0xc0, 0x0b, 0x6f, 0xa1,
- 0x6f, 0xa5, 0x40, 0x85,
- 0x40, 0x58, 0xc0, 0x0b,
- 0x98, 0x04, 0xe8, 0x00,
- 0xc1, 0xc3, 0xff, 0xd5,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x7b,
- 0x62, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x94,
- 0x09, 0x01, 0x81, 0x61,
- 0x4e, 0x01, 0xb7, 0x11,
- 0x40, 0x2b, 0x6c, 0x19,
- 0x4e, 0x11, 0x8e, 0x0b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x51, 0x18, 0x83, 0x11,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0e, 0x19, 0x82, 0xe5,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x8a, 0xf5, 0xa7, 0x1b,
- 0xef, 0xdc, 0x02, 0x86,
- 0x42, 0x0a, 0x84, 0x18,
- 0x8a, 0x25, 0xe0, 0x80,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x11, 0x88, 0xc5,
- 0x4f, 0x98, 0x8e, 0x0b,
- 0x5f, 0x78, 0xef, 0xfc,
- 0xa1, 0x0b, 0xe8, 0x08,
- 0x5f, 0x98, 0x80, 0xb5,
- 0x8e, 0x0b, 0x68, 0x08,
- 0x0e, 0x0b, 0x80, 0x6b,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0x00, 0x83, 0x11,
- 0xc0, 0xff, 0x72, 0xfd,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x5f, 0x18, 0xe0, 0x3c,
- 0xa1, 0x6b, 0xef, 0x94,
- 0x07, 0x11, 0xa4, 0xd5,
- 0x4d, 0xd8, 0x8e, 0x0b,
- 0x72, 0xf8, 0xef, 0xfc,
- 0x8e, 0x0b, 0x6f, 0xd4,
- 0x80, 0x6b, 0x11, 0xe5,
- 0x8e, 0x0b, 0x09, 0x11,
- 0xef, 0xfc, 0x4d, 0x48,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x10, 0x86, 0x92, 0xd5,
- 0xa0, 0x08, 0xef, 0xdc,
- 0xf8, 0xc0, 0x00, 0x0a,
- 0xa0, 0x08, 0x80, 0xe5,
- 0xf0, 0xc0, 0x40, 0x00,
- 0xe0, 0x80, 0x00, 0x0a,
- 0x0e, 0x0b, 0x90, 0x55,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x8e, 0x05,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x8c, 0x75, 0xa7, 0x0b,
- 0x40, 0x4a, 0xa0, 0x08,
- 0x8a, 0xe5, 0xe0, 0x8c,
- 0x8e, 0x0b, 0x1b, 0x11,
- 0xef, 0xfc, 0x4b, 0x08,
- 0x6f, 0xd8, 0x54, 0xc8,
- 0x1d, 0x11, 0x8e, 0x0b,
- 0x4a, 0x98, 0x8e, 0x0b,
- 0x7c, 0x18, 0xef, 0xfc,
- 0x8e, 0x0b, 0x68, 0x18,
- 0x64, 0xcd, 0x0e, 0x05,
- 0xe2, 0x14, 0xc0, 0x05,
- 0x86, 0xe5, 0xc2, 0x0d,
- 0xc8, 0x09, 0xa0, 0x08,
- 0x8e, 0x0b, 0x20, 0x06,
- 0xe8, 0x18, 0x7f, 0x28,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x83, 0x11, 0x40, 0x15,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x59, 0xb8, 0xe0, 0x3c,
- 0x0b, 0x11, 0xef, 0x94,
- 0x48, 0x98, 0x8e, 0x0b,
- 0x41, 0x38, 0xef, 0xfc,
- 0x81, 0x55, 0xe8, 0x0c,
- 0x8e, 0x0b, 0x1f, 0x11,
- 0xef, 0xfc, 0x48, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x58, 0xb8, 0x83, 0x11,
- 0x0e, 0x09, 0xef, 0x94,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x11, 0x11, 0x8a, 0x85,
- 0x47, 0x38, 0x8e, 0x0b,
- 0x0e, 0x05, 0xef, 0xfc,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x40, 0x06, 0x85, 0x05,
- 0x4e, 0x05, 0xfc, 0x06,
- 0x40, 0x0e, 0x60, 0xfd,
- 0x6f, 0x58, 0x8e, 0x0b,
- 0x56, 0xb8, 0xe8, 0x08,
- 0x8e, 0x0b, 0x68, 0x08,
- 0xfc, 0x06, 0x40, 0x06,
- 0x60, 0xf9, 0x0e, 0x25,
- 0x0e, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x61, 0x01, 0x4e, 0x05,
- 0x82, 0x21, 0xc0, 0x0e,
- 0x60, 0xf9, 0x4e, 0x25,
- 0x00, 0x10, 0x40, 0x0e,
- 0x4e, 0x05, 0xec, 0x04,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0xf8, 0x15, 0xa1, 0x0b,
- 0xc3, 0x13, 0xc1, 0x83,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x55, 0x58, 0x83, 0x11,
- 0x00, 0x64, 0xef, 0x94,
- 0x0c, 0x0c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x6c, 0x19, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x6e, 0x0d, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0xda, 0x00, 0x5c, 0x08,
- 0x63, 0x11, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x38,
- 0x00, 0x2b, 0x82, 0xf5,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x03, 0xc6,
- 0x44, 0x20, 0x84, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x40, 0x23,
- 0x1e, 0xf8, 0xc0, 0x15,
- 0xdd, 0x93, 0xff, 0xd4,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x83, 0x21, 0x83, 0x71,
- 0xc4, 0x19, 0x80, 0x18,
- 0x41, 0x06, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x28,
- 0x00, 0x76, 0x85, 0x11,
- 0xe1, 0x28, 0x40, 0x06,
- 0x00, 0x76, 0x80, 0x04,
- 0x7c, 0xd8, 0x8c, 0x0b,
- 0x40, 0x46, 0xe8, 0x28,
- 0xbd, 0x11, 0x61, 0x28,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x76,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x28, 0x3c, 0x28,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x86, 0x00, 0x8b,
- 0x00, 0x04, 0xe1, 0x28,
- 0x03, 0x11, 0x82, 0x7b,
- 0x56, 0x72, 0x86, 0x6b,
- 0x15, 0x46, 0x70, 0x88,
- 0x80, 0x16, 0xe1, 0x34,
- 0x40, 0x86, 0x8d, 0x25,
- 0x83, 0x11, 0x61, 0x28,
- 0x81, 0x21, 0x00, 0x04,
- 0x41, 0xc6, 0x00, 0x76,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x7a, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa1, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa5, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa5, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5e, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x8c, 0xd5, 0xa1, 0x0b,
- 0x61, 0x2c, 0x00, 0x86,
- 0x00, 0x04, 0x81, 0x11,
- 0x80, 0x04, 0x81, 0x21,
- 0x41, 0xc6, 0x18, 0x0e,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x77, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa3, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa7, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa7, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5b, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x82, 0x71, 0x08, 0x61,
- 0xe6, 0xc5, 0xd6, 0x7d,
- 0x92, 0x0b, 0x81, 0x91,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x28, 0x42, 0x46,
- 0x04, 0x14, 0x81, 0x61,
- 0x04, 0x66, 0x83, 0x21,
- 0x73, 0xf8, 0x83, 0x11,
- 0x40, 0x06, 0xe8, 0x28,
- 0x80, 0x04, 0xe1, 0x28,
- 0x41, 0x06, 0x00, 0x66,
- 0x80, 0x04, 0xe1, 0x14,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x18, 0x00, 0x15,
- 0xe0, 0x50, 0x00, 0x25,
- 0x61, 0x27, 0xe0, 0x17,
- 0x70, 0x01, 0x42, 0x10,
- 0x40, 0x25, 0xc3, 0x00,
- 0xc0, 0x09, 0x6e, 0x09,
- 0xe0, 0x50, 0x00, 0x25,
- 0xfb, 0x80, 0x04, 0x24,
- 0x04, 0x06, 0x24, 0x1f,
- 0xc3, 0xc0, 0x60, 0x01,
- 0x6e, 0x0d, 0x40, 0x15,
- 0x00, 0x15, 0xc0, 0x09,
- 0xed, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x41, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xdd, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x45, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe0, 0x58,
- 0xc0, 0x38, 0x63, 0x15,
- 0xe0, 0x58, 0x00, 0x15,
- 0x04, 0x06, 0x04, 0x1f,
- 0xc3, 0x00, 0x60, 0x01,
- 0x81, 0x21, 0x05, 0x1b,
- 0x80, 0x00, 0x02, 0x26,
- 0x03, 0x15, 0x40, 0x11,
- 0x02, 0x00, 0x00, 0x38,
- 0x83, 0x95, 0xe5, 0x70,
- 0x88, 0x21, 0x04, 0x34,
- 0xc6, 0x3b, 0xf1, 0x37,
- 0x62, 0x11, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xe1, 0x37,
- 0x62, 0x15, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xd1, 0x37,
- 0x62, 0x19, 0x42, 0x31,
- 0xc5, 0x34, 0xc0, 0x27,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x27, 0x62, 0x0d,
- 0x60, 0x61, 0x04, 0x8a,
- 0xf8, 0xb5, 0xc0, 0x01,
- 0x65, 0xd1, 0x02, 0x00,
- 0x81, 0x21, 0x40, 0x01,
- 0x46, 0x3b, 0x83, 0x75,
- 0x42, 0x31, 0x88, 0x21,
- 0xc0, 0x26, 0x6d, 0x71,
- 0xe1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x75,
- 0xd1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x79,
- 0xc6, 0x3b, 0xc5, 0x34,
- 0x6d, 0x6d, 0x42, 0x31,
- 0x04, 0x34, 0xc0, 0x26,
- 0xe0, 0x40, 0x04, 0x8a,
- 0xf1, 0x37, 0x78, 0xf5,
- 0x68, 0x01, 0x40, 0x31,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x84,
- 0x68, 0x05, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x88,
- 0x68, 0x11, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x88,
- 0x68, 0x15, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xff, 0x17, 0xe1, 0x8c,
- 0x67, 0xf1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x8c,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x67, 0xe1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe9, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x47, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xed, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe1, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x45, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xe9, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xd1, 0x17, 0xe1, 0x8c,
- 0x44, 0x20, 0x3e, 0x19,
- 0x24, 0x1f, 0xf0, 0x80,
- 0xe0, 0x04, 0x04, 0x06,
- 0x67, 0xe5, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x15, 0xe1, 0x90,
- 0xc0, 0x0a, 0x6e, 0xe9,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x40, 0x13, 0xe1, 0x17,
- 0xc0, 0x13, 0x6c, 0x29,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x6c, 0x2d, 0x40, 0x13,
- 0x00, 0x15, 0xc0, 0x13,
- 0xd1, 0x17, 0xe2, 0x00,
- 0x68, 0x65, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe2, 0x00,
- 0xc0, 0x27, 0x68, 0x69,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xf1, 0x17,
- 0xc0, 0x27, 0x68, 0x6d,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xe1, 0x17,
- 0xc0, 0x27, 0x68, 0x71,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xd1, 0x17,
- 0xc0, 0x27, 0x68, 0x75,
- 0xe2, 0x04, 0x00, 0x15,
- 0x68, 0x79, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe2, 0x08,
- 0x68, 0x7d, 0x40, 0x11,
- 0x02, 0x00, 0x40, 0x27,
- 0xc0, 0x02, 0x64, 0x31,
- 0x45, 0x34, 0x81, 0x75,
- 0xec, 0x04, 0x04, 0x20,
- 0x6c, 0x29, 0x42, 0x35,
- 0xa1, 0x2b, 0xc0, 0x09,
- 0x02, 0x00, 0xfe, 0x35,
- 0x40, 0x03, 0x64, 0x31,
- 0x81, 0xb5, 0x81, 0x21,
- 0x84, 0x21, 0x04, 0x34,
- 0x42, 0x33, 0xe1, 0x37,
- 0xc0, 0x13, 0x68, 0x59,
- 0x42, 0x33, 0xc5, 0x34,
- 0xc0, 0x13, 0x68, 0x55,
- 0xe5, 0x00, 0x04, 0x8a,
- 0x02, 0x00, 0xfc, 0x95,
- 0x40, 0x03, 0x67, 0x31,
- 0x81, 0x75, 0x89, 0x21,
- 0x04, 0x20, 0x45, 0x34,
- 0x42, 0x35, 0xec, 0x04,
- 0xc0, 0x0a, 0x6b, 0x1d,
- 0xfe, 0x35, 0xa1, 0x2b,
- 0x67, 0x71, 0x00, 0x00,
- 0x93, 0x11, 0x40, 0x03,
- 0x41, 0x24, 0x81, 0x75,
- 0xec, 0x04, 0x02, 0x10,
- 0x60, 0x3d, 0x40, 0x25,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x5d, 0x93, 0xfe, 0x35,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xef, 0x4c, 0x02, 0x29,
- 0x80, 0xb5, 0xa1, 0x2b,
- 0xef, 0x3c, 0x02, 0x29,
- 0x96, 0x25, 0xa1, 0x2b,
- 0xf9, 0x31, 0x01, 0x21,
- 0x81, 0x51, 0x07, 0x41,
- 0x58, 0x52, 0x83, 0x85,
- 0x4c, 0x52, 0x78, 0x0c,
- 0x82, 0xc3, 0xf8, 0x90,
- 0xfc, 0x18, 0x18, 0xc9,
- 0x91, 0xc1, 0x58, 0x2f,
- 0x44, 0x0a, 0x81, 0xb5,
- 0xc2, 0x27, 0x60, 0x9c,
- 0x73, 0xf9, 0x44, 0x20,
- 0x18, 0xc0, 0x40, 0x01,
- 0x44, 0x20, 0xec, 0x04,
- 0xa1, 0xcb, 0xd8, 0x74,
- 0x82, 0x51, 0xfc, 0xb5,
- 0xe1, 0x40, 0x0a, 0x0a,
- 0x07, 0x06, 0xf8, 0xf5,
- 0x04, 0x0a, 0x61, 0x38,
- 0x0c, 0x34, 0xfb, 0xfc,
- 0x9f, 0xf8, 0x05, 0x9e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x02, 0x39, 0x8c, 0x2e,
- 0x87, 0x2b, 0xef, 0x4c,
- 0x07, 0x46, 0x80, 0xf5,
- 0x8c, 0x34, 0xe1, 0x34,
- 0xaf, 0x3b, 0x8c, 0x34,
- 0x02, 0x19, 0x86, 0xf5,
- 0x83, 0x2b, 0xef, 0x3c,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xaf, 0x1b, 0x84, 0x14,
- 0x02, 0x46, 0x84, 0xb5,
- 0x0c, 0xe6, 0x61, 0x94,
- 0x86, 0x38, 0xe0, 0x08,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x84, 0x66, 0xc0, 0x2b,
- 0xf3, 0xf0, 0x46, 0x30,
- 0x06, 0x36, 0xc4, 0x39,
- 0xe0, 0x08, 0x02, 0xe6,
- 0xef, 0xe0, 0x7f, 0xe8,
- 0x82, 0x55, 0xa1, 0x0b,
- 0x00, 0x56, 0x81, 0x85,
- 0x80, 0x18, 0xe1, 0x94,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x80, 0x16, 0xc2, 0x19,
- 0x8c, 0x0b, 0x81, 0x61,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x4c, 0x38, 0xe2, 0x80,
- 0x5a, 0x98, 0xe8, 0x2c,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x45, 0xf6, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x5c, 0x38, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x63, 0x78, 0x82, 0xd5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x78, 0x08,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x6f, 0xfc, 0x64, 0x88,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xb9, 0x11, 0x00, 0x6b,
- 0x68, 0x2c, 0x4a, 0x08,
- 0xe4, 0x10, 0x0e, 0x60,
- 0x81, 0x21, 0x29, 0x11,
- 0x8e, 0x3b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x5a, 0x28,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x61, 0x58, 0x80, 0xc5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0xe0, 0x00, 0x1e, 0x08,
- 0x64, 0x20, 0x10, 0x60,
- 0x09, 0x21, 0x85, 0x11,
- 0x59, 0x38, 0x8c, 0x0b,
- 0x90, 0x3b, 0x6f, 0xfc,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xef, 0xfc, 0x60, 0x68,
- 0x1d, 0x18, 0xa1, 0x7b,
- 0x20, 0x14, 0xc0, 0x00,
- 0xe1, 0x08, 0x0e, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xd1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x14,
- 0xfa, 0x80, 0x04, 0x24,
- 0xa1, 0x39, 0x1f, 0x29,
- 0x68, 0x00, 0x5c, 0x68,
- 0x1c, 0x04, 0x89, 0x11,
- 0xe1, 0x14, 0x03, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x1a, 0xe8,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x1a, 0x78, 0xa9, 0x0b,
- 0x5a, 0x14, 0x80, 0x00,
- 0xe1, 0x44, 0x4f, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xf1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x24,
- 0xf8, 0x7c, 0x44, 0x10,
- 0x78, 0x80, 0x46, 0x30,
- 0x5a, 0x58, 0x8b, 0x11,
- 0x1c, 0x04, 0xe8, 0x00,
- 0xe1, 0x48, 0x42, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x18, 0xe8,
- 0x4f, 0x46, 0x5a, 0x14,
- 0x9c, 0x04, 0xe1, 0x44,
- 0x61, 0xa0, 0x04, 0x14,
- 0xfa, 0x80, 0x02, 0x14,
- 0x7a, 0x80, 0x04, 0x24,
- 0xf8, 0x80, 0x46, 0x10,
- 0x8b, 0x11, 0x3f, 0x29,
- 0xe8, 0x00, 0x58, 0xc8,
- 0x43, 0x06, 0x1c, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x17, 0x58, 0x83, 0x0b,
- 0x0c, 0x45, 0xc0, 0x00,
- 0x02, 0x86, 0x60, 0x10,
- 0x84, 0x04, 0xe1, 0x48,
- 0xe1, 0xe0, 0x04, 0x44,
- 0x44, 0x20, 0x00, 0x38,
- 0xc4, 0x3d, 0xfb, 0xfc,
- 0xe1, 0x47, 0x80, 0xd5,
- 0xfa, 0x80, 0x04, 0x44,
- 0x80, 0x65, 0xc5, 0x3d,
- 0x84, 0x04, 0x80, 0x26,
- 0x03, 0x86, 0x00, 0x08,
- 0x84, 0x14, 0xe1, 0x48,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x15, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb8, 0x40, 0x0a,
- 0x02, 0x46, 0x84, 0x85,
- 0xd5, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xcb, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x14, 0x48,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x02, 0x06, 0x84, 0x85,
- 0xd1, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc7, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x12, 0xe8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb0, 0x40, 0x0a,
- 0x43, 0xc6, 0x84, 0x45,
- 0x8e, 0x09, 0x61, 0x44,
- 0x88, 0x06, 0x84, 0x24,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x83, 0x0b, 0x8e, 0x19,
- 0xc0, 0x00, 0x11, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x42, 0x06, 0x84, 0x05,
- 0xc7, 0x07, 0x61, 0x08,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x14, 0x03, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x10, 0x68,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf8, 0x40, 0x0a,
- 0x02, 0xc6, 0x84, 0x45,
- 0xf1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0f, 0x28,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x03, 0x06, 0x84, 0x45,
- 0xe9, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0d, 0xe8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf0, 0x40, 0x0a,
- 0x03, 0x46, 0x84, 0x45,
- 0xe1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0c, 0xa8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x43, 0x86, 0x86, 0x25,
- 0xc9, 0x07, 0x61, 0x00,
- 0x84, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf4,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x84, 0x18, 0xc3, 0x07,
- 0xc0, 0x1f, 0xcd, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xaa, 0xc5,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x05, 0xe0, 0xb0,
- 0x61, 0x00, 0x43, 0x86,
- 0x04, 0x24, 0xc9, 0x07,
- 0x88, 0x38, 0x82, 0x09,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0xc0, 0x1f, 0xcb, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xa4, 0x85,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x25, 0xe0, 0xac,
- 0x61, 0x00, 0x43, 0x46,
- 0x04, 0x24, 0xc5, 0x07,
- 0x88, 0x38, 0x84, 0x09,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0xc3, 0x07, 0x84, 0x14,
- 0xc7, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x9e, 0x25, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa8, 0x40, 0x0a,
- 0x43, 0x46, 0x86, 0x05,
- 0xc5, 0x07, 0x61, 0x00,
- 0x82, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf8,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc5, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x96, 0xe5, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa4, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0xc5,
- 0x84, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x90, 0xe5, 0xe0, 0x84,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa0, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0x85,
- 0x82, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x0a, 0xc0, 0x1f,
- 0x8a, 0xf5, 0xe0, 0x80,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x02, 0x46, 0x86, 0x05,
- 0xeb, 0x07, 0x61, 0x04,
- 0x87, 0x31, 0x04, 0x14,
- 0x78, 0x8c, 0x46, 0x02,
- 0x84, 0x28, 0x86, 0x09,
- 0xf3, 0xf0, 0x44, 0x20,
- 0x04, 0x26, 0xa6, 0x2f,
- 0xe1, 0x14, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x86, 0x19, 0xcb, 0x17,
- 0x84, 0xb5, 0x81, 0x1b,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0x07, 0x1a, 0x14,
- 0x70, 0x01, 0x40, 0x00,
- 0x81, 0x71, 0x43, 0x00,
- 0x61, 0xc0, 0x04, 0x14,
- 0xfb, 0x80, 0x02, 0x14,
- 0x6e, 0x09, 0x4c, 0x25,
- 0xa2, 0x0f, 0x40, 0x09,
- 0x6e, 0x0d, 0x4c, 0x05,
- 0x81, 0xb5, 0xc0, 0x09,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x66, 0x40, 0x2b,
- 0x42, 0x66, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xe0, 0x5d, 0x68,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x69, 0x84, 0x08, 0x24,
- 0xe9, 0x84, 0x0a, 0x34,
- 0x18, 0x44, 0x00, 0x48,
- 0xb8, 0x5f, 0xe0, 0x84,
- 0x04, 0x25, 0xa7, 0x5b,
- 0xe9, 0x84, 0x02, 0x44,
- 0x86, 0x25, 0xa3, 0x5b,
- 0x86, 0xa5, 0xa5, 0x5b,
- 0x5c, 0x08, 0xa1, 0x5b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xa1, 0x1b, 0x80, 0x65,
- 0xa1, 0x1b, 0x84, 0x85,
- 0x81, 0x85, 0x86, 0x35,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x5c, 0x08, 0xa3, 0x1b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xc7, 0x4d, 0x82, 0x55,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xdd, 0x93, 0x80, 0x36,
- 0x82, 0x05, 0xc4, 0x4d,
- 0x80, 0xd5, 0xa1, 0x1b,
- 0xdd, 0x93, 0x80, 0x26,
- 0x80, 0x16, 0x81, 0x11,
- 0xc7, 0x4d, 0xdd, 0x93,
- 0xa3, 0x1b, 0x80, 0x65,
- 0xdd, 0x93, 0xfc, 0x45,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x98, 0x6b, 0x00, 0x8b,
- 0xef, 0xf8, 0x75, 0xc8,
- 0x67, 0xc1, 0x0e, 0x80,
- 0x43, 0x46, 0x40, 0xae,
- 0x01, 0x21, 0xe0, 0x0c,
- 0x77, 0x58, 0x90, 0x0b,
- 0x8e, 0x3b, 0x6f, 0xf8,
- 0xa1, 0x0b, 0x81, 0x91,
- 0x1c, 0x14, 0x82, 0x35,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x43, 0x4a, 0xc0, 0x3f,
- 0x12, 0x0c, 0xe4, 0x08,
- 0x98, 0x0e, 0xe2, 0x00,
- 0x0c, 0x4c, 0x9a, 0x9e,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x61, 0x98, 0x4f, 0x06,
- 0x1c, 0x6e, 0x80, 0x6b,
- 0xe1, 0x00, 0x02, 0x06,
- 0xe8, 0x28, 0x65, 0x08,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xe8, 0x00, 0x40, 0x88,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x87, 0x65,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x60, 0x08, 0x40, 0x26,
- 0x65, 0x50, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0x89,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x60,
- 0x09, 0x21, 0xc0, 0x11,
- 0x6a, 0x98, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x21,
- 0x65, 0x01, 0x02, 0x70,
- 0x29, 0x21, 0xc0, 0x89,
- 0x69, 0xf8, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x71,
- 0x65, 0x61, 0x02, 0x70,
- 0x21, 0x21, 0xc0, 0x89,
- 0x69, 0x58, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0xb1,
- 0x65, 0xa1, 0x02, 0x70,
- 0x45, 0x06, 0xc0, 0x89,
- 0x89, 0x31, 0x60, 0x18,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x18, 0x28, 0x88,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x6b,
- 0x6e, 0x05, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x16, 0x09, 0x96, 0x75,
- 0xc0, 0x04, 0x64, 0xa1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x09, 0x94, 0xa5,
- 0x40, 0x38, 0x63, 0x21,
- 0xe1, 0x9c, 0x4e, 0x0a,
- 0x00, 0x1a, 0x81, 0x81,
- 0x0b, 0x38, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x56,
- 0x4c, 0x01, 0x96, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0xb1, 0x12, 0x60,
- 0x14, 0x60, 0xc0, 0xbf,
- 0x40, 0xc0, 0x65, 0x21,
- 0x64, 0x11, 0x00, 0xb0,
- 0x02, 0xb0, 0xc0, 0x11,
- 0x40, 0x14, 0x64, 0x61,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x60, 0xc0, 0xae,
- 0x40, 0xae, 0x65, 0xa1,
- 0x65, 0xe1, 0x18, 0x70,
- 0x09, 0xbe, 0xc0, 0x1f,
- 0x64, 0xc1, 0x06, 0x60,
- 0x7e, 0xce, 0xc0, 0xad,
- 0x65, 0x21, 0x08, 0x60,
- 0x7c, 0x2e, 0xc0, 0xad,
- 0x65, 0x41, 0x0a, 0x60,
- 0x3e, 0x1e, 0xc0, 0x54,
- 0x3c, 0x0e, 0x94, 0x1b,
- 0x55, 0x38, 0x92, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xc4,
- 0x63, 0x21, 0x0c, 0x09,
- 0x4e, 0x0a, 0x40, 0x38,
- 0x00, 0x1a, 0xe1, 0x9c,
- 0x07, 0xb8, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x66,
- 0x65, 0x60, 0x06, 0x60,
- 0x4c, 0x01, 0xc0, 0xd8,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x1b, 0x92, 0x0b,
- 0x4d, 0x98, 0x8e, 0x2b,
- 0x96, 0x4b, 0x6f, 0xc0,
- 0x4e, 0x0a, 0x0d, 0xa5,
- 0x40, 0x46, 0xe1, 0x9c,
- 0x43, 0x46, 0x60, 0x08,
- 0x4c, 0x01, 0xe1, 0x4c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x04, 0xb0,
- 0x18, 0x60, 0xc0, 0x11,
- 0x40, 0xae, 0x65, 0xa1,
- 0x64, 0x01, 0x10, 0xb0,
- 0x0e, 0x60, 0xc0, 0x10,
- 0x40, 0x9f, 0x67, 0x61,
- 0x66, 0x11, 0x08, 0x60,
- 0x14, 0xb0, 0xc0, 0xad,
- 0x40, 0x13, 0x65, 0xb1,
- 0x67, 0x91, 0x12, 0xb0,
- 0x17, 0xbe, 0xc0, 0x10,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x04, 0xc0, 0xae,
- 0x66, 0xd1, 0x02, 0x60,
- 0x0f, 0xbe, 0xc0, 0x54,
- 0x64, 0x51, 0x06, 0x60,
- 0x19, 0xbe, 0xc0, 0x9e,
- 0x0d, 0x9e, 0x8e, 0xbb,
- 0x66, 0x71, 0x0a, 0x60,
- 0x8b, 0x8e, 0xc0, 0xa2,
- 0xfe, 0xce, 0x89, 0xae,
- 0x18, 0x60, 0x13, 0xce,
- 0xc0, 0xa3, 0x64, 0xa1,
- 0x08, 0x60, 0x7c, 0x4e,
- 0xc0, 0x6c, 0x67, 0x01,
- 0x96, 0x4b, 0x3e, 0x4e,
- 0xbc, 0xce, 0x9b, 0x8e,
- 0x9d, 0x2e, 0x95, 0x1e,
- 0xef, 0xb8, 0x49, 0x88,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x40, 0x56, 0x88, 0x75,
- 0x0a, 0x60, 0x60, 0x08,
- 0xc0, 0xa1, 0x64, 0x70,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x41, 0x46, 0x40, 0x2b,
- 0x17, 0x34, 0xe1, 0x4c,
- 0x99, 0x24, 0x96, 0x4b,
- 0x02, 0x30, 0x80, 0x04,
- 0x40, 0x14, 0x64, 0x61,
- 0x65, 0xe1, 0x0e, 0x30,
- 0x89, 0x2e, 0xc0, 0x1f,
- 0xfc, 0x1e, 0xfe, 0x7e,
- 0x9b, 0x24, 0x9d, 0x14,
- 0x86, 0x1b, 0x3e, 0x1e,
- 0x92, 0x3b, 0x3c, 0xae,
- 0xef, 0xb4, 0x4e, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0xa1, 0x8b, 0x8a, 0x45,
- 0x6e, 0x89, 0x0c, 0x05,
- 0x10, 0x56, 0x40, 0x0a,
- 0x0c, 0x15, 0xc0, 0x0c,
- 0xc0, 0x0a, 0x6e, 0x8d,
- 0x6e, 0x91, 0x0c, 0x25,
- 0x0c, 0x35, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x6e, 0x95,
- 0x69, 0x3d, 0x4c, 0x03,
- 0x40, 0x60, 0x40, 0x0a,
- 0x4c, 0x13, 0xdc, 0x00,
- 0x40, 0x0a, 0x69, 0x41,
- 0xc0, 0x0c, 0x02, 0x56,
- 0x69, 0x45, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x49,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x44, 0x78, 0xc0, 0x2b,
- 0x10, 0x0b, 0xcf, 0xe0,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x60, 0x08, 0x42, 0x66,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x02, 0x60, 0x40, 0x2b,
- 0xc0, 0xb6, 0x67, 0x01,
- 0x0a, 0x60, 0x19, 0x24,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x9b, 0x34, 0x80, 0x04,
- 0x8e, 0x2b, 0x7c, 0x2e,
- 0x95, 0x14, 0xbe, 0x1e,
- 0xbc, 0x1e, 0x93, 0x44,
- 0x69, 0x58, 0x9d, 0x14,
- 0x17, 0xb4, 0xef, 0xb4,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x9f, 0xfc, 0x30, 0x18,
- 0x4e, 0x0a, 0x77, 0xa5,
- 0xc1, 0xc3, 0xe9, 0x9c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x8b,
- 0x00, 0x8e, 0xe1, 0x98,
- 0xe1, 0x00, 0x02, 0x06,
- 0x68, 0x28, 0x4f, 0x28,
- 0x01, 0x91, 0x90, 0x0b,
- 0xe6, 0xd4, 0x54, 0x06,
- 0x83, 0x61, 0x17, 0xb1,
- 0x81, 0x71, 0x09, 0xc5,
- 0x6e, 0x19, 0x10, 0x1b,
- 0x00, 0x64, 0x40, 0x15,
- 0x80, 0x1f, 0xe8, 0xa4,
- 0x90, 0x05, 0xa1, 0x1b,
- 0xe1, 0x34, 0x43, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x80, 0xa5, 0xa1, 0x2b,
- 0x80, 0x1f, 0x84, 0x18,
- 0x8c, 0xc5, 0xa1, 0x1b,
- 0xf0, 0xa4, 0x4c, 0x82,
- 0x68, 0x81, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x1b,
- 0x41, 0x06, 0x63, 0xfc,
- 0x80, 0x14, 0xe1, 0x98,
- 0x04, 0x94, 0x80, 0xe5,
- 0x90, 0x0b, 0x7a, 0x80,
- 0xe8, 0x00, 0x43, 0x28,
- 0x68, 0x18, 0x81, 0x45,
- 0x90, 0x0b, 0x6f, 0xfc,
- 0x68, 0x81, 0x0c, 0x09,
- 0x06, 0x06, 0x40, 0x1b,
- 0x0c, 0x14, 0xe1, 0x38,
- 0xec, 0x04, 0x04, 0xb0,
- 0x00, 0x0a, 0x83, 0x61,
- 0x10, 0x05, 0xe3, 0xfc,
- 0x10, 0x09, 0xdc, 0x28,
- 0x00, 0x27, 0x07, 0xe5,
- 0x50, 0x05, 0xa1, 0x7b,
- 0xc0, 0x0a, 0x6e, 0x69,
- 0x82, 0x55, 0x84, 0x2c,
- 0xe1, 0x98, 0x41, 0x06,
- 0x90, 0x0b, 0x00, 0x14,
- 0xef, 0xfc, 0x69, 0x88,
- 0x61, 0x38, 0x06, 0x06,
- 0x8c, 0x04, 0x80, 0x7b,
- 0x02, 0x91, 0x80, 0xbc,
- 0x84, 0xb1, 0x88, 0xa1,
- 0xe0, 0x40, 0x12, 0x0a,
- 0x8e, 0x0b, 0xec, 0x95,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x60, 0x08, 0x40, 0x36,
- 0x50, 0x01, 0x84, 0x6b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x70,
- 0x02, 0x80, 0xc0, 0x11,
- 0x40, 0x6d, 0x65, 0x71,
- 0x4f, 0xb8, 0x89, 0x21,
- 0x81, 0x31, 0x68, 0x18,
- 0x64, 0x21, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6d, 0x65, 0x21,
- 0x81, 0x31, 0x29, 0x21,
- 0xe8, 0x18, 0x4f, 0x08,
- 0x60, 0x88, 0x00, 0x64,
- 0x65, 0x80, 0x02, 0x80,
- 0x02, 0x25, 0xc0, 0x6d,
- 0x82, 0x03, 0x7c, 0x00,
- 0x89, 0x31, 0x0c, 0x13,
- 0x61, 0x1d, 0x4e, 0x25,
- 0x00, 0x25, 0xc0, 0x01,
- 0x4e, 0x25, 0xe0, 0x40,
- 0x40, 0x01, 0x61, 0x21,
- 0xe0, 0x18, 0x45, 0x06,
- 0xe0, 0x80, 0x00, 0x05,
- 0x61, 0x25, 0x4e, 0x05,
- 0x02, 0x09, 0xc0, 0x01,
- 0x4e, 0x01, 0xe3, 0x00,
- 0xc0, 0x04, 0x64, 0xa1,
- 0x63, 0x40, 0x02, 0x09,
- 0xe0, 0x18, 0x43, 0x06,
- 0xe6, 0x86, 0x42, 0x6a,
- 0x64, 0xa5, 0x4e, 0x01,
- 0x82, 0x83, 0x40, 0x04,
- 0x64, 0xb1, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6e, 0x65, 0x01,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x18, 0x0b, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x15, 0xc6, 0x00, 0x6b,
- 0x10, 0x60, 0xe1, 0xa0,
- 0x40, 0x54, 0x66, 0xd1,
- 0x65, 0x41, 0x12, 0x60,
- 0x28, 0x6e, 0xc0, 0x54,
- 0x67, 0x61, 0x0e, 0x60,
- 0x10, 0x0b, 0xc0, 0xae,
- 0x0c, 0x2b, 0x92, 0x1b,
- 0x6a, 0x38, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x28, 0x24, 0x84, 0x55,
- 0x12, 0x1b, 0x90, 0x0b,
- 0x6c, 0x18, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x00, 0x00, 0x14, 0x25,
- 0x9c, 0x00, 0x40, 0x80,
- 0x1c, 0x00, 0x42, 0x90,
- 0x9c, 0x00, 0x46, 0x70,
- 0x8f, 0xcc, 0x68, 0xe8,
- 0x6e, 0x89, 0x0c, 0x15,
- 0xa1, 0x0b, 0x40, 0x0a,
- 0x6e, 0x8d, 0x0c, 0x25,
- 0x0e, 0x06, 0x40, 0x0a,
- 0x0c, 0x35, 0x80, 0x00,
- 0xc0, 0x0a, 0x6e, 0x91,
- 0x6e, 0x95, 0x0c, 0x45,
- 0x4c, 0x13, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x3d,
- 0x69, 0x41, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x45,
- 0x69, 0x49, 0x4c, 0x43,
- 0x82, 0x65, 0xc0, 0x0a,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xdc, 0x71, 0xe8,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x61, 0x41, 0x00, 0x19,
- 0x15, 0xc6, 0x40, 0x15,
- 0x00, 0x29, 0xe0, 0x10,
- 0x40, 0x15, 0x61, 0x45,
- 0x42, 0x2a, 0x81, 0xb1,
- 0x00, 0x29, 0xe6, 0x86,
- 0xc0, 0x15, 0x62, 0x11,
- 0xfa, 0x80, 0x02, 0x14,
- 0x04, 0x00, 0x0b, 0x2e,
- 0xc0, 0x66, 0x66, 0x49,
- 0x04, 0x00, 0x7e, 0x2e,
- 0xc0, 0x58, 0x66, 0x51,
- 0x04, 0x00, 0x7c, 0x2e,
- 0xc0, 0x6b, 0x66, 0x45,
- 0x97, 0xc5, 0xbe, 0x2e,
- 0xf0, 0x8c, 0x44, 0x02,
- 0x6f, 0x41, 0x04, 0x79,
- 0xe5, 0x7d, 0xc0, 0x15,
- 0x8b, 0x24, 0x82, 0xd5,
- 0xe6, 0x8a, 0x48, 0x3a,
- 0xf0, 0x90, 0x44, 0x02,
- 0x6e, 0x41, 0x04, 0x29,
- 0xf0, 0x2d, 0xc0, 0x1a,
- 0x54, 0x4a, 0x80, 0xd5,
- 0x80, 0x75, 0xe4, 0x88,
- 0x82, 0xb1, 0x15, 0x75,
- 0x69, 0x91, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x2b,
- 0x40, 0x88, 0x04, 0x44,
- 0xc0, 0x00, 0x0a, 0x16,
- 0xd0, 0x80, 0x44, 0x22,
- 0x08, 0x91, 0x04, 0x95,
- 0x86, 0xb5, 0xc0, 0x05,
- 0x60, 0x84, 0x04, 0x44,
- 0x80, 0x23, 0x83, 0x51,
- 0x6d, 0x21, 0x04, 0x63,
- 0x04, 0x54, 0xc0, 0x0c,
- 0xcf, 0x2d, 0xfa, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x90, 0x80, 0x48, 0x42,
- 0x08, 0x91, 0x08, 0x95,
- 0x88, 0x05, 0x80, 0x05,
- 0x82, 0x51, 0x08, 0x23,
- 0x80, 0x23, 0xc2, 0x27,
- 0x6d, 0x21, 0x04, 0x23,
- 0x8d, 0x2d, 0xc0, 0x0c,
- 0xfb, 0x55, 0xfa, 0xa5,
- 0xfa, 0x80, 0x04, 0x54,
- 0x08, 0x44, 0xcf, 0x2d,
- 0x48, 0x42, 0x80, 0x84,
- 0x08, 0x6b, 0x90, 0x80,
- 0x80, 0x0c, 0x0d, 0x21,
- 0x08, 0x23, 0x82, 0x65,
- 0xc4, 0x27, 0x82, 0x51,
- 0x04, 0x25, 0x80, 0x23,
- 0xc0, 0x05, 0x68, 0x91,
- 0xfa, 0xa5, 0xd2, 0x2d,
- 0x0b, 0x24, 0xf9, 0x05,
- 0xfc, 0xc4, 0xd5, 0x97,
- 0x4a, 0x2a, 0x89, 0x9e,
- 0xfe, 0x24, 0xe6, 0x8e,
- 0x60, 0x84, 0x06, 0x54,
- 0xe0, 0x88, 0x08, 0x54,
- 0x98, 0x43, 0x3e, 0xc4,
- 0x04, 0x64, 0x04, 0x33,
- 0xfb, 0x27, 0xfb, 0x00,
- 0x98, 0x53, 0x06, 0x29,
- 0x10, 0x64, 0x84, 0x63,
- 0x83, 0x61, 0x7b, 0x00,
- 0x85, 0x87, 0x09, 0xc5,
- 0xf0, 0x2d, 0x94, 0x28,
- 0x54, 0x4a, 0x80, 0x95,
- 0x90, 0x25, 0xe4, 0x88,
- 0x18, 0x24, 0x8c, 0x22,
- 0x86, 0xc9, 0xe1, 0xf4,
- 0x04, 0x24, 0x98, 0x23,
- 0x85, 0x27, 0xfb, 0x00,
- 0x58, 0x22, 0x10, 0x24,
- 0x12, 0xc0, 0xf1, 0xa0,
- 0x13, 0x0a, 0xed, 0xb0,
- 0xc0, 0x04, 0x64, 0x75,
- 0xd5, 0x27, 0x02, 0xe5,
- 0x6d, 0x40, 0x18, 0xc0,
- 0xe0, 0x04, 0x52, 0x46,
- 0x60, 0xa6, 0x58, 0xca,
- 0x89, 0x94, 0x82, 0x21,
- 0xec, 0x08, 0x18, 0xc0,
- 0xe0, 0x0a, 0x44, 0x9a,
- 0x09, 0x94, 0x83, 0xd5,
- 0x19, 0x0a, 0x82, 0x21,
- 0xc0, 0x02, 0x60, 0x45,
- 0x60, 0x0a, 0x44, 0x9a,
- 0xc0, 0x00, 0x13, 0xe6,
- 0x40, 0x26, 0x58, 0xca,
- 0xc0, 0x04, 0x13, 0x06,
- 0x58, 0x92, 0x02, 0xf5,
- 0x9f, 0x91, 0xd1, 0xb0,
- 0x66, 0xa6, 0x58, 0xca,
- 0xe0, 0x04, 0x52, 0x46,
- 0x6e, 0xc1, 0x18, 0xc0,
- 0x58, 0xca, 0xc0, 0x04,
- 0x18, 0xc0, 0xe0, 0xa6,
- 0xd8, 0x2d, 0xec, 0x14,
- 0xc0, 0x00, 0x04, 0xd6,
- 0xc0, 0x00, 0x4a, 0x21,
- 0x84, 0x31, 0x02, 0x61,
- 0x82, 0x51, 0x08, 0x41,
- 0xec, 0xb5, 0xcf, 0x6d,
- 0x06, 0xb4, 0xeb, 0xa5,
- 0xc3, 0x3d, 0xfa, 0x80,
- 0x01, 0x01, 0xd0, 0x55,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x00, 0x19, 0x94, 0x15,
- 0xc0, 0x38, 0x64, 0xd1,
- 0x92, 0x75, 0xa1, 0x1b,
- 0x61, 0x41, 0x00, 0x19,
- 0x81, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x89, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x11, 0x00, 0x19,
- 0x07, 0x95, 0xc0, 0x15,
- 0xfa, 0x80, 0x04, 0x24,
- 0x70, 0xb0, 0x4a, 0x02,
- 0xe6, 0x86, 0x58, 0xca,
- 0x67, 0x41, 0x0a, 0x50,
- 0x81, 0x61, 0x40, 0x57,
- 0x98, 0x83, 0x85, 0x85,
- 0xf0, 0xa0, 0x4e, 0x02,
- 0x6e, 0x41, 0x0e, 0x99,
- 0xab, 0x9b, 0xc0, 0x1a,
- 0xc2, 0x87, 0x86, 0xf5,
- 0x10, 0x83, 0x80, 0x83,
- 0xc0, 0x0c, 0x6d, 0x21,
- 0xe1, 0xf4, 0x12, 0x84,
- 0x00, 0x93, 0x86, 0x99,
- 0x40, 0x1c, 0x62, 0x6d,
- 0x10, 0x84, 0x92, 0x83,
- 0x85, 0x87, 0xfb, 0x00,
- 0x82, 0xd5, 0x92, 0x8d,
- 0x6a, 0x41, 0x0e, 0x89,
- 0x00, 0x99, 0xc0, 0x1a,
- 0xc0, 0x38, 0x64, 0xd5,
- 0xd2, 0x8d, 0xc3, 0x87,
- 0x06, 0x41, 0x0e, 0x70,
- 0x4e, 0x41, 0x80, 0x6b,
- 0x82, 0x61, 0x80, 0x00,
- 0x10, 0x64, 0x14, 0x78,
- 0xcf, 0x8d, 0xfa, 0x80,
- 0x82, 0x31, 0xf4, 0xb5,
- 0xfa, 0x80, 0x18, 0x34,
- 0xf0, 0xf5, 0xc5, 0xcd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0xfb, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x81, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x62, 0x11, 0x00, 0x29,
- 0x09, 0xf5, 0xc0, 0x15,
- 0xfa, 0x80, 0x02, 0x14,
- 0x66, 0x8a, 0x4a, 0x7a,
- 0x66, 0x40, 0x0c, 0x00,
- 0x58, 0x62, 0xc0, 0x58,
- 0x18, 0xc9, 0xf0, 0x94,
- 0xc0, 0x04, 0x6c, 0x01,
- 0x18, 0x06, 0x2b, 0xcb,
- 0x86, 0x75, 0xe0, 0x80,
- 0x0e, 0x79, 0x80, 0x73,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x84, 0xa5, 0xa1, 0x7b,
- 0xe0, 0x84, 0x18, 0x54,
- 0x81, 0xc1, 0x18, 0x63,
- 0x6c, 0x01, 0x0c, 0x63,
- 0x87, 0x6d, 0xc0, 0x01,
- 0x0c, 0xc4, 0x80, 0xc5,
- 0x8c, 0xc3, 0xe1, 0xfc,
- 0x83, 0xc7, 0x01, 0xf5,
- 0x60, 0x0d, 0x0d, 0x0a,
- 0x59, 0xf6, 0x40, 0x20,
- 0x82, 0xc5, 0xe0, 0x7c,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xf9, 0x67,
- 0x18, 0xc0, 0x89, 0xc7,
- 0x00, 0x53, 0xe5, 0xc8,
- 0x4a, 0xc1, 0x82, 0x41,
- 0xc0, 0x1a, 0x62, 0x41,
- 0x18, 0x64, 0x83, 0x85,
- 0x0d, 0x0a, 0x61, 0xf4,
- 0xc0, 0x03, 0x60, 0x7c,
- 0x8c, 0xc3, 0x86, 0xc9,
- 0xfb, 0x00, 0x18, 0xc4,
- 0x85, 0xc7, 0x76, 0xe5,
- 0x61, 0x7d, 0x0d, 0x0a,
- 0xf8, 0xb5, 0xc0, 0x09,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xfb, 0x67,
- 0x7d, 0x65, 0x87, 0xc7,
- 0xe5, 0x30, 0x18, 0xc0,
- 0xfa, 0x80, 0x0e, 0x44,
- 0xec, 0x35, 0xc3, 0x7d,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x51, 0x06, 0x00, 0x6b,
- 0x20, 0x6e, 0xe1, 0x98,
- 0x67, 0x01, 0x12, 0x60,
- 0x03, 0x15, 0xc0, 0x94,
- 0x0c, 0x0b, 0x81, 0x71,
- 0xc0, 0x16, 0x66, 0x35,
- 0x60, 0x80, 0x40, 0x4a,
- 0xe0, 0x10, 0x00, 0x06,
- 0x5c, 0x00, 0x40, 0x60,
- 0xdc, 0x00, 0x42, 0x70,
- 0xcf, 0xdc, 0x42, 0xa8,
- 0x82, 0x71, 0x65, 0x0e,
- 0xe2, 0x30, 0x0e, 0x0a,
- 0x20, 0x14, 0xfa, 0xf5,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x81, 0x15, 0xf2, 0x9c,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x00, 0x06, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x64, 0x81, 0x0e, 0x60,
- 0x18, 0x60, 0x40, 0x99,
- 0xc0, 0x8b, 0x64, 0x61,
- 0x04, 0x60, 0x3e, 0x7e,
- 0xc0, 0xae, 0x66, 0xa1,
- 0x06, 0x60, 0x00, 0x04,
- 0xc0, 0x9f, 0x67, 0x61,
- 0x65, 0x21, 0x08, 0x60,
- 0x0a, 0x60, 0x40, 0xa2,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x62, 0x18, 0xbc, 0xce,
- 0xa1, 0x0b, 0xef, 0xc8,
- 0x0e, 0x06, 0x02, 0xa5,
- 0x0c, 0x29, 0x80, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x0e, 0x56,
- 0x60, 0x0c, 0x02, 0x56,
- 0x52, 0x18, 0x8c, 0x0b,
- 0x0e, 0x0b, 0xef, 0xdc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xf0, 0x59, 0x28,
- 0x81, 0x71, 0x81, 0x11,
- 0x60, 0x04, 0x47, 0xc6,
- 0x10, 0x05, 0x80, 0x6b,
- 0x40, 0x09, 0x6e, 0x0d,
- 0x65, 0x61, 0x04, 0x80,
- 0x10, 0x15, 0xc0, 0xad,
- 0xc0, 0x0a, 0x6d, 0x49,
- 0x6c, 0x1d, 0x50, 0x31,
- 0x5c, 0x58, 0xc0, 0x2b,
- 0x80, 0x9b, 0xef, 0xc4,
- 0x82, 0xc5, 0xa1, 0x9b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x90, 0x0b, 0x40, 0x2b,
- 0x6f, 0xdc, 0x4f, 0x28,
- 0x03, 0x11, 0x92, 0x1b,
- 0x57, 0x18, 0x8c, 0x0b,
- 0x15, 0x75, 0xef, 0xf0,
- 0x7c, 0x6e, 0x92, 0x7b,
- 0xe1, 0x04, 0x01, 0x46,
- 0x6d, 0x59, 0x10, 0x15,
- 0x80, 0x04, 0xc0, 0x0a,
- 0x10, 0x05, 0x80, 0x1e,
- 0xc0, 0x0a, 0x6d, 0x59,
- 0x6e, 0x0d, 0x10, 0x15,
- 0x5b, 0xf8, 0xc0, 0x09,
- 0x00, 0x00, 0xef, 0xc4,
- 0xc0, 0x80, 0x64, 0x01,
- 0xe1, 0xc0, 0x12, 0x04,
- 0x6f, 0xcc, 0x64, 0x88,
- 0x10, 0x0b, 0x92, 0x0b,
- 0x6b, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x65, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x68, 0x98, 0x92, 0x1b,
- 0x01, 0x46, 0xef, 0xcc,
- 0x02, 0x86, 0x61, 0x18,
- 0x80, 0x04, 0xe1, 0x18,
- 0x84, 0x24, 0x80, 0x08,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x04, 0x03, 0x86,
- 0x10, 0x2b, 0x80, 0x08,
- 0xc0, 0x16, 0x67, 0x39,
- 0x50, 0x01, 0x84, 0x14,
- 0x40, 0x2b, 0x65, 0x7d,
- 0xe1, 0x04, 0x01, 0xc6,
- 0x83, 0x21, 0x04, 0x2c,
- 0x67, 0x3d, 0x10, 0x1b,
- 0x80, 0x04, 0xc0, 0x16,
- 0x41, 0xc6, 0x00, 0x1c,
- 0x80, 0x04, 0xe1, 0x00,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x04,
- 0xd0, 0x19, 0x80, 0x18,
- 0x90, 0x0b, 0x00, 0x16,
- 0x60, 0xcd, 0x10, 0x15,
- 0x63, 0xf8, 0xc0, 0x0e,
- 0x10, 0x09, 0xe8, 0x20,
- 0x40, 0x38, 0x63, 0x15,
- 0xe1, 0x04, 0x14, 0x06,
- 0xa5, 0x0b, 0x83, 0x21,
- 0x0e, 0x91, 0x10, 0x19,
- 0x41, 0x06, 0x40, 0x2c,
- 0x00, 0x05, 0xc1, 0x10,
- 0x40, 0x11, 0xc0, 0x00,
- 0x89, 0x11, 0x40, 0x00,
- 0x00, 0x16, 0xa8, 0x04,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd1,
- 0xe8, 0x20, 0x62, 0x68,
- 0x8f, 0x61, 0x28, 0x04,
- 0x00, 0x66, 0x83, 0x21,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd5,
- 0xe8, 0x20, 0x61, 0xc8,
- 0x16, 0x76, 0x28, 0x04,
- 0x00, 0xb6, 0xe0, 0x04,
- 0x4c, 0x58, 0x90, 0x0b,
- 0x50, 0x75, 0xe8, 0x00,
- 0x40, 0x0e, 0x60, 0xed,
- 0x50, 0x75, 0xa1, 0x0b,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0x60, 0xf1, 0x50, 0x75,
- 0x88, 0x85, 0xc0, 0x0e,
- 0x03, 0x46, 0xfc, 0x64,
- 0x01, 0x86, 0xe1, 0x18,
- 0x83, 0xa1, 0x61, 0x18,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x08, 0x84, 0x04,
- 0x40, 0x9a, 0x82, 0x01,
- 0x50, 0x03, 0xe0, 0x02,
- 0xc0, 0x15, 0x6e, 0x01,
- 0xef, 0xe0, 0x4d, 0x68,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0xa6, 0x80, 0x04,
- 0xe8, 0x20, 0x66, 0x08,
- 0xef, 0xcc, 0x4f, 0x08,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xf0, 0x4c, 0xa8,
- 0x98, 0xf1, 0x0e, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x10, 0x15, 0xdd, 0x93,
- 0xc0, 0x0e, 0x60, 0xe5,
- 0x60, 0xdd, 0x10, 0x05,
- 0x82, 0x11, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x15,
- 0xa1, 0x0b, 0x40, 0x0e,
- 0x50, 0x15, 0x83, 0x11,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x60, 0xf1, 0x50, 0x15,
- 0x96, 0x85, 0xc0, 0x0e,
- 0x83, 0x91, 0x3e, 0x9e,
- 0xa8, 0x04, 0x89, 0x05,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x83, 0x21, 0x00, 0x26,
- 0x60, 0xd1, 0x10, 0x15,
- 0x90, 0x0b, 0x40, 0x0e,
- 0xe8, 0x20, 0x5b, 0x48,
- 0x83, 0x21, 0x28, 0x04,
- 0x90, 0x0b, 0x00, 0x66,
- 0x60, 0xd5, 0x10, 0x15,
- 0x5a, 0xb8, 0xc0, 0x0e,
- 0xa8, 0x04, 0xe8, 0x20,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xe8, 0x00, 0x45, 0x68,
- 0x90, 0x15, 0xa1, 0x0b,
- 0x60, 0xe5, 0x10, 0x05,
- 0x82, 0x91, 0x40, 0x0e,
- 0x60, 0xed, 0x10, 0x15,
- 0x82, 0x01, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x05,
- 0x82, 0x11, 0x40, 0x0e,
- 0x60, 0xdd, 0x10, 0x05,
- 0x50, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x89, 0x21, 0x02, 0x01,
- 0xee, 0xd5, 0xc1, 0x9d,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0x36, 0x40, 0x2b,
- 0x7e, 0x18, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xd8,
- 0xe0, 0x08, 0x0e, 0x36,
- 0x83, 0x11, 0x00, 0xab,
- 0x45, 0xd8, 0xfc, 0x04,
- 0x21, 0xab, 0xef, 0xf0,
- 0x3e, 0x94, 0x80, 0x6b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x10, 0x29, 0xef, 0x15,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x02, 0x36,
- 0x6f, 0xd8, 0x7c, 0xc8,
- 0x0e, 0x36, 0x90, 0x0b,
- 0x00, 0xab, 0xe0, 0x08,
- 0xfc, 0x04, 0x83, 0x11,
- 0xef, 0xf0, 0x44, 0x88,
- 0x80, 0x6b, 0x21, 0xab,
- 0x0e, 0x06, 0x6b, 0xf5,
- 0x10, 0x05, 0x80, 0x00,
- 0x40, 0x0e, 0x61, 0x05,
- 0xe1, 0x18, 0x03, 0x46,
- 0x60, 0xe1, 0x50, 0x95,
- 0x50, 0x95, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0xd3, 0x0d, 0x7c, 0x64,
- 0x01, 0x05, 0x50, 0x95,
- 0xbe, 0x94, 0xc0, 0x0e,
- 0xc1, 0xc3, 0xe9, 0xd5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x60, 0xd9, 0x00, 0x15,
- 0x81, 0x21, 0x40, 0x0e,
- 0x68, 0x20, 0x54, 0xa8,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x00, 0xc5, 0xe0, 0x90,
- 0x80, 0x00, 0x0c, 0x16,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x8c, 0x0b, 0xfc, 0xe5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xf0, 0x40, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x01, 0x86, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x12, 0x86, 0x40, 0x2b,
- 0x80, 0x86, 0xe1, 0x3c,
- 0x6e, 0x0d, 0x0c, 0x05,
- 0xa4, 0x14, 0xc0, 0x09,
- 0x82, 0x01, 0xd9, 0x07,
- 0x6e, 0x01, 0x4c, 0x03,
- 0x84, 0x08, 0xc0, 0x15,
- 0xf3, 0x7c, 0x40, 0x00,
- 0x00, 0x06, 0x04, 0x06,
- 0x80, 0x14, 0xe1, 0x04,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x80, 0x14,
- 0xf2, 0xfc, 0x44, 0x20,
- 0x80, 0x14, 0x84, 0x26,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xf4,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x00,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x04, 0x00, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x7d, 0xb8, 0x80, 0x16,
- 0xa4, 0x04, 0xef, 0xdc,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x94,
- 0xef, 0xc8, 0x7e, 0x68,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xec, 0x7c, 0x08,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0x86, 0x80, 0x04,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x43, 0x26, 0x00, 0x6b,
- 0x0c, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x0c, 0x09, 0xe0, 0x84,
- 0xc0, 0x2b, 0x05, 0xa9,
- 0x43, 0x06, 0x8c, 0x95,
- 0x84, 0x18, 0xef, 0xdc,
- 0x80, 0xb5, 0xa3, 0x1b,
- 0x66, 0xe9, 0x0c, 0x09,
- 0x85, 0xb5, 0xc0, 0x26,
- 0xf7, 0x00, 0x00, 0x8a,
- 0x0c, 0x19, 0x80, 0xd5,
- 0xc0, 0x26, 0x66, 0xed,
- 0xfc, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0c, 0x19, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x82, 0x0d, 0xff, 0x11,
- 0x0c, 0x19, 0x82, 0x15,
- 0xc0, 0x26, 0x66, 0xed,
- 0x04, 0x65, 0xa1, 0x1b,
- 0x80, 0x00, 0x40, 0x46,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x09,
- 0x02, 0x60, 0x00, 0x2b,
- 0x80, 0xad, 0x05, 0xb1,
- 0x04, 0x41, 0x02, 0x60,
- 0x84, 0x18, 0xc0, 0x9e,
- 0x08, 0x45, 0x0c, 0x09,
- 0x82, 0x03, 0xc0, 0x27,
- 0xe1, 0x00, 0x42, 0x86,
- 0x84, 0x06, 0x84, 0x14,
- 0xa1, 0x0b, 0x84, 0x08,
- 0x84, 0x08, 0x80, 0xa5,
- 0xe5, 0x04, 0x00, 0x8a,
- 0x40, 0x46, 0x80, 0x95,
- 0x84, 0x06, 0xe0, 0x00,
- 0x61, 0x00, 0x4e, 0x46,
- 0x9c, 0x04, 0x83, 0x21,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x9c, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0x47, 0x98, 0x87, 0x11,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x83, 0x21, 0x1c, 0x04,
- 0xc4, 0x19, 0x80, 0x18,
- 0x99, 0x11, 0x00, 0x16,
- 0x68, 0x20, 0x47, 0x08,
- 0x9c, 0x04, 0x8c, 0x0b,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x4c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x41, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x46, 0x00, 0x7b,
- 0x45, 0x98, 0xe0, 0x04,
- 0x81, 0x21, 0x68, 0x20,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0x25, 0xe0, 0x98,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x0e, 0x29, 0xfe, 0x25,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0c, 0x86,
- 0x60, 0x08, 0x02, 0x86,
- 0x69, 0x98, 0x8e, 0x0b,
- 0xa3, 0x0b, 0xef, 0xd8,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xe8, 0x20, 0x4a, 0x88,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x01, 0x61,
- 0x57, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x88,
- 0xe1, 0x44, 0x41, 0xc6,
- 0x80, 0x66, 0x80, 0x04,
- 0xef, 0xdc, 0x6e, 0xa8,
- 0xef, 0xdc, 0x71, 0x48,
- 0xef, 0xdc, 0x73, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x56, 0xd8, 0x83, 0x11,
- 0x0c, 0x0c, 0xef, 0x88,
- 0x33, 0x58, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xc8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xc6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6d, 0x49, 0x0c, 0x05,
- 0x4c, 0x05, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x85,
- 0x66, 0x85, 0x0c, 0x05,
- 0x77, 0x78, 0xc0, 0x0b,
- 0x00, 0x04, 0xef, 0xc0,
- 0x4c, 0x05, 0xfb, 0x80,
- 0xc0, 0x0b, 0x66, 0x89,
- 0x65, 0x39, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x65, 0x3d, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x39,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xd6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x05, 0x91, 0x11,
- 0xc0, 0x08, 0x69, 0x59,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2b, 0x65, 0xcd,
- 0xef, 0xc0, 0x72, 0xa8,
- 0x6a, 0x05, 0x4c, 0x01,
- 0x0c, 0x05, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x63, 0x7d,
- 0x66, 0x7d, 0x4c, 0x05,
- 0x0c, 0x0c, 0xc0, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xc4, 0x17, 0x00, 0x6b,
- 0x60, 0x08, 0x40, 0xe6,
- 0x4c, 0x01, 0x8c, 0x13,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x05, 0x84, 0x7b,
- 0xc0, 0x06, 0x6d, 0x61,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6e, 0x31,
- 0x6d, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0x40, 0x2c,
- 0x40, 0x4a, 0x84, 0x15,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x00, 0xad, 0x05, 0x4d,
- 0x05, 0xa1, 0x02, 0x60,
- 0x00, 0x60, 0x80, 0xb3,
- 0x40, 0xad, 0x05, 0x49,
- 0x05, 0x91, 0x02, 0x60,
- 0x81, 0xc5, 0xc0, 0xb3,
- 0x60, 0x8c, 0x40, 0x4a,
- 0x65, 0xc0, 0x02, 0x60,
- 0x00, 0x60, 0xc0, 0xb3,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x08, 0xc0, 0xad,
- 0x91, 0x11, 0x04, 0x84,
- 0xef, 0xc0, 0x6e, 0x68,
- 0x6a, 0x05, 0x4c, 0x01,
- 0xa3, 0x7b, 0x40, 0x2d,
- 0x03, 0x89, 0x0c, 0x85,
- 0x4c, 0x85, 0x80, 0x0b,
- 0xc0, 0x0b, 0x66, 0x7d,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x48, 0xf6,
- 0x40, 0x41, 0x82, 0x31,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x66, 0x71, 0x00, 0x45,
- 0xa1, 0x4b, 0xc0, 0x0b,
- 0x06, 0x71, 0x00, 0x45,
- 0x46, 0x3a, 0xc0, 0x0b,
- 0x40, 0x35, 0xc0, 0x12,
- 0xc0, 0x0b, 0x66, 0x69,
- 0x66, 0x69, 0x00, 0x35,
- 0x00, 0x45, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x6d,
- 0xe1, 0x92, 0x46, 0x3a,
- 0x66, 0x69, 0x40, 0x35,
- 0x40, 0x21, 0xc0, 0x0b,
- 0xc0, 0x2d, 0x69, 0xd1,
- 0x69, 0xd5, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2d,
- 0x60, 0x08, 0x43, 0x06,
- 0x40, 0x11, 0x89, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x71, 0x40, 0x21,
- 0x00, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x40, 0x15, 0xd6, 0x17,
- 0xc0, 0x0b, 0x66, 0x91,
- 0x6d, 0x51, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x95,
- 0x69, 0xd1, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x2d,
- 0x03, 0x11, 0x84, 0xd5,
- 0x40, 0x11, 0x81, 0x21,
- 0xc0, 0x2d, 0x6a, 0x75,
- 0x65, 0xf5, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x99,
- 0x65, 0xf9, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0xa1,
- 0x66, 0xb1, 0x40, 0x25,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0x68, 0x15, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x2d,
- 0x6a, 0x75, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x65, 0xfd,
- 0x66, 0x99, 0x40, 0x15,
- 0x02, 0x00, 0x40, 0x0b,
- 0xc0, 0xb6, 0x66, 0xc1,
- 0x68, 0x15, 0x00, 0x39,
- 0x87, 0x2d, 0xc0, 0x2d,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x78, 0xa8, 0x02, 0x35,
- 0x02, 0x45, 0x82, 0x21,
- 0x00, 0x55, 0xf8, 0x98,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x42, 0x45, 0x86, 0x43,
- 0x02, 0x35, 0xf8, 0x10,
- 0xc2, 0x37, 0xf8, 0x10,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x66, 0x69,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x42, 0x35, 0xc3, 0x37,
- 0x02, 0x35, 0xf8, 0x10,
- 0x02, 0x45, 0xf8, 0x88,
- 0x00, 0x55, 0xf8, 0x78,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x84, 0x4e, 0x86, 0x43,
- 0xc2, 0x37, 0x84, 0x34,
- 0x84, 0x34, 0x84, 0x3e,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x65, 0x51,
- 0xe0, 0x92, 0x46, 0x3a,
- 0x84, 0x34, 0x84, 0x3e,
- 0xc5, 0x3e, 0x83, 0x37,
- 0xc1, 0xc3, 0xf7, 0x85,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x69, 0x45,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x22, 0x65, 0x49,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x1b, 0x65, 0x69,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x28, 0x02, 0x25,
- 0xe0, 0x2c, 0x02, 0x15,
- 0x69, 0x5d, 0x40, 0x25,
- 0x45, 0xf6, 0x40, 0x08,
- 0x40, 0x15, 0xe0, 0x2c,
- 0xc0, 0x08, 0x69, 0x61,
- 0x62, 0xc9, 0x40, 0x23,
- 0xdd, 0x93, 0xc0, 0x11,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x80, 0x8b, 0x04, 0x6b,
- 0x60, 0x88, 0x00, 0x64,
- 0x52, 0x82, 0x82, 0x7b,
- 0x43, 0x36, 0x70, 0x80,
- 0x50, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0x81, 0x00, 0x90,
- 0x02, 0x70, 0xc0, 0x6d,
- 0x89, 0x21, 0x64, 0xa0,
- 0x68, 0x10, 0x64, 0x88,
- 0x00, 0x90, 0x81, 0x31,
- 0x40, 0x6d, 0x67, 0x81,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x81, 0x31, 0x09, 0x21,
- 0xe8, 0x10, 0x63, 0xe8,
- 0x60, 0x18, 0x41, 0x06,
- 0xe4, 0xc0, 0x02, 0x70,
- 0x66, 0x82, 0x40, 0x6a,
- 0xe0, 0x24, 0x04, 0x06,
- 0x80, 0x83, 0x85, 0x31,
- 0x65, 0x01, 0x00, 0x80,
- 0x0c, 0x0c, 0xc0, 0x6e,
- 0x22, 0xd8, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6c, 0xfd, 0x0e, 0x39,
- 0x43, 0xf6, 0x40, 0x2c,
- 0x6e, 0xb8, 0xe0, 0x0c,
- 0x85, 0x21, 0x6f, 0xfc,
- 0x6f, 0xfc, 0x70, 0xc8,
- 0x67, 0xf8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xa6,
- 0x65, 0xe0, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x70, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x60,
- 0x62, 0x18, 0x8c, 0x3b,
- 0x00, 0x8b, 0xef, 0x94,
- 0xe0, 0x08, 0x41, 0x26,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x00, 0x70, 0x40, 0x2b,
- 0xc0, 0x89, 0x65, 0xa1,
- 0x64, 0xc0, 0x02, 0x60,
- 0xe0, 0x24, 0x04, 0x06,
- 0x68, 0x10, 0x5f, 0x88,
- 0x90, 0x0b, 0x85, 0x31,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x86, 0x6b, 0x00, 0x8b,
- 0x70, 0x88, 0x52, 0x82,
- 0x12, 0x19, 0x82, 0x7b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x39, 0x83, 0x21,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xef, 0xfc, 0x6a, 0xc8,
- 0x6f, 0xfc, 0x6c, 0xe8,
- 0x12, 0x19, 0x90, 0x0b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x65, 0xd8, 0x90, 0x0b,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xb6,
- 0x65, 0xe0, 0x02, 0x80,
- 0x50, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x80, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x70,
- 0x5d, 0xf8, 0x8e, 0x3b,
- 0x12, 0x29, 0xef, 0x94,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x0b, 0x80, 0x6b,
- 0x76, 0x18, 0x8e, 0x1b,
- 0x8c, 0x0b, 0xef, 0xfc,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x03, 0x06,
- 0x05, 0x46, 0x00, 0x04,
- 0x07, 0x86, 0xe1, 0x30,
- 0x09, 0xc6, 0x61, 0x30,
- 0x4a, 0x06, 0xe1, 0x30,
- 0x58, 0x46, 0x61, 0x30,
- 0x80, 0x04, 0xe1, 0x30,
- 0x84, 0x14, 0x84, 0x14,
- 0x00, 0x13, 0x88, 0x24,
- 0xe1, 0x30, 0x40, 0x86,
- 0x8c, 0x34, 0x88, 0x24,
- 0x8c, 0x34, 0x84, 0x13,
- 0x86, 0x13, 0x90, 0x44,
- 0x94, 0x54, 0x90, 0x44,
- 0x94, 0x54, 0x88, 0x13,
- 0x8a, 0x13, 0xb0, 0xc4,
- 0x80, 0x04, 0xb0, 0xc4,
- 0x80, 0x04, 0x98, 0x13,
- 0x82, 0x03, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe1, 0x24, 0x45, 0x46,
- 0x6e, 0x09, 0x0c, 0x15,
- 0x80, 0x08, 0xc0, 0x09,
- 0xc5, 0x07, 0x88, 0x24,
- 0x44, 0x00, 0x08, 0x34,
- 0x4d, 0xb8, 0xf0, 0x0c,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2c,
- 0x64, 0xb5, 0x4c, 0x05,
- 0x4c, 0x21, 0xc0, 0x05,
- 0xc0, 0x15, 0x62, 0xe1,
- 0x62, 0xe9, 0x4c, 0x21,
- 0x4c, 0x11, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x5d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x7d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x08, 0x69, 0x45,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4e, 0x68,
- 0x65, 0x49, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4c, 0xe8,
- 0x6d, 0x01, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x5d, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x1b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0xc6, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x34,
- 0x80, 0x04, 0x8b, 0x31,
- 0x65, 0x49, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x22,
- 0xc0, 0x22, 0x65, 0x59,
- 0x69, 0x5d, 0x4c, 0x05,
- 0x59, 0xf8, 0xc0, 0x08,
- 0x4c, 0x05, 0xef, 0xc0,
- 0x40, 0x08, 0x69, 0x61,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x65, 0x91, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x68, 0x20, 0x6d, 0xc8,
- 0x42, 0x78, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x81, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x6d,
- 0xc0, 0x20, 0x63, 0x41,
- 0x60, 0x04, 0x04, 0x06,
- 0x4f, 0x18, 0x81, 0x31,
- 0x0e, 0x60, 0xe8, 0x10,
- 0x40, 0x6d, 0x67, 0x81,
- 0x81, 0xf5, 0xa1, 0x81,
- 0x78, 0x40, 0x0e, 0x05,
- 0x0c, 0x29, 0x8b, 0x31,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x79, 0x0c, 0x19,
- 0x57, 0x18, 0xc0, 0x1b,
- 0x5d, 0x0e, 0xef, 0xc0,
- 0xec, 0x04, 0x10, 0x80,
- 0xfc, 0x35, 0xa1, 0x8b,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x45, 0xb8, 0xe0, 0x04,
- 0x0e, 0x60, 0xe8, 0x20,
- 0x40, 0x6e, 0x64, 0x81,
- 0x01, 0x95, 0xa1, 0x81,
- 0x5d, 0x18, 0x8c, 0x9b,
- 0x5e, 0x78, 0x8c, 0x0b,
- 0x65, 0x0e, 0xef, 0xd4,
- 0xec, 0x04, 0x10, 0x80,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x65, 0x81, 0x00, 0x60,
- 0x04, 0x06, 0x40, 0x6d,
- 0x01, 0x31, 0xe0, 0x04,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x0b, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0xa1, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x89,
- 0xc0, 0x20, 0x63, 0x1d,
- 0x60, 0x24, 0x04, 0x06,
- 0x0a, 0xb8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0x01, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x6e,
- 0xc0, 0x20, 0x61, 0x01,
- 0x62, 0x40, 0x04, 0x06,
- 0x09, 0xf8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0x6d, 0x91, 0x1e, 0xf0,
- 0x00, 0x6b, 0xc0, 0x04,
- 0xe1, 0x30, 0x41, 0x46,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x42, 0xc6, 0x40, 0x22,
- 0x0c, 0x39, 0xe1, 0x30,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x4c, 0x41, 0x85, 0x41,
- 0x40, 0x22, 0x6c, 0x69,
- 0x00, 0x04, 0x81, 0x71,
- 0x4c, 0x21, 0x82, 0x21,
- 0x40, 0x22, 0x6c, 0x6d,
- 0x4c, 0x31, 0x82, 0x31,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x64, 0xd1, 0x04, 0xf0,
- 0x04, 0x14, 0xc0, 0x02,
- 0xe4, 0x10, 0x06, 0xf0,
- 0x95, 0x51, 0x1d, 0x41,
- 0x81, 0x81, 0x01, 0xc1,
- 0x12, 0xc4, 0x83, 0x65,
- 0x82, 0xc1, 0x7a, 0x80,
- 0xe1, 0x12, 0x52, 0x9a,
- 0x66, 0x96, 0x54, 0x9a,
- 0x12, 0x0c, 0xbb, 0x9b,
- 0x10, 0xa3, 0xe2, 0x00,
- 0x14, 0xa4, 0x92, 0x83,
- 0xc4, 0xa7, 0xfa, 0x80,
- 0xfc, 0x28, 0x00, 0xb5,
- 0x02, 0xa5, 0xc9, 0xbe,
- 0xcd, 0xae, 0xfc, 0x28,
- 0xe2, 0x30, 0x18, 0x0a,
- 0x00, 0x60, 0xfa, 0x35,
- 0x40, 0x90, 0x65, 0x81,
- 0x64, 0xd1, 0x02, 0xf0,
- 0x45, 0x06, 0xc0, 0x02,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x45, 0x28,
- 0x66, 0x41, 0x00, 0x60,
- 0x02, 0xf0, 0x40, 0x92,
- 0x45, 0x06, 0xe4, 0x10,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x44, 0x88,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x02, 0x46,
- 0x04, 0xc6, 0x00, 0x04,
- 0x04, 0x14, 0xe1, 0x38,
- 0x66, 0x31, 0x06, 0x60,
- 0x08, 0x24, 0xc0, 0x8b,
- 0x83, 0x65, 0x81, 0x41,
- 0x70, 0x0c, 0x4a, 0x40,
- 0x18, 0x54, 0x82, 0x41,
- 0xa7, 0x5b, 0x60, 0x84,
- 0x62, 0x00, 0x0a, 0x0c,
- 0x18, 0xc4, 0x8e, 0xc3,
- 0x8a, 0x73, 0x7a, 0x80,
- 0xc4, 0xc7, 0x08, 0xce,
- 0xfc, 0x30, 0x00, 0x65,
- 0xf8, 0x20, 0x46, 0x65,
- 0xfc, 0x30, 0x02, 0xc5,
- 0xb1, 0x4b, 0xcd, 0xce,
- 0x1e, 0xf0, 0xfa, 0x55,
- 0xc0, 0x04, 0x65, 0x91,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6c, 0xad, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6f, 0xfd, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0xf5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xe8, 0x72, 0x88,
- 0x81, 0x61, 0x81, 0x11,
- 0x00, 0x06, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x10,
- 0xe0, 0x04, 0x43, 0x16,
- 0x6c, 0x1d, 0x50, 0x11,
- 0x83, 0x91, 0x40, 0x2b,
- 0x00, 0x46, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x7c, 0x98, 0x80, 0x16,
- 0x7c, 0xf8, 0xef, 0xf8,
- 0x90, 0x0b, 0x6f, 0xf8,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x0c, 0x86, 0x40, 0x2b,
- 0x02, 0x86, 0xe0, 0x08,
- 0x90, 0x0b, 0x60, 0x08,
- 0xef, 0xd4, 0x67, 0xa8,
- 0x0b, 0x45, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xef, 0xd8, 0x6e, 0x88,
- 0x6f, 0xf8, 0x74, 0x08,
- 0x45, 0x58, 0x90, 0x0b,
- 0x90, 0x0b, 0x68, 0x00,
- 0x61, 0x14, 0x41, 0x06,
- 0xe0, 0x04, 0x45, 0x66,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe1, 0x04, 0x40, 0x86,
- 0x43, 0x56, 0x00, 0x04,
- 0x00, 0x96, 0xe0, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x50, 0x11, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x18,
- 0x01, 0x06, 0x00, 0x96,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x5d,
- 0x50, 0x21, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x40, 0x86,
- 0x6e, 0x61, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x40, 0x46, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x08,
- 0xc0, 0x2c, 0x6e, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x44, 0x41, 0x86,
- 0x6e, 0x59, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x41, 0x76, 0x00, 0x16,
- 0x50, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xfc, 0x41, 0xf6,
- 0x68, 0x00, 0x49, 0x08,
- 0x03, 0x11, 0x81, 0x11,
- 0x6a, 0x58, 0x8e, 0x0b,
- 0x8c, 0x0b, 0xef, 0xe8,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x81, 0x00, 0x29,
- 0x03, 0x46, 0x40, 0x2c,
- 0x84, 0x14, 0xe1, 0x10,
- 0x03, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x42, 0xc6,
- 0x6e, 0x89, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x42, 0x06, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x05, 0xc6,
- 0x6b, 0xad, 0x00, 0x19,
- 0x88, 0x24, 0xc0, 0x2b,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x43, 0xc6, 0x08, 0x16,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0xa1,
- 0x84, 0x26, 0x84, 0x14,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x0e, 0xa5, 0x00, 0x29,
- 0x02, 0x46, 0x40, 0x2c,
- 0x02, 0x15, 0xc1, 0x14,
- 0x04, 0x16, 0xc0, 0x00,
- 0x43, 0x06, 0x80, 0x00,
- 0x02, 0x15, 0x81, 0x10,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x14, 0x02, 0x06,
- 0x6e, 0x55, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x02, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x14,
- 0xc0, 0x2c, 0x6e, 0x8d,
- 0x84, 0x26, 0x84, 0x14,
- 0x6e, 0xa9, 0x00, 0x19,
- 0x21, 0x1b, 0xc0, 0x2c,
- 0xe1, 0x10, 0x43, 0x86,
- 0x84, 0x25, 0x84, 0x24,
- 0x08, 0x16, 0x81, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x03, 0x06, 0x84, 0xe5,
- 0x83, 0x21, 0x61, 0x10,
- 0x83, 0x75, 0x84, 0x14,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x41, 0x10, 0x03, 0x06,
- 0xc0, 0x00, 0x04, 0x06,
- 0xc0, 0x00, 0x02, 0x15,
- 0x05, 0x06, 0x80, 0xd5,
- 0x88, 0x24, 0xe1, 0x14,
- 0x81, 0x25, 0x88, 0x16,
- 0x00, 0x09, 0x84, 0x26,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xe1, 0x10, 0x02, 0x46,
- 0x84, 0x06, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x1c, 0x04, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x14, 0x43, 0x86,
- 0x84, 0x0c, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x14, 0xe1, 0x18,
- 0xe0, 0x08, 0x04, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x21,
- 0x81, 0x21, 0x40, 0x2b,
- 0x11, 0xc6, 0x03, 0x71,
- 0x04, 0x26, 0xe1, 0x24,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x04, 0x26, 0x84, 0x14,
- 0x80, 0x04, 0x85, 0x11,
- 0xa0, 0x04, 0x80, 0x76,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x18, 0x52, 0x48,
- 0x02, 0x76, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x80, 0x76,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x04, 0x3b,
- 0x86, 0x1b, 0x01, 0x21,
- 0x68, 0x18, 0x6c, 0x48,
- 0x00, 0x06, 0x81, 0x61,
- 0x43, 0x46, 0x61, 0x28,
- 0x00, 0x04, 0xe1, 0x2c,
- 0xe1, 0x44, 0x04, 0xc6,
- 0x81, 0x31, 0x04, 0x14,
- 0x80, 0xc8, 0x88, 0x24,
- 0x84, 0x48, 0x84, 0x58,
- 0x50, 0x0a, 0x88, 0x88,
- 0x04, 0x05, 0xe0, 0x8c,
- 0x80, 0x08, 0x0d, 0x56,
- 0xc7, 0x57, 0x45, 0xc7,
- 0xc4, 0x47, 0x02, 0xc9,
- 0xa6, 0xcf, 0x04, 0x59,
- 0xaa, 0xcf, 0x08, 0x49,
- 0x46, 0xc2, 0xa8, 0xcf,
- 0x87, 0x7b, 0xf8, 0x1c,
- 0x70, 0xf8, 0xfa, 0x75,
- 0x8c, 0x0b, 0xe8, 0x18,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x02, 0x86, 0x02, 0x2b,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xf9, 0x95, 0x8f, 0x11,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x79, 0x98, 0x82, 0x6b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x00, 0x86,
- 0x4e, 0x01, 0x8f, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x2b, 0x8e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0x25,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x61, 0x38, 0x11, 0x46,
- 0x20, 0x04, 0x80, 0x6b,
- 0x70, 0x01, 0x02, 0x56,
- 0x0e, 0x86, 0xf7, 0xab,
- 0x12, 0x46, 0x61, 0x3c,
- 0x03, 0x21, 0xe1, 0x14,
- 0x80, 0x1e, 0x8b, 0xa1,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x89, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x66, 0x18, 0x8b, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x14, 0x16, 0xc6,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x0a,
- 0xa6, 0x05, 0x99, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa3, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0xa4, 0x65,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9b, 0x01, 0x60, 0x84,
- 0xa5, 0x1b, 0xa2, 0x65,
- 0x0b, 0x11, 0xa2, 0x25,
- 0x64, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x9e, 0x85, 0x9f, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa7, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x9c, 0xe5,
- 0x83, 0x21, 0x8b, 0x11,
- 0x8c, 0x0b, 0x00, 0xa6,
- 0xe8, 0x18, 0x63, 0x08,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x4a,
- 0x9a, 0x45, 0xa1, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa9, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x98, 0xa5,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x0a, 0x80, 0x08,
- 0xa3, 0x01, 0x60, 0x84,
- 0x2b, 0x1b, 0x96, 0xa5,
- 0xe1, 0x00, 0x15, 0xc6,
- 0x0b, 0x11, 0x96, 0x25,
- 0x61, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x92, 0x85, 0xa5, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xaf, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x90, 0xe5,
- 0x83, 0x21, 0x85, 0x11,
- 0x8b, 0x11, 0x00, 0x16,
- 0x68, 0x18, 0x60, 0x08,
- 0xac, 0x04, 0x8c, 0x0b,
- 0x40, 0x4a, 0x80, 0x08,
- 0xa7, 0x01, 0x60, 0x80,
- 0x0c, 0x15, 0x8e, 0x25,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x10, 0x44, 0x46,
- 0x8c, 0x45, 0xb1, 0x1b,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x84, 0x40, 0x0a,
- 0x8a, 0x85, 0xa9, 0x01,
- 0x8a, 0x45, 0xb3, 0x1b,
- 0x61, 0x00, 0x41, 0x06,
- 0x80, 0x04, 0x85, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9d, 0x01, 0x60, 0x90,
- 0x0c, 0x15, 0x86, 0xe5,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x86, 0x45, 0xad, 0x1b,
- 0x81, 0xb1, 0x24, 0x04,
- 0x83, 0x21, 0x0b, 0x11,
- 0xe1, 0x10, 0x54, 0x46,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x10,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xe8, 0x18, 0x5c, 0xc8,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x80, 0xc5, 0x97, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xb5, 0x1b, 0xc0, 0x0b,
- 0x20, 0x14, 0x82, 0x95,
- 0x70, 0x01, 0x04, 0x76,
- 0x06, 0x04, 0xf7, 0xab,
- 0x80, 0xbb, 0x7a, 0x80,
- 0x4c, 0x35, 0x84, 0x2e,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x61, 0x10, 0x41, 0x06,
- 0x00, 0x04, 0x83, 0x11,
- 0x00, 0x16, 0x83, 0x21,
- 0xe1, 0x00, 0x41, 0x06,
- 0x81, 0x11, 0x00, 0x04,
- 0x91, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x5a, 0x58, 0x8d, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x02, 0x66, 0x20, 0x04,
- 0xf7, 0xab, 0x70, 0x01,
- 0x9c, 0x04, 0x80, 0x1e,
- 0xc4, 0x19, 0x80, 0x18,
- 0x9c, 0x14, 0x80, 0x16,
- 0x44, 0x00, 0x84, 0x08,
- 0x00, 0xb4, 0x7c, 0x40,
- 0x84, 0x26, 0xfa, 0x80,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x61, 0x38, 0x53, 0x06,
- 0x24, 0x04, 0x80, 0x6b,
- 0xe0, 0x04, 0x02, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x54, 0xc6, 0x40, 0x2b,
- 0x51, 0x06, 0xe1, 0x38,
- 0x80, 0x18, 0xe1, 0x34,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x04, 0x02, 0x16,
- 0x4c, 0x11, 0xa0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x18, 0x7b, 0x68,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x0a, 0x82, 0x45,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x6d, 0x21, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0x25, 0xe0, 0x88,
- 0x61, 0x38, 0x00, 0x46,
- 0x80, 0x04, 0x89, 0x11,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf8, 0x1c, 0x00, 0x4a,
- 0x01, 0x75, 0x80, 0x95,
- 0xe9, 0x9c, 0x4e, 0x0a,
- 0x6d, 0x11, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0x20, 0x01, 0x02, 0x58,
- 0x40, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe9, 0x9c,
- 0x86, 0xc5, 0xe9, 0x9c,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x0c, 0x09, 0x88, 0x65,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x86, 0xd5, 0xa1, 0x0b,
- 0x02, 0x26, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x10, 0x16, 0x46,
- 0xa3, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x64, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xac, 0x14, 0x80, 0x7b,
- 0xa1, 0x7b, 0x84, 0x06,
- 0x00, 0x06, 0x80, 0xe5,
- 0x87, 0x11, 0x61, 0x38,
- 0x80, 0x1c, 0x80, 0x04,
- 0x40, 0x46, 0x9b, 0x95,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x04, 0x87, 0x11,
- 0x0c, 0x09, 0x80, 0x1c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8e, 0x75,
- 0xc0, 0x2c, 0x6d, 0x11,
- 0x28, 0xc5, 0xa1, 0x0b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x02, 0x66, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xa1, 0x21, 0xa1, 0xb1,
- 0x00, 0x60, 0x00, 0x16,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x41, 0x38, 0xe4, 0x10,
- 0xec, 0x04, 0x04, 0x20,
- 0xa1, 0x2b, 0xc5, 0x36,
- 0x65, 0x38, 0xfe, 0x75,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x43, 0x28,
- 0x00, 0x60, 0x00, 0x7b,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x45, 0x28, 0xe4, 0x10,
- 0xec, 0x04, 0x16, 0xb0,
- 0xa1, 0xbb, 0xc1, 0x26,
- 0x0c, 0x09, 0xfe, 0x75,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x9c, 0xd5, 0xa5, 0x0b,
- 0x68, 0x00, 0x74, 0x48,
- 0x0f, 0x25, 0x8c, 0x0b,
- 0x20, 0x04, 0x80, 0x7b,
- 0xe0, 0x04, 0x02, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x85, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x28,
- 0x80, 0x7b, 0x8c, 0x1b,
- 0x8c, 0x05, 0xa1, 0x7b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x14, 0x89, 0x21,
- 0x03, 0x36, 0x04, 0x2c,
- 0x00, 0x04, 0xe0, 0x08,
- 0x4c, 0x11, 0x8b, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8b, 0x05, 0x80, 0x2c,
- 0x02, 0x36, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0x16, 0x83, 0x11,
- 0x44, 0x58, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x1c,
- 0x40, 0x2d, 0x67, 0xc9,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x70, 0x98, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x00, 0x06, 0x80, 0x7b,
- 0xa1, 0x7b, 0x61, 0x38,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x15, 0x80, 0x1c,
- 0x6b, 0x18, 0xef, 0x95,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x82, 0x75, 0xe0, 0x80,
- 0x6f, 0xf8, 0x75, 0xa8,
- 0x6b, 0x58, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6e, 0x88,
- 0x81, 0x85, 0x8c, 0x0b,
- 0x6f, 0xf8, 0x57, 0xc8,
- 0x0c, 0x0b, 0x8c, 0x0b,
- 0x59, 0x38, 0x8c, 0x1b,
- 0x16, 0x06, 0xef, 0xf8,
- 0x89, 0x11, 0x61, 0x38,
- 0x00, 0x1c, 0xac, 0x04,
- 0xe0, 0x08, 0x01, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xef, 0xf0, 0x52, 0x48,
- 0x80, 0x7b, 0x2c, 0x04,
- 0x8b, 0x11, 0x21, 0x7b,
- 0x11, 0xe8, 0x80, 0x1c,
- 0x28, 0x04, 0x80, 0x00,
- 0x80, 0x18, 0xa1, 0x7b,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x92, 0xc5, 0x80, 0x16,
- 0xa1, 0x7b, 0x24, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x8a, 0x95, 0x80, 0x16,
- 0x6f, 0xf8, 0x63, 0xc8,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0xb6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0xef, 0xfc, 0x51, 0xe8,
- 0x61, 0x3c, 0x10, 0x86,
- 0x20, 0x04, 0x83, 0x91,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0x40, 0x18, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0x10, 0x41, 0x46,
- 0x80, 0x14, 0x81, 0x21,
- 0x80, 0x04, 0x84, 0x26,
- 0xa0, 0x04, 0x80, 0x96,
- 0xe0, 0x19, 0x80, 0x18,
- 0x00, 0x06, 0x80, 0x16,
- 0x42, 0xe6, 0x61, 0x38,
- 0x00, 0x04, 0xe0, 0x00,
- 0x00, 0x1c, 0xa8, 0xf1,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0x09, 0xdd, 0x93,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x88, 0x40, 0x0a,
- 0x0c, 0x19, 0x8c, 0x25,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x20, 0x04, 0x8a, 0x65,
- 0xe0, 0x04, 0x02, 0x76,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x7b, 0xa8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x81, 0x71, 0x40, 0x2d,
- 0x80, 0xb5, 0xa7, 0x0b,
- 0x68, 0x00, 0x65, 0x28,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6f, 0xfc, 0x4c, 0x68,
- 0x77, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe0, 0x35, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x86, 0x45, 0xe0, 0x8c,
- 0x02, 0x86, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x79, 0xc8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2d,
- 0x80, 0xb5, 0xa9, 0x0b,
- 0x68, 0x00, 0x62, 0xa8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xd8, 0xb5, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x90,
- 0x6f, 0xd4, 0x6f, 0x48,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0x96,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0x7b, 0xf8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xc4,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x60, 0x88, 0x40, 0x0a,
- 0xd2, 0x65, 0x81, 0x71,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0xd0, 0xa5, 0xe0, 0x88,
- 0x02, 0xa6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x70, 0xf8, 0x84, 0x25,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x70, 0x48,
- 0x6f, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6f, 0x68,
- 0x79, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x4d, 0xd8, 0x83, 0x35,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x6f, 0xf8, 0x62, 0x88,
- 0x01, 0x95, 0x8c, 0x0b,
- 0x01, 0x31, 0x81, 0x01,
- 0x0c, 0x1b, 0x8c, 0x0b,
- 0x50, 0x58, 0x8e, 0x2b,
- 0x82, 0x71, 0xef, 0xf8,
- 0xe0, 0x40, 0x0e, 0x0a,
- 0x21, 0x0b, 0xfc, 0xf5,
- 0x31, 0x38, 0x80, 0x7b,
- 0x7c, 0x38, 0xdf, 0xfc,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x81, 0x71, 0x40, 0x16,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x9f, 0xfc, 0x30, 0x88,
- 0x6f, 0xf8, 0x58, 0x28,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x62, 0xf8, 0x8e, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x59, 0x68,
- 0x5c, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x0c, 0x09, 0x87, 0x65,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x15, 0xa3, 0x0b,
- 0x68, 0x00, 0x5a, 0xe8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x2d, 0xa8, 0xa1, 0x7b,
- 0x20, 0x04, 0xdf, 0xfc,
- 0xe0, 0x04, 0x02, 0x56,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0x6c, 0x81, 0x0c, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xc5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xff, 0xfc, 0x21, 0x58,
- 0x40, 0xc6, 0xa1, 0x0b,
- 0x02, 0x06, 0x01, 0x04,
- 0x00, 0x05, 0x80, 0x00,
- 0x40, 0x11, 0x80, 0x00,
- 0x20, 0xa8, 0x80, 0x00,
- 0x42, 0x18, 0xff, 0xfc,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x43, 0xb6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x83, 0x11, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x48,
- 0x57, 0x35, 0x8c, 0x0b,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x04, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x38, 0x63, 0x15,
- 0x0c, 0x19, 0xa5, 0x0b,
- 0x40, 0x2c, 0x0e, 0x99,
- 0xc1, 0x14, 0x01, 0x06,
- 0xc0, 0x00, 0x00, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x81, 0x10, 0x01, 0x06,
- 0x80, 0x00, 0x00, 0x05,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x14,
- 0xe0, 0x19, 0x80, 0x18,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0xc2, 0x19, 0x80, 0x18,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xef, 0xe4, 0x5a, 0x48,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x50, 0x86, 0x3c, 0x0e,
- 0x03, 0x91, 0xe1, 0x24,
- 0xe1, 0x24, 0x4e, 0x46,
- 0x61, 0x24, 0x54, 0xc6,
- 0xa1, 0x85, 0x81, 0x01,
- 0x00, 0x06, 0x7c, 0x0e,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xd4, 0x59, 0x88,
- 0x60, 0x08, 0x00, 0x16,
- 0xe0, 0x10, 0x42, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x14, 0x69, 0x08,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x80, 0x04, 0xe1, 0x44,
- 0x81, 0x65, 0x80, 0xb8,
- 0xef, 0xd4, 0x59, 0x68,
- 0x63, 0x29, 0x4c, 0x91,
- 0xa0, 0x04, 0xc0, 0x38,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfa, 0xe5, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x45, 0xfa, 0x55,
- 0xe8, 0x14, 0x6d, 0xe8,
- 0x80, 0x08, 0xa0, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0xef, 0xd4, 0x57, 0x28,
- 0x63, 0x29, 0x4c, 0x91,
- 0x55, 0xf8, 0xc0, 0x38,
- 0x55, 0xb8, 0xef, 0xc0,
- 0x00, 0x26, 0xef, 0xd4,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x55, 0x98, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x6a, 0x68,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x82, 0x85, 0xa1, 0x0b,
- 0xef, 0xd4, 0x53, 0xa8,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xd0, 0x19,
- 0x63, 0x29, 0x4c, 0x91,
- 0x00, 0x86, 0xc0, 0x38,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x51, 0xb8, 0x80, 0x16,
- 0x0c, 0x09, 0xef, 0xc0,
- 0xc0, 0x2c, 0x6e, 0xa9,
- 0x01, 0x06, 0xa3, 0x0b,
- 0x00, 0x05, 0x81, 0x10,
- 0x40, 0x91, 0x80, 0x00,
- 0x9e, 0x25, 0x80, 0x00,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x50, 0x58, 0x9a, 0xa5,
- 0x00, 0x36, 0xef, 0xd4,
- 0x42, 0x26, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0xd8, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x50, 0x38, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x65, 0x08,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x92, 0x25, 0xa1, 0x0b,
- 0xe9, 0x0d, 0xfc, 0x04,
- 0x4d, 0x38, 0x90, 0x25,
- 0x00, 0xc6, 0xef, 0xc0,
- 0x57, 0x46, 0x61, 0x10,
- 0x00, 0x04, 0xe1, 0x10,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x81, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x5c, 0x38, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x43, 0x46, 0x2c, 0x04,
- 0x04, 0x86, 0xe1, 0x10,
- 0x00, 0x96, 0xe1, 0x3c,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x02, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xfc, 0x04, 0xbe, 0x0e,
- 0xe8, 0x0d, 0x82, 0x01,
- 0x9f, 0xfc, 0x2f, 0x88,
- 0xbc, 0x0e, 0xbe, 0x04,
- 0x4a, 0x18, 0x81, 0x85,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0xef, 0xc0, 0x48, 0xe8,
- 0x63, 0x15, 0x0c, 0x09,
- 0x4f, 0x06, 0x40, 0x38,
- 0xa5, 0x0b, 0xe1, 0x14,
- 0x70, 0xb8, 0x82, 0x15,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x4c, 0x01, 0xbc, 0x0e,
- 0xc0, 0x38, 0x63, 0x29,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xe0, 0x19,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x3c, 0x04, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x08, 0x09, 0x80, 0x4b,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0x08, 0x0b, 0x96, 0xd5,
- 0x40, 0x16, 0x6b, 0xe1,
- 0x66, 0x81, 0x12, 0x40,
- 0x14, 0x40, 0xc0, 0xb5,
- 0x40, 0xb5, 0x65, 0x41,
- 0xbc, 0x4e, 0x81, 0x71,
- 0x73, 0xf1, 0x40, 0x00,
- 0x88, 0x03, 0xc0, 0xff,
- 0x64, 0x01, 0x10, 0x00,
- 0x00, 0x40, 0x40, 0x28,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x00, 0x40, 0x7c, 0x0e,
- 0xc0, 0x9c, 0x67, 0x41,
- 0x87, 0xb5, 0xbe, 0x0e,
- 0x7c, 0x04, 0xa8, 0x0a,
- 0x73, 0xf1, 0x4c, 0x00,
- 0x28, 0xba, 0xc0, 0xff,
- 0x81, 0x6b, 0x88, 0x63,
- 0x6d, 0x98, 0x80, 0xf5,
- 0x88, 0x0b, 0x68, 0x10,
- 0xa1, 0x0b, 0x3c, 0x44,
- 0xbe, 0x04, 0x8c, 0x15,
- 0x80, 0xf5, 0x81, 0x6b,
- 0x68, 0x10, 0x6b, 0x28,
- 0x3c, 0x44, 0x88, 0x0b,
- 0x88, 0xf5, 0xa1, 0x0b,
- 0xa1, 0x0b, 0xa4, 0x0a,
- 0x24, 0x0a, 0x86, 0xa5,
- 0xa4, 0x1a, 0xe0, 0xb7,
- 0x21, 0x0b, 0x9e, 0x09,
- 0x73, 0xc1, 0x44, 0x10,
- 0x20, 0xbf, 0xc0, 0xff,
- 0x00, 0x16, 0xc9, 0x17,
- 0xa4, 0xbf, 0x00, 0x00,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x45, 0x07, 0xe1, 0xbe,
- 0x01, 0x65, 0x90, 0x2b,
- 0x59, 0x34, 0x80, 0x1b,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc9, 0x3e,
- 0xc4, 0x07, 0xfe, 0x75,
- 0x04, 0x91, 0x80, 0x83,
- 0x82, 0x71, 0x84, 0xa1,
- 0xe4, 0x9c, 0x0f, 0x0a,
- 0x81, 0x01, 0xf0, 0x85,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x6c, 0x1d, 0x08, 0x29,
- 0x40, 0x00, 0x40, 0x2b,
- 0x48, 0x01, 0xf3, 0xf4,
- 0x40, 0x2d, 0x67, 0xcd,
- 0xe0, 0x0c, 0x0e, 0x36,
- 0x60, 0x0c, 0x02, 0x36,
- 0x75, 0x38, 0x88, 0x0b,
- 0x23, 0x0b, 0xef, 0xcc,
- 0x0e, 0x06, 0x98, 0xf1,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x40, 0xc6, 0x8a, 0xe5,
- 0x85, 0x31, 0x61, 0x04,
- 0x83, 0x41, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x86,
- 0x63, 0x7d, 0x0c, 0x15,
- 0x79, 0x78, 0xc0, 0x0b,
- 0x82, 0x2b, 0x68, 0x14,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x6f, 0xf8, 0x5e, 0x08,
- 0x48, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x79, 0x41, 0x02, 0x06,
- 0x8c, 0x0b, 0x5d, 0xcd,
- 0xef, 0xf8, 0x62, 0xc8,
- 0x0c, 0x0b, 0x81, 0x55,
- 0x64, 0x38, 0x8e, 0x1b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x46, 0x38, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x14,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x65, 0x3d, 0x4c, 0x01,
- 0x90, 0x0b, 0xc0, 0x22,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x81, 0x00, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xa5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xa1, 0x0b, 0xdd, 0x93,
- 0xda, 0x00, 0x5c, 0x08,
- 0x61, 0x04, 0x40, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6d, 0x39, 0x0e, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x9c, 0xe5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x6d, 0x41, 0x4e, 0x81,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x40, 0x70, 0xe0, 0x80,
- 0x5e, 0x38, 0xdc, 0x00,
- 0x14, 0x06, 0xc8, 0x00,
- 0x91, 0xb1, 0x61, 0x38,
- 0x0e, 0x09, 0x8b, 0xf5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x12, 0x06, 0x04, 0x75,
- 0x02, 0x06, 0xc0, 0x00,
- 0x5d, 0xcd, 0x79, 0x41,
- 0x5d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xd5, 0xef, 0xf8,
- 0x03, 0x31, 0x80, 0x8b,
- 0x0c, 0x1b, 0x8e, 0x0b,
- 0x62, 0x18, 0x92, 0x2b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x12, 0x0a, 0x82, 0x91,
- 0xfc, 0xd5, 0xe0, 0x40,
- 0x6d, 0x41, 0x0e, 0x09,
- 0xa1, 0x0b, 0xc0, 0x2c,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x66,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x40, 0xb3, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x01, 0x11, 0x8a, 0xf5,
- 0x51, 0x78, 0x8e, 0x0b,
- 0x0e, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6d, 0x41,
- 0xa1, 0x0b, 0x80, 0x8b,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x76,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x02, 0x96, 0x00, 0x00,
- 0x40, 0x13, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x0e, 0x1b, 0x82, 0x95,
- 0x40, 0x16, 0x66, 0x35,
- 0x0e, 0x29, 0x8e, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x6f, 0xc8, 0x41, 0x88,
- 0x80, 0x8b, 0x82, 0x19,
- 0x6d, 0x41, 0x0e, 0x09,
- 0x82, 0x01, 0xc0, 0x2c,
- 0x6d, 0x41, 0x4e, 0x01,
- 0x0e, 0x09, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x41,
- 0x6d, 0x11, 0x0e, 0x19,
- 0xc3, 0x0d, 0xc0, 0x2c,
- 0x90, 0x0b, 0xe6, 0x75,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x81, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x63, 0x85, 0x00, 0x25,
- 0x81, 0x41, 0x40, 0x0b,
- 0xe0, 0x14, 0x2c, 0x48,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x60, 0x80, 0x40, 0x0a,
- 0x82, 0x85, 0x81, 0x01,
- 0x68, 0x00, 0x56, 0x88,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x40, 0x60, 0xab, 0x1b,
- 0x68, 0x38, 0x9c, 0x00,
- 0x0c, 0x19, 0x8f, 0xfc,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x62, 0x58, 0x82, 0x85,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x67, 0xc9, 0x0c, 0x19,
- 0xb1, 0x1b, 0xc0, 0x2d,
- 0x9c, 0x00, 0x40, 0x60,
- 0x8f, 0xfc, 0x67, 0x28,
- 0x6d, 0x51, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0xa5, 0xe0, 0x88,
- 0x68, 0x00, 0x56, 0x28,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x80, 0xb5, 0xb3, 0x1b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xcb, 0xf5, 0xf2, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2d, 0x65, 0x35,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0d, 0x11, 0x8c, 0x85,
- 0x79, 0x41, 0x04, 0x06,
- 0x4e, 0xb8, 0xdd, 0xcd,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0x6b, 0xd8, 0xdd, 0x93,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0x6a, 0xad, 0x0c, 0x09,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x1e, 0x79, 0xa3, 0x0b,
- 0x9c, 0x00, 0x40, 0x60,
- 0x08, 0x10, 0x6b, 0xa8,
- 0x9a, 0x80, 0x02, 0x74,
- 0x6d, 0x51, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x8c,
- 0x61, 0x34, 0x41, 0x06,
- 0xe0, 0x08, 0x45, 0xa6,
- 0x02, 0x74, 0x00, 0x04,
- 0x4c, 0x21, 0xfa, 0x80,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x00, 0x4d, 0x68,
- 0xf4, 0xf5, 0xa1, 0x0b,
- 0x04, 0x06, 0x0f, 0x11,
- 0xdd, 0xcd, 0x79, 0x41,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0b, 0x58, 0xf2, 0x84,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xe0, 0x65, 0x68,
- 0x00, 0x7b, 0x81, 0x11,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0xc5,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0x05,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x90, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x88, 0xb5, 0xa1, 0x0b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x4a, 0x78, 0x83, 0x11,
- 0x42, 0x06, 0xef, 0x7c,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x79, 0x48,
- 0x61, 0x38, 0x01, 0x06,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x0c, 0x29, 0x80, 0x04,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x88, 0x44, 0x4a,
- 0xc0, 0x00, 0x40, 0x15,
- 0x42, 0x16, 0xfe, 0x35,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x78, 0x28,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2d,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xe0, 0x61, 0x48,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x80, 0x6b, 0x3e, 0x1e,
- 0x65, 0x0d, 0x0c, 0x09,
- 0x81, 0x11, 0x40, 0x2b,
- 0x81, 0xa1, 0x0b, 0x1e,
- 0x00, 0x2a, 0x91, 0x1c,
- 0x81, 0x01, 0x60, 0x04,
- 0x00, 0x98, 0xfe, 0x0e,
- 0xc0, 0x00, 0x40, 0x01,
- 0x64, 0x50, 0x02, 0xf0,
- 0x77, 0x98, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xc8,
- 0x60, 0x48, 0x02, 0x06,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x00, 0x60, 0xe8, 0x14,
- 0x40, 0x09, 0x64, 0x01,
- 0x61, 0x01, 0x12, 0x06,
- 0x7c, 0x0e, 0xc0, 0x20,
- 0xe6, 0xe4, 0x10, 0x06,
- 0x81, 0x71, 0x09, 0x15,
- 0x6e, 0x19, 0x0c, 0x0b,
- 0x40, 0x0a, 0xc0, 0x15,
- 0x8c, 0x65, 0xe4, 0x9c,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x68, 0x81, 0x00, 0xb9,
- 0x16, 0x0a, 0xc0, 0x1b,
- 0x8a, 0x65, 0xe3, 0xfc,
- 0x40, 0x01, 0x01, 0x78,
- 0xbe, 0x04, 0xc0, 0x00,
- 0x04, 0x06, 0xa1, 0x0b,
- 0x06, 0x16, 0x00, 0x24,
- 0x40, 0x60, 0x80, 0x00,
- 0x42, 0x90, 0x1c, 0x00,
- 0x42, 0x62, 0x9c, 0x00,
- 0x45, 0x06, 0x50, 0xa0,
- 0x06, 0x46, 0xc0, 0x18,
- 0x40, 0x60, 0x40, 0x00,
- 0x68, 0xf8, 0xdc, 0x00,
- 0x0b, 0x34, 0xe8, 0x04,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0x96, 0x4b, 0x7c, 0x24,
- 0xef, 0xc8, 0x75, 0x88,
- 0xa1, 0xab, 0x80, 0xab,
- 0x7e, 0x14, 0x84, 0xb5,
- 0x91, 0x0a, 0x81, 0xa1,
- 0xfb, 0x80, 0x02, 0x14,
- 0xfe, 0x0e, 0x82, 0x03,
- 0x12, 0x90, 0x02, 0x71,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0xc1, 0x10, 0x80,
- 0xfe, 0x7d, 0xc0, 0x01,
- 0xfe, 0x04, 0xf0, 0x05,
- 0x62, 0x99, 0x4c, 0x03,
- 0x14, 0x0b, 0xc0, 0x16,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0xef, 0xec, 0x79, 0x88,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x66, 0x35, 0x0e, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x10, 0x16, 0xe8,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x89, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x04, 0x10, 0x83, 0x41,
- 0x15, 0x38, 0xec, 0x28,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x35, 0xad, 0x0b,
- 0x6f, 0xfc, 0x51, 0xc8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x82, 0xb5,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x70, 0x1c, 0x00, 0x0a,
- 0x80, 0xd5, 0x81, 0x01,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x10, 0xd8, 0xf2, 0x00,
- 0x0c, 0x0c, 0xff, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x8c, 0xc5, 0xe0, 0x90,
- 0x6f, 0xec, 0x55, 0xc8,
- 0x5a, 0xb8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x6f, 0xec, 0x68, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0x40, 0x38, 0x64, 0xb5,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x04, 0x21, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0xe1,
- 0x80, 0x54, 0x07, 0x01,
- 0x07, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0x00, 0x54,
- 0x80, 0x58, 0x06, 0x41,
- 0x8f, 0xd0, 0x42, 0xa8,
- 0x64, 0xb9, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x07, 0x01, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0x54,
- 0x80, 0x54, 0x07, 0x41,
- 0x0f, 0xd0, 0x47, 0x88,
- 0x06, 0x40, 0x04, 0x60,
- 0x0c, 0x09, 0x80, 0x58,
- 0xc0, 0x38, 0x63, 0x21,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x2b, 0xb8, 0xf2, 0x84,
- 0x8e, 0x0b, 0xff, 0xec,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0a, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xef, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x0c, 0x2b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x6c, 0xed, 0x0c, 0x79,
- 0x40, 0x4a, 0x40, 0x2c,
- 0x0c, 0x89, 0xe0, 0x80,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x6c, 0xf1, 0x0c, 0x49,
- 0x42, 0x10, 0x40, 0x2c,
- 0x02, 0x14, 0xdc, 0x20,
- 0x40, 0x0a, 0x1c, 0x0c,
- 0x06, 0x60, 0xe0, 0x90,
- 0xc0, 0xb3, 0x05, 0x31,
- 0x05, 0x35, 0x06, 0x60,
- 0x8c, 0x38, 0x80, 0xb3,
- 0x6d, 0x11, 0x4c, 0x31,
- 0x46, 0x10, 0x40, 0x2c,
- 0x4c, 0x31, 0xfc, 0x10,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x4a, 0x0a, 0x94, 0x58,
- 0x04, 0x24, 0xe0, 0x84,
- 0x04, 0x24, 0xc0, 0x84,
- 0x85, 0x4b, 0xfa, 0x80,
- 0xdc, 0x10, 0x02, 0x34,
- 0x1c, 0x50, 0x42, 0x10,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x6d, 0x15, 0x4c, 0x11,
- 0x40, 0x10, 0x40, 0x2c,
- 0x4c, 0x01, 0x93, 0xf0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x54, 0x78, 0x80, 0x85,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x0c, 0x09, 0xe0, 0x80,
- 0xc0, 0x2c, 0x0d, 0x15,
- 0xd3, 0xf8, 0x40, 0x00,
- 0x0d, 0x15, 0x4c, 0x01,
- 0x10, 0x0a, 0x40, 0x2c,
- 0x84, 0x65, 0xff, 0xfc,
- 0x7a, 0x80, 0x00, 0x84,
- 0xfa, 0x80, 0x02, 0x74,
- 0x0c, 0x09, 0x81, 0x1b,
- 0x00, 0x2c, 0x0d, 0x15,
- 0x80, 0x00, 0x02, 0x06,
- 0x0d, 0x11, 0x4c, 0x11,
- 0x40, 0x00, 0x80, 0x2c,
- 0x4c, 0x01, 0x93, 0xe0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x43, 0x08,
- 0x48, 0x98, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0xef, 0xdc, 0x40, 0x06,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x4f, 0xb8, 0x82, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x68, 0x04, 0x6b, 0x08,
- 0x81, 0x45, 0x8c, 0x0b,
- 0x6f, 0xd4, 0x4e, 0xa8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x57, 0x58, 0x82, 0x55,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x68, 0x00, 0x44, 0xe8,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x21, 0x00, 0x19,
- 0x45, 0xc6, 0x40, 0x2b,
- 0x40, 0x21, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x42, 0x26, 0xa3, 0x1b,
- 0x40, 0x11, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0xa7, 0x1b, 0x8a, 0x45,
- 0xa5, 0x1b, 0x82, 0x05,
- 0x80, 0x00, 0x42, 0x36,
- 0x0c, 0x1d, 0x40, 0x11,
- 0x85, 0x15, 0x80, 0x2b,
- 0xe0, 0x00, 0x42, 0x46,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x02, 0x86, 0x40, 0x2b,
- 0x84, 0x28, 0xef, 0xdc,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xe5,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x80, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xb5,
- 0xf3, 0xdc, 0x44, 0x20,
- 0x00, 0x29, 0x84, 0x26,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x0a,
- 0xc0, 0x00, 0x04, 0x16,
- 0xc0, 0xa0, 0x42, 0x21,
- 0x6e, 0x09, 0x00, 0x1b,
- 0xc4, 0x19, 0xc0, 0x15,
- 0x6e, 0x09, 0x40, 0x13,
- 0x00, 0x86, 0x40, 0x15,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x7b,
- 0x6f, 0xe0, 0x42, 0x68,
- 0x81, 0x81, 0x81, 0x11,
- 0x6c, 0x21, 0x0e, 0x09,
- 0x80, 0x6b, 0x40, 0x2b,
- 0xe0, 0x08, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4e, 0x11,
- 0xa5, 0x0b, 0xc0, 0x2b,
- 0xa7, 0x0b, 0x88, 0x45,
- 0x0e, 0x0b, 0xa2, 0x75,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0x75, 0x40, 0x00,
- 0x00, 0x04, 0xc0, 0xff,
- 0x4e, 0x03, 0xfc, 0x94,
- 0x40, 0x15, 0x6e, 0x09,
- 0x60, 0x98, 0x8e, 0x0b,
- 0x48, 0x38, 0xef, 0xbc,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0xa5, 0x0b, 0x86, 0x05,
- 0x00, 0x86, 0x08, 0xc5,
- 0xa3, 0x0b, 0x8f, 0xdc,
- 0x03, 0xd5, 0x88, 0xf5,
- 0xef, 0xdc, 0x00, 0x86,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x73, 0x71,
- 0xfc, 0x94, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x0c, 0x0c, 0xc0, 0x15,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0xef, 0xdc, 0x00, 0x86,
- 0x42, 0x4a, 0x80, 0x18,
- 0x80, 0xe5, 0xe0, 0x8c,
- 0x6c, 0x15, 0x0e, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x80, 0xa5, 0xe0, 0x84,
- 0x01, 0x55, 0x80, 0x08,
- 0xfc, 0x08, 0x00, 0x04,
- 0xc8, 0x09, 0x80, 0x08,
- 0xef, 0xdc, 0x02, 0x86,
- 0x4f, 0x98, 0x84, 0x06,
- 0x8e, 0x0b, 0x6f, 0xe4,
- 0xef, 0xdc, 0x12, 0x86,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xf5, 0xe0, 0x88,
- 0x8e, 0x0b, 0x3d, 0x11,
- 0xef, 0xe0, 0x52, 0x68,
- 0x68, 0x00, 0x49, 0x68,
- 0x87, 0x25, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x3f, 0x11,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xe0, 0x11, 0xc8,
- 0x6e, 0x09, 0x0e, 0x05,
- 0x02, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x64, 0xcd, 0x0e, 0x15,
- 0x04, 0x04, 0xc0, 0x05,
- 0xd0, 0x17, 0xe1, 0x84,
- 0xc2, 0x0d, 0x84, 0x13,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x02, 0x40, 0x1a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x04, 0x0e, 0x84, 0x14,
- 0x0e, 0x0b, 0x95, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x8e, 0x0b, 0x40, 0x15,
- 0xef, 0xe0, 0x4f, 0x88,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x60, 0x18, 0x83, 0x11,
- 0x47, 0xd8, 0xef, 0x78,
- 0x52, 0x81, 0xef, 0xf0,
- 0x03, 0x11, 0xe0, 0xa0,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x38, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xff, 0xdc,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe0, 0x08, 0x43, 0xe6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x45, 0x46, 0x40, 0x2b,
- 0x0c, 0x15, 0xe1, 0x24,
- 0xc0, 0x09, 0x6e, 0x09,
- 0x88, 0x24, 0x80, 0x08,
- 0x08, 0x34, 0xc5, 0x07,
- 0xf0, 0x0c, 0x44, 0x00,
- 0x68, 0x10, 0x79, 0xa8,
- 0x02, 0x86, 0x8c, 0x0b,
- 0x48, 0x86, 0x6f, 0xdc,
- 0x86, 0x0e, 0xe0, 0x3c,
- 0xc4, 0x24, 0x86, 0x04,
- 0x68, 0xb1, 0x0c, 0x3b,
- 0x48, 0x0a, 0xc0, 0x0a,
- 0x00, 0x0e, 0x66, 0x92,
- 0xc3, 0xd0, 0x64, 0x00,
- 0x60, 0x0e, 0x40, 0x0a,
- 0x88, 0x23, 0xc9, 0x47,
- 0x40, 0x02, 0xc5, 0x0d,
- 0x02, 0x09, 0x91, 0x88,
- 0x40, 0x00, 0xc0, 0x00,
- 0x42, 0x01, 0xdc, 0x04,
- 0x00, 0x06, 0x40, 0x00,
- 0x4c, 0x05, 0xc0, 0x00,
- 0xc0, 0x05, 0x64, 0xcd,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x09, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0x64, 0xcd, 0x00, 0x05,
- 0x42, 0x2a, 0xc0, 0x05,
- 0xd0, 0x07, 0xe0, 0x06,
- 0xe1, 0x84, 0x04, 0x14,
- 0xc0, 0x1d, 0x84, 0x03,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x06, 0x40, 0x0a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x84, 0x0e, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x48, 0x58, 0xb7, 0x11,
- 0x8c, 0x0b, 0x6f, 0xe0,
- 0x64, 0xcd, 0x0c, 0x15,
- 0x02, 0x8a, 0xc0, 0x05,
- 0x80, 0xf5, 0xe5, 0x94,
- 0x8c, 0x0b, 0x01, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0xc8,
- 0x8c, 0x0b, 0x3b, 0x11,
- 0xef, 0xe0, 0x47, 0x48,
- 0x60, 0x04, 0x42, 0x46,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0x08,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0xbc, 0x83, 0xb1,
- 0xe1, 0x94, 0x00, 0x46,
- 0xa1, 0xab, 0x80, 0xa8,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x67, 0x38, 0x8c, 0x0b,
- 0x94, 0x1b, 0x6f, 0xc8,
- 0x0e, 0x08, 0xa1, 0x0b,
- 0x0e, 0x60, 0xc0, 0x00,
- 0x40, 0xb3, 0x64, 0x51,
- 0x60, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xe0,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x02, 0x04, 0xc0, 0x2d,
- 0x42, 0x0a, 0xe1, 0x90,
- 0x82, 0x19, 0x60, 0x80,
- 0x06, 0x31, 0x4c, 0x13,
- 0x40, 0x0a, 0x40, 0x16,
- 0x86, 0x25, 0xe0, 0x84,
- 0x6c, 0x11, 0x0c, 0x19,
- 0x42, 0x4a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0x61, 0x38, 0x03, 0x06,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x40, 0x4a, 0x84, 0x14,
- 0x42, 0x25, 0xe0, 0x88,
- 0x0c, 0x09, 0xc0, 0x00,
- 0xc0, 0x2d, 0x07, 0xcd,
- 0x40, 0x00, 0xfe, 0x35,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x64, 0xd1, 0x00, 0x60,
- 0x10, 0x60, 0x40, 0xb3,
- 0xc0, 0xaf, 0x64, 0x11,
- 0x81, 0xa1, 0x0f, 0x0e,
- 0x81, 0x91, 0x13, 0xa5,
- 0xfb, 0xfc, 0x16, 0x0a,
- 0x13, 0x11, 0xa6, 0x05,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x12, 0x0a, 0xef, 0xe0,
- 0x41, 0x06, 0x7b, 0xfc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x41, 0x26, 0x9c, 0xa5,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5d, 0xd8, 0x8c, 0x0b,
- 0x0f, 0x14, 0xe8, 0x00,
- 0x63, 0x38, 0x8c, 0x0b,
- 0x19, 0x11, 0xef, 0xe0,
- 0x7f, 0xf8, 0x8c, 0x0b,
- 0x41, 0x66, 0xef, 0xdc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6f, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x00,
- 0x98, 0xf5, 0xa1, 0xab,
- 0xe0, 0x00, 0x41, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x10, 0x59, 0x68,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x46, 0x96, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x78, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x14,
- 0x94, 0x35, 0xa1, 0xab,
- 0x6d, 0x09, 0x0c, 0x09,
- 0x0c, 0x1b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6c, 0x04, 0x04, 0x00,
- 0xe0, 0x00, 0x41, 0x56,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x9e, 0x29, 0x40, 0x2b,
- 0x8c, 0x0b, 0x02, 0x19,
- 0xef, 0xc0, 0x77, 0xe8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x76, 0x8e, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0xf8, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xfc,
- 0x8c, 0x35, 0xa1, 0xab,
- 0x61, 0x38, 0x00, 0x06,
- 0xe0, 0x00, 0x43, 0x86,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x1c, 0x85, 0x11,
- 0x5e, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xf4,
- 0x88, 0x35, 0xa1, 0xab,
- 0x6c, 0x71, 0x0c, 0x09,
- 0x43, 0x96, 0x40, 0x2c,
- 0x4c, 0x11, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x19, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x16, 0x06, 0x81, 0x1b,
- 0x01, 0xf5, 0x80, 0x00,
- 0x41, 0x16, 0x81, 0xa1,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x42, 0x38, 0x8c, 0x0b,
- 0x00, 0xab, 0xe8, 0x00,
- 0xa1, 0xab, 0x83, 0x91,
- 0x83, 0x91, 0xe4, 0x25,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x54, 0x68,
- 0x90, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x57, 0xa8,
- 0xd8, 0xe5, 0xa1, 0xab,
- 0x6c, 0x91, 0x0c, 0x09,
- 0x21, 0x0b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x41, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x40, 0x60, 0x40, 0x2b,
- 0x53, 0xd8, 0x9c, 0x00,
- 0x94, 0x0b, 0x8f, 0xc8,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x03, 0x06, 0x00, 0x6b,
- 0x0c, 0x0b, 0xe0, 0x08,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0x11, 0x40, 0x2b,
- 0x6d, 0x09, 0x4c, 0x11,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x81, 0x01, 0x60, 0x94,
- 0x0d, 0x0d, 0x0c, 0x19,
- 0x4c, 0x03, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x71,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x42, 0x10, 0xc0, 0x2c,
- 0x4c, 0x11, 0xdc, 0x40,
- 0xc0, 0x2c, 0x0d, 0x0d,
- 0x69, 0x65, 0x0c, 0x15,
- 0x0c, 0x29, 0xc0, 0x0d,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x00, 0x02, 0x1a,
- 0xa0, 0x00, 0x00, 0x38,
- 0x44, 0x20, 0x80, 0xc5,
- 0x4c, 0x21, 0xf3, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x44, 0x20, 0x40, 0x16,
- 0x4c, 0x01, 0xf3, 0xe0,
- 0x40, 0x2c, 0x6c, 0xed,
- 0x4c, 0x21, 0xc2, 0x29,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x6c, 0xf1, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x03, 0xe0, 0x94,
- 0x40, 0x16, 0x06, 0x81,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x0c, 0xf9, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x01, 0xe0, 0x8c,
- 0x40, 0x2c, 0x0c, 0xfd,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x03, 0x35, 0x4c, 0x05,
- 0x42, 0x0a, 0x40, 0x0b,
- 0x4c, 0x21, 0xe0, 0x9c,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x68, 0x58, 0x80, 0xe5,
- 0x8c, 0x0b, 0x6f, 0xf0,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x86, 0x25, 0xe0, 0xa0,
- 0x67, 0xf1, 0x0c, 0x59,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x67, 0xed, 0x0c, 0x49,
- 0x0c, 0x39, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xe5, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe1,
- 0xe8, 0x04, 0x41, 0x88,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9e, 0xf5,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xa4, 0x42, 0x0a,
- 0x03, 0x11, 0x82, 0x85,
- 0x4e, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9c, 0x35,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xb8, 0x42, 0x0a,
- 0x7b, 0xf8, 0x80, 0xe5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x09, 0x98, 0xb5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xdc, 0x00, 0x40, 0x60,
- 0xcf, 0xec, 0x67, 0xc8,
- 0x65, 0x51, 0x0c, 0x09,
- 0x43, 0x46, 0x40, 0x2b,
- 0x04, 0x14, 0xe1, 0x04,
- 0x00, 0x00, 0x85, 0x51,
- 0x8e, 0x09, 0xec, 0x04,
- 0x0c, 0x09, 0x84, 0x06,
- 0xc0, 0x38, 0x63, 0x2d,
- 0x40, 0x06, 0x21, 0x0b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x82, 0xf5,
- 0xc0, 0x38, 0x63, 0x15,
- 0x02, 0x45, 0xa5, 0x0b,
- 0x80, 0x00, 0x0a, 0x86,
- 0x00, 0xc5, 0xa3, 0x0b,
- 0x80, 0x00, 0x0a, 0x66,
- 0x0a, 0x46, 0xa1, 0x0b,
- 0x02, 0x60, 0x80, 0x00,
- 0x40, 0x54, 0x65, 0x41,
- 0x64, 0x11, 0x04, 0x60,
- 0x08, 0x60, 0xc0, 0x9e,
- 0x40, 0xa2, 0x66, 0x71,
- 0xe4, 0x30, 0x00, 0xf0,
- 0x06, 0xf0, 0x21, 0x56,
- 0x7f, 0x58, 0xe4, 0x10,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x02, 0x06, 0x40, 0x2b,
- 0x84, 0xb5, 0xc0, 0x04,
- 0x60, 0x08, 0x44, 0x16,
- 0x64, 0x50, 0x00, 0x60,
- 0x4c, 0x21, 0xc0, 0x9e,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0xa1, 0x02, 0x60,
- 0x78, 0x18, 0xc0, 0xa3,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x29, 0x86, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x02, 0x16,
- 0x6e, 0x8d, 0x4c, 0x15,
- 0x0e, 0x56, 0x40, 0x0a,
- 0x4c, 0x05, 0xe0, 0x0c,
- 0x40, 0x0a, 0x6e, 0x89,
- 0xe0, 0x0c, 0x02, 0x56,
- 0x6f, 0xc8, 0x49, 0x48,
- 0x0e, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x69, 0x65, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0d,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x41, 0x46, 0x84, 0xe5,
- 0x4b, 0xe6, 0x61, 0x4c,
- 0x00, 0x04, 0xe0, 0x0c,
- 0x66, 0xd1, 0x06, 0x60,
- 0x0c, 0x29, 0xc0, 0x54,
- 0x40, 0x15, 0x63, 0x0d,
- 0x66, 0xe1, 0x08, 0x60,
- 0x0c, 0x19, 0xc0, 0xa3,
- 0xc0, 0x15, 0x63, 0x09,
- 0x6c, 0x1d, 0x4c, 0x51,
- 0x62, 0x78, 0xc0, 0x2b,
- 0x0c, 0x09, 0xef, 0xa0,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0x60, 0x94, 0x40, 0x4a,
- 0xe0, 0x0c, 0x00, 0x46,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x86, 0x45, 0xc0, 0x2b,
- 0x66, 0xb1, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0xbf,
- 0xc0, 0xc0, 0x65, 0x21,
- 0x64, 0xc1, 0x04, 0x60,
- 0x06, 0x60, 0x40, 0xad,
- 0xc0, 0xad, 0x65, 0x21,
- 0x6f, 0xac, 0x72, 0x88,
- 0x66, 0x20, 0x08, 0x60,
- 0x00, 0x60, 0xc0, 0xae,
- 0x40, 0xd8, 0x65, 0x61,
- 0x70, 0x78, 0x81, 0x11,
- 0x04, 0xc6, 0x6f, 0x70,
- 0x77, 0x65, 0xe0, 0x10,
- 0xc1, 0xc3, 0x81, 0x71,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x03, 0x16, 0x40, 0x2c,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6c, 0x79, 0x00, 0x19,
- 0x00, 0x79, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0x75,
- 0xfc, 0x00, 0x10, 0xc4,
- 0x6d, 0x0d, 0x40, 0x81,
- 0x00, 0xab, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x00, 0x19, 0x8d, 0x1e,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x63, 0x15, 0x00, 0xb5,
- 0x00, 0x69, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6c, 0xf9,
- 0x00, 0x19, 0x8f, 0x1e,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x66, 0x35, 0x00, 0x5b,
- 0x00, 0x99, 0xc0, 0x16,
- 0xc0, 0x2c, 0x6c, 0xf1,
- 0xf8, 0x60, 0x08, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x0f, 0x1b, 0x86, 0x55,
- 0x06, 0x10, 0x83, 0x31,
- 0x02, 0x0a, 0x44, 0x04,
- 0x06, 0x16, 0xe3, 0xfc,
- 0x12, 0x0a, 0x00, 0x00,
- 0x40, 0x31, 0xe3, 0xfc,
- 0x40, 0x2c, 0x6c, 0xf5,
- 0x80, 0x85, 0x83, 0x21,
- 0x04, 0x90, 0x95, 0x9b,
- 0x40, 0x21, 0xc4, 0x04,
- 0x40, 0x2c, 0x6c, 0xf1,
- 0x82, 0xcf, 0xf1, 0x11,
- 0xc4, 0xc9, 0x07, 0x65,
- 0x63, 0xfc, 0x02, 0x0a,
- 0x16, 0x54, 0x96, 0x4b,
- 0x83, 0x21, 0x61, 0xb4,
- 0x83, 0x31, 0x02, 0x45,
- 0xe0, 0x84, 0x06, 0x74,
- 0xfa, 0x80, 0x06, 0x34,
- 0x83, 0x31, 0x07, 0x1b,
- 0xc4, 0x04, 0x06, 0x10,
- 0x6c, 0xf5, 0x40, 0x31,
- 0x12, 0x0a, 0x40, 0x2c,
- 0x80, 0xe5, 0xe3, 0xfc,
- 0x02, 0xa4, 0xc2, 0xa7,
- 0x83, 0x9b, 0xfa, 0x80,
- 0xc4, 0x04, 0x04, 0x90,
- 0x6c, 0xf1, 0x40, 0x21,
- 0x56, 0x0a, 0x40, 0x2c,
- 0x80, 0xa5, 0xe0, 0x80,
- 0xfa, 0x80, 0x02, 0x34,
- 0x80, 0xf5, 0xce, 0x1d,
- 0xe0, 0x80, 0x56, 0x4a,
- 0x46, 0x4a, 0x80, 0xe5,
- 0x80, 0x85, 0xe0, 0x80,
- 0x58, 0x80, 0x01, 0x55,
- 0x58, 0xc0, 0xfc, 0x18,
- 0x08, 0xbb, 0xf3, 0xe0,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6d, 0x0d, 0x40, 0xc1,
- 0x58, 0x0a, 0x40, 0x2c,
- 0x82, 0xc5, 0xe0, 0x84,
- 0xfa, 0x80, 0x02, 0x64,
- 0x83, 0x11, 0x0f, 0x1b,
- 0x44, 0x04, 0x02, 0x60,
- 0xf3, 0xfc, 0x0c, 0x0a,
- 0x80, 0x00, 0x02, 0x16,
- 0x6c, 0xf9, 0x40, 0x11,
- 0x00, 0x29, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xff, 0xf8, 0x02, 0x0e,
- 0xff, 0xf8, 0x0c, 0x0e,
- 0xe3, 0xfc, 0x04, 0x0a,
- 0x44, 0x04, 0x02, 0x20,
- 0xe0, 0xb4, 0x4a, 0x0a,
- 0x6c, 0xfd, 0x40, 0x11,
- 0x88, 0x55, 0xc0, 0x2c,
- 0x42, 0xc2, 0x91, 0x11,
- 0x18, 0xc4, 0x78, 0x84,
- 0x22, 0xcf, 0xfc, 0x0c,
- 0x40, 0xc1, 0xa1, 0x1b,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x8d, 0x14, 0x90, 0x15,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x80, 0xe5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x84, 0xf5, 0x83, 0x2b,
- 0x6c, 0xed, 0x00, 0x19,
- 0x83, 0x21, 0x40, 0x2c,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0xc0, 0x2c,
- 0x88, 0xd5, 0xe3, 0xf0,
- 0x8d, 0x14, 0x85, 0x75,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x82, 0xa5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x80, 0xe5, 0x83, 0x2b,
- 0xe4, 0x04, 0x02, 0x30,
- 0x6d, 0x09, 0x40, 0x11,
- 0x83, 0x95, 0xc0, 0x2c,
- 0x6c, 0xed, 0x00, 0x19,
- 0x91, 0x21, 0x40, 0x2c,
- 0x78, 0x88, 0x44, 0xc2,
- 0xfc, 0x0c, 0x18, 0xc4,
- 0x83, 0x21, 0x24, 0xcf,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0x40, 0x2c,
- 0x40, 0xc1, 0xe3, 0xf0,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x0c, 0x10, 0x80, 0x65,
- 0x40, 0x61, 0xe4, 0x04,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x6c, 0xed, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0x42, 0xc0, 0x82, 0xc5,
- 0x40, 0x11, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x42, 0x10, 0x90, 0x18,
- 0x90, 0x16, 0xf3, 0xf8,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x83, 0x15, 0xc0, 0x2c,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x19, 0x82, 0x25,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x58, 0xc0, 0x00, 0xb5,
- 0x58, 0xc0, 0xdc, 0x40,
- 0x40, 0xc1, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x15, 0x84, 0x05,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x63, 0x35, 0x00, 0x25,
- 0x83, 0x11, 0x40, 0x0b,
- 0x02, 0x20, 0x97, 0x2b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x63, 0x35,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x0c, 0x46, 0x88,
- 0x0e, 0x01, 0x80, 0x7b,
- 0x40, 0x2c, 0x6d, 0x01,
- 0x00, 0x8a, 0x81, 0x61,
- 0x82, 0xd5, 0xe1, 0xb8,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x0c, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x60, 0x0c,
- 0xef, 0xc4, 0x70, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0x6c, 0x6d, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x82, 0x65, 0xe0, 0x8c,
- 0x63, 0x35, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0b,
- 0x0c, 0x15, 0x82, 0x65,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x80, 0xd5, 0x83, 0x0b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x05, 0x55, 0xc0, 0x2c,
- 0x0c, 0x09, 0xc6, 0x09,
- 0xc0, 0x2c, 0x6c, 0x6d,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x86, 0x25,
- 0xc0, 0x2c, 0x6c, 0x89,
- 0x84, 0x85, 0xa1, 0x0b,
- 0x68, 0x0c, 0x42, 0x48,
- 0x0c, 0x11, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x6c, 0x89, 0x0c, 0x29,
- 0x0c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xf1, 0x88, 0x46, 0x12,
- 0x82, 0xf5, 0x87, 0x0d,
- 0x84, 0x0d, 0x82, 0x23,
- 0x0c, 0x09, 0x82, 0x95,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x6d, 0x15, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x2c,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x4c, 0x11, 0xc6, 0x19,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xc1, 0xc3, 0xff, 0x35,
- 0x82, 0xc5, 0xa9, 0x3b,
- 0x02, 0xa5, 0xa3, 0x3b,
- 0x81, 0x88, 0x04, 0x24,
- 0x84, 0x85, 0xa5, 0x3b,
- 0x84, 0x85, 0xa7, 0x3b,
- 0x5c, 0x08, 0xa1, 0x3b,
- 0x0f, 0xd8, 0xda, 0x00,
- 0x89, 0x75, 0xff, 0x70,
- 0x5c, 0x08, 0xa1, 0x2b,
- 0x45, 0x34, 0x9a, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x7b, 0xfd, 0x46, 0x30,
- 0xc1, 0x3e, 0xdf, 0xff,
- 0x81, 0x31, 0xff, 0x65,
- 0x83, 0x31, 0x81, 0x45,
- 0xdd, 0x93, 0x81, 0x25,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x4b, 0xfe, 0x01, 0x41,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x04, 0x84, 0x85, 0x95,
- 0x06, 0x74, 0xa3, 0x3b,
- 0xc4, 0xc4, 0x88, 0x41,
- 0xa0, 0x11, 0x46, 0x64,
- 0x1b, 0xfd, 0x50, 0x80,
- 0x4e, 0x70, 0x9f, 0xff,
- 0x1f, 0xff, 0x1b, 0xfd,
- 0x12, 0x74, 0x8a, 0x8f,
- 0x58, 0xc0, 0x60, 0xe0,
- 0x9f, 0xff, 0x1b, 0xfc,
- 0x1b, 0xfd, 0x4c, 0x60,
- 0xb0, 0x9f, 0x1f, 0xff,
- 0x10, 0xc4, 0x51, 0x77,
- 0x61, 0xc7, 0xe0, 0xc0,
- 0xfb, 0x80, 0x0e, 0x74,
- 0x18, 0xc4, 0x50, 0x67,
- 0x2e, 0x8f, 0xfa, 0x80,
- 0x40, 0x95, 0xb8, 0x6f,
- 0x40, 0x85, 0xf8, 0x08,
- 0x40, 0x65, 0xf8, 0x04,
- 0xc5, 0x4d, 0xf0, 0x0c,
- 0x0c, 0x0c, 0xf4, 0xf5,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x49, 0xfe, 0x01, 0x31,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x7f, 0xf1, 0x0a, 0x0e,
- 0x18, 0x0e, 0x40, 0x3f,
- 0xc0, 0x3f, 0x70, 0x01,
- 0x02, 0x65, 0x83, 0xd5,
- 0x86, 0x31, 0x70, 0x0c,
- 0xf8, 0x08, 0x02, 0x75,
- 0xf8, 0x04, 0x02, 0x85,
- 0x78, 0x10, 0x52, 0x62,
- 0x40, 0x95, 0xf1, 0x67,
- 0x12, 0x74, 0x78, 0x08,
- 0x0a, 0x9f, 0xe0, 0xa0,
- 0x2c, 0x9f, 0xe1, 0x77,
- 0xe0, 0xc0, 0x0c, 0x84,
- 0x78, 0x04, 0x40, 0x95,
- 0x2e, 0x6f, 0x98, 0x6f,
- 0x40, 0x65, 0xd1, 0x87,
- 0x40, 0x85, 0xf0, 0x10,
- 0xc5, 0x3d, 0xf8, 0x0c,
- 0x0c, 0x0c, 0xf8, 0x75,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x18, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0xbe, 0x3e, 0xe0, 0x10,
- 0xc5, 0x27, 0x7c, 0x3e,
- 0xa7, 0x2b, 0x7e, 0x3e,
- 0x66, 0x8a, 0x46, 0x4a,
- 0x0a, 0x26, 0x83, 0x41,
- 0x18, 0x06, 0x00, 0x00,
- 0x82, 0x65, 0x80, 0x00,
- 0x81, 0x51, 0x25, 0x2b,
- 0x81, 0x41, 0x03, 0xc1,
- 0xa3, 0x2b, 0x80, 0xc5,
- 0x01, 0x51, 0x80, 0xf5,
- 0x81, 0x41, 0x81, 0xc1,
- 0xfc, 0xce, 0xbe, 0x5e,
- 0xc0, 0x08, 0xfe, 0x4e,
- 0x00, 0x34, 0x00, 0x13,
- 0x01, 0xb5, 0xfa, 0x80,
- 0x48, 0x4a, 0x81, 0x31,
- 0x0a, 0xf0, 0x61, 0x0a,
- 0x82, 0x31, 0xe4, 0x10,
- 0x0a, 0x45, 0xc4, 0x47,
- 0xc5, 0x46, 0xfc, 0x10,
- 0xfa, 0x80, 0x08, 0x34,
- 0xfc, 0x95, 0xc1, 0x4d,
- 0xa0, 0xf1, 0x01, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x1c, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0x85, 0x51, 0x60, 0x14,
- 0x7c, 0x3e, 0xbe, 0x3e,
- 0x27, 0x2b, 0xc5, 0x27,
- 0xe6, 0x8a, 0x48, 0x4a,
- 0x18, 0x16, 0x7e, 0x3e,
- 0x82, 0x05, 0x80, 0x00,
- 0x81, 0xc1, 0x25, 0x2b,
- 0xa3, 0x2b, 0x80, 0xa5,
- 0x01, 0x51, 0x80, 0xd5,
- 0xbe, 0x5e, 0x81, 0xc1,
- 0xfe, 0xce, 0xfc, 0x3e,
- 0x81, 0x31, 0x42, 0x08,
- 0x00, 0x44, 0x00, 0x13,
- 0x81, 0xa5, 0xfa, 0x80,
- 0x61, 0x0a, 0x48, 0x4a,
- 0xe4, 0x10, 0x0a, 0xf0,
- 0xc4, 0x47, 0x82, 0x31,
- 0xfc, 0x10, 0x0a, 0x45,
- 0x08, 0x34, 0xc5, 0x46,
- 0xc1, 0x4d, 0xfa, 0x80,
- 0x01, 0x01, 0xfc, 0x95,
- 0xdd, 0x93, 0xa0, 0xf1,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x0c, 0x07, 0xc6,
- 0xe1, 0x0c, 0x49, 0x06,
- 0x46, 0x06, 0x0c, 0xc4,
- 0x0c, 0x64, 0xe1, 0x0c,
- 0xe1, 0x0c, 0x46, 0x86,
- 0x4f, 0x86, 0x10, 0x54,
- 0x0c, 0x44, 0xe1, 0x0c,
- 0x1c, 0x34, 0x8b, 0x81,
- 0xe4, 0x60, 0x0e, 0x00,
- 0x1c, 0x98, 0x81, 0x75,
- 0xec, 0x04, 0x10, 0x80,
- 0xdd, 0x98, 0xf1, 0x96,
- 0xa1, 0x8b, 0xd9, 0x96,
- 0x18, 0x00, 0xfe, 0x35,
- 0x89, 0x61, 0x64, 0x74,
- 0x71, 0x78, 0x81, 0x55,
- 0xec, 0x04, 0x0c, 0x60,
- 0xa1, 0x6b, 0xd5, 0x76,
- 0x1d, 0x51, 0xfe, 0x75,
- 0x81, 0x55, 0x80, 0xcb,
- 0x0a, 0x50, 0x71, 0x68,
- 0xd1, 0x66, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x5b,
- 0x95, 0x41, 0x1c, 0x01,
- 0x41, 0x58, 0x81, 0x55,
- 0xec, 0x04, 0x08, 0x40,
- 0xa1, 0x4b, 0xcd, 0x56,
- 0x00, 0x20, 0xfe, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x80, 0x00, 0x34,
- 0x08, 0x00, 0x81, 0xc1,
- 0x00, 0x34, 0x6c, 0x04,
- 0x0a, 0x00, 0xe8, 0x88,
- 0x81, 0x01, 0x6c, 0x04,
- 0x81, 0x61, 0x03, 0x45,
- 0x0e, 0x54, 0xe9, 0x2d,
- 0x00, 0x04, 0x48, 0xb0,
- 0x82, 0x55, 0xdb, 0x80,
- 0xe8, 0xb0, 0x0e, 0x44,
- 0x00, 0x60, 0x00, 0x73,
- 0x00, 0x34, 0xe4, 0x30,
- 0x0e, 0x74, 0x68, 0x80,
- 0x0e, 0x03, 0xfb, 0x80,
- 0x86, 0xc1, 0x82, 0x61,
- 0xfa, 0xb5, 0x8d, 0x1b,
- 0x61, 0x04, 0x42, 0x06,
- 0x6b, 0xfc, 0x01, 0x0a,
- 0x04, 0x14, 0xc0, 0xff,
- 0xdb, 0x80, 0x00, 0x04,
- 0x04, 0x01, 0x00, 0x00,
- 0x04, 0x0c, 0xc0, 0x80,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x16, 0x00, 0x6b,
- 0x62, 0x98, 0xe0, 0x00,
- 0x0c, 0x09, 0xe8, 0x0c,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xe1, 0x0c, 0x42, 0x46,
- 0x0e, 0x60, 0x04, 0x14,
- 0xc0, 0xaf, 0x64, 0x31,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0x04, 0x06, 0xe2, 0x00,
- 0x71, 0x58, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xfc,
- 0x64, 0x38, 0x02, 0x60,
- 0x74, 0x78, 0x8e, 0x0b,
- 0x0c, 0x19, 0xef, 0xfc,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe4, 0x60, 0x00, 0x60,
- 0x6c, 0x41, 0x0c, 0x29,
- 0x81, 0x31, 0x40, 0x2b,
- 0x0c, 0x49, 0x81, 0x85,
- 0xa1, 0x4b, 0xfc, 0x04,
- 0x41, 0x16, 0x80, 0x75,
- 0x82, 0x11, 0x82, 0x31,
- 0xfe, 0x15, 0xc5, 0x3d,
- 0x6c, 0x3d, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x2b,
- 0x0c, 0x39, 0xe4, 0x74,
- 0x40, 0x2b, 0x6c, 0x45,
- 0x44, 0x62, 0x81, 0x41,
- 0x01, 0x95, 0xf0, 0x80,
- 0x88, 0x58, 0x9c, 0x21,
- 0x80, 0x75, 0xa1, 0x5b,
- 0x82, 0x41, 0x45, 0x06,
- 0x82, 0x21, 0x02, 0x01,
- 0xfe, 0x15, 0xc7, 0x4d,
- 0x6c, 0x45, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6c, 0x41, 0x0c, 0x19,
- 0x74, 0x78, 0xc0, 0x2b,
- 0x42, 0x98, 0xef, 0xfc,
- 0x8c, 0x0b, 0x68, 0x10,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x40, 0x1e, 0xf0,
- 0x40, 0x16, 0x00, 0x6b,
- 0x08, 0x9b, 0xe0, 0x04,
- 0x4c, 0x01, 0x86, 0xab,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x01, 0x01, 0x84, 0xbb,
- 0x5e, 0xb1, 0x82, 0x8b,
- 0x8a, 0x7b, 0x61, 0x30,
- 0x61, 0x20, 0x5e, 0xa1,
- 0xe2, 0x80, 0x02, 0x06,
- 0xe1, 0x10, 0x5e, 0x91,
- 0x9f, 0x0e, 0xa1, 0x0e,
- 0x5e, 0x01, 0x9d, 0x0e,
- 0x5e, 0x01, 0xe0, 0xd0,
- 0x5e, 0x01, 0xe0, 0xc0,
- 0x8c, 0x0b, 0x60, 0xb0,
- 0xe8, 0x0c, 0x5b, 0x68,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x3b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x69, 0xa8,
- 0x60, 0x90, 0x00, 0x84,
- 0xe1, 0x8c, 0x02, 0x84,
- 0x40, 0x00, 0x0d, 0x8e,
- 0x4e, 0x09, 0xf1, 0xc0,
- 0xe0, 0x04, 0x0e, 0x6a,
- 0x71, 0x84, 0x50, 0x02,
- 0x93, 0x7e, 0x8f, 0x01,
- 0x00, 0xb8, 0x95, 0x8e,
- 0x80, 0x00, 0x40, 0x01,
- 0xfa, 0x80, 0x00, 0x84,
- 0x15, 0x0e, 0x90, 0x01,
- 0x5e, 0x01, 0x91, 0x01,
- 0x9f, 0x01, 0x60, 0xb0,
- 0x40, 0xa2, 0x0f, 0x0e,
- 0xb2, 0x0f, 0xf9, 0xac,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x4f, 0x76, 0x1e, 0x89,
- 0x11, 0x8e, 0xe0, 0x00,
- 0xf0, 0xac, 0x50, 0xa2,
- 0x92, 0x83, 0x07, 0x65,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x4a, 0x58, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0x5e, 0xb1, 0xa1, 0x0b,
- 0x5e, 0xa1, 0xc1, 0x30,
- 0x5e, 0x91, 0xc1, 0x20,
- 0x15, 0x48, 0xc1, 0x10,
- 0x16, 0x0a, 0xc0, 0x00,
- 0x81, 0x01, 0x70, 0x00,
- 0x44, 0x04, 0x00, 0xb0,
- 0xf0, 0x00, 0x16, 0x4a,
- 0x62, 0x00, 0x02, 0x0c,
- 0xf0, 0x00, 0x14, 0x4a,
- 0x62, 0x00, 0x04, 0x0c,
- 0x14, 0x1a, 0x82, 0x83,
- 0x81, 0x11, 0x70, 0x00,
- 0x24, 0x05, 0x02, 0xa0,
- 0x84, 0x83, 0x40, 0x00,
- 0x70, 0x00, 0x12, 0x4a,
- 0x06, 0x0c, 0x81, 0x21,
- 0x12, 0x1a, 0x62, 0x00,
- 0x04, 0x90, 0xf0, 0x00,
- 0x40, 0x00, 0x24, 0x05,
- 0x04, 0x9b, 0x86, 0x83,
- 0x80, 0xbb, 0x82, 0xab,
- 0xf2, 0x65, 0xe8, 0x8d,
- 0x5e, 0xb1, 0x93, 0x04,
- 0x5e, 0xa1, 0xe1, 0x30,
- 0x11, 0x04, 0xe1, 0x20,
- 0x5e, 0x91, 0xa3, 0x0b,
- 0x5e, 0x07, 0xe1, 0x10,
- 0x15, 0x04, 0xe0, 0x3c,
- 0xe4, 0x20, 0x0e, 0x00,
- 0x1e, 0x75, 0x89, 0x7e,
- 0x16, 0x0a, 0x40, 0x20,
- 0x10, 0x74, 0xfb, 0xfc,
- 0xb0, 0x03, 0xfa, 0x80,
- 0x44, 0x00, 0x0c, 0x25,
- 0x15, 0x04, 0xf0, 0x7c,
- 0xe0, 0x80, 0x50, 0x0a,
- 0xa1, 0x2b, 0x88, 0x75,
- 0xa0, 0x01, 0x88, 0x85,
- 0x60, 0xd0, 0x5e, 0x01,
- 0xf3, 0xc0, 0x42, 0x00,
- 0x65, 0xc4, 0x02, 0x8a,
- 0x02, 0x80, 0x8e, 0x0b,
- 0x00, 0x80, 0x04, 0x3c,
- 0x5e, 0x11, 0x8c, 0x04,
- 0x83, 0x85, 0x80, 0xd0,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x44, 0x18, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x0f, 0x48, 0xa1, 0x0b,
- 0x9b, 0xa1, 0xc0, 0x00,
- 0xe1, 0x20, 0x5e, 0xa1,
- 0xa1, 0x2b, 0xf1, 0x45,
- 0x84, 0x40, 0x00, 0x00,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x16, 0xf0, 0x65, 0x00,
- 0x3e, 0x0e, 0xe4, 0xd0,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x04, 0xf0, 0x0b, 0x2e,
- 0x3c, 0xbe, 0xe5, 0x30,
- 0xe4, 0xb0, 0x0a, 0xf0,
- 0x8c, 0x0b, 0x01, 0x11,
- 0x68, 0x00, 0x4d, 0xe8,
- 0x1e, 0xa9, 0x8c, 0x3b,
- 0x14, 0x0a, 0x60, 0xc0,
- 0x86, 0x05, 0xfb, 0xfc,
- 0xe0, 0x80, 0x4e, 0x0a,
- 0x44, 0x3c, 0x02, 0x70,
- 0xcc, 0x04, 0x00, 0x70,
- 0xc0, 0xd0, 0x5e, 0x11,
- 0x8b, 0x04, 0x82, 0xb5,
- 0xe0, 0x40, 0x00, 0x0a,
- 0xc0, 0x28, 0x1e, 0x05,
- 0xc4, 0x40, 0x00, 0x00,
- 0x80, 0x28, 0x1e, 0x05,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xf0,
- 0x3e, 0x0e, 0xe5, 0x20,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x03, 0x11, 0xe4, 0xb0,
- 0x4b, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x60, 0xc0, 0x1e, 0x99,
- 0xfb, 0xfc, 0x12, 0x0a,
- 0x50, 0x4a, 0x86, 0xa5,
- 0x0e, 0x70, 0xe0, 0x80,
- 0x5e, 0x71, 0xcc, 0x04,
- 0x84, 0x95, 0xc0, 0xd0,
- 0xa1, 0x0b, 0x8b, 0x04,
- 0x80, 0x28, 0x1e, 0x05,
- 0x80, 0xd0, 0x5e, 0x01,
- 0x95, 0x04, 0x82, 0xa5,
- 0x5e, 0x01, 0xa0, 0x01,
- 0x42, 0x00, 0x60, 0xd0,
- 0x02, 0x8a, 0xf3, 0xc0,
- 0x0e, 0x80, 0xe5, 0xc4,
- 0x5e, 0x71, 0x8c, 0x08,
- 0x5e, 0x71, 0x80, 0xd0,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xe0,
- 0x3e, 0x0e, 0xe5, 0x10,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x05, 0x11, 0xe4, 0xb0,
- 0x48, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x80, 0x7b, 0x85, 0x81,
- 0x96, 0xd5, 0xa1, 0x7b,
- 0x8c, 0x3b, 0x13, 0x14,
- 0x1e, 0x19, 0x8f, 0x04,
- 0xa1, 0x1b, 0x60, 0xc0,
- 0x40, 0x10, 0x1e, 0x25,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfb, 0x80, 0x40, 0xa2,
- 0x7b, 0x80, 0x40, 0x92,
- 0xfa, 0x80, 0x02, 0x14,
- 0x40, 0x20, 0x5e, 0x25,
- 0xfb, 0x80, 0x42, 0x12,
- 0x04, 0x04, 0x91, 0x04,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0xe8, 0x04, 0x56, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x0b, 0x90, 0x35,
- 0x4c, 0xd8, 0x8c, 0x1b,
- 0x1e, 0x07, 0xe8, 0x00,
- 0x40, 0xc6, 0x60, 0x3c,
- 0x00, 0x04, 0xe1, 0x08,
- 0x01, 0x21, 0x85, 0x11,
- 0x02, 0x06, 0x81, 0x71,
- 0x00, 0x16, 0xc0, 0x00,
- 0xe1, 0x08, 0x41, 0x06,
- 0x02, 0x2c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x41, 0x86,
- 0x02, 0x0c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0xc6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x00, 0x06,
- 0x83, 0x11, 0x00, 0x04,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x00, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x8d, 0x34, 0x80, 0x26,
- 0x9f, 0x14, 0xa1, 0x04,
- 0x4c, 0x31, 0x9d, 0x24,
- 0xc0, 0x27, 0x67, 0xe1,
- 0x67, 0xe5, 0x4c, 0x01,
- 0x4c, 0x11, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xed, 0x4c, 0x21,
- 0x4c, 0x71, 0xc0, 0x27,
- 0x40, 0x27, 0x67, 0xf5,
- 0x13, 0x04, 0xa9, 0x31,
- 0x9f, 0x24, 0x8b, 0x41,
- 0x1d, 0x04, 0xa1, 0x14,
- 0x46, 0x16, 0xa1, 0x0b,
- 0x08, 0xf6, 0x40, 0x00,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xd0, 0x17, 0x66, 0x8e,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x80, 0x23, 0x82, 0x23,
- 0x69, 0x59, 0x4c, 0x25,
- 0x0e, 0x0b, 0xc0, 0x08,
- 0xe5, 0x40, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x93, 0x34, 0x8f, 0x3e,
- 0x8b, 0x75, 0x91, 0x64,
- 0x94, 0x88, 0x90, 0x98,
- 0x94, 0xf5, 0xd1, 0x9d,
- 0x50, 0x02, 0x18, 0xa8,
- 0x10, 0x79, 0xf0, 0xa4,
- 0x40, 0x27, 0x63, 0x41,
- 0x56, 0xa2, 0x83, 0xc1,
- 0x10, 0xb4, 0xf1, 0xa4,
- 0x4e, 0x70, 0x61, 0x90,
- 0x16, 0x84, 0xfb, 0xfc,
- 0x16, 0xc4, 0xfa, 0x80,
- 0x96, 0x7f, 0xe8, 0xac,
- 0x86, 0x75, 0xa1, 0x7b,
- 0x10, 0x8a, 0x0f, 0xc4,
- 0x0e, 0xb6, 0xf4, 0x10,
- 0x16, 0x16, 0x00, 0x00,
- 0x4e, 0x72, 0x80, 0x00,
- 0x0e, 0x74, 0x91, 0xa0,
- 0x18, 0x79, 0x9a, 0x80,
- 0x16, 0xb4, 0x7c, 0x24,
- 0x98, 0x93, 0x88, 0x9c,
- 0xa4, 0x76, 0xb6, 0x7f,
- 0x0e, 0x70, 0x88, 0x78,
- 0x88, 0x76, 0xec, 0x04,
- 0x82, 0x71, 0x8c, 0x74,
- 0x98, 0xa8, 0x8c, 0x7e,
- 0x7a, 0x80, 0x12, 0xa4,
- 0xec, 0x04, 0x0e, 0x10,
- 0x64, 0x80, 0x14, 0x90,
- 0x98, 0xa6, 0xe5, 0x7d,
- 0xa1, 0x1b, 0x84, 0x55,
- 0x14, 0x8a, 0x86, 0x55,
- 0x84, 0xf5, 0xf6, 0x00,
- 0x0e, 0x90, 0x4a, 0xa7,
- 0x50, 0xa0, 0xed, 0x44,
- 0xb0, 0x73, 0xf0, 0x80,
- 0x90, 0x78, 0x98, 0x76,
- 0xec, 0x04, 0x0e, 0x70,
- 0x81, 0xb5, 0x90, 0x76,
- 0xf3, 0xfc, 0x15, 0x0a,
- 0x0e, 0x90, 0x82, 0x15,
- 0x98, 0x76, 0xed, 0x88,
- 0x0e, 0x70, 0x90, 0x78,
- 0x90, 0x76, 0xec, 0x08,
- 0xa1, 0x8b, 0x88, 0x88,
- 0x81, 0xc5, 0xea, 0x15,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x43, 0x66, 0x40, 0x2b,
- 0x6d, 0xb8, 0xe0, 0x08,
- 0x4d, 0x66, 0x6f, 0xc0,
- 0xa1, 0x0b, 0xe0, 0x08,
- 0x81, 0x61, 0x80, 0x55,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x66, 0xb1, 0x04, 0x00,
- 0x91, 0x31, 0x40, 0x8b,
- 0x81, 0x41, 0x01, 0x55,
- 0x06, 0x30, 0x49, 0x4e,
- 0xa1, 0x3b, 0xec, 0x04,
- 0x01, 0x21, 0xfe, 0x95,
- 0x01, 0x51, 0x81, 0x31,
- 0x8b, 0x95, 0x81, 0x41,
- 0x10, 0x44, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xfa, 0x80,
- 0xf4, 0x08, 0x08, 0x8a,
- 0x88, 0x81, 0x04, 0x28,
- 0x81, 0x91, 0x3e, 0x4e,
- 0x0c, 0x24, 0x88, 0xab,
- 0x0e, 0x24, 0x61, 0x94,
- 0x04, 0x69, 0xe1, 0x9c,
- 0xe1, 0x84, 0x18, 0x24,
- 0x0e, 0x24, 0x2e, 0x6f,
- 0x08, 0x79, 0xe1, 0x8c,
- 0x2e, 0x6f, 0x90, 0xc9,
- 0x38, 0x6f, 0x9e, 0x29,
- 0x48, 0x67, 0xa9, 0xc1,
- 0x80, 0x00, 0x58, 0x16,
- 0x8b, 0x61, 0x2c, 0x2f,
- 0x00, 0x00, 0x0c, 0xf6,
- 0xfa, 0x80, 0x0e, 0x24,
- 0x4e, 0x0a, 0x85, 0x75,
- 0x86, 0x65, 0xe4, 0xa4,
- 0x7a, 0x80, 0x08, 0xa4,
- 0xf0, 0x00, 0x06, 0x5a,
- 0x70, 0x00, 0x06, 0x0a,
- 0x04, 0x1c, 0x98, 0xbb,
- 0x02, 0x54, 0x62, 0x00,
- 0x44, 0x47, 0xfa, 0x80,
- 0xdc, 0x00, 0x56, 0x60,
- 0x44, 0x02, 0x05, 0x1b,
- 0x04, 0x15, 0xf0, 0x90,
- 0x40, 0x08, 0x6b, 0xad,
- 0x80, 0x10, 0x16, 0x06,
- 0x44, 0x15, 0x96, 0x13,
- 0xc0, 0x08, 0x6b, 0xad,
- 0x60, 0x0c, 0x12, 0x1a,
- 0x0a, 0x0a, 0x82, 0x91,
- 0x54, 0x80, 0x7b, 0xfc,
- 0x0a, 0x0c, 0xbc, 0x00,
- 0xb1, 0x9b, 0xe2, 0x00,
- 0x7c, 0x24, 0xf6, 0x35,
- 0xbe, 0x44, 0x83, 0x39,
- 0x7c, 0x0c, 0x04, 0x0a,
- 0x02, 0x0c, 0x82, 0x21,
- 0x7e, 0x14, 0xe2, 0x00,
- 0x82, 0x11, 0x82, 0x43,
- 0xf4, 0x3c, 0x05, 0x0a,
- 0x01, 0x01, 0xe8, 0xc5,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x40, 0x56, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7c, 0x0e, 0x81, 0x01,
- 0x71, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0xc0, 0x2b, 0x65, 0xf9,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x01, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x9b,
- 0x4f, 0xf8, 0xc0, 0x00,
- 0x04, 0x06, 0x4f, 0x6c,
- 0x0c, 0x09, 0xc0, 0x18,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x88, 0xf5, 0xab, 0x0b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2c,
- 0xc2, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xef, 0xf4, 0x7a, 0xc8,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0x43, 0x06, 0x21, 0x7b,
- 0x83, 0x21, 0xef, 0xdc,
- 0x40, 0x00, 0x04, 0x26,
- 0xc4, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x82, 0x65, 0xc0, 0x2c,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x61, 0xa8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0xc0, 0x00, 0x0c, 0x38,
- 0x81, 0x11, 0x01, 0x71,
- 0x81, 0xa1, 0x13, 0x55,
- 0x12, 0xb4, 0x3e, 0x34,
- 0xd0, 0x9d, 0xfa, 0x80,
- 0x00, 0x4a, 0x9c, 0x35,
- 0x9a, 0xc5, 0xfb, 0xfc,
- 0x70, 0x00, 0x06, 0x0a,
- 0x01, 0x11, 0x96, 0x0b,
- 0x84, 0x05, 0x81, 0x21,
- 0xf0, 0x04, 0x06, 0x0a,
- 0x00, 0x00, 0x00, 0x06,
- 0x9c, 0x00, 0x42, 0xb0,
- 0x04, 0x06, 0x02, 0x25,
- 0x06, 0x0a, 0x80, 0x00,
- 0x82, 0xb5, 0xf0, 0x08,
- 0x81, 0x11, 0x01, 0x01,
- 0x4c, 0x01, 0x96, 0x2b,
- 0xc0, 0x27, 0x67, 0xe5,
- 0x67, 0xe9, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xed,
- 0x80, 0xf5, 0xa1, 0x7b,
- 0x6f, 0xf4, 0x76, 0x48,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x82, 0x45, 0xa1, 0x7b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x5d, 0xe8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x02, 0xf0, 0xa0, 0xf5,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x00, 0x4e, 0x88,
- 0x80, 0x7b, 0x7c, 0x04,
- 0x65, 0xf9, 0x0c, 0x19,
- 0x44, 0x86, 0x40, 0x2b,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x42, 0x0a, 0xe0, 0x0a,
- 0xcf, 0x07, 0xe0, 0x80,
- 0x84, 0x05, 0xfc, 0x0e,
- 0x7a, 0x80, 0x02, 0xa4,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x14, 0xc0, 0x9b,
- 0x04, 0x33, 0xe0, 0x88,
- 0x8c, 0x0e, 0x82, 0x23,
- 0xe4, 0x00, 0x44, 0xb1,
- 0x44, 0x11, 0xbc, 0x14,
- 0x0c, 0x1b, 0xe5, 0x00,
- 0x40, 0x15, 0x6a, 0xf9,
- 0xc3, 0x0d, 0x82, 0xa1,
- 0xd1, 0x9d, 0x86, 0x25,
- 0x07, 0xf5, 0x0c, 0x09,
- 0x16, 0xb0, 0x40, 0x27,
- 0xe6, 0x75, 0xc4, 0x04,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x88, 0x55, 0xe0, 0x0c,
- 0x41, 0x56, 0x03, 0xc5,
- 0xbc, 0x14, 0xe0, 0x00,
- 0x16, 0x0a, 0x83, 0xd5,
- 0x43, 0xf6, 0x70, 0x14,
- 0x86, 0x15, 0xe0, 0x0c,
- 0x02, 0x0a, 0xbc, 0x14,
- 0x84, 0x95, 0xf0, 0x0c,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x82, 0x15, 0xe0, 0x0c,
- 0xe0, 0x00, 0x41, 0x46,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x43, 0xf6, 0x40, 0x27,
- 0x03, 0x0a, 0xe0, 0x0c,
- 0x86, 0xd5, 0xf4, 0x0c,
- 0x67, 0xf5, 0x0c, 0x09,
- 0x00, 0x4a, 0xc0, 0x27,
- 0x86, 0x05, 0xfb, 0xfc,
- 0x67, 0xe1, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x02, 0x14, 0x3c, 0x1e,
- 0x41, 0xd8, 0xfa, 0x80,
- 0x80, 0x8b, 0xe8, 0x00,
- 0x16, 0x56, 0xeb, 0x8d,
- 0x00, 0x06, 0x00, 0x00,
- 0xd4, 0x65, 0x80, 0x00,
- 0xe0, 0x00, 0x41, 0x36,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x4c, 0xa1, 0xc0, 0x27,
- 0x40, 0x26, 0x6c, 0xf1,
- 0x73, 0xd8, 0x8c, 0x0b,
- 0x41, 0x06, 0xef, 0xb4,
- 0x81, 0x11, 0x6f, 0xdc,
- 0x0e, 0x0b, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0xcc,
- 0x67, 0xf1, 0x00, 0x59,
- 0xa7, 0x1b, 0x40, 0x27,
- 0x18, 0x24, 0x01, 0x31,
- 0x15, 0x3c, 0xe1, 0x8c,
- 0x05, 0x41, 0x8f, 0x61,
- 0x80, 0x04, 0x0f, 0x56,
- 0x02, 0x16, 0x04, 0x85,
- 0x25, 0x1b, 0x80, 0x00,
- 0xe0, 0x08, 0x4e, 0xa6,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x10, 0x06,
- 0x23, 0x1b, 0x82, 0x65,
- 0x02, 0x95, 0x81, 0x41,
- 0x03, 0x56, 0x81, 0x11,
- 0x83, 0x41, 0x60, 0x04,
- 0x81, 0x11, 0x29, 0x16,
- 0x12, 0xf0, 0x83, 0x81,
- 0xb0, 0x9f, 0xe4, 0x50,
- 0x38, 0x63, 0xa4, 0x76,
- 0xfb, 0xfc, 0x0a, 0x4a,
- 0x70, 0x1c, 0x58, 0x20,
- 0x0a, 0x64, 0x81, 0x21,
- 0xff, 0x61, 0x7a, 0x80,
- 0x00, 0x00, 0x04, 0x86,
- 0xe8, 0xb0, 0x18, 0x64,
- 0x08, 0x44, 0x05, 0x55,
- 0x4c, 0x12, 0xfa, 0x80,
- 0x10, 0xf0, 0x70, 0x88,
- 0x00, 0x63, 0xe4, 0x50,
- 0x0c, 0x79, 0x8b, 0x1b,
- 0x40, 0x27, 0x63, 0x41,
- 0xe1, 0xfc, 0x0c, 0x14,
- 0x0c, 0x64, 0x82, 0x63,
- 0x4c, 0x12, 0xfc, 0x00,
- 0x10, 0x69, 0xf1, 0x98,
- 0x4e, 0x72, 0x7c, 0x18,
- 0x0c, 0x7f, 0x98, 0x30,
- 0xa1, 0x7b, 0x81, 0x61,
- 0x50, 0x04, 0x50, 0x70,
- 0xc1, 0x84, 0x0e, 0x74,
- 0x4c, 0x62, 0x7e, 0x75,
- 0x06, 0x34, 0xd0, 0xa0,
- 0x88, 0x13, 0x7a, 0x80,
- 0x8a, 0x1d, 0x8c, 0x33,
- 0x00, 0x34, 0xf6, 0xa5,
- 0x0c, 0xcc, 0xfa, 0x80,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x59, 0x0c, 0x05,
- 0x91, 0x21, 0x40, 0x0a,
- 0x6e, 0x0d, 0x0c, 0x15,
- 0x5e, 0xb8, 0xc0, 0x09,
- 0x0c, 0x29, 0xef, 0xa8,
- 0x40, 0x2b, 0x65, 0x51,
- 0xe1, 0x18, 0x43, 0x46,
- 0x83, 0x51, 0x04, 0x14,
- 0x84, 0x18, 0x84, 0x48,
- 0x63, 0x7d, 0x0c, 0x35,
- 0x9e, 0x49, 0xc0, 0x0b,
- 0x8e, 0x19, 0xc9, 0x17,
- 0x02, 0x24, 0x23, 0x5f,
- 0x63, 0xf8, 0xe0, 0x90,
- 0x04, 0x54, 0x6f, 0xa8,
- 0x46, 0x78, 0xe8, 0x90,
- 0x80, 0x8b, 0x6f, 0xe8,
- 0x60, 0x10, 0x02, 0x06,
- 0x65, 0x98, 0x90, 0x2b,
- 0x8e, 0x3b, 0x6f, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4b, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xc0,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x64, 0xc1, 0x00, 0x39,
- 0x02, 0x16, 0x40, 0x2b,
- 0x40, 0x11, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x19, 0x83, 0x41,
- 0xc0, 0x15, 0x62, 0x19,
- 0x66, 0x35, 0x00, 0x2b,
- 0x00, 0x59, 0xc0, 0x16,
- 0xc0, 0x2b, 0x65, 0x0d,
- 0x6c, 0x75, 0x40, 0x11,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2b, 0x6c, 0x11,
- 0x70, 0x05, 0x44, 0x20,
- 0x40, 0x31, 0xc0, 0x80,
- 0x40, 0x2c, 0x6c, 0x7d,
- 0x7e, 0xf9, 0x44, 0x20,
- 0x00, 0x39, 0xc0, 0x79,
- 0xc0, 0x2b, 0x65, 0x09,
- 0x60, 0x94, 0x42, 0x4a,
- 0x40, 0x11, 0x85, 0x11,
- 0xc0, 0x22, 0x65, 0x95,
- 0x6d, 0x31, 0x40, 0x11,
- 0x02, 0x06, 0x40, 0x2c,
- 0x40, 0x41, 0xc0, 0x00,
- 0xc0, 0x2c, 0x6c, 0x8d,
- 0x6c, 0x85, 0x40, 0x51,
- 0x40, 0x23, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6d, 0x35, 0x40, 0x31,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x0c, 0x81,
- 0x0e, 0x19, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x2b, 0x0c, 0x59,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x14, 0x02, 0x29,
- 0x66, 0x35, 0x00, 0x3b,
- 0x84, 0x44, 0xc0, 0x16,
- 0x06, 0x34, 0x82, 0x29,
- 0x40, 0x45, 0xfc, 0x00,
- 0x40, 0x0b, 0x63, 0x15,
- 0x40, 0x33, 0xa4, 0x3f,
- 0x40, 0x16, 0x66, 0x35,
- 0xef, 0xdc, 0x08, 0x86,
- 0x60, 0x24, 0x02, 0x29,
- 0xfc, 0x0c, 0x06, 0x34,
- 0xc2, 0x27, 0x90, 0x58,
- 0x4a, 0x50, 0x04, 0x29,
- 0xa4, 0x5f, 0xf3, 0xf4,
- 0x02, 0x29, 0x90, 0x56,
- 0xc6, 0x27, 0xe0, 0x28,
- 0xa6, 0x2f, 0x90, 0x29,
- 0x66, 0x35, 0x40, 0x23,
- 0x04, 0x24, 0x40, 0x16,
- 0x02, 0x39, 0xfc, 0x10,
- 0xc8, 0x37, 0xe0, 0x2c,
- 0xa4, 0x3f, 0xa0, 0x39,
- 0x66, 0x35, 0x40, 0x33,
- 0x46, 0x30, 0x40, 0x16,
- 0xc0, 0xff, 0x73, 0x7d,
- 0xe0, 0x30, 0x02, 0x29,
- 0x44, 0x20, 0xca, 0x27,
- 0x00, 0x29, 0xf0, 0x80,
- 0x40, 0x2b, 0x64, 0xc5,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0x10, 0x02, 0x39,
- 0x40, 0x31, 0xa7, 0x2b,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x00, 0x29, 0x80, 0xf5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x4a,
- 0x02, 0x29, 0x82, 0x65,
- 0x02, 0x39, 0xe0, 0x18,
- 0x40, 0x21, 0xe0, 0x20,
- 0xc0, 0x2c, 0x6c, 0x79,
- 0x66, 0x31, 0x40, 0x33,
- 0x02, 0x29, 0xc0, 0x16,
- 0x00, 0x39, 0xe0, 0x3c,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0x6d, 0x39, 0x00, 0x59,
- 0x82, 0x29, 0xc0, 0x2c,
- 0xfc, 0x00, 0x06, 0x34,
- 0x60, 0x1c, 0x02, 0x29,
- 0x40, 0x31, 0xa4, 0x3f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xfc, 0x04, 0x06, 0x34,
- 0x60, 0x40, 0x02, 0x49,
- 0xf3, 0xf8, 0x4a, 0x50,
- 0x6c, 0x89, 0x40, 0x21,
- 0x04, 0x00, 0x40, 0x2c,
- 0xc0, 0x6e, 0x64, 0xc1,
- 0x84, 0x49, 0xc2, 0x47,
- 0x40, 0x41, 0xa6, 0x4f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xf3, 0xec, 0x48, 0x40,
- 0xe0, 0x44, 0x02, 0x39,
- 0xa6, 0x5f, 0x82, 0x39,
- 0x6d, 0x39, 0x40, 0x51,
- 0x02, 0x39, 0xc0, 0x2c,
- 0xc4, 0x37, 0xe0, 0x48,
- 0xa6, 0x4f, 0x88, 0x39,
- 0x6d, 0x21, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x4c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x46, 0x30, 0xca, 0x37,
- 0x48, 0x40, 0x70, 0x80,
- 0xa6, 0x4f, 0xf3, 0x7c,
- 0x6d, 0x15, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x50,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x08, 0x44, 0x82, 0x39,
- 0xa6, 0x4f, 0xfc, 0x00,
- 0x6d, 0x51, 0x40, 0x41,
- 0x08, 0x44, 0x40, 0x2c,
- 0x02, 0x39, 0xfc, 0x04,
- 0xc2, 0x37, 0xe0, 0x54,
- 0xa8, 0x3f, 0x84, 0x39,
- 0x6d, 0x51, 0x40, 0x31,
- 0x06, 0x34, 0x40, 0x2c,
- 0x02, 0x49, 0xfc, 0x08,
- 0xc4, 0x47, 0xe0, 0x58,
- 0xa8, 0x3f, 0x88, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x46, 0x30, 0x40, 0x2c,
- 0x02, 0x49, 0xf3, 0xdc,
- 0xc6, 0x47, 0xe0, 0x5c,
- 0xa8, 0x3f, 0x90, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x9f, 0x31, 0x40, 0x2c,
- 0x02, 0x49, 0x81, 0x65,
- 0x06, 0x30, 0x60, 0x34,
- 0xc9, 0x46, 0xec, 0x04,
- 0xfe, 0x55, 0xa1, 0x3b,
- 0xe0, 0x38, 0x02, 0x29,
- 0x68, 0xfd, 0x40, 0x21,
- 0x02, 0x19, 0xc0, 0x1b,
- 0x40, 0x11, 0xe0, 0x34,
- 0xc0, 0x22, 0x6f, 0xb9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0a, 0x6d, 0x65,
- 0x62, 0x19, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x65, 0xb9, 0x0c, 0x39,
- 0x3c, 0x0e, 0xc0, 0x2b,
- 0x11, 0x16, 0x81, 0x01,
- 0x0f, 0x36, 0x83, 0x11,
- 0x8b, 0x06, 0xa3, 0x2b,
- 0x82, 0x25, 0x8d, 0x16,
- 0x82, 0x85, 0xa7, 0x2b,
- 0x5e, 0x11, 0xa5, 0x2b,
- 0x04, 0x26, 0x00, 0x24,
- 0x80, 0x85, 0x80, 0x00,
- 0x45, 0xf6, 0x13, 0x06,
- 0x03, 0x45, 0xe0, 0x0c,
- 0x0c, 0x4b, 0x83, 0x31,
- 0x40, 0x15, 0x6e, 0x09,
- 0x0c, 0x25, 0xfd, 0x51,
- 0xc0, 0x0d, 0x69, 0x65,
- 0x21, 0x2b, 0xcb, 0x47,
- 0x06, 0x0c, 0x85, 0x21,
- 0xc8, 0x4b, 0x62, 0x00,
- 0x04, 0x16, 0x13, 0x36,
- 0x46, 0x42, 0xc0, 0x00,
- 0x0c, 0x49, 0xf9, 0x94,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x8b, 0x21, 0x09, 0x26,
- 0x00, 0x16, 0x27, 0x06,
- 0xc0, 0x40, 0x70, 0x11,
- 0x82, 0x49, 0x0b, 0x0e,
- 0x8c, 0x0b, 0x15, 0x36,
- 0x99, 0x36, 0x97, 0x36,
- 0x9d, 0x26, 0x9b, 0x16,
- 0xa1, 0x16, 0x9f, 0x46,
- 0xa5, 0x16, 0xa3, 0x16,
- 0xef, 0xfc, 0x69, 0x68,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x6d, 0x88,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x70, 0x00, 0x02, 0x16,
- 0xe0, 0x04, 0x04, 0x06,
- 0x81, 0x01, 0x00, 0x6b,
- 0x83, 0x11, 0x3e, 0x1e,
- 0x8b, 0x21, 0x11, 0x26,
- 0x9b, 0x16, 0xbc, 0x0e,
- 0x9f, 0x06, 0x9d, 0x26,
- 0xa3, 0x06, 0xa1, 0x16,
- 0xa7, 0x06, 0xa5, 0x06,
- 0xab, 0x16, 0xa9, 0x16,
- 0xaf, 0x06, 0xad, 0x16,
- 0x8c, 0x0b, 0x13, 0x06,
- 0x97, 0x16, 0x95, 0x16,
- 0x66, 0xd8, 0x99, 0x16,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x6a, 0xf8, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x61, 0xd1, 0x0c, 0x19,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0x19,
- 0x6d, 0x65, 0x0c, 0x05,
- 0x89, 0x16, 0xc0, 0x0a,
- 0x65, 0xb9, 0x0c, 0x19,
- 0x11, 0x36, 0xc0, 0x2b,
- 0x3c, 0x0e, 0x87, 0x31,
- 0x8f, 0x16, 0x81, 0x01,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x1b, 0x36, 0xc0, 0x2b,
- 0x8b, 0x06, 0x8d, 0x31,
- 0x82, 0x19, 0x0d, 0x26,
- 0x02, 0x16, 0x1f, 0x16,
- 0xc0, 0x40, 0x70, 0x11,
- 0xa1, 0x26, 0x9d, 0x36,
- 0xa5, 0x26, 0xa3, 0x26,
- 0x13, 0x06, 0xa7, 0x06,
- 0x8b, 0x1e, 0x8c, 0x0b,
- 0x97, 0x26, 0x95, 0x26,
- 0x63, 0x38, 0x99, 0x26,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x67, 0x58, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x81, 0x41, 0x40, 0x2b,
- 0x62, 0x19, 0x0c, 0x39,
- 0x0a, 0x16, 0x40, 0x15,
- 0xbc, 0x4e, 0xf0, 0x00,
- 0x61, 0x8c, 0x02, 0x04,
- 0x11, 0x36, 0x82, 0x09,
- 0xf8, 0x88, 0x42, 0x12,
- 0x8b, 0x31, 0x1f, 0x06,
- 0x8c, 0x0b, 0x3e, 0x5e,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa3, 0x46, 0xa1, 0x46,
- 0xa7, 0x16, 0xa5, 0x46,
- 0xab, 0x46, 0xa9, 0x26,
- 0xaf, 0x46, 0xad, 0x26,
- 0x95, 0x26, 0x93, 0x46,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x60, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x64, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x04, 0x16, 0x00, 0x6b,
- 0xc0, 0x04, 0x60, 0x11,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa1, 0x31, 0x40, 0x2b,
- 0x83, 0x21, 0x3e, 0x2e,
- 0x8b, 0x31, 0x11, 0x36,
- 0x60, 0x34, 0x00, 0x4a,
- 0x02, 0x0c, 0x81, 0x01,
- 0xbc, 0x0e, 0xe2, 0x00,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa1, 0x06, 0x9f, 0x06,
- 0xa5, 0x26, 0xa3, 0x06,
- 0xa9, 0x26, 0xa7, 0x16,
- 0x13, 0x06, 0xab, 0x06,
- 0xad, 0x26, 0x8c, 0x0b,
- 0x95, 0x26, 0xaf, 0x26,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x5d, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x61, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x74, 0x98, 0xe2, 0x80,
- 0x40, 0x46, 0xe8, 0x04,
- 0x0f, 0x86, 0x60, 0x04,
- 0x4c, 0x01, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x81, 0x95, 0x8c, 0x8b,
- 0x63, 0x81, 0x10, 0x09,
- 0x40, 0xf8, 0xc0, 0x27,
- 0x61, 0x06, 0xe8, 0x00,
- 0xec, 0x04, 0x0e, 0x70,
- 0xfc, 0xf5, 0xa1, 0x7b,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0xa9, 0x15, 0xf2, 0x0c,
- 0x61, 0x84, 0x04, 0x04,
- 0xe1, 0x8c, 0x02, 0x04,
- 0x70, 0x80, 0x44, 0x20,
- 0xf0, 0x3c, 0x48, 0x00,
- 0x60, 0x84, 0x06, 0x04,
- 0x28, 0x2f, 0xa0, 0x19,
- 0x46, 0x30, 0xc6, 0x07,
- 0xa2, 0x2f, 0x71, 0x00,
- 0x72, 0x00, 0x40, 0x00,
- 0x5d, 0x93, 0xa6, 0x2f,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x60, 0x04, 0x48, 0x26,
- 0x64, 0x0c, 0x4b, 0x06,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x0d, 0x48, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0x81, 0x15, 0x85, 0x31,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x47, 0x86, 0x86, 0x7b,
- 0x52, 0x46, 0x60, 0x04,
- 0x4c, 0x31, 0xe1, 0x2c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x38, 0xad, 0x7b,
- 0xe0, 0x39, 0x81, 0xb1,
- 0x00, 0x06, 0x00, 0x36,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x47, 0x96,
- 0x6c, 0x1d, 0x4c, 0x31,
- 0x83, 0x31, 0x40, 0x2b,
- 0xa4, 0x04, 0x80, 0x36,
- 0x86, 0x85, 0x80, 0xb6,
- 0x8a, 0x05, 0xa3, 0x7b,
- 0x8c, 0xc5, 0xa5, 0x7b,
- 0x90, 0x25, 0xa7, 0x7b,
- 0x92, 0xe5, 0xa9, 0x7b,
- 0x84, 0x45, 0xab, 0x7b,
- 0x96, 0xb5, 0xa1, 0x7b,
- 0x61, 0x2c, 0x01, 0x06,
- 0x80, 0x04, 0x9f, 0x11,
- 0x01, 0x46, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xe4,
- 0x01, 0x86, 0x8b, 0xa5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xfd, 0x80,
- 0x01, 0x06, 0x89, 0xc5,
- 0x9f, 0x11, 0x61, 0x2c,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0x46,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xe4, 0x42, 0x10,
- 0x80, 0x16, 0xc4, 0x19,
- 0x01, 0x06, 0x87, 0xc5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0xcc, 0x19, 0x80, 0x18,
- 0x85, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0x83, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0xfc, 0x94, 0x02, 0x14,
- 0x81, 0xd5, 0x80, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x59, 0x88,
- 0x9a, 0x85, 0xa3, 0x0b,
- 0xe1, 0x2c, 0x54, 0xc6,
- 0x80, 0x08, 0xa8, 0x04,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x82, 0xb5, 0xb1, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x58, 0x08,
- 0x94, 0x85, 0xa3, 0x0b,
- 0xe4, 0x7d, 0x24, 0x04,
- 0x88, 0xd5, 0x80, 0x18,
- 0x81, 0x21, 0x42, 0x19,
- 0x42, 0x86, 0x00, 0x16,
- 0x71, 0x98, 0xe0, 0x3c,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x34, 0x05, 0x46,
- 0xa8, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0x88, 0x24,
- 0x48, 0x0a, 0x84, 0x48,
- 0x80, 0x85, 0xe0, 0x80,
- 0xb5, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x8e, 0x15,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xb5, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x75,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x11, 0xb6,
- 0x03, 0xb6, 0x05, 0x75,
- 0x60, 0x19, 0xe0, 0x08,
- 0x00, 0x16, 0x81, 0x21,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x68, 0x00, 0x6f, 0x48,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa8, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0xe0, 0x90, 0x48, 0x0a,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xb3, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x75, 0xb3, 0x3b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xc6, 0x40, 0x2b,
- 0x03, 0xc6, 0xe0, 0x08,
- 0x52, 0xf8, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xbc,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x73, 0xd8, 0x81, 0x81,
- 0x24, 0x04, 0xe8, 0x00,
- 0xe0, 0x08, 0x02, 0xf6,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x14,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x18, 0xc0, 0x2b,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x18,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x04, 0x48, 0x56,
- 0x64, 0x20, 0x0b, 0x86,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x08, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0xdb, 0x75, 0x8d, 0x31,
- 0x64, 0x31, 0x49, 0x06,
- 0x4b, 0xc6, 0x40, 0x20,
- 0xc0, 0x20, 0x64, 0x39,
- 0xcd, 0xc8, 0x81, 0x35,
- 0x8b, 0x4b, 0xd1, 0xc6,
- 0x8b, 0x31, 0xfe, 0xb5,
- 0xc1, 0xc3, 0xd9, 0xa5,
- 0xe0, 0x04, 0x44, 0x76,
- 0x6c, 0x1d, 0x40, 0x21,
- 0x41, 0xc6, 0x40, 0x2b,
- 0xc0, 0x20, 0x64, 0x39,
- 0x05, 0xc6, 0x01, 0x65,
- 0xc0, 0x20, 0x64, 0x3d,
- 0xc1, 0x36, 0xc5, 0x38,
- 0xfe, 0xb5, 0x85, 0x0b,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x81, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0x9a, 0x66, 0xf1,
- 0x64, 0x0d, 0x51, 0x06,
- 0xa1, 0x91, 0x40, 0x20,
- 0xe1, 0x08, 0x81, 0x75,
- 0xef, 0xfc, 0x67, 0xc8,
- 0x12, 0x90, 0x5d, 0x06,
- 0xa1, 0x9b, 0xec, 0x04,
- 0x8c, 0x0b, 0xfe, 0x35,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x87, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x69, 0x28,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x64, 0x21, 0x11, 0x86,
- 0x13, 0x86, 0x40, 0x20,
- 0x81, 0x75, 0xe0, 0x10,
- 0x65, 0xd8, 0xe1, 0x08,
- 0x5d, 0x06, 0xef, 0xfc,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x35, 0xa1, 0x9b,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x42, 0x36,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0xb1, 0x40, 0x2b,
- 0x61, 0x30, 0x55, 0xc6,
- 0x00, 0xb6, 0x81, 0x91,
- 0xe1, 0x34, 0x10, 0xc6,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x34, 0x00, 0x06,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x9e, 0x19, 0x80, 0x18,
- 0xff, 0x40, 0x42, 0x10,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa0, 0x04, 0x80, 0x96,
- 0xa1, 0x0b, 0x80, 0x08,
- 0x01, 0x46, 0x80, 0xf5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xbb, 0x0b, 0x80, 0x04,
- 0x0c, 0x29, 0x82, 0xb5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xa6,
- 0x60, 0x08, 0x03, 0xa6,
- 0x46, 0xb8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x28, 0x04, 0x8a, 0x45,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x00, 0xb6, 0x81, 0x21,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x00, 0xc6, 0xe8, 0x00,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa0, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0x80, 0x85, 0xa1, 0x4b,
- 0xbd, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x84, 0x75,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xbd, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xc6,
- 0x60, 0x08, 0x03, 0xc6,
- 0x44, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x81, 0x71, 0x80, 0x45,
- 0xe8, 0x00, 0x65, 0x28,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x96, 0x80, 0x04,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x00, 0x25, 0xa1, 0x1b,
- 0x00, 0x0b, 0x05, 0x21,
- 0x81, 0x2c, 0x43, 0xc6,
- 0x80, 0x00, 0x02, 0x15,
- 0x80, 0x00, 0x42, 0x25,
- 0xa3, 0x1b, 0x80, 0xc5,
- 0xa5, 0x1b, 0x80, 0x85,
- 0x83, 0x65, 0x82, 0x25,
- 0x65, 0x31, 0x00, 0x25,
- 0x02, 0x06, 0x40, 0x0b,
- 0x84, 0x14, 0xe1, 0x30,
- 0x00, 0x25, 0x84, 0x2e,
- 0x40, 0x0b, 0x65, 0x21,
- 0xe1, 0x2c, 0x43, 0xc6,
- 0x04, 0x2e, 0x84, 0x14,
- 0xe1, 0x30, 0x02, 0x06,
- 0x65, 0x31, 0x00, 0x05,
- 0x84, 0x14, 0xc0, 0x0b,
- 0xdd, 0x93, 0x84, 0x0e,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x18, 0x04, 0x46,
- 0x08, 0x34, 0xa5, 0x1b,
- 0x8c, 0x46, 0x81, 0x41,
- 0xa3, 0x1b, 0x88, 0x25,
- 0x43, 0x06, 0x10, 0x25,
- 0xa1, 0x1b, 0x81, 0x2c,
- 0x00, 0x39, 0x9a, 0x35,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x4b, 0xb6, 0x04, 0x14,
- 0x89, 0xc1, 0xe0, 0x0c,
- 0x84, 0x48, 0x82, 0x39,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x87, 0x31, 0x26, 0x4f,
- 0x43, 0x76, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x0c,
- 0x40, 0x2d, 0x65, 0x31,
- 0x65, 0x31, 0x00, 0x00,
- 0x07, 0xd5, 0xc0, 0xb5,
- 0x00, 0x49, 0xc2, 0x47,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x82, 0x49, 0x84, 0x34,
- 0x4a, 0x50, 0x8c, 0x58,
- 0xa8, 0x5f, 0xf3, 0xf8,
- 0x84, 0x34, 0x8c, 0x56,
- 0x65, 0x31, 0x00, 0x49,
- 0x8c, 0x58, 0xc0, 0x2d,
- 0x88, 0x49, 0xc2, 0x47,
- 0xf3, 0xec, 0x4a, 0x50,
- 0x8c, 0x56, 0xa8, 0x5f,
- 0x00, 0x49, 0x84, 0x34,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xc2, 0x47, 0x8c, 0x58,
- 0x4a, 0x50, 0x90, 0x49,
- 0xa8, 0x5f, 0xf3, 0xdc,
- 0x04, 0x14, 0x8c, 0x56,
- 0xe0, 0x08, 0x4b, 0xf6,
- 0x65, 0x35, 0x00, 0x39,
- 0x18, 0x06, 0x40, 0x2d,
- 0x84, 0x48, 0xe0, 0x04,
- 0xa0, 0x39, 0xc8, 0x37,
- 0xf3, 0xbc, 0x48, 0x40,
- 0x8f, 0x31, 0x26, 0x4f,
- 0x43, 0xf6, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x04,
- 0x40, 0x2d, 0x65, 0x35,
- 0x65, 0x35, 0x00, 0x00,
- 0xca, 0x47, 0xc0, 0xb5,
- 0x61, 0x2c, 0x4d, 0x06,
- 0x18, 0x74, 0x98, 0x4f,
- 0xfa, 0x80, 0x06, 0x34,
- 0x8a, 0x8f, 0x9c, 0x88,
- 0x9c, 0x86, 0xa8, 0x8f,
- 0x80, 0x08, 0x98, 0x44,
- 0xc5, 0x07, 0x90, 0x58,
- 0x27, 0x0f, 0x82, 0x09,
- 0xa0, 0x5f, 0x82, 0x5f,
- 0x08, 0x04, 0x90, 0x56,
- 0x80, 0x16, 0x83, 0x11,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x88, 0x04, 0x14,
- 0xe1, 0x98, 0x47, 0x86,
- 0x86, 0x19, 0x0c, 0x54,
- 0x60, 0x90, 0x08, 0x24,
- 0x64, 0xb0, 0x06, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x0a, 0x43, 0xc4, 0x47,
- 0x81, 0xd5, 0x81, 0x51,
- 0x18, 0xc0, 0x5d, 0x84,
- 0x4c, 0x85, 0xec, 0x04,
- 0xa1, 0xcb, 0xf0, 0x10,
- 0x20, 0x31, 0xfe, 0x55,
- 0x08, 0x40, 0x82, 0x51,
- 0xc0, 0x01, 0x64, 0x01,
- 0x18, 0x46, 0xa5, 0x5b,
- 0x4c, 0x40, 0x40, 0x00,
- 0x7c, 0x95, 0xdc, 0x00,
- 0xdc, 0x00, 0x4e, 0x30,
- 0x61, 0x98, 0x46, 0x86,
- 0xe0, 0x00, 0x4b, 0x86,
- 0x65, 0x16, 0x44, 0x2a,
- 0x64, 0x00, 0x00, 0x00,
- 0x0c, 0x34, 0xc0, 0x8c,
- 0xe0, 0x0c, 0x48, 0x06,
- 0x81, 0x51, 0x03, 0x35,
- 0x65, 0x12, 0x4c, 0x5a,
- 0xf0, 0xb0, 0x4e, 0x12,
- 0x00, 0x65, 0x84, 0x63,
- 0x8c, 0x73, 0x7c, 0x30,
- 0x88, 0xc1, 0x44, 0x77,
- 0x9c, 0x6e, 0x86, 0x73,
- 0xe0, 0xe0, 0x18, 0x0a,
- 0x70, 0x01, 0xfc, 0x55,
- 0xb5, 0x5b, 0x82, 0x51,
- 0x18, 0x06, 0x7e, 0x55,
- 0x81, 0x01, 0xc0, 0x00,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x88, 0x06, 0x14,
- 0xe0, 0x08, 0x0b, 0x06,
- 0x93, 0x21, 0x06, 0x19,
- 0x66, 0x96, 0x4a, 0x3a,
- 0xe0, 0x90, 0x08, 0x34,
- 0x66, 0x8a, 0x58, 0x1a,
- 0x65, 0xb0, 0x0c, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x81, 0xc1, 0x18, 0x53,
- 0x0e, 0x60, 0x83, 0x75,
- 0x89, 0x81, 0x64, 0x40,
- 0x8a, 0xab, 0x08, 0x9b,
- 0x59, 0xae, 0x81, 0x85,
- 0xec, 0x04, 0x10, 0x80,
- 0x60, 0x1c, 0x4c, 0x95,
- 0x88, 0x91, 0xc8, 0xa1,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x0a, 0x50, 0x02, 0xc1,
- 0xc0, 0x02, 0x65, 0x01,
- 0x65, 0x00, 0x08, 0x40,
- 0xa5, 0xcb, 0x8e, 0x6b,
- 0x4b, 0x86, 0xfa, 0x35,
- 0x08, 0x00, 0x60, 0x00,
- 0xc0, 0x90, 0x65, 0x80,
- 0x65, 0x16, 0x46, 0x3a,
- 0xe0, 0x0c, 0x40, 0x06,
- 0x81, 0x51, 0x03, 0x55,
- 0x65, 0x02, 0x4e, 0x5a,
- 0xf0, 0x98, 0x50, 0x12,
- 0x70, 0x98, 0x52, 0x42,
- 0x86, 0x73, 0x88, 0x61,
- 0x4e, 0x8a, 0x8e, 0x83,
- 0xa4, 0x7e, 0xe6, 0x8a,
- 0xe2, 0x30, 0x52, 0x85,
- 0xe0, 0xe0, 0x0c, 0x0a,
- 0x02, 0x51, 0xfc, 0x15,
- 0xb5, 0x5b, 0x98, 0x4b,
- 0x44, 0xe0, 0x18, 0x40,
- 0xc0, 0x00, 0x0c, 0x06,
- 0x81, 0x01, 0xfc, 0xd5,
- 0xf0, 0x3c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x44, 0x68,
- 0x8c, 0x0b, 0x80, 0x6b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0xf0, 0x05, 0xe8,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x28, 0x65, 0x41,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x2b, 0x66, 0x11,
- 0x61, 0x08, 0x03, 0x86,
- 0x84, 0x14, 0x9d, 0x21,
- 0x03, 0x06, 0x04, 0x26,
- 0x04, 0x24, 0xe1, 0x08,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x14, 0x45, 0x06,
- 0x88, 0x38, 0x88, 0x24,
- 0x08, 0x36, 0xc8, 0x39,
- 0x60, 0x01, 0x06, 0x06,
- 0x00, 0x25, 0xc0, 0x40,
- 0xc0, 0x0a, 0x6e, 0xf1,
- 0xa1, 0x21, 0x47, 0x2d,
- 0x08, 0x05, 0x00, 0x29,
- 0x01, 0x46, 0x00, 0x27,
- 0x80, 0x04, 0xe1, 0x28,
- 0x01, 0x06, 0x00, 0x26,
- 0x80, 0x04, 0xe1, 0x28,
- 0xdd, 0x93, 0x80, 0x16,
- 0xe1, 0x28, 0x03, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x87, 0x2b, 0x84, 0x38,
- 0x02, 0x20, 0xfe, 0xb5,
- 0x40, 0x11, 0xed, 0x5c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x43, 0x56,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x39, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x60, 0x08, 0x43, 0x66,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x59, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0x60, 0x08, 0x43, 0x96,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x35,
- 0x62, 0xf1, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x1b, 0x65, 0x5d,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0x06, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0xc6, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0xc6, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x01, 0x86, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x61, 0x38, 0x4b, 0xc6,
- 0x14, 0x34, 0x85, 0x61,
- 0x8c, 0x48, 0xa1, 0x2b,
- 0xf3, 0xec, 0x48, 0x40,
- 0x48, 0x46, 0x0c, 0x46,
- 0x10, 0xc4, 0xe1, 0x44,
- 0xb0, 0x36, 0x81, 0x31,
- 0xb0, 0x66, 0x90, 0xc4,
- 0x30, 0x36, 0x90, 0xc4,
- 0xe1, 0x44, 0x58, 0x86,
- 0x6e, 0x01, 0x00, 0x0b,
- 0xb0, 0xc4, 0xc0, 0x15,
- 0x66, 0x86, 0x40, 0x0a,
- 0xb0, 0x0e, 0x87, 0x11,
- 0x00, 0x16, 0x90, 0x04,
- 0xe1, 0x3c, 0x00, 0x06,
- 0x84, 0xc8, 0x80, 0x14,
- 0x84, 0xc6, 0xc8, 0xc9,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x94, 0x04, 0x80, 0x16,
- 0xc8, 0x19, 0x80, 0x18,
- 0x80, 0xe5, 0x80, 0x16,
- 0x80, 0x18, 0x90, 0x04,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x80, 0x36, 0xfe, 0xa5,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x44, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x43, 0xe6, 0x02, 0x9b,
- 0x08, 0x6b, 0xe0, 0x04,
- 0x40, 0x11, 0x86, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0xb8, 0x84, 0x8b,
- 0x42, 0x06, 0xe8, 0x00,
- 0xc2, 0x67, 0x61, 0x18,
- 0x84, 0x69, 0x04, 0x14,
- 0x42, 0x46, 0x04, 0x96,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x86, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x06, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x10,
- 0x44, 0x20, 0x84, 0x28,
- 0xac, 0x2f, 0xf3, 0xf4,
- 0x0c, 0x0c, 0x84, 0x26,
- 0x83, 0xf5, 0xf2, 0x9c,
- 0x61, 0x14, 0x41, 0x06,
- 0xe1, 0x14, 0x47, 0x86,
- 0x81, 0x41, 0x00, 0x14,
- 0x84, 0x18, 0x84, 0x28,
- 0xcb, 0x27, 0x8c, 0x34,
- 0x82, 0x19, 0x04, 0x29,
- 0xa4, 0x1f, 0x0c, 0x5a,
- 0x80, 0x34, 0x8c, 0x4c,
- 0x8c, 0x48, 0xe0, 0x57,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x00, 0x34, 0x8c, 0x46,
- 0xf9, 0x84, 0x40, 0x52,
- 0x42, 0x40, 0x8c, 0x48,
- 0x8c, 0x16, 0xf2, 0xfc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x14, 0x43, 0x86,
- 0xe1, 0xc0, 0x04, 0x04,
- 0x48, 0x00, 0x04, 0x14,
- 0xca, 0x07, 0xf0, 0x04,
- 0xf1, 0x00, 0x40, 0x00,
- 0x43, 0x06, 0x04, 0x2c,
- 0x84, 0x24, 0xe1, 0x14,
- 0x46, 0x30, 0x88, 0x38,
- 0xa8, 0x3f, 0xf3, 0xf8,
- 0x84, 0x14, 0x88, 0x36,
- 0x44, 0x20, 0x84, 0x28,
- 0xa0, 0x2f, 0xf2, 0xfc,
- 0xdd, 0x93, 0x84, 0x26,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x9b,
- 0x06, 0x6b, 0xe0, 0x04,
- 0x52, 0x01, 0x84, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7b, 0xd8, 0x82, 0x8b,
- 0x12, 0x29, 0xef, 0xfc,
- 0x40, 0x2c, 0x6e, 0x95,
- 0xe1, 0x1c, 0x02, 0x46,
- 0xc8, 0x87, 0x04, 0x14,
- 0x71, 0xc0, 0x48, 0x80,
- 0x04, 0x26, 0x9e, 0x79,
- 0xe1, 0x18, 0x43, 0x46,
- 0x88, 0x38, 0x84, 0x24,
- 0xf2, 0x3c, 0x46, 0x30,
- 0x88, 0x36, 0xa8, 0x3f,
- 0x84, 0x28, 0x84, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x04, 0x26, 0xae, 0x2f,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x84, 0x66, 0x84, 0x14,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0xa5,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x65, 0x35, 0x0e, 0x39,
- 0x0e, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x3d, 0x0e, 0x19,
- 0x7c, 0x58, 0xc0, 0x2b,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0x66, 0xb8, 0x8c, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x00, 0x27, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x41, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x43, 0xa6,
- 0x6f, 0xfc, 0x7d, 0x88,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xa4, 0xd5, 0xa1, 0x7b,
- 0x65, 0x3d, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x35, 0x0c, 0x09,
- 0x64, 0xb8, 0xc0, 0x2b,
- 0x00, 0x8b, 0xef, 0xa0,
- 0xe1, 0x04, 0x01, 0x46,
- 0x90, 0x2b, 0x00, 0x04,
- 0x0c, 0xa5, 0x80, 0x94,
- 0xc0, 0x09, 0x6e, 0x0d,
- 0x65, 0x41, 0x0c, 0x39,
- 0x92, 0x0b, 0xc0, 0x2b,
- 0x6f, 0xa0, 0x64, 0x88,
- 0x4c, 0x05, 0x94, 0x1b,
- 0x40, 0x0b, 0x63, 0x6d,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x49,
- 0x63, 0xd8, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x63, 0x65, 0x4c, 0x05,
- 0x92, 0x0b, 0x40, 0x0b,
- 0x65, 0x45, 0x0c, 0x39,
- 0x94, 0x1b, 0x40, 0x2b,
- 0x6f, 0xa0, 0x63, 0x28,
- 0x4c, 0x05, 0x90, 0x2b,
- 0x40, 0x0b, 0x63, 0x71,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x4d,
- 0x62, 0x78, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x6d, 0x59, 0x0c, 0x15,
- 0x91, 0x21, 0x40, 0x0a,
- 0x63, 0x69, 0x4c, 0x05,
- 0x02, 0x0b, 0xc0, 0x0b,
- 0x5e, 0xf8, 0x94, 0x1b,
- 0x4c, 0x05, 0xef, 0xa0,
- 0x40, 0x06, 0x6d, 0x49,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x4c, 0x05, 0x84, 0x14,
- 0xc0, 0x08, 0x69, 0x41,
- 0x6b, 0x1d, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x08,
- 0xc0, 0x08, 0x6b, 0xf1,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x1b, 0x65, 0x71,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x65, 0x51,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x6c, 0xa1,
- 0x43, 0x46, 0x04, 0x08,
- 0x84, 0x14, 0xe1, 0x18,
- 0x6f, 0xf1, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x1b, 0x65, 0x75,
- 0x9e, 0x09, 0x84, 0x08,
- 0x65, 0x55, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x22, 0x6c, 0xa5,
- 0x9e, 0x09, 0x84, 0x08,
- 0x6f, 0xf5, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x79, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x1b,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x59, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6c, 0xa9, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6f, 0xf9, 0x4c, 0x01,
- 0x40, 0x78, 0xc0, 0x22,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x68, 0xb1, 0x00, 0x1b,
- 0x06, 0x0e, 0x40, 0x0a,
- 0xc3, 0xd0, 0x64, 0x01,
- 0xe1, 0x84, 0x04, 0x14,
- 0x6c, 0x79, 0x00, 0x39,
- 0x86, 0x23, 0x40, 0x2c,
- 0xe0, 0x06, 0x42, 0x2a,
- 0xe1, 0x84, 0x04, 0x34,
- 0x42, 0x2a, 0x82, 0x23,
- 0x00, 0x2b, 0xe0, 0x0e,
- 0xc0, 0x0a, 0x68, 0xb5,
- 0x02, 0x06, 0xc4, 0x1d,
- 0x42, 0x12, 0x80, 0x00,
- 0x40, 0x15, 0xd1, 0x88,
- 0xc0, 0x0b, 0x63, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x64, 0xc1,
- 0x65, 0x51, 0x0c, 0x99,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0xc9,
- 0xec, 0x04, 0x00, 0x10,
- 0xc7, 0x97, 0x65, 0x0d,
- 0x81, 0x01, 0x02, 0x15,
- 0x0c, 0x09, 0xa7, 0x1b,
- 0xc0, 0x2c, 0x0e, 0x31,
- 0x83, 0x01, 0x80, 0xb5,
- 0x6e, 0x31, 0x4c, 0x01,
- 0x0c, 0x09, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x8e, 0x93, 0x02, 0x75,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x05, 0x4d, 0x00, 0x60,
- 0x01, 0xc5, 0x80, 0xad,
- 0x05, 0x49, 0x00, 0x60,
- 0x40, 0x4a, 0xc0, 0xad,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x88, 0xc0, 0xad,
- 0x6f, 0xa0, 0x4e, 0x08,
- 0x02, 0x94, 0x90, 0x0b,
- 0x81, 0x41, 0x7a, 0x80,
- 0x61, 0x02, 0x46, 0x1a,
- 0x10, 0x1b, 0x8c, 0x0b,
- 0x64, 0xb8, 0x8e, 0x2b,
- 0x0c, 0x09, 0xef, 0xfc,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0xc8, 0x07, 0xc0, 0x2b,
- 0x6a, 0xa9, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x0d,
- 0xc0, 0x11, 0x62, 0x99,
- 0x66, 0x49, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x11,
- 0x40, 0x11, 0x67, 0xf1,
- 0x52, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0x85,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x6e, 0x31, 0x00, 0x19,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0x82, 0x45, 0xa1, 0x1b,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x05, 0xa1, 0x04, 0x00,
- 0x01, 0xc5, 0x80, 0xb3,
- 0x05, 0x91, 0x04, 0x00,
- 0x42, 0x4a, 0xc0, 0xb3,
- 0x04, 0x00, 0xe0, 0x8c,
- 0x80, 0xb3, 0x05, 0xc1,
- 0x05, 0xb1, 0x04, 0x00,
- 0x00, 0x69, 0xc0, 0xb3,
- 0xc0, 0x2b, 0x64, 0xcd,
- 0x00, 0x5b, 0x88, 0x24,
- 0xc0, 0x15, 0x6a, 0xd1,
- 0x6a, 0xe1, 0x00, 0x4b,
- 0xa3, 0x6b, 0x40, 0x15,
- 0x68, 0xc9, 0x00, 0xcb,
- 0x00, 0x3b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0xcd,
- 0x04, 0x61, 0x00, 0x65,
- 0x84, 0xc5, 0x80, 0x05,
- 0x00, 0x65, 0xa5, 0x6b,
- 0x80, 0x05, 0x04, 0x5d,
- 0x00, 0x75, 0x84, 0x25,
- 0x40, 0x0b, 0x63, 0x75,
- 0x02, 0x85, 0xa7, 0x6b,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x64, 0x5d, 0x00, 0x65,
- 0xcc, 0x7d, 0xc0, 0x05,
- 0x04, 0x61, 0x00, 0x65,
- 0x4c, 0x62, 0x80, 0x05,
- 0x42, 0x4a, 0x9a, 0x9c,
- 0xd8, 0xc7, 0x60, 0x8c,
- 0x02, 0x64, 0x02, 0xe5,
- 0x58, 0x57, 0xe0, 0xb0,
- 0x4a, 0x5a, 0xd8, 0x47,
- 0x48, 0x4a, 0xe0, 0x0a,
- 0x40, 0x55, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x79,
- 0x63, 0x7d, 0x40, 0x45,
- 0x48, 0x1a, 0xc0, 0x0b,
- 0xd8, 0x1d, 0x60, 0x0a,
- 0x42, 0x12, 0x58, 0x37,
- 0x40, 0x45, 0xd1, 0xb0,
- 0x40, 0x0b, 0x63, 0x81,
- 0x48, 0x1a, 0x81, 0x41,
- 0x42, 0x3a, 0xc0, 0x0a,
- 0x40, 0x45, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x85,
- 0x63, 0x89, 0x40, 0x15,
- 0x81, 0x01, 0x40, 0x0b,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x00, 0xb6, 0x00, 0x8b,
- 0x50, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x06, 0x7b, 0x88, 0xab,
- 0x4e, 0x18, 0x84, 0x9b,
- 0x82, 0x0b, 0x6f, 0xa0,
- 0x6f, 0xa0, 0x4f, 0x68,
- 0x21, 0x0b, 0x80, 0x6b,
- 0x02, 0x06, 0xff, 0x11,
- 0xa3, 0xab, 0x00, 0x00,
- 0x82, 0x03, 0x02, 0xe5,
- 0x82, 0x95, 0xd3, 0x0d,
- 0x84, 0xa5, 0xa3, 0x7b,
- 0x50, 0x95, 0xa1, 0x7b,
- 0xc0, 0x0b, 0x05, 0x21,
- 0x50, 0x95, 0x84, 0x15,
- 0xc0, 0x0b, 0x65, 0x21,
- 0xa3, 0x7b, 0x83, 0x35,
- 0xa1, 0x7b, 0x82, 0xc5,
- 0x05, 0x21, 0x50, 0x05,
- 0x82, 0x35, 0xc0, 0x0b,
- 0x65, 0x21, 0x50, 0x05,
- 0x81, 0x85, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x95,
- 0x81, 0x45, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x05,
- 0x10, 0x0b, 0xc0, 0x0b,
- 0x73, 0x18, 0x8e, 0x1b,
- 0x5a, 0x18, 0xef, 0xf8,
- 0x0e, 0x64, 0x6f, 0xfc,
- 0x43, 0x86, 0xe1, 0xa0,
- 0x84, 0x14, 0xe1, 0x18,
- 0x43, 0xc6, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x18,
- 0x0c, 0x0c, 0x84, 0x66,
- 0x1b, 0x18, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x42, 0x27,
- 0x04, 0x24, 0x84, 0x21,
- 0x06, 0x24, 0xfa, 0x80,
- 0x82, 0x33, 0xe1, 0x84,
- 0x60, 0x0a, 0x4e, 0x3a,
- 0x00, 0x29, 0xc6, 0x2d,
- 0x40, 0x2b, 0x0c, 0x1d,
- 0xc0, 0x08, 0x42, 0x96,
- 0xcf, 0xb4, 0x73, 0xe8,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x31, 0x7d, 0x09,
- 0xe0, 0x1e, 0x40, 0x0a,
- 0xe5, 0x1a, 0x42, 0x0a,
- 0xe5, 0x9a, 0x44, 0x0a,
- 0x64, 0x81, 0x00, 0x10,
- 0x42, 0x22, 0xc7, 0xa1,
- 0x04, 0x0e, 0x72, 0x8c,
- 0xc0, 0x03, 0x74, 0x24,
- 0x6f, 0x5c, 0x74, 0x88,
- 0x0c, 0x4c, 0x81, 0x31,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x01, 0x0c, 0x12,
- 0x81, 0x11, 0x40, 0x28,
- 0x6f, 0x60, 0x5d, 0xa8,
- 0x8c, 0x0b, 0x8c, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x06, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0x86,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x66,
- 0xe0, 0x08, 0x0d, 0x66,
- 0xef, 0xb4, 0x70, 0x48,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0xc6,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x76,
- 0xe0, 0x08, 0x0d, 0x76,
- 0xef, 0xb4, 0x6e, 0x88,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0xc6, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x8e, 0x39, 0xc9, 0x37,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x86,
- 0xe0, 0x08, 0x0d, 0x86,
- 0xef, 0xb4, 0x6c, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x87, 0x1b, 0x9e, 0x39,
- 0x03, 0x96, 0x82, 0x45,
- 0x0d, 0x96, 0x60, 0x08,
- 0x6a, 0xd8, 0xe0, 0x08,
- 0xa1, 0x0b, 0xef, 0xb4,
- 0x80, 0x00, 0x0c, 0x06,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6c, 0x80, 0x04, 0x12,
- 0x81, 0x31, 0x81, 0x11,
- 0x48, 0x00, 0xc5, 0x3d,
- 0x00, 0x04, 0x50, 0x04,
- 0x42, 0x12, 0xc1, 0x84,
- 0x06, 0x30, 0x50, 0x90,
- 0xfc, 0xf5, 0xc4, 0x04,
- 0x82, 0x0b, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x19,
- 0x40, 0x86, 0x40, 0x2b,
- 0x00, 0x05, 0xc1, 0x00,
- 0x40, 0x11, 0xc0, 0x00,
- 0x84, 0x95, 0xc0, 0x00,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x63, 0x79, 0x0c, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x8c, 0x0b, 0x03, 0x41,
- 0x6f, 0xfc, 0x6d, 0xa8,
- 0x8c, 0x0b, 0x82, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x81, 0x01, 0x81, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x86, 0x00, 0x6b,
- 0x80, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2b,
- 0x00, 0x04, 0x60, 0x98,
- 0x80, 0xc5, 0xfa, 0x00,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xff, 0x11, 0x82, 0x85,
- 0x82, 0x35, 0x82, 0x0d,
- 0x66, 0xed, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x26,
- 0x02, 0x60, 0x02, 0x85,
- 0x80, 0x99, 0x06, 0xe5,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x04, 0x45, 0x02, 0x60,
- 0x02, 0x60, 0xc0, 0x9e,
- 0x80, 0xad, 0x05, 0xa9,
- 0x53, 0xf6, 0x04, 0x18,
- 0x0c, 0x39, 0xe0, 0x00,
- 0xc0, 0x2b, 0x65, 0xad,
- 0x70, 0x84, 0x44, 0x32,
- 0x05, 0x0a, 0xa6, 0x13,
- 0x16, 0x12, 0x64, 0xfc,
- 0x12, 0x24, 0xe0, 0x00,
- 0x40, 0x0a, 0x1a, 0x80,
- 0x00, 0x60, 0xe0, 0x90,
- 0x40, 0x99, 0x06, 0xf1,
- 0xc0, 0x00, 0x02, 0x06,
- 0x4f, 0x60, 0x4e, 0x68,
- 0xc0, 0x18, 0x04, 0x06,
- 0x15, 0x86, 0x0f, 0xbe,
- 0x01, 0x01, 0xe1, 0x00,
- 0x89, 0x75, 0x81, 0x71,
- 0x61, 0x00, 0x40, 0x86,
- 0xe0, 0x08, 0x42, 0x06,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xef, 0xf8, 0x7b, 0xe8,
- 0x60, 0x3c, 0x42, 0x86,
- 0x52, 0x78, 0x8c, 0x0b,
- 0x00, 0x7b, 0xef, 0xe0,
- 0x75, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xf8,
- 0x40, 0x2c, 0x6d, 0x01,
- 0xf0, 0xa0, 0x44, 0x62,
- 0xa1, 0x7b, 0x28, 0x14,
- 0x6b, 0xf1, 0x44, 0x01,
- 0x84, 0x08, 0xc0, 0x26,
- 0x41, 0xf6, 0x82, 0x65,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x64, 0x4f, 0x28,
- 0x60, 0x0c, 0x43, 0x06,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x59, 0x38, 0xef, 0xc8,
- 0x0c, 0x19, 0xef, 0xdc,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x02, 0x84, 0x82, 0x65,
- 0x04, 0x60, 0x60, 0x88,
- 0xc0, 0x99, 0x66, 0xf0,
- 0x90, 0x23, 0x04, 0x13,
- 0x44, 0xb1, 0x84, 0x0e,
- 0x0c, 0x15, 0xe4, 0x00,
- 0xc0, 0x0a, 0x6d, 0x61,
- 0x02, 0x06, 0xc2, 0x0d,
- 0x4c, 0x11, 0xc0, 0x00,
- 0xc0, 0x26, 0x06, 0xed,
- 0x82, 0xb1, 0x80, 0xd5,
- 0xfa, 0x80, 0x10, 0xb4,
- 0xec, 0xe5, 0xd2, 0x8d,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x82, 0x91, 0x40, 0x2b,
- 0xe0, 0x90, 0x42, 0x0a,
- 0xc0, 0x1c, 0x1e, 0x25,
- 0xd1, 0x88, 0x44, 0x82,
- 0x06, 0xe1, 0x4c, 0x21,
- 0x93, 0x8b, 0x40, 0x26,
- 0x0c, 0x09, 0x84, 0xf5,
- 0x40, 0x26, 0x66, 0xe5,
- 0xe1, 0x00, 0x42, 0x86,
- 0x83, 0x21, 0x04, 0x14,
- 0x66, 0xed, 0x4c, 0x21,
- 0x04, 0x06, 0xc0, 0x26,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x64, 0x4a, 0xe8,
- 0x43, 0x06, 0x81, 0x11,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xc8, 0x5c, 0x28,
- 0x42, 0x0a, 0x85, 0x95,
- 0x44, 0x86, 0x60, 0x94,
- 0x08, 0x24, 0xe1, 0x00,
- 0x04, 0x41, 0x02, 0x60,
- 0x4c, 0xb1, 0xc0, 0x9e,
- 0x40, 0x26, 0x66, 0xe5,
- 0x05, 0xb1, 0x02, 0x60,
- 0x84, 0x18, 0x80, 0xad,
- 0x02, 0x12, 0x90, 0x13,
- 0x88, 0x16, 0xec, 0xfc,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2c,
- 0xc0, 0x26, 0x66, 0xe9,
- 0x69, 0xb5, 0x4c, 0x05,
- 0x44, 0x0a, 0xc0, 0x09,
- 0x82, 0x45, 0xe0, 0x90,
- 0x6f, 0xf8, 0x6d, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x6d, 0x05, 0x4c, 0x01,
- 0x40, 0x46, 0xc0, 0x2c,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x69, 0x58, 0x8c, 0x0b,
- 0x6e, 0x38, 0xef, 0xf4,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x0c, 0x19, 0xa1, 0x0b,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x93, 0x7c, 0x42, 0x10,
- 0x0d, 0x15, 0x4c, 0x11,
- 0x81, 0x11, 0x00, 0x2c,
- 0x6c, 0x21, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x2b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x43, 0xf6, 0x40, 0x16,
- 0x4c, 0x73, 0xef, 0xfc,
- 0xc0, 0x16, 0x66, 0x71,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x19, 0x98, 0x85,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x51, 0x0c, 0x89,
- 0x0c, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0xc5, 0x17, 0x40, 0x2b,
- 0xc5, 0x27, 0xc5, 0x87,
- 0x48, 0x2a, 0x45, 0x37,
- 0x4a, 0x3a, 0xe6, 0xa2,
- 0x06, 0x44, 0xe6, 0x86,
- 0x08, 0x54, 0xfa, 0x80,
- 0x89, 0x3b, 0xfa, 0x80,
- 0x80, 0x00, 0x00, 0x16,
- 0x88, 0x8c, 0x00, 0x04,
- 0x02, 0x00, 0x10, 0xc5,
- 0x0c, 0x39, 0x8c, 0x04,
- 0x40, 0x2c, 0x6d, 0x09,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x66, 0x86, 0x44, 0x2a,
- 0xfa, 0x80, 0x08, 0x14,
- 0x81, 0x51, 0x01, 0x11,
- 0x6c, 0x04, 0x00, 0x30,
- 0x40, 0x02, 0x83, 0x31,
- 0x00, 0x09, 0xd0, 0x98,
- 0xc0, 0x2c, 0x0c, 0xa1,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x83, 0x05, 0xc0, 0x2c,
- 0x84, 0x25, 0xa1, 0x8b,
- 0x7a, 0x80, 0x18, 0x84,
- 0xe8, 0x94, 0x12, 0x34,
- 0x60, 0x32, 0x58, 0x4a,
- 0xfb, 0x80, 0x02, 0x14,
- 0x4c, 0x13, 0xb2, 0x1f,
- 0xc0, 0x16, 0x66, 0x71,
- 0x85, 0x5d, 0x98, 0x53,
- 0x83, 0x45, 0xfc, 0x15,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x4f, 0x78, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xb4,
- 0xe0, 0x08, 0x4e, 0x96,
- 0x66, 0x71, 0x0c, 0x1b,
- 0xa3, 0x0b, 0x40, 0x16,
- 0x6c, 0xe9, 0x0c, 0x09,
- 0x0e, 0x06, 0x40, 0x2c,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x7a, 0x80,
- 0x40, 0x0a, 0xfb, 0x80,
- 0xa1, 0x1f, 0xe6, 0xa2,
- 0x66, 0x71, 0x4c, 0x13,
- 0x8e, 0x0b, 0x40, 0x16,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x04, 0x42, 0x06,
- 0x84, 0x1a, 0x84, 0x14,
- 0x6e, 0x19, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x6c, 0x41, 0x00, 0x69,
- 0x9f, 0x71, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x39,
- 0x81, 0x81, 0x40, 0x2b,
- 0x6c, 0x51, 0x00, 0x49,
- 0x81, 0x91, 0x40, 0x2b,
- 0x42, 0x3a, 0xaf, 0x76,
- 0x42, 0x1a, 0xe6, 0x9a,
- 0xbe, 0x1e, 0xe0, 0x12,
- 0x6c, 0x4d, 0x00, 0x19,
- 0x3c, 0x1e, 0xc0, 0x2b,
- 0x60, 0x31, 0x02, 0x0e,
- 0x7c, 0x1e, 0xc2, 0x41,
- 0xe0, 0x40, 0x02, 0x16,
- 0x8f, 0x11, 0x0d, 0x1c,
- 0x95, 0x11, 0x1d, 0x16,
- 0x85, 0x11, 0x1f, 0x16,
- 0x8b, 0x11, 0x21, 0x16,
- 0x91, 0x11, 0x23, 0x16,
- 0x97, 0x11, 0x25, 0x16,
- 0x99, 0x11, 0x27, 0x16,
- 0x9b, 0x11, 0x29, 0x16,
- 0x9d, 0x11, 0x2b, 0x16,
- 0x81, 0x11, 0x2d, 0x16,
- 0x6c, 0x55, 0x00, 0xc9,
- 0x83, 0x65, 0xc0, 0x2b,
- 0x64, 0x20, 0x0a, 0xf0,
- 0x0a, 0x29, 0x82, 0xb1,
- 0x80, 0x23, 0xfc, 0x08,
- 0x68, 0x81, 0x44, 0x81,
- 0x82, 0x81, 0x40, 0x1b,
- 0x6c, 0x41, 0x00, 0x69,
- 0x0a, 0x64, 0xc0, 0x2b,
- 0x04, 0xb4, 0x7a, 0x80,
- 0x94, 0x53, 0xfa, 0x80,
- 0xfa, 0xb5, 0xcb, 0x2d,
- 0x00, 0x29, 0x82, 0x91,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x14, 0x94,
- 0x04, 0x94, 0xc5, 0xad,
- 0x54, 0x20, 0xc0, 0x88,
- 0xc0, 0x03, 0x13, 0xf1,
- 0x56, 0xa0, 0x7a, 0xb5,
- 0x00, 0x29, 0xdc, 0x00,
- 0x40, 0x2c, 0x6c, 0x81,
- 0xfa, 0x80, 0x18, 0xc4,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xa3, 0x2b, 0x3c, 0x24,
- 0xdf, 0xfc, 0x4f, 0xee,
- 0x68, 0xbd, 0x40, 0x71,
- 0x3e, 0x24, 0xc0, 0x1b,
- 0xfa, 0x80, 0x0a, 0x24,
- 0x60, 0x32, 0x48, 0x5a,
- 0x64, 0x80, 0x0a, 0x00,
- 0x07, 0x45, 0xc0, 0x6e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x6e, 0x19, 0x00, 0xcb,
- 0x58, 0x0a, 0xc0, 0x15,
- 0x59, 0xe6, 0xe4, 0x84,
- 0x4c, 0x50, 0x00, 0x0c,
- 0x88, 0xa5, 0x9c, 0x00,
- 0x6c, 0x79, 0x00, 0xc9,
- 0xe5, 0xcd, 0xc0, 0x2c,
- 0x94, 0xc8, 0x88, 0x35,
- 0x6c, 0x41, 0x00, 0x69,
- 0x00, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xe9,
- 0xe0, 0x1a, 0x50, 0xca,
- 0xe0, 0x0e, 0x52, 0x7a,
- 0xe1, 0x1a, 0x58, 0xca,
- 0xe6, 0x92, 0x50, 0x8a,
- 0xe1, 0x0e, 0x4c, 0x7a,
- 0x58, 0xca, 0x10, 0x93,
- 0x0e, 0x94, 0xe6, 0x8e,
- 0x50, 0x02, 0x7a, 0x80,
- 0x4e, 0x7a, 0xf0, 0x84,
- 0x8c, 0xc3, 0x66, 0x8a,
- 0x64, 0x81, 0x0c, 0x80,
- 0x8e, 0xc3, 0xc0, 0x6e,
- 0x02, 0x11, 0x98, 0xc6,
- 0x02, 0x0a, 0x82, 0x51,
- 0xf2, 0xb5, 0xe0, 0x40,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x00, 0x00, 0x10, 0x14,
- 0x00, 0x43, 0x4a, 0xb0,
- 0x00, 0x00, 0x09, 0x2c,
- 0x00, 0x00, 0x1a, 0x24,
- 0x00, 0x43, 0x54, 0xc0,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x19, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xe0,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x00,
- 0x00, 0x80, 0x02, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x11,
- 0x00, 0x80, 0x02, 0x12,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x16,
- 0x00, 0x80, 0x02, 0x17,
- 0x00, 0x80, 0x02, 0x18,
- 0x00, 0x80, 0x02, 0x19,
- 0x00, 0x80, 0x02, 0x1a,
- 0x00, 0x80, 0x02, 0x1b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x1d,
- 0x00, 0x80, 0x02, 0x1e,
- 0x00, 0x80, 0x02, 0x20,
- 0x00, 0x80, 0x02, 0x24,
- 0x00, 0x80, 0x02, 0x26,
- 0x00, 0x80, 0x02, 0x2c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x2f,
- 0x00, 0x80, 0x02, 0x46,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4c,
- 0x00, 0x80, 0x02, 0x4d,
- 0x00, 0x80, 0x02, 0x4e,
- 0x00, 0x80, 0x02, 0x51,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x53,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x57,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x59,
- 0x00, 0x80, 0x02, 0x5a,
- 0x00, 0x80, 0x02, 0x5f,
- 0x00, 0x80, 0x02, 0x60,
- 0x00, 0x80, 0x02, 0x61,
- 0x00, 0x80, 0x02, 0x62,
- 0x00, 0x80, 0x02, 0x63,
- 0x00, 0x80, 0x02, 0x64,
- 0x00, 0x80, 0x02, 0x65,
- 0x00, 0x80, 0x02, 0x66,
- 0x00, 0x80, 0x02, 0x67,
- 0x00, 0x80, 0x02, 0x68,
- 0x00, 0x80, 0x02, 0x73,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x78,
- 0x00, 0x80, 0x02, 0x7c,
- 0x00, 0x80, 0x02, 0x81,
- 0x00, 0x80, 0x02, 0x86,
- 0x00, 0x80, 0x02, 0x87,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x95,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xa3,
- 0x00, 0x80, 0x02, 0xa8,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xaa,
- 0x00, 0x80, 0x02, 0xab,
- 0x00, 0x80, 0x02, 0xac,
- 0x00, 0x80, 0x02, 0xad,
- 0x00, 0x80, 0x02, 0xae,
- 0x00, 0x80, 0x02, 0xb1,
- 0x00, 0x80, 0x02, 0xb2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xb6,
- 0x00, 0x80, 0x02, 0xb7,
- 0x00, 0x80, 0x02, 0xb8,
- 0x00, 0x80, 0x02, 0xb9,
- 0x00, 0x80, 0x02, 0xba,
- 0x00, 0x80, 0x02, 0xbb,
- 0x00, 0x80, 0x02, 0xbc,
- 0x00, 0x80, 0x02, 0xbd,
- 0x00, 0x80, 0x02, 0xbe,
- 0x00, 0x80, 0x02, 0xbf,
- 0x00, 0x80, 0x02, 0xc2,
- 0x00, 0x80, 0x02, 0xc3,
- 0x00, 0x80, 0x02, 0xc4,
- 0x00, 0x80, 0x02, 0xc5,
- 0x00, 0x80, 0x40, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x02,
- 0x00, 0x80, 0x40, 0x03,
- 0x00, 0x80, 0x40, 0x04,
- 0x00, 0x80, 0x40, 0x06,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x09,
- 0x00, 0x80, 0x40, 0x0a,
- 0x00, 0x80, 0x40, 0x0b,
- 0x00, 0x80, 0x40, 0x0c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x0e,
- 0x00, 0x80, 0x40, 0x0f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x13,
- 0x00, 0x80, 0x40, 0x14,
- 0x00, 0x80, 0x40, 0x15,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x19,
- 0x00, 0x80, 0x40, 0x1e,
- 0x00, 0x80, 0x40, 0x1f,
- 0x00, 0x80, 0x40, 0x20,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x24,
- 0x00, 0x80, 0x40, 0x25,
- 0x00, 0x80, 0x40, 0x3c,
- 0x00, 0x80, 0x40, 0x3d,
- 0x00, 0x80, 0x40, 0x3e,
- 0x00, 0x80, 0x40, 0x3f,
- 0x00, 0x80, 0x40, 0x40,
- 0x00, 0x80, 0x40, 0x41,
- 0x00, 0x80, 0x40, 0x42,
- 0x00, 0x80, 0x40, 0x43,
- 0x00, 0x80, 0x40, 0x44,
- 0x00, 0x80, 0x40, 0x45,
- 0x00, 0x80, 0x40, 0x46,
- 0x00, 0x80, 0x40, 0x47,
- 0x00, 0x80, 0x40, 0x48,
- 0x00, 0x80, 0x40, 0x49,
- 0x00, 0x80, 0x40, 0x4a,
- 0x00, 0x80, 0x40, 0x4b,
- 0x00, 0x80, 0x40, 0x4c,
- 0x00, 0x80, 0x40, 0x4d,
- 0x00, 0x80, 0x40, 0x4e,
- 0x00, 0x80, 0x40, 0x4f,
- 0x00, 0x80, 0x40, 0x50,
- 0x00, 0x80, 0x40, 0x51,
- 0x00, 0x80, 0x40, 0x52,
- 0x00, 0x80, 0x40, 0x53,
- 0x00, 0x80, 0x40, 0x54,
- 0x00, 0x80, 0x40, 0x55,
- 0x00, 0x80, 0x40, 0x56,
- 0x00, 0x80, 0x40, 0x57,
- 0x00, 0x80, 0x40, 0x58,
- 0x00, 0x80, 0x40, 0x59,
- 0x00, 0x80, 0x40, 0x5a,
- 0x00, 0x80, 0x40, 0x5b,
- 0x00, 0x80, 0x40, 0x5c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x5e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x60,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x69,
- 0x00, 0x80, 0x40, 0x6a,
- 0x00, 0x80, 0x40, 0x6b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x74,
- 0x00, 0x80, 0x40, 0x78,
- 0x00, 0x80, 0x40, 0x79,
- 0x00, 0x80, 0x40, 0x7a,
- 0x00, 0x80, 0x40, 0x7c,
- 0x00, 0x80, 0x40, 0x84,
- 0x00, 0x80, 0x40, 0x85,
- 0x00, 0x80, 0x40, 0x88,
- 0x00, 0x80, 0x40, 0x89,
- 0x00, 0x80, 0x40, 0x8e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x90,
- 0x00, 0x80, 0x40, 0x91,
- 0x00, 0x80, 0x40, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x9f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa1,
- 0x00, 0x80, 0x40, 0xa2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa8,
- 0x00, 0x80, 0x40, 0xb0,
- 0x00, 0x80, 0x40, 0xb6,
- 0x00, 0x80, 0x40, 0xd0,
- 0x00, 0x80, 0x40, 0xd1,
- 0x00, 0x80, 0x40, 0xd4,
- 0x00, 0x80, 0x40, 0xd5,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdf,
- 0x00, 0x80, 0x43, 0xdc,
- 0x00, 0x80, 0x43, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x43, 0xe4,
- 0x00, 0x80, 0x44, 0x04,
- 0x00, 0x80, 0x44, 0x28,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x44, 0x48,
- 0x00, 0x80, 0x44, 0x4c,
- 0x00, 0x80, 0x44, 0x50,
- 0x00, 0x80, 0x44, 0x54,
- 0x00, 0x80, 0x44, 0x58,
- 0x00, 0x80, 0x44, 0x5c,
- 0x00, 0x80, 0x44, 0x60,
- 0x00, 0x80, 0x44, 0x64,
- 0x00, 0x80, 0x44, 0x68,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x46, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xc8,
- 0x00, 0x80, 0x48, 0xc9,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xcb,
- 0x00, 0x80, 0x48, 0xcc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x49, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x34, 0x3c,
- 0x00, 0x80, 0x80, 0x00,
- 0x00, 0x80, 0x80, 0x01,
- 0x00, 0x80, 0x80, 0x02,
- 0x00, 0x80, 0x80, 0x06,
- 0x00, 0x80, 0x80, 0x07,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x09,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x0e,
- 0x00, 0x80, 0x80, 0x10,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x14,
- 0x00, 0x80, 0x80, 0x18,
- 0x00, 0x80, 0x80, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x2d,
- 0x00, 0x80, 0x80, 0x2e,
- 0x00, 0x80, 0x80, 0x31,
- 0x00, 0x80, 0x80, 0x32,
- 0x00, 0x80, 0x80, 0x35,
- 0x00, 0x80, 0x80, 0x36,
- 0x00, 0x80, 0x80, 0x37,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x39,
- 0x00, 0x80, 0x80, 0x3a,
- 0x00, 0x80, 0x80, 0x3b,
- 0x00, 0x80, 0x80, 0x3c,
- 0x00, 0x80, 0x80, 0x3d,
- 0x00, 0x80, 0x80, 0x3e,
- 0x00, 0x80, 0x80, 0x40,
- 0x00, 0x80, 0x80, 0x44,
- 0x00, 0x80, 0x80, 0x48,
- 0x00, 0x80, 0x80, 0x49,
- 0x00, 0x80, 0x80, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x4c,
- 0x00, 0x80, 0x80, 0x50,
- 0x00, 0x80, 0x80, 0x54,
- 0x00, 0x80, 0x80, 0x55,
- 0x00, 0x80, 0x80, 0x56,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x58,
- 0x00, 0x80, 0x80, 0x5c,
- 0x00, 0x80, 0x80, 0x60,
- 0x00, 0x80, 0x80, 0x61,
- 0x00, 0x80, 0x80, 0x62,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x64,
- 0x00, 0x80, 0x80, 0x68,
- 0x00, 0x80, 0x80, 0x6c,
- 0x00, 0x80, 0x80, 0x6d,
- 0x00, 0x80, 0x80, 0x6e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x70,
- 0x00, 0x80, 0x80, 0x74,
- 0x00, 0x80, 0x80, 0x78,
- 0x00, 0x80, 0x80, 0x79,
- 0x00, 0x80, 0x80, 0x7a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x7c,
- 0x00, 0x80, 0x80, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x88,
- 0x00, 0x80, 0x80, 0x8c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x94,
- 0x00, 0x80, 0x80, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x00, 0x80,
- 0x00, 0x80, 0x00, 0x81,
- 0x00, 0x80, 0x00, 0x82,
- 0x00, 0x80, 0x00, 0x83,
- 0x00, 0x80, 0x00, 0x84,
- 0x00, 0x80, 0x00, 0x85,
- 0x00, 0x80, 0x00, 0x86,
- 0x00, 0x80, 0x00, 0x87,
- 0x00, 0x80, 0x00, 0x88,
- 0x00, 0x80, 0x00, 0x89,
- 0x00, 0x80, 0x00, 0x8a,
- 0x00, 0x80, 0x00, 0x8b,
- 0x00, 0x80, 0x00, 0x8c,
- 0x00, 0x80, 0x00, 0x8d,
- 0x00, 0x80, 0x00, 0x8e,
- 0x00, 0x80, 0x00, 0x8f,
- 0x00, 0x80, 0x00, 0x90,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x01, 0x01,
- 0x00, 0x80, 0x01, 0x02,
- 0x00, 0x80, 0x01, 0x03,
- 0x00, 0x80, 0x01, 0x04,
- 0x00, 0x80, 0x01, 0x05,
- 0x00, 0x80, 0x01, 0x06,
- 0x00, 0x80, 0x01, 0x07,
- 0x00, 0x80, 0x01, 0x0a,
- 0x00, 0x80, 0x01, 0x0c,
- 0x00, 0x81, 0x2c, 0x00,
- 0x00, 0x81, 0x2f, 0xfc,
- 0x00, 0x00, 0x0d, 0x00,
- 0x00, 0x00, 0x00, 0x64,
- 0x00, 0x00, 0xbb, 0x80,
- 0x00, 0x00, 0x1a, 0x48,
- 0x00, 0x00, 0xfb, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x17, 0xec,
- 0x00, 0x00, 0x18, 0x54,
- 0x00, 0x00, 0x18, 0xbc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x1a, 0x3f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
-
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default configuration.
- */
-
-const uint8_t VL53L5CX_DEFAULT_CONFIGURATION[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x04, 0x04,
- 0x00, 0x00, 0x08, 0x08,
- 0xAD, 0x30, 0x00, 0x80,
- 0x02, 0x01, 0x03, 0x03,
- 0x00, 0x00, 0x03, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x40, 0x00, 0x40,
- 0x01, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x01, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x00, 0x27, 0x10,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x13, 0x00, 0x29,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_RANGING,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x0C, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x07, 0x08, 0x07,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x01,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x40, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x01, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x25, 0x80,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x02,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x00, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0xFF, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x34, 0x9B, 0x04, 0x35,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xc8
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default Xtalk data.
- */
-
-const uint8_t VL53L5CX_DEFAULT_XTALK[] = {
- 0x9f, 0xd8, 0x00, 0xc0,
- 0x03, 0x20, 0x09, 0x60,
- 0x0b, 0x08, 0x08, 0x17,
- 0x08, 0x08, 0x08, 0x03,
- 0x9f, 0xe4, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x01, 0xe0, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x9f, 0xf8, 0x00, 0x40,
- 0x17, 0x17, 0x17, 0x17,
- 0x9f, 0xfc, 0x04, 0x04,
- 0x00, 0x00, 0x46, 0xa4,
- 0x00, 0x00, 0x37, 0x66,
- 0x00, 0x00, 0x26, 0x60,
- 0x00, 0x00, 0x1c, 0xbc,
- 0x00, 0x00, 0x17, 0x73,
- 0x00, 0x00, 0x11, 0x25,
- 0x00, 0x00, 0x11, 0x07,
- 0x00, 0x00, 0x0e, 0x63,
- 0x00, 0x00, 0x8b, 0x4c,
- 0x00, 0x00, 0x60, 0xa2,
- 0x00, 0x00, 0x3d, 0xc0,
- 0x00, 0x00, 0x26, 0xaa,
- 0x00, 0x00, 0x1b, 0xc2,
- 0x00, 0x00, 0x18, 0x04,
- 0x00, 0x00, 0x14, 0x97,
- 0x00, 0x00, 0x10, 0xed,
- 0x00, 0x01, 0x28, 0x1b,
- 0x00, 0x00, 0x93, 0xf0,
- 0x00, 0x00, 0x57, 0x61,
- 0x00, 0x00, 0x30, 0x2b,
- 0x00, 0x00, 0x20, 0xaa,
- 0x00, 0x00, 0x1a, 0xb6,
- 0x00, 0x00, 0x15, 0xc3,
- 0x00, 0x00, 0x16, 0x0e,
- 0x00, 0x01, 0x7f, 0xbb,
- 0x00, 0x00, 0xad, 0x58,
- 0x00, 0x00, 0x71, 0xaf,
- 0x00, 0x00, 0x36, 0xd9,
- 0x00, 0x00, 0x22, 0xfb,
- 0x00, 0x00, 0x1c, 0x96,
- 0x00, 0x00, 0x18, 0x83,
- 0x00, 0x00, 0x17, 0x96,
- 0x00, 0x01, 0x90, 0x00,
- 0x00, 0x00, 0x97, 0xd6,
- 0x00, 0x00, 0x66, 0x3b,
- 0x00, 0x00, 0x33, 0x0a,
- 0x00, 0x00, 0x20, 0xcd,
- 0x00, 0x00, 0x19, 0x38,
- 0x00, 0x00, 0x16, 0xa5,
- 0x00, 0x00, 0x14, 0xbb,
- 0x00, 0x00, 0xaf, 0xcf,
- 0x00, 0x00, 0x65, 0x7d,
- 0x00, 0x00, 0x3d, 0x93,
- 0x00, 0x00, 0x29, 0xd1,
- 0x00, 0x00, 0x19, 0x4e,
- 0x00, 0x00, 0x15, 0xba,
- 0x00, 0x00, 0x11, 0xc6,
- 0x00, 0x00, 0x12, 0x7f,
- 0x00, 0x00, 0x73, 0x1d,
- 0x00, 0x00, 0x42, 0x2c,
- 0x00, 0x00, 0x2e, 0x82,
- 0x00, 0x00, 0x1e, 0x80,
- 0x00, 0x00, 0x18, 0x1c,
- 0x00, 0x00, 0x13, 0x2d,
- 0x00, 0x00, 0x0f, 0xc6,
- 0x00, 0x00, 0x0f, 0x85,
- 0x00, 0x00, 0x4f, 0x04,
- 0x00, 0x00, 0x33, 0xe9,
- 0x00, 0x00, 0x1f, 0x06,
- 0x00, 0x00, 0x18, 0x40,
- 0x00, 0x00, 0x13, 0x2c,
- 0x00, 0x00, 0x12, 0x97,
- 0x00, 0x00, 0x0e, 0x01,
- 0x00, 0x00, 0x0d, 0xac,
- 0xa0, 0xfc, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x0c, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x1c, 0x00, 0xc0,
- 0x00, 0x00, 0x70, 0xeb,
- 0x0c, 0x80, 0x01, 0xe0,
- 0x00, 0x00, 0x00, 0x26,
- 0xa1, 0x28, 0x09, 0x02,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x00, 0x00,
- 0x00, 0x36, 0x00, 0x03,
- 0x01, 0xd9, 0x01, 0x43,
- 0x02, 0x33, 0x02, 0x17,
- 0x02, 0x4b, 0x02, 0x41,
- 0x01, 0x17, 0x02, 0x22,
- 0x00, 0x27, 0x00, 0x5d,
- 0x00, 0x05, 0x00, 0x11,
- 0x00, 0x00, 0x00, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x4c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x54, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x5c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x64, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x6c, 0x00, 0x84,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x8c, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x05, 0x01, 0x03, 0x04
-};
-
-/**
- * @brief This buffer is used to get NVM data.
- */
-
-const uint8_t VL53L5CX_GET_NVM_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9E, 0x14, 0x00, 0xC0,
- 0x9E, 0x20, 0x01, 0x40,
- 0x9E, 0x34, 0x00, 0x40,
- 0x9E, 0x38, 0x04, 0x04,
- 0x9F, 0x38, 0x04, 0x02,
- 0x9F, 0xB8, 0x01, 0x00,
- 0x9F, 0xC8, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x02, 0x02, 0x00, 0x24
-};
-
-#endif /* VL53L5CX_BUFFERS_H_ */
-
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h
deleted file mode 100644
index 73d44b61bdc91d1018072c8b82241e6b00cef907..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_detection_thresholds.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-#define VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Macro VL53L5CX_NB_THRESHOLDS indicates the number of checkers. This
- * value cannot be changed.
- */
-
-#define VL53L5CX_NB_THRESHOLDS ((uint8_t)64U)
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_DET_THRESH_CONFIG ((uint16_t)0x5488U)
-#define VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG ((uint16_t)0xB6E0U)
-#define VL53L5CX_DCI_DET_THRESH_START ((uint16_t)0xB6E8U)
-#define VL53L5CX_DCI_DET_THRESH_VALID_STATUS ((uint16_t)0xB9F0U)
-
-/**
- * @brief Macro VL53L5CX_LAST_THRESHOLD is used to indicate the end of checkers
- * programming.
- */
-
-#define VL53L5CX_LAST_THRESHOLD ((uint8_t)128U)
-
-/**
- * @brief The following macro are used to define the 'param_type' of a checker.
- * They indicate what is the measurement to catch.
- */
-
-#define VL53L5CX_DISTANCE_MM ((uint8_t)1U)
-#define VL53L5CX_SIGNAL_PER_SPAD_KCPS ((uint8_t)2U)
-#define VL53L5CX_RANGE_SIGMA_MM ((uint8_t)4U)
-#define VL53L5CX_AMBIENT_PER_SPAD_KCPS ((uint8_t)8U)
-#define VL53L5CX_NB_TARGET_DETECTED ((uint8_t)9U)
-#define VL53L5CX_TARGET_STATUS ((uint8_t)12U)
-#define VL53L5CX_NB_SPADS_ENABLED ((uint8_t)13U)
-#define VL53L5CX_MOTION_INDICATOR ((uint8_t)19U)
-
-/**
- * @brief The following macro are used to define the 'type' of a checker.
- * They indicate the window of measurements, defined by low and a high
- * thresholds.
- */
-
-#define VL53L5CX_IN_WINDOW ((uint8_t)0U)
-#define VL53L5CX_OUT_OF_WINDOW ((uint8_t)1U)
-#define VL53L5CX_LESS_THAN_EQUAL_MIN_CHECKER ((uint8_t)2U)
-#define VL53L5CX_GREATER_THAN_MAX_CHECKER ((uint8_t)3U)
-#define VL53L5CX_EQUAL_MIN_CHECKER ((uint8_t)4U)
-#define VL53L5CX_NOT_EQUAL_MIN_CHECKER ((uint8_t)5U)
-
-/**
- * @brief The following macro are used to define multiple checkers in the same
- * zone, using operators. Please note that the first checker MUST always be a OR
- * operation.
- */
-
-#define VL53L5CX_OPERATION_NONE ((uint8_t)0U)
-#define VL53L5CX_OPERATION_OR ((uint8_t)0U)
-#define VL53L5CX_OPERATION_AND ((uint8_t)2U)
-
-/**
- * @brief Structure VL53L5CX_DetectionThresholds contains a single threshold.
- * This structure is never used alone, it must be used as an array of 64
- * thresholds (defined by macro VL53L5CX_NB_THRESHOLDS).
- */
-
-typedef struct {
-
- /* Low threshold */
- int32_t param_low_thresh;
- /* High threshold */
- int32_t param_high_thresh;
- /* Measurement to catch (VL53L5CX_MEDIAN_RANGE_MM,...)*/
- uint8_t measurement;
- /* Windows type (VL53L5CX_IN_WINDOW, VL53L5CX_OUT_WINDOW, ...) */
- uint8_t type;
- /* Zone id. Please read VL53L5 user manual to find the zone id.Set macro
- * VL53L5CX_LAST_THRESHOLD to indicates the end of checkers */
- uint8_t zone_num;
- /* Mathematics operation (AND/OR). The first threshold is always OR.*/
- uint8_t mathematic_operation;
-}VL53L5CX_DetectionThresholds;
-
-/**
- * @brief This function allows indicating if the detection thresholds are
- * enabled.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_enabled : Set to 1 if enabled, or 0 if disable.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled);
-
-/**
- * @brief This function allows enable the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) enabled : Set to 1 to enable, or 0 to disable thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled);
-
-/**
- * @brief This function allows getting the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-/**
- * @brief This function allows programming the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-#endif /* VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h
deleted file mode 100644
index ea413290a3873ea37e4b0e30849d7af755f8a136..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_motion_indicator.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-#define VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Motion indicator internal configuration structure.
- */
-
-typedef struct {
- int32_t ref_bin_offset;
- uint32_t detection_threshold;
- uint32_t extra_noise_sigma;
- uint32_t null_den_clip_value;
- uint8_t mem_update_mode;
- uint8_t mem_update_choice;
- uint8_t sum_span;
- uint8_t feature_length;
- uint8_t nb_of_aggregates;
- uint8_t nb_of_temporal_accumulations;
- uint8_t min_nb_for_global_detection;
- uint8_t global_indicator_format_1;
- uint8_t global_indicator_format_2;
- uint8_t spare_1;
- uint8_t spare_2;
- uint8_t spare_3;
- int8_t map_id[64];
- uint8_t indicator_format_1[32];
- uint8_t indicator_format_2[32];
-}VL53L5CX_Motion_Configuration;
-
-/**
- * @brief This function is used to initialized the motion indicator. By default,
- * indicator is programmed to monitor movements between 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-/**
- * @brief This function can be used to change the working distance of motion
- * indicator. By default, indicator is programmed to monitor movements between
- * 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint16_t) distance_min_mm : Minimum distance for indicator (min value
- * 400mm, max 4000mm).
- * @param (uint16_t) distance_max_mm : Maximum distance for indicator (min value
- * 400mm, max 4000mm).
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 if an argument is invalid.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm);
-
-/**
- * @brief This function is used to update the internal motion indicator map.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted SCI resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-#endif /* VL53L5CX_PLUGIN_MOTION_INDICATOR_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h
deleted file mode 100644
index be63e73ed5bf2a11eb8d4c8be7adda11ae7becaf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/inc/vl53l5cx_plugin_xtalk.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_XTALK_H_
-#define VL53L5CX_PLUGIN_XTALK_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_XTALK 2
-#else
-#define VL53L5CX_FW_NBTAR_XTALK VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief Inner Macro for plugin. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_CAL_CFG ((uint16_t)0x5470U)
-#define VL53L5CX_DCI_XTALK_CFG ((uint16_t)0xAD94U)
-
-
-/**
- * @brief This function starts the VL53L5CX sensor in order to calibrate Xtalk.
- * This calibration is recommended is user wants to use a coverglass.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) reflectance_percent : Target reflectance in percent. This
- * value is include between 1 and 99%. For a better efficiency, ST recommends a
- * 3% target reflectance.
- * @param (uint8_t) nb_samples : Nb of samples used for calibration. A higher
- * number of samples means a higher accuracy, but it increases the calibration
- * time. Minimum is 1 and maximum is 16.
- * @param (uint16_t) distance_mm : Target distance in mm. The minimum allowed
- * distance is 600mm, and maximum is 3000mm. The target must stay in Full FOV,
- * so short distance are easier for calibration.
- * @return (uint8_t) status : 0 if calibration OK, 127 if an argument has an
- * incorrect value, or 255 is something failed.
- */
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm);
-
-/**
- * @brief This function gets the Xtalk buffer. The buffer is available after
- * using the function vl53l5cx_calibrate_xtalk().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer reading OK
- */
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function sets the Xtalk buffer. This function can be used to
- * override default Xtalk buffer.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer OK
- */
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function gets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_xtalk_margin : Xtalk margin in kcps/spads.
- * @return (uint8_t) status : 0 if reading OK
- */
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin);
-
-/**
- * @brief This function sets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) xtalk_margin : New Xtalk margin in kcps/spads. Min value is
- * 0 kcps/spads, and max is 10.000 kcps/spads
- * @return (uint8_t) status : 0 if set margin is OK, or 127 is the margin is
- * invalid.
- */
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin);
-
-/**
- * @brief Command used to get Xtalk calibration data
- */
-
-static const uint8_t VL53L5CX_GET_XTALK_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9F, 0xD8, 0x00, 0xC0,
- 0x9F, 0xE4, 0x01, 0x40,
- 0x9F, 0xF8, 0x00, 0x40,
- 0x9F, 0xFC, 0x04, 0x04,
- 0xA0, 0xFC, 0x01, 0x00,
- 0xA1, 0x0C, 0x01, 0x00,
- 0xA1, 0x1C, 0x00, 0xC0,
- 0xA1, 0x28, 0x09, 0x02,
- 0xA2, 0x48, 0x00, 0x40,
- 0xA2, 0x4C, 0x00, 0x81,
- 0xA2, 0x54, 0x00, 0x81,
- 0xA2, 0x5C, 0x00, 0x81,
- 0xA2, 0x64, 0x00, 0x81,
- 0xA2, 0x6C, 0x00, 0x84,
- 0xA2, 0x8C, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x0F,
- 0x07, 0x02, 0x00, 0x44
-};
-
-/**
- * @brief Command used to get run Xtalk calibration
- */
-
-static const uint8_t VL53L5CX_CALIBRATE_XTALK[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x08, 0x08,
- 0x00, 0x00, 0x04, 0x04,
- 0xAD, 0x30, 0x00, 0x80,
- 0x03, 0x01, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x10, 0x00, 0x10,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x02, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x01, 0x00, 0x51,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x1B, 0x00, 0x21,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_XTALK,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x80, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x01, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0xA3, 0xE8, 0xA3, 0xB8,
- 0xA4, 0x38, 0xA4, 0x28,
- 0xA6, 0x48, 0xA4, 0x48,
- 0xA7, 0x88, 0xA7, 0x48,
- 0xAC, 0x10, 0xA7, 0x90,
- 0x99, 0xBC, 0x99, 0xB4,
- 0x9A, 0xFC, 0x9A, 0xBC,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x88, 0x03, 0x00,
- 0x00, 0x82, 0x00, 0x82,
- 0x04, 0x04, 0x04, 0x08,
- 0x00, 0x80, 0x04, 0x01,
- 0x09, 0x02, 0x09, 0x08,
- 0x04, 0x04, 0x00, 0x80,
- 0x04, 0x01, 0x04, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0x04, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x40, 0x00, 0x05, 0x1E,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x02,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xD4
-};
-
-#endif /* VL53L5CX_PLUGIN_XTALK_H_ */
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_api.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_api.c
deleted file mode 100644
index f92ec505aaa80e6fb558a4ce4fb29e5ce9c38c7e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_api.c
+++ /dev/null
@@ -1,1333 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_buffers.h"
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to wait for an answer from VL53L5CX sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint8_t size,
- uint8_t pos,
- uint16_t address,
- uint8_t mask,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform), address,
- p_dev->temp_buffer, size);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- if(timeout >= (uint8_t)200) /* 2s timeout */
- {
- status |= (uint8_t)VL53L5CX_STATUS_TIMEOUT_ERROR;
- break;
- }else if((size >= (uint8_t)4)
- && (p_dev->temp_buffer[2] >= (uint8_t)0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[pos] & mask) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for the MCU to boot.
- */
-static uint8_t _vl53l5cx_poll_for_mcu_boot(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t go2_status0, go2_status1, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x06, &go2_status0);
- if((go2_status0 & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x07, &go2_status1);
- status |= go2_status1;
- break;
- }
- (void)VL53L5CX_WaitMs(&(p_dev->platform), 1);
- timeout++;
-
- if((go2_status0 & (uint8_t)0x1) != (uint8_t)0){
- break;
- }
-
- }while (timeout < (uint16_t)500);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the offset data gathered from NVM.
- */
-
-static uint8_t _vl53l5cx_send_offset_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t signal_grid[64];
- int16_t range_grid[64];
- uint8_t dss_4x4[] = {0x0F, 0x04, 0x04, 0x00, 0x08, 0x10, 0x10, 0x07};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x03, 0x01, 0x01, 0xE4};
- int8_t i, j;
- uint16_t k;
-
- (void)memcpy(p_dev->temp_buffer,
- p_dev->offset_data, VL53L5CX_OFFSET_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 offset */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4){
- (void)memcpy(&(p_dev->temp_buffer[0x10]), dss_4x4, sizeof(dss_4x4));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- (void)memcpy(signal_grid,&(p_dev->temp_buffer[0x3C]),
- sizeof(signal_grid));
- (void)memcpy(range_grid,&(p_dev->temp_buffer[0x140]),
- sizeof(range_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+ (int8_t)0]
- + signal_grid[(2*i)+(16*j)+(int8_t)1]
- + signal_grid[(2*i)+(16*j)+(int8_t)8]
- + signal_grid[(2*i)+(16*j)+(int8_t)9])
- /(uint32_t)4;
- range_grid[i+(4*j)] =
- (range_grid[(2*i)+(16*j)]
- + range_grid[(2*i)+(16*j)+1]
- + range_grid[(2*i)+(16*j)+8]
- + range_grid[(2*i)+(16*j)+9])
- /(int16_t)4;
- }
- }
- (void)memset(&range_grid[0x10], 0, (uint16_t)96);
- (void)memset(&signal_grid[0x10], 0, (uint16_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x3C]),
- signal_grid, sizeof(signal_grid));
- (void)memcpy(&(p_dev->temp_buffer[0x140]),
- range_grid, sizeof(range_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- }
-
- for(k = 0; k < (VL53L5CX_OFFSET_BUFFER_SIZE - (uint16_t)4); k++)
- {
- p_dev->temp_buffer[k] = p_dev->temp_buffer[k + (uint16_t)8];
- }
-
- (void)memcpy(&(p_dev->temp_buffer[0x1E0]), footer, 8);
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2e18, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the Xtalk data from generic configuration, or user's calibration.
- */
-
-static uint8_t _vl53l5cx_send_xtalk_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t res4x4[] = {0x0F, 0x04, 0x04, 0x17, 0x08, 0x10, 0x10, 0x07};
- uint8_t dss_4x4[] = {0x00, 0x78, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08};
- uint8_t profile_4x4[] = {0xA0, 0xFC, 0x01, 0x00};
- uint32_t signal_grid[64];
- int8_t i, j;
-
- (void)memcpy(p_dev->temp_buffer, &(p_dev->xtalk_data[0]),
- VL53L5CX_XTALK_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 Xtalk */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4)
- {
- (void)memcpy(&(p_dev->temp_buffer[0x8]),
- res4x4, sizeof(res4x4));
- (void)memcpy(&(p_dev->temp_buffer[0x020]),
- dss_4x4, sizeof(dss_4x4));
-
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(signal_grid, &(p_dev->temp_buffer[0x34]),
- sizeof(signal_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+0]
- + signal_grid[(2*i)+(16*j)+1]
- + signal_grid[(2*i)+(16*j)+8]
- + signal_grid[(2*i)+(16*j)+9])/(uint32_t)4;
- }
- }
- (void)memset(&signal_grid[0x10], 0, (uint32_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x34]),
- signal_grid, sizeof(signal_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(&(p_dev->temp_buffer[0x134]),
- profile_4x4, sizeof(profile_4x4));
- (void)memset(&(p_dev->temp_buffer[0x078]),0 ,
- (uint32_t)4*sizeof(uint8_t));
- }
-
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2cf8,
- p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t device_id, revision_id;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0, &device_id);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 1, &revision_id);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- if((device_id == (uint8_t)0xF0) && (revision_id == (uint8_t)0x02))
- {
- *p_is_alive = 1;
- }
- else
- {
- *p_is_alive = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t pipe_ctrl[] = {VL53L5CX_NB_TARGET_PER_ZONE, 0x00, 0x01, 0x00};
- uint32_t single_range = 0x01;
-
- p_dev->default_xtalk = (uint8_t*)VL53L5CX_DEFAULT_XTALK;
- p_dev->default_configuration = (uint8_t*)VL53L5CX_DEFAULT_CONFIGURATION;
- p_dev->is_auto_stop_enabled = (uint8_t)0x0;
-
- /* SW reboot sequence */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0009, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x03);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7FFF, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x01);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x43);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 1);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x01);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 100);
-
- /* Wait for sensor booted (several ms required to get sensor ready ) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x06, 0xff, 1);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000E, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Enable FW access */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Enable host access to GO1 */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Power ON status */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x400F, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x43);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x219, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21B, 0x00);
-
- /* Wake up MCU */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x07);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x06);
-
- /* Download FW into VL53L5 */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x09);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0a);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x8000],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0b);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x10000],0x5000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
-
- /* Check if FW correctly downloaded */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Reset MCU and wait boot */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x114, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x115, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x116, 0x42);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x117, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x01);
- status |= _vl53l5cx_poll_for_mcu_boot(p_dev);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Get offset NVM data and store them into the offset buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fd8,
- (uint8_t*)VL53L5CX_GET_NVM_CMD, sizeof(VL53L5CX_GET_NVM_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 0,
- VL53L5CX_UI_CMD_STATUS, 0xff, 2);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, VL53L5CX_NVM_DATA_SIZE);
- (void)memcpy(p_dev->offset_data, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |= _vl53l5cx_send_offset_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Set default Xtalk shape. Send Xtalk to sensor */
- (void)memcpy(p_dev->xtalk_data, (uint8_t*)VL53L5CX_DEFAULT_XTALK,
- VL53L5CX_XTALK_BUFFER_SIZE);
- status |= _vl53l5cx_send_xtalk_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Send default configuration to VL53L5CX firmware */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- sizeof(VL53L5CX_DEFAULT_CONFIGURATION));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&pipe_ctrl,
- VL53L5CX_DCI_PIPE_CONTROL, (uint16_t)sizeof(pipe_ctrl));
-#if VL53L5CX_NB_TARGET_PER_ZONE != 1
- tmp = VL53L5CX_NB_TARGET_PER_ZONE;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FW_NB_TARGET, 16,
- (uint8_t*)&tmp, 1, 0x0C);
-#endif
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- tmp = (uint8_t)1;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x26);
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x25);
-
-exit:
- return status;
-}
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4, (uint8_t)(i2c_address >> 1));
- p_dev->platform.address = i2c_address;
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x009, &tmp);
-
- switch(tmp)
- {
- case 0x4:
- *p_power_mode = VL53L5CX_POWER_MODE_WAKEUP;
- break;
- case 0x2:
- *p_power_mode = VL53L5CX_POWER_MODE_SLEEP;
-
- break;
- default:
- *p_power_mode = 0;
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode)
-{
- uint8_t current_power_mode, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_power_mode(p_dev, ¤t_power_mode);
- if(power_mode != current_power_mode)
- {
- switch(power_mode)
- {
- case VL53L5CX_POWER_MODE_WAKEUP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 1);
- break;
-
- case VL53L5CX_POWER_MODE_SLEEP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x02);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 0);
- break;
-
- default:
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint16_t tmp;
- uint32_t i;
- uint32_t header_config[2] = {0, 0};
-
- union Block_header *bh_ptr;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
- p_dev->streamcount = 255;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x00000007U,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={VL53L5CX_START_BH,
- VL53L5CX_METADATA_BH,
- VL53L5CX_COMMONDATA_BH,
- VL53L5CX_AMBIENT_RATE_BH,
- VL53L5CX_SPAD_COUNT_BH,
- VL53L5CX_NB_TARGET_DETECTED_BH,
- VL53L5CX_SIGNAL_RATE_BH,
- VL53L5CX_RANGE_SIGMA_MM_BH,
- VL53L5CX_DISTANCE_BH,
- VL53L5CX_REFLECTANCE_BH,
- VL53L5CX_TARGET_STATUS_BH,
- VL53L5CX_MOTION_DETECT_BH};
-
- /* Enable selected outputs in the 'platform.h' file */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- output_bh_enable[0] += (uint32_t)8;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- output_bh_enable[0] += (uint32_t)16;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- output_bh_enable[0] += (uint32_t)32;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- output_bh_enable[0] += (uint32_t)64;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- output_bh_enable[0] += (uint32_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- output_bh_enable[0] += (uint32_t)256;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- output_bh_enable[0] += (uint32_t)512;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- output_bh_enable[0] += (uint32_t)1024;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- output_bh_enable[0] += (uint32_t)2048;
-#endif
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint16_t)((uint16_t)resolution
- * (uint16_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output), VL53L5CX_DCI_OUTPUT_LIST,
- (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output_bh_enable), VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- /* Start xshut bypass (interrupt mode) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x05);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), VL53L5CX_UI_CMD_END -
- (uint16_t)(4 - 1), (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- /* Read ui range data content and compare if data size is the correct one */
- status |= vl53l5cx_dci_read_data(p_dev,
- (uint8_t*)p_dev->temp_buffer, 0x5440, 12);
- (void)memcpy(&tmp, &(p_dev->temp_buffer[0x8]), sizeof(tmp));
- if(tmp != p_dev->data_read_size)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp = 0, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
- uint32_t auto_stop_flag = 0;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x2FFC, (uint8_t*)&auto_stop_flag, 4);
- if((auto_stop_flag != (uint32_t)0x4FF)
- && (p_dev->is_auto_stop_enabled == (uint8_t)0))
- {
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Provoke MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x16);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x01);
-
- /* Poll for G02 status 0 MCU stop */
- while(((tmp & (uint8_t)0x80) >> 7) == (uint8_t)0x00)
- {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
- timeout++; /* Timeout reached after 5 seconds */
-
- if(timeout > (uint16_t)500)
- {
- status |= tmp;
- break;
- }
- }
- }
-
- /* Check GO2 status 1 if status is still OK */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- if((tmp & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7, &tmp);
- if((tmp != (uint8_t)0x84) && (tmp != (uint8_t)0x85)){
- status |= tmp;
- }
- }
-
- /* Undo MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x00);
-
- /* Stop xshut bypass */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0, p_dev->temp_buffer, 4);
-
- if((p_dev->temp_buffer[0] != p_dev->streamcount)
- && (p_dev->temp_buffer[0] != (uint8_t)255)
- && (p_dev->temp_buffer[1] == (uint8_t)0x5)
- && ((p_dev->temp_buffer[2] & (uint8_t)0x5) == (uint8_t)0x5)
- && ((p_dev->temp_buffer[3] & (uint8_t)0x10) ==(uint8_t)0x10)
- )
- {
- *p_isReady = (uint8_t)1;
- p_dev->streamcount = p_dev->temp_buffer[0];
- }
- else
- {
- if ((p_dev->temp_buffer[3] & (uint8_t)0x80) != (uint8_t)0)
- {
- status |= p_dev->temp_buffer[2]; /* Return GO2 error status */
- }
-
- *p_isReady = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- union Block_header *bh_ptr;
- uint16_t header_id, footer_id;
- uint32_t i, j, msize;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0,
- p_dev->temp_buffer, p_dev->data_read_size);
- p_dev->streamcount = p_dev->temp_buffer[0];
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, (uint16_t)p_dev->data_read_size);
-
- /* Start conversion at position 16 to avoid headers */
- for (i = (uint32_t)16; i
- < (uint32_t)p_dev->data_read_size; i+=(uint32_t)4)
- {
- bh_ptr = (union Block_header *)&(p_dev->temp_buffer[i]);
- if ((bh_ptr->type > (uint32_t)0x1)
- && (bh_ptr->type < (uint32_t)0xd))
- {
- msize = bh_ptr->type * bh_ptr->size;
- }
- else
- {
- msize = bh_ptr->size;
- }
-
- switch(bh_ptr->idx){
- case VL53L5CX_METADATA_IDX:
- p_results->silicon_temp_degc =
- (int8_t)p_dev->temp_buffer[i + (uint32_t)12];
- break;
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- case VL53L5CX_AMBIENT_RATE_IDX:
- (void)memcpy(p_results->ambient_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- case VL53L5CX_SPAD_COUNT_IDX:
- (void)memcpy(p_results->nb_spads_enabled,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- case VL53L5CX_NB_TARGET_DETECTED_IDX:
- (void)memcpy(p_results->nb_target_detected,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- case VL53L5CX_SIGNAL_RATE_IDX:
- (void)memcpy(p_results->signal_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- case VL53L5CX_RANGE_SIGMA_MM_IDX:
- (void)memcpy(p_results->range_sigma_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- case VL53L5CX_DISTANCE_IDX:
- (void)memcpy(p_results->distance_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- case VL53L5CX_REFLECTANCE_EST_PC_IDX:
- (void)memcpy(p_results->reflectance,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- case VL53L5CX_TARGET_STATUS_IDX:
- (void)memcpy(p_results->target_status,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- case VL53L5CX_MOTION_DETEC_IDX:
- (void)memcpy(&p_results->motion_indicator,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
- default:
- break;
- }
- i += msize;
- }
-
-#ifndef VL53L5CX_USE_RAW_FORMAT
-
- /* Convert data into their real format */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_results->ambient_per_spad[i] /= (uint32_t)2048;
- }
-#endif
-
- for(i = 0; i < (uint32_t)(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE); i++)
- {
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- p_results->distance_mm[i] /= 4;
- if(p_results->distance_mm[i] < 0)
- {
- p_results->distance_mm[i] = 0;
- }
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- p_results->reflectance[i] /= (uint8_t)2;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- p_results->range_sigma_mm[i] /= (uint16_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- p_results->signal_per_spad[i] /= (uint32_t)2048;
-#endif
- }
-
- /* Set target status to 255 if no target is detected for this zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- if(p_results->nb_target_detected[i] == (uint8_t)0){
- for(j = 0; j < (uint32_t)
- VL53L5CX_NB_TARGET_PER_ZONE; j++)
- {
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- p_results->target_status
- [((uint32_t)VL53L5CX_NB_TARGET_PER_ZONE
- *(uint32_t)i) + j]=(uint8_t)255;
-#endif
- }
- }
- }
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- for(i = 0; i < (uint32_t)32; i++)
- {
- p_results->motion_indicator.motion[i] /= (uint32_t)65535;
- }
-#endif
-
-#endif
-
- /* Check if footer id and header id are matching. This allows to detect
- * corrupted frames */
- header_id = ((uint16_t)(p_dev->temp_buffer[0x8])<<8) & 0xFF00U;
- header_id |= ((uint16_t)(p_dev->temp_buffer[0x9])) & 0x00FFU;
-
- footer_id = ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)4]) << 8) & 0xFF00U;
- footer_id |= ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)3])) & 0xFFU;
-
- if(header_id != footer_id)
- {
- status |= VL53L5CX_STATUS_CORRUPTED_FRAME;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- *p_resolution = p_dev->temp_buffer[0x00]*p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- switch(resolution){
- case VL53L5CX_RESOLUTION_4X4:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 64;
- p_dev->temp_buffer[0x06] = 64;
- p_dev->temp_buffer[0x09] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 4;
- p_dev->temp_buffer[0x01] = 4;
- p_dev->temp_buffer[0x04] = 8;
- p_dev->temp_buffer[0x05] = 8;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 16;
- p_dev->temp_buffer[0x06] = 16;
- p_dev->temp_buffer[0x09] = 1;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 8;
- p_dev->temp_buffer[0x01] = 8;
- p_dev->temp_buffer[0x04] = 4;
- p_dev->temp_buffer[0x05] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
-
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= _vl53l5cx_send_offset_data(p_dev, resolution);
- status |= _vl53l5cx_send_xtalk_data(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4);
- *p_frequency_hz = p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4,
- (uint8_t*)&frequency_hz, 1, 0x01);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20);
-
- (void)memcpy(p_time_ms, &(p_dev->temp_buffer[0x0]), 4);
- *p_time_ms /= (uint32_t)1000;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t integration = integration_time_ms;
-
- /* Integration time must be between 2ms and 1000ms */
- if((integration < (uint32_t)2)
- || (integration > (uint32_t)1000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }else
- {
- integration *= (uint32_t)1000;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20,
- (uint8_t*)&integration, 4, 0x00);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev,p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16);
-
- *p_sharpener_percent = (p_dev->temp_buffer[0xD]
- *(uint8_t)100)/(uint8_t)255;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t sharpener;
-
- if(sharpener_percent >= (uint8_t)100)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- sharpener = (sharpener_percent*(uint8_t)255)/(uint8_t)100;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16,
- (uint8_t*)&sharpener, 1, 0xD);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4);
- *p_target_order = (uint8_t)p_dev->temp_buffer[0x0];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- if((target_order == (uint8_t)VL53L5CX_TARGET_ORDER_CLOSEST)
- || (target_order == (uint8_t)VL53L5CX_TARGET_ORDER_STRONGEST))
- {
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4,
- (uint8_t*)&target_order, 1, 0x0);
- }else
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- if(p_dev->temp_buffer[0x01] == (uint8_t)0x1)
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_CONTINUOUS;
- }
- else
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_AUTONOMOUS;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t single_range = 0x00;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- switch(ranging_mode)
- {
- case VL53L5CX_RANGING_MODE_CONTINUOUS:
- p_dev->temp_buffer[0x01] = 0x1;
- p_dev->temp_buffer[0x03] = 0x3;
- single_range = 0x00;
- break;
-
- case VL53L5CX_RANGING_MODE_AUTONOMOUS:
- p_dev->temp_buffer[0x01] = 0x3;
- p_dev->temp_buffer[0x03] = 0x2;
- single_range = 0x01;
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= vl53l5cx_dci_write_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, (uint16_t)8);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- return status;
-}
-
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 1;
- uint8_t analog_dynamic_pad_0 = 0;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 0;
- uint8_t analog_dynamic_pad_0 = 1;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16);
-
- *p_repeat_count = ((uint32_t)p_dev->temp_buffer[7] << 24)
- | ((uint32_t)p_dev->temp_buffer[6] << 16)
- | ((uint32_t)p_dev->temp_buffer[5] << 8)
- | (uint32_t)p_dev->temp_buffer[4];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16, (uint8_t*)&repeat_count, 4, 0x4);
- return status;
-}
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- int16_t i;
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t rd_size = (uint32_t) data_size + (uint32_t)12;
- uint8_t cmd[] = {0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0f,
- 0x00, 0x02, 0x00, 0x08};
-
- /* Check if tmp buffer is large enough */
- if((data_size + (uint16_t)12)>(uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- cmd[0] = (uint8_t)(index >> 8);
- cmd[1] = (uint8_t)(index & (uint32_t)0xff);
- cmd[2] = (uint8_t)((data_size & (uint16_t)0xff0) >> 4);
- cmd[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Request data reading from FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- (VL53L5CX_UI_CMD_END-(uint16_t)11),cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS,
- 0xff, 0x03);
-
- /* Read new data sent (4 bytes header + data_size + 8 bytes footer) */
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, rd_size);
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, data_size + (uint16_t)12);
-
- /* Copy data from FW into input structure (-4 bytes to remove header) */
- for(i = 0 ; i < (int16_t)data_size;i++){
- data[i] = p_dev->temp_buffer[i + 4];
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- int16_t i;
-
- uint8_t headers[] = {0x00, 0x00, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0f, 0x05, 0x01,
- (uint8_t)((data_size + (uint16_t)8) >> 8),
- (uint8_t)((data_size + (uint16_t)8) & (uint8_t)0xFF)};
-
- uint16_t address = (uint16_t)VL53L5CX_UI_CMD_END -
- (data_size + (uint16_t)12) + (uint16_t)1;
-
- /* Check if cmd buffer is large enough */
- if((data_size + (uint16_t)12)
- > (uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- headers[0] = (uint8_t)(index >> 8);
- headers[1] = (uint8_t)(index & (uint32_t)0xff);
- headers[2] = (uint8_t)(((data_size & (uint16_t)0xff0) >> 4));
- headers[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Copy data from structure to FW format (+4 bytes to add header) */
- VL53L5CX_SwapBuffer(data, data_size);
- for(i = (int16_t)data_size - (int16_t)1 ; i >= 0; i--)
- {
- p_dev->temp_buffer[i + 4] = data[i];
- }
-
- /* Add headers and footer */
- (void)memcpy(&p_dev->temp_buffer[0], headers, sizeof(headers));
- (void)memcpy(&p_dev->temp_buffer[data_size + (uint16_t)4],
- footer, sizeof(footer));
-
- /* Send data to FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),address,
- p_dev->temp_buffer,
- (uint32_t)((uint32_t)data_size + (uint32_t)12));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- VL53L5CX_SwapBuffer(data, data_size);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, data, index, data_size);
- (void)memcpy(&(data[new_data_pos]), new_data, new_data_size);
- status |= vl53l5cx_dci_write_data(p_dev, data, index, data_size);
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c
deleted file mode 100644
index 1f2c7d2a4b61b93ad8d7af14bfba5695744d21e8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_detection_thresholds.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_detection_thresholds.h"
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8);
- *p_enabled = p_dev->temp_buffer[0x1];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t grp_global_config[] = {0x01, 0x00, 0x01, 0x00};
-
- if(enabled == (uint8_t)1)
- {
- grp_global_config[0x01] = 0x01;
- tmp = 0x04;
- }
- else
- {
- grp_global_config[0x01] = 0x00;
- tmp = 0x0C;
- }
-
- /* Set global interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8,
- (uint8_t*)&grp_global_config, 4, 0x00);
-
- /* Update interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_CONFIG, 20,
- (uint8_t*)&tmp, 1, 0x11);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- /* Get thresholds configuration */
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)VL53L5CX_NB_THRESHOLDS
- *(uint16_t)sizeof(VL53L5CX_DetectionThresholds));
-
- for(i = 0; i < (uint8_t)VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh /= 4;
- p_thresholds[i].param_high_thresh /= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh /= 128;
- p_thresholds[i].param_high_thresh /= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh /= 256;
- p_thresholds[i].param_high_thresh /= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh /= 65535;
- p_thresholds[i].param_high_thresh /= 65535;
- break;
- default:
- break;
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
- uint8_t grp_valid_target_cfg[] = {0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05};
-
- for(i = 0; i < (uint8_t) VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh *= 4;
- p_thresholds[i].param_high_thresh *= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh *= 128;
- p_thresholds[i].param_high_thresh *= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh *= 256;
- p_thresholds[i].param_high_thresh *= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh *= 65535;
- p_thresholds[i].param_high_thresh *= 65535;
- break;
- default:
- break;
- }
- }
-
- /* Set valid target list */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)grp_valid_target_cfg,
- VL53L5CX_DCI_DET_THRESH_VALID_STATUS,
- (uint16_t)sizeof(grp_valid_target_cfg));
-
- /* Set thresholds configuration */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)(VL53L5CX_NB_THRESHOLDS
- *sizeof(VL53L5CX_DetectionThresholds)));
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c
deleted file mode 100644
index 5b114ee38790b2f7cfc14527bed208b947f64c4a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_motion_indicator.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <math.h>
-#include "vl53l5cx_plugin_motion_indicator.h"
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- (void)memset(p_motion_config, 0, sizeof(VL53L5CX_Motion_Configuration));
-
- p_motion_config->ref_bin_offset = 13633;
- p_motion_config->detection_threshold = 2883584;
- p_motion_config->extra_noise_sigma = 0;
- p_motion_config->null_den_clip_value = 0;
- p_motion_config->mem_update_mode = 6;
- p_motion_config->mem_update_choice = 2;
- p_motion_config->sum_span = 4;
- p_motion_config->feature_length = 9;
- p_motion_config->nb_of_aggregates = 16;
- p_motion_config->nb_of_temporal_accumulations = 16;
- p_motion_config->min_nb_for_global_detection = 1;
- p_motion_config->global_indicator_format_1 = 8;
- p_motion_config->global_indicator_format_2 = 0;
- p_motion_config->spare_1 = 0;
- p_motion_config->spare_2 = 0;
- p_motion_config->spare_3 = 0;
-
- status |= vl53l5cx_motion_indicator_set_resolution(p_dev,
- p_motion_config, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- float_t tmp;
-
- if(((distance_max_mm - distance_min_mm) > (uint16_t)1500)
- || (distance_min_mm < (uint16_t)400)
- || (distance_max_mm > (uint16_t)4000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- tmp = (float_t)((((float_t)distance_min_mm/(float_t)37.5348)
- -(float_t)4.0)*(float_t)2048.5);
- p_motion_config->ref_bin_offset = (int32_t)tmp;
-
- tmp = (float_t)((((((float_t)distance_max_mm-
- (float_t)distance_min_mm)/(float_t)10.0)+(float_t)30.02784)
- /((float_t)15.01392))+(float_t)0.5);
- p_motion_config->feature_length = (uint8_t)tmp;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- switch(resolution)
- {
- case VL53L5CX_RESOLUTION_4X4:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_4X4; i++)
- {
- p_motion_config->map_id[i] = (int8_t)i;
- }
- (void)memset(p_motion_config->map_id + 16, -1, 48);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_motion_config->map_id[i] = (int8_t)((((int8_t)
- i % 8)/2) + (4*((int8_t)i/16)));
- }
- break;
-
- default:
- status |= VL53L5CX_STATUS_ERROR;
- break;
- }
-
- if (status == VL53L5CX_STATUS_OK)
- {
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c
deleted file mode 100644
index b2b8ab0b5240dd9886c89d29b31e0f6e31b99322..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/VL53L5CX_ULD_API/src/vl53l5cx_plugin_xtalk.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_xtalk.h"
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for an answer from VL53L5 sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint16_t address,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- address, p_dev->temp_buffer, 4);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- /* 2s timeout or FW error*/
- if((timeout >= (uint8_t)200)
- || (p_dev->temp_buffer[2] >= (uint8_t) 0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[0x1]) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * program the output using the macro defined into the 'platform.h' file.
- */
-
-static uint8_t _vl53l5cx_program_output_config(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint32_t i;
- union Block_header *bh_ptr;
- uint32_t header_config[2] = {0, 0};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x0001FFFFU,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={
- 0x0000000DU,
- 0x54000040U,
- 0x9FD800C0U,
- 0x9FE40140U,
- 0x9FF80040U,
- 0x9FFC0404U,
- 0xA0FC0100U,
- 0xA10C0100U,
- 0xA11C00C0U,
- 0xA1280902U,
- 0xA2480040U,
- 0xA24C0081U,
- 0xA2540081U,
- 0xA25C0081U,
- 0xA2640081U,
- 0xA26C0084U,
- 0xA28C0082U};
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint8_t)(resolution
- * (uint8_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
-
-
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output),
- VL53L5CX_DCI_OUTPUT_LIST, (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&(output_bh_enable),
- VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- return status;
-}
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm)
-{
- uint16_t timeout = 0;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
- uint8_t continue_loop = 1, status = VL53L5CX_STATUS_OK;
-
- uint8_t resolution, frequency, target_order, sharp_prct, ranging_mode;
- uint32_t integration_time_ms, xtalk_margin;
-
- uint16_t reflectance = reflectance_percent;
- uint8_t samples = nb_samples;
- uint16_t distance = distance_mm;
- uint8_t *default_xtalk_ptr;
-
- /* Get initial configuration */
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_get_ranging_frequency_hz(p_dev, &frequency);
- status |= vl53l5cx_get_integration_time_ms(p_dev, &integration_time_ms);
- status |= vl53l5cx_get_sharpener_percent(p_dev, &sharp_prct);
- status |= vl53l5cx_get_target_order(p_dev, &target_order);
- status |= vl53l5cx_get_xtalk_margin(p_dev, &xtalk_margin);
- status |= vl53l5cx_get_ranging_mode(p_dev, &ranging_mode);
-
- /* Check input arguments validity */
- if(((reflectance < (uint16_t)1) || (reflectance > (uint16_t)99))
- || ((distance < (uint16_t)600) || (distance > (uint16_t)3000))
- || ((samples < (uint8_t)1) || (samples > (uint8_t)16)))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- status |= vl53l5cx_set_resolution(p_dev,
- VL53L5CX_RESOLUTION_8X8);
-
- /* Send Xtalk calibration buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_CALIBRATE_XTALK,
- sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c28,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Format input argument */
- reflectance = reflectance * (uint16_t)16;
- distance = distance * (uint16_t)4;
-
- /* Update required fields */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&distance, 2, 0x00);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&reflectance, 2, 0x02);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&samples, 1, 0x04);
-
- /* Program output for Xtalk calibration */
- status |= _vl53l5cx_program_output_config(p_dev);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- VL53L5CX_UI_CMD_END - (uint16_t)(4 - 1),
- (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Wait for end of calibration */
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x0, p_dev->temp_buffer, 4);
-
- if(p_dev->temp_buffer[0] != VL53L5CX_STATUS_ERROR)
- {
- /* Coverglass too good for Xtalk calibration */
- if((p_dev->temp_buffer[2] >= (uint8_t)0x7f) &&
- (((uint16_t)(p_dev->temp_buffer[3] &
- (uint16_t)0x80) >> 7) == (uint16_t)1))
- {
- default_xtalk_ptr = p_dev->default_xtalk;
- (void)memcpy(p_dev->xtalk_data,
- default_xtalk_ptr,
- sizeof(p_dev->xtalk_data));
- status |= VL53L5CX_STATUS_XTALK_FAILED;
- }
- continue_loop = (uint8_t)0;
- }
- else if(timeout >= (uint16_t)400)
- {
- status |= VL53L5CX_STATUS_ERROR;
- continue_loop = (uint8_t)0;
- }
- else
- {
- timeout++;
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 50);
- }
-
- }while (continue_loop == (uint8_t)1);
- }
-
- /* Save Xtalk data into the Xtalk buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_dev->xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8);
- (void)memcpy(&(p_dev->xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE
- - (uint16_t)8]), footer, sizeof(footer));
-
- /* Reset default buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- VL53L5CX_CONFIGURATION_SIZE);
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
-
- /* Reset initial configuration */
- status |= vl53l5cx_set_resolution(p_dev, resolution);
- status |= vl53l5cx_set_ranging_frequency_hz(p_dev, frequency);
- status |= vl53l5cx_set_integration_time_ms(p_dev, integration_time_ms);
- status |= vl53l5cx_set_sharpener_percent(p_dev, sharp_prct);
- status |= vl53l5cx_set_target_order(p_dev, target_order);
- status |= vl53l5cx_set_xtalk_margin(p_dev, xtalk_margin);
- status |= vl53l5cx_set_ranging_mode(p_dev, ranging_mode);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t status = VL53L5CX_STATUS_OK, resolution;
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_set_resolution(p_dev, VL53L5CX_RESOLUTION_8X8);
-
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer, sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE-(uint16_t)8);
- (void)memcpy(&(p_xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8]),
- footer, sizeof(footer));
-
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- (void)memcpy(p_dev->xtalk_data, p_xtalk_data, VL53L5CX_XTALK_BUFFER_SIZE);
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16);
-
- (void)memcpy(p_xtalk_margin, p_dev->temp_buffer, 4);
- *p_xtalk_margin = *p_xtalk_margin/(uint32_t)2048;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t margin_kcps = xtalk_margin;
-
- if(margin_kcps > (uint32_t)10000)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- margin_kcps = margin_kcps*(uint32_t)2048;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16,
- (uint8_t*)&margin_kcps, 4, 0x00);
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/changelog.txt b/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/changelog.txt
deleted file mode 100644
index 040e249efb24bdc34f6c676f24408a303a5e39dc..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/VL53L5CX_ULD_driver_2.0.0/changelog.txt
+++ /dev/null
@@ -1,206 +0,0 @@
-********************************************************************************
-*
-* STMicroelectronics - VL53L5CX - Ultra Lite Driver
-*
-********************************************************************************
-
-# Driver version history
-
----------------------------------------------------------------------------------------------------------------
-
-Version : 1.0.0
-Date : 06/09/2021
-Comments : Initial driver release.
-
----------------------------------------------------------------------------------------------------------------
-
-Version : 1.0.1
-Date : 06/17/2021
-Comments : Fixed wrong array size computing. No impact for host.
-
----------------------------------------------------------------------------------------------------------------
-
-Version : 1.0.2
-Date : 06/24/2021
-Comments : Corrected bug : 1 frame over 128 was ignored using function vl53l5cx_check_data_ready().
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.0.3
-Date : 07/13/2021
-Comments : Corrected bug : Macro missing for more than 1 target per zone. Compilation failed.
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.0.4
-Date : 07/20/2021
-Comments : Corrected bug : Invalid Xtalk calibration data after running Xtalk calibration with more than 1 target per zone.
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.1.0
-Date : 09/03/2021
-Comments :
-- Firmware update : Status 13 has been added, to indicate that the detected target has a mismatch between distance and signal.
-- Added macro 'VL53L5CX_USE_RAW_FORMAT' allowing to use the default firmware format.
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.1.1
-Date : 09/17/2021
-Comments :
-- Updated function '_vl53l5cx_send_offset_data()' which may give warnings depending of compiler options.
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.1.2
-Date : 10/12/2021
-Comments :
-- Corrected bug : In some cases, detection thresholds were not applied when the AND operation was used with 2 thresholds.
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.2.0
-Date : 01/14/2022
-Comments : Several updates done in order to catch more errors from FW.
-- Result structure : Added silicon temperature output
-- Init function : Added several read registers used to improve initialization stability
-- Start function : Added a check of memory size in orer to be sure that packet size has been correctly programmed
-- Stop function : Return more relevant errors from FW
-- Check data ready function : Return more relevant errors from FW
-- For Linux driver : Changed 'stmvl53l5' to 'stmvl53l5cx'
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.0
-Date : 02/11/2022
-Comments :
-- Corrected reflectance format (output divided by /2 vs previous driver version)
-- Added macro VL53L5CX_STATUS_TIMEOUT_ERROR
-- For Linux driver : Updated i2c management to have the possibility to change I2C address in user space mode
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.1
-Date : 04/28/2022
-Comments :
-- Added a check to detect corrupted frames in function 'vl53l5cx_get_ranging_data()'
-- Added a break into function '_vl53l5cx_poll_for_answer()' to avoid endless loop
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.2
-Date : 05/02/2022
-Comments :
-- Added +4 bytes to temporary buffer size
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.3
-Date : 06/17/2022
-Comments :
-- Added functions to disable internal charge pump. It allows power consumption reduction when AVDD is supplied in 3V3
-- Fixed Xtalk calibration that might failed in some conditions
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.4
-Date : 07/05/2022
-- Removed a check in function vl53l5cx_check_data_ready() that may remove valid frames
-- Updated internal sensor firmware
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.5
-Date : 10/11/2022
-- Fixed MISRA errors. No impact on code or performances, only coding rules.
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.6
-Date : 01/19/2023
-- Changed licence from DUAL to full BSD3
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.7
-Date : 04/17/2023
-- Fixed bug in motion indicator: configuration was not correctly sent when resolution was changed
-- Improved specular target filtering
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.8
-Date : 04/24/2023
-- Fixed stop function that may fail when multi-sensors where used
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.9
-Date : 05/29/2023
-- Improved glare filter tuning
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.10
-Date : 06/09/2023
-- Added an error code VL53L5CX_STATUS_XTALK_FAILED when Xtalk calibration fails due to too good coverglass
-- Updated stop() function as it has been wrongly implemented in v1.3.8. Fixed issues relative to sensor stopping.
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.11
-Date : 01/24/2024
-- Added function vl53l5cx_set_VHV_repeat_count() used to enable periodic temperature compensation
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 1.3.12
-Date : 03/20/2024
-- reworked a bit function vl53l5cx_calibrate_xtalk() to remove C-STAT warning
-
-
----------------------------------------------------------------------------------------------------------------
-
-
-Version : 2.0.0
-Date : 05/22/2024
-- Update to FW MM1.8
-- Update platform function names to being with VL53L5CX to avoid clashes when using multiple devices using platform functions with the same name.
-- New VL53L5CX_buffers.h file to update spread spectrum values in default config.
-
----------------------------------------------------------------------------------------------------------------
diff --git a/Pi_Pico_Cpp/blink/.gitignore b/Pi_Pico_Cpp/blink/.gitignore
deleted file mode 100644
index 378eac25d311703f3f2cd456d8036da525cd0366..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-build
diff --git a/Pi_Pico_Cpp/blink/.vscode/c_cpp_properties.json b/Pi_Pico_Cpp/blink/.vscode/c_cpp_properties.json
deleted file mode 100644
index b24aa9f5775a7f8b0135c80a698f24a2b6ccfda2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/c_cpp_properties.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
- "configurations": [
- {
- "name": "Pico",
- "includePath": [
- "${workspaceFolder}/**",
- "${userHome}/.pico-sdk/sdk/2.1.0/**"
- ],
- "forcedInclude": [
- "${userHome}/.pico-sdk/sdk/2.1.0/src/common/pico_base_headers/include/pico.h",
- "${workspaceFolder}/build/generated/pico_base/pico/config_autogen.h"
- ],
- "defines": [],
- "compilerPath": "${userHome}/.pico-sdk/toolchain/13_3_Rel1/bin/arm-none-eabi-gcc",
- "compileCommands": "${workspaceFolder}/build/compile_commands.json",
- "cStandard": "c17",
- "cppStandard": "c++14",
- "intelliSenseMode": "linux-gcc-arm"
- }
- ],
- "version": 4
-}
diff --git a/Pi_Pico_Cpp/blink/.vscode/cmake-kits.json b/Pi_Pico_Cpp/blink/.vscode/cmake-kits.json
deleted file mode 100644
index b0f3815f1ea201ceb8b74ee10324640e33bfd880..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/cmake-kits.json
+++ /dev/null
@@ -1,15 +0,0 @@
-[
- {
- "name": "Pico",
- "compilers": {
- "C": "${command:raspberry-pi-pico.getCompilerPath}",
- "CXX": "${command:raspberry-pi-pico.getCxxCompilerPath}"
- },
- "environmentVariables": {
- "PATH": "${command:raspberry-pi-pico.getEnvPath};${env:PATH}"
- },
- "cmakeSettings": {
- "Python3_EXECUTABLE": "${command:raspberry-pi-pico.getPythonPath}"
- }
- }
-]
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/blink/.vscode/extensions.json b/Pi_Pico_Cpp/blink/.vscode/extensions.json
deleted file mode 100644
index a940d7cd92bb13fb5536b2b8a0e2288f1bdad73f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/extensions.json
+++ /dev/null
@@ -1,9 +0,0 @@
-{
- "recommendations": [
- "marus25.cortex-debug",
- "ms-vscode.cpptools",
- "ms-vscode.cpptools-extension-pack",
- "ms-vscode.vscode-serial-monitor",
- "raspberry-pi.raspberry-pi-pico"
- ]
-}
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/blink/.vscode/launch.json b/Pi_Pico_Cpp/blink/.vscode/launch.json
deleted file mode 100644
index 19f1a4745d257013625dac9cdb15ce67bed11ad9..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/launch.json
+++ /dev/null
@@ -1,70 +0,0 @@
-{
- "version": "0.2.0",
- "configurations": [
- {
- "name": "Pico Debug (Cortex-Debug)",
- "cwd": "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "openocd",
- "serverpath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "configFiles": [
- "raspberrypi-swd.cfg",
- "target/${command:raspberry-pi-pico.getTarget}.cfg"
- ],
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ],
- "openOCDLaunchCommands": [
- "adapter speed 5000"
- ]
- },
- {
- "name": "Pico Debug (Cortex-Debug with external OpenOCD)",
- "cwd": "${workspaceRoot}",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "external",
- "gdbTarget": "localhost:3333",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ]
- },
- {
- "name": "Pico Debug (C++ Debugger)",
- "type": "cppdbg",
- "request": "launch",
- "cwd": "${workspaceRoot}",
- "program": "${command:raspberry-pi-pico.launchTargetPath}",
- "MIMode": "gdb",
- "miDebuggerPath": "${command:raspberry-pi-pico.getGDBPath}",
- "miDebuggerServerAddress": "localhost:3333",
- "debugServerPath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "debugServerArgs": "-f raspberrypi-swd.cfg -f target/${command:raspberry-pi-pico.getTarget}.cfg -c \"adapter speed 5000\"",
- "serverStarted": "Listening on port .* for gdb connections",
- "filterStderr": true,
- "hardwareBreakpoints": {
- "require": true,
- "limit": 4
- },
- "preLaunchTask": "Flash",
- "svdPath": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd"
- },
- ]
-}
diff --git a/Pi_Pico_Cpp/blink/.vscode/settings.json b/Pi_Pico_Cpp/blink/.vscode/settings.json
deleted file mode 100644
index 992389d4db51c9c63e53306e681357c4f7d01b8a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/settings.json
+++ /dev/null
@@ -1,39 +0,0 @@
-{
- "cmake.options.statusBarVisibility": "hidden",
- "cmake.options.advanced": {
- "build": {
- "statusBarVisibility": "hidden"
- },
- "launch": {
- "statusBarVisibility": "hidden"
- },
- "debug": {
- "statusBarVisibility": "hidden"
- }
- },
- "cmake.configureOnEdit": false,
- "cmake.automaticReconfigure": false,
- "cmake.configureOnOpen": false,
- "cmake.generator": "Ninja",
- "cmake.cmakePath": "${userHome}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "C_Cpp.debugShortcut": false,
- "terminal.integrated.env.windows": {
- "PICO_SDK_PATH": "${env:USERPROFILE}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1",
- "Path": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1/bin;${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool;${env:USERPROFILE}/.pico-sdk/cmake/v3.29.9/bin;${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1;${env:PATH}"
- },
- "terminal.integrated.env.osx": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "terminal.integrated.env.linux": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "raspberry-pi-pico.cmakeAutoConfigure": true,
- "raspberry-pi-pico.useCmakeTools": false,
- "raspberry-pi-pico.cmakePath": "${HOME}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "raspberry-pi-pico.ninjaPath": "${HOME}/.pico-sdk/ninja/v1.12.1/ninja"
-}
diff --git a/Pi_Pico_Cpp/blink/.vscode/tasks.json b/Pi_Pico_Cpp/blink/.vscode/tasks.json
deleted file mode 100644
index 02ad74499fa66150354b1548b29928a2005ab495..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/.vscode/tasks.json
+++ /dev/null
@@ -1,58 +0,0 @@
-{
- "version": "2.0.0",
- "tasks": [
- {
- "label": "Compile Project",
- "type": "process",
- "isBuildCommand": true,
- "command": "${userHome}/.pico-sdk/ninja/v1.12.1/ninja",
- "args": ["-C", "${workspaceFolder}/build"],
- "group": "build",
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": "$gcc",
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1/ninja.exe"
- }
- },
- {
- "label": "Run Project",
- "type": "process",
- "command": "${env:HOME}/.pico-sdk/picotool/2.1.0/picotool/picotool",
- "args": [
- "load",
- "${command:raspberry-pi-pico.launchTargetPath}",
- "-fx"
- ],
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool/picotool.exe"
- }
- },
- {
- "label": "Flash",
- "type": "process",
- "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "args": [
- "-s",
- "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "-f",
- "raspberrypi-swd.cfg",
- "-f",
- "target/${command:raspberry-pi-pico.getTarget}.cfg",
- "-c",
- "adapter speed 5000; program \"${command:raspberry-pi-pico.launchTargetPath}\" verify reset exit"
- ],
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- }
- }
- ]
-}
diff --git a/Pi_Pico_Cpp/blink/CMakeLists.txt b/Pi_Pico_Cpp/blink/CMakeLists.txt
deleted file mode 100644
index 6683ad8d9ee000fe88928c9674a5f68d66a5ab26..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/CMakeLists.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-# Generated Cmake Pico project file
-
-cmake_minimum_required(VERSION 3.13)
-
-set(CMAKE_C_STANDARD 11)
-set(CMAKE_CXX_STANDARD 17)
-set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
-
-# Initialise pico_sdk from installed location
-# (note this can come from environment, CMake cache etc)
-
-# == DO NOT EDIT THE FOLLOWING LINES for the Raspberry Pi Pico VS Code Extension to work ==
-if(WIN32)
- set(USERHOME $ENV{USERPROFILE})
-else()
- set(USERHOME $ENV{HOME})
-endif()
-set(sdkVersion 2.1.0)
-set(toolchainVersion 13_3_Rel1)
-set(picotoolVersion 2.1.0)
-set(picoVscode ${USERHOME}/.pico-sdk/cmake/pico-vscode.cmake)
-if (EXISTS ${picoVscode})
- include(${picoVscode})
-endif()
-# ====================================================================================
-set(PICO_BOARD pico CACHE STRING "Board type")
-
-# Pull in Raspberry Pi Pico SDK (must be before project)
-include(pico_sdk_import.cmake)
-include_directories(include)
-
-project(blink CPP CXX ASM)
-
-# Initialise the Raspberry Pi Pico SDK
-pico_sdk_init()
-
-# Add executable. Default name is the project name, version 0.1
-
-add_executable(blink
- blink.cpp
- )
-
-# pull in common dependencies
-target_link_libraries(blink pico_stdlib)
-
-if (PICO_CYW43_SUPPORTED)
- target_link_libraries(blink pico_cyw43_arch_none)
-endif()
-
-# create map/bin/hex file etc.
-pico_add_extra_outputs(blink)
-
-# add url via pico_set_program_url
diff --git a/Pi_Pico_Cpp/blink/blink.cpp b/Pi_Pico_Cpp/blink/blink.cpp
deleted file mode 100644
index 5fda95dadb822f6a0f3b146370f965e2d673a6bf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/blink.cpp
+++ /dev/null
@@ -1,179 +0,0 @@
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD basic example */
-/***********************************/
-/*
-* This example is the most basic. It initializes the VL53L5CX ULD, and starts
-* a ranging to capture 10 frames.
-*
-* By default, ULD is configured to have the following settings :
-* - Resolution 4x4
-* - Ranging period 1Hz
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int main(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/blink/include/platform.h b/Pi_Pico_Cpp/blink/include/platform.h
deleted file mode 100644
index 9b23c0d11134d268753579edaab0cfbbbe58e1f0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/platform.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef _PLATFORM_H_
-#define _PLATFORM_H_
-#pragma once
-
-#include <stdint.h>
-#include <string.h>
-
-/**
- * @brief Structure VL53L5CX_Platform needs to be filled by the customer,
- * depending on his platform. At least, it contains the VL53L5CX I2C address.
- * Some additional fields can be added, as descriptors, or platform
- * dependencies. Anything added into this structure is visible into the platform
- * layer.
- */
-
-typedef struct
-{
- /* To be filled with customer's platform. At least an I2C address/descriptor
- * needs to be added */
- /* Example for most standard platform : I2C address of sensor */
- uint16_t address;
-
-} VL53L5CX_Platform;
-
-/*
- * @brief The macro below is used to define the number of target per zone sent
- * through I2C. This value can be changed by user, in order to tune I2C
- * transaction, and also the total memory size (a lower number of target per
- * zone means a lower RAM). The value must be between 1 and 4.
- */
-
-#define VL53L5CX_NB_TARGET_PER_ZONE 1U
-
-/*
- * @brief The macro below can be used to avoid data conversion into the driver.
- * By default there is a conversion between firmware and user data. Using this macro
- * allows to use the firmware format instead of user format. The firmware format allows
- * an increased precision.
- */
-
-// #define VL53L5CX_USE_RAW_FORMAT
-
-/*
- * @brief All macro below are used to configure the sensor output. User can
- * define some macros if he wants to disable selected output, in order to reduce
- * I2C access.
- */
-
-// #define VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-// #define VL53L5CX_DISABLE_NB_SPADS_ENABLED
-// #define VL53L5CX_DISABLE_NB_TARGET_DETECTED
-// #define VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-// #define VL53L5CX_DISABLE_RANGE_SIGMA_MM
-// #define VL53L5CX_DISABLE_DISTANCE_MM
-// #define VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-// #define VL53L5CX_DISABLE_TARGET_STATUS
-// #define VL53L5CX_DISABLE_MOTION_INDICATOR
-
-/**
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) *p_values : Pointer of value to read.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value);
-
-/**
- * @brief Mandatory function used to write one single byte.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) value : Pointer of value to write.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value);
-
-/**
- * @brief Mandatory function used to read multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to read.
- * @param (uint8_t) *p_values : Buffer of bytes to read.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Mandatory function used to write multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to write.
- * @param (uint8_t) *p_values : Buffer of bytes to write.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Optional function, only used to perform an hardware reset of the
- * sensor. This function is not used in the API, but it can be used by the host.
- * This function is not mandatory to fill if user don't want to reset the
- * sensor.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform);
-
-/**
- * @brief Mandatory function, used to swap a buffer. The buffer size is always a
- * multiple of 4 (4, 8, 12, 16, ...).
- * @param (uint8_t*) buffer : Buffer to swap, generally uint32_t
- * @param (uint16_t) size : Buffer size to swap
- */
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size);
-/**
- * @brief Mandatory function, used to wait during an amount of time. It must be
- * filled as it's used into the API.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint32_t) TimeMs : Time to wait in ms.
- * @return (uint8_t) status : 0 if wait is finished.
- */
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs);
-
-#endif // _PLATFORM_H_
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/blink/include/vl53l5cx_api.h b/Pi_Pico_Cpp/blink/include/vl53l5cx_api.h
deleted file mode 100644
index 0e870ac0b4a620dbc9c473db4e2919db875d2db8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/vl53l5cx_api.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_API_H_
-#define VL53L5CX_API_H_
-
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-#pragma anon_unions
-#endif
-
-
-
-#include "platform.h"
-
-/**
- * @brief Current driver version.
- */
-
-#define VL53L5CX_API_REVISION "VL53L5CX_2.0.0"
-
-/**
- * @brief Default I2C address of VL53L5CX sensor. Can be changed using function
- * vl53l5cx_set_i2c_address() function is called.
- */
-
-#define VL53L5CX_DEFAULT_I2C_ADDRESS ((uint16_t)0x52)
-
-/**
- * @brief Macro VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8 allows
- * setting sensor in 4x4 mode or 8x8 mode, using function
- * vl53l5cx_set_resolution().
- */
-
-#define VL53L5CX_RESOLUTION_4X4 ((uint8_t) 16U)
-#define VL53L5CX_RESOLUTION_8X8 ((uint8_t) 64U)
-
-
-/**
- * @brief Macro VL53L5CX_TARGET_ORDER_STRONGEST or VL53L5CX_TARGET_ORDER_CLOSEST
- * are used to select the target order for data output.
- */
-
-#define VL53L5CX_TARGET_ORDER_CLOSEST ((uint8_t) 1U)
-#define VL53L5CX_TARGET_ORDER_STRONGEST ((uint8_t) 2U)
-
-/**
- * @brief Macro VL53L5CX_RANGING_MODE_CONTINUOUS and
- * VL53L5CX_RANGING_MODE_AUTONOMOUS are used to change the ranging mode.
- * Autonomous mode can be used to set a precise integration time, whereas
- * continuous is always maximum.
- */
-
-#define VL53L5CX_RANGING_MODE_CONTINUOUS ((uint8_t) 1U)
-#define VL53L5CX_RANGING_MODE_AUTONOMOUS ((uint8_t) 3U)
-
-/**
- * @brief The default power mode is VL53L5CX_POWER_MODE_WAKEUP. User can choose
- * the mode VL53L5CX_POWER_MODE_SLEEP to save power consumption is the device
- * is not used. The low power mode retains the firmware and the configuration.
- * Both modes can be changed using function vl53l5cx_set_power_mode().
- */
-
-#define VL53L5CX_POWER_MODE_SLEEP ((uint8_t) 0U)
-#define VL53L5CX_POWER_MODE_WAKEUP ((uint8_t) 1U)
-
-/**
- * @brief Macro VL53L5CX_STATUS_OK indicates that VL53L5 sensor has no error.
- * Macro VL53L5CX_STATUS_ERROR indicates that something is wrong (value,
- * I2C access, ...). Macro VL53L5CX_MCU_ERROR is used to indicate a MCU issue.
- */
-
-#define VL53L5CX_STATUS_OK ((uint8_t) 0U)
-#define VL53L5CX_STATUS_TIMEOUT_ERROR ((uint8_t) 1U)
-#define VL53L5CX_STATUS_CORRUPTED_FRAME ((uint8_t) 2U)
-#define VL53L5CX_STATUS_CRC_CSUM_FAILED ((uint8_t) 3U)
-#define VL53L5CX_STATUS_XTALK_FAILED ((uint8_t) 4U)
-#define VL53L5CX_MCU_ERROR ((uint8_t) 66U)
-#define VL53L5CX_STATUS_INVALID_PARAM ((uint8_t) 127U)
-#define VL53L5CX_STATUS_ERROR ((uint8_t) 255U)
-
-/**
- * @brief Definitions for Range results block headers
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0xDB840401U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0xDBC40404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0xDEC40402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0xDF440402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0xE0440401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0xE0840401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xD85808C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0xDB84U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0xDBC4U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0xDEC4U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0xDF44U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0xE044U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0xE084U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xD858U)
-
-#else
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0x57D00401U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0x58900404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0x64900402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0x66900402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0x6A900401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0x6B900401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xCC5008C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0x57D0U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0x5890U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0x6490U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0x6690U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0x6A90U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0x6B90U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xCC50U)
-#endif
-
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_NVM_DATA_SIZE ((uint16_t)492U)
-#define VL53L5CX_CONFIGURATION_SIZE ((uint16_t)972U)
-#define VL53L5CX_OFFSET_BUFFER_SIZE ((uint16_t)488U)
-#define VL53L5CX_XTALK_BUFFER_SIZE ((uint16_t)776U)
-
-#define VL53L5CX_DCI_ZONE_CONFIG ((uint16_t)0x5450U)
-#define VL53L5CX_DCI_FREQ_HZ ((uint16_t)0x5458U)
-#define VL53L5CX_DCI_INT_TIME ((uint16_t)0x545CU)
-#define VL53L5CX_DCI_FW_NB_TARGET ((uint16_t)0x5478)
-#define VL53L5CX_DCI_RANGING_MODE ((uint16_t)0xAD30U)
-#define VL53L5CX_DCI_DSS_CONFIG ((uint16_t)0xAD38U)
-#define VL53L5CX_DCI_VHV_CONFIG ((uint16_t)0xAD60U)
-#define VL53L5CX_DCI_TARGET_ORDER ((uint16_t)0xAE64U)
-#define VL53L5CX_DCI_SHARPENER ((uint16_t)0xAED8U)
-#define VL53L5CX_DCI_INTERNAL_CP ((uint16_t)0xB39CU)
-#define VL53L5CX_DCI_SYNC_PIN ((uint16_t)0xB5F0U)
-#define VL53L5CX_DCI_MOTION_DETECTOR_CFG ((uint16_t)0xBFACU)
-#define VL53L5CX_DCI_SINGLE_RANGE ((uint16_t)0xD964U)
-#define VL53L5CX_DCI_OUTPUT_CONFIG ((uint16_t)0xD968U)
-#define VL53L5CX_DCI_OUTPUT_ENABLES ((uint16_t)0xD970U)
-#define VL53L5CX_DCI_OUTPUT_LIST ((uint16_t)0xD980U)
-#define VL53L5CX_DCI_PIPE_CONTROL ((uint16_t)0xDB80U)
-#define VL53L5CX_GLARE_FILTER ((uint16_t)0xE108U)
-
-
-#define VL53L5CX_UI_CMD_STATUS ((uint16_t)0x2C00U)
-#define VL53L5CX_UI_CMD_START ((uint16_t)0x2C04U)
-#define VL53L5CX_UI_CMD_END ((uint16_t)0x2FFFU)
-
-/**
- * @brief Inner values for API. Max buffer size depends of the selected output.
- */
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-#define L5CX_AMB_SIZE 260U
-#else
-#define L5CX_AMB_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
-#define L5CX_SPAD_SIZE 260U
-#else
-#define L5CX_SPAD_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
-#define L5CX_NTAR_SIZE 68U
-#else
-#define L5CX_NTAR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-#define L5CX_SPS_SIZE ((256U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SPS_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
-#define L5CX_SIGR_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SIGR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
-#define L5CX_DIST_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_DIST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-#define L5CX_RFLEST_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_RFLEST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
-#define L5CX_STA_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_STA_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
-#define L5CX_MOT_SIZE 144U
-#else
-#define L5CX_MOT_SIZE 0U
-#endif
-
-/**
- * @brief Macro VL53L5CX_MAX_RESULTS_SIZE indicates the maximum size used by
- * output through I2C. Value 40 corresponds to headers + meta-data + common-data
- * and 20 corresponds to the footer.
- */
-
-#define VL53L5CX_MAX_RESULTS_SIZE ( 40U \
- + L5CX_AMB_SIZE + L5CX_SPAD_SIZE + L5CX_NTAR_SIZE + L5CX_SPS_SIZE \
- + L5CX_SIGR_SIZE + L5CX_DIST_SIZE + L5CX_RFLEST_SIZE + L5CX_STA_SIZE \
- + L5CX_MOT_SIZE + 20U)
-
-/**
- * @brief Macro VL53L5CX_TEMPORARY_BUFFER_SIZE can be used to know the size of
- * the temporary buffer. The minimum size is 1024, and the maximum depends of
- * the output configuration.
- */
-
-#if VL53L5CX_MAX_RESULTS_SIZE < 1024U
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) 1024U)
-#else
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) VL53L5CX_MAX_RESULTS_SIZE)
-#endif
-
-
-/**
- * @brief Structure VL53L5CX_Configuration contains the sensor configuration.
- * User MUST not manually change these field, except for the sensor address.
- */
-
-typedef struct
-{
- /* Platform, filled by customer into the 'platform.h' file */
- VL53L5CX_Platform platform;
- /* Results streamcount, value auto-incremented at each range */
- uint8_t streamcount;
- /* Size of data read though I2C */
- uint32_t data_read_size;
- /* Address of default configuration buffer */
- uint8_t *default_configuration;
- /* Address of default Xtalk buffer */
- uint8_t *default_xtalk;
- /* Offset buffer */
- uint8_t offset_data[VL53L5CX_OFFSET_BUFFER_SIZE];
- /* Xtalk buffer */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
- /* Temporary buffer used for internal driver processing */
- uint8_t temp_buffer[VL53L5CX_TEMPORARY_BUFFER_SIZE];
- /* Auto-stop flag for stopping the sensor */
- uint8_t is_auto_stop_enabled;
-} VL53L5CX_Configuration;
-
-
-/**
- * @brief Structure VL53L5CX_ResultsData contains the ranging results of
- * VL53L5CX. If user wants more than 1 target per zone, the results can be split
- * into 2 sub-groups :
- * - Per zone results. These results are common to all targets (ambient_per_spad
- * , nb_target_detected and nb_spads_enabled).
- * - Per target results : These results are different relative to the detected
- * target (signal_per_spad, range_sigma_mm, distance_mm, reflectance,
- * target_status).
- */
-
-typedef struct
-{
- /* Internal sensor silicon temperature */
- int8_t silicon_temp_degc;
-
- /* Ambient noise in kcps/spads */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- uint32_t ambient_per_spad[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of valid target detected for 1 zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- uint8_t nb_target_detected[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of spads enabled for this ranging */
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- uint32_t nb_spads_enabled[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Signal returned to the sensor in kcps/spads */
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- uint32_t signal_per_spad[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Sigma of the current distance in mm */
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- uint16_t range_sigma_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Measured distance in mm */
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- int16_t distance_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Estimated reflectance in percent */
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- uint8_t reflectance[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Status indicating the measurement validity (5 & 9 means ranging OK)*/
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- uint8_t target_status[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Motion detector results */
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- struct
- {
- uint32_t global_indicator_1;
- uint32_t global_indicator_2;
- uint8_t status;
- uint8_t nb_of_detected_aggregates;
- uint8_t nb_of_aggregates;
- uint8_t spare;
- uint32_t motion[32];
- } motion_indicator;
-#endif
-
-} VL53L5CX_ResultsData;
-
-
-union Block_header {
- uint32_t bytes;
- struct {
- uint32_t type : 4;
- uint32_t size : 12;
- uint32_t idx : 16;
- };
-};
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive);
-
-/**
- * @brief Mandatory function used to initialize the sensor. This function must
- * be called after a power on, to load the firmware into the VL53L5CX. It takes
- * a few hundred milliseconds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if initialization is OK.
- */
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to change the I2C address of the sensor. If
- * multiple VL53L5 sensors are connected to the same I2C line, all other LPn
- * pins needs to be set to Low. The default sensor address is 0x52.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) i2c_address : New I2C address.
- * @return (uint8_t) status : 0 if new address is OK
- */
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address);
-
-/**
- * @brief This function is used to get the current sensor power mode.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_power_mode : Current power mode. The value of this
- * pointer is equal to 0 if the sensor is in low power,
- * (VL53L5CX_POWER_MODE_SLEEP), or 1 if sensor is in standard mode
- * (VL53L5CX_POWER_MODE_WAKEUP).
- * @return (uint8_t) status : 0 if power mode is OK
- */
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode);
-
-/**
- * @brief This function is used to set the sensor in Low Power mode, for
- * example if the sensor is not used during a long time. The macro
- * VL53L5CX_POWER_MODE_SLEEP can be used to enable the low power mode. When user
- * want to restart the sensor, he can use macro VL53L5CX_POWER_MODE_WAKEUP.
- * Please ensure that the device is not streaming before calling the function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) power_mode : Selected power mode (VL53L5CX_POWER_MODE_SLEEP
- * or VL53L5CX_POWER_MODE_WAKEUP)
- * @return (uint8_t) status : 0 if power mode is OK, or 127 if power mode
- * requested by user is not valid.
- */
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode);
-
-/**
- * @brief This function starts a ranging session. When the sensor streams, host
- * cannot change settings 'on-the-fly'.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if start is OK.
- */
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function stops the ranging session. It must be used when the
- * sensor streams, after calling vl53l5cx_start_ranging().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if stop is OK
- */
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function checks if a new data is ready by polling I2C. If a new
- * data is ready, a flag will be raised.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_isReady : Value of this pointer be updated to 0 if data
- * is not ready, or 1 if a new data is ready.
- * @return (uint8_t) status : 0 if I2C reading is OK
- */
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady);
-
-/**
- * @brief This function gets the ranging data, using the selected output and the
- * resolution.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_ResultsData) *p_results : VL53L5 results structure.
- * @return (uint8_t) status : 0 data are successfully get.
- */
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results);
-
-/**
- * @brief This function gets the current resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_resolution : Value of this pointer will be equal to 16
- * for 4x4 mode, and 64 for 8x8 mode.
- * @return (uint8_t) status : 0 if resolution is OK.
- */
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution);
-
-/**
- * @brief This function sets a new resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) resolution : Use macro VL53L5CX_RESOLUTION_4X4 or
- * VL53L5CX_RESOLUTION_8X8 to set the resolution.
- * @return (uint8_t) status : 0 if set resolution is OK.
- */
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution);
-
-/**
- * @brief This function gets the current ranging frequency in Hz. Ranging
- * frequency corresponds to the time between each measurement.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_frequency_hz: Contains the ranging frequency in Hz.
- * @return (uint8_t) status : 0 if ranging frequency is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz);
-
-/**
- * @brief This function sets a new ranging frequency in Hz. Ranging frequency
- * corresponds to the measurements frequency. This setting depends of
- * the resolution, so please select your resolution before using this function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) frequency_hz : Contains the ranging frequency in Hz.
- * - For 4x4, min and max allowed values are : [1;60]
- * - For 8x8, min and max allowed values are : [1;15]
- * @return (uint8_t) status : 0 if ranging frequency is OK, or 127 if the value
- * is not correct.
- */
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz);
-
-/**
- * @brief This function gets the current integration time in ms.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_time_ms: Contains integration time in ms.
- * @return (uint8_t) status : 0 if integration time is OK.
- */
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms);
-
-/**
- * @brief This function sets a new integration time in ms. Integration time must
- * be computed to be lower than the ranging period, for a selected resolution.
- * Please note that this function has no impact on ranging mode continous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) time_ms : Contains the integration time in ms. For all
- * resolutions and frequency, the minimum value is 2ms, and the maximum is
- * 1000ms.
- * @return (uint8_t) status : 0 if set integration time is OK.
- */
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms);
-
-/**
- * @brief This function gets the current sharpener in percent. Sharpener can be
- * changed to blur more or less zones depending of the application.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_sharpener_percent: Contains the sharpener in percent.
- * @return (uint8_t) status : 0 if get sharpener is OK.
- */
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent);
-
-/**
- * @brief This function sets a new sharpener value in percent. Sharpener can be
- * changed to blur more or less zones depending of the application. Min value is
- * 0 (disabled), and max is 99.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) sharpener_percent : Value between 0 (disabled) and 99%.
- * @return (uint8_t) status : 0 if set sharpener is OK.
- */
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent);
-
-/**
- * @brief This function gets the current target order (closest or strongest).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_target_order: Contains the target order.
- * @return (uint8_t) status : 0 if get target order is OK.
- */
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order);
-
-/**
- * @brief This function sets a new target order. Please use macros
- * VL53L5CX_TARGET_ORDER_STRONGEST and VL53L5CX_TARGET_ORDER_CLOSEST to define
- * the new output order. By default, the sensor is configured with the strongest
- * output.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) target_order : Required target order.
- * @return (uint8_t) status : 0 if set target order is OK, or 127 if target
- * order is unknown.
- */
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order);
-
-/**
- * @brief This function is used to get the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_ranging_mode : current ranging mode
- * @return (uint8_t) status : 0 if get ranging mode is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode);
-
-/**
- * @brief This function is used to set the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) ranging_mode : Use macros VL53L5CX_RANGING_MODE_CONTINUOUS,
- * VL53L5CX_RANGING_MODE_CONTINUOUS.
- * @return (uint8_t) status : 0 if set ranging mode is OK.
- */
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode);
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to get the number of frames between 2 temperature
- * compensation.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_repeat_count : Number of frames before next temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count);
-
-/**
- * @brief This function is used to set a periodic temperature compensation. By
- * setting a repeat count different to 0 the firmware automatically runs a
- * temperature calibration every N frames.
- * default the repeat count is set to 0
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) repeat_count : Number of frames between temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count);
-
-/**
- * @brief This function can be used to read 'extra data' from DCI. Using a known
- * index, the function fills the casted structure passed in argument.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ....
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to write 'extra data' to DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to replace 'extra data' in DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @param (uint8_t) *new_data : Contains the new fields.
- * @param (uint16_t) new_data_size : New data size.
- * @param (uint16_t) new_data_pos : New data position into the buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos);
-
-#endif //VL53L5CX_API_H_
diff --git a/Pi_Pico_Cpp/blink/include/vl53l5cx_buffers.h b/Pi_Pico_Cpp/blink/include/vl53l5cx_buffers.h
deleted file mode 100644
index 35eaff8b0efc6ee9eaebd24338d2a214c986fdea..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/vl53l5cx_buffers.h
+++ /dev/null
@@ -1,22012 +0,0 @@
-
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef VL53L5CX_BUFFERS_H_
-#define VL53L5CX_BUFFERS_H_
-
-#include "platform.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_RANGING 2
-#else
-#define VL53L5CX_FW_NBTAR_RANGING VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief This buffer contains the VL53L5CX firmware (MM1.8)
- */
-
-const uint8_t VL53L5CX_FIRMWARE[] = {
-
- 0xe0, 0x00, 0x03, 0x08,
- 0xe0, 0x00, 0x0a, 0xc8,
- 0xe0, 0x00, 0x05, 0x08,
- 0xe0, 0x64, 0x08, 0x48,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x64, 0x2e, 0x28,
- 0xe0, 0x64, 0x31, 0xe8,
- 0xe0, 0x64, 0x35, 0x48,
- 0xe0, 0x64, 0x3b, 0x88,
- 0xe0, 0x68, 0x04, 0x68,
- 0xe0, 0x68, 0x17, 0x68,
- 0xe0, 0x68, 0x1b, 0x48,
- 0xe0, 0x68, 0x1e, 0xc8,
- 0xe0, 0x68, 0x25, 0x28,
- 0xe0, 0x68, 0x28, 0x48,
- 0xe0, 0x00, 0x09, 0xe8,
- 0xe0, 0x00, 0x09, 0xc8,
- 0xe0, 0x00, 0x09, 0xa8,
- 0xe0, 0x00, 0x09, 0x88,
- 0xe0, 0x00, 0x09, 0x68,
- 0xe0, 0x00, 0x09, 0x48,
- 0xf8, 0x02, 0x00, 0x06,
- 0xc1, 0xc3, 0x81, 0x01,
- 0x1e, 0x06, 0xa1, 0x0b,
- 0x1a, 0x06, 0x81, 0x00,
- 0x99, 0x23, 0xe1, 0x00,
- 0x97, 0xb3, 0x97, 0xe3,
- 0x06, 0x2c, 0x97, 0x73,
- 0x06, 0x34, 0xe2, 0xc0,
- 0x06, 0x2c, 0xfc, 0x80,
- 0xc1, 0x83, 0xe3, 0x40,
- 0xe2, 0xc0, 0x06, 0x1c,
- 0xfc, 0x98, 0x06, 0x34,
- 0xfc, 0x9c, 0x06, 0x34,
- 0xe3, 0x40, 0x06, 0x1c,
- 0x69, 0x38, 0xc1, 0x83,
- 0xc1, 0x43, 0xe8, 0x00,
- 0xc1, 0xc3, 0x81, 0x05,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0xf4, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xff, 0x84, 0x07, 0xfc,
- 0x9a, 0x14, 0xd8, 0x04,
- 0xe4, 0x30, 0x04, 0x60,
- 0xfc, 0x12, 0x4c, 0x06,
- 0xe0, 0xd0, 0x4c, 0x4a,
- 0xc1, 0xc3, 0x82, 0x15,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf8, 0x04, 0x17, 0x0c,
- 0x81, 0x93, 0x81, 0x83,
- 0xe2, 0xc0, 0x0c, 0x2c,
- 0x1c, 0x8c, 0xd1, 0x67,
- 0xe3, 0x6b, 0xe4, 0x04,
- 0xe5, 0x6b, 0x8e, 0x05,
- 0x80, 0x64, 0x03, 0x88,
- 0x04, 0xd8, 0xe7, 0x6b,
- 0xe9, 0x6b, 0x80, 0x64,
- 0xeb, 0x6b, 0x8a, 0xc5,
- 0x80, 0x64, 0x06, 0x08,
- 0x0a, 0x58, 0xed, 0x6b,
- 0xf1, 0x6b, 0x80, 0x64,
- 0x80, 0x64, 0x07, 0x28,
- 0x08, 0x78, 0xf3, 0x6b,
- 0xf5, 0x6b, 0x80, 0x64,
- 0xf7, 0x6b, 0x8a, 0xc5,
- 0xf9, 0x6b, 0x8c, 0x05,
- 0xfb, 0x6b, 0x8c, 0x45,
- 0x0c, 0x0a, 0x8a, 0x45,
- 0x8a, 0x65, 0xe4, 0xb4,
- 0xe4, 0xb8, 0x0c, 0x0a,
- 0x0a, 0x78, 0x84, 0x45,
- 0x40, 0x06, 0xe0, 0x64,
- 0x40, 0x4a, 0xfc, 0x12,
- 0x80, 0xd5, 0xe0, 0xd0,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x1f, 0x0c, 0xc1, 0xc3,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf7, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xc1, 0xc3, 0xc1, 0x43,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x60, 0x00, 0x06, 0xda,
- 0x0a, 0x20, 0xa1, 0x0b,
- 0x18, 0x30, 0x64, 0x00,
- 0x0e, 0x24, 0xe4, 0x00,
- 0x02, 0x0a, 0x37, 0x80,
- 0x0c, 0x06, 0x80, 0x00,
- 0x08, 0x34, 0x20, 0x00,
- 0x0a, 0x70, 0xb7, 0x80,
- 0x58, 0x42, 0xa4, 0x04,
- 0x81, 0x61, 0x32, 0x98,
- 0x21, 0x2b, 0xaa, 0x45,
- 0x06, 0x0a, 0x8c, 0xbb,
- 0x0c, 0x10, 0x00, 0x00,
- 0x04, 0x00, 0xe4, 0x00,
- 0x18, 0x1a, 0x64, 0x00,
- 0xa8, 0x25, 0xe0, 0x00,
- 0x08, 0x04, 0xa1, 0x1d,
- 0x0e, 0x14, 0x57, 0x80,
- 0x10, 0x06, 0xd7, 0x80,
- 0x04, 0x40, 0x40, 0x00,
- 0x08, 0x54, 0xc4, 0x04,
- 0x4c, 0x72, 0x76, 0x80,
- 0x10, 0xc4, 0xd2, 0xa0,
- 0x14, 0x40, 0x76, 0x80,
- 0x0e, 0x64, 0xa4, 0x80,
- 0x12, 0x24, 0xf6, 0x80,
- 0xa1, 0x6b, 0x76, 0x80,
- 0x3c, 0x01, 0x54, 0x80,
- 0x8c, 0x8b, 0x40, 0x00,
- 0x04, 0x80, 0x08, 0x90,
- 0xdc, 0x00, 0x48, 0x70,
- 0x84, 0x9b, 0x28, 0xa3,
- 0xec, 0x04, 0x0e, 0xa0,
- 0x9e, 0xe5, 0xa0, 0x7d,
- 0x96, 0x4b, 0x21, 0x7b,
- 0x0e, 0x8a, 0x86, 0x45,
- 0x0e, 0x9a, 0xe5, 0x00,
- 0x00, 0x06, 0x44, 0x80,
- 0x16, 0xa0, 0x80, 0x00,
- 0x08, 0x54, 0x2c, 0x84,
- 0xc0, 0x00, 0x28, 0x9c,
- 0x20, 0x01, 0x0e, 0x4a,
- 0x00, 0x54, 0x40, 0x00,
- 0x00, 0xc4, 0xa8, 0xac,
- 0xc0, 0x00, 0x28, 0x9d,
- 0x0f, 0x9c, 0x14, 0x54,
- 0x40, 0x02, 0x88, 0x5b,
- 0x80, 0xcb, 0x99, 0xa8,
- 0x61, 0x84, 0x00, 0x84,
- 0xe1, 0x84, 0x08, 0x94,
- 0x12, 0x84, 0x01, 0xcb,
- 0x32, 0x4f, 0xe0, 0xfc,
- 0xe4, 0x04, 0x1c, 0x70,
- 0x4b, 0x0a, 0x01, 0xa1,
- 0x58, 0xda, 0x84, 0x10,
- 0x94, 0xbb, 0x64, 0x00,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x1c, 0x70, 0xc6, 0x1f,
- 0x00, 0xc4, 0x24, 0x08,
- 0x0e, 0x54, 0xa0, 0x84,
- 0x08, 0x54, 0x21, 0xfc,
- 0x40, 0x02, 0xa0, 0x84,
- 0xa1, 0xeb, 0x39, 0x9c,
- 0x3c, 0x00, 0x58, 0x00,
- 0xbc, 0x00, 0x4a, 0x40,
- 0x1d, 0x5a, 0x08, 0xc5,
- 0x0e, 0xe0, 0xe0, 0x04,
- 0x0d, 0xcb, 0xec, 0x04,
- 0xe1, 0xfc, 0x00, 0xa4,
- 0x4b, 0x0a, 0x42, 0xb7,
- 0x58, 0xfa, 0x84, 0x08,
- 0x08, 0xc4, 0x64, 0x18,
- 0x10, 0xa4, 0xe0, 0xfc,
- 0x40, 0x0a, 0x60, 0x84,
- 0x20, 0xbf, 0xed, 0x8c,
- 0x00, 0x54, 0x90, 0xab,
- 0x14, 0x84, 0x61, 0x84,
- 0x28, 0x0f, 0x9c, 0x80,
- 0x91, 0x94, 0x48, 0x22,
- 0x13, 0xb0, 0x4a, 0x62,
- 0x4c, 0x50, 0xc3, 0xc7,
- 0x80, 0x5b, 0x1c, 0x00,
- 0x27, 0xf0, 0x4e, 0xd8,
- 0x9c, 0x00, 0x44, 0x40,
- 0x96, 0x0b, 0x21, 0x1d,
- 0x57, 0x80, 0x04, 0xa4,
- 0xd7, 0x80, 0x02, 0xb4,
- 0x40, 0x00, 0x06, 0x06,
- 0xc4, 0x04, 0x04, 0x20,
- 0x52, 0x8c, 0x42, 0x12,
- 0x40, 0x10, 0x94, 0x6b,
- 0x4c, 0x20, 0x5c, 0x00,
- 0x80, 0x1b, 0xdc, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x8c, 0x1b, 0x7f, 0xc5,
- 0x80, 0x6b, 0x7f, 0xa5,
- 0x96, 0x7b, 0x73, 0xe5,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0xc1, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0xa0, 0x85, 0x98, 0x6b,
- 0x76, 0x80, 0x0a, 0x14,
- 0x08, 0x24, 0xa1, 0x2b,
- 0x06, 0x0a, 0x76, 0x80,
- 0x0c, 0x04, 0x80, 0x00,
- 0x98, 0x8b, 0x76, 0x80,
- 0x06, 0x1a, 0x1e, 0xc5,
- 0x18, 0x34, 0xe0, 0x00,
- 0xa1, 0x1b, 0x76, 0x80,
- 0xa4, 0x80, 0x0e, 0x40,
- 0x3c, 0x01, 0x4e, 0xc0,
- 0x08, 0x60, 0xc0, 0x00,
- 0x48, 0x50, 0x04, 0x80,
- 0xa8, 0x73, 0xdc, 0x00,
- 0xec, 0x04, 0x0a, 0x70,
- 0x9a, 0xc5, 0xa0, 0x5d,
- 0x90, 0xcb, 0x21, 0x5b,
- 0x0a, 0x8a, 0x86, 0x45,
- 0x0a, 0x9a, 0xe5, 0x00,
- 0x08, 0x06, 0x44, 0x80,
- 0x10, 0x70, 0x80, 0x00,
- 0x0a, 0x4a, 0x2c, 0x84,
- 0xc0, 0x00, 0x20, 0x00,
- 0x28, 0x95, 0x08, 0x34,
- 0x0c, 0x24, 0x40, 0x00,
- 0x08, 0x24, 0x8f, 0x94,
- 0x18, 0x24, 0x28, 0xa0,
- 0xc0, 0x00, 0x28, 0x94,
- 0x19, 0x98, 0x48, 0x42,
- 0x88, 0x3b, 0x98, 0x2b,
- 0x61, 0x84, 0x08, 0x14,
- 0xe0, 0xfc, 0x0c, 0x14,
- 0x61, 0x84, 0x18, 0x04,
- 0x2c, 0xcf, 0x89, 0x3b,
- 0xe4, 0x10, 0x46, 0xda,
- 0x04, 0x30, 0x45, 0x0a,
- 0xe4, 0x04, 0x12, 0x50,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x12, 0x50, 0x81, 0xc1,
- 0x0c, 0x24, 0x24, 0x08,
- 0x08, 0x34, 0xa1, 0xfc,
- 0x0a, 0x24, 0x20, 0x84,
- 0x48, 0x42, 0xa0, 0x84,
- 0xa1, 0x9b, 0x39, 0x98,
- 0x3c, 0x00, 0x46, 0x40,
- 0xbc, 0x00, 0x44, 0x50,
- 0x13, 0x5a, 0x18, 0x6b,
- 0x88, 0xc5, 0xe0, 0x04,
- 0xec, 0x04, 0x0e, 0x90,
- 0x46, 0xfa, 0x03, 0x3b,
- 0x45, 0x0a, 0xe4, 0x04,
- 0x0a, 0x24, 0x04, 0x00,
- 0x10, 0x34, 0xe1, 0x84,
- 0xc2, 0x67, 0x60, 0xfc,
- 0x60, 0x84, 0x1c, 0xc4,
- 0xed, 0x8c, 0x40, 0x0a,
- 0x61, 0x84, 0x08, 0x34,
- 0x10, 0xc4, 0xb0, 0x5f,
- 0x9c, 0xcb, 0x61, 0xfc,
- 0x50, 0x02, 0x30, 0x6f,
- 0x44, 0x12, 0x91, 0x88,
- 0x88, 0x3b, 0x13, 0x8c,
- 0x1c, 0x00, 0x42, 0x20,
- 0x40, 0x80, 0x8a, 0x2b,
- 0x18, 0xe4, 0x1c, 0x00,
- 0x4f, 0xd8, 0x9c, 0x80,
- 0x18, 0x0b, 0xa7, 0xec,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x75, 0xf5, 0xff, 0x95,
- 0xc1, 0xc3, 0x90, 0x5b,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x80, 0x8b, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0x04, 0x6b, 0x82, 0x9b,
- 0x80, 0xe5, 0x86, 0x7b,
- 0x06, 0x0a, 0xa1, 0x2b,
- 0x40, 0x0a, 0x80, 0x00,
- 0x80, 0xe5, 0xe5, 0x9c,
- 0x84, 0x1b, 0x81, 0x21,
- 0x0c, 0x0c, 0x84, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x68, 0x00, 0x41, 0x88,
- 0x00, 0xbb, 0x84, 0x1b,
- 0x02, 0xab, 0x90, 0x0b,
- 0x41, 0x18, 0x8e, 0x1b,
- 0x00, 0x7b, 0xe8, 0x00,
- 0x40, 0xd8, 0x92, 0x0b,
- 0x8c, 0x1b, 0x68, 0x00,
- 0x44, 0xb2, 0x81, 0x31,
- 0x42, 0xa2, 0xf0, 0x8c,
- 0x86, 0x23, 0xf2, 0x9c,
- 0x42, 0x12, 0x7d, 0x85,
- 0xc1, 0xc3, 0xf2, 0x80,
- 0xe6, 0x86, 0x4a, 0x0e,
- 0xe7, 0x06, 0x58, 0x0e,
- 0x66, 0x06, 0x46, 0x0e,
- 0xe1, 0xc0, 0x08, 0x54,
- 0x67, 0x86, 0x44, 0x0e,
- 0xe0, 0xc0, 0x00, 0xc4,
- 0x02, 0xc4, 0x60, 0x57,
- 0x8a, 0x03, 0xe1, 0xc0,
- 0xf2, 0x90, 0x42, 0x12,
- 0x5d, 0x93, 0x86, 0x03,
- 0xf2, 0x88, 0x42, 0x12,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc1, 0x7c, 0x02, 0x14,
- 0xdc, 0x00, 0x40, 0x10,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x08, 0x00, 0x14,
- 0xc1, 0x7c, 0x02, 0x14,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x08,
- 0xdd, 0x93, 0x99, 0x8c,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x00, 0x06,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x88, 0x00, 0x14,
- 0xc0, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x88,
- 0xdd, 0x93, 0x99, 0x8c,
- 0x81, 0x41, 0x61, 0x0b,
- 0x06, 0x14, 0x8a, 0x25,
- 0xe1, 0x1b, 0x76, 0x80,
- 0x76, 0x80, 0x04, 0x04,
- 0x08, 0x85, 0x81, 0x41,
- 0x06, 0x30, 0xa4, 0x33,
- 0x04, 0x04, 0x6c, 0x04,
- 0xa0, 0x3d, 0xe1, 0x84,
- 0xa1, 0x3b, 0x86, 0xe5,
- 0xc8, 0x8c, 0x02, 0x14,
- 0x64, 0x04, 0x18, 0x30,
- 0xe4, 0x08, 0x43, 0x1a,
- 0x24, 0x08, 0x18, 0x30,
- 0xa0, 0x84, 0x02, 0x14,
- 0x0a, 0xc0, 0x21, 0xcb,
- 0x19, 0x5a, 0xec, 0x04,
- 0x82, 0x45, 0xe0, 0x04,
- 0xc2, 0x47, 0x40, 0x1d,
- 0x1c, 0x80, 0x08, 0x44,
- 0x91, 0x84, 0x40, 0x02,
- 0x27, 0xfc, 0x4a, 0x98,
- 0x5d, 0x93, 0xc3, 0x17,
- 0x7f, 0xe5, 0x88, 0x0b,
- 0x7d, 0x55, 0x80, 0x4b,
- 0xc1, 0xc3, 0x88, 0x3b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x00, 0x6b,
- 0xe8, 0x04, 0x50, 0x48,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x00, 0x15, 0x80, 0x04,
- 0xa1, 0x1b, 0xe0, 0x3c,
- 0xdc, 0x38, 0x42, 0x08,
- 0x68, 0x04, 0x57, 0xc8,
- 0xc1, 0xc3, 0x8c, 0x0b,
- 0xfa, 0x04, 0x04, 0x7c,
- 0x74, 0xa9, 0x46, 0x4e,
- 0x49, 0x0e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x88, 0x25, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x84, 0x25, 0xf0, 0x0c,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0x60, 0x01, 0x00, 0x98,
- 0x04, 0x20, 0x80, 0x00,
- 0xc1, 0x16, 0xec, 0x04,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x04, 0x20, 0xfe, 0x65,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x85, 0xc1, 0x1e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x48,
- 0x45, 0xc8, 0xc1, 0x16,
- 0xfb, 0xf5, 0x87, 0xfc,
- 0xe1, 0x98, 0x41, 0x46,
- 0x61, 0x91, 0x43, 0x06,
- 0x80, 0x1e, 0xc0, 0x00,
- 0x81, 0x11, 0x9b, 0x01,
- 0x81, 0x31, 0x81, 0x21,
- 0xe8, 0x04, 0x4a, 0x88,
- 0x8c, 0x45, 0xa1, 0x0b,
- 0x74, 0xa9, 0x06, 0xce,
- 0x48, 0x4e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x8a, 0x45, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x86, 0x25, 0xf0, 0x0c,
- 0xf0, 0x0c, 0x4c, 0x10,
- 0xe4, 0x18, 0x4a, 0x5a,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0xa0, 0x00, 0x01, 0x28,
- 0x60, 0x01, 0x00, 0xa8,
- 0xc5, 0x50, 0x80, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x00, 0x4a, 0xc1, 0x56,
- 0xfe, 0x45, 0xf8, 0x0c,
- 0x04, 0x20, 0xc5, 0x54,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x65, 0xc1, 0x5e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x88,
- 0xc1, 0x56, 0xc5, 0x50,
- 0x87, 0xfc, 0x45, 0x88,
- 0x47, 0x86, 0xfb, 0x65,
- 0x08, 0xf0, 0xe1, 0x90,
- 0x8c, 0x4e, 0xe4, 0x30,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x81, 0x61, 0xff, 0x65,
- 0x00, 0x46, 0xe1, 0x6b,
- 0x4c, 0x08, 0xe1, 0xa4,
- 0x8b, 0x04, 0xdc, 0x38,
- 0xfe, 0x24, 0x89, 0x14,
- 0xe8, 0x6c, 0x65, 0x68,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x75, 0x78, 0xff, 0x65,
- 0x0c, 0x7c, 0xef, 0xfc,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x80, 0x55, 0xa1, 0x1b,
- 0x0a, 0x00, 0x83, 0x11,
- 0x40, 0x06, 0xe5, 0x50,
- 0x40, 0x4a, 0xfc, 0x12,
- 0xd7, 0xf4, 0xe0, 0xd0,
- 0xc1, 0xc3, 0x82, 0xb5,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0x3f,
- 0xf4, 0x04, 0x0b, 0x2f,
- 0xf4, 0x04, 0x0b, 0x1f,
- 0xf4, 0x04, 0x0b, 0x0f,
- 0x0a, 0x50, 0x81, 0x35,
- 0x40, 0x5a, 0xec, 0x40,
- 0x44, 0x06, 0xe0, 0xbc,
- 0x44, 0x6a, 0xbc, 0x22,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x98,
- 0x0a, 0xff, 0xc0, 0x00,
- 0xc1, 0xc3, 0xf4, 0x04,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0xf5,
- 0xf4, 0x04, 0x0b, 0xe5,
- 0xf4, 0x04, 0x0b, 0xd5,
- 0xf4, 0x04, 0x0b, 0xc5,
- 0xf4, 0x04, 0x0b, 0xb5,
- 0xf4, 0x04, 0x0b, 0xa5,
- 0xf4, 0x04, 0x0b, 0x95,
- 0xf4, 0x04, 0x0b, 0x85,
- 0x0a, 0xff, 0x81, 0x55,
- 0x0a, 0x50, 0xf4, 0x04,
- 0xd7, 0xe4, 0xec, 0x80,
- 0xd7, 0xb4, 0xd7, 0xd4,
- 0xd7, 0x94, 0xd7, 0xa4,
- 0xd7, 0x74, 0xd7, 0x84,
- 0x82, 0x0b, 0x94, 0x64,
- 0xfa, 0x00, 0x5c, 0x08,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0xe4, 0x40, 0x04, 0x8a,
- 0x21, 0x2b, 0x80, 0xa5,
- 0x82, 0x15, 0x80, 0x3b,
- 0x46, 0x12, 0x81, 0xf5,
- 0x06, 0x4a, 0xf9, 0x80,
- 0x82, 0xb5, 0xf8, 0x0c,
- 0x04, 0x20, 0x80, 0x3b,
- 0x04, 0x4a, 0xec, 0x04,
- 0xc5, 0x48, 0xe4, 0x00,
- 0x45, 0x88, 0xcd, 0x46,
- 0x0c, 0x4c, 0x87, 0xfc,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x6c, 0x40, 0x0a, 0x20,
- 0x49, 0x27, 0xe1, 0xc1,
- 0x04, 0x20, 0x8a, 0xcf,
- 0x06, 0xc0, 0x6c, 0x04,
- 0x04, 0x4a, 0xe4, 0x40,
- 0x48, 0x12, 0x64, 0x00,
- 0x00, 0x33, 0xf0, 0x8c,
- 0x02, 0x75, 0x80, 0x6b,
- 0x02, 0x85, 0xf0, 0x10,
- 0x02, 0x95, 0xf8, 0x0c,
- 0x02, 0xa5, 0xf8, 0x08,
- 0x4c, 0x75, 0xf8, 0x04,
- 0x4c, 0x85, 0xf0, 0x10,
- 0x4c, 0x95, 0xf8, 0x0c,
- 0x4c, 0xa5, 0xf8, 0x08,
- 0x44, 0x08, 0xf8, 0x04,
- 0x44, 0x52, 0x87, 0xf8,
- 0xe9, 0x2d, 0xf1, 0xb0,
- 0x0a, 0x20, 0x86, 0x95,
- 0xc5, 0x27, 0x6c, 0x10,
- 0x61, 0x88, 0x0e, 0x54,
- 0xec, 0x04, 0x0c, 0x20,
- 0x64, 0x04, 0x18, 0x70,
- 0xe4, 0x00, 0x0c, 0x4a,
- 0x04, 0x74, 0x44, 0xc7,
- 0x42, 0x42, 0xe0, 0x88,
- 0x86, 0x7b, 0x70, 0xb0,
- 0xdd, 0x8e, 0xd1, 0x84,
- 0x87, 0xfc, 0x4d, 0x88,
- 0x71, 0x88, 0x44, 0x52,
- 0xa1, 0x2b, 0x98, 0x33,
- 0xf7, 0xe5, 0xec, 0xf5,
- 0x88, 0x1b, 0x21, 0x2b,
- 0xf7, 0xa5, 0xec, 0x75,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x78, 0x0c, 0x00, 0x0a,
- 0x82, 0x25, 0x80, 0x3b,
- 0x94, 0xa5, 0xa1, 0x2b,
- 0x04, 0x20, 0x4d, 0x16,
- 0x06, 0x4a, 0xec, 0x04,
- 0xfe, 0x25, 0xf8, 0x0c,
- 0x90, 0x95, 0xe9, 0x2d,
- 0x7a, 0x80, 0x08, 0x14,
- 0xe4, 0x40, 0x04, 0x8a,
- 0xe0, 0xa0, 0x0a, 0x44,
- 0x08, 0x54, 0xa8, 0x5f,
- 0x06, 0xf5, 0xe0, 0xc0,
- 0x0c, 0x24, 0xaa, 0x4f,
- 0x0a, 0x20, 0x61, 0x90,
- 0x61, 0xc1, 0xec, 0x40,
- 0xec, 0x04, 0x0c, 0x60,
- 0x0c, 0x4a, 0x0a, 0xcf,
- 0x4e, 0x32, 0xe4, 0x00,
- 0x86, 0x2b, 0x70, 0xb0,
- 0xe4, 0x40, 0x06, 0x70,
- 0xf0, 0x10, 0x44, 0x45,
- 0xf8, 0x0c, 0x44, 0x45,
- 0xf8, 0x08, 0x44, 0x45,
- 0xf8, 0x04, 0x44, 0x45,
- 0x87, 0xfc, 0x4c, 0x08,
- 0xf1, 0xb0, 0x44, 0x52,
- 0x86, 0x95, 0xe9, 0x2d,
- 0xf9, 0xc1, 0x07, 0x51,
- 0x4a, 0x52, 0xa4, 0x53,
- 0x04, 0x53, 0xfa, 0xb0,
- 0xec, 0x10, 0x04, 0x20,
- 0x0e, 0x24, 0x08, 0x51,
- 0x45, 0x57, 0xe1, 0x88,
- 0xe4, 0x04, 0x18, 0x70,
- 0x6c, 0x04, 0x0c, 0x50,
- 0xe0, 0x88, 0x0a, 0x74,
- 0x64, 0x00, 0x0c, 0x4a,
- 0xdd, 0x4e, 0x86, 0x7b,
- 0x87, 0xfc, 0x4d, 0xc8,
- 0xaa, 0x23, 0x44, 0xc7,
- 0xa1, 0x2b, 0x98, 0x33,
- 0x04, 0x20, 0x82, 0x05,
- 0x04, 0x4a, 0xec, 0x04,
- 0xcd, 0x16, 0xe4, 0x00,
- 0x87, 0xfc, 0x45, 0xc8,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x04, 0x4a, 0x00, 0x7b,
- 0x40, 0x72, 0xe0, 0x10,
- 0x1e, 0xf0, 0x79, 0x88,
- 0x00, 0x0c, 0xed, 0x20,
- 0x00, 0x1a, 0x62, 0x00,
- 0x11, 0x0e, 0xf8, 0x0c,
- 0x1b, 0x0e, 0x82, 0x8b,
- 0x20, 0x01, 0x00, 0x26,
- 0x5e, 0x05, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x35,
- 0x23, 0x3e, 0xef, 0x8d,
- 0x5e, 0x17, 0xa4, 0x0b,
- 0x9d, 0x2e, 0xe0, 0xfc,
- 0x23, 0x88, 0xa1, 0x0e,
- 0x00, 0x24, 0xc0, 0x00,
- 0xc4, 0x1b, 0x61, 0x88,
- 0xc0, 0x3b, 0x7d, 0x41,
- 0x7a, 0x10, 0x42, 0x12,
- 0xfa, 0x10, 0x46, 0x32,
- 0x84, 0x13, 0x00, 0x33,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x82, 0x31, 0x7c, 0x3e,
- 0x00, 0x20, 0x19, 0x1e,
- 0x97, 0x3e, 0xec, 0x04,
- 0x00, 0x84, 0xfe, 0x0e,
- 0xaf, 0x8b, 0x61, 0x84,
- 0x54, 0x0a, 0x15, 0x8e,
- 0x2e, 0xa5, 0xe6, 0x8a,
- 0x00, 0x80, 0x8e, 0xa3,
- 0x10, 0x8a, 0x6c, 0x04,
- 0x40, 0x0a, 0xe4, 0xa4,
- 0x56, 0x72, 0xe6, 0x8a,
- 0x40, 0x70, 0x70, 0x80,
- 0xa2, 0xb5, 0xdc, 0x00,
- 0x00, 0x84, 0x0f, 0xbe,
- 0x23, 0xb4, 0xe1, 0x8c,
- 0xe6, 0x8a, 0x4c, 0x0a,
- 0x60, 0x84, 0x00, 0x64,
- 0xf0, 0x98, 0x50, 0x72,
- 0x8e, 0x03, 0x0d, 0x0e,
- 0x8e, 0x0b, 0x0b, 0x0e,
- 0x56, 0x08, 0x90, 0x1b,
- 0x13, 0x8e, 0xfc, 0x38,
- 0x0b, 0x84, 0x80, 0x9b,
- 0x90, 0x1b, 0x90, 0x0b,
- 0xfc, 0x38, 0x56, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x0e, 0x0b, 0x84, 0xd5,
- 0xa3, 0x24, 0x90, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0x8e, 0x0b, 0x21, 0x0d,
- 0x81, 0xc5, 0x82, 0x85,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x90, 0x1b, 0x0e, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0x21, 0x0d, 0xfc, 0x38,
- 0x80, 0x45, 0x8e, 0x0b,
- 0x93, 0x0e, 0x90, 0x0b,
- 0x50, 0xa2, 0x2c, 0x0b,
- 0x23, 0x64, 0xf1, 0x98,
- 0xf0, 0x98, 0x56, 0xa2,
- 0x90, 0x0b, 0x0b, 0x0e,
- 0x4c, 0x08, 0x94, 0x1b,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x09, 0xbe, 0x94, 0x0b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xa5, 0x82, 0x9d,
- 0x84, 0xd5, 0xa0, 0x0d,
- 0x90, 0x0b, 0x09, 0x64,
- 0x8c, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x01, 0xd5, 0xa1, 0x0d,
- 0x9c, 0x00, 0x50, 0x60,
- 0x82, 0x55, 0xa1, 0x0d,
- 0x90, 0x0b, 0x09, 0xa4,
- 0x94, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x55, 0xa1, 0x0d,
- 0x8f, 0xb4, 0x90, 0xab,
- 0x8d, 0x14, 0x8b, 0x94,
- 0x96, 0x93, 0xa3, 0x64,
- 0x71, 0x84, 0x40, 0xb2,
- 0x8d, 0x0e, 0x92, 0x1b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x92, 0x0b, 0x00, 0x8b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xc5, 0x82, 0x8d,
- 0xa0, 0x0d, 0x15, 0x84,
- 0x0d, 0x64, 0x86, 0x15,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x8c, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x4c, 0xb0, 0x01, 0xe5,
- 0x15, 0x84, 0x9c, 0x00,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x0d, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x95, 0xa1, 0x0d,
- 0x8c, 0xbb, 0x01, 0x35,
- 0x93, 0x04, 0x92, 0xbb,
- 0x94, 0x1b, 0x23, 0x64,
- 0x4c, 0x08, 0x93, 0x0e,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x96, 0x1b, 0x94, 0x0b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x13, 0xa4, 0x84, 0xd5,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x94, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x81, 0xd5, 0x82, 0xa5,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x13, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x56, 0x60, 0xa1, 0x0d,
- 0x96, 0xab, 0x9c, 0x00,
- 0x00, 0x2a, 0x9b, 0x04,
- 0x01, 0x18, 0xe0, 0x00,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x14, 0x84, 0x35,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x24, 0xe4, 0x00,
- 0xc1, 0x3e, 0xa8, 0x34,
- 0x43, 0x08, 0xe9, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa8, 0x14, 0x9c, 0x04,
- 0xa8, 0x0e, 0x9c, 0x1e,
- 0x19, 0x14, 0x81, 0xb5,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x28, 0xe4, 0x00,
- 0xc1, 0x36, 0xa8, 0x38,
- 0x43, 0x08, 0xe9, 0x26,
- 0x1d, 0x14, 0x87, 0xfc,
- 0xec, 0x04, 0x00, 0x80,
- 0x50, 0x0a, 0x81, 0x61,
- 0x40, 0x72, 0x66, 0x86,
- 0x1b, 0x0e, 0xf0, 0x84,
- 0x0e, 0x83, 0x80, 0xab,
- 0x90, 0xbb, 0x80, 0x9b,
- 0x8c, 0xd5, 0xd6, 0xad,
- 0x8e, 0x1b, 0x14, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0xa0, 0x0d, 0xfc, 0x38,
- 0xa1, 0x0b, 0x8a, 0xf5,
- 0x9d, 0x04, 0x92, 0x05,
- 0xa1, 0x0b, 0x8d, 0xb5,
- 0xc0, 0x40, 0x1e, 0x05,
- 0x01, 0x28, 0x88, 0xd5,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x24, 0x84, 0x55,
- 0x96, 0x1b, 0x90, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x80, 0x44, 0x84, 0x34,
- 0xc1, 0x3e, 0xc5, 0x4e,
- 0x87, 0xfc, 0x45, 0x08,
- 0xac, 0x04, 0x83, 0x15,
- 0xac, 0x1e, 0xa0, 0x14,
- 0x81, 0xc5, 0xa0, 0x0e,
- 0x96, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x90, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x21, 0x04, 0x87, 0xfc,
- 0x80, 0x83, 0x83, 0x61,
- 0xd6, 0xad, 0x80, 0xb3,
- 0x16, 0x0b, 0x94, 0xf5,
- 0xa3, 0x24, 0x8e, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0xf2, 0xc5, 0xa1, 0x0d,
- 0x40, 0x01, 0x03, 0x98,
- 0x1e, 0x07, 0x80, 0x00,
- 0x8e, 0x35, 0xe0, 0xfc,
- 0x96, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x94, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x87, 0x85, 0x87, 0xfc,
- 0x40, 0x01, 0x01, 0x28,
- 0x1e, 0x07, 0x80, 0x00,
- 0x84, 0x55, 0xe0, 0xfc,
- 0x94, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x92, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x83, 0x15, 0x87, 0xfc,
- 0xa8, 0x14, 0xa4, 0x04,
- 0xa8, 0x0e, 0xa4, 0x1e,
- 0x19, 0x24, 0x81, 0xc5,
- 0x94, 0x1b, 0x92, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x48, 0x80, 0x38,
- 0xc5, 0x36, 0xc1, 0x46,
- 0x87, 0xfc, 0x45, 0x08,
- 0x83, 0x61, 0x1d, 0x04,
- 0x71, 0x95, 0x80, 0x93,
- 0xa8, 0x04, 0x80, 0xa3,
- 0xa8, 0x1e, 0xac, 0x14,
- 0x81, 0xc5, 0xac, 0x0e,
- 0x94, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x96, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x1d, 0x04, 0x87, 0xfc,
- 0x21, 0x04, 0x83, 0x61,
- 0x6f, 0x35, 0x80, 0xa3,
- 0x1d, 0x14, 0x80, 0xb3,
- 0x95, 0x04, 0xa1, 0x6b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0x00, 0x0e, 0x88,
- 0xf0, 0x80, 0x58, 0x72,
- 0x71, 0x9c, 0x42, 0x92,
- 0xf1, 0xa4, 0x40, 0xa2,
- 0x92, 0x2b, 0x01, 0x1d,
- 0x44, 0xa0, 0x0e, 0x3b,
- 0x46, 0x90, 0x9c, 0x00,
- 0x48, 0x22, 0x9c, 0x00,
- 0xa1, 0x4b, 0xf1, 0x8c,
- 0x1e, 0x07, 0x8a, 0x25,
- 0x42, 0xa2, 0x60, 0xfc,
- 0x84, 0x55, 0xf1, 0x90,
- 0xfd, 0x31, 0x45, 0x47,
- 0x44, 0x22, 0xc8, 0x2b,
- 0x8e, 0x3b, 0x7a, 0x0c,
- 0x82, 0x21, 0x88, 0x23,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x54, 0x8c, 0x44,
- 0xc5, 0x4e, 0xcd, 0x5e,
- 0x87, 0xfc, 0x45, 0x08,
- 0x08, 0x30, 0x83, 0x35,
- 0xfd, 0x51, 0x6c, 0x04,
- 0x82, 0x21, 0x24, 0x43,
- 0xfa, 0x14, 0x48, 0x42,
- 0x26, 0x23, 0x88, 0x23,
- 0x04, 0x4a, 0x8e, 0x3b,
- 0x8c, 0x48, 0xe4, 0x00,
- 0xcd, 0x56, 0x84, 0x58,
- 0x45, 0x08, 0xc5, 0x46,
- 0x1d, 0x24, 0x87, 0xfc,
- 0xf1, 0xa0, 0x42, 0xc2,
- 0xf1, 0xac, 0x52, 0x82,
- 0x44, 0x92, 0xa4, 0x13,
- 0xa1, 0x2b, 0xfb, 0x84,
- 0x1e, 0x07, 0x8c, 0x45,
- 0x84, 0xb5, 0xe0, 0xfc,
- 0x61, 0x88, 0x02, 0x24,
- 0x42, 0x3b, 0xfd, 0x41,
- 0xf1, 0x88, 0x44, 0xc2,
- 0xfa, 0x10, 0x46, 0x32,
- 0x02, 0x30, 0x82, 0x33,
- 0x02, 0x4a, 0xe4, 0x04,
- 0xa8, 0x34, 0xe4, 0x00,
- 0xe9, 0x4e, 0x88, 0x44,
- 0x43, 0x08, 0xc9, 0x3e,
- 0x83, 0xb5, 0x87, 0xfc,
- 0x06, 0xb0, 0x7e, 0x14,
- 0x30, 0x33, 0xec, 0x04,
- 0x90, 0x13, 0x82, 0x21,
- 0x42, 0x12, 0xb8, 0x13,
- 0xfd, 0x31, 0x7a, 0x8c,
- 0xfa, 0x0c, 0x46, 0x12,
- 0xf1, 0x84, 0x42, 0x32,
- 0xe4, 0x00, 0x02, 0x4a,
- 0x46, 0xc2, 0x28, 0x58,
- 0x0e, 0x48, 0xf1, 0x88,
- 0xec, 0x04, 0x04, 0x20,
- 0x8e, 0x56, 0xe9, 0x46,
- 0x87, 0xfc, 0x42, 0x08,
- 0x98, 0x6b, 0x1d, 0x14,
- 0x82, 0x45, 0xc2, 0x0d,
- 0xef, 0xf8, 0x7e, 0x08,
- 0x8e, 0x0b, 0x00, 0x1b,
- 0xa3, 0x34, 0x9d, 0x24,
- 0xef, 0xfc, 0x5c, 0x68,
- 0xc2, 0x9d, 0x9d, 0x14,
- 0x7d, 0x58, 0xa8, 0x05,
- 0x92, 0x0b, 0x6f, 0xf8,
- 0xf1, 0xa4, 0x4e, 0x62,
- 0x80, 0x8b, 0x1d, 0x24,
- 0xf9, 0x88, 0x40, 0x72,
- 0x00, 0x0a, 0x11, 0x04,
- 0x5e, 0x07, 0xf8, 0x0c,
- 0x1b, 0x0e, 0xe0, 0xfc,
- 0xc0, 0x00, 0x00, 0x26,
- 0x40, 0x34, 0x5e, 0x05,
- 0x1e, 0x08, 0xef, 0x8d,
- 0x40, 0x8a, 0x9f, 0xfc,
- 0x84, 0x0d, 0xe6, 0x8a,
- 0x0e, 0x03, 0xa0, 0xc5,
- 0xf0, 0x88, 0x50, 0x72,
- 0x00, 0x24, 0x19, 0x0e,
- 0x44, 0x1b, 0xe1, 0x88,
- 0x40, 0x3b, 0xfd, 0x21,
- 0xfa, 0x08, 0x42, 0x12,
- 0x44, 0x32, 0x1d, 0x34,
- 0x80, 0x23, 0xfa, 0x08,
- 0xe4, 0x04, 0x16, 0x20,
- 0x0c, 0x10, 0x86, 0x13,
- 0xce, 0x8d, 0xe4, 0x04,
- 0x90, 0x9b, 0x8a, 0xc5,
- 0x92, 0xab, 0x21, 0x94,
- 0x94, 0x1b, 0x23, 0x24,
- 0x92, 0x0b, 0x94, 0x93,
- 0xfc, 0x38, 0x44, 0x08,
- 0x88, 0x75, 0xa3, 0x0d,
- 0xa1, 0x0b, 0x9b, 0x04,
- 0x1e, 0x07, 0x82, 0xe5,
- 0x84, 0x35, 0xe0, 0xfc,
- 0x64, 0x00, 0x16, 0x4a,
- 0x96, 0x1b, 0x92, 0x0b,
- 0x80, 0x34, 0xa8, 0x24,
- 0xc1, 0x2e, 0xe9, 0x3e,
- 0x87, 0xfc, 0x43, 0x08,
- 0xa8, 0x04, 0x83, 0x05,
- 0xa8, 0x1e, 0xa4, 0x14,
- 0x81, 0xb5, 0xa4, 0x0e,
- 0x64, 0x00, 0x0c, 0x4a,
- 0x8c, 0x1b, 0x92, 0x0b,
- 0x80, 0x38, 0xa8, 0x28,
- 0xc1, 0x26, 0xe9, 0x36,
- 0x87, 0xfc, 0x43, 0x08,
- 0xf4, 0xb5, 0xce, 0x9d,
- 0x19, 0x04, 0x9d, 0x04,
- 0xc1, 0x8d, 0x80, 0x83,
- 0x87, 0xd5, 0xf2, 0xb5,
- 0x82, 0x0d, 0x1b, 0xb4,
- 0x8e, 0x25, 0x99, 0xce,
- 0xfc, 0x84, 0xbe, 0x64,
- 0x82, 0x81, 0x82, 0x61,
- 0x8a, 0xc5, 0xce, 0xbd,
- 0x21, 0x94, 0x96, 0x9b,
- 0x23, 0x24, 0x92, 0xab,
- 0x94, 0x93, 0x94, 0x1b,
- 0x44, 0x08, 0x92, 0x0b,
- 0xa3, 0x0d, 0xfc, 0x38,
- 0x01, 0x18, 0x88, 0x75,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x10, 0x4a, 0x84, 0x35,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x24, 0x90, 0x1b,
- 0xe9, 0x3e, 0x80, 0x34,
- 0x43, 0x08, 0xc1, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa4, 0x14, 0xa8, 0x04,
- 0xa4, 0x0e, 0xa8, 0x1e,
- 0x0c, 0x4a, 0x81, 0xb5,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x28, 0x8c, 0x1b,
- 0xe9, 0x36, 0x80, 0x38,
- 0x43, 0x08, 0xc1, 0x26,
- 0xce, 0x9d, 0x87, 0xfc,
- 0x9d, 0x04, 0xf4, 0xb5,
- 0x80, 0xb3, 0x19, 0x04,
- 0xf2, 0xb5, 0xc1, 0xbd,
- 0xe5, 0x20, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0xfc, 0x80, 0x5b,
- 0x40, 0x06, 0xe2, 0xc0,
- 0xd5, 0x6e, 0xfc, 0x12,
- 0xd5, 0x8e, 0xd5, 0x7e,
- 0x40, 0x5a, 0xd5, 0x9e,
- 0x42, 0x06, 0xe0, 0xbc,
- 0xd5, 0xae, 0xbc, 0x22,
- 0xd5, 0xde, 0xd5, 0xbe,
- 0x42, 0x6a, 0xd5, 0xee,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x78,
- 0xc1, 0xc3, 0xc0, 0x00,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf0, 0x04, 0x4b, 0x85,
- 0xf0, 0x04, 0x4b, 0x95,
- 0xf0, 0x04, 0x4b, 0xa5,
- 0xf0, 0x04, 0x4b, 0xb5,
- 0xf0, 0x04, 0x4b, 0xc5,
- 0xf0, 0x04, 0x4b, 0xd5,
- 0xf0, 0x04, 0x4b, 0xe5,
- 0xf0, 0x04, 0x4b, 0xf5,
- 0xc2, 0x1f, 0x81, 0xa5,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xe0, 0xd0, 0x40, 0x4a,
- 0x82, 0xb5, 0xd5, 0x2e,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x4b, 0x0f, 0xc1, 0xc3,
- 0x4b, 0x1f, 0xf0, 0x04,
- 0x4b, 0x2f, 0xf0, 0x04,
- 0x4b, 0x3f, 0xf0, 0x04,
- 0x81, 0x65, 0xf0, 0x04,
- 0xd5, 0x1e, 0xc2, 0x1f,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0x94, 0xfe, 0xd5, 0x1e,
- 0xdd, 0x93, 0x81, 0x01,
- 0xe0, 0x04, 0x19, 0x86,
- 0xa3, 0xcd, 0xc1, 0xc3,
- 0x18, 0x4a, 0x82, 0xa5,
- 0x43, 0x46, 0xe0, 0x00,
- 0x02, 0x15, 0xe1, 0x98,
- 0x42, 0x05, 0x80, 0x00,
- 0x41, 0xfe, 0x80, 0x00,
- 0xbf, 0xff, 0x1f, 0xfd,
- 0x43, 0x46, 0xdd, 0x93,
- 0x84, 0x14, 0xe1, 0x98,
- 0x41, 0xfe, 0x84, 0xce,
- 0xff, 0xff, 0x7f, 0xfd,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0x7c, 0x0e, 0x82, 0x6b,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x02, 0x05, 0x80, 0x14,
- 0xa1, 0x0b, 0xe1, 0x48,
- 0x02, 0x10, 0x9a, 0xe5,
- 0xc0, 0x01, 0x65, 0x21,
- 0xbe, 0x14, 0xbe, 0x1e,
- 0x80, 0x8b, 0xfe, 0x1e,
- 0xa3, 0x0d, 0xa2, 0x04,
- 0x40, 0x1b, 0x92, 0x55,
- 0x14, 0x00, 0xfd, 0x21,
- 0x4e, 0x12, 0x64, 0x04,
- 0x44, 0x07, 0xfa, 0x08,
- 0x10, 0x03, 0x94, 0x73,
- 0xe4, 0x00, 0x0e, 0x6a,
- 0xe6, 0x10, 0x16, 0x00,
- 0xa1, 0x6b, 0x14, 0x0b,
- 0x14, 0x00, 0x00, 0xe5,
- 0x16, 0x15, 0xec, 0x04,
- 0x8d, 0x1b, 0xe0, 0x80,
- 0x22, 0x14, 0x8a, 0xf5,
- 0xec, 0x08, 0x00, 0x00,
- 0xf8, 0x80, 0x16, 0x25,
- 0x50, 0x05, 0x83, 0xab,
- 0x02, 0x06, 0x00, 0x04,
- 0x56, 0x15, 0xc0, 0x00,
- 0xa1, 0x2b, 0x58, 0x80,
- 0x10, 0x15, 0x88, 0x25,
- 0x83, 0x31, 0x61, 0x88,
- 0x00, 0x34, 0x22, 0x94,
- 0x80, 0x1f, 0xe8, 0x80,
- 0x82, 0x65, 0xa1, 0x1b,
- 0xe1, 0x8c, 0x10, 0x15,
- 0x2c, 0x14, 0x80, 0x1f,
- 0x82, 0x05, 0xa1, 0x1b,
- 0x44, 0x08, 0x82, 0x0b,
- 0x81, 0x75, 0xfc, 0x38,
- 0xfc, 0x38, 0x44, 0x08,
- 0xfc, 0x04, 0x81, 0x45,
- 0xfc, 0x38, 0x44, 0x08,
- 0x81, 0x9b, 0xa2, 0x04,
- 0xfe, 0x04, 0x88, 0x35,
- 0x91, 0x0b, 0x80, 0x04,
- 0x4e, 0x68, 0x86, 0xb5,
- 0x3f, 0xff, 0x47, 0xe5,
- 0xec, 0x10, 0x16, 0xb0,
- 0xa1, 0x0b, 0x81, 0x01,
- 0xa2, 0x04, 0x86, 0x25,
- 0xa1, 0x0b, 0x20, 0x04,
- 0xa1, 0x0b, 0x82, 0xb5,
- 0xfe, 0x74, 0x84, 0x65,
- 0x90, 0x0b, 0x1c, 0x0e,
- 0x68, 0x01, 0x40, 0x08,
- 0x9c, 0x84, 0xc0, 0x00,
- 0xe8, 0x75, 0xa1, 0x8b,
- 0x7e, 0x8e, 0x81, 0x95,
- 0xe6, 0xd5, 0xa1, 0x0b,
- 0xbe, 0x04, 0x81, 0x55,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xa0, 0xf1, 0xe4, 0xf5,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x83, 0x01, 0x00, 0x1b,
- 0xef, 0xfc, 0x76, 0x08,
- 0x81, 0x05, 0xc1, 0x43,
- 0xfa, 0x80, 0x02, 0x14,
- 0x00, 0x06, 0xe1, 0x1b,
- 0x00, 0x06, 0x94, 0x22,
- 0xdd, 0x93, 0xd4, 0x62,
- 0xf8, 0x00, 0x04, 0x0c,
- 0x6c, 0x50, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x03, 0x4a,
- 0x82, 0x6b, 0x3c, 0x5e,
- 0xfc, 0x1e, 0xbe, 0x5e,
- 0x42, 0x66, 0x8e, 0x05,
- 0x0c, 0x4a, 0xf0, 0x02,
- 0x06, 0x34, 0x64, 0x7c,
- 0x5e, 0x15, 0xfa, 0x80,
- 0x4a, 0x0e, 0x00, 0x04,
- 0x5e, 0x25, 0x9f, 0xfc,
- 0x06, 0x1a, 0x00, 0x08,
- 0x1e, 0x25, 0xe4, 0x00,
- 0x44, 0x22, 0x80, 0x04,
- 0x5e, 0x25, 0x98, 0x14,
- 0x1e, 0x25, 0x80, 0x00,
- 0x1e, 0x55, 0x80, 0x00,
- 0x4a, 0x50, 0x80, 0x08,
- 0x44, 0x22, 0x90, 0x7c,
- 0x5e, 0x25, 0x99, 0x94,
- 0x1e, 0x25, 0x80, 0x04,
- 0x42, 0x20, 0x80, 0x04,
- 0x18, 0x14, 0x9c, 0x00,
- 0x40, 0x00, 0x3c, 0xb5,
- 0xbc, 0x34, 0x18, 0x14,
- 0x02, 0x44, 0x00, 0xd5,
- 0xe1, 0x1b, 0xfa, 0x80,
- 0xdc, 0x3c, 0x18, 0xc4,
- 0xe2, 0x32, 0x00, 0x66,
- 0x42, 0x0e, 0x28, 0xf1,
- 0xc0, 0x10, 0x60, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x87, 0x75, 0xf0, 0x00,
- 0x01, 0x7e, 0x28, 0xf1,
- 0x0c, 0x0c, 0xff, 0xf8,
- 0xdd, 0x93, 0xf0, 0x00,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x01, 0x4a,
- 0xbe, 0x2e, 0xbc, 0x2e,
- 0x86, 0x85, 0xfc, 0x2e,
- 0xe4, 0x7c, 0x00, 0x0a,
- 0x44, 0x06, 0x84, 0x45,
- 0x3e, 0x2e, 0xf0, 0x02,
- 0xfc, 0x1e, 0xc1, 0x21,
- 0x84, 0x1f, 0xbe, 0x14,
- 0xbc, 0x14, 0xbc, 0x1e,
- 0xbe, 0x29, 0xfc, 0x24,
- 0xbe, 0x1e, 0xa4, 0x1f,
- 0x00, 0x06, 0xbe, 0x14,
- 0x81, 0x55, 0xe2, 0x06,
- 0xf8, 0x7e, 0x40, 0x06,
- 0xf0, 0xfe, 0x00, 0x06,
- 0x5d, 0x93, 0x81, 0x01,
- 0x7f, 0xe5, 0xa0, 0xf1,
- 0xff, 0xf8, 0x01, 0xae,
- 0xe2, 0xc0, 0x04, 0x1c,
- 0x04, 0x1f, 0xc1, 0x11,
- 0xf0, 0x7c, 0x44, 0x00,
- 0x02, 0x1c, 0xa4, 0x1f,
- 0xdd, 0x93, 0xe3, 0x40,
- 0xe4, 0x7c, 0x04, 0x0a,
- 0x40, 0x88, 0x04, 0x24,
- 0x00, 0x00, 0x06, 0x0e,
- 0x08, 0x30, 0x80, 0x10,
- 0x48, 0x12, 0x04, 0x10,
- 0x58, 0x02, 0xd0, 0x88,
- 0x02, 0x06, 0x71, 0x90,
- 0xff, 0xfc, 0x60, 0x00,
- 0x00, 0xc4, 0x83, 0xc7,
- 0x02, 0x0f, 0xf0, 0x80,
- 0x70, 0x01, 0x42, 0xc0,
- 0x61, 0x0b, 0xdf, 0xfc,
- 0x73, 0xfd, 0x40, 0xc0,
- 0x48, 0x07, 0xc0, 0x03,
- 0x00, 0xa5, 0xd0, 0x17,
- 0x5d, 0x93, 0xa2, 0x0f,
- 0xff, 0xf8, 0x01, 0x8e,
- 0x60, 0x01, 0x02, 0x86,
- 0xa2, 0x0f, 0xf8, 0x00,
- 0x40, 0x06, 0x90, 0x0e,
- 0xa1, 0x0d, 0xfc, 0x12,
- 0x40, 0x06, 0x82, 0xc5,
- 0xa1, 0x0d, 0xfc, 0x1a,
- 0x40, 0x06, 0x82, 0x15,
- 0x02, 0x06, 0xfc, 0x0a,
- 0xc0, 0x20, 0x60, 0x01,
- 0x80, 0x75, 0x83, 0x0d,
- 0xf3, 0x72, 0x00, 0x46,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x86, 0x4b, 0x08, 0x8b,
- 0x81, 0x71, 0x3e, 0x2e,
- 0x40, 0x5a, 0x00, 0x6b,
- 0x7c, 0x7e, 0xe5, 0x06,
- 0x42, 0x5a, 0x81, 0x31,
- 0x88, 0x2b, 0x65, 0x86,
- 0xef, 0xf8, 0x4f, 0x68,
- 0x67, 0xd1, 0x00, 0x00,
- 0x44, 0x86, 0x40, 0x01,
- 0x42, 0x12, 0xe0, 0x3c,
- 0x81, 0x31, 0x72, 0x9c,
- 0xef, 0xf8, 0x45, 0x68,
- 0x00, 0x00, 0x17, 0xa4,
- 0xc0, 0x04, 0x64, 0x01,
- 0x72, 0x9c, 0x42, 0x12,
- 0x19, 0x74, 0xd7, 0x07,
- 0xe0, 0xd4, 0x16, 0x14,
- 0xff, 0x01, 0x20, 0xbf,
- 0x00, 0x14, 0x01, 0xbb,
- 0x57, 0xfe, 0xe1, 0xac,
- 0xa1, 0x0b, 0x1f, 0xfc,
- 0x60, 0x38, 0x14, 0x09,
- 0xdf, 0xfc, 0x57, 0xfe,
- 0x81, 0x11, 0x1b, 0x94,
- 0x0a, 0xf0, 0x1c, 0x24,
- 0x15, 0x04, 0xe4, 0x20,
- 0xbe, 0x44, 0xa1, 0x0b,
- 0x80, 0x08, 0x00, 0x1b,
- 0x06, 0x14, 0x80, 0x04,
- 0x90, 0x1b, 0x7b, 0x00,
- 0xe8, 0x00, 0x43, 0xc8,
- 0xfc, 0x04, 0xbc, 0x0e,
- 0xe0, 0x18, 0x0e, 0x49,
- 0x68, 0x34, 0xaa, 0x24,
- 0x50, 0x82, 0xa0, 0x1b,
- 0x8e, 0x0b, 0x7b, 0x90,
- 0x68, 0x38, 0x4a, 0x68,
- 0x3e, 0x0e, 0x8c, 0x4b,
- 0x85, 0x05, 0x81, 0xa1,
- 0x0e, 0x29, 0xd9, 0x0a,
- 0x42, 0xba, 0xe0, 0x1c,
- 0x48, 0xba, 0xe5, 0x02,
- 0x06, 0x20, 0x65, 0x82,
- 0x83, 0x01, 0xe4, 0x1c,
- 0x02, 0x03, 0xa7, 0x0f,
- 0x42, 0x42, 0x81, 0x11,
- 0x90, 0x21, 0x72, 0x84,
- 0xef, 0xf8, 0x50, 0x48,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x82, 0xa1, 0x40, 0x3f,
- 0x41, 0xfe, 0xc5, 0x0d,
- 0x00, 0x3f, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x3f, 0x1f, 0xfd,
- 0x91, 0xad, 0xe5, 0x0e,
- 0xbe, 0x04, 0xf8, 0x15,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x98, 0xf1, 0x00, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x58, 0x96, 0x21, 0x1b,
- 0x02, 0x14, 0xe0, 0x08,
- 0x18, 0x06, 0x40, 0xac,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xa1, 0x4b, 0x41, 0x06,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x08, 0x58, 0x96,
- 0xff, 0x11, 0x82, 0x65,
- 0x02, 0x44, 0x02, 0x3d,
- 0x60, 0x37, 0xe1, 0x04,
- 0x91, 0x80, 0x02, 0x14,
- 0x42, 0x1a, 0x86, 0x13,
- 0x20, 0x23, 0xe0, 0x92,
- 0x82, 0x23, 0x98, 0x0b,
- 0xdd, 0x93, 0x94, 0x2e,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x11, 0x02, 0x6b,
- 0x60, 0x00, 0x45, 0x06,
- 0x66, 0xd8, 0x8c, 0x0b,
- 0x81, 0x71, 0x6f, 0xf8,
- 0x66, 0x00, 0x00, 0x60,
- 0xe4, 0xc0, 0x02, 0x60,
- 0x91, 0x21, 0x01, 0xa5,
- 0x04, 0x20, 0x06, 0x7e,
- 0x40, 0x73, 0xec, 0x04,
- 0x42, 0x75, 0xf8, 0x20,
- 0xc1, 0x7c, 0xf0, 0x08,
- 0xfc, 0xf5, 0xa1, 0x2b,
- 0x7f, 0xf4, 0x41, 0x0e,
- 0xe0, 0x38, 0x03, 0x06,
- 0x60, 0x28, 0x05, 0x06,
- 0xff, 0xd4, 0x47, 0x0e,
- 0x48, 0x62, 0x81, 0xf5,
- 0x00, 0x00, 0x71, 0x80,
- 0x92, 0x7e, 0xec, 0x20,
- 0x48, 0x62, 0x10, 0x7e,
- 0x10, 0x7e, 0xf0, 0x88,
- 0xf0, 0x84, 0x48, 0x62,
- 0x82, 0x11, 0x10, 0x76,
- 0x87, 0x0b, 0x88, 0x21,
- 0x41, 0xf6, 0xfc, 0x35,
- 0x81, 0x11, 0x60, 0x0c,
- 0x6f, 0x40, 0x4c, 0x01,
- 0x67, 0x44, 0x00, 0x60,
- 0x63, 0x98, 0xc0, 0x03,
- 0x8f, 0x21, 0x6f, 0xf8,
- 0x65, 0x61, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0x08,
- 0xc0, 0x03, 0x67, 0x61,
- 0x05, 0x06, 0x01, 0x95,
- 0x06, 0x7e, 0xe0, 0x08,
- 0xec, 0x04, 0x04, 0x20,
- 0xf0, 0x08, 0x42, 0x75,
- 0xa1, 0x2b, 0xc1, 0x7c,
- 0x0c, 0x4c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6f, 0xd1, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x00, 0x09, 0x82, 0x45,
- 0xc0, 0x06, 0x60, 0x2d,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xf0, 0x80, 0x44, 0x12,
- 0xec, 0x70, 0x04, 0x29,
- 0x84, 0x05, 0xa1, 0x2b,
- 0xe0, 0x3c, 0x02, 0x29,
- 0xe6, 0x82, 0x40, 0x2a,
- 0x02, 0x09, 0x80, 0x13,
- 0xc0, 0x05, 0x6b, 0x71,
- 0xec, 0x14, 0x00, 0x00,
- 0xe4, 0x08, 0x00, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x3c, 0x02, 0x39,
- 0x67, 0x70, 0x02, 0x10,
- 0x0a, 0x04, 0xc0, 0x03,
- 0x04, 0x20, 0x60, 0x8c,
- 0x04, 0x55, 0xe6, 0x40,
- 0x58, 0x22, 0x7c, 0x14,
- 0x46, 0x3a, 0xf0, 0x94,
- 0x81, 0x71, 0x66, 0x82,
- 0x08, 0x34, 0xb2, 0x64,
- 0xc2, 0x37, 0x60, 0x88,
- 0xfc, 0x10, 0x02, 0x45,
- 0x48, 0x62, 0x88, 0x53,
- 0x86, 0x13, 0x72, 0x9c,
- 0x08, 0x04, 0x32, 0x4e,
- 0x30, 0x5e, 0xe0, 0x88,
- 0x02, 0x13, 0x84, 0x43,
- 0x40, 0x01, 0x6c, 0x01,
- 0x08, 0x35, 0x80, 0x23,
- 0x82, 0x33, 0xe2, 0x00,
- 0xe2, 0x00, 0x48, 0x35,
- 0xec, 0x00, 0x04, 0x09,
- 0x44, 0x01, 0x82, 0x01,
- 0x0c, 0x0c, 0xec, 0x00,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfe, 0x04, 0x04, 0x0c,
- 0x48, 0x22, 0x08, 0x6b,
- 0x21, 0x4b, 0xf9, 0x8c,
- 0x08, 0x65, 0x8a, 0x7b,
- 0xe0, 0x08, 0x48, 0x96,
- 0x61, 0x84, 0x08, 0x24,
- 0xe0, 0xfc, 0x0a, 0x34,
- 0x0a, 0x34, 0x2a, 0x4f,
- 0x88, 0x03, 0xe1, 0x84,
- 0x6f, 0xf4, 0x71, 0x88,
- 0xf2, 0x84, 0x42, 0x52,
- 0x64, 0x1c, 0x43, 0x4a,
- 0x42, 0x1a, 0x81, 0x41,
- 0x41, 0x6a, 0xe0, 0x1c,
- 0x42, 0x0a, 0xe4, 0x18,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x09, 0x04, 0xed, 0x80,
- 0xdc, 0x00, 0x4c, 0x00,
- 0xdc, 0x00, 0x4e, 0x10,
- 0x80, 0x6e, 0x82, 0x7e,
- 0x0c, 0x0c, 0x88, 0x0b,
- 0xdd, 0x93, 0xf6, 0x04,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x67, 0xfd, 0x00, 0x25,
- 0x81, 0x51, 0x40, 0x01,
- 0x86, 0x44, 0x84, 0x34,
- 0xe0, 0x18, 0x02, 0xc5,
- 0x6f, 0xc9, 0x00, 0x21,
- 0x84, 0x33, 0x40, 0x05,
- 0x60, 0x50, 0x02, 0x6b,
- 0xf2, 0x94, 0x48, 0x42,
- 0x6f, 0xcd, 0x00, 0x01,
- 0x02, 0x55, 0xc0, 0x05,
- 0x84, 0xc3, 0x60, 0x1c,
- 0x82, 0x61, 0x06, 0x4e,
- 0x42, 0xc5, 0x84, 0x3e,
- 0x80, 0x53, 0x60, 0x18,
- 0xe0, 0x1c, 0x42, 0x55,
- 0xe0, 0x50, 0x42, 0x63,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x39,
- 0xc8, 0x44, 0x81, 0xc1,
- 0x46, 0x3a, 0xca, 0x54,
- 0xc4, 0x37, 0xe6, 0x82,
- 0x06, 0x35, 0x82, 0x33,
- 0x86, 0x43, 0xe7, 0xdc,
- 0x72, 0xb0, 0x46, 0x52,
- 0xca, 0x3e, 0x80, 0x13,
- 0x02, 0x01, 0xc8, 0x4e,
- 0x04, 0x35, 0xea, 0x70,
- 0x80, 0x33, 0xe0, 0x20,
- 0xe0, 0x20, 0x44, 0x35,
- 0xe0, 0x54, 0x04, 0x3b,
- 0xeb, 0x70, 0x02, 0x01,
- 0xe0, 0x24, 0x04, 0x15,
- 0x44, 0x33, 0x82, 0x31,
- 0x80, 0x13, 0xe0, 0x54,
- 0xe0, 0x24, 0x44, 0x15,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x3c, 0x02, 0x39,
- 0xe0, 0x58, 0x04, 0x4b,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xe0, 0x14, 0x04, 0x35,
- 0x80, 0x13, 0xc4, 0x07,
- 0xe7, 0xdc, 0x02, 0x05,
- 0xe0, 0x10, 0x04, 0x15,
- 0x81, 0x01, 0x00, 0x13,
- 0x72, 0x80, 0x40, 0x32,
- 0x44, 0x05, 0x82, 0x41,
- 0x44, 0x15, 0xe0, 0x14,
- 0x44, 0x43, 0xe0, 0x10,
- 0xdd, 0x93, 0xe0, 0x58,
- 0x60, 0x58, 0x00, 0x29,
- 0x0a, 0x39, 0x84, 0x5b,
- 0x0a, 0x49, 0xef, 0x40,
- 0x02, 0x39, 0xef, 0x44,
- 0x40, 0x01, 0x60, 0x51,
- 0x4a, 0x21, 0xc7, 0x2d,
- 0xc8, 0x2d, 0x4f, 0x40,
- 0x6f, 0x48, 0x4a, 0x21,
- 0xe4, 0xa0, 0x08, 0x00,
- 0x4f, 0x44, 0x4a, 0x21,
- 0x00, 0x35, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x20,
- 0x60, 0x30, 0x02, 0xc3,
- 0x67, 0x60, 0x0a, 0x50,
- 0x02, 0x13, 0xc0, 0x03,
- 0x98, 0x0b, 0xe0, 0xc0,
- 0xe0, 0x00, 0x24, 0x68,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x02, 0x7b,
- 0x60, 0x50, 0x0e, 0x2b,
- 0x0e, 0xab, 0x81, 0x81,
- 0x0e, 0x9b, 0xe0, 0x54,
- 0x18, 0x8e, 0xe0, 0x58,
- 0x9a, 0x8e, 0xa1, 0x2b,
- 0x4c, 0x23, 0xd8, 0x8e,
- 0x4c, 0xa3, 0xe0, 0x18,
- 0x4c, 0x93, 0xe0, 0x1c,
- 0x84, 0xc5, 0xe0, 0x20,
- 0x06, 0x24, 0x1c, 0x04,
- 0x9e, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x65, 0x88,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x14, 0x0a, 0x98, 0x0e,
- 0x04, 0xa4, 0x68, 0x00,
- 0x84, 0xc5, 0xfb, 0x80,
- 0x06, 0x24, 0x5c, 0x04,
- 0xde, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x63, 0xe8,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x12, 0x0a, 0x9a, 0x0e,
- 0x04, 0x94, 0x68, 0x00,
- 0x86, 0x05, 0xfb, 0x80,
- 0x60, 0x10, 0x0e, 0x05,
- 0xe1, 0x84, 0x06, 0x24,
- 0xe0, 0x14, 0x0e, 0x15,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x62, 0x28,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x84, 0x3b, 0x01, 0x01,
- 0x46, 0x01, 0x8a, 0x06,
- 0x8e, 0x06, 0xf0, 0x08,
- 0x02, 0x0b, 0x8c, 0x06,
- 0xa1, 0x0b, 0xe0, 0x50,
- 0x02, 0xc5, 0x88, 0x45,
- 0x06, 0x04, 0x60, 0x18,
- 0x7f, 0x51, 0xe1, 0x84,
- 0x86, 0x6b, 0xa6, 0x4b,
- 0x4c, 0x40, 0x8a, 0xcd,
- 0x18, 0x63, 0x9c, 0x00,
- 0xff, 0xf8, 0x18, 0x0e,
- 0xe0, 0x82, 0x4e, 0x6a,
- 0xe0, 0x1c, 0x02, 0x65,
- 0x4a, 0x72, 0x0a, 0x6d,
- 0x46, 0x40, 0xfa, 0x30,
- 0x0a, 0x52, 0x1c, 0x00,
- 0x08, 0x56, 0xe9, 0xfc,
- 0x40, 0x3a, 0x8c, 0x33,
- 0x40, 0x02, 0xe0, 0x82,
- 0x00, 0x02, 0xfa, 0x30,
- 0x8a, 0x06, 0xe9, 0xfc,
- 0xe0, 0x54, 0x02, 0x0b,
- 0x88, 0x45, 0xa1, 0x0b,
- 0x60, 0x20, 0x02, 0xc5,
- 0xe1, 0x84, 0x06, 0x04,
- 0xa6, 0x4b, 0x7f, 0x51,
- 0x8a, 0xcd, 0x86, 0x6b,
- 0x9c, 0x00, 0x4c, 0x40,
- 0x60, 0x24, 0x02, 0xc5,
- 0x4c, 0x6a, 0x98, 0x63,
- 0x02, 0x0e, 0x60, 0x82,
- 0x8a, 0xcd, 0xff, 0xf8,
- 0x1c, 0x00, 0x46, 0x40,
- 0xfa, 0x04, 0x4c, 0x62,
- 0x0a, 0x62, 0x18, 0x33,
- 0x40, 0x3a, 0xe9, 0xfc,
- 0xc8, 0x56, 0xe0, 0x82,
- 0xfa, 0x04, 0x40, 0x02,
- 0xe9, 0xfc, 0x00, 0x02,
- 0x0c, 0x0c, 0xca, 0x06,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x89, 0x04, 0x84, 0x7a,
- 0x04, 0x89, 0x86, 0x1a,
- 0xd6, 0x58, 0xe0, 0x10,
- 0x80, 0x7c, 0x88, 0x98,
- 0xc8, 0xc8, 0x8a, 0x78,
- 0x04, 0x29, 0xca, 0x68,
- 0x02, 0x1c, 0xe0, 0x14,
- 0xe1, 0x84, 0x02, 0x84,
- 0x60, 0x10, 0x40, 0x51,
- 0x0a, 0x24, 0x98, 0x13,
- 0xc2, 0x17, 0x61, 0x84,
- 0x02, 0x10, 0x0c, 0x53,
- 0x40, 0x11, 0xec, 0x04,
- 0xc2, 0x57, 0x60, 0x1c,
- 0x6c, 0x04, 0x02, 0x50,
- 0x40, 0x11, 0xc2, 0x87,
- 0xc2, 0x27, 0x60, 0x20,
- 0x60, 0x28, 0x40, 0x21,
- 0x66, 0x40, 0x04, 0x40,
- 0x06, 0x19, 0xc0, 0x03,
- 0x81, 0x31, 0x60, 0x38,
- 0xe0, 0x14, 0x40, 0x91,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x24, 0x40, 0x81,
- 0x49, 0x48, 0x81, 0x95,
- 0xec, 0x04, 0x0a, 0x30,
- 0xec, 0x04, 0x02, 0x10,
- 0x46, 0x40, 0xc9, 0x5d,
- 0xa1, 0x1b, 0x9c, 0x00,
- 0x40, 0x31, 0xfc, 0xf5,
- 0x81, 0x01, 0x60, 0x2c,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf0, 0x80, 0x46, 0x22,
- 0xec, 0x70, 0x06, 0x39,
- 0x86, 0xa5, 0xa1, 0x3b,
- 0xe0, 0x3c, 0x04, 0x39,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xf0, 0x80, 0x46, 0x22,
- 0x6b, 0x71, 0x06, 0x39,
- 0x06, 0x30, 0xc0, 0x05,
- 0xe2, 0x3d, 0xec, 0x14,
- 0xc2, 0x07, 0x84, 0x15,
- 0x04, 0x03, 0x80, 0x23,
- 0xc0, 0x02, 0x63, 0xb9,
- 0x86, 0x12, 0x84, 0x22,
- 0x41, 0x1a, 0x85, 0x0d,
- 0x40, 0x0a, 0xe0, 0x04,
- 0x00, 0x0c, 0xe1, 0x84,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x1d, 0x04,
- 0x88, 0x8b, 0x7c, 0x5e,
- 0x90, 0x1b, 0x7e, 0x1e,
- 0x00, 0x06, 0x3e, 0x0e,
- 0x8b, 0x6e, 0xe0, 0x04,
- 0xe0, 0x38, 0x04, 0xb9,
- 0x81, 0x45, 0x89, 0x6e,
- 0x00, 0x00, 0x45, 0x6e,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x7c, 0x04, 0xfe, 0x95,
- 0x12, 0x20, 0x87, 0x41,
- 0x40, 0x03, 0x65, 0x71,
- 0xe6, 0x40, 0x14, 0x30,
- 0x66, 0x41, 0x0e, 0x30,
- 0x80, 0x6e, 0xc0, 0x03,
- 0xc2, 0x6e, 0x82, 0x4e,
- 0x00, 0x06, 0x40, 0x6e,
- 0xbe, 0x14, 0xe0, 0x08,
- 0x86, 0x4e, 0x84, 0x0e,
- 0xc4, 0x6e, 0xc6, 0x6e,
- 0x9c, 0x28, 0x85, 0xe5,
- 0x86, 0xa5, 0xa1, 0x2b,
- 0x00, 0x09, 0xfe, 0x04,
- 0xc1, 0x2d, 0xe0, 0x10,
- 0x3e, 0x14, 0x82, 0x45,
- 0xe0, 0x08, 0x00, 0x46,
- 0x87, 0x01, 0x04, 0x0e,
- 0xa4, 0x08, 0x86, 0x0e,
- 0xc6, 0x0e, 0xc4, 0x6e,
- 0x06, 0xf0, 0x2a, 0x14,
- 0x28, 0x04, 0xe4, 0x40,
- 0x7f, 0xfd, 0x49, 0xfe,
- 0x3c, 0x3e, 0xcf, 0xff,
- 0x5e, 0x18, 0x81, 0x31,
- 0x81, 0x51, 0x6f, 0xfc,
- 0x81, 0x95, 0x89, 0x04,
- 0x83, 0x01, 0x7c, 0x24,
- 0x88, 0x0e, 0x87, 0x11,
- 0xa4, 0x18, 0x8a, 0x1e,
- 0xca, 0x1e, 0xc8, 0x6e,
- 0x16, 0xb0, 0x61, 0x0e,
- 0x02, 0x91, 0xec, 0x04,
- 0x82, 0x71, 0x90, 0xa1,
- 0xf4, 0x55, 0xa1, 0xbb,
- 0xb8, 0xf1, 0x7c, 0x04,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xc0, 0x08, 0x4c, 0x96,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x6b, 0x0a, 0x9b,
- 0x80, 0xbb, 0x06, 0x7b,
- 0x64, 0xd1, 0x00, 0x90,
- 0x84, 0x8b, 0x40, 0x01,
- 0x08, 0x90, 0x02, 0xab,
- 0x3c, 0x0e, 0xe4, 0x90,
- 0x64, 0x91, 0x0a, 0x90,
- 0x0e, 0x2b, 0xc0, 0x01,
- 0x78, 0x58, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x98, 0xf1, 0x80, 0xa5,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x04, 0x90, 0xdd, 0x93,
- 0x96, 0x0b, 0x64, 0x30,
- 0x6f, 0xfc, 0x65, 0x88,
- 0x7c, 0x8e, 0x8c, 0x1b,
- 0xe4, 0x80, 0x10, 0x90,
- 0x8c, 0x1b, 0x16, 0x0b,
- 0x6f, 0xfc, 0x6b, 0x48,
- 0x3c, 0x9e, 0x90, 0x2b,
- 0x7c, 0x24, 0x96, 0x0b,
- 0x0e, 0x3b, 0x94, 0x1b,
- 0x70, 0x18, 0x8c, 0x4b,
- 0x90, 0x5b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x82, 0x9b, 0x04, 0x8b,
- 0x86, 0x7b, 0x08, 0x6b,
- 0x6f, 0x48, 0x10, 0x19,
- 0x67, 0x60, 0x04, 0x80,
- 0x12, 0x09, 0xc0, 0x03,
- 0x8c, 0x3b, 0x60, 0x10,
- 0xe8, 0x04, 0x59, 0x68,
- 0xe0, 0x10, 0x0e, 0x05,
- 0xe0, 0x34, 0x0e, 0x1b,
- 0xef, 0x48, 0x10, 0x29,
- 0xe0, 0x10, 0x12, 0x39,
- 0xe0, 0x8c, 0x0e, 0x49,
- 0x81, 0x01, 0x18, 0x0e,
- 0x4c, 0x21, 0xd8, 0x1c,
- 0x4c, 0x31, 0xe0, 0x18,
- 0x4c, 0x41, 0xe0, 0x1c,
- 0x0c, 0x4c, 0xe0, 0x20,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x81, 0xb1, 0x13, 0xa4,
- 0x6e, 0x40, 0x02, 0x22,
- 0x11, 0x74, 0x88, 0x8b,
- 0x28, 0x5e, 0x86, 0x6b,
- 0x0f, 0xbe, 0x81, 0x91,
- 0x81, 0x55, 0x81, 0x21,
- 0x82, 0x21, 0x41, 0x34,
- 0xfa, 0x24, 0x52, 0x32,
- 0xfe, 0x75, 0xc3, 0x2d,
- 0x41, 0xfe, 0xa0, 0x9d,
- 0x80, 0x3f, 0x1f, 0xfd,
- 0x80, 0x00, 0x54, 0x05,
- 0x06, 0xf0, 0x90, 0x05,
- 0x92, 0x0b, 0x64, 0x70,
- 0x90, 0x2b, 0x0a, 0x1b,
- 0xe8, 0x34, 0x5e, 0x48,
- 0x8e, 0x15, 0xa1, 0x0b,
- 0x90, 0x1b, 0x12, 0x0b,
- 0x68, 0x34, 0x61, 0x48,
- 0xa1, 0x0b, 0x8e, 0x2b,
- 0x8f, 0x84, 0x8c, 0x35,
- 0x54, 0xb5, 0xa1, 0x8b,
- 0x40, 0x96, 0x00, 0x00,
- 0x8a, 0x45, 0x80, 0x08,
- 0x98, 0x1a, 0x9c, 0x04,
- 0xc7, 0x07, 0x9a, 0x2a,
- 0x80, 0x95, 0xc3, 0x0d,
- 0x81, 0x01, 0x44, 0x0d,
- 0x40, 0x12, 0x88, 0x25,
- 0x04, 0x06, 0x70, 0x88,
- 0x42, 0xb2, 0xff, 0x40,
- 0x81, 0x31, 0x72, 0xac,
- 0xef, 0xf4, 0x4e, 0x28,
- 0x60, 0xfc, 0x04, 0x14,
- 0x24, 0x0f, 0xc3, 0x07,
- 0x01, 0x31, 0xc3, 0x17,
- 0x44, 0x38, 0x90, 0x2b,
- 0x04, 0x04, 0xef, 0xf4,
- 0xff, 0x31, 0x60, 0xa0,
- 0xd0, 0x17, 0x71, 0x07,
- 0xa2, 0x0f, 0x07, 0x2b,
- 0x1f, 0xfc, 0x45, 0xfe,
- 0x45, 0xfe, 0xa1, 0x0b,
- 0xa8, 0x2e, 0xdf, 0xfc,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x84, 0x03, 0x04, 0x13,
- 0x61, 0x8a, 0x40, 0x0a,
- 0x42, 0x1a, 0x82, 0x11,
- 0x04, 0x20, 0x61, 0x8a,
- 0x18, 0x04, 0xec, 0x04,
- 0x0c, 0x04, 0x60, 0x88,
- 0x08, 0xc5, 0xe0, 0x8c,
- 0x4e, 0x52, 0x7c, 0x30,
- 0x0a, 0x65, 0xf0, 0x98,
- 0x85, 0x0d, 0x7c, 0x18,
- 0xca, 0xc7, 0x9e, 0x84,
- 0x12, 0xc4, 0xa6, 0xc3,
- 0x8c, 0xc3, 0x61, 0x7c,
- 0xf2, 0xa0, 0x4c, 0x92,
- 0x0c, 0x04, 0x1e, 0x6e,
- 0x1c, 0xce, 0xe0, 0x84,
- 0x0c, 0xcb, 0x8a, 0x63,
- 0x00, 0x06, 0x69, 0x00,
- 0x00, 0x00, 0x80, 0x00,
- 0x83, 0x0b, 0xc4, 0x04,
- 0x4c, 0xc3, 0x82, 0xc1,
- 0xf6, 0xd5, 0xe9, 0x00,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0xfc, 0x18, 0x24,
- 0x04, 0xc3, 0xa2, 0x03,
- 0x03, 0xc7, 0x86, 0x03,
- 0x0b, 0xc4, 0x81, 0x81,
- 0x4c, 0x0a, 0xb8, 0x03,
- 0x00, 0x34, 0x61, 0x8e,
- 0x09, 0x04, 0xe0, 0x88,
- 0xf0, 0x80, 0x4e, 0x42,
- 0x0c, 0x13, 0x94, 0x8e,
- 0x42, 0x1a, 0xc4, 0x67,
- 0x88, 0x63, 0x61, 0x8e,
- 0xb0, 0x8e, 0x80, 0x8e,
- 0xc4, 0x17, 0x02, 0x23,
- 0x61, 0x8e, 0x46, 0x2a,
- 0xf0, 0x84, 0x44, 0x42,
- 0x42, 0x42, 0xc4, 0x37,
- 0x06, 0x70, 0x70, 0x8c,
- 0x82, 0x7b, 0xec, 0x10,
- 0x14, 0x94, 0xd9, 0x84,
- 0x10, 0x93, 0xc6, 0x6d,
- 0xdc, 0x00, 0x4c, 0x40,
- 0xdd, 0x84, 0x94, 0x9e,
- 0xc6, 0x7d, 0x30, 0x94,
- 0x4e, 0x40, 0x10, 0x93,
- 0x30, 0x9e, 0xdc, 0x00,
- 0xfc, 0x35, 0x85, 0x6b,
- 0xc9, 0xc4, 0x80, 0x54,
- 0x98, 0x53, 0xc6, 0x2d,
- 0x44, 0x40, 0x00, 0x5e,
- 0x83, 0x2b, 0xdc, 0x00,
- 0x0c, 0x0c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x4c, 0x42, 0x08, 0x13,
- 0x4c, 0x6a, 0xf0, 0x80,
- 0x82, 0x11, 0x61, 0x92,
- 0x61, 0x92, 0x42, 0x1a,
- 0xe0, 0x88, 0x18, 0x44,
- 0xd6, 0x07, 0x7e, 0x3e,
- 0xc4, 0x67, 0x19, 0x34,
- 0x4f, 0xfe, 0x44, 0x17,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x52, 0x52, 0x0a, 0xc3,
- 0x3e, 0x3e, 0xf0, 0x84,
- 0xf0, 0x98, 0x54, 0x52,
- 0x06, 0xc0, 0x0c, 0x7e,
- 0x7c, 0x5e, 0xec, 0x10,
- 0xfc, 0xa8, 0x16, 0x04,
- 0x81, 0xc1, 0x01, 0x41,
- 0x81, 0x11, 0x01, 0x81,
- 0xe9, 0x64, 0x83, 0xf5,
- 0xc6, 0xad, 0x7e, 0x04,
- 0x1e, 0xa5, 0xca, 0x67,
- 0x4e, 0x62, 0x40, 0x08,
- 0x21, 0x7d, 0xf1, 0x80,
- 0x0c, 0x06, 0x8e, 0x6b,
- 0xa0, 0x2d, 0x40, 0x00,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x61, 0x7c, 0x0e, 0x64,
- 0x40, 0x6a, 0x8c, 0x43,
- 0x58, 0x72, 0x64, 0x2e,
- 0x4c, 0x6a, 0xf2, 0xb0,
- 0x80, 0x83, 0xe4, 0xae,
- 0x72, 0x84, 0x42, 0x62,
- 0x64, 0x00, 0x16, 0xb0,
- 0x93, 0xab, 0xc0, 0x08,
- 0x18, 0xca, 0xf8, 0x35,
- 0x18, 0x1a, 0xe0, 0x00,
- 0x08, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x08, 0x45, 0xed, 0x80,
- 0x80, 0x08, 0x40, 0x96,
- 0x61, 0x84, 0x00, 0x44,
- 0xe0, 0xfc, 0x04, 0xc4,
- 0x04, 0xc4, 0x24, 0x0f,
- 0x10, 0x03, 0xe1, 0x84,
- 0x42, 0x12, 0x98, 0x3b,
- 0x88, 0x2b, 0x72, 0x88,
- 0xef, 0xf0, 0x69, 0x48,
- 0xe0, 0x00, 0x03, 0x4a,
- 0x02, 0x1a, 0x3e, 0x14,
- 0x00, 0x6a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x00, 0x06, 0xed, 0x80,
- 0x04, 0x0e, 0xc0, 0x00,
- 0xa0, 0xf1, 0x81, 0x01,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x4c, 0x52, 0x0d, 0x04,
- 0x0c, 0x23, 0xf0, 0x80,
- 0xf0, 0x94, 0x4e, 0x12,
- 0x61, 0x96, 0x58, 0x2a,
- 0xec, 0x04, 0x10, 0x50,
- 0xc4, 0x87, 0x02, 0x71,
- 0x18, 0x33, 0x8f, 0x24,
- 0x46, 0x3a, 0xc4, 0xc7,
- 0x42, 0x02, 0x61, 0x96,
- 0x4c, 0x6a, 0xf0, 0xb0,
- 0x82, 0x9b, 0x61, 0x96,
- 0x61, 0x96, 0x4e, 0x7a,
- 0xc4, 0x37, 0x81, 0x51,
- 0x70, 0x8c, 0x58, 0x02,
- 0xf0, 0xa0, 0x46, 0x02,
- 0xe5, 0xa4, 0x81, 0x65,
- 0x94, 0x53, 0xc6, 0x9d,
- 0xdc, 0x00, 0x52, 0x00,
- 0xfe, 0x55, 0x99, 0x9b,
- 0xa3, 0x4d, 0x44, 0x67,
- 0xc4, 0x77, 0x04, 0x63,
- 0x80, 0x00, 0x0c, 0x95,
- 0x52, 0x92, 0x02, 0x65,
- 0xff, 0x91, 0x90, 0x94,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0x95, 0x8a, 0x9b,
- 0x52, 0x92, 0xa0, 0x00,
- 0x18, 0x9e, 0xb1, 0x94,
- 0x04, 0x83, 0x84, 0x73,
- 0x83, 0xd5, 0xff, 0x91,
- 0xc5, 0xb4, 0xf1, 0xa4,
- 0x4a, 0xa2, 0x8a, 0xa3,
- 0x0c, 0xa5, 0xf1, 0xac,
- 0x02, 0x45, 0x80, 0x00,
- 0x90, 0x94, 0x54, 0xa2,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0xa5, 0x8a, 0xab,
- 0x54, 0xa2, 0xa0, 0x00,
- 0x18, 0xae, 0xb1, 0x94,
- 0xe4, 0x0c, 0x59, 0x1a,
- 0x3c, 0x01, 0x58, 0x00,
- 0x43, 0x1a, 0x40, 0x00,
- 0x42, 0x00, 0xe4, 0x0c,
- 0xc0, 0x00, 0x3c, 0x01,
- 0x64, 0x10, 0x14, 0x60,
- 0x55, 0x1a, 0x84, 0x6b,
- 0x4c, 0xa0, 0xe4, 0x20,
- 0x4c, 0x1a, 0xbc, 0x00,
- 0x3d, 0xb8, 0xe0, 0x1c,
- 0xc3, 0xff, 0x3f, 0xfd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0xca, 0x37, 0x00, 0x8b,
- 0xe1, 0xfc, 0x14, 0x84,
- 0x00, 0xa4, 0x90, 0xa3,
- 0x80, 0x33, 0xe1, 0x04,
- 0x60, 0xa2, 0x40, 0x3a,
- 0xe1, 0x7c, 0x06, 0x54,
- 0x61, 0x7c, 0x18, 0x04,
- 0x56, 0xc2, 0xaa, 0x03,
- 0x46, 0x02, 0xf3, 0x8c,
- 0x17, 0x34, 0xf9, 0xac,
- 0x41, 0xfe, 0xa1, 0x3b,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x80, 0x08, 0x4e, 0x96,
- 0x0a, 0x44, 0x90, 0x05,
- 0xa4, 0x43, 0x61, 0x7c,
- 0x61, 0x7c, 0x18, 0x24,
- 0x4a, 0x52, 0xff, 0x21,
- 0x81, 0x71, 0x73, 0xb0,
- 0x44, 0x72, 0x04, 0x5d,
- 0x3e, 0x1e, 0xf1, 0x80,
- 0x12, 0x44, 0x80, 0xcb,
- 0xe0, 0x57, 0x61, 0xc0,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf3, 0xac, 0x42, 0x72,
- 0xe0, 0x47, 0x7c, 0x3e,
- 0x60, 0x84, 0x06, 0xb4,
- 0xe1, 0xfc, 0x0c, 0x04,
- 0x60, 0x84, 0x04, 0x04,
- 0x56, 0x10, 0xb2, 0x5f,
- 0x40, 0xc2, 0x1c, 0x00,
- 0x42, 0xb2, 0xf0, 0x90,
- 0xac, 0x3f, 0x72, 0x94,
- 0xef, 0xf0, 0x5c, 0xe8,
- 0x02, 0xa4, 0x95, 0xb4,
- 0xd6, 0xb7, 0x7c, 0x00,
- 0xa2, 0x83, 0x3e, 0x14,
- 0xa3, 0x8b, 0x7c, 0x34,
- 0x04, 0x01, 0x00, 0x00,
- 0xd6, 0x17, 0x80, 0x04,
- 0x02, 0x04, 0x82, 0x03,
- 0x96, 0x1f, 0xe1, 0x7c,
- 0x40, 0x1a, 0x80, 0x13,
- 0x00, 0x02, 0xe1, 0xae,
- 0x00, 0x02, 0xe0, 0x00,
- 0xc7, 0xff, 0x6b, 0xfd,
- 0x8e, 0x0b, 0x0c, 0x0e,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0xa4, 0x13, 0x1b, 0x74,
- 0xa4, 0x03, 0x09, 0x3e,
- 0x8a, 0x9b, 0x1f, 0x64,
- 0x46, 0x72, 0x1d, 0x84,
- 0x56, 0x3a, 0xf0, 0x88,
- 0x88, 0x2b, 0x61, 0x9e,
- 0x7c, 0x4e, 0x99, 0xa4,
- 0x16, 0x13, 0x8e, 0x4b,
- 0x7e, 0x1e, 0x96, 0x03,
- 0x21, 0xb4, 0xa0, 0x13,
- 0x3c, 0x6e, 0x93, 0x1d,
- 0xc4, 0x04, 0x12, 0x10,
- 0x70, 0xa4, 0x42, 0x02,
- 0x02, 0x10, 0x94, 0x3b,
- 0x90, 0x5b, 0x6c, 0x04,
- 0xef, 0xfc, 0x69, 0x68,
- 0x86, 0x15, 0xa1, 0x0b,
- 0x94, 0x3b, 0x7e, 0x14,
- 0x8e, 0x4b, 0x3c, 0xbe,
- 0x90, 0x5b, 0x7c, 0x24,
- 0xe4, 0x04, 0x00, 0x10,
- 0x6f, 0xfc, 0x68, 0xa8,
- 0xa1, 0x0b, 0xb2, 0x03,
- 0x18, 0x04, 0x82, 0x75,
- 0x40, 0x0a, 0xd6, 0x77,
- 0x98, 0x0e, 0xe1, 0x1e,
- 0x40, 0x0a, 0xac, 0x04,
- 0x2c, 0x0e, 0xe1, 0x1e,
- 0x98, 0x24, 0x81, 0x01,
- 0xc2, 0x2d, 0xac, 0x14,
- 0x40, 0x00, 0x4c, 0x15,
- 0xdc, 0x00, 0x42, 0x20,
- 0xc0, 0x00, 0x56, 0x25,
- 0xc0, 0x00, 0x0c, 0x35,
- 0x44, 0x30, 0x09, 0x34,
- 0xa8, 0xf1, 0xdc, 0x00,
- 0x4c, 0x35, 0xc6, 0x2d,
- 0x16, 0x15, 0xc0, 0x00,
- 0xc7, 0x1d, 0xc0, 0x00,
- 0xc0, 0x00, 0x56, 0x35,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x84, 0x9b, 0x11, 0x1e,
- 0x93, 0x4e, 0x95, 0x5e,
- 0x97, 0x3e, 0x8f, 0x0e,
- 0xb3, 0x14, 0x8c, 0x08,
- 0x19, 0x1e, 0xa1, 0x0b,
- 0x9d, 0x1e, 0x81, 0x11,
- 0x84, 0x45, 0x9b, 0x1e,
- 0xe0, 0x04, 0x00, 0x02,
- 0x85, 0xb3, 0x81, 0x13,
- 0x8b, 0xf3, 0x99, 0x04,
- 0xe5, 0x80, 0x00, 0x00,
- 0xf8, 0x60, 0x40, 0x15,
- 0xf8, 0x30, 0x40, 0x15,
- 0x40, 0x15, 0xc1, 0x1e,
- 0x40, 0x15, 0xe0, 0x2c,
- 0x97, 0x04, 0xe0, 0x5c,
- 0xa1, 0x0b, 0x82, 0x08,
- 0x31, 0xb4, 0xa2, 0x25,
- 0xaf, 0x84, 0x81, 0x71,
- 0x13, 0x24, 0xad, 0xa4,
- 0xe0, 0x84, 0x00, 0x74,
- 0x7c, 0x00, 0x04, 0x43,
- 0xf0, 0x80, 0x42, 0x22,
- 0xe0, 0x90, 0x02, 0x23,
- 0x82, 0x45, 0x84, 0x4d,
- 0x06, 0x74, 0x19, 0x04,
- 0x80, 0x33, 0xe0, 0x88,
- 0x02, 0x55, 0x86, 0x1b,
- 0x84, 0x04, 0xf0, 0x30,
- 0x19, 0x04, 0x85, 0xf5,
- 0xe0, 0x88, 0x06, 0x74,
- 0x44, 0x42, 0x09, 0x2e,
- 0x0d, 0x7e, 0xfa, 0x08,
- 0x00, 0x33, 0x82, 0x21,
- 0x06, 0x1b, 0xa8, 0x23,
- 0xe6, 0x40, 0x0c, 0x30,
- 0xf0, 0x30, 0x02, 0x55,
- 0x02, 0xc5, 0x84, 0x04,
- 0x05, 0x13, 0xe0, 0x60,
- 0xec, 0x04, 0x04, 0x40,
- 0x8b, 0x4e, 0x85, 0x33,
- 0xe8, 0x00, 0x31, 0x3c,
- 0x70, 0x88, 0x4e, 0xa2,
- 0x82, 0x71, 0x82, 0x21,
- 0xe1, 0xaa, 0x4e, 0x7a,
- 0x10, 0x45, 0xc4, 0x77,
- 0x88, 0x03, 0xfc, 0x1c,
- 0xe4, 0x44, 0x84, 0x0e,
- 0x8c, 0x5e, 0x88, 0x53,
- 0xfc, 0x1c, 0x16, 0x45,
- 0x98, 0xce, 0x88, 0xc3,
- 0x8b, 0x44, 0x8d, 0x74,
- 0x20, 0x51, 0x89, 0x24,
- 0xe0, 0x88, 0x0c, 0x74,
- 0x08, 0x44, 0x4b, 0x57,
- 0x0c, 0x5e, 0xfb, 0x80,
- 0x1e, 0x55, 0xca, 0x0d,
- 0x40, 0x02, 0x40, 0x30,
- 0x06, 0x74, 0xd1, 0x94,
- 0x82, 0x21, 0x40, 0x88,
- 0xfa, 0x80, 0x18, 0xa4,
- 0xd0, 0x94, 0x46, 0x32,
- 0x40, 0x60, 0x46, 0x05,
- 0xf1, 0x90, 0x46, 0x22,
- 0x06, 0x34, 0x0f, 0x04,
- 0x00, 0x09, 0xfb, 0x00,
- 0x19, 0x04, 0xe0, 0x30,
- 0x80, 0x63, 0xa1, 0x0b,
- 0xe6, 0x40, 0x00, 0x60,
- 0xc0, 0x00, 0x00, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0x00, 0x00, 0x40, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0xa6, 0x04, 0x91, 0x44,
- 0x50, 0x58, 0x84, 0x14,
- 0xe4, 0xd0, 0x08, 0xf0,
- 0x08, 0xf0, 0x7c, 0x4e,
- 0xbe, 0x4e, 0xe4, 0xe0,
- 0x95, 0x44, 0xbc, 0xce,
- 0xe8, 0x00, 0x62, 0x08,
- 0x82, 0x71, 0x21, 0x0b,
- 0x80, 0x34, 0x1e, 0x15,
- 0x80, 0xc0, 0x4c, 0x15,
- 0x86, 0x18, 0x97, 0x14,
- 0xde, 0xd5, 0x83, 0x7d,
- 0x02, 0x0b, 0x80, 0x1b,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x1e, 0x05, 0xa9, 0x0e,
- 0x97, 0x2e, 0xe0, 0xac,
- 0xe0, 0xb4, 0x1e, 0x25,
- 0x1e, 0x05, 0x9d, 0x0e,
- 0x19, 0x5e, 0xe0, 0xa0,
- 0xe6, 0x40, 0x18, 0x20,
- 0x99, 0x51, 0x15, 0x1e,
- 0x1e, 0x05, 0xa3, 0x0e,
- 0x1e, 0x15, 0xe0, 0x9c,
- 0x1e, 0x65, 0xe0, 0xb0,
- 0x13, 0x0e, 0xe0, 0xa8,
- 0x1e, 0xb5, 0x81, 0x01,
- 0x1e, 0x75, 0xe0, 0xa4,
- 0xbd, 0x0e, 0xe0, 0x98,
- 0xb9, 0x0e, 0xbb, 0x0e,
- 0xb5, 0x0e, 0xb7, 0x0e,
- 0xb1, 0x0e, 0xb3, 0x0e,
- 0x81, 0x45, 0xaf, 0x0e,
- 0x0a, 0x50, 0x71, 0x0c,
- 0xa1, 0x5b, 0xec, 0x04,
- 0x29, 0x54, 0xfe, 0x95,
- 0xe6, 0x40, 0x14, 0x20,
- 0x12, 0x10, 0x1b, 0x7e,
- 0x25, 0x6e, 0xe4, 0xc0,
- 0xe5, 0x80, 0x0c, 0x40,
- 0x65, 0x01, 0x18, 0x50,
- 0x0a, 0x50, 0x40, 0x02,
- 0xc0, 0x04, 0x66, 0x01,
- 0x10, 0x10, 0x21, 0xce,
- 0x1f, 0x5e, 0xe6, 0x40,
- 0xe0, 0x08, 0x44, 0x96,
- 0x81, 0x71, 0x27, 0x3e,
- 0x93, 0x95, 0xab, 0xbe,
- 0x02, 0x0a, 0xa4, 0x14,
- 0xc7, 0xff, 0x63, 0xfd,
- 0xa1, 0x0b, 0x8a, 0x05,
- 0x25, 0xb4, 0x86, 0xd5,
- 0xad, 0x2e, 0x96, 0x3b,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0x78, 0x30, 0x0c, 0x13,
- 0xa3, 0x24, 0x96, 0x4b,
- 0x6b, 0x58, 0xa9, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x03, 0x82, 0xb5,
- 0x81, 0x21, 0x78, 0xc0,
- 0x78, 0x30, 0x0c, 0x13,
- 0xab, 0x34, 0x96, 0x4b,
- 0x6a, 0x98, 0xa1, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xa7, 0x34, 0x84, 0x45,
- 0xad, 0x24, 0xab, 0xb4,
- 0xe2, 0xa4, 0x04, 0x0a,
- 0x0f, 0xfc, 0x43, 0xf6,
- 0x80, 0x08, 0x44, 0x96,
- 0x80, 0x00, 0x54, 0x13,
- 0x88, 0x91, 0x02, 0x71,
- 0x84, 0x61, 0x04, 0xa1,
- 0x84, 0x81, 0x0d, 0x85,
- 0x81, 0x21, 0x2b, 0xb4,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0xf8, 0x30, 0x0c, 0x13,
- 0x96, 0x3b, 0x1d, 0x44,
- 0x68, 0xb8, 0x9f, 0x54,
- 0x27, 0x34, 0xe8, 0x00,
- 0xad, 0x24, 0xa1, 0x0b,
- 0x20, 0x02, 0xf8, 0x95,
- 0xe5, 0xa0, 0x04, 0xf0,
- 0x06, 0xf0, 0x18, 0x12,
- 0x3e, 0x2e, 0xe5, 0xd0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0x96, 0x03, 0x11, 0x3e,
- 0xe1, 0xae, 0x40, 0x0a,
- 0xbc, 0x3e, 0x9b, 0xb4,
- 0x2b, 0x34, 0xad, 0x0e,
- 0xa1, 0x44, 0x96, 0x2b,
- 0xef, 0xfc, 0x4c, 0xe8,
- 0x00, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0xc0,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x96, 0x2b, 0x11, 0x04,
- 0xa9, 0x44, 0xab, 0x34,
- 0x2d, 0x04, 0xbc, 0x0e,
- 0x4b, 0xf8, 0x86, 0xbb,
- 0x97, 0x04, 0xef, 0xfc,
- 0xe0, 0x30, 0x00, 0x09,
- 0x84, 0x05, 0xa1, 0x0b,
- 0x65, 0x70, 0x00, 0xf0,
- 0xe5, 0x80, 0x04, 0xf0,
- 0x0a, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0x90,
- 0xbc, 0x2e, 0x96, 0x3b,
- 0x9b, 0x24, 0xad, 0x04,
- 0x4a, 0xb8, 0x9f, 0x44,
- 0xbd, 0x04, 0xef, 0xfc,
- 0x99, 0x24, 0x95, 0x14,
- 0xbb, 0x04, 0xad, 0x0e,
- 0xb5, 0x34, 0xb3, 0xb4,
- 0x84, 0x1a, 0x91, 0x0e,
- 0x8b, 0x2e, 0x8d, 0xae,
- 0xaf, 0x04, 0x93, 0x24,
- 0x89, 0x2e, 0xb1, 0xc4,
- 0xfc, 0xbe, 0xfe, 0x0e,
- 0xbe, 0xce, 0xab, 0xb4,
- 0xb9, 0x44, 0xbc, 0x3e,
- 0x9b, 0x04, 0xb7, 0x54,
- 0x91, 0x34, 0xad, 0x24,
- 0xe8, 0x18, 0x75, 0x68,
- 0x81, 0x01, 0x00, 0x2b,
- 0xf1, 0xd5, 0xa7, 0x34,
- 0x83, 0x7d, 0x8e, 0x18,
- 0x1e, 0xf0, 0xd8, 0xd5,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x3e, 0x2e,
- 0x00, 0x50, 0x00, 0x9b,
- 0x19, 0x11, 0xe7, 0x60,
- 0x81, 0x85, 0x81, 0x21,
- 0x78, 0x60, 0x40, 0x23,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x30, 0x40, 0x23,
- 0xa1, 0x1b, 0xc1, 0x2c,
- 0x0c, 0x50, 0xfe, 0x15,
- 0x0e, 0x40, 0x67, 0x60,
- 0x7c, 0x3e, 0xe4, 0xc0,
- 0xbe, 0xb4, 0x81, 0xa1,
- 0x9c, 0x04, 0x85, 0xd5,
- 0x63, 0xfd, 0x00, 0x0a,
- 0x88, 0xa5, 0xc7, 0xff,
- 0x78, 0x30, 0x0e, 0x15,
- 0xa0, 0x24, 0x96, 0x0b,
- 0xe0, 0x42, 0xa4, 0x3a,
- 0x42, 0x98, 0xe4, 0x58,
- 0x09, 0x0e, 0xe8, 0x00,
- 0x9c, 0x14, 0x96, 0x0b,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x42, 0x08,
- 0x96, 0x0b, 0x7e, 0x0e,
- 0xe0, 0x30, 0x0e, 0x15,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x41, 0x68,
- 0xfc, 0x34, 0xfe, 0x14,
- 0xf8, 0x60, 0x4c, 0x13,
- 0x98, 0x0c, 0x89, 0x14,
- 0xf8, 0x30, 0x4c, 0x13,
- 0x84, 0x61, 0x02, 0xa1,
- 0x8e, 0x08, 0x88, 0x71,
- 0xf4, 0x55, 0x81, 0xad,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x18, 0x0e, 0x24, 0x13,
- 0x44, 0x1a, 0xf0, 0x00,
- 0x40, 0x1a, 0xe4, 0x82,
- 0x02, 0x24, 0xe4, 0x02,
- 0x82, 0xcf, 0xe1, 0x7c,
- 0x81, 0x01, 0x00, 0xc3,
- 0xf2, 0x84, 0x42, 0x22,
- 0x64, 0x01, 0x04, 0xc0,
- 0x42, 0x12, 0xc0, 0x80,
- 0x18, 0x14, 0xf2, 0x80,
- 0xe1, 0xc7, 0xe1, 0x7c,
- 0x42, 0x12, 0x98, 0x23,
- 0xe1, 0x27, 0x72, 0x80,
- 0xa2, 0x2f, 0xe0, 0x17,
- 0x08, 0x0e, 0x08, 0x23,
- 0x42, 0x2a, 0xff, 0x00,
- 0x44, 0x2a, 0xe4, 0x8e,
- 0x06, 0x14, 0xe4, 0x0e,
- 0x86, 0x4f, 0xe1, 0x7c,
- 0x42, 0x12, 0x88, 0x23,
- 0x04, 0x20, 0xf2, 0x8c,
- 0xc0, 0x08, 0x64, 0x01,
- 0xf2, 0x80, 0x42, 0x12,
- 0xe1, 0x7c, 0x06, 0x14,
- 0x86, 0x23, 0xe9, 0x37,
- 0x72, 0x80, 0x42, 0x12,
- 0xe8, 0x17, 0xd9, 0x27,
- 0x02, 0x0e, 0x22, 0x2f,
- 0x42, 0x22, 0xf8, 0x00,
- 0x02, 0x12, 0xfa, 0x04,
- 0xc0, 0x7f, 0x6b, 0xfd,
- 0x40, 0x10, 0xa1, 0x1d,
- 0xa0, 0x5d, 0x1c, 0x00,
- 0x40, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0x9c, 0x00,
- 0xfa, 0x3c, 0x04, 0xcc,
- 0x88, 0x6b, 0x00, 0x8b,
- 0x60, 0x2c, 0x10, 0x09,
- 0x01, 0xa1, 0x83, 0x41,
- 0x20, 0x34, 0xc8, 0x27,
- 0x21, 0x4f, 0x86, 0x7b,
- 0x0f, 0xae, 0x82, 0x0b,
- 0x0d, 0xae, 0x84, 0x1b,
- 0x52, 0x98, 0x88, 0x2b,
- 0x58, 0xae, 0xe8, 0x30,
- 0x1a, 0xae, 0x80, 0x9b,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x92, 0x1b, 0x0e, 0x0b,
- 0xe8, 0x30, 0x57, 0xa8,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x06, 0xf0, 0x0f, 0x04,
- 0x22, 0x14, 0xe4, 0x60,
- 0x58, 0x0e, 0x92, 0x2b,
- 0x53, 0x98, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x18, 0x1e, 0x05,
- 0x00, 0x04, 0x4c, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0xf2, 0x3c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x9b, 0x00, 0x7b,
- 0x60, 0x2c, 0x0e, 0x09,
- 0x0e, 0x29, 0x84, 0x6b,
- 0x83, 0x51, 0x60, 0x30,
- 0x60, 0x10, 0x0e, 0x4b,
- 0x21, 0x5f, 0x81, 0xb1,
- 0x1c, 0x34, 0x86, 0xab,
- 0x7c, 0xbe, 0x82, 0x0b,
- 0xe8, 0x88, 0x04, 0x54,
- 0x88, 0x1b, 0x3e, 0xbe,
- 0xe8, 0x30, 0x4f, 0x08,
- 0x00, 0x90, 0x00, 0x8b,
- 0x01, 0x95, 0xe4, 0xc0,
- 0x41, 0xbe, 0x99, 0x11,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x34, 0x40, 0xb5,
- 0xe0, 0x2c, 0x40, 0xb5,
- 0xfe, 0x15, 0xa1, 0x1b,
- 0x65, 0x80, 0x14, 0xa0,
- 0x05, 0xc5, 0xe0, 0x91,
- 0xa1, 0x0b, 0x81, 0x01,
- 0x28, 0x04, 0x88, 0xd5,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x68, 0x30, 0x53, 0x08,
- 0xa1, 0x0b, 0x90, 0x1b,
- 0x7c, 0x04, 0x86, 0xd5,
- 0xe4, 0x10, 0x06, 0xf0,
- 0xa4, 0x0e, 0x90, 0x2b,
- 0x9e, 0x14, 0xa8, 0x04,
- 0xe8, 0x30, 0x4e, 0xe8,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x06, 0xf0, 0x3e, 0x04,
- 0x90, 0x2b, 0xe4, 0x10,
- 0xf8, 0x30, 0x52, 0x05,
- 0xe0, 0x60, 0x14, 0x05,
- 0x4e, 0x18, 0x9e, 0x14,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x04, 0x1e, 0x05,
- 0x00, 0x30, 0x52, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0x88, 0xa1, 0x02, 0xb1,
- 0x9a, 0x18, 0x88, 0x91,
- 0xf4, 0x95, 0x83, 0xbd,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x7b, 0x11, 0x24,
- 0x88, 0x9b, 0x15, 0xa4,
- 0xff, 0x81, 0x13, 0xb4,
- 0x41, 0xf6, 0xa1, 0x2b,
- 0x4c, 0x96, 0x0f, 0xfc,
- 0x8a, 0x05, 0x80, 0x08,
- 0x44, 0x2a, 0x2b, 0x3f,
- 0x46, 0x3a, 0xe6, 0x8a,
- 0x81, 0x61, 0x66, 0x8e,
- 0x42, 0x3a, 0x8f, 0x1e,
- 0x46, 0x3a, 0xe5, 0x02,
- 0x00, 0x24, 0x65, 0x82,
- 0x82, 0x03, 0xe1, 0x84,
- 0x72, 0x98, 0x42, 0x32,
- 0x73, 0x98, 0x81, 0x31,
- 0x0f, 0x24, 0xef, 0xec,
- 0x41, 0xfe, 0x91, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0x5f, 0xfc, 0x41, 0xfe,
- 0x02, 0x94, 0xa1, 0x9b,
- 0x81, 0x81, 0x41, 0x84,
- 0x50, 0x9c, 0x42, 0x12,
- 0x50, 0x1a, 0x84, 0x73,
- 0x80, 0x73, 0x40, 0x26,
- 0x40, 0x8a, 0x8e, 0x83,
- 0xac, 0x8e, 0xf0, 0x0a,
- 0x8c, 0x0b, 0x28, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe6, 0x82, 0x40, 0x1a,
- 0x64, 0x01, 0x00, 0x00,
- 0xdf, 0x07, 0xc0, 0x40,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x5d, 0x93, 0xc0, 0x3f,
- 0xfb, 0x80, 0x00, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x7b, 0x04, 0x9b,
- 0x81, 0x61, 0x00, 0x5b,
- 0x81, 0x11, 0x12, 0x0b,
- 0x81, 0xb1, 0x01, 0xa1,
- 0x03, 0x0a, 0x81, 0xc5,
- 0x82, 0x75, 0xe2, 0x3c,
- 0xf0, 0x08, 0x00, 0x25,
- 0xf8, 0x04, 0x00, 0x45,
- 0x56, 0x42, 0x84, 0xa3,
- 0x82, 0x11, 0x72, 0xac,
- 0xfc, 0x95, 0x8f, 0x1d,
- 0x60, 0x00, 0x17, 0x4a,
- 0xe1, 0x84, 0x00, 0xa4,
- 0x60, 0x00, 0x16, 0x1a,
- 0xe0, 0xfc, 0x02, 0xb4,
- 0x60, 0x00, 0x14, 0x6a,
- 0x7e, 0x0e, 0xa2, 0x0f,
- 0xe5, 0x80, 0x42, 0x0a,
- 0x61, 0x88, 0x42, 0x1a,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x42, 0x2a, 0x7c, 0x0e,
- 0x3e, 0x3e, 0xed, 0x80,
- 0xe4, 0x30, 0x10, 0x30,
- 0x5e, 0x27, 0x89, 0x5e,
- 0x89, 0xa5, 0xe0, 0x5c,
- 0x60, 0x1c, 0x4c, 0xca,
- 0x44, 0x0a, 0x81, 0x01,
- 0x40, 0x0a, 0xe1, 0x80,
- 0x8e, 0xe5, 0xe9, 0x9c,
- 0x81, 0x01, 0x26, 0x24,
- 0x04, 0xca, 0xa4, 0x14,
- 0x04, 0x1a, 0xe0, 0x00,
- 0x02, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x1e, 0x27, 0xe1, 0x88,
- 0x42, 0x0a, 0xe0, 0x5c,
- 0x8a, 0xa5, 0xed, 0x80,
- 0x64, 0x7c, 0x0b, 0x0a,
- 0x00, 0x50, 0x82, 0x3b,
- 0x46, 0x20, 0x6c, 0x80,
- 0x44, 0x52, 0x9c, 0x00,
- 0x02, 0x06, 0x7b, 0x80,
- 0x00, 0x22, 0xc0, 0x00,
- 0x20, 0x23, 0xec, 0x7c,
- 0xef, 0x80, 0x08, 0x14,
- 0x6c, 0x00, 0x0a, 0x04,
- 0x7e, 0x04, 0xa1, 0x3f,
- 0x48, 0x52, 0xa1, 0x1f,
- 0x04, 0x22, 0x78, 0x90,
- 0xa8, 0x3f, 0xec, 0x04,
- 0x82, 0x03, 0x7c, 0x14,
- 0x94, 0x2b, 0x25, 0x3f,
- 0x72, 0x84, 0x42, 0x32,
- 0x69, 0xf8, 0x96, 0x3b,
- 0x09, 0x54, 0xef, 0xec,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x82, 0x61, 0x61, 0x0c,
- 0x0c, 0x0a, 0x90, 0x91,
- 0xec, 0xb5, 0xe2, 0x40,
- 0xb0, 0xf1, 0x3e, 0x04,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x1c, 0x40, 0x51,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x02, 0x10, 0x0a, 0x28,
- 0x08, 0x14, 0xec, 0x04,
- 0xe0, 0x31, 0x61, 0xfc,
- 0x83, 0x41, 0x08, 0x13,
- 0x83, 0x17, 0x03, 0xa5,
- 0x78, 0x30, 0x06, 0x5b,
- 0xec, 0x04, 0x04, 0x20,
- 0x82, 0x60, 0x80, 0xc0,
- 0x46, 0xc3, 0x8a, 0xc3,
- 0xcd, 0x5a, 0xf8, 0x60,
- 0x0a, 0xc4, 0x0a, 0x63,
- 0x18, 0x64, 0xfb, 0x00,
- 0x4a, 0x42, 0x7b, 0x00,
- 0x46, 0x63, 0xf1, 0x94,
- 0x98, 0x53, 0x60, 0x2c,
- 0xfb, 0x14, 0x4a, 0x12,
- 0xe0, 0x5c, 0x46, 0x53,
- 0xf8, 0xf5, 0xa1, 0x2b,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x88, 0x0c, 0x34,
- 0x01, 0x45, 0x8a, 0x7b,
- 0xf0, 0x98, 0x58, 0x52,
- 0xd9, 0x7d, 0xdd, 0x2e,
- 0x06, 0x13, 0xfe, 0xd5,
- 0x44, 0x0a, 0x86, 0x03,
- 0x82, 0x11, 0x61, 0x8e,
- 0x61, 0x8e, 0x46, 0x1a,
- 0xf0, 0x98, 0x40, 0x42,
- 0x0c, 0x34, 0xc4, 0x27,
- 0x42, 0x42, 0x60, 0x88,
- 0x46, 0x52, 0xf0, 0x88,
- 0x44, 0x42, 0x70, 0x88,
- 0x81, 0x95, 0xf0, 0x98,
- 0xc1, 0x1d, 0xc5, 0x64,
- 0x42, 0x40, 0xcd, 0x6e,
- 0xd9, 0x3d, 0x1c, 0x00,
- 0x9c, 0x00, 0x46, 0x50,
- 0xfc, 0xf5, 0x85, 0x1b,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x00, 0x34, 0x00, 0x8b,
- 0x06, 0x03, 0xe1, 0xfc,
- 0x1f, 0x14, 0x82, 0xbb,
- 0x0d, 0x3e, 0x83, 0x07,
- 0x1d, 0x34, 0x8a, 0x6b,
- 0x23, 0x74, 0x84, 0x5b,
- 0x21, 0xa4, 0xa0, 0x2b,
- 0x3e, 0x1e, 0x82, 0x9b,
- 0x0b, 0x4e, 0x90, 0x0b,
- 0x7e, 0x2e, 0x81, 0x41,
- 0x09, 0x3e, 0xaa, 0x23,
- 0x3c, 0x3e, 0x96, 0x1b,
- 0x7c, 0x5e, 0x8a, 0x3b,
- 0x6c, 0xd8, 0x8c, 0x5b,
- 0xa1, 0x0b, 0xef, 0xf8,
- 0x09, 0x04, 0x86, 0x75,
- 0x3e, 0xae, 0x81, 0x41,
- 0x7e, 0x24, 0x96, 0x1b,
- 0x3c, 0x0e, 0x8c, 0x5b,
- 0x8d, 0x34, 0x90, 0x0b,
- 0xef, 0xf8, 0x6c, 0x08,
- 0x82, 0xd5, 0xa1, 0x0b,
- 0x81, 0x41, 0x0d, 0x24,
- 0x96, 0x1b, 0x7e, 0x04,
- 0x8c, 0x5b, 0x3e, 0x7e,
- 0x09, 0x04, 0xfc, 0x34,
- 0x3c, 0x0e, 0x80, 0x23,
- 0x6b, 0x18, 0x90, 0x0b,
- 0x16, 0x1b, 0xef, 0xf8,
- 0x0b, 0x64, 0x96, 0x8d,
- 0x09, 0x0e, 0x8c, 0xbb,
- 0x0a, 0x55, 0x94, 0x4b,
- 0x25, 0x94, 0x92, 0x0b,
- 0xfa, 0x20, 0x42, 0x12,
- 0xb0, 0x13, 0x82, 0x11,
- 0xa7, 0x14, 0x83, 0x13,
- 0x83, 0xb3, 0x8d, 0x1e,
- 0xe8, 0x00, 0x31, 0xec,
- 0x70, 0xa0, 0x46, 0xb2,
- 0x46, 0x3a, 0x80, 0x1b,
- 0x82, 0x81, 0x61, 0xae,
- 0x00, 0xa5, 0xc4, 0x37,
- 0x88, 0x0b, 0x7c, 0x0c,
- 0x7c, 0x0c, 0x08, 0x55,
- 0xf0, 0x8c, 0x44, 0x92,
- 0xfc, 0x0c, 0x0e, 0xc5,
- 0x71, 0x98, 0x48, 0xa2,
- 0x0a, 0x43, 0x8c, 0xa3,
- 0x38, 0x43, 0xb4, 0x53,
- 0x08, 0x4e, 0x98, 0x53,
- 0x0d, 0x14, 0x80, 0x4b,
- 0x82, 0x33, 0x82, 0x0b,
- 0x09, 0x04, 0x8c, 0x5e,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x80, 0xbb, 0x29, 0x04,
- 0x82, 0x8b, 0x2f, 0x74,
- 0x43, 0xfe, 0x13, 0x4e,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x8a, 0x6b, 0x0f, 0x2e,
- 0xb1, 0x44, 0xb3, 0x24,
- 0x81, 0x01, 0x7e, 0x0e,
- 0x9c, 0x0e, 0x91, 0x3e,
- 0x97, 0x0e, 0x99, 0x0e,
- 0x41, 0xf6, 0x15, 0x0e,
- 0x8b, 0x4e, 0xe0, 0x0c,
- 0x8d, 0x2e, 0x90, 0x0c,
- 0xad, 0x94, 0x88, 0x1e,
- 0x91, 0xa4, 0xab, 0x54,
- 0x40, 0x62, 0x89, 0x7e,
- 0x42, 0x0a, 0xf0, 0xac,
- 0xc4, 0x17, 0xe1, 0x9a,
- 0xfc, 0x04, 0x0a, 0x25,
- 0x84, 0xa5, 0xa1, 0x2b,
- 0x84, 0xe5, 0xa1, 0x2d,
- 0xfc, 0x04, 0x12, 0x15,
- 0x8e, 0x95, 0xa1, 0x1d,
- 0x40, 0x0a, 0x82, 0x01,
- 0xc4, 0x07, 0xe1, 0x9a,
- 0xfc, 0x00, 0x0a, 0x15,
- 0x8c, 0x95, 0xa1, 0x1d,
- 0x7c, 0x00, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x81, 0xa5, 0x8a, 0xf5,
- 0xfc, 0x04, 0x12, 0x05,
- 0x8a, 0x45, 0xa1, 0x0b,
- 0x7c, 0x04, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x03, 0x01, 0x88, 0xa5,
- 0xe4, 0xb0, 0x02, 0xf0,
- 0x8a, 0x7b, 0x1c, 0x0e,
- 0x0a, 0xf0, 0x0b, 0x04,
- 0x14, 0x2b, 0xe4, 0xc0,
- 0x00, 0xbc, 0x8c, 0x3b,
- 0xe4, 0xa0, 0x00, 0xf0,
- 0x96, 0x0b, 0x3e, 0x0e,
- 0x8f, 0x14, 0xbc, 0x1e,
- 0x56, 0x58, 0xfe, 0x44,
- 0x0d, 0x04, 0xef, 0xf8,
- 0x99, 0x24, 0x96, 0x1b,
- 0x3e, 0x0e, 0x97, 0x34,
- 0x95, 0x44, 0x94, 0x0b,
- 0x93, 0x54, 0xbc, 0x6e,
- 0xef, 0xf8, 0x68, 0x08,
- 0x8e, 0x5b, 0x09, 0x74,
- 0xe2, 0xa4, 0x00, 0x0a,
- 0x81, 0x01, 0x80, 0x75,
- 0x82, 0xb1, 0x9c, 0x0e,
- 0x80, 0x85, 0x91, 0xbd,
- 0xa1, 0x0b, 0x9c, 0x04,
- 0x01, 0x01, 0xea, 0xe5,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x60, 0x14, 0x0c, 0x19,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x94, 0x75, 0xf4, 0x1d,
- 0xe0, 0x18, 0x0c, 0x29,
- 0x92, 0xf5, 0xf0, 0x2d,
- 0xe6, 0x86, 0x50, 0x2a,
- 0xe5, 0x00, 0x11, 0x0a,
- 0x19, 0x21, 0x92, 0x55,
- 0x76, 0xd8, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xec,
- 0x64, 0x30, 0x00, 0x70,
- 0xe0, 0x04, 0x02, 0x06,
- 0x81, 0x91, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0x60, 0xfe, 0x95,
- 0x81, 0xb1, 0x64, 0x90,
- 0x81, 0x11, 0x01, 0x95,
- 0xe5, 0x00, 0x02, 0x8a,
- 0x41, 0x24, 0x80, 0xe5,
- 0x56, 0x22, 0x82, 0x11,
- 0xd1, 0x1d, 0xfa, 0xac,
- 0x00, 0xb4, 0xfe, 0x15,
- 0xd8, 0xb7, 0x61, 0xd0,
- 0x98, 0x71, 0x0f, 0x0e,
- 0x81, 0xa1, 0x48, 0x61,
- 0x81, 0x01, 0x03, 0xd5,
- 0x40, 0x96, 0x18, 0x24,
- 0xa1, 0x2b, 0xe0, 0x08,
- 0x0f, 0x14, 0x84, 0x85,
- 0xe1, 0x84, 0x00, 0x24,
- 0x81, 0x31, 0x16, 0x03,
- 0x6f, 0xec, 0x50, 0x08,
- 0xf2, 0xa4, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x81, 0x01, 0x1c, 0x0c,
- 0x84, 0x71, 0x02, 0xa1,
- 0xd1, 0xad, 0x88, 0x61,
- 0x15, 0x0a, 0x80, 0xc5,
- 0x80, 0x75, 0xe4, 0xfc,
- 0xf6, 0xe5, 0xa1, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x86, 0x6b, 0x04, 0x88,
- 0x60, 0x10, 0x02, 0x19,
- 0x00, 0xa9, 0x81, 0x91,
- 0x06, 0x0e, 0x60, 0x10,
- 0xc0, 0x00, 0x72, 0xc0,
- 0x88, 0xbb, 0x1d, 0x9e,
- 0x42, 0x96, 0x7e, 0x1e,
- 0xc0, 0x01, 0x67, 0xb9,
- 0x8b, 0x1e, 0x80, 0x04,
- 0x11, 0x0e, 0x8d, 0x1e,
- 0x63, 0x21, 0x41, 0x56,
- 0x15, 0x0e, 0xc0, 0x01,
- 0x6e, 0xa1, 0x00, 0x06,
- 0x1b, 0x0e, 0xc0, 0x01,
- 0x8f, 0x1e, 0x84, 0x0b,
- 0x19, 0x1e, 0x93, 0x1e,
- 0x97, 0x3e, 0x8c, 0x1b,
- 0xe8, 0x00, 0x48, 0xc8,
- 0x6c, 0x04, 0x00, 0xa0,
- 0xe0, 0x08, 0x42, 0xc6,
- 0x74, 0x1c, 0x01, 0x0a,
- 0x09, 0x0e, 0x81, 0x01,
- 0x80, 0x88, 0x00, 0xa4,
- 0x04, 0x50, 0x02, 0xf0,
- 0xe0, 0x10, 0x10, 0x1a,
- 0x1c, 0x00, 0x02, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x00, 0x10, 0x5e, 0x05,
- 0x09, 0x04, 0xb1, 0x8b,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x08, 0x42, 0xc6,
- 0x42, 0xc6, 0xa1, 0x0b,
- 0xe5, 0xad, 0x00, 0x08,
- 0x8a, 0x95, 0xfc, 0x1e,
- 0xa1, 0x0b, 0xfc, 0x04,
- 0x7e, 0x14, 0x8a, 0x35,
- 0x0e, 0x0b, 0x90, 0x7b,
- 0x49, 0x98, 0x96, 0x2b,
- 0x18, 0xb1, 0xe8, 0x00,
- 0x04, 0x06, 0x81, 0x11,
- 0x96, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x72, 0xc8,
- 0xe6, 0x9e, 0x4e, 0x7a,
- 0x00, 0x06, 0x83, 0x75,
- 0xe7, 0xad, 0x61, 0x00,
- 0x84, 0x15, 0x9d, 0x0e,
- 0x00, 0xf0, 0x18, 0x34,
- 0x1a, 0x44, 0xe4, 0xe0,
- 0xe1, 0xec, 0x0b, 0x76,
- 0x90, 0x1b, 0x3e, 0x0e,
- 0xfe, 0x24, 0x89, 0x04,
- 0x92, 0x0b, 0x3c, 0x0e,
- 0xe8, 0x00, 0x40, 0xc8,
- 0x6d, 0x0c, 0x9d, 0x04,
- 0x93, 0x7b, 0x82, 0x91,
- 0x7c, 0x04, 0xfa, 0x35,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x61, 0x06, 0x4e, 0x0a,
- 0xe0, 0x88, 0x12, 0x24,
- 0x60, 0x06, 0x50, 0x0a,
- 0x0f, 0x44, 0x88, 0xcb,
- 0x4e, 0x9a, 0x86, 0x6b,
- 0x81, 0x11, 0x66, 0x9e,
- 0xe6, 0xa2, 0x50, 0x9a,
- 0x8e, 0x63, 0x0d, 0x34,
- 0x40, 0x2a, 0x10, 0xc3,
- 0x10, 0x1e, 0xe6, 0x8a,
- 0xf0, 0xa4, 0x4e, 0x62,
- 0x65, 0x0e, 0x44, 0x3a,
- 0xf0, 0xa4, 0x50, 0xc2,
- 0xe5, 0x8e, 0x46, 0x3a,
- 0x8f, 0xad, 0x81, 0xc5,
- 0x46, 0xaa, 0x56, 0xaa,
- 0xc4, 0x10, 0x14, 0xa0,
- 0xd0, 0xa4, 0x56, 0xb2,
- 0x42, 0x12, 0x7e, 0x35,
- 0x88, 0xc1, 0xd0, 0xac,
- 0x52, 0xca, 0x91, 0xcd,
- 0x54, 0x60, 0x46, 0xb2,
- 0xfc, 0x15, 0xdc, 0x00,
- 0xe1, 0x84, 0x18, 0x04,
- 0x42, 0x5a, 0x02, 0xc3,
- 0x40, 0xca, 0xe6, 0x96,
- 0x0c, 0x0c, 0xe0, 0x02,
- 0x81, 0x35, 0xf0, 0x7c,
- 0xc1, 0xc3, 0x8b, 0x45,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x48, 0x0a, 0x08, 0x6b,
- 0x40, 0x0a, 0xe5, 0x06,
- 0x0a, 0x24, 0x65, 0x86,
- 0x02, 0x44, 0xe1, 0x84,
- 0xe8, 0x47, 0x61, 0xb0,
- 0x18, 0x34, 0x68, 0x07,
- 0x20, 0x1f, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x34,
- 0x40, 0x42, 0xa0, 0x5f,
- 0x41, 0xb8, 0xf0, 0x94,
- 0x42, 0x12, 0x6f, 0xec,
- 0x04, 0x06, 0xf2, 0xb0,
- 0x40, 0x40, 0x60, 0x01,
- 0x84, 0x03, 0xff, 0x31,
- 0x81, 0x31, 0x07, 0x0b,
- 0x72, 0x8c, 0x42, 0x12,
- 0x9f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x40, 0x0a, 0xdf, 0xfc,
- 0x02, 0x04, 0xf0, 0x0a,
- 0x84, 0x13, 0xe1, 0x84,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x14, 0x44, 0x01,
- 0x08, 0x3c, 0x81, 0x31,
- 0x0a, 0x3c, 0xaf, 0x41,
- 0xfc, 0x00, 0x06, 0x14,
- 0x60, 0x18, 0x44, 0x01,
- 0xe4, 0x1c, 0x00, 0x30,
- 0x60, 0x1c, 0x44, 0x01,
- 0xec, 0x04, 0x00, 0x30,
- 0x60, 0x20, 0x44, 0x01,
- 0x44, 0x41, 0xc2, 0x17,
- 0x83, 0x01, 0x60, 0x10,
- 0xe0, 0x24, 0x44, 0x11,
- 0xe0, 0x28, 0x44, 0x11,
- 0xe0, 0x2c, 0x44, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0x2e, 0x00, 0x38,
- 0xa1, 0x3b, 0xff, 0xfc,
- 0x82, 0x08, 0x84, 0x45,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x71, 0x80, 0x48, 0x22,
- 0x26, 0x23, 0x90, 0x01,
- 0x40, 0x00, 0x90, 0x31,
- 0x40, 0x01, 0x73, 0xc1,
- 0x73, 0xc1, 0x46, 0x30,
- 0x06, 0x23, 0xc0, 0x01,
- 0x81, 0x35, 0x88, 0x03,
- 0xff, 0xfc, 0x00, 0x2e,
- 0x86, 0x0e, 0x84, 0x2e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x86, 0x7b, 0x09, 0x0e,
- 0x61, 0x84, 0x00, 0x14,
- 0xe0, 0xac, 0x06, 0x74,
- 0x88, 0x6b, 0x20, 0x23,
- 0x84, 0x13, 0x86, 0x23,
- 0xe1, 0x0e, 0x40, 0x1a,
- 0xe1, 0x0e, 0x42, 0x2a,
- 0xe1, 0xac, 0x04, 0x04,
- 0x61, 0x1e, 0x56, 0x2a,
- 0xe1, 0xac, 0x04, 0x14,
- 0xe1, 0x1e, 0x50, 0x2a,
- 0xe4, 0x04, 0x04, 0xb0,
- 0x61, 0x1e, 0x54, 0x2a,
- 0xe0, 0x80, 0x04, 0x06,
- 0x06, 0x84, 0x22, 0x23,
- 0x06, 0x23, 0xe0, 0xac,
- 0xf1, 0x84, 0x42, 0x02,
- 0x04, 0xb4, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xe0, 0xac,
- 0x3e, 0x0e, 0xa4, 0x03,
- 0x85, 0xb5, 0x90, 0x9b,
- 0x82, 0x35, 0x91, 0x9b,
- 0xe0, 0x2c, 0x52, 0x1a,
- 0xa0, 0x10, 0x1e, 0x05,
- 0xa0, 0x0c, 0x1e, 0x15,
- 0xa0, 0x00, 0x01, 0x68,
- 0xe0, 0x20, 0x52, 0x1a,
- 0xa0, 0x00, 0x00, 0x88,
- 0x52, 0x1a, 0x09, 0x04,
- 0x00, 0xf8, 0xe0, 0x2c,
- 0xc0, 0x00, 0x20, 0x01,
- 0x80, 0x10, 0x1e, 0x05,
- 0x80, 0x08, 0x1e, 0x15,
- 0x17, 0x9b, 0x80, 0xc5,
- 0x80, 0xb5, 0x81, 0x01,
- 0xbe, 0x14, 0x89, 0x04,
- 0xe8, 0x00, 0x4b, 0x08,
- 0x60, 0x88, 0x02, 0x94,
- 0x0c, 0x25, 0x82, 0x91,
- 0x8c, 0x13, 0x7c, 0x04,
- 0xe1, 0x1e, 0x52, 0x9a,
- 0x84, 0x2e, 0x80, 0x23,
- 0xf4, 0xb5, 0x95, 0x9b,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x84, 0x7b, 0x02, 0x8b,
- 0x86, 0x6b, 0x00, 0x9b,
- 0x00, 0x06, 0x1c, 0x14,
- 0xe0, 0x24, 0xe0, 0x80,
- 0x43, 0x38, 0xa4, 0x34,
- 0xa0, 0x44, 0xe8, 0x00,
- 0x9e, 0x14, 0x98, 0x0e,
- 0x88, 0x0b, 0x60, 0x24,
- 0x42, 0xb8, 0xa4, 0x34,
- 0x9a, 0x0e, 0xe8, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x60, 0x24, 0x0e, 0x19,
- 0x10, 0x49, 0x83, 0x21,
- 0x86, 0x6b, 0x60, 0x24,
- 0x60, 0x28, 0x0e, 0x59,
- 0x1c, 0x04, 0x80, 0x9b,
- 0x22, 0x34, 0xa3, 0x2f,
- 0xe0, 0x90, 0x02, 0x44,
- 0x68, 0x2c, 0x48, 0x88,
- 0xe8, 0x94, 0x14, 0x24,
- 0x9c, 0x24, 0xa4, 0x14,
- 0x22, 0x34, 0x98, 0x0e,
- 0x04, 0x0b, 0xcf, 0x17,
- 0x47, 0xd8, 0x94, 0x2b,
- 0x1a, 0x0e, 0xe8, 0x2c,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x40, 0x3a, 0x00, 0x6b,
- 0x02, 0x7b, 0xe5, 0x0a,
- 0xe5, 0x8a, 0x42, 0x3a,
- 0x00, 0x00, 0x01, 0x81,
- 0xc0, 0x01, 0x67, 0xd1,
- 0x72, 0xa0, 0x42, 0x12,
- 0xe0, 0x3c, 0x44, 0x86,
- 0x6f, 0xe8, 0x71, 0x48,
- 0x7f, 0x21, 0x81, 0x31,
- 0x85, 0x0b, 0x81, 0x31,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x42, 0x7a, 0xdf, 0xfc,
- 0x44, 0x7a, 0xe5, 0x02,
- 0x00, 0x64, 0x65, 0x82,
- 0x82, 0x03, 0xe0, 0x9c,
- 0x72, 0xa0, 0x42, 0x22,
- 0xe0, 0xa0, 0x04, 0x64,
- 0xef, 0xe8, 0x6f, 0xe8,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0xc5, 0x0d, 0xc0, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0xa1, 0x1b, 0x00, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x0c, 0xc0, 0x3f,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xa1, 0x1b, 0x00, 0x5b,
- 0x60, 0x08, 0x40, 0x96,
- 0x64, 0x00, 0x18, 0x50,
- 0x00, 0x06, 0xc0, 0x80,
- 0x07, 0x0a, 0x40, 0x00,
- 0x40, 0xc6, 0xe6, 0x40,
- 0x19, 0x0a, 0x40, 0x00,
- 0xc0, 0xff, 0x67, 0xfc,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x5c, 0x08, 0xa1, 0x0b,
- 0x18, 0x14, 0xda, 0x00,
- 0xa1, 0x5d, 0x61, 0xfc,
- 0xe0, 0x57, 0x02, 0xc3,
- 0xd6, 0x37, 0x03, 0xc7,
- 0xd1, 0x80, 0x18, 0xc4,
- 0x42, 0xca, 0x8a, 0xc3,
- 0x84, 0x13, 0xe0, 0x86,
- 0xe0, 0x00, 0x02, 0x12,
- 0xe1, 0x0e, 0x42, 0x1a,
- 0xdd, 0x93, 0x90, 0x1e,
- 0x65, 0x06, 0x44, 0x0a,
- 0x42, 0x0a, 0x81, 0x31,
- 0x00, 0x20, 0xe5, 0x86,
- 0xc0, 0x04, 0x64, 0x01,
- 0xf2, 0x8c, 0x42, 0x12,
- 0x5c, 0x08, 0xee, 0x1d,
- 0x41, 0xfe, 0x5a, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0xd7, 0x07, 0x6a, 0x17,
- 0xa2, 0x0f, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x7e, 0x3e,
- 0x88, 0xbb, 0x09, 0x2e,
- 0xe0, 0x34, 0x04, 0x09,
- 0x8d, 0x6e, 0xfc, 0x1e,
- 0xe8, 0x0d, 0x3e, 0x0e,
- 0x60, 0x24, 0x02, 0xa9,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x15, 0x0a, 0x98, 0x15,
- 0x96, 0xb5, 0xe6, 0x40,
- 0x89, 0x04, 0xfc, 0x14,
- 0x75, 0x18, 0xfe, 0x34,
- 0x04, 0x10, 0x6f, 0xfc,
- 0xa1, 0x0b, 0xe4, 0x30,
- 0x7c, 0x04, 0x94, 0x95,
- 0x89, 0x14, 0x96, 0x3b,
- 0x72, 0xd8, 0xfe, 0x24,
- 0x00, 0xb0, 0xef, 0xfc,
- 0x81, 0x11, 0x64, 0x20,
- 0x55, 0x1d, 0x81, 0x75,
- 0x16, 0x25, 0x81, 0x21,
- 0x82, 0x11, 0x40, 0x04,
- 0x02, 0x0a, 0xc1, 0x2e,
- 0xfe, 0x15, 0xe2, 0x40,
- 0x89, 0x11, 0x7e, 0x04,
- 0xb0, 0x01, 0x01, 0x75,
- 0x78, 0x10, 0x40, 0x65,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc1, 0x6e,
- 0x09, 0x74, 0xfe, 0x55,
- 0x7e, 0x84, 0x90, 0xb1,
- 0xbc, 0xbe, 0x81, 0x01,
- 0xc0, 0x71, 0x7c, 0x94,
- 0xb0, 0x81, 0x05, 0xb5,
- 0x8a, 0x75, 0xa1, 0x0b,
- 0x90, 0x6b, 0x0b, 0x6e,
- 0x89, 0x84, 0xfe, 0x14,
- 0xf8, 0x10, 0x0e, 0x25,
- 0xa0, 0x04, 0x86, 0x14,
- 0x73, 0xd8, 0xa4, 0x34,
- 0x22, 0x24, 0xef, 0xfc,
- 0x1c, 0x04, 0x80, 0xbb,
- 0xe4, 0x60, 0x08, 0xf0,
- 0x60, 0x10, 0x12, 0x15,
- 0x76, 0x98, 0x94, 0x3b,
- 0x8c, 0x8b, 0x6f, 0xfc,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x78, 0x10, 0x50, 0xb5,
- 0x8d, 0x24, 0x94, 0x3b,
- 0x89, 0x04, 0xa0, 0x2e,
- 0x00, 0x14, 0xbc, 0x44,
- 0x68, 0x78, 0x96, 0x0b,
- 0x0b, 0x64, 0xef, 0xfc,
- 0x88, 0x81, 0x88, 0x71,
- 0xbe, 0x14, 0x82, 0x61,
- 0xf4, 0xb5, 0xc3, 0x6d,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x80, 0x6b, 0x06, 0x4a,
- 0x04, 0xc9, 0x84, 0x0a,
- 0x4c, 0x45, 0xe0, 0xc0,
- 0x02, 0x49, 0xed, 0xac,
- 0x4c, 0x05, 0xe0, 0x20,
- 0xc4, 0x0a, 0xed, 0xa8,
- 0xee, 0x24, 0x4c, 0x45,
- 0xe0, 0xcc, 0x04, 0x49,
- 0xed, 0xb0, 0x4c, 0x05,
- 0xe0, 0xc8, 0x04, 0x09,
- 0xe0, 0xc4, 0x04, 0x79,
- 0xed, 0xc0, 0x4c, 0x45,
- 0xe0, 0xd0, 0x04, 0x41,
- 0xed, 0xbc, 0x4c, 0x05,
- 0xe0, 0x2c, 0x04, 0x05,
- 0xed, 0xb4, 0x4c, 0xc5,
- 0xed, 0xb8, 0x4c, 0x75,
- 0xe0, 0xd4, 0x04, 0xc1,
- 0xe0, 0xd8, 0x04, 0x71,
- 0xed, 0xc4, 0x4c, 0x45,
- 0xe0, 0xe0, 0x04, 0x49,
- 0xee, 0x28, 0x4c, 0x05,
- 0xe0, 0xdc, 0x04, 0x01,
- 0xed, 0xc8, 0x4c, 0xc5,
- 0xed, 0xcc, 0x4c, 0x75,
- 0xed, 0xd4, 0x4c, 0x45,
- 0xe0, 0xf0, 0x04, 0x49,
- 0xe0, 0xe4, 0x04, 0xc9,
- 0xe0, 0xec, 0x04, 0x79,
- 0xed, 0xd0, 0x4c, 0x05,
- 0xe0, 0xe8, 0x04, 0x09,
- 0xed, 0xe4, 0x4c, 0x45,
- 0xed, 0xd8, 0x4c, 0xc5,
- 0xed, 0xe0, 0x4c, 0x75,
- 0x8a, 0xc4, 0x88, 0x44,
- 0xca, 0x84, 0xc8, 0x74,
- 0xe0, 0xf8, 0x04, 0x91,
- 0xe0, 0xfc, 0x04, 0xa1,
- 0x6d, 0xdc, 0x4c, 0x05,
- 0x4c, 0xc5, 0x81, 0x01,
- 0x4c, 0x75, 0xed, 0xf0,
- 0x4c, 0x85, 0xed, 0xf4,
- 0x4c, 0x95, 0xed, 0xf8,
- 0x4c, 0xa5, 0xee, 0x48,
- 0x4c, 0x05, 0xee, 0x4c,
- 0x4c, 0x45, 0xed, 0xe8,
- 0x06, 0x45, 0xed, 0xec,
- 0x04, 0xc5, 0xe0, 0x34,
- 0x04, 0x75, 0xe0, 0x10,
- 0x4c, 0x45, 0xe0, 0x14,
- 0x06, 0x45, 0xee, 0x50,
- 0x04, 0x85, 0xe0, 0x38,
- 0x04, 0x95, 0xe0, 0x18,
- 0x04, 0xa5, 0xe0, 0x1c,
- 0x4c, 0xc5, 0xe0, 0x20,
- 0x4c, 0x75, 0xee, 0x70,
- 0x4c, 0x95, 0xee, 0x74,
- 0x4c, 0xa5, 0xee, 0x7c,
- 0x83, 0xa1, 0x6e, 0x80,
- 0xee, 0x54, 0x4c, 0x45,
- 0xee, 0x78, 0x4c, 0x85,
- 0x04, 0xc5, 0x8c, 0x44,
- 0xa1, 0x94, 0xe0, 0x24,
- 0xee, 0x84, 0x4c, 0x45,
- 0xa4, 0x88, 0x8e, 0x44,
- 0x4c, 0x45, 0x9b, 0x74,
- 0xcc, 0x44, 0xee, 0x88,
- 0x4c, 0x45, 0xa7, 0xb4,
- 0xce, 0x44, 0xee, 0x8c,
- 0xee, 0x90, 0x4c, 0x45,
- 0xe0, 0x10, 0x06, 0x45,
- 0xee, 0x94, 0x4c, 0x45,
- 0xe0, 0x14, 0x06, 0x45,
- 0xee, 0x98, 0x4c, 0x45,
- 0xe0, 0x18, 0x06, 0x45,
- 0xee, 0x9c, 0x4c, 0x45,
- 0xe0, 0x1c, 0x06, 0x45,
- 0xee, 0xa0, 0x4c, 0x45,
- 0xe0, 0x20, 0x06, 0x45,
- 0xee, 0xa4, 0x4c, 0x45,
- 0xe0, 0x24, 0x06, 0x45,
- 0xee, 0xa8, 0x4c, 0x45,
- 0xe0, 0x28, 0x06, 0x45,
- 0xee, 0xac, 0x4c, 0x45,
- 0xe0, 0x2c, 0x06, 0x45,
- 0xee, 0xb0, 0x4c, 0x45,
- 0xe0, 0x30, 0x06, 0x35,
- 0xee, 0xb8, 0x4c, 0xc5,
- 0x4c, 0x35, 0x99, 0xc4,
- 0x97, 0x34, 0xee, 0xb4,
- 0x6d, 0x88, 0x4c, 0xc5,
- 0x7f, 0xfc, 0x59, 0xe6,
- 0x9f, 0x44, 0xc0, 0x20,
- 0xed, 0x84, 0x4c, 0x35,
- 0x4c, 0x85, 0xc8, 0x34,
- 0x9d, 0x84, 0xed, 0x80,
- 0x6d, 0x8c, 0x4c, 0x45,
- 0x67, 0xfc, 0x04, 0x30,
- 0x58, 0x2d, 0xc0, 0xff,
- 0xe0, 0x08, 0x18, 0x06,
- 0x01, 0x7c, 0x18, 0x34,
- 0x23, 0x44, 0xff, 0x21,
- 0x81, 0xc0, 0x18, 0xc4,
- 0x6d, 0x94, 0x4c, 0x75,
- 0x90, 0xb0, 0x46, 0x32,
- 0x18, 0x34, 0x25, 0x34,
- 0x4c, 0x85, 0x81, 0x40,
- 0x0e, 0x60, 0x6d, 0x90,
- 0xc0, 0x0d, 0x66, 0x00,
- 0xee, 0x34, 0x4c, 0x55,
- 0xee, 0x04, 0x4c, 0x25,
- 0x95, 0x34, 0xfc, 0x3e,
- 0x6d, 0xa4, 0x4c, 0xc5,
- 0xff, 0xf4, 0x59, 0xce,
- 0x6d, 0x9c, 0x4c, 0x45,
- 0xff, 0xf8, 0x08, 0x8e,
- 0x0c, 0x85, 0x99, 0x4b,
- 0x50, 0x82, 0xcd, 0x9c,
- 0x08, 0x40, 0x51, 0x90,
- 0x50, 0xa1, 0xcc, 0x04,
- 0xfc, 0xf5, 0xc0, 0x00,
- 0x6e, 0x3c, 0x4c, 0x05,
- 0x67, 0x00, 0x00, 0x60,
- 0x4c, 0x05, 0xc0, 0x06,
- 0x00, 0x60, 0x6d, 0x98,
- 0xc0, 0x02, 0x65, 0x00,
- 0x6e, 0x20, 0x4c, 0x35,
- 0xe0, 0x80, 0x06, 0x8a,
- 0x66, 0x01, 0x06, 0x60,
- 0x50, 0xc6, 0x40, 0x04,
- 0x4c, 0x65, 0xe0, 0x00,
- 0x4c, 0x05, 0xed, 0xa0,
- 0x4c, 0x35, 0xee, 0x2c,
- 0x4c, 0x25, 0xee, 0x30,
- 0x88, 0x75, 0xee, 0x14,
- 0xed, 0xf8, 0x0c, 0x35,
- 0xee, 0x28, 0x0c, 0x45,
- 0x86, 0xb5, 0x87, 0x4d,
- 0xed, 0xb4, 0x0c, 0x25,
- 0xe4, 0x08, 0x00, 0x20,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x61, 0x08, 0x18, 0x04,
- 0x58, 0x02, 0xa1, 0x01,
- 0xa9, 0xcd, 0xf1, 0xb0,
- 0xbe, 0xbe, 0x82, 0xd5,
- 0xed, 0xc4, 0x0c, 0xc5,
- 0xed, 0xc8, 0x0c, 0xb5,
- 0x80, 0xf5, 0x96, 0xcd,
- 0xee, 0x7c, 0x0c, 0xc5,
- 0xee, 0x80, 0x0c, 0xb5,
- 0x80, 0xc5, 0x96, 0xcd,
- 0x98, 0xf1, 0x10, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0xc5, 0xdd, 0x93,
- 0xaa, 0xcd, 0xed, 0xcc,
- 0x20, 0x41, 0xfe, 0x15,
- 0xa6, 0x43, 0x98, 0x33,
- 0xfc, 0x75, 0xa9, 0x4d,
- 0xed, 0xd0, 0x0c, 0x35,
- 0xfa, 0xf5, 0xac, 0x3d,
- 0xe4, 0x04, 0x06, 0x20,
- 0xe1, 0xfc, 0x08, 0x34,
- 0x46, 0x02, 0x06, 0x43,
- 0x83, 0x47, 0xf1, 0xb0,
- 0xf8, 0xb5, 0x89, 0x3d,
- 0xed, 0xb8, 0x0c, 0x45,
- 0xee, 0x24, 0x0c, 0xc5,
- 0x98, 0x43, 0x86, 0x43,
- 0xf6, 0xb5, 0x85, 0x4d,
- 0x6d, 0xd8, 0x0c, 0x45,
- 0x51, 0xf6, 0x91, 0x31,
- 0xa2, 0x4d, 0xe0, 0x0c,
- 0x3e, 0xb4, 0x82, 0xf5,
- 0x09, 0x06, 0xa1, 0x4b,
- 0x18, 0x86, 0x00, 0x00,
- 0x86, 0x05, 0x80, 0x00,
- 0x49, 0xf6, 0x23, 0x4b,
- 0x11, 0xc1, 0xe0, 0x0c,
- 0x84, 0x65, 0x89, 0x21,
- 0x3e, 0xb4, 0x83, 0x85,
- 0x49, 0xf6, 0xa5, 0x4b,
- 0x59, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x49, 0xf6,
- 0xe0, 0x0c, 0x59, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x58, 0x4c, 0x45,
- 0xee, 0x5c, 0x4c, 0xc5,
- 0xee, 0x60, 0x4c, 0x25,
- 0xed, 0xe0, 0x0c, 0x45,
- 0x82, 0x35, 0xa2, 0x4d,
- 0x84, 0xc5, 0xa1, 0x4b,
- 0x41, 0xf6, 0x23, 0x4b,
- 0x04, 0x65, 0xe0, 0x0c,
- 0x83, 0x75, 0x89, 0x21,
- 0x41, 0xf6, 0xa5, 0x4b,
- 0x47, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x64, 0x4c, 0x05,
- 0xee, 0x68, 0x4c, 0x35,
- 0xee, 0x6c, 0x4c, 0x25,
- 0x4c, 0x55, 0xc6, 0x0a,
- 0x40, 0x02, 0xee, 0x34,
- 0x4c, 0x05, 0xfa, 0x14,
- 0x8e, 0x0b, 0x6e, 0x34,
- 0xe8, 0x0c, 0x54, 0x48,
- 0x68, 0x0c, 0x46, 0xe8,
- 0x53, 0xb8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x68, 0x04,
- 0x68, 0x08, 0x72, 0x28,
- 0x0c, 0x05, 0x8e, 0x0b,
- 0x0c, 0x15, 0xee, 0x38,
- 0x4c, 0xa5, 0xee, 0x20,
- 0x4c, 0x05, 0xee, 0x18,
- 0xbe, 0x0d, 0x6e, 0x3c,
- 0x6e, 0x1c, 0x4c, 0xa5,
- 0x90, 0x84, 0x40, 0x02,
- 0x0e, 0x3c, 0x4c, 0x05,
- 0x00, 0x00, 0x82, 0x03,
- 0x81, 0x11, 0x6c, 0x04,
- 0xee, 0x40, 0x4c, 0x05,
- 0x6e, 0x44, 0x4c, 0x05,
- 0xbe, 0x1e, 0x81, 0x01,
- 0xbe, 0x04, 0x8f, 0x55,
- 0xe3, 0x1c, 0x01, 0x0a,
- 0xa1, 0xab, 0xd6, 0xd5,
- 0x0c, 0x05, 0x84, 0xd5,
- 0xa7, 0x0b, 0xee, 0x1c,
- 0xa5, 0x0b, 0x82, 0x25,
- 0xa3, 0x0b, 0x82, 0x65,
- 0x4a, 0xf8, 0x82, 0x95,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x6c, 0x18, 0x81, 0x85,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x55, 0x18, 0x81, 0x45,
- 0x8e, 0x0b, 0x68, 0x00,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x80, 0xf5, 0xa3, 0xab,
- 0x8e, 0x0b, 0x7c, 0x14,
- 0xfc, 0x38, 0x42, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x8a, 0x35, 0xa5, 0xab,
- 0x6e, 0x08, 0x0c, 0x15,
- 0x0c, 0x05, 0x87, 0x21,
- 0x84, 0x11, 0xee, 0x40,
- 0x4c, 0x15, 0x83, 0x0d,
- 0x40, 0x10, 0x4e, 0x40,
- 0x0c, 0x15, 0xdc, 0x00,
- 0x01, 0x0a, 0x6e, 0x28,
- 0x01, 0x16, 0xe0, 0x40,
- 0x4c, 0x05, 0x80, 0x00,
- 0x0c, 0x05, 0x8e, 0x40,
- 0x82, 0x0d, 0x6e, 0x20,
- 0x84, 0x04, 0x02, 0x10,
- 0x8e, 0x40, 0x4c, 0x15,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0xee, 0x3c, 0x0c, 0x15,
- 0xec, 0x38, 0x00, 0x00,
- 0x4c, 0x05, 0x80, 0x1d,
- 0x8e, 0x0b, 0x4e, 0x3c,
- 0xfc, 0x38, 0x56, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x88, 0x15, 0xa7, 0xab,
- 0x6e, 0x40, 0x0c, 0x05,
- 0x0c, 0x15, 0x87, 0x21,
- 0x01, 0x0a, 0xee, 0x08,
- 0x01, 0x16, 0xe0, 0x40,
- 0x84, 0x11, 0x00, 0x00,
- 0x0e, 0x40, 0x4c, 0x05,
- 0x0c, 0x05, 0x83, 0x0d,
- 0x4c, 0x15, 0xee, 0x20,
- 0x0c, 0x15, 0xce, 0x40,
- 0x40, 0x0a, 0xee, 0x3c,
- 0x00, 0x00, 0xe6, 0x8a,
- 0x80, 0x1d, 0xec, 0x18,
- 0x4e, 0x3c, 0x4c, 0x05,
- 0x50, 0x38, 0x8e, 0x0b,
- 0x0c, 0xa5, 0xe8, 0x08,
- 0x3e, 0x04, 0xee, 0x18,
- 0x82, 0x01, 0xaf, 0xab,
- 0x00, 0x0c, 0xbe, 0x0e,
- 0xa1, 0x0b, 0xe2, 0x00,
- 0x0c, 0x05, 0xe2, 0x65,
- 0x81, 0x11, 0x6e, 0x04,
- 0x26, 0x06, 0x82, 0x01,
- 0xfa, 0x80, 0x00, 0x04,
- 0x0c, 0x25, 0x83, 0x95,
- 0x00, 0x00, 0x6d, 0x9c,
- 0x0c, 0x45, 0xec, 0x04,
- 0x02, 0x23, 0xee, 0x20,
- 0x04, 0x33, 0x84, 0x11,
- 0x04, 0x53, 0xe0, 0x30,
- 0x58, 0x3a, 0xe0, 0x60,
- 0x46, 0x5a, 0xe1, 0x92,
- 0x44, 0xc3, 0xe1, 0x92,
- 0x46, 0x8a, 0xe0, 0x30,
- 0x46, 0x32, 0xe8, 0x30,
- 0x44, 0x33, 0xd0, 0x90,
- 0xa1, 0x0b, 0xe0, 0x60,
- 0x59, 0x95, 0xf8, 0xf5,
- 0xc1, 0xc3, 0x81, 0x81,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x54, 0x8e, 0x2d, 0x84,
- 0xc0, 0x10, 0x64, 0x11,
- 0x13, 0xae, 0xaf, 0x94,
- 0x63, 0xd1, 0x14, 0x4e,
- 0x91, 0xae, 0xc0, 0x10,
- 0x8d, 0x8e, 0x8f, 0x9e,
- 0xa1, 0xc4, 0xab, 0xa4,
- 0xa9, 0x74, 0xa5, 0x64,
- 0xa3, 0x84, 0xa7, 0x94,
- 0x89, 0x7e, 0x8b, 0xae,
- 0xfc, 0x6e, 0xfe, 0x9e,
- 0xbc, 0xce, 0xbe, 0x8e,
- 0xef, 0xfc, 0x57, 0x68,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xa1, 0x0d, 0xe0, 0x88,
- 0x0c, 0x15, 0x80, 0xb5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xa5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x0c, 0x15, 0x8b, 0xc5,
- 0x0c, 0x25, 0xe1, 0x40,
- 0x0c, 0x75, 0xe0, 0xa8,
- 0x46, 0x22, 0xe0, 0x18,
- 0x87, 0x0b, 0xf0, 0x84,
- 0x0c, 0x35, 0x82, 0x55,
- 0xa1, 0x3b, 0xe0, 0x7c,
- 0x0c, 0x35, 0x80, 0xd5,
- 0x46, 0x0a, 0xe0, 0x74,
- 0x92, 0x95, 0xe0, 0x80,
- 0xe1, 0xd0, 0x0c, 0x19,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x03, 0x21, 0x82, 0x25,
- 0x63, 0x38, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe8, 0x08,
- 0x4c, 0x05, 0xe0, 0xa8,
- 0x0c, 0x15, 0xe0, 0x88,
- 0x87, 0x51, 0x60, 0xc4,
- 0xe0, 0x34, 0x0c, 0x35,
- 0xe0, 0xa0, 0x0c, 0x45,
- 0xe0, 0xbc, 0x4c, 0x15,
- 0x48, 0x4a, 0x82, 0x33,
- 0x4a, 0x32, 0x66, 0x96,
- 0x09, 0x5d, 0xf1, 0x88,
- 0x4c, 0x55, 0x85, 0x51,
- 0x48, 0x42, 0x60, 0x98,
- 0x4c, 0x55, 0x90, 0x88,
- 0x06, 0x40, 0x60, 0x9c,
- 0x48, 0x32, 0x8c, 0x04,
- 0xc4, 0x2b, 0x71, 0x88,
- 0x18, 0x24, 0x44, 0x47,
- 0x0e, 0x55, 0xe0, 0x88,
- 0x98, 0x73, 0x7c, 0x10,
- 0xe0, 0xac, 0x0c, 0x45,
- 0x08, 0x25, 0xc4, 0x57,
- 0x0a, 0x34, 0xfc, 0x14,
- 0x8e, 0x53, 0xe0, 0x88,
- 0x00, 0x00, 0x82, 0x3d,
- 0x4c, 0x05, 0x84, 0x08,
- 0x82, 0xa5, 0x80, 0xc0,
- 0x06, 0x30, 0x57, 0xc4,
- 0xc4, 0xc7, 0xec, 0x04,
- 0xfc, 0x30, 0x08, 0xc5,
- 0xfc, 0x75, 0x84, 0xcd,
- 0x60, 0xbc, 0x4c, 0x35,
- 0xfd, 0xc5, 0x98, 0x2b,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x0c, 0x25, 0xdd, 0x93,
- 0x06, 0x14, 0x60, 0x84,
- 0x0c, 0x45, 0xe0, 0x88,
- 0x86, 0x73, 0x60, 0x78,
- 0x82, 0x3b, 0x01, 0x51,
- 0x4c, 0x25, 0x82, 0x21,
- 0x82, 0x43, 0x60, 0x84,
- 0x0e, 0xc5, 0x83, 0x45,
- 0xdd, 0x84, 0xf8, 0x10,
- 0xe0, 0x20, 0x0c, 0x95,
- 0xc4, 0x87, 0xc4, 0xc7,
- 0xfc, 0x30, 0x12, 0xc5,
- 0xfc, 0x20, 0x12, 0x85,
- 0xf1, 0xb0, 0x58, 0x82,
- 0x4a, 0xc2, 0x0a, 0xcd,
- 0x46, 0x10, 0xfa, 0x14,
- 0x82, 0x11, 0x5c, 0x00,
- 0xfa, 0x85, 0x88, 0x1d,
- 0x0c, 0x55, 0x98, 0x14,
- 0x0c, 0x45, 0xe0, 0x3c,
- 0x02, 0x10, 0xe0, 0x1c,
- 0x03, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0x48, 0x33, 0x86, 0x53,
- 0x48, 0x53, 0xe0, 0x30,
- 0xda, 0x85, 0xe0, 0x60,
- 0x82, 0x01, 0x03, 0x11,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xe0, 0x9c, 0x4c, 0x15,
- 0xe0, 0xbc, 0x4c, 0x05,
- 0xc1, 0xc3, 0xf9, 0x25,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x0c, 0x15, 0x80, 0x6b,
- 0xa1, 0x1d, 0xe0, 0x8c,
- 0x0c, 0x05, 0x82, 0x35,
- 0x80, 0x1d, 0xe0, 0x88,
- 0x0c, 0x05, 0x80, 0xa5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xe5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x0c, 0x55, 0xdd, 0x93,
- 0x0c, 0x25, 0xe1, 0x44,
- 0x0c, 0xc5, 0xe0, 0xa8,
- 0x0c, 0x35, 0xe0, 0x18,
- 0x0c, 0x4b, 0xe0, 0xb4,
- 0x44, 0x52, 0x60, 0x48,
- 0x0c, 0x2b, 0xf1, 0x88,
- 0x85, 0x1b, 0x60, 0x50,
- 0xe0, 0xc8, 0x0c, 0x85,
- 0xe0, 0xcc, 0x0c, 0x75,
- 0x0c, 0x95, 0x82, 0x75,
- 0xa1, 0x9b, 0xe0, 0x80,
- 0x0c, 0x95, 0x80, 0xf5,
- 0x52, 0x0a, 0xe0, 0x74,
- 0x0f, 0xb8, 0xe0, 0x80,
- 0x0c, 0x55, 0xc0, 0x00,
- 0x54, 0x86, 0x60, 0x70,
- 0x52, 0x02, 0xe0, 0x3c,
- 0xaa, 0xa3, 0xf1, 0x84,
- 0x96, 0x45, 0x94, 0x9d,
- 0x60, 0x94, 0x0c, 0x55,
- 0x95, 0x5b, 0xfd, 0xa1,
- 0x0c, 0x55, 0x94, 0xa5,
- 0x14, 0x50, 0xe0, 0x34,
- 0x16, 0xa4, 0xe4, 0x04,
- 0x96, 0xa3, 0xe1, 0xfc,
- 0x8a, 0xa3, 0x83, 0xa7,
- 0x92, 0x45, 0x95, 0x9d,
- 0x70, 0x84, 0x52, 0x02,
- 0x02, 0x91, 0xc6, 0x37,
- 0x14, 0x94, 0xa0, 0x31,
- 0xcb, 0x37, 0x61, 0xfc,
- 0xf9, 0xa1, 0x14, 0x93,
- 0x0c, 0xa5, 0xc2, 0x97,
- 0x94, 0x9f, 0x60, 0x10,
- 0x18, 0x95, 0x92, 0xc3,
- 0xb2, 0xc4, 0xf8, 0x0c,
- 0x14, 0xa5, 0xc4, 0x97,
- 0xc4, 0xc7, 0x7c, 0x24,
- 0x64, 0x10, 0x16, 0xa0,
- 0xc7, 0xb7, 0x86, 0xa3,
- 0x66, 0x92, 0x48, 0xba,
- 0x7f, 0xfc, 0x57, 0x8e,
- 0x08, 0x40, 0xc3, 0xff,
- 0xc9, 0x47, 0xe5, 0x00,
- 0x60, 0x20, 0x0c, 0xb5,
- 0x88, 0xa3, 0x96, 0x4f,
- 0xf0, 0x0a, 0x48, 0xaa,
- 0xfc, 0x24, 0x16, 0x95,
- 0xfc, 0x30, 0x16, 0xc5,
- 0xe6, 0x8a, 0x44, 0x4a,
- 0x04, 0x20, 0xa6, 0x93,
- 0x98, 0x93, 0x66, 0x00,
- 0x84, 0x9d, 0xd1, 0x27,
- 0x0c, 0x25, 0x84, 0xa5,
- 0x98, 0x34, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x45,
- 0x4c, 0x25, 0x82, 0x21,
- 0x06, 0x30, 0x60, 0x84,
- 0x07, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0xf1, 0x94, 0x46, 0x02,
- 0xe0, 0x30, 0x48, 0x33,
- 0xe0, 0x60, 0x48, 0x03,
- 0x0c, 0x05, 0xde, 0x65,
- 0xff, 0x91, 0x61, 0x34,
- 0x60, 0x94, 0x4c, 0x95,
- 0x73, 0x58, 0x8c, 0x2b,
- 0x0c, 0x35, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x8c,
- 0x48, 0x32, 0xe0, 0x88,
- 0x86, 0x1b, 0x71, 0x80,
- 0x61, 0x3c, 0x4c, 0x45,
- 0x42, 0x40, 0x85, 0x4d,
- 0xab, 0x0d, 0x1c, 0x00,
- 0xe1, 0x3c, 0x4c, 0x15,
- 0x0c, 0x09, 0x82, 0xd5,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x00, 0x26, 0xe0, 0x90,
- 0x4c, 0x05, 0xc0, 0x00,
- 0x4c, 0x05, 0xc0, 0x98,
- 0x00, 0x30, 0x40, 0x9c,
- 0x94, 0x35, 0xcc, 0x10,
- 0x60, 0x34, 0x0c, 0x05,
- 0xf1, 0x88, 0x48, 0x32,
- 0x86, 0xe5, 0x88, 0x0d,
- 0xe4, 0x04, 0x02, 0x00,
- 0x06, 0x14, 0xa8, 0x13,
- 0x0c, 0x35, 0xe1, 0xfc,
- 0x86, 0x13, 0x60, 0x84,
- 0x0c, 0x15, 0x83, 0x17,
- 0xa2, 0x23, 0x60, 0x1c,
- 0x84, 0x03, 0x02, 0x31,
- 0x60, 0x84, 0x4c, 0x35,
- 0x4c, 0x25, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x88,
- 0x60, 0x30, 0x42, 0x23,
- 0x4c, 0x05, 0x8f, 0x21,
- 0x42, 0x03, 0xe0, 0x8c,
- 0x4c, 0x25, 0xe0, 0x60,
- 0xe7, 0x55, 0xe0, 0x98,
- 0x60, 0x38, 0x0c, 0x05,
- 0xf1, 0x88, 0x4a, 0x12,
- 0xe0, 0xa4, 0x0c, 0x45,
- 0x89, 0x5d, 0x80, 0x43,
- 0x30, 0x23, 0x8a, 0x45,
- 0xf0, 0x9c, 0x40, 0x32,
- 0x60, 0x88, 0x4c, 0x25,
- 0x4c, 0x05, 0x8c, 0x1b,
- 0x68, 0xb8, 0xe0, 0x8c,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x1c,
- 0x4c, 0x05, 0xe0, 0x88,
- 0x82, 0x11, 0x60, 0x8c,
- 0x60, 0x84, 0x4c, 0x15,
- 0x02, 0x23, 0xc2, 0x17,
- 0x44, 0x03, 0x8f, 0x11,
- 0x8c, 0x0b, 0x60, 0x60,
- 0xe0, 0x30, 0x44, 0x33,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x08, 0x10, 0xa8,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x15, 0xfd, 0x11,
- 0xe1, 0x35, 0xe0, 0x94,
- 0x60, 0xa0, 0x0c, 0x05,
- 0x0c, 0x35, 0x87, 0x21,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x40, 0x0a, 0xe0, 0x48,
- 0x4c, 0x25, 0xe6, 0x8a,
- 0x46, 0x12, 0x60, 0x98,
- 0x00, 0x00, 0xf1, 0x8c,
- 0xa8, 0x13, 0x6c, 0x18,
- 0x60, 0xbc, 0x4c, 0x35,
- 0x4c, 0x25, 0x80, 0x3d,
- 0x4c, 0x95, 0xe0, 0x9c,
- 0x4c, 0x15, 0xe0, 0x94,
- 0x4c, 0x05, 0xe0, 0xc0,
- 0xdd, 0x75, 0xc0, 0xbc,
- 0x60, 0x78, 0x0c, 0x05,
- 0x44, 0x52, 0x81, 0x31,
- 0x00, 0x54, 0x71, 0x80,
- 0x00, 0xc3, 0xe0, 0x88,
- 0x83, 0x55, 0x8a, 0x0b,
- 0x18, 0x75, 0xf3, 0x44,
- 0x0c, 0x85, 0xf8, 0x0c,
- 0xc4, 0x47, 0xe0, 0x20,
- 0x10, 0x45, 0xc4, 0x77,
- 0x10, 0x75, 0xfc, 0x10,
- 0x48, 0x72, 0xfc, 0x1c,
- 0x06, 0x4d, 0xf1, 0x90,
- 0xfa, 0x0c, 0x46, 0x42,
- 0x5c, 0x00, 0x40, 0x50,
- 0xec, 0x04, 0x0a, 0x50,
- 0xfa, 0x65, 0x85, 0x5d,
- 0xe0, 0x84, 0x0c, 0x25,
- 0x0c, 0x45, 0x98, 0x34,
- 0x0c, 0x55, 0xe0, 0x3c,
- 0x82, 0x21, 0x60, 0x1c,
- 0x60, 0x84, 0x4c, 0x25,
- 0xec, 0x04, 0x06, 0x30,
- 0xc2, 0x27, 0x07, 0x2d,
- 0x46, 0x02, 0x04, 0x53,
- 0x4a, 0x33, 0xf1, 0x90,
- 0x4a, 0x03, 0xe0, 0x30,
- 0x2a, 0xe8, 0xe0, 0x60,
- 0x85, 0x01, 0x9f, 0xfc,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x60, 0x9c, 0x4c, 0x05,
- 0xec, 0x04, 0x00, 0x10,
- 0xc1, 0xc3, 0xf5, 0x05,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x87, 0x81, 0x00, 0x6b,
- 0xe0, 0x90, 0x0c, 0x05,
- 0xe0, 0x18, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x60, 0x98, 0x4c, 0x85,
- 0xac, 0xd5, 0xa1, 0x0d,
- 0xe0, 0x8c, 0x0c, 0x25,
- 0xac, 0x45, 0x85, 0x0d,
- 0x60, 0x20, 0x0c, 0x55,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x25,
- 0xf0, 0x88, 0x46, 0x12,
- 0xf8, 0x10, 0x06, 0x45,
- 0xf8, 0x08, 0x06, 0xc5,
- 0x78, 0x18, 0x06, 0x35,
- 0x0a, 0x25, 0xc4, 0x27,
- 0xc4, 0x47, 0x7c, 0x08,
- 0x7c, 0x10, 0x0a, 0x45,
- 0x0a, 0xc5, 0xc4, 0xc7,
- 0xc4, 0x37, 0x7c, 0x30,
- 0xfc, 0x0c, 0x0a, 0x35,
- 0xa6, 0xc3, 0xa8, 0x23,
- 0x90, 0x65, 0x84, 0xcd,
- 0xe0, 0x34, 0x0c, 0x25,
- 0x06, 0x24, 0x84, 0x21,
- 0xfd, 0x37, 0xe1, 0x7c,
- 0x85, 0x27, 0x86, 0x23,
- 0x4c, 0x05, 0xa4, 0x03,
- 0x04, 0x04, 0x60, 0x90,
- 0x02, 0x45, 0xe0, 0x88,
- 0x46, 0x12, 0x7c, 0x08,
- 0x8e, 0x34, 0xf0, 0x88,
- 0xc4, 0x47, 0x9a, 0x24,
- 0x04, 0x35, 0xc4, 0x37,
- 0x04, 0x45, 0xfc, 0x0c,
- 0x48, 0x32, 0xfc, 0x10,
- 0x89, 0x31, 0x71, 0x90,
- 0x0a, 0x00, 0x85, 0x45,
- 0x18, 0x04, 0x6c, 0x04,
- 0x02, 0xc5, 0xe0, 0x88,
- 0x12, 0x54, 0x7c, 0x30,
- 0x02, 0x95, 0xe0, 0x88,
- 0xc4, 0xc7, 0xfc, 0x24,
- 0x7c, 0x30, 0x04, 0xc5,
- 0x04, 0x95, 0xc4, 0x97,
- 0xb2, 0xc3, 0xfc, 0x24,
- 0x82, 0xf5, 0xa3, 0xcd,
- 0xe4, 0x08, 0x12, 0x40,
- 0xe1, 0x7c, 0x14, 0x94,
- 0x94, 0x93, 0xfd, 0xa7,
- 0x93, 0xcd, 0x85, 0x97,
- 0x00, 0x90, 0x4c, 0x55,
- 0x9c, 0x00, 0x40, 0x50,
- 0x9c, 0x00, 0x48, 0xc0,
- 0xec, 0x04, 0x06, 0x30,
- 0xf6, 0x95, 0xa1, 0x3b,
- 0x8c, 0x1b, 0x03, 0x21,
- 0xe8, 0x04, 0x7d, 0x28,
- 0x61, 0x3c, 0x0c, 0x45,
- 0x0c, 0x35, 0xff, 0xc1,
- 0x12, 0x60, 0x60, 0x34,
- 0x0c, 0x15, 0xe6, 0x20,
- 0x0c, 0x25, 0xe0, 0x94,
- 0x4a, 0x42, 0xe0, 0x88,
- 0x40, 0x52, 0xf1, 0x8c,
- 0x99, 0x1b, 0x7b, 0x00,
- 0xfa, 0x00, 0x44, 0x22,
- 0xe0, 0x90, 0x4c, 0x25,
- 0x0c, 0x15, 0xb0, 0x45,
- 0x98, 0x1d, 0xe0, 0x84,
- 0x0c, 0x05, 0xae, 0x05,
- 0x14, 0x14, 0x60, 0x1c,
- 0x0c, 0xc5, 0xe0, 0x84,
- 0x80, 0xa3, 0xe0, 0xa4,
- 0xe0, 0x30, 0x14, 0x53,
- 0xf1, 0xb0, 0x56, 0x52,
- 0x0f, 0x38, 0x97, 0x2d,
- 0x02, 0x11, 0x80, 0x00,
- 0x4c, 0x15, 0x84, 0x33,
- 0x08, 0x14, 0x60, 0x84,
- 0x08, 0x03, 0xe0, 0x84,
- 0x0c, 0xa5, 0x91, 0x11,
- 0x4c, 0x15, 0xe0, 0x50,
- 0x8c, 0x1b, 0x60, 0x50,
- 0xe0, 0x30, 0x40, 0x23,
- 0x60, 0x60, 0x40, 0x33,
- 0xfb, 0x00, 0x00, 0x34,
- 0xe8, 0x08, 0x55, 0xe8,
- 0x0c, 0x15, 0x98, 0x24,
- 0x0c, 0x35, 0xe0, 0x84,
- 0x4c, 0xa5, 0xe0, 0x1c,
- 0x04, 0x20, 0x60, 0x50,
- 0x05, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x04, 0x14,
- 0x46, 0x03, 0x84, 0x33,
- 0xa0, 0xa5, 0xe0, 0x60,
- 0x0c, 0x25, 0xa5, 0x35,
- 0xff, 0x11, 0x60, 0x94,
- 0x86, 0xb5, 0x83, 0x2b,
- 0x61, 0x3c, 0x0c, 0x25,
- 0x0c, 0x05, 0x82, 0x71,
- 0x0a, 0x74, 0x60, 0x34,
- 0x98, 0x44, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0x60, 0x8c, 0x0c, 0x05,
- 0x4c, 0x25, 0xa0, 0x23,
- 0x08, 0x40, 0x60, 0x90,
- 0x0a, 0x33, 0xec, 0x04,
- 0x4c, 0x25, 0x89, 0x7d,
- 0x4c, 0x75, 0xe0, 0x94,
- 0x46, 0x23, 0xe0, 0x84,
- 0x46, 0x03, 0xe0, 0x30,
- 0x98, 0x65, 0xe0, 0x60,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x4c, 0x25,
- 0xf1, 0x80, 0x48, 0x22,
- 0x8e, 0x25, 0x86, 0x4d,
- 0x60, 0x34, 0x0c, 0x35,
- 0xec, 0x04, 0x04, 0x20,
- 0x60, 0xbc, 0x4c, 0x25,
- 0x4c, 0x45, 0x85, 0x41,
- 0x4c, 0x45, 0xe0, 0x98,
- 0x80, 0x33, 0x60, 0x9c,
- 0x60, 0x94, 0x4c, 0x15,
- 0xec, 0x0c, 0x06, 0x30,
- 0x60, 0xc0, 0x4c, 0x35,
- 0x92, 0x15, 0x86, 0x2d,
- 0x60, 0x3c, 0x0c, 0x15,
- 0x0c, 0x25, 0x82, 0x71,
- 0x06, 0x74, 0x60, 0x1c,
- 0x4c, 0x75, 0xe0, 0x84,
- 0x80, 0x13, 0xe0, 0x84,
- 0x60, 0x8c, 0x4c, 0x15,
- 0x44, 0x03, 0x86, 0x23,
- 0x44, 0x13, 0xe0, 0x30,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x8a, 0xe5, 0xe0, 0x84,
- 0x7b, 0x00, 0x00, 0x14,
- 0x4f, 0x38, 0x8c, 0x1b,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0xc2, 0x17, 0xe0, 0x1c,
- 0x44, 0x03, 0x82, 0x23,
- 0x85, 0x15, 0xe0, 0x60,
- 0x86, 0xf5, 0xa1, 0x7d,
- 0x60, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x04, 0x74,
- 0xe0, 0x40, 0x0c, 0x35,
- 0x04, 0x23, 0x82, 0x23,
- 0x46, 0x3a, 0xe0, 0x30,
- 0xa0, 0x23, 0xe0, 0xa2,
- 0x82, 0xa5, 0x86, 0x2d,
- 0x02, 0x09, 0x8e, 0x13,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x42, 0x01,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x8e, 0x13, 0xc2, 0x77,
- 0xe0, 0x30, 0x42, 0x03,
- 0x4c, 0x05, 0x8f, 0x01,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0xe0, 0xa4, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xf1, 0x80, 0x40, 0x52,
- 0x81, 0x2d, 0x02, 0x11,
- 0xe0, 0x84, 0x4c, 0x15,
- 0x98, 0x44, 0x94, 0x25,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0xe0, 0x8c, 0x0c, 0x05,
- 0xec, 0x04, 0x18, 0x40,
- 0x18, 0x14, 0x19, 0x1d,
- 0x86, 0xc3, 0xe0, 0x84,
- 0xe0, 0x30, 0x58, 0x53,
- 0xe0, 0x60, 0x58, 0x03,
- 0x0c, 0x09, 0xf8, 0x05,
- 0x0c, 0x55, 0xe1, 0xd0,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x02, 0xa5, 0xe0, 0x84,
- 0xf0, 0x88, 0x40, 0x52,
- 0x68, 0x08, 0x49, 0xe8,
- 0x0c, 0x15, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x90,
- 0x98, 0x44, 0xe0, 0x1c,
- 0x08, 0x40, 0x02, 0x11,
- 0x0a, 0x14, 0xec, 0x04,
- 0x89, 0x1d, 0x60, 0x84,
- 0x60, 0x84, 0x4c, 0x15,
- 0x46, 0x03, 0x8a, 0x33,
- 0x87, 0x01, 0x60, 0x60,
- 0x60, 0x30, 0x46, 0x23,
- 0x80, 0x00, 0x00, 0x76,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x8b, 0xa5, 0xee, 0xa5,
- 0x60, 0x60, 0x14, 0xa3,
- 0x48, 0xa2, 0x86, 0xc3,
- 0xa4, 0x43, 0xfb, 0x10,
- 0x8e, 0x05, 0x98, 0x4d,
- 0x82, 0x11, 0x18, 0x44,
- 0x60, 0x84, 0x4c, 0x15,
- 0x08, 0x40, 0x84, 0x33,
- 0x09, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x08, 0x14,
- 0x40, 0x23, 0x88, 0x03,
- 0x40, 0x33, 0xe0, 0x30,
- 0xe8, 0x25, 0xe0, 0x60,
- 0x0c, 0x35, 0x87, 0xf5,
- 0x08, 0x14, 0x60, 0x1c,
- 0x0c, 0x05, 0xe0, 0x84,
- 0x88, 0x33, 0xe0, 0x8c,
- 0xe0, 0x30, 0x46, 0x23,
- 0xe0, 0x60, 0x46, 0x03,
- 0xe1, 0xd0, 0x0c, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x00, 0x04, 0x82, 0xe5,
- 0x8c, 0x1b, 0x7b, 0x00,
- 0xe8, 0x08, 0x45, 0x48,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0x44, 0x03, 0x86, 0x23,
- 0x98, 0x04, 0xe0, 0x60,
- 0xe0, 0x98, 0x4c, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0xde, 0x65, 0x81, 0x1d,
- 0x0c, 0x35, 0x83, 0xb5,
- 0xa4, 0x53, 0x60, 0x40,
- 0xe0, 0xa2, 0x46, 0x3a,
- 0x82, 0xa5, 0x86, 0x5d,
- 0x00, 0x19, 0x82, 0x03,
- 0x82, 0x11, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x40, 0x11,
- 0xe0, 0x90, 0x0c, 0x25,
- 0xe0, 0x1c, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x84, 0x06, 0x14,
- 0x40, 0x23, 0x86, 0x03,
- 0x4c, 0x85, 0xe0, 0x30,
- 0xa4, 0x04, 0xe0, 0x98,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x0c, 0x25,
- 0x86, 0x2d, 0x80, 0x33,
- 0x0c, 0x35, 0x86, 0xc5,
- 0x80, 0x33, 0xe0, 0x34,
- 0x90, 0xa5, 0x87, 0x2d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe4, 0x04, 0x08, 0x10,
- 0x60, 0x3c, 0x0c, 0x35,
- 0xe0, 0x84, 0x02, 0x44,
- 0xe0, 0x84, 0x4c, 0x45,
- 0x44, 0x03, 0x82, 0x23,
- 0x42, 0x32, 0x60, 0x30,
- 0x44, 0x13, 0xf0, 0x80,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x30, 0xf8, 0xe0, 0x84,
- 0xe7, 0xb5, 0xdf, 0xfc,
- 0x86, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0xe0, 0x40, 0x0c, 0x45,
- 0x06, 0x33, 0x84, 0x33,
- 0x48, 0x4a, 0xe0, 0x30,
- 0xa0, 0x33, 0xe0, 0xa2,
- 0x82, 0x85, 0x88, 0x3d,
- 0x04, 0x09, 0x82, 0x23,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x44, 0x01,
- 0x0c, 0x25, 0xa4, 0x04,
- 0x0c, 0x15, 0xe0, 0x1c,
- 0x06, 0x14, 0xe0, 0x84,
- 0x86, 0x23, 0xe0, 0x84,
- 0xe0, 0x30, 0x44, 0x03,
- 0x8f, 0x01, 0x02, 0x71,
- 0x60, 0x98, 0x4c, 0x05,
- 0x31, 0x88, 0x8f, 0x1b,
- 0x8c, 0x0b, 0xdf, 0xfc,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x04, 0x27, 0x08,
- 0xe0, 0xfc, 0x0c, 0x05,
- 0xe1, 0x00, 0x0c, 0x15,
- 0xe0, 0x94, 0x4c, 0x25,
- 0x60, 0x98, 0x4c, 0x85,
- 0xf1, 0x80, 0x40, 0x22,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x25, 0xa2, 0x23,
- 0xe1, 0x25, 0xe0, 0xc0,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0x24,
- 0x60, 0x20, 0x00, 0x15,
- 0x00, 0x45, 0x81, 0x71,
- 0x88, 0x34, 0xe0, 0xa0,
- 0xc8, 0xc4, 0x8a, 0x54,
- 0x00, 0x35, 0xca, 0x24,
- 0x86, 0x53, 0x60, 0x18,
- 0x58, 0x52, 0x98, 0x53,
- 0x82, 0x5b, 0x70, 0x88,
- 0x04, 0x40, 0x55, 0xce,
- 0x81, 0xd5, 0xec, 0x10,
- 0x82, 0x71, 0x02, 0x84,
- 0x7c, 0x18, 0x10, 0x85,
- 0xf0, 0x98, 0x52, 0x82,
- 0x60, 0x10, 0x12, 0x95,
- 0xb0, 0xc3, 0x88, 0x61,
- 0xd5, 0xce, 0x92, 0xc3,
- 0xfc, 0x75, 0x85, 0x7d,
- 0x60, 0x88, 0x18, 0x44,
- 0xec, 0x04, 0x08, 0x40,
- 0x70, 0xb0, 0x4a, 0x12,
- 0x0a, 0x50, 0x98, 0x33,
- 0x18, 0xc0, 0x6c, 0x30,
- 0x81, 0xf5, 0xec, 0x40,
- 0x82, 0x21, 0x4d, 0x74,
- 0x02, 0x85, 0x82, 0x64,
- 0xc4, 0x77, 0xfc, 0x30,
- 0x7c, 0x30, 0x0c, 0x95,
- 0x0c, 0x65, 0x88, 0xc1,
- 0xb2, 0x83, 0xfc, 0x1c,
- 0xd5, 0x8e, 0x8c, 0x83,
- 0xfc, 0x35, 0x89, 0x2d,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x75,
- 0x00, 0x35, 0xff, 0x61,
- 0x81, 0x11, 0x60, 0xc0,
- 0x60, 0x18, 0x00, 0x25,
- 0x40, 0x15, 0x81, 0x81,
- 0x40, 0x65, 0xe0, 0x7c,
- 0x00, 0x15, 0xe0, 0x88,
- 0x00, 0xc5, 0xe0, 0xb4,
- 0x40, 0x65, 0xe0, 0xa8,
- 0x25, 0x3e, 0xe1, 0x40,
- 0xe0, 0x88, 0x06, 0x74,
- 0x60, 0xd8, 0x00, 0x35,
- 0x00, 0x45, 0x86, 0x23,
- 0x16, 0x20, 0x60, 0x6c,
- 0x4a, 0xca, 0xec, 0x40,
- 0x81, 0x21, 0x66, 0x86,
- 0x46, 0x86, 0x21, 0x3e,
- 0x28, 0x33, 0xe0, 0x3c,
- 0x1b, 0x3e, 0xa0, 0x51,
- 0xe4, 0x40, 0x06, 0x10,
- 0x08, 0x10, 0x0b, 0x37,
- 0x7c, 0x3e, 0xe4, 0x10,
- 0xe4, 0x08, 0x06, 0x10,
- 0xcb, 0x57, 0x02, 0x11,
- 0x85, 0x37, 0x07, 0x47,
- 0x83, 0x17, 0x19, 0x5e,
- 0x81, 0x51, 0x3e, 0x4e,
- 0x81, 0x41, 0x09, 0x3e,
- 0x00, 0x15, 0x95, 0x1e,
- 0x93, 0x1e, 0xe0, 0xdc,
- 0xe0, 0xe0, 0x00, 0x15,
- 0x00, 0x15, 0xfe, 0x1e,
- 0x8d, 0x1e, 0xe0, 0x28,
- 0xe0, 0x2c, 0x00, 0x15,
- 0x00, 0x15, 0x91, 0x1e,
- 0x8f, 0xce, 0xe0, 0x24,
- 0x1d, 0x1e, 0xa3, 0x7e,
- 0xe0, 0x84, 0x02, 0xc4,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x8e, 0xc3, 0x2b, 0x1e,
- 0x81, 0x11, 0x3c, 0xce,
- 0x1a, 0x38, 0x97, 0x1e,
- 0x0a, 0xa0, 0xe0, 0x00,
- 0x0b, 0x0a, 0xe4, 0x04,
- 0x1a, 0x48, 0xe7, 0x20,
- 0x16, 0x15, 0xc0, 0x00,
- 0xa2, 0x4d, 0x60, 0x10,
- 0x5e, 0x45, 0xad, 0x6e,
- 0x5e, 0x25, 0xc0, 0x5c,
- 0x98, 0xf5, 0xc0, 0x4c,
- 0xc4, 0x17, 0x27, 0xbe,
- 0x60, 0xac, 0x00, 0x35,
- 0x19, 0x74, 0x8c, 0xbb,
- 0x06, 0xc5, 0x8e, 0x6b,
- 0xab, 0x34, 0xfc, 0x04,
- 0x04, 0xcd, 0xae, 0xc3,
- 0x2b, 0x3e, 0x88, 0x33,
- 0x9c, 0x00, 0x58, 0x20,
- 0x4e, 0x60, 0x0e, 0x05,
- 0x29, 0x8e, 0x9c, 0x00,
- 0xaf, 0x4e, 0x98, 0x8b,
- 0xe0, 0xb0, 0x00, 0x35,
- 0x8b, 0xc4, 0x8f, 0x44,
- 0xfc, 0x04, 0x06, 0x15,
- 0x60, 0x84, 0x06, 0x14,
- 0x88, 0x33, 0x8e, 0x13,
- 0xe0, 0x32, 0x46, 0x3a,
- 0x46, 0x3a, 0x9d, 0xc4,
- 0x90, 0xcb, 0x66, 0xb2,
- 0xe5, 0x00, 0x06, 0x30,
- 0x46, 0x3a, 0xcf, 0x37,
- 0x0d, 0x34, 0xe6, 0x92,
- 0x42, 0x1a, 0x86, 0x13,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8e,
- 0xd1, 0x17, 0xe6, 0x00,
- 0x1e, 0x45, 0x82, 0xcd,
- 0x58, 0x20, 0x00, 0x5c,
- 0x1e, 0x85, 0x9c, 0x00,
- 0x1e, 0x75, 0x80, 0x50,
- 0x82, 0x65, 0x80, 0x44,
- 0x96, 0x6b, 0x2f, 0x44,
- 0xe0, 0x88, 0x40, 0x95,
- 0xa1, 0x4b, 0xa9, 0x84,
- 0x81, 0x11, 0x80, 0xc5,
- 0x81, 0xe5, 0xab, 0x1e,
- 0x96, 0x6b, 0x01, 0xe5,
- 0x83, 0x41, 0x3c, 0x14,
- 0xe1, 0x40, 0x40, 0x95,
- 0x94, 0x13, 0xa5, 0x24,
- 0x7b, 0x08, 0x44, 0x12,
- 0xa5, 0x2e, 0x81, 0x11,
- 0xa3, 0x74, 0xab, 0x1e,
- 0xab, 0x24, 0x9b, 0x14,
- 0x82, 0x2d, 0xa7, 0xb4,
- 0xc0, 0x00, 0x13, 0xf8,
- 0x12, 0x78, 0xa3, 0x4d,
- 0x4c, 0x80, 0x40, 0x00,
- 0x27, 0xce, 0xdc, 0x00,
- 0x16, 0x15, 0x83, 0x21,
- 0xaf, 0x2e, 0xe0, 0x10,
- 0x60, 0x20, 0x16, 0x25,
- 0xe0, 0x88, 0x08, 0x14,
- 0xe0, 0x20, 0x00, 0x35,
- 0xe0, 0x10, 0x00, 0x15,
- 0xc4, 0x27, 0x21, 0xc4,
- 0xfc, 0x10, 0x06, 0x65,
- 0xfc, 0x08, 0x06, 0x25,
- 0x7c, 0x10, 0x02, 0x45,
- 0x10, 0x05, 0x99, 0xad,
- 0x93, 0xc4, 0x8c, 0x23,
- 0x9e, 0x65, 0x99, 0xad,
- 0x83, 0xad, 0xfe, 0x14,
- 0xee, 0x34, 0xaa, 0x85,
- 0xfc, 0xc4, 0x82, 0x14,
- 0x02, 0x15, 0xc4, 0x37,
- 0x42, 0xc2, 0xfc, 0x0c,
- 0x18, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x8c,
- 0xc2, 0x67, 0xf1, 0xb0,
- 0x1e, 0x95, 0x90, 0x6d,
- 0x4c, 0x80, 0x00, 0x58,
- 0x0f, 0xb8, 0x9c, 0x00,
- 0x29, 0x8e, 0x80, 0x00,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x40, 0xc4,
- 0xb3, 0x11, 0x1f, 0x1e,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x18, 0x25, 0x9d, 0x14,
- 0x10, 0x20, 0x7c, 0x0c,
- 0x1f, 0x34, 0xe4, 0x08,
- 0x4e, 0x7a, 0xc5, 0x87,
- 0x82, 0xcb, 0x66, 0x86,
- 0xad, 0x11, 0x08, 0x83,
- 0x48, 0x3a, 0x10, 0x71,
- 0x49, 0x77, 0xe6, 0x86,
- 0xe0, 0x98, 0x02, 0x24,
- 0x06, 0x06, 0x0e, 0x83,
- 0x02, 0x83, 0xe0, 0x04,
- 0x10, 0x43, 0x83, 0x11,
- 0x13, 0xe5, 0x8f, 0x81,
- 0x1f, 0x5e, 0x83, 0x71,
- 0x16, 0x15, 0x80, 0x5b,
- 0x16, 0x65, 0xf8, 0x30,
- 0x16, 0x75, 0xf8, 0x20,
- 0x29, 0x8e, 0xf8, 0x10,
- 0x2c, 0x84, 0xc4, 0x17,
- 0x06, 0xc5, 0xc4, 0x67,
- 0xc4, 0x77, 0x7c, 0x04,
- 0xfc, 0x18, 0x06, 0x65,
- 0x7c, 0x1c, 0x06, 0x75,
- 0x06, 0x35, 0xc4, 0x87,
- 0x29, 0x04, 0xfc, 0x20,
- 0x8e, 0x63, 0x98, 0x63,
- 0x86, 0x63, 0x15, 0x34,
- 0x7a, 0x18, 0x46, 0x32,
- 0xe0, 0x84, 0x0c, 0x24,
- 0x80, 0x6d, 0xa6, 0x63,
- 0x1d, 0x84, 0x92, 0x45,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x0a, 0x0b,
- 0x84, 0x43, 0x42, 0xc4,
- 0x66, 0xa2, 0x4e, 0x7a,
- 0x9f, 0x54, 0xc4, 0x47,
- 0x7c, 0x04, 0x18, 0x15,
- 0x45, 0x77, 0x84, 0x71,
- 0x08, 0x73, 0x90, 0xcb,
- 0x02, 0x73, 0x91, 0x81,
- 0x48, 0x72, 0x90, 0x11,
- 0x04, 0x14, 0x70, 0x8c,
- 0x06, 0x06, 0xe1, 0x90,
- 0x89, 0x11, 0x60, 0x08,
- 0x87, 0x71, 0x0b, 0xf5,
- 0xf8, 0x10, 0x16, 0x75,
- 0xc4, 0x77, 0xac, 0xc4,
- 0x7c, 0x1c, 0x06, 0x65,
- 0x06, 0x35, 0xc4, 0xc7,
- 0x89, 0xc4, 0xfc, 0x30,
- 0x46, 0xc2, 0x8c, 0x33,
- 0x4c, 0x22, 0xfa, 0x0c,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x9e, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x02, 0x15, 0xe4, 0x10,
- 0xc7, 0xc7, 0x7c, 0x1c,
- 0x84, 0x43, 0x1d, 0x74,
- 0x02, 0x43, 0x91, 0x81,
- 0x44, 0xca, 0x88, 0x11,
- 0x86, 0x43, 0x66, 0x9e,
- 0x8e, 0xcb, 0x44, 0x47,
- 0x06, 0x06, 0x04, 0x21,
- 0x45, 0x27, 0xe0, 0x08,
- 0x04, 0x43, 0x85, 0x71,
- 0xe1, 0x8c, 0x04, 0x14,
- 0x85, 0x11, 0x07, 0x35,
- 0x8a, 0x0b, 0x00, 0x6b,
- 0xa3, 0x74, 0xad, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x8d, 0x55, 0x9f, 0x54,
- 0xc4, 0x77, 0xac, 0x74,
- 0xfc, 0x1c, 0x06, 0x15,
- 0x42, 0x32, 0xbe, 0x34,
- 0x06, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x84,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x92, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x00, 0x35, 0xe4, 0x10,
- 0xc7, 0xc7, 0x60, 0x14,
- 0x84, 0x43, 0x1d, 0x84,
- 0x7c, 0x1c, 0x06, 0x35,
- 0x58, 0xca, 0x87, 0x71,
- 0x10, 0xc1, 0xe6, 0xa2,
- 0x49, 0xc7, 0x86, 0x13,
- 0x18, 0x43, 0x84, 0x31,
- 0x10, 0xcb, 0xc4, 0x17,
- 0x04, 0x34, 0x82, 0x43,
- 0x8f, 0x81, 0x61, 0x88,
- 0x60, 0x04, 0x06, 0x06,
- 0x44, 0x2a, 0x89, 0x11,
- 0x82, 0x23, 0xe6, 0xb2,
- 0x11, 0x24, 0xef, 0x2f,
- 0x42, 0x4a, 0x84, 0x43,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x86, 0x13, 0xe6, 0x8a,
- 0x82, 0x6d, 0xf1, 0x1f,
- 0x80, 0x50, 0x1e, 0x65,
- 0x80, 0x58, 0x1e, 0x95,
- 0x80, 0x44, 0x1e, 0x75,
- 0xaf, 0x44, 0x88, 0xc5,
- 0xe0, 0x88, 0x40, 0x95,
- 0x23, 0x74, 0x97, 0x14,
- 0xa7, 0xc4, 0xa3, 0x4b,
- 0x97, 0x1e, 0x82, 0x11,
- 0x00, 0x15, 0x84, 0x95,
- 0x8e, 0xa3, 0x60, 0xf0,
- 0x60, 0xa0, 0x00, 0x25,
- 0x85, 0x41, 0x87, 0x31,
- 0x44, 0x2a, 0x94, 0x13,
- 0x06, 0x10, 0x66, 0x8e,
- 0x85, 0x3d, 0xe4, 0x10,
- 0x40, 0x48, 0x5e, 0x15,
- 0x40, 0x15, 0x83, 0x11,
- 0x81, 0xb5, 0xe0, 0x7c,
- 0x81, 0x95, 0xad, 0x94,
- 0x90, 0x6b, 0x2d, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x81, 0x35, 0xa3, 0x74,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x88, 0xb1, 0x0c, 0x8b,
- 0x92, 0x6b, 0x18, 0x2b,
- 0x8a, 0xab, 0x25, 0x14,
- 0xf0, 0xa8, 0x52, 0x72,
- 0x25, 0xa8, 0x82, 0x9d,
- 0xa1, 0x6d, 0x9f, 0xfc,
- 0x97, 0x24, 0x82, 0x15,
- 0xe0, 0xf0, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x88, 0x40, 0x65,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0xff, 0x31, 0x01, 0x21,
- 0x60, 0x80, 0x40, 0x25,
- 0xe0, 0x3c, 0x4a, 0x86,
- 0x60, 0x6c, 0x00, 0x25,
- 0x00, 0x15, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0xb4,
- 0x60, 0x8c, 0x40, 0x35,
- 0x40, 0x35, 0x81, 0x91,
- 0xa4, 0x53, 0x61, 0x44,
- 0x60, 0xc0, 0x00, 0x35,
- 0xe4, 0x40, 0x04, 0x10,
- 0x60, 0xa8, 0x00, 0xc5,
- 0x00, 0x45, 0x8b, 0x27,
- 0xa9, 0x3e, 0xe0, 0xbc,
- 0xe0, 0x18, 0x00, 0xa5,
- 0x04, 0x10, 0x09, 0x2e,
- 0x07, 0x27, 0xe4, 0x10,
- 0xe6, 0x86, 0x46, 0xca,
- 0x44, 0x42, 0x7e, 0x2e,
- 0x44, 0x27, 0xf1, 0xb0,
- 0x50, 0xa2, 0xa0, 0x31,
- 0x04, 0x10, 0x70, 0x88,
- 0x02, 0x11, 0xe4, 0x08,
- 0x05, 0x27, 0xcb, 0x37,
- 0x1f, 0x3e, 0x83, 0x17,
- 0xe0, 0x88, 0x06, 0x44,
- 0x86, 0xa3, 0x21, 0x5e,
- 0x81, 0x31, 0x0f, 0x2e,
- 0x00, 0x15, 0x9b, 0x1e,
- 0xa5, 0x1e, 0xe0, 0xe4,
- 0xe0, 0xe8, 0x00, 0x15,
- 0x00, 0x15, 0x99, 0x1e,
- 0x8d, 0x1e, 0xe0, 0xec,
- 0xe0, 0x28, 0x00, 0x15,
- 0x00, 0x15, 0x93, 0x1e,
- 0x97, 0x1e, 0xe0, 0x2c,
- 0xe0, 0x24, 0x00, 0x15,
- 0x23, 0x1e, 0x95, 0xce,
- 0xe0, 0x84, 0x02, 0xc4,
- 0xb8, 0x1b, 0x11, 0x1e,
- 0xff, 0x11, 0x7c, 0x1e,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x81, 0xc1, 0x1d, 0x1e,
- 0x0d, 0x0a, 0xb1, 0xa5,
- 0x18, 0xb8, 0xe3, 0x1c,
- 0xa2, 0xcd, 0xc0, 0x00,
- 0x5c, 0x00, 0x4e, 0x30,
- 0xdc, 0x00, 0x46, 0xc0,
- 0x2d, 0xae, 0x96, 0x55,
- 0x20, 0x24, 0x8c, 0xab,
- 0x00, 0x15, 0x88, 0x6b,
- 0x98, 0xb3, 0x60, 0xac,
- 0xc4, 0x27, 0x9f, 0x44,
- 0xfc, 0x08, 0x02, 0x15,
- 0xf1, 0x90, 0x4e, 0x12,
- 0x0c, 0x05, 0x86, 0x7d,
- 0x9c, 0x00, 0x4e, 0x30,
- 0x8e, 0x9b, 0x2f, 0x9e,
- 0xe0, 0xb0, 0x00, 0x55,
- 0x91, 0x74, 0x95, 0x14,
- 0xfc, 0x08, 0x0a, 0x25,
- 0x60, 0x84, 0x0a, 0x24,
- 0x82, 0x53, 0x88, 0x23,
- 0xe0, 0x1e, 0x4a, 0x5a,
- 0x4a, 0x5a, 0xa3, 0x74,
- 0x92, 0x7b, 0x66, 0x9e,
- 0xe5, 0x00, 0x0a, 0x50,
- 0x4a, 0x5a, 0xcf, 0x57,
- 0x93, 0x14, 0xe6, 0x86,
- 0x44, 0x2a, 0x8a, 0x23,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x86,
- 0xd1, 0x27, 0xe6, 0x00,
- 0x1e, 0x95, 0x84, 0x7d,
- 0x4e, 0x30, 0x00, 0x5c,
- 0x82, 0x05, 0x9c, 0x00,
- 0xa1, 0xcb, 0x0c, 0x4b,
- 0xe0, 0x8c, 0x40, 0x45,
- 0x01, 0xe5, 0x80, 0xa5,
- 0x01, 0xd5, 0x81, 0xb1,
- 0x7c, 0x24, 0x8c, 0x4b,
- 0x40, 0x45, 0x81, 0xb1,
- 0x83, 0xc1, 0x61, 0x44,
- 0x88, 0x23, 0xa9, 0x14,
- 0xfa, 0x04, 0x42, 0x22,
- 0xaf, 0x94, 0xa9, 0x1e,
- 0x94, 0x6b, 0x21, 0x14,
- 0x82, 0xbd, 0xad, 0xa4,
- 0xc0, 0x00, 0x13, 0x48,
- 0x83, 0x31, 0x23, 0xcd,
- 0x5c, 0x00, 0x46, 0xc0,
- 0xdc, 0x00, 0x4a, 0x90,
- 0xc0, 0x00, 0x11, 0xb8,
- 0xad, 0xbe, 0xab, 0x7e,
- 0xf8, 0x10, 0x14, 0x25,
- 0xe0, 0x20, 0x00, 0x55,
- 0xf8, 0x20, 0x14, 0xc5,
- 0xc4, 0x27, 0x25, 0x14,
- 0xfc, 0x08, 0x0a, 0xb5,
- 0x60, 0x10, 0x00, 0x25,
- 0x0a, 0x75, 0xc4, 0xc7,
- 0x83, 0x6d, 0x7c, 0x30,
- 0xfc, 0x30, 0x04, 0xc5,
- 0x8e, 0xb3, 0x0e, 0x65,
- 0x83, 0x6d, 0x99, 0x14,
- 0x8d, 0x14, 0x9c, 0x25,
- 0x83, 0x6d, 0xa8, 0x74,
- 0x02, 0x14, 0xa6, 0x85,
- 0x89, 0x24, 0xc4, 0x77,
- 0xfc, 0x1c, 0x02, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x8c, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0x80, 0x00, 0x0f, 0xa8,
- 0x12, 0xc0, 0x2f, 0x9e,
- 0x27, 0x8e, 0xe4, 0x10,
- 0xc0, 0x14, 0xc7, 0x97,
- 0xb3, 0x11, 0x3e, 0x1e,
- 0xe6, 0x86, 0x50, 0xba,
- 0x3e, 0xb4, 0xa3, 0x14,
- 0xc5, 0x87, 0x84, 0x81,
- 0x66, 0x86, 0x52, 0x9a,
- 0x16, 0xb5, 0x98, 0x83,
- 0xad, 0xc1, 0x7c, 0x1c,
- 0x58, 0x2a, 0x10, 0x91,
- 0x49, 0x97, 0xe6, 0xb2,
- 0xe0, 0x04, 0x0e, 0x06,
- 0x04, 0xb4, 0x12, 0x83,
- 0x04, 0x83, 0xe0, 0x98,
- 0x10, 0xc3, 0x83, 0x91,
- 0x13, 0x45, 0x8f, 0x81,
- 0xa7, 0x8e, 0x83, 0x21,
- 0x14, 0x75, 0xa8, 0x24,
- 0x14, 0x85, 0xe0, 0x10,
- 0x2f, 0x9e, 0xe0, 0x20,
- 0x14, 0x95, 0xc4, 0x27,
- 0xc4, 0x77, 0x60, 0x30,
- 0x7c, 0x08, 0x0a, 0x15,
- 0x0a, 0x75, 0xc4, 0x87,
- 0x0a, 0x85, 0xfc, 0x1c,
- 0xc4, 0x97, 0x7c, 0x20,
- 0xfc, 0x24, 0x0a, 0x55,
- 0x82, 0x73, 0x1b, 0x14,
- 0x90, 0x73, 0x2f, 0x94,
- 0x0a, 0xb4, 0x0a, 0x73,
- 0x4e, 0x12, 0xe0, 0x84,
- 0xae, 0x53, 0xfa, 0x1c,
- 0x90, 0xe5, 0x92, 0x5d,
- 0x10, 0xc0, 0x23, 0x94,
- 0x42, 0x14, 0xe4, 0x10,
- 0x96, 0xc3, 0xc7, 0x87,
- 0x66, 0xa6, 0x50, 0x8a,
- 0x02, 0x15, 0xc4, 0xc7,
- 0x84, 0x81, 0xfc, 0x08,
- 0x98, 0x83, 0xc5, 0x87,
- 0x90, 0x11, 0x02, 0x83,
- 0x70, 0x9c, 0x58, 0x82,
- 0xe1, 0x90, 0x16, 0x14,
- 0x91, 0x81, 0x12, 0x1b,
- 0x0e, 0x06, 0x0b, 0x95,
- 0xa7, 0x8e, 0xe0, 0x08,
- 0x14, 0x15, 0xa8, 0x84,
- 0xc4, 0x87, 0xe0, 0x10,
- 0x7c, 0x20, 0x0a, 0x75,
- 0x0a, 0x15, 0xc4, 0x17,
- 0x8f, 0x54, 0xfc, 0x04,
- 0x4e, 0x52, 0x8e, 0x13,
- 0x4a, 0xb2, 0xfa, 0x04,
- 0xc2, 0x57, 0xf1, 0x9c,
- 0x86, 0x65, 0x92, 0x5d,
- 0x85, 0x91, 0x2f, 0x9e,
- 0x7c, 0x20, 0x04, 0x15,
- 0xe4, 0x10, 0x04, 0xc0,
- 0xc7, 0x27, 0x23, 0x84,
- 0x02, 0xc3, 0x96, 0xc3,
- 0x44, 0x2a, 0x88, 0x11,
- 0x8e, 0xc3, 0x66, 0xa2,
- 0x16, 0x14, 0x44, 0xc7,
- 0x04, 0x21, 0xe1, 0x8c,
- 0x45, 0x27, 0x90, 0x1b,
- 0x04, 0xc3, 0x91, 0x81,
- 0xe0, 0x08, 0x0e, 0x06,
- 0x85, 0x21, 0x05, 0xd5,
- 0x92, 0x5b, 0x0d, 0x05,
- 0xc4, 0x77, 0x7e, 0x24,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x84, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0xaf, 0x9e, 0x98, 0x05,
- 0x10, 0xc0, 0x27, 0x8e,
- 0x00, 0x15, 0xe4, 0x10,
- 0xc7, 0x87, 0x60, 0x14,
- 0x96, 0xc3, 0x23, 0x94,
- 0x7c, 0x1c, 0x02, 0x15,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xe6, 0xa6, 0x50, 0x8a,
- 0x82, 0x23, 0x10, 0x81,
- 0x84, 0x11, 0x49, 0x87,
- 0xc4, 0x27, 0x10, 0xc3,
- 0x61, 0x88, 0x16, 0x14,
- 0x12, 0x1b, 0x84, 0xc3,
- 0x07, 0x21, 0x8f, 0x81,
- 0x42, 0xba, 0x89, 0x91,
- 0x92, 0x13, 0xe6, 0x86,
- 0xe5, 0x1f, 0x17, 0x24,
- 0x42, 0xca, 0x82, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x8e, 0x13, 0xe6, 0x8a,
- 0x82, 0x5d, 0xf1, 0x1f,
- 0x80, 0x5c, 0x1e, 0x55,
- 0x40, 0x45, 0x88, 0xc5,
- 0xa3, 0x3b, 0x60, 0x8c,
- 0x88, 0x2b, 0x1d, 0x14,
- 0x48, 0x20, 0x27, 0x84,
- 0xad, 0xb4, 0xdc, 0x00,
- 0x82, 0x11, 0x2b, 0x74,
- 0x86, 0x95, 0x9d, 0x1e,
- 0x60, 0xf4, 0x00, 0x15,
- 0x98, 0x4b, 0x84, 0xcb,
- 0x71, 0x84, 0x46, 0x22,
- 0x02, 0x30, 0xff, 0x21,
- 0x29, 0x24, 0xec, 0x40,
- 0x95, 0x14, 0x84, 0x1d,
- 0x5c, 0x00, 0x44, 0x30,
- 0x1e, 0x25, 0x83, 0x3d,
- 0x83, 0x11, 0x40, 0x50,
- 0x60, 0x80, 0x40, 0x15,
- 0x8b, 0x4e, 0x85, 0x31,
- 0x81, 0x45, 0xa9, 0x2e,
- 0xad, 0xb4, 0xa7, 0x84,
- 0x06, 0xcb, 0xab, 0x74,
- 0x08, 0x40, 0x82, 0x61,
- 0x10, 0x80, 0x6c, 0x04,
- 0x14, 0xa0, 0xec, 0x10,
- 0x8a, 0x9b, 0x6c, 0x10,
- 0x8e, 0x3b, 0x01, 0x45,
- 0x92, 0x5b, 0x7f, 0x35,
- 0x83, 0x4d, 0xa9, 0x14,
- 0x9f, 0xfc, 0x27, 0x58,
- 0xa1, 0x3d, 0x8b, 0x34,
- 0x9d, 0x24, 0x82, 0x15,
- 0xe0, 0xf4, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x8c, 0x40, 0x35,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x85,
- 0x40, 0x15, 0xff, 0x11,
- 0x00, 0x15, 0xe0, 0x90,
- 0x91, 0x1e, 0xe0, 0xc0,
- 0xe0, 0x30, 0x00, 0x15,
- 0xe0, 0x18, 0x00, 0xb5,
- 0x00, 0x15, 0x8d, 0x1e,
- 0x8b, 0x1e, 0xe0, 0x24,
- 0xe0, 0x64, 0x00, 0x15,
- 0x89, 0xbe, 0xfe, 0x8e,
- 0x81, 0x11, 0x0f, 0x1e,
- 0x81, 0x11, 0x13, 0x1e,
- 0x81, 0x11, 0x3e, 0x1e,
- 0xad, 0xb5, 0xfc, 0x1e,
- 0xe3, 0x1c, 0x05, 0x0a,
- 0xc0, 0x00, 0x16, 0xe8,
- 0x60, 0x20, 0x00, 0x75,
- 0xe0, 0x88, 0x06, 0xa4,
- 0x7c, 0x0c, 0x16, 0x85,
- 0x8f, 0x14, 0x82, 0x21,
- 0x0e, 0x95, 0xc4, 0x87,
- 0xa1, 0x1b, 0x7c, 0x20,
- 0x96, 0xc5, 0x93, 0x2e,
- 0xb4, 0x13, 0xfe, 0x14,
- 0x96, 0x45, 0xb0, 0x1d,
- 0x60, 0xb4, 0x00, 0x15,
- 0x06, 0x55, 0x96, 0x33,
- 0x06, 0x25, 0xfa, 0x10,
- 0xc4, 0x57, 0xe0, 0x20,
- 0x7c, 0x14, 0x0e, 0x45,
- 0x0e, 0xc5, 0xc4, 0x27,
- 0x04, 0x10, 0x7c, 0x08,
- 0x87, 0x27, 0xe4, 0x10,
- 0xfa, 0x10, 0x44, 0x22,
- 0x60, 0x10, 0x00, 0x95,
- 0x08, 0x24, 0x92, 0xc3,
- 0x4c, 0xc2, 0xe0, 0x84,
- 0x12, 0x85, 0xf1, 0x90,
- 0xa3, 0x6d, 0x7c, 0x20,
- 0xa4, 0xb5, 0xbc, 0x8e,
- 0x60, 0x14, 0x00, 0x45,
- 0x8b, 0x94, 0xc2, 0x67,
- 0x7c, 0x14, 0x08, 0x45,
- 0xe4, 0x10, 0x0a, 0x80,
- 0x98, 0x83, 0x47, 0x57,
- 0xe6, 0xa6, 0x4a, 0x5a,
- 0x64, 0x08, 0x16, 0x40,
- 0x45, 0xb7, 0x88, 0x23,
- 0x56, 0xba, 0x90, 0x51,
- 0xc9, 0x57, 0x66, 0xa6,
- 0xc4, 0x27, 0x0a, 0x83,
- 0x84, 0x83, 0x08, 0xb1,
- 0xc7, 0xb7, 0x0d, 0x44,
- 0x44, 0x8a, 0x96, 0x83,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x92,
- 0xcf, 0x27, 0xe5, 0x00,
- 0x1e, 0xb5, 0x84, 0x6d,
- 0x9a, 0xe5, 0x80, 0x10,
- 0x84, 0x6d, 0xfc, 0x24,
- 0xc0, 0x90, 0x40, 0xa5,
- 0x89, 0xb4, 0xbe, 0x24,
- 0xc0, 0x08, 0x5e, 0x65,
- 0x98, 0xb5, 0xa1, 0x2b,
- 0xe0, 0xf8, 0x00, 0x25,
- 0x44, 0xa2, 0x91, 0x44,
- 0x48, 0x22, 0xf1, 0x88,
- 0x83, 0x21, 0x7a, 0x10,
- 0xbe, 0x2e, 0x91, 0x4e,
- 0x00, 0x65, 0x8b, 0xa5,
- 0x42, 0xb2, 0x60, 0xb4,
- 0x02, 0x45, 0xf0, 0x8c,
- 0x00, 0xb5, 0xfa, 0x10,
- 0x06, 0x60, 0xe0, 0x14,
- 0x44, 0x47, 0xe4, 0x10,
- 0x0e, 0x25, 0x87, 0x37,
- 0x16, 0xc5, 0xfc, 0x10,
- 0x4a, 0x32, 0xfc, 0x20,
- 0x04, 0x94, 0x7a, 0x08,
- 0x06, 0x54, 0xe0, 0x84,
- 0x46, 0x22, 0xe0, 0x84,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0xc0, 0x10, 0x1e, 0xb5,
- 0x16, 0x45, 0xa2, 0x55,
- 0x50, 0xc2, 0x7c, 0x10,
- 0x3c, 0xce, 0xf0, 0xa4,
- 0xe4, 0x08, 0x16, 0xc0,
- 0xc5, 0xb7, 0x0b, 0xc4,
- 0x84, 0x41, 0x08, 0x83,
- 0x8a, 0x83, 0x45, 0x47,
- 0x66, 0xb2, 0x56, 0xba,
- 0x48, 0x4a, 0xc4, 0x87,
- 0xc2, 0x37, 0x66, 0xb2,
- 0x88, 0xb1, 0x0d, 0x54,
- 0xc7, 0xb7, 0x08, 0x41,
- 0x96, 0x43, 0xc7, 0x47,
- 0x48, 0x4a, 0x90, 0x43,
- 0x48, 0x4a, 0xf0, 0x0a,
- 0x08, 0x40, 0xe6, 0x96,
- 0xcf, 0x47, 0xe5, 0x00,
- 0x1e, 0xb5, 0x88, 0x3d,
- 0x1e, 0xc5, 0x80, 0x10,
- 0x98, 0x65, 0x80, 0x00,
- 0x89, 0xb4, 0xfc, 0x44,
- 0x40, 0xa5, 0x88, 0x3d,
- 0x5e, 0x35, 0xc0, 0x90,
- 0xbe, 0x34, 0xc0, 0x08,
- 0xa1, 0x3b, 0xbc, 0xc4,
- 0x00, 0x35, 0x96, 0x15,
- 0x91, 0x44, 0xe0, 0xf8,
- 0xf1, 0x8c, 0x46, 0xa2,
- 0x7a, 0x10, 0x48, 0x32,
- 0x91, 0x4e, 0x83, 0x31,
- 0x89, 0xd5, 0xbe, 0x3e,
- 0x10, 0xa0, 0x0c, 0x34,
- 0x04, 0x84, 0xec, 0x04,
- 0xa0, 0x11, 0x60, 0x88,
- 0x7c, 0x08, 0x16, 0x65,
- 0x02, 0x24, 0x8b, 0x17,
- 0x0e, 0x45, 0xc4, 0x37,
- 0xc4, 0x67, 0xfc, 0x0c,
- 0xfc, 0x18, 0x04, 0x25,
- 0xfa, 0x08, 0x46, 0x12,
- 0xe0, 0x88, 0x02, 0x34,
- 0xa2, 0xa5, 0x89, 0x1d,
- 0xe0, 0x8c, 0x02, 0x34,
- 0xf1, 0x84, 0x42, 0xc2,
- 0xa0, 0xf5, 0xa3, 0x1d,
- 0xb3, 0x41, 0x40, 0x24,
- 0x66, 0x92, 0x48, 0xca,
- 0x8b, 0xc4, 0xc2, 0x17,
- 0x7c, 0x18, 0x04, 0x25,
- 0x3c, 0x64, 0x84, 0x41,
- 0x0a, 0x60, 0xc5, 0x47,
- 0x8c, 0x43, 0x64, 0x10,
- 0xad, 0x61, 0x47, 0x57,
- 0xe6, 0xb2, 0x4a, 0x5a,
- 0x66, 0xb2, 0x58, 0x2a,
- 0x10, 0x51, 0xcc, 0x27,
- 0xe6, 0x9a, 0x46, 0x3a,
- 0x82, 0xc1, 0x49, 0x57,
- 0xc3, 0xc7, 0x0a, 0x43,
- 0x86, 0x43, 0x0d, 0x34,
- 0x98, 0x43, 0x84, 0x43,
- 0xf0, 0x0a, 0x44, 0x4a,
- 0xe6, 0x8e, 0x44, 0x2a,
- 0xe5, 0x00, 0x04, 0x20,
- 0x84, 0x1d, 0xcf, 0x27,
- 0xfc, 0x24, 0x96, 0xc5,
- 0x40, 0xa5, 0x84, 0x1d,
- 0x5e, 0x15, 0xc0, 0x90,
- 0x89, 0xb5, 0xc0, 0x08,
- 0x10, 0xa0, 0x02, 0x44,
- 0x04, 0x54, 0xec, 0x04,
- 0xe0, 0x88, 0x06, 0x84,
- 0x7c, 0x0c, 0x16, 0x35,
- 0x8b, 0x67, 0xa0, 0x61,
- 0x02, 0x34, 0xc4, 0x57,
- 0x08, 0x35, 0xe0, 0x88,
- 0x0e, 0x45, 0xfc, 0x04,
- 0x4c, 0x62, 0xfc, 0x14,
- 0x06, 0x64, 0xfa, 0x0c,
- 0x89, 0x3d, 0xe0, 0x88,
- 0x06, 0x64, 0x90, 0x05,
- 0x46, 0x22, 0xe0, 0x8c,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0x40, 0x24, 0x8e, 0x55,
- 0xe4, 0x08, 0x08, 0xc0,
- 0xc5, 0x47, 0x0b, 0x74,
- 0xc4, 0xc7, 0x39, 0x51,
- 0x7c, 0x04, 0x04, 0x15,
- 0x48, 0x4a, 0x9b, 0x21,
- 0xc2, 0x37, 0x66, 0x9e,
- 0xe6, 0x8a, 0x44, 0x9a,
- 0x4a, 0x6a, 0x08, 0x41,
- 0x04, 0xc3, 0xe6, 0x96,
- 0xe6, 0x9e, 0x44, 0x1a,
- 0xcc, 0x17, 0x47, 0x47,
- 0x82, 0x21, 0x08, 0xc3,
- 0xc3, 0x27, 0x0a, 0xc3,
- 0x0d, 0x24, 0x82, 0xc3,
- 0x42, 0xca, 0x84, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8a,
- 0xcf, 0x17, 0xe5, 0x00,
- 0x84, 0x65, 0x82, 0x3d,
- 0x82, 0x3d, 0xfc, 0x14,
- 0xc0, 0x90, 0x40, 0xa5,
- 0xc0, 0x08, 0x5e, 0x35,
- 0xa1, 0x1b, 0xbe, 0x14,
- 0x00, 0x15, 0x82, 0x55,
- 0x11, 0x14, 0xe0, 0xf8,
- 0x42, 0xa2, 0xa2, 0xa3,
- 0x11, 0x1e, 0xfa, 0x04,
- 0xbe, 0x1e, 0x83, 0x11,
- 0x90, 0xab, 0x11, 0x14,
- 0x83, 0xad, 0x93, 0x24,
- 0x9f, 0xfc, 0x29, 0x28,
- 0xd0, 0xf1, 0x01, 0x11,
- 0xe0, 0x98, 0x40, 0x15,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0xac, 0x00, 0x15,
- 0x00, 0x25, 0x81, 0x41,
- 0x81, 0x51, 0x60, 0xa0,
- 0x81, 0x85, 0x84, 0x34,
- 0x06, 0xcd, 0xc5, 0xc4,
- 0xfb, 0x30, 0x46, 0x32,
- 0x1c, 0x00, 0x48, 0x50,
- 0x85, 0x5d, 0x82, 0x51,
- 0x40, 0x45, 0xfe, 0x15,
- 0xdd, 0x93, 0xe0, 0xb8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x18, 0x02, 0x65,
- 0x8e, 0x35, 0xa3, 0x2b,
- 0xe0, 0x4c, 0x02, 0x55,
- 0x94, 0x65, 0x81, 0x5d,
- 0x08, 0x04, 0x06, 0xc4,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x88, 0x63, 0x7c, 0x10,
- 0x6c, 0x04, 0x0e, 0x00,
- 0x80, 0x4b, 0x83, 0x81,
- 0xe0, 0x88, 0x06, 0x24,
- 0xfc, 0x0c, 0x18, 0x35,
- 0x86, 0xab, 0x03, 0xf5,
- 0xf8, 0x04, 0x0c, 0x95,
- 0x18, 0x95, 0xc4, 0x97,
- 0x95, 0x9d, 0xfc, 0x24,
- 0x87, 0x9d, 0x82, 0xa5,
- 0x02, 0xa5, 0x82, 0x65,
- 0x16, 0xa4, 0xe0, 0xb4,
- 0xf7, 0xb7, 0xe1, 0x7c,
- 0x8e, 0xbb, 0x16, 0xa3,
- 0x94, 0x9d, 0x8b, 0xa7,
- 0xa3, 0x8b, 0x80, 0x95,
- 0x88, 0xbb, 0x82, 0x75,
- 0x0c, 0x60, 0x02, 0x81,
- 0x0e, 0x70, 0xec, 0x10,
- 0x92, 0xab, 0x6c, 0x04,
- 0x8a, 0x8d, 0x96, 0x4b,
- 0x98, 0x54, 0xf8, 0x45,
- 0x18, 0x55, 0xc4, 0x57,
- 0x81, 0xc5, 0xfc, 0x14,
- 0x04, 0x04, 0x06, 0x34,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x08, 0x24, 0xfc, 0x08,
- 0x06, 0x55, 0xe0, 0x88,
- 0x80, 0x4b, 0x7c, 0x10,
- 0x02, 0xc5, 0x8a, 0x3b,
- 0xc4, 0x27, 0x60, 0x20,
- 0xe3, 0x40, 0x02, 0x19,
- 0xfc, 0x08, 0x18, 0x25,
- 0xe6, 0x86, 0x46, 0x3a,
- 0xe6, 0x86, 0x42, 0x5a,
- 0x86, 0x53, 0x04, 0x21,
- 0x82, 0x23, 0x85, 0x27,
- 0x48, 0x00, 0x85, 0x5d,
- 0x88, 0x0b, 0xdc, 0x00,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x80, 0x1e, 0xf0,
- 0xe0, 0x84, 0x00, 0x15,
- 0xb0, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x00, 0x25,
- 0xe0, 0x84, 0x12, 0x14,
- 0x12, 0x73, 0x84, 0x93,
- 0xa1, 0x7d, 0xe0, 0x30,
- 0x00, 0x45, 0xae, 0xd5,
- 0x87, 0x51, 0x60, 0xa0,
- 0xe0, 0x60, 0x12, 0x33,
- 0xe6, 0x96, 0x50, 0x4a,
- 0xac, 0xa5, 0x91, 0x3d,
- 0xac, 0x75, 0xa1, 0x3d,
- 0xac, 0x25, 0x91, 0x7d,
- 0x0c, 0x70, 0x09, 0x2e,
- 0x00, 0x45, 0xe4, 0x0c,
- 0x00, 0xa5, 0xe0, 0xb4,
- 0xa0, 0x41, 0xe0, 0xd4,
- 0x61, 0x7c, 0x0a, 0x44,
- 0xfa, 0x80, 0x04, 0xa4,
- 0xf7, 0x57, 0x0f, 0x2e,
- 0x04, 0xa4, 0x0a, 0x43,
- 0x0b, 0x47, 0xe1, 0xa0,
- 0x0d, 0x4e, 0xe1, 0xa7,
- 0xe0, 0x88, 0x08, 0x64,
- 0x60, 0x18, 0x00, 0x55,
- 0xfa, 0x80, 0x16, 0x24,
- 0xfe, 0x2e, 0xfc, 0xae,
- 0x54, 0x52, 0x0b, 0x5e,
- 0x01, 0x51, 0xf0, 0x90,
- 0x81, 0xc5, 0x81, 0x41,
- 0x82, 0x61, 0x69, 0x24,
- 0xe0, 0x20, 0x00, 0xc5,
- 0x18, 0x25, 0xc4, 0x27,
- 0x84, 0x21, 0xfc, 0x08,
- 0x48, 0x22, 0x85, 0x27,
- 0x86, 0x6d, 0xfa, 0x10,
- 0x0f, 0xc4, 0xfc, 0x85,
- 0x12, 0x23, 0xa0, 0x1d,
- 0x8e, 0xc3, 0xc0, 0x2c,
- 0xf0, 0xac, 0x4e, 0xc2,
- 0x5b, 0x1c, 0x4e, 0x22,
- 0x9c, 0xf5, 0xa3, 0xcd,
- 0x89, 0x2d, 0x8d, 0x24,
- 0x04, 0xb0, 0x9c, 0x85,
- 0xfa, 0x2d, 0xec, 0x04,
- 0x91, 0x7d, 0x9c, 0x15,
- 0x0d, 0x24, 0x9a, 0xc5,
- 0xe1, 0x84, 0x06, 0xb4,
- 0x0c, 0xc0, 0x0b, 0xa4,
- 0x3e, 0x1e, 0xe4, 0x04,
- 0xe0, 0x88, 0x02, 0x64,
- 0xa8, 0x23, 0x0f, 0x1e,
- 0x82, 0xa3, 0x44, 0x27,
- 0x81, 0x91, 0x26, 0x23,
- 0x60, 0xae, 0x46, 0x2a,
- 0xe0, 0x88, 0x04, 0x44,
- 0x8c, 0x8b, 0x01, 0xb1,
- 0x03, 0x15, 0xa6, 0xcb,
- 0x69, 0x24, 0xa4, 0xc3,
- 0x82, 0x14, 0x82, 0x81,
- 0x02, 0x15, 0xc4, 0x27,
- 0xc4, 0x17, 0xfc, 0x08,
- 0xa6, 0xc3, 0x18, 0x13,
- 0x60, 0x00, 0x04, 0x12,
- 0xe8, 0x00, 0x02, 0x12,
- 0xa2, 0x93, 0x04, 0xb3,
- 0xfc, 0x05, 0x8e, 0x8d,
- 0x18, 0x90, 0x0b, 0x84,
- 0x0f, 0x14, 0xe4, 0x08,
- 0xe4, 0x08, 0x06, 0xb0,
- 0x03, 0x25, 0x89, 0x94,
- 0x61, 0x14, 0x82, 0x83,
- 0xc0, 0x24, 0x82, 0x61,
- 0x04, 0x15, 0xc4, 0x17,
- 0x00, 0x25, 0xfc, 0x04,
- 0x44, 0x2a, 0xe0, 0x24,
- 0x8a, 0x13, 0x66, 0x86,
- 0xe5, 0x00, 0x04, 0x20,
- 0x4a, 0x12, 0xcf, 0x27,
- 0x8e, 0x6d, 0xf0, 0x88,
- 0xfe, 0x14, 0xfa, 0xe5,
- 0xf4, 0x20, 0x02, 0x8a,
- 0x0c, 0x34, 0x88, 0xd5,
- 0x85, 0xc7, 0x61, 0x08,
- 0xf1, 0xb0, 0x46, 0x62,
- 0x86, 0xe5, 0xa0, 0x3d,
- 0x60, 0xd0, 0x00, 0x05,
- 0x7c, 0x24, 0x8c, 0xc3,
- 0x42, 0xca, 0x8a, 0xc3,
- 0xd1, 0x07, 0xf0, 0x0a,
- 0xfa, 0x80, 0x00, 0x04,
- 0xe6, 0x92, 0x40, 0x0a,
- 0xe6, 0x8a, 0x42, 0x1a,
- 0x05, 0x07, 0x84, 0x01,
- 0xe6, 0x00, 0x02, 0x10,
- 0x91, 0x17, 0x06, 0x03,
- 0x82, 0x0d, 0x3e, 0x04,
- 0xd0, 0xa4, 0x40, 0x02,
- 0xc1, 0xe0, 0x00, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0xc1, 0xe0, 0x40, 0x11,
- 0x0c, 0x0c, 0xc0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0xa8, 0x00, 0x15,
- 0x00, 0x75, 0x81, 0x41,
- 0x00, 0x25, 0xe0, 0xac,
- 0x00, 0xa5, 0xe0, 0xb0,
- 0xa3, 0x1d, 0x60, 0xa0,
- 0x88, 0x4e, 0x9c, 0x4e,
- 0x83, 0x13, 0x84, 0x35,
- 0x8d, 0xf3, 0x83, 0x33,
- 0x9c, 0xc4, 0x82, 0x54,
- 0xfc, 0x10, 0x0a, 0x55,
- 0x9c, 0x5e, 0x98, 0x53,
- 0x88, 0xc4, 0xc0, 0x54,
- 0x7c, 0x10, 0x0a, 0x55,
- 0x98, 0x53, 0x88, 0x41,
- 0x02, 0x54, 0x88, 0x5e,
- 0xf1, 0x84, 0x48, 0xa2,
- 0x18, 0x70, 0x23, 0x4d,
- 0x4c, 0x70, 0xe4, 0x10,
- 0x08, 0x55, 0xdc, 0x00,
- 0xdc, 0x00, 0x50, 0x50,
- 0x60, 0x88, 0x06, 0x44,
- 0x7c, 0x3e, 0x8e, 0x6b,
- 0xe0, 0x88, 0x16, 0x14,
- 0xfe, 0x0c, 0x0c, 0x95,
- 0x82, 0xa1, 0x7e, 0xae,
- 0xa2, 0xa3, 0x09, 0x13,
- 0x8a, 0xab, 0x3e, 0xae,
- 0x89, 0x73, 0x83, 0x33,
- 0x7c, 0x2c, 0x14, 0xa5,
- 0xcd, 0x84, 0x94, 0x3b,
- 0x14, 0x93, 0xb0, 0x93,
- 0xf1, 0x9e, 0x86, 0xab,
- 0xbe, 0xc4, 0xfc, 0x84,
- 0x02, 0x54, 0xfe, 0xa4,
- 0xc4, 0xc7, 0x8a, 0x83,
- 0x0e, 0xa0, 0x8e, 0xc3,
- 0x48, 0x9a, 0xec, 0x04,
- 0x00, 0xd8, 0xe0, 0x1c,
- 0x0e, 0x10, 0xa0, 0x00,
- 0x8f, 0x13, 0xec, 0x04,
- 0x87, 0x73, 0x83, 0x33,
- 0xe1, 0x74, 0xd9, 0x34,
- 0xae, 0x33, 0xd5, 0x94,
- 0xf1, 0x3e, 0x92, 0x33,
- 0x18, 0x20, 0x40, 0x54,
- 0x88, 0x75, 0xe4, 0x10,
- 0x60, 0x88, 0x0e, 0x44,
- 0x0c, 0x85, 0x84, 0x6b,
- 0x06, 0xa0, 0x7e, 0x1c,
- 0x09, 0x13, 0xe4, 0x04,
- 0xf1, 0x84, 0x48, 0x32,
- 0x06, 0x14, 0x07, 0x33,
- 0x30, 0xac, 0xe0, 0x88,
- 0x8a, 0x9b, 0x68, 0x00,
- 0x7c, 0x0c, 0x12, 0x95,
- 0xe9, 0xb4, 0x92, 0xab,
- 0x12, 0x83, 0xb6, 0x83,
- 0xf1, 0x8e, 0x94, 0x9b,
- 0x46, 0x52, 0x40, 0x54,
- 0xc4, 0x47, 0xf0, 0x9c,
- 0x20, 0x01, 0x00, 0xa8,
- 0x58, 0x22, 0x40, 0x00,
- 0x83, 0x05, 0xf0, 0x90,
- 0x8a, 0x3b, 0x04, 0x6b,
- 0xa0, 0x00, 0x00, 0xd8,
- 0xec, 0x04, 0x00, 0x10,
- 0x83, 0x33, 0x81, 0x13,
- 0xd9, 0x04, 0x87, 0x73,
- 0xd5, 0x24, 0xcd, 0x14,
- 0x84, 0x03, 0xa2, 0x03,
- 0xa0, 0xf1, 0xf1, 0x0e,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x60, 0xa0, 0x02, 0x35,
- 0x02, 0x25, 0x87, 0x41,
- 0x46, 0x3a, 0xe0, 0x50,
- 0x48, 0x22, 0xe6, 0x92,
- 0x06, 0x30, 0xf0, 0x80,
- 0x87, 0x4d, 0xec, 0x04,
- 0x02, 0x35, 0x8a, 0xa5,
- 0x08, 0x04, 0x60, 0x18,
- 0x83, 0xc1, 0xe0, 0x88,
- 0xfc, 0x10, 0x06, 0x55,
- 0xc4, 0x57, 0x86, 0x44,
- 0xfc, 0x14, 0x08, 0x55,
- 0x0c, 0x00, 0x83, 0xf5,
- 0x0e, 0x04, 0x64, 0x04,
- 0x06, 0x75, 0xe0, 0x88,
- 0x10, 0x64, 0x7c, 0x1c,
- 0x06, 0x85, 0xe0, 0x88,
- 0xc4, 0x77, 0xfc, 0x20,
- 0x7c, 0x1c, 0x08, 0x95,
- 0x08, 0x75, 0xc4, 0x87,
- 0x93, 0x7d, 0xfc, 0x20,
- 0x8b, 0x7d, 0x82, 0x05,
- 0x02, 0x85, 0x80, 0xc5,
- 0xca, 0x77, 0x60, 0xb4,
- 0x80, 0x95, 0x90, 0x7d,
- 0x80, 0x6b, 0x23, 0xcb,
- 0x02, 0xc1, 0x80, 0xb5,
- 0x84, 0xcd, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xf8, 0x25,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0x60, 0xa0, 0x00, 0x55,
- 0x00, 0x45, 0x81, 0x31,
- 0x02, 0x54, 0xe0, 0x18,
- 0x04, 0x54, 0x60, 0x88,
- 0x81, 0xc5, 0xe0, 0x8c,
- 0x4a, 0x42, 0x08, 0xcb,
- 0x71, 0x3e, 0xf0, 0x84,
- 0x94, 0x3e, 0x84, 0x43,
- 0x82, 0x31, 0x10, 0x3e,
- 0x60, 0xa0, 0x00, 0x55,
- 0x8b, 0x3d, 0x98, 0x4b,
- 0xdd, 0x93, 0xfc, 0x95,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x81, 0x31, 0x2d, 0x0d,
- 0x04, 0x55, 0xac, 0x35,
- 0x04, 0x45, 0xe1, 0x04,
- 0x04, 0xa5, 0xe1, 0x08,
- 0x13, 0x5e, 0xe1, 0x0c,
- 0xf1, 0x94, 0x56, 0x12,
- 0x4a, 0x12, 0x11, 0x4e,
- 0x04, 0x95, 0xf1, 0x90,
- 0x40, 0x12, 0x61, 0x10,
- 0x04, 0x85, 0xf1, 0xa8,
- 0x58, 0x52, 0x61, 0x14,
- 0x04, 0x45, 0xf9, 0xac,
- 0x4c, 0xc2, 0x61, 0x18,
- 0x0f, 0x1e, 0xf9, 0x80,
- 0xf1, 0xa4, 0x4e, 0x12,
- 0x58, 0x12, 0x0d, 0x7e,
- 0x2c, 0x7f, 0xf1, 0xa0,
- 0xf1, 0x90, 0x48, 0x12,
- 0xb8, 0x7f, 0x0b, 0xce,
- 0xa1, 0x7d, 0xa8, 0x7f,
- 0x7c, 0x4e, 0xa2, 0x75,
- 0xe0, 0x88, 0x02, 0xb4,
- 0xc4, 0x57, 0x09, 0xae,
- 0xfe, 0x8e, 0xbe, 0x9e,
- 0xe0, 0x18, 0x04, 0x95,
- 0xe1, 0x1c, 0x04, 0x85,
- 0xe0, 0xb4, 0x04, 0xa5,
- 0xfc, 0x14, 0x12, 0x75,
- 0xfc, 0x04, 0x12, 0x15,
- 0xe0, 0x20, 0x04, 0x55,
- 0xc4, 0x17, 0xc4, 0x77,
- 0xfc, 0x04, 0x0a, 0x45,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xe1, 0x20, 0x04, 0x75,
- 0xe6, 0xa2, 0x50, 0x4a,
- 0xf1, 0x90, 0x48, 0x12,
- 0x66, 0x9e, 0x4e, 0x4a,
- 0x90, 0x7d, 0xb4, 0x83,
- 0x04, 0x45, 0x98, 0xe5,
- 0x0c, 0x04, 0x61, 0x24,
- 0x12, 0x35, 0xe0, 0x88,
- 0x93, 0x04, 0xfc, 0x18,
- 0x0a, 0x35, 0xc4, 0x37,
- 0x42, 0x32, 0xfc, 0x0c,
- 0x42, 0x1a, 0xf1, 0x84,
- 0x92, 0x4b, 0x66, 0x92,
- 0x8c, 0x25, 0x8e, 0x1d,
- 0xc4, 0xb7, 0x8d, 0xb4,
- 0xfc, 0x2c, 0x08, 0x05,
- 0x0a, 0x65, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x46, 0x62, 0xe1, 0x28,
- 0x46, 0x3a, 0xf1, 0x8c,
- 0x91, 0x04, 0xe6, 0x82,
- 0x88, 0x25, 0x82, 0x3d,
- 0xc4, 0xa7, 0x8b, 0xa4,
- 0xfc, 0x28, 0x08, 0x05,
- 0x0a, 0x95, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x42, 0x92, 0xe1, 0x2c,
- 0x42, 0x1a, 0xf1, 0x98,
- 0x89, 0x04, 0xe6, 0x82,
- 0x84, 0x25, 0x86, 0x1d,
- 0x04, 0x35, 0xfc, 0x04,
- 0xc4, 0x07, 0xe1, 0x30,
- 0xfc, 0x00, 0x08, 0x05,
- 0x0a, 0x05, 0xc4, 0x07,
- 0xb2, 0x03, 0xfc, 0x00,
- 0xe6, 0x8e, 0x40, 0x0a,
- 0x82, 0x0d, 0x7e, 0x04,
- 0x80, 0x04, 0x1e, 0x05,
- 0x88, 0x75, 0xa9, 0x0d,
- 0xe0, 0x74, 0x04, 0x15,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x8f, 0xc4, 0x86, 0xc5,
- 0xaf, 0xcd, 0xa0, 0xc3,
- 0xc4, 0xc7, 0x86, 0x55,
- 0x18, 0x15, 0x88, 0xc3,
- 0x18, 0x25, 0xf8, 0x18,
- 0xf0, 0x34, 0xf8, 0x08,
- 0x0a, 0x15, 0xc4, 0x17,
- 0xc4, 0x27, 0x7c, 0x04,
- 0x7c, 0x08, 0x0a, 0x25,
- 0x0a, 0x35, 0xc4, 0x37,
- 0xa4, 0x13, 0xfc, 0x0c,
- 0x84, 0x1d, 0xa6, 0x23,
- 0x8c, 0x10, 0x00, 0x00,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x06, 0x0b, 0x80, 0x3b,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x7b, 0x0b, 0x2e,
- 0x02, 0x40, 0x09, 0x0e,
- 0x00, 0x08, 0xe4, 0xc0,
- 0xe7, 0x00, 0x04, 0x40,
- 0x66, 0x40, 0x0a, 0x40,
- 0x01, 0xf5, 0x99, 0xc1,
- 0x42, 0x65, 0x81, 0x61,
- 0x18, 0xc0, 0x78, 0x30,
- 0xc5, 0x6e, 0xec, 0x04,
- 0x42, 0x65, 0xd5, 0x6c,
- 0x4a, 0x63, 0xe0, 0x2c,
- 0xc9, 0x66, 0xe0, 0x2c,
- 0xe0, 0x2c, 0x44, 0x61,
- 0xfc, 0x55, 0xa1, 0xcb,
- 0x60, 0x88, 0x02, 0x04,
- 0x7c, 0x0e, 0xc2, 0x07,
- 0xe7, 0x00, 0x00, 0x40,
- 0x00, 0x40, 0x3e, 0x0e,
- 0x7e, 0x1e, 0xe6, 0x40,
- 0xe4, 0xc0, 0x12, 0x30,
- 0x64, 0xc0, 0x14, 0x40,
- 0xe6, 0x40, 0x0c, 0x30,
- 0x81, 0x81, 0x11, 0x0e,
- 0x12, 0x05, 0x8d, 0x45,
- 0x99, 0x21, 0x78, 0x30,
- 0x43, 0x38, 0x9c, 0x1a,
- 0x1c, 0x1a, 0xe8, 0x1c,
- 0x7f, 0xfd, 0x57, 0xfe,
- 0x40, 0x02, 0xcf, 0xff,
- 0x99, 0x21, 0x7b, 0xac,
- 0xf8, 0x30, 0x54, 0x05,
- 0x42, 0x78, 0xe5, 0x04,
- 0x69, 0x0e, 0xe8, 0x1c,
- 0x8f, 0x9e, 0x99, 0x21,
- 0xe0, 0x2c, 0x12, 0x05,
- 0x41, 0xf8, 0x9c, 0x1a,
- 0x59, 0x3a, 0xe8, 0x1c,
- 0xfb, 0xac, 0x40, 0x02,
- 0x99, 0x21, 0x1e, 0x1a,
- 0x54, 0x05, 0x8d, 0xae,
- 0x86, 0x0b, 0x60, 0x2c,
- 0xe8, 0x1c, 0x41, 0x48,
- 0x99, 0x21, 0x11, 0xb4,
- 0x0c, 0x03, 0xed, 0x0c,
- 0x9e, 0x1a, 0xe0, 0x5c,
- 0xe8, 0x1c, 0x42, 0xa8,
- 0x60, 0x2c, 0x0c, 0x03,
- 0x1e, 0x1a, 0x80, 0xab,
- 0x42, 0x38, 0x99, 0x21,
- 0x0c, 0x03, 0xe8, 0x1c,
- 0x80, 0x9b, 0x60, 0x8c,
- 0x99, 0x21, 0x1e, 0x1a,
- 0xe8, 0x1c, 0x41, 0xc8,
- 0x89, 0x34, 0xfc, 0x24,
- 0x42, 0x22, 0xfe, 0x44,
- 0xb4, 0x23, 0x71, 0xa4,
- 0x92, 0x23, 0x00, 0x13,
- 0x40, 0x2a, 0x8e, 0x38,
- 0x44, 0x1a, 0xe0, 0x92,
- 0x11, 0x44, 0xe0, 0x92,
- 0x02, 0x02, 0xa1, 0x3b,
- 0x92, 0x0b, 0x60, 0x00,
- 0x60, 0x00, 0x06, 0x22,
- 0xeb, 0xfc, 0x04, 0x12,
- 0x02, 0x32, 0x3e, 0x34,
- 0x00, 0x06, 0xeb, 0xfc,
- 0xa1, 0x9d, 0x40, 0x00,
- 0x9c, 0x00, 0x40, 0x90,
- 0x60, 0x30, 0x48, 0x03,
- 0x0c, 0x26, 0x90, 0x33,
- 0x46, 0x11, 0x82, 0x81,
- 0x8f, 0x94, 0xe0, 0x30,
- 0x91, 0xbe, 0x8d, 0xa4,
- 0x82, 0x08, 0x8b, 0x04,
- 0xe6, 0x55, 0x81, 0x8d,
- 0xc8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x84, 0x00, 0x44,
- 0x7c, 0x00, 0x0a, 0x03,
- 0xf0, 0x80, 0x58, 0x52,
- 0xe0, 0x90, 0x18, 0xc3,
- 0xfd, 0x01, 0x20, 0xc3,
- 0x80, 0xcd, 0x3c, 0x04,
- 0x97, 0x80, 0x18, 0xc4,
- 0x44, 0x04, 0x18, 0xc0,
- 0x86, 0x15, 0xa3, 0x1d,
- 0xe6, 0x8a, 0x44, 0xca,
- 0xe5, 0x0e, 0x58, 0x2a,
- 0x65, 0x8e, 0x44, 0x2a,
- 0x18, 0xc0, 0x81, 0x31,
- 0xc1, 0x00, 0x64, 0x01,
- 0x72, 0x8c, 0x44, 0x22,
- 0xde, 0x27, 0xe3, 0xc7,
- 0x02, 0xcd, 0xa4, 0xcf,
- 0x80, 0xf5, 0x93, 0x11,
- 0x0a, 0x29, 0x88, 0x53,
- 0xe2, 0x2d, 0xe1, 0xe0,
- 0x8b, 0x11, 0x80, 0x55,
- 0x40, 0x11, 0x88, 0x03,
- 0xdd, 0x93, 0xe3, 0x90,
- 0x18, 0x24, 0x42, 0x5a,
- 0x98, 0x33, 0xe0, 0x88,
- 0xe0, 0x30, 0x06, 0x35,
- 0xc3, 0x5d, 0xc6, 0x57,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0x94, 0x4a, 0x12,
- 0x82, 0x15, 0xcb, 0x3d,
- 0xe0, 0x10, 0x00, 0x0b,
- 0x82, 0x03, 0xc6, 0x07,
- 0x5c, 0x08, 0xc0, 0x3d,
- 0x04, 0x43, 0x9a, 0x00,
- 0x48, 0x01, 0x85, 0x01,
- 0xdd, 0x93, 0xe3, 0x90,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x30, 0x1e, 0xf0,
- 0x1e, 0x25, 0x9b, 0x2e,
- 0xb7, 0xc4, 0xe0, 0x88,
- 0x99, 0x41, 0x1d, 0x4e,
- 0x1e, 0x25, 0x95, 0x2e,
- 0x0c, 0xc0, 0x60, 0x84,
- 0xb5, 0xb4, 0xe7, 0x90,
- 0x1e, 0x25, 0x97, 0x2e,
- 0x99, 0x2e, 0xe0, 0x80,
- 0xa3, 0x2e, 0xbf, 0x24,
- 0x91, 0x2e, 0xbd, 0x24,
- 0x93, 0x2e, 0xbb, 0x24,
- 0x0f, 0x2e, 0xb9, 0x24,
- 0x81, 0x45, 0x81, 0x21,
- 0x08, 0x40, 0x59, 0x26,
- 0xa1, 0x4b, 0xec, 0x04,
- 0x1f, 0x1e, 0xfe, 0x95,
- 0xe5, 0x80, 0x0a, 0x50,
- 0x60, 0x00, 0x4f, 0x06,
- 0xe0, 0x08, 0x11, 0x06,
- 0x81, 0x91, 0x21, 0x3e,
- 0x16, 0x15, 0x87, 0xd5,
- 0x02, 0x0a, 0xfc, 0x1c,
- 0xc7, 0xff, 0x63, 0xfd,
- 0x48, 0xc2, 0x8c, 0x65,
- 0x8d, 0x11, 0x70, 0xa4,
- 0xe3, 0x90, 0x48, 0x11,
- 0xa1, 0x1b, 0x80, 0x1a,
- 0x94, 0x24, 0x80, 0xe5,
- 0x02, 0x86, 0xc3, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x82, 0x1a, 0xc3, 0x90,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x70, 0x9c, 0x44, 0xc2,
- 0x04, 0x25, 0xce, 0x17,
- 0xc2, 0x2d, 0xe0, 0x30,
- 0xc0, 0x00, 0x02, 0x36,
- 0xc3, 0x90, 0x48, 0x11,
- 0xc0, 0x1a, 0xa5, 0x5e,
- 0x82, 0x05, 0xa1, 0x1b,
- 0xfc, 0x20, 0x18, 0x2b,
- 0x02, 0x36, 0xc2, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x23, 0x14, 0xc3, 0x90,
- 0x16, 0x3b, 0x92, 0x2b,
- 0x00, 0x6b, 0x98, 0x4b,
- 0x78, 0x78, 0x98, 0xab,
- 0x21, 0x34, 0xef, 0xfc,
- 0x25, 0x54, 0x94, 0xcb,
- 0x02, 0x91, 0x8c, 0x0b,
- 0x08, 0x71, 0x88, 0x51,
- 0x8e, 0x18, 0x84, 0x81,
- 0xf0, 0x55, 0x83, 0x9d,
- 0x02, 0x29, 0x9f, 0x14,
- 0x04, 0x0a, 0xe0, 0x34,
- 0x84, 0x85, 0xe3, 0xfc,
- 0x98, 0x5b, 0x15, 0x24,
- 0x0d, 0x2e, 0x9d, 0x44,
- 0x8b, 0x2e, 0x89, 0x21,
- 0x89, 0x2e, 0x97, 0x24,
- 0xfe, 0x2e, 0x8f, 0x24,
- 0xfc, 0x2e, 0x99, 0x24,
- 0xbe, 0x2e, 0x91, 0x24,
- 0xbc, 0x2e, 0x93, 0x24,
- 0x40, 0x98, 0x9b, 0x24,
- 0x01, 0x01, 0xe8, 0x00,
- 0xe5, 0x30, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x00, 0x1e, 0xf0,
- 0x84, 0x8b, 0x7c, 0x0e,
- 0x95, 0x5e, 0xbb, 0x04,
- 0x11, 0x0e, 0xfe, 0x4e,
- 0xb7, 0x04, 0xa3, 0x0b,
- 0xb3, 0x04, 0xbe, 0x0e,
- 0xb1, 0x04, 0x8b, 0x0e,
- 0x8e, 0x28, 0x89, 0x0e,
- 0x86, 0x75, 0x97, 0x2e,
- 0x81, 0x71, 0x03, 0x65,
- 0x8e, 0x03, 0x95, 0x04,
- 0xe3, 0x90, 0x00, 0x09,
- 0x82, 0xd5, 0xad, 0x0b,
- 0x8e, 0x4b, 0x7c, 0x04,
- 0x8b, 0x34, 0x89, 0x24,
- 0xe0, 0x20, 0x00, 0x13,
- 0xfe, 0x54, 0x95, 0x04,
- 0xbe, 0x04, 0xbc, 0x0e,
- 0xef, 0xfc, 0x70, 0x68,
- 0x82, 0x71, 0x97, 0x24,
- 0xfa, 0x75, 0x8f, 0x2b,
- 0xe0, 0x00, 0x39, 0x98,
- 0xe0, 0x30, 0x02, 0x09,
- 0xb5, 0xb4, 0x95, 0x14,
- 0xa1, 0x0b, 0x1f, 0x0e,
- 0x02, 0x10, 0x15, 0x01,
- 0x1d, 0x0e, 0xe7, 0x90,
- 0xc0, 0x00, 0x00, 0x46,
- 0xc0, 0x38, 0x5e, 0x05,
- 0x9b, 0x0e, 0xbd, 0x04,
- 0x81, 0xa5, 0xb9, 0x04,
- 0x04, 0x20, 0x04, 0x38,
- 0xad, 0x3b, 0xec, 0x04,
- 0x80, 0x38, 0x1e, 0x35,
- 0x00, 0x00, 0x42, 0x31,
- 0xa1, 0x2b, 0x82, 0x11,
- 0x09, 0x94, 0xfc, 0xd5,
- 0xe2, 0x00, 0x00, 0x2a,
- 0x81, 0xa1, 0x0b, 0x74,
- 0x60, 0x08, 0x0d, 0x06,
- 0x40, 0x0a, 0x81, 0x31,
- 0x96, 0x2b, 0x66, 0xa6,
- 0x40, 0x09, 0x0c, 0x06,
- 0x42, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe5, 0x1e,
- 0x02, 0x10, 0xe5, 0x9e,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0xa8, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x17,
- 0x81, 0x11, 0x22, 0x0f,
- 0xef, 0xd8, 0x53, 0x28,
- 0x66, 0xa6, 0x44, 0x6a,
- 0x64, 0x00, 0x00, 0x00,
- 0x42, 0x12, 0xc1, 0x00,
- 0xe3, 0x07, 0x72, 0xa8,
- 0x65, 0x1e, 0x46, 0x2a,
- 0x44, 0x2a, 0xde, 0x17,
- 0x4c, 0x02, 0x65, 0x9e,
- 0x06, 0x30, 0xf9, 0x84,
- 0x40, 0x08, 0x64, 0x01,
- 0x40, 0x22, 0x81, 0x11,
- 0xd9, 0x37, 0x72, 0xa8,
- 0x96, 0x2b, 0x68, 0x07,
- 0x81, 0x31, 0x26, 0x0f,
- 0xef, 0xd8, 0x51, 0x68,
- 0x00, 0x00, 0x17, 0x34,
- 0xc1, 0x00, 0x64, 0x01,
- 0x42, 0x12, 0x1b, 0x44,
- 0x5e, 0x17, 0xf2, 0xa8,
- 0x04, 0x34, 0xe3, 0x07,
- 0xa2, 0x0f, 0x60, 0x88,
- 0xa6, 0x1b, 0x08, 0x23,
- 0x64, 0x01, 0x06, 0x40,
- 0x04, 0x20, 0x40, 0x09,
- 0xc0, 0x09, 0x64, 0x01,
- 0x60, 0x08, 0x48, 0x86,
- 0x11, 0xb4, 0x81, 0x51,
- 0x85, 0x25, 0x81, 0xc1,
- 0xa9, 0xbb, 0x15, 0xa4,
- 0xfc, 0x10, 0x14, 0x73,
- 0x14, 0x95, 0x8c, 0x7e,
- 0x46, 0x95, 0xfc, 0x14,
- 0x52, 0xa2, 0x60, 0xc0,
- 0x12, 0xa9, 0xf1, 0xb0,
- 0x46, 0xa5, 0xe3, 0x90,
- 0x82, 0x95, 0xe1, 0x80,
- 0x88, 0x7e, 0x8c, 0x73,
- 0x0e, 0x75, 0x95, 0x74,
- 0x44, 0x75, 0xfc, 0x14,
- 0x12, 0x79, 0xe0, 0xc0,
- 0x44, 0x75, 0xe3, 0x90,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x41, 0x6c, 0x04,
- 0x88, 0x31, 0x08, 0x21,
- 0x99, 0x1b, 0x88, 0x51,
- 0x1f, 0x24, 0xf6, 0xd5,
- 0x1b, 0x44, 0x81, 0x51,
- 0x91, 0xb4, 0x81, 0xc1,
- 0x60, 0x88, 0x06, 0x24,
- 0x19, 0x3e, 0xa4, 0x1b,
- 0x0f, 0x3e, 0x88, 0x33,
- 0xe5, 0xe0, 0x04, 0x80,
- 0x65, 0x81, 0x06, 0x30,
- 0x08, 0x40, 0x40, 0x09,
- 0xc0, 0x0a, 0x67, 0x81,
- 0x08, 0x62, 0x85, 0x15,
- 0xf0, 0x94, 0x52, 0x42,
- 0x52, 0x65, 0xa9, 0xbb,
- 0x10, 0x75, 0xf9, 0x80,
- 0x52, 0x75, 0xfc, 0x14,
- 0x4e, 0x82, 0x78, 0xc0,
- 0x0e, 0xa9, 0xf1, 0xb0,
- 0xa4, 0xae, 0xe2, 0x40,
- 0x00, 0x63, 0x82, 0xb5,
- 0xf0, 0x94, 0x52, 0x32,
- 0x10, 0x65, 0xa4, 0x6e,
- 0x52, 0x65, 0xfc, 0x14,
- 0x0e, 0x69, 0xe0, 0xc0,
- 0x52, 0x65, 0xe2, 0x40,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x21, 0x6c, 0x04,
- 0x99, 0x1b, 0x88, 0x51,
- 0x11, 0x04, 0xf6, 0xf5,
- 0x17, 0x54, 0xff, 0x81,
- 0x9f, 0x14, 0x81, 0x41,
- 0x00, 0x4a, 0x1b, 0x34,
- 0x00, 0x0c, 0xe0, 0x0c,
- 0x04, 0x54, 0xe2, 0x00,
- 0x00, 0x14, 0x68, 0x80,
- 0x42, 0x0a, 0xe8, 0x80,
- 0x81, 0x35, 0xe6, 0x8a,
- 0x82, 0x41, 0x4d, 0x8e,
- 0xfe, 0xb5, 0x83, 0x4d,
- 0x0e, 0x04, 0x1b, 0x14,
- 0x81, 0x41, 0xe0, 0x88,
- 0x65, 0x81, 0x06, 0x10,
- 0x93, 0x3e, 0xc0, 0x09,
- 0x1b, 0xc4, 0x85, 0x95,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x82, 0x9b, 0x13, 0x64,
- 0x8a, 0xc3, 0x9f, 0xa4,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x91, 0x14, 0xf4, 0xf5,
- 0x0a, 0x48, 0xa9, 0x1b,
- 0x03, 0x68, 0xc0, 0x00,
- 0xc0, 0x00, 0x40, 0x01,
- 0x66, 0x96, 0x42, 0x0a,
- 0x9b, 0x34, 0x81, 0x41,
- 0x05, 0xb5, 0xc4, 0x17,
- 0x1b, 0x54, 0x86, 0x13,
- 0xf0, 0x94, 0x46, 0x42,
- 0xc4, 0x37, 0x13, 0x64,
- 0x82, 0x9b, 0x1f, 0xa4,
- 0x0a, 0x30, 0x8a, 0x33,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0x30,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0x3b, 0x94, 0x34,
- 0x0c, 0x35, 0x82, 0xe5,
- 0xa1, 0x3b, 0xe1, 0x80,
- 0xb0, 0x34, 0x82, 0x65,
- 0xb6, 0x33, 0x98, 0xb4,
- 0xf0, 0x80, 0x16, 0x34,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xd5, 0x8b, 0x4b,
- 0x1b, 0x14, 0x87, 0x45,
- 0x99, 0x34, 0x81, 0x41,
- 0x06, 0x10, 0x86, 0x13,
- 0xc0, 0x09, 0x65, 0x81,
- 0x85, 0x95, 0x93, 0x3e,
- 0x0a, 0x44, 0x1b, 0xc4,
- 0x13, 0x64, 0xe0, 0x88,
- 0x9f, 0xa4, 0x82, 0x9b,
- 0x0a, 0xc0, 0x8a, 0xc3,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0xc0,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0xbb, 0x94, 0xb4,
- 0x0c, 0xb5, 0x82, 0xe5,
- 0xa1, 0xbb, 0xe1, 0x80,
- 0xb0, 0xb4, 0x82, 0x65,
- 0xa6, 0xb3, 0x98, 0x34,
- 0xf0, 0x80, 0x16, 0xb4,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xf5, 0x8b, 0x4b,
- 0x42, 0x0a, 0x9f, 0x34,
- 0x99, 0x44, 0xe6, 0x96,
- 0x86, 0x13, 0x1b, 0x34,
- 0x06, 0x13, 0xc4, 0x17,
- 0x06, 0x30, 0x88, 0x33,
- 0x40, 0x09, 0x65, 0x81,
- 0x93, 0x3e, 0x81, 0x41,
- 0x1b, 0xc4, 0x85, 0x95,
- 0x13, 0x64, 0x88, 0x53,
- 0x1f, 0xa4, 0xc4, 0x57,
- 0x8a, 0xc3, 0x82, 0x9b,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x1b, 0x94, 0xf4, 0xf5,
- 0x8d, 0x05, 0x81, 0x41,
- 0x66, 0x82, 0x42, 0x4a,
- 0x7f, 0xfc, 0x55, 0xfe,
- 0x13, 0x9e, 0xdf, 0xff,
- 0x0d, 0x1e, 0x92, 0x3b,
- 0x59, 0xfe, 0xff, 0x51,
- 0x5f, 0xff, 0x7f, 0xfd,
- 0x03, 0x85, 0xff, 0x61,
- 0x8c, 0x14, 0x81, 0x91,
- 0x84, 0x05, 0x91, 0x1b,
- 0x4a, 0x60, 0x95, 0x1d,
- 0x58, 0xa0, 0x5c, 0x00,
- 0x02, 0x75, 0xdc, 0x00,
- 0xdc, 0x00, 0x4c, 0x90,
- 0x92, 0xbb, 0x19, 0x1d,
- 0x1c, 0x00, 0x56, 0x50,
- 0xfb, 0x30, 0x58, 0x12,
- 0x94, 0x1b, 0x96, 0x5b,
- 0x88, 0x31, 0x02, 0x91,
- 0x81, 0x9d, 0x82, 0xab,
- 0x13, 0x94, 0xfa, 0x35,
- 0x8c, 0x85, 0x91, 0x5b,
- 0xf1, 0xa8, 0x42, 0xc2,
- 0xe1, 0xdc, 0x03, 0x0a,
- 0x58, 0xa0, 0x08, 0x55,
- 0x1b, 0x94, 0xdc, 0x00,
- 0xe0, 0x88, 0x02, 0x44,
- 0x60, 0x88, 0x06, 0x64,
- 0xe0, 0x88, 0x16, 0x54,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x0c, 0x12, 0x35,
- 0xe9, 0xc0, 0x02, 0x15,
- 0xfc, 0x2c, 0x12, 0x95,
- 0xf1, 0x8c, 0x46, 0x12,
- 0x06, 0x34, 0x32, 0x13,
- 0x13, 0x94, 0xf0, 0x80,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4a, 0x60, 0x87, 0x1d,
- 0x58, 0xa0, 0x1c, 0x00,
- 0x8a, 0x6b, 0x9c, 0x00,
- 0x81, 0x31, 0x12, 0x1b,
- 0x45, 0x8e, 0x81, 0x35,
- 0x81, 0x3d, 0x82, 0x31,
- 0x8d, 0x14, 0xfe, 0xb5,
- 0x82, 0x63, 0x1b, 0x14,
- 0x82, 0x63, 0xc4, 0x67,
- 0x02, 0x41, 0x98, 0xce,
- 0x85, 0x4d, 0x8e, 0x93,
- 0x1b, 0x34, 0xe8, 0x15,
- 0x8d, 0x35, 0x81, 0x91,
- 0x43, 0xfe, 0x13, 0x9e,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0xff, 0x41, 0x06, 0xbb,
- 0x7f, 0xfd, 0x4b, 0xfe,
- 0xff, 0xc1, 0x5f, 0xff,
- 0x81, 0x91, 0x03, 0x85,
- 0x91, 0xab, 0xac, 0xa4,
- 0x83, 0xad, 0x84, 0x05,
- 0x5c, 0x00, 0x48, 0xc0,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x58, 0x90, 0x02, 0x75,
- 0x0b, 0xad, 0xdc, 0x00,
- 0x4c, 0x40, 0x92, 0x6b,
- 0x4a, 0xa2, 0x1c, 0x00,
- 0x8c, 0x4b, 0xfb, 0x14,
- 0x02, 0x91, 0x82, 0xab,
- 0x94, 0x1b, 0x8e, 0xb3,
- 0xfa, 0x35, 0x85, 0x9d,
- 0x91, 0x4b, 0x13, 0x94,
- 0x4c, 0x52, 0x8e, 0x45,
- 0x0d, 0x0a, 0xf1, 0x84,
- 0x08, 0x55, 0xe1, 0xdc,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x0c, 0x94, 0x1b, 0xa4,
- 0x12, 0xc4, 0xe0, 0x88,
- 0x16, 0x44, 0x60, 0x88,
- 0x14, 0x63, 0xe0, 0x88,
- 0x67, 0x01, 0x14, 0xa0,
- 0x14, 0x95, 0xc0, 0x09,
- 0x0c, 0x65, 0xfc, 0x24,
- 0x14, 0xa5, 0xea, 0x20,
- 0x52, 0x62, 0xfc, 0x2c,
- 0x34, 0x63, 0xf1, 0xa4,
- 0xf0, 0x80, 0x12, 0x94,
- 0xf0, 0x80, 0x0c, 0x64,
- 0x93, 0x6d, 0x13, 0x94,
- 0x1c, 0x00, 0x48, 0xc0,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x01, 0x11, 0x88, 0xcb,
- 0x85, 0x6d, 0x81, 0x61,
- 0x50, 0x84, 0x48, 0x32,
- 0xc4, 0x04, 0x0c, 0x60,
- 0x40, 0x00, 0x48, 0x85,
- 0xd0, 0x9c, 0x42, 0x12,
- 0x42, 0xca, 0xfc, 0xf5,
- 0x9b, 0x44, 0xe6, 0x82,
- 0xc4, 0x17, 0x92, 0x13,
- 0x84, 0x5e, 0x88, 0x13,
- 0x88, 0x31, 0x02, 0x91,
- 0xe6, 0xb5, 0x81, 0x9d,
- 0x02, 0x2a, 0x91, 0x14,
- 0x0c, 0x28, 0xe0, 0x10,
- 0xc0, 0x00, 0x40, 0x01,
- 0xff, 0x31, 0x1b, 0x64,
- 0x81, 0xc1, 0x7f, 0x41,
- 0x13, 0x6e, 0x8b, 0x75,
- 0x7f, 0xb1, 0x8c, 0x5b,
- 0x03, 0x45, 0xff, 0x61,
- 0x8a, 0x9b, 0x81, 0x11,
- 0xfe, 0x1c, 0x12, 0xa5,
- 0x19, 0xa4, 0x91, 0xab,
- 0xdc, 0x00, 0x46, 0xa0,
- 0xdc, 0x00, 0x56, 0x10,
- 0xfc, 0x28, 0x0a, 0x55,
- 0x48, 0x50, 0x91, 0x5b,
- 0x4c, 0x10, 0x5c, 0x00,
- 0x02, 0x11, 0xdc, 0x00,
- 0x85, 0x1d, 0x92, 0x5b,
- 0x91, 0xbb, 0x80, 0xa5,
- 0x91, 0x6b, 0xfa, 0x65,
- 0x91, 0xbb, 0xfa, 0x25,
- 0x91, 0x6b, 0x8c, 0x85,
- 0x42, 0x32, 0x8c, 0x45,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0x95, 0xe1, 0xdc,
- 0x02, 0xc4, 0x1b, 0x94,
- 0x0a, 0xb4, 0xe0, 0x88,
- 0x14, 0x64, 0x60, 0x88,
- 0x12, 0x13, 0xe0, 0x88,
- 0x67, 0x01, 0x12, 0x90,
- 0x12, 0x55, 0xc0, 0x09,
- 0x02, 0x15, 0xfc, 0x14,
- 0x12, 0x95, 0xea, 0x20,
- 0x4a, 0x12, 0xfc, 0x28,
- 0x32, 0x13, 0xf1, 0x94,
- 0xf0, 0x80, 0x0a, 0x54,
- 0xf0, 0x80, 0x02, 0x14,
- 0x80, 0x95, 0x83, 0x5d,
- 0x89, 0x3d, 0x81, 0x85,
- 0x9f, 0x14, 0x80, 0xc5,
- 0xe6, 0x82, 0x4a, 0x6a,
- 0x98, 0x13, 0x01, 0x55,
- 0x66, 0x82, 0x42, 0xba,
- 0x1b, 0x54, 0x98, 0x5b,
- 0xc4, 0x17, 0x8a, 0x13,
- 0x84, 0x8e, 0x8a, 0x13,
- 0x82, 0xc1, 0x13, 0x64,
- 0x9f, 0x54, 0x88, 0x61,
- 0x8b, 0xcb, 0x97, 0x14,
- 0x42, 0x0a, 0xe8, 0xf5,
- 0x81, 0x51, 0x66, 0x86,
- 0xc4, 0x17, 0x9b, 0x24,
- 0x54, 0x22, 0x0b, 0x85,
- 0x19, 0x2e, 0xf0, 0x84,
- 0x14, 0x1b, 0x84, 0xbb,
- 0x7f, 0xc1, 0xff, 0x21,
- 0x81, 0xe5, 0x81, 0x61,
- 0x91, 0x9b, 0xed, 0x94,
- 0x46, 0x90, 0x45, 0x94,
- 0x44, 0x60, 0xdc, 0x00,
- 0x91, 0x9b, 0xdc, 0x00,
- 0x5c, 0x00, 0x58, 0x60,
- 0xdc, 0x00, 0x48, 0x90,
- 0x81, 0x6d, 0x82, 0x61,
- 0x91, 0x2b, 0x80, 0xa5,
- 0x91, 0xcb, 0xfc, 0x05,
- 0x91, 0x2b, 0xfa, 0xc5,
- 0x91, 0xcb, 0x8c, 0xc5,
- 0x42, 0x32, 0x8c, 0x85,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0xd5, 0xe1, 0xdc,
- 0x02, 0x54, 0x1b, 0x94,
- 0x14, 0xbb, 0xe0, 0x88,
- 0xe0, 0x88, 0x0c, 0x24,
- 0xe0, 0x88, 0x14, 0xc4,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x18, 0x12, 0x65,
- 0xe9, 0xc0, 0x02, 0x15,
- 0x7c, 0x28, 0x12, 0x95,
- 0x4c, 0x12, 0x96, 0xab,
- 0x32, 0x13, 0xf1, 0x98,
- 0xf0, 0x80, 0x0c, 0x64,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4c, 0xca, 0x01, 0x55,
- 0x46, 0xca, 0xe0, 0x04,
- 0x17, 0x14, 0xe0, 0x10,
- 0xdc, 0x00, 0x58, 0x20,
- 0x02, 0x06, 0x9b, 0x24,
- 0x8a, 0x13, 0xc0, 0x00,
- 0xe6, 0x82, 0x42, 0x1a,
- 0xc4, 0x17, 0x98, 0x13,
- 0x84, 0x8e, 0x84, 0x13,
- 0x82, 0x51, 0x19, 0x24,
- 0x8e, 0x23, 0x8e, 0xa3,
- 0x83, 0x5b, 0x97, 0x14,
- 0x97, 0x24, 0xea, 0x35,
- 0x9b, 0xb4, 0x9f, 0x14,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0x00, 0x13, 0x8f, 0x34,
- 0x1d, 0x94, 0xc4, 0x07,
- 0x4c, 0xb2, 0xc4, 0x17,
- 0x80, 0xb3, 0x70, 0x84,
- 0x81, 0x11, 0x09, 0x15,
- 0x82, 0xab, 0x15, 0x04,
- 0x86, 0x2b, 0x0f, 0x3e,
- 0x8c, 0x4b, 0x16, 0x3b,
- 0x82, 0x03, 0x1b, 0x14,
- 0x67, 0x90, 0x00, 0x00,
- 0x81, 0x65, 0x81, 0x51,
- 0x88, 0x41, 0x02, 0x51,
- 0x88, 0x21, 0x08, 0x31,
- 0x9f, 0xc4, 0x88, 0x11,
- 0x88, 0x45, 0x99, 0x5d,
- 0x93, 0xcb, 0x80, 0xc8,
- 0x84, 0xc4, 0xfc, 0xd5,
- 0x84, 0x15, 0x91, 0xcb,
- 0x5f, 0xfd, 0x3f, 0x28,
- 0x88, 0xc4, 0xc3, 0xff,
- 0x80, 0xf5, 0x91, 0xcb,
- 0x91, 0xcb, 0x8c, 0xc4,
- 0x90, 0xc4, 0x80, 0x95,
- 0xf8, 0xe5, 0x91, 0xcb,
- 0x80, 0x16, 0x89, 0x11,
- 0x7c, 0x04, 0x81, 0xd5,
- 0x89, 0x24, 0x94, 0x4b,
- 0x00, 0x13, 0x8b, 0x34,
- 0x95, 0x04, 0xe0, 0x20,
- 0xbc, 0x0e, 0xfe, 0x54,
- 0x77, 0x58, 0xbe, 0x04,
- 0x1b, 0x04, 0xef, 0xf8,
- 0x0f, 0x34, 0x94, 0x1b,
- 0x17, 0x24, 0x82, 0x11,
- 0x0e, 0x03, 0x8e, 0x63,
- 0x1b, 0x0e, 0x8e, 0xb3,
- 0x85, 0x1b, 0x8e, 0x33,
- 0x1e, 0xf0, 0xf0, 0x15,
- 0x0c, 0x0c, 0xe5, 0x00,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0xab,
- 0x60, 0x94, 0x00, 0x34,
- 0xe1, 0x84, 0x02, 0xa4,
- 0x82, 0x03, 0x25, 0xc4,
- 0x60, 0x2a, 0x40, 0x0a,
- 0x29, 0x84, 0xa1, 0x71,
- 0x42, 0x02, 0x81, 0x61,
- 0x40, 0xc2, 0x7b, 0xb0,
- 0xa2, 0x73, 0xfa, 0x80,
- 0xf3, 0x98, 0x42, 0x62,
- 0x40, 0x12, 0x80, 0x73,
- 0xcb, 0x77, 0x72, 0x98,
- 0xe0, 0xec, 0x02, 0x04,
- 0x0e, 0x04, 0x2e, 0x1f,
- 0x0b, 0x1e, 0xe1, 0x94,
- 0xfa, 0x90, 0x40, 0x22,
- 0x44, 0x42, 0x2e, 0x1f,
- 0x21, 0x1b, 0xfb, 0x88,
- 0xef, 0xfc, 0x43, 0xf6,
- 0xa4, 0x03, 0x20, 0x1c,
- 0x73, 0x98, 0x42, 0x62,
- 0x80, 0x08, 0x4c, 0x96,
- 0x80, 0x00, 0x10, 0x18,
- 0x48, 0xaa, 0x9f, 0x24,
- 0x89, 0x7e, 0xe6, 0xaa,
- 0x06, 0x44, 0x06, 0x23,
- 0x3e, 0x5e, 0xe1, 0x84,
- 0x06, 0x23, 0xca, 0x27,
- 0x44, 0x2a, 0x82, 0x3b,
- 0x84, 0xc3, 0xe0, 0x12,
- 0xf2, 0x98, 0x44, 0x62,
- 0x4e, 0x22, 0xa0, 0xc1,
- 0xcb, 0xc7, 0x72, 0x98,
- 0x60, 0xec, 0x16, 0x74,
- 0x38, 0xbf, 0xcb, 0x77,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x56, 0xca, 0xc0, 0x3f,
- 0x80, 0x2b, 0x64, 0x08,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0xe1, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x57, 0xfe,
- 0x0e, 0x06, 0x40, 0x3f,
- 0x57, 0x58, 0xc0, 0x00,
- 0x04, 0x04, 0xef, 0xd4,
- 0xd0, 0x17, 0x61, 0xe0,
- 0x45, 0xfe, 0x24, 0x1f,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xff, 0xa1, 0x50, 0x07,
- 0x42, 0xca, 0x7c, 0x9e,
- 0x7e, 0x8e, 0xe4, 0x08,
- 0xe0, 0x08, 0x42, 0x1a,
- 0x40, 0x6a, 0x0b, 0x94,
- 0x09, 0x84, 0xe0, 0x28,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0x6d, 0x80, 0x42, 0x0a,
- 0x41, 0xfe, 0x92, 0x2b,
- 0x43, 0xfe, 0x5f, 0xfc,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x6f, 0xd4, 0x4b, 0xe8,
- 0x12, 0x2b, 0x90, 0x3b,
- 0x4b, 0x98, 0x90, 0x3b,
- 0x02, 0x3b, 0xef, 0xd4,
- 0x23, 0xa4, 0x80, 0x2b,
- 0xe0, 0x28, 0x44, 0x6a,
- 0x06, 0xca, 0x21, 0x84,
- 0x1d, 0x94, 0xe5, 0xfc,
- 0xe1, 0xfc, 0x06, 0x1a,
- 0x65, 0x80, 0x42, 0x0a,
- 0x42, 0x1a, 0x96, 0x0b,
- 0x8e, 0x1b, 0x61, 0x88,
- 0xed, 0x80, 0x42, 0x0a,
- 0x5f, 0xfc, 0x45, 0xfe,
- 0xc0, 0x04, 0x47, 0xf6,
- 0xef, 0xd4, 0x53, 0x68,
- 0x47, 0xfe, 0x3e, 0x24,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x89, 0xb4, 0xa7, 0x74,
- 0x44, 0x62, 0x84, 0x93,
- 0x7e, 0x84, 0xf2, 0x98,
- 0x44, 0x22, 0x90, 0x93,
- 0x7c, 0x94, 0xf2, 0x98,
- 0x44, 0x22, 0x92, 0xa3,
- 0x54, 0xca, 0x72, 0x98,
- 0x04, 0x1a, 0xe4, 0x0c,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x04, 0x06, 0xe1, 0x80,
- 0x55, 0xfe, 0x40, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x61, 0xe0, 0x06, 0xa4,
- 0x50, 0xa7, 0xd0, 0x27,
- 0x14, 0x03, 0xa6, 0x2f,
- 0x42, 0x12, 0xff, 0xa1,
- 0x45, 0xfe, 0x72, 0x88,
- 0xdf, 0xff, 0x7f, 0xfc,
- 0x64, 0x08, 0x42, 0xca,
- 0x42, 0x1a, 0x84, 0x71,
- 0xc7, 0x77, 0x60, 0x08,
- 0xe0, 0x28, 0x40, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0xa1, 0x1b, 0xdf, 0xfc,
- 0x0b, 0x24, 0x82, 0x45,
- 0x45, 0xf8, 0x96, 0x3b,
- 0x01, 0x31, 0xef, 0xd4,
- 0x4f, 0x18, 0x8e, 0x2b,
- 0x81, 0x95, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4e, 0xc8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x45, 0x28,
- 0x43, 0xfe, 0xa1, 0x1d,
- 0x5f, 0xff, 0x1f, 0xfd,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x44, 0x68,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x01, 0x31, 0xc5, 0x17,
- 0x4d, 0x38, 0x8e, 0x2b,
- 0x81, 0xe5, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4c, 0xe8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x43, 0x48,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x21, 0x1d, 0xc5, 0x17,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x04, 0x14, 0xc7, 0xff,
- 0xff, 0x31, 0x01, 0x88,
- 0x01, 0x88, 0x00, 0x04,
- 0x80, 0xf8, 0x02, 0x14,
- 0x19, 0x84, 0x46, 0x02,
- 0x46, 0x5a, 0xa1, 0x2b,
- 0x40, 0x9a, 0x60, 0x28,
- 0x40, 0x0a, 0xe5, 0x26,
- 0x47, 0xfe, 0xe1, 0x84,
- 0x04, 0x06, 0x5f, 0xfc,
- 0x00, 0x33, 0xc0, 0x00,
- 0xe5, 0xa6, 0x40, 0x9a,
- 0x40, 0x22, 0x95, 0x3b,
- 0x47, 0xfe, 0x72, 0x80,
- 0xa1, 0x0b, 0x9f, 0xfc,
- 0xdf, 0xfc, 0x47, 0xfe,
- 0xf0, 0x0a, 0x40, 0x3a,
- 0x0c, 0x0b, 0xa0, 0x0c,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x81, 0x41, 0x01, 0xb5,
- 0x82, 0x41, 0x49, 0x54,
- 0x98, 0x5d, 0xc5, 0xc4,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0xb0, 0x4a, 0x52,
- 0x81, 0x4d, 0xcd, 0x5e,
- 0x5d, 0x93, 0xfc, 0xd5,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x67, 0x90, 0x0a, 0x30,
- 0xe6, 0xa0, 0x18, 0x30,
- 0x81, 0x61, 0x0f, 0x4e,
- 0x48, 0x06, 0x08, 0x8b,
- 0x03, 0xa5, 0xe0, 0x24,
- 0x20, 0x66, 0x80, 0x9b,
- 0x18, 0xa3, 0xa5, 0x1b,
- 0x16, 0x0e, 0x40, 0x00,
- 0x14, 0x78, 0xd0, 0x00,
- 0x00, 0x01, 0x16, 0x06,
- 0x06, 0xa5, 0x90, 0x00,
- 0xf2, 0x7d, 0x00, 0x00,
- 0x48, 0x4a, 0x80, 0xb5,
- 0x54, 0xa2, 0xe4, 0x9c,
- 0x65, 0xae, 0x90, 0xac,
- 0x08, 0x31, 0x82, 0x61,
- 0x04, 0xc1, 0x82, 0x51,
- 0x8a, 0xa8, 0x82, 0x81,
- 0xf8, 0xd5, 0x95, 0x6d,
- 0x88, 0xd5, 0xe5, 0xad,
- 0x82, 0x41, 0x8f, 0x44,
- 0x88, 0x5b, 0x03, 0x31,
- 0x81, 0xc1, 0x03, 0xb5,
- 0x78, 0x04, 0x0a, 0x69,
- 0x94, 0x78, 0xa5, 0x1b,
- 0xe0, 0x88, 0x10, 0x64,
- 0x7c, 0x20, 0x00, 0x85,
- 0xe0, 0x88, 0x12, 0x74,
- 0xfc, 0x24, 0x00, 0x95,
- 0x93, 0x8d, 0x80, 0x95,
- 0x81, 0x75, 0x80, 0x95,
- 0x80, 0xa5, 0x92, 0x8d,
- 0x78, 0x04, 0x4a, 0x71,
- 0x94, 0x66, 0x83, 0xc1,
- 0x82, 0x31, 0x0a, 0xa8,
- 0x0c, 0xa4, 0x82, 0x51,
- 0x8d, 0x3d, 0xfa, 0x80,
- 0xa3, 0xcd, 0xf8, 0x95,
- 0x81, 0x01, 0xf6, 0xc5,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x90, 0x1e, 0xf0,
- 0xe0, 0x84, 0x1e, 0x75,
- 0xa7, 0x4e, 0x9d, 0x5e,
- 0xaf, 0x2e, 0xa1, 0x3e,
- 0x9e, 0x14, 0xa9, 0x1e,
- 0xe0, 0x20, 0x0e, 0x05,
- 0xe0, 0x8c, 0x1e, 0x85,
- 0xe0, 0x88, 0x1e, 0x65,
- 0xe0, 0x80, 0x1e, 0xa5,
- 0x82, 0x0b, 0x25, 0x0e,
- 0x47, 0xf8, 0xad, 0x1e,
- 0x1f, 0x0e, 0xe8, 0x14,
- 0x0e, 0x05, 0x83, 0xc1,
- 0x4c, 0x05, 0xe0, 0x18,
- 0x0e, 0x09, 0xeb, 0x54,
- 0xdc, 0x34, 0xe0, 0x58,
- 0x00, 0x60, 0x31, 0x0e,
- 0xc0, 0x0b, 0x65, 0x41,
- 0x9e, 0x48, 0xab, 0x0e,
- 0xe0, 0x20, 0x0e, 0x1b,
- 0x5c, 0x58, 0x9c, 0x28,
- 0x4c, 0x35, 0xa9, 0xcf,
- 0x4c, 0x21, 0xeb, 0x50,
- 0xc0, 0x02, 0x6d, 0x69,
- 0x04, 0xc4, 0x1e, 0x04,
- 0x4c, 0x13, 0xe8, 0x94,
- 0xc0, 0x01, 0x66, 0xb1,
- 0x6d, 0x6d, 0x4c, 0x41,
- 0x4c, 0x51, 0xc0, 0x02,
- 0xc0, 0x02, 0x6d, 0x71,
- 0xe8, 0x14, 0x4b, 0x28,
- 0x60, 0x18, 0x0e, 0x05,
- 0x0e, 0x29, 0x80, 0x9b,
- 0x90, 0xbb, 0x60, 0x4c,
- 0xf0, 0x14, 0x56, 0x05,
- 0xe0, 0x48, 0x0e, 0x09,
- 0x14, 0x19, 0x9b, 0xae,
- 0x81, 0xa1, 0x60, 0x34,
- 0xe0, 0x90, 0x0e, 0x39,
- 0xe0, 0x94, 0x0e, 0x49,
- 0x78, 0x18, 0x56, 0x01,
- 0xe7, 0xf4, 0x03, 0x0a,
- 0x78, 0x10, 0x56, 0x31,
- 0x00, 0x10, 0x81, 0x01,
- 0x02, 0x70, 0x04, 0x04,
- 0x56, 0x41, 0xe4, 0x60,
- 0x90, 0x4b, 0x78, 0x0c,
- 0xf8, 0x14, 0x56, 0x21,
- 0xe0, 0x1c, 0x0e, 0x35,
- 0x50, 0x01, 0xa3, 0x1e,
- 0x99, 0x01, 0x60, 0x48,
- 0x50, 0xa1, 0xac, 0x06,
- 0x50, 0xa1, 0xe0, 0x54,
- 0xab, 0x04, 0xe0, 0x58,
- 0xb1, 0x24, 0xad, 0x14,
- 0xef, 0xe0, 0x74, 0x68,
- 0x8d, 0x51, 0x21, 0x0b,
- 0x2f, 0xc4, 0x90, 0xa5,
- 0xb1, 0x14, 0x80, 0xab,
- 0x64, 0x01, 0x00, 0x60,
- 0x04, 0x70, 0x40, 0x09,
- 0x01, 0x65, 0xe4, 0xa0,
- 0x49, 0x44, 0x82, 0x3b,
- 0xec, 0x04, 0x06, 0x30,
- 0xa1, 0x3b, 0xc1, 0x4e,
- 0x1e, 0x05, 0xfe, 0x75,
- 0xa1, 0xab, 0x60, 0x90,
- 0x9d, 0x0e, 0x96, 0xd5,
- 0xe0, 0xa4, 0x18, 0x09,
- 0x12, 0xc5, 0xa1, 0x0b,
- 0x84, 0x60, 0x12, 0x80,
- 0x64, 0x60, 0x12, 0x80,
- 0xe4, 0x80, 0x02, 0xc0,
- 0x64, 0xe0, 0x04, 0xc0,
- 0xe5, 0xf0, 0x06, 0xc0,
- 0x64, 0x01, 0x00, 0x60,
- 0x08, 0x60, 0x40, 0x09,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0x01, 0x0a, 0x60,
- 0x18, 0x60, 0x40, 0x04,
- 0xc0, 0x06, 0x67, 0x01,
- 0x8d, 0xbe, 0x8f, 0x9e,
- 0x89, 0x5e, 0x8b, 0xce,
- 0xfc, 0x6e, 0xfe, 0x4e,
- 0xb1, 0x04, 0xbe, 0x0e,
- 0xa5, 0x54, 0xa7, 0x44,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xef, 0xe8, 0x72, 0x08,
- 0x80, 0xab, 0x31, 0x14,
- 0xa1, 0xab, 0x2f, 0xc4,
- 0x05, 0xe5, 0x88, 0xa5,
- 0xaf, 0xc4, 0x95, 0x51,
- 0xe0, 0x70, 0x18, 0x09,
- 0xee, 0x45, 0xa1, 0x0b,
- 0xe0, 0x74, 0x18, 0x09,
- 0x96, 0xf5, 0xa3, 0x0b,
- 0xa1, 0x14, 0xa3, 0x04,
- 0x00, 0x34, 0x9d, 0x24,
- 0xe4, 0x40, 0x00, 0xc0,
- 0xa0, 0x11, 0x46, 0x54,
- 0xfc, 0x2e, 0xfe, 0x6e,
- 0x3c, 0x1e, 0xbe, 0x0e,
- 0x29, 0x04, 0x92, 0x1b,
- 0x9f, 0x24, 0x98, 0x9b,
- 0x65, 0xb8, 0xb1, 0x44,
- 0x21, 0x0b, 0xef, 0xd8,
- 0x90, 0x85, 0x8f, 0x51,
- 0x92, 0xcb, 0x00, 0xab,
- 0x00, 0xc0, 0xf3, 0xd5,
- 0x96, 0x2b, 0x66, 0xf0,
- 0x6f, 0xe4, 0x43, 0xc8,
- 0x80, 0xab, 0x92, 0x3b,
- 0x82, 0x65, 0xa1, 0xab,
- 0x9d, 0x04, 0x97, 0x51,
- 0x1e, 0xf0, 0x00, 0xae,
- 0x02, 0x5e, 0xe5, 0x90,
- 0x0c, 0x0c, 0x94, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x02, 0x80, 0x27, 0x04,
- 0x04, 0x60, 0xe6, 0x70,
- 0x40, 0x09, 0x64, 0x01,
- 0x92, 0x4b, 0x96, 0x3b,
- 0xe0, 0x2c, 0x00, 0x59,
- 0xfe, 0x1e, 0xaf, 0x04,
- 0x31, 0x14, 0xa7, 0x1e,
- 0xfc, 0x6e, 0xa0, 0x01,
- 0x99, 0x2e, 0xbe, 0x2e,
- 0x8e, 0x1b, 0x3c, 0x1e,
- 0xa3, 0x24, 0x97, 0x0e,
- 0xef, 0xe0, 0x48, 0x08,
- 0x80, 0xab, 0x1d, 0x04,
- 0x99, 0x51, 0x21, 0xab,
- 0x23, 0x9e, 0xf6, 0x95,
- 0x64, 0xd1, 0x0e, 0x80,
- 0x2b, 0x04, 0xc0, 0x02,
- 0x2d, 0x14, 0x96, 0x2b,
- 0xa7, 0x34, 0x8e, 0x4b,
- 0xef, 0xe0, 0x6d, 0x48,
- 0xa1, 0xab, 0x80, 0xab,
- 0x79, 0xc5, 0x8a, 0xa5,
- 0x12, 0x09, 0x9d, 0x51,
- 0x92, 0xcb, 0x60, 0x70,
- 0xd6, 0x05, 0xa1, 0x0b,
- 0x60, 0x58, 0x0e, 0x09,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x02,
- 0x40, 0x04, 0x66, 0x01,
- 0x67, 0x01, 0x08, 0x60,
- 0x5b, 0x78, 0xc0, 0x06,
- 0x8c, 0x1b, 0x68, 0x10,
- 0x91, 0x51, 0x21, 0x0b,
- 0xaf, 0xc4, 0xd0, 0xb5,
- 0x18, 0x09, 0xb1, 0x14,
- 0xa1, 0x0b, 0xe0, 0x70,
- 0x02, 0x0b, 0xd0, 0x45,
- 0xe4, 0xa0, 0x04, 0x70,
- 0x64, 0x01, 0x06, 0x60,
- 0x8c, 0x1b, 0x40, 0x09,
- 0xef, 0xfc, 0x65, 0xe8,
- 0x80, 0xab, 0x31, 0x14,
- 0x93, 0x51, 0x2f, 0xc4,
- 0x2d, 0x7e, 0xe9, 0x15,
- 0x66, 0x31, 0x04, 0x80,
- 0xa5, 0x74, 0xc0, 0x01,
- 0xfc, 0x2e, 0x99, 0x94,
- 0x00, 0x70, 0x2b, 0x2e,
- 0x3e, 0x9e, 0xe4, 0x40,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x96, 0x2b, 0x77, 0x17,
- 0x82, 0x03, 0x23, 0x34,
- 0x0a, 0x04, 0x2f, 0x04,
- 0x15, 0x5e, 0xe1, 0x14,
- 0x31, 0x04, 0x8e, 0x4b,
- 0xe7, 0x00, 0x02, 0x00,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xe8, 0x04, 0x48, 0x08,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0a, 0xf6, 0x60, 0x35,
- 0x2f, 0x04, 0xc0, 0x00,
- 0xad, 0x24, 0x96, 0x3b,
- 0x00, 0x09, 0xa1, 0x14,
- 0x8f, 0x2e, 0xe3, 0x04,
- 0xb0, 0x11, 0x2b, 0x24,
- 0x8d, 0x2e, 0xa3, 0x44,
- 0x8b, 0x6e, 0xb1, 0x24,
- 0xfe, 0x2e, 0x89, 0x9e,
- 0x9f, 0x64, 0x95, 0x24,
- 0x3e, 0x7e, 0xfc, 0x2e,
- 0xbc, 0x0e, 0x8c, 0x5b,
- 0x97, 0x24, 0xa9, 0x04,
- 0xef, 0xe0, 0x4b, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0x46, 0x58, 0x75,
- 0x2f, 0x04, 0xc0, 0x00,
- 0x21, 0x74, 0x8c, 0x2b,
- 0xab, 0x64, 0x96, 0x3b,
- 0x00, 0x00, 0x2d, 0x94,
- 0x02, 0x70, 0xe7, 0x10,
- 0x8c, 0x4b, 0xe4, 0x40,
- 0x6f, 0xe0, 0x58, 0xe8,
- 0x00, 0xab, 0x92, 0x5b,
- 0x21, 0xab, 0x8e, 0x2b,
- 0x52, 0xd5, 0x92, 0x7b,
- 0xc0, 0x00, 0x0b, 0xc6,
- 0x08, 0x80, 0x2f, 0x04,
- 0xc0, 0x03, 0x64, 0x91,
- 0x64, 0x70, 0x02, 0x20,
- 0x16, 0x2b, 0x84, 0x9b,
- 0x25, 0x4e, 0x8e, 0x3b,
- 0xe7, 0x20, 0x00, 0x00,
- 0xef, 0xf4, 0x78, 0x28,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0xd6, 0x4e, 0x75,
- 0x12, 0x0b, 0xc0, 0x00,
- 0x25, 0x34, 0x96, 0x1b,
- 0x4c, 0xb8, 0x8e, 0x2b,
- 0x80, 0xab, 0xe8, 0x04,
- 0x4c, 0x15, 0xa1, 0xab,
- 0xc0, 0x00, 0x0b, 0xe6,
- 0x12, 0x15, 0xaf, 0x74,
- 0x12, 0x2b, 0xe0, 0x10,
- 0xa9, 0x94, 0xe0, 0x3c,
- 0x0e, 0x0b, 0xb1, 0x44,
- 0x0e, 0x39, 0xe1, 0x88,
- 0x91, 0x9e, 0xe3, 0x20,
- 0x8d, 0x2e, 0x8f, 0x4e,
- 0x9f, 0x14, 0x8b, 0x1e,
- 0x00, 0x70, 0x09, 0x0e,
- 0xa3, 0x44, 0xe7, 0x30,
- 0x9b, 0x14, 0xfe, 0x1e,
- 0xa5, 0x34, 0xfc, 0x3e,
- 0x04, 0x10, 0x27, 0x54,
- 0x3e, 0x3e, 0xe4, 0x40,
- 0xbc, 0x6e, 0x96, 0x3b,
- 0xef, 0xf8, 0x43, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x5f, 0xfc, 0x30, 0xb8,
- 0xc0, 0x00, 0x0b, 0xf6,
- 0x63, 0x80, 0x0e, 0x19,
- 0x64, 0x50, 0x08, 0x80,
- 0x12, 0x0b, 0xc0, 0x04,
- 0xa5, 0x34, 0x96, 0x2b,
- 0xef, 0xfc, 0x5c, 0x68,
- 0x4a, 0x06, 0x00, 0xab,
- 0xdf, 0xa5, 0xe0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xab, 0x19, 0x14,
- 0x84, 0x9b, 0x15, 0x74,
- 0x86, 0x6b, 0x3e, 0x5e,
- 0x88, 0xbb, 0x7c, 0x1e,
- 0x60, 0x40, 0x12, 0x89,
- 0x47, 0xf8, 0x94, 0x1b,
- 0x8e, 0x3b, 0x68, 0x00,
- 0xe0, 0x44, 0x12, 0x09,
- 0x82, 0xe5, 0xa6, 0x0d,
- 0x86, 0x65, 0xa9, 0x0b,
- 0x8c, 0x25, 0xad, 0x0b,
- 0xaf, 0x0b, 0x7c, 0xb4,
- 0x10, 0x0b, 0x9a, 0x15,
- 0x61, 0xf8, 0x8e, 0x1b,
- 0xa3, 0x0d, 0xef, 0xd8,
- 0x8d, 0x15, 0x8c, 0x25,
- 0x8e, 0x45, 0xa5, 0x0b,
- 0xa7, 0x0b, 0x7c, 0xb4,
- 0x02, 0x60, 0x96, 0x95,
- 0x90, 0x0b, 0x64, 0x20,
- 0x6f, 0xdc, 0x41, 0x08,
- 0xa3, 0x0d, 0x8e, 0x2b,
- 0x8b, 0x35, 0x82, 0x25,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xd8, 0x60, 0xa8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x92, 0x95,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x61, 0xa8,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x69, 0xb8, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x92, 0x1b, 0x14, 0x0b,
- 0x6f, 0xd8, 0x6d, 0x68,
- 0x87, 0xb5, 0x8c, 0x2b,
- 0x64, 0x20, 0x02, 0x60,
- 0x7e, 0xf8, 0x90, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xd8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x8c, 0x55,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x60, 0x08,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x6a, 0x78, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x0e, 0x09, 0x85, 0x65,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x84, 0xe5, 0xa1, 0x0b,
- 0x67, 0xfd, 0x0e, 0x15,
- 0x97, 0x04, 0xc0, 0x01,
- 0x6f, 0xc9, 0x0e, 0x29,
- 0x0e, 0x39, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x60, 0x09, 0x0e, 0x4b,
- 0xc2, 0x1e, 0xc0, 0x03,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x58, 0x56, 0x21,
- 0xe0, 0x5c, 0x56, 0x31,
- 0xe0, 0x30, 0x56, 0x43,
- 0x6f, 0xd8, 0x5b, 0x48,
- 0x7c, 0xb4, 0x8e, 0x0b,
- 0x80, 0xb5, 0xa3, 0x0d,
- 0x8e, 0x0b, 0x3e, 0x14,
- 0xef, 0xd8, 0x63, 0x48,
- 0x98, 0xf1, 0x01, 0x01,
- 0x40, 0x16, 0x2c, 0x0e,
- 0x2e, 0x0e, 0xe0, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x6b, 0x02, 0x8b,
- 0x86, 0x7b, 0x60, 0x28,
- 0xa0, 0x08, 0xa2, 0x18,
- 0xe8, 0x10, 0x62, 0x68,
- 0x60, 0x58, 0x10, 0x19,
- 0xa2, 0x04, 0x80, 0x2b,
- 0x66, 0x78, 0xe0, 0x34,
- 0xc8, 0x17, 0x68, 0x10,
- 0xe0, 0x44, 0x0c, 0x19,
- 0x9c, 0x55, 0xa5, 0x1b,
- 0x4e, 0x05, 0xe0, 0x14,
- 0xc0, 0x01, 0x67, 0xdd,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0x98, 0x34, 0x9a, 0x24,
- 0x67, 0xe1, 0x4e, 0x15,
- 0x0c, 0x19, 0xc0, 0x01,
- 0x4e, 0x03, 0xe0, 0x38,
- 0xc0, 0x02, 0x6f, 0xe1,
- 0xe0, 0x54, 0x0c, 0x09,
- 0x67, 0xe9, 0x4e, 0x25,
- 0x4e, 0x35, 0xc0, 0x01,
- 0xc0, 0x01, 0x67, 0xed,
- 0x6f, 0xc9, 0x4e, 0x11,
- 0xa1, 0x0b, 0x40, 0x05,
- 0x60, 0x3c, 0x0c, 0x19,
- 0x0c, 0x29, 0x81, 0x01,
- 0x0c, 0x39, 0xe0, 0x40,
- 0x4e, 0x11, 0xe0, 0x48,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x6f, 0xd1, 0x4e, 0x01,
- 0x4e, 0x21, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd5,
- 0x6f, 0xd9, 0x4e, 0x31,
- 0xb0, 0xa5, 0xc0, 0x05,
- 0x60, 0x51, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x01,
- 0xc0, 0x03, 0x64, 0x91,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x35,
- 0xf0, 0x88, 0x48, 0x12,
- 0x4e, 0x35, 0x84, 0x63,
- 0x40, 0x01, 0x67, 0xf9,
- 0xe0, 0x84, 0x06, 0x04,
- 0x60, 0x60, 0x08, 0x45,
- 0x06, 0x5b, 0x82, 0x33,
- 0x80, 0x13, 0x61, 0x20,
- 0x68, 0x01, 0x4e, 0x45,
- 0x83, 0x41, 0x40, 0x01,
- 0x60, 0x09, 0x4e, 0x53,
- 0x0c, 0x25, 0xc0, 0x03,
- 0x06, 0x3b, 0xe1, 0xbc,
- 0x4e, 0x41, 0xe1, 0x50,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x67, 0xfd, 0x4e, 0x25,
- 0x4e, 0x33, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x0d,
- 0xe3, 0x00, 0x02, 0x09,
- 0x60, 0x21, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x30,
- 0xc0, 0x06, 0x60, 0x25,
- 0xe3, 0x60, 0x02, 0x09,
- 0x60, 0x29, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x90,
- 0xc0, 0x06, 0x60, 0x2d,
- 0x0c, 0x29, 0x91, 0x45,
- 0x06, 0x70, 0x60, 0x40,
- 0xe0, 0x14, 0xe4, 0x70,
- 0xe0, 0x10, 0x4e, 0x05,
- 0x08, 0x24, 0x1a, 0x04,
- 0x4e, 0x15, 0xe0, 0x88,
- 0x86, 0x43, 0x60, 0x14,
- 0x60, 0x3c, 0x0e, 0x59,
- 0xe0, 0x84, 0x10, 0x24,
- 0x8c, 0x0b, 0x10, 0x0e,
- 0x70, 0x15, 0x00, 0x15,
- 0x86, 0x83, 0x40, 0x02,
- 0x60, 0x54, 0x0c, 0xc9,
- 0x44, 0x5a, 0x84, 0x33,
- 0x48, 0x15, 0xe6, 0x8a,
- 0x00, 0x1b, 0xe1, 0x00,
- 0xc0, 0x04, 0x78, 0x11,
- 0x78, 0x19, 0x00, 0x49,
- 0x50, 0x13, 0xc0, 0x08,
- 0x42, 0x52, 0x64, 0x00,
- 0x46, 0x41, 0xfb, 0xb0,
- 0x58, 0x72, 0x6a, 0x00,
- 0x00, 0x49, 0xf0, 0x88,
- 0xc0, 0x08, 0x78, 0x15,
- 0xec, 0x00, 0x46, 0x11,
- 0xeb, 0x00, 0x46, 0x41,
- 0x78, 0x11, 0x00, 0x49,
- 0x46, 0x41, 0xc0, 0x08,
- 0x08, 0x24, 0x6d, 0x00,
- 0x00, 0x59, 0xe0, 0x84,
- 0x40, 0x08, 0x78, 0x09,
- 0x0e, 0x43, 0xc4, 0x27,
- 0x04, 0x70, 0x84, 0x73,
- 0x40, 0x07, 0x67, 0x71,
- 0x67, 0x71, 0x08, 0x40,
- 0x46, 0x51, 0xc0, 0x11,
- 0x06, 0xc0, 0x6e, 0x00,
- 0xc0, 0x13, 0x67, 0x70,
- 0x81, 0x51, 0x07, 0x65,
- 0x7c, 0x14, 0x00, 0xc9,
- 0x64, 0x90, 0x10, 0x60,
- 0x0e, 0xc4, 0xc0, 0x03,
- 0x10, 0x95, 0xe0, 0x88,
- 0x54, 0x82, 0x7c, 0x1c,
- 0x8c, 0x73, 0xf0, 0x9c,
- 0x78, 0x01, 0x44, 0x95,
- 0x12, 0xc4, 0x40, 0x02,
- 0x14, 0xa5, 0xe0, 0x84,
- 0x90, 0x93, 0x60, 0x60,
- 0x61, 0x20, 0x12, 0xbb,
- 0x44, 0xa5, 0x98, 0x83,
- 0x48, 0xb3, 0xe4, 0x00,
- 0xc0, 0x02, 0x78, 0x01,
- 0xe1, 0xbc, 0x0e, 0x75,
- 0xe1, 0x50, 0x12, 0x9b,
- 0x4e, 0x32, 0x49, 0x7e,
- 0x51, 0x9c, 0xf0, 0x94,
- 0x10, 0xc9, 0x82, 0x51,
- 0x9c, 0xc6, 0xe3, 0x00,
- 0xe3, 0x30, 0x10, 0xc9,
- 0xe4, 0x00, 0x4e, 0xc1,
- 0xe3, 0x60, 0x10, 0xc9,
- 0xe8, 0x00, 0x4e, 0xc1,
- 0xe3, 0x90, 0x10, 0xc9,
- 0xec, 0x00, 0x4e, 0xc1,
- 0xf2, 0x75, 0x83, 0x5d,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x84, 0xbb, 0x0b, 0x1e,
- 0x80, 0xab, 0x2b, 0x14,
- 0x81, 0x81, 0x3c, 0x5e,
- 0x86, 0x6b, 0x3e, 0x4e,
- 0x8d, 0x1e, 0xae, 0x04,
- 0xaf, 0x74, 0xa5, 0x14,
- 0xfe, 0x1e, 0xa7, 0x94,
- 0x4f, 0xb8, 0x8f, 0x8e,
- 0x16, 0x39, 0xe8, 0x10,
- 0x98, 0x1a, 0xe0, 0x94,
- 0xa5, 0x3b, 0x9a, 0x2a,
- 0xe0, 0x10, 0x52, 0x13,
- 0xe0, 0x14, 0x52, 0x23,
- 0x09, 0x0e, 0x8a, 0x55,
- 0x74, 0x01, 0x00, 0x0e,
- 0xbe, 0x7e, 0xc0, 0x07,
- 0x83, 0x01, 0x26, 0x0e,
- 0x85, 0x01, 0x7c, 0x0e,
- 0x2d, 0x64, 0xa1, 0x8c,
- 0xfa, 0x80, 0x02, 0x04,
- 0x94, 0x0b, 0x29, 0x74,
- 0x8d, 0x34, 0xfe, 0x24,
- 0xe8, 0x00, 0x4d, 0x28,
- 0x60, 0x94, 0x16, 0x19,
- 0x12, 0x2b, 0x94, 0x0b,
- 0x49, 0x98, 0x8c, 0x3b,
- 0x0b, 0x64, 0xe8, 0x00,
- 0x16, 0x29, 0x94, 0x0b,
- 0x8e, 0x4b, 0x60, 0x90,
- 0xe0, 0x94, 0x16, 0x19,
- 0x68, 0x00, 0x4e, 0x88,
- 0x8d, 0x14, 0x8c, 0x3b,
- 0x89, 0x04, 0xbe, 0x74,
- 0x8f, 0x05, 0xfc, 0x94,
- 0x16, 0x19, 0xa3, 0x34,
- 0xcc, 0x28, 0xe0, 0x90,
- 0x82, 0x95, 0xc5, 0x1d,
- 0xc5, 0x1d, 0xce, 0x28,
- 0x00, 0x14, 0x1e, 0x65,
- 0x80, 0x00, 0x12, 0x26,
- 0x00, 0x18, 0x1e, 0x15,
- 0x80, 0x00, 0x50, 0xc6,
- 0x09, 0x0e, 0x96, 0xe5,
- 0xf0, 0x84, 0x40, 0x32,
- 0x60, 0x20, 0x00, 0x19,
- 0xe4, 0x70, 0x04, 0xf0,
- 0xe1, 0x20, 0x00, 0x09,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x80, 0x02, 0xf0,
- 0x60, 0x84, 0x5e, 0x01,
- 0x59, 0x78, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x00, 0x8b, 0x80, 0xe5,
- 0x8b, 0x64, 0x87, 0x91,
- 0x89, 0x04, 0x8d, 0x14,
- 0x0f, 0x04, 0x89, 0x55,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x04,
- 0x0c, 0x13, 0xc4, 0x07,
- 0x02, 0x1b, 0x80, 0x63,
- 0x0c, 0x05, 0xe2, 0x48,
- 0x52, 0x13, 0xe0, 0x24,
- 0x02, 0xf0, 0x60, 0x28,
- 0xa6, 0x0e, 0xe4, 0x80,
- 0x57, 0xb8, 0xbe, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x8b, 0x11, 0x21, 0x0b,
- 0x88, 0xf5, 0xfc, 0x1e,
- 0x04, 0xf0, 0x0f, 0x04,
- 0xfe, 0x14, 0xe4, 0x70,
- 0x02, 0x15, 0xc4, 0x07,
- 0x8c, 0x03, 0x60, 0x10,
- 0xe0, 0x24, 0x00, 0x05,
- 0x02, 0xf0, 0x02, 0x03,
- 0xe6, 0x0e, 0xe4, 0x80,
- 0x56, 0x58, 0xbc, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x8c, 0x1b, 0x0f, 0x04,
- 0x04, 0xf0, 0x21, 0x64,
- 0xc2, 0x07, 0xe4, 0x70,
- 0x02, 0xf0, 0x02, 0x03,
- 0x00, 0x0b, 0xe4, 0x80,
- 0x52, 0x03, 0xe0, 0x18,
- 0x8c, 0x0b, 0x60, 0x3c,
- 0xe8, 0x00, 0x55, 0x28,
- 0x84, 0x65, 0xa1, 0x0b,
- 0x80, 0x8b, 0x0b, 0x64,
- 0x8b, 0x91, 0x0d, 0x14,
- 0x02, 0x1b, 0x89, 0x04,
- 0x44, 0x18, 0xe1, 0xa8,
- 0x4c, 0x03, 0xef, 0xe0,
- 0x90, 0x0b, 0x60, 0x18,
- 0xc8, 0xf1, 0x1c, 0x8e,
- 0x0c, 0x0c, 0x9e, 0x9e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xbe, 0x7e, 0x8f, 0x04,
- 0x80, 0x63, 0xc2, 0x07,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0xe0, 0x38, 0x52, 0x03,
- 0xe0, 0x94, 0x16, 0x09,
- 0xc1, 0xc3, 0xeb, 0xb5,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x3b, 0x06, 0x6b,
- 0x44, 0x06, 0x02, 0x7b,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x57, 0xb8, 0x86, 0x1b,
- 0xa6, 0x7d, 0xef, 0xd0,
- 0xa9, 0x7b, 0x82, 0x25,
- 0xad, 0x7b, 0x80, 0xa5,
- 0xaf, 0x7b, 0x82, 0x25,
- 0x01, 0x85, 0x86, 0x95,
- 0xa5, 0x7b, 0x81, 0x01,
- 0xa7, 0x7b, 0x82, 0x85,
- 0x81, 0x01, 0x84, 0xd5,
- 0x4c, 0x03, 0xda, 0x0e,
- 0x02, 0x06, 0x60, 0x28,
- 0x4c, 0x13, 0xe1, 0x00,
- 0x81, 0xd5, 0xe0, 0x38,
- 0xda, 0x0e, 0x81, 0x01,
- 0xe0, 0x28, 0x4c, 0x03,
- 0x60, 0x30, 0x4c, 0x03,
- 0xe1, 0x00, 0x00, 0x06,
- 0xe0, 0x38, 0x4c, 0x03,
- 0xe0, 0x3c, 0x4c, 0x03,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0x44, 0x46, 0x02, 0x8b,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x54, 0x98, 0x8e, 0x1b,
- 0xad, 0x8b, 0xef, 0xd0,
- 0xe0, 0x0c, 0x10, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x80, 0x00, 0x00, 0x06,
- 0x80, 0x70, 0x4c, 0x01,
- 0xa5, 0x8b, 0x82, 0xe5,
- 0x01, 0x21, 0x82, 0xb5,
- 0xe4, 0x80, 0x00, 0x60,
- 0x60, 0x70, 0x4c, 0x21,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x0c, 0x0c, 0x99, 0x21,
- 0x13, 0x18, 0xf2, 0x0c,
- 0x0c, 0x0c, 0xff, 0xd0,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x8c, 0x35, 0xa5, 0x1b,
- 0x6f, 0xd1, 0x06, 0x09,
- 0x06, 0x19, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd9,
- 0x6f, 0xc9, 0x06, 0x29,
- 0x06, 0x59, 0xc0, 0x05,
- 0x40, 0x05, 0x6f, 0xcd,
- 0x48, 0x11, 0xa1, 0x0b,
- 0x48, 0x21, 0xe0, 0x34,
- 0x48, 0x51, 0xe0, 0x20,
- 0x48, 0x01, 0xe0, 0x24,
- 0x9a, 0xc5, 0xe0, 0x30,
- 0x67, 0xf9, 0x06, 0x05,
- 0x06, 0x1b, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x09,
- 0x60, 0x2d, 0x06, 0x29,
- 0x48, 0x05, 0xc0, 0x06,
- 0x48, 0x13, 0xe0, 0x10,
- 0x06, 0x05, 0xe0, 0xe0,
- 0xc0, 0x01, 0x68, 0x01,
- 0x60, 0x0d, 0x06, 0x1b,
- 0x48, 0x21, 0xc0, 0x03,
- 0x48, 0x05, 0xe2, 0x80,
- 0x48, 0x13, 0xe0, 0x40,
- 0x8b, 0x45, 0xe1, 0x10,
- 0x60, 0x3c, 0x06, 0x59,
- 0xf0, 0x88, 0x40, 0x32,
- 0x6e, 0x70, 0x00, 0x19,
- 0xe6, 0x80, 0x18, 0x40,
- 0x81, 0x71, 0x01, 0x61,
- 0xe0, 0x34, 0x48, 0x11,
- 0xea, 0x70, 0x00, 0x19,
- 0xe0, 0x20, 0x48, 0x11,
- 0xeb, 0x70, 0x00, 0x19,
- 0xe0, 0x24, 0x48, 0x11,
- 0xe6, 0x8a, 0x42, 0x5a,
- 0xec, 0x70, 0x00, 0x09,
- 0x60, 0x84, 0x04, 0x14,
- 0xe0, 0x88, 0x0a, 0x14,
- 0x10, 0x02, 0x86, 0x23,
- 0x00, 0x10, 0x6c, 0x30,
- 0xc0, 0x16, 0x67, 0x70,
- 0x67, 0x71, 0x02, 0x20,
- 0x04, 0x50, 0x40, 0x0f,
- 0xc0, 0x0b, 0x67, 0x71,
- 0x60, 0x30, 0x48, 0x81,
- 0xe5, 0x00, 0x0a, 0x40,
- 0x02, 0x9b, 0x85, 0x35,
- 0x50, 0x32, 0x7c, 0x18,
- 0x10, 0x85, 0xf0, 0x88,
- 0x40, 0x04, 0x78, 0x01,
- 0xf0, 0x98, 0x54, 0xc2,
- 0x78, 0x60, 0x54, 0x93,
- 0xf0, 0x98, 0x52, 0x12,
- 0x78, 0x30, 0x4a, 0x85,
- 0x06, 0x85, 0x84, 0x61,
- 0x88, 0x21, 0x7c, 0x08,
- 0xe4, 0x00, 0x12, 0x9b,
- 0x50, 0x32, 0x55, 0x8e,
- 0x54, 0x93, 0xf0, 0x9c,
- 0x52, 0xc2, 0x78, 0x30,
- 0x10, 0x89, 0xf0, 0x9c,
- 0x82, 0x71, 0x7c, 0x00,
- 0x08, 0x89, 0xa4, 0x86,
- 0x10, 0x84, 0xe0, 0x30,
- 0x91, 0x7d, 0xfa, 0x80,
- 0x0c, 0x4c, 0xf6, 0x75,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x8c, 0x04, 0x0c,
- 0x60, 0x38, 0x46, 0x11,
- 0x46, 0x21, 0x81, 0x51,
- 0x04, 0x30, 0x60, 0x3c,
- 0xc0, 0x01, 0x64, 0x70,
- 0x60, 0x18, 0x46, 0x53,
- 0x64, 0x70, 0x18, 0x30,
- 0x0c, 0x30, 0xc0, 0x02,
- 0x40, 0x02, 0x66, 0x71,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x81, 0x71, 0x03, 0x25,
- 0x79, 0x00, 0x44, 0x55,
- 0xf0, 0x9c, 0x50, 0x62,
- 0xf1, 0x5c, 0xc9, 0x5e,
- 0x63, 0x00, 0x50, 0x71,
- 0xa0, 0x56, 0x82, 0x71,
- 0xe1, 0x00, 0x50, 0x51,
- 0xe2, 0x00, 0x50, 0x51,
- 0xe4, 0x00, 0x50, 0x11,
- 0xe1, 0x00, 0x0e, 0x0a,
- 0x04, 0x30, 0xfa, 0xd5,
- 0x40, 0x16, 0x67, 0x71,
- 0xe0, 0x10, 0x18, 0x06,
- 0x49, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x18, 0xc0,
- 0xfe, 0x95, 0xa1, 0xcb,
- 0x67, 0xf1, 0x46, 0x55,
- 0x04, 0x06, 0x40, 0x01,
- 0x46, 0x55, 0xef, 0xf0,
- 0xc0, 0x01, 0x67, 0xed,
- 0x67, 0xe9, 0x46, 0x55,
- 0x46, 0x11, 0xc0, 0x01,
- 0x40, 0x05, 0x6f, 0xd9,
- 0x46, 0x23, 0x88, 0x1b,
- 0xc0, 0x02, 0x6f, 0xe9,
- 0x60, 0x2d, 0x46, 0x51,
- 0x0c, 0x0c, 0xc0, 0x06,
- 0x24, 0x38, 0xf0, 0x8c,
- 0xc1, 0xc3, 0xff, 0xd4,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0xe0, 0x18, 0x00, 0x79,
- 0xe0, 0x28, 0x00, 0x39,
- 0xe0, 0x20, 0x00, 0xc9,
- 0x08, 0x70, 0x06, 0x68,
- 0x4a, 0x3a, 0xec, 0x04,
- 0x00, 0x49, 0xe6, 0x92,
- 0x00, 0x89, 0xe0, 0x14,
- 0x52, 0x52, 0x60, 0x1c,
- 0x00, 0x59, 0xf0, 0xb0,
- 0x81, 0x01, 0x60, 0x24,
- 0xd2, 0x6d, 0x04, 0x18,
- 0x40, 0xc6, 0x08, 0x0e,
- 0x8e, 0x55, 0xe0, 0x00,
- 0xec, 0x04, 0x12, 0x40,
- 0xe6, 0xa6, 0x52, 0x5a,
- 0xd2, 0x1d, 0x90, 0x93,
- 0xd9, 0x6d, 0x8c, 0x75,
- 0xd1, 0x1d, 0x8c, 0x35,
- 0xa1, 0x3b, 0x8a, 0xf5,
- 0xa1, 0x5b, 0x8a, 0xa5,
- 0x52, 0xc2, 0x8a, 0x65,
- 0x12, 0x8a, 0xf9, 0xa0,
- 0x88, 0xd5, 0xf0, 0x00,
- 0x88, 0x95, 0xf0, 0x7d,
- 0x88, 0x55, 0xf4, 0x4d,
- 0xec, 0x08, 0x12, 0x40,
- 0xf4, 0xf4, 0x13, 0x0a,
- 0xe5, 0x7d, 0x86, 0xb5,
- 0x4e, 0x32, 0x86, 0x75,
- 0xa2, 0x7f, 0xf9, 0x94,
- 0x0e, 0x8a, 0xac, 0x7f,
- 0x84, 0x95, 0xf0, 0x00,
- 0x4e, 0x1a, 0xb0, 0x13,
- 0xa1, 0x7b, 0xe1, 0x16,
- 0xb8, 0x63, 0x82, 0xf5,
- 0xe1, 0x0e, 0x58, 0x6a,
- 0x82, 0x55, 0xa1, 0xcb,
- 0xe0, 0x0e, 0x40, 0x6a,
- 0xe0, 0x16, 0x42, 0x1a,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x08, 0x0e, 0x82, 0x03,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x80, 0xab, 0x3d, 0x04,
- 0x81, 0x91, 0x25, 0x5e,
- 0x84, 0x8b, 0x15, 0x4e,
- 0x16, 0x30, 0x13, 0x0e,
- 0x3b, 0x04, 0xe5, 0x20,
- 0xe0, 0x08, 0x0d, 0x06,
- 0x81, 0x71, 0x21, 0x1e,
- 0xa3, 0x0e, 0xa9, 0x9e,
- 0x27, 0x0e, 0xb9, 0x04,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1b, 0x0e, 0xc0, 0x02,
- 0x66, 0x01, 0x00, 0xa0,
- 0x19, 0x0e, 0xc0, 0x04,
- 0x67, 0x01, 0x00, 0xa0,
- 0x17, 0x0e, 0xc0, 0x06,
- 0x64, 0x01, 0x00, 0xa0,
- 0x1f, 0x0e, 0xc0, 0x09,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1d, 0x0e, 0xc0, 0x0b,
- 0x8d, 0x85, 0x81, 0x01,
- 0x98, 0x55, 0xa1, 0x0b,
- 0x78, 0x90, 0x16, 0x03,
- 0xac, 0x12, 0x94, 0x5b,
- 0xa7, 0x34, 0xa5, 0x24,
- 0x72, 0xf8, 0xa3, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa1, 0x34, 0x94, 0xf5,
- 0x16, 0x03, 0x9d, 0x44,
- 0xac, 0x12, 0xf8, 0x90,
- 0xe0, 0x30, 0x16, 0x23,
- 0x8b, 0x4e, 0x8c, 0x38,
- 0xa7, 0x54, 0x9f, 0x44,
- 0x97, 0x44, 0x89, 0x4e,
- 0x99, 0x44, 0xfe, 0x4e,
- 0x9b, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x74, 0x38, 0xa5, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0x93, 0x44, 0x8e, 0xf5,
- 0x16, 0x03, 0xa1, 0x34,
- 0x2c, 0x12, 0xf8, 0x90,
- 0xf0, 0xa4, 0x4a, 0x42,
- 0x60, 0x30, 0x16, 0x23,
- 0x8e, 0x38, 0x8c, 0x43,
- 0xe0, 0x51, 0x0f, 0x5e,
- 0x09, 0x4e, 0x8b, 0x5e,
- 0xe5, 0x40, 0x08, 0xf0,
- 0x9d, 0x44, 0xfe, 0x4e,
- 0xa7, 0x54, 0x91, 0x5e,
- 0x9f, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x79, 0x78, 0x95, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa9, 0x04, 0x88, 0x35,
- 0x11, 0x04, 0x8f, 0xc4,
- 0x00, 0x34, 0xa3, 0x0b,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x58, 0x35,
- 0xc0, 0x60, 0x58, 0x35,
- 0xa1, 0x44, 0x84, 0xb5,
- 0x16, 0x03, 0x93, 0x24,
- 0x50, 0x58, 0xf8, 0x90,
- 0xe5, 0x80, 0x08, 0xc0,
- 0x04, 0x23, 0xac, 0x12,
- 0x89, 0x4e, 0xfc, 0x18,
- 0xfe, 0xce, 0xa7, 0x44,
- 0xbe, 0x4e, 0xfc, 0xae,
- 0x3c, 0x4e, 0x95, 0x44,
- 0x6b, 0xd8, 0x83, 0x41,
- 0x02, 0x71, 0xef, 0xd8,
- 0x04, 0xb1, 0x88, 0x91,
- 0xa2, 0x18, 0x84, 0x61,
- 0xe4, 0xf5, 0x83, 0x7d,
- 0xe5, 0x50, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x84, 0xab, 0x06, 0xb8,
- 0x60, 0x10, 0x00, 0x23,
- 0x02, 0x14, 0x99, 0x41,
- 0x00, 0x0b, 0x81, 0x51,
- 0x3e, 0x0e, 0xe0, 0x14,
- 0xe7, 0x60, 0x00, 0x30,
- 0x41, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x08, 0x40,
- 0xfe, 0x95, 0xa1, 0x4b,
- 0x6c, 0x04, 0x00, 0x10,
- 0x7f, 0xfc, 0x49, 0xee,
- 0x3e, 0x04, 0xcf, 0xff,
- 0xe4, 0x10, 0x41, 0x4a,
- 0xe0, 0x04, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xec, 0x04, 0x00, 0x00,
- 0x6f, 0xf9, 0x01, 0x5a,
- 0x40, 0xc6, 0x40, 0x0f,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x17, 0x5a, 0xed, 0x80,
- 0x42, 0x0a, 0xe4, 0x30,
- 0x00, 0x06, 0xed, 0x80,
- 0xbc, 0x0e, 0xc0, 0x00,
- 0x80, 0x00, 0x13, 0xc8,
- 0x60, 0x0a, 0x40, 0x2e,
- 0xe7, 0x60, 0x12, 0x30,
- 0xe6, 0xa0, 0x10, 0x30,
- 0xe5, 0x02, 0x44, 0x1a,
- 0xe5, 0x82, 0x48, 0x1a,
- 0x02, 0x24, 0x09, 0x2e,
- 0x7e, 0x4e, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x44,
- 0xc3, 0x47, 0x20, 0x1f,
- 0x8b, 0x4e, 0xfc, 0x1e,
- 0x20, 0x12, 0xa5, 0x35,
- 0xa8, 0x34, 0x81, 0x01,
- 0x40, 0x1a, 0xa0, 0x1d,
- 0x42, 0x3a, 0xc6, 0x86,
- 0x40, 0x3a, 0xe5, 0x82,
- 0x04, 0x14, 0xe5, 0x02,
- 0x06, 0x20, 0xf6, 0x80,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x00, 0x5b, 0xe4, 0x7c,
- 0xfb, 0x8c, 0x48, 0x22,
- 0x6c, 0x7c, 0x06, 0x42,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x68, 0x8c, 0x18, 0x54,
- 0x4a, 0x00, 0x81, 0x51,
- 0x0c, 0x34, 0x1c, 0x00,
- 0x0e, 0x54, 0xec, 0x00,
- 0xa6, 0x43, 0x6f, 0x8c,
- 0x78, 0x9c, 0x4c, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xac, 0xcf, 0x0b, 0x64,
- 0x68, 0x90, 0x08, 0xc4,
- 0x48, 0x3b, 0xa7, 0x5f,
- 0x4d, 0x4a, 0xca, 0xcb,
- 0x4c, 0x1a, 0xe4, 0x0c,
- 0x8c, 0x3b, 0x60, 0x0c,
- 0x42, 0x0a, 0x7c, 0x64,
- 0x4d, 0x6a, 0xe5, 0x80,
- 0x42, 0x1a, 0xe4, 0x30,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x40, 0x52, 0xed, 0x80,
- 0x4e, 0x20, 0x50, 0x98,
- 0x08, 0xf5, 0xdc, 0x00,
- 0xd2, 0x8c, 0x42, 0x42,
- 0x08, 0x65, 0xa1, 0x2b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x6c, 0x04, 0x0e, 0x20,
- 0x0f, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0x02, 0x20, 0x1c, 0x00,
- 0x44, 0x72, 0xec, 0x84,
- 0x00, 0x06, 0x7b, 0x84,
- 0x02, 0x22, 0xc0, 0x00,
- 0x08, 0x04, 0xec, 0x7c,
- 0x0a, 0x14, 0x6f, 0x84,
- 0x22, 0x23, 0xec, 0x00,
- 0x23, 0x3f, 0xa3, 0x0f,
- 0xf8, 0x90, 0x48, 0x52,
- 0xa8, 0x3f, 0x0b, 0x14,
- 0x6c, 0x04, 0x04, 0x22,
- 0xa5, 0x3f, 0x8c, 0x03,
- 0xf2, 0x84, 0x42, 0x32,
- 0xfe, 0x34, 0x89, 0x24,
- 0xef, 0xcc, 0x47, 0x28,
- 0x00, 0x70, 0x00, 0x2b,
- 0x08, 0x70, 0xe4, 0x2c,
- 0x01, 0x0a, 0x6c, 0x54,
- 0x03, 0x31, 0xe4, 0x7c,
- 0xfb, 0x90, 0x48, 0x02,
- 0x00, 0x00, 0x06, 0x06,
- 0xe4, 0x80, 0x00, 0xca,
- 0x62, 0x00, 0x00, 0x0c,
- 0xec, 0x7c, 0x0a, 0x42,
- 0x6f, 0x94, 0x18, 0x04,
- 0xec, 0x00, 0x0c, 0x54,
- 0xab, 0x3f, 0x2a, 0x43,
- 0x78, 0xb0, 0x58, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xab, 0x0f, 0x38, 0x3f,
- 0x44, 0xaa, 0x29, 0x3f,
- 0x47, 0x1d, 0xe4, 0x00,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x42, 0x1a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xa1, 0x1b, 0x9e, 0xc5,
- 0xbe, 0x44, 0x8e, 0xf5,
- 0xf6, 0x80, 0x00, 0x24,
- 0xf6, 0x80, 0x02, 0x44,
- 0x02, 0x8a, 0x80, 0x13,
- 0x90, 0x75, 0xe4, 0x80,
- 0x64, 0x74, 0x0f, 0x0a,
- 0x9c, 0x15, 0x83, 0x41,
- 0xbd, 0x11, 0x3e, 0x04,
- 0x40, 0x2a, 0xae, 0x13,
- 0x04, 0x44, 0x66, 0x82,
- 0x02, 0x70, 0xe8, 0x84,
- 0x04, 0x20, 0x64, 0x08,
- 0xa3, 0x2f, 0xec, 0x04,
- 0xf8, 0x08, 0x46, 0x02,
- 0x98, 0xd5, 0x85, 0x3b,
- 0x6c, 0x80, 0x06, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x46, 0x12, 0x01, 0x21,
- 0x04, 0x16, 0xfb, 0x8c,
- 0x02, 0xca, 0x40, 0x00,
- 0x08, 0x0c, 0xe4, 0x80,
- 0x02, 0x32, 0x62, 0x00,
- 0x0a, 0x44, 0xec, 0x7c,
- 0x18, 0x14, 0x6f, 0x84,
- 0x22, 0x33, 0xec, 0x00,
- 0x4a, 0xc2, 0xa3, 0x2f,
- 0xa3, 0x4f, 0x78, 0x94,
- 0x06, 0x32, 0x2a, 0x2f,
- 0x27, 0x2f, 0xec, 0x04,
- 0x81, 0x11, 0x88, 0x03,
- 0x42, 0x22, 0x07, 0x55,
- 0x04, 0x0b, 0xf2, 0x84,
- 0xbe, 0x24, 0x81, 0x31,
- 0xef, 0xcc, 0x49, 0x68,
- 0x64, 0x08, 0x06, 0x70,
- 0x07, 0x0a, 0x81, 0x21,
- 0x01, 0xe5, 0xe4, 0x7c,
- 0xc0, 0x00, 0x04, 0x16,
- 0x64, 0x08, 0x06, 0x70,
- 0xe5, 0x12, 0x40, 0x2a,
- 0x65, 0x92, 0x42, 0x2a,
- 0xe4, 0x7c, 0x07, 0x0a,
- 0x04, 0x06, 0x83, 0x21,
- 0x08, 0x70, 0x80, 0x00,
- 0x06, 0xca, 0x6c, 0x78,
- 0x0a, 0x0c, 0xe4, 0x80,
- 0x48, 0x32, 0x62, 0x00,
- 0x06, 0x42, 0xfb, 0x90,
- 0x18, 0x54, 0xec, 0x7c,
- 0x0c, 0x34, 0x6f, 0x8c,
- 0x26, 0x43, 0xec, 0x00,
- 0x58, 0x62, 0xa7, 0x2f,
- 0xa7, 0x5f, 0x78, 0xb0,
- 0x08, 0x42, 0x38, 0x2f,
- 0x29, 0x2f, 0xec, 0x04,
- 0x42, 0x12, 0x8a, 0x03,
- 0x4c, 0x78, 0xf2, 0x88,
- 0x04, 0x70, 0x6f, 0xcc,
- 0x00, 0x8a, 0xe4, 0x0c,
- 0x41, 0xf6, 0xe7, 0xfc,
- 0xa1, 0x1b, 0x00, 0x0c,
- 0xc0, 0x0c, 0x41, 0xf6,
- 0x16, 0xb0, 0xa4, 0x06,
- 0x82, 0x91, 0x6c, 0x04,
- 0x84, 0x81, 0x08, 0xa1,
- 0x02, 0x44, 0x81, 0x95,
- 0x86, 0x71, 0x68, 0x84,
- 0xef, 0x0f, 0x82, 0x03,
- 0x00, 0x02, 0x7f, 0x45,
- 0xa1, 0xbb, 0xef, 0xfc,
- 0xdf, 0xfc, 0x2d, 0xd8,
- 0xb0, 0xf1, 0x3c, 0x04,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x80, 0xcb, 0x06, 0x1d,
- 0x7a, 0x0c, 0x4c, 0x12,
- 0xfb, 0x04, 0x42, 0x32,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf1, 0x84, 0x46, 0x62,
- 0x1c, 0x00, 0x44, 0x00,
- 0x67, 0x0f, 0xff, 0x01,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x69, 0x8c, 0x0e, 0xc4,
- 0xf8, 0x98, 0x40, 0x02,
- 0x84, 0x03, 0xae, 0x0f,
- 0x79, 0x08, 0x4c, 0x02,
- 0xf9, 0x30, 0x4e, 0x02,
- 0xa1, 0x6d, 0x8e, 0x6f,
- 0x04, 0x04, 0x84, 0xf5,
- 0xbf, 0x61, 0x70, 0x80,
- 0x46, 0x62, 0x63, 0x2f,
- 0x42, 0x29, 0xf1, 0x8c,
- 0x04, 0x24, 0xa7, 0xcf,
- 0x06, 0xc4, 0x76, 0x80,
- 0x04, 0x20, 0xfc, 0x7c,
- 0x42, 0x22, 0xec, 0x04,
- 0x22, 0x63, 0xf1, 0x84,
- 0x6d, 0x3f, 0xa3, 0x0f,
- 0x03, 0x35, 0x84, 0x1b,
- 0xa3, 0x1d, 0x86, 0x03,
- 0x41, 0xfc, 0x04, 0x24,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x02, 0x75, 0xdf, 0xff,
- 0xd0, 0x88, 0x40, 0x02,
- 0x60, 0x01, 0x06, 0x06,
- 0xc3, 0x07, 0x60, 0x00,
- 0x02, 0x10, 0x06, 0x2f,
- 0xa4, 0x0f, 0xec, 0x04,
- 0x94, 0x1e, 0x90, 0x0e,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x88, 0x9b, 0x1d, 0x34,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x50, 0x22, 0x06, 0x2d,
- 0x58, 0x90, 0xfa, 0x0c,
- 0x52, 0x00, 0x1c, 0x00,
- 0x21, 0x04, 0x9c, 0x00,
- 0xfb, 0x08, 0x46, 0x32,
- 0x71, 0x8c, 0x54, 0x82,
- 0x9c, 0x00, 0x4c, 0x50,
- 0x4a, 0x10, 0x7e, 0xce,
- 0x0d, 0x0e, 0x9c, 0x00,
- 0x1f, 0x04, 0x8c, 0x1b,
- 0x09, 0x5e, 0x94, 0x2b,
- 0x0b, 0x0e, 0x86, 0x8b,
- 0x43, 0x78, 0x98, 0x0b,
- 0x00, 0x7b, 0xef, 0xcc,
- 0x7f, 0x01, 0x82, 0xbb,
- 0x7c, 0xae, 0xff, 0x11,
- 0x42, 0xf8, 0x94, 0x2b,
- 0x09, 0xa4, 0xef, 0xcc,
- 0xe1, 0x7c, 0x04, 0x64,
- 0x78, 0x88, 0x40, 0x02,
- 0xf8, 0x88, 0x42, 0x12,
- 0xb6, 0x1f, 0x2e, 0x0f,
- 0x56, 0x02, 0x3e, 0x6e,
- 0x4e, 0x12, 0xf0, 0xa4,
- 0x40, 0x72, 0xf2, 0xa8,
- 0x42, 0x72, 0x79, 0x28,
- 0x82, 0x0f, 0xf9, 0x18,
- 0x98, 0x35, 0xa1, 0x0d,
- 0xe1, 0x7c, 0x02, 0x74,
- 0xf0, 0x84, 0x40, 0xb2,
- 0x72, 0x84, 0x44, 0x72,
- 0x44, 0x1f, 0xc2, 0x0f,
- 0x40, 0xf8, 0x90, 0x2b,
- 0x21, 0x1b, 0xef, 0xcc,
- 0x00, 0x14, 0xbf, 0xc1,
- 0x81, 0x11, 0x56, 0x80,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0xec, 0x04, 0x0c, 0x00,
- 0x44, 0x62, 0x7c, 0x84,
- 0x00, 0x20, 0xf1, 0xa0,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x48, 0x22, 0xe4, 0x7c,
- 0x42, 0xb0, 0x7b, 0x80,
- 0x00, 0x42, 0x9c, 0x00,
- 0x56, 0x70, 0x6c, 0x7c,
- 0x06, 0x14, 0x9c, 0x00,
- 0x0a, 0x04, 0x6f, 0x80,
- 0x46, 0x52, 0xec, 0x00,
- 0xa1, 0xbf, 0x78, 0x8c,
- 0x4e, 0xb2, 0x7e, 0xb4,
- 0x47, 0xf6, 0xf9, 0x8c,
- 0xb0, 0xc3, 0x60, 0x00,
- 0x71, 0xa0, 0x4a, 0x32,
- 0x0b, 0x0a, 0xa0, 0x43,
- 0x58, 0x52, 0x64, 0x7c,
- 0x1e, 0xb5, 0xfb, 0xb0,
- 0x96, 0x5b, 0x00, 0x04,
- 0x6c, 0x04, 0x10, 0x42,
- 0xec, 0x7c, 0x08, 0xc2,
- 0x40, 0x00, 0x0a, 0x06,
- 0xec, 0x00, 0x14, 0x44,
- 0x6f, 0x90, 0x12, 0x54,
- 0x10, 0x14, 0xb1, 0x7f,
- 0x40, 0xa2, 0x68, 0x80,
- 0x02, 0xb4, 0xf8, 0xa4,
- 0xa8, 0xc3, 0x68, 0x90,
- 0x00, 0xc2, 0x20, 0x1f,
- 0x21, 0x1f, 0xec, 0x04,
- 0xe8, 0x90, 0x00, 0x54,
- 0x7c, 0x7c, 0x02, 0x14,
- 0xf1, 0x88, 0x44, 0x32,
- 0xef, 0xc8, 0x7b, 0xe8,
- 0x03, 0xd5, 0x90, 0x03,
- 0xf2, 0x9c, 0x42, 0x12,
- 0xff, 0x01, 0x23, 0x8d,
- 0x02, 0x06, 0x82, 0xf5,
- 0x60, 0x00, 0x60, 0x01,
- 0xe0, 0xfc, 0x00, 0x74,
- 0xc3, 0x77, 0x43, 0xb7,
- 0xb6, 0x0f, 0x02, 0xaf,
- 0x79, 0xa8, 0x42, 0x72,
- 0xec, 0x04, 0x0c, 0x80,
- 0x7f, 0xa7, 0x81, 0xa5,
- 0x7f, 0xfd, 0x43, 0xfe,
- 0x01, 0x21, 0xdf, 0xff,
- 0x42, 0x22, 0x94, 0x03,
- 0x90, 0x6b, 0x72, 0x84,
- 0x88, 0x0e, 0x8b, 0x24,
- 0x0d, 0x04, 0x8a, 0x1e,
- 0x80, 0x6e, 0xb8, 0xf1,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x76, 0x80, 0x14, 0x24,
- 0xe0, 0x00, 0x48, 0xc6,
- 0xb4, 0x43, 0x19, 0x51,
- 0x09, 0x0a, 0x34, 0x53,
- 0x4a, 0x42, 0xe4, 0x7c,
- 0x81, 0xc1, 0x7b, 0x94,
- 0x6c, 0x7c, 0x08, 0x52,
- 0x9c, 0x00, 0x58, 0x00,
- 0x00, 0x00, 0x00, 0x06,
- 0xe4, 0xb0, 0x12, 0x10,
- 0x6f, 0x90, 0x02, 0xc4,
- 0xec, 0x00, 0x16, 0x44,
- 0x78, 0x84, 0x42, 0xb2,
- 0x28, 0x53, 0xa9, 0x0f,
- 0x02, 0x52, 0xa2, 0x0f,
- 0x86, 0xa3, 0x6c, 0x04,
- 0x68, 0x84, 0x02, 0x04,
- 0xe8, 0x90, 0x00, 0xc4,
- 0x6f, 0xc8, 0x5b, 0x08,
- 0x81, 0x81, 0x81, 0x31,
- 0xff, 0x21, 0x34, 0x93,
- 0x84, 0x9d, 0x1e, 0x1e,
- 0x82, 0x85, 0x9c, 0x0e,
- 0x12, 0x8a, 0x18, 0x9e,
- 0x8a, 0x55, 0xe0, 0xfc,
- 0x6f, 0xc8, 0x74, 0x28,
- 0xec, 0xf8, 0x04, 0x90,
- 0x51, 0xe6, 0x05, 0x25,
- 0x32, 0x2b, 0xe0, 0x00,
- 0x05, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0xc1, 0x11, 0x1c, 0x00,
- 0x42, 0x22, 0xb2, 0x13,
- 0x04, 0x12, 0xfb, 0x84,
- 0x08, 0x34, 0xec, 0x7c,
- 0x81, 0x31, 0x68, 0x88,
- 0x1c, 0x00, 0x46, 0x00,
- 0xec, 0x00, 0x0a, 0x24,
- 0x6f, 0x88, 0x00, 0x34,
- 0x40, 0x52, 0xa4, 0x13,
- 0x20, 0x4f, 0xf8, 0x80,
- 0xec, 0x04, 0x00, 0x12,
- 0x68, 0x80, 0x02, 0x44,
- 0xe8, 0x88, 0x00, 0x34,
- 0x9e, 0x1e, 0x9c, 0x0e,
- 0x0c, 0x4c, 0x98, 0x8e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x88, 0x7b, 0x52, 0xc4,
- 0xf0, 0x14, 0x0e, 0x65,
- 0xe6, 0x82, 0x52, 0x1a,
- 0x60, 0x90, 0x58, 0x0a,
- 0x04, 0x16, 0x83, 0xc1,
- 0xa1, 0x6b, 0x40, 0x00,
- 0x44, 0xc2, 0x0d, 0xb4,
- 0x12, 0x24, 0x91, 0x88,
- 0x42, 0x3a, 0xa3, 0x2b,
- 0x8f, 0xa4, 0xe6, 0x86,
- 0x08, 0x24, 0x11, 0x84,
- 0x19, 0xc4, 0x9b, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x10, 0x90, 0x4e, 0x72,
- 0xe0, 0x88, 0x08, 0x14,
- 0x0a, 0x70, 0x14, 0x7e,
- 0x2c, 0x5e, 0xe4, 0x10,
- 0x17, 0x64, 0x90, 0x71,
- 0xf0, 0x90, 0x4a, 0x72,
- 0x14, 0x90, 0x28, 0x5e,
- 0x0a, 0x94, 0xe4, 0x0c,
- 0x12, 0xa4, 0x60, 0x88,
- 0x7d, 0x97, 0xe1, 0x7c,
- 0xf0, 0x94, 0x56, 0x72,
- 0xf9, 0x71, 0x12, 0xa3,
- 0x70, 0x84, 0x52, 0xb2,
- 0x20, 0x9e, 0x8e, 0xaf,
- 0x10, 0x34, 0x94, 0xb3,
- 0x12, 0x04, 0x60, 0x88,
- 0x54, 0xb2, 0xe0, 0x88,
- 0x50, 0xb2, 0x70, 0xa0,
- 0x18, 0xae, 0xf0, 0xa4,
- 0x30, 0x3e, 0x90, 0x33,
- 0xe0, 0xe0, 0x44, 0x0a,
- 0x02, 0x06, 0x13, 0x34,
- 0x95, 0x24, 0xc0, 0x00,
- 0xc0, 0x00, 0x46, 0x15,
- 0x86, 0x01, 0x82, 0x95,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x80, 0x83, 0x8e, 0x0f,
- 0x8a, 0x83, 0x10, 0x43,
- 0x90, 0x13, 0x0c, 0x4e,
- 0x0c, 0x0c, 0x88, 0x1e,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0xab, 0x02, 0x7b,
- 0x61, 0x7c, 0x10, 0x74,
- 0x10, 0x03, 0x86, 0x6b,
- 0x52, 0x72, 0x84, 0xbb,
- 0x50, 0x9f, 0xf2, 0xa0,
- 0x10, 0x0b, 0xc0, 0x8f,
- 0x6c, 0x78, 0x92, 0x1b,
- 0xa1, 0x1b, 0xef, 0xc8,
- 0xd6, 0x80, 0x00, 0x14,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0x60, 0x80, 0x01, 0x0a,
- 0xec, 0x84, 0x02, 0x00,
- 0x82, 0x55, 0xa8, 0x1e,
- 0x41, 0xfe, 0x7f, 0x77,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0x81, 0x01, 0x00, 0x73,
- 0xa8, 0x0e, 0x98, 0x7e,
- 0x56, 0x1b, 0x85, 0x15,
- 0x82, 0x03, 0x90, 0x2b,
- 0x6c, 0x80, 0x02, 0x00,
- 0xe4, 0x7c, 0x01, 0x0a,
- 0x7b, 0x84, 0x40, 0x02,
- 0xc0, 0x00, 0x04, 0x06,
- 0x6c, 0x7c, 0x02, 0x02,
- 0x9c, 0x00, 0x50, 0x90,
- 0x6f, 0x84, 0x04, 0x24,
- 0xec, 0x00, 0x06, 0x14,
- 0x44, 0x32, 0x22, 0x03,
- 0x23, 0x8f, 0xf8, 0x88,
- 0xec, 0x04, 0x00, 0x02,
- 0xa1, 0x7d, 0x24, 0x8f,
- 0xe8, 0x80, 0x00, 0x84,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0c, 0x4c, 0x98, 0x0e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x0a, 0x6b,
- 0x61, 0x7c, 0x02, 0x64,
- 0xe1, 0x7c, 0x06, 0x74,
- 0x81, 0xa1, 0x02, 0x43,
- 0x58, 0x62, 0x11, 0xb4,
- 0x06, 0x03, 0xf2, 0x84,
- 0xf9, 0x04, 0x50, 0xc2,
- 0x72, 0x8c, 0x4a, 0x72,
- 0x58, 0x42, 0xc6, 0x0f,
- 0xc6, 0x5f, 0x79, 0x04,
- 0xe5, 0xb2, 0x42, 0x0a,
- 0xe5, 0x32, 0x46, 0x5a,
- 0xe5, 0xb2, 0x48, 0x5a,
- 0x42, 0x8a, 0x02, 0x33,
- 0x48, 0x42, 0xe5, 0x02,
- 0x52, 0x8a, 0x72, 0xa8,
- 0x06, 0x13, 0xe5, 0x82,
- 0xe5, 0x22, 0x46, 0x5a,
- 0x72, 0xa4, 0x48, 0x42,
- 0xe5, 0xa2, 0x4a, 0x5a,
- 0x70, 0x8c, 0x50, 0x42,
- 0xe5, 0x32, 0x40, 0x0a,
- 0xf2, 0xa8, 0x48, 0x52,
- 0xf9, 0x90, 0x46, 0x82,
- 0x8e, 0x85, 0xa1, 0x3b,
- 0x06, 0x44, 0x0f, 0x2e,
- 0x4a, 0x82, 0xe1, 0x7c,
- 0x58, 0x42, 0xf0, 0x8c,
- 0x07, 0xcb, 0xf2, 0x8c,
- 0x06, 0xc4, 0xc6, 0xcf,
- 0x90, 0xcb, 0x56, 0x80,
- 0x99, 0x0c, 0x4a, 0x52,
- 0x96, 0x80, 0x06, 0x54,
- 0x84, 0x80, 0x06, 0x30,
- 0xec, 0x04, 0x0a, 0x30,
- 0xe4, 0x7c, 0x0b, 0x0a,
- 0x1c, 0x00, 0x58, 0x40,
- 0xec, 0x84, 0x08, 0x30,
- 0x7b, 0x90, 0x4a, 0x52,
- 0xc0, 0x00, 0x10, 0x06,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6f, 0x90, 0x12, 0x84,
- 0xec, 0x00, 0x14, 0x44,
- 0x52, 0xa2, 0x29, 0xcf,
- 0x28, 0x53, 0xf8, 0xa4,
- 0x12, 0x16, 0xb2, 0xcf,
- 0x0a, 0x52, 0x60, 0x04,
- 0x26, 0x93, 0xec, 0x04,
- 0xe8, 0x94, 0x14, 0xc4,
- 0x92, 0x2b, 0x29, 0x8f,
- 0xef, 0xc8, 0x62, 0x48,
- 0xb4, 0x1f, 0x0f, 0x24,
- 0x81, 0xa1, 0x30, 0x0f,
- 0x01, 0xe5, 0x84, 0xb3,
- 0xa1, 0x1d, 0xb2, 0xb3,
- 0x56, 0xb2, 0x02, 0x65,
- 0x04, 0xb3, 0x90, 0x88,
- 0xe0, 0xfc, 0x06, 0x14,
- 0xc3, 0x17, 0x43, 0x07,
- 0x16, 0xb0, 0x26, 0x0f,
- 0x21, 0xbd, 0xec, 0x04,
- 0xe0, 0x00, 0x04, 0xb2,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0x04, 0x8a, 0xdf, 0xfc,
- 0xff, 0x81, 0x60, 0xfc,
- 0x60, 0x38, 0x80, 0xf5,
- 0x04, 0x20, 0x6f, 0xc8,
- 0x45, 0xe6, 0xec, 0xf8,
- 0x4e, 0x6f, 0xe0, 0x00,
- 0xf1, 0x80, 0x48, 0xa2,
- 0x90, 0x6d, 0x13, 0x54,
- 0x40, 0x40, 0x15, 0x44,
- 0x46, 0xa2, 0x9c, 0x00,
- 0x42, 0x30, 0xf3, 0x84,
- 0x96, 0x1e, 0x9c, 0x00,
- 0x90, 0x2e, 0x94, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x11, 0x58, 0x04,
- 0x6b, 0xc8, 0x04, 0xf6,
- 0x58, 0x18, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xc8,
- 0xc2, 0x17, 0x61, 0xfc,
- 0x7c, 0x7c, 0x00, 0x04,
- 0x84, 0x03, 0xa2, 0x2f,
- 0x7c, 0x7c, 0x02, 0x04,
- 0x00, 0x13, 0xff, 0x07,
- 0x70, 0x01, 0x00, 0x0e,
- 0x41, 0x1d, 0xcf, 0xff,
- 0xe1, 0xc0, 0x00, 0x14,
- 0x00, 0x00, 0x58, 0x1e,
- 0x80, 0x3f, 0x0f, 0xfd,
- 0x45, 0xf6, 0x5c, 0x14,
- 0x40, 0x22, 0xc3, 0xfc,
- 0x00, 0x9a, 0xd1, 0x80,
- 0xc0, 0x3f, 0x63, 0x4d,
- 0x20, 0x01, 0x00, 0xf8,
- 0xdd, 0x17, 0x40, 0x00,
- 0x6d, 0x8d, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x3e,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x14, 0x43, 0x06,
- 0x00, 0x9a, 0x8f, 0xa5,
- 0xc0, 0x3f, 0x61, 0xc9,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x3c, 0x6f, 0x2d,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x86, 0x66, 0x86,
- 0x8d, 0x95, 0xe0, 0x30,
- 0x61, 0xbd, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x3e,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x75, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x38,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x80, 0x03, 0x86,
- 0x00, 0x9a, 0x8b, 0x85,
- 0xc0, 0x3c, 0x60, 0x71,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x30, 0x6d, 0xf5,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x03, 0x86, 0x66, 0x86,
- 0x89, 0x75, 0xe1, 0x28,
- 0x61, 0xc9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x37,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6f, 0x29, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x24,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe2, 0x54, 0x03, 0x06,
- 0x00, 0x9a, 0x87, 0x65,
- 0xc0, 0x2f, 0x61, 0x49,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x16, 0x6f, 0xc9,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x06, 0x66, 0x86,
- 0x85, 0x55, 0xe4, 0x10,
- 0x63, 0xf9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x22,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x59, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x0a,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe6, 0x28, 0x42, 0x06,
- 0x07, 0x21, 0x83, 0x45,
- 0x62, 0xd9, 0x00, 0x9a,
- 0x42, 0x1a, 0xc0, 0x12,
- 0x40, 0x0a, 0xe6, 0x8a,
- 0x40, 0x00, 0x26, 0x87,
- 0x29, 0x59, 0x43, 0x06,
- 0x00, 0x00, 0xc0, 0x00,
- 0x80, 0x02, 0x2d, 0xb9,
- 0x26, 0x86, 0x40, 0x0a,
- 0xa8, 0x24, 0x02, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0xd1, 0x80, 0x00, 0x04,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0xe0, 0x30, 0x02, 0x29,
- 0xe0, 0x90, 0x44, 0x0a,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x42, 0x05,
- 0x84, 0x24, 0x80, 0xf5,
- 0x04, 0x16, 0xa1, 0x2b,
- 0x40, 0x22, 0x80, 0x00,
- 0x44, 0x2a, 0x91, 0x80,
- 0xe4, 0x50, 0x0c, 0x10,
- 0x81, 0x71, 0x23, 0x0b,
- 0xc4, 0x27, 0x81, 0x11,
- 0x90, 0x88, 0x4c, 0x62,
- 0x6f, 0xc8, 0x6c, 0x08,
- 0x98, 0x7e, 0x8c, 0x0b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x61, 0x1e, 0xf0,
- 0x13, 0x3e, 0xc0, 0x01,
- 0x0e, 0x09, 0x80, 0x7b,
- 0x81, 0x21, 0x60, 0x4c,
- 0x60, 0xbc, 0x5e, 0x25,
- 0x5e, 0x25, 0x88, 0x6b,
- 0x81, 0xa1, 0x60, 0xb4,
- 0x0a, 0xf0, 0x1d, 0x0e,
- 0xc0, 0x01, 0x64, 0x51,
- 0x5e, 0x25, 0xdc, 0x34,
- 0x5e, 0x25, 0xe0, 0xac,
- 0x5e, 0x25, 0xe0, 0x9c,
- 0xa1, 0x3b, 0x60, 0x8c,
- 0x06, 0x34, 0x3f, 0x2e,
- 0x5e, 0x25, 0xc1, 0x54,
- 0x5e, 0x25, 0xe1, 0x04,
- 0x5e, 0x25, 0xe1, 0x00,
- 0x5e, 0x25, 0xe0, 0xfc,
- 0x5e, 0x25, 0xe0, 0xf8,
- 0x5e, 0x25, 0xe0, 0xf4,
- 0x5e, 0x25, 0xe0, 0xf0,
- 0x5e, 0x25, 0xe0, 0xec,
- 0x5e, 0x25, 0xe0, 0xe8,
- 0x5e, 0x25, 0xe0, 0xe4,
- 0x5e, 0x25, 0xe0, 0xe0,
- 0x5e, 0x25, 0xe0, 0xdc,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x5e, 0x25, 0xe0, 0xd4,
- 0x5e, 0x25, 0xe0, 0xd0,
- 0x5e, 0x25, 0xe0, 0xcc,
- 0x5e, 0x25, 0xe0, 0xc8,
- 0x5e, 0x25, 0xe0, 0xc4,
- 0x5e, 0x25, 0xe0, 0xc0,
- 0x5e, 0x25, 0xe0, 0xb8,
- 0x5e, 0x25, 0xe0, 0xb0,
- 0x5e, 0x25, 0xe0, 0xa8,
- 0x5e, 0x25, 0xe0, 0xa4,
- 0x5e, 0x25, 0xe0, 0x98,
- 0x5e, 0x25, 0xe0, 0x94,
- 0x5e, 0x25, 0xe0, 0x88,
- 0xbd, 0x2e, 0xe0, 0x84,
- 0x44, 0x3a, 0xbb, 0x2e,
- 0x87, 0x31, 0x46, 0x8e,
- 0x80, 0x0c, 0x0e, 0x25,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x04, 0x24, 0x97, 0x1e,
- 0xa3, 0x2d, 0x81, 0x38,
- 0xc4, 0x00, 0x04, 0x06,
- 0x81, 0x21, 0x19, 0x2e,
- 0x93, 0x14, 0x98, 0x2e,
- 0x60, 0x20, 0x42, 0x31,
- 0x04, 0x2e, 0x81, 0x31,
- 0xe7, 0xc0, 0x02, 0xf0,
- 0x04, 0xf0, 0x0d, 0x1e,
- 0x0b, 0x2e, 0xe7, 0xd0,
- 0xe7, 0xe0, 0x02, 0xf0,
- 0x04, 0xf0, 0x09, 0x1e,
- 0x7e, 0x2e, 0xe7, 0xf0,
- 0x64, 0x01, 0x02, 0xf0,
- 0x7c, 0x1e, 0xc0, 0x01,
- 0x64, 0x11, 0x04, 0xf0,
- 0x3e, 0x2e, 0xc0, 0x01,
- 0x64, 0x31, 0x02, 0xf0,
- 0x3c, 0x1e, 0xc0, 0x01,
- 0x91, 0x0e, 0x83, 0x21,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x55, 0x88,
- 0xe1, 0x14, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x00, 0x3c, 0x58,
- 0xe1, 0x0c, 0x1e, 0x05,
- 0xa1, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x00, 0xb6,
- 0x80, 0x00, 0x4c, 0x05,
- 0x80, 0x00, 0x3b, 0xb8,
- 0x67, 0x60, 0x00, 0xf0,
- 0x64, 0x40, 0x0a, 0xf0,
- 0x0d, 0x0e, 0xc0, 0x01,
- 0xe7, 0x70, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe7, 0x80,
- 0xe7, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe7, 0xa0,
- 0xe7, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0xc0, 0x01, 0x64, 0x21,
- 0x81, 0x21, 0x3c, 0x0e,
- 0x81, 0x31, 0x11, 0x04,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x52, 0x48,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc1, 0x14, 0x1e, 0x05,
- 0xc0, 0x00, 0x00, 0x05,
- 0xc0, 0x00, 0x34, 0x28,
- 0x61, 0x08, 0x1e, 0x05,
- 0xe5, 0x80, 0x08, 0xf0,
- 0x61, 0x0c, 0x1e, 0x15,
- 0xe5, 0x70, 0x0a, 0xf0,
- 0x80, 0x04, 0x81, 0x31,
- 0x81, 0x11, 0x04, 0x24,
- 0xef, 0xfc, 0x4a, 0x68,
- 0x06, 0xf0, 0x33, 0x14,
- 0xb1, 0x04, 0xe5, 0x30,
- 0x7c, 0x3e, 0xaf, 0x24,
- 0xe5, 0x40, 0x06, 0xf0,
- 0x80, 0x4b, 0x3e, 0x3e,
- 0x82, 0x5b, 0x3c, 0x2e,
- 0xef, 0xfc, 0x5a, 0x28,
- 0x81, 0x61, 0x1b, 0x7e,
- 0x2f, 0xb8, 0x91, 0x54,
- 0x0e, 0x09, 0xe0, 0x00,
- 0x81, 0x11, 0x60, 0x40,
- 0xe0, 0x9c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x15,
- 0x40, 0x00, 0x3d, 0x1e,
- 0x1e, 0x05, 0xf3, 0xf8,
- 0xad, 0x0b, 0x60, 0xf4,
- 0xe0, 0x98, 0x5e, 0x15,
- 0xe0, 0x94, 0x5e, 0x15,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x84, 0x5e, 0x15,
- 0xbb, 0x1e, 0xbf, 0x1e,
- 0x88, 0xf5, 0x95, 0x6e,
- 0x60, 0xf0, 0x1e, 0x35,
- 0xe7, 0x10, 0x0c, 0xf0,
- 0x18, 0xf0, 0x00, 0x44,
- 0xab, 0x14, 0xe6, 0xc0,
- 0x7c, 0x6e, 0x8c, 0x30,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0xa9, 0x04, 0xbe, 0xce,
- 0xbc, 0x3e, 0xa7, 0x24,
- 0xef, 0xfc, 0x57, 0x28,
- 0x60, 0xb4, 0x1e, 0x15,
- 0xe7, 0x00, 0x06, 0xf0,
- 0x60, 0xb0, 0x1e, 0x05,
- 0x1e, 0x25, 0x8c, 0x4b,
- 0x51, 0xb8, 0xe0, 0xc4,
- 0x1e, 0x25, 0xef, 0xfc,
- 0x1e, 0x35, 0xe0, 0xdc,
- 0x1e, 0x05, 0xe0, 0xd8,
- 0x1e, 0x15, 0xe0, 0xc0,
- 0x81, 0x95, 0xe0, 0xc4,
- 0xe0, 0xf0, 0x1e, 0x15,
- 0xe0, 0xdc, 0x1e, 0x25,
- 0xe0, 0xd8, 0x1e, 0x35,
- 0x84, 0x10, 0x80, 0x04,
- 0x08, 0xf0, 0x08, 0x24,
- 0x0c, 0x30, 0xe5, 0xc0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0xef, 0xf8, 0x73, 0x48,
- 0x81, 0x91, 0x01, 0x81,
- 0x0e, 0x09, 0xa9, 0xd5,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0x75,
- 0x0c, 0xf0, 0x60, 0xf8,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x60, 0xfc,
- 0xab, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x29, 0x04,
- 0xa7, 0x24, 0xe1, 0x7c,
- 0x52, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x4d, 0x88,
- 0xe0, 0xe4, 0x1e, 0x25,
- 0xe0, 0xe0, 0x1e, 0x35,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0x1e, 0x05, 0x81, 0xd5,
- 0x1e, 0x15, 0xe0, 0xfc,
- 0x1e, 0x25, 0xe0, 0xf8,
- 0x1e, 0x35, 0xe0, 0xe4,
- 0x00, 0x05, 0xe0, 0xe0,
- 0x02, 0x11, 0xfc, 0x20,
- 0x04, 0x25, 0xfc, 0x24,
- 0x08, 0xf0, 0x7c, 0x20,
- 0x06, 0x31, 0xe7, 0x50,
- 0x0a, 0xf0, 0x7c, 0x24,
- 0x6e, 0xb8, 0xe7, 0x40,
- 0x1e, 0x25, 0xef, 0xf8,
- 0xa3, 0x2d, 0xe0, 0xd4,
- 0xdc, 0x04, 0x80, 0x95,
- 0x82, 0xc5, 0xa1, 0x0b,
- 0x60, 0xd0, 0x1e, 0x15,
- 0x08, 0xf0, 0x84, 0x0b,
- 0x0a, 0xf0, 0x67, 0x50,
- 0x19, 0x24, 0xe7, 0x40,
- 0x6d, 0x98, 0x9d, 0x31,
- 0x1e, 0x25, 0xef, 0xf8,
- 0x1e, 0x35, 0xe0, 0xd4,
- 0x08, 0xf0, 0x60, 0xd0,
- 0x0a, 0xf0, 0xe6, 0xa0,
- 0x83, 0x01, 0x66, 0x90,
- 0x6f, 0xf8, 0x7d, 0xe8,
- 0x0e, 0x09, 0x81, 0x11,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0xf5,
- 0x0c, 0xf0, 0x61, 0x00,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x61, 0x04,
- 0xb3, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x31, 0x04,
- 0xaf, 0x24, 0xe1, 0x7c,
- 0x4c, 0xb8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x47, 0x48,
- 0xe0, 0xec, 0x1e, 0x15,
- 0xe0, 0xe8, 0x1e, 0x25,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xfc, 0x20, 0x02, 0x45,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0xfc, 0x24, 0x04, 0x31,
- 0x1e, 0x05, 0x83, 0x15,
- 0x1e, 0x35, 0xe1, 0x04,
- 0x1e, 0x15, 0xe0, 0xe8,
- 0x1e, 0x25, 0xe0, 0xec,
- 0x00, 0x05, 0xe1, 0x00,
- 0x02, 0x45, 0xfc, 0x20,
- 0x04, 0x11, 0xfc, 0x20,
- 0x06, 0x31, 0xfc, 0x24,
- 0x28, 0x2b, 0xfc, 0x24,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x6f, 0xf8, 0x68, 0x48,
- 0xe7, 0x20, 0x0a, 0xf0,
- 0xa5, 0x8e, 0xa3, 0x9e,
- 0xa1, 0x0b, 0xdc, 0x04,
- 0x17, 0x14, 0x84, 0x25,
- 0x53, 0x38, 0x8e, 0x0b,
- 0x1e, 0x05, 0xef, 0xfc,
- 0x80, 0x2b, 0x60, 0xcc,
- 0x60, 0xc8, 0x1e, 0x15,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x67, 0x20, 0x0a, 0xf0,
- 0x66, 0xd8, 0x9d, 0x31,
- 0x1e, 0x65, 0xef, 0xf8,
- 0x12, 0xf0, 0x60, 0xcc,
- 0x1e, 0x35, 0xe7, 0x40,
- 0x0e, 0xf0, 0x60, 0xc8,
- 0xfc, 0x9e, 0xe6, 0xe0,
- 0x0a, 0x64, 0x3e, 0x7e,
- 0x1e, 0x15, 0xe1, 0x7c,
- 0x8c, 0x4b, 0x60, 0xac,
- 0xe0, 0xa8, 0x1e, 0x05,
- 0xe0, 0xa4, 0x1e, 0x25,
- 0xbc, 0x3e, 0x9f, 0x3e,
- 0x46, 0xf8, 0xa1, 0x5e,
- 0x1e, 0xb5, 0xef, 0xfc,
- 0x1e, 0x85, 0xe0, 0xbc,
- 0x1e, 0xa5, 0xe0, 0xb8,
- 0x96, 0x1b, 0xe0, 0xd0,
- 0x6d, 0x38, 0x90, 0x0b,
- 0x94, 0x2b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x67, 0x05, 0x00, 0xea,
- 0x42, 0x0a, 0xc9, 0x27,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0xa5, 0xed, 0x80,
- 0x72, 0x7d, 0x10, 0x06,
- 0x81, 0x01, 0x40, 0x02,
- 0x60, 0xb8, 0x5e, 0x85,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x81, 0xb1, 0x60, 0xbc,
- 0xe0, 0xd0, 0x5e, 0x05,
- 0x60, 0x9c, 0x1e, 0x15,
- 0xe6, 0x50, 0x06, 0xf0,
- 0x06, 0xf0, 0x7c, 0x3e,
- 0x3e, 0x3e, 0xe6, 0x60,
- 0x1e, 0x05, 0x90, 0x4b,
- 0x96, 0x5b, 0x60, 0x98,
- 0xe0, 0x94, 0x1e, 0x25,
- 0x66, 0xb8, 0xbc, 0xae,
- 0x1f, 0x34, 0xef, 0xf8,
- 0xfc, 0x9e, 0x8c, 0x4b,
- 0x1e, 0x15, 0xbe, 0x7e,
- 0x1e, 0x05, 0xe0, 0xbc,
- 0x1e, 0x25, 0xe0, 0xb8,
- 0xbc, 0x3e, 0xe0, 0xd0,
- 0x42, 0xb8, 0xa1, 0x54,
- 0x1e, 0x35, 0xef, 0xfc,
- 0x18, 0xf0, 0x60, 0xd0,
- 0x7c, 0xce, 0xe6, 0x10,
- 0xe6, 0x20, 0x18, 0xf0,
- 0x1e, 0x15, 0xbe, 0xce,
- 0x1e, 0x05, 0xe0, 0x8c,
- 0x1e, 0x25, 0xe0, 0x88,
- 0x1e, 0x55, 0xe0, 0x84,
- 0x1e, 0x45, 0xe0, 0xbc,
- 0xbc, 0x3e, 0xe0, 0xb8,
- 0xef, 0xf8, 0x64, 0x88,
- 0x60, 0xa4, 0x1e, 0x35,
- 0xe5, 0xd0, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe5, 0xe0,
- 0xbd, 0x04, 0xbf, 0x14,
- 0x1e, 0x55, 0xbb, 0x24,
- 0x1e, 0x45, 0xe0, 0xac,
- 0xbc, 0x3e, 0xe0, 0xa8,
- 0xef, 0xf8, 0x63, 0x68,
- 0xa5, 0x84, 0xa3, 0x94,
- 0x82, 0x91, 0x9b, 0x74,
- 0x9d, 0x04, 0x88, 0x81,
- 0x2b, 0x28, 0x93, 0x0b,
- 0x39, 0x44, 0xdf, 0xfc,
- 0xe5, 0xd0, 0x0c, 0xf0,
- 0x0e, 0xf0, 0x37, 0x34,
- 0xfc, 0x6e, 0xe5, 0xe0,
- 0x0a, 0x44, 0x3e, 0x7e,
- 0xbf, 0x14, 0xe1, 0x7c,
- 0xbb, 0x24, 0xbd, 0x04,
- 0x7e, 0xb8, 0xbc, 0x3e,
- 0x7c, 0x6e, 0xef, 0xf8,
- 0x3e, 0x7e, 0x81, 0x31,
- 0x3f, 0x14, 0x83, 0x41,
- 0xbd, 0x04, 0x81, 0x51,
- 0xbc, 0x3e, 0xbb, 0x24,
- 0xef, 0xf8, 0x61, 0x28,
- 0x81, 0x51, 0x39, 0x04,
- 0xbb, 0x94, 0xb7, 0x14,
- 0x3d, 0x44, 0xbf, 0x34,
- 0xe9, 0x84, 0x04, 0x04,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x37, 0x6e, 0xbe, 0x61,
- 0xf1, 0x84, 0x42, 0x62,
- 0x6c, 0x80, 0x04, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x7b, 0x88, 0x50, 0x12,
- 0x9c, 0x00, 0x4a, 0x00,
- 0x6c, 0x7c, 0x0e, 0x82,
- 0x81, 0x7c, 0x00, 0x04,
- 0x6f, 0x9c, 0x02, 0x54,
- 0xec, 0x00, 0x04, 0x74,
- 0x54, 0x22, 0x0c, 0x9d,
- 0x16, 0x04, 0xf8, 0x84,
- 0xae, 0x83, 0x68, 0x9c,
- 0x82, 0xa5, 0xa5, 0x5e,
- 0x71, 0x98, 0x44, 0x92,
- 0x62, 0x38, 0x88, 0x0b,
- 0x86, 0x1b, 0x6f, 0xc4,
- 0x82, 0x3b, 0x00, 0x4b,
- 0x8c, 0x9b, 0x3d, 0x4e,
- 0xbb, 0x6e, 0xbf, 0x3e,
- 0xb4, 0xbf, 0x37, 0x9d,
- 0x14, 0x82, 0x02, 0xf5,
- 0x04, 0x90, 0xec, 0x04,
- 0x88, 0x0b, 0x6c, 0x28,
- 0x6f, 0xc4, 0x61, 0x28,
- 0x00, 0x4b, 0x86, 0x1b,
- 0x3d, 0x4e, 0x95, 0x91,
- 0xbf, 0x3e, 0x82, 0x3b,
- 0x25, 0x24, 0xbb, 0x9e,
- 0xf9, 0x8c, 0x40, 0x42,
- 0x02, 0xb4, 0x21, 0x0b,
- 0x02, 0x35, 0xe8, 0xa8,
- 0xe8, 0x9c, 0x00, 0x24,
- 0x83, 0x41, 0x01, 0x21,
- 0x83, 0x21, 0x3f, 0x2e,
- 0x81, 0x31, 0x3d, 0x2e,
- 0x6f, 0xc4, 0x45, 0xa8,
- 0x3f, 0x1e, 0x88, 0x2b,
- 0x1e, 0x15, 0xb2, 0x63,
- 0x0e, 0xf0, 0x60, 0x9c,
- 0x1e, 0x35, 0xe6, 0x60,
- 0x1e, 0x25, 0xe0, 0x98,
- 0x3b, 0x6e, 0xe0, 0x94,
- 0xe6, 0x50, 0x0c, 0xf0,
- 0x86, 0x0b, 0x3d, 0x0e,
- 0x86, 0x4b, 0x7c, 0x6e,
- 0x82, 0x5b, 0x3e, 0x7e,
- 0x77, 0x58, 0xbc, 0x2e,
- 0xbb, 0x34, 0xef, 0xf8,
- 0xbe, 0x7e, 0xfc, 0x6e,
- 0xe0, 0x9c, 0x1e, 0x15,
- 0xe0, 0x98, 0x1e, 0x05,
- 0xe0, 0x94, 0x1e, 0x25,
- 0xbd, 0x44, 0xbf, 0x54,
- 0x76, 0x78, 0xbc, 0x3e,
- 0x1e, 0x35, 0xef, 0xf8,
- 0x81, 0x71, 0x60, 0x98,
- 0xe0, 0x9c, 0x1e, 0x55,
- 0xe0, 0x8c, 0x1e, 0x15,
- 0x60, 0x94, 0x1e, 0x35,
- 0xf1, 0x8c, 0x48, 0x72,
- 0x73, 0x94, 0x4a, 0x72,
- 0xe6, 0x10, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe6, 0x20,
- 0xe0, 0x88, 0x1e, 0x05,
- 0xe0, 0x84, 0x1e, 0x25,
- 0x57, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x65, 0xef, 0xf8,
- 0xff, 0x01, 0x60, 0x8c,
- 0xe0, 0x84, 0x1e, 0x85,
- 0x1e, 0x95, 0x80, 0x6d,
- 0x0c, 0x06, 0x40, 0x88,
- 0x5e, 0x75, 0x80, 0x00,
- 0x8c, 0x1b, 0x00, 0x8c,
- 0x00, 0x88, 0x5e, 0x75,
- 0x12, 0x06, 0x90, 0x2b,
- 0x5a, 0x78, 0x80, 0x00,
- 0x92, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x64, 0x01, 0x00, 0xea,
- 0x42, 0x0a, 0xc1, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0x25, 0xed, 0x80,
- 0x60, 0x8c, 0x5e, 0x75,
- 0x5e, 0x05, 0xff, 0x01,
- 0x81, 0xa1, 0x60, 0x88,
- 0xff, 0x01, 0x03, 0x05,
- 0xe0, 0x44, 0x10, 0x8a,
- 0x04, 0x80, 0x82, 0xf5,
- 0x92, 0x0b, 0x6c, 0x40,
- 0x6f, 0xc4, 0x58, 0x88,
- 0x81, 0xa1, 0x8c, 0x1b,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x05,
- 0x91, 0x54, 0x9b, 0x74,
- 0x21, 0x01, 0x85, 0x55,
- 0x30, 0x03, 0xe1, 0x11,
- 0x44, 0x02, 0xb0, 0x13,
- 0x01, 0x0a, 0x7b, 0x84,
- 0x12, 0x1b, 0xe4, 0x7c,
- 0xec, 0x7c, 0x00, 0x22,
- 0x40, 0x00, 0x02, 0x06,
- 0x9c, 0x00, 0x52, 0x60,
- 0x6f, 0x80, 0x06, 0x14,
- 0xec, 0x00, 0x08, 0x04,
- 0xa1, 0x9f, 0x20, 0x23,
- 0x46, 0x42, 0x11, 0x54,
- 0x26, 0x9f, 0xf8, 0x8c,
- 0xec, 0x04, 0x04, 0x22,
- 0x00, 0x14, 0x1b, 0x74,
- 0x25, 0x9f, 0xe8, 0x80,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x5e, 0x95, 0xe0, 0x88,
- 0x95, 0x64, 0xe0, 0x8c,
- 0x1e, 0x25, 0x93, 0x34,
- 0x1e, 0x45, 0xe1, 0x04,
- 0x02, 0x64, 0x60, 0xf8,
- 0x1e, 0x35, 0xe0, 0x88,
- 0x86, 0x13, 0x61, 0x00,
- 0x82, 0x61, 0x46, 0x0e,
- 0x1e, 0x15, 0x9d, 0xc4,
- 0x00, 0xc4, 0xe0, 0xfc,
- 0x98, 0x33, 0x60, 0x88,
- 0x80, 0x13, 0x00, 0x23,
- 0x61, 0x04, 0x5e, 0x25,
- 0x1e, 0x25, 0x98, 0x43,
- 0x5e, 0x35, 0xe0, 0xf4,
- 0x1e, 0x35, 0xe1, 0x00,
- 0x5e, 0x15, 0xe0, 0xf0,
- 0x88, 0x21, 0x60, 0xfc,
- 0xe0, 0xec, 0x1e, 0x15,
- 0x60, 0xf4, 0x5e, 0x25,
- 0x1e, 0x25, 0x82, 0x31,
- 0x5e, 0x45, 0xe0, 0xe4,
- 0x80, 0x13, 0x60, 0xf8,
- 0xe0, 0xe8, 0x1e, 0x45,
- 0x60, 0xdc, 0x1e, 0x05,
- 0x5e, 0x35, 0x80, 0x23,
- 0x1e, 0x35, 0xe0, 0xf0,
- 0x98, 0x43, 0x60, 0xe0,
- 0x60, 0xec, 0x5e, 0x15,
- 0x1e, 0x15, 0x88, 0x01,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x98, 0x33, 0x60, 0xe4,
- 0x60, 0xe8, 0x5e, 0x45,
- 0x5e, 0x35, 0xa1, 0x21,
- 0x82, 0x11, 0x60, 0xe0,
- 0xe0, 0x84, 0x5e, 0x25,
- 0xe0, 0xdc, 0x5e, 0x05,
- 0xe0, 0xd8, 0x5e, 0x15,
- 0x10, 0x68, 0x8b, 0x6b,
- 0x13, 0x04, 0xdf, 0xfc,
- 0x01, 0xb5, 0x81, 0x11,
- 0x41, 0x24, 0x98, 0x01,
- 0xec, 0x04, 0x0a, 0x50,
- 0x45, 0x4a, 0x9e, 0x34,
- 0x04, 0x0c, 0xe4, 0x0c,
- 0x84, 0x13, 0xe2, 0x00,
- 0xfc, 0xd5, 0xa1, 0x5b,
- 0xe0, 0x58, 0x0e, 0x09,
- 0x1e, 0x05, 0x93, 0x34,
- 0x81, 0x1d, 0x61, 0x14,
- 0xe2, 0x00, 0x04, 0x0c,
- 0x8e, 0xae, 0x8c, 0x2e,
- 0x46, 0x11, 0x80, 0x04,
- 0x89, 0x11, 0x60, 0x24,
- 0xa5, 0x0b, 0x93, 0x24,
- 0xc0, 0x00, 0x02, 0x66,
- 0xe0, 0x20, 0x44, 0x11,
- 0xa5, 0x0b, 0x17, 0x34,
- 0x93, 0x14, 0x86, 0x45,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xce, 0x14, 0x80, 0xe5,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x00, 0x30, 0x0e, 0x25,
- 0x0e, 0x19, 0x84, 0x30,
- 0xad, 0x1b, 0xe0, 0x40,
- 0x40, 0x0c, 0x06, 0x15,
- 0xc4, 0x30, 0x00, 0x30,
- 0xab, 0x0b, 0x8a, 0xf5,
- 0x80, 0x0c, 0x06, 0x05,
- 0x9c, 0x94, 0x00, 0x04,
- 0x80, 0x0c, 0x46, 0x05,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xa5, 0x1b, 0x80, 0x14,
- 0x0e, 0x19, 0x82, 0x75,
- 0x04, 0x10, 0xe0, 0x40,
- 0xa1, 0x1b, 0x6c, 0x18,
- 0xe4, 0x08, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xce, 0x14, 0x88, 0xf5,
- 0xe0, 0x44, 0x0e, 0x29,
- 0xf0, 0xc0, 0x42, 0x10,
- 0x44, 0x10, 0x29, 0x2b,
- 0xce, 0x2e, 0xfc, 0x04,
- 0x80, 0x04, 0x80, 0xf5,
- 0x42, 0x10, 0xa5, 0x0b,
- 0x46, 0x15, 0x9c, 0x0c,
- 0xce, 0x14, 0x80, 0x0c,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x00, 0x30, 0x82, 0x05,
- 0x89, 0x21, 0x64, 0x30,
- 0x91, 0x21, 0x81, 0x25,
- 0x80, 0x1e, 0xa4, 0x1f,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x42, 0x01, 0x93, 0x14,
- 0x1e, 0xf0, 0xe0, 0x28,
- 0xc0, 0x01, 0x64, 0x61,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xa3, 0x1b, 0xdd, 0x93,
- 0x93, 0x14, 0xfa, 0x35,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xfd, 0x45, 0xf4, 0xa5,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x82, 0x9b, 0x23, 0x3e,
- 0xe0, 0x98, 0x1e, 0x35,
- 0xa5, 0x0e, 0xab, 0x4e,
- 0x06, 0x19, 0xa7, 0x3e,
- 0x1e, 0xb5, 0xe0, 0x90,
- 0x00, 0x89, 0xe0, 0xa8,
- 0x80, 0x13, 0xe0, 0x48,
- 0x60, 0x70, 0x02, 0x61,
- 0xac, 0x1e, 0x81, 0x11,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x4c, 0x00, 0x19,
- 0xa9, 0x1e, 0xe6, 0x24,
- 0x60, 0x50, 0x00, 0xa9,
- 0xe0, 0x80, 0x44, 0x0a,
- 0x97, 0x5e, 0xce, 0x78,
- 0x24, 0x14, 0x82, 0xe5,
- 0xe0, 0x84, 0x44, 0x1a,
- 0x02, 0x0c, 0xa1, 0x1b,
- 0xa4, 0x1e, 0xe2, 0x00,
- 0xa0, 0x00, 0x00, 0x78,
- 0x92, 0x1b, 0x01, 0x01,
- 0xef, 0xf8, 0x74, 0xe8,
- 0x44, 0x0a, 0xe6, 0x24,
- 0x00, 0x16, 0xe0, 0x88,
- 0x42, 0x90, 0x40, 0x00,
- 0x74, 0x58, 0xdc, 0x00,
- 0x00, 0xf0, 0xcf, 0xf8,
- 0x0a, 0xf0, 0x65, 0x60,
- 0x0d, 0x0e, 0xe5, 0xd0,
- 0xe5, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe5, 0x70,
- 0xe5, 0xa0, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe5, 0x80,
- 0xe5, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0x3c, 0x0e, 0xe5, 0xc0,
- 0x29, 0x14, 0x83, 0x21,
- 0x0c, 0x3b, 0x94, 0x0b,
- 0x52, 0x78, 0x92, 0x4b,
- 0x66, 0x04, 0xef, 0xf8,
- 0xe1, 0x31, 0x81, 0x11,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0xc0, 0x74, 0x1e, 0x05,
- 0xc0, 0x00, 0x40, 0x15,
- 0x12, 0x05, 0xa7, 0x44,
- 0x08, 0x19, 0xc0, 0x0c,
- 0x86, 0x0f, 0xe0, 0x94,
- 0x25, 0x54, 0xe6, 0x0e,
- 0xfc, 0x10, 0x44, 0x10,
- 0x1f, 0xe8, 0xab, 0x2b,
- 0x15, 0x9e, 0xc0, 0x00,
- 0x1c, 0x08, 0xa1, 0x6d,
- 0xbb, 0x04, 0xc0, 0x00,
- 0xa5, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x1f, 0x58,
- 0x60, 0xa0, 0x1e, 0x05,
- 0x14, 0x70, 0xc8, 0x77,
- 0x00, 0x25, 0xe4, 0x40,
- 0x94, 0x04, 0xe0, 0x10,
- 0xff, 0x01, 0x00, 0x23,
- 0x00, 0x24, 0x80, 0x2d,
- 0x52, 0x0a, 0xc1, 0xac,
- 0x82, 0x15, 0xc1, 0x2a,
- 0xd7, 0x07, 0xa4, 0x0b,
- 0x40, 0x0a, 0xa0, 0x0b,
- 0x12, 0x00, 0xe1, 0xaa,
- 0x0a, 0x09, 0xec, 0x04,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x44, 0x20, 0xe0, 0x94,
- 0x40, 0x07, 0x13, 0xfd,
- 0xc0, 0xc0, 0x06, 0x94,
- 0x40, 0x28, 0x1e, 0x25,
- 0xd9, 0x88, 0x46, 0x32,
- 0x40, 0x08, 0x44, 0x35,
- 0x0a, 0x19, 0xab, 0x1b,
- 0x08, 0x25, 0x80, 0x68,
- 0xab, 0x34, 0xe0, 0x18,
- 0x52, 0x92, 0x23, 0x14,
- 0x0c, 0x24, 0x90, 0x84,
- 0x84, 0x18, 0xe1, 0x20,
- 0xa7, 0x1b, 0x52, 0x18,
- 0x06, 0x29, 0x82, 0x15,
- 0x85, 0x1b, 0xe0, 0x2c,
- 0x06, 0x29, 0x84, 0x15,
- 0x81, 0x75, 0xe0, 0x28,
- 0xe0, 0x24, 0x06, 0x29,
- 0x82, 0x35, 0x85, 0x1b,
- 0xe0, 0x20, 0x06, 0x29,
- 0x82, 0x11, 0x02, 0x21,
- 0x4c, 0x2a, 0x9f, 0x1e,
- 0x81, 0x35, 0xe6, 0x9a,
- 0x9f, 0x1e, 0x83, 0x11,
- 0x88, 0x25, 0xa1, 0x6b,
- 0x02, 0x64, 0x1f, 0x24,
- 0x83, 0x2d, 0xe0, 0x84,
- 0x08, 0x15, 0x86, 0x85,
- 0x40, 0x0a, 0x60, 0x20,
- 0x9d, 0x6e, 0xe0, 0x88,
- 0xe6, 0xa2, 0x46, 0x1a,
- 0x84, 0xd5, 0x9b, 0x3e,
- 0x40, 0x3a, 0x9f, 0x24,
- 0x81, 0x31, 0x66, 0xa2,
- 0x60, 0x0a, 0x44, 0x2e,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x77, 0x58, 0x93, 0x2e,
- 0x04, 0x14, 0xef, 0xc0,
- 0xa1, 0x2b, 0xe1, 0x94,
- 0x0c, 0x24, 0x8e, 0x25,
- 0x87, 0xe5, 0xf6, 0x80,
- 0xac, 0x0e, 0x89, 0x01,
- 0x1f, 0x04, 0xb1, 0x55,
- 0xe1, 0x94, 0x02, 0x34,
- 0x76, 0x80, 0x02, 0x14,
- 0xe0, 0x00, 0x44, 0x06,
- 0x8e, 0xbb, 0x1f, 0x74,
- 0x76, 0x80, 0x00, 0x04,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x00, 0x10, 0x20, 0x23,
- 0x19, 0x2e, 0xec, 0x18,
- 0x33, 0x44, 0x80, 0x2d,
- 0x91, 0x88, 0x42, 0x02,
- 0x08, 0x84, 0x00, 0x34,
- 0x84, 0x14, 0x02, 0x10,
- 0x51, 0x80, 0x42, 0x22,
- 0xc0, 0x00, 0x04, 0x56,
- 0x00, 0x34, 0x2d, 0x34,
- 0x40, 0x0a, 0xc9, 0x04,
- 0x42, 0x22, 0x66, 0x9e,
- 0xbd, 0x1e, 0xd1, 0x84,
- 0x8c, 0x30, 0x90, 0x24,
- 0xe0, 0x9a, 0x40, 0x0a,
- 0xef, 0xf4, 0x6f, 0xc8,
- 0xad, 0x14, 0xbd, 0x04,
- 0x40, 0x7e, 0x84, 0x06,
- 0x93, 0x0e, 0xe0, 0x1e,
- 0x04, 0x04, 0x8d, 0xa5,
- 0x06, 0x14, 0x61, 0x94,
- 0xa6, 0x2f, 0xe0, 0xec,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x04, 0x60, 0xc0, 0x61,
- 0x80, 0x4b, 0x6c, 0x14,
- 0x64, 0x7c, 0x05, 0x0a,
- 0x48, 0x10, 0x8e, 0xbb,
- 0x02, 0x60, 0x1c, 0x00,
- 0x1d, 0x74, 0xec, 0x94,
- 0xfb, 0x84, 0x42, 0x22,
- 0xec, 0x7c, 0x06, 0x12,
- 0x68, 0x8c, 0x0a, 0x44,
- 0x48, 0x00, 0x81, 0x41,
- 0x18, 0x34, 0x1c, 0x00,
- 0x00, 0x44, 0xec, 0x00,
- 0x44, 0x7a, 0x6f, 0x8c,
- 0x40, 0xc2, 0xe6, 0xaa,
- 0xa6, 0x13, 0x78, 0x80,
- 0x00, 0x12, 0x20, 0x5f,
- 0x02, 0x54, 0xec, 0x04,
- 0x00, 0x44, 0x68, 0x80,
- 0x44, 0x2a, 0xe8, 0x8c,
- 0x81, 0x31, 0x66, 0x9e,
- 0xef, 0xc0, 0x67, 0x28,
- 0x80, 0x2b, 0x27, 0x04,
- 0xab, 0x2e, 0xc0, 0x08,
- 0x4e, 0x62, 0xa3, 0x1e,
- 0x84, 0x0b, 0x71, 0x80,
- 0x6f, 0xc0, 0x75, 0xe8,
- 0x1d, 0x64, 0x8e, 0x2b,
- 0x00, 0x14, 0xa1, 0x1b,
- 0x00, 0x04, 0xd6, 0x80,
- 0x00, 0x00, 0x96, 0x80,
- 0xae, 0x03, 0x84, 0x80,
- 0xe0, 0x80, 0x01, 0x0a,
- 0xc0, 0x54, 0x1e, 0x05,
- 0x42, 0x16, 0x82, 0x95,
- 0x2b, 0x04, 0xe0, 0x00,
- 0xf1, 0x80, 0x44, 0x12,
- 0xa3, 0x14, 0xa1, 0x2e,
- 0xef, 0xc0, 0x74, 0x68,
- 0xa2, 0x73, 0xa1, 0x14,
- 0x0a, 0xf0, 0x33, 0x44,
- 0xad, 0x14, 0xe5, 0xe0,
- 0x90, 0x24, 0xbd, 0x7e,
- 0x8e, 0x1b, 0x04, 0x30,
- 0xef, 0xf4, 0x69, 0x68,
- 0x46, 0x06, 0x1f, 0x24,
- 0xbd, 0x04, 0xe0, 0x00,
- 0x04, 0x24, 0xad, 0x14,
- 0xa4, 0x33, 0xf6, 0x80,
- 0x99, 0x3e, 0x84, 0x06,
- 0x60, 0x9c, 0x1e, 0x05,
- 0x25, 0x54, 0x9e, 0xb1,
- 0xa7, 0x44, 0x81, 0xc1,
- 0x40, 0x6a, 0xab, 0x0e,
- 0x92, 0x6b, 0x66, 0x9a,
- 0x93, 0xb5, 0x91, 0x0e,
- 0xf0, 0x84, 0x44, 0x92,
- 0x04, 0x0c, 0xd5, 0x2d,
- 0x0a, 0x29, 0xe2, 0x00,
- 0xa4, 0x0f, 0x60, 0x64,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x44, 0x4a, 0x80, 0x85,
- 0x86, 0x65, 0xe0, 0x90,
- 0xe1, 0x7c, 0x06, 0x64,
- 0x06, 0x63, 0x96, 0x3f,
- 0x95, 0x6d, 0x94, 0x3b,
- 0x40, 0x00, 0x06, 0x06,
- 0xe0, 0x8c, 0x44, 0x0a,
- 0x40, 0x54, 0x1e, 0x35,
- 0x04, 0x64, 0xa6, 0x63,
- 0x44, 0x22, 0xe0, 0x88,
- 0x04, 0x20, 0xd0, 0x8c,
- 0xc0, 0x09, 0x04, 0x01,
- 0x90, 0x90, 0x44, 0x22,
- 0x84, 0xa0, 0x04, 0x20,
- 0x84, 0x73, 0x88, 0x24,
- 0x82, 0x11, 0x02, 0x61,
- 0xf4, 0xb5, 0x83, 0x8b,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x0a, 0x09, 0x80, 0xc5,
- 0x40, 0x4a, 0xe0, 0x64,
- 0x98, 0xa5, 0xe0, 0x90,
- 0x00, 0x74, 0x1b, 0x14,
- 0x19, 0x34, 0xe0, 0x94,
- 0xe0, 0x88, 0x0a, 0xc4,
- 0xa2, 0x03, 0xb7, 0x44,
- 0xf0, 0x80, 0x04, 0x04,
- 0xe1, 0x94, 0x02, 0x24,
- 0xf6, 0x80, 0x02, 0x14,
- 0xec, 0x18, 0x02, 0x10,
- 0x42, 0x12, 0x82, 0x3d,
- 0x04, 0x24, 0x91, 0x8c,
- 0x02, 0x10, 0x08, 0x84,
- 0x42, 0x32, 0x84, 0x14,
- 0x06, 0x56, 0x51, 0x84,
- 0x04, 0x24, 0xc0, 0x00,
- 0x42, 0x32, 0x49, 0x04,
- 0x1f, 0x34, 0xd1, 0x84,
- 0x9d, 0x04, 0xa1, 0x0d,
- 0x44, 0x2a, 0xbd, 0x1e,
- 0xb1, 0x34, 0xe6, 0x8e,
- 0xe0, 0x82, 0x40, 0x2a,
- 0x7c, 0x14, 0x08, 0x25,
- 0x06, 0x31, 0x8a, 0x43,
- 0x21, 0x5e, 0xfc, 0x30,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0a, 0xf0, 0x23, 0xce,
- 0x61, 0x78, 0xe5, 0xe0,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xb1, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0xe0, 0x64, 0x0a, 0x09,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x93, 0x04, 0x88, 0x85,
- 0xb5, 0x44, 0xa1, 0x24,
- 0xe6, 0x9e, 0x40, 0x0a,
- 0x84, 0x7b, 0x2f, 0x34,
- 0xf6, 0x80, 0x02, 0x04,
- 0xa4, 0x1d, 0x11, 0x54,
- 0x80, 0x00, 0x02, 0x06,
- 0xcc, 0x08, 0x02, 0x10,
- 0xa3, 0x0f, 0x3d, 0x1e,
- 0x7c, 0x1c, 0x08, 0x25,
- 0x40, 0x0a, 0x8e, 0x43,
- 0x0a, 0xf0, 0x60, 0x16,
- 0x06, 0x31, 0xe5, 0xe0,
- 0x5e, 0xf8, 0xfc, 0x30,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xaf, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0x90, 0x93, 0x02, 0xc1,
- 0x81, 0xcb, 0xa9, 0x04,
- 0x40, 0x00, 0x0e, 0x06,
- 0xc0, 0x00, 0x02, 0x06,
- 0x00, 0x06, 0x62, 0x55,
- 0x97, 0x14, 0xc0, 0x00,
- 0x0a, 0x49, 0xb9, 0x34,
- 0x84, 0x08, 0xe0, 0x54,
- 0x8c, 0x24, 0x86, 0x18,
- 0xe6, 0x82, 0x40, 0x1a,
- 0xe4, 0x04, 0x02, 0x20,
- 0xe6, 0x92, 0x48, 0x0a,
- 0x89, 0x1b, 0x8c, 0x1e,
- 0x3b, 0x04, 0x80, 0xd5,
- 0x80, 0x1e, 0x85, 0x11,
- 0x83, 0x65, 0x95, 0x34,
- 0xa1, 0x2d, 0x15, 0x34,
- 0xa1, 0x0b, 0x84, 0x75,
- 0x0a, 0x29, 0x84, 0x25,
- 0x04, 0x24, 0xe0, 0x40,
- 0x04, 0x0a, 0xfc, 0x00,
- 0x82, 0x55, 0xf0, 0x18,
- 0xe1, 0x82, 0x40, 0x1a,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x02, 0x56, 0x00, 0x74,
- 0x40, 0x15, 0x80, 0x00,
- 0x0a, 0x09, 0x80, 0x00,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x82, 0x85, 0xe0, 0x80,
- 0x80, 0x14, 0xbb, 0x04,
- 0x06, 0x15, 0xa5, 0x1b,
- 0x42, 0x10, 0x80, 0x0c,
- 0x46, 0x15, 0x9c, 0x10,
- 0x83, 0x11, 0x00, 0x0c,
- 0x1e, 0xf0, 0x80, 0x1e,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x60, 0x50, 0x00, 0x19,
- 0x00, 0x29, 0x82, 0x6b,
- 0x81, 0xc1, 0x60, 0x4c,
- 0x0a, 0x10, 0x90, 0xce,
- 0x0e, 0x14, 0x64, 0x0c,
- 0x00, 0x59, 0xe0, 0x88,
- 0x52, 0x50, 0x60, 0x64,
- 0xc0, 0x01, 0x73, 0xf0,
- 0x66, 0x86, 0x50, 0x2a,
- 0x48, 0xc5, 0x92, 0x73,
- 0x12, 0x80, 0xe0, 0x10,
- 0xc4, 0x87, 0x64, 0x0c,
- 0x73, 0xf1, 0x52, 0x90,
- 0x90, 0x73, 0x41, 0xff,
- 0x60, 0x84, 0x4a, 0x0a,
- 0x10, 0x06, 0x92, 0x73,
- 0x40, 0x40, 0x00, 0x01,
- 0x4c, 0x85, 0x90, 0x71,
- 0x52, 0x92, 0x40, 0x04,
- 0x4e, 0x72, 0x90, 0xa0,
- 0x10, 0x06, 0x10, 0xa4,
- 0x4c, 0xc5, 0x80, 0x00,
- 0x12, 0x74, 0x00, 0x04,
- 0x4a, 0x0a, 0xe1, 0x88,
- 0xb2, 0x8f, 0x60, 0x80,
- 0x0e, 0x74, 0x1a, 0x8e,
- 0x10, 0x84, 0x80, 0x84,
- 0xa8, 0x71, 0x1c, 0xc4,
- 0x00, 0x04, 0x4c, 0x85,
- 0xdc, 0xc0, 0x10, 0x84,
- 0x40, 0x04, 0x4c, 0x85,
- 0x60, 0x44, 0x0e, 0x8a,
- 0x08, 0xa5, 0xc0, 0x18,
- 0x80, 0x00, 0x00, 0x66,
- 0xe0, 0x40, 0x00, 0x79,
- 0x86, 0xd5, 0xee, 0x7d,
- 0xe0, 0x0c, 0x10, 0x36,
- 0xe4, 0x9c, 0x50, 0x4a,
- 0x00, 0x89, 0x86, 0x35,
- 0xf3, 0x8d, 0xe0, 0x48,
- 0x00, 0x76, 0x04, 0xc5,
- 0x06, 0x89, 0x80, 0x00,
- 0xfc, 0x8d, 0xe0, 0x2c,
- 0x06, 0x89, 0x82, 0xb5,
- 0xfc, 0x8d, 0xe0, 0x24,
- 0x06, 0x89, 0x82, 0x35,
- 0xfc, 0x8d, 0xe0, 0x28,
- 0x06, 0x39, 0x80, 0xb5,
- 0xff, 0x3d, 0xe0, 0x20,
- 0x01, 0x35, 0x82, 0x15,
- 0x93, 0x01, 0x91, 0x01,
- 0x0c, 0x0c, 0x90, 0x0e,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x60, 0x44, 0x00, 0x09,
- 0x18, 0xce, 0xe0, 0x27,
- 0x4c, 0x25, 0xa2, 0x2f,
- 0x2b, 0x0b, 0xe0, 0x10,
- 0xfe, 0xac, 0x01, 0xf6,
- 0x81, 0x01, 0x58, 0x0e,
- 0x00, 0x00, 0x01, 0x06,
- 0x5a, 0x0e, 0xad, 0x7b,
- 0xdc, 0x94, 0x00, 0x04,
- 0x40, 0x0c, 0x4c, 0x05,
- 0xe0, 0x80, 0x4a, 0x4a,
- 0x40, 0x00, 0x00, 0x06,
- 0xdc, 0x00, 0x42, 0x60,
- 0xcf, 0xf8, 0x48, 0x88,
- 0x8c, 0x1b, 0x03, 0x01,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xf8, 0x08, 0x28,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0x6b,
- 0x0e, 0x60, 0x3e, 0x2e,
- 0x08, 0x8b, 0xec, 0x04,
- 0x3c, 0x9e, 0x86, 0xab,
- 0x01, 0x21, 0x81, 0x01,
- 0x01, 0x41, 0x89, 0x31,
- 0x56, 0x98, 0x8e, 0x1b,
- 0x8c, 0x5b, 0x6f, 0xcc,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x81, 0x01, 0x3e, 0xae,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x11, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x55, 0xc8,
- 0x80, 0xa5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x81, 0x01, 0x3e, 0x8e,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x21, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x54, 0xc8,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x86, 0x05, 0xa1, 0x1b,
- 0x88, 0x0d, 0xff, 0x41,
- 0xc1, 0xac, 0x08, 0x04,
- 0xc1, 0x06, 0x48, 0x4a,
- 0xd1, 0x90, 0x48, 0x12,
- 0x17, 0x80, 0x08, 0x04,
- 0x73, 0xfc, 0x40, 0x00,
- 0x08, 0x44, 0xc0, 0x07,
- 0x08, 0x40, 0x81, 0x2c,
- 0x42, 0x4a, 0x84, 0x04,
- 0x88, 0x16, 0xe1, 0x86,
- 0x81, 0x01, 0x0c, 0x0e,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xe0, 0x08, 0x40, 0x96,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0xe0, 0x1e, 0xf0,
- 0x88, 0x6b, 0x00, 0xbb,
- 0x60, 0x18, 0x16, 0x89,
- 0x06, 0x7b, 0x84, 0x4b,
- 0x04, 0xf0, 0x82, 0xab,
- 0x06, 0xf0, 0x64, 0xd0,
- 0x09, 0x4e, 0xe4, 0xa0,
- 0x7d, 0x38, 0x88, 0x0b,
- 0x90, 0x1b, 0x6f, 0xfc,
- 0x64, 0xc0, 0x04, 0xf0,
- 0xe4, 0x90, 0x06, 0xf0,
- 0x90, 0x1b, 0x14, 0x0b,
- 0xef, 0xfc, 0x7c, 0xa8,
- 0x64, 0xb0, 0x04, 0xf0,
- 0xe4, 0x80, 0x06, 0xf0,
- 0x8e, 0x0b, 0x0b, 0x7e,
- 0x6f, 0xfc, 0x7c, 0x28,
- 0x1e, 0x09, 0x90, 0x1b,
- 0x98, 0xb1, 0x60, 0xd0,
- 0x60, 0xc0, 0x1e, 0x39,
- 0xe0, 0x84, 0x04, 0x84,
- 0x60, 0xb0, 0x1e, 0x59,
- 0x42, 0x07, 0x96, 0x23,
- 0xec, 0x08, 0x04, 0x20,
- 0x70, 0x80, 0x42, 0xb2,
- 0x00, 0x10, 0xc2, 0x37,
- 0x4e, 0xb2, 0x6c, 0x08,
- 0x57, 0x0d, 0xf0, 0x8c,
- 0x42, 0x57, 0x84, 0x9b,
- 0x9c, 0x00, 0x52, 0x00,
- 0x6c, 0x08, 0x00, 0x70,
- 0xf0, 0x94, 0x46, 0xb2,
- 0x84, 0x5b, 0x57, 0x0d,
- 0x1c, 0x00, 0x4a, 0x00,
- 0xec, 0x08, 0x00, 0x30,
- 0x84, 0xcb, 0x57, 0x0d,
- 0x58, 0x00, 0x15, 0x04,
- 0xfc, 0x0e, 0x9c, 0x00,
- 0x0b, 0x04, 0x89, 0x04,
- 0x13, 0x04, 0x81, 0xab,
- 0xe0, 0x00, 0x54, 0x1a,
- 0xed, 0x84, 0x40, 0x0a,
- 0x91, 0x04, 0xbe, 0x0e,
- 0x81, 0x01, 0x3c, 0x0e,
- 0x91, 0x95, 0xfe, 0x0e,
- 0x8a, 0xab, 0x0f, 0x8e,
- 0x8e, 0x5b, 0x04, 0x8a,
- 0xa4, 0x0a, 0x8d, 0x9e,
- 0x89, 0x94, 0xfc, 0x74,
- 0x40, 0x0a, 0xb0, 0x03,
- 0x0f, 0x2a, 0x66, 0x9e,
- 0xc0, 0x08, 0x64, 0x00,
- 0x52, 0x1a, 0x8b, 0x74,
- 0x0e, 0x00, 0x60, 0x1c,
- 0xc0, 0x04, 0x64, 0x00,
- 0x40, 0x0d, 0x41, 0x26,
- 0xd7, 0x77, 0x40, 0x00,
- 0x40, 0x0d, 0x5e, 0x05,
- 0x8c, 0x9b, 0x40, 0x00,
- 0x20, 0x00, 0x01, 0x88,
- 0xa0, 0x00, 0x0c, 0x06,
- 0xb0, 0x0a, 0x8c, 0x6a,
- 0xac, 0x03, 0xbc, 0x44,
- 0x66, 0x92, 0x40, 0x0a,
- 0x64, 0x00, 0x09, 0x1a,
- 0x49, 0x26, 0xc0, 0x08,
- 0xc0, 0x00, 0x20, 0x0d,
- 0x20, 0x0d, 0x5e, 0x45,
- 0x00, 0x00, 0x40, 0x00,
- 0xc0, 0x04, 0x64, 0x01,
- 0x80, 0x63, 0xd7, 0x07,
- 0x06, 0x25, 0x8e, 0x83,
- 0x80, 0x00, 0x0e, 0x06,
- 0x82, 0x4b, 0x14, 0x7a,
- 0xbe, 0x14, 0xa8, 0x0a,
- 0x40, 0x0a, 0xae, 0x03,
- 0x03, 0x1a, 0x66, 0x86,
- 0xc0, 0x08, 0x64, 0x00,
- 0x20, 0x0d, 0x43, 0x26,
- 0x5e, 0x15, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x0d,
- 0x64, 0x01, 0x00, 0x00,
- 0x57, 0x07, 0xc0, 0x04,
- 0x80, 0x73, 0x88, 0x1b,
- 0x7b, 0x80, 0x00, 0x64,
- 0xfb, 0x80, 0x0c, 0x84,
- 0x7a, 0x80, 0x4c, 0x62,
- 0xe4, 0x08, 0x00, 0x10,
- 0x7b, 0x80, 0x02, 0x74,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x7a, 0x98, 0x42, 0x12,
- 0x59, 0x1c, 0x92, 0x6b,
- 0x42, 0x00, 0x96, 0x1b,
- 0x00, 0x50, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0x7b, 0x64, 0x08,
- 0x4e, 0x00, 0x0d, 0x44,
- 0x00, 0x30, 0xbc, 0x00,
- 0x96, 0x3b, 0x64, 0x08,
- 0x64, 0x08, 0x41, 0x1a,
- 0x46, 0x00, 0x96, 0x9b,
- 0x00, 0x40, 0x3c, 0x00,
- 0x0f, 0x84, 0xe4, 0x08,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x3c, 0x00, 0x52, 0x00,
- 0xe4, 0x08, 0x00, 0xa0,
- 0x64, 0x08, 0x41, 0x1a,
- 0x4a, 0x00, 0x96, 0x5b,
- 0x00, 0xc0, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0xcb, 0x64, 0x08,
- 0x3c, 0x00, 0x58, 0x00,
- 0xec, 0x04, 0x10, 0x80,
- 0xe0, 0x00, 0x10, 0x1a,
- 0x3f, 0xfd, 0x37, 0x68,
- 0x7e, 0x04, 0xc3, 0xff,
- 0x0c, 0x0c, 0xf0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x71, 0x88, 0x44, 0x12,
- 0xe1, 0xf5, 0x82, 0x33,
- 0x84, 0x01, 0xc2, 0x07,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe1, 0xcc, 0x08, 0x24,
- 0x60, 0xb8, 0x02, 0x04,
- 0x06, 0x24, 0xda, 0x07,
- 0xa0, 0x4f, 0x61, 0xc8,
- 0x79, 0x84, 0x44, 0x32,
- 0xfc, 0x7c, 0x00, 0x44,
- 0x60, 0x10, 0x02, 0x06,
- 0x75, 0x98, 0x81, 0x31,
- 0x08, 0x4c, 0xef, 0xbc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x2b, 0x04, 0x6b,
- 0x4e, 0x96, 0x21, 0x2b,
- 0x82, 0xc5, 0xe0, 0x08,
- 0x60, 0xc8, 0x00, 0x14,
- 0xe1, 0x84, 0x06, 0x24,
- 0xdd, 0x17, 0x06, 0x03,
- 0x81, 0x31, 0x01, 0x71,
- 0x6f, 0xbc, 0x74, 0x48,
- 0xf2, 0x9c, 0x42, 0x12,
- 0x8e, 0x0b, 0x98, 0x0e,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xdc, 0x07, 0xe5, 0x27,
- 0xa4, 0x0f, 0x5d, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x82, 0x2b, 0x42, 0x07,
- 0x81, 0x11, 0x04, 0x01,
- 0x7a, 0x80, 0x00, 0x04,
- 0x7b, 0x98, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xbc,
- 0xa2, 0x2f, 0xe1, 0xa0,
- 0x41, 0xfe, 0xa1, 0x2b,
- 0x00, 0x04, 0xdf, 0xfc,
- 0x08, 0x4c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x7a, 0x08,
- 0x02, 0x64, 0x84, 0x6b,
- 0x82, 0x03, 0xe1, 0x84,
- 0xe0, 0x1a, 0x40, 0x0a,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x69, 0x29, 0x43, 0x86,
- 0x44, 0x1a, 0xc0, 0x01,
- 0x40, 0x1a, 0xe5, 0x02,
- 0x81, 0x11, 0x65, 0x82,
- 0x64, 0x01, 0x04, 0x20,
- 0x40, 0x02, 0xc2, 0x00,
- 0xe5, 0x27, 0x72, 0x84,
- 0x5d, 0x93, 0xdc, 0x07,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x04, 0x34, 0x83, 0x31,
- 0xa3, 0x3f, 0x68, 0x88,
- 0x42, 0x2a, 0x82, 0x21,
- 0x80, 0x13, 0xe6, 0x8e,
- 0x00, 0x14, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0xef, 0xfc, 0x77, 0x28,
- 0x84, 0x61, 0xc2, 0x67,
- 0xfa, 0x80, 0x02, 0x64,
- 0xe6, 0x9e, 0x42, 0x1a,
- 0xe5, 0x02, 0x44, 0x1a,
- 0x65, 0x82, 0x40, 0x1a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x27,
- 0x0c, 0x4c, 0xa4, 0x0f,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x81, 0x11, 0x21, 0x0b,
- 0x00, 0x00, 0x84, 0x65,
- 0x04, 0x0e, 0x6c, 0x04,
- 0x46, 0x02, 0xff, 0xf0,
- 0xa1, 0x3b, 0xf8, 0x08,
- 0x41, 0x84, 0x00, 0x04,
- 0xc4, 0x04, 0x02, 0x10,
- 0x02, 0x14, 0xfe, 0x35,
- 0x00, 0x04, 0x7b, 0x80,
- 0xd0, 0x17, 0xfa, 0x80,
- 0x5d, 0x93, 0xa0, 0x1f,
- 0xfb, 0x80, 0x00, 0x14,
- 0x7a, 0x80, 0x02, 0x04,
- 0xa1, 0x1f, 0xd1, 0x07,
- 0x00, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0xe4, 0x04,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x02, 0x48, 0x2a,
- 0xe5, 0x82, 0x4a, 0x2a,
- 0x65, 0x06, 0x40, 0x3a,
- 0x42, 0x3a, 0x88, 0x2b,
- 0x8a, 0x3b, 0x65, 0x86,
- 0xef, 0xbc, 0x73, 0x88,
- 0x60, 0x01, 0x04, 0x06,
- 0x81, 0x31, 0x42, 0x00,
- 0x42, 0x12, 0x84, 0x03,
- 0xf9, 0x07, 0x72, 0x8c,
- 0x60, 0x90, 0x04, 0x14,
- 0x24, 0x0f, 0xf9, 0x17,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x08, 0x4c, 0xdf, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x21, 0x1b,
- 0x81, 0x71, 0x0a, 0x45,
- 0x88, 0xe5, 0xa1, 0x2b,
- 0x7e, 0x81, 0x06, 0x0e,
- 0x48, 0x1a, 0x40, 0x00,
- 0x4a, 0x0a, 0xe5, 0x0a,
- 0x40, 0x0a, 0xe5, 0x0e,
- 0x46, 0x1a, 0xe5, 0x8e,
- 0x18, 0x54, 0x65, 0x8a,
- 0x56, 0x07, 0xe1, 0xd4,
- 0xe1, 0x84, 0x02, 0x44,
- 0x00, 0x34, 0x20, 0xcf,
- 0x56, 0x57, 0xe0, 0xfc,
- 0x04, 0x34, 0xa0, 0x1f,
- 0x40, 0x12, 0x61, 0x84,
- 0x42, 0x22, 0xf0, 0x94,
- 0x88, 0x2b, 0x72, 0xb0,
- 0xef, 0xbc, 0x66, 0x68,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x01, 0x65, 0xa1, 0x1b,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x4e, 0x96, 0x01, 0x01,
- 0x18, 0x0e, 0xe0, 0x08,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x7f, 0xfd, 0x47, 0xfe,
- 0x86, 0x0d, 0xc0, 0x3f,
- 0x00, 0x00, 0x06, 0x02,
- 0x08, 0x3e, 0xa1, 0x1b,
- 0x80, 0x00, 0x02, 0x06,
- 0x40, 0x9c, 0x06, 0x34,
- 0xc1, 0x84, 0x08, 0x14,
- 0x50, 0x90, 0x46, 0x32,
- 0x42, 0x3a, 0x81, 0x01,
- 0x40, 0x96, 0x40, 0x06,
- 0x88, 0x1e, 0x80, 0x08,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8a, 0x25, 0xa1, 0x2b,
- 0x0a, 0x02, 0x06, 0x13,
- 0x06, 0x14, 0xe0, 0x00,
- 0x03, 0x0a, 0x7a, 0x80,
- 0x08, 0x30, 0xf4, 0x7c,
- 0x81, 0x11, 0x6c, 0x80,
- 0x7b, 0x90, 0x46, 0x32,
- 0x00, 0x32, 0x81, 0x41,
- 0x48, 0x50, 0x6c, 0x7c,
- 0x0a, 0x06, 0x9c, 0x00,
- 0x18, 0x44, 0x00, 0x00,
- 0x0c, 0x04, 0xef, 0x80,
- 0xa0, 0x33, 0x6c, 0x00,
- 0x78, 0xb0, 0x58, 0x62,
- 0x21, 0x4f, 0xa1, 0x5f,
- 0xe1, 0x84, 0x00, 0x24,
- 0x06, 0x32, 0x38, 0x5f,
- 0x27, 0x5f, 0xec, 0x04,
- 0x42, 0x52, 0x88, 0x03,
- 0x81, 0x31, 0x72, 0x84,
- 0xef, 0xbc, 0x61, 0x28,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xa1, 0x2b, 0x00, 0x3b,
- 0xe5, 0x06, 0x40, 0x3a,
- 0xe5, 0x86, 0x42, 0x3a,
- 0x06, 0x20, 0x82, 0x65,
- 0x83, 0x41, 0x6c, 0x04,
- 0x81, 0x31, 0x27, 0x4f,
- 0x6f, 0x38, 0x88, 0x03,
- 0x42, 0x12, 0x6f, 0xbc,
- 0xff, 0x21, 0xf2, 0x8c,
- 0x41, 0xfe, 0x85, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x00, 0x04, 0x4c,
- 0xa3, 0x2d, 0x00, 0x3b,
- 0xe4, 0x06, 0x40, 0x3a,
- 0xe4, 0x86, 0x42, 0x3a,
- 0x08, 0x20, 0x86, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x90, 0x08, 0x34,
- 0x21, 0x1d, 0x81, 0xc1,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0x71, 0x90, 0x4c, 0xc2,
- 0xe8, 0x88, 0x04, 0x34,
- 0x73, 0x94, 0x58, 0xc2,
- 0xdc, 0x00, 0x48, 0x60,
- 0x5c, 0x00, 0x4a, 0xc0,
- 0x42, 0x52, 0x88, 0x03,
- 0x06, 0x24, 0x72, 0x84,
- 0x50, 0x78, 0xe1, 0x7c,
- 0x03, 0x4a, 0xef, 0xbc,
- 0x02, 0x1a, 0xe0, 0x00,
- 0x00, 0xea, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x80, 0xf5, 0xed, 0x80,
- 0x7f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x4c, 0xdf, 0xff,
- 0xdd, 0x93, 0xf6, 0x00,
- 0x06, 0x06, 0x7f, 0x21,
- 0xe0, 0x00, 0x60, 0x01,
- 0xe0, 0x08, 0x43, 0x4a,
- 0xe0, 0x08, 0x42, 0x1a,
- 0xe4, 0x0c, 0x41, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x00, 0x01, 0x00, 0x06,
- 0x0c, 0x4c, 0xe0, 0x00,
- 0xdd, 0x93, 0xf6, 0x00,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x86, 0x6b, 0x04, 0x4b,
- 0x70, 0x90, 0x08, 0x09,
- 0x08, 0x29, 0x81, 0x51,
- 0x12, 0x10, 0x78, 0x8c,
- 0x08, 0x39, 0xe6, 0x00,
- 0x14, 0x10, 0x78, 0x84,
- 0x18, 0x06, 0xe4, 0xc0,
- 0xff, 0xf8, 0x57, 0xce,
- 0x4e, 0x46, 0x1a, 0x26,
- 0x58, 0x56, 0xe0, 0x00,
- 0xda, 0x36, 0x81, 0x81,
- 0x89, 0xa5, 0x8f, 0x4e,
- 0xf0, 0xa0, 0x40, 0x42,
- 0xe0, 0x40, 0x00, 0x19,
- 0x8a, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x60, 0x00, 0x19,
- 0x8a, 0x25, 0xa1, 0x1b,
- 0xa1, 0x1b, 0xa4, 0x1a,
- 0x08, 0x19, 0x88, 0xc5,
- 0x44, 0x62, 0x7c, 0x20,
- 0x44, 0x11, 0xf0, 0xa0,
- 0x00, 0x19, 0xe0, 0x10,
- 0x44, 0x11, 0xe0, 0x20,
- 0x00, 0x19, 0xe0, 0x30,
- 0x44, 0x11, 0xe0, 0x40,
- 0x00, 0x09, 0xe0, 0x50,
- 0x44, 0x01, 0xe0, 0x60,
- 0xa4, 0x2a, 0xe0, 0x70,
- 0xaa, 0x14, 0xa8, 0x04,
- 0xe1, 0x84, 0x06, 0x24,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xbc, 0x56, 0x28,
- 0xf2, 0x94, 0x42, 0x12,
- 0x42, 0x62, 0x0f, 0x44,
- 0x04, 0x0e, 0xf0, 0x9c,
- 0x12, 0x0b, 0x81, 0x51,
- 0x81, 0xf5, 0xf8, 0x20,
- 0xf0, 0xa0, 0x40, 0x62,
- 0xe0, 0x10, 0x40, 0x51,
- 0xe0, 0x30, 0x40, 0x51,
- 0xe0, 0x50, 0x40, 0x51,
- 0x60, 0x70, 0x40, 0x51,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x81, 0x01, 0x00, 0x5e,
- 0x71, 0xac, 0x42, 0x62,
- 0x04, 0x0c, 0x82, 0x81,
- 0xec, 0x08, 0x16, 0xb0,
- 0x88, 0x71, 0x04, 0x91,
- 0xb1, 0x8b, 0x90, 0xa1,
- 0x81, 0x01, 0xec, 0xd5,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x06, 0x00, 0x06, 0x28,
- 0x60, 0x01, 0xe6, 0x00,
- 0xe6, 0x10, 0x08, 0x10,
- 0x65, 0x10, 0x0a, 0x10,
- 0x59, 0xc6, 0xf8, 0x11,
- 0x81, 0x61, 0x60, 0x00,
- 0x02, 0x79, 0x83, 0xf5,
- 0xa1, 0x7b, 0xf8, 0x20,
- 0x84, 0x78, 0x84, 0xa5,
- 0x84, 0x45, 0xa1, 0x7b,
- 0x80, 0x84, 0x94, 0x74,
- 0x06, 0xab, 0x82, 0x94,
- 0x10, 0x7a, 0xf8, 0x20,
- 0x0c, 0xba, 0x8e, 0x83,
- 0xf2, 0x98, 0x52, 0x92,
- 0x00, 0x8e, 0x82, 0x9e,
- 0x46, 0xa3, 0x8e, 0xa3,
- 0x82, 0xb1, 0x78, 0x20,
- 0x02, 0xc1, 0x8c, 0xbc,
- 0x04, 0x41, 0x84, 0x31,
- 0x08, 0x51, 0x90, 0x01,
- 0x0e, 0xc0, 0x82, 0x11,
- 0x85, 0x7d, 0xec, 0xf0,
- 0x0c, 0x0c, 0xf6, 0xf5,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x06, 0x28,
- 0x83, 0x81, 0x44, 0x38,
- 0x80, 0x7b, 0x46, 0x08,
- 0x91, 0x11, 0x25, 0x8f,
- 0x6f, 0xfc, 0x5c, 0xe8,
- 0xe8, 0x8c, 0x12, 0x84,
- 0x14, 0x04, 0x1c, 0x14,
- 0x1e, 0x34, 0xe0, 0x90,
- 0x02, 0x0b, 0x90, 0x2b,
- 0x64, 0x18, 0x94, 0x1b,
- 0x1c, 0x14, 0xef, 0xfc,
- 0x98, 0x0e, 0x92, 0x2b,
- 0x02, 0x0b, 0x9e, 0x34,
- 0x63, 0x98, 0x94, 0x1b,
- 0x9c, 0x24, 0xef, 0xfc,
- 0x0e, 0x1b, 0x9a, 0x0e,
- 0x1e, 0x34, 0xe0, 0x10,
- 0x63, 0x18, 0x84, 0x0b,
- 0x92, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x88, 0x7b, 0x44, 0x48,
- 0x81, 0x01, 0x00, 0x9b,
- 0x84, 0x6b, 0x0a, 0x8b,
- 0x86, 0x0b, 0x0b, 0x0e,
- 0x90, 0x2b, 0x0e, 0x1b,
- 0x68, 0x00, 0x43, 0x48,
- 0xab, 0x9b, 0x88, 0x3b,
- 0xa5, 0x9b, 0x84, 0x05,
- 0x0c, 0x60, 0x02, 0xe5,
- 0xa7, 0x9b, 0x84, 0x10,
- 0xa9, 0x9b, 0x82, 0x45,
- 0x40, 0x80, 0x02, 0x25,
- 0xa3, 0x9b, 0x9c, 0x00,
- 0x08, 0x61, 0x86, 0x75,
- 0x81, 0x25, 0x8e, 0x0b,
- 0x0d, 0x14, 0x90, 0x61,
- 0xe4, 0x50, 0x06, 0xf0,
- 0x62, 0x98, 0x98, 0x24,
- 0x0b, 0x14, 0xef, 0xfc,
- 0xe0, 0x00, 0x00, 0x1a,
- 0x61, 0x9c, 0x4e, 0x0a,
- 0x0f, 0x24, 0x81, 0x01,
- 0x20, 0x01, 0x02, 0x06,
- 0x02, 0x06, 0xc0, 0x00,
- 0x88, 0x1e, 0xc0, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x40, 0xc6, 0xdd, 0x93,
- 0x4e, 0x0a, 0x60, 0x08,
- 0x4e, 0x1a, 0xe9, 0x9c,
- 0x81, 0x11, 0x61, 0x9c,
- 0xc1, 0xc3, 0xfd, 0xf5,
- 0x84, 0x03, 0xa7, 0x2f,
- 0x5c, 0x08, 0xc3, 0x0d,
- 0x00, 0x06, 0x1a, 0x00,
- 0x5d, 0x93, 0x80, 0x00,
- 0xf1, 0x80, 0x40, 0x12,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x64, 0x61, 0x00, 0x00,
- 0x81, 0x41, 0x40, 0x03,
- 0xfc, 0x1e, 0xbe, 0x0e,
- 0x06, 0x08, 0x8b, 0xf5,
- 0x01, 0xb1, 0x81, 0xa1,
- 0x81, 0x4d, 0x81, 0x71,
- 0x7e, 0x4e, 0x92, 0x65,
- 0x02, 0x09, 0x88, 0x13,
- 0x81, 0xa1, 0x60, 0xb0,
- 0x60, 0xf0, 0x02, 0x39,
- 0x02, 0x49, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0x90,
- 0x60, 0xd0, 0x02, 0x29,
- 0x42, 0x0a, 0x9d, 0x11,
- 0x80, 0x33, 0x66, 0x86,
- 0x81, 0x71, 0x3e, 0x54,
- 0x88, 0x23, 0x08, 0x13,
- 0xc4, 0x17, 0x09, 0x4e,
- 0x81, 0x41, 0x02, 0x53,
- 0x18, 0x85, 0x83, 0x25,
- 0xc0, 0x01, 0x78, 0x31,
- 0x10, 0xa3, 0xf1, 0x94,
- 0x48, 0x42, 0x81, 0x81,
- 0x92, 0xb3, 0xf2, 0xa0,
- 0x72, 0xa0, 0x4c, 0x62,
- 0x82, 0x11, 0x82, 0x71,
- 0xfc, 0x55, 0x85, 0x1d,
- 0xf0, 0x51, 0x02, 0x01,
- 0x1e, 0x15, 0x87, 0x0d,
- 0x58, 0x50, 0x40, 0x10,
- 0xfc, 0xf5, 0xdc, 0x00,
- 0x84, 0xd5, 0xe5, 0x7d,
- 0x61, 0x84, 0x10, 0x74,
- 0x40, 0x82, 0x81, 0x91,
- 0x81, 0x31, 0x70, 0xa8,
- 0x72, 0xa4, 0x42, 0x42,
- 0x44, 0x18, 0x8e, 0x2b,
- 0x00, 0xab, 0xef, 0xbc,
- 0xf0, 0xac, 0x40, 0x82,
- 0x72, 0xa4, 0x42, 0x62,
- 0x43, 0x98, 0x81, 0x31,
- 0x8e, 0x2b, 0x6f, 0xbc,
- 0xfc, 0x14, 0x80, 0xbb,
- 0x00, 0x44, 0xfe, 0x44,
- 0x06, 0x10, 0x60, 0x88,
- 0x04, 0x44, 0xe5, 0x10,
- 0x86, 0x03, 0x60, 0x84,
- 0x82, 0x41, 0x04, 0x33,
- 0x40, 0xb5, 0x80, 0xae,
- 0x46, 0x73, 0xe0, 0x20,
- 0x84, 0x08, 0xe0, 0x80,
- 0xe8, 0x15, 0x81, 0x4d,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0xc1, 0x30, 0x01,
- 0x82, 0x7b, 0x7c, 0x0e,
- 0x0c, 0x70, 0x0d, 0xce,
- 0x0b, 0xce, 0xe4, 0xf0,
- 0x89, 0xce, 0x81, 0xa1,
- 0xfc, 0x94, 0xfe, 0xce,
- 0x1e, 0x08, 0x89, 0x55,
- 0x8d, 0xce, 0x81, 0x11,
- 0x01, 0xad, 0xfe, 0xce,
- 0x89, 0xce, 0x81, 0x01,
- 0x8c, 0x05, 0x8b, 0xce,
- 0x70, 0xa8, 0x56, 0x62,
- 0xf0, 0xa8, 0x50, 0x92,
- 0x78, 0xe0, 0x16, 0x09,
- 0xe4, 0x30, 0x04, 0xf0,
- 0x78, 0xa0, 0x16, 0x19,
- 0xe4, 0x60, 0x0a, 0xf0,
- 0xf8, 0x20, 0x10, 0x39,
- 0xe0, 0x20, 0x10, 0x49,
- 0x9b, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x43, 0x08,
- 0x78, 0xc0, 0x16, 0x09,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x78, 0x80, 0x16, 0x19,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0xfc, 0x28, 0x12, 0x39,
- 0xe0, 0x40, 0x10, 0x49,
- 0x93, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x42, 0x08,
- 0x81, 0xc1, 0x7e, 0x04,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xa1, 0x1b, 0x8b, 0x14,
- 0x7e, 0xce, 0x80, 0xb5,
- 0x0b, 0xce, 0x81, 0x11,
- 0x0d, 0x24, 0x81, 0x01,
- 0xf0, 0xa8, 0x48, 0x62,
- 0x82, 0xa1, 0x09, 0x34,
- 0xf8, 0x20, 0x48, 0x01,
- 0xf8, 0x60, 0x48, 0x21,
- 0xf8, 0x40, 0x48, 0x31,
- 0x9c, 0x08, 0x90, 0x16,
- 0xee, 0x55, 0x81, 0xad,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x58, 0x12, 0x00, 0x33,
- 0x14, 0x3e, 0xf0, 0x80,
- 0xf0, 0x90, 0x40, 0x32,
- 0x00, 0x00, 0x19, 0x0d,
- 0x00, 0x1b, 0xec, 0x04,
- 0x02, 0xc0, 0x81, 0x51,
- 0x3c, 0x14, 0x8c, 0x04,
- 0xfb, 0x04, 0x44, 0x22,
- 0x82, 0x35, 0x84, 0x3d,
- 0x88, 0x5b, 0x04, 0x0d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xd1, 0x8c, 0x40, 0x02,
- 0xd0, 0x88, 0x4a, 0x02,
- 0xdd, 0x93, 0x84, 0x5e,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x8b, 0x0a, 0x6b,
- 0x84, 0x7b, 0x11, 0x94,
- 0x8c, 0x1b, 0x08, 0x0b,
- 0x6f, 0xfc, 0x69, 0x88,
- 0x01, 0x01, 0x90, 0x2b,
- 0x85, 0x65, 0x91, 0xa1,
- 0x88, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0x12, 0x45, 0x81, 0x31,
- 0x90, 0x2b, 0x60, 0x40,
- 0xe0, 0x60, 0x12, 0x55,
- 0xbe, 0x9e, 0x9c, 0x08,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0xe4, 0x80, 0x04, 0x90,
- 0x60, 0x40, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9e, 0x08, 0xe0, 0x60,
- 0x90, 0x2b, 0x3e, 0x2e,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x69, 0xe8,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x55,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x7b, 0x15, 0x84,
- 0x84, 0x6b, 0x17, 0x94,
- 0x8e, 0x2b, 0x13, 0x04,
- 0x6f, 0xfc, 0x65, 0xc8,
- 0x01, 0x01, 0x90, 0x1b,
- 0xe0, 0x08, 0x14, 0xc6,
- 0xa1, 0x0b, 0x85, 0x75,
- 0x12, 0x15, 0x88, 0x55,
- 0x81, 0x31, 0x68, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x8e, 0x2b,
- 0x98, 0x08, 0xe6, 0x90,
- 0x3c, 0x1e, 0xbe, 0x9e,
- 0x67, 0x38, 0x90, 0x1b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x12, 0x15, 0x84, 0x55,
- 0x04, 0x90, 0x68, 0xc0,
- 0xc0, 0x02, 0x64, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9a, 0x08, 0xe6, 0x90,
- 0x8e, 0x2b, 0x3e, 0x2e,
- 0x90, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x66, 0x08,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x35,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x80, 0x9b, 0x15, 0x84,
- 0x84, 0x7b, 0x0a, 0x6b,
- 0x00, 0x80, 0x82, 0xab,
- 0x08, 0x80, 0x64, 0x50,
- 0x3c, 0x0e, 0xe4, 0x10,
- 0xe4, 0x40, 0x0a, 0x80,
- 0xef, 0xfc, 0x77, 0x68,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x67, 0xa0, 0x02, 0x80,
- 0xe7, 0x60, 0x00, 0x80,
- 0x04, 0x80, 0x7e, 0x1e,
- 0x7c, 0x2e, 0xe7, 0x90,
- 0x3e, 0x0e, 0x94, 0x1b,
- 0x7a, 0x38, 0x8e, 0x2b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0xa0, 0xf1, 0x80, 0xa5,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x17, 0x44, 0xdd, 0x93,
- 0x0e, 0x1b, 0x92, 0x0b,
- 0x10, 0x3b, 0x8c, 0x2b,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0x81, 0x15, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x86, 0x8b, 0x08, 0x6b,
- 0x84, 0x7b, 0x02, 0x0b,
- 0x6f, 0xfc, 0x6d, 0x88,
- 0x10, 0x0b, 0x8c, 0x1b,
- 0x66, 0x38, 0x8c, 0x1b,
- 0x10, 0x09, 0xef, 0xfc,
- 0x00, 0x00, 0xe3, 0x58,
- 0xe2, 0x0d, 0xec, 0x0c,
- 0x1c, 0x00, 0x40, 0x70,
- 0x9c, 0x00, 0x42, 0x60,
- 0x8f, 0xfc, 0x5a, 0xe8,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x62, 0x01, 0x02, 0x5b,
- 0x81, 0xc1, 0x40, 0x01,
- 0x0c, 0xc4, 0x85, 0x95,
- 0x0e, 0x64, 0xfb, 0x80,
- 0x82, 0x63, 0x60, 0x84,
- 0x60, 0x01, 0x0c, 0x89,
- 0x82, 0x73, 0x40, 0x02,
- 0xe8, 0x00, 0x0e, 0x7b,
- 0x06, 0xa5, 0xc4, 0x87,
- 0xc4, 0x77, 0x7c, 0x20,
- 0xfc, 0x1c, 0x00, 0x95,
- 0x50, 0x82, 0xd3, 0xad,
- 0x50, 0x95, 0xd0, 0x8c,
- 0x04, 0x89, 0xc0, 0x00,
- 0xa1, 0x8b, 0xe0, 0x30,
- 0x0c, 0x60, 0x82, 0xc5,
- 0x40, 0x08, 0x64, 0x01,
- 0x98, 0x68, 0x80, 0x73,
- 0xc4, 0x67, 0x9c, 0x74,
- 0x7c, 0x18, 0x08, 0x85,
- 0x88, 0x63, 0xcf, 0x77,
- 0x98, 0x8e, 0x8e, 0x83,
- 0x58, 0x8a, 0x82, 0xc1,
- 0xf4, 0xd5, 0xec, 0x14,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x81, 0xc1, 0x0f, 0x4e,
- 0x81, 0x61, 0x0d, 0x3e,
- 0x64, 0x09, 0x00, 0x39,
- 0x87, 0x45, 0xc0, 0x02,
- 0x60, 0x34, 0x02, 0x99,
- 0xfa, 0x80, 0x0e, 0xc4,
- 0x60, 0x30, 0x02, 0xb9,
- 0x04, 0x85, 0xc4, 0x77,
- 0xa1, 0xbb, 0xfc, 0x1c,
- 0xe5, 0xa6, 0x54, 0x8a,
- 0x65, 0x26, 0x50, 0x8a,
- 0xf0, 0x9c, 0x52, 0x22,
- 0xd1, 0x87, 0xf0, 0xa7,
- 0x56, 0x82, 0x0f, 0x84,
- 0x8e, 0x83, 0xf9, 0xa8,
- 0x8d, 0xa4, 0xa0, 0xbe,
- 0x8e, 0xa3, 0x02, 0xc5,
- 0xc6, 0x5a, 0xa8, 0x64,
- 0xe5, 0x16, 0x48, 0x6a,
- 0xe5, 0x96, 0x4a, 0x6a,
- 0xee, 0x57, 0xd3, 0x47,
- 0xf9, 0x94, 0x4c, 0x42,
- 0xa0, 0xbe, 0x8c, 0xb3,
- 0x80, 0x73, 0x24, 0x44,
- 0x4e, 0x45, 0x82, 0xc1,
- 0xa8, 0x44, 0xe9, 0x04,
- 0xe9, 0x44, 0x4e, 0x45,
- 0x4e, 0x65, 0xa0, 0x44,
- 0x4e, 0x45, 0xe9, 0xc4,
- 0x58, 0x8a, 0xe9, 0x84,
- 0xf2, 0x75, 0xf4, 0x0c,
- 0x0c, 0xcc, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x81, 0x41, 0x19, 0x31,
- 0x18, 0x54, 0x83, 0x95,
- 0x4c, 0x12, 0x60, 0x84,
- 0x02, 0xc3, 0xf0, 0x94,
- 0x18, 0x5b, 0x82, 0x41,
- 0x0c, 0xc9, 0xe8, 0x00,
- 0xc0, 0x02, 0x60, 0x01,
- 0xe0, 0x88, 0x0c, 0x54,
- 0x7c, 0x18, 0x00, 0x65,
- 0x04, 0xc5, 0xc4, 0xc7,
- 0xd9, 0x6d, 0xfc, 0x30,
- 0xd0, 0x80, 0x4a, 0x52,
- 0x0c, 0x01, 0x4a, 0x31,
- 0x02, 0xcb, 0xc0, 0x04,
- 0x40, 0x01, 0x62, 0x01,
- 0xfb, 0x80, 0x0a, 0x44,
- 0xf8, 0x55, 0xd9, 0x5d,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xef, 0x10, 0x1e, 0xf0,
- 0x84, 0x8b, 0x02, 0x6b,
- 0x64, 0x09, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x02,
- 0x65, 0x10, 0x02, 0xf0,
- 0xe6, 0x10, 0x04, 0xf0,
- 0x81, 0x31, 0x01, 0x65,
- 0x00, 0x00, 0x49, 0x3e,
- 0xc5, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x66, 0x10, 0x12, 0xf0,
- 0xe5, 0x10, 0x14, 0xf0,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x92, 0x3b, 0x10, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x16, 0xf0, 0x94, 0x4b,
- 0x8c, 0x0b, 0x64, 0x10,
- 0x92, 0x2b, 0x10, 0x1b,
- 0x96, 0x4b, 0x14, 0x3b,
- 0xef, 0xfc, 0x76, 0xc8,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x6f, 0xfc, 0x7a, 0xc8,
- 0x01, 0x01, 0x96, 0x2b,
- 0xe7, 0x10, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xff, 0x01, 0x00, 0x24,
- 0x83, 0x2d, 0x84, 0x14,
- 0x00, 0x00, 0x00, 0x06,
- 0x5d, 0x93, 0x82, 0x2d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x9b, 0x7e, 0x2e,
- 0x02, 0x06, 0x3e, 0x0e,
- 0x09, 0x21, 0xe0, 0x10,
- 0x68, 0xf1, 0x06, 0x4e,
- 0x4e, 0xf8, 0xc0, 0x10,
- 0x92, 0x0b, 0x6f, 0xbc,
- 0x81, 0x11, 0x01, 0x01,
- 0x81, 0x01, 0x09, 0x0e,
- 0x83, 0x81, 0x11, 0x1e,
- 0x81, 0xa1, 0x0f, 0x1e,
- 0x81, 0x31, 0x7c, 0x0e,
- 0x0d, 0x3e, 0x91, 0xa5,
- 0xe0, 0x88, 0x00, 0x74,
- 0x12, 0x05, 0x8b, 0x1e,
- 0x4c, 0x78, 0xfc, 0x00,
- 0x0c, 0x74, 0xe8, 0x00,
- 0x01, 0x0a, 0x60, 0x84,
- 0xc0, 0x01, 0x64, 0x00,
- 0x4c, 0x03, 0x92, 0x63,
- 0x00, 0x04, 0x68, 0x00,
- 0x1e, 0x15, 0x80, 0x84,
- 0x40, 0x02, 0x80, 0x04,
- 0x00, 0xb3, 0x90, 0x84,
- 0x00, 0x01, 0x0c, 0x01,
- 0xc0, 0x0c, 0x41, 0x26,
- 0xc0, 0x08, 0x5e, 0x05,
- 0x47, 0xfc, 0x57, 0xf6,
- 0xfb, 0xfc, 0x10, 0x0a,
- 0x7e, 0xa4, 0x86, 0xc5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x64, 0x70, 0x06, 0xf0,
- 0x14, 0x19, 0x96, 0x0b,
- 0x47, 0xb8, 0xe0, 0x28,
- 0x14, 0x09, 0xe8, 0x00,
- 0x80, 0x8b, 0x60, 0x2c,
- 0xa1, 0x0b, 0x28, 0x02,
- 0x40, 0x0e, 0x82, 0x45,
- 0x42, 0x06, 0x60, 0x2e,
- 0x40, 0x0a, 0xe0, 0xf8,
- 0xaa, 0x12, 0xe0, 0x86,
- 0xfa, 0x04, 0x40, 0x02,
- 0x81, 0x11, 0x09, 0x0e,
- 0x81, 0xa1, 0x09, 0x05,
- 0x00, 0x8a, 0x8b, 0x04,
- 0x14, 0xa0, 0xf4, 0x3c,
- 0x02, 0xf6, 0x04, 0x04,
- 0x0c, 0xe5, 0x80, 0x00,
- 0x80, 0x00, 0x10, 0x06,
- 0x89, 0x14, 0x8f, 0x04,
- 0xf1, 0x80, 0x40, 0xb2,
- 0xf0, 0x80, 0x00, 0x04,
- 0x82, 0xc5, 0x83, 0x0d,
- 0x04, 0xf0, 0x7e, 0x04,
- 0x06, 0xf0, 0xe4, 0x80,
- 0x00, 0x19, 0xe4, 0x70,
- 0x96, 0x0b, 0x60, 0x28,
- 0xe8, 0x00, 0x44, 0x28,
- 0x81, 0x81, 0x02, 0xa1,
- 0x0b, 0x04, 0x83, 0xf5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x06, 0xf0, 0x7e, 0xa4,
- 0x82, 0x01, 0xe4, 0x70,
- 0xe0, 0x28, 0x14, 0x19,
- 0x96, 0x0b, 0x0b, 0x0e,
- 0xe8, 0x00, 0x43, 0xc8,
- 0x60, 0x2c, 0x14, 0x09,
- 0x28, 0x02, 0x80, 0x8b,
- 0x82, 0x45, 0xa1, 0x0b,
- 0x60, 0x2e, 0x40, 0x0e,
- 0xe0, 0xf8, 0x42, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0x40, 0x02, 0xaa, 0x12,
- 0x09, 0x0e, 0xfa, 0x04,
- 0x8b, 0x14, 0x81, 0xa1,
- 0x92, 0x73, 0x0d, 0x34,
- 0x4e, 0x11, 0x8f, 0x04,
- 0xc0, 0x02, 0x60, 0x01,
- 0x6c, 0x00, 0x4c, 0xa3,
- 0x4c, 0x03, 0x82, 0x31,
- 0xc0, 0x01, 0x64, 0x09,
- 0x62, 0x01, 0x12, 0x0b,
- 0x0e, 0x34, 0x40, 0x01,
- 0xc1, 0x7d, 0xfb, 0x80,
- 0x00, 0x10, 0xdc, 0x35,
- 0x52, 0x01, 0xe4, 0x04,
- 0xc0, 0x02, 0x64, 0x09,
- 0xc8, 0xf1, 0x7c, 0x04,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x0a, 0x44, 0x88, 0x44,
- 0xaa, 0x43, 0xe9, 0x04,
- 0x81, 0x01, 0x00, 0x43,
- 0xc3, 0x4f, 0x08, 0x4e,
- 0xdd, 0x93, 0x8c, 0x4e,
- 0xa3, 0x0f, 0x0c, 0x0e,
- 0x81, 0x01, 0x08, 0x0e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x09,
- 0xa1, 0x0b, 0x80, 0x3b,
- 0x40, 0x96, 0x06, 0x65,
- 0x48, 0x3a, 0x80, 0x08,
- 0x40, 0x3a, 0xe0, 0x02,
- 0x08, 0x44, 0xe1, 0x02,
- 0x82, 0x43, 0xfa, 0x80,
- 0xec, 0x70, 0x08, 0x49,
- 0x81, 0x01, 0x49, 0x0d,
- 0x86, 0x13, 0x82, 0xa5,
- 0x6b, 0x71, 0x02, 0x19,
- 0xf4, 0x1d, 0xc0, 0x05,
- 0x46, 0x06, 0x80, 0xf5,
- 0x46, 0x4a, 0xe0, 0x64,
- 0x83, 0x11, 0x64, 0x84,
- 0x81, 0x11, 0x80, 0x45,
- 0xdd, 0x93, 0x88, 0x16,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x7b,
- 0x67, 0x71, 0x10, 0x70,
- 0x12, 0x70, 0x40, 0x11,
- 0xc0, 0x03, 0x67, 0x71,
- 0x81, 0xa1, 0x3e, 0xbe,
- 0x81, 0x01, 0x01, 0x61,
- 0x00, 0xa4, 0x85, 0x25,
- 0x04, 0xf0, 0x7b, 0x80,
- 0x7c, 0x58, 0xe4, 0x20,
- 0x8e, 0x1b, 0x6f, 0xfc,
- 0xa1, 0x1b, 0x91, 0x18,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x56, 0x15, 0x9f, 0xff,
- 0x82, 0xe5, 0x80, 0x00,
- 0x45, 0xfe, 0x20, 0x1a,
- 0xcf, 0xff, 0x7f, 0xfd,
- 0xfb, 0x80, 0x0c, 0x64,
- 0xe0, 0x17, 0x82, 0x61,
- 0xac, 0x1e, 0xb4, 0x1f,
- 0xc4, 0x1d, 0xa4, 0x14,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x88, 0xb1, 0x02, 0xa1,
- 0x88, 0x91, 0x04, 0x81,
- 0x60, 0x01, 0x14, 0x0a,
- 0xf6, 0x95, 0xc0, 0x01,
- 0x98, 0xf1, 0x3e, 0x14,
- 0x62, 0x01, 0x42, 0x63,
- 0x0c, 0x0c, 0xc0, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x81, 0x01, 0x5d, 0x93,
- 0x60, 0x38, 0x00, 0x19,
- 0xa1, 0x1b, 0x81, 0x21,
- 0x00, 0x00, 0x02, 0x16,
- 0x80, 0x08, 0x40, 0x96,
- 0xcc, 0x2a, 0x86, 0x25,
- 0xe0, 0x28, 0x06, 0x09,
- 0x7c, 0xc0, 0x08, 0x24,
- 0x48, 0x4a, 0xe2, 0x27,
- 0x02, 0x10, 0x66, 0x86,
- 0x01, 0x0a, 0xec, 0x04,
- 0x40, 0xc6, 0x64, 0x40,
- 0x44, 0x2a, 0xe0, 0x00,
- 0x08, 0x06, 0x60, 0x12,
- 0x00, 0x06, 0xf0, 0x00,
- 0x42, 0x2a, 0x80, 0x00,
- 0x42, 0x42, 0xe6, 0x86,
- 0xce, 0x2c, 0xf1, 0x84,
- 0xe0, 0x10, 0x46, 0x13,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x80, 0x8b, 0x06, 0x6b,
- 0x60, 0x38, 0x0c, 0x09,
- 0x21, 0x0b, 0x84, 0x7b,
- 0x86, 0x95, 0x81, 0x01,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xfc, 0x78, 0xe8,
- 0x40, 0x96, 0x00, 0xab,
- 0x14, 0x0a, 0xe0, 0x08,
- 0x84, 0x45, 0xe2, 0xa4,
- 0x67, 0x71, 0x12, 0x80,
- 0x8e, 0x1b, 0x40, 0x03,
- 0x8c, 0x2b, 0x12, 0x0b,
- 0xef, 0xfc, 0x69, 0x48,
- 0x41, 0x26, 0x00, 0x8b,
- 0xa1, 0x8b, 0xe0, 0x0c,
- 0x9c, 0x00, 0x50, 0xa0,
- 0xe3, 0xc8, 0x10, 0x0a,
- 0x0c, 0x0c, 0x80, 0x95,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x8e, 0x1b, 0x12, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xa1, 0x0b, 0x8c, 0x2b,
- 0xdc, 0x00, 0x50, 0x00,
- 0x0c, 0x0c, 0x90, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe1, 0x00, 0x1e, 0x06,
- 0x61, 0x9c, 0x00, 0x46,
- 0x66, 0x38, 0x83, 0x11,
- 0xc1, 0xc3, 0xef, 0xb8,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x73, 0xd8, 0x81, 0x11,
- 0x81, 0x81, 0x6f, 0xbc,
- 0x60, 0x00, 0x42, 0x76,
- 0x62, 0x98, 0x8c, 0x0b,
- 0x7e, 0xd8, 0xe8, 0x24,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x01, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x0c, 0x2b, 0xef, 0xdc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xf5, 0x42, 0x20,
- 0x44, 0x4a, 0x40, 0xff,
- 0x4c, 0x13, 0xe0, 0x98,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x70, 0x00, 0x39,
- 0xf3, 0xec, 0x44, 0x30,
- 0xf8, 0x70, 0x40, 0x21,
- 0x4c, 0x81, 0x84, 0x45,
- 0x40, 0x2b, 0x6c, 0x21,
- 0x73, 0xf9, 0x42, 0x10,
- 0x4c, 0x13, 0xc0, 0xff,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x20, 0x40, 0x81,
- 0xf8, 0x10, 0x00, 0x19,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xf8, 0x10, 0x40, 0x11,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf8, 0x30, 0x00, 0x19,
- 0x40, 0x11, 0xc8, 0x19,
- 0x40, 0x81, 0xf8, 0x30,
- 0x00, 0x09, 0xe0, 0x30,
- 0x40, 0x0a, 0xf8, 0x30,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x43, 0xf6, 0x1c, 0x04,
- 0xff, 0xc0, 0x6f, 0xfd,
- 0x02, 0x0e, 0x02, 0x0f,
- 0x40, 0x00, 0xf0, 0x00,
- 0xc3, 0x00, 0x7c, 0x01,
- 0x9c, 0x04, 0x9c, 0x0e,
- 0x9c, 0x0e, 0x82, 0x0f,
- 0x6e, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x38, 0x63, 0x11,
- 0x41, 0xc6, 0xa3, 0x0b,
- 0x00, 0x20, 0x12, 0xfd,
- 0x00, 0x01, 0x02, 0x06,
- 0x4c, 0x81, 0xbf, 0xc1,
- 0x80, 0x38, 0x03, 0x11,
- 0x80, 0x00, 0x40, 0x15,
- 0x68, 0x00, 0x5f, 0xa8,
- 0x42, 0x86, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x24, 0x5b, 0x08,
- 0xef, 0xfc, 0x76, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8b, 0x11, 0x00, 0x6b,
- 0xe8, 0x28, 0x56, 0x88,
- 0x61, 0x24, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x06,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x16, 0x81, 0x11,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x08, 0xef, 0xdc,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x0c, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x13, 0x7d,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x5c, 0xa8,
- 0xe8, 0x00, 0x5c, 0x08,
- 0x61, 0x44, 0x40, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0xec, 0x04, 0x02, 0x00,
- 0x84, 0x95, 0xe7, 0x1d,
- 0xec, 0x2c, 0x02, 0x00,
- 0x84, 0xb5, 0xe7, 0x1d,
- 0xec, 0x10, 0x02, 0x00,
- 0x84, 0xd5, 0xe5, 0x1d,
- 0x86, 0x25, 0xad, 0x0b,
- 0x86, 0x65, 0xb3, 0x0b,
- 0x86, 0xb5, 0xb5, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x20, 0x58, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x58,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x40, 0x35, 0x48,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x08, 0x38, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x54,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x4c, 0x10, 0xc8,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0xb5, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0x75, 0xf2, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x01, 0x01,
- 0x68, 0x20, 0x7d, 0xa8,
- 0x03, 0x46, 0x81, 0x61,
- 0x83, 0x31, 0x61, 0x4c,
- 0x08, 0x36, 0x84, 0x24,
- 0xe1, 0x14, 0x44, 0xc6,
- 0x90, 0x36, 0x88, 0x44,
- 0x08, 0x66, 0x88, 0x24,
- 0x84, 0x14, 0x87, 0x21,
- 0x83, 0x11, 0x04, 0x26,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x20, 0x3c, 0x68,
- 0x61, 0x14, 0x40, 0xc6,
- 0x80, 0x04, 0x83, 0x11,
- 0xc1, 0x83, 0x80, 0x16,
- 0xdd, 0x93, 0xc7, 0x13,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x40, 0x96, 0xb3, 0x0b,
- 0x4c, 0x01, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0x40, 0x66, 0x82, 0x25,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x40, 0xf8, 0xe8, 0x50,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0xd1, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x15,
- 0x6c, 0x79, 0x0c, 0x19,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0x01, 0xe6, 0x86,
- 0x67, 0xf9, 0x00, 0x8a,
- 0x41, 0xd6, 0xc0, 0x03,
- 0x0e, 0x66, 0x00, 0x3c,
- 0x00, 0x04, 0x80, 0x04,
- 0xa1, 0x7b, 0x5a, 0x80,
- 0x66, 0x31, 0x4c, 0x03,
- 0x82, 0x45, 0xc0, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x68, 0x0c, 0x70, 0x48,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x47, 0xb8, 0x98, 0x75,
- 0x8c, 0x0b, 0x68, 0x44,
- 0x6c, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2b,
- 0x88, 0x55, 0xb3, 0x0b,
- 0x92, 0xd5, 0xa1, 0x7b,
- 0x68, 0x3c, 0x72, 0xc8,
- 0x00, 0x7b, 0x8c, 0x0b,
- 0xe1, 0x34, 0x41, 0x06,
- 0x02, 0x96, 0x00, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x0e, 0x00, 0x16,
- 0x0c, 0x19, 0xff, 0xf8,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xe3, 0xf0, 0x02, 0x0a,
- 0xc4, 0x04, 0x00, 0x10,
- 0x6c, 0xfd, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xe8, 0x04, 0x4b, 0xe8,
- 0x8c, 0x15, 0xa1, 0x7b,
- 0x21, 0x7b, 0x87, 0x85,
- 0xe0, 0x00, 0x40, 0x66,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8a, 0x15, 0xc0, 0x2b,
- 0x61, 0x4c, 0x55, 0x46,
- 0x66, 0xe0, 0x10, 0x60,
- 0x28, 0x04, 0xc0, 0xa3,
- 0x67, 0x61, 0x12, 0x60,
- 0x02, 0x60, 0xc0, 0x9f,
- 0x40, 0x54, 0x65, 0xc1,
- 0x65, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x54,
- 0x40, 0x54, 0x66, 0xd1,
- 0x5e, 0xd8, 0x90, 0x4b,
- 0x92, 0x5b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x28, 0x04, 0x82, 0xf5,
- 0x66, 0x31, 0x02, 0x60,
- 0x08, 0x60, 0xc0, 0xad,
- 0x40, 0xa1, 0x64, 0x71,
- 0x61, 0x78, 0x90, 0x2b,
- 0x92, 0x3b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x38, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x0c,
- 0x80, 0x55, 0xa1, 0x0b,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x28, 0x04, 0xdd, 0x93,
- 0x64, 0x81, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x99,
- 0x40, 0xa2, 0x65, 0x21,
- 0x50, 0xd8, 0x90, 0x1b,
- 0x73, 0x95, 0xef, 0xf8,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0x64, 0x51, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x03,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x87, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x64, 0x39, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x02,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x18, 0x03, 0x46,
- 0x64, 0x18, 0x01, 0x4a,
- 0x84, 0x14, 0xc0, 0x01,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xdd, 0x93, 0x84, 0x06,
- 0x66, 0x61, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x66, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x86, 0xc5, 0x80, 0x00,
- 0x64, 0x99, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x56, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x84, 0x85, 0x80, 0x00,
- 0x66, 0xc9, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x02,
- 0x04, 0x46, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x82, 0x45, 0x80, 0x00,
- 0x64, 0x95, 0x03, 0x0a,
- 0x03, 0x06, 0x40, 0x02,
- 0x04, 0x14, 0xe1, 0x04,
- 0x04, 0x26, 0x87, 0x21,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x04, 0x03, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x79, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x03, 0x0a, 0xc4, 0x17,
- 0xc0, 0x0f, 0x66, 0x81,
- 0x02, 0x8a, 0x86, 0xf5,
- 0xc0, 0x0f, 0x64, 0xf5,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x06,
- 0x80, 0x00, 0x02, 0x15,
- 0x02, 0x8a, 0x84, 0x85,
- 0xc0, 0x0c, 0x66, 0xcd,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x16,
- 0x80, 0x00, 0x02, 0x15,
- 0x03, 0x0a, 0x82, 0x45,
- 0x40, 0x0a, 0x64, 0xa1,
- 0xe1, 0x04, 0x02, 0xc6,
- 0x85, 0x21, 0x04, 0x14,
- 0x80, 0x00, 0x04, 0x36,
- 0x02, 0xc6, 0x84, 0x26,
- 0x84, 0x14, 0xe1, 0x04,
- 0x40, 0x11, 0x84, 0x18,
- 0xc0, 0x2b, 0x65, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x05, 0x86,
- 0x88, 0x28, 0x88, 0x24,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x09, 0x0e, 0x0d,
- 0xc1, 0x18, 0x05, 0x46,
- 0xc0, 0x00, 0x04, 0x25,
- 0x81, 0xb0, 0x02, 0x14,
- 0x40, 0x00, 0x04, 0x29,
- 0x84, 0x04, 0x02, 0x10,
- 0xc4, 0x04, 0x04, 0x20,
- 0xc0, 0x0a, 0x42, 0x1a,
- 0x6e, 0x01, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xe1, 0x24, 0x01, 0x46,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x06, 0x04, 0x26,
- 0x84, 0x14, 0xe1, 0x14,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x94,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x24, 0x01, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x26, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x18, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0x25, 0x1b, 0xc0, 0x0b,
- 0xe1, 0x24, 0x03, 0x46,
- 0x82, 0x45, 0x84, 0x24,
- 0x42, 0x4a, 0x88, 0x18,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x0c, 0x0c, 0x83, 0x11,
- 0x23, 0xf8, 0xf2, 0xfc,
- 0x3e, 0x0e, 0xe0, 0x20,
- 0x88, 0x18, 0x8c, 0x0b,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x86, 0x08, 0x16,
- 0x75, 0x78, 0xe0, 0x0c,
- 0x81, 0x21, 0x68, 0x50,
- 0x61, 0x44, 0x10, 0xc6,
- 0xe1, 0x48, 0x53, 0x86,
- 0xff, 0xa1, 0x20, 0x04,
- 0xe1, 0x24, 0x57, 0x46,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x4e, 0x00,
- 0x80, 0xc5, 0xa1, 0x7b,
- 0x6f, 0xa9, 0x0c, 0x05,
- 0xa5, 0x0b, 0xc0, 0x0b,
- 0xa4, 0x04, 0x82, 0xd5,
- 0x94, 0x0d, 0x80, 0x00,
- 0x0c, 0x29, 0x84, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x02, 0x96,
- 0x68, 0x0c, 0x59, 0x28,
- 0x81, 0x95, 0x8c, 0x0b,
- 0x80, 0x08, 0xa0, 0x04,
- 0x01, 0x55, 0xc7, 0x07,
- 0xf0, 0x04, 0x4e, 0x00,
- 0xef, 0xfc, 0x52, 0xe8,
- 0x80, 0x04, 0xac, 0x04,
- 0xf8, 0x35, 0xa1, 0x0b,
- 0x83, 0x11, 0x3e, 0x04,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x20, 0x28,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x36, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0x78, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x3e, 0x0e, 0x81, 0x81,
- 0xe1, 0x24, 0x01, 0xc6,
- 0x55, 0x46, 0x00, 0x04,
- 0x80, 0x86, 0xe1, 0x24,
- 0x80, 0x64, 0xa8, 0x04,
- 0x8e, 0x0b, 0x00, 0x14,
- 0xe8, 0x20, 0x74, 0xa8,
- 0x43, 0xa6, 0x03, 0x91,
- 0x03, 0x21, 0xe0, 0x0c,
- 0x70, 0x38, 0x8e, 0x0b,
- 0x41, 0x86, 0xe8, 0x50,
- 0x80, 0x14, 0xe1, 0x14,
- 0x03, 0x46, 0x04, 0x8c,
- 0x84, 0x14, 0xe1, 0x24,
- 0xc4, 0x29, 0x84, 0x28,
- 0x43, 0x46, 0x04, 0x26,
- 0x04, 0x14, 0xe1, 0x18,
- 0x84, 0xb8, 0x83, 0x21,
- 0x02, 0xc6, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x24,
- 0x02, 0x86, 0x04, 0x96,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x00, 0x9c,
- 0xe8, 0x50, 0x6e, 0x88,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0xa9, 0x11,
- 0x8e, 0x0b, 0x00, 0x96,
- 0xe8, 0x20, 0x72, 0x08,
- 0x60, 0x0c, 0x02, 0x86,
- 0x6d, 0xb8, 0x81, 0x21,
- 0x8e, 0x0b, 0x68, 0x50,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0x52, 0x00, 0xc7, 0x07,
- 0x12, 0x0a, 0xf0, 0x04,
- 0x80, 0xc5, 0xfb, 0xfc,
- 0x6f, 0xa9, 0x0e, 0x05,
- 0xa3, 0x0b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x86, 0xb5,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x02, 0xa6,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0xe8, 0x0c, 0x50, 0xa8,
- 0x00, 0xc6, 0x81, 0x85,
- 0x80, 0x04, 0xe1, 0x44,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x52, 0x00,
- 0x80, 0x04, 0xa8, 0x04,
- 0xf4, 0x45, 0x81, 0x6b,
- 0x8e, 0x0b, 0x2b, 0x11,
- 0xe8, 0x20, 0x6e, 0x08,
- 0x00, 0x14, 0xa8, 0x04,
- 0x6d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xc6, 0xe8, 0x20,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xbe, 0x04, 0x83, 0x11,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x16, 0x08,
- 0x70, 0x01, 0x00, 0x06,
- 0x02, 0x06, 0x40, 0x20,
- 0xff, 0xc0, 0x60, 0x01,
- 0xdd, 0x93, 0x80, 0x1e,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x81, 0x01, 0x04, 0x6b,
- 0x68, 0x20, 0x55, 0x08,
- 0x43, 0x86, 0x81, 0x11,
- 0x49, 0xc6, 0x61, 0x48,
- 0x04, 0x24, 0xe1, 0x48,
- 0x70, 0x01, 0x02, 0x06,
- 0x04, 0x34, 0xc0, 0x20,
- 0x88, 0x58, 0xa1, 0x8b,
- 0x08, 0x48, 0x90, 0x24,
- 0x60, 0x01, 0x04, 0x06,
- 0x0c, 0xc9, 0xff, 0xc0,
- 0x40, 0x2b, 0x6c, 0x19,
- 0xa6, 0x5f, 0x84, 0x3f,
- 0x60, 0xc7, 0xd0, 0x47,
- 0x46, 0x52, 0xa8, 0x5f,
- 0x0c, 0x49, 0xf9, 0xb0,
- 0xc0, 0x2c, 0x0c, 0xfd,
- 0xc0, 0xe0, 0x08, 0x44,
- 0x44, 0x22, 0x00, 0xb5,
- 0xa1, 0x7b, 0xd0, 0x90,
- 0x49, 0xfe, 0x80, 0xc5,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xa4, 0x3f, 0x88, 0x3f,
- 0x83, 0x11, 0x04, 0x3e,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x20, 0x12, 0x08,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x50, 0x06, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0xa0,
- 0x40, 0x2d, 0x67, 0xcd,
- 0x20, 0x9e, 0x81, 0x91,
- 0xe1, 0x4c, 0x05, 0xc6,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xc0, 0x00, 0x00, 0x16,
- 0x0c, 0xf5, 0x4c, 0x01,
- 0x40, 0x06, 0x40, 0x2c,
- 0x80, 0x04, 0xe1, 0x4c,
- 0x88, 0x04, 0x80, 0x74,
- 0xe1, 0xe0, 0x16, 0x74,
- 0xe0, 0xe0, 0x14, 0xb4,
- 0xfc, 0xc0, 0x02, 0xa4,
- 0x00, 0x74, 0x00, 0x1e,
- 0x08, 0x14, 0xe1, 0xc0,
- 0xfc, 0xc4, 0x04, 0xa4,
- 0xf0, 0x10, 0x00, 0x0a,
- 0x94, 0x05, 0x84, 0x2e,
- 0xf0, 0x08, 0x00, 0x0a,
- 0x00, 0x0a, 0x98, 0x85,
- 0xaa, 0x65, 0xf0, 0x0c,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x40, 0x00, 0x13, 0x68,
- 0xc1, 0x4c, 0x17, 0xc6,
- 0x02, 0x56, 0x04, 0xab,
- 0x6e, 0xd8, 0xe0, 0x10,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x61, 0x98, 0x05, 0x46,
- 0xfb, 0x80, 0x00, 0x74,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x02, 0x06, 0x40, 0x20,
- 0xc0, 0x20, 0x73, 0x01,
- 0x40, 0x12, 0x20, 0x43,
- 0x20, 0x14, 0xf1, 0x80,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x84,
- 0xd5, 0x8e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x1f, 0x15, 0xf6, 0x15,
- 0x02, 0x56, 0x94, 0x2b,
- 0x8c, 0x0b, 0x60, 0x80,
- 0x68, 0x20, 0x6a, 0xa8,
- 0x0c, 0x0b, 0x84, 0x7b,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x40, 0x00, 0xac, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xef, 0xf8, 0x7c, 0x08,
- 0x8e, 0x2b, 0x1b, 0xa5,
- 0x02, 0x56, 0x3e, 0x2e,
- 0x69, 0x38, 0xe0, 0x20,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x7b, 0x80, 0x00, 0x74,
- 0x72, 0xfc, 0x43, 0xc6,
- 0x40, 0x12, 0xc0, 0x20,
- 0x02, 0x46, 0x71, 0x80,
- 0xc0, 0x20, 0x72, 0xc0,
- 0x04, 0x10, 0x00, 0x34,
- 0x09, 0x91, 0xe4, 0x00,
- 0x17, 0xc6, 0x88, 0x11,
- 0x08, 0x3e, 0xe1, 0x4c,
- 0xe1, 0x98, 0x05, 0x46,
- 0x08, 0xca, 0x85, 0xa5,
- 0xec, 0x08, 0x0a, 0x40,
- 0x0a, 0x34, 0x77, 0x5d,
- 0x4a, 0x50, 0xe1, 0x90,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x80, 0x00, 0x08, 0x16,
- 0x66, 0x96, 0x48, 0x4a,
- 0x20, 0x74, 0xe1, 0x37,
- 0x46, 0xc0, 0x86, 0xc3,
- 0x41, 0xff, 0x73, 0xf1,
- 0xe1, 0x88, 0x0a, 0x44,
- 0x8a, 0xcb, 0x08, 0x01,
- 0x82, 0x7b, 0x0e, 0x33,
- 0x4d, 0xa4, 0x81, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xa1, 0xcb, 0xdd, 0xae,
- 0x00, 0x34, 0xfe, 0x75,
- 0xfb, 0x80, 0x18, 0x94,
- 0x88, 0xc3, 0x44, 0x57,
- 0x12, 0xc0, 0x0a, 0x13,
- 0xc5, 0x3e, 0xe4, 0x10,
- 0xf0, 0x3c, 0x48, 0x30,
- 0xf4, 0x95, 0xbf, 0x4b,
- 0x91, 0xf5, 0xbe, 0x24,
- 0x60, 0x40, 0x02, 0x56,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x4c, 0x91, 0xe8, 0x20,
- 0x40, 0x38, 0x64, 0xc5,
- 0x4a, 0x58, 0x8c, 0x0b,
- 0x45, 0xd8, 0xe8, 0x00,
- 0x0c, 0x0b, 0xef, 0xfc,
- 0x40, 0x15, 0x6e, 0x09,
- 0xff, 0xfc, 0x03, 0xee,
- 0xe8, 0x00, 0x0e, 0x0a,
- 0x42, 0x00, 0x82, 0x0f,
- 0x40, 0x00, 0x7c, 0x04,
- 0x4c, 0x13, 0xfd, 0x04,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x98, 0x03, 0x86,
- 0x4c, 0x03, 0x84, 0x9e,
- 0x40, 0x15, 0x6e, 0x09,
- 0xfb, 0x80, 0x00, 0x74,
- 0x62, 0xe5, 0x4c, 0xb1,
- 0x17, 0xc6, 0x40, 0x15,
- 0x8e, 0x05, 0xe1, 0x4c,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x05, 0x46, 0x40, 0x20,
- 0x02, 0x06, 0xe1, 0x98,
- 0x40, 0x20, 0x73, 0x01,
- 0x20, 0x14, 0xa0, 0x43,
- 0xf1, 0x80, 0x40, 0x12,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x94,
- 0xd5, 0x9e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x0c, 0x19, 0xf6, 0x15,
- 0x40, 0x15, 0x62, 0x65,
- 0xe1, 0x4c, 0x00, 0x46,
- 0x88, 0x19, 0x80, 0x04,
- 0x44, 0x20, 0x80, 0x28,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x0c, 0x09, 0x80, 0x26,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x6c, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x45, 0x88,
- 0x00, 0x60, 0x20, 0x44,
- 0xc0, 0x54, 0x65, 0x01,
- 0x7b, 0x80, 0x04, 0x04,
- 0x19, 0x11, 0x81, 0x01,
- 0x72, 0xc1, 0x06, 0x46,
- 0x4f, 0x58, 0xc0, 0x20,
- 0x2c, 0x14, 0xe8, 0x00,
- 0x00, 0x2e, 0x9f, 0x21,
- 0x7c, 0x51, 0x4e, 0xa0,
- 0x84, 0x7e, 0xc3, 0x00,
- 0xef, 0xf8, 0x6d, 0xe8,
- 0xa9, 0x91, 0x0e, 0x2b,
- 0x60, 0x01, 0x02, 0x06,
- 0x00, 0x94, 0x7f, 0xc0,
- 0x2c, 0x24, 0xfb, 0x80,
- 0xa0, 0x1f, 0x84, 0x1f,
- 0x7c, 0x01, 0x40, 0x10,
- 0x88, 0x0e, 0xc3, 0x00,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x80, 0x95, 0xe0, 0x98,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x8c, 0x0b, 0xdd, 0x93,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0xa5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0x86, 0x00, 0x6b,
- 0x80, 0x14, 0xe1, 0x48,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xbc,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0x7c, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0xef, 0xf8, 0x7a, 0x68,
- 0x83, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x22, 0x78, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0x08, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x61, 0x45, 0x00, 0x29,
- 0x0a, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x65, 0xc1,
- 0x62, 0x11, 0x00, 0x39,
- 0x91, 0xc1, 0x40, 0x15,
- 0x81, 0x71, 0x01, 0x61,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x1d, 0x00, 0x19,
- 0x40, 0x21, 0xc0, 0x15,
- 0x40, 0x15, 0x63, 0x09,
- 0x40, 0x31, 0x81, 0x21,
- 0xc0, 0x15, 0x63, 0x0d,
- 0x06, 0x10, 0x07, 0xc5,
- 0x0c, 0x4a, 0xe4, 0x40,
- 0x0c, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x0e, 0x06, 0x04, 0x10,
- 0x94, 0x84, 0x80, 0x00,
- 0x50, 0x0a, 0x51, 0x84,
- 0x82, 0x25, 0xe4, 0x9c,
- 0x6c, 0x34, 0x12, 0x80,
- 0x12, 0xda, 0xa1, 0x8b,
- 0x42, 0x0a, 0xe4, 0x08,
- 0x80, 0x95, 0xed, 0x80,
- 0x82, 0x61, 0x02, 0x71,
- 0xbf, 0x8b, 0x85, 0x05,
- 0xa1, 0x6b, 0x88, 0x25,
- 0x00, 0x95, 0x82, 0x45,
- 0xc0, 0x0d, 0x69, 0x6d,
- 0x12, 0xc0, 0x93, 0x6b,
- 0x40, 0x93, 0x84, 0x20,
- 0x80, 0x16, 0x0b, 0xe1,
- 0xf0, 0x3c, 0x52, 0x80,
- 0x02, 0xa5, 0xb9, 0x9b,
- 0x9b, 0x80, 0x18, 0xc4,
- 0xa1, 0x9b, 0x49, 0x87,
- 0x73, 0xfd, 0x50, 0x80,
- 0x18, 0xc4, 0x40, 0x0f,
- 0x50, 0x8a, 0xfb, 0x80,
- 0x90, 0xc3, 0xc6, 0xa6,
- 0x88, 0xc1, 0x7d, 0x05,
- 0xe5, 0xfc, 0x0d, 0x0a,
- 0x40, 0x23, 0xf0, 0xa5,
- 0x40, 0x0a, 0x68, 0x95,
- 0xfb, 0x80, 0x08, 0xc4,
- 0x68, 0x89, 0x40, 0x13,
- 0x88, 0x33, 0x40, 0x0a,
- 0x6f, 0xf1, 0x06, 0x8a,
- 0x0a, 0x34, 0x40, 0x2b,
- 0x00, 0x49, 0xfb, 0x80,
- 0x00, 0x2d, 0x07, 0xcd,
- 0x40, 0x13, 0x88, 0x11,
- 0x40, 0x0a, 0x68, 0x8d,
- 0xec, 0x04, 0x02, 0x30,
- 0x68, 0x91, 0x40, 0x33,
- 0x06, 0x06, 0x40, 0x0a,
- 0xc0, 0x20, 0x70, 0x01,
- 0x68, 0x85, 0x40, 0x13,
- 0x02, 0x14, 0x40, 0x0a,
- 0x48, 0x40, 0xfb, 0x80,
- 0xa6, 0x1f, 0x1c, 0x20,
- 0x07, 0xcd, 0x40, 0x41,
- 0x00, 0x45, 0x80, 0x2d,
- 0xc0, 0x0d, 0x69, 0x69,
- 0x64, 0xf9, 0x40, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x89, 0x41, 0x09, 0x5b,
- 0x0e, 0x09, 0x00, 0x2b,
- 0x40, 0x43, 0xc0, 0x15,
- 0xc0, 0x0a, 0x68, 0x81,
- 0x12, 0xfd, 0x44, 0x20,
- 0x40, 0x23, 0xc0, 0xff,
- 0x40, 0x15, 0x0e, 0x09,
- 0xe1, 0x40, 0x04, 0x46,
- 0x00, 0x86, 0x08, 0x24,
- 0x88, 0x1e, 0xe1, 0x40,
- 0x80, 0x1e, 0x80, 0x04,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x98, 0x0b, 0x46,
- 0xe0, 0x90, 0x0c, 0x14,
- 0x4e, 0x00, 0x14, 0xca,
- 0x0c, 0x64, 0xf0, 0x3c,
- 0xa1, 0x0b, 0x7b, 0x80,
- 0x00, 0x16, 0x2e, 0x6f,
- 0x58, 0x22, 0x80, 0x00,
- 0x40, 0x1a, 0x71, 0xb0,
- 0x04, 0xc4, 0xe6, 0x82,
- 0x02, 0xc4, 0x60, 0xc0,
- 0x24, 0x6f, 0xfb, 0x80,
- 0x49, 0x6e, 0x86, 0x2b,
- 0x94, 0x5a, 0xc5, 0x07,
- 0x02, 0x00, 0x02, 0x53,
- 0x4a, 0x50, 0xe4, 0x04,
- 0xc1, 0xff, 0x73, 0xf1,
- 0x8a, 0x43, 0x01, 0x65,
- 0x00, 0x00, 0x51, 0x54,
- 0xc9, 0x5e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x40, 0x32, 0xc4, 0x17,
- 0x0c, 0x0c, 0xf0, 0x84,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x36, 0x6e, 0x01,
- 0x40, 0x60, 0xa3, 0x0b,
- 0x4f, 0x78, 0x9c, 0x00,
- 0x41, 0x06, 0x88, 0x00,
- 0x02, 0x96, 0x61, 0x34,
- 0x00, 0x04, 0xe0, 0x04,
- 0xe1, 0xa0, 0x50, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x71, 0x40, 0x2b,
- 0x00, 0x16, 0xa0, 0x7e,
- 0x0c, 0x0b, 0x81, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x67, 0xb8, 0x81, 0x01,
- 0x7e, 0x0e, 0xe8, 0x1c,
- 0xe1, 0x48, 0x41, 0x86,
- 0x41, 0xc6, 0x00, 0x14,
- 0xfc, 0x1e, 0xe1, 0x48,
- 0x80, 0x04, 0x84, 0x18,
- 0x0c, 0x29, 0x80, 0x08,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x68, 0x89, 0x0c, 0x0b,
- 0x06, 0x04, 0x40, 0x0a,
- 0x02, 0x29, 0xe0, 0xa0,
- 0x3e, 0x3e, 0xa6, 0x1f,
- 0x24, 0x1f, 0xf0, 0x27,
- 0x4c, 0x15, 0xc5, 0x07,
- 0x40, 0x02, 0x68, 0x01,
- 0x64, 0x31, 0x06, 0x60,
- 0x83, 0x11, 0xc0, 0x28,
- 0x46, 0x75, 0xc1, 0x1d,
- 0x02, 0x10, 0x58, 0x04,
- 0x7e, 0x75, 0xc4, 0x04,
- 0xc4, 0x10, 0x06, 0x30,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x08, 0x60, 0x40, 0x1c,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x65, 0xc1, 0x0a, 0x60,
- 0x81, 0xb1, 0x40, 0xd9,
- 0xbc, 0x0e, 0x81, 0xa1,
- 0xf8, 0x04, 0x46, 0x05,
- 0x09, 0x0e, 0xa0, 0x04,
- 0xe1, 0x98, 0x01, 0x46,
- 0x81, 0x01, 0x00, 0x9a,
- 0x14, 0x4a, 0x8b, 0x85,
- 0x14, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x16, 0x06, 0x04, 0x10,
- 0x94, 0x14, 0x80, 0x00,
- 0x42, 0x0a, 0x51, 0x14,
- 0x90, 0xe5, 0xe4, 0xac,
- 0x84, 0x25, 0xa1, 0xab,
- 0x69, 0x6d, 0x0c, 0x25,
- 0x85, 0xab, 0xc0, 0x0d,
- 0x08, 0x91, 0x0c, 0x0b,
- 0x40, 0x00, 0x80, 0x0a,
- 0x80, 0xff, 0x13, 0xf1,
- 0x90, 0x98, 0x40, 0x02,
- 0x06, 0x00, 0x0e, 0xa5,
- 0x80, 0x28, 0x04, 0x01,
- 0xec, 0x34, 0x04, 0x10,
- 0x80, 0xb5, 0xe4, 0x2d,
- 0xbf, 0x1b, 0x4d, 0x1e,
- 0x87, 0x25, 0x8a, 0xd5,
- 0x8a, 0x65, 0xa1, 0x1b,
- 0x70, 0x3c, 0x58, 0x10,
- 0xe1, 0xc0, 0x04, 0x14,
- 0xb9, 0xcb, 0x0c, 0x1e,
- 0x84, 0x8b, 0x01, 0x71,
- 0x49, 0x17, 0x82, 0x45,
- 0x4e, 0x10, 0xa1, 0xcb,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x4e, 0x7a, 0x80, 0x8b,
- 0xc5, 0x77, 0xc6, 0xb2,
- 0x92, 0x23, 0x09, 0x14,
- 0x73, 0xf1, 0x40, 0x20,
- 0x88, 0x31, 0x41, 0xff,
- 0x02, 0x03, 0x86, 0x2b,
- 0x81, 0xa5, 0x8e, 0x1b,
- 0x02, 0x10, 0x21, 0x8b,
- 0x00, 0xc5, 0xec, 0x04,
- 0x88, 0x01, 0x00, 0x00,
- 0x00, 0x00, 0x44, 0xc5,
- 0xa1, 0x1b, 0x88, 0x21,
- 0x44, 0x77, 0xfc, 0xd5,
- 0x8e, 0x33, 0x90, 0x0b,
- 0x82, 0xa1, 0x02, 0xb1,
- 0xe5, 0xfc, 0x15, 0x0a,
- 0x9d, 0x01, 0xe8, 0xe5,
- 0x9f, 0x01, 0x0c, 0x0e,
- 0xbc, 0x04, 0x8e, 0x0e,
- 0xfc, 0x04, 0xcc, 0x0e,
- 0x0c, 0x19, 0x80, 0x08,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf0, 0x17, 0xbe, 0x24,
- 0xa2, 0x0f, 0xa4, 0x0f,
- 0x68, 0x01, 0x4c, 0x05,
- 0x8c, 0x0b, 0x40, 0x02,
- 0xe8, 0x10, 0x4a, 0xc8,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x80, 0x18, 0x82, 0x65,
- 0x42, 0x10, 0x80, 0x28,
- 0x44, 0x20, 0xf0, 0x80,
- 0xa2, 0x2f, 0xf3, 0x7c,
- 0xf8, 0x80, 0x42, 0x20,
- 0x7e, 0x04, 0x80, 0x16,
- 0x5b, 0xb8, 0x83, 0x11,
- 0x01, 0x86, 0xe8, 0x1c,
- 0x80, 0x04, 0xe1, 0x98,
- 0x0c, 0x0b, 0xa3, 0x0b,
- 0x80, 0x15, 0x0e, 0x09,
- 0x9c, 0xa4, 0x00, 0x04,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x80, 0x85, 0x80, 0x15,
- 0x68, 0x00, 0x49, 0xc8,
- 0x03, 0x01, 0x8c, 0x0b,
- 0x45, 0x18, 0x81, 0x11,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0x1c, 0x38, 0xf2, 0x7c,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x63, 0x09, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x15,
- 0x00, 0xc9, 0x91, 0x15,
- 0x40, 0x36, 0x6e, 0x09,
- 0xfa, 0x80, 0x08, 0x24,
- 0x63, 0x0d, 0x00, 0x69,
- 0x46, 0x02, 0x40, 0x15,
- 0x06, 0x59, 0xf0, 0x90,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x58, 0x6a, 0xa1, 0xcb,
- 0x0c, 0x30, 0x66, 0x92,
- 0xc0, 0xdb, 0x66, 0x10,
- 0x6e, 0x11, 0x46, 0x51,
- 0x86, 0x45, 0xc0, 0x36,
- 0x7a, 0x80, 0x0e, 0xc4,
- 0x12, 0x84, 0x81, 0x81,
- 0xcb, 0x9d, 0xfa, 0x80,
- 0x54, 0x92, 0x84, 0x05,
- 0x56, 0x02, 0xf0, 0x9c,
- 0x16, 0xb9, 0xf0, 0xa8,
- 0xc0, 0x1a, 0x6e, 0x41,
- 0x7c, 0x85, 0xb9, 0xbb,
- 0x84, 0x04, 0x10, 0x80,
- 0x94, 0xcb, 0x32, 0x53,
- 0x81, 0x45, 0x98, 0x56,
- 0x81, 0x71, 0x0b, 0x9b,
- 0x0a, 0x8a, 0x80, 0xa5,
- 0x83, 0x71, 0x74, 0x08,
- 0x18, 0x76, 0x80, 0x75,
- 0x18, 0xc4, 0x8e, 0x5b,
- 0x0c, 0x00, 0x7a, 0x80,
- 0xc0, 0x58, 0x66, 0x40,
- 0x60, 0x88, 0x0e, 0xc4,
- 0xe0, 0x88, 0x12, 0x44,
- 0x7c, 0x1c, 0x0c, 0x85,
- 0x66, 0x10, 0x14, 0x00,
- 0x14, 0x93, 0xc0, 0xdb,
- 0x0a, 0x0a, 0x8c, 0x73,
- 0x82, 0x21, 0x7b, 0xfc,
- 0xe0, 0x40, 0x52, 0x85,
- 0xe8, 0x00, 0x0e, 0x85,
- 0x62, 0x40, 0x52, 0x85,
- 0xe0, 0x84, 0x10, 0xc4,
- 0x64, 0x00, 0x0e, 0x75,
- 0x18, 0x63, 0x8c, 0x83,
- 0xd0, 0x80, 0x58, 0xc2,
- 0x61, 0x40, 0x52, 0x75,
- 0xe0, 0x84, 0x12, 0x44,
- 0x68, 0x01, 0x10, 0x7b,
- 0x94, 0x93, 0x40, 0x01,
- 0x52, 0x73, 0x88, 0xa3,
- 0x10, 0x7b, 0xe6, 0x80,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xe7, 0x80, 0x52, 0x73,
- 0x60, 0x01, 0x0c, 0x79,
- 0x54, 0x71, 0xc0, 0x04,
- 0xc0, 0x01, 0x61, 0x01,
- 0x64, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0xc0, 0x01, 0x62, 0x01,
- 0x68, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0x40, 0x01, 0x63, 0x01,
- 0x18, 0x49, 0x81, 0x41,
- 0xc0, 0x1a, 0x0e, 0x41,
- 0x62, 0x11, 0x46, 0x41,
- 0x44, 0x8a, 0xc0, 0x38,
- 0xde, 0xd5, 0xf4, 0x04,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x1c, 0x50, 0xc8,
- 0x0c, 0x1b, 0x81, 0x11,
- 0x40, 0x0a, 0x68, 0x91,
- 0x00, 0x60, 0x80, 0x7b,
- 0x40, 0x28, 0x64, 0x01,
- 0x70, 0x01, 0x04, 0x06,
- 0x88, 0x11, 0xc0, 0x20,
- 0xc5, 0x17, 0x01, 0x65,
- 0x02, 0x10, 0x41, 0x34,
- 0xc9, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x1b,
- 0x61, 0x48, 0x41, 0x86,
- 0x80, 0x04, 0x8c, 0x2b,
- 0xe0, 0x19, 0x80, 0x18,
- 0x83, 0x01, 0x00, 0x16,
- 0x6f, 0xf8, 0x79, 0x88,
- 0x50, 0xd8, 0x81, 0x11,
- 0x7d, 0x18, 0xef, 0xf8,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x83, 0x11, 0x40, 0x1c,
- 0x4c, 0x03, 0x82, 0x01,
- 0x40, 0x1c, 0x61, 0x8d,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x0d, 0xb8, 0xf2, 0x84,
- 0xc1, 0xc3, 0xe0, 0x1c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x43, 0x86, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x48,
- 0xe0, 0x98, 0x06, 0x04,
- 0xf1, 0x00, 0x46, 0x30,
- 0x44, 0x20, 0x84, 0x28,
- 0x26, 0x2f, 0xf2, 0xfc,
- 0xe1, 0x98, 0x07, 0x86,
- 0x0c, 0x0e, 0x84, 0x26,
- 0x0c, 0x1b, 0x82, 0x09,
- 0x40, 0x15, 0x6e, 0x09,
- 0x42, 0x10, 0xd0, 0x07,
- 0xc0, 0xfe, 0x73, 0xfd,
- 0x4c, 0x13, 0xa0, 0x1f,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xef, 0xf8, 0x4d, 0xc8,
- 0x81, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x35, 0xd8, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xe1, 0x00, 0x01, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xc7, 0x13, 0xc1, 0x83,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x65, 0x39, 0x4c, 0x01,
- 0x04, 0x60, 0x40, 0x2c,
- 0xc0, 0xb1, 0x65, 0x41,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x42, 0x88,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x4e, 0x28,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x68, 0x48, 0x59, 0x88,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x45, 0x76, 0x01, 0x11,
- 0x09, 0x31, 0xe0, 0x00,
- 0x5d, 0x58, 0x8c, 0x0b,
- 0xa3, 0x8b, 0xe8, 0x48,
- 0xa1, 0x0b, 0xfc, 0xb5,
- 0x0c, 0x0b, 0xfc, 0x75,
- 0x52, 0x38, 0x8e, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x01, 0x11, 0xfa, 0xb5,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xb1, 0x45,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xc0, 0x1e, 0xf0,
- 0x60, 0x04, 0x46, 0x86,
- 0x40, 0x31, 0xa5, 0x1b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xa1, 0x81, 0x0e, 0xa5,
- 0xaa, 0x35, 0xa3, 0x1b,
- 0x60, 0x0c, 0x41, 0xe6,
- 0xe0, 0x0c, 0x59, 0xe6,
- 0x01, 0xa6, 0x17, 0x0e,
- 0x11, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0x26,
- 0x01, 0x86, 0x0f, 0x0e,
- 0x15, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x00, 0x06,
- 0xa1, 0x01, 0x0b, 0x0e,
- 0x00, 0x06, 0x09, 0x0e,
- 0x7e, 0x0e, 0xe0, 0x04,
- 0x7c, 0x0e, 0xa1, 0x01,
- 0xe0, 0x04, 0x01, 0x86,
- 0x01, 0x86, 0x0d, 0x0e,
- 0x3e, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0xa6,
- 0x49, 0xf6, 0x3c, 0x0e,
- 0x4b, 0xa6, 0xe0, 0x0c,
- 0x03, 0xa6, 0x60, 0x0c,
- 0x07, 0x06, 0xe0, 0x0c,
- 0x11, 0x06, 0x60, 0x04,
- 0x0d, 0xa6, 0xe0, 0x04,
- 0x13, 0xa6, 0x60, 0x04,
- 0x0f, 0xa6, 0xe0, 0x0c,
- 0x55, 0xa6, 0x60, 0x0c,
- 0x13, 0xce, 0xe0, 0x0c,
- 0xe0, 0x0c, 0x41, 0xe6,
- 0x57, 0xf6, 0x05, 0x95,
- 0x00, 0x06, 0xe0, 0x0c,
- 0x89, 0x11, 0x60, 0x08,
- 0x91, 0x01, 0x13, 0x0e,
- 0x40, 0x06, 0x17, 0x0e,
- 0x0d, 0x0e, 0xe0, 0x00,
- 0x15, 0x0e, 0x85, 0x01,
- 0x0b, 0x0e, 0x83, 0x01,
- 0x09, 0x0e, 0x81, 0x01,
- 0x7e, 0x0e, 0xa1, 0x01,
- 0x7c, 0x0e, 0x83, 0x01,
- 0x0f, 0x0e, 0x81, 0x01,
- 0x11, 0x0e, 0x85, 0x01,
- 0x3e, 0x0e, 0x81, 0x01,
- 0xe0, 0x00, 0x40, 0x06,
- 0x81, 0x31, 0x3c, 0x0e,
- 0x81, 0x91, 0x01, 0x61,
- 0x14, 0x06, 0x01, 0x51,
- 0x01, 0x01, 0xe0, 0x04,
- 0x16, 0x06, 0x81, 0x41,
- 0x81, 0xc1, 0xe0, 0x08,
- 0x8b, 0xc4, 0x88, 0xc6,
- 0x89, 0xc4, 0x8a, 0xc6,
- 0xfe, 0xc4, 0xc8, 0xc6,
- 0xfc, 0xc4, 0xca, 0xc6,
- 0xe0, 0x18, 0x44, 0x81,
- 0xe0, 0x14, 0x44, 0x31,
- 0xe0, 0x10, 0x44, 0xc1,
- 0xe0, 0x1c, 0x44, 0x31,
- 0xe0, 0x20, 0x44, 0x31,
- 0x44, 0x31, 0x95, 0x34,
- 0x8f, 0x34, 0xe0, 0x24,
- 0xe0, 0x28, 0x44, 0x31,
- 0x44, 0x31, 0x8d, 0x34,
- 0x91, 0x34, 0xe0, 0x2c,
- 0xe0, 0x30, 0x44, 0x31,
- 0x44, 0x31, 0xbe, 0x34,
- 0xbc, 0x34, 0xe0, 0x34,
- 0xe0, 0x3c, 0x44, 0x61,
- 0xe0, 0x40, 0x44, 0x61,
- 0xe0, 0x38, 0x44, 0x31,
- 0xe0, 0x48, 0x44, 0x91,
- 0xe0, 0x4c, 0x44, 0x71,
- 0xe0, 0x44, 0x44, 0x11,
- 0xe0, 0x50, 0x44, 0x11,
- 0xe0, 0x58, 0x44, 0xa1,
- 0xe0, 0x54, 0x44, 0x51,
- 0xe0, 0x5c, 0x44, 0x51,
- 0xe0, 0x60, 0x44, 0x51,
- 0xe0, 0x68, 0x44, 0x01,
- 0x44, 0x01, 0x93, 0x04,
- 0x97, 0x04, 0xe0, 0x6c,
- 0xe0, 0x78, 0x44, 0xb1,
- 0xe0, 0x74, 0x44, 0x41,
- 0xe0, 0x64, 0x44, 0x01,
- 0xe0, 0x70, 0x44, 0x01,
- 0xe0, 0x7c, 0x44, 0x41,
- 0xe0, 0xf1, 0x01, 0x01,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x80, 0x6b, 0x25, 0x1b,
- 0x81, 0x01, 0x04, 0x25,
- 0x92, 0x95, 0xa3, 0x1b,
- 0x65, 0x41, 0x02, 0x60,
- 0x8c, 0x0b, 0x40, 0xb1,
- 0xe8, 0x48, 0x62, 0xe8,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x4c, 0x01, 0x83, 0x01,
- 0xc0, 0x2c, 0x65, 0x39,
- 0x42, 0x86, 0x87, 0xe5,
- 0x04, 0x06, 0x60, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x60, 0x11, 0x02, 0x06,
- 0x3e, 0x1e, 0xc4, 0x00,
- 0x09, 0x1c, 0x83, 0x11,
- 0x15, 0x16, 0xa1, 0x11,
- 0xe0, 0x00, 0x42, 0x06,
- 0x85, 0x71, 0x1f, 0x16,
- 0x89, 0x11, 0x25, 0x16,
- 0x31, 0x16, 0xab, 0x16,
- 0xaf, 0x26, 0x91, 0x11,
- 0x04, 0x06, 0x35, 0x26,
- 0x97, 0x06, 0xe0, 0x08,
- 0x9b, 0x76, 0x99, 0x06,
- 0xa1, 0x76, 0x9d, 0x06,
- 0xa7, 0x06, 0xa3, 0x06,
- 0xad, 0x06, 0xa9, 0x06,
- 0xb7, 0x06, 0xb3, 0x06,
- 0xbb, 0x16, 0xb9, 0x06,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x10, 0x02, 0xf0,
- 0xbf, 0x26, 0xbd, 0x06,
- 0xe0, 0x84, 0x5e, 0x01,
- 0x60, 0x8c, 0x5e, 0x01,
- 0x5e, 0x21, 0x8c, 0x0b,
- 0x5e, 0xf8, 0xe0, 0x88,
- 0xa1, 0x0b, 0xe8, 0x48,
- 0x4c, 0x71, 0x80, 0xb5,
- 0xc0, 0x2c, 0x65, 0x39,
- 0xc8, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0xcc,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x64, 0x90, 0x02, 0xf0,
- 0xe4, 0x80, 0x04, 0xf0,
- 0xe8, 0x10, 0x49, 0x68,
- 0x60, 0x90, 0x1e, 0x89,
- 0xe0, 0x04, 0x0e, 0x2a,
- 0xe0, 0x80, 0x1e, 0x79,
- 0x40, 0x01, 0x01, 0x88,
- 0x04, 0x60, 0xc0, 0x00,
- 0x40, 0xb1, 0x65, 0xc1,
- 0x01, 0x55, 0x99, 0x31,
- 0x49, 0x16, 0x81, 0x11,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x65, 0xf1, 0x04, 0x60,
- 0x9d, 0x31, 0x40, 0xb1,
- 0x49, 0x1c, 0x81, 0x45,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x15, 0xc6, 0x01, 0x91,
- 0x07, 0x85, 0xea, 0xf0,
- 0xa1, 0x0b, 0x81, 0xb1,
- 0x40, 0x62, 0x8e, 0x15,
- 0x04, 0x74, 0x70, 0xa8,
- 0x00, 0x9c, 0xfa, 0x80,
- 0xe0, 0x90, 0x00, 0x84,
- 0x79, 0x9c, 0x42, 0x02,
- 0xf0, 0xac, 0x40, 0x62,
- 0x6e, 0xf1, 0x40, 0x11,
- 0x43, 0xf6, 0x40, 0x2b,
- 0x80, 0x00, 0x40, 0x0d,
- 0x60, 0x31, 0x40, 0x91,
- 0x40, 0x11, 0xc0, 0x2c,
- 0x80, 0x2c, 0x42, 0xb1,
- 0x43, 0xf1, 0x40, 0x11,
- 0x02, 0xb4, 0x00, 0x2c,
- 0x40, 0x91, 0xfa, 0x80,
- 0x00, 0x2c, 0x41, 0x71,
- 0x4f, 0x58, 0x8c, 0x0b,
- 0x1e, 0x89, 0xe8, 0x00,
- 0x00, 0x80, 0x60, 0x90,
- 0x02, 0x04, 0xe4, 0x04,
- 0x82, 0xb1, 0x7a, 0x80,
- 0x04, 0x80, 0x84, 0xa1,
- 0x43, 0x4a, 0xe4, 0x24,
- 0x02, 0x0c, 0xe4, 0x08,
- 0x50, 0x00, 0x62, 0x00,
- 0x02, 0x73, 0xdc, 0x00,
- 0x17, 0x0a, 0x81, 0x01,
- 0xf2, 0x05, 0xe5, 0x3c,
- 0xf6, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xee, 0x50, 0x1e, 0xf0,
- 0xa1, 0x1b, 0x00, 0x6b,
- 0x65, 0x39, 0x0c, 0x09,
- 0x84, 0x8b, 0x40, 0x2c,
- 0x42, 0x66, 0x8a, 0x25,
- 0xa5, 0x0b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x91, 0x40, 0x2b,
- 0x81, 0xb1, 0x02, 0xc5,
- 0x8c, 0x0b, 0x05, 0x11,
- 0xef, 0xfc, 0x72, 0x68,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0xc0, 0x00, 0x0b, 0xa8,
- 0x68, 0x04, 0x54, 0x48,
- 0x80, 0xbb, 0x8c, 0x0b,
- 0xe4, 0x40, 0x10, 0x8a,
- 0xa1, 0xbb, 0xa2, 0x75,
- 0x0c, 0x29, 0xa2, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x04, 0x63, 0xe8,
- 0x56, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x9e, 0xd5, 0x81, 0x81,
- 0x23, 0x0b, 0x95, 0x25,
- 0xe0, 0x04, 0x40, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x82, 0x05, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xfc, 0x70, 0x08,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x00, 0xc6, 0xa4, 0x95,
- 0x02, 0xf0, 0x60, 0x08,
- 0x01, 0x55, 0xe4, 0x20,
- 0x45, 0xb6, 0x81, 0xb1,
- 0xec, 0x04, 0x00, 0x00,
- 0xfe, 0x95, 0xa1, 0x0b,
- 0x10, 0x60, 0x01, 0x01,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x15, 0x06, 0x3c, 0x0e,
- 0x89, 0x55, 0xe0, 0x04,
- 0x78, 0x81, 0x10, 0x09,
- 0x95, 0x11, 0x40, 0x01,
- 0x61, 0x90, 0x12, 0x04,
- 0x42, 0x9a, 0x9e, 0x09,
- 0x82, 0x03, 0xe6, 0x86,
- 0xe6, 0x30, 0x01, 0x0a,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xb7, 0x1b, 0x84, 0x14,
- 0x0c, 0x29, 0x82, 0xf5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x03, 0x36,
- 0x68, 0x04, 0x5f, 0xa8,
- 0x0f, 0x36, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xe0, 0x08, 0x00, 0xc6,
- 0xa1, 0xbb, 0x88, 0x05,
- 0x4e, 0xb0, 0x06, 0xd5,
- 0x20, 0x18, 0xdc, 0x00,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x61, 0x40, 0x14, 0x0a,
- 0x88, 0x16, 0x80, 0x23,
- 0x00, 0x04, 0x5e, 0x95,
- 0x80, 0x00, 0x0e, 0x06,
- 0x80, 0x00, 0x5e, 0x95,
- 0x3e, 0x04, 0x82, 0xc5,
- 0x00, 0x04, 0x81, 0x71,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbe, 0x0e, 0xfb, 0x80,
- 0x00, 0x04, 0xbc, 0x04,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbc, 0x0e, 0xfa, 0x80,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x8e, 0xbb, 0x82, 0x81,
- 0xee, 0x75, 0xa1, 0xab,
- 0x8c, 0xf5, 0xa1, 0xbb,
- 0x00, 0x04, 0xbc, 0x04,
- 0xc4, 0x07, 0xfa, 0x80,
- 0x0e, 0x00, 0x3e, 0x04,
- 0x12, 0x04, 0xe4, 0x10,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0x68, 0x00, 0x54, 0xa8,
- 0x03, 0xd5, 0xc4, 0x97,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x40, 0xf6, 0x88, 0xd5,
- 0x40, 0x00, 0x61, 0xa1,
- 0x81, 0xb5, 0x81, 0x11,
- 0x60, 0x80, 0x42, 0x0a,
- 0x10, 0x29, 0x90, 0x2b,
- 0x06, 0xf0, 0x5c, 0x00,
- 0x02, 0x33, 0xe4, 0x20,
- 0x8c, 0x26, 0x82, 0x11,
- 0xe2, 0x30, 0x02, 0x0a,
- 0x0c, 0x0b, 0xfc, 0x95,
- 0x4b, 0x58, 0x90, 0x1b,
- 0x00, 0xbb, 0xe8, 0x04,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x82, 0x75, 0xa1, 0xbb,
- 0x7a, 0x80, 0x02, 0x94,
- 0xfa, 0x80, 0x04, 0x74,
- 0x64, 0x20, 0x06, 0xf0,
- 0x49, 0x98, 0x8c, 0x0b,
- 0x80, 0xbb, 0xe8, 0x48,
- 0x1e, 0xf0, 0x16, 0x0b,
- 0x0c, 0x0c, 0xe6, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0x8b, 0x00, 0x9b,
- 0x0c, 0x90, 0x7c, 0x2e,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xf0, 0xa0, 0x54, 0x62,
- 0xe2, 0x80, 0x14, 0x19,
- 0xe8, 0x00, 0x4c, 0x88,
- 0x80, 0x7b, 0x42, 0x87,
- 0x67, 0xc0, 0x00, 0xa0,
- 0x3c, 0x6e, 0x90, 0x63,
- 0x65, 0x45, 0x12, 0x90,
- 0x3e, 0x0e, 0xc0, 0xb1,
- 0x01, 0xa1, 0x81, 0xb1,
- 0x05, 0x55, 0x81, 0x81,
- 0xfc, 0x24, 0x81, 0x61,
- 0xf8, 0x04, 0x12, 0x09,
- 0x44, 0x0a, 0xa4, 0x18,
- 0xd0, 0x07, 0xe0, 0x80,
- 0x48, 0x00, 0x4d, 0x08,
- 0x0e, 0x0f, 0xa2, 0x0f,
- 0xfb, 0x80, 0x02, 0x64,
- 0x82, 0x45, 0x83, 0x0b,
- 0x10, 0x84, 0x03, 0x11,
- 0x14, 0xa4, 0xfa, 0x80,
- 0xb7, 0x1f, 0x7b, 0x80,
- 0x82, 0x81, 0x22, 0xaf,
- 0x3f, 0xbb, 0x80, 0x6b,
- 0x1e, 0x05, 0x82, 0xb1,
- 0x84, 0x91, 0x00, 0x04,
- 0x80, 0x00, 0x40, 0x81,
- 0x80, 0x00, 0x1e, 0x05,
- 0x80, 0x00, 0x40, 0xa3,
- 0xe0, 0x40, 0x16, 0x0a,
- 0x01, 0x01, 0xf6, 0x75,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xe5, 0x7c, 0x03, 0x0a,
- 0x04, 0x14, 0x82, 0xb5,
- 0x8e, 0x19, 0x61, 0x8c,
- 0x00, 0x09, 0x84, 0x03,
- 0xc0, 0x2c, 0x65, 0xc1,
- 0xe4, 0x84, 0x40, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x64, 0x71, 0x00, 0x00,
- 0x04, 0x14, 0x40, 0xaf,
- 0x00, 0x0b, 0xe0, 0x84,
- 0x80, 0x13, 0x7c, 0x08,
- 0xe5, 0x00, 0x02, 0x19,
- 0x68, 0x4c, 0x68, 0x28,
- 0xd0, 0x07, 0x82, 0x11,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0x9b, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0xab, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0x9b, 0x88, 0x25,
- 0xa1, 0xab, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x50, 0x68,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x45, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe0, 0x2a, 0x40, 0x0a,
- 0xe0, 0x26, 0x42, 0x1a,
- 0xe6, 0xa2, 0x40, 0x0a,
- 0xe0, 0x26, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0xab, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0x9b, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0xab, 0x86, 0xe5,
- 0xa1, 0x9b, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x4d, 0x28,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x05, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe1, 0x26, 0x40, 0x0a,
- 0xe1, 0x2a, 0x42, 0x1a,
- 0xe6, 0xaa, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x90, 0x04, 0x14,
- 0x44, 0x2a, 0xa9, 0x31,
- 0x06, 0x14, 0x66, 0x8e,
- 0x8e, 0x39, 0xe1, 0x84,
- 0x81, 0x21, 0x04, 0x03,
- 0x81, 0x31, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0xe5,
- 0xc0, 0x9c, 0x67, 0x81,
- 0x70, 0x14, 0x00, 0x49,
- 0xe0, 0x80, 0x42, 0x0a,
- 0xc1, 0x90, 0x08, 0x44,
- 0x25, 0x4f, 0x9e, 0x49,
- 0xa8, 0x3f, 0x88, 0x21,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x5d, 0x93, 0xfc, 0x95,
- 0xfb, 0x80, 0x00, 0x34,
- 0x9f, 0x21, 0x01, 0x11,
- 0x81, 0x31, 0x03, 0x95,
- 0x68, 0x84, 0x08, 0x24,
- 0xfb, 0x80, 0x06, 0x34,
- 0xe3, 0x4f, 0x80, 0x4f,
- 0x61, 0x8c, 0x0a, 0x44,
- 0xe1, 0x84, 0x18, 0x44,
- 0x84, 0xc9, 0x02, 0x59,
- 0x18, 0x44, 0x38, 0x5f,
- 0x46, 0x47, 0xe0, 0x84,
- 0x38, 0x5f, 0x88, 0xc9,
- 0xa8, 0x5f, 0x90, 0x49,
- 0x88, 0x11, 0x23, 0x5f,
- 0x02, 0x0a, 0xaa, 0x3f,
- 0xf8, 0xf5, 0xe0, 0x40,
- 0x00, 0x34, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x9d, 0x81, 0x00, 0xab,
- 0x81, 0x91, 0x1e, 0x0b,
- 0x9d, 0x11, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0xa0, 0xfe, 0x95,
- 0x40, 0xb1, 0x65, 0xf1,
- 0x81, 0x45, 0x9d, 0x11,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x85, 0xc5, 0xfe, 0x95,
- 0x70, 0xa4, 0x4c, 0xa2,
- 0xfa, 0x80, 0x0e, 0x94,
- 0x6e, 0xf1, 0x0c, 0xb9,
- 0x94, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x71, 0x08,
- 0x00, 0x0a, 0x8e, 0x1b,
- 0x86, 0xb5, 0xf0, 0x04,
- 0x6c, 0xe9, 0x14, 0x09,
- 0x0c, 0x19, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfa, 0x80, 0x02, 0x14,
- 0x84, 0x35, 0x83, 0x0b,
- 0x73, 0xc0, 0x40, 0xb0,
- 0x47, 0x07, 0x9e, 0x1b,
- 0x02, 0x2b, 0x9e, 0xb9,
- 0x83, 0x31, 0x7c, 0x00,
- 0x80, 0x13, 0x37, 0x3f,
- 0xa6, 0x2f, 0x94, 0x0b,
- 0x8e, 0x1b, 0x04, 0x2c,
- 0xe8, 0x00, 0x42, 0x48,
- 0x12, 0x0a, 0x82, 0x91,
- 0xf4, 0x75, 0xe1, 0x40,
- 0x64, 0x8d, 0x00, 0xe6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x9d, 0x21, 0x01, 0x65,
- 0x04, 0x20, 0x45, 0x3a,
- 0xc1, 0x3c, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x2b,
- 0x64, 0x8d, 0x40, 0xa6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x45, 0x2a, 0x81, 0x55,
- 0xec, 0x04, 0x10, 0x80,
- 0xa1, 0x8b, 0xc1, 0x2c,
- 0x77, 0x58, 0xfe, 0x75,
- 0x94, 0x0b, 0x68, 0x44,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x83, 0x31, 0x00, 0x13,
- 0x6e, 0xf1, 0x02, 0x19,
- 0x04, 0x14, 0xc0, 0x2b,
- 0x9e, 0x19, 0x61, 0x8c,
- 0xa3, 0x3f, 0x3c, 0x29,
- 0x00, 0x2b, 0x84, 0x03,
- 0xc0, 0x16, 0x62, 0xf9,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x62, 0xf9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x02, 0xf0, 0x00, 0x9b,
- 0x5c, 0x18, 0xe4, 0xc0,
- 0x04, 0xf0, 0x68, 0x0c,
- 0x12, 0x39, 0xe4, 0xb0,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x12, 0x09,
- 0x12, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x4d, 0x12, 0x89,
- 0x12, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x39,
- 0x40, 0x3a, 0x8d, 0x3e,
- 0x12, 0x39, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x66, 0x86, 0x54, 0x8a,
- 0xe1, 0x88, 0x02, 0x04,
- 0x52, 0x01, 0x91, 0x01,
- 0x40, 0x26, 0x64, 0x81,
- 0x0f, 0x2e, 0xc5, 0xa7,
- 0x52, 0x21, 0x92, 0x0b,
- 0xc0, 0x26, 0x64, 0x91,
- 0x52, 0x31, 0x89, 0x3e,
- 0xc0, 0x26, 0x64, 0xb1,
- 0x12, 0xb9, 0x8b, 0x1e,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x12, 0x69,
- 0x52, 0x11, 0xc0, 0x2b,
- 0x40, 0x26, 0x64, 0xd1,
- 0xe4, 0xa0, 0x02, 0xf0,
- 0x64, 0xf1, 0x52, 0xa1,
- 0x67, 0xd8, 0xc0, 0x26,
- 0x80, 0x7b, 0xe8, 0x0c,
- 0xa6, 0x55, 0xa1, 0x7b,
- 0x06, 0x64, 0x45, 0xb7,
- 0x7c, 0xbe, 0xe1, 0x88,
- 0x80, 0x65, 0xa1, 0xbb,
- 0x82, 0xf5, 0xa1, 0x3b,
- 0x6c, 0x1d, 0x12, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x12, 0x0b, 0xe0, 0x08,
- 0x7a, 0x78, 0x86, 0x6b,
- 0x4e, 0x96, 0x68, 0x00,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xa0, 0x85, 0x8c, 0x3b,
- 0xc5, 0x87, 0x0d, 0x04,
- 0x4b, 0xf6, 0x7c, 0x14,
- 0x48, 0x8a, 0xe0, 0x0c,
- 0x81, 0xb1, 0x60, 0x0e,
- 0x44, 0x0a, 0xc5, 0x07,
- 0x8f, 0x04, 0xe0, 0x06,
- 0xbe, 0x2e, 0x8b, 0x14,
- 0x02, 0x03, 0xbc, 0x4e,
- 0xe6, 0x8a, 0x42, 0x4a,
- 0x00, 0x00, 0x09, 0x24,
- 0xfe, 0x0e, 0xec, 0x04,
- 0x00, 0xa0, 0x84, 0xa3,
- 0x81, 0xa1, 0x6c, 0x04,
- 0x52, 0x11, 0x8d, 0x0e,
- 0xc0, 0x2c, 0x65, 0x3d,
- 0x4c, 0x92, 0x8b, 0xe5,
- 0x0c, 0x09, 0xf0, 0xac,
- 0xc0, 0x2b, 0x6e, 0xf1,
- 0x62, 0xb1, 0x4c, 0x51,
- 0x4c, 0x51, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xf0, 0x3c, 0x42, 0x00,
- 0x92, 0xd5, 0xc5, 0x1d,
- 0xc8, 0x1d, 0x8d, 0x44,
- 0x7e, 0x14, 0x92, 0x75,
- 0xc2, 0x0d, 0xc9, 0x07,
- 0x8f, 0x14, 0x90, 0xf5,
- 0x90, 0x95, 0xc3, 0x0d,
- 0x61, 0x8c, 0x00, 0xb4,
- 0xf0, 0x1c, 0x44, 0xb0,
- 0x83, 0x41, 0x3e, 0x09,
- 0x04, 0x44, 0x12, 0x03,
- 0x00, 0x19, 0xe8, 0x88,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x08, 0xa4, 0x86, 0x8b,
- 0x0a, 0xf0, 0x7a, 0x80,
- 0x7c, 0x14, 0xe4, 0x90,
- 0xf9, 0x88, 0x58, 0x12,
- 0x04, 0x34, 0x0b, 0x34,
- 0x40, 0xc1, 0xfa, 0x80,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x02, 0x14, 0x92, 0x0b,
- 0x62, 0xd8, 0xfa, 0x80,
- 0x06, 0x34, 0x6f, 0xfc,
- 0x80, 0x7b, 0xfa, 0x80,
- 0x8a, 0x15, 0xa1, 0x7b,
- 0x0a, 0xf0, 0x3e, 0x04,
- 0x1e, 0x49, 0xe4, 0x80,
- 0x1e, 0x39, 0xe0, 0x90,
- 0x3c, 0x04, 0xe0, 0xa0,
- 0xfa, 0x80, 0x02, 0x04,
- 0x63, 0xf1, 0x4c, 0x41,
- 0x04, 0x04, 0xc0, 0x2c,
- 0x92, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x64, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x1e, 0x09, 0x84, 0x75,
- 0x82, 0xa1, 0x60, 0x80,
- 0x4b, 0xf6, 0x10, 0x3b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0x82, 0xb1, 0x89, 0x24,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0x40, 0x98, 0xe8, 0x25,
- 0x92, 0x0b, 0x68, 0x00,
- 0x0e, 0x0b, 0x80, 0x7b,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x81, 0x00, 0x6b,
- 0x6c, 0x59, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x02, 0xf0, 0x8a, 0x85,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x0c, 0x5d, 0x88,
- 0x88, 0xd5, 0xa1, 0x0b,
- 0x6f, 0xdc, 0x40, 0x06,
- 0x80, 0x08, 0x81, 0x91,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x04, 0xf1, 0x00, 0x60,
- 0x00, 0x60, 0xc0, 0xad,
- 0x80, 0xad, 0x04, 0xf9,
- 0x03, 0x15, 0x80, 0x0a,
- 0xfb, 0x80, 0x0e, 0x04,
- 0x7a, 0x80, 0x02, 0x84,
- 0xe4, 0x10, 0x08, 0xf0,
- 0x8c, 0x0b, 0x01, 0x21,
- 0x68, 0x00, 0x42, 0x88,
- 0x7c, 0x0a, 0x8e, 0x3b,
- 0xfb, 0x80, 0x12, 0x94,
- 0x80, 0x93, 0x82, 0x81,
- 0xc1, 0x8d, 0xfc, 0x04,
- 0x4c, 0x93, 0xfc, 0x15,
- 0xc0, 0x16, 0x62, 0x99,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x82, 0xf5, 0xfc, 0x1d,
- 0x02, 0x14, 0x83, 0x31,
- 0x82, 0x11, 0xfa, 0x80,
- 0xf4, 0x38, 0x03, 0x0a,
- 0x08, 0x14, 0x82, 0x15,
- 0x08, 0x34, 0xfa, 0x80,
- 0x80, 0x4f, 0xe8, 0x90,
- 0xfc, 0x85, 0xa1, 0x4b,
- 0x81, 0x01, 0x08, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xf8, 0x00, 0x10, 0xfc,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x80, 0x5b, 0x02, 0x9b,
- 0x63, 0xfc, 0x12, 0x0a,
- 0xfc, 0x2e, 0x81, 0x01,
- 0x90, 0x0c, 0xbe, 0x4e,
- 0x80, 0x00, 0x0b, 0x98,
- 0x10, 0x50, 0x49, 0x37,
- 0xc0, 0xb0, 0x66, 0xb1,
- 0x0e, 0x50, 0x3c, 0x3e,
- 0xc0, 0xb0, 0x64, 0x31,
- 0x81, 0xa1, 0x01, 0xb1,
- 0x81, 0x61, 0x7e, 0x5e,
- 0x0e, 0x09, 0x85, 0x85,
- 0x93, 0x0b, 0xe3, 0xc0,
- 0xfc, 0x04, 0x88, 0x35,
- 0x80, 0xf5, 0xa3, 0x0b,
- 0x6c, 0xe9, 0x0a, 0x09,
- 0xa0, 0x18, 0xc0, 0x2c,
- 0x86, 0x15, 0x83, 0x0b,
- 0x7a, 0x80, 0x02, 0xb4,
- 0x55, 0x78, 0x8a, 0x0b,
- 0x00, 0x0a, 0xef, 0xfc,
- 0x1e, 0x55, 0xf0, 0x04,
- 0x82, 0xd5, 0xc0, 0x0c,
- 0x02, 0xa4, 0x1c, 0x08,
- 0x04, 0xf0, 0xe0, 0x88,
- 0x82, 0xa1, 0x64, 0x50,
- 0x82, 0x23, 0x7e, 0x54,
- 0x80, 0x63, 0x70, 0xad,
- 0x80, 0x45, 0x88, 0xbe,
- 0x02, 0xb1, 0x81, 0x95,
- 0x82, 0x71, 0x82, 0x81,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0xa1, 0xab, 0xf4, 0xe5,
- 0x0a, 0x8b, 0x9e, 0xe5,
- 0xc0, 0x15, 0x6a, 0x7d,
- 0xc9, 0x87, 0xbc, 0x14,
- 0xfb, 0x80, 0x00, 0x14,
- 0x6a, 0x81, 0x0a, 0x0b,
- 0xd1, 0x0d, 0x40, 0x15,
- 0x9c, 0x00, 0x50, 0x10,
- 0xfb, 0x80, 0x02, 0x84,
- 0xc0, 0x1d, 0xc9, 0x07,
- 0xdc, 0x00, 0x50, 0x00,
- 0xec, 0x18, 0x51, 0x0a,
- 0x3e, 0x14, 0x84, 0x65,
- 0xe0, 0x90, 0x00, 0x64,
- 0x00, 0xf0, 0x04, 0x0c,
- 0x01, 0x95, 0xe4, 0x50,
- 0x41, 0x24, 0x9f, 0x11,
- 0xec, 0x04, 0x14, 0xa0,
- 0x44, 0x11, 0x8a, 0x23,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xfe, 0x15, 0xa1, 0xab,
- 0x81, 0x31, 0x8b, 0x75,
- 0x00, 0x34, 0x85, 0x05,
- 0x02, 0xf0, 0x60, 0x88,
- 0x02, 0x15, 0xe4, 0x50,
- 0x00, 0x14, 0xfc, 0x00,
- 0x8a, 0x03, 0xe0, 0x84,
- 0x6e, 0x39, 0x00, 0x2b,
- 0x81, 0x01, 0x40, 0x15,
- 0x82, 0x85, 0xa1, 0x2b,
- 0x44, 0x4a, 0x81, 0x01,
- 0x44, 0x20, 0xe0, 0x80,
- 0x40, 0xff, 0x13, 0xf9,
- 0xc4, 0x04, 0x00, 0x00,
- 0x04, 0x24, 0x7e, 0x35,
- 0x0a, 0x13, 0xc1, 0x84,
- 0x42, 0x01, 0x82, 0x31,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xf8, 0x15, 0x95, 0x3b,
- 0x94, 0x7b, 0x21, 0x06,
- 0x83, 0x23, 0xa1, 0x43,
- 0x4e, 0x8a, 0xab, 0xe3,
- 0x8a, 0x25, 0xec, 0x20,
- 0x64, 0x50, 0x12, 0xf0,
- 0x82, 0xb1, 0xff, 0xb1,
- 0x88, 0x45, 0xd5, 0xbd,
- 0x00, 0x50, 0x24, 0x64,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xe4, 0x40, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x64,
- 0x00, 0x0b, 0x80, 0x63,
- 0x0c, 0x19, 0xfc, 0x04,
- 0x73, 0xd8, 0xe5, 0x00,
- 0x21, 0x08, 0xef, 0xfc,
- 0x0c, 0x19, 0x88, 0x91,
- 0x83, 0x0b, 0xe5, 0x00,
- 0x05, 0x01, 0x02, 0x60,
- 0x0e, 0x74, 0x40, 0x01,
- 0x42, 0x01, 0xdb, 0x80,
- 0x0e, 0x70, 0x40, 0x00,
- 0x7e, 0x54, 0xc4, 0x04,
- 0xec, 0x20, 0x4e, 0x8a,
- 0xc1, 0xc3, 0xf6, 0xb5,
- 0xc8, 0x77, 0x3e, 0x04,
- 0x01, 0x01, 0x80, 0x7c,
- 0x18, 0xfc, 0xf8, 0xf1,
- 0x0c, 0x0c, 0xf0, 0x00,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x46, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x28,
- 0x84, 0x34, 0x83, 0x21,
- 0x65, 0x75, 0x00, 0x19,
- 0x00, 0x45, 0xc0, 0x1b,
- 0xc0, 0x06, 0x6d, 0x49,
- 0x65, 0x79, 0x00, 0x09,
- 0x82, 0x31, 0x40, 0x1b,
- 0xa1, 0x11, 0x23, 0x2f,
- 0x88, 0x0b, 0x21, 0x2f,
- 0xef, 0xe8, 0x75, 0x48,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x88, 0x7b, 0x00, 0x8b,
- 0x65, 0x0d, 0x10, 0x09,
- 0x82, 0x6b, 0x40, 0x2b,
- 0x60, 0x88, 0x02, 0x74,
- 0x10, 0x13, 0x84, 0xab,
- 0x23, 0x0b, 0x81, 0x21,
- 0x42, 0x25, 0x86, 0x9b,
- 0xc0, 0x0b, 0x61, 0xa5,
- 0xa7, 0x0b, 0x82, 0x25,
- 0x10, 0x0b, 0x8c, 0x75,
- 0x40, 0x15, 0x6a, 0x79,
- 0x91, 0x0c, 0x81, 0xb1,
- 0x3e, 0x5e, 0x85, 0x05,
- 0x66, 0x91, 0x00, 0x10,
- 0x7c, 0x0e, 0xc0, 0xb1,
- 0x42, 0xb8, 0x90, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x02, 0xf0, 0x49, 0x07,
- 0x3c, 0x1e, 0xe4, 0x40,
- 0xfb, 0x80, 0x16, 0x04,
- 0x64, 0x30, 0x0a, 0xf0,
- 0x0c, 0x1b, 0x90, 0x0b,
- 0x12, 0x3b, 0x94, 0x2b,
- 0x43, 0xb8, 0x96, 0x4b,
- 0x7e, 0x14, 0xe8, 0x00,
- 0xfc, 0x24, 0xa1, 0x0b,
- 0x84, 0x35, 0x88, 0x1e,
- 0xbe, 0x54, 0x91, 0x0a,
- 0xfb, 0x80, 0x06, 0x04,
- 0x04, 0x16, 0x97, 0x3b,
- 0x40, 0x80, 0x40, 0x00,
- 0x42, 0x70, 0xdc, 0x00,
- 0x48, 0x50, 0x5c, 0x00,
- 0x6c, 0xd8, 0xdc, 0x00,
- 0x81, 0x01, 0xcf, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x81, 0x01, 0x91,
- 0x40, 0x72, 0x83, 0x25,
- 0x00, 0x09, 0xf0, 0xa4,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x8d, 0x0b, 0x82, 0x25,
- 0x02, 0x94, 0x80, 0xf5,
- 0x8e, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x44, 0x88,
- 0x82, 0x91, 0x80, 0x83,
- 0xe1, 0x40, 0x12, 0x0a,
- 0x90, 0x0b, 0xfa, 0xb5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x40, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0x19, 0x14, 0x82, 0xbb,
- 0x08, 0x8b, 0x8a, 0x7b,
- 0x00, 0x08, 0x86, 0x9b,
- 0x7e, 0x1e, 0x84, 0xab,
- 0x64, 0xf8, 0x91, 0x11,
- 0x00, 0x2b, 0xef, 0xe8,
- 0xe4, 0x40, 0x00, 0xf0,
- 0x0a, 0x84, 0x3e, 0x0e,
- 0x3c, 0x7e, 0xe0, 0x90,
- 0x64, 0xe1, 0x06, 0x60,
- 0x16, 0x0b, 0xc0, 0xad,
- 0x4d, 0xf8, 0x94, 0x1b,
- 0x92, 0x4b, 0x6f, 0xb4,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0x58, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x81, 0x01, 0x23, 0x0b,
- 0x09, 0x04, 0x80, 0xe5,
- 0xc9, 0x07, 0x81, 0x71,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x7e, 0x14, 0xc0, 0xff,
- 0x04, 0x0c, 0xa8, 0xf1,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0e, 0x00, 0x02, 0x6b,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x64, 0x71, 0x10, 0x00,
- 0x81, 0x01, 0x40, 0xaf,
- 0x60, 0x04, 0x13, 0x06,
- 0x83, 0x75, 0x9d, 0xa1,
- 0x78, 0x81, 0x0e, 0x19,
- 0x44, 0x10, 0xc0, 0x01,
- 0xc9, 0x17, 0x70, 0x3c,
- 0xe6, 0xaa, 0x44, 0x2a,
- 0x8d, 0x2b, 0x82, 0x23,
- 0x80, 0x00, 0x0e, 0x19,
- 0x80, 0x00, 0x10, 0x0b,
- 0x08, 0x48, 0x67, 0x28,
- 0x84, 0x04, 0x02, 0x10,
- 0x6c, 0x04, 0x12, 0x90,
- 0x84, 0x81, 0x82, 0x71,
- 0xfa, 0x35, 0xa1, 0x9b,
- 0x0c, 0x0c, 0xd0, 0x07,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x5d, 0xf8, 0xe2, 0x80,
- 0x43, 0xf6, 0xe8, 0x48,
- 0x05, 0x86, 0x60, 0x0c,
- 0x7b, 0x98, 0xe0, 0x10,
- 0x8c, 0x0b, 0x6f, 0xa8,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0x3e, 0x38, 0xf2, 0x00,
- 0xc1, 0xc3, 0xe0, 0x40,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x40, 0x96, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x06, 0x82, 0x7b,
- 0x8c, 0x0b, 0x62, 0x80,
- 0xe8, 0x48, 0x5c, 0x08,
- 0xe4, 0x40, 0x0e, 0x8a,
- 0x0c, 0x29, 0x82, 0xd5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x00, 0x4d, 0xa8,
- 0x50, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x8c, 0x85, 0x81, 0x71,
- 0x61, 0x88, 0x00, 0x74,
- 0x06, 0x09, 0x91, 0x91,
- 0x04, 0x94, 0x83, 0x11,
- 0xa1, 0x1f, 0x69, 0x80,
- 0x40, 0x22, 0xc8, 0x27,
- 0x81, 0x11, 0x79, 0x84,
- 0x44, 0x12, 0x81, 0xa5,
- 0x04, 0x4a, 0xf9, 0x1c,
- 0x44, 0x62, 0xf8, 0x0c,
- 0x82, 0x11, 0x50, 0x84,
- 0xc0, 0x00, 0x44, 0x01,
- 0xe0, 0x40, 0x02, 0x0a,
- 0x01, 0x11, 0xfc, 0xb5,
- 0x0c, 0x0b, 0x9f, 0x21,
- 0x67, 0xb8, 0x8c, 0x3b,
- 0x80, 0x8b, 0xe8, 0x40,
- 0x84, 0x55, 0xa1, 0x8b,
- 0x6a, 0xa9, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x00, 0x60, 0x84, 0x35,
- 0x40, 0x8b, 0x66, 0xb1,
- 0xe0, 0x10, 0x02, 0x06,
- 0x41, 0x1e, 0x81, 0x45,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x95, 0xa1, 0x9b,
- 0x90, 0x0b, 0x81, 0x81,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0x0c, 0x0b, 0xdd, 0x93,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x1c, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x00, 0x4c, 0x46,
- 0xe0, 0x04, 0x45, 0x36,
- 0x40, 0x21, 0x98, 0x14,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x98, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x46, 0x04, 0x26,
- 0x62, 0x58, 0xe0, 0x1c,
- 0x83, 0x21, 0x68, 0x44,
- 0x80, 0x18, 0x98, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x0c, 0x0c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x41, 0x86, 0x00, 0x3b,
- 0x00, 0x04, 0xe1, 0x48,
- 0xe0, 0x04, 0x09, 0x46,
- 0x6c, 0x1d, 0x46, 0x41,
- 0x80, 0x48, 0xc0, 0x2b,
- 0xfc, 0x9c, 0x08, 0x44,
- 0x41, 0xc6, 0x00, 0x46,
- 0x80, 0x04, 0xe1, 0x48,
- 0x83, 0x01, 0x00, 0x16,
- 0x6c, 0x25, 0x46, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x6f, 0xf0, 0x78, 0xa8,
- 0x08, 0x0c, 0x86, 0x2b,
- 0x0f, 0xd8, 0xf2, 0x80,
- 0xc1, 0xc3, 0xff, 0xf0,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x14, 0x4d, 0x48,
- 0x81, 0x81, 0x81, 0x11,
- 0x68, 0x28, 0x6f, 0xc8,
- 0x12, 0x86, 0x80, 0x7b,
- 0xa4, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xbc,
- 0xe8, 0x30, 0x72, 0xc8,
- 0x95, 0x11, 0x03, 0xa1,
- 0x8c, 0x0b, 0x03, 0x21,
- 0xe8, 0x44, 0x5e, 0x28,
- 0xe1, 0x10, 0x41, 0x46,
- 0x84, 0x86, 0x80, 0x14,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0x00, 0x16, 0xe0, 0x19,
- 0x79, 0xb8, 0x8c, 0x0b,
- 0x00, 0xc6, 0xef, 0xfc,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x18, 0x41, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x14, 0x41, 0x06,
- 0x80, 0x18, 0x80, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0x41, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x14,
- 0x00, 0x86, 0x83, 0x11,
- 0xe1, 0x14, 0x41, 0x86,
- 0x00, 0x8c, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x00, 0x86, 0x80, 0x04,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x08, 0x78, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0xab,
- 0x80, 0x7b, 0x21, 0xab,
- 0x41, 0x9c, 0x0c, 0xa4,
- 0xe0, 0x04, 0x01, 0x16,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x84, 0x9b, 0x40, 0x2b,
- 0x50, 0x04, 0x4c, 0x60,
- 0x47, 0x38, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x14,
- 0x42, 0x56, 0x00, 0x8b,
- 0x5c, 0xf8, 0xe0, 0x00,
- 0x8e, 0x0b, 0x68, 0x14,
- 0x01, 0x06, 0x21, 0x6b,
- 0x4e, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x01, 0x26, 0x88, 0xa5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x76, 0x48,
- 0x41, 0xc6, 0x92, 0x2b,
- 0x40, 0x20, 0x72, 0xfd,
- 0x60, 0x01, 0x02, 0x06,
- 0x80, 0x04, 0xff, 0xc0,
- 0x02, 0x06, 0x02, 0x0f,
- 0xc0, 0x20, 0x72, 0xc1,
- 0xfc, 0xc4, 0x00, 0x04,
- 0x01, 0xc6, 0x04, 0x0e,
- 0x80, 0x04, 0xe1, 0x98,
- 0x84, 0x75, 0xa3, 0x0b,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8e, 0x0b, 0x40, 0x20,
- 0xef, 0xec, 0x76, 0xe8,
- 0x01, 0x36, 0x81, 0xf5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x81, 0x95, 0x92, 0x2b,
- 0x68, 0x00, 0x41, 0x68,
- 0x42, 0x96, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x60, 0x00,
- 0xe8, 0x14, 0x59, 0x08,
- 0x60, 0x00, 0x42, 0x66,
- 0x58, 0xb8, 0x8e, 0x0b,
- 0x03, 0x11, 0xe8, 0x14,
- 0x42, 0x58, 0x90, 0x0b,
- 0x8c, 0x0b, 0xe8, 0x14,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x72, 0xf9, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xff,
- 0x40, 0x15, 0x6e, 0x09,
- 0x4c, 0x01, 0x81, 0x01,
- 0xc0, 0x2b, 0x64, 0xd5,
- 0xe8, 0x00, 0x7d, 0x68,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xe8, 0x18, 0x5e, 0x48,
- 0x68, 0x00, 0x7c, 0x88,
- 0x47, 0xf8, 0x8c, 0x0b,
- 0xa1, 0x7b, 0xe8, 0x0c,
- 0x49, 0xf8, 0x86, 0x25,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x68, 0x00, 0x41, 0x88,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xf0, 0x69, 0x28,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0a, 0x78, 0xf2, 0x84,
- 0x0c, 0x0c, 0xe0, 0x0c,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x63, 0x49, 0x00, 0x19,
- 0x06, 0x56, 0x40, 0x2d,
- 0xc0, 0x01, 0x60, 0x01,
- 0x64, 0x01, 0x40, 0x35,
- 0x83, 0x31, 0x40, 0x05,
- 0x68, 0x15, 0x40, 0x33,
- 0x81, 0x21, 0x40, 0x0a,
- 0x65, 0x45, 0x40, 0x31,
- 0x07, 0x06, 0x40, 0x22,
- 0x40, 0x31, 0xe0, 0x08,
- 0x40, 0x1b, 0x65, 0x6d,
- 0x40, 0x31, 0xe0, 0x19,
- 0x40, 0x22, 0x65, 0x4d,
- 0x40, 0x31, 0xa1, 0x41,
- 0x40, 0x28, 0x64, 0x89,
- 0x40, 0x11, 0xaf, 0x31,
- 0x40, 0x2d, 0x63, 0x49,
- 0x60, 0x11, 0x02, 0x26,
- 0x40, 0x31, 0xc0, 0xc0,
- 0x40, 0x28, 0x64, 0x91,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x63, 0x29, 0x40, 0x15,
- 0x91, 0x11, 0x40, 0x0b,
- 0x67, 0xc9, 0x40, 0x31,
- 0x06, 0x06, 0x40, 0x2d,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x13, 0x69, 0x85,
- 0xe0, 0x8c, 0x06, 0x06,
- 0x68, 0x11, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x0a,
- 0x40, 0x27, 0x63, 0x15,
- 0xe0, 0x10, 0x03, 0x86,
- 0x69, 0x91, 0x40, 0x13,
- 0x43, 0x86, 0x40, 0x13,
- 0x40, 0x33, 0xe0, 0x00,
- 0x40, 0x13, 0x69, 0x95,
- 0xe0, 0x00, 0x46, 0x86,
- 0x63, 0x31, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x27,
- 0x63, 0x35, 0x40, 0x31,
- 0x00, 0x3b, 0xc0, 0x27,
- 0xc0, 0x0a, 0x69, 0x31,
- 0x6c, 0x61, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x22,
- 0x6c, 0x65, 0x40, 0x11,
- 0x9d, 0x11, 0x40, 0x22,
- 0x6f, 0xb1, 0x40, 0x11,
- 0x02, 0x34, 0x40, 0x22,
- 0x40, 0x21, 0xfc, 0xa8,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x68, 0x09, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x0d,
- 0x61, 0x1d, 0x40, 0x25,
- 0x95, 0x21, 0x40, 0x0a,
- 0x65, 0x65, 0x40, 0x41,
- 0x40, 0x43, 0xc0, 0x1b,
- 0xc0, 0x14, 0x62, 0x41,
- 0x64, 0x8d, 0x40, 0x21,
- 0x40, 0x43, 0xc0, 0x28,
- 0xc0, 0x13, 0x69, 0x81,
- 0x63, 0x11, 0x40, 0x41,
- 0x40, 0x21, 0xc0, 0x27,
- 0xc0, 0x22, 0x6f, 0xb5,
- 0x69, 0x31, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x0a,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x0c, 0x14, 0x86,
- 0x63, 0xc0, 0x04, 0x0e,
- 0x40, 0xa3, 0xc0, 0xbb,
- 0x40, 0x15, 0x6d, 0xb5,
- 0xef, 0xfc, 0x55, 0xf6,
- 0x6d, 0xc1, 0x40, 0xa3,
- 0x55, 0xf6, 0x40, 0x15,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xe0, 0x7c, 0x07, 0x06,
- 0x63, 0x69, 0x40, 0xa1,
- 0x55, 0xf6, 0x40, 0x2d,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x64, 0x59, 0x40, 0x25,
- 0x05, 0x06, 0x40, 0x05,
- 0x40, 0xa5, 0xe0, 0x08,
- 0x40, 0x0b, 0x64, 0xe1,
- 0xe0, 0x04, 0x57, 0xc6,
- 0x64, 0xe5, 0x40, 0xa5,
- 0xbd, 0xa1, 0x40, 0x0b,
- 0x6e, 0x25, 0x40, 0x21,
- 0x83, 0x21, 0x40, 0x29,
- 0x6e, 0x81, 0x40, 0xb1,
- 0xb7, 0xb1, 0x40, 0x2c,
- 0x63, 0xa9, 0x40, 0xa1,
- 0x14, 0x56, 0x40, 0x2d,
- 0xc0, 0x20, 0x70, 0x01,
- 0x6a, 0xe1, 0x40, 0x33,
- 0x12, 0x06, 0x40, 0x15,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x1c, 0x62, 0x6d,
- 0xe0, 0x00, 0x46, 0x86,
- 0x60, 0x24, 0x0d, 0x86,
- 0xe0, 0x5c, 0x11, 0xc6,
- 0x6e, 0x89, 0x40, 0xb1,
- 0xab, 0xb1, 0x40, 0x2c,
- 0x62, 0x25, 0x40, 0x33,
- 0x46, 0xc6, 0x40, 0x1c,
- 0x40, 0x21, 0xe0, 0x00,
- 0x40, 0x2b, 0x65, 0x11,
- 0x40, 0x21, 0xa3, 0x51,
- 0x40, 0x2b, 0x65, 0xd1,
- 0xe0, 0x40, 0x0e, 0x06,
- 0x66, 0x81, 0x40, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x66, 0x85, 0x40, 0x21,
- 0x91, 0xc1, 0x40, 0x2b,
- 0x6b, 0x8d, 0x40, 0x21,
- 0x85, 0x41, 0x40, 0x2b,
- 0x6b, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x61,
- 0x6e, 0x5d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x61,
- 0x6e, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x99,
- 0x63, 0x31, 0x40, 0x21,
- 0x40, 0xa5, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x64, 0xed,
- 0x64, 0xf1, 0x40, 0xa5,
- 0x8d, 0xa1, 0x40, 0x0b,
- 0x68, 0x1d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x69, 0xd9,
- 0x69, 0xdd, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x7d,
- 0x64, 0xd5, 0x40, 0x21,
- 0xa9, 0x21, 0x40, 0x38,
- 0x6b, 0x1d, 0x40, 0x63,
- 0x0c, 0x06, 0x40, 0x15,
- 0x40, 0x83, 0xf9, 0x00,
- 0x40, 0x15, 0x6d, 0xb1,
- 0xe0, 0xcc, 0x10, 0xd6,
- 0x6e, 0x95, 0x40, 0xb1,
- 0x16, 0xc6, 0x40, 0x2c,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2d, 0x63, 0xd1,
- 0x72, 0xbd, 0x55, 0xf6,
- 0x40, 0x23, 0xc0, 0x20,
- 0x40, 0x1c, 0x62, 0x11,
- 0xe0, 0x10, 0x44, 0xc6,
- 0x62, 0x29, 0x40, 0x33,
- 0x07, 0x06, 0x40, 0x1c,
- 0x40, 0x91, 0xe0, 0x18,
- 0xc0, 0x29, 0x6e, 0x21,
- 0x6e, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x29,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0x40, 0x51, 0xb5, 0x91,
- 0x40, 0x2b, 0x65, 0xc9,
- 0xef, 0xf0, 0x4b, 0x86,
- 0x6d, 0x95, 0x40, 0x65,
- 0x0c, 0x0e, 0x40, 0x0a,
- 0x40, 0x83, 0xff, 0xc0,
- 0x40, 0x15, 0x6d, 0xb9,
- 0xe0, 0x00, 0x50, 0x66,
- 0x63, 0x49, 0x40, 0xb1,
- 0x17, 0x86, 0x40, 0x2d,
- 0x40, 0x23, 0xe0, 0x60,
- 0x40, 0x1c, 0x62, 0x15,
- 0x40, 0x33, 0xa1, 0x21,
- 0x40, 0x1c, 0x62, 0x2d,
- 0xe0, 0xf8, 0x46, 0x06,
- 0x63, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x39,
- 0x63, 0xd9, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0x40, 0x2d, 0x64, 0x09,
- 0x60, 0x01, 0x12, 0x06,
- 0x40, 0xa5, 0xc0, 0x20,
- 0xc0, 0x0b, 0x64, 0xf9,
- 0x64, 0xfd, 0x40, 0xa5,
- 0x14, 0x66, 0x40, 0x0b,
- 0xc0, 0x20, 0x68, 0x01,
- 0x6b, 0x19, 0x40, 0x53,
- 0x99, 0x51, 0x40, 0x15,
- 0x6d, 0x99, 0x40, 0x65,
- 0x89, 0x61, 0x40, 0x0a,
- 0x6d, 0x9d, 0x40, 0x75,
- 0x8b, 0x71, 0x40, 0x0a,
- 0x6b, 0x95, 0x40, 0x81,
- 0x8f, 0x81, 0x40, 0x2b,
- 0x69, 0xa9, 0x40, 0xb3,
- 0x87, 0xb1, 0x40, 0x16,
- 0x62, 0x31, 0x40, 0x33,
- 0x46, 0x46, 0x40, 0x1c,
- 0x40, 0x95, 0xe0, 0xf8,
- 0xc0, 0x0b, 0x65, 0x05,
- 0x65, 0x09, 0x40, 0x95,
- 0xb9, 0x91, 0x40, 0x0b,
- 0x65, 0x11, 0x40, 0xa5,
- 0x40, 0xa5, 0xc0, 0x0b,
- 0x40, 0x0b, 0x65, 0x15,
- 0x40, 0x23, 0x93, 0xa1,
- 0xc0, 0x1c, 0x62, 0x21,
- 0x62, 0x41, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0x40, 0x1c, 0x62, 0x45,
- 0xe0, 0x18, 0x04, 0x06,
- 0x62, 0x05, 0x40, 0x11,
- 0x40, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x65, 0x31,
- 0x65, 0xcd, 0x40, 0xc1,
- 0x40, 0x51, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x66, 0x41,
- 0x6a, 0xa1, 0x40, 0x71,
- 0x40, 0x61, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6a, 0xa5,
- 0x6b, 0x89, 0x40, 0x61,
- 0x40, 0x81, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x6e, 0x59, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x6e, 0x69, 0x40, 0x61,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x6e, 0x8d, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0xa5,
- 0x63, 0x25, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x35,
- 0x63, 0x41, 0x40, 0x41,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x63, 0x59, 0x40, 0xb1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x5d,
- 0x63, 0x61, 0x40, 0x61,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x63, 0x6d, 0x40, 0x11,
- 0x40, 0xb1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x71,
- 0x63, 0xa1, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xa5,
- 0x63, 0xd5, 0x40, 0x71,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x40, 0x71,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x40, 0x71,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x39,
- 0x64, 0x61, 0x40, 0xa1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0x64, 0x69, 0x40, 0x91,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x65, 0x31,
- 0x65, 0x35, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x68, 0x11,
- 0x6a, 0x31, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x6a, 0x39, 0x40, 0xb1,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x71,
- 0x64, 0xd1, 0x40, 0x11,
- 0x40, 0x13, 0xc0, 0x38,
- 0xc0, 0x1c, 0x62, 0x19,
- 0x62, 0x1d, 0x40, 0x53,
- 0x40, 0x33, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x35,
- 0x62, 0x39, 0x40, 0x13,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x3d,
- 0x62, 0x49, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x4d,
- 0x62, 0x51, 0x40, 0x23,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x55,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x4c, 0x44, 0x46,
- 0xe4, 0x50, 0x0a, 0x00,
- 0x91, 0xc1, 0x0a, 0x14,
- 0x0c, 0x86, 0x48, 0x34,
- 0xc0, 0x00, 0x61, 0x95,
- 0x4e, 0x86, 0x08, 0x44,
- 0xc0, 0x00, 0x61, 0x95,
- 0xe6, 0x86, 0x44, 0x3a,
- 0x61, 0x90, 0x06, 0x44,
- 0xe4, 0x10, 0x08, 0x00,
- 0x55, 0x8a, 0x83, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xc9, 0x87, 0xd1, 0x92,
- 0x66, 0xa2, 0x50, 0x2a,
- 0xe1, 0xf4, 0x14, 0x94,
- 0x50, 0x8a, 0x86, 0xa9,
- 0x94, 0x93, 0x60, 0x0e,
- 0xfb, 0x00, 0x12, 0x94,
- 0x50, 0x8a, 0x85, 0x97,
- 0xd9, 0x9e, 0xe6, 0x86,
- 0xa1, 0xcb, 0xdd, 0x8e,
- 0x00, 0x12, 0xfa, 0x75,
- 0x61, 0x99, 0x04, 0x86,
- 0x02, 0x02, 0xc0, 0x00,
- 0x61, 0x99, 0x06, 0xc6,
- 0x88, 0x1e, 0xc0, 0x00,
- 0x0c, 0x4c, 0x8c, 0x0e,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x04, 0xc6, 0x00, 0x02,
- 0xc0, 0x00, 0x61, 0x99,
- 0x84, 0x0d, 0x88, 0x24,
- 0x5a, 0x00, 0x5c, 0x08,
- 0xc0, 0x00, 0x00, 0x06,
- 0x61, 0x95, 0x04, 0x86,
- 0x88, 0x34, 0xc0, 0x00,
- 0x44, 0x86, 0x87, 0x0d,
- 0xc0, 0x00, 0x01, 0x95,
- 0xc0, 0x00, 0x04, 0x25,
- 0x04, 0x35, 0x8e, 0xb5,
- 0x87, 0x0d, 0xe0, 0x1c,
- 0x01, 0x99, 0x04, 0x46,
- 0x04, 0x25, 0x80, 0x00,
- 0x8c, 0x85, 0x80, 0x00,
- 0x83, 0x31, 0x01, 0xa5,
- 0xfa, 0x80, 0x08, 0x34,
- 0x08, 0x45, 0xc4, 0x47,
- 0x80, 0x4d, 0xfc, 0x08,
- 0x82, 0x31, 0x80, 0xb5,
- 0xf4, 0x18, 0x07, 0x0a,
- 0x06, 0x30, 0xfc, 0xc5,
- 0x0a, 0x34, 0xec, 0x04,
- 0x08, 0x50, 0xfa, 0x80,
- 0xc4, 0x57, 0x64, 0x04,
- 0x7c, 0x08, 0x0a, 0x35,
- 0x08, 0x25, 0xc4, 0x47,
- 0xa6, 0x23, 0xfc, 0x08,
- 0x06, 0x05, 0xa1, 0x2b,
- 0x80, 0x00, 0x04, 0x06,
- 0x61, 0x95, 0x58, 0x86,
- 0x46, 0x02, 0x40, 0x00,
- 0x0a, 0x55, 0xf1, 0x8c,
- 0x08, 0x45, 0xfc, 0x30,
- 0xaa, 0x43, 0xfc, 0x30,
- 0xe1, 0x7c, 0x18, 0x44,
- 0x98, 0x43, 0xf5, 0xc7,
- 0x46, 0x3a, 0x8d, 0x47,
- 0x44, 0x3a, 0xe6, 0x92,
- 0xcc, 0x27, 0xe0, 0x8a,
- 0x04, 0x14, 0x8a, 0x23,
- 0x61, 0x99, 0x06, 0x86,
- 0x8c, 0x34, 0xc0, 0x00,
- 0xfa, 0x00, 0x40, 0x32,
- 0xe6, 0x82, 0x40, 0x0a,
- 0xe0, 0x82, 0x40, 0x2a,
- 0xe4, 0x00, 0x42, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x7c, 0x2e,
- 0x86, 0x6b, 0x62, 0x18,
- 0x75, 0xb8, 0xbe, 0x1e,
- 0x60, 0x08, 0xef, 0xfc,
- 0x81, 0xa1, 0x91, 0x81,
- 0xe1, 0x00, 0x00, 0x0a,
- 0x10, 0x46, 0x09, 0x15,
- 0x7c, 0x14, 0xc0, 0x00,
- 0x00, 0x04, 0x96, 0x03,
- 0x80, 0x13, 0xfa, 0x80,
- 0xec, 0x00, 0x02, 0x19,
- 0x88, 0x85, 0xc3, 0xad,
- 0x40, 0x0a, 0xbe, 0x14,
- 0x94, 0x03, 0xe6, 0x86,
- 0xfa, 0x80, 0x0e, 0x04,
- 0x60, 0x84, 0x00, 0x74,
- 0xe0, 0x88, 0x02, 0x74,
- 0x7c, 0x04, 0x0c, 0x15,
- 0x00, 0x03, 0x8c, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0x61, 0x9c, 0x04, 0x14,
- 0xe4, 0x30, 0x02, 0xf0,
- 0xc5, 0x07, 0x7e, 0x2e,
- 0x00, 0xf0, 0x11, 0x0c,
- 0x76, 0x98, 0xe4, 0x40,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x50, 0x98, 0x4e, 0x72,
- 0xc0, 0x00, 0x00, 0xe6,
- 0x0c, 0x01, 0x4e, 0x01,
- 0x82, 0x91, 0xc0, 0x04,
- 0xfa, 0x80, 0x00, 0x94,
- 0xf4, 0x15, 0xd1, 0x0d,
- 0x82, 0x11, 0xbc, 0x14,
- 0xfa, 0x80, 0x00, 0x14,
- 0x56, 0x0a, 0xd1, 0x0d,
- 0x12, 0x06, 0x46, 0xa2,
- 0x5e, 0x15, 0xc0, 0x00,
- 0xfc, 0x35, 0xc0, 0x00,
- 0xbe, 0x04, 0x82, 0xa1,
- 0x7c, 0x75, 0x81, 0xab,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0xe4, 0x5d, 0xc2, 0x58,
- 0x40, 0x08, 0x98, 0x95,
- 0x8f, 0x5e, 0x81, 0x41,
- 0x61, 0x00, 0x00, 0x0a,
- 0x0b, 0x95, 0x91, 0x01,
- 0xc0, 0x00, 0x00, 0x46,
- 0x10, 0x74, 0x98, 0x73,
- 0x4e, 0x12, 0xfa, 0x80,
- 0x0e, 0x99, 0xf0, 0xa0,
- 0xd3, 0x4d, 0xec, 0x00,
- 0x50, 0x8a, 0x8e, 0x85,
- 0x88, 0x83, 0xe6, 0x96,
- 0xfa, 0x80, 0x10, 0x84,
- 0xf0, 0xa0, 0x54, 0x22,
- 0x6c, 0x01, 0x14, 0xb9,
- 0xbd, 0xbb, 0xc0, 0x04,
- 0x21, 0x4b, 0x8c, 0x15,
- 0x64, 0x01, 0x0e, 0x70,
- 0x8a, 0x15, 0xc0, 0x03,
- 0x88, 0xd5, 0xa5, 0x9b,
- 0x64, 0x04, 0x12, 0x80,
- 0x64, 0x00, 0x14, 0xa0,
- 0x56, 0x22, 0xc0, 0x13,
- 0x06, 0x84, 0x70, 0xa4,
- 0x16, 0xb9, 0xe0, 0x84,
- 0x40, 0x04, 0x6c, 0x01,
- 0x84, 0x83, 0xc4, 0x87,
- 0x16, 0x94, 0x28, 0xb6,
- 0x14, 0x20, 0xe0, 0x84,
- 0x40, 0x0e, 0x64, 0x01,
- 0x14, 0x5b, 0xc4, 0x97,
- 0x86, 0xa3, 0x7c, 0x2c,
- 0x04, 0x55, 0xa8, 0x5c,
- 0x20, 0x5e, 0xfc, 0x24,
- 0x64, 0x01, 0x0a, 0x20,
- 0x0a, 0x8b, 0xc0, 0x0c,
- 0x86, 0x53, 0x7c, 0x2c,
- 0x8f, 0x54, 0x94, 0x8c,
- 0x06, 0x90, 0x9c, 0x98,
- 0x9c, 0x36, 0xec, 0x04,
- 0x0e, 0x64, 0x82, 0x61,
- 0xc1, 0x7d, 0xfa, 0x80,
- 0x8d, 0x34, 0xee, 0x15,
- 0x18, 0x34, 0x82, 0x31,
- 0xc1, 0xcd, 0xfa, 0x80,
- 0x46, 0x82, 0x58, 0xca,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xc0, 0x18, 0x5e, 0x35,
- 0x82, 0x41, 0xfc, 0x35,
- 0x7c, 0x95, 0x8b, 0x4b,
- 0xc0, 0x00, 0x06, 0x06,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x14, 0x42, 0x46,
- 0x84, 0x18, 0x84, 0x14,
- 0x6b, 0xf1, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0xe1, 0x4c, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x00, 0x00, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x4c, 0x00, 0x06,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x83, 0x31, 0x00, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0x88, 0x3e, 0x80, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x81, 0x31, 0x00, 0x04,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0xdd, 0x93, 0x88, 0x3e,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x04,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x08,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xf4,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x10,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xec,
- 0xdd, 0x93, 0x80, 0x00,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x0c, 0x7b, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x61, 0x34, 0x56, 0x86,
- 0x2c, 0x04, 0x80, 0x7b,
- 0xe1, 0x4c, 0x13, 0x06,
- 0x83, 0x21, 0x03, 0xa1,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x0c, 0x15, 0x80, 0x86,
- 0xc0, 0x0b, 0x69, 0xf9,
- 0x40, 0x86, 0xa1, 0x1b,
- 0x00, 0x15, 0x8f, 0xdc,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xe8, 0x40, 0x4d, 0xc8,
- 0x83, 0x11, 0x2c, 0x04,
- 0x40, 0x46, 0x00, 0xa6,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa4, 0x04, 0x80, 0xa6,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x8c, 0x0b, 0x00, 0x86,
- 0xe8, 0x10, 0x67, 0xa8,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xe8, 0x0c, 0x78, 0xc8,
- 0x67, 0xcd, 0x0c, 0x09,
- 0xa4, 0x09, 0xc0, 0x2d,
- 0x82, 0x75, 0xa5, 0x0b,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x80, 0xd5,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x2c, 0x12, 0x28,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x97, 0x11, 0x00, 0x6b,
- 0xe8, 0x10, 0x4d, 0x28,
- 0xef, 0xdc, 0x42, 0x46,
- 0x40, 0x00, 0x84, 0x08,
- 0x84, 0x06, 0xf3, 0xf8,
- 0x62, 0x65, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x15,
- 0x22, 0x58, 0xe0, 0x8c,
- 0x0c, 0x09, 0x80, 0x00,
- 0xc0, 0x2d, 0x6b, 0x85,
- 0x21, 0xf8, 0xa1, 0x0b,
- 0x06, 0x60, 0x80, 0x00,
- 0x40, 0xb6, 0x67, 0xa1,
- 0xe0, 0x04, 0x00, 0x06,
- 0x64, 0x50, 0x04, 0xf0,
- 0x81, 0x45, 0x81, 0x11,
- 0x00, 0x00, 0x49, 0x16,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x19, 0x21, 0xfe, 0x95,
- 0x3e, 0x3e, 0x81, 0x51,
- 0x1b, 0x48, 0x81, 0x01,
- 0x00, 0x0a, 0xe0, 0x00,
- 0x1b, 0x48, 0xf0, 0x00,
- 0x52, 0x5a, 0xc0, 0x00,
- 0x86, 0x93, 0xe6, 0x8a,
- 0xe0, 0x20, 0x12, 0xa9,
- 0x12, 0x49, 0xa1, 0xab,
- 0x15, 0xf8, 0x80, 0x28,
- 0x12, 0xb9, 0x80, 0x00,
- 0xb1, 0xab, 0x60, 0x2c,
- 0xe0, 0x28, 0x12, 0x49,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x40, 0x40, 0x7c, 0x0e,
- 0x89, 0x0e, 0xf0, 0xfc,
- 0xac, 0x05, 0xfe, 0x4e,
- 0x1e, 0x05, 0xb3, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x49, 0x90, 0x98,
- 0x80, 0x15, 0x0f, 0x41,
- 0x80, 0x00, 0x0b, 0xa8,
- 0x8e, 0xe5, 0xb5, 0xab,
- 0x1e, 0x05, 0xb7, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x41, 0x90, 0x98,
- 0x80, 0x15, 0x0e, 0x41,
- 0x0c, 0x09, 0xaa, 0xc5,
- 0x40, 0x15, 0x62, 0x11,
- 0x89, 0xc4, 0xb9, 0xab,
- 0xe6, 0x82, 0x40, 0xca,
- 0x9a, 0x80, 0x00, 0x04,
- 0x90, 0x98, 0x40, 0x02,
- 0x0e, 0x41, 0x00, 0x49,
- 0xa6, 0xe5, 0x80, 0x1a,
- 0xa4, 0x25, 0xbb, 0xab,
- 0x8a, 0x45, 0xbd, 0xab,
- 0x81, 0x41, 0x3f, 0xab,
- 0x14, 0x0a, 0xa6, 0x05,
- 0x0c, 0x45, 0xe0, 0x40,
- 0x80, 0x0d, 0x08, 0x59,
- 0x14, 0x0a, 0xa2, 0x85,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x80, 0x0d, 0x08, 0x5d,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x0c, 0x49, 0xe0, 0x48,
- 0x80, 0x36, 0x01, 0x85,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x86, 0x85, 0xe0, 0x4c,
- 0xe0, 0x50, 0x14, 0x0a,
- 0x89, 0x04, 0x88, 0x15,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0xe5, 0x00, 0x45,
- 0x8f, 0x35, 0xc0, 0x0d,
- 0xc2, 0x07, 0x89, 0x04,
- 0x00, 0x4b, 0x8c, 0x03,
- 0xc0, 0x0a, 0x6d, 0xa1,
- 0x89, 0x04, 0x8f, 0x25,
- 0x00, 0x41, 0x8c, 0x03,
- 0xc0, 0x15, 0x6e, 0x41,
- 0x6d, 0x41, 0x00, 0x01,
- 0x0d, 0x35, 0xc0, 0x15,
- 0x89, 0x04, 0xa0, 0x43,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0x65, 0x00, 0x45,
- 0x8b, 0xb5, 0xc0, 0x0d,
- 0x08, 0x04, 0x09, 0x24,
- 0x3c, 0x5e, 0xfa, 0x80,
- 0x8c, 0x23, 0x89, 0x01,
- 0x6f, 0x41, 0x04, 0x39,
- 0x81, 0x21, 0x40, 0x15,
- 0x0e, 0x24, 0x85, 0x45,
- 0x88, 0x73, 0xfa, 0x80,
- 0x0e, 0x70, 0x8c, 0x73,
- 0xc0, 0x6b, 0x66, 0x41,
- 0x11, 0x0a, 0x98, 0x8b,
- 0x06, 0x35, 0xf4, 0x1c,
- 0xc4, 0x04, 0x04, 0x20,
- 0x70, 0x10, 0x00, 0x0a,
- 0xe4, 0x04, 0x18, 0x80,
- 0x1c, 0x58, 0xfc, 0xd5,
- 0xfa, 0x80, 0x10, 0x84,
- 0x10, 0x89, 0x8c, 0x83,
- 0xc0, 0x2e, 0x67, 0xc1,
- 0xfa, 0x80, 0x0a, 0x54,
- 0xfa, 0x80, 0x10, 0x84,
- 0xfa, 0x35, 0x91, 0x5b,
- 0x93, 0xc1, 0x04, 0x0b,
- 0x89, 0x21, 0x7b, 0xf5,
- 0xf4, 0x0c, 0x44, 0x8a,
- 0x18, 0x06, 0x76, 0x75,
- 0x00, 0x0a, 0xc0, 0x00,
- 0x04, 0x04, 0x70, 0x10,
- 0xa2, 0x15, 0xfa, 0x80,
- 0xe0, 0x80, 0x56, 0x1a,
- 0xa0, 0x00, 0x08, 0x58,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0x44, 0xe4, 0x50,
- 0xbc, 0x54, 0x83, 0x21,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x5c, 0x10, 0x06, 0x29,
- 0xf0, 0x90, 0x40, 0x32,
- 0x44, 0x20, 0xbe, 0x34,
- 0x80, 0x26, 0xd0, 0x04,
- 0x89, 0x04, 0x95, 0x05,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x64, 0xd1, 0x00, 0x45,
- 0x81, 0x75, 0xc0, 0x05,
- 0xc4, 0x07, 0x89, 0x04,
- 0x00, 0x45, 0x8c, 0x03,
- 0xc0, 0x05, 0x65, 0xd1,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x4b, 0xfc, 0x00,
- 0x80, 0x00, 0x08, 0xf8,
- 0xe0, 0x24, 0x12, 0x09,
- 0x84, 0x45, 0xab, 0x0b,
- 0x84, 0x65, 0xa3, 0x0b,
- 0x88, 0x65, 0xa5, 0x0b,
- 0x88, 0x85, 0xa7, 0x0b,
- 0x8a, 0x85, 0xa9, 0x0b,
- 0xa0, 0x15, 0xa1, 0x0b,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x90, 0x35,
- 0x82, 0x65, 0x80, 0x4d,
- 0xa4, 0x04, 0x87, 0xd5,
- 0x81, 0x4b, 0x03, 0x95,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x95,
- 0x8c, 0x85, 0x80, 0x4d,
- 0x04, 0xf0, 0x7c, 0x04,
- 0x89, 0x44, 0xe4, 0x50,
- 0x60, 0x80, 0x40, 0x0a,
- 0x04, 0x09, 0x83, 0x01,
- 0x07, 0x35, 0xdc, 0x10,
- 0xd0, 0x04, 0x40, 0x00,
- 0x01, 0xe5, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x4d,
- 0x09, 0xc4, 0x80, 0x4d,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x65, 0xfc, 0x30,
- 0xa4, 0x04, 0x83, 0x15,
- 0x09, 0xc4, 0x81, 0x4b,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x05, 0xfc, 0x30,
- 0x46, 0x4a, 0x7e, 0x44,
- 0x04, 0x06, 0xe0, 0x80,
- 0x01, 0x85, 0x80, 0x00,
- 0x7e, 0x44, 0x84, 0x3b,
- 0xe0, 0x80, 0x46, 0x0a,
- 0x46, 0x20, 0x83, 0x31,
- 0x98, 0x03, 0xd0, 0x04,
- 0xbe, 0x34, 0x80, 0x36,
- 0x7c, 0x04, 0x81, 0xd5,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x40, 0x4a, 0x89, 0x44,
- 0x81, 0x01, 0x60, 0x80,
- 0xdc, 0x10, 0x04, 0x09,
- 0x88, 0x23, 0x7e, 0x44,
- 0x07, 0x15, 0x88, 0x06,
- 0xbc, 0x54, 0x99, 0x21,
- 0x56, 0x4a, 0x84, 0x55,
- 0x82, 0xe5, 0xe0, 0x80,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0xc4, 0xe4, 0x50,
- 0xfe, 0x44, 0x81, 0x21,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x5c, 0x30, 0x06, 0x29,
- 0xf0, 0xb0, 0x40, 0x32,
- 0xfb, 0xe5, 0x80, 0x26,
- 0x01, 0x0a, 0x3e, 0x34,
- 0x84, 0xf5, 0xf4, 0x0c,
- 0x86, 0x85, 0xaf, 0xab,
- 0x8a, 0x85, 0xa5, 0xab,
- 0x8c, 0x25, 0xa7, 0xab,
- 0x8c, 0xc5, 0xa9, 0xab,
- 0x8e, 0x85, 0xab, 0xab,
- 0x90, 0x25, 0xad, 0xab,
- 0x82, 0x35, 0xa3, 0xab,
- 0xc2, 0x27, 0x88, 0x23,
- 0x04, 0x43, 0x8c, 0x23,
- 0x40, 0x0c, 0x6d, 0x21,
- 0xef, 0x55, 0x99, 0x21,
- 0xfe, 0x44, 0x99, 0x21,
- 0x72, 0x00, 0x40, 0x40,
- 0x09, 0x45, 0x82, 0x51,
- 0x08, 0x23, 0xcf, 0x07,
- 0x66, 0x41, 0x00, 0x60,
- 0x06, 0x24, 0xc0, 0x58,
- 0x80, 0x23, 0x60, 0x84,
- 0x64, 0x01, 0x04, 0x29,
- 0x86, 0x03, 0x40, 0x04,
- 0x6c, 0x01, 0x00, 0x43,
- 0xbe, 0x34, 0xc0, 0x01,
- 0x07, 0x05, 0xc8, 0x27,
- 0x88, 0x23, 0x84, 0x43,
- 0x8c, 0x23, 0xc4, 0x27,
- 0x68, 0x91, 0x04, 0x45,
- 0x85, 0x85, 0xc0, 0x05,
- 0xc4, 0x27, 0x88, 0x23,
- 0x04, 0x45, 0x8c, 0x23,
- 0xc0, 0x06, 0x60, 0x91,
- 0x88, 0x23, 0x85, 0x15,
- 0x8c, 0x23, 0xc2, 0x27,
- 0x69, 0x21, 0x04, 0x4b,
- 0x99, 0x21, 0x40, 0x0c,
- 0x88, 0x23, 0xe9, 0x65,
- 0x04, 0x49, 0x8c, 0x23,
- 0x40, 0x1a, 0x6a, 0x41,
- 0xe7, 0xf5, 0x99, 0x21,
- 0x00, 0x60, 0x08, 0x23,
- 0xc0, 0x58, 0x66, 0x41,
- 0x60, 0x84, 0x06, 0x24,
- 0x04, 0x29, 0x80, 0x23,
- 0x40, 0x04, 0x60, 0x01,
- 0x00, 0x43, 0x86, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xc8, 0x27, 0xbe, 0x34,
- 0x65, 0x75, 0xa4, 0x43,
- 0x0b, 0x0a, 0x99, 0x21,
- 0x24, 0xc8, 0xe4, 0xfc,
- 0x4c, 0x15, 0x9f, 0xfc,
- 0x40, 0x0b, 0x69, 0xed,
- 0x4c, 0x15, 0x81, 0x01,
- 0x40, 0x0b, 0x69, 0xe9,
- 0x85, 0xa5, 0x81, 0x21,
- 0x64, 0x50, 0x06, 0xf0,
- 0xec, 0x80, 0x08, 0x10,
- 0x7c, 0x04, 0x06, 0x39,
- 0xfb, 0x90, 0x4a, 0x12,
- 0x64, 0x7c, 0x03, 0x0a,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6c, 0x00, 0x10, 0x44,
- 0x06, 0xcb, 0xa8, 0x53,
- 0x18, 0x06, 0x82, 0x11,
- 0x0e, 0xc4, 0x80, 0x00,
- 0x81, 0xc1, 0x68, 0x90,
- 0x9c, 0x00, 0x58, 0x30,
- 0x6f, 0x90, 0x06, 0xc4,
- 0x46, 0x82, 0xa9, 0xcf,
- 0xb8, 0x0f, 0x78, 0x8c,
- 0x06, 0x52, 0x26, 0x7f,
- 0x4c, 0x05, 0xec, 0x04,
- 0x40, 0x0b, 0x69, 0xe9,
- 0xae, 0x2f, 0xa7, 0x7f,
- 0x69, 0xed, 0x4c, 0x25,
- 0x02, 0x0a, 0xc0, 0x0b,
- 0xf4, 0xb5, 0xe1, 0x00,
- 0xa1, 0x0b, 0xa4, 0x0f,
- 0x0c, 0x09, 0x88, 0x05,
- 0xc0, 0x38, 0x64, 0xc5,
- 0x64, 0xc1, 0x0c, 0x19,
- 0x43, 0x0d, 0xc0, 0x38,
- 0x64, 0xc5, 0x00, 0x60,
- 0x86, 0xf5, 0xc0, 0xe1,
- 0xef, 0xdc, 0x42, 0x46,
- 0x88, 0x18, 0x82, 0x2b,
- 0x88, 0x16, 0xc2, 0x19,
- 0x6e, 0x0d, 0x0c, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0x80, 0x00, 0x02, 0x16,
- 0x03, 0x11, 0x4c, 0x11,
- 0x81, 0xf5, 0x80, 0x38,
- 0xc2, 0x09, 0x84, 0x08,
- 0x83, 0x25, 0x84, 0x06,
- 0xef, 0xdc, 0x40, 0x46,
- 0x84, 0x08, 0x80, 0x1b,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x00, 0x60, 0x04, 0x06,
- 0xc0, 0xe1, 0x64, 0xc5,
- 0x02, 0x0a, 0x80, 0x18,
- 0x02, 0x10, 0xe3, 0xfc,
- 0x40, 0x11, 0xc4, 0x04,
- 0x1e, 0xf0, 0xc0, 0x00,
- 0x0c, 0x0c, 0xe5, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xef, 0xdc, 0x40, 0x46,
- 0x80, 0x28, 0x80, 0x18,
- 0x04, 0x19, 0xc2, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x26, 0xa2, 0x2f,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xef, 0xdc, 0x02, 0x86,
- 0xe0, 0x70, 0x02, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x64, 0xd5, 0x00, 0x29,
- 0xa7, 0x2b, 0xc0, 0x2b,
- 0x80, 0x00, 0x02, 0x29,
- 0x9c, 0x20, 0x44, 0x20,
- 0x80, 0x00, 0x42, 0x21,
- 0xff, 0xfc, 0x14, 0x68,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x51, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x49, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x45, 0xe8,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x55, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x4d, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x43, 0x08,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xec, 0x04, 0x02, 0x00,
- 0xf4, 0x1c, 0x03, 0x0a,
- 0x0c, 0x19, 0x82, 0xd5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xec, 0x04, 0x04, 0x10,
- 0xf4, 0x24, 0x05, 0x0a,
- 0x40, 0x0a, 0x80, 0xd5,
- 0x00, 0x8a, 0xe6, 0x86,
- 0x84, 0x35, 0xe5, 0x44,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0f, 0xf6, 0x40, 0x2b,
- 0x03, 0xf6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf8, 0x40, 0x48,
- 0x0d, 0x78, 0xa3, 0x0b,
- 0x0c, 0x19, 0x80, 0x00,
- 0xc0, 0x15, 0x61, 0x41,
- 0x61, 0x51, 0x0c, 0x09,
- 0x04, 0x14, 0x40, 0x15,
- 0x44, 0x0a, 0xfa, 0x80,
- 0x05, 0x0a, 0xe6, 0x8a,
- 0x82, 0x95, 0xe4, 0xa0,
- 0x61, 0x45, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xe6, 0x8a, 0x44, 0x3a,
- 0xe4, 0x84, 0x04, 0x8a,
- 0x0c, 0x29, 0x84, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x76,
- 0x60, 0x08, 0x42, 0x76,
- 0x7d, 0xf8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x80, 0x00, 0x0b, 0x28,
- 0x61, 0x41, 0x0c, 0x19,
- 0x0c, 0x09, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x04,
- 0x61, 0x49, 0x0c, 0x39,
- 0x42, 0x2a, 0xc0, 0x15,
- 0x86, 0x13, 0xe6, 0x86,
- 0xe4, 0xa0, 0x03, 0x0a,
- 0x0c, 0x19, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x45,
- 0x61, 0x55, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x02, 0x8a, 0x86, 0x13,
- 0x84, 0x15, 0xe4, 0x84,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x76, 0x40, 0x2b,
- 0x42, 0x76, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x7b, 0x08,
- 0xa0, 0x65, 0xa3, 0x0b,
- 0x61, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x15,
- 0x86, 0xd5, 0xf0, 0x10,
- 0x61, 0x55, 0x0c, 0x09,
- 0xa9, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x86, 0x35,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x06,
- 0x60, 0x08, 0x42, 0x06,
- 0x78, 0xd8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x98, 0x05,
- 0xc0, 0x15, 0x61, 0x49,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x84, 0x65,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x82, 0xa5,
- 0xc0, 0x15, 0x61, 0x51,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x55,
- 0xf8, 0x0c, 0x00, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x16,
- 0x60, 0x08, 0x42, 0x16,
- 0x76, 0x98, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x8e, 0x85,
- 0xc0, 0x15, 0x61, 0x41,
- 0x88, 0xb5, 0xa3, 0x0b,
- 0x61, 0x45, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x88, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0xec, 0x10, 0x00, 0x00,
- 0xf4, 0x30, 0x01, 0x0a,
- 0x0c, 0x09, 0x82, 0x55,
- 0x40, 0x15, 0x61, 0x55,
- 0x00, 0x00, 0x81, 0x71,
- 0x00, 0x8a, 0xec, 0x10,
- 0x88, 0x35, 0xf4, 0x34,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x36, 0x40, 0x2b,
- 0x42, 0x36, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x74, 0x28,
- 0x03, 0x55, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x61, 0x51, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0xa9, 0x0b, 0x82, 0x05,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xa9, 0x0b, 0x01, 0x65,
- 0x61, 0x55, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0x81, 0x71, 0x00, 0xd5,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x26, 0x40, 0x2b,
- 0x42, 0x26, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x71, 0xe8,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0xcc,
- 0x81, 0x01, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x99, 0x06, 0xc0, 0x16,
- 0x42, 0x4a, 0x91, 0x06,
- 0x42, 0x06, 0x60, 0x80,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x80, 0x00, 0x0c, 0x58,
- 0x6f, 0xfc, 0x6d, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0xc0, 0x00, 0x0b, 0xf8,
- 0x61, 0x41, 0x0c, 0x09,
- 0x04, 0xf0, 0x40, 0x15,
- 0x0c, 0x19, 0xe4, 0x20,
- 0xc0, 0x15, 0x61, 0x45,
- 0x66, 0x82, 0x40, 0x1a,
- 0xe4, 0x30, 0x02, 0xf0,
- 0x63, 0x09, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x4b, 0x88,
- 0x61, 0x49, 0x0c, 0x09,
- 0x99, 0x18, 0xc0, 0x15,
- 0x61, 0x4d, 0x0c, 0x29,
- 0x11, 0x38, 0xc0, 0x15,
- 0x0c, 0x09, 0xc5, 0x07,
- 0x40, 0x15, 0x61, 0x41,
- 0x4c, 0x11, 0x80, 0x13,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe1, 0x88, 0x08, 0x24,
- 0x61, 0x51, 0x0c, 0x19,
- 0x86, 0x43, 0x40, 0x15,
- 0x61, 0x55, 0x0c, 0x29,
- 0xa3, 0x0b, 0x40, 0x15,
- 0x61, 0x45, 0x0c, 0x39,
- 0x4c, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x6c, 0x51, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x06, 0x0a, 0x80, 0x95,
- 0x9c, 0x45, 0xf0, 0x04,
- 0xf4, 0x0c, 0x07, 0x0a,
- 0x4c, 0x21, 0x84, 0x55,
- 0x40, 0x2b, 0x6c, 0x4d,
- 0x4c, 0x31, 0xea, 0x0d,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x63, 0x58, 0x8c, 0x25,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x9c, 0x55, 0xa1, 0x0b,
- 0x6c, 0x41, 0x0c, 0x09,
- 0x85, 0xe5, 0xc0, 0x2b,
- 0xf0, 0x10, 0x06, 0x0a,
- 0x68, 0x0d, 0x86, 0x15,
- 0x4c, 0x21, 0x89, 0x31,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x45, 0x4c, 0x31,
- 0x86, 0x85, 0xc0, 0x2b,
- 0x6f, 0xfc, 0x62, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x96, 0xb5,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x86, 0x15, 0xab, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xfd, 0x15, 0x8c, 0x0b,
- 0x6f, 0xfc, 0x64, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x92, 0xf5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xf4, 0x95, 0xe8, 0x0d,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x4c, 0x01,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x00, 0x04,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0x40, 0x1a, 0xc0, 0x2b,
- 0x0c, 0x19, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0x40, 0x2b,
- 0x04, 0x16, 0xe0, 0x40,
- 0x4c, 0x21, 0x80, 0x00,
- 0x80, 0x2c, 0x0c, 0x81,
- 0x6c, 0x49, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0x00, 0x2b, 0x0c, 0x6d,
- 0xfa, 0x80, 0x02, 0x14,
- 0x0c, 0x69, 0x4c, 0x01,
- 0x44, 0x3a, 0x80, 0x2b,
- 0x40, 0x1a, 0xe6, 0x8a,
- 0x40, 0x2a, 0xe6, 0x82,
- 0x4c, 0x01, 0xe0, 0x02,
- 0x40, 0x2c, 0x6c, 0x79,
- 0xfa, 0x80, 0x02, 0x04,
- 0x66, 0x31, 0x4c, 0x13,
- 0x44, 0x98, 0xc0, 0x16,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x6f, 0xf0, 0x64, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x73, 0xb8, 0x80, 0xf5,
- 0x8c, 0x0b, 0x68, 0x24,
- 0x68, 0x30, 0x4f, 0x08,
- 0x21, 0x11, 0x8c, 0x0b,
- 0x4c, 0x11, 0x83, 0x21,
- 0xc0, 0x1b, 0x65, 0x61,
- 0x65, 0x41, 0x4c, 0x21,
- 0x0c, 0xcc, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x68, 0x11, 0x00, 0x49,
- 0x00, 0x39, 0xc0, 0x27,
- 0x40, 0x27, 0x68, 0x15,
- 0x08, 0x8a, 0x81, 0x01,
- 0x08, 0x44, 0xe5, 0x40,
- 0x00, 0x40, 0x81, 0x88,
- 0x06, 0x8a, 0x0c, 0x50,
- 0x04, 0x06, 0xe5, 0x00,
- 0x06, 0x34, 0x81, 0x01,
- 0x00, 0x34, 0x81, 0x88,
- 0x00, 0x00, 0x9a, 0x80,
- 0x88, 0x06, 0x8c, 0x40,
- 0xa1, 0x3b, 0x84, 0x38,
- 0xc4, 0x08, 0x06, 0x30,
- 0xc1, 0x88, 0x06, 0x34,
- 0xc0, 0x00, 0x42, 0x31,
- 0xc0, 0x00, 0x04, 0x09,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0xda, 0x80, 0x00, 0x04,
- 0xc4, 0x08, 0x00, 0x00,
- 0xc1, 0x88, 0x00, 0x04,
- 0x40, 0x00, 0x44, 0x01,
- 0xdd, 0x93, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x40, 0xc8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x8b, 0x55, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x44, 0x1a, 0xc0, 0x2b,
- 0xa1, 0x2b, 0xe5, 0x02,
- 0x0c, 0x39, 0x86, 0x05,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x49, 0x0c, 0x49,
- 0x0c, 0x59, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x41, 0x0c, 0xc9,
- 0x46, 0x4a, 0xc0, 0x2b,
- 0x48, 0xca, 0xe5, 0x0e,
- 0x46, 0x4a, 0xe5, 0x16,
- 0x44, 0x3a, 0xe5, 0x0e,
- 0x03, 0x65, 0xe0, 0x0a,
- 0xef, 0xfc, 0x04, 0x22,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x56, 0x40, 0x2b,
- 0x42, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x5c, 0xc8,
- 0x88, 0x05, 0xa3, 0x0b,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2b,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x04, 0x24, 0xc0, 0x2b,
- 0xc2, 0x07, 0x7a, 0x80,
- 0x04, 0x22, 0x01, 0x71,
- 0x4c, 0x01, 0xed, 0x00,
- 0x40, 0x1b, 0x63, 0x05,
- 0x4c, 0x11, 0xc2, 0x17,
- 0x40, 0x1b, 0x63, 0x01,
- 0xe0, 0x04, 0x00, 0x06,
- 0x63, 0x09, 0x4c, 0x01,
- 0x4c, 0x21, 0xc0, 0x1b,
- 0xc0, 0x1b, 0x63, 0x0d,
- 0x63, 0x11, 0x4c, 0x71,
- 0x8e, 0x0b, 0xc0, 0x1b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x6b,
- 0x63, 0x0d, 0x0c, 0x79,
- 0x02, 0xf0, 0x40, 0x1b,
- 0x0c, 0x99, 0xe4, 0x20,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0xa9,
- 0xfc, 0x0e, 0xc0, 0x2b,
- 0x3c, 0x06, 0x89, 0x06,
- 0x45, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xc0, 0x00, 0x10, 0x06,
- 0x00, 0x08, 0x1e, 0x85,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x74, 0xf8, 0x9e, 0x2b,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8e, 0x65, 0xa1, 0x8b,
- 0x6c, 0x3d, 0x0c, 0x39,
- 0x02, 0x90, 0x40, 0x2b,
- 0x3c, 0x48, 0xec, 0x04,
- 0xec, 0x04, 0x04, 0xa0,
- 0x6c, 0x39, 0x0c, 0x59,
- 0x81, 0xc1, 0x40, 0x2b,
- 0xa8, 0x33, 0x89, 0x08,
- 0x60, 0x8c, 0x08, 0x34,
- 0x64, 0x20, 0x06, 0x60,
- 0xa0, 0x53, 0xc0, 0x6d,
- 0xc6, 0x57, 0x05, 0x45,
- 0x12, 0x44, 0x02, 0xc1,
- 0x51, 0xcd, 0xfa, 0x80,
- 0xf0, 0x94, 0x54, 0x12,
- 0x79, 0x00, 0x46, 0xa1,
- 0xf0, 0xa4, 0x56, 0x22,
- 0x82, 0x25, 0x8c, 0xb6,
- 0x6c, 0x51, 0x0c, 0x99,
- 0x0a, 0x54, 0x40, 0x2b,
- 0xc2, 0x97, 0xfa, 0x80,
- 0x92, 0x53, 0x01, 0xd5,
- 0x6c, 0x55, 0x0c, 0x49,
- 0x81, 0xc1, 0x40, 0x2b,
- 0x6c, 0x39, 0x0c, 0x59,
- 0xc2, 0x47, 0xc0, 0x2b,
- 0x92, 0x43, 0x20, 0x53,
- 0x0e, 0x70, 0xc6, 0x57,
- 0x82, 0x31, 0x6c, 0x04,
- 0xf6, 0xb5, 0xa1, 0x7b,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x51, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0xc1, 0xc3, 0x87, 0x25,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x7b,
- 0x82, 0x6b, 0x7c, 0x0e,
- 0x02, 0xf0, 0x3e, 0x0e,
- 0x7e, 0x98, 0xe4, 0x20,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x41, 0x18, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xfc, 0x04, 0x82, 0x35,
- 0x40, 0x1a, 0xbe, 0x14,
- 0x00, 0x02, 0xe6, 0x82,
- 0x18, 0x0e, 0xef, 0xfc,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x55, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x4d, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0xc1, 0xc3, 0x81, 0x25,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x85, 0xa1, 0x3b,
- 0xe5, 0x0a, 0x40, 0x1a,
- 0xe0, 0x0e, 0x40, 0x0a,
- 0xef, 0xfc, 0x00, 0x02,
- 0x81, 0x01, 0x10, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x56,
- 0x6f, 0xf4, 0x4e, 0xe8,
- 0xe0, 0x08, 0x4c, 0x56,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xc6, 0xc1, 0x83,
- 0x43, 0x26, 0x61, 0x48,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x48,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x9c,
- 0xef, 0xe4, 0x56, 0xa8,
- 0x6f, 0x9c, 0x62, 0x48,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x36,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x55, 0x18, 0x80, 0x16,
- 0x60, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x53, 0x98, 0x80, 0x16,
- 0x5f, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x76,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x52, 0x18, 0x80, 0x16,
- 0x5d, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x96,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x50, 0x98, 0x80, 0x16,
- 0x5c, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xa6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4f, 0x18, 0x80, 0x16,
- 0x5a, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xe6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4d, 0x98, 0x80, 0x16,
- 0x59, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe2, 0xc0, 0x00, 0x2c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4c, 0x38, 0x80, 0x16,
- 0x57, 0xd8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfe, 0x1c, 0x04, 0xcc,
- 0x6f, 0xf8, 0x46, 0x28,
- 0x80, 0x7b, 0x80, 0x6b,
- 0xe0, 0x00, 0x0e, 0x2a,
- 0x40, 0x01, 0x05, 0xf8,
- 0x05, 0x01, 0x80, 0x00,
- 0x4c, 0x01, 0x81, 0x91,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x94, 0x00, 0x06,
- 0x10, 0x60, 0x00, 0x9e,
- 0xc0, 0xaf, 0x64, 0x1d,
- 0xef, 0xe8, 0x7d, 0x68,
- 0x82, 0x65, 0xa1, 0x0b,
- 0xa0, 0x06, 0x87, 0x01,
- 0xef, 0xf8, 0x45, 0x28,
- 0xef, 0xf8, 0x45, 0x68,
- 0xef, 0xe4, 0x49, 0xe8,
- 0xef, 0xe8, 0x7d, 0x08,
- 0x45, 0x86, 0x01, 0x11,
- 0x6a, 0xd8, 0xee, 0x10,
- 0x8c, 0x0b, 0x6f, 0x9c,
- 0x6f, 0xdc, 0x00, 0x86,
- 0x6a, 0x78, 0x81, 0x11,
- 0x44, 0xc6, 0x6f, 0x9c,
- 0x00, 0x86, 0xe0, 0x00,
- 0x42, 0x86, 0x60, 0x0c,
- 0x4c, 0x15, 0xe0, 0x3c,
- 0x40, 0x0e, 0x60, 0xd9,
- 0x60, 0x01, 0x02, 0x06,
- 0x4c, 0x05, 0xc0, 0x7d,
- 0xc0, 0x0e, 0x60, 0xcd,
- 0x60, 0xd1, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x0e,
- 0x40, 0x0e, 0x60, 0xd5,
- 0x4c, 0x05, 0x8b, 0x01,
- 0x40, 0x0e, 0x60, 0xdd,
- 0x4c, 0x15, 0x83, 0x01,
- 0x40, 0x0a, 0x6d, 0x49,
- 0xe0, 0x50, 0x03, 0xe6,
- 0x6e, 0x91, 0x4c, 0x01,
- 0x00, 0x06, 0x40, 0x2c,
- 0x4c, 0x13, 0xe4, 0x00,
- 0x40, 0x16, 0x67, 0x39,
- 0xe0, 0x00, 0x42, 0x16,
- 0x67, 0x3d, 0x4c, 0x03,
- 0x00, 0x76, 0x40, 0x16,
- 0xc0, 0x20, 0x60, 0x09,
- 0x6e, 0x01, 0x4c, 0x13,
- 0x87, 0x11, 0x40, 0x15,
- 0x4c, 0x11, 0x80, 0x96,
- 0xc0, 0x38, 0x64, 0xc1,
- 0x00, 0x06, 0x83, 0x05,
- 0x10, 0x60, 0x61, 0x94,
- 0xc0, 0xaf, 0x64, 0x1c,
- 0x23, 0x1b, 0x80, 0x14,
- 0x4c, 0x11, 0x83, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x15,
- 0xef, 0xe4, 0x5a, 0xa8,
- 0x64, 0x60, 0x18, 0xf0,
- 0x60, 0x18, 0x8c, 0x0b,
- 0x8d, 0x04, 0xe8, 0x10,
- 0x82, 0x55, 0xa1, 0x0b,
- 0xa1, 0x9b, 0x8f, 0x94,
- 0x01, 0x46, 0x80, 0xe5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa3, 0x0b, 0x80, 0x04,
- 0x5e, 0xd8, 0x88, 0x95,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x10, 0xb6, 0x20, 0x28,
- 0x02, 0xb6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf0, 0x78, 0x68,
- 0x68, 0x38, 0x4a, 0xc8,
- 0x51, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x7d, 0x38, 0xa1, 0x8b,
- 0x50, 0x00, 0x6f, 0xf4,
- 0x7d, 0x58, 0x9c, 0x00,
- 0x41, 0xd8, 0xef, 0xf4,
- 0x01, 0x01, 0xef, 0xe4,
- 0x6a, 0x18, 0x83, 0x11,
- 0x8c, 0x2b, 0x6f, 0xe4,
- 0x0c, 0xcc, 0x90, 0x0b,
- 0xdd, 0x93, 0xf6, 0x1c,
- 0x68, 0x0c, 0x7a, 0x48,
- 0x00, 0x8b, 0x8c, 0x0b,
- 0xa1, 0x8b, 0x8c, 0x0b,
- 0x48, 0x78, 0x80, 0x85,
- 0xfb, 0xf5, 0xef, 0xf4,
- 0xe8, 0x14, 0x64, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x7a, 0x18, 0xf6, 0x55,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0xe8, 0x00, 0x45, 0x88,
- 0x40, 0x01, 0x04, 0x48,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xef, 0xf4, 0x47, 0x68,
- 0x6f, 0xf0, 0x7f, 0x08,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xe4, 0x66, 0xa8,
- 0x68, 0x00, 0x48, 0x28,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x97, 0x11, 0x61, 0x4c,
- 0xa3, 0x9b, 0x00, 0x04,
- 0x81, 0x81, 0x01, 0x91,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x4c,
- 0x80, 0x16, 0x9d, 0x11,
- 0x74, 0x58, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x02, 0x0e, 0x80, 0x8b,
- 0x40, 0x10, 0x60, 0x01,
- 0xe5, 0x40, 0x00, 0x06,
- 0x02, 0x2b, 0x81, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0x02, 0x33, 0xc9, 0x34,
- 0xc6, 0x9f, 0x84, 0x1b,
- 0xfe, 0x15, 0xa1, 0x0b,
- 0x72, 0xfd, 0x41, 0xc6,
- 0x00, 0x9e, 0xc0, 0x20,
- 0x44, 0x18, 0x8c, 0x0b,
- 0xa1, 0x8b, 0xe8, 0x38,
- 0x81, 0x35, 0xe4, 0xb5,
- 0xe8, 0x38, 0x43, 0xc8,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0x6f, 0xe8, 0x6f, 0x08,
- 0x80, 0x8b, 0x8e, 0x2b,
- 0xe2, 0x55, 0xa1, 0x8b,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x0b, 0x03, 0x31,
- 0xe8, 0x34, 0x4d, 0xe8,
- 0x80, 0x8b, 0x71, 0x35,
- 0x61, 0x20, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0x01, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0xdd, 0x93, 0x80, 0x16,
- 0x62, 0x65, 0x00, 0x09,
- 0x02, 0x46, 0x40, 0x15,
- 0x04, 0x14, 0xe1, 0x4c,
- 0x88, 0x09, 0x81, 0x31,
- 0x44, 0x20, 0x84, 0x28,
- 0x20, 0x2f, 0xf3, 0xec,
- 0xe1, 0x34, 0x40, 0x86,
- 0x83, 0x11, 0x04, 0x26,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x01, 0x06,
- 0x88, 0x36, 0x80, 0x24,
- 0x88, 0x16, 0x80, 0x24,
- 0x00, 0x36, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x06,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x00, 0x86,
- 0x43, 0x06, 0x00, 0x04,
- 0x80, 0x16, 0xe0, 0x00,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x68, 0x05, 0x00, 0x1b,
- 0x00, 0x2b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x01,
- 0x68, 0x15, 0x00, 0x3b,
- 0x00, 0x4b, 0xc0, 0x0a,
- 0x40, 0x0a, 0x68, 0x09,
- 0x00, 0x2b, 0xe0, 0x17,
- 0x40, 0x0a, 0x68, 0x0d,
- 0x00, 0x5b, 0xa4, 0x1f,
- 0x40, 0x0a, 0x68, 0x11,
- 0x80, 0x1e, 0xe0, 0x37,
- 0x28, 0x2f, 0xe0, 0x27,
- 0x82, 0x2e, 0xaa, 0x3f,
- 0xdd, 0x93, 0xc0, 0x3e,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0xa0, 0x55, 0xa8,
- 0x01, 0x06, 0x81, 0x11,
- 0x4f, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x44, 0x06,
- 0x88, 0x44, 0x9c, 0x34,
- 0x00, 0x1c, 0xc2, 0x19,
- 0x46, 0x01, 0xa1, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x10, 0x16, 0x83, 0x11,
- 0x88, 0x04, 0x83, 0x11,
- 0x41, 0xf6, 0x00, 0x66,
- 0x54, 0x18, 0xe0, 0x3c,
- 0x7b, 0xd8, 0xef, 0xa0,
- 0x1c, 0x04, 0xe8, 0x14,
- 0x4d, 0x18, 0x81, 0x11,
- 0xa8, 0xf1, 0xe8, 0x08,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x06, 0xc1, 0x83,
- 0x45, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x46, 0x86,
- 0x8c, 0x54, 0x88, 0x44,
- 0x00, 0x1c, 0xc4, 0x19,
- 0x48, 0x01, 0xa3, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x16, 0x83, 0x11,
- 0x8c, 0x04, 0x81, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x67, 0xcd, 0x00, 0x19,
- 0xc8, 0x19, 0xc0, 0x2d,
- 0x67, 0xcd, 0x40, 0x11,
- 0x83, 0x11, 0x40, 0x2d,
- 0xe8, 0x08, 0x49, 0x88,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x4e, 0x48,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa5, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x47, 0x08,
- 0xe1, 0x38, 0x4f, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x45,
- 0x45, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x38,
- 0xc8, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x98, 0x04, 0x80, 0x16,
- 0xe8, 0x34, 0x75, 0x68,
- 0x02, 0x26, 0x18, 0x04,
- 0x45, 0x18, 0xe0, 0x10,
- 0x9c, 0x04, 0xe8, 0x08,
- 0x40, 0x0a, 0x80, 0x08,
- 0x84, 0xc5, 0xe0, 0x84,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x38, 0x45, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0x80, 0x1c, 0xd0, 0x19,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x26,
- 0x43, 0x78, 0x98, 0x04,
- 0x41, 0xf6, 0xe8, 0x08,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x49, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x47, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa7, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x87, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x40, 0xa8,
- 0xe1, 0x3c, 0x0e, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x84, 0xe5,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0xe0, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x36, 0x00, 0x16,
- 0x98, 0x04, 0xe0, 0x10,
- 0xe8, 0x04, 0x7e, 0xe8,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x05,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x94,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x36,
- 0x7d, 0x38, 0x98, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x40, 0x0a, 0x80, 0x08,
- 0x8a, 0x05, 0xe0, 0x88,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0x98, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc8, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x38,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x00, 0x1b, 0x98, 0x04,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x02, 0x14,
- 0x6e, 0x09, 0x40, 0x13,
- 0x02, 0x36, 0x40, 0x15,
- 0x7a, 0x98, 0xe0, 0x40,
- 0x4c, 0x38, 0xe8, 0x04,
- 0x41, 0xf6, 0xef, 0xe0,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x40, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x7e, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa9, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x2b,
- 0xe8, 0x04, 0x77, 0xa8,
- 0xe1, 0x3c, 0x0f, 0x06,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x9c,
- 0xc2, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x10, 0x02, 0x46,
- 0x75, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0x96,
- 0xe8, 0x04, 0x4c, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa0,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x42, 0xa6,
- 0x4a, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x20, 0x02, 0x46,
- 0xe8, 0x04, 0x73, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa4,
- 0xc8, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xec,
- 0xe0, 0x0c, 0x42, 0xb6,
- 0x48, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x40, 0x02, 0x46,
- 0xe8, 0x04, 0x71, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x8c, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa8,
- 0xd0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xdc,
- 0xe0, 0x80, 0x02, 0x46,
- 0x6f, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xc6,
- 0xe8, 0x04, 0x46, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xac,
- 0xe0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x00, 0x02, 0x46,
- 0x6d, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xd6,
- 0xe8, 0x04, 0x44, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xc5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xb0,
- 0x00, 0x04, 0x8c, 0x08,
- 0x8c, 0x06, 0xfc, 0x94,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0x7c, 0x42, 0x10,
- 0x02, 0x46, 0x00, 0x16,
- 0x98, 0x04, 0xe2, 0x00,
- 0xe8, 0x04, 0x6b, 0xc8,
- 0x42, 0xe6, 0x18, 0x04,
- 0x42, 0x58, 0xe0, 0x0c,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x42, 0x0a, 0x80, 0x18,
- 0x86, 0xc5, 0xe0, 0x98,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0xc6,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0xb4, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0xfc, 0x98, 0x00, 0x04,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf2, 0xfc,
- 0xe4, 0x00, 0x02, 0x46,
- 0x69, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xf6,
- 0xe8, 0x04, 0x40, 0x48,
- 0x00, 0x00, 0x9c, 0x04,
- 0x82, 0x0d, 0xff, 0x11,
- 0x00, 0xc6, 0x86, 0xb5,
- 0x80, 0x14, 0xe1, 0x3c,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x9c,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x03, 0x06, 0x00, 0x16,
- 0x84, 0x2a, 0xe1, 0x98,
- 0x04, 0x24, 0x98, 0x04,
- 0x04, 0x2c, 0xfc, 0xb8,
- 0xe8, 0x00, 0x02, 0x46,
- 0xe8, 0x04, 0x67, 0xa8,
- 0x43, 0x06, 0x18, 0x04,
- 0x7f, 0x98, 0xe0, 0x0c,
- 0x41, 0xf6, 0xe8, 0x00,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x6d, 0xa8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x6b, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0x03, 0x06, 0x61, 0x4c,
- 0x1c, 0x04, 0xe1, 0x98,
- 0xe1, 0x3c, 0x46, 0x46,
- 0xab, 0x41, 0x04, 0x2a,
- 0x40, 0x41, 0x8c, 0x54,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x7c, 0xbc, 0x00, 0x24,
- 0x04, 0x0c, 0x83, 0x21,
- 0x94, 0x26, 0x8b, 0x11,
- 0x80, 0x66, 0x8c, 0x04,
- 0x63, 0x98, 0x9c, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0xef, 0xe0, 0x71, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x69, 0xb8, 0x83, 0x11,
- 0xa8, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x8c, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x67, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0xad, 0x01, 0x61, 0x4c,
- 0x83, 0x81, 0x1c, 0x14,
- 0x6c, 0x1d, 0x42, 0x01,
- 0x83, 0x01, 0x40, 0x2b,
- 0xef, 0xe4, 0x72, 0x88,
- 0xe1, 0x3c, 0x41, 0xc6,
- 0x04, 0x86, 0x80, 0x14,
- 0x80, 0x04, 0x8d, 0x11,
- 0x9c, 0x04, 0x80, 0x66,
- 0xe8, 0x04, 0x5f, 0xc8,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x66, 0x18, 0x83, 0x11,
- 0xa0, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x8c, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0x6f, 0x9c, 0x64, 0x28,
- 0x4f, 0x06, 0x81, 0x61,
- 0xaf, 0x01, 0x61, 0x4c,
- 0x42, 0x01, 0x9c, 0x14,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6e, 0xf8, 0x81, 0x01,
- 0x1c, 0x04, 0xef, 0xe4,
- 0x5c, 0x98, 0x8f, 0x11,
- 0x00, 0x86, 0xe8, 0x04,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf8, 0xc0, 0x02, 0x0a,
- 0x80, 0x18, 0x80, 0xe5,
- 0xf0, 0xc0, 0x42, 0x10,
- 0xe0, 0x80, 0x02, 0x0a,
- 0x9c, 0x14, 0x82, 0xb5,
- 0x6c, 0x15, 0x02, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x00, 0x19, 0xe0, 0x84,
- 0x80, 0x18, 0xc0, 0x70,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x9c, 0x04, 0x80, 0x16,
- 0x6c, 0x15, 0x00, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x84, 0x45, 0xe0, 0x84,
- 0x68, 0x04, 0x5a, 0x88,
- 0xe0, 0x10, 0x02, 0x76,
- 0x68, 0xd8, 0x9c, 0x04,
- 0x9c, 0x04, 0xef, 0xe4,
- 0x6e, 0x09, 0x00, 0x1b,
- 0x42, 0x10, 0xc0, 0x15,
- 0xc0, 0xfd, 0x73, 0xfd,
- 0x6e, 0x09, 0x40, 0x13,
- 0x01, 0x46, 0xc0, 0x15,
- 0x83, 0x11, 0x61, 0x40,
- 0x00, 0x16, 0x80, 0x04,
- 0x00, 0x66, 0x83, 0x11,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0xef, 0x9c, 0x5f, 0x88,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x41, 0x06,
- 0xe1, 0x40, 0x42, 0xc6,
- 0xb1, 0x31, 0x00, 0x04,
- 0x83, 0x41, 0x04, 0x24,
- 0x6c, 0x1d, 0x40, 0x31,
- 0x08, 0x46, 0xc0, 0x2b,
- 0x84, 0x14, 0x81, 0x21,
- 0x91, 0x11, 0x04, 0x26,
- 0xe8, 0x04, 0x55, 0xa8,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x4f, 0x06,
- 0xe1, 0x34, 0x42, 0xc6,
- 0xb3, 0x21, 0x1c, 0x04,
- 0x4d, 0xc6, 0x04, 0x14,
- 0x40, 0x21, 0xe1, 0x98,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x18, 0x16, 0x84, 0x18,
- 0x52, 0x78, 0x93, 0x11,
- 0x98, 0x08, 0xe8, 0x04,
- 0x82, 0xe5, 0xa7, 0x0b,
- 0x84, 0xa5, 0xa3, 0x0b,
- 0x86, 0x65, 0xa5, 0x0b,
- 0x88, 0x55, 0xa1, 0x0b,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x98, 0xe0, 0x10,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x85, 0xc1, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x18, 0xe0, 0x80,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x05, 0xc7, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x98, 0xe0, 0x20,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x85, 0xc3, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x18, 0xe0, 0x40,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x01, 0xc5, 0x13,
- 0x00, 0x46, 0x98, 0x06,
- 0x83, 0x11, 0x61, 0x44,
- 0x81, 0x21, 0x00, 0x04,
- 0x80, 0x16, 0xa8, 0xf1,
- 0x1f, 0x0c, 0x80, 0x26,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x00, 0x5e, 0xe8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0xc0, 0x00, 0x1d, 0x48,
- 0x63, 0x29, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xdd,
- 0x63, 0x21, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x25,
- 0x61, 0x84, 0x08, 0x34,
- 0x54, 0x78, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x1b, 0xf8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0x39,
- 0x6c, 0xe5, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x53, 0x28,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x1a, 0xa8,
- 0x63, 0x49, 0x0c, 0x39,
- 0x01, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xed,
- 0x63, 0x41, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x61, 0x84, 0x08, 0x34,
- 0x51, 0xd8, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x19, 0x58, 0xa1, 0x0b,
- 0x0c, 0x3b, 0xc0, 0x00,
- 0x40, 0x16, 0x69, 0xa9,
- 0x6c, 0xf9, 0x01, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x50, 0x88,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x18, 0x08,
- 0x63, 0x71, 0x0c, 0x39,
- 0x41, 0xce, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x09,
- 0x63, 0x61, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x61, 0x84, 0x08, 0x34,
- 0x4f, 0x38, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x16, 0xb8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0xa9,
- 0x6d, 0x31, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4d, 0xe8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x15, 0x68,
- 0x63, 0xd9, 0x0c, 0x39,
- 0x40, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x39,
- 0x63, 0xd1, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xd5,
- 0x61, 0x84, 0x08, 0x34,
- 0x4c, 0x98, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x14, 0x18, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x09,
- 0x6d, 0x41, 0x01, 0x4e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4b, 0x48,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x12, 0xc8,
- 0x64, 0x39, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x4d,
- 0x64, 0x31, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x35,
- 0x4a, 0x18, 0x82, 0x39,
- 0x86, 0x4b, 0x6f, 0x9c,
- 0x11, 0x98, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x69,
- 0x6d, 0x55, 0x00, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x61,
- 0x64, 0x65, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x48, 0xc8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x10, 0x48,
- 0x6f, 0x9c, 0x4f, 0x48,
- 0x41, 0xf6, 0x81, 0x01,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x47, 0x88,
- 0x63, 0x29, 0x0c, 0x09,
- 0x03, 0xc6, 0x40, 0x2d,
- 0x84, 0x14, 0xe1, 0x38,
- 0x82, 0x09, 0xc7, 0x07,
- 0x42, 0x46, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x38,
- 0xc0, 0x2d, 0x63, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x38, 0x40, 0xc6,
- 0x0c, 0x29, 0x80, 0x14,
- 0xc0, 0x2d, 0x63, 0x49,
- 0xc9, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x04, 0x84, 0x36,
- 0x63, 0x49, 0x0c, 0x19,
- 0x80, 0x28, 0xc0, 0x2d,
- 0x84, 0x19, 0xc9, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x00, 0x26, 0xa2, 0x2f,
- 0xe1, 0x38, 0x41, 0xc6,
- 0x0c, 0x2b, 0x80, 0x14,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x14, 0x84, 0x36,
- 0x69, 0xa9, 0x0c, 0x2b,
- 0x84, 0x38, 0xc0, 0x16,
- 0x84, 0x29, 0xcb, 0x27,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x84, 0x36, 0xa4, 0x3f,
- 0x0c, 0x1b, 0x80, 0x04,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x17, 0x80, 0x28,
- 0x44, 0x20, 0x88, 0x19,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x00, 0x86, 0x00, 0x26,
- 0x0c, 0x19, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x3c, 0x01, 0x46,
- 0x64, 0xe1, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x01, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xe5,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x03, 0xc6,
- 0x63, 0xa9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xa9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x3c, 0x40, 0xc6,
- 0x64, 0xed, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xf1,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x43, 0x46,
- 0x63, 0xd9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x43, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xd9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x00, 0x46,
- 0x64, 0xf9, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x00, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x02, 0xc6,
- 0x64, 0x09, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x03, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x09,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x01, 0xc6,
- 0x65, 0x05, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x40, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x09,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x42, 0x46,
- 0x64, 0x39, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x41, 0x46,
- 0x65, 0x11, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x15,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x43, 0xc6,
- 0x64, 0x69, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x02, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x44,
- 0xc0, 0x2d, 0x64, 0x69,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x84, 0x55, 0xbf, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0xa6, 0x40, 0x2b,
- 0x02, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x48, 0x08,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x63, 0x21,
- 0x63, 0x25, 0x0c, 0x19,
- 0x7a, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x94, 0x35,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x19,
- 0x7a, 0x38, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x90, 0xf5,
- 0xc0, 0x2d, 0x63, 0x41,
- 0x63, 0x45, 0x0c, 0x19,
- 0x79, 0x98, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8e, 0xb5,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x19,
- 0x78, 0xf8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8c, 0x75,
- 0xc0, 0x2d, 0x63, 0x61,
- 0x63, 0x65, 0x0c, 0x19,
- 0x78, 0x58, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8a, 0x35,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x19,
- 0x77, 0xb8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x86, 0xf5,
- 0xc0, 0x2d, 0x63, 0xd1,
- 0x63, 0xd5, 0x0c, 0x19,
- 0x77, 0x18, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x84, 0xb5,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x19,
- 0x76, 0x78, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x82, 0x75,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x0c, 0x19,
- 0x75, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x64, 0x61, 0x0c, 0x09,
- 0x0c, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0x98, 0x34, 0xe8,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x40, 0x38, 0xc0, 0x2b,
- 0xa3, 0x0b, 0xef, 0xec,
- 0x41, 0xf6, 0x82, 0x55,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x98, 0x6f, 0x08,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xff, 0xd8, 0x39, 0xe8,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x3e, 0x38, 0xf2, 0x0c,
- 0x4e, 0x46, 0xff, 0xe8,
- 0x0e, 0x09, 0xef, 0xdc,
- 0xc2, 0x09, 0xf8, 0x10,
- 0xf8, 0x10, 0x4e, 0x01,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x42, 0x36, 0x8c, 0xf5,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x5b, 0x88,
- 0x60, 0x04, 0x42, 0x46,
- 0x57, 0x38, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x81, 0x81, 0x1c, 0x08,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x9c, 0x08, 0x9c, 0x06,
- 0xf3, 0xf4, 0x40, 0x00,
- 0x4e, 0x81, 0x9c, 0x06,
- 0x0c, 0x0b, 0xe0, 0x30,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0xf8, 0x8c, 0x0b,
- 0x75, 0xf8, 0xe8, 0x20,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x44, 0x01, 0x86,
- 0x00, 0x86, 0x80, 0x04,
- 0x58, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xe8, 0x00,
- 0x34, 0x78, 0xf2, 0x0c,
- 0x42, 0x56, 0xff, 0xd8,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x58, 0x28,
- 0x6e, 0x09, 0x0c, 0x0b,
- 0x02, 0x06, 0x40, 0x15,
- 0xff, 0xc0, 0x60, 0x01,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x41, 0xc6, 0x40, 0x15,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x02, 0x0f, 0x80, 0x04,
- 0x72, 0xc1, 0x02, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0x04, 0x0e, 0xfc, 0xc4,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8c, 0x0b, 0xc0, 0x20,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xff, 0xd8, 0x32, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x25, 0xa1, 0x1b,
- 0x6f, 0x98, 0x66, 0xc8,
- 0x40, 0x06, 0x83, 0x11,
- 0x0c, 0x0c, 0xfa, 0x02,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x7a, 0x02, 0x4c, 0x06,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x98, 0x66, 0x08,
- 0x8c, 0x0b, 0x81, 0x11,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x12, 0x06, 0x00, 0x6b,
- 0x14, 0xc6, 0xe0, 0x08,
- 0x57, 0x46, 0x61, 0x14,
- 0x10, 0x86, 0xe1, 0x10,
- 0x81, 0x01, 0x61, 0x3c,
- 0x81, 0x71, 0x09, 0x95,
- 0x6c, 0x1d, 0x4c, 0x91,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x44, 0x88,
- 0x14, 0x15, 0xa1, 0x0b,
- 0x02, 0x19, 0xc0, 0x00,
- 0x8e, 0x75, 0xc0, 0x00,
- 0x68, 0x00, 0x48, 0xc8,
- 0x28, 0x14, 0x8c, 0x0b,
- 0x84, 0x18, 0xa1, 0x0b,
- 0x42, 0x0a, 0x8c, 0x95,
- 0x8c, 0x25, 0xe0, 0x84,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x00, 0x4d, 0x08,
- 0xe0, 0xc8, 0x00, 0x0a,
- 0x62, 0x38, 0x8a, 0xb5,
- 0x2c, 0x04, 0xe8, 0x1c,
- 0x83, 0x21, 0x81, 0x11,
- 0x95, 0x11, 0x00, 0x16,
- 0x68, 0x30, 0x4d, 0x88,
- 0x2c, 0x04, 0x8c, 0x0b,
- 0x80, 0x16, 0x83, 0x11,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x16, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0xa0, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0xa0, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x00, 0x41, 0x26,
- 0xe8, 0x7d, 0x82, 0x71,
- 0x0c, 0x4c, 0xee, 0x05,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x7a, 0xc8,
- 0x0e, 0x16, 0x80, 0x6b,
- 0x42, 0xc6, 0x60, 0x08,
- 0x4c, 0x71, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x86,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0x65,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x7a, 0x08,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x02, 0x16, 0x40, 0x2b,
- 0x6e, 0x58, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4f, 0x48,
- 0x4f, 0x18, 0x81, 0x95,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xd5, 0xe0, 0x84,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x78, 0x58, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x26,
- 0x60, 0x08, 0x02, 0x26,
- 0x6c, 0x78, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x76, 0x08,
- 0x00, 0x26, 0x80, 0x6b,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x45, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x46,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0xa5,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x75, 0x48,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x69, 0x68,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4a, 0x68,
- 0x4a, 0x38, 0x83, 0x75,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xe5, 0xe0, 0x84,
- 0xef, 0xec, 0x73, 0xc8,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x67, 0xe8,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x00, 0x86, 0x81, 0x71,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0xef, 0xec, 0x70, 0xe8,
- 0x60, 0x08, 0x00, 0x36,
- 0xe0, 0x04, 0x42, 0x26,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x30, 0x40, 0x68,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x52, 0xc6, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x24,
- 0x80, 0x28, 0xa4, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0xa5, 0xe0, 0x80,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x70, 0x38, 0xfe, 0x25,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x10, 0x66,
- 0x60, 0x08, 0x02, 0x66,
- 0x64, 0x58, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0x45, 0x58, 0x80, 0x95,
- 0x81, 0xe5, 0xe8, 0x30,
- 0xe8, 0x30, 0x45, 0x28,
- 0x80, 0x08, 0xa4, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x10, 0x06, 0x00, 0xe5,
- 0x69, 0x7d, 0x80, 0x00,
- 0xe0, 0x00, 0x51, 0x26,
- 0x90, 0x0b, 0x80, 0xa5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x6e, 0x18, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x76,
- 0x60, 0x08, 0x02, 0x76,
- 0x62, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xe0, 0x6c, 0x02, 0x0a,
- 0x04, 0xcd, 0x00, 0x25,
- 0x9a, 0xa5, 0x80, 0x05,
- 0x00, 0x25, 0xa5, 0x1b,
- 0x80, 0x0b, 0x0a, 0x0d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x0d, 0x40, 0x25,
- 0x98, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xa7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x15,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x15, 0x40, 0x25,
- 0x96, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa9, 0x1b,
- 0x80, 0x0b, 0x0a, 0x11,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x11, 0x40, 0x25,
- 0x94, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xab, 0x1b,
- 0x80, 0x0b, 0x0a, 0x19,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x19, 0x40, 0x25,
- 0x92, 0x05, 0x80, 0x0b,
- 0x00, 0x25, 0xad, 0x1b,
- 0x80, 0x0b, 0x0a, 0x1d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x1d, 0x40, 0x25,
- 0x8e, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xaf, 0x1b,
- 0x80, 0x0b, 0x0a, 0x21,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x21, 0x40, 0x25,
- 0x8c, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xb1, 0x1b,
- 0x80, 0x0b, 0x0a, 0x25,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x25, 0x40, 0x25,
- 0x8a, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xb3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x29,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x29, 0x40, 0x25,
- 0x88, 0x05, 0x80, 0x0b,
- 0x86, 0xc5, 0xb5, 0x1b,
- 0x00, 0x25, 0xb7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x2d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x2d, 0x40, 0x25,
- 0x84, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x09,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x09, 0x40, 0x25,
- 0x82, 0x45, 0x80, 0x0b,
- 0xfc, 0x04, 0x44, 0x10,
- 0xe0, 0x74, 0x04, 0x0a,
- 0x83, 0x21, 0x80, 0xb5,
- 0x6a, 0x31, 0x40, 0x25,
- 0x00, 0x25, 0xc0, 0x0b,
- 0x40, 0x0b, 0x6a, 0x01,
- 0x64, 0x01, 0x06, 0x00,
- 0xc6, 0x27, 0xc0, 0xba,
- 0x44, 0x86, 0x04, 0x33,
- 0x46, 0x15, 0xe0, 0x00,
- 0x42, 0x06, 0xe0, 0x34,
- 0x46, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x38,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0a, 0x05,
- 0x80, 0x00, 0x04, 0x06,
- 0x0a, 0x01, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0a, 0x05,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6b, 0x75, 0x00, 0x25,
- 0x06, 0x00, 0x40, 0x0b,
- 0xc0, 0xbb, 0x65, 0xd1,
- 0xe0, 0x00, 0x4a, 0x86,
- 0x86, 0x23, 0xc6, 0x27,
- 0x46, 0x06, 0xc8, 0x1e,
- 0x00, 0x45, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x98, 0x21, 0x4a, 0x3e,
- 0x4a, 0x4a, 0x82, 0x41,
- 0x40, 0x45, 0xe1, 0x16,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x00, 0x35, 0xa1, 0x5b,
- 0x00, 0x0b, 0x0b, 0x79,
- 0x80, 0x00, 0x08, 0x06,
- 0x0b, 0x75, 0x40, 0x45,
- 0x06, 0x30, 0x80, 0x0b,
- 0x40, 0x35, 0x84, 0x04,
- 0x00, 0x0b, 0x0b, 0x79,
- 0xf0, 0x24, 0x02, 0x0a,
- 0x02, 0x0a, 0x98, 0xa5,
- 0x88, 0xc5, 0xf0, 0x04,
- 0xf0, 0x08, 0x02, 0x0a,
- 0x02, 0x0a, 0x9a, 0x65,
- 0x8a, 0x85, 0xf0, 0x0c,
- 0xf0, 0x10, 0x02, 0x0a,
- 0x02, 0x0a, 0x9c, 0x25,
- 0x9e, 0x45, 0xf0, 0x14,
- 0xf0, 0x18, 0x02, 0x0a,
- 0x02, 0x0a, 0x8a, 0xe5,
- 0x8e, 0x05, 0xf0, 0x1c,
- 0xf0, 0x20, 0x02, 0x0a,
- 0x02, 0x0a, 0x90, 0x25,
- 0x5c, 0x08, 0xf0, 0x00,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6c, 0xbd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xbd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xe5,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xe9,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xf1,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xd5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xfd,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x01,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xdd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xdd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x05,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x09,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xc5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xed,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xcd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xcd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xf5,
- 0x00, 0x35, 0xdd, 0x93,
- 0x40, 0x0b, 0x6c, 0xd1,
- 0x60, 0x15, 0x02, 0x0a,
- 0x82, 0x31, 0xc0, 0x08,
- 0x6c, 0xd1, 0x40, 0x35,
- 0x88, 0x34, 0xc0, 0x0b,
- 0x6c, 0xf9, 0x40, 0x35,
- 0x84, 0x45, 0xc0, 0x0b,
- 0x60, 0x15, 0x02, 0x0a,
- 0x5c, 0x08, 0xc0, 0x04,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6d, 0x0d,
- 0x82, 0x11, 0x88, 0x24,
- 0x6d, 0x0d, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x15,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6d, 0x1d, 0x00, 0x35,
- 0x08, 0x00, 0x40, 0x0b,
- 0xc0, 0xbd, 0x64, 0x71,
- 0x6d, 0x25, 0x00, 0x25,
- 0xc6, 0x37, 0xc0, 0x0b,
- 0x86, 0x43, 0x02, 0x21,
- 0x6d, 0x25, 0x40, 0x25,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x42, 0x06, 0xd2, 0x1e,
- 0x48, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x10,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0d, 0x21,
- 0x80, 0x00, 0x04, 0x06,
- 0x0d, 0x1d, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0d, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0b, 0x6f, 0xa5,
- 0x8a, 0xa5, 0xa1, 0x0b,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x66, 0x8a, 0x44, 0x0a,
- 0xe0, 0x88, 0x06, 0x04,
- 0xf0, 0x8c, 0x4e, 0x62,
- 0x00, 0x20, 0x8c, 0x23,
- 0x40, 0xbd, 0x67, 0xc1,
- 0x6a, 0x38, 0xa9, 0x21,
- 0x40, 0x06, 0xef, 0x90,
- 0x4e, 0x05, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6d, 0xc9,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0x82, 0x01, 0xc0, 0x0b,
- 0x6d, 0xe9, 0x4c, 0x05,
- 0x00, 0x4a, 0x40, 0x0b,
- 0x0c, 0x05, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0d, 0xed,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0d, 0xe9, 0x4c, 0x15,
- 0x00, 0x00, 0xc0, 0x0b,
- 0x4c, 0x05, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0d, 0xed,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6e, 0xb1, 0x00, 0x25,
- 0x86, 0x3a, 0xc0, 0x0b,
- 0xf0, 0x08, 0x02, 0x4b,
- 0x18, 0x24, 0x06, 0x5a,
- 0x04, 0x1a, 0xe0, 0x8c,
- 0x00, 0xc3, 0xc4, 0x27,
- 0x58, 0x53, 0x80, 0x23,
- 0xc0, 0x17, 0x6d, 0x7d,
- 0x6d, 0x79, 0x58, 0x13,
- 0x58, 0x33, 0xc0, 0x17,
- 0xc0, 0x17, 0x6d, 0x75,
- 0x6d, 0x71, 0x58, 0x43,
- 0x42, 0x06, 0xc0, 0x17,
- 0x44, 0x15, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6e, 0x91,
- 0x6e, 0xb1, 0x00, 0x15,
- 0x82, 0x11, 0xc0, 0x0b,
- 0x6e, 0xb1, 0x40, 0x15,
- 0x02, 0x4a, 0x40, 0x0b,
- 0x00, 0x15, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0e, 0xb5,
- 0xc0, 0x00, 0x04, 0x06,
- 0x0e, 0xb1, 0x40, 0x25,
- 0x02, 0x10, 0xc0, 0x0b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0e, 0xb5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6f, 0x19, 0x00, 0x25,
- 0xc6, 0x34, 0xc0, 0x0b,
- 0x60, 0x90, 0x08, 0x24,
- 0x00, 0x43, 0xc4, 0x27,
- 0x48, 0x35, 0x80, 0x23,
- 0xc0, 0x0b, 0x6f, 0x2d,
- 0x48, 0x35, 0xc4, 0x34,
- 0xc0, 0x0b, 0x6f, 0x29,
- 0x48, 0x35, 0x86, 0x34,
- 0xc0, 0x0b, 0x6f, 0x25,
- 0x48, 0x15, 0x84, 0x14,
- 0xc0, 0x0b, 0x6f, 0x21,
- 0xfc, 0x06, 0x42, 0x06,
- 0x6e, 0xf9, 0x44, 0x15,
- 0x00, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6f, 0x19,
- 0x40, 0x15, 0x82, 0x11,
- 0x40, 0x0b, 0x6f, 0x19,
- 0xf8, 0x1c, 0x02, 0x4a,
- 0x0f, 0x1d, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x0b,
- 0x40, 0x25, 0xc0, 0x00,
- 0xc0, 0x0b, 0x0f, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0x0f, 0x1d, 0x40, 0x15,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x61, 0x4c, 0x4d, 0x06,
- 0xe1, 0x98, 0x03, 0x46,
- 0x81, 0x21, 0x18, 0x04,
- 0x6e, 0x10, 0x47, 0x86,
- 0xe1, 0x00, 0x0a, 0xc6,
- 0x03, 0x86, 0x04, 0x0c,
- 0x04, 0x2e, 0xe1, 0x98,
- 0xe1, 0x98, 0x03, 0xc6,
- 0x02, 0x86, 0x04, 0x2e,
- 0x40, 0x25, 0xe1, 0xa4,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x00, 0x00, 0x46,
- 0x04, 0x86, 0x00, 0x1e,
- 0x08, 0x3e, 0xe1, 0x00,
- 0x66, 0xa1, 0x08, 0x10,
- 0x02, 0x10, 0xc0, 0xbf,
- 0x40, 0xb9, 0x67, 0xf1,
- 0xe1, 0x00, 0x05, 0x06,
- 0x94, 0x4e, 0x98, 0x04,
- 0x76, 0xf8, 0x88, 0x1e,
- 0x18, 0x04, 0xef, 0xf0,
- 0x40, 0x71, 0xb5, 0x71,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xf4, 0x4e, 0xa8,
- 0x42, 0xc6, 0x18, 0x04,
- 0x84, 0x0e, 0xe1, 0x98,
- 0xe8, 0x2c, 0x49, 0xa8,
- 0x45, 0x86, 0x18, 0x14,
- 0x88, 0x0e, 0xe1, 0x98,
- 0x68, 0x2c, 0x49, 0x88,
- 0x42, 0x86, 0x82, 0x0b,
- 0x04, 0x0e, 0xe1, 0x98,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x94, 0x66, 0x08,
- 0x00, 0x1c, 0x81, 0x11,
- 0x50, 0x06, 0xe2, 0xc0,
- 0xc0, 0x00, 0x61, 0x99,
- 0x00, 0x46, 0x20, 0x0e,
- 0x56, 0x18, 0xe1, 0x9c,
- 0xa0, 0x04, 0xef, 0x94,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x64, 0xd8, 0x83, 0x11,
- 0x83, 0x81, 0x6f, 0x94,
- 0x43, 0x86, 0x18, 0x04,
- 0xc4, 0x80, 0x60, 0x15,
- 0x69, 0xfd, 0x40, 0x15,
- 0x03, 0x96, 0x40, 0x0b,
- 0xd9, 0x84, 0x63, 0x09,
- 0x6c, 0x1d, 0x40, 0x71,
- 0x40, 0x15, 0xc0, 0x2b,
- 0xc0, 0x0b, 0x6f, 0xa1,
- 0x6f, 0xa5, 0x40, 0x85,
- 0x40, 0x58, 0xc0, 0x0b,
- 0x98, 0x04, 0xe8, 0x00,
- 0xc1, 0xc3, 0xff, 0xd5,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x7b,
- 0x62, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x94,
- 0x09, 0x01, 0x81, 0x61,
- 0x4e, 0x01, 0xb7, 0x11,
- 0x40, 0x2b, 0x6c, 0x19,
- 0x4e, 0x11, 0x8e, 0x0b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x51, 0x18, 0x83, 0x11,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0e, 0x19, 0x82, 0xe5,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x8a, 0xf5, 0xa7, 0x1b,
- 0xef, 0xdc, 0x02, 0x86,
- 0x42, 0x0a, 0x84, 0x18,
- 0x8a, 0x25, 0xe0, 0x80,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x11, 0x88, 0xc5,
- 0x4f, 0x98, 0x8e, 0x0b,
- 0x5f, 0x78, 0xef, 0xfc,
- 0xa1, 0x0b, 0xe8, 0x08,
- 0x5f, 0x98, 0x80, 0xb5,
- 0x8e, 0x0b, 0x68, 0x08,
- 0x0e, 0x0b, 0x80, 0x6b,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0x00, 0x83, 0x11,
- 0xc0, 0xff, 0x72, 0xfd,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x5f, 0x18, 0xe0, 0x3c,
- 0xa1, 0x6b, 0xef, 0x94,
- 0x07, 0x11, 0xa4, 0xd5,
- 0x4d, 0xd8, 0x8e, 0x0b,
- 0x72, 0xf8, 0xef, 0xfc,
- 0x8e, 0x0b, 0x6f, 0xd4,
- 0x80, 0x6b, 0x11, 0xe5,
- 0x8e, 0x0b, 0x09, 0x11,
- 0xef, 0xfc, 0x4d, 0x48,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x10, 0x86, 0x92, 0xd5,
- 0xa0, 0x08, 0xef, 0xdc,
- 0xf8, 0xc0, 0x00, 0x0a,
- 0xa0, 0x08, 0x80, 0xe5,
- 0xf0, 0xc0, 0x40, 0x00,
- 0xe0, 0x80, 0x00, 0x0a,
- 0x0e, 0x0b, 0x90, 0x55,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x8e, 0x05,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x8c, 0x75, 0xa7, 0x0b,
- 0x40, 0x4a, 0xa0, 0x08,
- 0x8a, 0xe5, 0xe0, 0x8c,
- 0x8e, 0x0b, 0x1b, 0x11,
- 0xef, 0xfc, 0x4b, 0x08,
- 0x6f, 0xd8, 0x54, 0xc8,
- 0x1d, 0x11, 0x8e, 0x0b,
- 0x4a, 0x98, 0x8e, 0x0b,
- 0x7c, 0x18, 0xef, 0xfc,
- 0x8e, 0x0b, 0x68, 0x18,
- 0x64, 0xcd, 0x0e, 0x05,
- 0xe2, 0x14, 0xc0, 0x05,
- 0x86, 0xe5, 0xc2, 0x0d,
- 0xc8, 0x09, 0xa0, 0x08,
- 0x8e, 0x0b, 0x20, 0x06,
- 0xe8, 0x18, 0x7f, 0x28,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x83, 0x11, 0x40, 0x15,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x59, 0xb8, 0xe0, 0x3c,
- 0x0b, 0x11, 0xef, 0x94,
- 0x48, 0x98, 0x8e, 0x0b,
- 0x41, 0x38, 0xef, 0xfc,
- 0x81, 0x55, 0xe8, 0x0c,
- 0x8e, 0x0b, 0x1f, 0x11,
- 0xef, 0xfc, 0x48, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x58, 0xb8, 0x83, 0x11,
- 0x0e, 0x09, 0xef, 0x94,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x11, 0x11, 0x8a, 0x85,
- 0x47, 0x38, 0x8e, 0x0b,
- 0x0e, 0x05, 0xef, 0xfc,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x40, 0x06, 0x85, 0x05,
- 0x4e, 0x05, 0xfc, 0x06,
- 0x40, 0x0e, 0x60, 0xfd,
- 0x6f, 0x58, 0x8e, 0x0b,
- 0x56, 0xb8, 0xe8, 0x08,
- 0x8e, 0x0b, 0x68, 0x08,
- 0xfc, 0x06, 0x40, 0x06,
- 0x60, 0xf9, 0x0e, 0x25,
- 0x0e, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x61, 0x01, 0x4e, 0x05,
- 0x82, 0x21, 0xc0, 0x0e,
- 0x60, 0xf9, 0x4e, 0x25,
- 0x00, 0x10, 0x40, 0x0e,
- 0x4e, 0x05, 0xec, 0x04,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0xf8, 0x15, 0xa1, 0x0b,
- 0xc3, 0x13, 0xc1, 0x83,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x55, 0x58, 0x83, 0x11,
- 0x00, 0x64, 0xef, 0x94,
- 0x0c, 0x0c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x6c, 0x19, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x6e, 0x0d, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0xda, 0x00, 0x5c, 0x08,
- 0x63, 0x11, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x38,
- 0x00, 0x2b, 0x82, 0xf5,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x03, 0xc6,
- 0x44, 0x20, 0x84, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x40, 0x23,
- 0x1e, 0xf8, 0xc0, 0x15,
- 0xdd, 0x93, 0xff, 0xd4,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x83, 0x21, 0x83, 0x71,
- 0xc4, 0x19, 0x80, 0x18,
- 0x41, 0x06, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x28,
- 0x00, 0x76, 0x85, 0x11,
- 0xe1, 0x28, 0x40, 0x06,
- 0x00, 0x76, 0x80, 0x04,
- 0x7c, 0xd8, 0x8c, 0x0b,
- 0x40, 0x46, 0xe8, 0x28,
- 0xbd, 0x11, 0x61, 0x28,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x76,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x28, 0x3c, 0x28,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x86, 0x00, 0x8b,
- 0x00, 0x04, 0xe1, 0x28,
- 0x03, 0x11, 0x82, 0x7b,
- 0x56, 0x72, 0x86, 0x6b,
- 0x15, 0x46, 0x70, 0x88,
- 0x80, 0x16, 0xe1, 0x34,
- 0x40, 0x86, 0x8d, 0x25,
- 0x83, 0x11, 0x61, 0x28,
- 0x81, 0x21, 0x00, 0x04,
- 0x41, 0xc6, 0x00, 0x76,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x7a, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa1, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa5, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa5, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5e, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x8c, 0xd5, 0xa1, 0x0b,
- 0x61, 0x2c, 0x00, 0x86,
- 0x00, 0x04, 0x81, 0x11,
- 0x80, 0x04, 0x81, 0x21,
- 0x41, 0xc6, 0x18, 0x0e,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x77, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa3, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa7, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa7, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5b, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x82, 0x71, 0x08, 0x61,
- 0xe6, 0xc5, 0xd6, 0x7d,
- 0x92, 0x0b, 0x81, 0x91,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x28, 0x42, 0x46,
- 0x04, 0x14, 0x81, 0x61,
- 0x04, 0x66, 0x83, 0x21,
- 0x73, 0xf8, 0x83, 0x11,
- 0x40, 0x06, 0xe8, 0x28,
- 0x80, 0x04, 0xe1, 0x28,
- 0x41, 0x06, 0x00, 0x66,
- 0x80, 0x04, 0xe1, 0x14,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x18, 0x00, 0x15,
- 0xe0, 0x50, 0x00, 0x25,
- 0x61, 0x27, 0xe0, 0x17,
- 0x70, 0x01, 0x42, 0x10,
- 0x40, 0x25, 0xc3, 0x00,
- 0xc0, 0x09, 0x6e, 0x09,
- 0xe0, 0x50, 0x00, 0x25,
- 0xfb, 0x80, 0x04, 0x24,
- 0x04, 0x06, 0x24, 0x1f,
- 0xc3, 0xc0, 0x60, 0x01,
- 0x6e, 0x0d, 0x40, 0x15,
- 0x00, 0x15, 0xc0, 0x09,
- 0xed, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x41, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xdd, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x45, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe0, 0x58,
- 0xc0, 0x38, 0x63, 0x15,
- 0xe0, 0x58, 0x00, 0x15,
- 0x04, 0x06, 0x04, 0x1f,
- 0xc3, 0x00, 0x60, 0x01,
- 0x81, 0x21, 0x05, 0x1b,
- 0x80, 0x00, 0x02, 0x26,
- 0x03, 0x15, 0x40, 0x11,
- 0x02, 0x00, 0x00, 0x38,
- 0x83, 0x95, 0xe5, 0x70,
- 0x88, 0x21, 0x04, 0x34,
- 0xc6, 0x3b, 0xf1, 0x37,
- 0x62, 0x11, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xe1, 0x37,
- 0x62, 0x15, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xd1, 0x37,
- 0x62, 0x19, 0x42, 0x31,
- 0xc5, 0x34, 0xc0, 0x27,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x27, 0x62, 0x0d,
- 0x60, 0x61, 0x04, 0x8a,
- 0xf8, 0xb5, 0xc0, 0x01,
- 0x65, 0xd1, 0x02, 0x00,
- 0x81, 0x21, 0x40, 0x01,
- 0x46, 0x3b, 0x83, 0x75,
- 0x42, 0x31, 0x88, 0x21,
- 0xc0, 0x26, 0x6d, 0x71,
- 0xe1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x75,
- 0xd1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x79,
- 0xc6, 0x3b, 0xc5, 0x34,
- 0x6d, 0x6d, 0x42, 0x31,
- 0x04, 0x34, 0xc0, 0x26,
- 0xe0, 0x40, 0x04, 0x8a,
- 0xf1, 0x37, 0x78, 0xf5,
- 0x68, 0x01, 0x40, 0x31,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x84,
- 0x68, 0x05, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x88,
- 0x68, 0x11, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x88,
- 0x68, 0x15, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xff, 0x17, 0xe1, 0x8c,
- 0x67, 0xf1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x8c,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x67, 0xe1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe9, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x47, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xed, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe1, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x45, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xe9, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xd1, 0x17, 0xe1, 0x8c,
- 0x44, 0x20, 0x3e, 0x19,
- 0x24, 0x1f, 0xf0, 0x80,
- 0xe0, 0x04, 0x04, 0x06,
- 0x67, 0xe5, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x15, 0xe1, 0x90,
- 0xc0, 0x0a, 0x6e, 0xe9,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x40, 0x13, 0xe1, 0x17,
- 0xc0, 0x13, 0x6c, 0x29,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x6c, 0x2d, 0x40, 0x13,
- 0x00, 0x15, 0xc0, 0x13,
- 0xd1, 0x17, 0xe2, 0x00,
- 0x68, 0x65, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe2, 0x00,
- 0xc0, 0x27, 0x68, 0x69,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xf1, 0x17,
- 0xc0, 0x27, 0x68, 0x6d,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xe1, 0x17,
- 0xc0, 0x27, 0x68, 0x71,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xd1, 0x17,
- 0xc0, 0x27, 0x68, 0x75,
- 0xe2, 0x04, 0x00, 0x15,
- 0x68, 0x79, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe2, 0x08,
- 0x68, 0x7d, 0x40, 0x11,
- 0x02, 0x00, 0x40, 0x27,
- 0xc0, 0x02, 0x64, 0x31,
- 0x45, 0x34, 0x81, 0x75,
- 0xec, 0x04, 0x04, 0x20,
- 0x6c, 0x29, 0x42, 0x35,
- 0xa1, 0x2b, 0xc0, 0x09,
- 0x02, 0x00, 0xfe, 0x35,
- 0x40, 0x03, 0x64, 0x31,
- 0x81, 0xb5, 0x81, 0x21,
- 0x84, 0x21, 0x04, 0x34,
- 0x42, 0x33, 0xe1, 0x37,
- 0xc0, 0x13, 0x68, 0x59,
- 0x42, 0x33, 0xc5, 0x34,
- 0xc0, 0x13, 0x68, 0x55,
- 0xe5, 0x00, 0x04, 0x8a,
- 0x02, 0x00, 0xfc, 0x95,
- 0x40, 0x03, 0x67, 0x31,
- 0x81, 0x75, 0x89, 0x21,
- 0x04, 0x20, 0x45, 0x34,
- 0x42, 0x35, 0xec, 0x04,
- 0xc0, 0x0a, 0x6b, 0x1d,
- 0xfe, 0x35, 0xa1, 0x2b,
- 0x67, 0x71, 0x00, 0x00,
- 0x93, 0x11, 0x40, 0x03,
- 0x41, 0x24, 0x81, 0x75,
- 0xec, 0x04, 0x02, 0x10,
- 0x60, 0x3d, 0x40, 0x25,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x5d, 0x93, 0xfe, 0x35,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xef, 0x4c, 0x02, 0x29,
- 0x80, 0xb5, 0xa1, 0x2b,
- 0xef, 0x3c, 0x02, 0x29,
- 0x96, 0x25, 0xa1, 0x2b,
- 0xf9, 0x31, 0x01, 0x21,
- 0x81, 0x51, 0x07, 0x41,
- 0x58, 0x52, 0x83, 0x85,
- 0x4c, 0x52, 0x78, 0x0c,
- 0x82, 0xc3, 0xf8, 0x90,
- 0xfc, 0x18, 0x18, 0xc9,
- 0x91, 0xc1, 0x58, 0x2f,
- 0x44, 0x0a, 0x81, 0xb5,
- 0xc2, 0x27, 0x60, 0x9c,
- 0x73, 0xf9, 0x44, 0x20,
- 0x18, 0xc0, 0x40, 0x01,
- 0x44, 0x20, 0xec, 0x04,
- 0xa1, 0xcb, 0xd8, 0x74,
- 0x82, 0x51, 0xfc, 0xb5,
- 0xe1, 0x40, 0x0a, 0x0a,
- 0x07, 0x06, 0xf8, 0xf5,
- 0x04, 0x0a, 0x61, 0x38,
- 0x0c, 0x34, 0xfb, 0xfc,
- 0x9f, 0xf8, 0x05, 0x9e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x02, 0x39, 0x8c, 0x2e,
- 0x87, 0x2b, 0xef, 0x4c,
- 0x07, 0x46, 0x80, 0xf5,
- 0x8c, 0x34, 0xe1, 0x34,
- 0xaf, 0x3b, 0x8c, 0x34,
- 0x02, 0x19, 0x86, 0xf5,
- 0x83, 0x2b, 0xef, 0x3c,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xaf, 0x1b, 0x84, 0x14,
- 0x02, 0x46, 0x84, 0xb5,
- 0x0c, 0xe6, 0x61, 0x94,
- 0x86, 0x38, 0xe0, 0x08,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x84, 0x66, 0xc0, 0x2b,
- 0xf3, 0xf0, 0x46, 0x30,
- 0x06, 0x36, 0xc4, 0x39,
- 0xe0, 0x08, 0x02, 0xe6,
- 0xef, 0xe0, 0x7f, 0xe8,
- 0x82, 0x55, 0xa1, 0x0b,
- 0x00, 0x56, 0x81, 0x85,
- 0x80, 0x18, 0xe1, 0x94,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x80, 0x16, 0xc2, 0x19,
- 0x8c, 0x0b, 0x81, 0x61,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x4c, 0x38, 0xe2, 0x80,
- 0x5a, 0x98, 0xe8, 0x2c,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x45, 0xf6, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x5c, 0x38, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x63, 0x78, 0x82, 0xd5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x78, 0x08,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x6f, 0xfc, 0x64, 0x88,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xb9, 0x11, 0x00, 0x6b,
- 0x68, 0x2c, 0x4a, 0x08,
- 0xe4, 0x10, 0x0e, 0x60,
- 0x81, 0x21, 0x29, 0x11,
- 0x8e, 0x3b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x5a, 0x28,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x61, 0x58, 0x80, 0xc5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0xe0, 0x00, 0x1e, 0x08,
- 0x64, 0x20, 0x10, 0x60,
- 0x09, 0x21, 0x85, 0x11,
- 0x59, 0x38, 0x8c, 0x0b,
- 0x90, 0x3b, 0x6f, 0xfc,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xef, 0xfc, 0x60, 0x68,
- 0x1d, 0x18, 0xa1, 0x7b,
- 0x20, 0x14, 0xc0, 0x00,
- 0xe1, 0x08, 0x0e, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xd1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x14,
- 0xfa, 0x80, 0x04, 0x24,
- 0xa1, 0x39, 0x1f, 0x29,
- 0x68, 0x00, 0x5c, 0x68,
- 0x1c, 0x04, 0x89, 0x11,
- 0xe1, 0x14, 0x03, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x1a, 0xe8,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x1a, 0x78, 0xa9, 0x0b,
- 0x5a, 0x14, 0x80, 0x00,
- 0xe1, 0x44, 0x4f, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xf1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x24,
- 0xf8, 0x7c, 0x44, 0x10,
- 0x78, 0x80, 0x46, 0x30,
- 0x5a, 0x58, 0x8b, 0x11,
- 0x1c, 0x04, 0xe8, 0x00,
- 0xe1, 0x48, 0x42, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x18, 0xe8,
- 0x4f, 0x46, 0x5a, 0x14,
- 0x9c, 0x04, 0xe1, 0x44,
- 0x61, 0xa0, 0x04, 0x14,
- 0xfa, 0x80, 0x02, 0x14,
- 0x7a, 0x80, 0x04, 0x24,
- 0xf8, 0x80, 0x46, 0x10,
- 0x8b, 0x11, 0x3f, 0x29,
- 0xe8, 0x00, 0x58, 0xc8,
- 0x43, 0x06, 0x1c, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x17, 0x58, 0x83, 0x0b,
- 0x0c, 0x45, 0xc0, 0x00,
- 0x02, 0x86, 0x60, 0x10,
- 0x84, 0x04, 0xe1, 0x48,
- 0xe1, 0xe0, 0x04, 0x44,
- 0x44, 0x20, 0x00, 0x38,
- 0xc4, 0x3d, 0xfb, 0xfc,
- 0xe1, 0x47, 0x80, 0xd5,
- 0xfa, 0x80, 0x04, 0x44,
- 0x80, 0x65, 0xc5, 0x3d,
- 0x84, 0x04, 0x80, 0x26,
- 0x03, 0x86, 0x00, 0x08,
- 0x84, 0x14, 0xe1, 0x48,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x15, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb8, 0x40, 0x0a,
- 0x02, 0x46, 0x84, 0x85,
- 0xd5, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xcb, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x14, 0x48,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x02, 0x06, 0x84, 0x85,
- 0xd1, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc7, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x12, 0xe8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb0, 0x40, 0x0a,
- 0x43, 0xc6, 0x84, 0x45,
- 0x8e, 0x09, 0x61, 0x44,
- 0x88, 0x06, 0x84, 0x24,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x83, 0x0b, 0x8e, 0x19,
- 0xc0, 0x00, 0x11, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x42, 0x06, 0x84, 0x05,
- 0xc7, 0x07, 0x61, 0x08,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x14, 0x03, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x10, 0x68,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf8, 0x40, 0x0a,
- 0x02, 0xc6, 0x84, 0x45,
- 0xf1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0f, 0x28,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x03, 0x06, 0x84, 0x45,
- 0xe9, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0d, 0xe8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf0, 0x40, 0x0a,
- 0x03, 0x46, 0x84, 0x45,
- 0xe1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0c, 0xa8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x43, 0x86, 0x86, 0x25,
- 0xc9, 0x07, 0x61, 0x00,
- 0x84, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf4,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x84, 0x18, 0xc3, 0x07,
- 0xc0, 0x1f, 0xcd, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xaa, 0xc5,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x05, 0xe0, 0xb0,
- 0x61, 0x00, 0x43, 0x86,
- 0x04, 0x24, 0xc9, 0x07,
- 0x88, 0x38, 0x82, 0x09,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0xc0, 0x1f, 0xcb, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xa4, 0x85,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x25, 0xe0, 0xac,
- 0x61, 0x00, 0x43, 0x46,
- 0x04, 0x24, 0xc5, 0x07,
- 0x88, 0x38, 0x84, 0x09,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0xc3, 0x07, 0x84, 0x14,
- 0xc7, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x9e, 0x25, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa8, 0x40, 0x0a,
- 0x43, 0x46, 0x86, 0x05,
- 0xc5, 0x07, 0x61, 0x00,
- 0x82, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf8,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc5, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x96, 0xe5, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa4, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0xc5,
- 0x84, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x90, 0xe5, 0xe0, 0x84,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa0, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0x85,
- 0x82, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x0a, 0xc0, 0x1f,
- 0x8a, 0xf5, 0xe0, 0x80,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x02, 0x46, 0x86, 0x05,
- 0xeb, 0x07, 0x61, 0x04,
- 0x87, 0x31, 0x04, 0x14,
- 0x78, 0x8c, 0x46, 0x02,
- 0x84, 0x28, 0x86, 0x09,
- 0xf3, 0xf0, 0x44, 0x20,
- 0x04, 0x26, 0xa6, 0x2f,
- 0xe1, 0x14, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x86, 0x19, 0xcb, 0x17,
- 0x84, 0xb5, 0x81, 0x1b,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0x07, 0x1a, 0x14,
- 0x70, 0x01, 0x40, 0x00,
- 0x81, 0x71, 0x43, 0x00,
- 0x61, 0xc0, 0x04, 0x14,
- 0xfb, 0x80, 0x02, 0x14,
- 0x6e, 0x09, 0x4c, 0x25,
- 0xa2, 0x0f, 0x40, 0x09,
- 0x6e, 0x0d, 0x4c, 0x05,
- 0x81, 0xb5, 0xc0, 0x09,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x66, 0x40, 0x2b,
- 0x42, 0x66, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xe0, 0x5d, 0x68,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x69, 0x84, 0x08, 0x24,
- 0xe9, 0x84, 0x0a, 0x34,
- 0x18, 0x44, 0x00, 0x48,
- 0xb8, 0x5f, 0xe0, 0x84,
- 0x04, 0x25, 0xa7, 0x5b,
- 0xe9, 0x84, 0x02, 0x44,
- 0x86, 0x25, 0xa3, 0x5b,
- 0x86, 0xa5, 0xa5, 0x5b,
- 0x5c, 0x08, 0xa1, 0x5b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xa1, 0x1b, 0x80, 0x65,
- 0xa1, 0x1b, 0x84, 0x85,
- 0x81, 0x85, 0x86, 0x35,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x5c, 0x08, 0xa3, 0x1b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xc7, 0x4d, 0x82, 0x55,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xdd, 0x93, 0x80, 0x36,
- 0x82, 0x05, 0xc4, 0x4d,
- 0x80, 0xd5, 0xa1, 0x1b,
- 0xdd, 0x93, 0x80, 0x26,
- 0x80, 0x16, 0x81, 0x11,
- 0xc7, 0x4d, 0xdd, 0x93,
- 0xa3, 0x1b, 0x80, 0x65,
- 0xdd, 0x93, 0xfc, 0x45,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x98, 0x6b, 0x00, 0x8b,
- 0xef, 0xf8, 0x75, 0xc8,
- 0x67, 0xc1, 0x0e, 0x80,
- 0x43, 0x46, 0x40, 0xae,
- 0x01, 0x21, 0xe0, 0x0c,
- 0x77, 0x58, 0x90, 0x0b,
- 0x8e, 0x3b, 0x6f, 0xf8,
- 0xa1, 0x0b, 0x81, 0x91,
- 0x1c, 0x14, 0x82, 0x35,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x43, 0x4a, 0xc0, 0x3f,
- 0x12, 0x0c, 0xe4, 0x08,
- 0x98, 0x0e, 0xe2, 0x00,
- 0x0c, 0x4c, 0x9a, 0x9e,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x61, 0x98, 0x4f, 0x06,
- 0x1c, 0x6e, 0x80, 0x6b,
- 0xe1, 0x00, 0x02, 0x06,
- 0xe8, 0x28, 0x65, 0x08,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xe8, 0x00, 0x40, 0x88,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x87, 0x65,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x60, 0x08, 0x40, 0x26,
- 0x65, 0x50, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0x89,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x60,
- 0x09, 0x21, 0xc0, 0x11,
- 0x6a, 0x98, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x21,
- 0x65, 0x01, 0x02, 0x70,
- 0x29, 0x21, 0xc0, 0x89,
- 0x69, 0xf8, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x71,
- 0x65, 0x61, 0x02, 0x70,
- 0x21, 0x21, 0xc0, 0x89,
- 0x69, 0x58, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0xb1,
- 0x65, 0xa1, 0x02, 0x70,
- 0x45, 0x06, 0xc0, 0x89,
- 0x89, 0x31, 0x60, 0x18,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x18, 0x28, 0x88,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x6b,
- 0x6e, 0x05, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x16, 0x09, 0x96, 0x75,
- 0xc0, 0x04, 0x64, 0xa1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x09, 0x94, 0xa5,
- 0x40, 0x38, 0x63, 0x21,
- 0xe1, 0x9c, 0x4e, 0x0a,
- 0x00, 0x1a, 0x81, 0x81,
- 0x0b, 0x38, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x56,
- 0x4c, 0x01, 0x96, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0xb1, 0x12, 0x60,
- 0x14, 0x60, 0xc0, 0xbf,
- 0x40, 0xc0, 0x65, 0x21,
- 0x64, 0x11, 0x00, 0xb0,
- 0x02, 0xb0, 0xc0, 0x11,
- 0x40, 0x14, 0x64, 0x61,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x60, 0xc0, 0xae,
- 0x40, 0xae, 0x65, 0xa1,
- 0x65, 0xe1, 0x18, 0x70,
- 0x09, 0xbe, 0xc0, 0x1f,
- 0x64, 0xc1, 0x06, 0x60,
- 0x7e, 0xce, 0xc0, 0xad,
- 0x65, 0x21, 0x08, 0x60,
- 0x7c, 0x2e, 0xc0, 0xad,
- 0x65, 0x41, 0x0a, 0x60,
- 0x3e, 0x1e, 0xc0, 0x54,
- 0x3c, 0x0e, 0x94, 0x1b,
- 0x55, 0x38, 0x92, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xc4,
- 0x63, 0x21, 0x0c, 0x09,
- 0x4e, 0x0a, 0x40, 0x38,
- 0x00, 0x1a, 0xe1, 0x9c,
- 0x07, 0xb8, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x66,
- 0x65, 0x60, 0x06, 0x60,
- 0x4c, 0x01, 0xc0, 0xd8,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x1b, 0x92, 0x0b,
- 0x4d, 0x98, 0x8e, 0x2b,
- 0x96, 0x4b, 0x6f, 0xc0,
- 0x4e, 0x0a, 0x0d, 0xa5,
- 0x40, 0x46, 0xe1, 0x9c,
- 0x43, 0x46, 0x60, 0x08,
- 0x4c, 0x01, 0xe1, 0x4c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x04, 0xb0,
- 0x18, 0x60, 0xc0, 0x11,
- 0x40, 0xae, 0x65, 0xa1,
- 0x64, 0x01, 0x10, 0xb0,
- 0x0e, 0x60, 0xc0, 0x10,
- 0x40, 0x9f, 0x67, 0x61,
- 0x66, 0x11, 0x08, 0x60,
- 0x14, 0xb0, 0xc0, 0xad,
- 0x40, 0x13, 0x65, 0xb1,
- 0x67, 0x91, 0x12, 0xb0,
- 0x17, 0xbe, 0xc0, 0x10,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x04, 0xc0, 0xae,
- 0x66, 0xd1, 0x02, 0x60,
- 0x0f, 0xbe, 0xc0, 0x54,
- 0x64, 0x51, 0x06, 0x60,
- 0x19, 0xbe, 0xc0, 0x9e,
- 0x0d, 0x9e, 0x8e, 0xbb,
- 0x66, 0x71, 0x0a, 0x60,
- 0x8b, 0x8e, 0xc0, 0xa2,
- 0xfe, 0xce, 0x89, 0xae,
- 0x18, 0x60, 0x13, 0xce,
- 0xc0, 0xa3, 0x64, 0xa1,
- 0x08, 0x60, 0x7c, 0x4e,
- 0xc0, 0x6c, 0x67, 0x01,
- 0x96, 0x4b, 0x3e, 0x4e,
- 0xbc, 0xce, 0x9b, 0x8e,
- 0x9d, 0x2e, 0x95, 0x1e,
- 0xef, 0xb8, 0x49, 0x88,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x40, 0x56, 0x88, 0x75,
- 0x0a, 0x60, 0x60, 0x08,
- 0xc0, 0xa1, 0x64, 0x70,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x41, 0x46, 0x40, 0x2b,
- 0x17, 0x34, 0xe1, 0x4c,
- 0x99, 0x24, 0x96, 0x4b,
- 0x02, 0x30, 0x80, 0x04,
- 0x40, 0x14, 0x64, 0x61,
- 0x65, 0xe1, 0x0e, 0x30,
- 0x89, 0x2e, 0xc0, 0x1f,
- 0xfc, 0x1e, 0xfe, 0x7e,
- 0x9b, 0x24, 0x9d, 0x14,
- 0x86, 0x1b, 0x3e, 0x1e,
- 0x92, 0x3b, 0x3c, 0xae,
- 0xef, 0xb4, 0x4e, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0xa1, 0x8b, 0x8a, 0x45,
- 0x6e, 0x89, 0x0c, 0x05,
- 0x10, 0x56, 0x40, 0x0a,
- 0x0c, 0x15, 0xc0, 0x0c,
- 0xc0, 0x0a, 0x6e, 0x8d,
- 0x6e, 0x91, 0x0c, 0x25,
- 0x0c, 0x35, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x6e, 0x95,
- 0x69, 0x3d, 0x4c, 0x03,
- 0x40, 0x60, 0x40, 0x0a,
- 0x4c, 0x13, 0xdc, 0x00,
- 0x40, 0x0a, 0x69, 0x41,
- 0xc0, 0x0c, 0x02, 0x56,
- 0x69, 0x45, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x49,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x44, 0x78, 0xc0, 0x2b,
- 0x10, 0x0b, 0xcf, 0xe0,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x60, 0x08, 0x42, 0x66,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x02, 0x60, 0x40, 0x2b,
- 0xc0, 0xb6, 0x67, 0x01,
- 0x0a, 0x60, 0x19, 0x24,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x9b, 0x34, 0x80, 0x04,
- 0x8e, 0x2b, 0x7c, 0x2e,
- 0x95, 0x14, 0xbe, 0x1e,
- 0xbc, 0x1e, 0x93, 0x44,
- 0x69, 0x58, 0x9d, 0x14,
- 0x17, 0xb4, 0xef, 0xb4,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x9f, 0xfc, 0x30, 0x18,
- 0x4e, 0x0a, 0x77, 0xa5,
- 0xc1, 0xc3, 0xe9, 0x9c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x8b,
- 0x00, 0x8e, 0xe1, 0x98,
- 0xe1, 0x00, 0x02, 0x06,
- 0x68, 0x28, 0x4f, 0x28,
- 0x01, 0x91, 0x90, 0x0b,
- 0xe6, 0xd4, 0x54, 0x06,
- 0x83, 0x61, 0x17, 0xb1,
- 0x81, 0x71, 0x09, 0xc5,
- 0x6e, 0x19, 0x10, 0x1b,
- 0x00, 0x64, 0x40, 0x15,
- 0x80, 0x1f, 0xe8, 0xa4,
- 0x90, 0x05, 0xa1, 0x1b,
- 0xe1, 0x34, 0x43, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x80, 0xa5, 0xa1, 0x2b,
- 0x80, 0x1f, 0x84, 0x18,
- 0x8c, 0xc5, 0xa1, 0x1b,
- 0xf0, 0xa4, 0x4c, 0x82,
- 0x68, 0x81, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x1b,
- 0x41, 0x06, 0x63, 0xfc,
- 0x80, 0x14, 0xe1, 0x98,
- 0x04, 0x94, 0x80, 0xe5,
- 0x90, 0x0b, 0x7a, 0x80,
- 0xe8, 0x00, 0x43, 0x28,
- 0x68, 0x18, 0x81, 0x45,
- 0x90, 0x0b, 0x6f, 0xfc,
- 0x68, 0x81, 0x0c, 0x09,
- 0x06, 0x06, 0x40, 0x1b,
- 0x0c, 0x14, 0xe1, 0x38,
- 0xec, 0x04, 0x04, 0xb0,
- 0x00, 0x0a, 0x83, 0x61,
- 0x10, 0x05, 0xe3, 0xfc,
- 0x10, 0x09, 0xdc, 0x28,
- 0x00, 0x27, 0x07, 0xe5,
- 0x50, 0x05, 0xa1, 0x7b,
- 0xc0, 0x0a, 0x6e, 0x69,
- 0x82, 0x55, 0x84, 0x2c,
- 0xe1, 0x98, 0x41, 0x06,
- 0x90, 0x0b, 0x00, 0x14,
- 0xef, 0xfc, 0x69, 0x88,
- 0x61, 0x38, 0x06, 0x06,
- 0x8c, 0x04, 0x80, 0x7b,
- 0x02, 0x91, 0x80, 0xbc,
- 0x84, 0xb1, 0x88, 0xa1,
- 0xe0, 0x40, 0x12, 0x0a,
- 0x8e, 0x0b, 0xec, 0x95,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x60, 0x08, 0x40, 0x36,
- 0x50, 0x01, 0x84, 0x6b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x70,
- 0x02, 0x80, 0xc0, 0x11,
- 0x40, 0x6d, 0x65, 0x71,
- 0x4f, 0xb8, 0x89, 0x21,
- 0x81, 0x31, 0x68, 0x18,
- 0x64, 0x21, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6d, 0x65, 0x21,
- 0x81, 0x31, 0x29, 0x21,
- 0xe8, 0x18, 0x4f, 0x08,
- 0x60, 0x88, 0x00, 0x64,
- 0x65, 0x80, 0x02, 0x80,
- 0x02, 0x25, 0xc0, 0x6d,
- 0x82, 0x03, 0x7c, 0x00,
- 0x89, 0x31, 0x0c, 0x13,
- 0x61, 0x1d, 0x4e, 0x25,
- 0x00, 0x25, 0xc0, 0x01,
- 0x4e, 0x25, 0xe0, 0x40,
- 0x40, 0x01, 0x61, 0x21,
- 0xe0, 0x18, 0x45, 0x06,
- 0xe0, 0x80, 0x00, 0x05,
- 0x61, 0x25, 0x4e, 0x05,
- 0x02, 0x09, 0xc0, 0x01,
- 0x4e, 0x01, 0xe3, 0x00,
- 0xc0, 0x04, 0x64, 0xa1,
- 0x63, 0x40, 0x02, 0x09,
- 0xe0, 0x18, 0x43, 0x06,
- 0xe6, 0x86, 0x42, 0x6a,
- 0x64, 0xa5, 0x4e, 0x01,
- 0x82, 0x83, 0x40, 0x04,
- 0x64, 0xb1, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6e, 0x65, 0x01,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x18, 0x0b, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x15, 0xc6, 0x00, 0x6b,
- 0x10, 0x60, 0xe1, 0xa0,
- 0x40, 0x54, 0x66, 0xd1,
- 0x65, 0x41, 0x12, 0x60,
- 0x28, 0x6e, 0xc0, 0x54,
- 0x67, 0x61, 0x0e, 0x60,
- 0x10, 0x0b, 0xc0, 0xae,
- 0x0c, 0x2b, 0x92, 0x1b,
- 0x6a, 0x38, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x28, 0x24, 0x84, 0x55,
- 0x12, 0x1b, 0x90, 0x0b,
- 0x6c, 0x18, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x00, 0x00, 0x14, 0x25,
- 0x9c, 0x00, 0x40, 0x80,
- 0x1c, 0x00, 0x42, 0x90,
- 0x9c, 0x00, 0x46, 0x70,
- 0x8f, 0xcc, 0x68, 0xe8,
- 0x6e, 0x89, 0x0c, 0x15,
- 0xa1, 0x0b, 0x40, 0x0a,
- 0x6e, 0x8d, 0x0c, 0x25,
- 0x0e, 0x06, 0x40, 0x0a,
- 0x0c, 0x35, 0x80, 0x00,
- 0xc0, 0x0a, 0x6e, 0x91,
- 0x6e, 0x95, 0x0c, 0x45,
- 0x4c, 0x13, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x3d,
- 0x69, 0x41, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x45,
- 0x69, 0x49, 0x4c, 0x43,
- 0x82, 0x65, 0xc0, 0x0a,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xdc, 0x71, 0xe8,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x61, 0x41, 0x00, 0x19,
- 0x15, 0xc6, 0x40, 0x15,
- 0x00, 0x29, 0xe0, 0x10,
- 0x40, 0x15, 0x61, 0x45,
- 0x42, 0x2a, 0x81, 0xb1,
- 0x00, 0x29, 0xe6, 0x86,
- 0xc0, 0x15, 0x62, 0x11,
- 0xfa, 0x80, 0x02, 0x14,
- 0x04, 0x00, 0x0b, 0x2e,
- 0xc0, 0x66, 0x66, 0x49,
- 0x04, 0x00, 0x7e, 0x2e,
- 0xc0, 0x58, 0x66, 0x51,
- 0x04, 0x00, 0x7c, 0x2e,
- 0xc0, 0x6b, 0x66, 0x45,
- 0x97, 0xc5, 0xbe, 0x2e,
- 0xf0, 0x8c, 0x44, 0x02,
- 0x6f, 0x41, 0x04, 0x79,
- 0xe5, 0x7d, 0xc0, 0x15,
- 0x8b, 0x24, 0x82, 0xd5,
- 0xe6, 0x8a, 0x48, 0x3a,
- 0xf0, 0x90, 0x44, 0x02,
- 0x6e, 0x41, 0x04, 0x29,
- 0xf0, 0x2d, 0xc0, 0x1a,
- 0x54, 0x4a, 0x80, 0xd5,
- 0x80, 0x75, 0xe4, 0x88,
- 0x82, 0xb1, 0x15, 0x75,
- 0x69, 0x91, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x2b,
- 0x40, 0x88, 0x04, 0x44,
- 0xc0, 0x00, 0x0a, 0x16,
- 0xd0, 0x80, 0x44, 0x22,
- 0x08, 0x91, 0x04, 0x95,
- 0x86, 0xb5, 0xc0, 0x05,
- 0x60, 0x84, 0x04, 0x44,
- 0x80, 0x23, 0x83, 0x51,
- 0x6d, 0x21, 0x04, 0x63,
- 0x04, 0x54, 0xc0, 0x0c,
- 0xcf, 0x2d, 0xfa, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x90, 0x80, 0x48, 0x42,
- 0x08, 0x91, 0x08, 0x95,
- 0x88, 0x05, 0x80, 0x05,
- 0x82, 0x51, 0x08, 0x23,
- 0x80, 0x23, 0xc2, 0x27,
- 0x6d, 0x21, 0x04, 0x23,
- 0x8d, 0x2d, 0xc0, 0x0c,
- 0xfb, 0x55, 0xfa, 0xa5,
- 0xfa, 0x80, 0x04, 0x54,
- 0x08, 0x44, 0xcf, 0x2d,
- 0x48, 0x42, 0x80, 0x84,
- 0x08, 0x6b, 0x90, 0x80,
- 0x80, 0x0c, 0x0d, 0x21,
- 0x08, 0x23, 0x82, 0x65,
- 0xc4, 0x27, 0x82, 0x51,
- 0x04, 0x25, 0x80, 0x23,
- 0xc0, 0x05, 0x68, 0x91,
- 0xfa, 0xa5, 0xd2, 0x2d,
- 0x0b, 0x24, 0xf9, 0x05,
- 0xfc, 0xc4, 0xd5, 0x97,
- 0x4a, 0x2a, 0x89, 0x9e,
- 0xfe, 0x24, 0xe6, 0x8e,
- 0x60, 0x84, 0x06, 0x54,
- 0xe0, 0x88, 0x08, 0x54,
- 0x98, 0x43, 0x3e, 0xc4,
- 0x04, 0x64, 0x04, 0x33,
- 0xfb, 0x27, 0xfb, 0x00,
- 0x98, 0x53, 0x06, 0x29,
- 0x10, 0x64, 0x84, 0x63,
- 0x83, 0x61, 0x7b, 0x00,
- 0x85, 0x87, 0x09, 0xc5,
- 0xf0, 0x2d, 0x94, 0x28,
- 0x54, 0x4a, 0x80, 0x95,
- 0x90, 0x25, 0xe4, 0x88,
- 0x18, 0x24, 0x8c, 0x22,
- 0x86, 0xc9, 0xe1, 0xf4,
- 0x04, 0x24, 0x98, 0x23,
- 0x85, 0x27, 0xfb, 0x00,
- 0x58, 0x22, 0x10, 0x24,
- 0x12, 0xc0, 0xf1, 0xa0,
- 0x13, 0x0a, 0xed, 0xb0,
- 0xc0, 0x04, 0x64, 0x75,
- 0xd5, 0x27, 0x02, 0xe5,
- 0x6d, 0x40, 0x18, 0xc0,
- 0xe0, 0x04, 0x52, 0x46,
- 0x60, 0xa6, 0x58, 0xca,
- 0x89, 0x94, 0x82, 0x21,
- 0xec, 0x08, 0x18, 0xc0,
- 0xe0, 0x0a, 0x44, 0x9a,
- 0x09, 0x94, 0x83, 0xd5,
- 0x19, 0x0a, 0x82, 0x21,
- 0xc0, 0x02, 0x60, 0x45,
- 0x60, 0x0a, 0x44, 0x9a,
- 0xc0, 0x00, 0x13, 0xe6,
- 0x40, 0x26, 0x58, 0xca,
- 0xc0, 0x04, 0x13, 0x06,
- 0x58, 0x92, 0x02, 0xf5,
- 0x9f, 0x91, 0xd1, 0xb0,
- 0x66, 0xa6, 0x58, 0xca,
- 0xe0, 0x04, 0x52, 0x46,
- 0x6e, 0xc1, 0x18, 0xc0,
- 0x58, 0xca, 0xc0, 0x04,
- 0x18, 0xc0, 0xe0, 0xa6,
- 0xd8, 0x2d, 0xec, 0x14,
- 0xc0, 0x00, 0x04, 0xd6,
- 0xc0, 0x00, 0x4a, 0x21,
- 0x84, 0x31, 0x02, 0x61,
- 0x82, 0x51, 0x08, 0x41,
- 0xec, 0xb5, 0xcf, 0x6d,
- 0x06, 0xb4, 0xeb, 0xa5,
- 0xc3, 0x3d, 0xfa, 0x80,
- 0x01, 0x01, 0xd0, 0x55,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x00, 0x19, 0x94, 0x15,
- 0xc0, 0x38, 0x64, 0xd1,
- 0x92, 0x75, 0xa1, 0x1b,
- 0x61, 0x41, 0x00, 0x19,
- 0x81, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x89, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x11, 0x00, 0x19,
- 0x07, 0x95, 0xc0, 0x15,
- 0xfa, 0x80, 0x04, 0x24,
- 0x70, 0xb0, 0x4a, 0x02,
- 0xe6, 0x86, 0x58, 0xca,
- 0x67, 0x41, 0x0a, 0x50,
- 0x81, 0x61, 0x40, 0x57,
- 0x98, 0x83, 0x85, 0x85,
- 0xf0, 0xa0, 0x4e, 0x02,
- 0x6e, 0x41, 0x0e, 0x99,
- 0xab, 0x9b, 0xc0, 0x1a,
- 0xc2, 0x87, 0x86, 0xf5,
- 0x10, 0x83, 0x80, 0x83,
- 0xc0, 0x0c, 0x6d, 0x21,
- 0xe1, 0xf4, 0x12, 0x84,
- 0x00, 0x93, 0x86, 0x99,
- 0x40, 0x1c, 0x62, 0x6d,
- 0x10, 0x84, 0x92, 0x83,
- 0x85, 0x87, 0xfb, 0x00,
- 0x82, 0xd5, 0x92, 0x8d,
- 0x6a, 0x41, 0x0e, 0x89,
- 0x00, 0x99, 0xc0, 0x1a,
- 0xc0, 0x38, 0x64, 0xd5,
- 0xd2, 0x8d, 0xc3, 0x87,
- 0x06, 0x41, 0x0e, 0x70,
- 0x4e, 0x41, 0x80, 0x6b,
- 0x82, 0x61, 0x80, 0x00,
- 0x10, 0x64, 0x14, 0x78,
- 0xcf, 0x8d, 0xfa, 0x80,
- 0x82, 0x31, 0xf4, 0xb5,
- 0xfa, 0x80, 0x18, 0x34,
- 0xf0, 0xf5, 0xc5, 0xcd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0xfb, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x81, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x62, 0x11, 0x00, 0x29,
- 0x09, 0xf5, 0xc0, 0x15,
- 0xfa, 0x80, 0x02, 0x14,
- 0x66, 0x8a, 0x4a, 0x7a,
- 0x66, 0x40, 0x0c, 0x00,
- 0x58, 0x62, 0xc0, 0x58,
- 0x18, 0xc9, 0xf0, 0x94,
- 0xc0, 0x04, 0x6c, 0x01,
- 0x18, 0x06, 0x2b, 0xcb,
- 0x86, 0x75, 0xe0, 0x80,
- 0x0e, 0x79, 0x80, 0x73,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x84, 0xa5, 0xa1, 0x7b,
- 0xe0, 0x84, 0x18, 0x54,
- 0x81, 0xc1, 0x18, 0x63,
- 0x6c, 0x01, 0x0c, 0x63,
- 0x87, 0x6d, 0xc0, 0x01,
- 0x0c, 0xc4, 0x80, 0xc5,
- 0x8c, 0xc3, 0xe1, 0xfc,
- 0x83, 0xc7, 0x01, 0xf5,
- 0x60, 0x0d, 0x0d, 0x0a,
- 0x59, 0xf6, 0x40, 0x20,
- 0x82, 0xc5, 0xe0, 0x7c,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xf9, 0x67,
- 0x18, 0xc0, 0x89, 0xc7,
- 0x00, 0x53, 0xe5, 0xc8,
- 0x4a, 0xc1, 0x82, 0x41,
- 0xc0, 0x1a, 0x62, 0x41,
- 0x18, 0x64, 0x83, 0x85,
- 0x0d, 0x0a, 0x61, 0xf4,
- 0xc0, 0x03, 0x60, 0x7c,
- 0x8c, 0xc3, 0x86, 0xc9,
- 0xfb, 0x00, 0x18, 0xc4,
- 0x85, 0xc7, 0x76, 0xe5,
- 0x61, 0x7d, 0x0d, 0x0a,
- 0xf8, 0xb5, 0xc0, 0x09,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xfb, 0x67,
- 0x7d, 0x65, 0x87, 0xc7,
- 0xe5, 0x30, 0x18, 0xc0,
- 0xfa, 0x80, 0x0e, 0x44,
- 0xec, 0x35, 0xc3, 0x7d,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x51, 0x06, 0x00, 0x6b,
- 0x20, 0x6e, 0xe1, 0x98,
- 0x67, 0x01, 0x12, 0x60,
- 0x03, 0x15, 0xc0, 0x94,
- 0x0c, 0x0b, 0x81, 0x71,
- 0xc0, 0x16, 0x66, 0x35,
- 0x60, 0x80, 0x40, 0x4a,
- 0xe0, 0x10, 0x00, 0x06,
- 0x5c, 0x00, 0x40, 0x60,
- 0xdc, 0x00, 0x42, 0x70,
- 0xcf, 0xdc, 0x42, 0xa8,
- 0x82, 0x71, 0x65, 0x0e,
- 0xe2, 0x30, 0x0e, 0x0a,
- 0x20, 0x14, 0xfa, 0xf5,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x81, 0x15, 0xf2, 0x9c,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x00, 0x06, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x64, 0x81, 0x0e, 0x60,
- 0x18, 0x60, 0x40, 0x99,
- 0xc0, 0x8b, 0x64, 0x61,
- 0x04, 0x60, 0x3e, 0x7e,
- 0xc0, 0xae, 0x66, 0xa1,
- 0x06, 0x60, 0x00, 0x04,
- 0xc0, 0x9f, 0x67, 0x61,
- 0x65, 0x21, 0x08, 0x60,
- 0x0a, 0x60, 0x40, 0xa2,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x62, 0x18, 0xbc, 0xce,
- 0xa1, 0x0b, 0xef, 0xc8,
- 0x0e, 0x06, 0x02, 0xa5,
- 0x0c, 0x29, 0x80, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x0e, 0x56,
- 0x60, 0x0c, 0x02, 0x56,
- 0x52, 0x18, 0x8c, 0x0b,
- 0x0e, 0x0b, 0xef, 0xdc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xf0, 0x59, 0x28,
- 0x81, 0x71, 0x81, 0x11,
- 0x60, 0x04, 0x47, 0xc6,
- 0x10, 0x05, 0x80, 0x6b,
- 0x40, 0x09, 0x6e, 0x0d,
- 0x65, 0x61, 0x04, 0x80,
- 0x10, 0x15, 0xc0, 0xad,
- 0xc0, 0x0a, 0x6d, 0x49,
- 0x6c, 0x1d, 0x50, 0x31,
- 0x5c, 0x58, 0xc0, 0x2b,
- 0x80, 0x9b, 0xef, 0xc4,
- 0x82, 0xc5, 0xa1, 0x9b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x90, 0x0b, 0x40, 0x2b,
- 0x6f, 0xdc, 0x4f, 0x28,
- 0x03, 0x11, 0x92, 0x1b,
- 0x57, 0x18, 0x8c, 0x0b,
- 0x15, 0x75, 0xef, 0xf0,
- 0x7c, 0x6e, 0x92, 0x7b,
- 0xe1, 0x04, 0x01, 0x46,
- 0x6d, 0x59, 0x10, 0x15,
- 0x80, 0x04, 0xc0, 0x0a,
- 0x10, 0x05, 0x80, 0x1e,
- 0xc0, 0x0a, 0x6d, 0x59,
- 0x6e, 0x0d, 0x10, 0x15,
- 0x5b, 0xf8, 0xc0, 0x09,
- 0x00, 0x00, 0xef, 0xc4,
- 0xc0, 0x80, 0x64, 0x01,
- 0xe1, 0xc0, 0x12, 0x04,
- 0x6f, 0xcc, 0x64, 0x88,
- 0x10, 0x0b, 0x92, 0x0b,
- 0x6b, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x65, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x68, 0x98, 0x92, 0x1b,
- 0x01, 0x46, 0xef, 0xcc,
- 0x02, 0x86, 0x61, 0x18,
- 0x80, 0x04, 0xe1, 0x18,
- 0x84, 0x24, 0x80, 0x08,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x04, 0x03, 0x86,
- 0x10, 0x2b, 0x80, 0x08,
- 0xc0, 0x16, 0x67, 0x39,
- 0x50, 0x01, 0x84, 0x14,
- 0x40, 0x2b, 0x65, 0x7d,
- 0xe1, 0x04, 0x01, 0xc6,
- 0x83, 0x21, 0x04, 0x2c,
- 0x67, 0x3d, 0x10, 0x1b,
- 0x80, 0x04, 0xc0, 0x16,
- 0x41, 0xc6, 0x00, 0x1c,
- 0x80, 0x04, 0xe1, 0x00,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x04,
- 0xd0, 0x19, 0x80, 0x18,
- 0x90, 0x0b, 0x00, 0x16,
- 0x60, 0xcd, 0x10, 0x15,
- 0x63, 0xf8, 0xc0, 0x0e,
- 0x10, 0x09, 0xe8, 0x20,
- 0x40, 0x38, 0x63, 0x15,
- 0xe1, 0x04, 0x14, 0x06,
- 0xa5, 0x0b, 0x83, 0x21,
- 0x0e, 0x91, 0x10, 0x19,
- 0x41, 0x06, 0x40, 0x2c,
- 0x00, 0x05, 0xc1, 0x10,
- 0x40, 0x11, 0xc0, 0x00,
- 0x89, 0x11, 0x40, 0x00,
- 0x00, 0x16, 0xa8, 0x04,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd1,
- 0xe8, 0x20, 0x62, 0x68,
- 0x8f, 0x61, 0x28, 0x04,
- 0x00, 0x66, 0x83, 0x21,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd5,
- 0xe8, 0x20, 0x61, 0xc8,
- 0x16, 0x76, 0x28, 0x04,
- 0x00, 0xb6, 0xe0, 0x04,
- 0x4c, 0x58, 0x90, 0x0b,
- 0x50, 0x75, 0xe8, 0x00,
- 0x40, 0x0e, 0x60, 0xed,
- 0x50, 0x75, 0xa1, 0x0b,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0x60, 0xf1, 0x50, 0x75,
- 0x88, 0x85, 0xc0, 0x0e,
- 0x03, 0x46, 0xfc, 0x64,
- 0x01, 0x86, 0xe1, 0x18,
- 0x83, 0xa1, 0x61, 0x18,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x08, 0x84, 0x04,
- 0x40, 0x9a, 0x82, 0x01,
- 0x50, 0x03, 0xe0, 0x02,
- 0xc0, 0x15, 0x6e, 0x01,
- 0xef, 0xe0, 0x4d, 0x68,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0xa6, 0x80, 0x04,
- 0xe8, 0x20, 0x66, 0x08,
- 0xef, 0xcc, 0x4f, 0x08,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xf0, 0x4c, 0xa8,
- 0x98, 0xf1, 0x0e, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x10, 0x15, 0xdd, 0x93,
- 0xc0, 0x0e, 0x60, 0xe5,
- 0x60, 0xdd, 0x10, 0x05,
- 0x82, 0x11, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x15,
- 0xa1, 0x0b, 0x40, 0x0e,
- 0x50, 0x15, 0x83, 0x11,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x60, 0xf1, 0x50, 0x15,
- 0x96, 0x85, 0xc0, 0x0e,
- 0x83, 0x91, 0x3e, 0x9e,
- 0xa8, 0x04, 0x89, 0x05,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x83, 0x21, 0x00, 0x26,
- 0x60, 0xd1, 0x10, 0x15,
- 0x90, 0x0b, 0x40, 0x0e,
- 0xe8, 0x20, 0x5b, 0x48,
- 0x83, 0x21, 0x28, 0x04,
- 0x90, 0x0b, 0x00, 0x66,
- 0x60, 0xd5, 0x10, 0x15,
- 0x5a, 0xb8, 0xc0, 0x0e,
- 0xa8, 0x04, 0xe8, 0x20,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xe8, 0x00, 0x45, 0x68,
- 0x90, 0x15, 0xa1, 0x0b,
- 0x60, 0xe5, 0x10, 0x05,
- 0x82, 0x91, 0x40, 0x0e,
- 0x60, 0xed, 0x10, 0x15,
- 0x82, 0x01, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x05,
- 0x82, 0x11, 0x40, 0x0e,
- 0x60, 0xdd, 0x10, 0x05,
- 0x50, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x89, 0x21, 0x02, 0x01,
- 0xee, 0xd5, 0xc1, 0x9d,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0x36, 0x40, 0x2b,
- 0x7e, 0x18, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xd8,
- 0xe0, 0x08, 0x0e, 0x36,
- 0x83, 0x11, 0x00, 0xab,
- 0x45, 0xd8, 0xfc, 0x04,
- 0x21, 0xab, 0xef, 0xf0,
- 0x3e, 0x94, 0x80, 0x6b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x10, 0x29, 0xef, 0x15,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x02, 0x36,
- 0x6f, 0xd8, 0x7c, 0xc8,
- 0x0e, 0x36, 0x90, 0x0b,
- 0x00, 0xab, 0xe0, 0x08,
- 0xfc, 0x04, 0x83, 0x11,
- 0xef, 0xf0, 0x44, 0x88,
- 0x80, 0x6b, 0x21, 0xab,
- 0x0e, 0x06, 0x6b, 0xf5,
- 0x10, 0x05, 0x80, 0x00,
- 0x40, 0x0e, 0x61, 0x05,
- 0xe1, 0x18, 0x03, 0x46,
- 0x60, 0xe1, 0x50, 0x95,
- 0x50, 0x95, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0xd3, 0x0d, 0x7c, 0x64,
- 0x01, 0x05, 0x50, 0x95,
- 0xbe, 0x94, 0xc0, 0x0e,
- 0xc1, 0xc3, 0xe9, 0xd5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x60, 0xd9, 0x00, 0x15,
- 0x81, 0x21, 0x40, 0x0e,
- 0x68, 0x20, 0x54, 0xa8,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x00, 0xc5, 0xe0, 0x90,
- 0x80, 0x00, 0x0c, 0x16,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x8c, 0x0b, 0xfc, 0xe5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xf0, 0x40, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x01, 0x86, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x12, 0x86, 0x40, 0x2b,
- 0x80, 0x86, 0xe1, 0x3c,
- 0x6e, 0x0d, 0x0c, 0x05,
- 0xa4, 0x14, 0xc0, 0x09,
- 0x82, 0x01, 0xd9, 0x07,
- 0x6e, 0x01, 0x4c, 0x03,
- 0x84, 0x08, 0xc0, 0x15,
- 0xf3, 0x7c, 0x40, 0x00,
- 0x00, 0x06, 0x04, 0x06,
- 0x80, 0x14, 0xe1, 0x04,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x80, 0x14,
- 0xf2, 0xfc, 0x44, 0x20,
- 0x80, 0x14, 0x84, 0x26,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xf4,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x00,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x04, 0x00, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x7d, 0xb8, 0x80, 0x16,
- 0xa4, 0x04, 0xef, 0xdc,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x94,
- 0xef, 0xc8, 0x7e, 0x68,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xec, 0x7c, 0x08,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0x86, 0x80, 0x04,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x43, 0x26, 0x00, 0x6b,
- 0x0c, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x0c, 0x09, 0xe0, 0x84,
- 0xc0, 0x2b, 0x05, 0xa9,
- 0x43, 0x06, 0x8c, 0x95,
- 0x84, 0x18, 0xef, 0xdc,
- 0x80, 0xb5, 0xa3, 0x1b,
- 0x66, 0xe9, 0x0c, 0x09,
- 0x85, 0xb5, 0xc0, 0x26,
- 0xf7, 0x00, 0x00, 0x8a,
- 0x0c, 0x19, 0x80, 0xd5,
- 0xc0, 0x26, 0x66, 0xed,
- 0xfc, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0c, 0x19, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x82, 0x0d, 0xff, 0x11,
- 0x0c, 0x19, 0x82, 0x15,
- 0xc0, 0x26, 0x66, 0xed,
- 0x04, 0x65, 0xa1, 0x1b,
- 0x80, 0x00, 0x40, 0x46,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x09,
- 0x02, 0x60, 0x00, 0x2b,
- 0x80, 0xad, 0x05, 0xb1,
- 0x04, 0x41, 0x02, 0x60,
- 0x84, 0x18, 0xc0, 0x9e,
- 0x08, 0x45, 0x0c, 0x09,
- 0x82, 0x03, 0xc0, 0x27,
- 0xe1, 0x00, 0x42, 0x86,
- 0x84, 0x06, 0x84, 0x14,
- 0xa1, 0x0b, 0x84, 0x08,
- 0x84, 0x08, 0x80, 0xa5,
- 0xe5, 0x04, 0x00, 0x8a,
- 0x40, 0x46, 0x80, 0x95,
- 0x84, 0x06, 0xe0, 0x00,
- 0x61, 0x00, 0x4e, 0x46,
- 0x9c, 0x04, 0x83, 0x21,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x9c, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0x47, 0x98, 0x87, 0x11,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x83, 0x21, 0x1c, 0x04,
- 0xc4, 0x19, 0x80, 0x18,
- 0x99, 0x11, 0x00, 0x16,
- 0x68, 0x20, 0x47, 0x08,
- 0x9c, 0x04, 0x8c, 0x0b,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x4c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x41, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x46, 0x00, 0x7b,
- 0x45, 0x98, 0xe0, 0x04,
- 0x81, 0x21, 0x68, 0x20,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0x25, 0xe0, 0x98,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x0e, 0x29, 0xfe, 0x25,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0c, 0x86,
- 0x60, 0x08, 0x02, 0x86,
- 0x69, 0x98, 0x8e, 0x0b,
- 0xa3, 0x0b, 0xef, 0xd8,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xe8, 0x20, 0x4a, 0x88,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x01, 0x61,
- 0x57, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x88,
- 0xe1, 0x44, 0x41, 0xc6,
- 0x80, 0x66, 0x80, 0x04,
- 0xef, 0xdc, 0x6e, 0xa8,
- 0xef, 0xdc, 0x71, 0x48,
- 0xef, 0xdc, 0x73, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x56, 0xd8, 0x83, 0x11,
- 0x0c, 0x0c, 0xef, 0x88,
- 0x33, 0x58, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xc8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xc6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6d, 0x49, 0x0c, 0x05,
- 0x4c, 0x05, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x85,
- 0x66, 0x85, 0x0c, 0x05,
- 0x77, 0x78, 0xc0, 0x0b,
- 0x00, 0x04, 0xef, 0xc0,
- 0x4c, 0x05, 0xfb, 0x80,
- 0xc0, 0x0b, 0x66, 0x89,
- 0x65, 0x39, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x65, 0x3d, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x39,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xd6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x05, 0x91, 0x11,
- 0xc0, 0x08, 0x69, 0x59,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2b, 0x65, 0xcd,
- 0xef, 0xc0, 0x72, 0xa8,
- 0x6a, 0x05, 0x4c, 0x01,
- 0x0c, 0x05, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x63, 0x7d,
- 0x66, 0x7d, 0x4c, 0x05,
- 0x0c, 0x0c, 0xc0, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xc4, 0x17, 0x00, 0x6b,
- 0x60, 0x08, 0x40, 0xe6,
- 0x4c, 0x01, 0x8c, 0x13,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x05, 0x84, 0x7b,
- 0xc0, 0x06, 0x6d, 0x61,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6e, 0x31,
- 0x6d, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0x40, 0x2c,
- 0x40, 0x4a, 0x84, 0x15,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x00, 0xad, 0x05, 0x4d,
- 0x05, 0xa1, 0x02, 0x60,
- 0x00, 0x60, 0x80, 0xb3,
- 0x40, 0xad, 0x05, 0x49,
- 0x05, 0x91, 0x02, 0x60,
- 0x81, 0xc5, 0xc0, 0xb3,
- 0x60, 0x8c, 0x40, 0x4a,
- 0x65, 0xc0, 0x02, 0x60,
- 0x00, 0x60, 0xc0, 0xb3,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x08, 0xc0, 0xad,
- 0x91, 0x11, 0x04, 0x84,
- 0xef, 0xc0, 0x6e, 0x68,
- 0x6a, 0x05, 0x4c, 0x01,
- 0xa3, 0x7b, 0x40, 0x2d,
- 0x03, 0x89, 0x0c, 0x85,
- 0x4c, 0x85, 0x80, 0x0b,
- 0xc0, 0x0b, 0x66, 0x7d,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x48, 0xf6,
- 0x40, 0x41, 0x82, 0x31,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x66, 0x71, 0x00, 0x45,
- 0xa1, 0x4b, 0xc0, 0x0b,
- 0x06, 0x71, 0x00, 0x45,
- 0x46, 0x3a, 0xc0, 0x0b,
- 0x40, 0x35, 0xc0, 0x12,
- 0xc0, 0x0b, 0x66, 0x69,
- 0x66, 0x69, 0x00, 0x35,
- 0x00, 0x45, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x6d,
- 0xe1, 0x92, 0x46, 0x3a,
- 0x66, 0x69, 0x40, 0x35,
- 0x40, 0x21, 0xc0, 0x0b,
- 0xc0, 0x2d, 0x69, 0xd1,
- 0x69, 0xd5, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2d,
- 0x60, 0x08, 0x43, 0x06,
- 0x40, 0x11, 0x89, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x71, 0x40, 0x21,
- 0x00, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x40, 0x15, 0xd6, 0x17,
- 0xc0, 0x0b, 0x66, 0x91,
- 0x6d, 0x51, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x95,
- 0x69, 0xd1, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x2d,
- 0x03, 0x11, 0x84, 0xd5,
- 0x40, 0x11, 0x81, 0x21,
- 0xc0, 0x2d, 0x6a, 0x75,
- 0x65, 0xf5, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x99,
- 0x65, 0xf9, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0xa1,
- 0x66, 0xb1, 0x40, 0x25,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0x68, 0x15, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x2d,
- 0x6a, 0x75, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x65, 0xfd,
- 0x66, 0x99, 0x40, 0x15,
- 0x02, 0x00, 0x40, 0x0b,
- 0xc0, 0xb6, 0x66, 0xc1,
- 0x68, 0x15, 0x00, 0x39,
- 0x87, 0x2d, 0xc0, 0x2d,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x78, 0xa8, 0x02, 0x35,
- 0x02, 0x45, 0x82, 0x21,
- 0x00, 0x55, 0xf8, 0x98,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x42, 0x45, 0x86, 0x43,
- 0x02, 0x35, 0xf8, 0x10,
- 0xc2, 0x37, 0xf8, 0x10,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x66, 0x69,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x42, 0x35, 0xc3, 0x37,
- 0x02, 0x35, 0xf8, 0x10,
- 0x02, 0x45, 0xf8, 0x88,
- 0x00, 0x55, 0xf8, 0x78,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x84, 0x4e, 0x86, 0x43,
- 0xc2, 0x37, 0x84, 0x34,
- 0x84, 0x34, 0x84, 0x3e,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x65, 0x51,
- 0xe0, 0x92, 0x46, 0x3a,
- 0x84, 0x34, 0x84, 0x3e,
- 0xc5, 0x3e, 0x83, 0x37,
- 0xc1, 0xc3, 0xf7, 0x85,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x69, 0x45,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x22, 0x65, 0x49,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x1b, 0x65, 0x69,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x28, 0x02, 0x25,
- 0xe0, 0x2c, 0x02, 0x15,
- 0x69, 0x5d, 0x40, 0x25,
- 0x45, 0xf6, 0x40, 0x08,
- 0x40, 0x15, 0xe0, 0x2c,
- 0xc0, 0x08, 0x69, 0x61,
- 0x62, 0xc9, 0x40, 0x23,
- 0xdd, 0x93, 0xc0, 0x11,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x80, 0x8b, 0x04, 0x6b,
- 0x60, 0x88, 0x00, 0x64,
- 0x52, 0x82, 0x82, 0x7b,
- 0x43, 0x36, 0x70, 0x80,
- 0x50, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0x81, 0x00, 0x90,
- 0x02, 0x70, 0xc0, 0x6d,
- 0x89, 0x21, 0x64, 0xa0,
- 0x68, 0x10, 0x64, 0x88,
- 0x00, 0x90, 0x81, 0x31,
- 0x40, 0x6d, 0x67, 0x81,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x81, 0x31, 0x09, 0x21,
- 0xe8, 0x10, 0x63, 0xe8,
- 0x60, 0x18, 0x41, 0x06,
- 0xe4, 0xc0, 0x02, 0x70,
- 0x66, 0x82, 0x40, 0x6a,
- 0xe0, 0x24, 0x04, 0x06,
- 0x80, 0x83, 0x85, 0x31,
- 0x65, 0x01, 0x00, 0x80,
- 0x0c, 0x0c, 0xc0, 0x6e,
- 0x22, 0xd8, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6c, 0xfd, 0x0e, 0x39,
- 0x43, 0xf6, 0x40, 0x2c,
- 0x6e, 0xb8, 0xe0, 0x0c,
- 0x85, 0x21, 0x6f, 0xfc,
- 0x6f, 0xfc, 0x70, 0xc8,
- 0x67, 0xf8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xa6,
- 0x65, 0xe0, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x70, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x60,
- 0x62, 0x18, 0x8c, 0x3b,
- 0x00, 0x8b, 0xef, 0x94,
- 0xe0, 0x08, 0x41, 0x26,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x00, 0x70, 0x40, 0x2b,
- 0xc0, 0x89, 0x65, 0xa1,
- 0x64, 0xc0, 0x02, 0x60,
- 0xe0, 0x24, 0x04, 0x06,
- 0x68, 0x10, 0x5f, 0x88,
- 0x90, 0x0b, 0x85, 0x31,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x86, 0x6b, 0x00, 0x8b,
- 0x70, 0x88, 0x52, 0x82,
- 0x12, 0x19, 0x82, 0x7b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x39, 0x83, 0x21,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xef, 0xfc, 0x6a, 0xc8,
- 0x6f, 0xfc, 0x6c, 0xe8,
- 0x12, 0x19, 0x90, 0x0b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x65, 0xd8, 0x90, 0x0b,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xb6,
- 0x65, 0xe0, 0x02, 0x80,
- 0x50, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x80, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x70,
- 0x5d, 0xf8, 0x8e, 0x3b,
- 0x12, 0x29, 0xef, 0x94,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x0b, 0x80, 0x6b,
- 0x76, 0x18, 0x8e, 0x1b,
- 0x8c, 0x0b, 0xef, 0xfc,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x03, 0x06,
- 0x05, 0x46, 0x00, 0x04,
- 0x07, 0x86, 0xe1, 0x30,
- 0x09, 0xc6, 0x61, 0x30,
- 0x4a, 0x06, 0xe1, 0x30,
- 0x58, 0x46, 0x61, 0x30,
- 0x80, 0x04, 0xe1, 0x30,
- 0x84, 0x14, 0x84, 0x14,
- 0x00, 0x13, 0x88, 0x24,
- 0xe1, 0x30, 0x40, 0x86,
- 0x8c, 0x34, 0x88, 0x24,
- 0x8c, 0x34, 0x84, 0x13,
- 0x86, 0x13, 0x90, 0x44,
- 0x94, 0x54, 0x90, 0x44,
- 0x94, 0x54, 0x88, 0x13,
- 0x8a, 0x13, 0xb0, 0xc4,
- 0x80, 0x04, 0xb0, 0xc4,
- 0x80, 0x04, 0x98, 0x13,
- 0x82, 0x03, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe1, 0x24, 0x45, 0x46,
- 0x6e, 0x09, 0x0c, 0x15,
- 0x80, 0x08, 0xc0, 0x09,
- 0xc5, 0x07, 0x88, 0x24,
- 0x44, 0x00, 0x08, 0x34,
- 0x4d, 0xb8, 0xf0, 0x0c,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2c,
- 0x64, 0xb5, 0x4c, 0x05,
- 0x4c, 0x21, 0xc0, 0x05,
- 0xc0, 0x15, 0x62, 0xe1,
- 0x62, 0xe9, 0x4c, 0x21,
- 0x4c, 0x11, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x5d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x7d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x08, 0x69, 0x45,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4e, 0x68,
- 0x65, 0x49, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4c, 0xe8,
- 0x6d, 0x01, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x5d, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x1b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0xc6, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x34,
- 0x80, 0x04, 0x8b, 0x31,
- 0x65, 0x49, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x22,
- 0xc0, 0x22, 0x65, 0x59,
- 0x69, 0x5d, 0x4c, 0x05,
- 0x59, 0xf8, 0xc0, 0x08,
- 0x4c, 0x05, 0xef, 0xc0,
- 0x40, 0x08, 0x69, 0x61,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x65, 0x91, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x68, 0x20, 0x6d, 0xc8,
- 0x42, 0x78, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x81, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x6d,
- 0xc0, 0x20, 0x63, 0x41,
- 0x60, 0x04, 0x04, 0x06,
- 0x4f, 0x18, 0x81, 0x31,
- 0x0e, 0x60, 0xe8, 0x10,
- 0x40, 0x6d, 0x67, 0x81,
- 0x81, 0xf5, 0xa1, 0x81,
- 0x78, 0x40, 0x0e, 0x05,
- 0x0c, 0x29, 0x8b, 0x31,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x79, 0x0c, 0x19,
- 0x57, 0x18, 0xc0, 0x1b,
- 0x5d, 0x0e, 0xef, 0xc0,
- 0xec, 0x04, 0x10, 0x80,
- 0xfc, 0x35, 0xa1, 0x8b,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x45, 0xb8, 0xe0, 0x04,
- 0x0e, 0x60, 0xe8, 0x20,
- 0x40, 0x6e, 0x64, 0x81,
- 0x01, 0x95, 0xa1, 0x81,
- 0x5d, 0x18, 0x8c, 0x9b,
- 0x5e, 0x78, 0x8c, 0x0b,
- 0x65, 0x0e, 0xef, 0xd4,
- 0xec, 0x04, 0x10, 0x80,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x65, 0x81, 0x00, 0x60,
- 0x04, 0x06, 0x40, 0x6d,
- 0x01, 0x31, 0xe0, 0x04,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x0b, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0xa1, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x89,
- 0xc0, 0x20, 0x63, 0x1d,
- 0x60, 0x24, 0x04, 0x06,
- 0x0a, 0xb8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0x01, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x6e,
- 0xc0, 0x20, 0x61, 0x01,
- 0x62, 0x40, 0x04, 0x06,
- 0x09, 0xf8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0x6d, 0x91, 0x1e, 0xf0,
- 0x00, 0x6b, 0xc0, 0x04,
- 0xe1, 0x30, 0x41, 0x46,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x42, 0xc6, 0x40, 0x22,
- 0x0c, 0x39, 0xe1, 0x30,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x4c, 0x41, 0x85, 0x41,
- 0x40, 0x22, 0x6c, 0x69,
- 0x00, 0x04, 0x81, 0x71,
- 0x4c, 0x21, 0x82, 0x21,
- 0x40, 0x22, 0x6c, 0x6d,
- 0x4c, 0x31, 0x82, 0x31,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x64, 0xd1, 0x04, 0xf0,
- 0x04, 0x14, 0xc0, 0x02,
- 0xe4, 0x10, 0x06, 0xf0,
- 0x95, 0x51, 0x1d, 0x41,
- 0x81, 0x81, 0x01, 0xc1,
- 0x12, 0xc4, 0x83, 0x65,
- 0x82, 0xc1, 0x7a, 0x80,
- 0xe1, 0x12, 0x52, 0x9a,
- 0x66, 0x96, 0x54, 0x9a,
- 0x12, 0x0c, 0xbb, 0x9b,
- 0x10, 0xa3, 0xe2, 0x00,
- 0x14, 0xa4, 0x92, 0x83,
- 0xc4, 0xa7, 0xfa, 0x80,
- 0xfc, 0x28, 0x00, 0xb5,
- 0x02, 0xa5, 0xc9, 0xbe,
- 0xcd, 0xae, 0xfc, 0x28,
- 0xe2, 0x30, 0x18, 0x0a,
- 0x00, 0x60, 0xfa, 0x35,
- 0x40, 0x90, 0x65, 0x81,
- 0x64, 0xd1, 0x02, 0xf0,
- 0x45, 0x06, 0xc0, 0x02,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x45, 0x28,
- 0x66, 0x41, 0x00, 0x60,
- 0x02, 0xf0, 0x40, 0x92,
- 0x45, 0x06, 0xe4, 0x10,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x44, 0x88,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x02, 0x46,
- 0x04, 0xc6, 0x00, 0x04,
- 0x04, 0x14, 0xe1, 0x38,
- 0x66, 0x31, 0x06, 0x60,
- 0x08, 0x24, 0xc0, 0x8b,
- 0x83, 0x65, 0x81, 0x41,
- 0x70, 0x0c, 0x4a, 0x40,
- 0x18, 0x54, 0x82, 0x41,
- 0xa7, 0x5b, 0x60, 0x84,
- 0x62, 0x00, 0x0a, 0x0c,
- 0x18, 0xc4, 0x8e, 0xc3,
- 0x8a, 0x73, 0x7a, 0x80,
- 0xc4, 0xc7, 0x08, 0xce,
- 0xfc, 0x30, 0x00, 0x65,
- 0xf8, 0x20, 0x46, 0x65,
- 0xfc, 0x30, 0x02, 0xc5,
- 0xb1, 0x4b, 0xcd, 0xce,
- 0x1e, 0xf0, 0xfa, 0x55,
- 0xc0, 0x04, 0x65, 0x91,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6c, 0xad, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6f, 0xfd, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0xf5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xe8, 0x72, 0x88,
- 0x81, 0x61, 0x81, 0x11,
- 0x00, 0x06, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x10,
- 0xe0, 0x04, 0x43, 0x16,
- 0x6c, 0x1d, 0x50, 0x11,
- 0x83, 0x91, 0x40, 0x2b,
- 0x00, 0x46, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x7c, 0x98, 0x80, 0x16,
- 0x7c, 0xf8, 0xef, 0xf8,
- 0x90, 0x0b, 0x6f, 0xf8,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x0c, 0x86, 0x40, 0x2b,
- 0x02, 0x86, 0xe0, 0x08,
- 0x90, 0x0b, 0x60, 0x08,
- 0xef, 0xd4, 0x67, 0xa8,
- 0x0b, 0x45, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xef, 0xd8, 0x6e, 0x88,
- 0x6f, 0xf8, 0x74, 0x08,
- 0x45, 0x58, 0x90, 0x0b,
- 0x90, 0x0b, 0x68, 0x00,
- 0x61, 0x14, 0x41, 0x06,
- 0xe0, 0x04, 0x45, 0x66,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe1, 0x04, 0x40, 0x86,
- 0x43, 0x56, 0x00, 0x04,
- 0x00, 0x96, 0xe0, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x50, 0x11, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x18,
- 0x01, 0x06, 0x00, 0x96,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x5d,
- 0x50, 0x21, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x40, 0x86,
- 0x6e, 0x61, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x40, 0x46, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x08,
- 0xc0, 0x2c, 0x6e, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x44, 0x41, 0x86,
- 0x6e, 0x59, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x41, 0x76, 0x00, 0x16,
- 0x50, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xfc, 0x41, 0xf6,
- 0x68, 0x00, 0x49, 0x08,
- 0x03, 0x11, 0x81, 0x11,
- 0x6a, 0x58, 0x8e, 0x0b,
- 0x8c, 0x0b, 0xef, 0xe8,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x81, 0x00, 0x29,
- 0x03, 0x46, 0x40, 0x2c,
- 0x84, 0x14, 0xe1, 0x10,
- 0x03, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x42, 0xc6,
- 0x6e, 0x89, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x42, 0x06, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x05, 0xc6,
- 0x6b, 0xad, 0x00, 0x19,
- 0x88, 0x24, 0xc0, 0x2b,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x43, 0xc6, 0x08, 0x16,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0xa1,
- 0x84, 0x26, 0x84, 0x14,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x0e, 0xa5, 0x00, 0x29,
- 0x02, 0x46, 0x40, 0x2c,
- 0x02, 0x15, 0xc1, 0x14,
- 0x04, 0x16, 0xc0, 0x00,
- 0x43, 0x06, 0x80, 0x00,
- 0x02, 0x15, 0x81, 0x10,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x14, 0x02, 0x06,
- 0x6e, 0x55, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x02, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x14,
- 0xc0, 0x2c, 0x6e, 0x8d,
- 0x84, 0x26, 0x84, 0x14,
- 0x6e, 0xa9, 0x00, 0x19,
- 0x21, 0x1b, 0xc0, 0x2c,
- 0xe1, 0x10, 0x43, 0x86,
- 0x84, 0x25, 0x84, 0x24,
- 0x08, 0x16, 0x81, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x03, 0x06, 0x84, 0xe5,
- 0x83, 0x21, 0x61, 0x10,
- 0x83, 0x75, 0x84, 0x14,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x41, 0x10, 0x03, 0x06,
- 0xc0, 0x00, 0x04, 0x06,
- 0xc0, 0x00, 0x02, 0x15,
- 0x05, 0x06, 0x80, 0xd5,
- 0x88, 0x24, 0xe1, 0x14,
- 0x81, 0x25, 0x88, 0x16,
- 0x00, 0x09, 0x84, 0x26,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xe1, 0x10, 0x02, 0x46,
- 0x84, 0x06, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x1c, 0x04, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x14, 0x43, 0x86,
- 0x84, 0x0c, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x14, 0xe1, 0x18,
- 0xe0, 0x08, 0x04, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x21,
- 0x81, 0x21, 0x40, 0x2b,
- 0x11, 0xc6, 0x03, 0x71,
- 0x04, 0x26, 0xe1, 0x24,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x04, 0x26, 0x84, 0x14,
- 0x80, 0x04, 0x85, 0x11,
- 0xa0, 0x04, 0x80, 0x76,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x18, 0x52, 0x48,
- 0x02, 0x76, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x80, 0x76,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x04, 0x3b,
- 0x86, 0x1b, 0x01, 0x21,
- 0x68, 0x18, 0x6c, 0x48,
- 0x00, 0x06, 0x81, 0x61,
- 0x43, 0x46, 0x61, 0x28,
- 0x00, 0x04, 0xe1, 0x2c,
- 0xe1, 0x44, 0x04, 0xc6,
- 0x81, 0x31, 0x04, 0x14,
- 0x80, 0xc8, 0x88, 0x24,
- 0x84, 0x48, 0x84, 0x58,
- 0x50, 0x0a, 0x88, 0x88,
- 0x04, 0x05, 0xe0, 0x8c,
- 0x80, 0x08, 0x0d, 0x56,
- 0xc7, 0x57, 0x45, 0xc7,
- 0xc4, 0x47, 0x02, 0xc9,
- 0xa6, 0xcf, 0x04, 0x59,
- 0xaa, 0xcf, 0x08, 0x49,
- 0x46, 0xc2, 0xa8, 0xcf,
- 0x87, 0x7b, 0xf8, 0x1c,
- 0x70, 0xf8, 0xfa, 0x75,
- 0x8c, 0x0b, 0xe8, 0x18,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x02, 0x86, 0x02, 0x2b,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xf9, 0x95, 0x8f, 0x11,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x79, 0x98, 0x82, 0x6b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x00, 0x86,
- 0x4e, 0x01, 0x8f, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x2b, 0x8e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0x25,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x61, 0x38, 0x11, 0x46,
- 0x20, 0x04, 0x80, 0x6b,
- 0x70, 0x01, 0x02, 0x56,
- 0x0e, 0x86, 0xf7, 0xab,
- 0x12, 0x46, 0x61, 0x3c,
- 0x03, 0x21, 0xe1, 0x14,
- 0x80, 0x1e, 0x8b, 0xa1,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x89, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x66, 0x18, 0x8b, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x14, 0x16, 0xc6,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x0a,
- 0xa6, 0x05, 0x99, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa3, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0xa4, 0x65,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9b, 0x01, 0x60, 0x84,
- 0xa5, 0x1b, 0xa2, 0x65,
- 0x0b, 0x11, 0xa2, 0x25,
- 0x64, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x9e, 0x85, 0x9f, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa7, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x9c, 0xe5,
- 0x83, 0x21, 0x8b, 0x11,
- 0x8c, 0x0b, 0x00, 0xa6,
- 0xe8, 0x18, 0x63, 0x08,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x4a,
- 0x9a, 0x45, 0xa1, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa9, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x98, 0xa5,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x0a, 0x80, 0x08,
- 0xa3, 0x01, 0x60, 0x84,
- 0x2b, 0x1b, 0x96, 0xa5,
- 0xe1, 0x00, 0x15, 0xc6,
- 0x0b, 0x11, 0x96, 0x25,
- 0x61, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x92, 0x85, 0xa5, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xaf, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x90, 0xe5,
- 0x83, 0x21, 0x85, 0x11,
- 0x8b, 0x11, 0x00, 0x16,
- 0x68, 0x18, 0x60, 0x08,
- 0xac, 0x04, 0x8c, 0x0b,
- 0x40, 0x4a, 0x80, 0x08,
- 0xa7, 0x01, 0x60, 0x80,
- 0x0c, 0x15, 0x8e, 0x25,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x10, 0x44, 0x46,
- 0x8c, 0x45, 0xb1, 0x1b,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x84, 0x40, 0x0a,
- 0x8a, 0x85, 0xa9, 0x01,
- 0x8a, 0x45, 0xb3, 0x1b,
- 0x61, 0x00, 0x41, 0x06,
- 0x80, 0x04, 0x85, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9d, 0x01, 0x60, 0x90,
- 0x0c, 0x15, 0x86, 0xe5,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x86, 0x45, 0xad, 0x1b,
- 0x81, 0xb1, 0x24, 0x04,
- 0x83, 0x21, 0x0b, 0x11,
- 0xe1, 0x10, 0x54, 0x46,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x10,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xe8, 0x18, 0x5c, 0xc8,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x80, 0xc5, 0x97, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xb5, 0x1b, 0xc0, 0x0b,
- 0x20, 0x14, 0x82, 0x95,
- 0x70, 0x01, 0x04, 0x76,
- 0x06, 0x04, 0xf7, 0xab,
- 0x80, 0xbb, 0x7a, 0x80,
- 0x4c, 0x35, 0x84, 0x2e,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x61, 0x10, 0x41, 0x06,
- 0x00, 0x04, 0x83, 0x11,
- 0x00, 0x16, 0x83, 0x21,
- 0xe1, 0x00, 0x41, 0x06,
- 0x81, 0x11, 0x00, 0x04,
- 0x91, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x5a, 0x58, 0x8d, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x02, 0x66, 0x20, 0x04,
- 0xf7, 0xab, 0x70, 0x01,
- 0x9c, 0x04, 0x80, 0x1e,
- 0xc4, 0x19, 0x80, 0x18,
- 0x9c, 0x14, 0x80, 0x16,
- 0x44, 0x00, 0x84, 0x08,
- 0x00, 0xb4, 0x7c, 0x40,
- 0x84, 0x26, 0xfa, 0x80,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x61, 0x38, 0x53, 0x06,
- 0x24, 0x04, 0x80, 0x6b,
- 0xe0, 0x04, 0x02, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x54, 0xc6, 0x40, 0x2b,
- 0x51, 0x06, 0xe1, 0x38,
- 0x80, 0x18, 0xe1, 0x34,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x04, 0x02, 0x16,
- 0x4c, 0x11, 0xa0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x18, 0x7b, 0x68,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x0a, 0x82, 0x45,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x6d, 0x21, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0x25, 0xe0, 0x88,
- 0x61, 0x38, 0x00, 0x46,
- 0x80, 0x04, 0x89, 0x11,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf8, 0x1c, 0x00, 0x4a,
- 0x01, 0x75, 0x80, 0x95,
- 0xe9, 0x9c, 0x4e, 0x0a,
- 0x6d, 0x11, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0x20, 0x01, 0x02, 0x58,
- 0x40, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe9, 0x9c,
- 0x86, 0xc5, 0xe9, 0x9c,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x0c, 0x09, 0x88, 0x65,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x86, 0xd5, 0xa1, 0x0b,
- 0x02, 0x26, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x10, 0x16, 0x46,
- 0xa3, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x64, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xac, 0x14, 0x80, 0x7b,
- 0xa1, 0x7b, 0x84, 0x06,
- 0x00, 0x06, 0x80, 0xe5,
- 0x87, 0x11, 0x61, 0x38,
- 0x80, 0x1c, 0x80, 0x04,
- 0x40, 0x46, 0x9b, 0x95,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x04, 0x87, 0x11,
- 0x0c, 0x09, 0x80, 0x1c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8e, 0x75,
- 0xc0, 0x2c, 0x6d, 0x11,
- 0x28, 0xc5, 0xa1, 0x0b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x02, 0x66, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xa1, 0x21, 0xa1, 0xb1,
- 0x00, 0x60, 0x00, 0x16,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x41, 0x38, 0xe4, 0x10,
- 0xec, 0x04, 0x04, 0x20,
- 0xa1, 0x2b, 0xc5, 0x36,
- 0x65, 0x38, 0xfe, 0x75,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x43, 0x28,
- 0x00, 0x60, 0x00, 0x7b,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x45, 0x28, 0xe4, 0x10,
- 0xec, 0x04, 0x16, 0xb0,
- 0xa1, 0xbb, 0xc1, 0x26,
- 0x0c, 0x09, 0xfe, 0x75,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x9c, 0xd5, 0xa5, 0x0b,
- 0x68, 0x00, 0x74, 0x48,
- 0x0f, 0x25, 0x8c, 0x0b,
- 0x20, 0x04, 0x80, 0x7b,
- 0xe0, 0x04, 0x02, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x85, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x28,
- 0x80, 0x7b, 0x8c, 0x1b,
- 0x8c, 0x05, 0xa1, 0x7b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x14, 0x89, 0x21,
- 0x03, 0x36, 0x04, 0x2c,
- 0x00, 0x04, 0xe0, 0x08,
- 0x4c, 0x11, 0x8b, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8b, 0x05, 0x80, 0x2c,
- 0x02, 0x36, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0x16, 0x83, 0x11,
- 0x44, 0x58, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x1c,
- 0x40, 0x2d, 0x67, 0xc9,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x70, 0x98, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x00, 0x06, 0x80, 0x7b,
- 0xa1, 0x7b, 0x61, 0x38,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x15, 0x80, 0x1c,
- 0x6b, 0x18, 0xef, 0x95,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x82, 0x75, 0xe0, 0x80,
- 0x6f, 0xf8, 0x75, 0xa8,
- 0x6b, 0x58, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6e, 0x88,
- 0x81, 0x85, 0x8c, 0x0b,
- 0x6f, 0xf8, 0x57, 0xc8,
- 0x0c, 0x0b, 0x8c, 0x0b,
- 0x59, 0x38, 0x8c, 0x1b,
- 0x16, 0x06, 0xef, 0xf8,
- 0x89, 0x11, 0x61, 0x38,
- 0x00, 0x1c, 0xac, 0x04,
- 0xe0, 0x08, 0x01, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xef, 0xf0, 0x52, 0x48,
- 0x80, 0x7b, 0x2c, 0x04,
- 0x8b, 0x11, 0x21, 0x7b,
- 0x11, 0xe8, 0x80, 0x1c,
- 0x28, 0x04, 0x80, 0x00,
- 0x80, 0x18, 0xa1, 0x7b,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x92, 0xc5, 0x80, 0x16,
- 0xa1, 0x7b, 0x24, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x8a, 0x95, 0x80, 0x16,
- 0x6f, 0xf8, 0x63, 0xc8,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0xb6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0xef, 0xfc, 0x51, 0xe8,
- 0x61, 0x3c, 0x10, 0x86,
- 0x20, 0x04, 0x83, 0x91,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0x40, 0x18, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0x10, 0x41, 0x46,
- 0x80, 0x14, 0x81, 0x21,
- 0x80, 0x04, 0x84, 0x26,
- 0xa0, 0x04, 0x80, 0x96,
- 0xe0, 0x19, 0x80, 0x18,
- 0x00, 0x06, 0x80, 0x16,
- 0x42, 0xe6, 0x61, 0x38,
- 0x00, 0x04, 0xe0, 0x00,
- 0x00, 0x1c, 0xa8, 0xf1,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0x09, 0xdd, 0x93,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x88, 0x40, 0x0a,
- 0x0c, 0x19, 0x8c, 0x25,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x20, 0x04, 0x8a, 0x65,
- 0xe0, 0x04, 0x02, 0x76,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x7b, 0xa8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x81, 0x71, 0x40, 0x2d,
- 0x80, 0xb5, 0xa7, 0x0b,
- 0x68, 0x00, 0x65, 0x28,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6f, 0xfc, 0x4c, 0x68,
- 0x77, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe0, 0x35, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x86, 0x45, 0xe0, 0x8c,
- 0x02, 0x86, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x79, 0xc8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2d,
- 0x80, 0xb5, 0xa9, 0x0b,
- 0x68, 0x00, 0x62, 0xa8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xd8, 0xb5, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x90,
- 0x6f, 0xd4, 0x6f, 0x48,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0x96,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0x7b, 0xf8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xc4,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x60, 0x88, 0x40, 0x0a,
- 0xd2, 0x65, 0x81, 0x71,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0xd0, 0xa5, 0xe0, 0x88,
- 0x02, 0xa6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x70, 0xf8, 0x84, 0x25,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x70, 0x48,
- 0x6f, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6f, 0x68,
- 0x79, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x4d, 0xd8, 0x83, 0x35,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x6f, 0xf8, 0x62, 0x88,
- 0x01, 0x95, 0x8c, 0x0b,
- 0x01, 0x31, 0x81, 0x01,
- 0x0c, 0x1b, 0x8c, 0x0b,
- 0x50, 0x58, 0x8e, 0x2b,
- 0x82, 0x71, 0xef, 0xf8,
- 0xe0, 0x40, 0x0e, 0x0a,
- 0x21, 0x0b, 0xfc, 0xf5,
- 0x31, 0x38, 0x80, 0x7b,
- 0x7c, 0x38, 0xdf, 0xfc,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x81, 0x71, 0x40, 0x16,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x9f, 0xfc, 0x30, 0x88,
- 0x6f, 0xf8, 0x58, 0x28,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x62, 0xf8, 0x8e, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x59, 0x68,
- 0x5c, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x0c, 0x09, 0x87, 0x65,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x15, 0xa3, 0x0b,
- 0x68, 0x00, 0x5a, 0xe8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x2d, 0xa8, 0xa1, 0x7b,
- 0x20, 0x04, 0xdf, 0xfc,
- 0xe0, 0x04, 0x02, 0x56,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0x6c, 0x81, 0x0c, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xc5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xff, 0xfc, 0x21, 0x58,
- 0x40, 0xc6, 0xa1, 0x0b,
- 0x02, 0x06, 0x01, 0x04,
- 0x00, 0x05, 0x80, 0x00,
- 0x40, 0x11, 0x80, 0x00,
- 0x20, 0xa8, 0x80, 0x00,
- 0x42, 0x18, 0xff, 0xfc,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x43, 0xb6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x83, 0x11, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x48,
- 0x57, 0x35, 0x8c, 0x0b,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x04, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x38, 0x63, 0x15,
- 0x0c, 0x19, 0xa5, 0x0b,
- 0x40, 0x2c, 0x0e, 0x99,
- 0xc1, 0x14, 0x01, 0x06,
- 0xc0, 0x00, 0x00, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x81, 0x10, 0x01, 0x06,
- 0x80, 0x00, 0x00, 0x05,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x14,
- 0xe0, 0x19, 0x80, 0x18,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0xc2, 0x19, 0x80, 0x18,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xef, 0xe4, 0x5a, 0x48,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x50, 0x86, 0x3c, 0x0e,
- 0x03, 0x91, 0xe1, 0x24,
- 0xe1, 0x24, 0x4e, 0x46,
- 0x61, 0x24, 0x54, 0xc6,
- 0xa1, 0x85, 0x81, 0x01,
- 0x00, 0x06, 0x7c, 0x0e,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xd4, 0x59, 0x88,
- 0x60, 0x08, 0x00, 0x16,
- 0xe0, 0x10, 0x42, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x14, 0x69, 0x08,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x80, 0x04, 0xe1, 0x44,
- 0x81, 0x65, 0x80, 0xb8,
- 0xef, 0xd4, 0x59, 0x68,
- 0x63, 0x29, 0x4c, 0x91,
- 0xa0, 0x04, 0xc0, 0x38,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfa, 0xe5, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x45, 0xfa, 0x55,
- 0xe8, 0x14, 0x6d, 0xe8,
- 0x80, 0x08, 0xa0, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0xef, 0xd4, 0x57, 0x28,
- 0x63, 0x29, 0x4c, 0x91,
- 0x55, 0xf8, 0xc0, 0x38,
- 0x55, 0xb8, 0xef, 0xc0,
- 0x00, 0x26, 0xef, 0xd4,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x55, 0x98, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x6a, 0x68,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x82, 0x85, 0xa1, 0x0b,
- 0xef, 0xd4, 0x53, 0xa8,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xd0, 0x19,
- 0x63, 0x29, 0x4c, 0x91,
- 0x00, 0x86, 0xc0, 0x38,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x51, 0xb8, 0x80, 0x16,
- 0x0c, 0x09, 0xef, 0xc0,
- 0xc0, 0x2c, 0x6e, 0xa9,
- 0x01, 0x06, 0xa3, 0x0b,
- 0x00, 0x05, 0x81, 0x10,
- 0x40, 0x91, 0x80, 0x00,
- 0x9e, 0x25, 0x80, 0x00,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x50, 0x58, 0x9a, 0xa5,
- 0x00, 0x36, 0xef, 0xd4,
- 0x42, 0x26, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0xd8, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x50, 0x38, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x65, 0x08,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x92, 0x25, 0xa1, 0x0b,
- 0xe9, 0x0d, 0xfc, 0x04,
- 0x4d, 0x38, 0x90, 0x25,
- 0x00, 0xc6, 0xef, 0xc0,
- 0x57, 0x46, 0x61, 0x10,
- 0x00, 0x04, 0xe1, 0x10,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x81, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x5c, 0x38, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x43, 0x46, 0x2c, 0x04,
- 0x04, 0x86, 0xe1, 0x10,
- 0x00, 0x96, 0xe1, 0x3c,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x02, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xfc, 0x04, 0xbe, 0x0e,
- 0xe8, 0x0d, 0x82, 0x01,
- 0x9f, 0xfc, 0x2f, 0x88,
- 0xbc, 0x0e, 0xbe, 0x04,
- 0x4a, 0x18, 0x81, 0x85,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0xef, 0xc0, 0x48, 0xe8,
- 0x63, 0x15, 0x0c, 0x09,
- 0x4f, 0x06, 0x40, 0x38,
- 0xa5, 0x0b, 0xe1, 0x14,
- 0x70, 0xb8, 0x82, 0x15,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x4c, 0x01, 0xbc, 0x0e,
- 0xc0, 0x38, 0x63, 0x29,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xe0, 0x19,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x3c, 0x04, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x08, 0x09, 0x80, 0x4b,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0x08, 0x0b, 0x96, 0xd5,
- 0x40, 0x16, 0x6b, 0xe1,
- 0x66, 0x81, 0x12, 0x40,
- 0x14, 0x40, 0xc0, 0xb5,
- 0x40, 0xb5, 0x65, 0x41,
- 0xbc, 0x4e, 0x81, 0x71,
- 0x73, 0xf1, 0x40, 0x00,
- 0x88, 0x03, 0xc0, 0xff,
- 0x64, 0x01, 0x10, 0x00,
- 0x00, 0x40, 0x40, 0x28,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x00, 0x40, 0x7c, 0x0e,
- 0xc0, 0x9c, 0x67, 0x41,
- 0x87, 0xb5, 0xbe, 0x0e,
- 0x7c, 0x04, 0xa8, 0x0a,
- 0x73, 0xf1, 0x4c, 0x00,
- 0x28, 0xba, 0xc0, 0xff,
- 0x81, 0x6b, 0x88, 0x63,
- 0x6d, 0x98, 0x80, 0xf5,
- 0x88, 0x0b, 0x68, 0x10,
- 0xa1, 0x0b, 0x3c, 0x44,
- 0xbe, 0x04, 0x8c, 0x15,
- 0x80, 0xf5, 0x81, 0x6b,
- 0x68, 0x10, 0x6b, 0x28,
- 0x3c, 0x44, 0x88, 0x0b,
- 0x88, 0xf5, 0xa1, 0x0b,
- 0xa1, 0x0b, 0xa4, 0x0a,
- 0x24, 0x0a, 0x86, 0xa5,
- 0xa4, 0x1a, 0xe0, 0xb7,
- 0x21, 0x0b, 0x9e, 0x09,
- 0x73, 0xc1, 0x44, 0x10,
- 0x20, 0xbf, 0xc0, 0xff,
- 0x00, 0x16, 0xc9, 0x17,
- 0xa4, 0xbf, 0x00, 0x00,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x45, 0x07, 0xe1, 0xbe,
- 0x01, 0x65, 0x90, 0x2b,
- 0x59, 0x34, 0x80, 0x1b,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc9, 0x3e,
- 0xc4, 0x07, 0xfe, 0x75,
- 0x04, 0x91, 0x80, 0x83,
- 0x82, 0x71, 0x84, 0xa1,
- 0xe4, 0x9c, 0x0f, 0x0a,
- 0x81, 0x01, 0xf0, 0x85,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x6c, 0x1d, 0x08, 0x29,
- 0x40, 0x00, 0x40, 0x2b,
- 0x48, 0x01, 0xf3, 0xf4,
- 0x40, 0x2d, 0x67, 0xcd,
- 0xe0, 0x0c, 0x0e, 0x36,
- 0x60, 0x0c, 0x02, 0x36,
- 0x75, 0x38, 0x88, 0x0b,
- 0x23, 0x0b, 0xef, 0xcc,
- 0x0e, 0x06, 0x98, 0xf1,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x40, 0xc6, 0x8a, 0xe5,
- 0x85, 0x31, 0x61, 0x04,
- 0x83, 0x41, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x86,
- 0x63, 0x7d, 0x0c, 0x15,
- 0x79, 0x78, 0xc0, 0x0b,
- 0x82, 0x2b, 0x68, 0x14,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x6f, 0xf8, 0x5e, 0x08,
- 0x48, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x79, 0x41, 0x02, 0x06,
- 0x8c, 0x0b, 0x5d, 0xcd,
- 0xef, 0xf8, 0x62, 0xc8,
- 0x0c, 0x0b, 0x81, 0x55,
- 0x64, 0x38, 0x8e, 0x1b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x46, 0x38, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x14,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x65, 0x3d, 0x4c, 0x01,
- 0x90, 0x0b, 0xc0, 0x22,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x81, 0x00, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xa5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xa1, 0x0b, 0xdd, 0x93,
- 0xda, 0x00, 0x5c, 0x08,
- 0x61, 0x04, 0x40, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6d, 0x39, 0x0e, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x9c, 0xe5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x6d, 0x41, 0x4e, 0x81,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x40, 0x70, 0xe0, 0x80,
- 0x5e, 0x38, 0xdc, 0x00,
- 0x14, 0x06, 0xc8, 0x00,
- 0x91, 0xb1, 0x61, 0x38,
- 0x0e, 0x09, 0x8b, 0xf5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x12, 0x06, 0x04, 0x75,
- 0x02, 0x06, 0xc0, 0x00,
- 0x5d, 0xcd, 0x79, 0x41,
- 0x5d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xd5, 0xef, 0xf8,
- 0x03, 0x31, 0x80, 0x8b,
- 0x0c, 0x1b, 0x8e, 0x0b,
- 0x62, 0x18, 0x92, 0x2b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x12, 0x0a, 0x82, 0x91,
- 0xfc, 0xd5, 0xe0, 0x40,
- 0x6d, 0x41, 0x0e, 0x09,
- 0xa1, 0x0b, 0xc0, 0x2c,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x66,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x40, 0xb3, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x01, 0x11, 0x8a, 0xf5,
- 0x51, 0x78, 0x8e, 0x0b,
- 0x0e, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6d, 0x41,
- 0xa1, 0x0b, 0x80, 0x8b,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x76,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x02, 0x96, 0x00, 0x00,
- 0x40, 0x13, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x0e, 0x1b, 0x82, 0x95,
- 0x40, 0x16, 0x66, 0x35,
- 0x0e, 0x29, 0x8e, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x6f, 0xc8, 0x41, 0x88,
- 0x80, 0x8b, 0x82, 0x19,
- 0x6d, 0x41, 0x0e, 0x09,
- 0x82, 0x01, 0xc0, 0x2c,
- 0x6d, 0x41, 0x4e, 0x01,
- 0x0e, 0x09, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x41,
- 0x6d, 0x11, 0x0e, 0x19,
- 0xc3, 0x0d, 0xc0, 0x2c,
- 0x90, 0x0b, 0xe6, 0x75,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x81, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x63, 0x85, 0x00, 0x25,
- 0x81, 0x41, 0x40, 0x0b,
- 0xe0, 0x14, 0x2c, 0x48,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x60, 0x80, 0x40, 0x0a,
- 0x82, 0x85, 0x81, 0x01,
- 0x68, 0x00, 0x56, 0x88,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x40, 0x60, 0xab, 0x1b,
- 0x68, 0x38, 0x9c, 0x00,
- 0x0c, 0x19, 0x8f, 0xfc,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x62, 0x58, 0x82, 0x85,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x67, 0xc9, 0x0c, 0x19,
- 0xb1, 0x1b, 0xc0, 0x2d,
- 0x9c, 0x00, 0x40, 0x60,
- 0x8f, 0xfc, 0x67, 0x28,
- 0x6d, 0x51, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0xa5, 0xe0, 0x88,
- 0x68, 0x00, 0x56, 0x28,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x80, 0xb5, 0xb3, 0x1b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xcb, 0xf5, 0xf2, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2d, 0x65, 0x35,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0d, 0x11, 0x8c, 0x85,
- 0x79, 0x41, 0x04, 0x06,
- 0x4e, 0xb8, 0xdd, 0xcd,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0x6b, 0xd8, 0xdd, 0x93,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0x6a, 0xad, 0x0c, 0x09,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x1e, 0x79, 0xa3, 0x0b,
- 0x9c, 0x00, 0x40, 0x60,
- 0x08, 0x10, 0x6b, 0xa8,
- 0x9a, 0x80, 0x02, 0x74,
- 0x6d, 0x51, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x8c,
- 0x61, 0x34, 0x41, 0x06,
- 0xe0, 0x08, 0x45, 0xa6,
- 0x02, 0x74, 0x00, 0x04,
- 0x4c, 0x21, 0xfa, 0x80,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x00, 0x4d, 0x68,
- 0xf4, 0xf5, 0xa1, 0x0b,
- 0x04, 0x06, 0x0f, 0x11,
- 0xdd, 0xcd, 0x79, 0x41,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0b, 0x58, 0xf2, 0x84,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xe0, 0x65, 0x68,
- 0x00, 0x7b, 0x81, 0x11,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0xc5,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0x05,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x90, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x88, 0xb5, 0xa1, 0x0b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x4a, 0x78, 0x83, 0x11,
- 0x42, 0x06, 0xef, 0x7c,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x79, 0x48,
- 0x61, 0x38, 0x01, 0x06,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x0c, 0x29, 0x80, 0x04,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x88, 0x44, 0x4a,
- 0xc0, 0x00, 0x40, 0x15,
- 0x42, 0x16, 0xfe, 0x35,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x78, 0x28,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2d,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xe0, 0x61, 0x48,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x80, 0x6b, 0x3e, 0x1e,
- 0x65, 0x0d, 0x0c, 0x09,
- 0x81, 0x11, 0x40, 0x2b,
- 0x81, 0xa1, 0x0b, 0x1e,
- 0x00, 0x2a, 0x91, 0x1c,
- 0x81, 0x01, 0x60, 0x04,
- 0x00, 0x98, 0xfe, 0x0e,
- 0xc0, 0x00, 0x40, 0x01,
- 0x64, 0x50, 0x02, 0xf0,
- 0x77, 0x98, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xc8,
- 0x60, 0x48, 0x02, 0x06,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x00, 0x60, 0xe8, 0x14,
- 0x40, 0x09, 0x64, 0x01,
- 0x61, 0x01, 0x12, 0x06,
- 0x7c, 0x0e, 0xc0, 0x20,
- 0xe6, 0xe4, 0x10, 0x06,
- 0x81, 0x71, 0x09, 0x15,
- 0x6e, 0x19, 0x0c, 0x0b,
- 0x40, 0x0a, 0xc0, 0x15,
- 0x8c, 0x65, 0xe4, 0x9c,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x68, 0x81, 0x00, 0xb9,
- 0x16, 0x0a, 0xc0, 0x1b,
- 0x8a, 0x65, 0xe3, 0xfc,
- 0x40, 0x01, 0x01, 0x78,
- 0xbe, 0x04, 0xc0, 0x00,
- 0x04, 0x06, 0xa1, 0x0b,
- 0x06, 0x16, 0x00, 0x24,
- 0x40, 0x60, 0x80, 0x00,
- 0x42, 0x90, 0x1c, 0x00,
- 0x42, 0x62, 0x9c, 0x00,
- 0x45, 0x06, 0x50, 0xa0,
- 0x06, 0x46, 0xc0, 0x18,
- 0x40, 0x60, 0x40, 0x00,
- 0x68, 0xf8, 0xdc, 0x00,
- 0x0b, 0x34, 0xe8, 0x04,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0x96, 0x4b, 0x7c, 0x24,
- 0xef, 0xc8, 0x75, 0x88,
- 0xa1, 0xab, 0x80, 0xab,
- 0x7e, 0x14, 0x84, 0xb5,
- 0x91, 0x0a, 0x81, 0xa1,
- 0xfb, 0x80, 0x02, 0x14,
- 0xfe, 0x0e, 0x82, 0x03,
- 0x12, 0x90, 0x02, 0x71,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0xc1, 0x10, 0x80,
- 0xfe, 0x7d, 0xc0, 0x01,
- 0xfe, 0x04, 0xf0, 0x05,
- 0x62, 0x99, 0x4c, 0x03,
- 0x14, 0x0b, 0xc0, 0x16,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0xef, 0xec, 0x79, 0x88,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x66, 0x35, 0x0e, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x10, 0x16, 0xe8,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x89, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x04, 0x10, 0x83, 0x41,
- 0x15, 0x38, 0xec, 0x28,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x35, 0xad, 0x0b,
- 0x6f, 0xfc, 0x51, 0xc8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x82, 0xb5,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x70, 0x1c, 0x00, 0x0a,
- 0x80, 0xd5, 0x81, 0x01,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x10, 0xd8, 0xf2, 0x00,
- 0x0c, 0x0c, 0xff, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x8c, 0xc5, 0xe0, 0x90,
- 0x6f, 0xec, 0x55, 0xc8,
- 0x5a, 0xb8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x6f, 0xec, 0x68, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0x40, 0x38, 0x64, 0xb5,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x04, 0x21, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0xe1,
- 0x80, 0x54, 0x07, 0x01,
- 0x07, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0x00, 0x54,
- 0x80, 0x58, 0x06, 0x41,
- 0x8f, 0xd0, 0x42, 0xa8,
- 0x64, 0xb9, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x07, 0x01, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0x54,
- 0x80, 0x54, 0x07, 0x41,
- 0x0f, 0xd0, 0x47, 0x88,
- 0x06, 0x40, 0x04, 0x60,
- 0x0c, 0x09, 0x80, 0x58,
- 0xc0, 0x38, 0x63, 0x21,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x2b, 0xb8, 0xf2, 0x84,
- 0x8e, 0x0b, 0xff, 0xec,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0a, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xef, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x0c, 0x2b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x6c, 0xed, 0x0c, 0x79,
- 0x40, 0x4a, 0x40, 0x2c,
- 0x0c, 0x89, 0xe0, 0x80,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x6c, 0xf1, 0x0c, 0x49,
- 0x42, 0x10, 0x40, 0x2c,
- 0x02, 0x14, 0xdc, 0x20,
- 0x40, 0x0a, 0x1c, 0x0c,
- 0x06, 0x60, 0xe0, 0x90,
- 0xc0, 0xb3, 0x05, 0x31,
- 0x05, 0x35, 0x06, 0x60,
- 0x8c, 0x38, 0x80, 0xb3,
- 0x6d, 0x11, 0x4c, 0x31,
- 0x46, 0x10, 0x40, 0x2c,
- 0x4c, 0x31, 0xfc, 0x10,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x4a, 0x0a, 0x94, 0x58,
- 0x04, 0x24, 0xe0, 0x84,
- 0x04, 0x24, 0xc0, 0x84,
- 0x85, 0x4b, 0xfa, 0x80,
- 0xdc, 0x10, 0x02, 0x34,
- 0x1c, 0x50, 0x42, 0x10,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x6d, 0x15, 0x4c, 0x11,
- 0x40, 0x10, 0x40, 0x2c,
- 0x4c, 0x01, 0x93, 0xf0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x54, 0x78, 0x80, 0x85,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x0c, 0x09, 0xe0, 0x80,
- 0xc0, 0x2c, 0x0d, 0x15,
- 0xd3, 0xf8, 0x40, 0x00,
- 0x0d, 0x15, 0x4c, 0x01,
- 0x10, 0x0a, 0x40, 0x2c,
- 0x84, 0x65, 0xff, 0xfc,
- 0x7a, 0x80, 0x00, 0x84,
- 0xfa, 0x80, 0x02, 0x74,
- 0x0c, 0x09, 0x81, 0x1b,
- 0x00, 0x2c, 0x0d, 0x15,
- 0x80, 0x00, 0x02, 0x06,
- 0x0d, 0x11, 0x4c, 0x11,
- 0x40, 0x00, 0x80, 0x2c,
- 0x4c, 0x01, 0x93, 0xe0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x43, 0x08,
- 0x48, 0x98, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0xef, 0xdc, 0x40, 0x06,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x4f, 0xb8, 0x82, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x68, 0x04, 0x6b, 0x08,
- 0x81, 0x45, 0x8c, 0x0b,
- 0x6f, 0xd4, 0x4e, 0xa8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x57, 0x58, 0x82, 0x55,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x68, 0x00, 0x44, 0xe8,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x21, 0x00, 0x19,
- 0x45, 0xc6, 0x40, 0x2b,
- 0x40, 0x21, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x42, 0x26, 0xa3, 0x1b,
- 0x40, 0x11, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0xa7, 0x1b, 0x8a, 0x45,
- 0xa5, 0x1b, 0x82, 0x05,
- 0x80, 0x00, 0x42, 0x36,
- 0x0c, 0x1d, 0x40, 0x11,
- 0x85, 0x15, 0x80, 0x2b,
- 0xe0, 0x00, 0x42, 0x46,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x02, 0x86, 0x40, 0x2b,
- 0x84, 0x28, 0xef, 0xdc,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xe5,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x80, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xb5,
- 0xf3, 0xdc, 0x44, 0x20,
- 0x00, 0x29, 0x84, 0x26,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x0a,
- 0xc0, 0x00, 0x04, 0x16,
- 0xc0, 0xa0, 0x42, 0x21,
- 0x6e, 0x09, 0x00, 0x1b,
- 0xc4, 0x19, 0xc0, 0x15,
- 0x6e, 0x09, 0x40, 0x13,
- 0x00, 0x86, 0x40, 0x15,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x7b,
- 0x6f, 0xe0, 0x42, 0x68,
- 0x81, 0x81, 0x81, 0x11,
- 0x6c, 0x21, 0x0e, 0x09,
- 0x80, 0x6b, 0x40, 0x2b,
- 0xe0, 0x08, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4e, 0x11,
- 0xa5, 0x0b, 0xc0, 0x2b,
- 0xa7, 0x0b, 0x88, 0x45,
- 0x0e, 0x0b, 0xa2, 0x75,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0x75, 0x40, 0x00,
- 0x00, 0x04, 0xc0, 0xff,
- 0x4e, 0x03, 0xfc, 0x94,
- 0x40, 0x15, 0x6e, 0x09,
- 0x60, 0x98, 0x8e, 0x0b,
- 0x48, 0x38, 0xef, 0xbc,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0xa5, 0x0b, 0x86, 0x05,
- 0x00, 0x86, 0x08, 0xc5,
- 0xa3, 0x0b, 0x8f, 0xdc,
- 0x03, 0xd5, 0x88, 0xf5,
- 0xef, 0xdc, 0x00, 0x86,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x73, 0x71,
- 0xfc, 0x94, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x0c, 0x0c, 0xc0, 0x15,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0xef, 0xdc, 0x00, 0x86,
- 0x42, 0x4a, 0x80, 0x18,
- 0x80, 0xe5, 0xe0, 0x8c,
- 0x6c, 0x15, 0x0e, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x80, 0xa5, 0xe0, 0x84,
- 0x01, 0x55, 0x80, 0x08,
- 0xfc, 0x08, 0x00, 0x04,
- 0xc8, 0x09, 0x80, 0x08,
- 0xef, 0xdc, 0x02, 0x86,
- 0x4f, 0x98, 0x84, 0x06,
- 0x8e, 0x0b, 0x6f, 0xe4,
- 0xef, 0xdc, 0x12, 0x86,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xf5, 0xe0, 0x88,
- 0x8e, 0x0b, 0x3d, 0x11,
- 0xef, 0xe0, 0x52, 0x68,
- 0x68, 0x00, 0x49, 0x68,
- 0x87, 0x25, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x3f, 0x11,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xe0, 0x11, 0xc8,
- 0x6e, 0x09, 0x0e, 0x05,
- 0x02, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x64, 0xcd, 0x0e, 0x15,
- 0x04, 0x04, 0xc0, 0x05,
- 0xd0, 0x17, 0xe1, 0x84,
- 0xc2, 0x0d, 0x84, 0x13,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x02, 0x40, 0x1a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x04, 0x0e, 0x84, 0x14,
- 0x0e, 0x0b, 0x95, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x8e, 0x0b, 0x40, 0x15,
- 0xef, 0xe0, 0x4f, 0x88,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x60, 0x18, 0x83, 0x11,
- 0x47, 0xd8, 0xef, 0x78,
- 0x52, 0x81, 0xef, 0xf0,
- 0x03, 0x11, 0xe0, 0xa0,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x38, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xff, 0xdc,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe0, 0x08, 0x43, 0xe6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x45, 0x46, 0x40, 0x2b,
- 0x0c, 0x15, 0xe1, 0x24,
- 0xc0, 0x09, 0x6e, 0x09,
- 0x88, 0x24, 0x80, 0x08,
- 0x08, 0x34, 0xc5, 0x07,
- 0xf0, 0x0c, 0x44, 0x00,
- 0x68, 0x10, 0x79, 0xa8,
- 0x02, 0x86, 0x8c, 0x0b,
- 0x48, 0x86, 0x6f, 0xdc,
- 0x86, 0x0e, 0xe0, 0x3c,
- 0xc4, 0x24, 0x86, 0x04,
- 0x68, 0xb1, 0x0c, 0x3b,
- 0x48, 0x0a, 0xc0, 0x0a,
- 0x00, 0x0e, 0x66, 0x92,
- 0xc3, 0xd0, 0x64, 0x00,
- 0x60, 0x0e, 0x40, 0x0a,
- 0x88, 0x23, 0xc9, 0x47,
- 0x40, 0x02, 0xc5, 0x0d,
- 0x02, 0x09, 0x91, 0x88,
- 0x40, 0x00, 0xc0, 0x00,
- 0x42, 0x01, 0xdc, 0x04,
- 0x00, 0x06, 0x40, 0x00,
- 0x4c, 0x05, 0xc0, 0x00,
- 0xc0, 0x05, 0x64, 0xcd,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x09, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0x64, 0xcd, 0x00, 0x05,
- 0x42, 0x2a, 0xc0, 0x05,
- 0xd0, 0x07, 0xe0, 0x06,
- 0xe1, 0x84, 0x04, 0x14,
- 0xc0, 0x1d, 0x84, 0x03,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x06, 0x40, 0x0a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x84, 0x0e, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x48, 0x58, 0xb7, 0x11,
- 0x8c, 0x0b, 0x6f, 0xe0,
- 0x64, 0xcd, 0x0c, 0x15,
- 0x02, 0x8a, 0xc0, 0x05,
- 0x80, 0xf5, 0xe5, 0x94,
- 0x8c, 0x0b, 0x01, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0xc8,
- 0x8c, 0x0b, 0x3b, 0x11,
- 0xef, 0xe0, 0x47, 0x48,
- 0x60, 0x04, 0x42, 0x46,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0x08,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0xbc, 0x83, 0xb1,
- 0xe1, 0x94, 0x00, 0x46,
- 0xa1, 0xab, 0x80, 0xa8,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x67, 0x38, 0x8c, 0x0b,
- 0x94, 0x1b, 0x6f, 0xc8,
- 0x0e, 0x08, 0xa1, 0x0b,
- 0x0e, 0x60, 0xc0, 0x00,
- 0x40, 0xb3, 0x64, 0x51,
- 0x60, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xe0,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x02, 0x04, 0xc0, 0x2d,
- 0x42, 0x0a, 0xe1, 0x90,
- 0x82, 0x19, 0x60, 0x80,
- 0x06, 0x31, 0x4c, 0x13,
- 0x40, 0x0a, 0x40, 0x16,
- 0x86, 0x25, 0xe0, 0x84,
- 0x6c, 0x11, 0x0c, 0x19,
- 0x42, 0x4a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0x61, 0x38, 0x03, 0x06,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x40, 0x4a, 0x84, 0x14,
- 0x42, 0x25, 0xe0, 0x88,
- 0x0c, 0x09, 0xc0, 0x00,
- 0xc0, 0x2d, 0x07, 0xcd,
- 0x40, 0x00, 0xfe, 0x35,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x64, 0xd1, 0x00, 0x60,
- 0x10, 0x60, 0x40, 0xb3,
- 0xc0, 0xaf, 0x64, 0x11,
- 0x81, 0xa1, 0x0f, 0x0e,
- 0x81, 0x91, 0x13, 0xa5,
- 0xfb, 0xfc, 0x16, 0x0a,
- 0x13, 0x11, 0xa6, 0x05,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x12, 0x0a, 0xef, 0xe0,
- 0x41, 0x06, 0x7b, 0xfc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x41, 0x26, 0x9c, 0xa5,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5d, 0xd8, 0x8c, 0x0b,
- 0x0f, 0x14, 0xe8, 0x00,
- 0x63, 0x38, 0x8c, 0x0b,
- 0x19, 0x11, 0xef, 0xe0,
- 0x7f, 0xf8, 0x8c, 0x0b,
- 0x41, 0x66, 0xef, 0xdc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6f, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x00,
- 0x98, 0xf5, 0xa1, 0xab,
- 0xe0, 0x00, 0x41, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x10, 0x59, 0x68,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x46, 0x96, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x78, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x14,
- 0x94, 0x35, 0xa1, 0xab,
- 0x6d, 0x09, 0x0c, 0x09,
- 0x0c, 0x1b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6c, 0x04, 0x04, 0x00,
- 0xe0, 0x00, 0x41, 0x56,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x9e, 0x29, 0x40, 0x2b,
- 0x8c, 0x0b, 0x02, 0x19,
- 0xef, 0xc0, 0x77, 0xe8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x76, 0x8e, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0xf8, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xfc,
- 0x8c, 0x35, 0xa1, 0xab,
- 0x61, 0x38, 0x00, 0x06,
- 0xe0, 0x00, 0x43, 0x86,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x1c, 0x85, 0x11,
- 0x5e, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xf4,
- 0x88, 0x35, 0xa1, 0xab,
- 0x6c, 0x71, 0x0c, 0x09,
- 0x43, 0x96, 0x40, 0x2c,
- 0x4c, 0x11, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x19, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x16, 0x06, 0x81, 0x1b,
- 0x01, 0xf5, 0x80, 0x00,
- 0x41, 0x16, 0x81, 0xa1,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x42, 0x38, 0x8c, 0x0b,
- 0x00, 0xab, 0xe8, 0x00,
- 0xa1, 0xab, 0x83, 0x91,
- 0x83, 0x91, 0xe4, 0x25,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x54, 0x68,
- 0x90, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x57, 0xa8,
- 0xd8, 0xe5, 0xa1, 0xab,
- 0x6c, 0x91, 0x0c, 0x09,
- 0x21, 0x0b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x41, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x40, 0x60, 0x40, 0x2b,
- 0x53, 0xd8, 0x9c, 0x00,
- 0x94, 0x0b, 0x8f, 0xc8,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x03, 0x06, 0x00, 0x6b,
- 0x0c, 0x0b, 0xe0, 0x08,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0x11, 0x40, 0x2b,
- 0x6d, 0x09, 0x4c, 0x11,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x81, 0x01, 0x60, 0x94,
- 0x0d, 0x0d, 0x0c, 0x19,
- 0x4c, 0x03, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x71,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x42, 0x10, 0xc0, 0x2c,
- 0x4c, 0x11, 0xdc, 0x40,
- 0xc0, 0x2c, 0x0d, 0x0d,
- 0x69, 0x65, 0x0c, 0x15,
- 0x0c, 0x29, 0xc0, 0x0d,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x00, 0x02, 0x1a,
- 0xa0, 0x00, 0x00, 0x38,
- 0x44, 0x20, 0x80, 0xc5,
- 0x4c, 0x21, 0xf3, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x44, 0x20, 0x40, 0x16,
- 0x4c, 0x01, 0xf3, 0xe0,
- 0x40, 0x2c, 0x6c, 0xed,
- 0x4c, 0x21, 0xc2, 0x29,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x6c, 0xf1, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x03, 0xe0, 0x94,
- 0x40, 0x16, 0x06, 0x81,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x0c, 0xf9, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x01, 0xe0, 0x8c,
- 0x40, 0x2c, 0x0c, 0xfd,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x03, 0x35, 0x4c, 0x05,
- 0x42, 0x0a, 0x40, 0x0b,
- 0x4c, 0x21, 0xe0, 0x9c,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x68, 0x58, 0x80, 0xe5,
- 0x8c, 0x0b, 0x6f, 0xf0,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x86, 0x25, 0xe0, 0xa0,
- 0x67, 0xf1, 0x0c, 0x59,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x67, 0xed, 0x0c, 0x49,
- 0x0c, 0x39, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xe5, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe1,
- 0xe8, 0x04, 0x41, 0x88,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9e, 0xf5,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xa4, 0x42, 0x0a,
- 0x03, 0x11, 0x82, 0x85,
- 0x4e, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9c, 0x35,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xb8, 0x42, 0x0a,
- 0x7b, 0xf8, 0x80, 0xe5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x09, 0x98, 0xb5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xdc, 0x00, 0x40, 0x60,
- 0xcf, 0xec, 0x67, 0xc8,
- 0x65, 0x51, 0x0c, 0x09,
- 0x43, 0x46, 0x40, 0x2b,
- 0x04, 0x14, 0xe1, 0x04,
- 0x00, 0x00, 0x85, 0x51,
- 0x8e, 0x09, 0xec, 0x04,
- 0x0c, 0x09, 0x84, 0x06,
- 0xc0, 0x38, 0x63, 0x2d,
- 0x40, 0x06, 0x21, 0x0b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x82, 0xf5,
- 0xc0, 0x38, 0x63, 0x15,
- 0x02, 0x45, 0xa5, 0x0b,
- 0x80, 0x00, 0x0a, 0x86,
- 0x00, 0xc5, 0xa3, 0x0b,
- 0x80, 0x00, 0x0a, 0x66,
- 0x0a, 0x46, 0xa1, 0x0b,
- 0x02, 0x60, 0x80, 0x00,
- 0x40, 0x54, 0x65, 0x41,
- 0x64, 0x11, 0x04, 0x60,
- 0x08, 0x60, 0xc0, 0x9e,
- 0x40, 0xa2, 0x66, 0x71,
- 0xe4, 0x30, 0x00, 0xf0,
- 0x06, 0xf0, 0x21, 0x56,
- 0x7f, 0x58, 0xe4, 0x10,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x02, 0x06, 0x40, 0x2b,
- 0x84, 0xb5, 0xc0, 0x04,
- 0x60, 0x08, 0x44, 0x16,
- 0x64, 0x50, 0x00, 0x60,
- 0x4c, 0x21, 0xc0, 0x9e,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0xa1, 0x02, 0x60,
- 0x78, 0x18, 0xc0, 0xa3,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x29, 0x86, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x02, 0x16,
- 0x6e, 0x8d, 0x4c, 0x15,
- 0x0e, 0x56, 0x40, 0x0a,
- 0x4c, 0x05, 0xe0, 0x0c,
- 0x40, 0x0a, 0x6e, 0x89,
- 0xe0, 0x0c, 0x02, 0x56,
- 0x6f, 0xc8, 0x49, 0x48,
- 0x0e, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x69, 0x65, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0d,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x41, 0x46, 0x84, 0xe5,
- 0x4b, 0xe6, 0x61, 0x4c,
- 0x00, 0x04, 0xe0, 0x0c,
- 0x66, 0xd1, 0x06, 0x60,
- 0x0c, 0x29, 0xc0, 0x54,
- 0x40, 0x15, 0x63, 0x0d,
- 0x66, 0xe1, 0x08, 0x60,
- 0x0c, 0x19, 0xc0, 0xa3,
- 0xc0, 0x15, 0x63, 0x09,
- 0x6c, 0x1d, 0x4c, 0x51,
- 0x62, 0x78, 0xc0, 0x2b,
- 0x0c, 0x09, 0xef, 0xa0,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0x60, 0x94, 0x40, 0x4a,
- 0xe0, 0x0c, 0x00, 0x46,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x86, 0x45, 0xc0, 0x2b,
- 0x66, 0xb1, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0xbf,
- 0xc0, 0xc0, 0x65, 0x21,
- 0x64, 0xc1, 0x04, 0x60,
- 0x06, 0x60, 0x40, 0xad,
- 0xc0, 0xad, 0x65, 0x21,
- 0x6f, 0xac, 0x72, 0x88,
- 0x66, 0x20, 0x08, 0x60,
- 0x00, 0x60, 0xc0, 0xae,
- 0x40, 0xd8, 0x65, 0x61,
- 0x70, 0x78, 0x81, 0x11,
- 0x04, 0xc6, 0x6f, 0x70,
- 0x77, 0x65, 0xe0, 0x10,
- 0xc1, 0xc3, 0x81, 0x71,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x03, 0x16, 0x40, 0x2c,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6c, 0x79, 0x00, 0x19,
- 0x00, 0x79, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0x75,
- 0xfc, 0x00, 0x10, 0xc4,
- 0x6d, 0x0d, 0x40, 0x81,
- 0x00, 0xab, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x00, 0x19, 0x8d, 0x1e,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x63, 0x15, 0x00, 0xb5,
- 0x00, 0x69, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6c, 0xf9,
- 0x00, 0x19, 0x8f, 0x1e,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x66, 0x35, 0x00, 0x5b,
- 0x00, 0x99, 0xc0, 0x16,
- 0xc0, 0x2c, 0x6c, 0xf1,
- 0xf8, 0x60, 0x08, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x0f, 0x1b, 0x86, 0x55,
- 0x06, 0x10, 0x83, 0x31,
- 0x02, 0x0a, 0x44, 0x04,
- 0x06, 0x16, 0xe3, 0xfc,
- 0x12, 0x0a, 0x00, 0x00,
- 0x40, 0x31, 0xe3, 0xfc,
- 0x40, 0x2c, 0x6c, 0xf5,
- 0x80, 0x85, 0x83, 0x21,
- 0x04, 0x90, 0x95, 0x9b,
- 0x40, 0x21, 0xc4, 0x04,
- 0x40, 0x2c, 0x6c, 0xf1,
- 0x82, 0xcf, 0xf1, 0x11,
- 0xc4, 0xc9, 0x07, 0x65,
- 0x63, 0xfc, 0x02, 0x0a,
- 0x16, 0x54, 0x96, 0x4b,
- 0x83, 0x21, 0x61, 0xb4,
- 0x83, 0x31, 0x02, 0x45,
- 0xe0, 0x84, 0x06, 0x74,
- 0xfa, 0x80, 0x06, 0x34,
- 0x83, 0x31, 0x07, 0x1b,
- 0xc4, 0x04, 0x06, 0x10,
- 0x6c, 0xf5, 0x40, 0x31,
- 0x12, 0x0a, 0x40, 0x2c,
- 0x80, 0xe5, 0xe3, 0xfc,
- 0x02, 0xa4, 0xc2, 0xa7,
- 0x83, 0x9b, 0xfa, 0x80,
- 0xc4, 0x04, 0x04, 0x90,
- 0x6c, 0xf1, 0x40, 0x21,
- 0x56, 0x0a, 0x40, 0x2c,
- 0x80, 0xa5, 0xe0, 0x80,
- 0xfa, 0x80, 0x02, 0x34,
- 0x80, 0xf5, 0xce, 0x1d,
- 0xe0, 0x80, 0x56, 0x4a,
- 0x46, 0x4a, 0x80, 0xe5,
- 0x80, 0x85, 0xe0, 0x80,
- 0x58, 0x80, 0x01, 0x55,
- 0x58, 0xc0, 0xfc, 0x18,
- 0x08, 0xbb, 0xf3, 0xe0,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6d, 0x0d, 0x40, 0xc1,
- 0x58, 0x0a, 0x40, 0x2c,
- 0x82, 0xc5, 0xe0, 0x84,
- 0xfa, 0x80, 0x02, 0x64,
- 0x83, 0x11, 0x0f, 0x1b,
- 0x44, 0x04, 0x02, 0x60,
- 0xf3, 0xfc, 0x0c, 0x0a,
- 0x80, 0x00, 0x02, 0x16,
- 0x6c, 0xf9, 0x40, 0x11,
- 0x00, 0x29, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xff, 0xf8, 0x02, 0x0e,
- 0xff, 0xf8, 0x0c, 0x0e,
- 0xe3, 0xfc, 0x04, 0x0a,
- 0x44, 0x04, 0x02, 0x20,
- 0xe0, 0xb4, 0x4a, 0x0a,
- 0x6c, 0xfd, 0x40, 0x11,
- 0x88, 0x55, 0xc0, 0x2c,
- 0x42, 0xc2, 0x91, 0x11,
- 0x18, 0xc4, 0x78, 0x84,
- 0x22, 0xcf, 0xfc, 0x0c,
- 0x40, 0xc1, 0xa1, 0x1b,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x8d, 0x14, 0x90, 0x15,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x80, 0xe5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x84, 0xf5, 0x83, 0x2b,
- 0x6c, 0xed, 0x00, 0x19,
- 0x83, 0x21, 0x40, 0x2c,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0xc0, 0x2c,
- 0x88, 0xd5, 0xe3, 0xf0,
- 0x8d, 0x14, 0x85, 0x75,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x82, 0xa5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x80, 0xe5, 0x83, 0x2b,
- 0xe4, 0x04, 0x02, 0x30,
- 0x6d, 0x09, 0x40, 0x11,
- 0x83, 0x95, 0xc0, 0x2c,
- 0x6c, 0xed, 0x00, 0x19,
- 0x91, 0x21, 0x40, 0x2c,
- 0x78, 0x88, 0x44, 0xc2,
- 0xfc, 0x0c, 0x18, 0xc4,
- 0x83, 0x21, 0x24, 0xcf,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0x40, 0x2c,
- 0x40, 0xc1, 0xe3, 0xf0,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x0c, 0x10, 0x80, 0x65,
- 0x40, 0x61, 0xe4, 0x04,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x6c, 0xed, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0x42, 0xc0, 0x82, 0xc5,
- 0x40, 0x11, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x42, 0x10, 0x90, 0x18,
- 0x90, 0x16, 0xf3, 0xf8,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x83, 0x15, 0xc0, 0x2c,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x19, 0x82, 0x25,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x58, 0xc0, 0x00, 0xb5,
- 0x58, 0xc0, 0xdc, 0x40,
- 0x40, 0xc1, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x15, 0x84, 0x05,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x63, 0x35, 0x00, 0x25,
- 0x83, 0x11, 0x40, 0x0b,
- 0x02, 0x20, 0x97, 0x2b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x63, 0x35,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x0c, 0x46, 0x88,
- 0x0e, 0x01, 0x80, 0x7b,
- 0x40, 0x2c, 0x6d, 0x01,
- 0x00, 0x8a, 0x81, 0x61,
- 0x82, 0xd5, 0xe1, 0xb8,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x0c, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x60, 0x0c,
- 0xef, 0xc4, 0x70, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0x6c, 0x6d, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x82, 0x65, 0xe0, 0x8c,
- 0x63, 0x35, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0b,
- 0x0c, 0x15, 0x82, 0x65,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x80, 0xd5, 0x83, 0x0b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x05, 0x55, 0xc0, 0x2c,
- 0x0c, 0x09, 0xc6, 0x09,
- 0xc0, 0x2c, 0x6c, 0x6d,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x86, 0x25,
- 0xc0, 0x2c, 0x6c, 0x89,
- 0x84, 0x85, 0xa1, 0x0b,
- 0x68, 0x0c, 0x42, 0x48,
- 0x0c, 0x11, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x6c, 0x89, 0x0c, 0x29,
- 0x0c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xf1, 0x88, 0x46, 0x12,
- 0x82, 0xf5, 0x87, 0x0d,
- 0x84, 0x0d, 0x82, 0x23,
- 0x0c, 0x09, 0x82, 0x95,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x6d, 0x15, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x2c,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x4c, 0x11, 0xc6, 0x19,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xc1, 0xc3, 0xff, 0x35,
- 0x82, 0xc5, 0xa9, 0x3b,
- 0x02, 0xa5, 0xa3, 0x3b,
- 0x81, 0x88, 0x04, 0x24,
- 0x84, 0x85, 0xa5, 0x3b,
- 0x84, 0x85, 0xa7, 0x3b,
- 0x5c, 0x08, 0xa1, 0x3b,
- 0x0f, 0xd8, 0xda, 0x00,
- 0x89, 0x75, 0xff, 0x70,
- 0x5c, 0x08, 0xa1, 0x2b,
- 0x45, 0x34, 0x9a, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x7b, 0xfd, 0x46, 0x30,
- 0xc1, 0x3e, 0xdf, 0xff,
- 0x81, 0x31, 0xff, 0x65,
- 0x83, 0x31, 0x81, 0x45,
- 0xdd, 0x93, 0x81, 0x25,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x4b, 0xfe, 0x01, 0x41,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x04, 0x84, 0x85, 0x95,
- 0x06, 0x74, 0xa3, 0x3b,
- 0xc4, 0xc4, 0x88, 0x41,
- 0xa0, 0x11, 0x46, 0x64,
- 0x1b, 0xfd, 0x50, 0x80,
- 0x4e, 0x70, 0x9f, 0xff,
- 0x1f, 0xff, 0x1b, 0xfd,
- 0x12, 0x74, 0x8a, 0x8f,
- 0x58, 0xc0, 0x60, 0xe0,
- 0x9f, 0xff, 0x1b, 0xfc,
- 0x1b, 0xfd, 0x4c, 0x60,
- 0xb0, 0x9f, 0x1f, 0xff,
- 0x10, 0xc4, 0x51, 0x77,
- 0x61, 0xc7, 0xe0, 0xc0,
- 0xfb, 0x80, 0x0e, 0x74,
- 0x18, 0xc4, 0x50, 0x67,
- 0x2e, 0x8f, 0xfa, 0x80,
- 0x40, 0x95, 0xb8, 0x6f,
- 0x40, 0x85, 0xf8, 0x08,
- 0x40, 0x65, 0xf8, 0x04,
- 0xc5, 0x4d, 0xf0, 0x0c,
- 0x0c, 0x0c, 0xf4, 0xf5,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x49, 0xfe, 0x01, 0x31,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x7f, 0xf1, 0x0a, 0x0e,
- 0x18, 0x0e, 0x40, 0x3f,
- 0xc0, 0x3f, 0x70, 0x01,
- 0x02, 0x65, 0x83, 0xd5,
- 0x86, 0x31, 0x70, 0x0c,
- 0xf8, 0x08, 0x02, 0x75,
- 0xf8, 0x04, 0x02, 0x85,
- 0x78, 0x10, 0x52, 0x62,
- 0x40, 0x95, 0xf1, 0x67,
- 0x12, 0x74, 0x78, 0x08,
- 0x0a, 0x9f, 0xe0, 0xa0,
- 0x2c, 0x9f, 0xe1, 0x77,
- 0xe0, 0xc0, 0x0c, 0x84,
- 0x78, 0x04, 0x40, 0x95,
- 0x2e, 0x6f, 0x98, 0x6f,
- 0x40, 0x65, 0xd1, 0x87,
- 0x40, 0x85, 0xf0, 0x10,
- 0xc5, 0x3d, 0xf8, 0x0c,
- 0x0c, 0x0c, 0xf8, 0x75,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x18, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0xbe, 0x3e, 0xe0, 0x10,
- 0xc5, 0x27, 0x7c, 0x3e,
- 0xa7, 0x2b, 0x7e, 0x3e,
- 0x66, 0x8a, 0x46, 0x4a,
- 0x0a, 0x26, 0x83, 0x41,
- 0x18, 0x06, 0x00, 0x00,
- 0x82, 0x65, 0x80, 0x00,
- 0x81, 0x51, 0x25, 0x2b,
- 0x81, 0x41, 0x03, 0xc1,
- 0xa3, 0x2b, 0x80, 0xc5,
- 0x01, 0x51, 0x80, 0xf5,
- 0x81, 0x41, 0x81, 0xc1,
- 0xfc, 0xce, 0xbe, 0x5e,
- 0xc0, 0x08, 0xfe, 0x4e,
- 0x00, 0x34, 0x00, 0x13,
- 0x01, 0xb5, 0xfa, 0x80,
- 0x48, 0x4a, 0x81, 0x31,
- 0x0a, 0xf0, 0x61, 0x0a,
- 0x82, 0x31, 0xe4, 0x10,
- 0x0a, 0x45, 0xc4, 0x47,
- 0xc5, 0x46, 0xfc, 0x10,
- 0xfa, 0x80, 0x08, 0x34,
- 0xfc, 0x95, 0xc1, 0x4d,
- 0xa0, 0xf1, 0x01, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x1c, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0x85, 0x51, 0x60, 0x14,
- 0x7c, 0x3e, 0xbe, 0x3e,
- 0x27, 0x2b, 0xc5, 0x27,
- 0xe6, 0x8a, 0x48, 0x4a,
- 0x18, 0x16, 0x7e, 0x3e,
- 0x82, 0x05, 0x80, 0x00,
- 0x81, 0xc1, 0x25, 0x2b,
- 0xa3, 0x2b, 0x80, 0xa5,
- 0x01, 0x51, 0x80, 0xd5,
- 0xbe, 0x5e, 0x81, 0xc1,
- 0xfe, 0xce, 0xfc, 0x3e,
- 0x81, 0x31, 0x42, 0x08,
- 0x00, 0x44, 0x00, 0x13,
- 0x81, 0xa5, 0xfa, 0x80,
- 0x61, 0x0a, 0x48, 0x4a,
- 0xe4, 0x10, 0x0a, 0xf0,
- 0xc4, 0x47, 0x82, 0x31,
- 0xfc, 0x10, 0x0a, 0x45,
- 0x08, 0x34, 0xc5, 0x46,
- 0xc1, 0x4d, 0xfa, 0x80,
- 0x01, 0x01, 0xfc, 0x95,
- 0xdd, 0x93, 0xa0, 0xf1,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x0c, 0x07, 0xc6,
- 0xe1, 0x0c, 0x49, 0x06,
- 0x46, 0x06, 0x0c, 0xc4,
- 0x0c, 0x64, 0xe1, 0x0c,
- 0xe1, 0x0c, 0x46, 0x86,
- 0x4f, 0x86, 0x10, 0x54,
- 0x0c, 0x44, 0xe1, 0x0c,
- 0x1c, 0x34, 0x8b, 0x81,
- 0xe4, 0x60, 0x0e, 0x00,
- 0x1c, 0x98, 0x81, 0x75,
- 0xec, 0x04, 0x10, 0x80,
- 0xdd, 0x98, 0xf1, 0x96,
- 0xa1, 0x8b, 0xd9, 0x96,
- 0x18, 0x00, 0xfe, 0x35,
- 0x89, 0x61, 0x64, 0x74,
- 0x71, 0x78, 0x81, 0x55,
- 0xec, 0x04, 0x0c, 0x60,
- 0xa1, 0x6b, 0xd5, 0x76,
- 0x1d, 0x51, 0xfe, 0x75,
- 0x81, 0x55, 0x80, 0xcb,
- 0x0a, 0x50, 0x71, 0x68,
- 0xd1, 0x66, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x5b,
- 0x95, 0x41, 0x1c, 0x01,
- 0x41, 0x58, 0x81, 0x55,
- 0xec, 0x04, 0x08, 0x40,
- 0xa1, 0x4b, 0xcd, 0x56,
- 0x00, 0x20, 0xfe, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x80, 0x00, 0x34,
- 0x08, 0x00, 0x81, 0xc1,
- 0x00, 0x34, 0x6c, 0x04,
- 0x0a, 0x00, 0xe8, 0x88,
- 0x81, 0x01, 0x6c, 0x04,
- 0x81, 0x61, 0x03, 0x45,
- 0x0e, 0x54, 0xe9, 0x2d,
- 0x00, 0x04, 0x48, 0xb0,
- 0x82, 0x55, 0xdb, 0x80,
- 0xe8, 0xb0, 0x0e, 0x44,
- 0x00, 0x60, 0x00, 0x73,
- 0x00, 0x34, 0xe4, 0x30,
- 0x0e, 0x74, 0x68, 0x80,
- 0x0e, 0x03, 0xfb, 0x80,
- 0x86, 0xc1, 0x82, 0x61,
- 0xfa, 0xb5, 0x8d, 0x1b,
- 0x61, 0x04, 0x42, 0x06,
- 0x6b, 0xfc, 0x01, 0x0a,
- 0x04, 0x14, 0xc0, 0xff,
- 0xdb, 0x80, 0x00, 0x04,
- 0x04, 0x01, 0x00, 0x00,
- 0x04, 0x0c, 0xc0, 0x80,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x16, 0x00, 0x6b,
- 0x62, 0x98, 0xe0, 0x00,
- 0x0c, 0x09, 0xe8, 0x0c,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xe1, 0x0c, 0x42, 0x46,
- 0x0e, 0x60, 0x04, 0x14,
- 0xc0, 0xaf, 0x64, 0x31,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0x04, 0x06, 0xe2, 0x00,
- 0x71, 0x58, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xfc,
- 0x64, 0x38, 0x02, 0x60,
- 0x74, 0x78, 0x8e, 0x0b,
- 0x0c, 0x19, 0xef, 0xfc,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe4, 0x60, 0x00, 0x60,
- 0x6c, 0x41, 0x0c, 0x29,
- 0x81, 0x31, 0x40, 0x2b,
- 0x0c, 0x49, 0x81, 0x85,
- 0xa1, 0x4b, 0xfc, 0x04,
- 0x41, 0x16, 0x80, 0x75,
- 0x82, 0x11, 0x82, 0x31,
- 0xfe, 0x15, 0xc5, 0x3d,
- 0x6c, 0x3d, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x2b,
- 0x0c, 0x39, 0xe4, 0x74,
- 0x40, 0x2b, 0x6c, 0x45,
- 0x44, 0x62, 0x81, 0x41,
- 0x01, 0x95, 0xf0, 0x80,
- 0x88, 0x58, 0x9c, 0x21,
- 0x80, 0x75, 0xa1, 0x5b,
- 0x82, 0x41, 0x45, 0x06,
- 0x82, 0x21, 0x02, 0x01,
- 0xfe, 0x15, 0xc7, 0x4d,
- 0x6c, 0x45, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6c, 0x41, 0x0c, 0x19,
- 0x74, 0x78, 0xc0, 0x2b,
- 0x42, 0x98, 0xef, 0xfc,
- 0x8c, 0x0b, 0x68, 0x10,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x40, 0x1e, 0xf0,
- 0x40, 0x16, 0x00, 0x6b,
- 0x08, 0x9b, 0xe0, 0x04,
- 0x4c, 0x01, 0x86, 0xab,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x01, 0x01, 0x84, 0xbb,
- 0x5e, 0xb1, 0x82, 0x8b,
- 0x8a, 0x7b, 0x61, 0x30,
- 0x61, 0x20, 0x5e, 0xa1,
- 0xe2, 0x80, 0x02, 0x06,
- 0xe1, 0x10, 0x5e, 0x91,
- 0x9f, 0x0e, 0xa1, 0x0e,
- 0x5e, 0x01, 0x9d, 0x0e,
- 0x5e, 0x01, 0xe0, 0xd0,
- 0x5e, 0x01, 0xe0, 0xc0,
- 0x8c, 0x0b, 0x60, 0xb0,
- 0xe8, 0x0c, 0x5b, 0x68,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x3b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x69, 0xa8,
- 0x60, 0x90, 0x00, 0x84,
- 0xe1, 0x8c, 0x02, 0x84,
- 0x40, 0x00, 0x0d, 0x8e,
- 0x4e, 0x09, 0xf1, 0xc0,
- 0xe0, 0x04, 0x0e, 0x6a,
- 0x71, 0x84, 0x50, 0x02,
- 0x93, 0x7e, 0x8f, 0x01,
- 0x00, 0xb8, 0x95, 0x8e,
- 0x80, 0x00, 0x40, 0x01,
- 0xfa, 0x80, 0x00, 0x84,
- 0x15, 0x0e, 0x90, 0x01,
- 0x5e, 0x01, 0x91, 0x01,
- 0x9f, 0x01, 0x60, 0xb0,
- 0x40, 0xa2, 0x0f, 0x0e,
- 0xb2, 0x0f, 0xf9, 0xac,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x4f, 0x76, 0x1e, 0x89,
- 0x11, 0x8e, 0xe0, 0x00,
- 0xf0, 0xac, 0x50, 0xa2,
- 0x92, 0x83, 0x07, 0x65,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x4a, 0x58, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0x5e, 0xb1, 0xa1, 0x0b,
- 0x5e, 0xa1, 0xc1, 0x30,
- 0x5e, 0x91, 0xc1, 0x20,
- 0x15, 0x48, 0xc1, 0x10,
- 0x16, 0x0a, 0xc0, 0x00,
- 0x81, 0x01, 0x70, 0x00,
- 0x44, 0x04, 0x00, 0xb0,
- 0xf0, 0x00, 0x16, 0x4a,
- 0x62, 0x00, 0x02, 0x0c,
- 0xf0, 0x00, 0x14, 0x4a,
- 0x62, 0x00, 0x04, 0x0c,
- 0x14, 0x1a, 0x82, 0x83,
- 0x81, 0x11, 0x70, 0x00,
- 0x24, 0x05, 0x02, 0xa0,
- 0x84, 0x83, 0x40, 0x00,
- 0x70, 0x00, 0x12, 0x4a,
- 0x06, 0x0c, 0x81, 0x21,
- 0x12, 0x1a, 0x62, 0x00,
- 0x04, 0x90, 0xf0, 0x00,
- 0x40, 0x00, 0x24, 0x05,
- 0x04, 0x9b, 0x86, 0x83,
- 0x80, 0xbb, 0x82, 0xab,
- 0xf2, 0x65, 0xe8, 0x8d,
- 0x5e, 0xb1, 0x93, 0x04,
- 0x5e, 0xa1, 0xe1, 0x30,
- 0x11, 0x04, 0xe1, 0x20,
- 0x5e, 0x91, 0xa3, 0x0b,
- 0x5e, 0x07, 0xe1, 0x10,
- 0x15, 0x04, 0xe0, 0x3c,
- 0xe4, 0x20, 0x0e, 0x00,
- 0x1e, 0x75, 0x89, 0x7e,
- 0x16, 0x0a, 0x40, 0x20,
- 0x10, 0x74, 0xfb, 0xfc,
- 0xb0, 0x03, 0xfa, 0x80,
- 0x44, 0x00, 0x0c, 0x25,
- 0x15, 0x04, 0xf0, 0x7c,
- 0xe0, 0x80, 0x50, 0x0a,
- 0xa1, 0x2b, 0x88, 0x75,
- 0xa0, 0x01, 0x88, 0x85,
- 0x60, 0xd0, 0x5e, 0x01,
- 0xf3, 0xc0, 0x42, 0x00,
- 0x65, 0xc4, 0x02, 0x8a,
- 0x02, 0x80, 0x8e, 0x0b,
- 0x00, 0x80, 0x04, 0x3c,
- 0x5e, 0x11, 0x8c, 0x04,
- 0x83, 0x85, 0x80, 0xd0,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x44, 0x18, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x0f, 0x48, 0xa1, 0x0b,
- 0x9b, 0xa1, 0xc0, 0x00,
- 0xe1, 0x20, 0x5e, 0xa1,
- 0xa1, 0x2b, 0xf1, 0x45,
- 0x84, 0x40, 0x00, 0x00,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x16, 0xf0, 0x65, 0x00,
- 0x3e, 0x0e, 0xe4, 0xd0,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x04, 0xf0, 0x0b, 0x2e,
- 0x3c, 0xbe, 0xe5, 0x30,
- 0xe4, 0xb0, 0x0a, 0xf0,
- 0x8c, 0x0b, 0x01, 0x11,
- 0x68, 0x00, 0x4d, 0xe8,
- 0x1e, 0xa9, 0x8c, 0x3b,
- 0x14, 0x0a, 0x60, 0xc0,
- 0x86, 0x05, 0xfb, 0xfc,
- 0xe0, 0x80, 0x4e, 0x0a,
- 0x44, 0x3c, 0x02, 0x70,
- 0xcc, 0x04, 0x00, 0x70,
- 0xc0, 0xd0, 0x5e, 0x11,
- 0x8b, 0x04, 0x82, 0xb5,
- 0xe0, 0x40, 0x00, 0x0a,
- 0xc0, 0x28, 0x1e, 0x05,
- 0xc4, 0x40, 0x00, 0x00,
- 0x80, 0x28, 0x1e, 0x05,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xf0,
- 0x3e, 0x0e, 0xe5, 0x20,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x03, 0x11, 0xe4, 0xb0,
- 0x4b, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x60, 0xc0, 0x1e, 0x99,
- 0xfb, 0xfc, 0x12, 0x0a,
- 0x50, 0x4a, 0x86, 0xa5,
- 0x0e, 0x70, 0xe0, 0x80,
- 0x5e, 0x71, 0xcc, 0x04,
- 0x84, 0x95, 0xc0, 0xd0,
- 0xa1, 0x0b, 0x8b, 0x04,
- 0x80, 0x28, 0x1e, 0x05,
- 0x80, 0xd0, 0x5e, 0x01,
- 0x95, 0x04, 0x82, 0xa5,
- 0x5e, 0x01, 0xa0, 0x01,
- 0x42, 0x00, 0x60, 0xd0,
- 0x02, 0x8a, 0xf3, 0xc0,
- 0x0e, 0x80, 0xe5, 0xc4,
- 0x5e, 0x71, 0x8c, 0x08,
- 0x5e, 0x71, 0x80, 0xd0,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xe0,
- 0x3e, 0x0e, 0xe5, 0x10,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x05, 0x11, 0xe4, 0xb0,
- 0x48, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x80, 0x7b, 0x85, 0x81,
- 0x96, 0xd5, 0xa1, 0x7b,
- 0x8c, 0x3b, 0x13, 0x14,
- 0x1e, 0x19, 0x8f, 0x04,
- 0xa1, 0x1b, 0x60, 0xc0,
- 0x40, 0x10, 0x1e, 0x25,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfb, 0x80, 0x40, 0xa2,
- 0x7b, 0x80, 0x40, 0x92,
- 0xfa, 0x80, 0x02, 0x14,
- 0x40, 0x20, 0x5e, 0x25,
- 0xfb, 0x80, 0x42, 0x12,
- 0x04, 0x04, 0x91, 0x04,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0xe8, 0x04, 0x56, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x0b, 0x90, 0x35,
- 0x4c, 0xd8, 0x8c, 0x1b,
- 0x1e, 0x07, 0xe8, 0x00,
- 0x40, 0xc6, 0x60, 0x3c,
- 0x00, 0x04, 0xe1, 0x08,
- 0x01, 0x21, 0x85, 0x11,
- 0x02, 0x06, 0x81, 0x71,
- 0x00, 0x16, 0xc0, 0x00,
- 0xe1, 0x08, 0x41, 0x06,
- 0x02, 0x2c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x41, 0x86,
- 0x02, 0x0c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0xc6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x00, 0x06,
- 0x83, 0x11, 0x00, 0x04,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x00, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x8d, 0x34, 0x80, 0x26,
- 0x9f, 0x14, 0xa1, 0x04,
- 0x4c, 0x31, 0x9d, 0x24,
- 0xc0, 0x27, 0x67, 0xe1,
- 0x67, 0xe5, 0x4c, 0x01,
- 0x4c, 0x11, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xed, 0x4c, 0x21,
- 0x4c, 0x71, 0xc0, 0x27,
- 0x40, 0x27, 0x67, 0xf5,
- 0x13, 0x04, 0xa9, 0x31,
- 0x9f, 0x24, 0x8b, 0x41,
- 0x1d, 0x04, 0xa1, 0x14,
- 0x46, 0x16, 0xa1, 0x0b,
- 0x08, 0xf6, 0x40, 0x00,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xd0, 0x17, 0x66, 0x8e,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x80, 0x23, 0x82, 0x23,
- 0x69, 0x59, 0x4c, 0x25,
- 0x0e, 0x0b, 0xc0, 0x08,
- 0xe5, 0x40, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x93, 0x34, 0x8f, 0x3e,
- 0x8b, 0x75, 0x91, 0x64,
- 0x94, 0x88, 0x90, 0x98,
- 0x94, 0xf5, 0xd1, 0x9d,
- 0x50, 0x02, 0x18, 0xa8,
- 0x10, 0x79, 0xf0, 0xa4,
- 0x40, 0x27, 0x63, 0x41,
- 0x56, 0xa2, 0x83, 0xc1,
- 0x10, 0xb4, 0xf1, 0xa4,
- 0x4e, 0x70, 0x61, 0x90,
- 0x16, 0x84, 0xfb, 0xfc,
- 0x16, 0xc4, 0xfa, 0x80,
- 0x96, 0x7f, 0xe8, 0xac,
- 0x86, 0x75, 0xa1, 0x7b,
- 0x10, 0x8a, 0x0f, 0xc4,
- 0x0e, 0xb6, 0xf4, 0x10,
- 0x16, 0x16, 0x00, 0x00,
- 0x4e, 0x72, 0x80, 0x00,
- 0x0e, 0x74, 0x91, 0xa0,
- 0x18, 0x79, 0x9a, 0x80,
- 0x16, 0xb4, 0x7c, 0x24,
- 0x98, 0x93, 0x88, 0x9c,
- 0xa4, 0x76, 0xb6, 0x7f,
- 0x0e, 0x70, 0x88, 0x78,
- 0x88, 0x76, 0xec, 0x04,
- 0x82, 0x71, 0x8c, 0x74,
- 0x98, 0xa8, 0x8c, 0x7e,
- 0x7a, 0x80, 0x12, 0xa4,
- 0xec, 0x04, 0x0e, 0x10,
- 0x64, 0x80, 0x14, 0x90,
- 0x98, 0xa6, 0xe5, 0x7d,
- 0xa1, 0x1b, 0x84, 0x55,
- 0x14, 0x8a, 0x86, 0x55,
- 0x84, 0xf5, 0xf6, 0x00,
- 0x0e, 0x90, 0x4a, 0xa7,
- 0x50, 0xa0, 0xed, 0x44,
- 0xb0, 0x73, 0xf0, 0x80,
- 0x90, 0x78, 0x98, 0x76,
- 0xec, 0x04, 0x0e, 0x70,
- 0x81, 0xb5, 0x90, 0x76,
- 0xf3, 0xfc, 0x15, 0x0a,
- 0x0e, 0x90, 0x82, 0x15,
- 0x98, 0x76, 0xed, 0x88,
- 0x0e, 0x70, 0x90, 0x78,
- 0x90, 0x76, 0xec, 0x08,
- 0xa1, 0x8b, 0x88, 0x88,
- 0x81, 0xc5, 0xea, 0x15,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x43, 0x66, 0x40, 0x2b,
- 0x6d, 0xb8, 0xe0, 0x08,
- 0x4d, 0x66, 0x6f, 0xc0,
- 0xa1, 0x0b, 0xe0, 0x08,
- 0x81, 0x61, 0x80, 0x55,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x66, 0xb1, 0x04, 0x00,
- 0x91, 0x31, 0x40, 0x8b,
- 0x81, 0x41, 0x01, 0x55,
- 0x06, 0x30, 0x49, 0x4e,
- 0xa1, 0x3b, 0xec, 0x04,
- 0x01, 0x21, 0xfe, 0x95,
- 0x01, 0x51, 0x81, 0x31,
- 0x8b, 0x95, 0x81, 0x41,
- 0x10, 0x44, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xfa, 0x80,
- 0xf4, 0x08, 0x08, 0x8a,
- 0x88, 0x81, 0x04, 0x28,
- 0x81, 0x91, 0x3e, 0x4e,
- 0x0c, 0x24, 0x88, 0xab,
- 0x0e, 0x24, 0x61, 0x94,
- 0x04, 0x69, 0xe1, 0x9c,
- 0xe1, 0x84, 0x18, 0x24,
- 0x0e, 0x24, 0x2e, 0x6f,
- 0x08, 0x79, 0xe1, 0x8c,
- 0x2e, 0x6f, 0x90, 0xc9,
- 0x38, 0x6f, 0x9e, 0x29,
- 0x48, 0x67, 0xa9, 0xc1,
- 0x80, 0x00, 0x58, 0x16,
- 0x8b, 0x61, 0x2c, 0x2f,
- 0x00, 0x00, 0x0c, 0xf6,
- 0xfa, 0x80, 0x0e, 0x24,
- 0x4e, 0x0a, 0x85, 0x75,
- 0x86, 0x65, 0xe4, 0xa4,
- 0x7a, 0x80, 0x08, 0xa4,
- 0xf0, 0x00, 0x06, 0x5a,
- 0x70, 0x00, 0x06, 0x0a,
- 0x04, 0x1c, 0x98, 0xbb,
- 0x02, 0x54, 0x62, 0x00,
- 0x44, 0x47, 0xfa, 0x80,
- 0xdc, 0x00, 0x56, 0x60,
- 0x44, 0x02, 0x05, 0x1b,
- 0x04, 0x15, 0xf0, 0x90,
- 0x40, 0x08, 0x6b, 0xad,
- 0x80, 0x10, 0x16, 0x06,
- 0x44, 0x15, 0x96, 0x13,
- 0xc0, 0x08, 0x6b, 0xad,
- 0x60, 0x0c, 0x12, 0x1a,
- 0x0a, 0x0a, 0x82, 0x91,
- 0x54, 0x80, 0x7b, 0xfc,
- 0x0a, 0x0c, 0xbc, 0x00,
- 0xb1, 0x9b, 0xe2, 0x00,
- 0x7c, 0x24, 0xf6, 0x35,
- 0xbe, 0x44, 0x83, 0x39,
- 0x7c, 0x0c, 0x04, 0x0a,
- 0x02, 0x0c, 0x82, 0x21,
- 0x7e, 0x14, 0xe2, 0x00,
- 0x82, 0x11, 0x82, 0x43,
- 0xf4, 0x3c, 0x05, 0x0a,
- 0x01, 0x01, 0xe8, 0xc5,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x40, 0x56, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7c, 0x0e, 0x81, 0x01,
- 0x71, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0xc0, 0x2b, 0x65, 0xf9,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x01, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x9b,
- 0x4f, 0xf8, 0xc0, 0x00,
- 0x04, 0x06, 0x4f, 0x6c,
- 0x0c, 0x09, 0xc0, 0x18,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x88, 0xf5, 0xab, 0x0b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2c,
- 0xc2, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xef, 0xf4, 0x7a, 0xc8,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0x43, 0x06, 0x21, 0x7b,
- 0x83, 0x21, 0xef, 0xdc,
- 0x40, 0x00, 0x04, 0x26,
- 0xc4, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x82, 0x65, 0xc0, 0x2c,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x61, 0xa8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0xc0, 0x00, 0x0c, 0x38,
- 0x81, 0x11, 0x01, 0x71,
- 0x81, 0xa1, 0x13, 0x55,
- 0x12, 0xb4, 0x3e, 0x34,
- 0xd0, 0x9d, 0xfa, 0x80,
- 0x00, 0x4a, 0x9c, 0x35,
- 0x9a, 0xc5, 0xfb, 0xfc,
- 0x70, 0x00, 0x06, 0x0a,
- 0x01, 0x11, 0x96, 0x0b,
- 0x84, 0x05, 0x81, 0x21,
- 0xf0, 0x04, 0x06, 0x0a,
- 0x00, 0x00, 0x00, 0x06,
- 0x9c, 0x00, 0x42, 0xb0,
- 0x04, 0x06, 0x02, 0x25,
- 0x06, 0x0a, 0x80, 0x00,
- 0x82, 0xb5, 0xf0, 0x08,
- 0x81, 0x11, 0x01, 0x01,
- 0x4c, 0x01, 0x96, 0x2b,
- 0xc0, 0x27, 0x67, 0xe5,
- 0x67, 0xe9, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xed,
- 0x80, 0xf5, 0xa1, 0x7b,
- 0x6f, 0xf4, 0x76, 0x48,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x82, 0x45, 0xa1, 0x7b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x5d, 0xe8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x02, 0xf0, 0xa0, 0xf5,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x00, 0x4e, 0x88,
- 0x80, 0x7b, 0x7c, 0x04,
- 0x65, 0xf9, 0x0c, 0x19,
- 0x44, 0x86, 0x40, 0x2b,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x42, 0x0a, 0xe0, 0x0a,
- 0xcf, 0x07, 0xe0, 0x80,
- 0x84, 0x05, 0xfc, 0x0e,
- 0x7a, 0x80, 0x02, 0xa4,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x14, 0xc0, 0x9b,
- 0x04, 0x33, 0xe0, 0x88,
- 0x8c, 0x0e, 0x82, 0x23,
- 0xe4, 0x00, 0x44, 0xb1,
- 0x44, 0x11, 0xbc, 0x14,
- 0x0c, 0x1b, 0xe5, 0x00,
- 0x40, 0x15, 0x6a, 0xf9,
- 0xc3, 0x0d, 0x82, 0xa1,
- 0xd1, 0x9d, 0x86, 0x25,
- 0x07, 0xf5, 0x0c, 0x09,
- 0x16, 0xb0, 0x40, 0x27,
- 0xe6, 0x75, 0xc4, 0x04,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x88, 0x55, 0xe0, 0x0c,
- 0x41, 0x56, 0x03, 0xc5,
- 0xbc, 0x14, 0xe0, 0x00,
- 0x16, 0x0a, 0x83, 0xd5,
- 0x43, 0xf6, 0x70, 0x14,
- 0x86, 0x15, 0xe0, 0x0c,
- 0x02, 0x0a, 0xbc, 0x14,
- 0x84, 0x95, 0xf0, 0x0c,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x82, 0x15, 0xe0, 0x0c,
- 0xe0, 0x00, 0x41, 0x46,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x43, 0xf6, 0x40, 0x27,
- 0x03, 0x0a, 0xe0, 0x0c,
- 0x86, 0xd5, 0xf4, 0x0c,
- 0x67, 0xf5, 0x0c, 0x09,
- 0x00, 0x4a, 0xc0, 0x27,
- 0x86, 0x05, 0xfb, 0xfc,
- 0x67, 0xe1, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x02, 0x14, 0x3c, 0x1e,
- 0x41, 0xd8, 0xfa, 0x80,
- 0x80, 0x8b, 0xe8, 0x00,
- 0x16, 0x56, 0xeb, 0x8d,
- 0x00, 0x06, 0x00, 0x00,
- 0xd4, 0x65, 0x80, 0x00,
- 0xe0, 0x00, 0x41, 0x36,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x4c, 0xa1, 0xc0, 0x27,
- 0x40, 0x26, 0x6c, 0xf1,
- 0x73, 0xd8, 0x8c, 0x0b,
- 0x41, 0x06, 0xef, 0xb4,
- 0x81, 0x11, 0x6f, 0xdc,
- 0x0e, 0x0b, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0xcc,
- 0x67, 0xf1, 0x00, 0x59,
- 0xa7, 0x1b, 0x40, 0x27,
- 0x18, 0x24, 0x01, 0x31,
- 0x15, 0x3c, 0xe1, 0x8c,
- 0x05, 0x41, 0x8f, 0x61,
- 0x80, 0x04, 0x0f, 0x56,
- 0x02, 0x16, 0x04, 0x85,
- 0x25, 0x1b, 0x80, 0x00,
- 0xe0, 0x08, 0x4e, 0xa6,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x10, 0x06,
- 0x23, 0x1b, 0x82, 0x65,
- 0x02, 0x95, 0x81, 0x41,
- 0x03, 0x56, 0x81, 0x11,
- 0x83, 0x41, 0x60, 0x04,
- 0x81, 0x11, 0x29, 0x16,
- 0x12, 0xf0, 0x83, 0x81,
- 0xb0, 0x9f, 0xe4, 0x50,
- 0x38, 0x63, 0xa4, 0x76,
- 0xfb, 0xfc, 0x0a, 0x4a,
- 0x70, 0x1c, 0x58, 0x20,
- 0x0a, 0x64, 0x81, 0x21,
- 0xff, 0x61, 0x7a, 0x80,
- 0x00, 0x00, 0x04, 0x86,
- 0xe8, 0xb0, 0x18, 0x64,
- 0x08, 0x44, 0x05, 0x55,
- 0x4c, 0x12, 0xfa, 0x80,
- 0x10, 0xf0, 0x70, 0x88,
- 0x00, 0x63, 0xe4, 0x50,
- 0x0c, 0x79, 0x8b, 0x1b,
- 0x40, 0x27, 0x63, 0x41,
- 0xe1, 0xfc, 0x0c, 0x14,
- 0x0c, 0x64, 0x82, 0x63,
- 0x4c, 0x12, 0xfc, 0x00,
- 0x10, 0x69, 0xf1, 0x98,
- 0x4e, 0x72, 0x7c, 0x18,
- 0x0c, 0x7f, 0x98, 0x30,
- 0xa1, 0x7b, 0x81, 0x61,
- 0x50, 0x04, 0x50, 0x70,
- 0xc1, 0x84, 0x0e, 0x74,
- 0x4c, 0x62, 0x7e, 0x75,
- 0x06, 0x34, 0xd0, 0xa0,
- 0x88, 0x13, 0x7a, 0x80,
- 0x8a, 0x1d, 0x8c, 0x33,
- 0x00, 0x34, 0xf6, 0xa5,
- 0x0c, 0xcc, 0xfa, 0x80,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x59, 0x0c, 0x05,
- 0x91, 0x21, 0x40, 0x0a,
- 0x6e, 0x0d, 0x0c, 0x15,
- 0x5e, 0xb8, 0xc0, 0x09,
- 0x0c, 0x29, 0xef, 0xa8,
- 0x40, 0x2b, 0x65, 0x51,
- 0xe1, 0x18, 0x43, 0x46,
- 0x83, 0x51, 0x04, 0x14,
- 0x84, 0x18, 0x84, 0x48,
- 0x63, 0x7d, 0x0c, 0x35,
- 0x9e, 0x49, 0xc0, 0x0b,
- 0x8e, 0x19, 0xc9, 0x17,
- 0x02, 0x24, 0x23, 0x5f,
- 0x63, 0xf8, 0xe0, 0x90,
- 0x04, 0x54, 0x6f, 0xa8,
- 0x46, 0x78, 0xe8, 0x90,
- 0x80, 0x8b, 0x6f, 0xe8,
- 0x60, 0x10, 0x02, 0x06,
- 0x65, 0x98, 0x90, 0x2b,
- 0x8e, 0x3b, 0x6f, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4b, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xc0,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x64, 0xc1, 0x00, 0x39,
- 0x02, 0x16, 0x40, 0x2b,
- 0x40, 0x11, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x19, 0x83, 0x41,
- 0xc0, 0x15, 0x62, 0x19,
- 0x66, 0x35, 0x00, 0x2b,
- 0x00, 0x59, 0xc0, 0x16,
- 0xc0, 0x2b, 0x65, 0x0d,
- 0x6c, 0x75, 0x40, 0x11,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2b, 0x6c, 0x11,
- 0x70, 0x05, 0x44, 0x20,
- 0x40, 0x31, 0xc0, 0x80,
- 0x40, 0x2c, 0x6c, 0x7d,
- 0x7e, 0xf9, 0x44, 0x20,
- 0x00, 0x39, 0xc0, 0x79,
- 0xc0, 0x2b, 0x65, 0x09,
- 0x60, 0x94, 0x42, 0x4a,
- 0x40, 0x11, 0x85, 0x11,
- 0xc0, 0x22, 0x65, 0x95,
- 0x6d, 0x31, 0x40, 0x11,
- 0x02, 0x06, 0x40, 0x2c,
- 0x40, 0x41, 0xc0, 0x00,
- 0xc0, 0x2c, 0x6c, 0x8d,
- 0x6c, 0x85, 0x40, 0x51,
- 0x40, 0x23, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6d, 0x35, 0x40, 0x31,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x0c, 0x81,
- 0x0e, 0x19, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x2b, 0x0c, 0x59,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x14, 0x02, 0x29,
- 0x66, 0x35, 0x00, 0x3b,
- 0x84, 0x44, 0xc0, 0x16,
- 0x06, 0x34, 0x82, 0x29,
- 0x40, 0x45, 0xfc, 0x00,
- 0x40, 0x0b, 0x63, 0x15,
- 0x40, 0x33, 0xa4, 0x3f,
- 0x40, 0x16, 0x66, 0x35,
- 0xef, 0xdc, 0x08, 0x86,
- 0x60, 0x24, 0x02, 0x29,
- 0xfc, 0x0c, 0x06, 0x34,
- 0xc2, 0x27, 0x90, 0x58,
- 0x4a, 0x50, 0x04, 0x29,
- 0xa4, 0x5f, 0xf3, 0xf4,
- 0x02, 0x29, 0x90, 0x56,
- 0xc6, 0x27, 0xe0, 0x28,
- 0xa6, 0x2f, 0x90, 0x29,
- 0x66, 0x35, 0x40, 0x23,
- 0x04, 0x24, 0x40, 0x16,
- 0x02, 0x39, 0xfc, 0x10,
- 0xc8, 0x37, 0xe0, 0x2c,
- 0xa4, 0x3f, 0xa0, 0x39,
- 0x66, 0x35, 0x40, 0x33,
- 0x46, 0x30, 0x40, 0x16,
- 0xc0, 0xff, 0x73, 0x7d,
- 0xe0, 0x30, 0x02, 0x29,
- 0x44, 0x20, 0xca, 0x27,
- 0x00, 0x29, 0xf0, 0x80,
- 0x40, 0x2b, 0x64, 0xc5,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0x10, 0x02, 0x39,
- 0x40, 0x31, 0xa7, 0x2b,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x00, 0x29, 0x80, 0xf5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x4a,
- 0x02, 0x29, 0x82, 0x65,
- 0x02, 0x39, 0xe0, 0x18,
- 0x40, 0x21, 0xe0, 0x20,
- 0xc0, 0x2c, 0x6c, 0x79,
- 0x66, 0x31, 0x40, 0x33,
- 0x02, 0x29, 0xc0, 0x16,
- 0x00, 0x39, 0xe0, 0x3c,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0x6d, 0x39, 0x00, 0x59,
- 0x82, 0x29, 0xc0, 0x2c,
- 0xfc, 0x00, 0x06, 0x34,
- 0x60, 0x1c, 0x02, 0x29,
- 0x40, 0x31, 0xa4, 0x3f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xfc, 0x04, 0x06, 0x34,
- 0x60, 0x40, 0x02, 0x49,
- 0xf3, 0xf8, 0x4a, 0x50,
- 0x6c, 0x89, 0x40, 0x21,
- 0x04, 0x00, 0x40, 0x2c,
- 0xc0, 0x6e, 0x64, 0xc1,
- 0x84, 0x49, 0xc2, 0x47,
- 0x40, 0x41, 0xa6, 0x4f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xf3, 0xec, 0x48, 0x40,
- 0xe0, 0x44, 0x02, 0x39,
- 0xa6, 0x5f, 0x82, 0x39,
- 0x6d, 0x39, 0x40, 0x51,
- 0x02, 0x39, 0xc0, 0x2c,
- 0xc4, 0x37, 0xe0, 0x48,
- 0xa6, 0x4f, 0x88, 0x39,
- 0x6d, 0x21, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x4c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x46, 0x30, 0xca, 0x37,
- 0x48, 0x40, 0x70, 0x80,
- 0xa6, 0x4f, 0xf3, 0x7c,
- 0x6d, 0x15, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x50,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x08, 0x44, 0x82, 0x39,
- 0xa6, 0x4f, 0xfc, 0x00,
- 0x6d, 0x51, 0x40, 0x41,
- 0x08, 0x44, 0x40, 0x2c,
- 0x02, 0x39, 0xfc, 0x04,
- 0xc2, 0x37, 0xe0, 0x54,
- 0xa8, 0x3f, 0x84, 0x39,
- 0x6d, 0x51, 0x40, 0x31,
- 0x06, 0x34, 0x40, 0x2c,
- 0x02, 0x49, 0xfc, 0x08,
- 0xc4, 0x47, 0xe0, 0x58,
- 0xa8, 0x3f, 0x88, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x46, 0x30, 0x40, 0x2c,
- 0x02, 0x49, 0xf3, 0xdc,
- 0xc6, 0x47, 0xe0, 0x5c,
- 0xa8, 0x3f, 0x90, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x9f, 0x31, 0x40, 0x2c,
- 0x02, 0x49, 0x81, 0x65,
- 0x06, 0x30, 0x60, 0x34,
- 0xc9, 0x46, 0xec, 0x04,
- 0xfe, 0x55, 0xa1, 0x3b,
- 0xe0, 0x38, 0x02, 0x29,
- 0x68, 0xfd, 0x40, 0x21,
- 0x02, 0x19, 0xc0, 0x1b,
- 0x40, 0x11, 0xe0, 0x34,
- 0xc0, 0x22, 0x6f, 0xb9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0a, 0x6d, 0x65,
- 0x62, 0x19, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x65, 0xb9, 0x0c, 0x39,
- 0x3c, 0x0e, 0xc0, 0x2b,
- 0x11, 0x16, 0x81, 0x01,
- 0x0f, 0x36, 0x83, 0x11,
- 0x8b, 0x06, 0xa3, 0x2b,
- 0x82, 0x25, 0x8d, 0x16,
- 0x82, 0x85, 0xa7, 0x2b,
- 0x5e, 0x11, 0xa5, 0x2b,
- 0x04, 0x26, 0x00, 0x24,
- 0x80, 0x85, 0x80, 0x00,
- 0x45, 0xf6, 0x13, 0x06,
- 0x03, 0x45, 0xe0, 0x0c,
- 0x0c, 0x4b, 0x83, 0x31,
- 0x40, 0x15, 0x6e, 0x09,
- 0x0c, 0x25, 0xfd, 0x51,
- 0xc0, 0x0d, 0x69, 0x65,
- 0x21, 0x2b, 0xcb, 0x47,
- 0x06, 0x0c, 0x85, 0x21,
- 0xc8, 0x4b, 0x62, 0x00,
- 0x04, 0x16, 0x13, 0x36,
- 0x46, 0x42, 0xc0, 0x00,
- 0x0c, 0x49, 0xf9, 0x94,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x8b, 0x21, 0x09, 0x26,
- 0x00, 0x16, 0x27, 0x06,
- 0xc0, 0x40, 0x70, 0x11,
- 0x82, 0x49, 0x0b, 0x0e,
- 0x8c, 0x0b, 0x15, 0x36,
- 0x99, 0x36, 0x97, 0x36,
- 0x9d, 0x26, 0x9b, 0x16,
- 0xa1, 0x16, 0x9f, 0x46,
- 0xa5, 0x16, 0xa3, 0x16,
- 0xef, 0xfc, 0x69, 0x68,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x6d, 0x88,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x70, 0x00, 0x02, 0x16,
- 0xe0, 0x04, 0x04, 0x06,
- 0x81, 0x01, 0x00, 0x6b,
- 0x83, 0x11, 0x3e, 0x1e,
- 0x8b, 0x21, 0x11, 0x26,
- 0x9b, 0x16, 0xbc, 0x0e,
- 0x9f, 0x06, 0x9d, 0x26,
- 0xa3, 0x06, 0xa1, 0x16,
- 0xa7, 0x06, 0xa5, 0x06,
- 0xab, 0x16, 0xa9, 0x16,
- 0xaf, 0x06, 0xad, 0x16,
- 0x8c, 0x0b, 0x13, 0x06,
- 0x97, 0x16, 0x95, 0x16,
- 0x66, 0xd8, 0x99, 0x16,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x6a, 0xf8, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x61, 0xd1, 0x0c, 0x19,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0x19,
- 0x6d, 0x65, 0x0c, 0x05,
- 0x89, 0x16, 0xc0, 0x0a,
- 0x65, 0xb9, 0x0c, 0x19,
- 0x11, 0x36, 0xc0, 0x2b,
- 0x3c, 0x0e, 0x87, 0x31,
- 0x8f, 0x16, 0x81, 0x01,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x1b, 0x36, 0xc0, 0x2b,
- 0x8b, 0x06, 0x8d, 0x31,
- 0x82, 0x19, 0x0d, 0x26,
- 0x02, 0x16, 0x1f, 0x16,
- 0xc0, 0x40, 0x70, 0x11,
- 0xa1, 0x26, 0x9d, 0x36,
- 0xa5, 0x26, 0xa3, 0x26,
- 0x13, 0x06, 0xa7, 0x06,
- 0x8b, 0x1e, 0x8c, 0x0b,
- 0x97, 0x26, 0x95, 0x26,
- 0x63, 0x38, 0x99, 0x26,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x67, 0x58, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x81, 0x41, 0x40, 0x2b,
- 0x62, 0x19, 0x0c, 0x39,
- 0x0a, 0x16, 0x40, 0x15,
- 0xbc, 0x4e, 0xf0, 0x00,
- 0x61, 0x8c, 0x02, 0x04,
- 0x11, 0x36, 0x82, 0x09,
- 0xf8, 0x88, 0x42, 0x12,
- 0x8b, 0x31, 0x1f, 0x06,
- 0x8c, 0x0b, 0x3e, 0x5e,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa3, 0x46, 0xa1, 0x46,
- 0xa7, 0x16, 0xa5, 0x46,
- 0xab, 0x46, 0xa9, 0x26,
- 0xaf, 0x46, 0xad, 0x26,
- 0x95, 0x26, 0x93, 0x46,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x60, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x64, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x04, 0x16, 0x00, 0x6b,
- 0xc0, 0x04, 0x60, 0x11,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa1, 0x31, 0x40, 0x2b,
- 0x83, 0x21, 0x3e, 0x2e,
- 0x8b, 0x31, 0x11, 0x36,
- 0x60, 0x34, 0x00, 0x4a,
- 0x02, 0x0c, 0x81, 0x01,
- 0xbc, 0x0e, 0xe2, 0x00,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa1, 0x06, 0x9f, 0x06,
- 0xa5, 0x26, 0xa3, 0x06,
- 0xa9, 0x26, 0xa7, 0x16,
- 0x13, 0x06, 0xab, 0x06,
- 0xad, 0x26, 0x8c, 0x0b,
- 0x95, 0x26, 0xaf, 0x26,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x5d, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x61, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x74, 0x98, 0xe2, 0x80,
- 0x40, 0x46, 0xe8, 0x04,
- 0x0f, 0x86, 0x60, 0x04,
- 0x4c, 0x01, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x81, 0x95, 0x8c, 0x8b,
- 0x63, 0x81, 0x10, 0x09,
- 0x40, 0xf8, 0xc0, 0x27,
- 0x61, 0x06, 0xe8, 0x00,
- 0xec, 0x04, 0x0e, 0x70,
- 0xfc, 0xf5, 0xa1, 0x7b,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0xa9, 0x15, 0xf2, 0x0c,
- 0x61, 0x84, 0x04, 0x04,
- 0xe1, 0x8c, 0x02, 0x04,
- 0x70, 0x80, 0x44, 0x20,
- 0xf0, 0x3c, 0x48, 0x00,
- 0x60, 0x84, 0x06, 0x04,
- 0x28, 0x2f, 0xa0, 0x19,
- 0x46, 0x30, 0xc6, 0x07,
- 0xa2, 0x2f, 0x71, 0x00,
- 0x72, 0x00, 0x40, 0x00,
- 0x5d, 0x93, 0xa6, 0x2f,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x60, 0x04, 0x48, 0x26,
- 0x64, 0x0c, 0x4b, 0x06,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x0d, 0x48, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0x81, 0x15, 0x85, 0x31,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x47, 0x86, 0x86, 0x7b,
- 0x52, 0x46, 0x60, 0x04,
- 0x4c, 0x31, 0xe1, 0x2c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x38, 0xad, 0x7b,
- 0xe0, 0x39, 0x81, 0xb1,
- 0x00, 0x06, 0x00, 0x36,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x47, 0x96,
- 0x6c, 0x1d, 0x4c, 0x31,
- 0x83, 0x31, 0x40, 0x2b,
- 0xa4, 0x04, 0x80, 0x36,
- 0x86, 0x85, 0x80, 0xb6,
- 0x8a, 0x05, 0xa3, 0x7b,
- 0x8c, 0xc5, 0xa5, 0x7b,
- 0x90, 0x25, 0xa7, 0x7b,
- 0x92, 0xe5, 0xa9, 0x7b,
- 0x84, 0x45, 0xab, 0x7b,
- 0x96, 0xb5, 0xa1, 0x7b,
- 0x61, 0x2c, 0x01, 0x06,
- 0x80, 0x04, 0x9f, 0x11,
- 0x01, 0x46, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xe4,
- 0x01, 0x86, 0x8b, 0xa5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xfd, 0x80,
- 0x01, 0x06, 0x89, 0xc5,
- 0x9f, 0x11, 0x61, 0x2c,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0x46,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xe4, 0x42, 0x10,
- 0x80, 0x16, 0xc4, 0x19,
- 0x01, 0x06, 0x87, 0xc5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0xcc, 0x19, 0x80, 0x18,
- 0x85, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0x83, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0xfc, 0x94, 0x02, 0x14,
- 0x81, 0xd5, 0x80, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x59, 0x88,
- 0x9a, 0x85, 0xa3, 0x0b,
- 0xe1, 0x2c, 0x54, 0xc6,
- 0x80, 0x08, 0xa8, 0x04,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x82, 0xb5, 0xb1, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x58, 0x08,
- 0x94, 0x85, 0xa3, 0x0b,
- 0xe4, 0x7d, 0x24, 0x04,
- 0x88, 0xd5, 0x80, 0x18,
- 0x81, 0x21, 0x42, 0x19,
- 0x42, 0x86, 0x00, 0x16,
- 0x71, 0x98, 0xe0, 0x3c,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x34, 0x05, 0x46,
- 0xa8, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0x88, 0x24,
- 0x48, 0x0a, 0x84, 0x48,
- 0x80, 0x85, 0xe0, 0x80,
- 0xb5, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x8e, 0x15,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xb5, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x75,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x11, 0xb6,
- 0x03, 0xb6, 0x05, 0x75,
- 0x60, 0x19, 0xe0, 0x08,
- 0x00, 0x16, 0x81, 0x21,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x68, 0x00, 0x6f, 0x48,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa8, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0xe0, 0x90, 0x48, 0x0a,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xb3, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x75, 0xb3, 0x3b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xc6, 0x40, 0x2b,
- 0x03, 0xc6, 0xe0, 0x08,
- 0x52, 0xf8, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xbc,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x73, 0xd8, 0x81, 0x81,
- 0x24, 0x04, 0xe8, 0x00,
- 0xe0, 0x08, 0x02, 0xf6,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x14,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x18, 0xc0, 0x2b,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x18,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x04, 0x48, 0x56,
- 0x64, 0x20, 0x0b, 0x86,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x08, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0xdb, 0x75, 0x8d, 0x31,
- 0x64, 0x31, 0x49, 0x06,
- 0x4b, 0xc6, 0x40, 0x20,
- 0xc0, 0x20, 0x64, 0x39,
- 0xcd, 0xc8, 0x81, 0x35,
- 0x8b, 0x4b, 0xd1, 0xc6,
- 0x8b, 0x31, 0xfe, 0xb5,
- 0xc1, 0xc3, 0xd9, 0xa5,
- 0xe0, 0x04, 0x44, 0x76,
- 0x6c, 0x1d, 0x40, 0x21,
- 0x41, 0xc6, 0x40, 0x2b,
- 0xc0, 0x20, 0x64, 0x39,
- 0x05, 0xc6, 0x01, 0x65,
- 0xc0, 0x20, 0x64, 0x3d,
- 0xc1, 0x36, 0xc5, 0x38,
- 0xfe, 0xb5, 0x85, 0x0b,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x81, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0x9a, 0x66, 0xf1,
- 0x64, 0x0d, 0x51, 0x06,
- 0xa1, 0x91, 0x40, 0x20,
- 0xe1, 0x08, 0x81, 0x75,
- 0xef, 0xfc, 0x67, 0xc8,
- 0x12, 0x90, 0x5d, 0x06,
- 0xa1, 0x9b, 0xec, 0x04,
- 0x8c, 0x0b, 0xfe, 0x35,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x87, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x69, 0x28,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x64, 0x21, 0x11, 0x86,
- 0x13, 0x86, 0x40, 0x20,
- 0x81, 0x75, 0xe0, 0x10,
- 0x65, 0xd8, 0xe1, 0x08,
- 0x5d, 0x06, 0xef, 0xfc,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x35, 0xa1, 0x9b,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x42, 0x36,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0xb1, 0x40, 0x2b,
- 0x61, 0x30, 0x55, 0xc6,
- 0x00, 0xb6, 0x81, 0x91,
- 0xe1, 0x34, 0x10, 0xc6,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x34, 0x00, 0x06,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x9e, 0x19, 0x80, 0x18,
- 0xff, 0x40, 0x42, 0x10,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa0, 0x04, 0x80, 0x96,
- 0xa1, 0x0b, 0x80, 0x08,
- 0x01, 0x46, 0x80, 0xf5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xbb, 0x0b, 0x80, 0x04,
- 0x0c, 0x29, 0x82, 0xb5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xa6,
- 0x60, 0x08, 0x03, 0xa6,
- 0x46, 0xb8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x28, 0x04, 0x8a, 0x45,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x00, 0xb6, 0x81, 0x21,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x00, 0xc6, 0xe8, 0x00,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa0, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0x80, 0x85, 0xa1, 0x4b,
- 0xbd, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x84, 0x75,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xbd, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xc6,
- 0x60, 0x08, 0x03, 0xc6,
- 0x44, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x81, 0x71, 0x80, 0x45,
- 0xe8, 0x00, 0x65, 0x28,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x96, 0x80, 0x04,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x00, 0x25, 0xa1, 0x1b,
- 0x00, 0x0b, 0x05, 0x21,
- 0x81, 0x2c, 0x43, 0xc6,
- 0x80, 0x00, 0x02, 0x15,
- 0x80, 0x00, 0x42, 0x25,
- 0xa3, 0x1b, 0x80, 0xc5,
- 0xa5, 0x1b, 0x80, 0x85,
- 0x83, 0x65, 0x82, 0x25,
- 0x65, 0x31, 0x00, 0x25,
- 0x02, 0x06, 0x40, 0x0b,
- 0x84, 0x14, 0xe1, 0x30,
- 0x00, 0x25, 0x84, 0x2e,
- 0x40, 0x0b, 0x65, 0x21,
- 0xe1, 0x2c, 0x43, 0xc6,
- 0x04, 0x2e, 0x84, 0x14,
- 0xe1, 0x30, 0x02, 0x06,
- 0x65, 0x31, 0x00, 0x05,
- 0x84, 0x14, 0xc0, 0x0b,
- 0xdd, 0x93, 0x84, 0x0e,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x18, 0x04, 0x46,
- 0x08, 0x34, 0xa5, 0x1b,
- 0x8c, 0x46, 0x81, 0x41,
- 0xa3, 0x1b, 0x88, 0x25,
- 0x43, 0x06, 0x10, 0x25,
- 0xa1, 0x1b, 0x81, 0x2c,
- 0x00, 0x39, 0x9a, 0x35,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x4b, 0xb6, 0x04, 0x14,
- 0x89, 0xc1, 0xe0, 0x0c,
- 0x84, 0x48, 0x82, 0x39,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x87, 0x31, 0x26, 0x4f,
- 0x43, 0x76, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x0c,
- 0x40, 0x2d, 0x65, 0x31,
- 0x65, 0x31, 0x00, 0x00,
- 0x07, 0xd5, 0xc0, 0xb5,
- 0x00, 0x49, 0xc2, 0x47,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x82, 0x49, 0x84, 0x34,
- 0x4a, 0x50, 0x8c, 0x58,
- 0xa8, 0x5f, 0xf3, 0xf8,
- 0x84, 0x34, 0x8c, 0x56,
- 0x65, 0x31, 0x00, 0x49,
- 0x8c, 0x58, 0xc0, 0x2d,
- 0x88, 0x49, 0xc2, 0x47,
- 0xf3, 0xec, 0x4a, 0x50,
- 0x8c, 0x56, 0xa8, 0x5f,
- 0x00, 0x49, 0x84, 0x34,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xc2, 0x47, 0x8c, 0x58,
- 0x4a, 0x50, 0x90, 0x49,
- 0xa8, 0x5f, 0xf3, 0xdc,
- 0x04, 0x14, 0x8c, 0x56,
- 0xe0, 0x08, 0x4b, 0xf6,
- 0x65, 0x35, 0x00, 0x39,
- 0x18, 0x06, 0x40, 0x2d,
- 0x84, 0x48, 0xe0, 0x04,
- 0xa0, 0x39, 0xc8, 0x37,
- 0xf3, 0xbc, 0x48, 0x40,
- 0x8f, 0x31, 0x26, 0x4f,
- 0x43, 0xf6, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x04,
- 0x40, 0x2d, 0x65, 0x35,
- 0x65, 0x35, 0x00, 0x00,
- 0xca, 0x47, 0xc0, 0xb5,
- 0x61, 0x2c, 0x4d, 0x06,
- 0x18, 0x74, 0x98, 0x4f,
- 0xfa, 0x80, 0x06, 0x34,
- 0x8a, 0x8f, 0x9c, 0x88,
- 0x9c, 0x86, 0xa8, 0x8f,
- 0x80, 0x08, 0x98, 0x44,
- 0xc5, 0x07, 0x90, 0x58,
- 0x27, 0x0f, 0x82, 0x09,
- 0xa0, 0x5f, 0x82, 0x5f,
- 0x08, 0x04, 0x90, 0x56,
- 0x80, 0x16, 0x83, 0x11,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x88, 0x04, 0x14,
- 0xe1, 0x98, 0x47, 0x86,
- 0x86, 0x19, 0x0c, 0x54,
- 0x60, 0x90, 0x08, 0x24,
- 0x64, 0xb0, 0x06, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x0a, 0x43, 0xc4, 0x47,
- 0x81, 0xd5, 0x81, 0x51,
- 0x18, 0xc0, 0x5d, 0x84,
- 0x4c, 0x85, 0xec, 0x04,
- 0xa1, 0xcb, 0xf0, 0x10,
- 0x20, 0x31, 0xfe, 0x55,
- 0x08, 0x40, 0x82, 0x51,
- 0xc0, 0x01, 0x64, 0x01,
- 0x18, 0x46, 0xa5, 0x5b,
- 0x4c, 0x40, 0x40, 0x00,
- 0x7c, 0x95, 0xdc, 0x00,
- 0xdc, 0x00, 0x4e, 0x30,
- 0x61, 0x98, 0x46, 0x86,
- 0xe0, 0x00, 0x4b, 0x86,
- 0x65, 0x16, 0x44, 0x2a,
- 0x64, 0x00, 0x00, 0x00,
- 0x0c, 0x34, 0xc0, 0x8c,
- 0xe0, 0x0c, 0x48, 0x06,
- 0x81, 0x51, 0x03, 0x35,
- 0x65, 0x12, 0x4c, 0x5a,
- 0xf0, 0xb0, 0x4e, 0x12,
- 0x00, 0x65, 0x84, 0x63,
- 0x8c, 0x73, 0x7c, 0x30,
- 0x88, 0xc1, 0x44, 0x77,
- 0x9c, 0x6e, 0x86, 0x73,
- 0xe0, 0xe0, 0x18, 0x0a,
- 0x70, 0x01, 0xfc, 0x55,
- 0xb5, 0x5b, 0x82, 0x51,
- 0x18, 0x06, 0x7e, 0x55,
- 0x81, 0x01, 0xc0, 0x00,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x88, 0x06, 0x14,
- 0xe0, 0x08, 0x0b, 0x06,
- 0x93, 0x21, 0x06, 0x19,
- 0x66, 0x96, 0x4a, 0x3a,
- 0xe0, 0x90, 0x08, 0x34,
- 0x66, 0x8a, 0x58, 0x1a,
- 0x65, 0xb0, 0x0c, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x81, 0xc1, 0x18, 0x53,
- 0x0e, 0x60, 0x83, 0x75,
- 0x89, 0x81, 0x64, 0x40,
- 0x8a, 0xab, 0x08, 0x9b,
- 0x59, 0xae, 0x81, 0x85,
- 0xec, 0x04, 0x10, 0x80,
- 0x60, 0x1c, 0x4c, 0x95,
- 0x88, 0x91, 0xc8, 0xa1,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x0a, 0x50, 0x02, 0xc1,
- 0xc0, 0x02, 0x65, 0x01,
- 0x65, 0x00, 0x08, 0x40,
- 0xa5, 0xcb, 0x8e, 0x6b,
- 0x4b, 0x86, 0xfa, 0x35,
- 0x08, 0x00, 0x60, 0x00,
- 0xc0, 0x90, 0x65, 0x80,
- 0x65, 0x16, 0x46, 0x3a,
- 0xe0, 0x0c, 0x40, 0x06,
- 0x81, 0x51, 0x03, 0x55,
- 0x65, 0x02, 0x4e, 0x5a,
- 0xf0, 0x98, 0x50, 0x12,
- 0x70, 0x98, 0x52, 0x42,
- 0x86, 0x73, 0x88, 0x61,
- 0x4e, 0x8a, 0x8e, 0x83,
- 0xa4, 0x7e, 0xe6, 0x8a,
- 0xe2, 0x30, 0x52, 0x85,
- 0xe0, 0xe0, 0x0c, 0x0a,
- 0x02, 0x51, 0xfc, 0x15,
- 0xb5, 0x5b, 0x98, 0x4b,
- 0x44, 0xe0, 0x18, 0x40,
- 0xc0, 0x00, 0x0c, 0x06,
- 0x81, 0x01, 0xfc, 0xd5,
- 0xf0, 0x3c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x44, 0x68,
- 0x8c, 0x0b, 0x80, 0x6b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0xf0, 0x05, 0xe8,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x28, 0x65, 0x41,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x2b, 0x66, 0x11,
- 0x61, 0x08, 0x03, 0x86,
- 0x84, 0x14, 0x9d, 0x21,
- 0x03, 0x06, 0x04, 0x26,
- 0x04, 0x24, 0xe1, 0x08,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x14, 0x45, 0x06,
- 0x88, 0x38, 0x88, 0x24,
- 0x08, 0x36, 0xc8, 0x39,
- 0x60, 0x01, 0x06, 0x06,
- 0x00, 0x25, 0xc0, 0x40,
- 0xc0, 0x0a, 0x6e, 0xf1,
- 0xa1, 0x21, 0x47, 0x2d,
- 0x08, 0x05, 0x00, 0x29,
- 0x01, 0x46, 0x00, 0x27,
- 0x80, 0x04, 0xe1, 0x28,
- 0x01, 0x06, 0x00, 0x26,
- 0x80, 0x04, 0xe1, 0x28,
- 0xdd, 0x93, 0x80, 0x16,
- 0xe1, 0x28, 0x03, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x87, 0x2b, 0x84, 0x38,
- 0x02, 0x20, 0xfe, 0xb5,
- 0x40, 0x11, 0xed, 0x5c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x43, 0x56,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x39, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x60, 0x08, 0x43, 0x66,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x59, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0x60, 0x08, 0x43, 0x96,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x35,
- 0x62, 0xf1, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x1b, 0x65, 0x5d,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0x06, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0xc6, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0xc6, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x01, 0x86, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x61, 0x38, 0x4b, 0xc6,
- 0x14, 0x34, 0x85, 0x61,
- 0x8c, 0x48, 0xa1, 0x2b,
- 0xf3, 0xec, 0x48, 0x40,
- 0x48, 0x46, 0x0c, 0x46,
- 0x10, 0xc4, 0xe1, 0x44,
- 0xb0, 0x36, 0x81, 0x31,
- 0xb0, 0x66, 0x90, 0xc4,
- 0x30, 0x36, 0x90, 0xc4,
- 0xe1, 0x44, 0x58, 0x86,
- 0x6e, 0x01, 0x00, 0x0b,
- 0xb0, 0xc4, 0xc0, 0x15,
- 0x66, 0x86, 0x40, 0x0a,
- 0xb0, 0x0e, 0x87, 0x11,
- 0x00, 0x16, 0x90, 0x04,
- 0xe1, 0x3c, 0x00, 0x06,
- 0x84, 0xc8, 0x80, 0x14,
- 0x84, 0xc6, 0xc8, 0xc9,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x94, 0x04, 0x80, 0x16,
- 0xc8, 0x19, 0x80, 0x18,
- 0x80, 0xe5, 0x80, 0x16,
- 0x80, 0x18, 0x90, 0x04,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x80, 0x36, 0xfe, 0xa5,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x44, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x43, 0xe6, 0x02, 0x9b,
- 0x08, 0x6b, 0xe0, 0x04,
- 0x40, 0x11, 0x86, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0xb8, 0x84, 0x8b,
- 0x42, 0x06, 0xe8, 0x00,
- 0xc2, 0x67, 0x61, 0x18,
- 0x84, 0x69, 0x04, 0x14,
- 0x42, 0x46, 0x04, 0x96,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x86, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x06, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x10,
- 0x44, 0x20, 0x84, 0x28,
- 0xac, 0x2f, 0xf3, 0xf4,
- 0x0c, 0x0c, 0x84, 0x26,
- 0x83, 0xf5, 0xf2, 0x9c,
- 0x61, 0x14, 0x41, 0x06,
- 0xe1, 0x14, 0x47, 0x86,
- 0x81, 0x41, 0x00, 0x14,
- 0x84, 0x18, 0x84, 0x28,
- 0xcb, 0x27, 0x8c, 0x34,
- 0x82, 0x19, 0x04, 0x29,
- 0xa4, 0x1f, 0x0c, 0x5a,
- 0x80, 0x34, 0x8c, 0x4c,
- 0x8c, 0x48, 0xe0, 0x57,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x00, 0x34, 0x8c, 0x46,
- 0xf9, 0x84, 0x40, 0x52,
- 0x42, 0x40, 0x8c, 0x48,
- 0x8c, 0x16, 0xf2, 0xfc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x14, 0x43, 0x86,
- 0xe1, 0xc0, 0x04, 0x04,
- 0x48, 0x00, 0x04, 0x14,
- 0xca, 0x07, 0xf0, 0x04,
- 0xf1, 0x00, 0x40, 0x00,
- 0x43, 0x06, 0x04, 0x2c,
- 0x84, 0x24, 0xe1, 0x14,
- 0x46, 0x30, 0x88, 0x38,
- 0xa8, 0x3f, 0xf3, 0xf8,
- 0x84, 0x14, 0x88, 0x36,
- 0x44, 0x20, 0x84, 0x28,
- 0xa0, 0x2f, 0xf2, 0xfc,
- 0xdd, 0x93, 0x84, 0x26,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x9b,
- 0x06, 0x6b, 0xe0, 0x04,
- 0x52, 0x01, 0x84, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7b, 0xd8, 0x82, 0x8b,
- 0x12, 0x29, 0xef, 0xfc,
- 0x40, 0x2c, 0x6e, 0x95,
- 0xe1, 0x1c, 0x02, 0x46,
- 0xc8, 0x87, 0x04, 0x14,
- 0x71, 0xc0, 0x48, 0x80,
- 0x04, 0x26, 0x9e, 0x79,
- 0xe1, 0x18, 0x43, 0x46,
- 0x88, 0x38, 0x84, 0x24,
- 0xf2, 0x3c, 0x46, 0x30,
- 0x88, 0x36, 0xa8, 0x3f,
- 0x84, 0x28, 0x84, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x04, 0x26, 0xae, 0x2f,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x84, 0x66, 0x84, 0x14,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0xa5,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x65, 0x35, 0x0e, 0x39,
- 0x0e, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x3d, 0x0e, 0x19,
- 0x7c, 0x58, 0xc0, 0x2b,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0x66, 0xb8, 0x8c, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x00, 0x27, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x41, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x43, 0xa6,
- 0x6f, 0xfc, 0x7d, 0x88,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xa4, 0xd5, 0xa1, 0x7b,
- 0x65, 0x3d, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x35, 0x0c, 0x09,
- 0x64, 0xb8, 0xc0, 0x2b,
- 0x00, 0x8b, 0xef, 0xa0,
- 0xe1, 0x04, 0x01, 0x46,
- 0x90, 0x2b, 0x00, 0x04,
- 0x0c, 0xa5, 0x80, 0x94,
- 0xc0, 0x09, 0x6e, 0x0d,
- 0x65, 0x41, 0x0c, 0x39,
- 0x92, 0x0b, 0xc0, 0x2b,
- 0x6f, 0xa0, 0x64, 0x88,
- 0x4c, 0x05, 0x94, 0x1b,
- 0x40, 0x0b, 0x63, 0x6d,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x49,
- 0x63, 0xd8, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x63, 0x65, 0x4c, 0x05,
- 0x92, 0x0b, 0x40, 0x0b,
- 0x65, 0x45, 0x0c, 0x39,
- 0x94, 0x1b, 0x40, 0x2b,
- 0x6f, 0xa0, 0x63, 0x28,
- 0x4c, 0x05, 0x90, 0x2b,
- 0x40, 0x0b, 0x63, 0x71,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x4d,
- 0x62, 0x78, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x6d, 0x59, 0x0c, 0x15,
- 0x91, 0x21, 0x40, 0x0a,
- 0x63, 0x69, 0x4c, 0x05,
- 0x02, 0x0b, 0xc0, 0x0b,
- 0x5e, 0xf8, 0x94, 0x1b,
- 0x4c, 0x05, 0xef, 0xa0,
- 0x40, 0x06, 0x6d, 0x49,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x4c, 0x05, 0x84, 0x14,
- 0xc0, 0x08, 0x69, 0x41,
- 0x6b, 0x1d, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x08,
- 0xc0, 0x08, 0x6b, 0xf1,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x1b, 0x65, 0x71,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x65, 0x51,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x6c, 0xa1,
- 0x43, 0x46, 0x04, 0x08,
- 0x84, 0x14, 0xe1, 0x18,
- 0x6f, 0xf1, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x1b, 0x65, 0x75,
- 0x9e, 0x09, 0x84, 0x08,
- 0x65, 0x55, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x22, 0x6c, 0xa5,
- 0x9e, 0x09, 0x84, 0x08,
- 0x6f, 0xf5, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x79, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x1b,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x59, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6c, 0xa9, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6f, 0xf9, 0x4c, 0x01,
- 0x40, 0x78, 0xc0, 0x22,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x68, 0xb1, 0x00, 0x1b,
- 0x06, 0x0e, 0x40, 0x0a,
- 0xc3, 0xd0, 0x64, 0x01,
- 0xe1, 0x84, 0x04, 0x14,
- 0x6c, 0x79, 0x00, 0x39,
- 0x86, 0x23, 0x40, 0x2c,
- 0xe0, 0x06, 0x42, 0x2a,
- 0xe1, 0x84, 0x04, 0x34,
- 0x42, 0x2a, 0x82, 0x23,
- 0x00, 0x2b, 0xe0, 0x0e,
- 0xc0, 0x0a, 0x68, 0xb5,
- 0x02, 0x06, 0xc4, 0x1d,
- 0x42, 0x12, 0x80, 0x00,
- 0x40, 0x15, 0xd1, 0x88,
- 0xc0, 0x0b, 0x63, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x64, 0xc1,
- 0x65, 0x51, 0x0c, 0x99,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0xc9,
- 0xec, 0x04, 0x00, 0x10,
- 0xc7, 0x97, 0x65, 0x0d,
- 0x81, 0x01, 0x02, 0x15,
- 0x0c, 0x09, 0xa7, 0x1b,
- 0xc0, 0x2c, 0x0e, 0x31,
- 0x83, 0x01, 0x80, 0xb5,
- 0x6e, 0x31, 0x4c, 0x01,
- 0x0c, 0x09, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x8e, 0x93, 0x02, 0x75,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x05, 0x4d, 0x00, 0x60,
- 0x01, 0xc5, 0x80, 0xad,
- 0x05, 0x49, 0x00, 0x60,
- 0x40, 0x4a, 0xc0, 0xad,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x88, 0xc0, 0xad,
- 0x6f, 0xa0, 0x4e, 0x08,
- 0x02, 0x94, 0x90, 0x0b,
- 0x81, 0x41, 0x7a, 0x80,
- 0x61, 0x02, 0x46, 0x1a,
- 0x10, 0x1b, 0x8c, 0x0b,
- 0x64, 0xb8, 0x8e, 0x2b,
- 0x0c, 0x09, 0xef, 0xfc,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0xc8, 0x07, 0xc0, 0x2b,
- 0x6a, 0xa9, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x0d,
- 0xc0, 0x11, 0x62, 0x99,
- 0x66, 0x49, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x11,
- 0x40, 0x11, 0x67, 0xf1,
- 0x52, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0x85,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x6e, 0x31, 0x00, 0x19,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0x82, 0x45, 0xa1, 0x1b,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x05, 0xa1, 0x04, 0x00,
- 0x01, 0xc5, 0x80, 0xb3,
- 0x05, 0x91, 0x04, 0x00,
- 0x42, 0x4a, 0xc0, 0xb3,
- 0x04, 0x00, 0xe0, 0x8c,
- 0x80, 0xb3, 0x05, 0xc1,
- 0x05, 0xb1, 0x04, 0x00,
- 0x00, 0x69, 0xc0, 0xb3,
- 0xc0, 0x2b, 0x64, 0xcd,
- 0x00, 0x5b, 0x88, 0x24,
- 0xc0, 0x15, 0x6a, 0xd1,
- 0x6a, 0xe1, 0x00, 0x4b,
- 0xa3, 0x6b, 0x40, 0x15,
- 0x68, 0xc9, 0x00, 0xcb,
- 0x00, 0x3b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0xcd,
- 0x04, 0x61, 0x00, 0x65,
- 0x84, 0xc5, 0x80, 0x05,
- 0x00, 0x65, 0xa5, 0x6b,
- 0x80, 0x05, 0x04, 0x5d,
- 0x00, 0x75, 0x84, 0x25,
- 0x40, 0x0b, 0x63, 0x75,
- 0x02, 0x85, 0xa7, 0x6b,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x64, 0x5d, 0x00, 0x65,
- 0xcc, 0x7d, 0xc0, 0x05,
- 0x04, 0x61, 0x00, 0x65,
- 0x4c, 0x62, 0x80, 0x05,
- 0x42, 0x4a, 0x9a, 0x9c,
- 0xd8, 0xc7, 0x60, 0x8c,
- 0x02, 0x64, 0x02, 0xe5,
- 0x58, 0x57, 0xe0, 0xb0,
- 0x4a, 0x5a, 0xd8, 0x47,
- 0x48, 0x4a, 0xe0, 0x0a,
- 0x40, 0x55, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x79,
- 0x63, 0x7d, 0x40, 0x45,
- 0x48, 0x1a, 0xc0, 0x0b,
- 0xd8, 0x1d, 0x60, 0x0a,
- 0x42, 0x12, 0x58, 0x37,
- 0x40, 0x45, 0xd1, 0xb0,
- 0x40, 0x0b, 0x63, 0x81,
- 0x48, 0x1a, 0x81, 0x41,
- 0x42, 0x3a, 0xc0, 0x0a,
- 0x40, 0x45, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x85,
- 0x63, 0x89, 0x40, 0x15,
- 0x81, 0x01, 0x40, 0x0b,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x00, 0xb6, 0x00, 0x8b,
- 0x50, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x06, 0x7b, 0x88, 0xab,
- 0x4e, 0x18, 0x84, 0x9b,
- 0x82, 0x0b, 0x6f, 0xa0,
- 0x6f, 0xa0, 0x4f, 0x68,
- 0x21, 0x0b, 0x80, 0x6b,
- 0x02, 0x06, 0xff, 0x11,
- 0xa3, 0xab, 0x00, 0x00,
- 0x82, 0x03, 0x02, 0xe5,
- 0x82, 0x95, 0xd3, 0x0d,
- 0x84, 0xa5, 0xa3, 0x7b,
- 0x50, 0x95, 0xa1, 0x7b,
- 0xc0, 0x0b, 0x05, 0x21,
- 0x50, 0x95, 0x84, 0x15,
- 0xc0, 0x0b, 0x65, 0x21,
- 0xa3, 0x7b, 0x83, 0x35,
- 0xa1, 0x7b, 0x82, 0xc5,
- 0x05, 0x21, 0x50, 0x05,
- 0x82, 0x35, 0xc0, 0x0b,
- 0x65, 0x21, 0x50, 0x05,
- 0x81, 0x85, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x95,
- 0x81, 0x45, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x05,
- 0x10, 0x0b, 0xc0, 0x0b,
- 0x73, 0x18, 0x8e, 0x1b,
- 0x5a, 0x18, 0xef, 0xf8,
- 0x0e, 0x64, 0x6f, 0xfc,
- 0x43, 0x86, 0xe1, 0xa0,
- 0x84, 0x14, 0xe1, 0x18,
- 0x43, 0xc6, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x18,
- 0x0c, 0x0c, 0x84, 0x66,
- 0x1b, 0x18, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x42, 0x27,
- 0x04, 0x24, 0x84, 0x21,
- 0x06, 0x24, 0xfa, 0x80,
- 0x82, 0x33, 0xe1, 0x84,
- 0x60, 0x0a, 0x4e, 0x3a,
- 0x00, 0x29, 0xc6, 0x2d,
- 0x40, 0x2b, 0x0c, 0x1d,
- 0xc0, 0x08, 0x42, 0x96,
- 0xcf, 0xb4, 0x73, 0xe8,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x31, 0x7d, 0x09,
- 0xe0, 0x1e, 0x40, 0x0a,
- 0xe5, 0x1a, 0x42, 0x0a,
- 0xe5, 0x9a, 0x44, 0x0a,
- 0x64, 0x81, 0x00, 0x10,
- 0x42, 0x22, 0xc7, 0xa1,
- 0x04, 0x0e, 0x72, 0x8c,
- 0xc0, 0x03, 0x74, 0x24,
- 0x6f, 0x5c, 0x74, 0x88,
- 0x0c, 0x4c, 0x81, 0x31,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x01, 0x0c, 0x12,
- 0x81, 0x11, 0x40, 0x28,
- 0x6f, 0x60, 0x5d, 0xa8,
- 0x8c, 0x0b, 0x8c, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x06, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0x86,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x66,
- 0xe0, 0x08, 0x0d, 0x66,
- 0xef, 0xb4, 0x70, 0x48,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0xc6,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x76,
- 0xe0, 0x08, 0x0d, 0x76,
- 0xef, 0xb4, 0x6e, 0x88,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0xc6, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x8e, 0x39, 0xc9, 0x37,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x86,
- 0xe0, 0x08, 0x0d, 0x86,
- 0xef, 0xb4, 0x6c, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x87, 0x1b, 0x9e, 0x39,
- 0x03, 0x96, 0x82, 0x45,
- 0x0d, 0x96, 0x60, 0x08,
- 0x6a, 0xd8, 0xe0, 0x08,
- 0xa1, 0x0b, 0xef, 0xb4,
- 0x80, 0x00, 0x0c, 0x06,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6c, 0x80, 0x04, 0x12,
- 0x81, 0x31, 0x81, 0x11,
- 0x48, 0x00, 0xc5, 0x3d,
- 0x00, 0x04, 0x50, 0x04,
- 0x42, 0x12, 0xc1, 0x84,
- 0x06, 0x30, 0x50, 0x90,
- 0xfc, 0xf5, 0xc4, 0x04,
- 0x82, 0x0b, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x19,
- 0x40, 0x86, 0x40, 0x2b,
- 0x00, 0x05, 0xc1, 0x00,
- 0x40, 0x11, 0xc0, 0x00,
- 0x84, 0x95, 0xc0, 0x00,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x63, 0x79, 0x0c, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x8c, 0x0b, 0x03, 0x41,
- 0x6f, 0xfc, 0x6d, 0xa8,
- 0x8c, 0x0b, 0x82, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x81, 0x01, 0x81, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x86, 0x00, 0x6b,
- 0x80, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2b,
- 0x00, 0x04, 0x60, 0x98,
- 0x80, 0xc5, 0xfa, 0x00,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xff, 0x11, 0x82, 0x85,
- 0x82, 0x35, 0x82, 0x0d,
- 0x66, 0xed, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x26,
- 0x02, 0x60, 0x02, 0x85,
- 0x80, 0x99, 0x06, 0xe5,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x04, 0x45, 0x02, 0x60,
- 0x02, 0x60, 0xc0, 0x9e,
- 0x80, 0xad, 0x05, 0xa9,
- 0x53, 0xf6, 0x04, 0x18,
- 0x0c, 0x39, 0xe0, 0x00,
- 0xc0, 0x2b, 0x65, 0xad,
- 0x70, 0x84, 0x44, 0x32,
- 0x05, 0x0a, 0xa6, 0x13,
- 0x16, 0x12, 0x64, 0xfc,
- 0x12, 0x24, 0xe0, 0x00,
- 0x40, 0x0a, 0x1a, 0x80,
- 0x00, 0x60, 0xe0, 0x90,
- 0x40, 0x99, 0x06, 0xf1,
- 0xc0, 0x00, 0x02, 0x06,
- 0x4f, 0x60, 0x4e, 0x68,
- 0xc0, 0x18, 0x04, 0x06,
- 0x15, 0x86, 0x0f, 0xbe,
- 0x01, 0x01, 0xe1, 0x00,
- 0x89, 0x75, 0x81, 0x71,
- 0x61, 0x00, 0x40, 0x86,
- 0xe0, 0x08, 0x42, 0x06,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xef, 0xf8, 0x7b, 0xe8,
- 0x60, 0x3c, 0x42, 0x86,
- 0x52, 0x78, 0x8c, 0x0b,
- 0x00, 0x7b, 0xef, 0xe0,
- 0x75, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xf8,
- 0x40, 0x2c, 0x6d, 0x01,
- 0xf0, 0xa0, 0x44, 0x62,
- 0xa1, 0x7b, 0x28, 0x14,
- 0x6b, 0xf1, 0x44, 0x01,
- 0x84, 0x08, 0xc0, 0x26,
- 0x41, 0xf6, 0x82, 0x65,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x64, 0x4f, 0x28,
- 0x60, 0x0c, 0x43, 0x06,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x59, 0x38, 0xef, 0xc8,
- 0x0c, 0x19, 0xef, 0xdc,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x02, 0x84, 0x82, 0x65,
- 0x04, 0x60, 0x60, 0x88,
- 0xc0, 0x99, 0x66, 0xf0,
- 0x90, 0x23, 0x04, 0x13,
- 0x44, 0xb1, 0x84, 0x0e,
- 0x0c, 0x15, 0xe4, 0x00,
- 0xc0, 0x0a, 0x6d, 0x61,
- 0x02, 0x06, 0xc2, 0x0d,
- 0x4c, 0x11, 0xc0, 0x00,
- 0xc0, 0x26, 0x06, 0xed,
- 0x82, 0xb1, 0x80, 0xd5,
- 0xfa, 0x80, 0x10, 0xb4,
- 0xec, 0xe5, 0xd2, 0x8d,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x82, 0x91, 0x40, 0x2b,
- 0xe0, 0x90, 0x42, 0x0a,
- 0xc0, 0x1c, 0x1e, 0x25,
- 0xd1, 0x88, 0x44, 0x82,
- 0x06, 0xe1, 0x4c, 0x21,
- 0x93, 0x8b, 0x40, 0x26,
- 0x0c, 0x09, 0x84, 0xf5,
- 0x40, 0x26, 0x66, 0xe5,
- 0xe1, 0x00, 0x42, 0x86,
- 0x83, 0x21, 0x04, 0x14,
- 0x66, 0xed, 0x4c, 0x21,
- 0x04, 0x06, 0xc0, 0x26,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x64, 0x4a, 0xe8,
- 0x43, 0x06, 0x81, 0x11,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xc8, 0x5c, 0x28,
- 0x42, 0x0a, 0x85, 0x95,
- 0x44, 0x86, 0x60, 0x94,
- 0x08, 0x24, 0xe1, 0x00,
- 0x04, 0x41, 0x02, 0x60,
- 0x4c, 0xb1, 0xc0, 0x9e,
- 0x40, 0x26, 0x66, 0xe5,
- 0x05, 0xb1, 0x02, 0x60,
- 0x84, 0x18, 0x80, 0xad,
- 0x02, 0x12, 0x90, 0x13,
- 0x88, 0x16, 0xec, 0xfc,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2c,
- 0xc0, 0x26, 0x66, 0xe9,
- 0x69, 0xb5, 0x4c, 0x05,
- 0x44, 0x0a, 0xc0, 0x09,
- 0x82, 0x45, 0xe0, 0x90,
- 0x6f, 0xf8, 0x6d, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x6d, 0x05, 0x4c, 0x01,
- 0x40, 0x46, 0xc0, 0x2c,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x69, 0x58, 0x8c, 0x0b,
- 0x6e, 0x38, 0xef, 0xf4,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x0c, 0x19, 0xa1, 0x0b,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x93, 0x7c, 0x42, 0x10,
- 0x0d, 0x15, 0x4c, 0x11,
- 0x81, 0x11, 0x00, 0x2c,
- 0x6c, 0x21, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x2b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x43, 0xf6, 0x40, 0x16,
- 0x4c, 0x73, 0xef, 0xfc,
- 0xc0, 0x16, 0x66, 0x71,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x19, 0x98, 0x85,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x51, 0x0c, 0x89,
- 0x0c, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0xc5, 0x17, 0x40, 0x2b,
- 0xc5, 0x27, 0xc5, 0x87,
- 0x48, 0x2a, 0x45, 0x37,
- 0x4a, 0x3a, 0xe6, 0xa2,
- 0x06, 0x44, 0xe6, 0x86,
- 0x08, 0x54, 0xfa, 0x80,
- 0x89, 0x3b, 0xfa, 0x80,
- 0x80, 0x00, 0x00, 0x16,
- 0x88, 0x8c, 0x00, 0x04,
- 0x02, 0x00, 0x10, 0xc5,
- 0x0c, 0x39, 0x8c, 0x04,
- 0x40, 0x2c, 0x6d, 0x09,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x66, 0x86, 0x44, 0x2a,
- 0xfa, 0x80, 0x08, 0x14,
- 0x81, 0x51, 0x01, 0x11,
- 0x6c, 0x04, 0x00, 0x30,
- 0x40, 0x02, 0x83, 0x31,
- 0x00, 0x09, 0xd0, 0x98,
- 0xc0, 0x2c, 0x0c, 0xa1,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x83, 0x05, 0xc0, 0x2c,
- 0x84, 0x25, 0xa1, 0x8b,
- 0x7a, 0x80, 0x18, 0x84,
- 0xe8, 0x94, 0x12, 0x34,
- 0x60, 0x32, 0x58, 0x4a,
- 0xfb, 0x80, 0x02, 0x14,
- 0x4c, 0x13, 0xb2, 0x1f,
- 0xc0, 0x16, 0x66, 0x71,
- 0x85, 0x5d, 0x98, 0x53,
- 0x83, 0x45, 0xfc, 0x15,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x4f, 0x78, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xb4,
- 0xe0, 0x08, 0x4e, 0x96,
- 0x66, 0x71, 0x0c, 0x1b,
- 0xa3, 0x0b, 0x40, 0x16,
- 0x6c, 0xe9, 0x0c, 0x09,
- 0x0e, 0x06, 0x40, 0x2c,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x7a, 0x80,
- 0x40, 0x0a, 0xfb, 0x80,
- 0xa1, 0x1f, 0xe6, 0xa2,
- 0x66, 0x71, 0x4c, 0x13,
- 0x8e, 0x0b, 0x40, 0x16,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x04, 0x42, 0x06,
- 0x84, 0x1a, 0x84, 0x14,
- 0x6e, 0x19, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x6c, 0x41, 0x00, 0x69,
- 0x9f, 0x71, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x39,
- 0x81, 0x81, 0x40, 0x2b,
- 0x6c, 0x51, 0x00, 0x49,
- 0x81, 0x91, 0x40, 0x2b,
- 0x42, 0x3a, 0xaf, 0x76,
- 0x42, 0x1a, 0xe6, 0x9a,
- 0xbe, 0x1e, 0xe0, 0x12,
- 0x6c, 0x4d, 0x00, 0x19,
- 0x3c, 0x1e, 0xc0, 0x2b,
- 0x60, 0x31, 0x02, 0x0e,
- 0x7c, 0x1e, 0xc2, 0x41,
- 0xe0, 0x40, 0x02, 0x16,
- 0x8f, 0x11, 0x0d, 0x1c,
- 0x95, 0x11, 0x1d, 0x16,
- 0x85, 0x11, 0x1f, 0x16,
- 0x8b, 0x11, 0x21, 0x16,
- 0x91, 0x11, 0x23, 0x16,
- 0x97, 0x11, 0x25, 0x16,
- 0x99, 0x11, 0x27, 0x16,
- 0x9b, 0x11, 0x29, 0x16,
- 0x9d, 0x11, 0x2b, 0x16,
- 0x81, 0x11, 0x2d, 0x16,
- 0x6c, 0x55, 0x00, 0xc9,
- 0x83, 0x65, 0xc0, 0x2b,
- 0x64, 0x20, 0x0a, 0xf0,
- 0x0a, 0x29, 0x82, 0xb1,
- 0x80, 0x23, 0xfc, 0x08,
- 0x68, 0x81, 0x44, 0x81,
- 0x82, 0x81, 0x40, 0x1b,
- 0x6c, 0x41, 0x00, 0x69,
- 0x0a, 0x64, 0xc0, 0x2b,
- 0x04, 0xb4, 0x7a, 0x80,
- 0x94, 0x53, 0xfa, 0x80,
- 0xfa, 0xb5, 0xcb, 0x2d,
- 0x00, 0x29, 0x82, 0x91,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x14, 0x94,
- 0x04, 0x94, 0xc5, 0xad,
- 0x54, 0x20, 0xc0, 0x88,
- 0xc0, 0x03, 0x13, 0xf1,
- 0x56, 0xa0, 0x7a, 0xb5,
- 0x00, 0x29, 0xdc, 0x00,
- 0x40, 0x2c, 0x6c, 0x81,
- 0xfa, 0x80, 0x18, 0xc4,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xa3, 0x2b, 0x3c, 0x24,
- 0xdf, 0xfc, 0x4f, 0xee,
- 0x68, 0xbd, 0x40, 0x71,
- 0x3e, 0x24, 0xc0, 0x1b,
- 0xfa, 0x80, 0x0a, 0x24,
- 0x60, 0x32, 0x48, 0x5a,
- 0x64, 0x80, 0x0a, 0x00,
- 0x07, 0x45, 0xc0, 0x6e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x6e, 0x19, 0x00, 0xcb,
- 0x58, 0x0a, 0xc0, 0x15,
- 0x59, 0xe6, 0xe4, 0x84,
- 0x4c, 0x50, 0x00, 0x0c,
- 0x88, 0xa5, 0x9c, 0x00,
- 0x6c, 0x79, 0x00, 0xc9,
- 0xe5, 0xcd, 0xc0, 0x2c,
- 0x94, 0xc8, 0x88, 0x35,
- 0x6c, 0x41, 0x00, 0x69,
- 0x00, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xe9,
- 0xe0, 0x1a, 0x50, 0xca,
- 0xe0, 0x0e, 0x52, 0x7a,
- 0xe1, 0x1a, 0x58, 0xca,
- 0xe6, 0x92, 0x50, 0x8a,
- 0xe1, 0x0e, 0x4c, 0x7a,
- 0x58, 0xca, 0x10, 0x93,
- 0x0e, 0x94, 0xe6, 0x8e,
- 0x50, 0x02, 0x7a, 0x80,
- 0x4e, 0x7a, 0xf0, 0x84,
- 0x8c, 0xc3, 0x66, 0x8a,
- 0x64, 0x81, 0x0c, 0x80,
- 0x8e, 0xc3, 0xc0, 0x6e,
- 0x02, 0x11, 0x98, 0xc6,
- 0x02, 0x0a, 0x82, 0x51,
- 0xf2, 0xb5, 0xe0, 0x40,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x00, 0x00, 0x10, 0x14,
- 0x00, 0x43, 0x4a, 0xb0,
- 0x00, 0x00, 0x09, 0x2c,
- 0x00, 0x00, 0x1a, 0x24,
- 0x00, 0x43, 0x54, 0xc0,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x19, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xe0,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x00,
- 0x00, 0x80, 0x02, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x11,
- 0x00, 0x80, 0x02, 0x12,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x16,
- 0x00, 0x80, 0x02, 0x17,
- 0x00, 0x80, 0x02, 0x18,
- 0x00, 0x80, 0x02, 0x19,
- 0x00, 0x80, 0x02, 0x1a,
- 0x00, 0x80, 0x02, 0x1b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x1d,
- 0x00, 0x80, 0x02, 0x1e,
- 0x00, 0x80, 0x02, 0x20,
- 0x00, 0x80, 0x02, 0x24,
- 0x00, 0x80, 0x02, 0x26,
- 0x00, 0x80, 0x02, 0x2c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x2f,
- 0x00, 0x80, 0x02, 0x46,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4c,
- 0x00, 0x80, 0x02, 0x4d,
- 0x00, 0x80, 0x02, 0x4e,
- 0x00, 0x80, 0x02, 0x51,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x53,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x57,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x59,
- 0x00, 0x80, 0x02, 0x5a,
- 0x00, 0x80, 0x02, 0x5f,
- 0x00, 0x80, 0x02, 0x60,
- 0x00, 0x80, 0x02, 0x61,
- 0x00, 0x80, 0x02, 0x62,
- 0x00, 0x80, 0x02, 0x63,
- 0x00, 0x80, 0x02, 0x64,
- 0x00, 0x80, 0x02, 0x65,
- 0x00, 0x80, 0x02, 0x66,
- 0x00, 0x80, 0x02, 0x67,
- 0x00, 0x80, 0x02, 0x68,
- 0x00, 0x80, 0x02, 0x73,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x78,
- 0x00, 0x80, 0x02, 0x7c,
- 0x00, 0x80, 0x02, 0x81,
- 0x00, 0x80, 0x02, 0x86,
- 0x00, 0x80, 0x02, 0x87,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x95,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xa3,
- 0x00, 0x80, 0x02, 0xa8,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xaa,
- 0x00, 0x80, 0x02, 0xab,
- 0x00, 0x80, 0x02, 0xac,
- 0x00, 0x80, 0x02, 0xad,
- 0x00, 0x80, 0x02, 0xae,
- 0x00, 0x80, 0x02, 0xb1,
- 0x00, 0x80, 0x02, 0xb2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xb6,
- 0x00, 0x80, 0x02, 0xb7,
- 0x00, 0x80, 0x02, 0xb8,
- 0x00, 0x80, 0x02, 0xb9,
- 0x00, 0x80, 0x02, 0xba,
- 0x00, 0x80, 0x02, 0xbb,
- 0x00, 0x80, 0x02, 0xbc,
- 0x00, 0x80, 0x02, 0xbd,
- 0x00, 0x80, 0x02, 0xbe,
- 0x00, 0x80, 0x02, 0xbf,
- 0x00, 0x80, 0x02, 0xc2,
- 0x00, 0x80, 0x02, 0xc3,
- 0x00, 0x80, 0x02, 0xc4,
- 0x00, 0x80, 0x02, 0xc5,
- 0x00, 0x80, 0x40, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x02,
- 0x00, 0x80, 0x40, 0x03,
- 0x00, 0x80, 0x40, 0x04,
- 0x00, 0x80, 0x40, 0x06,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x09,
- 0x00, 0x80, 0x40, 0x0a,
- 0x00, 0x80, 0x40, 0x0b,
- 0x00, 0x80, 0x40, 0x0c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x0e,
- 0x00, 0x80, 0x40, 0x0f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x13,
- 0x00, 0x80, 0x40, 0x14,
- 0x00, 0x80, 0x40, 0x15,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x19,
- 0x00, 0x80, 0x40, 0x1e,
- 0x00, 0x80, 0x40, 0x1f,
- 0x00, 0x80, 0x40, 0x20,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x24,
- 0x00, 0x80, 0x40, 0x25,
- 0x00, 0x80, 0x40, 0x3c,
- 0x00, 0x80, 0x40, 0x3d,
- 0x00, 0x80, 0x40, 0x3e,
- 0x00, 0x80, 0x40, 0x3f,
- 0x00, 0x80, 0x40, 0x40,
- 0x00, 0x80, 0x40, 0x41,
- 0x00, 0x80, 0x40, 0x42,
- 0x00, 0x80, 0x40, 0x43,
- 0x00, 0x80, 0x40, 0x44,
- 0x00, 0x80, 0x40, 0x45,
- 0x00, 0x80, 0x40, 0x46,
- 0x00, 0x80, 0x40, 0x47,
- 0x00, 0x80, 0x40, 0x48,
- 0x00, 0x80, 0x40, 0x49,
- 0x00, 0x80, 0x40, 0x4a,
- 0x00, 0x80, 0x40, 0x4b,
- 0x00, 0x80, 0x40, 0x4c,
- 0x00, 0x80, 0x40, 0x4d,
- 0x00, 0x80, 0x40, 0x4e,
- 0x00, 0x80, 0x40, 0x4f,
- 0x00, 0x80, 0x40, 0x50,
- 0x00, 0x80, 0x40, 0x51,
- 0x00, 0x80, 0x40, 0x52,
- 0x00, 0x80, 0x40, 0x53,
- 0x00, 0x80, 0x40, 0x54,
- 0x00, 0x80, 0x40, 0x55,
- 0x00, 0x80, 0x40, 0x56,
- 0x00, 0x80, 0x40, 0x57,
- 0x00, 0x80, 0x40, 0x58,
- 0x00, 0x80, 0x40, 0x59,
- 0x00, 0x80, 0x40, 0x5a,
- 0x00, 0x80, 0x40, 0x5b,
- 0x00, 0x80, 0x40, 0x5c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x5e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x60,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x69,
- 0x00, 0x80, 0x40, 0x6a,
- 0x00, 0x80, 0x40, 0x6b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x74,
- 0x00, 0x80, 0x40, 0x78,
- 0x00, 0x80, 0x40, 0x79,
- 0x00, 0x80, 0x40, 0x7a,
- 0x00, 0x80, 0x40, 0x7c,
- 0x00, 0x80, 0x40, 0x84,
- 0x00, 0x80, 0x40, 0x85,
- 0x00, 0x80, 0x40, 0x88,
- 0x00, 0x80, 0x40, 0x89,
- 0x00, 0x80, 0x40, 0x8e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x90,
- 0x00, 0x80, 0x40, 0x91,
- 0x00, 0x80, 0x40, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x9f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa1,
- 0x00, 0x80, 0x40, 0xa2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa8,
- 0x00, 0x80, 0x40, 0xb0,
- 0x00, 0x80, 0x40, 0xb6,
- 0x00, 0x80, 0x40, 0xd0,
- 0x00, 0x80, 0x40, 0xd1,
- 0x00, 0x80, 0x40, 0xd4,
- 0x00, 0x80, 0x40, 0xd5,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdf,
- 0x00, 0x80, 0x43, 0xdc,
- 0x00, 0x80, 0x43, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x43, 0xe4,
- 0x00, 0x80, 0x44, 0x04,
- 0x00, 0x80, 0x44, 0x28,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x44, 0x48,
- 0x00, 0x80, 0x44, 0x4c,
- 0x00, 0x80, 0x44, 0x50,
- 0x00, 0x80, 0x44, 0x54,
- 0x00, 0x80, 0x44, 0x58,
- 0x00, 0x80, 0x44, 0x5c,
- 0x00, 0x80, 0x44, 0x60,
- 0x00, 0x80, 0x44, 0x64,
- 0x00, 0x80, 0x44, 0x68,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x46, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xc8,
- 0x00, 0x80, 0x48, 0xc9,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xcb,
- 0x00, 0x80, 0x48, 0xcc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x49, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x34, 0x3c,
- 0x00, 0x80, 0x80, 0x00,
- 0x00, 0x80, 0x80, 0x01,
- 0x00, 0x80, 0x80, 0x02,
- 0x00, 0x80, 0x80, 0x06,
- 0x00, 0x80, 0x80, 0x07,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x09,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x0e,
- 0x00, 0x80, 0x80, 0x10,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x14,
- 0x00, 0x80, 0x80, 0x18,
- 0x00, 0x80, 0x80, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x2d,
- 0x00, 0x80, 0x80, 0x2e,
- 0x00, 0x80, 0x80, 0x31,
- 0x00, 0x80, 0x80, 0x32,
- 0x00, 0x80, 0x80, 0x35,
- 0x00, 0x80, 0x80, 0x36,
- 0x00, 0x80, 0x80, 0x37,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x39,
- 0x00, 0x80, 0x80, 0x3a,
- 0x00, 0x80, 0x80, 0x3b,
- 0x00, 0x80, 0x80, 0x3c,
- 0x00, 0x80, 0x80, 0x3d,
- 0x00, 0x80, 0x80, 0x3e,
- 0x00, 0x80, 0x80, 0x40,
- 0x00, 0x80, 0x80, 0x44,
- 0x00, 0x80, 0x80, 0x48,
- 0x00, 0x80, 0x80, 0x49,
- 0x00, 0x80, 0x80, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x4c,
- 0x00, 0x80, 0x80, 0x50,
- 0x00, 0x80, 0x80, 0x54,
- 0x00, 0x80, 0x80, 0x55,
- 0x00, 0x80, 0x80, 0x56,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x58,
- 0x00, 0x80, 0x80, 0x5c,
- 0x00, 0x80, 0x80, 0x60,
- 0x00, 0x80, 0x80, 0x61,
- 0x00, 0x80, 0x80, 0x62,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x64,
- 0x00, 0x80, 0x80, 0x68,
- 0x00, 0x80, 0x80, 0x6c,
- 0x00, 0x80, 0x80, 0x6d,
- 0x00, 0x80, 0x80, 0x6e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x70,
- 0x00, 0x80, 0x80, 0x74,
- 0x00, 0x80, 0x80, 0x78,
- 0x00, 0x80, 0x80, 0x79,
- 0x00, 0x80, 0x80, 0x7a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x7c,
- 0x00, 0x80, 0x80, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x88,
- 0x00, 0x80, 0x80, 0x8c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x94,
- 0x00, 0x80, 0x80, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x00, 0x80,
- 0x00, 0x80, 0x00, 0x81,
- 0x00, 0x80, 0x00, 0x82,
- 0x00, 0x80, 0x00, 0x83,
- 0x00, 0x80, 0x00, 0x84,
- 0x00, 0x80, 0x00, 0x85,
- 0x00, 0x80, 0x00, 0x86,
- 0x00, 0x80, 0x00, 0x87,
- 0x00, 0x80, 0x00, 0x88,
- 0x00, 0x80, 0x00, 0x89,
- 0x00, 0x80, 0x00, 0x8a,
- 0x00, 0x80, 0x00, 0x8b,
- 0x00, 0x80, 0x00, 0x8c,
- 0x00, 0x80, 0x00, 0x8d,
- 0x00, 0x80, 0x00, 0x8e,
- 0x00, 0x80, 0x00, 0x8f,
- 0x00, 0x80, 0x00, 0x90,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x01, 0x01,
- 0x00, 0x80, 0x01, 0x02,
- 0x00, 0x80, 0x01, 0x03,
- 0x00, 0x80, 0x01, 0x04,
- 0x00, 0x80, 0x01, 0x05,
- 0x00, 0x80, 0x01, 0x06,
- 0x00, 0x80, 0x01, 0x07,
- 0x00, 0x80, 0x01, 0x0a,
- 0x00, 0x80, 0x01, 0x0c,
- 0x00, 0x81, 0x2c, 0x00,
- 0x00, 0x81, 0x2f, 0xfc,
- 0x00, 0x00, 0x0d, 0x00,
- 0x00, 0x00, 0x00, 0x64,
- 0x00, 0x00, 0xbb, 0x80,
- 0x00, 0x00, 0x1a, 0x48,
- 0x00, 0x00, 0xfb, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x17, 0xec,
- 0x00, 0x00, 0x18, 0x54,
- 0x00, 0x00, 0x18, 0xbc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x1a, 0x3f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
-
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default configuration.
- */
-
-const uint8_t VL53L5CX_DEFAULT_CONFIGURATION[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x04, 0x04,
- 0x00, 0x00, 0x08, 0x08,
- 0xAD, 0x30, 0x00, 0x80,
- 0x02, 0x01, 0x03, 0x03,
- 0x00, 0x00, 0x03, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x40, 0x00, 0x40,
- 0x01, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x01, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x00, 0x27, 0x10,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x13, 0x00, 0x29,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_RANGING,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x0C, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x07, 0x08, 0x07,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x01,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x40, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x01, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x25, 0x80,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x02,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x00, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0xFF, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x34, 0x9B, 0x04, 0x35,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xc8
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default Xtalk data.
- */
-
-const uint8_t VL53L5CX_DEFAULT_XTALK[] = {
- 0x9f, 0xd8, 0x00, 0xc0,
- 0x03, 0x20, 0x09, 0x60,
- 0x0b, 0x08, 0x08, 0x17,
- 0x08, 0x08, 0x08, 0x03,
- 0x9f, 0xe4, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x01, 0xe0, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x9f, 0xf8, 0x00, 0x40,
- 0x17, 0x17, 0x17, 0x17,
- 0x9f, 0xfc, 0x04, 0x04,
- 0x00, 0x00, 0x46, 0xa4,
- 0x00, 0x00, 0x37, 0x66,
- 0x00, 0x00, 0x26, 0x60,
- 0x00, 0x00, 0x1c, 0xbc,
- 0x00, 0x00, 0x17, 0x73,
- 0x00, 0x00, 0x11, 0x25,
- 0x00, 0x00, 0x11, 0x07,
- 0x00, 0x00, 0x0e, 0x63,
- 0x00, 0x00, 0x8b, 0x4c,
- 0x00, 0x00, 0x60, 0xa2,
- 0x00, 0x00, 0x3d, 0xc0,
- 0x00, 0x00, 0x26, 0xaa,
- 0x00, 0x00, 0x1b, 0xc2,
- 0x00, 0x00, 0x18, 0x04,
- 0x00, 0x00, 0x14, 0x97,
- 0x00, 0x00, 0x10, 0xed,
- 0x00, 0x01, 0x28, 0x1b,
- 0x00, 0x00, 0x93, 0xf0,
- 0x00, 0x00, 0x57, 0x61,
- 0x00, 0x00, 0x30, 0x2b,
- 0x00, 0x00, 0x20, 0xaa,
- 0x00, 0x00, 0x1a, 0xb6,
- 0x00, 0x00, 0x15, 0xc3,
- 0x00, 0x00, 0x16, 0x0e,
- 0x00, 0x01, 0x7f, 0xbb,
- 0x00, 0x00, 0xad, 0x58,
- 0x00, 0x00, 0x71, 0xaf,
- 0x00, 0x00, 0x36, 0xd9,
- 0x00, 0x00, 0x22, 0xfb,
- 0x00, 0x00, 0x1c, 0x96,
- 0x00, 0x00, 0x18, 0x83,
- 0x00, 0x00, 0x17, 0x96,
- 0x00, 0x01, 0x90, 0x00,
- 0x00, 0x00, 0x97, 0xd6,
- 0x00, 0x00, 0x66, 0x3b,
- 0x00, 0x00, 0x33, 0x0a,
- 0x00, 0x00, 0x20, 0xcd,
- 0x00, 0x00, 0x19, 0x38,
- 0x00, 0x00, 0x16, 0xa5,
- 0x00, 0x00, 0x14, 0xbb,
- 0x00, 0x00, 0xaf, 0xcf,
- 0x00, 0x00, 0x65, 0x7d,
- 0x00, 0x00, 0x3d, 0x93,
- 0x00, 0x00, 0x29, 0xd1,
- 0x00, 0x00, 0x19, 0x4e,
- 0x00, 0x00, 0x15, 0xba,
- 0x00, 0x00, 0x11, 0xc6,
- 0x00, 0x00, 0x12, 0x7f,
- 0x00, 0x00, 0x73, 0x1d,
- 0x00, 0x00, 0x42, 0x2c,
- 0x00, 0x00, 0x2e, 0x82,
- 0x00, 0x00, 0x1e, 0x80,
- 0x00, 0x00, 0x18, 0x1c,
- 0x00, 0x00, 0x13, 0x2d,
- 0x00, 0x00, 0x0f, 0xc6,
- 0x00, 0x00, 0x0f, 0x85,
- 0x00, 0x00, 0x4f, 0x04,
- 0x00, 0x00, 0x33, 0xe9,
- 0x00, 0x00, 0x1f, 0x06,
- 0x00, 0x00, 0x18, 0x40,
- 0x00, 0x00, 0x13, 0x2c,
- 0x00, 0x00, 0x12, 0x97,
- 0x00, 0x00, 0x0e, 0x01,
- 0x00, 0x00, 0x0d, 0xac,
- 0xa0, 0xfc, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x0c, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x1c, 0x00, 0xc0,
- 0x00, 0x00, 0x70, 0xeb,
- 0x0c, 0x80, 0x01, 0xe0,
- 0x00, 0x00, 0x00, 0x26,
- 0xa1, 0x28, 0x09, 0x02,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x00, 0x00,
- 0x00, 0x36, 0x00, 0x03,
- 0x01, 0xd9, 0x01, 0x43,
- 0x02, 0x33, 0x02, 0x17,
- 0x02, 0x4b, 0x02, 0x41,
- 0x01, 0x17, 0x02, 0x22,
- 0x00, 0x27, 0x00, 0x5d,
- 0x00, 0x05, 0x00, 0x11,
- 0x00, 0x00, 0x00, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x4c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x54, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x5c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x64, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x6c, 0x00, 0x84,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x8c, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x05, 0x01, 0x03, 0x04
-};
-
-/**
- * @brief This buffer is used to get NVM data.
- */
-
-const uint8_t VL53L5CX_GET_NVM_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9E, 0x14, 0x00, 0xC0,
- 0x9E, 0x20, 0x01, 0x40,
- 0x9E, 0x34, 0x00, 0x40,
- 0x9E, 0x38, 0x04, 0x04,
- 0x9F, 0x38, 0x04, 0x02,
- 0x9F, 0xB8, 0x01, 0x00,
- 0x9F, 0xC8, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x02, 0x02, 0x00, 0x24
-};
-
-#endif /* VL53L5CX_BUFFERS_H_ */
-
diff --git a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_detection_thresholds.h b/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_detection_thresholds.h
deleted file mode 100644
index 73d44b61bdc91d1018072c8b82241e6b00cef907..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_detection_thresholds.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-#define VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Macro VL53L5CX_NB_THRESHOLDS indicates the number of checkers. This
- * value cannot be changed.
- */
-
-#define VL53L5CX_NB_THRESHOLDS ((uint8_t)64U)
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_DET_THRESH_CONFIG ((uint16_t)0x5488U)
-#define VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG ((uint16_t)0xB6E0U)
-#define VL53L5CX_DCI_DET_THRESH_START ((uint16_t)0xB6E8U)
-#define VL53L5CX_DCI_DET_THRESH_VALID_STATUS ((uint16_t)0xB9F0U)
-
-/**
- * @brief Macro VL53L5CX_LAST_THRESHOLD is used to indicate the end of checkers
- * programming.
- */
-
-#define VL53L5CX_LAST_THRESHOLD ((uint8_t)128U)
-
-/**
- * @brief The following macro are used to define the 'param_type' of a checker.
- * They indicate what is the measurement to catch.
- */
-
-#define VL53L5CX_DISTANCE_MM ((uint8_t)1U)
-#define VL53L5CX_SIGNAL_PER_SPAD_KCPS ((uint8_t)2U)
-#define VL53L5CX_RANGE_SIGMA_MM ((uint8_t)4U)
-#define VL53L5CX_AMBIENT_PER_SPAD_KCPS ((uint8_t)8U)
-#define VL53L5CX_NB_TARGET_DETECTED ((uint8_t)9U)
-#define VL53L5CX_TARGET_STATUS ((uint8_t)12U)
-#define VL53L5CX_NB_SPADS_ENABLED ((uint8_t)13U)
-#define VL53L5CX_MOTION_INDICATOR ((uint8_t)19U)
-
-/**
- * @brief The following macro are used to define the 'type' of a checker.
- * They indicate the window of measurements, defined by low and a high
- * thresholds.
- */
-
-#define VL53L5CX_IN_WINDOW ((uint8_t)0U)
-#define VL53L5CX_OUT_OF_WINDOW ((uint8_t)1U)
-#define VL53L5CX_LESS_THAN_EQUAL_MIN_CHECKER ((uint8_t)2U)
-#define VL53L5CX_GREATER_THAN_MAX_CHECKER ((uint8_t)3U)
-#define VL53L5CX_EQUAL_MIN_CHECKER ((uint8_t)4U)
-#define VL53L5CX_NOT_EQUAL_MIN_CHECKER ((uint8_t)5U)
-
-/**
- * @brief The following macro are used to define multiple checkers in the same
- * zone, using operators. Please note that the first checker MUST always be a OR
- * operation.
- */
-
-#define VL53L5CX_OPERATION_NONE ((uint8_t)0U)
-#define VL53L5CX_OPERATION_OR ((uint8_t)0U)
-#define VL53L5CX_OPERATION_AND ((uint8_t)2U)
-
-/**
- * @brief Structure VL53L5CX_DetectionThresholds contains a single threshold.
- * This structure is never used alone, it must be used as an array of 64
- * thresholds (defined by macro VL53L5CX_NB_THRESHOLDS).
- */
-
-typedef struct {
-
- /* Low threshold */
- int32_t param_low_thresh;
- /* High threshold */
- int32_t param_high_thresh;
- /* Measurement to catch (VL53L5CX_MEDIAN_RANGE_MM,...)*/
- uint8_t measurement;
- /* Windows type (VL53L5CX_IN_WINDOW, VL53L5CX_OUT_WINDOW, ...) */
- uint8_t type;
- /* Zone id. Please read VL53L5 user manual to find the zone id.Set macro
- * VL53L5CX_LAST_THRESHOLD to indicates the end of checkers */
- uint8_t zone_num;
- /* Mathematics operation (AND/OR). The first threshold is always OR.*/
- uint8_t mathematic_operation;
-}VL53L5CX_DetectionThresholds;
-
-/**
- * @brief This function allows indicating if the detection thresholds are
- * enabled.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_enabled : Set to 1 if enabled, or 0 if disable.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled);
-
-/**
- * @brief This function allows enable the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) enabled : Set to 1 to enable, or 0 to disable thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled);
-
-/**
- * @brief This function allows getting the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-/**
- * @brief This function allows programming the detection thresholds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_DetectionThresholds) *p_thresholds : Array of 64 thresholds.
- * @return (uint8_t) status : 0 if programming is OK
- */
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds);
-
-#endif /* VL53L5CX_PLUGIN_DETECTION_THRESHOLDS_H_ */
diff --git a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_motion_indicator.h b/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_motion_indicator.h
deleted file mode 100644
index ea413290a3873ea37e4b0e30849d7af755f8a136..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_motion_indicator.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-#define VL53L5CX_PLUGIN_MOTION_INDICATOR_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Motion indicator internal configuration structure.
- */
-
-typedef struct {
- int32_t ref_bin_offset;
- uint32_t detection_threshold;
- uint32_t extra_noise_sigma;
- uint32_t null_den_clip_value;
- uint8_t mem_update_mode;
- uint8_t mem_update_choice;
- uint8_t sum_span;
- uint8_t feature_length;
- uint8_t nb_of_aggregates;
- uint8_t nb_of_temporal_accumulations;
- uint8_t min_nb_for_global_detection;
- uint8_t global_indicator_format_1;
- uint8_t global_indicator_format_2;
- uint8_t spare_1;
- uint8_t spare_2;
- uint8_t spare_3;
- int8_t map_id[64];
- uint8_t indicator_format_1[32];
- uint8_t indicator_format_2[32];
-}VL53L5CX_Motion_Configuration;
-
-/**
- * @brief This function is used to initialized the motion indicator. By default,
- * indicator is programmed to monitor movements between 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-/**
- * @brief This function can be used to change the working distance of motion
- * indicator. By default, indicator is programmed to monitor movements between
- * 400mm and 1500mm.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint16_t) distance_min_mm : Minimum distance for indicator (min value
- * 400mm, max 4000mm).
- * @param (uint16_t) distance_max_mm : Maximum distance for indicator (min value
- * 400mm, max 4000mm).
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 if an argument is invalid.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm);
-
-/**
- * @brief This function is used to update the internal motion indicator map.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_Motion_Configuration) *p_motion_config : Structure
- * containing the initialized motion configuration.
- * @param (uint8_t) resolution : Wanted SCI resolution, defined by macros
- * VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8.
- * @return (uint8_t) status : 0 if OK, or 127 is the resolution is unknown.
- */
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution);
-
-#endif /* VL53L5CX_PLUGIN_MOTION_INDICATOR_H_ */
diff --git a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_xtalk.h b/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_xtalk.h
deleted file mode 100644
index be63e73ed5bf2a11eb8d4c8be7adda11ae7becaf..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/include/vl53l5cx_plugin_xtalk.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_PLUGIN_XTALK_H_
-#define VL53L5CX_PLUGIN_XTALK_H_
-
-#include "vl53l5cx_api.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_XTALK 2
-#else
-#define VL53L5CX_FW_NBTAR_XTALK VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief Inner Macro for plugin. Not for user, only for development.
- */
-
-#define VL53L5CX_DCI_CAL_CFG ((uint16_t)0x5470U)
-#define VL53L5CX_DCI_XTALK_CFG ((uint16_t)0xAD94U)
-
-
-/**
- * @brief This function starts the VL53L5CX sensor in order to calibrate Xtalk.
- * This calibration is recommended is user wants to use a coverglass.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) reflectance_percent : Target reflectance in percent. This
- * value is include between 1 and 99%. For a better efficiency, ST recommends a
- * 3% target reflectance.
- * @param (uint8_t) nb_samples : Nb of samples used for calibration. A higher
- * number of samples means a higher accuracy, but it increases the calibration
- * time. Minimum is 1 and maximum is 16.
- * @param (uint16_t) distance_mm : Target distance in mm. The minimum allowed
- * distance is 600mm, and maximum is 3000mm. The target must stay in Full FOV,
- * so short distance are easier for calibration.
- * @return (uint8_t) status : 0 if calibration OK, 127 if an argument has an
- * incorrect value, or 255 is something failed.
- */
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm);
-
-/**
- * @brief This function gets the Xtalk buffer. The buffer is available after
- * using the function vl53l5cx_calibrate_xtalk().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer reading OK
- */
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function sets the Xtalk buffer. This function can be used to
- * override default Xtalk buffer.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5 configuration structure.
- * @param (uint8_t) *p_xtalk_data : Buffer with a size defined by
- * macro VL53L5CX_XTALK_SIZE.
- * @return (uint8_t) status : 0 if buffer OK
- */
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data);
-
-/**
- * @brief This function gets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_xtalk_margin : Xtalk margin in kcps/spads.
- * @return (uint8_t) status : 0 if reading OK
- */
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin);
-
-/**
- * @brief This function sets the Xtalk margin. This margin is used to increase
- * the Xtalk threshold. It can also be used to avoid false positives after the
- * Xtalk calibration. The default value is 50 kcps/spads.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) xtalk_margin : New Xtalk margin in kcps/spads. Min value is
- * 0 kcps/spads, and max is 10.000 kcps/spads
- * @return (uint8_t) status : 0 if set margin is OK, or 127 is the margin is
- * invalid.
- */
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin);
-
-/**
- * @brief Command used to get Xtalk calibration data
- */
-
-static const uint8_t VL53L5CX_GET_XTALK_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9F, 0xD8, 0x00, 0xC0,
- 0x9F, 0xE4, 0x01, 0x40,
- 0x9F, 0xF8, 0x00, 0x40,
- 0x9F, 0xFC, 0x04, 0x04,
- 0xA0, 0xFC, 0x01, 0x00,
- 0xA1, 0x0C, 0x01, 0x00,
- 0xA1, 0x1C, 0x00, 0xC0,
- 0xA1, 0x28, 0x09, 0x02,
- 0xA2, 0x48, 0x00, 0x40,
- 0xA2, 0x4C, 0x00, 0x81,
- 0xA2, 0x54, 0x00, 0x81,
- 0xA2, 0x5C, 0x00, 0x81,
- 0xA2, 0x64, 0x00, 0x81,
- 0xA2, 0x6C, 0x00, 0x84,
- 0xA2, 0x8C, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x0F,
- 0x07, 0x02, 0x00, 0x44
-};
-
-/**
- * @brief Command used to get run Xtalk calibration
- */
-
-static const uint8_t VL53L5CX_CALIBRATE_XTALK[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x08, 0x08,
- 0x00, 0x00, 0x04, 0x04,
- 0xAD, 0x30, 0x00, 0x80,
- 0x03, 0x01, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x10, 0x00, 0x10,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x02, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x01, 0x00, 0x51,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x1B, 0x00, 0x21,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_XTALK,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x00,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x80, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x01, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0xA3, 0xE8, 0xA3, 0xB8,
- 0xA4, 0x38, 0xA4, 0x28,
- 0xA6, 0x48, 0xA4, 0x48,
- 0xA7, 0x88, 0xA7, 0x48,
- 0xAC, 0x10, 0xA7, 0x90,
- 0x99, 0xBC, 0x99, 0xB4,
- 0x9A, 0xFC, 0x9A, 0xBC,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x88, 0x03, 0x00,
- 0x00, 0x82, 0x00, 0x82,
- 0x04, 0x04, 0x04, 0x08,
- 0x00, 0x80, 0x04, 0x01,
- 0x09, 0x02, 0x09, 0x08,
- 0x04, 0x04, 0x00, 0x80,
- 0x04, 0x01, 0x04, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0x04, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x40, 0x00, 0x05, 0x1E,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x02,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xD4
-};
-
-#endif /* VL53L5CX_PLUGIN_XTALK_H_ */
diff --git a/Pi_Pico_Cpp/blink/pico_sdk_import.cmake b/Pi_Pico_Cpp/blink/pico_sdk_import.cmake
deleted file mode 100644
index a0721d0d13d7bcef15e0cf6680570bb7ec422716..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/pico_sdk_import.cmake
+++ /dev/null
@@ -1,84 +0,0 @@
-# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
-
-# This can be dropped into an external project to help locate this SDK
-# It should be include()ed prior to project()
-
-if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
- set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
- message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
- set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
- message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
- set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
- message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_TAG} AND (NOT PICO_SDK_FETCH_FROM_GIT_TAG))
- set(PICO_SDK_FETCH_FROM_GIT_TAG $ENV{PICO_SDK_FETCH_FROM_GIT_TAG})
- message("Using PICO_SDK_FETCH_FROM_GIT_TAG from environment ('${PICO_SDK_FETCH_FROM_GIT_TAG}')")
-endif ()
-
-if (PICO_SDK_FETCH_FROM_GIT AND NOT PICO_SDK_FETCH_FROM_GIT_TAG)
- set(PICO_SDK_FETCH_FROM_GIT_TAG "master")
- message("Using master as default value for PICO_SDK_FETCH_FROM_GIT_TAG")
-endif()
-
-set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
-set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
-set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
-set(PICO_SDK_FETCH_FROM_GIT_TAG "${PICO_SDK_FETCH_FROM_GIT_TAG}" CACHE FILEPATH "release tag for SDK")
-
-if (NOT PICO_SDK_PATH)
- if (PICO_SDK_FETCH_FROM_GIT)
- include(FetchContent)
- set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
- if (PICO_SDK_FETCH_FROM_GIT_PATH)
- get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
- endif ()
- # GIT_SUBMODULES_RECURSE was added in 3.17
- if (${CMAKE_VERSION} VERSION_GREATER_EQUAL "3.17.0")
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- GIT_SUBMODULES_RECURSE FALSE
- )
- else ()
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- )
- endif ()
-
- if (NOT pico_sdk)
- message("Downloading Raspberry Pi Pico SDK")
- FetchContent_Populate(pico_sdk)
- set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
- endif ()
- set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
- else ()
- message(FATAL_ERROR
- "SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
- )
- endif ()
-endif ()
-
-get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
-if (NOT EXISTS ${PICO_SDK_PATH})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
-endif ()
-
-set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
-if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
-endif ()
-
-set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
-
-include(${PICO_SDK_INIT_CMAKE_FILE})
diff --git a/Pi_Pico_Cpp/blink/raspberrypi-swd.cfg b/Pi_Pico_Cpp/blink/raspberrypi-swd.cfg
deleted file mode 100644
index e8705e1e244a64abee73aa90589fc25383e966bb..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/raspberrypi-swd.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-adapter driver linuxgpiod
-
-adapter gpio swdio -chip 0 24
-adapter gpio swclk -chip 0 25
diff --git a/Pi_Pico_Cpp/blink/src/platform.c b/Pi_Pico_Cpp/blink/src/platform.c
deleted file mode 100644
index b5d2ca9f58b95600ee1d24adfb84824198913c8d..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/src/platform.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-
-#include "platform.h"
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform)
-{
- uint8_t status = 0;
-
- /* (Optional) Need to be implemented by customer. This function returns 0 if OK */
-
- /* Set pin LPN to LOW */
- /* Set pin AVDD to LOW */
- /* Set pin VDDIO to LOW */
- VL53L5CX_WaitMs(p_platform, 100);
-
- /* Set pin LPN of to HIGH */
- /* Set pin AVDD of to HIGH */
- /* Set pin VDDIO of to HIGH */
- VL53L5CX_WaitMs(p_platform, 100);
-
- return status;
-}
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size)
-{
- uint32_t i, tmp;
-
- /* Example of possible implementation using <string.h> */
- for(i = 0; i < size; i = i + 4)
- {
- tmp = (
- buffer[i]<<24)
- |(buffer[i+1]<<16)
- |(buffer[i+2]<<8)
- |(buffer[i+3]);
-
- memcpy(&(buffer[i]), &tmp, 4);
- }
-}
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/blink/src/vl53l5cx_api.c b/Pi_Pico_Cpp/blink/src/vl53l5cx_api.c
deleted file mode 100644
index f92ec505aaa80e6fb558a4ce4fb29e5ce9c38c7e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/src/vl53l5cx_api.c
+++ /dev/null
@@ -1,1333 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_buffers.h"
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to wait for an answer from VL53L5CX sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint8_t size,
- uint8_t pos,
- uint16_t address,
- uint8_t mask,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform), address,
- p_dev->temp_buffer, size);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- if(timeout >= (uint8_t)200) /* 2s timeout */
- {
- status |= (uint8_t)VL53L5CX_STATUS_TIMEOUT_ERROR;
- break;
- }else if((size >= (uint8_t)4)
- && (p_dev->temp_buffer[2] >= (uint8_t)0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[pos] & mask) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for the MCU to boot.
- */
-static uint8_t _vl53l5cx_poll_for_mcu_boot(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t go2_status0, go2_status1, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x06, &go2_status0);
- if((go2_status0 & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x07, &go2_status1);
- status |= go2_status1;
- break;
- }
- (void)VL53L5CX_WaitMs(&(p_dev->platform), 1);
- timeout++;
-
- if((go2_status0 & (uint8_t)0x1) != (uint8_t)0){
- break;
- }
-
- }while (timeout < (uint16_t)500);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the offset data gathered from NVM.
- */
-
-static uint8_t _vl53l5cx_send_offset_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t signal_grid[64];
- int16_t range_grid[64];
- uint8_t dss_4x4[] = {0x0F, 0x04, 0x04, 0x00, 0x08, 0x10, 0x10, 0x07};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x03, 0x01, 0x01, 0xE4};
- int8_t i, j;
- uint16_t k;
-
- (void)memcpy(p_dev->temp_buffer,
- p_dev->offset_data, VL53L5CX_OFFSET_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 offset */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4){
- (void)memcpy(&(p_dev->temp_buffer[0x10]), dss_4x4, sizeof(dss_4x4));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- (void)memcpy(signal_grid,&(p_dev->temp_buffer[0x3C]),
- sizeof(signal_grid));
- (void)memcpy(range_grid,&(p_dev->temp_buffer[0x140]),
- sizeof(range_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+ (int8_t)0]
- + signal_grid[(2*i)+(16*j)+(int8_t)1]
- + signal_grid[(2*i)+(16*j)+(int8_t)8]
- + signal_grid[(2*i)+(16*j)+(int8_t)9])
- /(uint32_t)4;
- range_grid[i+(4*j)] =
- (range_grid[(2*i)+(16*j)]
- + range_grid[(2*i)+(16*j)+1]
- + range_grid[(2*i)+(16*j)+8]
- + range_grid[(2*i)+(16*j)+9])
- /(int16_t)4;
- }
- }
- (void)memset(&range_grid[0x10], 0, (uint16_t)96);
- (void)memset(&signal_grid[0x10], 0, (uint16_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x3C]),
- signal_grid, sizeof(signal_grid));
- (void)memcpy(&(p_dev->temp_buffer[0x140]),
- range_grid, sizeof(range_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- }
-
- for(k = 0; k < (VL53L5CX_OFFSET_BUFFER_SIZE - (uint16_t)4); k++)
- {
- p_dev->temp_buffer[k] = p_dev->temp_buffer[k + (uint16_t)8];
- }
-
- (void)memcpy(&(p_dev->temp_buffer[0x1E0]), footer, 8);
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2e18, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the Xtalk data from generic configuration, or user's calibration.
- */
-
-static uint8_t _vl53l5cx_send_xtalk_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t res4x4[] = {0x0F, 0x04, 0x04, 0x17, 0x08, 0x10, 0x10, 0x07};
- uint8_t dss_4x4[] = {0x00, 0x78, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08};
- uint8_t profile_4x4[] = {0xA0, 0xFC, 0x01, 0x00};
- uint32_t signal_grid[64];
- int8_t i, j;
-
- (void)memcpy(p_dev->temp_buffer, &(p_dev->xtalk_data[0]),
- VL53L5CX_XTALK_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 Xtalk */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4)
- {
- (void)memcpy(&(p_dev->temp_buffer[0x8]),
- res4x4, sizeof(res4x4));
- (void)memcpy(&(p_dev->temp_buffer[0x020]),
- dss_4x4, sizeof(dss_4x4));
-
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(signal_grid, &(p_dev->temp_buffer[0x34]),
- sizeof(signal_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+0]
- + signal_grid[(2*i)+(16*j)+1]
- + signal_grid[(2*i)+(16*j)+8]
- + signal_grid[(2*i)+(16*j)+9])/(uint32_t)4;
- }
- }
- (void)memset(&signal_grid[0x10], 0, (uint32_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x34]),
- signal_grid, sizeof(signal_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(&(p_dev->temp_buffer[0x134]),
- profile_4x4, sizeof(profile_4x4));
- (void)memset(&(p_dev->temp_buffer[0x078]),0 ,
- (uint32_t)4*sizeof(uint8_t));
- }
-
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2cf8,
- p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t device_id, revision_id;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0, &device_id);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 1, &revision_id);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- if((device_id == (uint8_t)0xF0) && (revision_id == (uint8_t)0x02))
- {
- *p_is_alive = 1;
- }
- else
- {
- *p_is_alive = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t pipe_ctrl[] = {VL53L5CX_NB_TARGET_PER_ZONE, 0x00, 0x01, 0x00};
- uint32_t single_range = 0x01;
-
- p_dev->default_xtalk = (uint8_t*)VL53L5CX_DEFAULT_XTALK;
- p_dev->default_configuration = (uint8_t*)VL53L5CX_DEFAULT_CONFIGURATION;
- p_dev->is_auto_stop_enabled = (uint8_t)0x0;
-
- /* SW reboot sequence */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0009, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x03);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7FFF, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x01);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x43);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 1);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x01);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 100);
-
- /* Wait for sensor booted (several ms required to get sensor ready ) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x06, 0xff, 1);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000E, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Enable FW access */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Enable host access to GO1 */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Power ON status */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x400F, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x43);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x219, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21B, 0x00);
-
- /* Wake up MCU */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x07);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x06);
-
- /* Download FW into VL53L5 */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x09);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0a);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x8000],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0b);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x10000],0x5000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
-
- /* Check if FW correctly downloaded */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Reset MCU and wait boot */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x114, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x115, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x116, 0x42);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x117, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x01);
- status |= _vl53l5cx_poll_for_mcu_boot(p_dev);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Get offset NVM data and store them into the offset buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fd8,
- (uint8_t*)VL53L5CX_GET_NVM_CMD, sizeof(VL53L5CX_GET_NVM_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 0,
- VL53L5CX_UI_CMD_STATUS, 0xff, 2);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, VL53L5CX_NVM_DATA_SIZE);
- (void)memcpy(p_dev->offset_data, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |= _vl53l5cx_send_offset_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Set default Xtalk shape. Send Xtalk to sensor */
- (void)memcpy(p_dev->xtalk_data, (uint8_t*)VL53L5CX_DEFAULT_XTALK,
- VL53L5CX_XTALK_BUFFER_SIZE);
- status |= _vl53l5cx_send_xtalk_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Send default configuration to VL53L5CX firmware */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- sizeof(VL53L5CX_DEFAULT_CONFIGURATION));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&pipe_ctrl,
- VL53L5CX_DCI_PIPE_CONTROL, (uint16_t)sizeof(pipe_ctrl));
-#if VL53L5CX_NB_TARGET_PER_ZONE != 1
- tmp = VL53L5CX_NB_TARGET_PER_ZONE;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FW_NB_TARGET, 16,
- (uint8_t*)&tmp, 1, 0x0C);
-#endif
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- tmp = (uint8_t)1;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x26);
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x25);
-
-exit:
- return status;
-}
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4, (uint8_t)(i2c_address >> 1));
- p_dev->platform.address = i2c_address;
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x009, &tmp);
-
- switch(tmp)
- {
- case 0x4:
- *p_power_mode = VL53L5CX_POWER_MODE_WAKEUP;
- break;
- case 0x2:
- *p_power_mode = VL53L5CX_POWER_MODE_SLEEP;
-
- break;
- default:
- *p_power_mode = 0;
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode)
-{
- uint8_t current_power_mode, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_power_mode(p_dev, ¤t_power_mode);
- if(power_mode != current_power_mode)
- {
- switch(power_mode)
- {
- case VL53L5CX_POWER_MODE_WAKEUP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 1);
- break;
-
- case VL53L5CX_POWER_MODE_SLEEP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x02);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 0);
- break;
-
- default:
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint16_t tmp;
- uint32_t i;
- uint32_t header_config[2] = {0, 0};
-
- union Block_header *bh_ptr;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
- p_dev->streamcount = 255;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x00000007U,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={VL53L5CX_START_BH,
- VL53L5CX_METADATA_BH,
- VL53L5CX_COMMONDATA_BH,
- VL53L5CX_AMBIENT_RATE_BH,
- VL53L5CX_SPAD_COUNT_BH,
- VL53L5CX_NB_TARGET_DETECTED_BH,
- VL53L5CX_SIGNAL_RATE_BH,
- VL53L5CX_RANGE_SIGMA_MM_BH,
- VL53L5CX_DISTANCE_BH,
- VL53L5CX_REFLECTANCE_BH,
- VL53L5CX_TARGET_STATUS_BH,
- VL53L5CX_MOTION_DETECT_BH};
-
- /* Enable selected outputs in the 'platform.h' file */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- output_bh_enable[0] += (uint32_t)8;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- output_bh_enable[0] += (uint32_t)16;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- output_bh_enable[0] += (uint32_t)32;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- output_bh_enable[0] += (uint32_t)64;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- output_bh_enable[0] += (uint32_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- output_bh_enable[0] += (uint32_t)256;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- output_bh_enable[0] += (uint32_t)512;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- output_bh_enable[0] += (uint32_t)1024;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- output_bh_enable[0] += (uint32_t)2048;
-#endif
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint16_t)((uint16_t)resolution
- * (uint16_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output), VL53L5CX_DCI_OUTPUT_LIST,
- (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output_bh_enable), VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- /* Start xshut bypass (interrupt mode) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x05);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), VL53L5CX_UI_CMD_END -
- (uint16_t)(4 - 1), (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- /* Read ui range data content and compare if data size is the correct one */
- status |= vl53l5cx_dci_read_data(p_dev,
- (uint8_t*)p_dev->temp_buffer, 0x5440, 12);
- (void)memcpy(&tmp, &(p_dev->temp_buffer[0x8]), sizeof(tmp));
- if(tmp != p_dev->data_read_size)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp = 0, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
- uint32_t auto_stop_flag = 0;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x2FFC, (uint8_t*)&auto_stop_flag, 4);
- if((auto_stop_flag != (uint32_t)0x4FF)
- && (p_dev->is_auto_stop_enabled == (uint8_t)0))
- {
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Provoke MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x16);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x01);
-
- /* Poll for G02 status 0 MCU stop */
- while(((tmp & (uint8_t)0x80) >> 7) == (uint8_t)0x00)
- {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
- timeout++; /* Timeout reached after 5 seconds */
-
- if(timeout > (uint16_t)500)
- {
- status |= tmp;
- break;
- }
- }
- }
-
- /* Check GO2 status 1 if status is still OK */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- if((tmp & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7, &tmp);
- if((tmp != (uint8_t)0x84) && (tmp != (uint8_t)0x85)){
- status |= tmp;
- }
- }
-
- /* Undo MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x00);
-
- /* Stop xshut bypass */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0, p_dev->temp_buffer, 4);
-
- if((p_dev->temp_buffer[0] != p_dev->streamcount)
- && (p_dev->temp_buffer[0] != (uint8_t)255)
- && (p_dev->temp_buffer[1] == (uint8_t)0x5)
- && ((p_dev->temp_buffer[2] & (uint8_t)0x5) == (uint8_t)0x5)
- && ((p_dev->temp_buffer[3] & (uint8_t)0x10) ==(uint8_t)0x10)
- )
- {
- *p_isReady = (uint8_t)1;
- p_dev->streamcount = p_dev->temp_buffer[0];
- }
- else
- {
- if ((p_dev->temp_buffer[3] & (uint8_t)0x80) != (uint8_t)0)
- {
- status |= p_dev->temp_buffer[2]; /* Return GO2 error status */
- }
-
- *p_isReady = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- union Block_header *bh_ptr;
- uint16_t header_id, footer_id;
- uint32_t i, j, msize;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0,
- p_dev->temp_buffer, p_dev->data_read_size);
- p_dev->streamcount = p_dev->temp_buffer[0];
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, (uint16_t)p_dev->data_read_size);
-
- /* Start conversion at position 16 to avoid headers */
- for (i = (uint32_t)16; i
- < (uint32_t)p_dev->data_read_size; i+=(uint32_t)4)
- {
- bh_ptr = (union Block_header *)&(p_dev->temp_buffer[i]);
- if ((bh_ptr->type > (uint32_t)0x1)
- && (bh_ptr->type < (uint32_t)0xd))
- {
- msize = bh_ptr->type * bh_ptr->size;
- }
- else
- {
- msize = bh_ptr->size;
- }
-
- switch(bh_ptr->idx){
- case VL53L5CX_METADATA_IDX:
- p_results->silicon_temp_degc =
- (int8_t)p_dev->temp_buffer[i + (uint32_t)12];
- break;
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- case VL53L5CX_AMBIENT_RATE_IDX:
- (void)memcpy(p_results->ambient_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- case VL53L5CX_SPAD_COUNT_IDX:
- (void)memcpy(p_results->nb_spads_enabled,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- case VL53L5CX_NB_TARGET_DETECTED_IDX:
- (void)memcpy(p_results->nb_target_detected,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- case VL53L5CX_SIGNAL_RATE_IDX:
- (void)memcpy(p_results->signal_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- case VL53L5CX_RANGE_SIGMA_MM_IDX:
- (void)memcpy(p_results->range_sigma_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- case VL53L5CX_DISTANCE_IDX:
- (void)memcpy(p_results->distance_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- case VL53L5CX_REFLECTANCE_EST_PC_IDX:
- (void)memcpy(p_results->reflectance,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- case VL53L5CX_TARGET_STATUS_IDX:
- (void)memcpy(p_results->target_status,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- case VL53L5CX_MOTION_DETEC_IDX:
- (void)memcpy(&p_results->motion_indicator,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
- default:
- break;
- }
- i += msize;
- }
-
-#ifndef VL53L5CX_USE_RAW_FORMAT
-
- /* Convert data into their real format */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_results->ambient_per_spad[i] /= (uint32_t)2048;
- }
-#endif
-
- for(i = 0; i < (uint32_t)(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE); i++)
- {
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- p_results->distance_mm[i] /= 4;
- if(p_results->distance_mm[i] < 0)
- {
- p_results->distance_mm[i] = 0;
- }
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- p_results->reflectance[i] /= (uint8_t)2;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- p_results->range_sigma_mm[i] /= (uint16_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- p_results->signal_per_spad[i] /= (uint32_t)2048;
-#endif
- }
-
- /* Set target status to 255 if no target is detected for this zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- if(p_results->nb_target_detected[i] == (uint8_t)0){
- for(j = 0; j < (uint32_t)
- VL53L5CX_NB_TARGET_PER_ZONE; j++)
- {
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- p_results->target_status
- [((uint32_t)VL53L5CX_NB_TARGET_PER_ZONE
- *(uint32_t)i) + j]=(uint8_t)255;
-#endif
- }
- }
- }
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- for(i = 0; i < (uint32_t)32; i++)
- {
- p_results->motion_indicator.motion[i] /= (uint32_t)65535;
- }
-#endif
-
-#endif
-
- /* Check if footer id and header id are matching. This allows to detect
- * corrupted frames */
- header_id = ((uint16_t)(p_dev->temp_buffer[0x8])<<8) & 0xFF00U;
- header_id |= ((uint16_t)(p_dev->temp_buffer[0x9])) & 0x00FFU;
-
- footer_id = ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)4]) << 8) & 0xFF00U;
- footer_id |= ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)3])) & 0xFFU;
-
- if(header_id != footer_id)
- {
- status |= VL53L5CX_STATUS_CORRUPTED_FRAME;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- *p_resolution = p_dev->temp_buffer[0x00]*p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- switch(resolution){
- case VL53L5CX_RESOLUTION_4X4:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 64;
- p_dev->temp_buffer[0x06] = 64;
- p_dev->temp_buffer[0x09] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 4;
- p_dev->temp_buffer[0x01] = 4;
- p_dev->temp_buffer[0x04] = 8;
- p_dev->temp_buffer[0x05] = 8;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 16;
- p_dev->temp_buffer[0x06] = 16;
- p_dev->temp_buffer[0x09] = 1;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 8;
- p_dev->temp_buffer[0x01] = 8;
- p_dev->temp_buffer[0x04] = 4;
- p_dev->temp_buffer[0x05] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
-
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= _vl53l5cx_send_offset_data(p_dev, resolution);
- status |= _vl53l5cx_send_xtalk_data(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4);
- *p_frequency_hz = p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4,
- (uint8_t*)&frequency_hz, 1, 0x01);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20);
-
- (void)memcpy(p_time_ms, &(p_dev->temp_buffer[0x0]), 4);
- *p_time_ms /= (uint32_t)1000;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t integration = integration_time_ms;
-
- /* Integration time must be between 2ms and 1000ms */
- if((integration < (uint32_t)2)
- || (integration > (uint32_t)1000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }else
- {
- integration *= (uint32_t)1000;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20,
- (uint8_t*)&integration, 4, 0x00);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev,p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16);
-
- *p_sharpener_percent = (p_dev->temp_buffer[0xD]
- *(uint8_t)100)/(uint8_t)255;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t sharpener;
-
- if(sharpener_percent >= (uint8_t)100)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- sharpener = (sharpener_percent*(uint8_t)255)/(uint8_t)100;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16,
- (uint8_t*)&sharpener, 1, 0xD);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4);
- *p_target_order = (uint8_t)p_dev->temp_buffer[0x0];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- if((target_order == (uint8_t)VL53L5CX_TARGET_ORDER_CLOSEST)
- || (target_order == (uint8_t)VL53L5CX_TARGET_ORDER_STRONGEST))
- {
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4,
- (uint8_t*)&target_order, 1, 0x0);
- }else
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- if(p_dev->temp_buffer[0x01] == (uint8_t)0x1)
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_CONTINUOUS;
- }
- else
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_AUTONOMOUS;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t single_range = 0x00;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- switch(ranging_mode)
- {
- case VL53L5CX_RANGING_MODE_CONTINUOUS:
- p_dev->temp_buffer[0x01] = 0x1;
- p_dev->temp_buffer[0x03] = 0x3;
- single_range = 0x00;
- break;
-
- case VL53L5CX_RANGING_MODE_AUTONOMOUS:
- p_dev->temp_buffer[0x01] = 0x3;
- p_dev->temp_buffer[0x03] = 0x2;
- single_range = 0x01;
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= vl53l5cx_dci_write_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, (uint16_t)8);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- return status;
-}
-
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 1;
- uint8_t analog_dynamic_pad_0 = 0;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 0;
- uint8_t analog_dynamic_pad_0 = 1;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16);
-
- *p_repeat_count = ((uint32_t)p_dev->temp_buffer[7] << 24)
- | ((uint32_t)p_dev->temp_buffer[6] << 16)
- | ((uint32_t)p_dev->temp_buffer[5] << 8)
- | (uint32_t)p_dev->temp_buffer[4];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16, (uint8_t*)&repeat_count, 4, 0x4);
- return status;
-}
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- int16_t i;
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t rd_size = (uint32_t) data_size + (uint32_t)12;
- uint8_t cmd[] = {0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0f,
- 0x00, 0x02, 0x00, 0x08};
-
- /* Check if tmp buffer is large enough */
- if((data_size + (uint16_t)12)>(uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- cmd[0] = (uint8_t)(index >> 8);
- cmd[1] = (uint8_t)(index & (uint32_t)0xff);
- cmd[2] = (uint8_t)((data_size & (uint16_t)0xff0) >> 4);
- cmd[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Request data reading from FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- (VL53L5CX_UI_CMD_END-(uint16_t)11),cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS,
- 0xff, 0x03);
-
- /* Read new data sent (4 bytes header + data_size + 8 bytes footer) */
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, rd_size);
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, data_size + (uint16_t)12);
-
- /* Copy data from FW into input structure (-4 bytes to remove header) */
- for(i = 0 ; i < (int16_t)data_size;i++){
- data[i] = p_dev->temp_buffer[i + 4];
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- int16_t i;
-
- uint8_t headers[] = {0x00, 0x00, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0f, 0x05, 0x01,
- (uint8_t)((data_size + (uint16_t)8) >> 8),
- (uint8_t)((data_size + (uint16_t)8) & (uint8_t)0xFF)};
-
- uint16_t address = (uint16_t)VL53L5CX_UI_CMD_END -
- (data_size + (uint16_t)12) + (uint16_t)1;
-
- /* Check if cmd buffer is large enough */
- if((data_size + (uint16_t)12)
- > (uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- headers[0] = (uint8_t)(index >> 8);
- headers[1] = (uint8_t)(index & (uint32_t)0xff);
- headers[2] = (uint8_t)(((data_size & (uint16_t)0xff0) >> 4));
- headers[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Copy data from structure to FW format (+4 bytes to add header) */
- VL53L5CX_SwapBuffer(data, data_size);
- for(i = (int16_t)data_size - (int16_t)1 ; i >= 0; i--)
- {
- p_dev->temp_buffer[i + 4] = data[i];
- }
-
- /* Add headers and footer */
- (void)memcpy(&p_dev->temp_buffer[0], headers, sizeof(headers));
- (void)memcpy(&p_dev->temp_buffer[data_size + (uint16_t)4],
- footer, sizeof(footer));
-
- /* Send data to FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),address,
- p_dev->temp_buffer,
- (uint32_t)((uint32_t)data_size + (uint32_t)12));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- VL53L5CX_SwapBuffer(data, data_size);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, data, index, data_size);
- (void)memcpy(&(data[new_data_pos]), new_data, new_data_size);
- status |= vl53l5cx_dci_write_data(p_dev, data, index, data_size);
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_detection_thresholds.c b/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_detection_thresholds.c
deleted file mode 100644
index 1f2c7d2a4b61b93ad8d7af14bfba5695744d21e8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_detection_thresholds.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_detection_thresholds.h"
-
-uint8_t vl53l5cx_get_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_enabled)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8);
- *p_enabled = p_dev->temp_buffer[0x1];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds_enable(
- VL53L5CX_Configuration *p_dev,
- uint8_t enabled)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t grp_global_config[] = {0x01, 0x00, 0x01, 0x00};
-
- if(enabled == (uint8_t)1)
- {
- grp_global_config[0x01] = 0x01;
- tmp = 0x04;
- }
- else
- {
- grp_global_config[0x01] = 0x00;
- tmp = 0x0C;
- }
-
- /* Set global interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_GLOBAL_CONFIG, 8,
- (uint8_t*)&grp_global_config, 4, 0x00);
-
- /* Update interrupt config */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_DET_THRESH_CONFIG, 20,
- (uint8_t*)&tmp, 1, 0x11);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- /* Get thresholds configuration */
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)VL53L5CX_NB_THRESHOLDS
- *(uint16_t)sizeof(VL53L5CX_DetectionThresholds));
-
- for(i = 0; i < (uint8_t)VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh /= 4;
- p_thresholds[i].param_high_thresh /= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh /= 128;
- p_thresholds[i].param_high_thresh /= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh /= 2048;
- p_thresholds[i].param_high_thresh /= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh /= 256;
- p_thresholds[i].param_high_thresh /= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh /= 65535;
- p_thresholds[i].param_high_thresh /= 65535;
- break;
- default:
- break;
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_detection_thresholds(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_DetectionThresholds *p_thresholds)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
- uint8_t grp_valid_target_cfg[] = {0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05};
-
- for(i = 0; i < (uint8_t) VL53L5CX_NB_THRESHOLDS; i++)
- {
- switch(p_thresholds[i].measurement)
- {
- case VL53L5CX_DISTANCE_MM:
- p_thresholds[i].param_low_thresh *= 4;
- p_thresholds[i].param_high_thresh *= 4;
- break;
- case VL53L5CX_SIGNAL_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_RANGE_SIGMA_MM:
- p_thresholds[i].param_low_thresh *= 128;
- p_thresholds[i].param_high_thresh *= 128;
- break;
- case VL53L5CX_AMBIENT_PER_SPAD_KCPS:
- p_thresholds[i].param_low_thresh *= 2048;
- p_thresholds[i].param_high_thresh *= 2048;
- break;
- case VL53L5CX_NB_SPADS_ENABLED:
- p_thresholds[i].param_low_thresh *= 256;
- p_thresholds[i].param_high_thresh *= 256;
- break;
- case VL53L5CX_MOTION_INDICATOR:
- p_thresholds[i].param_low_thresh *= 65535;
- p_thresholds[i].param_high_thresh *= 65535;
- break;
- default:
- break;
- }
- }
-
- /* Set valid target list */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)grp_valid_target_cfg,
- VL53L5CX_DCI_DET_THRESH_VALID_STATUS,
- (uint16_t)sizeof(grp_valid_target_cfg));
-
- /* Set thresholds configuration */
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)p_thresholds,
- VL53L5CX_DCI_DET_THRESH_START,
- (uint16_t)(VL53L5CX_NB_THRESHOLDS
- *sizeof(VL53L5CX_DetectionThresholds)));
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_motion_indicator.c b/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_motion_indicator.c
deleted file mode 100644
index 5b114ee38790b2f7cfc14527bed208b947f64c4a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_motion_indicator.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <math.h>
-#include "vl53l5cx_plugin_motion_indicator.h"
-
-uint8_t vl53l5cx_motion_indicator_init(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- (void)memset(p_motion_config, 0, sizeof(VL53L5CX_Motion_Configuration));
-
- p_motion_config->ref_bin_offset = 13633;
- p_motion_config->detection_threshold = 2883584;
- p_motion_config->extra_noise_sigma = 0;
- p_motion_config->null_den_clip_value = 0;
- p_motion_config->mem_update_mode = 6;
- p_motion_config->mem_update_choice = 2;
- p_motion_config->sum_span = 4;
- p_motion_config->feature_length = 9;
- p_motion_config->nb_of_aggregates = 16;
- p_motion_config->nb_of_temporal_accumulations = 16;
- p_motion_config->min_nb_for_global_detection = 1;
- p_motion_config->global_indicator_format_1 = 8;
- p_motion_config->global_indicator_format_2 = 0;
- p_motion_config->spare_1 = 0;
- p_motion_config->spare_2 = 0;
- p_motion_config->spare_3 = 0;
-
- status |= vl53l5cx_motion_indicator_set_resolution(p_dev,
- p_motion_config, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_distance_motion(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint16_t distance_min_mm,
- uint16_t distance_max_mm)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- float_t tmp;
-
- if(((distance_max_mm - distance_min_mm) > (uint16_t)1500)
- || (distance_min_mm < (uint16_t)400)
- || (distance_max_mm > (uint16_t)4000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- tmp = (float_t)((((float_t)distance_min_mm/(float_t)37.5348)
- -(float_t)4.0)*(float_t)2048.5);
- p_motion_config->ref_bin_offset = (int32_t)tmp;
-
- tmp = (float_t)((((((float_t)distance_max_mm-
- (float_t)distance_min_mm)/(float_t)10.0)+(float_t)30.02784)
- /((float_t)15.01392))+(float_t)0.5);
- p_motion_config->feature_length = (uint8_t)tmp;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_motion_indicator_set_resolution(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_Motion_Configuration *p_motion_config,
- uint8_t resolution)
-{
- uint8_t i, status = VL53L5CX_STATUS_OK;
-
- switch(resolution)
- {
- case VL53L5CX_RESOLUTION_4X4:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_4X4; i++)
- {
- p_motion_config->map_id[i] = (int8_t)i;
- }
- (void)memset(p_motion_config->map_id + 16, -1, 48);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- for(i = 0; i < (uint8_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_motion_config->map_id[i] = (int8_t)((((int8_t)
- i % 8)/2) + (4*((int8_t)i/16)));
- }
- break;
-
- default:
- status |= VL53L5CX_STATUS_ERROR;
- break;
- }
-
- if (status == VL53L5CX_STATUS_OK)
- {
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)(p_motion_config),
- VL53L5CX_DCI_MOTION_DETECTOR_CFG,
- (uint16_t)sizeof(*p_motion_config));
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_xtalk.c b/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_xtalk.c
deleted file mode 100644
index b2b8ab0b5240dd9886c89d29b31e0f6e31b99322..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/blink/src/vl53l5cx_plugin_xtalk.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include "vl53l5cx_plugin_xtalk.h"
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for an answer from VL53L5 sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint16_t address,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- address, p_dev->temp_buffer, 4);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- /* 2s timeout or FW error*/
- if((timeout >= (uint8_t)200)
- || (p_dev->temp_buffer[2] >= (uint8_t) 0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[0x1]) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * program the output using the macro defined into the 'platform.h' file.
- */
-
-static uint8_t _vl53l5cx_program_output_config(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint32_t i;
- union Block_header *bh_ptr;
- uint32_t header_config[2] = {0, 0};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x0001FFFFU,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={
- 0x0000000DU,
- 0x54000040U,
- 0x9FD800C0U,
- 0x9FE40140U,
- 0x9FF80040U,
- 0x9FFC0404U,
- 0xA0FC0100U,
- 0xA10C0100U,
- 0xA11C00C0U,
- 0xA1280902U,
- 0xA2480040U,
- 0xA24C0081U,
- 0xA2540081U,
- 0xA25C0081U,
- 0xA2640081U,
- 0xA26C0084U,
- 0xA28C0082U};
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint8_t)(resolution
- * (uint8_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
-
-
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output),
- VL53L5CX_DCI_OUTPUT_LIST, (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&(output_bh_enable),
- VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- return status;
-}
-
-uint8_t vl53l5cx_calibrate_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint16_t reflectance_percent,
- uint8_t nb_samples,
- uint16_t distance_mm)
-{
- uint16_t timeout = 0;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
- uint8_t continue_loop = 1, status = VL53L5CX_STATUS_OK;
-
- uint8_t resolution, frequency, target_order, sharp_prct, ranging_mode;
- uint32_t integration_time_ms, xtalk_margin;
-
- uint16_t reflectance = reflectance_percent;
- uint8_t samples = nb_samples;
- uint16_t distance = distance_mm;
- uint8_t *default_xtalk_ptr;
-
- /* Get initial configuration */
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_get_ranging_frequency_hz(p_dev, &frequency);
- status |= vl53l5cx_get_integration_time_ms(p_dev, &integration_time_ms);
- status |= vl53l5cx_get_sharpener_percent(p_dev, &sharp_prct);
- status |= vl53l5cx_get_target_order(p_dev, &target_order);
- status |= vl53l5cx_get_xtalk_margin(p_dev, &xtalk_margin);
- status |= vl53l5cx_get_ranging_mode(p_dev, &ranging_mode);
-
- /* Check input arguments validity */
- if(((reflectance < (uint16_t)1) || (reflectance > (uint16_t)99))
- || ((distance < (uint16_t)600) || (distance > (uint16_t)3000))
- || ((samples < (uint8_t)1) || (samples > (uint8_t)16)))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- status |= vl53l5cx_set_resolution(p_dev,
- VL53L5CX_RESOLUTION_8X8);
-
- /* Send Xtalk calibration buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_CALIBRATE_XTALK,
- sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c28,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_CALIBRATE_XTALK));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Format input argument */
- reflectance = reflectance * (uint16_t)16;
- distance = distance * (uint16_t)4;
-
- /* Update required fields */
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&distance, 2, 0x00);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&reflectance, 2, 0x02);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_CAL_CFG, 8,
- (uint8_t*)&samples, 1, 0x04);
-
- /* Program output for Xtalk calibration */
- status |= _vl53l5cx_program_output_config(p_dev);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- VL53L5CX_UI_CMD_END - (uint16_t)(4 - 1),
- (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev,
- VL53L5CX_UI_CMD_STATUS, 0x3);
-
- /* Wait for end of calibration */
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x0, p_dev->temp_buffer, 4);
-
- if(p_dev->temp_buffer[0] != VL53L5CX_STATUS_ERROR)
- {
- /* Coverglass too good for Xtalk calibration */
- if((p_dev->temp_buffer[2] >= (uint8_t)0x7f) &&
- (((uint16_t)(p_dev->temp_buffer[3] &
- (uint16_t)0x80) >> 7) == (uint16_t)1))
- {
- default_xtalk_ptr = p_dev->default_xtalk;
- (void)memcpy(p_dev->xtalk_data,
- default_xtalk_ptr,
- sizeof(p_dev->xtalk_data));
- status |= VL53L5CX_STATUS_XTALK_FAILED;
- }
- continue_loop = (uint8_t)0;
- }
- else if(timeout >= (uint16_t)400)
- {
- status |= VL53L5CX_STATUS_ERROR;
- continue_loop = (uint8_t)0;
- }
- else
- {
- timeout++;
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 50);
- }
-
- }while (continue_loop == (uint8_t)1);
- }
-
- /* Save Xtalk data into the Xtalk buffer */
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer,
- (uint16_t)sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_dev->xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8);
- (void)memcpy(&(p_dev->xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE
- - (uint16_t)8]), footer, sizeof(footer));
-
- /* Reset default buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- VL53L5CX_CONFIGURATION_SIZE);
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
-
- /* Reset initial configuration */
- status |= vl53l5cx_set_resolution(p_dev, resolution);
- status |= vl53l5cx_set_ranging_frequency_hz(p_dev, frequency);
- status |= vl53l5cx_set_integration_time_ms(p_dev, integration_time_ms);
- status |= vl53l5cx_set_sharpener_percent(p_dev, sharp_prct);
- status |= vl53l5cx_set_target_order(p_dev, target_order);
- status |= vl53l5cx_set_xtalk_margin(p_dev, xtalk_margin);
- status |= vl53l5cx_set_ranging_mode(p_dev, ranging_mode);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t status = VL53L5CX_STATUS_OK, resolution;
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x00, 0x01, 0x03, 0x04};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- status |= vl53l5cx_set_resolution(p_dev, VL53L5CX_RESOLUTION_8X8);
-
- (void)memcpy(p_dev->temp_buffer, VL53L5CX_GET_XTALK_CMD,
- sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fb8,
- p_dev->temp_buffer, sizeof(VL53L5CX_GET_XTALK_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev,VL53L5CX_UI_CMD_STATUS, 0x03);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer,
- VL53L5CX_XTALK_BUFFER_SIZE + (uint16_t)4);
-
- (void)memcpy(&(p_xtalk_data[0]), &(p_dev->temp_buffer[8]),
- VL53L5CX_XTALK_BUFFER_SIZE-(uint16_t)8);
- (void)memcpy(&(p_xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE - (uint16_t)8]),
- footer, sizeof(footer));
-
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_caldata_xtalk(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_xtalk_data)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- (void)memcpy(p_dev->xtalk_data, p_xtalk_data, VL53L5CX_XTALK_BUFFER_SIZE);
- status |= vl53l5cx_set_resolution(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16);
-
- (void)memcpy(p_xtalk_margin, p_dev->temp_buffer, 4);
- *p_xtalk_margin = *p_xtalk_margin/(uint32_t)2048;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_xtalk_margin(
- VL53L5CX_Configuration *p_dev,
- uint32_t xtalk_margin)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t margin_kcps = xtalk_margin;
-
- if(margin_kcps > (uint32_t)10000)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- margin_kcps = margin_kcps*(uint32_t)2048;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_XTALK_CFG, 16,
- (uint8_t*)&margin_kcps, 4, 0x00);
- }
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.gitignore b/Pi_Pico_Cpp/i2c_bus_scan/.gitignore
deleted file mode 100644
index 378eac25d311703f3f2cd456d8036da525cd0366..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-build
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/c_cpp_properties.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/c_cpp_properties.json
deleted file mode 100644
index b24aa9f5775a7f8b0135c80a698f24a2b6ccfda2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/c_cpp_properties.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
- "configurations": [
- {
- "name": "Pico",
- "includePath": [
- "${workspaceFolder}/**",
- "${userHome}/.pico-sdk/sdk/2.1.0/**"
- ],
- "forcedInclude": [
- "${userHome}/.pico-sdk/sdk/2.1.0/src/common/pico_base_headers/include/pico.h",
- "${workspaceFolder}/build/generated/pico_base/pico/config_autogen.h"
- ],
- "defines": [],
- "compilerPath": "${userHome}/.pico-sdk/toolchain/13_3_Rel1/bin/arm-none-eabi-gcc",
- "compileCommands": "${workspaceFolder}/build/compile_commands.json",
- "cStandard": "c17",
- "cppStandard": "c++14",
- "intelliSenseMode": "linux-gcc-arm"
- }
- ],
- "version": 4
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/cmake-kits.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/cmake-kits.json
deleted file mode 100644
index b0f3815f1ea201ceb8b74ee10324640e33bfd880..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/cmake-kits.json
+++ /dev/null
@@ -1,15 +0,0 @@
-[
- {
- "name": "Pico",
- "compilers": {
- "C": "${command:raspberry-pi-pico.getCompilerPath}",
- "CXX": "${command:raspberry-pi-pico.getCxxCompilerPath}"
- },
- "environmentVariables": {
- "PATH": "${command:raspberry-pi-pico.getEnvPath};${env:PATH}"
- },
- "cmakeSettings": {
- "Python3_EXECUTABLE": "${command:raspberry-pi-pico.getPythonPath}"
- }
- }
-]
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/extensions.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/extensions.json
deleted file mode 100644
index a940d7cd92bb13fb5536b2b8a0e2288f1bdad73f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/extensions.json
+++ /dev/null
@@ -1,9 +0,0 @@
-{
- "recommendations": [
- "marus25.cortex-debug",
- "ms-vscode.cpptools",
- "ms-vscode.cpptools-extension-pack",
- "ms-vscode.vscode-serial-monitor",
- "raspberry-pi.raspberry-pi-pico"
- ]
-}
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/launch.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/launch.json
deleted file mode 100644
index d921c350d6d13da3c9fcc0d5d08bbc1a94e624c6..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/launch.json
+++ /dev/null
@@ -1,70 +0,0 @@
-{
- "version": "0.2.0",
- "configurations": [
- {
- "name": "Pico Debug (Cortex-Debug)",
- "cwd": "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "openocd",
- "serverpath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "configFiles": [
- "interface/cmsis-dap.cfg",
- "target/${command:raspberry-pi-pico.getTarget}.cfg"
- ],
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ],
- "openOCDLaunchCommands": [
- "adapter speed 5000"
- ]
- },
- {
- "name": "Pico Debug (Cortex-Debug with external OpenOCD)",
- "cwd": "${workspaceRoot}",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "external",
- "gdbTarget": "localhost:3333",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ]
- },
- {
- "name": "Pico Debug (C++ Debugger)",
- "type": "cppdbg",
- "request": "launch",
- "cwd": "${workspaceRoot}",
- "program": "${command:raspberry-pi-pico.launchTargetPath}",
- "MIMode": "gdb",
- "miDebuggerPath": "${command:raspberry-pi-pico.getGDBPath}",
- "miDebuggerServerAddress": "localhost:3333",
- "debugServerPath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "debugServerArgs": "-f interface/cmsis-dap.cfg -f target/${command:raspberry-pi-pico.getTarget}.cfg -c \"adapter speed 5000\"",
- "serverStarted": "Listening on port .* for gdb connections",
- "filterStderr": true,
- "hardwareBreakpoints": {
- "require": true,
- "limit": 4
- },
- "preLaunchTask": "Flash",
- "svdPath": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd"
- },
- ]
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/settings.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/settings.json
deleted file mode 100644
index 992389d4db51c9c63e53306e681357c4f7d01b8a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/settings.json
+++ /dev/null
@@ -1,39 +0,0 @@
-{
- "cmake.options.statusBarVisibility": "hidden",
- "cmake.options.advanced": {
- "build": {
- "statusBarVisibility": "hidden"
- },
- "launch": {
- "statusBarVisibility": "hidden"
- },
- "debug": {
- "statusBarVisibility": "hidden"
- }
- },
- "cmake.configureOnEdit": false,
- "cmake.automaticReconfigure": false,
- "cmake.configureOnOpen": false,
- "cmake.generator": "Ninja",
- "cmake.cmakePath": "${userHome}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "C_Cpp.debugShortcut": false,
- "terminal.integrated.env.windows": {
- "PICO_SDK_PATH": "${env:USERPROFILE}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1",
- "Path": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1/bin;${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool;${env:USERPROFILE}/.pico-sdk/cmake/v3.29.9/bin;${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1;${env:PATH}"
- },
- "terminal.integrated.env.osx": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "terminal.integrated.env.linux": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "raspberry-pi-pico.cmakeAutoConfigure": true,
- "raspberry-pi-pico.useCmakeTools": false,
- "raspberry-pi-pico.cmakePath": "${HOME}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "raspberry-pi-pico.ninjaPath": "${HOME}/.pico-sdk/ninja/v1.12.1/ninja"
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/tasks.json b/Pi_Pico_Cpp/i2c_bus_scan/.vscode/tasks.json
deleted file mode 100644
index 1b6a8764e082c691cd87712b3fa5b1ce93563700..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/.vscode/tasks.json
+++ /dev/null
@@ -1,58 +0,0 @@
-{
- "version": "2.0.0",
- "tasks": [
- {
- "label": "Compile Project",
- "type": "process",
- "isBuildCommand": true,
- "command": "${userHome}/.pico-sdk/ninja/v1.12.1/ninja",
- "args": ["-C", "${workspaceFolder}/build"],
- "group": "build",
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": "$gcc",
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1/ninja.exe"
- }
- },
- {
- "label": "Run Project",
- "type": "process",
- "command": "${env:HOME}/.pico-sdk/picotool/2.1.0/picotool/picotool",
- "args": [
- "load",
- "${command:raspberry-pi-pico.launchTargetPath}",
- "-fx"
- ],
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool/picotool.exe"
- }
- },
- {
- "label": "Flash",
- "type": "process",
- "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "args": [
- "-s",
- "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "-f",
- "interface/cmsis-dap.cfg",
- "-f",
- "target/${command:raspberry-pi-pico.getTarget}.cfg",
- "-c",
- "adapter speed 5000; program \"${command:raspberry-pi-pico.launchTargetPath}\" verify reset exit"
- ],
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- }
- }
- ]
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/CMakeLists.txt b/Pi_Pico_Cpp/i2c_bus_scan/CMakeLists.txt
deleted file mode 100644
index d3498e6048ea6079d4b12768ad5938a2f6ee4cae..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/CMakeLists.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-# Generated Cmake Pico project file
-
-cmake_minimum_required(VERSION 3.13)
-
-set(CMAKE_C_STANDARD 11)
-set(CMAKE_CXX_STANDARD 17)
-set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
-
-# Initialise pico_sdk from installed location
-# (note this can come from environment, CMake cache etc)
-
-# == DO NOT EDIT THE FOLLOWING LINES for the Raspberry Pi Pico VS Code Extension to work ==
-if(WIN32)
- set(USERHOME $ENV{USERPROFILE})
-else()
- set(USERHOME $ENV{HOME})
-endif()
-set(sdkVersion 2.1.0)
-set(toolchainVersion 13_3_Rel1)
-set(picotoolVersion 2.1.0)
-set(picoVscode ${USERHOME}/.pico-sdk/cmake/pico-vscode.cmake)
-if (EXISTS ${picoVscode})
- include(${picoVscode})
-endif()
-# ====================================================================================
-set(PICO_BOARD pico2 CACHE STRING "Board type")
-
-# Pull in Raspberry Pi Pico SDK (must be before project)
-include(pico_sdk_import.cmake)
-
-project(i2c_bus_scan C CXX ASM)
-
-# Initialise the Raspberry Pi Pico SDK
-pico_sdk_init()
-
-# Add executable. Default name is the project name, version 0.1
-
-add_executable(i2c_bus_scan
- bus_scan.c
- )
-
-# pull in common dependencies and additional i2c hardware support
-target_link_libraries(i2c_bus_scan pico_stdlib hardware_i2c)
-
-# create map/bin/hex file etc.
-pico_add_extra_outputs(i2c_bus_scan)
-
-# add url via pico_set_program_url
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/bus_scan.c b/Pi_Pico_Cpp/i2c_bus_scan/bus_scan.c
deleted file mode 100644
index e2e5b61d6f05ca70578104ddffbcc3c6620761c4..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/bus_scan.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/**
- * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-// Sweep through all 7-bit I2C addresses, to see if any slaves are present on
-// the I2C bus. Print out a table that looks like this:
-//
-// I2C Bus Scan
-// 0 1 2 3 4 5 6 7 8 9 A B C D E F
-// 00 . . . . . . . . . . . . . . . .
-// 10 . . @ . . . . . . . . . . . . .
-// 20 . . . . . . . . . . . . . . . .
-// 30 . . . . @ . . . . . . . . . . .
-// 40 . . . . . . . . . . . . . . . .
-// 50 . . . . . . . . . . . . . . . .
-// 60 . . . . . . . . . . . . . . . .
-// 70 . . . . . . . . . . . . . . . .
-// E.g. if addresses 0x12 and 0x34 were acknowledged.
-
-#include <stdio.h>
-#include "pico/stdlib.h"
-#include "pico/binary_info.h"
-#include "hardware/i2c.h"
-
-// I2C reserves some addresses for special purposes. We exclude these from the scan.
-// These are any addresses of the form 000 0xxx or 111 1xxx
-bool reserved_addr(uint8_t addr) {
- return (addr & 0x78) == 0 || (addr & 0x78) == 0x78;
-}
-
-int main() {
- // Enable UART so we can print status output
- stdio_init_all();
-#if !defined(i2c_default) || !defined(PICO_DEFAULT_I2C_SDA_PIN) || !defined(PICO_DEFAULT_I2C_SCL_PIN)
-#warning i2c/bus_scan example requires a board with I2C pins
- puts("Default I2C pins were not defined");
-#else
- // This example will use I2C0 on the default SDA and SCL pins (GP4, GP5 on a Pico)
- i2c_init(i2c_default, 100 * 1000);
- gpio_set_function(PICO_DEFAULT_I2C_SDA_PIN, GPIO_FUNC_I2C);
- gpio_set_function(PICO_DEFAULT_I2C_SCL_PIN, GPIO_FUNC_I2C);
- gpio_pull_up(PICO_DEFAULT_I2C_SDA_PIN);
- gpio_pull_up(PICO_DEFAULT_I2C_SCL_PIN);
- // Make the I2C pins available to picotool
- bi_decl(bi_2pins_with_func(PICO_DEFAULT_I2C_SDA_PIN, PICO_DEFAULT_I2C_SCL_PIN, GPIO_FUNC_I2C));
-
- printf("\nI2C Bus Scan\n");
- printf(" 0 1 2 3 4 5 6 7 8 9 A B C D E F\n");
-
- for (int addr = 0; addr < (1 << 7); ++addr) {
- if (addr % 16 == 0) {
- printf("%02x ", addr);
- }
-
- // Perform a 1-byte dummy read from the probe address. If a slave
- // acknowledges this address, the function returns the number of bytes
- // transferred. If the address byte is ignored, the function returns
- // -1.
-
- // Skip over any reserved addresses.
- int ret;
- uint8_t rxdata;
- if (reserved_addr(addr))
- ret = PICO_ERROR_GENERIC;
- else
- ret = i2c_read_blocking(i2c_default, addr, &rxdata, 1, false);
-
- printf(ret < 0 ? "." : "@");
- printf(addr % 16 == 15 ? "\n" : " ");
- }
- printf("Done.\n");
- return 0;
-#endif
-}
diff --git a/Pi_Pico_Cpp/i2c_bus_scan/pico_sdk_import.cmake b/Pi_Pico_Cpp/i2c_bus_scan/pico_sdk_import.cmake
deleted file mode 100644
index a0721d0d13d7bcef15e0cf6680570bb7ec422716..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/i2c_bus_scan/pico_sdk_import.cmake
+++ /dev/null
@@ -1,84 +0,0 @@
-# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
-
-# This can be dropped into an external project to help locate this SDK
-# It should be include()ed prior to project()
-
-if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
- set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
- message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
- set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
- message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
- set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
- message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_TAG} AND (NOT PICO_SDK_FETCH_FROM_GIT_TAG))
- set(PICO_SDK_FETCH_FROM_GIT_TAG $ENV{PICO_SDK_FETCH_FROM_GIT_TAG})
- message("Using PICO_SDK_FETCH_FROM_GIT_TAG from environment ('${PICO_SDK_FETCH_FROM_GIT_TAG}')")
-endif ()
-
-if (PICO_SDK_FETCH_FROM_GIT AND NOT PICO_SDK_FETCH_FROM_GIT_TAG)
- set(PICO_SDK_FETCH_FROM_GIT_TAG "master")
- message("Using master as default value for PICO_SDK_FETCH_FROM_GIT_TAG")
-endif()
-
-set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
-set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
-set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
-set(PICO_SDK_FETCH_FROM_GIT_TAG "${PICO_SDK_FETCH_FROM_GIT_TAG}" CACHE FILEPATH "release tag for SDK")
-
-if (NOT PICO_SDK_PATH)
- if (PICO_SDK_FETCH_FROM_GIT)
- include(FetchContent)
- set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
- if (PICO_SDK_FETCH_FROM_GIT_PATH)
- get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
- endif ()
- # GIT_SUBMODULES_RECURSE was added in 3.17
- if (${CMAKE_VERSION} VERSION_GREATER_EQUAL "3.17.0")
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- GIT_SUBMODULES_RECURSE FALSE
- )
- else ()
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- )
- endif ()
-
- if (NOT pico_sdk)
- message("Downloading Raspberry Pi Pico SDK")
- FetchContent_Populate(pico_sdk)
- set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
- endif ()
- set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
- else ()
- message(FATAL_ERROR
- "SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
- )
- endif ()
-endif ()
-
-get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
-if (NOT EXISTS ${PICO_SDK_PATH})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
-endif ()
-
-set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
-if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
-endif ()
-
-set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
-
-include(${PICO_SDK_INIT_CMAKE_FILE})
diff --git a/Pi_Pico_Cpp/vl53l5cx/.gitignore b/Pi_Pico_Cpp/vl53l5cx/.gitignore
deleted file mode 100644
index 378eac25d311703f3f2cd456d8036da525cd0366..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-build
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/c_cpp_properties.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/c_cpp_properties.json
deleted file mode 100644
index b24aa9f5775a7f8b0135c80a698f24a2b6ccfda2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/c_cpp_properties.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
- "configurations": [
- {
- "name": "Pico",
- "includePath": [
- "${workspaceFolder}/**",
- "${userHome}/.pico-sdk/sdk/2.1.0/**"
- ],
- "forcedInclude": [
- "${userHome}/.pico-sdk/sdk/2.1.0/src/common/pico_base_headers/include/pico.h",
- "${workspaceFolder}/build/generated/pico_base/pico/config_autogen.h"
- ],
- "defines": [],
- "compilerPath": "${userHome}/.pico-sdk/toolchain/13_3_Rel1/bin/arm-none-eabi-gcc",
- "compileCommands": "${workspaceFolder}/build/compile_commands.json",
- "cStandard": "c17",
- "cppStandard": "c++14",
- "intelliSenseMode": "linux-gcc-arm"
- }
- ],
- "version": 4
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/cmake-kits.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/cmake-kits.json
deleted file mode 100644
index b0f3815f1ea201ceb8b74ee10324640e33bfd880..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/cmake-kits.json
+++ /dev/null
@@ -1,15 +0,0 @@
-[
- {
- "name": "Pico",
- "compilers": {
- "C": "${command:raspberry-pi-pico.getCompilerPath}",
- "CXX": "${command:raspberry-pi-pico.getCxxCompilerPath}"
- },
- "environmentVariables": {
- "PATH": "${command:raspberry-pi-pico.getEnvPath};${env:PATH}"
- },
- "cmakeSettings": {
- "Python3_EXECUTABLE": "${command:raspberry-pi-pico.getPythonPath}"
- }
- }
-]
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/extensions.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/extensions.json
deleted file mode 100644
index a940d7cd92bb13fb5536b2b8a0e2288f1bdad73f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/extensions.json
+++ /dev/null
@@ -1,9 +0,0 @@
-{
- "recommendations": [
- "marus25.cortex-debug",
- "ms-vscode.cpptools",
- "ms-vscode.cpptools-extension-pack",
- "ms-vscode.vscode-serial-monitor",
- "raspberry-pi.raspberry-pi-pico"
- ]
-}
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/launch.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/launch.json
deleted file mode 100644
index d921c350d6d13da3c9fcc0d5d08bbc1a94e624c6..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/launch.json
+++ /dev/null
@@ -1,70 +0,0 @@
-{
- "version": "0.2.0",
- "configurations": [
- {
- "name": "Pico Debug (Cortex-Debug)",
- "cwd": "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "openocd",
- "serverpath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "configFiles": [
- "interface/cmsis-dap.cfg",
- "target/${command:raspberry-pi-pico.getTarget}.cfg"
- ],
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ],
- "openOCDLaunchCommands": [
- "adapter speed 5000"
- ]
- },
- {
- "name": "Pico Debug (Cortex-Debug with external OpenOCD)",
- "cwd": "${workspaceRoot}",
- "executable": "${command:raspberry-pi-pico.launchTargetPath}",
- "request": "launch",
- "type": "cortex-debug",
- "servertype": "external",
- "gdbTarget": "localhost:3333",
- "gdbPath": "${command:raspberry-pi-pico.getGDBPath}",
- "device": "${command:raspberry-pi-pico.getChipUppercase}",
- "svdFile": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd",
- "runToEntryPoint": "main",
- // Fix for no_flash binaries, where monitor reset halt doesn't do what is expected
- // Also works fine for flash binaries
- "overrideLaunchCommands": [
- "monitor reset init",
- "load \"${command:raspberry-pi-pico.launchTargetPath}\""
- ]
- },
- {
- "name": "Pico Debug (C++ Debugger)",
- "type": "cppdbg",
- "request": "launch",
- "cwd": "${workspaceRoot}",
- "program": "${command:raspberry-pi-pico.launchTargetPath}",
- "MIMode": "gdb",
- "miDebuggerPath": "${command:raspberry-pi-pico.getGDBPath}",
- "miDebuggerServerAddress": "localhost:3333",
- "debugServerPath": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "debugServerArgs": "-f interface/cmsis-dap.cfg -f target/${command:raspberry-pi-pico.getTarget}.cfg -c \"adapter speed 5000\"",
- "serverStarted": "Listening on port .* for gdb connections",
- "filterStderr": true,
- "hardwareBreakpoints": {
- "require": true,
- "limit": 4
- },
- "preLaunchTask": "Flash",
- "svdPath": "${userHome}/.pico-sdk/sdk/2.1.0/src/${command:raspberry-pi-pico.getChip}/hardware_regs/${command:raspberry-pi-pico.getChipUppercase}.svd"
- },
- ]
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/settings.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/settings.json
deleted file mode 100644
index 992389d4db51c9c63e53306e681357c4f7d01b8a..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/settings.json
+++ /dev/null
@@ -1,39 +0,0 @@
-{
- "cmake.options.statusBarVisibility": "hidden",
- "cmake.options.advanced": {
- "build": {
- "statusBarVisibility": "hidden"
- },
- "launch": {
- "statusBarVisibility": "hidden"
- },
- "debug": {
- "statusBarVisibility": "hidden"
- }
- },
- "cmake.configureOnEdit": false,
- "cmake.automaticReconfigure": false,
- "cmake.configureOnOpen": false,
- "cmake.generator": "Ninja",
- "cmake.cmakePath": "${userHome}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "C_Cpp.debugShortcut": false,
- "terminal.integrated.env.windows": {
- "PICO_SDK_PATH": "${env:USERPROFILE}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1",
- "Path": "${env:USERPROFILE}/.pico-sdk/toolchain/13_3_Rel1/bin;${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool;${env:USERPROFILE}/.pico-sdk/cmake/v3.29.9/bin;${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1;${env:PATH}"
- },
- "terminal.integrated.env.osx": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "terminal.integrated.env.linux": {
- "PICO_SDK_PATH": "${env:HOME}/.pico-sdk/sdk/2.1.0",
- "PICO_TOOLCHAIN_PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1",
- "PATH": "${env:HOME}/.pico-sdk/toolchain/13_3_Rel1/bin:${env:HOME}/.pico-sdk/picotool/2.1.0/picotool:${env:HOME}/.pico-sdk/cmake/v3.29.9/bin:${env:HOME}/.pico-sdk/ninja/v1.12.1:${env:PATH}"
- },
- "raspberry-pi-pico.cmakeAutoConfigure": true,
- "raspberry-pi-pico.useCmakeTools": false,
- "raspberry-pi-pico.cmakePath": "${HOME}/.pico-sdk/cmake/v3.29.9/bin/cmake",
- "raspberry-pi-pico.ninjaPath": "${HOME}/.pico-sdk/ninja/v1.12.1/ninja"
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/.vscode/tasks.json b/Pi_Pico_Cpp/vl53l5cx/.vscode/tasks.json
deleted file mode 100644
index 1b6a8764e082c691cd87712b3fa5b1ce93563700..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/.vscode/tasks.json
+++ /dev/null
@@ -1,58 +0,0 @@
-{
- "version": "2.0.0",
- "tasks": [
- {
- "label": "Compile Project",
- "type": "process",
- "isBuildCommand": true,
- "command": "${userHome}/.pico-sdk/ninja/v1.12.1/ninja",
- "args": ["-C", "${workspaceFolder}/build"],
- "group": "build",
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": "$gcc",
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/ninja/v1.12.1/ninja.exe"
- }
- },
- {
- "label": "Run Project",
- "type": "process",
- "command": "${env:HOME}/.pico-sdk/picotool/2.1.0/picotool/picotool",
- "args": [
- "load",
- "${command:raspberry-pi-pico.launchTargetPath}",
- "-fx"
- ],
- "presentation": {
- "reveal": "always",
- "panel": "dedicated"
- },
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/picotool/2.1.0/picotool/picotool.exe"
- }
- },
- {
- "label": "Flash",
- "type": "process",
- "command": "${userHome}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- "args": [
- "-s",
- "${userHome}/.pico-sdk/openocd/0.12.0+dev/scripts",
- "-f",
- "interface/cmsis-dap.cfg",
- "-f",
- "target/${command:raspberry-pi-pico.getTarget}.cfg",
- "-c",
- "adapter speed 5000; program \"${command:raspberry-pi-pico.launchTargetPath}\" verify reset exit"
- ],
- "problemMatcher": [],
- "windows": {
- "command": "${env:USERPROFILE}/.pico-sdk/openocd/0.12.0+dev/openocd.exe",
- }
- }
- ]
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/CMakeLists.txt b/Pi_Pico_Cpp/vl53l5cx/CMakeLists.txt
deleted file mode 100644
index 482779719c507c993996ea776a4325cea4360502..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/CMakeLists.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-# Generated Cmake Pico project file
-
-cmake_minimum_required(VERSION 3.13)
-
-set(CMAKE_C_STANDARD 11)
-set(CMAKE_CXX_STANDARD 17)
-set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
-
-# Initialise pico_sdk from installed location
-# (note this can come from environment, CMake cache etc)
-
-# == DO NOT EDIT THE FOLLOWING LINES for the Raspberry Pi Pico VS Code Extension to work ==
-if(WIN32)
- set(USERHOME $ENV{USERPROFILE})
-else()
- set(USERHOME $ENV{HOME})
-endif()
-set(sdkVersion 2.1.0)
-set(toolchainVersion 13_3_Rel1)
-set(picotoolVersion 2.1.0)
-set(picoVscode ${USERHOME}/.pico-sdk/cmake/pico-vscode.cmake)
-if (EXISTS ${picoVscode})
- include(${picoVscode})
-endif()
-# ====================================================================================
-set(PICO_BOARD pico CACHE STRING "Board type")
-
-# Pull in Raspberry Pi Pico SDK (must be before project)
-include(pico_sdk_import.cmake)
-
-project(vl53l5cx C CXX ASM)
-
-# Initialise the Raspberry Pi Pico SDK
-pico_sdk_init()
-
-# Add executable. Default name is the project name, version 0.1
-
-add_executable(vl53l5cx
- vl53l5cx.c
- )
-
-# pull in common dependencies and additional i2c hardware support
-target_link_libraries(vl53l5cx pico_stdlib hardware_i2c vl53l5cx_api)
-
-# create map/bin/hex file etc.
-pico_add_extra_outputs(vl53l5cx)
-
-# add url via pico_set_program_url
diff --git a/Pi_Pico_Cpp/vl53l5cx/pico_sdk_import.cmake b/Pi_Pico_Cpp/vl53l5cx/pico_sdk_import.cmake
deleted file mode 100644
index a0721d0d13d7bcef15e0cf6680570bb7ec422716..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/pico_sdk_import.cmake
+++ /dev/null
@@ -1,84 +0,0 @@
-# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
-
-# This can be dropped into an external project to help locate this SDK
-# It should be include()ed prior to project()
-
-if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
- set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
- message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
- set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
- message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
- set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
- message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
-endif ()
-
-if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_TAG} AND (NOT PICO_SDK_FETCH_FROM_GIT_TAG))
- set(PICO_SDK_FETCH_FROM_GIT_TAG $ENV{PICO_SDK_FETCH_FROM_GIT_TAG})
- message("Using PICO_SDK_FETCH_FROM_GIT_TAG from environment ('${PICO_SDK_FETCH_FROM_GIT_TAG}')")
-endif ()
-
-if (PICO_SDK_FETCH_FROM_GIT AND NOT PICO_SDK_FETCH_FROM_GIT_TAG)
- set(PICO_SDK_FETCH_FROM_GIT_TAG "master")
- message("Using master as default value for PICO_SDK_FETCH_FROM_GIT_TAG")
-endif()
-
-set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
-set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
-set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
-set(PICO_SDK_FETCH_FROM_GIT_TAG "${PICO_SDK_FETCH_FROM_GIT_TAG}" CACHE FILEPATH "release tag for SDK")
-
-if (NOT PICO_SDK_PATH)
- if (PICO_SDK_FETCH_FROM_GIT)
- include(FetchContent)
- set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
- if (PICO_SDK_FETCH_FROM_GIT_PATH)
- get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
- endif ()
- # GIT_SUBMODULES_RECURSE was added in 3.17
- if (${CMAKE_VERSION} VERSION_GREATER_EQUAL "3.17.0")
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- GIT_SUBMODULES_RECURSE FALSE
- )
- else ()
- FetchContent_Declare(
- pico_sdk
- GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
- GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG}
- )
- endif ()
-
- if (NOT pico_sdk)
- message("Downloading Raspberry Pi Pico SDK")
- FetchContent_Populate(pico_sdk)
- set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
- endif ()
- set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
- else ()
- message(FATAL_ERROR
- "SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
- )
- endif ()
-endif ()
-
-get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
-if (NOT EXISTS ${PICO_SDK_PATH})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
-endif ()
-
-set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
-if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
- message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
-endif ()
-
-set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
-
-include(${PICO_SDK_INIT_CMAKE_FILE})
diff --git a/Pi_Pico_Cpp/vl53l5cx/platform.c b/Pi_Pico_Cpp/vl53l5cx/platform.c
deleted file mode 100644
index b5d2ca9f58b95600ee1d24adfb84824198913c8d..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/platform.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-
-#include "platform.h"
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform)
-{
- uint8_t status = 0;
-
- /* (Optional) Need to be implemented by customer. This function returns 0 if OK */
-
- /* Set pin LPN to LOW */
- /* Set pin AVDD to LOW */
- /* Set pin VDDIO to LOW */
- VL53L5CX_WaitMs(p_platform, 100);
-
- /* Set pin LPN of to HIGH */
- /* Set pin AVDD of to HIGH */
- /* Set pin VDDIO of to HIGH */
- VL53L5CX_WaitMs(p_platform, 100);
-
- return status;
-}
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size)
-{
- uint32_t i, tmp;
-
- /* Example of possible implementation using <string.h> */
- for(i = 0; i < size; i = i + 4)
- {
- tmp = (
- buffer[i]<<24)
- |(buffer[i+1]<<16)
- |(buffer[i+2]<<8)
- |(buffer[i+3]);
-
- memcpy(&(buffer[i]), &tmp, 4);
- }
-}
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs)
-{
- uint8_t status = 255;
-
- /* Need to be implemented by customer. This function returns 0 if OK */
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/platform.h b/Pi_Pico_Cpp/vl53l5cx/platform.h
deleted file mode 100644
index 9b23c0d11134d268753579edaab0cfbbbe58e1f0..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/platform.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef _PLATFORM_H_
-#define _PLATFORM_H_
-#pragma once
-
-#include <stdint.h>
-#include <string.h>
-
-/**
- * @brief Structure VL53L5CX_Platform needs to be filled by the customer,
- * depending on his platform. At least, it contains the VL53L5CX I2C address.
- * Some additional fields can be added, as descriptors, or platform
- * dependencies. Anything added into this structure is visible into the platform
- * layer.
- */
-
-typedef struct
-{
- /* To be filled with customer's platform. At least an I2C address/descriptor
- * needs to be added */
- /* Example for most standard platform : I2C address of sensor */
- uint16_t address;
-
-} VL53L5CX_Platform;
-
-/*
- * @brief The macro below is used to define the number of target per zone sent
- * through I2C. This value can be changed by user, in order to tune I2C
- * transaction, and also the total memory size (a lower number of target per
- * zone means a lower RAM). The value must be between 1 and 4.
- */
-
-#define VL53L5CX_NB_TARGET_PER_ZONE 1U
-
-/*
- * @brief The macro below can be used to avoid data conversion into the driver.
- * By default there is a conversion between firmware and user data. Using this macro
- * allows to use the firmware format instead of user format. The firmware format allows
- * an increased precision.
- */
-
-// #define VL53L5CX_USE_RAW_FORMAT
-
-/*
- * @brief All macro below are used to configure the sensor output. User can
- * define some macros if he wants to disable selected output, in order to reduce
- * I2C access.
- */
-
-// #define VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-// #define VL53L5CX_DISABLE_NB_SPADS_ENABLED
-// #define VL53L5CX_DISABLE_NB_TARGET_DETECTED
-// #define VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-// #define VL53L5CX_DISABLE_RANGE_SIGMA_MM
-// #define VL53L5CX_DISABLE_DISTANCE_MM
-// #define VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-// #define VL53L5CX_DISABLE_TARGET_STATUS
-// #define VL53L5CX_DISABLE_MOTION_INDICATOR
-
-/**
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) *p_values : Pointer of value to read.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_value);
-
-/**
- * @brief Mandatory function used to write one single byte.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of value to read.
- * @param (uint8_t) value : Pointer of value to write.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrByte(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t value);
-
-/**
- * @brief Mandatory function used to read multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to read.
- * @param (uint8_t) *p_values : Buffer of bytes to read.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_RdMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Mandatory function used to write multiples bytes.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint16_t) Address : I2C location of values to write.
- * @param (uint8_t) *p_values : Buffer of bytes to write.
- * @param (uint32_t) size : Size of *p_values buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_WrMulti(
- VL53L5CX_Platform *p_platform,
- uint16_t RegisterAdress,
- uint8_t *p_values,
- uint32_t size);
-
-/**
- * @brief Optional function, only used to perform an hardware reset of the
- * sensor. This function is not used in the API, but it can be used by the host.
- * This function is not mandatory to fill if user don't want to reset the
- * sensor.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t VL53L5CX_Reset_Sensor(
- VL53L5CX_Platform *p_platform);
-
-/**
- * @brief Mandatory function, used to swap a buffer. The buffer size is always a
- * multiple of 4 (4, 8, 12, 16, ...).
- * @param (uint8_t*) buffer : Buffer to swap, generally uint32_t
- * @param (uint16_t) size : Buffer size to swap
- */
-
-void VL53L5CX_SwapBuffer(
- uint8_t *buffer,
- uint16_t size);
-/**
- * @brief Mandatory function, used to wait during an amount of time. It must be
- * filled as it's used into the API.
- * @param (VL53L5CX_Platform*) p_platform : Pointer of VL53L5CX platform
- * structure.
- * @param (uint32_t) TimeMs : Time to wait in ms.
- * @return (uint8_t) status : 0 if wait is finished.
- */
-
-uint8_t VL53L5CX_WaitMs(
- VL53L5CX_Platform *p_platform,
- uint32_t TimeMs);
-
-#endif // _PLATFORM_H_
\ No newline at end of file
diff --git a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx.c b/Pi_Pico_Cpp/vl53l5cx/vl53l5cx.c
deleted file mode 100644
index 9a6034e148d5be2378c6aa0243034c71e9072be3..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/**
- * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <stdio.h>
-#include <string.h>
-#include "pico/stdlib.h"
-#include "pico/binary_info.h"
-#include "hardware/i2c.h"
-
-/*******************************************************************************
-* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
-*
-* This file is part of the VL53L5CX Ultra Lite Driver and is dual licensed,
-* either 'STMicroelectronics Proprietary license'
-* or 'BSD 3-clause "New" or "Revised" License' , at your option.
-*
-********************************************************************************
-*
-* 'STMicroelectronics Proprietary license'
-*
-********************************************************************************
-*
-* License terms: STMicroelectronics Proprietary in accordance with licensing
-* terms at www.st.com/sla0081
-*
-* STMicroelectronics confidential
-* Reproduction and Communication of this document is strictly prohibited unless
-* specifically authorized in writing by STMicroelectronics.
-*
-*
-********************************************************************************
-*
-* Alternatively, the VL53L5CX Ultra Lite Driver may be distributed under the
-* terms of 'BSD 3-clause "New" or "Revised" License', in which case the
-* following provisions apply instead of the ones mentioned above :
-*
-********************************************************************************
-*
-* License terms: BSD 3-clause "New" or "Revised" License.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright notice, this
-* list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright notice,
-* this list of conditions and the following disclaimer in the documentation
-* and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its contributors
-* may be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*
-*
-*******************************************************************************/
-
-/***********************************/
-/* VL53L5CX ULD basic example */
-/***********************************/
-/*
-* This example is the most basic. It initializes the VL53L5CX ULD, and starts
-* a ranging to capture 10 frames.
-*
-* By default, ULD is configured to have the following settings :
-* - Resolution 4x4
-* - Ranging period 1Hz
-*
-* In this example, we also suppose that the number of target per zone is
-* set to 1 , and all output are enabled (see file platform.h).
-*/
-
-#include <stdlib.h>
-#include <string.h>
-#include <stdio.h>
-#include "vl53l5cx_api.h"
-
-int main(void)
-{
-
- /*********************************/
- /* VL53L5CX ranging variables */
- /*********************************/
-
- uint8_t status, loop, isAlive, isReady, i;
- VL53L5CX_Configuration Dev; /* Sensor configuration */
- VL53L5CX_ResultsData Results; /* Results data from VL53L5CX */
-
-
- /*********************************/
- /* Customer platform */
- /*********************************/
-
- /* Fill the platform structure with customer's implementation. For this
- * example, only the I2C address is used.
- */
- Dev.platform.address = VL53L5CX_DEFAULT_I2C_ADDRESS;
-
- /* (Optional) Reset sensor toggling PINs (see platform, not in API) */
- //VL53L5CX_Reset_Sensor(&(Dev.platform));
-
- /* (Optional) Set a new I2C address if the wanted address is different
- * from the default one (filled with 0x20 for this example).
- */
- //status = vl53l5cx_set_i2c_address(&Dev, 0x20);
-
-
- /*********************************/
- /* Power on sensor and init */
- /*********************************/
-
- /* (Optional) Check if there is a VL53L5CX sensor connected */
- status = vl53l5cx_is_alive(&Dev, &isAlive);
- if(!isAlive || status)
- {
- printf("VL53L5CX not detected at requested address\n");
- return status;
- }
-
- /* (Mandatory) Init VL53L5CX sensor */
- status = vl53l5cx_init(&Dev);
- if(status)
- {
- printf("VL53L5CX ULD Loading failed\n");
- return status;
- }
-
- printf("VL53L5CX ULD ready ! (Version : %s)\n",
- VL53L5CX_API_REVISION);
-
-
- /*********************************/
- /* Ranging loop */
- /*********************************/
-
- status = vl53l5cx_start_ranging(&Dev);
-
- loop = 0;
- while(loop < 10)
- {
- /* Use polling function to know when a new measurement is ready.
- * Another way can be to wait for HW interrupt raised on PIN A3
- * (GPIO 1) when a new measurement is ready */
-
- status = vl53l5cx_check_data_ready(&Dev, &isReady);
-
- if(isReady)
- {
- vl53l5cx_get_ranging_data(&Dev, &Results);
-
- /* As the sensor is set in 4x4 mode by default, we have a total
- * of 16 zones to print. For this example, only the data of first zone are
- * print */
- printf("Print data no : %3u\n", Dev.streamcount);
- for(i = 0; i < 16; i++)
- {
- printf("Zone : %3d, Status : %3u, Distance : %4d mm\n",
- i,
- Results.target_status[VL53L5CX_NB_TARGET_PER_ZONE*i],
- Results.distance_mm[VL53L5CX_NB_TARGET_PER_ZONE*i]);
- }
- printf("\n");
- loop++;
- }
-
- /* Wait a few ms to avoid too high polling (function in platform
- * file, not in API) */
- VL53L5CX_WaitMs(&(Dev.platform), 5);
- }
-
- status = vl53l5cx_stop_ranging(&Dev);
- printf("End of ULD demo\n");
- return status;
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.c b/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.c
deleted file mode 100644
index f92ec505aaa80e6fb558a4ce4fb29e5ce9c38c7e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.c
+++ /dev/null
@@ -1,1333 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include "vl53l5cx_api.h"
-#include "vl53l5cx_buffers.h"
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to wait for an answer from VL53L5CX sensor.
- */
-
-static uint8_t _vl53l5cx_poll_for_answer(
- VL53L5CX_Configuration *p_dev,
- uint8_t size,
- uint8_t pos,
- uint16_t address,
- uint8_t mask,
- uint8_t expected_value)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdMulti(&(p_dev->platform), address,
- p_dev->temp_buffer, size);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
-
- if(timeout >= (uint8_t)200) /* 2s timeout */
- {
- status |= (uint8_t)VL53L5CX_STATUS_TIMEOUT_ERROR;
- break;
- }else if((size >= (uint8_t)4)
- && (p_dev->temp_buffer[2] >= (uint8_t)0x7f))
- {
- status |= VL53L5CX_MCU_ERROR;
- break;
- }
- else
- {
- timeout++;
- }
- }while ((p_dev->temp_buffer[pos] & mask) != expected_value);
-
- return status;
-}
-
-/*
- * Inner function, not available outside this file. This function is used to
- * wait for the MCU to boot.
- */
-static uint8_t _vl53l5cx_poll_for_mcu_boot(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t go2_status0, go2_status1, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
-
- do {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x06, &go2_status0);
- if((go2_status0 & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x07, &go2_status1);
- status |= go2_status1;
- break;
- }
- (void)VL53L5CX_WaitMs(&(p_dev->platform), 1);
- timeout++;
-
- if((go2_status0 & (uint8_t)0x1) != (uint8_t)0){
- break;
- }
-
- }while (timeout < (uint16_t)500);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the offset data gathered from NVM.
- */
-
-static uint8_t _vl53l5cx_send_offset_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t signal_grid[64];
- int16_t range_grid[64];
- uint8_t dss_4x4[] = {0x0F, 0x04, 0x04, 0x00, 0x08, 0x10, 0x10, 0x07};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0F, 0x03, 0x01, 0x01, 0xE4};
- int8_t i, j;
- uint16_t k;
-
- (void)memcpy(p_dev->temp_buffer,
- p_dev->offset_data, VL53L5CX_OFFSET_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 offset */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4){
- (void)memcpy(&(p_dev->temp_buffer[0x10]), dss_4x4, sizeof(dss_4x4));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- (void)memcpy(signal_grid,&(p_dev->temp_buffer[0x3C]),
- sizeof(signal_grid));
- (void)memcpy(range_grid,&(p_dev->temp_buffer[0x140]),
- sizeof(range_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+ (int8_t)0]
- + signal_grid[(2*i)+(16*j)+(int8_t)1]
- + signal_grid[(2*i)+(16*j)+(int8_t)8]
- + signal_grid[(2*i)+(16*j)+(int8_t)9])
- /(uint32_t)4;
- range_grid[i+(4*j)] =
- (range_grid[(2*i)+(16*j)]
- + range_grid[(2*i)+(16*j)+1]
- + range_grid[(2*i)+(16*j)+8]
- + range_grid[(2*i)+(16*j)+9])
- /(int16_t)4;
- }
- }
- (void)memset(&range_grid[0x10], 0, (uint16_t)96);
- (void)memset(&signal_grid[0x10], 0, (uint16_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x3C]),
- signal_grid, sizeof(signal_grid));
- (void)memcpy(&(p_dev->temp_buffer[0x140]),
- range_grid, sizeof(range_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_OFFSET_BUFFER_SIZE);
- }
-
- for(k = 0; k < (VL53L5CX_OFFSET_BUFFER_SIZE - (uint16_t)4); k++)
- {
- p_dev->temp_buffer[k] = p_dev->temp_buffer[k + (uint16_t)8];
- }
-
- (void)memcpy(&(p_dev->temp_buffer[0x1E0]), footer, 8);
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2e18, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-/**
- * @brief Inner function, not available outside this file. This function is used
- * to set the Xtalk data from generic configuration, or user's calibration.
- */
-
-static uint8_t _vl53l5cx_send_xtalk_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t res4x4[] = {0x0F, 0x04, 0x04, 0x17, 0x08, 0x10, 0x10, 0x07};
- uint8_t dss_4x4[] = {0x00, 0x78, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08};
- uint8_t profile_4x4[] = {0xA0, 0xFC, 0x01, 0x00};
- uint32_t signal_grid[64];
- int8_t i, j;
-
- (void)memcpy(p_dev->temp_buffer, &(p_dev->xtalk_data[0]),
- VL53L5CX_XTALK_BUFFER_SIZE);
-
- /* Data extrapolation is required for 4X4 Xtalk */
- if(resolution == (uint8_t)VL53L5CX_RESOLUTION_4X4)
- {
- (void)memcpy(&(p_dev->temp_buffer[0x8]),
- res4x4, sizeof(res4x4));
- (void)memcpy(&(p_dev->temp_buffer[0x020]),
- dss_4x4, sizeof(dss_4x4));
-
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(signal_grid, &(p_dev->temp_buffer[0x34]),
- sizeof(signal_grid));
-
- for (j = 0; j < (int8_t)4; j++)
- {
- for (i = 0; i < (int8_t)4 ; i++)
- {
- signal_grid[i+(4*j)] =
- (signal_grid[(2*i)+(16*j)+0]
- + signal_grid[(2*i)+(16*j)+1]
- + signal_grid[(2*i)+(16*j)+8]
- + signal_grid[(2*i)+(16*j)+9])/(uint32_t)4;
- }
- }
- (void)memset(&signal_grid[0x10], 0, (uint32_t)192);
- (void)memcpy(&(p_dev->temp_buffer[0x34]),
- signal_grid, sizeof(signal_grid));
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- (void)memcpy(&(p_dev->temp_buffer[0x134]),
- profile_4x4, sizeof(profile_4x4));
- (void)memset(&(p_dev->temp_buffer[0x078]),0 ,
- (uint32_t)4*sizeof(uint8_t));
- }
-
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2cf8,
- p_dev->temp_buffer, VL53L5CX_XTALK_BUFFER_SIZE);
- status |=_vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- return status;
-}
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t device_id, revision_id;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0, &device_id);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 1, &revision_id);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- if((device_id == (uint8_t)0xF0) && (revision_id == (uint8_t)0x02))
- {
- *p_is_alive = 1;
- }
- else
- {
- *p_is_alive = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
- uint8_t pipe_ctrl[] = {VL53L5CX_NB_TARGET_PER_ZONE, 0x00, 0x01, 0x00};
- uint32_t single_range = 0x01;
-
- p_dev->default_xtalk = (uint8_t*)VL53L5CX_DEFAULT_XTALK;
- p_dev->default_configuration = (uint8_t*)VL53L5CX_DEFAULT_CONFIGURATION;
- p_dev->is_auto_stop_enabled = (uint8_t)0x0;
-
- /* SW reboot sequence */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0009, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x03);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7FFF, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x01);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x43);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 1);
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000F, 0x40);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000A, 0x01);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 100);
-
- /* Wait for sensor booted (several ms required to get sensor ready ) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x06, 0xff, 1);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x000E, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Enable FW access */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Enable host access to GO1 */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Power ON status */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x101, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x102, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4002, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x010A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x103, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x400F, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x43);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x03);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21A, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x219, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x21B, 0x00);
-
- /* Wake up MCU */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x07);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x20, 0x06);
-
- /* Download FW into VL53L5 */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x09);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0a);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x8000],0x8000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x0b);
- status |= VL53L5CX_WrMulti(&(p_dev->platform),0,
- (uint8_t*)&VL53L5CX_FIRMWARE[0x10000],0x5000);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
-
- /* Check if FW correctly downloaded */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x03, 0x0D);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x01);
- status |= _vl53l5cx_poll_for_answer(p_dev, 1, 0, 0x21, 0x10, 0x10);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x01);
-
- /* Reset MCU and wait boot */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x114, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x115, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x116, 0x42);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x117, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7fff, &tmp);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0C, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x0B, 0x01);
- status |= _vl53l5cx_poll_for_mcu_boot(p_dev);
- if(status != (uint8_t)0){
- goto exit;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Get offset NVM data and store them into the offset buffer */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2fd8,
- (uint8_t*)VL53L5CX_GET_NVM_CMD, sizeof(VL53L5CX_GET_NVM_CMD));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 0,
- VL53L5CX_UI_CMD_STATUS, 0xff, 2);
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, VL53L5CX_NVM_DATA_SIZE);
- (void)memcpy(p_dev->offset_data, p_dev->temp_buffer,
- VL53L5CX_OFFSET_BUFFER_SIZE);
- status |= _vl53l5cx_send_offset_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Set default Xtalk shape. Send Xtalk to sensor */
- (void)memcpy(p_dev->xtalk_data, (uint8_t*)VL53L5CX_DEFAULT_XTALK,
- VL53L5CX_XTALK_BUFFER_SIZE);
- status |= _vl53l5cx_send_xtalk_data(p_dev, VL53L5CX_RESOLUTION_4X4);
-
- /* Send default configuration to VL53L5CX firmware */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), 0x2c34,
- p_dev->default_configuration,
- sizeof(VL53L5CX_DEFAULT_CONFIGURATION));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&pipe_ctrl,
- VL53L5CX_DCI_PIPE_CONTROL, (uint16_t)sizeof(pipe_ctrl));
-#if VL53L5CX_NB_TARGET_PER_ZONE != 1
- tmp = VL53L5CX_NB_TARGET_PER_ZONE;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FW_NB_TARGET, 16,
- (uint8_t*)&tmp, 1, 0x0C);
-#endif
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- tmp = (uint8_t)1;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x26);
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_GLARE_FILTER, 40, (uint8_t*)&tmp, 1, 0x25);
-
-exit:
- return status;
-}
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x4, (uint8_t)(i2c_address >> 1));
- p_dev->platform.address = i2c_address;
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode)
-{
- uint8_t tmp, status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x009, &tmp);
-
- switch(tmp)
- {
- case 0x4:
- *p_power_mode = VL53L5CX_POWER_MODE_WAKEUP;
- break;
- case 0x2:
- *p_power_mode = VL53L5CX_POWER_MODE_SLEEP;
-
- break;
- default:
- *p_power_mode = 0;
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
-
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode)
-{
- uint8_t current_power_mode, status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_get_power_mode(p_dev, ¤t_power_mode);
- if(power_mode != current_power_mode)
- {
- switch(power_mode)
- {
- case VL53L5CX_POWER_MODE_WAKEUP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 1);
- break;
-
- case VL53L5CX_POWER_MODE_SLEEP:
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x02);
- status |= _vl53l5cx_poll_for_answer(
- p_dev, 1, 0, 0x06, 0x01, 0);
- break;
-
- default:
- status = VL53L5CX_STATUS_ERROR;
- break;
- }
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7FFF, 0x02);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t resolution, status = VL53L5CX_STATUS_OK;
- uint16_t tmp;
- uint32_t i;
- uint32_t header_config[2] = {0, 0};
-
- union Block_header *bh_ptr;
- uint8_t cmd[] = {0x00, 0x03, 0x00, 0x00};
-
- status |= vl53l5cx_get_resolution(p_dev, &resolution);
- p_dev->data_read_size = 0;
- p_dev->streamcount = 255;
-
- /* Enable mandatory output (meta and common data) */
- uint32_t output_bh_enable[] = {
- 0x00000007U,
- 0x00000000U,
- 0x00000000U,
- 0xC0000000U};
-
- /* Send addresses of possible output */
- uint32_t output[] ={VL53L5CX_START_BH,
- VL53L5CX_METADATA_BH,
- VL53L5CX_COMMONDATA_BH,
- VL53L5CX_AMBIENT_RATE_BH,
- VL53L5CX_SPAD_COUNT_BH,
- VL53L5CX_NB_TARGET_DETECTED_BH,
- VL53L5CX_SIGNAL_RATE_BH,
- VL53L5CX_RANGE_SIGMA_MM_BH,
- VL53L5CX_DISTANCE_BH,
- VL53L5CX_REFLECTANCE_BH,
- VL53L5CX_TARGET_STATUS_BH,
- VL53L5CX_MOTION_DETECT_BH};
-
- /* Enable selected outputs in the 'platform.h' file */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- output_bh_enable[0] += (uint32_t)8;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- output_bh_enable[0] += (uint32_t)16;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- output_bh_enable[0] += (uint32_t)32;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- output_bh_enable[0] += (uint32_t)64;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- output_bh_enable[0] += (uint32_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- output_bh_enable[0] += (uint32_t)256;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- output_bh_enable[0] += (uint32_t)512;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- output_bh_enable[0] += (uint32_t)1024;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- output_bh_enable[0] += (uint32_t)2048;
-#endif
-
- /* Update data size */
- for (i = 0; i < (uint32_t)(sizeof(output)/sizeof(uint32_t)); i++)
- {
- if ((output[i] == (uint8_t)0)
- || ((output_bh_enable[i/(uint32_t)32]
- &((uint32_t)1 << (i%(uint32_t)32))) == (uint32_t)0))
- {
- continue;
- }
-
- bh_ptr = (union Block_header *)&(output[i]);
- if (((uint8_t)bh_ptr->type >= (uint8_t)0x1)
- && ((uint8_t)bh_ptr->type < (uint8_t)0x0d))
- {
- if ((bh_ptr->idx >= (uint16_t)0x54d0)
- && (bh_ptr->idx < (uint16_t)(0x54d0 + 960)))
- {
- bh_ptr->size = resolution;
- }
- else
- {
- bh_ptr->size = (uint16_t)((uint16_t)resolution
- * (uint16_t)VL53L5CX_NB_TARGET_PER_ZONE);
- }
- p_dev->data_read_size += bh_ptr->type * bh_ptr->size;
- }
- else
- {
- p_dev->data_read_size += bh_ptr->size;
- }
- p_dev->data_read_size += (uint32_t)4;
- }
- p_dev->data_read_size += (uint32_t)24;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output), VL53L5CX_DCI_OUTPUT_LIST,
- (uint16_t)sizeof(output));
-
- header_config[0] = p_dev->data_read_size;
- header_config[1] = i + (uint32_t)1;
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(header_config), VL53L5CX_DCI_OUTPUT_CONFIG,
- (uint16_t)sizeof(header_config));
-
- status |= vl53l5cx_dci_write_data(p_dev,
- (uint8_t*)&(output_bh_enable), VL53L5CX_DCI_OUTPUT_ENABLES,
- (uint16_t)sizeof(output_bh_enable));
-
- /* Start xshut bypass (interrupt mode) */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x05);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- /* Start ranging session */
- status |= VL53L5CX_WrMulti(&(p_dev->platform), VL53L5CX_UI_CMD_END -
- (uint16_t)(4 - 1), (uint8_t*)cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- /* Read ui range data content and compare if data size is the correct one */
- status |= vl53l5cx_dci_read_data(p_dev,
- (uint8_t*)p_dev->temp_buffer, 0x5440, 12);
- (void)memcpy(&tmp, &(p_dev->temp_buffer[0x8]), sizeof(tmp));
- if(tmp != p_dev->data_read_size)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t tmp = 0, status = VL53L5CX_STATUS_OK;
- uint16_t timeout = 0;
- uint32_t auto_stop_flag = 0;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform),
- 0x2FFC, (uint8_t*)&auto_stop_flag, 4);
- if((auto_stop_flag != (uint32_t)0x4FF)
- && (p_dev->is_auto_stop_enabled == (uint8_t)0))
- {
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
-
- /* Provoke MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x16);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x01);
-
- /* Poll for G02 status 0 MCU stop */
- while(((tmp & (uint8_t)0x80) >> 7) == (uint8_t)0x00)
- {
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- status |= VL53L5CX_WaitMs(&(p_dev->platform), 10);
- timeout++; /* Timeout reached after 5 seconds */
-
- if(timeout > (uint16_t)500)
- {
- status |= tmp;
- break;
- }
- }
- }
-
- /* Check GO2 status 1 if status is still OK */
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x6, &tmp);
- if((tmp & (uint8_t)0x80) != (uint8_t)0){
- status |= VL53L5CX_RdByte(&(p_dev->platform), 0x7, &tmp);
- if((tmp != (uint8_t)0x84) && (tmp != (uint8_t)0x85)){
- status |= tmp;
- }
- }
-
- /* Undo MCU stop */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x14, 0x00);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x15, 0x00);
-
- /* Stop xshut bypass */
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x09, 0x04);
- status |= VL53L5CX_WrByte(&(p_dev->platform), 0x7fff, 0x02);
-
- return status;
-}
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0, p_dev->temp_buffer, 4);
-
- if((p_dev->temp_buffer[0] != p_dev->streamcount)
- && (p_dev->temp_buffer[0] != (uint8_t)255)
- && (p_dev->temp_buffer[1] == (uint8_t)0x5)
- && ((p_dev->temp_buffer[2] & (uint8_t)0x5) == (uint8_t)0x5)
- && ((p_dev->temp_buffer[3] & (uint8_t)0x10) ==(uint8_t)0x10)
- )
- {
- *p_isReady = (uint8_t)1;
- p_dev->streamcount = p_dev->temp_buffer[0];
- }
- else
- {
- if ((p_dev->temp_buffer[3] & (uint8_t)0x80) != (uint8_t)0)
- {
- status |= p_dev->temp_buffer[2]; /* Return GO2 error status */
- }
-
- *p_isReady = 0;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- union Block_header *bh_ptr;
- uint16_t header_id, footer_id;
- uint32_t i, j, msize;
-
- status |= VL53L5CX_RdMulti(&(p_dev->platform), 0x0,
- p_dev->temp_buffer, p_dev->data_read_size);
- p_dev->streamcount = p_dev->temp_buffer[0];
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, (uint16_t)p_dev->data_read_size);
-
- /* Start conversion at position 16 to avoid headers */
- for (i = (uint32_t)16; i
- < (uint32_t)p_dev->data_read_size; i+=(uint32_t)4)
- {
- bh_ptr = (union Block_header *)&(p_dev->temp_buffer[i]);
- if ((bh_ptr->type > (uint32_t)0x1)
- && (bh_ptr->type < (uint32_t)0xd))
- {
- msize = bh_ptr->type * bh_ptr->size;
- }
- else
- {
- msize = bh_ptr->size;
- }
-
- switch(bh_ptr->idx){
- case VL53L5CX_METADATA_IDX:
- p_results->silicon_temp_degc =
- (int8_t)p_dev->temp_buffer[i + (uint32_t)12];
- break;
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- case VL53L5CX_AMBIENT_RATE_IDX:
- (void)memcpy(p_results->ambient_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- case VL53L5CX_SPAD_COUNT_IDX:
- (void)memcpy(p_results->nb_spads_enabled,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- case VL53L5CX_NB_TARGET_DETECTED_IDX:
- (void)memcpy(p_results->nb_target_detected,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- case VL53L5CX_SIGNAL_RATE_IDX:
- (void)memcpy(p_results->signal_per_spad,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- case VL53L5CX_RANGE_SIGMA_MM_IDX:
- (void)memcpy(p_results->range_sigma_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- case VL53L5CX_DISTANCE_IDX:
- (void)memcpy(p_results->distance_mm,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- case VL53L5CX_REFLECTANCE_EST_PC_IDX:
- (void)memcpy(p_results->reflectance,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- case VL53L5CX_TARGET_STATUS_IDX:
- (void)memcpy(p_results->target_status,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- case VL53L5CX_MOTION_DETEC_IDX:
- (void)memcpy(&p_results->motion_indicator,
- &(p_dev->temp_buffer[i + (uint32_t)4]), msize);
- break;
-#endif
- default:
- break;
- }
- i += msize;
- }
-
-#ifndef VL53L5CX_USE_RAW_FORMAT
-
- /* Convert data into their real format */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- p_results->ambient_per_spad[i] /= (uint32_t)2048;
- }
-#endif
-
- for(i = 0; i < (uint32_t)(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE); i++)
- {
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- p_results->distance_mm[i] /= 4;
- if(p_results->distance_mm[i] < 0)
- {
- p_results->distance_mm[i] = 0;
- }
-#endif
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- p_results->reflectance[i] /= (uint8_t)2;
-#endif
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- p_results->range_sigma_mm[i] /= (uint16_t)128;
-#endif
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- p_results->signal_per_spad[i] /= (uint32_t)2048;
-#endif
- }
-
- /* Set target status to 255 if no target is detected for this zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- for(i = 0; i < (uint32_t)VL53L5CX_RESOLUTION_8X8; i++)
- {
- if(p_results->nb_target_detected[i] == (uint8_t)0){
- for(j = 0; j < (uint32_t)
- VL53L5CX_NB_TARGET_PER_ZONE; j++)
- {
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- p_results->target_status
- [((uint32_t)VL53L5CX_NB_TARGET_PER_ZONE
- *(uint32_t)i) + j]=(uint8_t)255;
-#endif
- }
- }
- }
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- for(i = 0; i < (uint32_t)32; i++)
- {
- p_results->motion_indicator.motion[i] /= (uint32_t)65535;
- }
-#endif
-
-#endif
-
- /* Check if footer id and header id are matching. This allows to detect
- * corrupted frames */
- header_id = ((uint16_t)(p_dev->temp_buffer[0x8])<<8) & 0xFF00U;
- header_id |= ((uint16_t)(p_dev->temp_buffer[0x9])) & 0x00FFU;
-
- footer_id = ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)4]) << 8) & 0xFF00U;
- footer_id |= ((uint16_t)(p_dev->temp_buffer[p_dev->data_read_size
- - (uint32_t)3])) & 0xFFU;
-
- if(header_id != footer_id)
- {
- status |= VL53L5CX_STATUS_CORRUPTED_FRAME;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- *p_resolution = p_dev->temp_buffer[0x00]*p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- switch(resolution){
- case VL53L5CX_RESOLUTION_4X4:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 64;
- p_dev->temp_buffer[0x06] = 64;
- p_dev->temp_buffer[0x09] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 4;
- p_dev->temp_buffer[0x01] = 4;
- p_dev->temp_buffer[0x04] = 8;
- p_dev->temp_buffer[0x05] = 8;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- break;
-
- case VL53L5CX_RESOLUTION_8X8:
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
- p_dev->temp_buffer[0x04] = 16;
- p_dev->temp_buffer[0x06] = 16;
- p_dev->temp_buffer[0x09] = 1;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_DSS_CONFIG, 16);
-
- status |= vl53l5cx_dci_read_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
- p_dev->temp_buffer[0x00] = 8;
- p_dev->temp_buffer[0x01] = 8;
- p_dev->temp_buffer[0x04] = 4;
- p_dev->temp_buffer[0x05] = 4;
- status |= vl53l5cx_dci_write_data(p_dev,
- p_dev->temp_buffer,
- VL53L5CX_DCI_ZONE_CONFIG, 8);
-
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= _vl53l5cx_send_offset_data(p_dev, resolution);
- status |= _vl53l5cx_send_xtalk_data(p_dev, resolution);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4);
- *p_frequency_hz = p_dev->temp_buffer[0x01];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_FREQ_HZ, 4,
- (uint8_t*)&frequency_hz, 1, 0x01);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20);
-
- (void)memcpy(p_time_ms, &(p_dev->temp_buffer[0x0]), 4);
- *p_time_ms /= (uint32_t)1000;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t integration = integration_time_ms;
-
- /* Integration time must be between 2ms and 1000ms */
- if((integration < (uint32_t)2)
- || (integration > (uint32_t)1000))
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }else
- {
- integration *= (uint32_t)1000;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INT_TIME, 20,
- (uint8_t*)&integration, 4, 0x00);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev,p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16);
-
- *p_sharpener_percent = (p_dev->temp_buffer[0xD]
- *(uint8_t)100)/(uint8_t)255;
-
- return status;
-}
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t sharpener;
-
- if(sharpener_percent >= (uint8_t)100)
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
- else
- {
- sharpener = (sharpener_percent*(uint8_t)255)/(uint8_t)100;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_SHARPENER, 16,
- (uint8_t*)&sharpener, 1, 0xD);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4);
- *p_target_order = (uint8_t)p_dev->temp_buffer[0x0];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- if((target_order == (uint8_t)VL53L5CX_TARGET_ORDER_CLOSEST)
- || (target_order == (uint8_t)VL53L5CX_TARGET_ORDER_STRONGEST))
- {
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_TARGET_ORDER, 4,
- (uint8_t*)&target_order, 1, 0x0);
- }else
- {
- status |= VL53L5CX_STATUS_INVALID_PARAM;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- if(p_dev->temp_buffer[0x01] == (uint8_t)0x1)
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_CONTINUOUS;
- }
- else
- {
- *p_ranging_mode = VL53L5CX_RANGING_MODE_AUTONOMOUS;
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t single_range = 0x00;
-
- status |= vl53l5cx_dci_read_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, 8);
-
- switch(ranging_mode)
- {
- case VL53L5CX_RANGING_MODE_CONTINUOUS:
- p_dev->temp_buffer[0x01] = 0x1;
- p_dev->temp_buffer[0x03] = 0x3;
- single_range = 0x00;
- break;
-
- case VL53L5CX_RANGING_MODE_AUTONOMOUS:
- p_dev->temp_buffer[0x01] = 0x3;
- p_dev->temp_buffer[0x03] = 0x2;
- single_range = 0x01;
- break;
-
- default:
- status = VL53L5CX_STATUS_INVALID_PARAM;
- break;
- }
-
- status |= vl53l5cx_dci_write_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_RANGING_MODE, (uint16_t)8);
-
- status |= vl53l5cx_dci_write_data(p_dev, (uint8_t*)&single_range,
- VL53L5CX_DCI_SINGLE_RANGE,
- (uint16_t)sizeof(single_range));
-
- return status;
-}
-
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 1;
- uint8_t analog_dynamic_pad_0 = 0;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- uint8_t vcsel_bootup_fsm = 0;
- uint8_t analog_dynamic_pad_0 = 1;
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&vcsel_bootup_fsm, 1, 0x0A);
-
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_INTERNAL_CP, 16,
- (uint8_t*)&analog_dynamic_pad_0, 1, 0x0E);
-
- return status;
-}
-
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_read_data(p_dev, (uint8_t*)p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16);
-
- *p_repeat_count = ((uint32_t)p_dev->temp_buffer[7] << 24)
- | ((uint32_t)p_dev->temp_buffer[6] << 16)
- | ((uint32_t)p_dev->temp_buffer[5] << 8)
- | (uint32_t)p_dev->temp_buffer[4];
-
- return status;
-}
-
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- status |= vl53l5cx_dci_replace_data(p_dev, p_dev->temp_buffer,
- VL53L5CX_DCI_VHV_CONFIG, 16, (uint8_t*)&repeat_count, 4, 0x4);
- return status;
-}
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- int16_t i;
- uint8_t status = VL53L5CX_STATUS_OK;
- uint32_t rd_size = (uint32_t) data_size + (uint32_t)12;
- uint8_t cmd[] = {0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0f,
- 0x00, 0x02, 0x00, 0x08};
-
- /* Check if tmp buffer is large enough */
- if((data_size + (uint16_t)12)>(uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- cmd[0] = (uint8_t)(index >> 8);
- cmd[1] = (uint8_t)(index & (uint32_t)0xff);
- cmd[2] = (uint8_t)((data_size & (uint16_t)0xff0) >> 4);
- cmd[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Request data reading from FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),
- (VL53L5CX_UI_CMD_END-(uint16_t)11),cmd, sizeof(cmd));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS,
- 0xff, 0x03);
-
- /* Read new data sent (4 bytes header + data_size + 8 bytes footer) */
- status |= VL53L5CX_RdMulti(&(p_dev->platform), VL53L5CX_UI_CMD_START,
- p_dev->temp_buffer, rd_size);
- VL53L5CX_SwapBuffer(p_dev->temp_buffer, data_size + (uint16_t)12);
-
- /* Copy data from FW into input structure (-4 bytes to remove header) */
- for(i = 0 ; i < (int16_t)data_size;i++){
- data[i] = p_dev->temp_buffer[i + 4];
- }
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
- int16_t i;
-
- uint8_t headers[] = {0x00, 0x00, 0x00, 0x00};
- uint8_t footer[] = {0x00, 0x00, 0x00, 0x0f, 0x05, 0x01,
- (uint8_t)((data_size + (uint16_t)8) >> 8),
- (uint8_t)((data_size + (uint16_t)8) & (uint8_t)0xFF)};
-
- uint16_t address = (uint16_t)VL53L5CX_UI_CMD_END -
- (data_size + (uint16_t)12) + (uint16_t)1;
-
- /* Check if cmd buffer is large enough */
- if((data_size + (uint16_t)12)
- > (uint16_t)VL53L5CX_TEMPORARY_BUFFER_SIZE)
- {
- status |= VL53L5CX_STATUS_ERROR;
- }
- else
- {
- headers[0] = (uint8_t)(index >> 8);
- headers[1] = (uint8_t)(index & (uint32_t)0xff);
- headers[2] = (uint8_t)(((data_size & (uint16_t)0xff0) >> 4));
- headers[3] = (uint8_t)((data_size & (uint16_t)0xf) << 4);
-
- /* Copy data from structure to FW format (+4 bytes to add header) */
- VL53L5CX_SwapBuffer(data, data_size);
- for(i = (int16_t)data_size - (int16_t)1 ; i >= 0; i--)
- {
- p_dev->temp_buffer[i + 4] = data[i];
- }
-
- /* Add headers and footer */
- (void)memcpy(&p_dev->temp_buffer[0], headers, sizeof(headers));
- (void)memcpy(&p_dev->temp_buffer[data_size + (uint16_t)4],
- footer, sizeof(footer));
-
- /* Send data to FW */
- status |= VL53L5CX_WrMulti(&(p_dev->platform),address,
- p_dev->temp_buffer,
- (uint32_t)((uint32_t)data_size + (uint32_t)12));
- status |= _vl53l5cx_poll_for_answer(p_dev, 4, 1,
- VL53L5CX_UI_CMD_STATUS, 0xff, 0x03);
-
- VL53L5CX_SwapBuffer(data, data_size);
- }
-
- return status;
-}
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos)
-{
- uint8_t status = VL53L5CX_STATUS_OK;
-
- status |= vl53l5cx_dci_read_data(p_dev, data, index, data_size);
- (void)memcpy(&(data[new_data_pos]), new_data, new_data_size);
- status |= vl53l5cx_dci_write_data(p_dev, data, index, data_size);
-
- return status;
-}
diff --git a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.h b/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.h
deleted file mode 100644
index 0e870ac0b4a620dbc9c473db4e2919db875d2db8..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_api.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-#ifndef VL53L5CX_API_H_
-#define VL53L5CX_API_H_
-
-#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
-#pragma anon_unions
-#endif
-
-
-
-#include "platform.h"
-
-/**
- * @brief Current driver version.
- */
-
-#define VL53L5CX_API_REVISION "VL53L5CX_2.0.0"
-
-/**
- * @brief Default I2C address of VL53L5CX sensor. Can be changed using function
- * vl53l5cx_set_i2c_address() function is called.
- */
-
-#define VL53L5CX_DEFAULT_I2C_ADDRESS ((uint16_t)0x52)
-
-/**
- * @brief Macro VL53L5CX_RESOLUTION_4X4 or VL53L5CX_RESOLUTION_8X8 allows
- * setting sensor in 4x4 mode or 8x8 mode, using function
- * vl53l5cx_set_resolution().
- */
-
-#define VL53L5CX_RESOLUTION_4X4 ((uint8_t) 16U)
-#define VL53L5CX_RESOLUTION_8X8 ((uint8_t) 64U)
-
-
-/**
- * @brief Macro VL53L5CX_TARGET_ORDER_STRONGEST or VL53L5CX_TARGET_ORDER_CLOSEST
- * are used to select the target order for data output.
- */
-
-#define VL53L5CX_TARGET_ORDER_CLOSEST ((uint8_t) 1U)
-#define VL53L5CX_TARGET_ORDER_STRONGEST ((uint8_t) 2U)
-
-/**
- * @brief Macro VL53L5CX_RANGING_MODE_CONTINUOUS and
- * VL53L5CX_RANGING_MODE_AUTONOMOUS are used to change the ranging mode.
- * Autonomous mode can be used to set a precise integration time, whereas
- * continuous is always maximum.
- */
-
-#define VL53L5CX_RANGING_MODE_CONTINUOUS ((uint8_t) 1U)
-#define VL53L5CX_RANGING_MODE_AUTONOMOUS ((uint8_t) 3U)
-
-/**
- * @brief The default power mode is VL53L5CX_POWER_MODE_WAKEUP. User can choose
- * the mode VL53L5CX_POWER_MODE_SLEEP to save power consumption is the device
- * is not used. The low power mode retains the firmware and the configuration.
- * Both modes can be changed using function vl53l5cx_set_power_mode().
- */
-
-#define VL53L5CX_POWER_MODE_SLEEP ((uint8_t) 0U)
-#define VL53L5CX_POWER_MODE_WAKEUP ((uint8_t) 1U)
-
-/**
- * @brief Macro VL53L5CX_STATUS_OK indicates that VL53L5 sensor has no error.
- * Macro VL53L5CX_STATUS_ERROR indicates that something is wrong (value,
- * I2C access, ...). Macro VL53L5CX_MCU_ERROR is used to indicate a MCU issue.
- */
-
-#define VL53L5CX_STATUS_OK ((uint8_t) 0U)
-#define VL53L5CX_STATUS_TIMEOUT_ERROR ((uint8_t) 1U)
-#define VL53L5CX_STATUS_CORRUPTED_FRAME ((uint8_t) 2U)
-#define VL53L5CX_STATUS_CRC_CSUM_FAILED ((uint8_t) 3U)
-#define VL53L5CX_STATUS_XTALK_FAILED ((uint8_t) 4U)
-#define VL53L5CX_MCU_ERROR ((uint8_t) 66U)
-#define VL53L5CX_STATUS_INVALID_PARAM ((uint8_t) 127U)
-#define VL53L5CX_STATUS_ERROR ((uint8_t) 255U)
-
-/**
- * @brief Definitions for Range results block headers
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0xDB840401U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0xDBC40404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0xDEC40402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0xDF440402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0xE0440401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0xE0840401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xD85808C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0xDB84U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0xDBC4U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0xDEC4U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0xDF44U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0xE044U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0xE084U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xD858U)
-
-#else
-#define VL53L5CX_START_BH ((uint32_t)0x0000000DU)
-#define VL53L5CX_METADATA_BH ((uint32_t)0x54B400C0U)
-#define VL53L5CX_COMMONDATA_BH ((uint32_t)0x54C00040U)
-#define VL53L5CX_AMBIENT_RATE_BH ((uint32_t)0x54D00104U)
-#define VL53L5CX_NB_TARGET_DETECTED_BH ((uint32_t)0x57D00401U)
-#define VL53L5CX_SPAD_COUNT_BH ((uint32_t)0x55D00404U)
-#define VL53L5CX_SIGNAL_RATE_BH ((uint32_t)0x58900404U)
-#define VL53L5CX_RANGE_SIGMA_MM_BH ((uint32_t)0x64900402U)
-#define VL53L5CX_DISTANCE_BH ((uint32_t)0x66900402U)
-#define VL53L5CX_REFLECTANCE_BH ((uint32_t)0x6A900401U)
-#define VL53L5CX_TARGET_STATUS_BH ((uint32_t)0x6B900401U)
-#define VL53L5CX_MOTION_DETECT_BH ((uint32_t)0xCC5008C0U)
-
-#define VL53L5CX_METADATA_IDX ((uint16_t)0x54B4U)
-#define VL53L5CX_SPAD_COUNT_IDX ((uint16_t)0x55D0U)
-#define VL53L5CX_AMBIENT_RATE_IDX ((uint16_t)0x54D0U)
-#define VL53L5CX_NB_TARGET_DETECTED_IDX ((uint16_t)0x57D0U)
-#define VL53L5CX_SIGNAL_RATE_IDX ((uint16_t)0x5890U)
-#define VL53L5CX_RANGE_SIGMA_MM_IDX ((uint16_t)0x6490U)
-#define VL53L5CX_DISTANCE_IDX ((uint16_t)0x6690U)
-#define VL53L5CX_REFLECTANCE_EST_PC_IDX ((uint16_t)0x6A90U)
-#define VL53L5CX_TARGET_STATUS_IDX ((uint16_t)0x6B90U)
-#define VL53L5CX_MOTION_DETEC_IDX ((uint16_t)0xCC50U)
-#endif
-
-
-/**
- * @brief Inner Macro for API. Not for user, only for development.
- */
-
-#define VL53L5CX_NVM_DATA_SIZE ((uint16_t)492U)
-#define VL53L5CX_CONFIGURATION_SIZE ((uint16_t)972U)
-#define VL53L5CX_OFFSET_BUFFER_SIZE ((uint16_t)488U)
-#define VL53L5CX_XTALK_BUFFER_SIZE ((uint16_t)776U)
-
-#define VL53L5CX_DCI_ZONE_CONFIG ((uint16_t)0x5450U)
-#define VL53L5CX_DCI_FREQ_HZ ((uint16_t)0x5458U)
-#define VL53L5CX_DCI_INT_TIME ((uint16_t)0x545CU)
-#define VL53L5CX_DCI_FW_NB_TARGET ((uint16_t)0x5478)
-#define VL53L5CX_DCI_RANGING_MODE ((uint16_t)0xAD30U)
-#define VL53L5CX_DCI_DSS_CONFIG ((uint16_t)0xAD38U)
-#define VL53L5CX_DCI_VHV_CONFIG ((uint16_t)0xAD60U)
-#define VL53L5CX_DCI_TARGET_ORDER ((uint16_t)0xAE64U)
-#define VL53L5CX_DCI_SHARPENER ((uint16_t)0xAED8U)
-#define VL53L5CX_DCI_INTERNAL_CP ((uint16_t)0xB39CU)
-#define VL53L5CX_DCI_SYNC_PIN ((uint16_t)0xB5F0U)
-#define VL53L5CX_DCI_MOTION_DETECTOR_CFG ((uint16_t)0xBFACU)
-#define VL53L5CX_DCI_SINGLE_RANGE ((uint16_t)0xD964U)
-#define VL53L5CX_DCI_OUTPUT_CONFIG ((uint16_t)0xD968U)
-#define VL53L5CX_DCI_OUTPUT_ENABLES ((uint16_t)0xD970U)
-#define VL53L5CX_DCI_OUTPUT_LIST ((uint16_t)0xD980U)
-#define VL53L5CX_DCI_PIPE_CONTROL ((uint16_t)0xDB80U)
-#define VL53L5CX_GLARE_FILTER ((uint16_t)0xE108U)
-
-
-#define VL53L5CX_UI_CMD_STATUS ((uint16_t)0x2C00U)
-#define VL53L5CX_UI_CMD_START ((uint16_t)0x2C04U)
-#define VL53L5CX_UI_CMD_END ((uint16_t)0x2FFFU)
-
-/**
- * @brief Inner values for API. Max buffer size depends of the selected output.
- */
-
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
-#define L5CX_AMB_SIZE 260U
-#else
-#define L5CX_AMB_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
-#define L5CX_SPAD_SIZE 260U
-#else
-#define L5CX_SPAD_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
-#define L5CX_NTAR_SIZE 68U
-#else
-#define L5CX_NTAR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
-#define L5CX_SPS_SIZE ((256U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SPS_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
-#define L5CX_SIGR_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_SIGR_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
-#define L5CX_DIST_SIZE ((128U * VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_DIST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
-#define L5CX_RFLEST_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_RFLEST_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
-#define L5CX_STA_SIZE ((64U *VL53L5CX_NB_TARGET_PER_ZONE) + 4U)
-#else
-#define L5CX_STA_SIZE 0U
-#endif
-
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
-#define L5CX_MOT_SIZE 144U
-#else
-#define L5CX_MOT_SIZE 0U
-#endif
-
-/**
- * @brief Macro VL53L5CX_MAX_RESULTS_SIZE indicates the maximum size used by
- * output through I2C. Value 40 corresponds to headers + meta-data + common-data
- * and 20 corresponds to the footer.
- */
-
-#define VL53L5CX_MAX_RESULTS_SIZE ( 40U \
- + L5CX_AMB_SIZE + L5CX_SPAD_SIZE + L5CX_NTAR_SIZE + L5CX_SPS_SIZE \
- + L5CX_SIGR_SIZE + L5CX_DIST_SIZE + L5CX_RFLEST_SIZE + L5CX_STA_SIZE \
- + L5CX_MOT_SIZE + 20U)
-
-/**
- * @brief Macro VL53L5CX_TEMPORARY_BUFFER_SIZE can be used to know the size of
- * the temporary buffer. The minimum size is 1024, and the maximum depends of
- * the output configuration.
- */
-
-#if VL53L5CX_MAX_RESULTS_SIZE < 1024U
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) 1024U)
-#else
-#define VL53L5CX_TEMPORARY_BUFFER_SIZE ((uint32_t) VL53L5CX_MAX_RESULTS_SIZE)
-#endif
-
-
-/**
- * @brief Structure VL53L5CX_Configuration contains the sensor configuration.
- * User MUST not manually change these field, except for the sensor address.
- */
-
-typedef struct
-{
- /* Platform, filled by customer into the 'platform.h' file */
- VL53L5CX_Platform platform;
- /* Results streamcount, value auto-incremented at each range */
- uint8_t streamcount;
- /* Size of data read though I2C */
- uint32_t data_read_size;
- /* Address of default configuration buffer */
- uint8_t *default_configuration;
- /* Address of default Xtalk buffer */
- uint8_t *default_xtalk;
- /* Offset buffer */
- uint8_t offset_data[VL53L5CX_OFFSET_BUFFER_SIZE];
- /* Xtalk buffer */
- uint8_t xtalk_data[VL53L5CX_XTALK_BUFFER_SIZE];
- /* Temporary buffer used for internal driver processing */
- uint8_t temp_buffer[VL53L5CX_TEMPORARY_BUFFER_SIZE];
- /* Auto-stop flag for stopping the sensor */
- uint8_t is_auto_stop_enabled;
-} VL53L5CX_Configuration;
-
-
-/**
- * @brief Structure VL53L5CX_ResultsData contains the ranging results of
- * VL53L5CX. If user wants more than 1 target per zone, the results can be split
- * into 2 sub-groups :
- * - Per zone results. These results are common to all targets (ambient_per_spad
- * , nb_target_detected and nb_spads_enabled).
- * - Per target results : These results are different relative to the detected
- * target (signal_per_spad, range_sigma_mm, distance_mm, reflectance,
- * target_status).
- */
-
-typedef struct
-{
- /* Internal sensor silicon temperature */
- int8_t silicon_temp_degc;
-
- /* Ambient noise in kcps/spads */
-#ifndef VL53L5CX_DISABLE_AMBIENT_PER_SPAD
- uint32_t ambient_per_spad[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of valid target detected for 1 zone */
-#ifndef VL53L5CX_DISABLE_NB_TARGET_DETECTED
- uint8_t nb_target_detected[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Number of spads enabled for this ranging */
-#ifndef VL53L5CX_DISABLE_NB_SPADS_ENABLED
- uint32_t nb_spads_enabled[VL53L5CX_RESOLUTION_8X8];
-#endif
-
- /* Signal returned to the sensor in kcps/spads */
-#ifndef VL53L5CX_DISABLE_SIGNAL_PER_SPAD
- uint32_t signal_per_spad[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Sigma of the current distance in mm */
-#ifndef VL53L5CX_DISABLE_RANGE_SIGMA_MM
- uint16_t range_sigma_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Measured distance in mm */
-#ifndef VL53L5CX_DISABLE_DISTANCE_MM
- int16_t distance_mm[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Estimated reflectance in percent */
-#ifndef VL53L5CX_DISABLE_REFLECTANCE_PERCENT
- uint8_t reflectance[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Status indicating the measurement validity (5 & 9 means ranging OK)*/
-#ifndef VL53L5CX_DISABLE_TARGET_STATUS
- uint8_t target_status[(VL53L5CX_RESOLUTION_8X8
- *VL53L5CX_NB_TARGET_PER_ZONE)];
-#endif
-
- /* Motion detector results */
-#ifndef VL53L5CX_DISABLE_MOTION_INDICATOR
- struct
- {
- uint32_t global_indicator_1;
- uint32_t global_indicator_2;
- uint8_t status;
- uint8_t nb_of_detected_aggregates;
- uint8_t nb_of_aggregates;
- uint8_t spare;
- uint32_t motion[32];
- } motion_indicator;
-#endif
-
-} VL53L5CX_ResultsData;
-
-
-union Block_header {
- uint32_t bytes;
- struct {
- uint32_t type : 4;
- uint32_t size : 12;
- uint32_t idx : 16;
- };
-};
-
-uint8_t vl53l5cx_is_alive(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_is_alive);
-
-/**
- * @brief Mandatory function used to initialize the sensor. This function must
- * be called after a power on, to load the firmware into the VL53L5CX. It takes
- * a few hundred milliseconds.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if initialization is OK.
- */
-
-uint8_t vl53l5cx_init(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to change the I2C address of the sensor. If
- * multiple VL53L5 sensors are connected to the same I2C line, all other LPn
- * pins needs to be set to Low. The default sensor address is 0x52.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint16_t) i2c_address : New I2C address.
- * @return (uint8_t) status : 0 if new address is OK
- */
-
-uint8_t vl53l5cx_set_i2c_address(
- VL53L5CX_Configuration *p_dev,
- uint16_t i2c_address);
-
-/**
- * @brief This function is used to get the current sensor power mode.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_power_mode : Current power mode. The value of this
- * pointer is equal to 0 if the sensor is in low power,
- * (VL53L5CX_POWER_MODE_SLEEP), or 1 if sensor is in standard mode
- * (VL53L5CX_POWER_MODE_WAKEUP).
- * @return (uint8_t) status : 0 if power mode is OK
- */
-
-uint8_t vl53l5cx_get_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_power_mode);
-
-/**
- * @brief This function is used to set the sensor in Low Power mode, for
- * example if the sensor is not used during a long time. The macro
- * VL53L5CX_POWER_MODE_SLEEP can be used to enable the low power mode. When user
- * want to restart the sensor, he can use macro VL53L5CX_POWER_MODE_WAKEUP.
- * Please ensure that the device is not streaming before calling the function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) power_mode : Selected power mode (VL53L5CX_POWER_MODE_SLEEP
- * or VL53L5CX_POWER_MODE_WAKEUP)
- * @return (uint8_t) status : 0 if power mode is OK, or 127 if power mode
- * requested by user is not valid.
- */
-
-uint8_t vl53l5cx_set_power_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t power_mode);
-
-/**
- * @brief This function starts a ranging session. When the sensor streams, host
- * cannot change settings 'on-the-fly'.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if start is OK.
- */
-
-uint8_t vl53l5cx_start_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function stops the ranging session. It must be used when the
- * sensor streams, after calling vl53l5cx_start_ranging().
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @return (uint8_t) status : 0 if stop is OK
- */
-
-uint8_t vl53l5cx_stop_ranging(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function checks if a new data is ready by polling I2C. If a new
- * data is ready, a flag will be raised.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_isReady : Value of this pointer be updated to 0 if data
- * is not ready, or 1 if a new data is ready.
- * @return (uint8_t) status : 0 if I2C reading is OK
- */
-
-uint8_t vl53l5cx_check_data_ready(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_isReady);
-
-/**
- * @brief This function gets the ranging data, using the selected output and the
- * resolution.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (VL53L5CX_ResultsData) *p_results : VL53L5 results structure.
- * @return (uint8_t) status : 0 data are successfully get.
- */
-
-uint8_t vl53l5cx_get_ranging_data(
- VL53L5CX_Configuration *p_dev,
- VL53L5CX_ResultsData *p_results);
-
-/**
- * @brief This function gets the current resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_resolution : Value of this pointer will be equal to 16
- * for 4x4 mode, and 64 for 8x8 mode.
- * @return (uint8_t) status : 0 if resolution is OK.
- */
-
-uint8_t vl53l5cx_get_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_resolution);
-
-/**
- * @brief This function sets a new resolution (4x4 or 8x8).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) resolution : Use macro VL53L5CX_RESOLUTION_4X4 or
- * VL53L5CX_RESOLUTION_8X8 to set the resolution.
- * @return (uint8_t) status : 0 if set resolution is OK.
- */
-
-uint8_t vl53l5cx_set_resolution(
- VL53L5CX_Configuration *p_dev,
- uint8_t resolution);
-
-/**
- * @brief This function gets the current ranging frequency in Hz. Ranging
- * frequency corresponds to the time between each measurement.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_frequency_hz: Contains the ranging frequency in Hz.
- * @return (uint8_t) status : 0 if ranging frequency is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_frequency_hz);
-
-/**
- * @brief This function sets a new ranging frequency in Hz. Ranging frequency
- * corresponds to the measurements frequency. This setting depends of
- * the resolution, so please select your resolution before using this function.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) frequency_hz : Contains the ranging frequency in Hz.
- * - For 4x4, min and max allowed values are : [1;60]
- * - For 8x8, min and max allowed values are : [1;15]
- * @return (uint8_t) status : 0 if ranging frequency is OK, or 127 if the value
- * is not correct.
- */
-
-uint8_t vl53l5cx_set_ranging_frequency_hz(
- VL53L5CX_Configuration *p_dev,
- uint8_t frequency_hz);
-
-/**
- * @brief This function gets the current integration time in ms.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_time_ms: Contains integration time in ms.
- * @return (uint8_t) status : 0 if integration time is OK.
- */
-
-uint8_t vl53l5cx_get_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_time_ms);
-
-/**
- * @brief This function sets a new integration time in ms. Integration time must
- * be computed to be lower than the ranging period, for a selected resolution.
- * Please note that this function has no impact on ranging mode continous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) time_ms : Contains the integration time in ms. For all
- * resolutions and frequency, the minimum value is 2ms, and the maximum is
- * 1000ms.
- * @return (uint8_t) status : 0 if set integration time is OK.
- */
-
-uint8_t vl53l5cx_set_integration_time_ms(
- VL53L5CX_Configuration *p_dev,
- uint32_t integration_time_ms);
-
-/**
- * @brief This function gets the current sharpener in percent. Sharpener can be
- * changed to blur more or less zones depending of the application.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_sharpener_percent: Contains the sharpener in percent.
- * @return (uint8_t) status : 0 if get sharpener is OK.
- */
-
-uint8_t vl53l5cx_get_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_sharpener_percent);
-
-/**
- * @brief This function sets a new sharpener value in percent. Sharpener can be
- * changed to blur more or less zones depending of the application. Min value is
- * 0 (disabled), and max is 99.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) sharpener_percent : Value between 0 (disabled) and 99%.
- * @return (uint8_t) status : 0 if set sharpener is OK.
- */
-
-uint8_t vl53l5cx_set_sharpener_percent(
- VL53L5CX_Configuration *p_dev,
- uint8_t sharpener_percent);
-
-/**
- * @brief This function gets the current target order (closest or strongest).
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_target_order: Contains the target order.
- * @return (uint8_t) status : 0 if get target order is OK.
- */
-
-uint8_t vl53l5cx_get_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_target_order);
-
-/**
- * @brief This function sets a new target order. Please use macros
- * VL53L5CX_TARGET_ORDER_STRONGEST and VL53L5CX_TARGET_ORDER_CLOSEST to define
- * the new output order. By default, the sensor is configured with the strongest
- * output.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) target_order : Required target order.
- * @return (uint8_t) status : 0 if set target order is OK, or 127 if target
- * order is unknown.
- */
-
-uint8_t vl53l5cx_set_target_order(
- VL53L5CX_Configuration *p_dev,
- uint8_t target_order);
-
-/**
- * @brief This function is used to get the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *p_ranging_mode : current ranging mode
- * @return (uint8_t) status : 0 if get ranging mode is OK.
- */
-
-uint8_t vl53l5cx_get_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t *p_ranging_mode);
-
-/**
- * @brief This function is used to set the ranging mode. Two modes are
- * available using ULD : Continuous and autonomous. The default
- * mode is Autonomous.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) ranging_mode : Use macros VL53L5CX_RANGING_MODE_CONTINUOUS,
- * VL53L5CX_RANGING_MODE_CONTINUOUS.
- * @return (uint8_t) status : 0 if set ranging mode is OK.
- */
-
-uint8_t vl53l5cx_set_ranging_mode(
- VL53L5CX_Configuration *p_dev,
- uint8_t ranging_mode);
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_enable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-
-/**
- * @brief This function is used to disable the VCSEL charge pump
- * This optimizes the power consumption of the device
- * To be used only if AVDD = 3.3V
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- */
-uint8_t vl53l5cx_disable_internal_cp(
- VL53L5CX_Configuration *p_dev);
-
-/**
- * @brief This function is used to get the number of frames between 2 temperature
- * compensation.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) *p_repeat_count : Number of frames before next temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_get_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t *p_repeat_count);
-
-/**
- * @brief This function is used to set a periodic temperature compensation. By
- * setting a repeat count different to 0 the firmware automatically runs a
- * temperature calibration every N frames.
- * default the repeat count is set to 0
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint32_t) repeat_count : Number of frames between temperature
- * compensation. Set to 0 to disable the feature (default configuration).
- */
-uint8_t vl53l5cx_set_VHV_repeat_count(
- VL53L5CX_Configuration *p_dev,
- uint32_t repeat_count);
-
-/**
- * @brief This function can be used to read 'extra data' from DCI. Using a known
- * index, the function fills the casted structure passed in argument.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ....
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_read_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to write 'extra data' to DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_write_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size);
-
-/**
- * @brief This function can be used to replace 'extra data' in DCI. The data can
- * be simple data, or casted structure.
- * @param (VL53L5CX_Configuration) *p_dev : VL53L5CX configuration structure.
- * @param (uint8_t) *data : This field can be a casted structure, or a simple
- * array. Please note that the FW only accept data of 32 bits. So field data can
- * only have a size of 32, 64, 96, 128, bits ..
- * @param (uint32_t) index : Index of required value.
- * @param (uint16_t)*data_size : This field must be the structure or array size
- * (using sizeof() function).
- * @param (uint8_t) *new_data : Contains the new fields.
- * @param (uint16_t) new_data_size : New data size.
- * @param (uint16_t) new_data_pos : New data position into the buffer.
- * @return (uint8_t) status : 0 if OK
- */
-
-uint8_t vl53l5cx_dci_replace_data(
- VL53L5CX_Configuration *p_dev,
- uint8_t *data,
- uint32_t index,
- uint16_t data_size,
- uint8_t *new_data,
- uint16_t new_data_size,
- uint16_t new_data_pos);
-
-#endif //VL53L5CX_API_H_
diff --git a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_buffers.h b/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_buffers.h
deleted file mode 100644
index 35eaff8b0efc6ee9eaebd24338d2a214c986fdea..0000000000000000000000000000000000000000
--- a/Pi_Pico_Cpp/vl53l5cx/vl53l5cx_buffers.h
+++ /dev/null
@@ -1,22012 +0,0 @@
-
-/**
- *
- * Copyright (c) 2021 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-
-#ifndef VL53L5CX_BUFFERS_H_
-#define VL53L5CX_BUFFERS_H_
-
-#include "platform.h"
-
-/**
- * @brief Inner internal number of targets.
- */
-
-#if VL53L5CX_NB_TARGET_PER_ZONE == 1
-#define VL53L5CX_FW_NBTAR_RANGING 2
-#else
-#define VL53L5CX_FW_NBTAR_RANGING VL53L5CX_NB_TARGET_PER_ZONE
-#endif
-
-/**
- * @brief This buffer contains the VL53L5CX firmware (MM1.8)
- */
-
-const uint8_t VL53L5CX_FIRMWARE[] = {
-
- 0xe0, 0x00, 0x03, 0x08,
- 0xe0, 0x00, 0x0a, 0xc8,
- 0xe0, 0x00, 0x05, 0x08,
- 0xe0, 0x64, 0x08, 0x48,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x00, 0x0a, 0x88,
- 0xe0, 0x64, 0x2e, 0x28,
- 0xe0, 0x64, 0x31, 0xe8,
- 0xe0, 0x64, 0x35, 0x48,
- 0xe0, 0x64, 0x3b, 0x88,
- 0xe0, 0x68, 0x04, 0x68,
- 0xe0, 0x68, 0x17, 0x68,
- 0xe0, 0x68, 0x1b, 0x48,
- 0xe0, 0x68, 0x1e, 0xc8,
- 0xe0, 0x68, 0x25, 0x28,
- 0xe0, 0x68, 0x28, 0x48,
- 0xe0, 0x00, 0x09, 0xe8,
- 0xe0, 0x00, 0x09, 0xc8,
- 0xe0, 0x00, 0x09, 0xa8,
- 0xe0, 0x00, 0x09, 0x88,
- 0xe0, 0x00, 0x09, 0x68,
- 0xe0, 0x00, 0x09, 0x48,
- 0xf8, 0x02, 0x00, 0x06,
- 0xc1, 0xc3, 0x81, 0x01,
- 0x1e, 0x06, 0xa1, 0x0b,
- 0x1a, 0x06, 0x81, 0x00,
- 0x99, 0x23, 0xe1, 0x00,
- 0x97, 0xb3, 0x97, 0xe3,
- 0x06, 0x2c, 0x97, 0x73,
- 0x06, 0x34, 0xe2, 0xc0,
- 0x06, 0x2c, 0xfc, 0x80,
- 0xc1, 0x83, 0xe3, 0x40,
- 0xe2, 0xc0, 0x06, 0x1c,
- 0xfc, 0x98, 0x06, 0x34,
- 0xfc, 0x9c, 0x06, 0x34,
- 0xe3, 0x40, 0x06, 0x1c,
- 0x69, 0x38, 0xc1, 0x83,
- 0xc1, 0x43, 0xe8, 0x00,
- 0xc1, 0xc3, 0x81, 0x05,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0xf4, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xff, 0x84, 0x07, 0xfc,
- 0x9a, 0x14, 0xd8, 0x04,
- 0xe4, 0x30, 0x04, 0x60,
- 0xfc, 0x12, 0x4c, 0x06,
- 0xe0, 0xd0, 0x4c, 0x4a,
- 0xc1, 0xc3, 0x82, 0x15,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf8, 0x04, 0x17, 0x0c,
- 0x81, 0x93, 0x81, 0x83,
- 0xe2, 0xc0, 0x0c, 0x2c,
- 0x1c, 0x8c, 0xd1, 0x67,
- 0xe3, 0x6b, 0xe4, 0x04,
- 0xe5, 0x6b, 0x8e, 0x05,
- 0x80, 0x64, 0x03, 0x88,
- 0x04, 0xd8, 0xe7, 0x6b,
- 0xe9, 0x6b, 0x80, 0x64,
- 0xeb, 0x6b, 0x8a, 0xc5,
- 0x80, 0x64, 0x06, 0x08,
- 0x0a, 0x58, 0xed, 0x6b,
- 0xf1, 0x6b, 0x80, 0x64,
- 0x80, 0x64, 0x07, 0x28,
- 0x08, 0x78, 0xf3, 0x6b,
- 0xf5, 0x6b, 0x80, 0x64,
- 0xf7, 0x6b, 0x8a, 0xc5,
- 0xf9, 0x6b, 0x8c, 0x05,
- 0xfb, 0x6b, 0x8c, 0x45,
- 0x0c, 0x0a, 0x8a, 0x45,
- 0x8a, 0x65, 0xe4, 0xb4,
- 0xe4, 0xb8, 0x0c, 0x0a,
- 0x0a, 0x78, 0x84, 0x45,
- 0x40, 0x06, 0xe0, 0x64,
- 0x40, 0x4a, 0xfc, 0x12,
- 0x80, 0xd5, 0xe0, 0xd0,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x1f, 0x0c, 0xc1, 0xc3,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf7, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xe0, 0x80, 0x00, 0x0c,
- 0xc1, 0xc3, 0xc1, 0x43,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x60, 0x00, 0x06, 0xda,
- 0x0a, 0x20, 0xa1, 0x0b,
- 0x18, 0x30, 0x64, 0x00,
- 0x0e, 0x24, 0xe4, 0x00,
- 0x02, 0x0a, 0x37, 0x80,
- 0x0c, 0x06, 0x80, 0x00,
- 0x08, 0x34, 0x20, 0x00,
- 0x0a, 0x70, 0xb7, 0x80,
- 0x58, 0x42, 0xa4, 0x04,
- 0x81, 0x61, 0x32, 0x98,
- 0x21, 0x2b, 0xaa, 0x45,
- 0x06, 0x0a, 0x8c, 0xbb,
- 0x0c, 0x10, 0x00, 0x00,
- 0x04, 0x00, 0xe4, 0x00,
- 0x18, 0x1a, 0x64, 0x00,
- 0xa8, 0x25, 0xe0, 0x00,
- 0x08, 0x04, 0xa1, 0x1d,
- 0x0e, 0x14, 0x57, 0x80,
- 0x10, 0x06, 0xd7, 0x80,
- 0x04, 0x40, 0x40, 0x00,
- 0x08, 0x54, 0xc4, 0x04,
- 0x4c, 0x72, 0x76, 0x80,
- 0x10, 0xc4, 0xd2, 0xa0,
- 0x14, 0x40, 0x76, 0x80,
- 0x0e, 0x64, 0xa4, 0x80,
- 0x12, 0x24, 0xf6, 0x80,
- 0xa1, 0x6b, 0x76, 0x80,
- 0x3c, 0x01, 0x54, 0x80,
- 0x8c, 0x8b, 0x40, 0x00,
- 0x04, 0x80, 0x08, 0x90,
- 0xdc, 0x00, 0x48, 0x70,
- 0x84, 0x9b, 0x28, 0xa3,
- 0xec, 0x04, 0x0e, 0xa0,
- 0x9e, 0xe5, 0xa0, 0x7d,
- 0x96, 0x4b, 0x21, 0x7b,
- 0x0e, 0x8a, 0x86, 0x45,
- 0x0e, 0x9a, 0xe5, 0x00,
- 0x00, 0x06, 0x44, 0x80,
- 0x16, 0xa0, 0x80, 0x00,
- 0x08, 0x54, 0x2c, 0x84,
- 0xc0, 0x00, 0x28, 0x9c,
- 0x20, 0x01, 0x0e, 0x4a,
- 0x00, 0x54, 0x40, 0x00,
- 0x00, 0xc4, 0xa8, 0xac,
- 0xc0, 0x00, 0x28, 0x9d,
- 0x0f, 0x9c, 0x14, 0x54,
- 0x40, 0x02, 0x88, 0x5b,
- 0x80, 0xcb, 0x99, 0xa8,
- 0x61, 0x84, 0x00, 0x84,
- 0xe1, 0x84, 0x08, 0x94,
- 0x12, 0x84, 0x01, 0xcb,
- 0x32, 0x4f, 0xe0, 0xfc,
- 0xe4, 0x04, 0x1c, 0x70,
- 0x4b, 0x0a, 0x01, 0xa1,
- 0x58, 0xda, 0x84, 0x10,
- 0x94, 0xbb, 0x64, 0x00,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x1c, 0x70, 0xc6, 0x1f,
- 0x00, 0xc4, 0x24, 0x08,
- 0x0e, 0x54, 0xa0, 0x84,
- 0x08, 0x54, 0x21, 0xfc,
- 0x40, 0x02, 0xa0, 0x84,
- 0xa1, 0xeb, 0x39, 0x9c,
- 0x3c, 0x00, 0x58, 0x00,
- 0xbc, 0x00, 0x4a, 0x40,
- 0x1d, 0x5a, 0x08, 0xc5,
- 0x0e, 0xe0, 0xe0, 0x04,
- 0x0d, 0xcb, 0xec, 0x04,
- 0xe1, 0xfc, 0x00, 0xa4,
- 0x4b, 0x0a, 0x42, 0xb7,
- 0x58, 0xfa, 0x84, 0x08,
- 0x08, 0xc4, 0x64, 0x18,
- 0x10, 0xa4, 0xe0, 0xfc,
- 0x40, 0x0a, 0x60, 0x84,
- 0x20, 0xbf, 0xed, 0x8c,
- 0x00, 0x54, 0x90, 0xab,
- 0x14, 0x84, 0x61, 0x84,
- 0x28, 0x0f, 0x9c, 0x80,
- 0x91, 0x94, 0x48, 0x22,
- 0x13, 0xb0, 0x4a, 0x62,
- 0x4c, 0x50, 0xc3, 0xc7,
- 0x80, 0x5b, 0x1c, 0x00,
- 0x27, 0xf0, 0x4e, 0xd8,
- 0x9c, 0x00, 0x44, 0x40,
- 0x96, 0x0b, 0x21, 0x1d,
- 0x57, 0x80, 0x04, 0xa4,
- 0xd7, 0x80, 0x02, 0xb4,
- 0x40, 0x00, 0x06, 0x06,
- 0xc4, 0x04, 0x04, 0x20,
- 0x52, 0x8c, 0x42, 0x12,
- 0x40, 0x10, 0x94, 0x6b,
- 0x4c, 0x20, 0x5c, 0x00,
- 0x80, 0x1b, 0xdc, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x8c, 0x1b, 0x7f, 0xc5,
- 0x80, 0x6b, 0x7f, 0xa5,
- 0x96, 0x7b, 0x73, 0xe5,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0xc1, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0xa0, 0x85, 0x98, 0x6b,
- 0x76, 0x80, 0x0a, 0x14,
- 0x08, 0x24, 0xa1, 0x2b,
- 0x06, 0x0a, 0x76, 0x80,
- 0x0c, 0x04, 0x80, 0x00,
- 0x98, 0x8b, 0x76, 0x80,
- 0x06, 0x1a, 0x1e, 0xc5,
- 0x18, 0x34, 0xe0, 0x00,
- 0xa1, 0x1b, 0x76, 0x80,
- 0xa4, 0x80, 0x0e, 0x40,
- 0x3c, 0x01, 0x4e, 0xc0,
- 0x08, 0x60, 0xc0, 0x00,
- 0x48, 0x50, 0x04, 0x80,
- 0xa8, 0x73, 0xdc, 0x00,
- 0xec, 0x04, 0x0a, 0x70,
- 0x9a, 0xc5, 0xa0, 0x5d,
- 0x90, 0xcb, 0x21, 0x5b,
- 0x0a, 0x8a, 0x86, 0x45,
- 0x0a, 0x9a, 0xe5, 0x00,
- 0x08, 0x06, 0x44, 0x80,
- 0x10, 0x70, 0x80, 0x00,
- 0x0a, 0x4a, 0x2c, 0x84,
- 0xc0, 0x00, 0x20, 0x00,
- 0x28, 0x95, 0x08, 0x34,
- 0x0c, 0x24, 0x40, 0x00,
- 0x08, 0x24, 0x8f, 0x94,
- 0x18, 0x24, 0x28, 0xa0,
- 0xc0, 0x00, 0x28, 0x94,
- 0x19, 0x98, 0x48, 0x42,
- 0x88, 0x3b, 0x98, 0x2b,
- 0x61, 0x84, 0x08, 0x14,
- 0xe0, 0xfc, 0x0c, 0x14,
- 0x61, 0x84, 0x18, 0x04,
- 0x2c, 0xcf, 0x89, 0x3b,
- 0xe4, 0x10, 0x46, 0xda,
- 0x04, 0x30, 0x45, 0x0a,
- 0xe4, 0x04, 0x12, 0x50,
- 0x6d, 0x84, 0x40, 0x1a,
- 0x12, 0x50, 0x81, 0xc1,
- 0x0c, 0x24, 0x24, 0x08,
- 0x08, 0x34, 0xa1, 0xfc,
- 0x0a, 0x24, 0x20, 0x84,
- 0x48, 0x42, 0xa0, 0x84,
- 0xa1, 0x9b, 0x39, 0x98,
- 0x3c, 0x00, 0x46, 0x40,
- 0xbc, 0x00, 0x44, 0x50,
- 0x13, 0x5a, 0x18, 0x6b,
- 0x88, 0xc5, 0xe0, 0x04,
- 0xec, 0x04, 0x0e, 0x90,
- 0x46, 0xfa, 0x03, 0x3b,
- 0x45, 0x0a, 0xe4, 0x04,
- 0x0a, 0x24, 0x04, 0x00,
- 0x10, 0x34, 0xe1, 0x84,
- 0xc2, 0x67, 0x60, 0xfc,
- 0x60, 0x84, 0x1c, 0xc4,
- 0xed, 0x8c, 0x40, 0x0a,
- 0x61, 0x84, 0x08, 0x34,
- 0x10, 0xc4, 0xb0, 0x5f,
- 0x9c, 0xcb, 0x61, 0xfc,
- 0x50, 0x02, 0x30, 0x6f,
- 0x44, 0x12, 0x91, 0x88,
- 0x88, 0x3b, 0x13, 0x8c,
- 0x1c, 0x00, 0x42, 0x20,
- 0x40, 0x80, 0x8a, 0x2b,
- 0x18, 0xe4, 0x1c, 0x00,
- 0x4f, 0xd8, 0x9c, 0x80,
- 0x18, 0x0b, 0xa7, 0xec,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x75, 0xf5, 0xff, 0x95,
- 0xc1, 0xc3, 0x90, 0x5b,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x80, 0x8b, 0x21, 0x0b,
- 0x00, 0x00, 0x02, 0x0a,
- 0x04, 0x6b, 0x82, 0x9b,
- 0x80, 0xe5, 0x86, 0x7b,
- 0x06, 0x0a, 0xa1, 0x2b,
- 0x40, 0x0a, 0x80, 0x00,
- 0x80, 0xe5, 0xe5, 0x9c,
- 0x84, 0x1b, 0x81, 0x21,
- 0x0c, 0x0c, 0x84, 0x0b,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0x68, 0x00, 0x41, 0x88,
- 0x00, 0xbb, 0x84, 0x1b,
- 0x02, 0xab, 0x90, 0x0b,
- 0x41, 0x18, 0x8e, 0x1b,
- 0x00, 0x7b, 0xe8, 0x00,
- 0x40, 0xd8, 0x92, 0x0b,
- 0x8c, 0x1b, 0x68, 0x00,
- 0x44, 0xb2, 0x81, 0x31,
- 0x42, 0xa2, 0xf0, 0x8c,
- 0x86, 0x23, 0xf2, 0x9c,
- 0x42, 0x12, 0x7d, 0x85,
- 0xc1, 0xc3, 0xf2, 0x80,
- 0xe6, 0x86, 0x4a, 0x0e,
- 0xe7, 0x06, 0x58, 0x0e,
- 0x66, 0x06, 0x46, 0x0e,
- 0xe1, 0xc0, 0x08, 0x54,
- 0x67, 0x86, 0x44, 0x0e,
- 0xe0, 0xc0, 0x00, 0xc4,
- 0x02, 0xc4, 0x60, 0x57,
- 0x8a, 0x03, 0xe1, 0xc0,
- 0xf2, 0x90, 0x42, 0x12,
- 0x5d, 0x93, 0x86, 0x03,
- 0xf2, 0x88, 0x42, 0x12,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc1, 0x7c, 0x02, 0x14,
- 0xdc, 0x00, 0x40, 0x10,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x08, 0x00, 0x14,
- 0xc1, 0x7c, 0x02, 0x14,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x08,
- 0xdd, 0x93, 0x99, 0x8c,
- 0xe5, 0x00, 0x04, 0xca,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x00, 0x06,
- 0x84, 0x80, 0x04, 0xca,
- 0xcc, 0x80, 0x04, 0x20,
- 0xc9, 0x88, 0x00, 0x14,
- 0xc0, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x04, 0x5a,
- 0xad, 0x88, 0x06, 0x14,
- 0x20, 0x01, 0x06, 0x06,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x89, 0x88,
- 0x40, 0x02, 0x89, 0x88,
- 0xdd, 0x93, 0x99, 0x8c,
- 0x81, 0x41, 0x61, 0x0b,
- 0x06, 0x14, 0x8a, 0x25,
- 0xe1, 0x1b, 0x76, 0x80,
- 0x76, 0x80, 0x04, 0x04,
- 0x08, 0x85, 0x81, 0x41,
- 0x06, 0x30, 0xa4, 0x33,
- 0x04, 0x04, 0x6c, 0x04,
- 0xa0, 0x3d, 0xe1, 0x84,
- 0xa1, 0x3b, 0x86, 0xe5,
- 0xc8, 0x8c, 0x02, 0x14,
- 0x64, 0x04, 0x18, 0x30,
- 0xe4, 0x08, 0x43, 0x1a,
- 0x24, 0x08, 0x18, 0x30,
- 0xa0, 0x84, 0x02, 0x14,
- 0x0a, 0xc0, 0x21, 0xcb,
- 0x19, 0x5a, 0xec, 0x04,
- 0x82, 0x45, 0xe0, 0x04,
- 0xc2, 0x47, 0x40, 0x1d,
- 0x1c, 0x80, 0x08, 0x44,
- 0x91, 0x84, 0x40, 0x02,
- 0x27, 0xfc, 0x4a, 0x98,
- 0x5d, 0x93, 0xc3, 0x17,
- 0x7f, 0xe5, 0x88, 0x0b,
- 0x7d, 0x55, 0x80, 0x4b,
- 0xc1, 0xc3, 0x88, 0x3b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x00, 0x6b,
- 0xe8, 0x04, 0x50, 0x48,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x00, 0x15, 0x80, 0x04,
- 0xa1, 0x1b, 0xe0, 0x3c,
- 0xdc, 0x38, 0x42, 0x08,
- 0x68, 0x04, 0x57, 0xc8,
- 0xc1, 0xc3, 0x8c, 0x0b,
- 0xfa, 0x04, 0x04, 0x7c,
- 0x74, 0xa9, 0x46, 0x4e,
- 0x49, 0x0e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x88, 0x25, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x84, 0x25, 0xf0, 0x0c,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0x60, 0x01, 0x00, 0x98,
- 0x04, 0x20, 0x80, 0x00,
- 0xc1, 0x16, 0xec, 0x04,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x04, 0x20, 0xfe, 0x65,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x85, 0xc1, 0x1e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x48,
- 0x45, 0xc8, 0xc1, 0x16,
- 0xfb, 0xf5, 0x87, 0xfc,
- 0xe1, 0x98, 0x41, 0x46,
- 0x61, 0x91, 0x43, 0x06,
- 0x80, 0x1e, 0xc0, 0x00,
- 0x81, 0x11, 0x9b, 0x01,
- 0x81, 0x31, 0x81, 0x21,
- 0xe8, 0x04, 0x4a, 0x88,
- 0x8c, 0x45, 0xa1, 0x0b,
- 0x74, 0xa9, 0x06, 0xce,
- 0x48, 0x4e, 0xc0, 0x10,
- 0xc0, 0x10, 0x74, 0xa9,
- 0x8a, 0x45, 0x89, 0x3d,
- 0xcd, 0x14, 0xcd, 0x04,
- 0x05, 0x0a, 0xcd, 0x24,
- 0x4a, 0x00, 0xe0, 0x80,
- 0x86, 0x25, 0xf0, 0x0c,
- 0xf0, 0x0c, 0x4c, 0x10,
- 0xe4, 0x18, 0x4a, 0x5a,
- 0xe4, 0x00, 0x0a, 0x3a,
- 0xa0, 0x00, 0x01, 0x28,
- 0x60, 0x01, 0x00, 0xa8,
- 0xc5, 0x50, 0x80, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x00, 0x4a, 0xc1, 0x56,
- 0xfe, 0x45, 0xf8, 0x0c,
- 0x04, 0x20, 0xc5, 0x54,
- 0xe9, 0x2d, 0xec, 0x10,
- 0xfe, 0x65, 0xc1, 0x5e,
- 0xe0, 0x04, 0x04, 0xca,
- 0x80, 0x00, 0x45, 0x88,
- 0xc1, 0x56, 0xc5, 0x50,
- 0x87, 0xfc, 0x45, 0x88,
- 0x47, 0x86, 0xfb, 0x65,
- 0x08, 0xf0, 0xe1, 0x90,
- 0x8c, 0x4e, 0xe4, 0x30,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x81, 0x61, 0xff, 0x65,
- 0x00, 0x46, 0xe1, 0x6b,
- 0x4c, 0x08, 0xe1, 0xa4,
- 0x8b, 0x04, 0xdc, 0x38,
- 0xfe, 0x24, 0x89, 0x14,
- 0xe8, 0x6c, 0x65, 0x68,
- 0xe1, 0xa4, 0x0c, 0x46,
- 0xe1, 0xa4, 0x0e, 0x46,
- 0x82, 0x45, 0x8f, 0x6d,
- 0x02, 0x3a, 0xd9, 0x14,
- 0x00, 0x68, 0xe4, 0x00,
- 0x80, 0x00, 0x60, 0x01,
- 0xfc, 0x38, 0x42, 0x08,
- 0x75, 0x78, 0xff, 0x65,
- 0x0c, 0x7c, 0xef, 0xfc,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x80, 0x55, 0xa1, 0x1b,
- 0x0a, 0x00, 0x83, 0x11,
- 0x40, 0x06, 0xe5, 0x50,
- 0x40, 0x4a, 0xfc, 0x12,
- 0xd7, 0xf4, 0xe0, 0xd0,
- 0xc1, 0xc3, 0x82, 0xb5,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0x3f,
- 0xf4, 0x04, 0x0b, 0x2f,
- 0xf4, 0x04, 0x0b, 0x1f,
- 0xf4, 0x04, 0x0b, 0x0f,
- 0x0a, 0x50, 0x81, 0x35,
- 0x40, 0x5a, 0xec, 0x40,
- 0x44, 0x06, 0xe0, 0xbc,
- 0x44, 0x6a, 0xbc, 0x22,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x98,
- 0x0a, 0xff, 0xc0, 0x00,
- 0xc1, 0xc3, 0xf4, 0x04,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf4, 0x04, 0x0b, 0xf5,
- 0xf4, 0x04, 0x0b, 0xe5,
- 0xf4, 0x04, 0x0b, 0xd5,
- 0xf4, 0x04, 0x0b, 0xc5,
- 0xf4, 0x04, 0x0b, 0xb5,
- 0xf4, 0x04, 0x0b, 0xa5,
- 0xf4, 0x04, 0x0b, 0x95,
- 0xf4, 0x04, 0x0b, 0x85,
- 0x0a, 0xff, 0x81, 0x55,
- 0x0a, 0x50, 0xf4, 0x04,
- 0xd7, 0xe4, 0xec, 0x80,
- 0xd7, 0xb4, 0xd7, 0xd4,
- 0xd7, 0x94, 0xd7, 0xa4,
- 0xd7, 0x74, 0xd7, 0x84,
- 0x82, 0x0b, 0x94, 0x64,
- 0xfa, 0x00, 0x5c, 0x08,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0xe4, 0x40, 0x04, 0x8a,
- 0x21, 0x2b, 0x80, 0xa5,
- 0x82, 0x15, 0x80, 0x3b,
- 0x46, 0x12, 0x81, 0xf5,
- 0x06, 0x4a, 0xf9, 0x80,
- 0x82, 0xb5, 0xf8, 0x0c,
- 0x04, 0x20, 0x80, 0x3b,
- 0x04, 0x4a, 0xec, 0x04,
- 0xc5, 0x48, 0xe4, 0x00,
- 0x45, 0x88, 0xcd, 0x46,
- 0x0c, 0x4c, 0x87, 0xfc,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x6c, 0x40, 0x0a, 0x20,
- 0x49, 0x27, 0xe1, 0xc1,
- 0x04, 0x20, 0x8a, 0xcf,
- 0x06, 0xc0, 0x6c, 0x04,
- 0x04, 0x4a, 0xe4, 0x40,
- 0x48, 0x12, 0x64, 0x00,
- 0x00, 0x33, 0xf0, 0x8c,
- 0x02, 0x75, 0x80, 0x6b,
- 0x02, 0x85, 0xf0, 0x10,
- 0x02, 0x95, 0xf8, 0x0c,
- 0x02, 0xa5, 0xf8, 0x08,
- 0x4c, 0x75, 0xf8, 0x04,
- 0x4c, 0x85, 0xf0, 0x10,
- 0x4c, 0x95, 0xf8, 0x0c,
- 0x4c, 0xa5, 0xf8, 0x08,
- 0x44, 0x08, 0xf8, 0x04,
- 0x44, 0x52, 0x87, 0xf8,
- 0xe9, 0x2d, 0xf1, 0xb0,
- 0x0a, 0x20, 0x86, 0x95,
- 0xc5, 0x27, 0x6c, 0x10,
- 0x61, 0x88, 0x0e, 0x54,
- 0xec, 0x04, 0x0c, 0x20,
- 0x64, 0x04, 0x18, 0x70,
- 0xe4, 0x00, 0x0c, 0x4a,
- 0x04, 0x74, 0x44, 0xc7,
- 0x42, 0x42, 0xe0, 0x88,
- 0x86, 0x7b, 0x70, 0xb0,
- 0xdd, 0x8e, 0xd1, 0x84,
- 0x87, 0xfc, 0x4d, 0x88,
- 0x71, 0x88, 0x44, 0x52,
- 0xa1, 0x2b, 0x98, 0x33,
- 0xf7, 0xe5, 0xec, 0xf5,
- 0x88, 0x1b, 0x21, 0x2b,
- 0xf7, 0xa5, 0xec, 0x75,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x78, 0x0c, 0x00, 0x0a,
- 0x82, 0x25, 0x80, 0x3b,
- 0x94, 0xa5, 0xa1, 0x2b,
- 0x04, 0x20, 0x4d, 0x16,
- 0x06, 0x4a, 0xec, 0x04,
- 0xfe, 0x25, 0xf8, 0x0c,
- 0x90, 0x95, 0xe9, 0x2d,
- 0x7a, 0x80, 0x08, 0x14,
- 0xe4, 0x40, 0x04, 0x8a,
- 0xe0, 0xa0, 0x0a, 0x44,
- 0x08, 0x54, 0xa8, 0x5f,
- 0x06, 0xf5, 0xe0, 0xc0,
- 0x0c, 0x24, 0xaa, 0x4f,
- 0x0a, 0x20, 0x61, 0x90,
- 0x61, 0xc1, 0xec, 0x40,
- 0xec, 0x04, 0x0c, 0x60,
- 0x0c, 0x4a, 0x0a, 0xcf,
- 0x4e, 0x32, 0xe4, 0x00,
- 0x86, 0x2b, 0x70, 0xb0,
- 0xe4, 0x40, 0x06, 0x70,
- 0xf0, 0x10, 0x44, 0x45,
- 0xf8, 0x0c, 0x44, 0x45,
- 0xf8, 0x08, 0x44, 0x45,
- 0xf8, 0x04, 0x44, 0x45,
- 0x87, 0xfc, 0x4c, 0x08,
- 0xf1, 0xb0, 0x44, 0x52,
- 0x86, 0x95, 0xe9, 0x2d,
- 0xf9, 0xc1, 0x07, 0x51,
- 0x4a, 0x52, 0xa4, 0x53,
- 0x04, 0x53, 0xfa, 0xb0,
- 0xec, 0x10, 0x04, 0x20,
- 0x0e, 0x24, 0x08, 0x51,
- 0x45, 0x57, 0xe1, 0x88,
- 0xe4, 0x04, 0x18, 0x70,
- 0x6c, 0x04, 0x0c, 0x50,
- 0xe0, 0x88, 0x0a, 0x74,
- 0x64, 0x00, 0x0c, 0x4a,
- 0xdd, 0x4e, 0x86, 0x7b,
- 0x87, 0xfc, 0x4d, 0xc8,
- 0xaa, 0x23, 0x44, 0xc7,
- 0xa1, 0x2b, 0x98, 0x33,
- 0x04, 0x20, 0x82, 0x05,
- 0x04, 0x4a, 0xec, 0x04,
- 0xcd, 0x16, 0xe4, 0x00,
- 0x87, 0xfc, 0x45, 0xc8,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x04, 0x4a, 0x00, 0x7b,
- 0x40, 0x72, 0xe0, 0x10,
- 0x1e, 0xf0, 0x79, 0x88,
- 0x00, 0x0c, 0xed, 0x20,
- 0x00, 0x1a, 0x62, 0x00,
- 0x11, 0x0e, 0xf8, 0x0c,
- 0x1b, 0x0e, 0x82, 0x8b,
- 0x20, 0x01, 0x00, 0x26,
- 0x5e, 0x05, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x35,
- 0x23, 0x3e, 0xef, 0x8d,
- 0x5e, 0x17, 0xa4, 0x0b,
- 0x9d, 0x2e, 0xe0, 0xfc,
- 0x23, 0x88, 0xa1, 0x0e,
- 0x00, 0x24, 0xc0, 0x00,
- 0xc4, 0x1b, 0x61, 0x88,
- 0xc0, 0x3b, 0x7d, 0x41,
- 0x7a, 0x10, 0x42, 0x12,
- 0xfa, 0x10, 0x46, 0x32,
- 0x84, 0x13, 0x00, 0x33,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x82, 0x31, 0x7c, 0x3e,
- 0x00, 0x20, 0x19, 0x1e,
- 0x97, 0x3e, 0xec, 0x04,
- 0x00, 0x84, 0xfe, 0x0e,
- 0xaf, 0x8b, 0x61, 0x84,
- 0x54, 0x0a, 0x15, 0x8e,
- 0x2e, 0xa5, 0xe6, 0x8a,
- 0x00, 0x80, 0x8e, 0xa3,
- 0x10, 0x8a, 0x6c, 0x04,
- 0x40, 0x0a, 0xe4, 0xa4,
- 0x56, 0x72, 0xe6, 0x8a,
- 0x40, 0x70, 0x70, 0x80,
- 0xa2, 0xb5, 0xdc, 0x00,
- 0x00, 0x84, 0x0f, 0xbe,
- 0x23, 0xb4, 0xe1, 0x8c,
- 0xe6, 0x8a, 0x4c, 0x0a,
- 0x60, 0x84, 0x00, 0x64,
- 0xf0, 0x98, 0x50, 0x72,
- 0x8e, 0x03, 0x0d, 0x0e,
- 0x8e, 0x0b, 0x0b, 0x0e,
- 0x56, 0x08, 0x90, 0x1b,
- 0x13, 0x8e, 0xfc, 0x38,
- 0x0b, 0x84, 0x80, 0x9b,
- 0x90, 0x1b, 0x90, 0x0b,
- 0xfc, 0x38, 0x56, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x0e, 0x0b, 0x84, 0xd5,
- 0xa3, 0x24, 0x90, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0x8e, 0x0b, 0x21, 0x0d,
- 0x81, 0xc5, 0x82, 0x85,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x90, 0x1b, 0x0e, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0x21, 0x0d, 0xfc, 0x38,
- 0x80, 0x45, 0x8e, 0x0b,
- 0x93, 0x0e, 0x90, 0x0b,
- 0x50, 0xa2, 0x2c, 0x0b,
- 0x23, 0x64, 0xf1, 0x98,
- 0xf0, 0x98, 0x56, 0xa2,
- 0x90, 0x0b, 0x0b, 0x0e,
- 0x4c, 0x08, 0x94, 0x1b,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x09, 0xbe, 0x94, 0x0b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xa5, 0x82, 0x9d,
- 0x84, 0xd5, 0xa0, 0x0d,
- 0x90, 0x0b, 0x09, 0x64,
- 0x8c, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x01, 0xd5, 0xa1, 0x0d,
- 0x9c, 0x00, 0x50, 0x60,
- 0x82, 0x55, 0xa1, 0x0d,
- 0x90, 0x0b, 0x09, 0xa4,
- 0x94, 0x1b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x55, 0xa1, 0x0d,
- 0x8f, 0xb4, 0x90, 0xab,
- 0x8d, 0x14, 0x8b, 0x94,
- 0x96, 0x93, 0xa3, 0x64,
- 0x71, 0x84, 0x40, 0xb2,
- 0x8d, 0x0e, 0x92, 0x1b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x92, 0x0b, 0x00, 0x8b,
- 0x4c, 0x08, 0x96, 0x1b,
- 0xff, 0x11, 0xfc, 0x38,
- 0x82, 0xc5, 0x82, 0x8d,
- 0xa0, 0x0d, 0x15, 0x84,
- 0x0d, 0x64, 0x86, 0x15,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x8c, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x4c, 0xb0, 0x01, 0xe5,
- 0x15, 0x84, 0x9c, 0x00,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x0d, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x80, 0x95, 0xa1, 0x0d,
- 0x8c, 0xbb, 0x01, 0x35,
- 0x93, 0x04, 0x92, 0xbb,
- 0x94, 0x1b, 0x23, 0x64,
- 0x4c, 0x08, 0x93, 0x0e,
- 0x00, 0x9b, 0xfc, 0x38,
- 0x96, 0x1b, 0x94, 0x0b,
- 0xfc, 0x38, 0x4c, 0x08,
- 0x82, 0x9d, 0xff, 0x11,
- 0xa0, 0x0d, 0x82, 0x85,
- 0x13, 0xa4, 0x84, 0xd5,
- 0xa3, 0x24, 0x96, 0x1b,
- 0x44, 0x08, 0x94, 0x0b,
- 0xa1, 0x0d, 0xfc, 0x38,
- 0x81, 0xd5, 0x82, 0xa5,
- 0x82, 0x75, 0xa1, 0x0d,
- 0x96, 0x1b, 0x13, 0x64,
- 0x8c, 0x0b, 0xa3, 0x24,
- 0xfc, 0x38, 0x44, 0x08,
- 0x56, 0x60, 0xa1, 0x0d,
- 0x96, 0xab, 0x9c, 0x00,
- 0x00, 0x2a, 0x9b, 0x04,
- 0x01, 0x18, 0xe0, 0x00,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x14, 0x84, 0x35,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x24, 0xe4, 0x00,
- 0xc1, 0x3e, 0xa8, 0x34,
- 0x43, 0x08, 0xe9, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa8, 0x14, 0x9c, 0x04,
- 0xa8, 0x0e, 0x9c, 0x1e,
- 0x19, 0x14, 0x81, 0xb5,
- 0x02, 0x4a, 0x8e, 0x0b,
- 0x80, 0x28, 0xe4, 0x00,
- 0xc1, 0x36, 0xa8, 0x38,
- 0x43, 0x08, 0xe9, 0x26,
- 0x1d, 0x14, 0x87, 0xfc,
- 0xec, 0x04, 0x00, 0x80,
- 0x50, 0x0a, 0x81, 0x61,
- 0x40, 0x72, 0x66, 0x86,
- 0x1b, 0x0e, 0xf0, 0x84,
- 0x0e, 0x83, 0x80, 0xab,
- 0x90, 0xbb, 0x80, 0x9b,
- 0x8c, 0xd5, 0xd6, 0xad,
- 0x8e, 0x1b, 0x14, 0x0b,
- 0x44, 0x08, 0xa3, 0x24,
- 0xa0, 0x0d, 0xfc, 0x38,
- 0xa1, 0x0b, 0x8a, 0xf5,
- 0x9d, 0x04, 0x92, 0x05,
- 0xa1, 0x0b, 0x8d, 0xb5,
- 0xc0, 0x40, 0x1e, 0x05,
- 0x01, 0x28, 0x88, 0xd5,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x17, 0x24, 0x84, 0x55,
- 0x96, 0x1b, 0x90, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x80, 0x44, 0x84, 0x34,
- 0xc1, 0x3e, 0xc5, 0x4e,
- 0x87, 0xfc, 0x45, 0x08,
- 0xac, 0x04, 0x83, 0x15,
- 0xac, 0x1e, 0xa0, 0x14,
- 0x81, 0xc5, 0xa0, 0x0e,
- 0x96, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x90, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x21, 0x04, 0x87, 0xfc,
- 0x80, 0x83, 0x83, 0x61,
- 0xd6, 0xad, 0x80, 0xb3,
- 0x16, 0x0b, 0x94, 0xf5,
- 0xa3, 0x24, 0x8e, 0x1b,
- 0xfc, 0x38, 0x44, 0x08,
- 0xf2, 0xc5, 0xa1, 0x0d,
- 0x40, 0x01, 0x03, 0x98,
- 0x1e, 0x07, 0x80, 0x00,
- 0x8e, 0x35, 0xe0, 0xfc,
- 0x96, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x94, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x87, 0x85, 0x87, 0xfc,
- 0x40, 0x01, 0x01, 0x28,
- 0x1e, 0x07, 0x80, 0x00,
- 0x84, 0x55, 0xe0, 0xfc,
- 0x94, 0x0b, 0x17, 0x24,
- 0x04, 0x4a, 0x92, 0x1b,
- 0x84, 0x34, 0xe4, 0x00,
- 0xc5, 0x4e, 0x80, 0x44,
- 0x45, 0x08, 0xc1, 0x3e,
- 0x83, 0x15, 0x87, 0xfc,
- 0xa8, 0x14, 0xa4, 0x04,
- 0xa8, 0x0e, 0xa4, 0x1e,
- 0x19, 0x24, 0x81, 0xc5,
- 0x94, 0x1b, 0x92, 0x0b,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x48, 0x80, 0x38,
- 0xc5, 0x36, 0xc1, 0x46,
- 0x87, 0xfc, 0x45, 0x08,
- 0x83, 0x61, 0x1d, 0x04,
- 0x71, 0x95, 0x80, 0x93,
- 0xa8, 0x04, 0x80, 0xa3,
- 0xa8, 0x1e, 0xac, 0x14,
- 0x81, 0xc5, 0xac, 0x0e,
- 0x94, 0x0b, 0x19, 0x24,
- 0x04, 0x4a, 0x96, 0x1b,
- 0x80, 0x38, 0xe4, 0x00,
- 0xc1, 0x46, 0x84, 0x48,
- 0x45, 0x08, 0xc5, 0x36,
- 0x1d, 0x04, 0x87, 0xfc,
- 0x21, 0x04, 0x83, 0x61,
- 0x6f, 0x35, 0x80, 0xa3,
- 0x1d, 0x14, 0x80, 0xb3,
- 0x95, 0x04, 0xa1, 0x6b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0x00, 0x0e, 0x88,
- 0xf0, 0x80, 0x58, 0x72,
- 0x71, 0x9c, 0x42, 0x92,
- 0xf1, 0xa4, 0x40, 0xa2,
- 0x92, 0x2b, 0x01, 0x1d,
- 0x44, 0xa0, 0x0e, 0x3b,
- 0x46, 0x90, 0x9c, 0x00,
- 0x48, 0x22, 0x9c, 0x00,
- 0xa1, 0x4b, 0xf1, 0x8c,
- 0x1e, 0x07, 0x8a, 0x25,
- 0x42, 0xa2, 0x60, 0xfc,
- 0x84, 0x55, 0xf1, 0x90,
- 0xfd, 0x31, 0x45, 0x47,
- 0x44, 0x22, 0xc8, 0x2b,
- 0x8e, 0x3b, 0x7a, 0x0c,
- 0x82, 0x21, 0x88, 0x23,
- 0xe4, 0x00, 0x04, 0x4a,
- 0x84, 0x54, 0x8c, 0x44,
- 0xc5, 0x4e, 0xcd, 0x5e,
- 0x87, 0xfc, 0x45, 0x08,
- 0x08, 0x30, 0x83, 0x35,
- 0xfd, 0x51, 0x6c, 0x04,
- 0x82, 0x21, 0x24, 0x43,
- 0xfa, 0x14, 0x48, 0x42,
- 0x26, 0x23, 0x88, 0x23,
- 0x04, 0x4a, 0x8e, 0x3b,
- 0x8c, 0x48, 0xe4, 0x00,
- 0xcd, 0x56, 0x84, 0x58,
- 0x45, 0x08, 0xc5, 0x46,
- 0x1d, 0x24, 0x87, 0xfc,
- 0xf1, 0xa0, 0x42, 0xc2,
- 0xf1, 0xac, 0x52, 0x82,
- 0x44, 0x92, 0xa4, 0x13,
- 0xa1, 0x2b, 0xfb, 0x84,
- 0x1e, 0x07, 0x8c, 0x45,
- 0x84, 0xb5, 0xe0, 0xfc,
- 0x61, 0x88, 0x02, 0x24,
- 0x42, 0x3b, 0xfd, 0x41,
- 0xf1, 0x88, 0x44, 0xc2,
- 0xfa, 0x10, 0x46, 0x32,
- 0x02, 0x30, 0x82, 0x33,
- 0x02, 0x4a, 0xe4, 0x04,
- 0xa8, 0x34, 0xe4, 0x00,
- 0xe9, 0x4e, 0x88, 0x44,
- 0x43, 0x08, 0xc9, 0x3e,
- 0x83, 0xb5, 0x87, 0xfc,
- 0x06, 0xb0, 0x7e, 0x14,
- 0x30, 0x33, 0xec, 0x04,
- 0x90, 0x13, 0x82, 0x21,
- 0x42, 0x12, 0xb8, 0x13,
- 0xfd, 0x31, 0x7a, 0x8c,
- 0xfa, 0x0c, 0x46, 0x12,
- 0xf1, 0x84, 0x42, 0x32,
- 0xe4, 0x00, 0x02, 0x4a,
- 0x46, 0xc2, 0x28, 0x58,
- 0x0e, 0x48, 0xf1, 0x88,
- 0xec, 0x04, 0x04, 0x20,
- 0x8e, 0x56, 0xe9, 0x46,
- 0x87, 0xfc, 0x42, 0x08,
- 0x98, 0x6b, 0x1d, 0x14,
- 0x82, 0x45, 0xc2, 0x0d,
- 0xef, 0xf8, 0x7e, 0x08,
- 0x8e, 0x0b, 0x00, 0x1b,
- 0xa3, 0x34, 0x9d, 0x24,
- 0xef, 0xfc, 0x5c, 0x68,
- 0xc2, 0x9d, 0x9d, 0x14,
- 0x7d, 0x58, 0xa8, 0x05,
- 0x92, 0x0b, 0x6f, 0xf8,
- 0xf1, 0xa4, 0x4e, 0x62,
- 0x80, 0x8b, 0x1d, 0x24,
- 0xf9, 0x88, 0x40, 0x72,
- 0x00, 0x0a, 0x11, 0x04,
- 0x5e, 0x07, 0xf8, 0x0c,
- 0x1b, 0x0e, 0xe0, 0xfc,
- 0xc0, 0x00, 0x00, 0x26,
- 0x40, 0x34, 0x5e, 0x05,
- 0x1e, 0x08, 0xef, 0x8d,
- 0x40, 0x8a, 0x9f, 0xfc,
- 0x84, 0x0d, 0xe6, 0x8a,
- 0x0e, 0x03, 0xa0, 0xc5,
- 0xf0, 0x88, 0x50, 0x72,
- 0x00, 0x24, 0x19, 0x0e,
- 0x44, 0x1b, 0xe1, 0x88,
- 0x40, 0x3b, 0xfd, 0x21,
- 0xfa, 0x08, 0x42, 0x12,
- 0x44, 0x32, 0x1d, 0x34,
- 0x80, 0x23, 0xfa, 0x08,
- 0xe4, 0x04, 0x16, 0x20,
- 0x0c, 0x10, 0x86, 0x13,
- 0xce, 0x8d, 0xe4, 0x04,
- 0x90, 0x9b, 0x8a, 0xc5,
- 0x92, 0xab, 0x21, 0x94,
- 0x94, 0x1b, 0x23, 0x24,
- 0x92, 0x0b, 0x94, 0x93,
- 0xfc, 0x38, 0x44, 0x08,
- 0x88, 0x75, 0xa3, 0x0d,
- 0xa1, 0x0b, 0x9b, 0x04,
- 0x1e, 0x07, 0x82, 0xe5,
- 0x84, 0x35, 0xe0, 0xfc,
- 0x64, 0x00, 0x16, 0x4a,
- 0x96, 0x1b, 0x92, 0x0b,
- 0x80, 0x34, 0xa8, 0x24,
- 0xc1, 0x2e, 0xe9, 0x3e,
- 0x87, 0xfc, 0x43, 0x08,
- 0xa8, 0x04, 0x83, 0x05,
- 0xa8, 0x1e, 0xa4, 0x14,
- 0x81, 0xb5, 0xa4, 0x0e,
- 0x64, 0x00, 0x0c, 0x4a,
- 0x8c, 0x1b, 0x92, 0x0b,
- 0x80, 0x38, 0xa8, 0x28,
- 0xc1, 0x26, 0xe9, 0x36,
- 0x87, 0xfc, 0x43, 0x08,
- 0xf4, 0xb5, 0xce, 0x9d,
- 0x19, 0x04, 0x9d, 0x04,
- 0xc1, 0x8d, 0x80, 0x83,
- 0x87, 0xd5, 0xf2, 0xb5,
- 0x82, 0x0d, 0x1b, 0xb4,
- 0x8e, 0x25, 0x99, 0xce,
- 0xfc, 0x84, 0xbe, 0x64,
- 0x82, 0x81, 0x82, 0x61,
- 0x8a, 0xc5, 0xce, 0xbd,
- 0x21, 0x94, 0x96, 0x9b,
- 0x23, 0x24, 0x92, 0xab,
- 0x94, 0x93, 0x94, 0x1b,
- 0x44, 0x08, 0x92, 0x0b,
- 0xa3, 0x0d, 0xfc, 0x38,
- 0x01, 0x18, 0x88, 0x75,
- 0x80, 0x00, 0x40, 0x01,
- 0xe0, 0xfc, 0x1e, 0x07,
- 0x10, 0x4a, 0x84, 0x35,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x24, 0x90, 0x1b,
- 0xe9, 0x3e, 0x80, 0x34,
- 0x43, 0x08, 0xc1, 0x2e,
- 0x83, 0x05, 0x87, 0xfc,
- 0xa4, 0x14, 0xa8, 0x04,
- 0xa4, 0x0e, 0xa8, 0x1e,
- 0x0c, 0x4a, 0x81, 0xb5,
- 0x92, 0x0b, 0x64, 0x00,
- 0xa8, 0x28, 0x8c, 0x1b,
- 0xe9, 0x36, 0x80, 0x38,
- 0x43, 0x08, 0xc1, 0x26,
- 0xce, 0x9d, 0x87, 0xfc,
- 0x9d, 0x04, 0xf4, 0xb5,
- 0x80, 0xb3, 0x19, 0x04,
- 0xf2, 0xb5, 0xc1, 0xbd,
- 0xe5, 0x20, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0xfc, 0x80, 0x5b,
- 0x40, 0x06, 0xe2, 0xc0,
- 0xd5, 0x6e, 0xfc, 0x12,
- 0xd5, 0x8e, 0xd5, 0x7e,
- 0x40, 0x5a, 0xd5, 0x9e,
- 0x42, 0x06, 0xe0, 0xbc,
- 0xd5, 0xae, 0xbc, 0x22,
- 0xd5, 0xde, 0xd5, 0xbe,
- 0x42, 0x6a, 0xd5, 0xee,
- 0x40, 0x4a, 0xa0, 0x90,
- 0xc0, 0x00, 0x20, 0x89,
- 0xed, 0x88, 0x40, 0x1a,
- 0x20, 0x01, 0x01, 0x78,
- 0xc1, 0xc3, 0xc0, 0x00,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0xf0, 0x04, 0x4b, 0x85,
- 0xf0, 0x04, 0x4b, 0x95,
- 0xf0, 0x04, 0x4b, 0xa5,
- 0xf0, 0x04, 0x4b, 0xb5,
- 0xf0, 0x04, 0x4b, 0xc5,
- 0xf0, 0x04, 0x4b, 0xd5,
- 0xf0, 0x04, 0x4b, 0xe5,
- 0xf0, 0x04, 0x4b, 0xf5,
- 0xc2, 0x1f, 0x81, 0xa5,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0xe0, 0xd0, 0x40, 0x4a,
- 0x82, 0xb5, 0xd5, 0x2e,
- 0xc1, 0xc3, 0xc1, 0xc3,
- 0x4b, 0x0f, 0xc1, 0xc3,
- 0x4b, 0x1f, 0xf0, 0x04,
- 0x4b, 0x2f, 0xf0, 0x04,
- 0x4b, 0x3f, 0xf0, 0x04,
- 0x81, 0x65, 0xf0, 0x04,
- 0xd5, 0x1e, 0xc2, 0x1f,
- 0xd5, 0x1e, 0xd5, 0x1e,
- 0x94, 0xfe, 0xd5, 0x1e,
- 0xdd, 0x93, 0x81, 0x01,
- 0xe0, 0x04, 0x19, 0x86,
- 0xa3, 0xcd, 0xc1, 0xc3,
- 0x18, 0x4a, 0x82, 0xa5,
- 0x43, 0x46, 0xe0, 0x00,
- 0x02, 0x15, 0xe1, 0x98,
- 0x42, 0x05, 0x80, 0x00,
- 0x41, 0xfe, 0x80, 0x00,
- 0xbf, 0xff, 0x1f, 0xfd,
- 0x43, 0x46, 0xdd, 0x93,
- 0x84, 0x14, 0xe1, 0x98,
- 0x41, 0xfe, 0x84, 0xce,
- 0xff, 0xff, 0x7f, 0xfd,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0x7c, 0x0e, 0x82, 0x6b,
- 0xe1, 0xa0, 0x40, 0x86,
- 0x02, 0x05, 0x80, 0x14,
- 0xa1, 0x0b, 0xe1, 0x48,
- 0x02, 0x10, 0x9a, 0xe5,
- 0xc0, 0x01, 0x65, 0x21,
- 0xbe, 0x14, 0xbe, 0x1e,
- 0x80, 0x8b, 0xfe, 0x1e,
- 0xa3, 0x0d, 0xa2, 0x04,
- 0x40, 0x1b, 0x92, 0x55,
- 0x14, 0x00, 0xfd, 0x21,
- 0x4e, 0x12, 0x64, 0x04,
- 0x44, 0x07, 0xfa, 0x08,
- 0x10, 0x03, 0x94, 0x73,
- 0xe4, 0x00, 0x0e, 0x6a,
- 0xe6, 0x10, 0x16, 0x00,
- 0xa1, 0x6b, 0x14, 0x0b,
- 0x14, 0x00, 0x00, 0xe5,
- 0x16, 0x15, 0xec, 0x04,
- 0x8d, 0x1b, 0xe0, 0x80,
- 0x22, 0x14, 0x8a, 0xf5,
- 0xec, 0x08, 0x00, 0x00,
- 0xf8, 0x80, 0x16, 0x25,
- 0x50, 0x05, 0x83, 0xab,
- 0x02, 0x06, 0x00, 0x04,
- 0x56, 0x15, 0xc0, 0x00,
- 0xa1, 0x2b, 0x58, 0x80,
- 0x10, 0x15, 0x88, 0x25,
- 0x83, 0x31, 0x61, 0x88,
- 0x00, 0x34, 0x22, 0x94,
- 0x80, 0x1f, 0xe8, 0x80,
- 0x82, 0x65, 0xa1, 0x1b,
- 0xe1, 0x8c, 0x10, 0x15,
- 0x2c, 0x14, 0x80, 0x1f,
- 0x82, 0x05, 0xa1, 0x1b,
- 0x44, 0x08, 0x82, 0x0b,
- 0x81, 0x75, 0xfc, 0x38,
- 0xfc, 0x38, 0x44, 0x08,
- 0xfc, 0x04, 0x81, 0x45,
- 0xfc, 0x38, 0x44, 0x08,
- 0x81, 0x9b, 0xa2, 0x04,
- 0xfe, 0x04, 0x88, 0x35,
- 0x91, 0x0b, 0x80, 0x04,
- 0x4e, 0x68, 0x86, 0xb5,
- 0x3f, 0xff, 0x47, 0xe5,
- 0xec, 0x10, 0x16, 0xb0,
- 0xa1, 0x0b, 0x81, 0x01,
- 0xa2, 0x04, 0x86, 0x25,
- 0xa1, 0x0b, 0x20, 0x04,
- 0xa1, 0x0b, 0x82, 0xb5,
- 0xfe, 0x74, 0x84, 0x65,
- 0x90, 0x0b, 0x1c, 0x0e,
- 0x68, 0x01, 0x40, 0x08,
- 0x9c, 0x84, 0xc0, 0x00,
- 0xe8, 0x75, 0xa1, 0x8b,
- 0x7e, 0x8e, 0x81, 0x95,
- 0xe6, 0xd5, 0xa1, 0x0b,
- 0xbe, 0x04, 0x81, 0x55,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xa0, 0xf1, 0xe4, 0xf5,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x00, 0x00, 0x0c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x83, 0x01, 0x00, 0x1b,
- 0xef, 0xfc, 0x76, 0x08,
- 0x81, 0x05, 0xc1, 0x43,
- 0xfa, 0x80, 0x02, 0x14,
- 0x00, 0x06, 0xe1, 0x1b,
- 0x00, 0x06, 0x94, 0x22,
- 0xdd, 0x93, 0xd4, 0x62,
- 0xf8, 0x00, 0x04, 0x0c,
- 0x6c, 0x50, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x03, 0x4a,
- 0x82, 0x6b, 0x3c, 0x5e,
- 0xfc, 0x1e, 0xbe, 0x5e,
- 0x42, 0x66, 0x8e, 0x05,
- 0x0c, 0x4a, 0xf0, 0x02,
- 0x06, 0x34, 0x64, 0x7c,
- 0x5e, 0x15, 0xfa, 0x80,
- 0x4a, 0x0e, 0x00, 0x04,
- 0x5e, 0x25, 0x9f, 0xfc,
- 0x06, 0x1a, 0x00, 0x08,
- 0x1e, 0x25, 0xe4, 0x00,
- 0x44, 0x22, 0x80, 0x04,
- 0x5e, 0x25, 0x98, 0x14,
- 0x1e, 0x25, 0x80, 0x00,
- 0x1e, 0x55, 0x80, 0x00,
- 0x4a, 0x50, 0x80, 0x08,
- 0x44, 0x22, 0x90, 0x7c,
- 0x5e, 0x25, 0x99, 0x94,
- 0x1e, 0x25, 0x80, 0x04,
- 0x42, 0x20, 0x80, 0x04,
- 0x18, 0x14, 0x9c, 0x00,
- 0x40, 0x00, 0x3c, 0xb5,
- 0xbc, 0x34, 0x18, 0x14,
- 0x02, 0x44, 0x00, 0xd5,
- 0xe1, 0x1b, 0xfa, 0x80,
- 0xdc, 0x3c, 0x18, 0xc4,
- 0xe2, 0x32, 0x00, 0x66,
- 0x42, 0x0e, 0x28, 0xf1,
- 0xc0, 0x10, 0x60, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x87, 0x75, 0xf0, 0x00,
- 0x01, 0x7e, 0x28, 0xf1,
- 0x0c, 0x0c, 0xff, 0xf8,
- 0xdd, 0x93, 0xf0, 0x00,
- 0x6c, 0x40, 0x1e, 0xf0,
- 0xe4, 0x7c, 0x01, 0x4a,
- 0xbe, 0x2e, 0xbc, 0x2e,
- 0x86, 0x85, 0xfc, 0x2e,
- 0xe4, 0x7c, 0x00, 0x0a,
- 0x44, 0x06, 0x84, 0x45,
- 0x3e, 0x2e, 0xf0, 0x02,
- 0xfc, 0x1e, 0xc1, 0x21,
- 0x84, 0x1f, 0xbe, 0x14,
- 0xbc, 0x14, 0xbc, 0x1e,
- 0xbe, 0x29, 0xfc, 0x24,
- 0xbe, 0x1e, 0xa4, 0x1f,
- 0x00, 0x06, 0xbe, 0x14,
- 0x81, 0x55, 0xe2, 0x06,
- 0xf8, 0x7e, 0x40, 0x06,
- 0xf0, 0xfe, 0x00, 0x06,
- 0x5d, 0x93, 0x81, 0x01,
- 0x7f, 0xe5, 0xa0, 0xf1,
- 0xff, 0xf8, 0x01, 0xae,
- 0xe2, 0xc0, 0x04, 0x1c,
- 0x04, 0x1f, 0xc1, 0x11,
- 0xf0, 0x7c, 0x44, 0x00,
- 0x02, 0x1c, 0xa4, 0x1f,
- 0xdd, 0x93, 0xe3, 0x40,
- 0xe4, 0x7c, 0x04, 0x0a,
- 0x40, 0x88, 0x04, 0x24,
- 0x00, 0x00, 0x06, 0x0e,
- 0x08, 0x30, 0x80, 0x10,
- 0x48, 0x12, 0x04, 0x10,
- 0x58, 0x02, 0xd0, 0x88,
- 0x02, 0x06, 0x71, 0x90,
- 0xff, 0xfc, 0x60, 0x00,
- 0x00, 0xc4, 0x83, 0xc7,
- 0x02, 0x0f, 0xf0, 0x80,
- 0x70, 0x01, 0x42, 0xc0,
- 0x61, 0x0b, 0xdf, 0xfc,
- 0x73, 0xfd, 0x40, 0xc0,
- 0x48, 0x07, 0xc0, 0x03,
- 0x00, 0xa5, 0xd0, 0x17,
- 0x5d, 0x93, 0xa2, 0x0f,
- 0xff, 0xf8, 0x01, 0x8e,
- 0x60, 0x01, 0x02, 0x86,
- 0xa2, 0x0f, 0xf8, 0x00,
- 0x40, 0x06, 0x90, 0x0e,
- 0xa1, 0x0d, 0xfc, 0x12,
- 0x40, 0x06, 0x82, 0xc5,
- 0xa1, 0x0d, 0xfc, 0x1a,
- 0x40, 0x06, 0x82, 0x15,
- 0x02, 0x06, 0xfc, 0x0a,
- 0xc0, 0x20, 0x60, 0x01,
- 0x80, 0x75, 0x83, 0x0d,
- 0xf3, 0x72, 0x00, 0x46,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x86, 0x4b, 0x08, 0x8b,
- 0x81, 0x71, 0x3e, 0x2e,
- 0x40, 0x5a, 0x00, 0x6b,
- 0x7c, 0x7e, 0xe5, 0x06,
- 0x42, 0x5a, 0x81, 0x31,
- 0x88, 0x2b, 0x65, 0x86,
- 0xef, 0xf8, 0x4f, 0x68,
- 0x67, 0xd1, 0x00, 0x00,
- 0x44, 0x86, 0x40, 0x01,
- 0x42, 0x12, 0xe0, 0x3c,
- 0x81, 0x31, 0x72, 0x9c,
- 0xef, 0xf8, 0x45, 0x68,
- 0x00, 0x00, 0x17, 0xa4,
- 0xc0, 0x04, 0x64, 0x01,
- 0x72, 0x9c, 0x42, 0x12,
- 0x19, 0x74, 0xd7, 0x07,
- 0xe0, 0xd4, 0x16, 0x14,
- 0xff, 0x01, 0x20, 0xbf,
- 0x00, 0x14, 0x01, 0xbb,
- 0x57, 0xfe, 0xe1, 0xac,
- 0xa1, 0x0b, 0x1f, 0xfc,
- 0x60, 0x38, 0x14, 0x09,
- 0xdf, 0xfc, 0x57, 0xfe,
- 0x81, 0x11, 0x1b, 0x94,
- 0x0a, 0xf0, 0x1c, 0x24,
- 0x15, 0x04, 0xe4, 0x20,
- 0xbe, 0x44, 0xa1, 0x0b,
- 0x80, 0x08, 0x00, 0x1b,
- 0x06, 0x14, 0x80, 0x04,
- 0x90, 0x1b, 0x7b, 0x00,
- 0xe8, 0x00, 0x43, 0xc8,
- 0xfc, 0x04, 0xbc, 0x0e,
- 0xe0, 0x18, 0x0e, 0x49,
- 0x68, 0x34, 0xaa, 0x24,
- 0x50, 0x82, 0xa0, 0x1b,
- 0x8e, 0x0b, 0x7b, 0x90,
- 0x68, 0x38, 0x4a, 0x68,
- 0x3e, 0x0e, 0x8c, 0x4b,
- 0x85, 0x05, 0x81, 0xa1,
- 0x0e, 0x29, 0xd9, 0x0a,
- 0x42, 0xba, 0xe0, 0x1c,
- 0x48, 0xba, 0xe5, 0x02,
- 0x06, 0x20, 0x65, 0x82,
- 0x83, 0x01, 0xe4, 0x1c,
- 0x02, 0x03, 0xa7, 0x0f,
- 0x42, 0x42, 0x81, 0x11,
- 0x90, 0x21, 0x72, 0x84,
- 0xef, 0xf8, 0x50, 0x48,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x82, 0xa1, 0x40, 0x3f,
- 0x41, 0xfe, 0xc5, 0x0d,
- 0x00, 0x3f, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x3f, 0x1f, 0xfd,
- 0x91, 0xad, 0xe5, 0x0e,
- 0xbe, 0x04, 0xf8, 0x15,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x98, 0xf1, 0x00, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x58, 0x96, 0x21, 0x1b,
- 0x02, 0x14, 0xe0, 0x08,
- 0x18, 0x06, 0x40, 0xac,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xa1, 0x4b, 0x41, 0x06,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x08, 0x58, 0x96,
- 0xff, 0x11, 0x82, 0x65,
- 0x02, 0x44, 0x02, 0x3d,
- 0x60, 0x37, 0xe1, 0x04,
- 0x91, 0x80, 0x02, 0x14,
- 0x42, 0x1a, 0x86, 0x13,
- 0x20, 0x23, 0xe0, 0x92,
- 0x82, 0x23, 0x98, 0x0b,
- 0xdd, 0x93, 0x94, 0x2e,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x11, 0x02, 0x6b,
- 0x60, 0x00, 0x45, 0x06,
- 0x66, 0xd8, 0x8c, 0x0b,
- 0x81, 0x71, 0x6f, 0xf8,
- 0x66, 0x00, 0x00, 0x60,
- 0xe4, 0xc0, 0x02, 0x60,
- 0x91, 0x21, 0x01, 0xa5,
- 0x04, 0x20, 0x06, 0x7e,
- 0x40, 0x73, 0xec, 0x04,
- 0x42, 0x75, 0xf8, 0x20,
- 0xc1, 0x7c, 0xf0, 0x08,
- 0xfc, 0xf5, 0xa1, 0x2b,
- 0x7f, 0xf4, 0x41, 0x0e,
- 0xe0, 0x38, 0x03, 0x06,
- 0x60, 0x28, 0x05, 0x06,
- 0xff, 0xd4, 0x47, 0x0e,
- 0x48, 0x62, 0x81, 0xf5,
- 0x00, 0x00, 0x71, 0x80,
- 0x92, 0x7e, 0xec, 0x20,
- 0x48, 0x62, 0x10, 0x7e,
- 0x10, 0x7e, 0xf0, 0x88,
- 0xf0, 0x84, 0x48, 0x62,
- 0x82, 0x11, 0x10, 0x76,
- 0x87, 0x0b, 0x88, 0x21,
- 0x41, 0xf6, 0xfc, 0x35,
- 0x81, 0x11, 0x60, 0x0c,
- 0x6f, 0x40, 0x4c, 0x01,
- 0x67, 0x44, 0x00, 0x60,
- 0x63, 0x98, 0xc0, 0x03,
- 0x8f, 0x21, 0x6f, 0xf8,
- 0x65, 0x61, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0x08,
- 0xc0, 0x03, 0x67, 0x61,
- 0x05, 0x06, 0x01, 0x95,
- 0x06, 0x7e, 0xe0, 0x08,
- 0xec, 0x04, 0x04, 0x20,
- 0xf0, 0x08, 0x42, 0x75,
- 0xa1, 0x2b, 0xc1, 0x7c,
- 0x0c, 0x4c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6f, 0xd1, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x00, 0x09, 0x82, 0x45,
- 0xc0, 0x06, 0x60, 0x2d,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xf0, 0x80, 0x44, 0x12,
- 0xec, 0x70, 0x04, 0x29,
- 0x84, 0x05, 0xa1, 0x2b,
- 0xe0, 0x3c, 0x02, 0x29,
- 0xe6, 0x82, 0x40, 0x2a,
- 0x02, 0x09, 0x80, 0x13,
- 0xc0, 0x05, 0x6b, 0x71,
- 0xec, 0x14, 0x00, 0x00,
- 0xe4, 0x08, 0x00, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x3c, 0x02, 0x39,
- 0x67, 0x70, 0x02, 0x10,
- 0x0a, 0x04, 0xc0, 0x03,
- 0x04, 0x20, 0x60, 0x8c,
- 0x04, 0x55, 0xe6, 0x40,
- 0x58, 0x22, 0x7c, 0x14,
- 0x46, 0x3a, 0xf0, 0x94,
- 0x81, 0x71, 0x66, 0x82,
- 0x08, 0x34, 0xb2, 0x64,
- 0xc2, 0x37, 0x60, 0x88,
- 0xfc, 0x10, 0x02, 0x45,
- 0x48, 0x62, 0x88, 0x53,
- 0x86, 0x13, 0x72, 0x9c,
- 0x08, 0x04, 0x32, 0x4e,
- 0x30, 0x5e, 0xe0, 0x88,
- 0x02, 0x13, 0x84, 0x43,
- 0x40, 0x01, 0x6c, 0x01,
- 0x08, 0x35, 0x80, 0x23,
- 0x82, 0x33, 0xe2, 0x00,
- 0xe2, 0x00, 0x48, 0x35,
- 0xec, 0x00, 0x04, 0x09,
- 0x44, 0x01, 0x82, 0x01,
- 0x0c, 0x0c, 0xec, 0x00,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfe, 0x04, 0x04, 0x0c,
- 0x48, 0x22, 0x08, 0x6b,
- 0x21, 0x4b, 0xf9, 0x8c,
- 0x08, 0x65, 0x8a, 0x7b,
- 0xe0, 0x08, 0x48, 0x96,
- 0x61, 0x84, 0x08, 0x24,
- 0xe0, 0xfc, 0x0a, 0x34,
- 0x0a, 0x34, 0x2a, 0x4f,
- 0x88, 0x03, 0xe1, 0x84,
- 0x6f, 0xf4, 0x71, 0x88,
- 0xf2, 0x84, 0x42, 0x52,
- 0x64, 0x1c, 0x43, 0x4a,
- 0x42, 0x1a, 0x81, 0x41,
- 0x41, 0x6a, 0xe0, 0x1c,
- 0x42, 0x0a, 0xe4, 0x18,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x09, 0x04, 0xed, 0x80,
- 0xdc, 0x00, 0x4c, 0x00,
- 0xdc, 0x00, 0x4e, 0x10,
- 0x80, 0x6e, 0x82, 0x7e,
- 0x0c, 0x0c, 0x88, 0x0b,
- 0xdd, 0x93, 0xf6, 0x04,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x67, 0xfd, 0x00, 0x25,
- 0x81, 0x51, 0x40, 0x01,
- 0x86, 0x44, 0x84, 0x34,
- 0xe0, 0x18, 0x02, 0xc5,
- 0x6f, 0xc9, 0x00, 0x21,
- 0x84, 0x33, 0x40, 0x05,
- 0x60, 0x50, 0x02, 0x6b,
- 0xf2, 0x94, 0x48, 0x42,
- 0x6f, 0xcd, 0x00, 0x01,
- 0x02, 0x55, 0xc0, 0x05,
- 0x84, 0xc3, 0x60, 0x1c,
- 0x82, 0x61, 0x06, 0x4e,
- 0x42, 0xc5, 0x84, 0x3e,
- 0x80, 0x53, 0x60, 0x18,
- 0xe0, 0x1c, 0x42, 0x55,
- 0xe0, 0x50, 0x42, 0x63,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x39,
- 0xc8, 0x44, 0x81, 0xc1,
- 0x46, 0x3a, 0xca, 0x54,
- 0xc4, 0x37, 0xe6, 0x82,
- 0x06, 0x35, 0x82, 0x33,
- 0x86, 0x43, 0xe7, 0xdc,
- 0x72, 0xb0, 0x46, 0x52,
- 0xca, 0x3e, 0x80, 0x13,
- 0x02, 0x01, 0xc8, 0x4e,
- 0x04, 0x35, 0xea, 0x70,
- 0x80, 0x33, 0xe0, 0x20,
- 0xe0, 0x20, 0x44, 0x35,
- 0xe0, 0x54, 0x04, 0x3b,
- 0xeb, 0x70, 0x02, 0x01,
- 0xe0, 0x24, 0x04, 0x15,
- 0x44, 0x33, 0x82, 0x31,
- 0x80, 0x13, 0xe0, 0x54,
- 0xe0, 0x24, 0x44, 0x15,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x3c, 0x02, 0x39,
- 0xe0, 0x58, 0x04, 0x4b,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xe0, 0x14, 0x04, 0x35,
- 0x80, 0x13, 0xc4, 0x07,
- 0xe7, 0xdc, 0x02, 0x05,
- 0xe0, 0x10, 0x04, 0x15,
- 0x81, 0x01, 0x00, 0x13,
- 0x72, 0x80, 0x40, 0x32,
- 0x44, 0x05, 0x82, 0x41,
- 0x44, 0x15, 0xe0, 0x14,
- 0x44, 0x43, 0xe0, 0x10,
- 0xdd, 0x93, 0xe0, 0x58,
- 0x60, 0x58, 0x00, 0x29,
- 0x0a, 0x39, 0x84, 0x5b,
- 0x0a, 0x49, 0xef, 0x40,
- 0x02, 0x39, 0xef, 0x44,
- 0x40, 0x01, 0x60, 0x51,
- 0x4a, 0x21, 0xc7, 0x2d,
- 0xc8, 0x2d, 0x4f, 0x40,
- 0x6f, 0x48, 0x4a, 0x21,
- 0xe4, 0xa0, 0x08, 0x00,
- 0x4f, 0x44, 0x4a, 0x21,
- 0x00, 0x35, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x20,
- 0x60, 0x30, 0x02, 0xc3,
- 0x67, 0x60, 0x0a, 0x50,
- 0x02, 0x13, 0xc0, 0x03,
- 0x98, 0x0b, 0xe0, 0xc0,
- 0xe0, 0x00, 0x24, 0x68,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x02, 0x7b,
- 0x60, 0x50, 0x0e, 0x2b,
- 0x0e, 0xab, 0x81, 0x81,
- 0x0e, 0x9b, 0xe0, 0x54,
- 0x18, 0x8e, 0xe0, 0x58,
- 0x9a, 0x8e, 0xa1, 0x2b,
- 0x4c, 0x23, 0xd8, 0x8e,
- 0x4c, 0xa3, 0xe0, 0x18,
- 0x4c, 0x93, 0xe0, 0x1c,
- 0x84, 0xc5, 0xe0, 0x20,
- 0x06, 0x24, 0x1c, 0x04,
- 0x9e, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x65, 0x88,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x14, 0x0a, 0x98, 0x0e,
- 0x04, 0xa4, 0x68, 0x00,
- 0x84, 0xc5, 0xfb, 0x80,
- 0x06, 0x24, 0x5c, 0x04,
- 0xde, 0x14, 0xe1, 0x84,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x63, 0xe8,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x12, 0x0a, 0x9a, 0x0e,
- 0x04, 0x94, 0x68, 0x00,
- 0x86, 0x05, 0xfb, 0x80,
- 0x60, 0x10, 0x0e, 0x05,
- 0xe1, 0x84, 0x06, 0x24,
- 0xe0, 0x14, 0x0e, 0x15,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xf4, 0x62, 0x28,
- 0xf2, 0xa0, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xfe, 0xc7, 0xff,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0xc0, 0x01, 0x1f, 0xfd,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x84, 0x3b, 0x01, 0x01,
- 0x46, 0x01, 0x8a, 0x06,
- 0x8e, 0x06, 0xf0, 0x08,
- 0x02, 0x0b, 0x8c, 0x06,
- 0xa1, 0x0b, 0xe0, 0x50,
- 0x02, 0xc5, 0x88, 0x45,
- 0x06, 0x04, 0x60, 0x18,
- 0x7f, 0x51, 0xe1, 0x84,
- 0x86, 0x6b, 0xa6, 0x4b,
- 0x4c, 0x40, 0x8a, 0xcd,
- 0x18, 0x63, 0x9c, 0x00,
- 0xff, 0xf8, 0x18, 0x0e,
- 0xe0, 0x82, 0x4e, 0x6a,
- 0xe0, 0x1c, 0x02, 0x65,
- 0x4a, 0x72, 0x0a, 0x6d,
- 0x46, 0x40, 0xfa, 0x30,
- 0x0a, 0x52, 0x1c, 0x00,
- 0x08, 0x56, 0xe9, 0xfc,
- 0x40, 0x3a, 0x8c, 0x33,
- 0x40, 0x02, 0xe0, 0x82,
- 0x00, 0x02, 0xfa, 0x30,
- 0x8a, 0x06, 0xe9, 0xfc,
- 0xe0, 0x54, 0x02, 0x0b,
- 0x88, 0x45, 0xa1, 0x0b,
- 0x60, 0x20, 0x02, 0xc5,
- 0xe1, 0x84, 0x06, 0x04,
- 0xa6, 0x4b, 0x7f, 0x51,
- 0x8a, 0xcd, 0x86, 0x6b,
- 0x9c, 0x00, 0x4c, 0x40,
- 0x60, 0x24, 0x02, 0xc5,
- 0x4c, 0x6a, 0x98, 0x63,
- 0x02, 0x0e, 0x60, 0x82,
- 0x8a, 0xcd, 0xff, 0xf8,
- 0x1c, 0x00, 0x46, 0x40,
- 0xfa, 0x04, 0x4c, 0x62,
- 0x0a, 0x62, 0x18, 0x33,
- 0x40, 0x3a, 0xe9, 0xfc,
- 0xc8, 0x56, 0xe0, 0x82,
- 0xfa, 0x04, 0x40, 0x02,
- 0xe9, 0xfc, 0x00, 0x02,
- 0x0c, 0x0c, 0xca, 0x06,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x89, 0x04, 0x84, 0x7a,
- 0x04, 0x89, 0x86, 0x1a,
- 0xd6, 0x58, 0xe0, 0x10,
- 0x80, 0x7c, 0x88, 0x98,
- 0xc8, 0xc8, 0x8a, 0x78,
- 0x04, 0x29, 0xca, 0x68,
- 0x02, 0x1c, 0xe0, 0x14,
- 0xe1, 0x84, 0x02, 0x84,
- 0x60, 0x10, 0x40, 0x51,
- 0x0a, 0x24, 0x98, 0x13,
- 0xc2, 0x17, 0x61, 0x84,
- 0x02, 0x10, 0x0c, 0x53,
- 0x40, 0x11, 0xec, 0x04,
- 0xc2, 0x57, 0x60, 0x1c,
- 0x6c, 0x04, 0x02, 0x50,
- 0x40, 0x11, 0xc2, 0x87,
- 0xc2, 0x27, 0x60, 0x20,
- 0x60, 0x28, 0x40, 0x21,
- 0x66, 0x40, 0x04, 0x40,
- 0x06, 0x19, 0xc0, 0x03,
- 0x81, 0x31, 0x60, 0x38,
- 0xe0, 0x14, 0x40, 0x91,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x24, 0x40, 0x81,
- 0x49, 0x48, 0x81, 0x95,
- 0xec, 0x04, 0x0a, 0x30,
- 0xec, 0x04, 0x02, 0x10,
- 0x46, 0x40, 0xc9, 0x5d,
- 0xa1, 0x1b, 0x9c, 0x00,
- 0x40, 0x31, 0xfc, 0xf5,
- 0x81, 0x01, 0x60, 0x2c,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf0, 0x80, 0x46, 0x22,
- 0xec, 0x70, 0x06, 0x39,
- 0x86, 0xa5, 0xa1, 0x3b,
- 0xe0, 0x3c, 0x04, 0x39,
- 0xe6, 0x82, 0x40, 0x3a,
- 0xf0, 0x80, 0x46, 0x22,
- 0x6b, 0x71, 0x06, 0x39,
- 0x06, 0x30, 0xc0, 0x05,
- 0xe2, 0x3d, 0xec, 0x14,
- 0xc2, 0x07, 0x84, 0x15,
- 0x04, 0x03, 0x80, 0x23,
- 0xc0, 0x02, 0x63, 0xb9,
- 0x86, 0x12, 0x84, 0x22,
- 0x41, 0x1a, 0x85, 0x0d,
- 0x40, 0x0a, 0xe0, 0x04,
- 0x00, 0x0c, 0xe1, 0x84,
- 0xdd, 0x93, 0xe2, 0x00,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x1d, 0x04,
- 0x88, 0x8b, 0x7c, 0x5e,
- 0x90, 0x1b, 0x7e, 0x1e,
- 0x00, 0x06, 0x3e, 0x0e,
- 0x8b, 0x6e, 0xe0, 0x04,
- 0xe0, 0x38, 0x04, 0xb9,
- 0x81, 0x45, 0x89, 0x6e,
- 0x00, 0x00, 0x45, 0x6e,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x7c, 0x04, 0xfe, 0x95,
- 0x12, 0x20, 0x87, 0x41,
- 0x40, 0x03, 0x65, 0x71,
- 0xe6, 0x40, 0x14, 0x30,
- 0x66, 0x41, 0x0e, 0x30,
- 0x80, 0x6e, 0xc0, 0x03,
- 0xc2, 0x6e, 0x82, 0x4e,
- 0x00, 0x06, 0x40, 0x6e,
- 0xbe, 0x14, 0xe0, 0x08,
- 0x86, 0x4e, 0x84, 0x0e,
- 0xc4, 0x6e, 0xc6, 0x6e,
- 0x9c, 0x28, 0x85, 0xe5,
- 0x86, 0xa5, 0xa1, 0x2b,
- 0x00, 0x09, 0xfe, 0x04,
- 0xc1, 0x2d, 0xe0, 0x10,
- 0x3e, 0x14, 0x82, 0x45,
- 0xe0, 0x08, 0x00, 0x46,
- 0x87, 0x01, 0x04, 0x0e,
- 0xa4, 0x08, 0x86, 0x0e,
- 0xc6, 0x0e, 0xc4, 0x6e,
- 0x06, 0xf0, 0x2a, 0x14,
- 0x28, 0x04, 0xe4, 0x40,
- 0x7f, 0xfd, 0x49, 0xfe,
- 0x3c, 0x3e, 0xcf, 0xff,
- 0x5e, 0x18, 0x81, 0x31,
- 0x81, 0x51, 0x6f, 0xfc,
- 0x81, 0x95, 0x89, 0x04,
- 0x83, 0x01, 0x7c, 0x24,
- 0x88, 0x0e, 0x87, 0x11,
- 0xa4, 0x18, 0x8a, 0x1e,
- 0xca, 0x1e, 0xc8, 0x6e,
- 0x16, 0xb0, 0x61, 0x0e,
- 0x02, 0x91, 0xec, 0x04,
- 0x82, 0x71, 0x90, 0xa1,
- 0xf4, 0x55, 0xa1, 0xbb,
- 0xb8, 0xf1, 0x7c, 0x04,
- 0xa1, 0x0b, 0x80, 0x04,
- 0xc0, 0x08, 0x4c, 0x96,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x6b, 0x0a, 0x9b,
- 0x80, 0xbb, 0x06, 0x7b,
- 0x64, 0xd1, 0x00, 0x90,
- 0x84, 0x8b, 0x40, 0x01,
- 0x08, 0x90, 0x02, 0xab,
- 0x3c, 0x0e, 0xe4, 0x90,
- 0x64, 0x91, 0x0a, 0x90,
- 0x0e, 0x2b, 0xc0, 0x01,
- 0x78, 0x58, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x98, 0xf1, 0x80, 0xa5,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x04, 0x90, 0xdd, 0x93,
- 0x96, 0x0b, 0x64, 0x30,
- 0x6f, 0xfc, 0x65, 0x88,
- 0x7c, 0x8e, 0x8c, 0x1b,
- 0xe4, 0x80, 0x10, 0x90,
- 0x8c, 0x1b, 0x16, 0x0b,
- 0x6f, 0xfc, 0x6b, 0x48,
- 0x3c, 0x9e, 0x90, 0x2b,
- 0x7c, 0x24, 0x96, 0x0b,
- 0x0e, 0x3b, 0x94, 0x1b,
- 0x70, 0x18, 0x8c, 0x4b,
- 0x90, 0x5b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x82, 0x9b, 0x04, 0x8b,
- 0x86, 0x7b, 0x08, 0x6b,
- 0x6f, 0x48, 0x10, 0x19,
- 0x67, 0x60, 0x04, 0x80,
- 0x12, 0x09, 0xc0, 0x03,
- 0x8c, 0x3b, 0x60, 0x10,
- 0xe8, 0x04, 0x59, 0x68,
- 0xe0, 0x10, 0x0e, 0x05,
- 0xe0, 0x34, 0x0e, 0x1b,
- 0xef, 0x48, 0x10, 0x29,
- 0xe0, 0x10, 0x12, 0x39,
- 0xe0, 0x8c, 0x0e, 0x49,
- 0x81, 0x01, 0x18, 0x0e,
- 0x4c, 0x21, 0xd8, 0x1c,
- 0x4c, 0x31, 0xe0, 0x18,
- 0x4c, 0x41, 0xe0, 0x1c,
- 0x0c, 0x4c, 0xe0, 0x20,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x81, 0xb1, 0x13, 0xa4,
- 0x6e, 0x40, 0x02, 0x22,
- 0x11, 0x74, 0x88, 0x8b,
- 0x28, 0x5e, 0x86, 0x6b,
- 0x0f, 0xbe, 0x81, 0x91,
- 0x81, 0x55, 0x81, 0x21,
- 0x82, 0x21, 0x41, 0x34,
- 0xfa, 0x24, 0x52, 0x32,
- 0xfe, 0x75, 0xc3, 0x2d,
- 0x41, 0xfe, 0xa0, 0x9d,
- 0x80, 0x3f, 0x1f, 0xfd,
- 0x80, 0x00, 0x54, 0x05,
- 0x06, 0xf0, 0x90, 0x05,
- 0x92, 0x0b, 0x64, 0x70,
- 0x90, 0x2b, 0x0a, 0x1b,
- 0xe8, 0x34, 0x5e, 0x48,
- 0x8e, 0x15, 0xa1, 0x0b,
- 0x90, 0x1b, 0x12, 0x0b,
- 0x68, 0x34, 0x61, 0x48,
- 0xa1, 0x0b, 0x8e, 0x2b,
- 0x8f, 0x84, 0x8c, 0x35,
- 0x54, 0xb5, 0xa1, 0x8b,
- 0x40, 0x96, 0x00, 0x00,
- 0x8a, 0x45, 0x80, 0x08,
- 0x98, 0x1a, 0x9c, 0x04,
- 0xc7, 0x07, 0x9a, 0x2a,
- 0x80, 0x95, 0xc3, 0x0d,
- 0x81, 0x01, 0x44, 0x0d,
- 0x40, 0x12, 0x88, 0x25,
- 0x04, 0x06, 0x70, 0x88,
- 0x42, 0xb2, 0xff, 0x40,
- 0x81, 0x31, 0x72, 0xac,
- 0xef, 0xf4, 0x4e, 0x28,
- 0x60, 0xfc, 0x04, 0x14,
- 0x24, 0x0f, 0xc3, 0x07,
- 0x01, 0x31, 0xc3, 0x17,
- 0x44, 0x38, 0x90, 0x2b,
- 0x04, 0x04, 0xef, 0xf4,
- 0xff, 0x31, 0x60, 0xa0,
- 0xd0, 0x17, 0x71, 0x07,
- 0xa2, 0x0f, 0x07, 0x2b,
- 0x1f, 0xfc, 0x45, 0xfe,
- 0x45, 0xfe, 0xa1, 0x0b,
- 0xa8, 0x2e, 0xdf, 0xfc,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x84, 0x03, 0x04, 0x13,
- 0x61, 0x8a, 0x40, 0x0a,
- 0x42, 0x1a, 0x82, 0x11,
- 0x04, 0x20, 0x61, 0x8a,
- 0x18, 0x04, 0xec, 0x04,
- 0x0c, 0x04, 0x60, 0x88,
- 0x08, 0xc5, 0xe0, 0x8c,
- 0x4e, 0x52, 0x7c, 0x30,
- 0x0a, 0x65, 0xf0, 0x98,
- 0x85, 0x0d, 0x7c, 0x18,
- 0xca, 0xc7, 0x9e, 0x84,
- 0x12, 0xc4, 0xa6, 0xc3,
- 0x8c, 0xc3, 0x61, 0x7c,
- 0xf2, 0xa0, 0x4c, 0x92,
- 0x0c, 0x04, 0x1e, 0x6e,
- 0x1c, 0xce, 0xe0, 0x84,
- 0x0c, 0xcb, 0x8a, 0x63,
- 0x00, 0x06, 0x69, 0x00,
- 0x00, 0x00, 0x80, 0x00,
- 0x83, 0x0b, 0xc4, 0x04,
- 0x4c, 0xc3, 0x82, 0xc1,
- 0xf6, 0xd5, 0xe9, 0x00,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0xfc, 0x18, 0x24,
- 0x04, 0xc3, 0xa2, 0x03,
- 0x03, 0xc7, 0x86, 0x03,
- 0x0b, 0xc4, 0x81, 0x81,
- 0x4c, 0x0a, 0xb8, 0x03,
- 0x00, 0x34, 0x61, 0x8e,
- 0x09, 0x04, 0xe0, 0x88,
- 0xf0, 0x80, 0x4e, 0x42,
- 0x0c, 0x13, 0x94, 0x8e,
- 0x42, 0x1a, 0xc4, 0x67,
- 0x88, 0x63, 0x61, 0x8e,
- 0xb0, 0x8e, 0x80, 0x8e,
- 0xc4, 0x17, 0x02, 0x23,
- 0x61, 0x8e, 0x46, 0x2a,
- 0xf0, 0x84, 0x44, 0x42,
- 0x42, 0x42, 0xc4, 0x37,
- 0x06, 0x70, 0x70, 0x8c,
- 0x82, 0x7b, 0xec, 0x10,
- 0x14, 0x94, 0xd9, 0x84,
- 0x10, 0x93, 0xc6, 0x6d,
- 0xdc, 0x00, 0x4c, 0x40,
- 0xdd, 0x84, 0x94, 0x9e,
- 0xc6, 0x7d, 0x30, 0x94,
- 0x4e, 0x40, 0x10, 0x93,
- 0x30, 0x9e, 0xdc, 0x00,
- 0xfc, 0x35, 0x85, 0x6b,
- 0xc9, 0xc4, 0x80, 0x54,
- 0x98, 0x53, 0xc6, 0x2d,
- 0x44, 0x40, 0x00, 0x5e,
- 0x83, 0x2b, 0xdc, 0x00,
- 0x0c, 0x0c, 0xfe, 0x35,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x4c, 0x42, 0x08, 0x13,
- 0x4c, 0x6a, 0xf0, 0x80,
- 0x82, 0x11, 0x61, 0x92,
- 0x61, 0x92, 0x42, 0x1a,
- 0xe0, 0x88, 0x18, 0x44,
- 0xd6, 0x07, 0x7e, 0x3e,
- 0xc4, 0x67, 0x19, 0x34,
- 0x4f, 0xfe, 0x44, 0x17,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x52, 0x52, 0x0a, 0xc3,
- 0x3e, 0x3e, 0xf0, 0x84,
- 0xf0, 0x98, 0x54, 0x52,
- 0x06, 0xc0, 0x0c, 0x7e,
- 0x7c, 0x5e, 0xec, 0x10,
- 0xfc, 0xa8, 0x16, 0x04,
- 0x81, 0xc1, 0x01, 0x41,
- 0x81, 0x11, 0x01, 0x81,
- 0xe9, 0x64, 0x83, 0xf5,
- 0xc6, 0xad, 0x7e, 0x04,
- 0x1e, 0xa5, 0xca, 0x67,
- 0x4e, 0x62, 0x40, 0x08,
- 0x21, 0x7d, 0xf1, 0x80,
- 0x0c, 0x06, 0x8e, 0x6b,
- 0xa0, 0x2d, 0x40, 0x00,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x61, 0x7c, 0x0e, 0x64,
- 0x40, 0x6a, 0x8c, 0x43,
- 0x58, 0x72, 0x64, 0x2e,
- 0x4c, 0x6a, 0xf2, 0xb0,
- 0x80, 0x83, 0xe4, 0xae,
- 0x72, 0x84, 0x42, 0x62,
- 0x64, 0x00, 0x16, 0xb0,
- 0x93, 0xab, 0xc0, 0x08,
- 0x18, 0xca, 0xf8, 0x35,
- 0x18, 0x1a, 0xe0, 0x00,
- 0x08, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x08, 0x45, 0xed, 0x80,
- 0x80, 0x08, 0x40, 0x96,
- 0x61, 0x84, 0x00, 0x44,
- 0xe0, 0xfc, 0x04, 0xc4,
- 0x04, 0xc4, 0x24, 0x0f,
- 0x10, 0x03, 0xe1, 0x84,
- 0x42, 0x12, 0x98, 0x3b,
- 0x88, 0x2b, 0x72, 0x88,
- 0xef, 0xf0, 0x69, 0x48,
- 0xe0, 0x00, 0x03, 0x4a,
- 0x02, 0x1a, 0x3e, 0x14,
- 0x00, 0x6a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x00, 0x06, 0xed, 0x80,
- 0x04, 0x0e, 0xc0, 0x00,
- 0xa0, 0xf1, 0x81, 0x01,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x4c, 0x52, 0x0d, 0x04,
- 0x0c, 0x23, 0xf0, 0x80,
- 0xf0, 0x94, 0x4e, 0x12,
- 0x61, 0x96, 0x58, 0x2a,
- 0xec, 0x04, 0x10, 0x50,
- 0xc4, 0x87, 0x02, 0x71,
- 0x18, 0x33, 0x8f, 0x24,
- 0x46, 0x3a, 0xc4, 0xc7,
- 0x42, 0x02, 0x61, 0x96,
- 0x4c, 0x6a, 0xf0, 0xb0,
- 0x82, 0x9b, 0x61, 0x96,
- 0x61, 0x96, 0x4e, 0x7a,
- 0xc4, 0x37, 0x81, 0x51,
- 0x70, 0x8c, 0x58, 0x02,
- 0xf0, 0xa0, 0x46, 0x02,
- 0xe5, 0xa4, 0x81, 0x65,
- 0x94, 0x53, 0xc6, 0x9d,
- 0xdc, 0x00, 0x52, 0x00,
- 0xfe, 0x55, 0x99, 0x9b,
- 0xa3, 0x4d, 0x44, 0x67,
- 0xc4, 0x77, 0x04, 0x63,
- 0x80, 0x00, 0x0c, 0x95,
- 0x52, 0x92, 0x02, 0x65,
- 0xff, 0x91, 0x90, 0x94,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0x95, 0x8a, 0x9b,
- 0x52, 0x92, 0xa0, 0x00,
- 0x18, 0x9e, 0xb1, 0x94,
- 0x04, 0x83, 0x84, 0x73,
- 0x83, 0xd5, 0xff, 0x91,
- 0xc5, 0xb4, 0xf1, 0xa4,
- 0x4a, 0xa2, 0x8a, 0xa3,
- 0x0c, 0xa5, 0xf1, 0xac,
- 0x02, 0x45, 0x80, 0x00,
- 0x90, 0x94, 0x54, 0xa2,
- 0x60, 0x24, 0x49, 0x1a,
- 0x0c, 0xa5, 0x8a, 0xab,
- 0x54, 0xa2, 0xa0, 0x00,
- 0x18, 0xae, 0xb1, 0x94,
- 0xe4, 0x0c, 0x59, 0x1a,
- 0x3c, 0x01, 0x58, 0x00,
- 0x43, 0x1a, 0x40, 0x00,
- 0x42, 0x00, 0xe4, 0x0c,
- 0xc0, 0x00, 0x3c, 0x01,
- 0x64, 0x10, 0x14, 0x60,
- 0x55, 0x1a, 0x84, 0x6b,
- 0x4c, 0xa0, 0xe4, 0x20,
- 0x4c, 0x1a, 0xbc, 0x00,
- 0x3d, 0xb8, 0xe0, 0x1c,
- 0xc3, 0xff, 0x3f, 0xfd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0xca, 0x37, 0x00, 0x8b,
- 0xe1, 0xfc, 0x14, 0x84,
- 0x00, 0xa4, 0x90, 0xa3,
- 0x80, 0x33, 0xe1, 0x04,
- 0x60, 0xa2, 0x40, 0x3a,
- 0xe1, 0x7c, 0x06, 0x54,
- 0x61, 0x7c, 0x18, 0x04,
- 0x56, 0xc2, 0xaa, 0x03,
- 0x46, 0x02, 0xf3, 0x8c,
- 0x17, 0x34, 0xf9, 0xac,
- 0x41, 0xfe, 0xa1, 0x3b,
- 0x00, 0x01, 0x1f, 0xfd,
- 0x80, 0x08, 0x4e, 0x96,
- 0x0a, 0x44, 0x90, 0x05,
- 0xa4, 0x43, 0x61, 0x7c,
- 0x61, 0x7c, 0x18, 0x24,
- 0x4a, 0x52, 0xff, 0x21,
- 0x81, 0x71, 0x73, 0xb0,
- 0x44, 0x72, 0x04, 0x5d,
- 0x3e, 0x1e, 0xf1, 0x80,
- 0x12, 0x44, 0x80, 0xcb,
- 0xe0, 0x57, 0x61, 0xc0,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf3, 0xac, 0x42, 0x72,
- 0xe0, 0x47, 0x7c, 0x3e,
- 0x60, 0x84, 0x06, 0xb4,
- 0xe1, 0xfc, 0x0c, 0x04,
- 0x60, 0x84, 0x04, 0x04,
- 0x56, 0x10, 0xb2, 0x5f,
- 0x40, 0xc2, 0x1c, 0x00,
- 0x42, 0xb2, 0xf0, 0x90,
- 0xac, 0x3f, 0x72, 0x94,
- 0xef, 0xf0, 0x5c, 0xe8,
- 0x02, 0xa4, 0x95, 0xb4,
- 0xd6, 0xb7, 0x7c, 0x00,
- 0xa2, 0x83, 0x3e, 0x14,
- 0xa3, 0x8b, 0x7c, 0x34,
- 0x04, 0x01, 0x00, 0x00,
- 0xd6, 0x17, 0x80, 0x04,
- 0x02, 0x04, 0x82, 0x03,
- 0x96, 0x1f, 0xe1, 0x7c,
- 0x40, 0x1a, 0x80, 0x13,
- 0x00, 0x02, 0xe1, 0xae,
- 0x00, 0x02, 0xe0, 0x00,
- 0xc7, 0xff, 0x6b, 0xfd,
- 0x8e, 0x0b, 0x0c, 0x0e,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0xa4, 0x13, 0x1b, 0x74,
- 0xa4, 0x03, 0x09, 0x3e,
- 0x8a, 0x9b, 0x1f, 0x64,
- 0x46, 0x72, 0x1d, 0x84,
- 0x56, 0x3a, 0xf0, 0x88,
- 0x88, 0x2b, 0x61, 0x9e,
- 0x7c, 0x4e, 0x99, 0xa4,
- 0x16, 0x13, 0x8e, 0x4b,
- 0x7e, 0x1e, 0x96, 0x03,
- 0x21, 0xb4, 0xa0, 0x13,
- 0x3c, 0x6e, 0x93, 0x1d,
- 0xc4, 0x04, 0x12, 0x10,
- 0x70, 0xa4, 0x42, 0x02,
- 0x02, 0x10, 0x94, 0x3b,
- 0x90, 0x5b, 0x6c, 0x04,
- 0xef, 0xfc, 0x69, 0x68,
- 0x86, 0x15, 0xa1, 0x0b,
- 0x94, 0x3b, 0x7e, 0x14,
- 0x8e, 0x4b, 0x3c, 0xbe,
- 0x90, 0x5b, 0x7c, 0x24,
- 0xe4, 0x04, 0x00, 0x10,
- 0x6f, 0xfc, 0x68, 0xa8,
- 0xa1, 0x0b, 0xb2, 0x03,
- 0x18, 0x04, 0x82, 0x75,
- 0x40, 0x0a, 0xd6, 0x77,
- 0x98, 0x0e, 0xe1, 0x1e,
- 0x40, 0x0a, 0xac, 0x04,
- 0x2c, 0x0e, 0xe1, 0x1e,
- 0x98, 0x24, 0x81, 0x01,
- 0xc2, 0x2d, 0xac, 0x14,
- 0x40, 0x00, 0x4c, 0x15,
- 0xdc, 0x00, 0x42, 0x20,
- 0xc0, 0x00, 0x56, 0x25,
- 0xc0, 0x00, 0x0c, 0x35,
- 0x44, 0x30, 0x09, 0x34,
- 0xa8, 0xf1, 0xdc, 0x00,
- 0x4c, 0x35, 0xc6, 0x2d,
- 0x16, 0x15, 0xc0, 0x00,
- 0xc7, 0x1d, 0xc0, 0x00,
- 0xc0, 0x00, 0x56, 0x35,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x84, 0x9b, 0x11, 0x1e,
- 0x93, 0x4e, 0x95, 0x5e,
- 0x97, 0x3e, 0x8f, 0x0e,
- 0xb3, 0x14, 0x8c, 0x08,
- 0x19, 0x1e, 0xa1, 0x0b,
- 0x9d, 0x1e, 0x81, 0x11,
- 0x84, 0x45, 0x9b, 0x1e,
- 0xe0, 0x04, 0x00, 0x02,
- 0x85, 0xb3, 0x81, 0x13,
- 0x8b, 0xf3, 0x99, 0x04,
- 0xe5, 0x80, 0x00, 0x00,
- 0xf8, 0x60, 0x40, 0x15,
- 0xf8, 0x30, 0x40, 0x15,
- 0x40, 0x15, 0xc1, 0x1e,
- 0x40, 0x15, 0xe0, 0x2c,
- 0x97, 0x04, 0xe0, 0x5c,
- 0xa1, 0x0b, 0x82, 0x08,
- 0x31, 0xb4, 0xa2, 0x25,
- 0xaf, 0x84, 0x81, 0x71,
- 0x13, 0x24, 0xad, 0xa4,
- 0xe0, 0x84, 0x00, 0x74,
- 0x7c, 0x00, 0x04, 0x43,
- 0xf0, 0x80, 0x42, 0x22,
- 0xe0, 0x90, 0x02, 0x23,
- 0x82, 0x45, 0x84, 0x4d,
- 0x06, 0x74, 0x19, 0x04,
- 0x80, 0x33, 0xe0, 0x88,
- 0x02, 0x55, 0x86, 0x1b,
- 0x84, 0x04, 0xf0, 0x30,
- 0x19, 0x04, 0x85, 0xf5,
- 0xe0, 0x88, 0x06, 0x74,
- 0x44, 0x42, 0x09, 0x2e,
- 0x0d, 0x7e, 0xfa, 0x08,
- 0x00, 0x33, 0x82, 0x21,
- 0x06, 0x1b, 0xa8, 0x23,
- 0xe6, 0x40, 0x0c, 0x30,
- 0xf0, 0x30, 0x02, 0x55,
- 0x02, 0xc5, 0x84, 0x04,
- 0x05, 0x13, 0xe0, 0x60,
- 0xec, 0x04, 0x04, 0x40,
- 0x8b, 0x4e, 0x85, 0x33,
- 0xe8, 0x00, 0x31, 0x3c,
- 0x70, 0x88, 0x4e, 0xa2,
- 0x82, 0x71, 0x82, 0x21,
- 0xe1, 0xaa, 0x4e, 0x7a,
- 0x10, 0x45, 0xc4, 0x77,
- 0x88, 0x03, 0xfc, 0x1c,
- 0xe4, 0x44, 0x84, 0x0e,
- 0x8c, 0x5e, 0x88, 0x53,
- 0xfc, 0x1c, 0x16, 0x45,
- 0x98, 0xce, 0x88, 0xc3,
- 0x8b, 0x44, 0x8d, 0x74,
- 0x20, 0x51, 0x89, 0x24,
- 0xe0, 0x88, 0x0c, 0x74,
- 0x08, 0x44, 0x4b, 0x57,
- 0x0c, 0x5e, 0xfb, 0x80,
- 0x1e, 0x55, 0xca, 0x0d,
- 0x40, 0x02, 0x40, 0x30,
- 0x06, 0x74, 0xd1, 0x94,
- 0x82, 0x21, 0x40, 0x88,
- 0xfa, 0x80, 0x18, 0xa4,
- 0xd0, 0x94, 0x46, 0x32,
- 0x40, 0x60, 0x46, 0x05,
- 0xf1, 0x90, 0x46, 0x22,
- 0x06, 0x34, 0x0f, 0x04,
- 0x00, 0x09, 0xfb, 0x00,
- 0x19, 0x04, 0xe0, 0x30,
- 0x80, 0x63, 0xa1, 0x0b,
- 0xe6, 0x40, 0x00, 0x60,
- 0xc0, 0x00, 0x00, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0x00, 0x00, 0x40, 0x25,
- 0x80, 0x00, 0x04, 0x06,
- 0xa6, 0x04, 0x91, 0x44,
- 0x50, 0x58, 0x84, 0x14,
- 0xe4, 0xd0, 0x08, 0xf0,
- 0x08, 0xf0, 0x7c, 0x4e,
- 0xbe, 0x4e, 0xe4, 0xe0,
- 0x95, 0x44, 0xbc, 0xce,
- 0xe8, 0x00, 0x62, 0x08,
- 0x82, 0x71, 0x21, 0x0b,
- 0x80, 0x34, 0x1e, 0x15,
- 0x80, 0xc0, 0x4c, 0x15,
- 0x86, 0x18, 0x97, 0x14,
- 0xde, 0xd5, 0x83, 0x7d,
- 0x02, 0x0b, 0x80, 0x1b,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x1e, 0x05, 0xa9, 0x0e,
- 0x97, 0x2e, 0xe0, 0xac,
- 0xe0, 0xb4, 0x1e, 0x25,
- 0x1e, 0x05, 0x9d, 0x0e,
- 0x19, 0x5e, 0xe0, 0xa0,
- 0xe6, 0x40, 0x18, 0x20,
- 0x99, 0x51, 0x15, 0x1e,
- 0x1e, 0x05, 0xa3, 0x0e,
- 0x1e, 0x15, 0xe0, 0x9c,
- 0x1e, 0x65, 0xe0, 0xb0,
- 0x13, 0x0e, 0xe0, 0xa8,
- 0x1e, 0xb5, 0x81, 0x01,
- 0x1e, 0x75, 0xe0, 0xa4,
- 0xbd, 0x0e, 0xe0, 0x98,
- 0xb9, 0x0e, 0xbb, 0x0e,
- 0xb5, 0x0e, 0xb7, 0x0e,
- 0xb1, 0x0e, 0xb3, 0x0e,
- 0x81, 0x45, 0xaf, 0x0e,
- 0x0a, 0x50, 0x71, 0x0c,
- 0xa1, 0x5b, 0xec, 0x04,
- 0x29, 0x54, 0xfe, 0x95,
- 0xe6, 0x40, 0x14, 0x20,
- 0x12, 0x10, 0x1b, 0x7e,
- 0x25, 0x6e, 0xe4, 0xc0,
- 0xe5, 0x80, 0x0c, 0x40,
- 0x65, 0x01, 0x18, 0x50,
- 0x0a, 0x50, 0x40, 0x02,
- 0xc0, 0x04, 0x66, 0x01,
- 0x10, 0x10, 0x21, 0xce,
- 0x1f, 0x5e, 0xe6, 0x40,
- 0xe0, 0x08, 0x44, 0x96,
- 0x81, 0x71, 0x27, 0x3e,
- 0x93, 0x95, 0xab, 0xbe,
- 0x02, 0x0a, 0xa4, 0x14,
- 0xc7, 0xff, 0x63, 0xfd,
- 0xa1, 0x0b, 0x8a, 0x05,
- 0x25, 0xb4, 0x86, 0xd5,
- 0xad, 0x2e, 0x96, 0x3b,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0x78, 0x30, 0x0c, 0x13,
- 0xa3, 0x24, 0x96, 0x4b,
- 0x6b, 0x58, 0xa9, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x03, 0x82, 0xb5,
- 0x81, 0x21, 0x78, 0xc0,
- 0x78, 0x30, 0x0c, 0x13,
- 0xab, 0x34, 0x96, 0x4b,
- 0x6a, 0x98, 0xa1, 0x54,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xa7, 0x34, 0x84, 0x45,
- 0xad, 0x24, 0xab, 0xb4,
- 0xe2, 0xa4, 0x04, 0x0a,
- 0x0f, 0xfc, 0x43, 0xf6,
- 0x80, 0x08, 0x44, 0x96,
- 0x80, 0x00, 0x54, 0x13,
- 0x88, 0x91, 0x02, 0x71,
- 0x84, 0x61, 0x04, 0xa1,
- 0x84, 0x81, 0x0d, 0x85,
- 0x81, 0x21, 0x2b, 0xb4,
- 0xf8, 0xc0, 0x0c, 0x03,
- 0xf8, 0x30, 0x0c, 0x13,
- 0x96, 0x3b, 0x1d, 0x44,
- 0x68, 0xb8, 0x9f, 0x54,
- 0x27, 0x34, 0xe8, 0x00,
- 0xad, 0x24, 0xa1, 0x0b,
- 0x20, 0x02, 0xf8, 0x95,
- 0xe5, 0xa0, 0x04, 0xf0,
- 0x06, 0xf0, 0x18, 0x12,
- 0x3e, 0x2e, 0xe5, 0xd0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0x96, 0x03, 0x11, 0x3e,
- 0xe1, 0xae, 0x40, 0x0a,
- 0xbc, 0x3e, 0x9b, 0xb4,
- 0x2b, 0x34, 0xad, 0x0e,
- 0xa1, 0x44, 0x96, 0x2b,
- 0xef, 0xfc, 0x4c, 0xe8,
- 0x00, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0xc0,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x96, 0x2b, 0x11, 0x04,
- 0xa9, 0x44, 0xab, 0x34,
- 0x2d, 0x04, 0xbc, 0x0e,
- 0x4b, 0xf8, 0x86, 0xbb,
- 0x97, 0x04, 0xef, 0xfc,
- 0xe0, 0x30, 0x00, 0x09,
- 0x84, 0x05, 0xa1, 0x0b,
- 0x65, 0x70, 0x00, 0xf0,
- 0xe5, 0x80, 0x04, 0xf0,
- 0x0a, 0xf0, 0x18, 0x12,
- 0x3e, 0x0e, 0xe5, 0x90,
- 0xbc, 0x2e, 0x96, 0x3b,
- 0x9b, 0x24, 0xad, 0x04,
- 0x4a, 0xb8, 0x9f, 0x44,
- 0xbd, 0x04, 0xef, 0xfc,
- 0x99, 0x24, 0x95, 0x14,
- 0xbb, 0x04, 0xad, 0x0e,
- 0xb5, 0x34, 0xb3, 0xb4,
- 0x84, 0x1a, 0x91, 0x0e,
- 0x8b, 0x2e, 0x8d, 0xae,
- 0xaf, 0x04, 0x93, 0x24,
- 0x89, 0x2e, 0xb1, 0xc4,
- 0xfc, 0xbe, 0xfe, 0x0e,
- 0xbe, 0xce, 0xab, 0xb4,
- 0xb9, 0x44, 0xbc, 0x3e,
- 0x9b, 0x04, 0xb7, 0x54,
- 0x91, 0x34, 0xad, 0x24,
- 0xe8, 0x18, 0x75, 0x68,
- 0x81, 0x01, 0x00, 0x2b,
- 0xf1, 0xd5, 0xa7, 0x34,
- 0x83, 0x7d, 0x8e, 0x18,
- 0x1e, 0xf0, 0xd8, 0xd5,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x3e, 0x2e,
- 0x00, 0x50, 0x00, 0x9b,
- 0x19, 0x11, 0xe7, 0x60,
- 0x81, 0x85, 0x81, 0x21,
- 0x78, 0x60, 0x40, 0x23,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x30, 0x40, 0x23,
- 0xa1, 0x1b, 0xc1, 0x2c,
- 0x0c, 0x50, 0xfe, 0x15,
- 0x0e, 0x40, 0x67, 0x60,
- 0x7c, 0x3e, 0xe4, 0xc0,
- 0xbe, 0xb4, 0x81, 0xa1,
- 0x9c, 0x04, 0x85, 0xd5,
- 0x63, 0xfd, 0x00, 0x0a,
- 0x88, 0xa5, 0xc7, 0xff,
- 0x78, 0x30, 0x0e, 0x15,
- 0xa0, 0x24, 0x96, 0x0b,
- 0xe0, 0x42, 0xa4, 0x3a,
- 0x42, 0x98, 0xe4, 0x58,
- 0x09, 0x0e, 0xe8, 0x00,
- 0x9c, 0x14, 0x96, 0x0b,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x42, 0x08,
- 0x96, 0x0b, 0x7e, 0x0e,
- 0xe0, 0x30, 0x0e, 0x15,
- 0xa4, 0x3a, 0xa0, 0x24,
- 0xe4, 0x58, 0xe0, 0x42,
- 0xe8, 0x00, 0x41, 0x68,
- 0xfc, 0x34, 0xfe, 0x14,
- 0xf8, 0x60, 0x4c, 0x13,
- 0x98, 0x0c, 0x89, 0x14,
- 0xf8, 0x30, 0x4c, 0x13,
- 0x84, 0x61, 0x02, 0xa1,
- 0x8e, 0x08, 0x88, 0x71,
- 0xf4, 0x55, 0x81, 0xad,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x18, 0x0e, 0x24, 0x13,
- 0x44, 0x1a, 0xf0, 0x00,
- 0x40, 0x1a, 0xe4, 0x82,
- 0x02, 0x24, 0xe4, 0x02,
- 0x82, 0xcf, 0xe1, 0x7c,
- 0x81, 0x01, 0x00, 0xc3,
- 0xf2, 0x84, 0x42, 0x22,
- 0x64, 0x01, 0x04, 0xc0,
- 0x42, 0x12, 0xc0, 0x80,
- 0x18, 0x14, 0xf2, 0x80,
- 0xe1, 0xc7, 0xe1, 0x7c,
- 0x42, 0x12, 0x98, 0x23,
- 0xe1, 0x27, 0x72, 0x80,
- 0xa2, 0x2f, 0xe0, 0x17,
- 0x08, 0x0e, 0x08, 0x23,
- 0x42, 0x2a, 0xff, 0x00,
- 0x44, 0x2a, 0xe4, 0x8e,
- 0x06, 0x14, 0xe4, 0x0e,
- 0x86, 0x4f, 0xe1, 0x7c,
- 0x42, 0x12, 0x88, 0x23,
- 0x04, 0x20, 0xf2, 0x8c,
- 0xc0, 0x08, 0x64, 0x01,
- 0xf2, 0x80, 0x42, 0x12,
- 0xe1, 0x7c, 0x06, 0x14,
- 0x86, 0x23, 0xe9, 0x37,
- 0x72, 0x80, 0x42, 0x12,
- 0xe8, 0x17, 0xd9, 0x27,
- 0x02, 0x0e, 0x22, 0x2f,
- 0x42, 0x22, 0xf8, 0x00,
- 0x02, 0x12, 0xfa, 0x04,
- 0xc0, 0x7f, 0x6b, 0xfd,
- 0x40, 0x10, 0xa1, 0x1d,
- 0xa0, 0x5d, 0x1c, 0x00,
- 0x40, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0x9c, 0x00,
- 0xfa, 0x3c, 0x04, 0xcc,
- 0x88, 0x6b, 0x00, 0x8b,
- 0x60, 0x2c, 0x10, 0x09,
- 0x01, 0xa1, 0x83, 0x41,
- 0x20, 0x34, 0xc8, 0x27,
- 0x21, 0x4f, 0x86, 0x7b,
- 0x0f, 0xae, 0x82, 0x0b,
- 0x0d, 0xae, 0x84, 0x1b,
- 0x52, 0x98, 0x88, 0x2b,
- 0x58, 0xae, 0xe8, 0x30,
- 0x1a, 0xae, 0x80, 0x9b,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x92, 0x1b, 0x0e, 0x0b,
- 0xe8, 0x30, 0x57, 0xa8,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x06, 0xf0, 0x0f, 0x04,
- 0x22, 0x14, 0xe4, 0x60,
- 0x58, 0x0e, 0x92, 0x2b,
- 0x53, 0x98, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x18, 0x1e, 0x05,
- 0x00, 0x04, 0x4c, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0xf2, 0x3c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x88, 0x9b, 0x00, 0x7b,
- 0x60, 0x2c, 0x0e, 0x09,
- 0x0e, 0x29, 0x84, 0x6b,
- 0x83, 0x51, 0x60, 0x30,
- 0x60, 0x10, 0x0e, 0x4b,
- 0x21, 0x5f, 0x81, 0xb1,
- 0x1c, 0x34, 0x86, 0xab,
- 0x7c, 0xbe, 0x82, 0x0b,
- 0xe8, 0x88, 0x04, 0x54,
- 0x88, 0x1b, 0x3e, 0xbe,
- 0xe8, 0x30, 0x4f, 0x08,
- 0x00, 0x90, 0x00, 0x8b,
- 0x01, 0x95, 0xe4, 0xc0,
- 0x41, 0xbe, 0x99, 0x11,
- 0xec, 0x04, 0x02, 0x10,
- 0xf8, 0x34, 0x40, 0xb5,
- 0xe0, 0x2c, 0x40, 0xb5,
- 0xfe, 0x15, 0xa1, 0x1b,
- 0x65, 0x80, 0x14, 0xa0,
- 0x05, 0xc5, 0xe0, 0x91,
- 0xa1, 0x0b, 0x81, 0x01,
- 0x28, 0x04, 0x88, 0xd5,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x68, 0x30, 0x53, 0x08,
- 0xa1, 0x0b, 0x90, 0x1b,
- 0x7c, 0x04, 0x86, 0xd5,
- 0xe4, 0x10, 0x06, 0xf0,
- 0xa4, 0x0e, 0x90, 0x2b,
- 0x9e, 0x14, 0xa8, 0x04,
- 0xe8, 0x30, 0x4e, 0xe8,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x06, 0xf0, 0x3e, 0x04,
- 0x90, 0x2b, 0xe4, 0x10,
- 0xf8, 0x30, 0x52, 0x05,
- 0xe0, 0x60, 0x14, 0x05,
- 0x4e, 0x18, 0x9e, 0x14,
- 0xa1, 0x0b, 0xe8, 0x30,
- 0x80, 0x04, 0x1e, 0x05,
- 0x00, 0x30, 0x52, 0x05,
- 0x80, 0x00, 0x00, 0x06,
- 0x88, 0xa1, 0x02, 0xb1,
- 0x9a, 0x18, 0x88, 0x91,
- 0xf4, 0x95, 0x83, 0xbd,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x7b, 0x11, 0x24,
- 0x88, 0x9b, 0x15, 0xa4,
- 0xff, 0x81, 0x13, 0xb4,
- 0x41, 0xf6, 0xa1, 0x2b,
- 0x4c, 0x96, 0x0f, 0xfc,
- 0x8a, 0x05, 0x80, 0x08,
- 0x44, 0x2a, 0x2b, 0x3f,
- 0x46, 0x3a, 0xe6, 0x8a,
- 0x81, 0x61, 0x66, 0x8e,
- 0x42, 0x3a, 0x8f, 0x1e,
- 0x46, 0x3a, 0xe5, 0x02,
- 0x00, 0x24, 0x65, 0x82,
- 0x82, 0x03, 0xe1, 0x84,
- 0x72, 0x98, 0x42, 0x32,
- 0x73, 0x98, 0x81, 0x31,
- 0x0f, 0x24, 0xef, 0xec,
- 0x41, 0xfe, 0x91, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0x5f, 0xfc, 0x41, 0xfe,
- 0x02, 0x94, 0xa1, 0x9b,
- 0x81, 0x81, 0x41, 0x84,
- 0x50, 0x9c, 0x42, 0x12,
- 0x50, 0x1a, 0x84, 0x73,
- 0x80, 0x73, 0x40, 0x26,
- 0x40, 0x8a, 0x8e, 0x83,
- 0xac, 0x8e, 0xf0, 0x0a,
- 0x8c, 0x0b, 0x28, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe6, 0x82, 0x40, 0x1a,
- 0x64, 0x01, 0x00, 0x00,
- 0xdf, 0x07, 0xc0, 0x40,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x5d, 0x93, 0xc0, 0x3f,
- 0xfb, 0x80, 0x00, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x7b, 0x04, 0x9b,
- 0x81, 0x61, 0x00, 0x5b,
- 0x81, 0x11, 0x12, 0x0b,
- 0x81, 0xb1, 0x01, 0xa1,
- 0x03, 0x0a, 0x81, 0xc5,
- 0x82, 0x75, 0xe2, 0x3c,
- 0xf0, 0x08, 0x00, 0x25,
- 0xf8, 0x04, 0x00, 0x45,
- 0x56, 0x42, 0x84, 0xa3,
- 0x82, 0x11, 0x72, 0xac,
- 0xfc, 0x95, 0x8f, 0x1d,
- 0x60, 0x00, 0x17, 0x4a,
- 0xe1, 0x84, 0x00, 0xa4,
- 0x60, 0x00, 0x16, 0x1a,
- 0xe0, 0xfc, 0x02, 0xb4,
- 0x60, 0x00, 0x14, 0x6a,
- 0x7e, 0x0e, 0xa2, 0x0f,
- 0xe5, 0x80, 0x42, 0x0a,
- 0x61, 0x88, 0x42, 0x1a,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x42, 0x2a, 0x7c, 0x0e,
- 0x3e, 0x3e, 0xed, 0x80,
- 0xe4, 0x30, 0x10, 0x30,
- 0x5e, 0x27, 0x89, 0x5e,
- 0x89, 0xa5, 0xe0, 0x5c,
- 0x60, 0x1c, 0x4c, 0xca,
- 0x44, 0x0a, 0x81, 0x01,
- 0x40, 0x0a, 0xe1, 0x80,
- 0x8e, 0xe5, 0xe9, 0x9c,
- 0x81, 0x01, 0x26, 0x24,
- 0x04, 0xca, 0xa4, 0x14,
- 0x04, 0x1a, 0xe0, 0x00,
- 0x02, 0x2a, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x1e, 0x27, 0xe1, 0x88,
- 0x42, 0x0a, 0xe0, 0x5c,
- 0x8a, 0xa5, 0xed, 0x80,
- 0x64, 0x7c, 0x0b, 0x0a,
- 0x00, 0x50, 0x82, 0x3b,
- 0x46, 0x20, 0x6c, 0x80,
- 0x44, 0x52, 0x9c, 0x00,
- 0x02, 0x06, 0x7b, 0x80,
- 0x00, 0x22, 0xc0, 0x00,
- 0x20, 0x23, 0xec, 0x7c,
- 0xef, 0x80, 0x08, 0x14,
- 0x6c, 0x00, 0x0a, 0x04,
- 0x7e, 0x04, 0xa1, 0x3f,
- 0x48, 0x52, 0xa1, 0x1f,
- 0x04, 0x22, 0x78, 0x90,
- 0xa8, 0x3f, 0xec, 0x04,
- 0x82, 0x03, 0x7c, 0x14,
- 0x94, 0x2b, 0x25, 0x3f,
- 0x72, 0x84, 0x42, 0x32,
- 0x69, 0xf8, 0x96, 0x3b,
- 0x09, 0x54, 0xef, 0xec,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x82, 0x61, 0x61, 0x0c,
- 0x0c, 0x0a, 0x90, 0x91,
- 0xec, 0xb5, 0xe2, 0x40,
- 0xb0, 0xf1, 0x3e, 0x04,
- 0xe0, 0x18, 0x40, 0x71,
- 0xe0, 0x1c, 0x40, 0x51,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x02, 0x10, 0x0a, 0x28,
- 0x08, 0x14, 0xec, 0x04,
- 0xe0, 0x31, 0x61, 0xfc,
- 0x83, 0x41, 0x08, 0x13,
- 0x83, 0x17, 0x03, 0xa5,
- 0x78, 0x30, 0x06, 0x5b,
- 0xec, 0x04, 0x04, 0x20,
- 0x82, 0x60, 0x80, 0xc0,
- 0x46, 0xc3, 0x8a, 0xc3,
- 0xcd, 0x5a, 0xf8, 0x60,
- 0x0a, 0xc4, 0x0a, 0x63,
- 0x18, 0x64, 0xfb, 0x00,
- 0x4a, 0x42, 0x7b, 0x00,
- 0x46, 0x63, 0xf1, 0x94,
- 0x98, 0x53, 0x60, 0x2c,
- 0xfb, 0x14, 0x4a, 0x12,
- 0xe0, 0x5c, 0x46, 0x53,
- 0xf8, 0xf5, 0xa1, 0x2b,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x60, 0x88, 0x0c, 0x34,
- 0x01, 0x45, 0x8a, 0x7b,
- 0xf0, 0x98, 0x58, 0x52,
- 0xd9, 0x7d, 0xdd, 0x2e,
- 0x06, 0x13, 0xfe, 0xd5,
- 0x44, 0x0a, 0x86, 0x03,
- 0x82, 0x11, 0x61, 0x8e,
- 0x61, 0x8e, 0x46, 0x1a,
- 0xf0, 0x98, 0x40, 0x42,
- 0x0c, 0x34, 0xc4, 0x27,
- 0x42, 0x42, 0x60, 0x88,
- 0x46, 0x52, 0xf0, 0x88,
- 0x44, 0x42, 0x70, 0x88,
- 0x81, 0x95, 0xf0, 0x98,
- 0xc1, 0x1d, 0xc5, 0x64,
- 0x42, 0x40, 0xcd, 0x6e,
- 0xd9, 0x3d, 0x1c, 0x00,
- 0x9c, 0x00, 0x46, 0x50,
- 0xfc, 0xf5, 0x85, 0x1b,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x00, 0x34, 0x00, 0x8b,
- 0x06, 0x03, 0xe1, 0xfc,
- 0x1f, 0x14, 0x82, 0xbb,
- 0x0d, 0x3e, 0x83, 0x07,
- 0x1d, 0x34, 0x8a, 0x6b,
- 0x23, 0x74, 0x84, 0x5b,
- 0x21, 0xa4, 0xa0, 0x2b,
- 0x3e, 0x1e, 0x82, 0x9b,
- 0x0b, 0x4e, 0x90, 0x0b,
- 0x7e, 0x2e, 0x81, 0x41,
- 0x09, 0x3e, 0xaa, 0x23,
- 0x3c, 0x3e, 0x96, 0x1b,
- 0x7c, 0x5e, 0x8a, 0x3b,
- 0x6c, 0xd8, 0x8c, 0x5b,
- 0xa1, 0x0b, 0xef, 0xf8,
- 0x09, 0x04, 0x86, 0x75,
- 0x3e, 0xae, 0x81, 0x41,
- 0x7e, 0x24, 0x96, 0x1b,
- 0x3c, 0x0e, 0x8c, 0x5b,
- 0x8d, 0x34, 0x90, 0x0b,
- 0xef, 0xf8, 0x6c, 0x08,
- 0x82, 0xd5, 0xa1, 0x0b,
- 0x81, 0x41, 0x0d, 0x24,
- 0x96, 0x1b, 0x7e, 0x04,
- 0x8c, 0x5b, 0x3e, 0x7e,
- 0x09, 0x04, 0xfc, 0x34,
- 0x3c, 0x0e, 0x80, 0x23,
- 0x6b, 0x18, 0x90, 0x0b,
- 0x16, 0x1b, 0xef, 0xf8,
- 0x0b, 0x64, 0x96, 0x8d,
- 0x09, 0x0e, 0x8c, 0xbb,
- 0x0a, 0x55, 0x94, 0x4b,
- 0x25, 0x94, 0x92, 0x0b,
- 0xfa, 0x20, 0x42, 0x12,
- 0xb0, 0x13, 0x82, 0x11,
- 0xa7, 0x14, 0x83, 0x13,
- 0x83, 0xb3, 0x8d, 0x1e,
- 0xe8, 0x00, 0x31, 0xec,
- 0x70, 0xa0, 0x46, 0xb2,
- 0x46, 0x3a, 0x80, 0x1b,
- 0x82, 0x81, 0x61, 0xae,
- 0x00, 0xa5, 0xc4, 0x37,
- 0x88, 0x0b, 0x7c, 0x0c,
- 0x7c, 0x0c, 0x08, 0x55,
- 0xf0, 0x8c, 0x44, 0x92,
- 0xfc, 0x0c, 0x0e, 0xc5,
- 0x71, 0x98, 0x48, 0xa2,
- 0x0a, 0x43, 0x8c, 0xa3,
- 0x38, 0x43, 0xb4, 0x53,
- 0x08, 0x4e, 0x98, 0x53,
- 0x0d, 0x14, 0x80, 0x4b,
- 0x82, 0x33, 0x82, 0x0b,
- 0x09, 0x04, 0x8c, 0x5e,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x80, 0xbb, 0x29, 0x04,
- 0x82, 0x8b, 0x2f, 0x74,
- 0x43, 0xfe, 0x13, 0x4e,
- 0xc0, 0x01, 0x7f, 0xfd,
- 0x8a, 0x6b, 0x0f, 0x2e,
- 0xb1, 0x44, 0xb3, 0x24,
- 0x81, 0x01, 0x7e, 0x0e,
- 0x9c, 0x0e, 0x91, 0x3e,
- 0x97, 0x0e, 0x99, 0x0e,
- 0x41, 0xf6, 0x15, 0x0e,
- 0x8b, 0x4e, 0xe0, 0x0c,
- 0x8d, 0x2e, 0x90, 0x0c,
- 0xad, 0x94, 0x88, 0x1e,
- 0x91, 0xa4, 0xab, 0x54,
- 0x40, 0x62, 0x89, 0x7e,
- 0x42, 0x0a, 0xf0, 0xac,
- 0xc4, 0x17, 0xe1, 0x9a,
- 0xfc, 0x04, 0x0a, 0x25,
- 0x84, 0xa5, 0xa1, 0x2b,
- 0x84, 0xe5, 0xa1, 0x2d,
- 0xfc, 0x04, 0x12, 0x15,
- 0x8e, 0x95, 0xa1, 0x1d,
- 0x40, 0x0a, 0x82, 0x01,
- 0xc4, 0x07, 0xe1, 0x9a,
- 0xfc, 0x00, 0x0a, 0x15,
- 0x8c, 0x95, 0xa1, 0x1d,
- 0x7c, 0x00, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x81, 0xa5, 0x8a, 0xf5,
- 0xfc, 0x04, 0x12, 0x05,
- 0x8a, 0x45, 0xa1, 0x0b,
- 0x7c, 0x04, 0x12, 0x05,
- 0x82, 0x0d, 0xff, 0x11,
- 0x03, 0x01, 0x88, 0xa5,
- 0xe4, 0xb0, 0x02, 0xf0,
- 0x8a, 0x7b, 0x1c, 0x0e,
- 0x0a, 0xf0, 0x0b, 0x04,
- 0x14, 0x2b, 0xe4, 0xc0,
- 0x00, 0xbc, 0x8c, 0x3b,
- 0xe4, 0xa0, 0x00, 0xf0,
- 0x96, 0x0b, 0x3e, 0x0e,
- 0x8f, 0x14, 0xbc, 0x1e,
- 0x56, 0x58, 0xfe, 0x44,
- 0x0d, 0x04, 0xef, 0xf8,
- 0x99, 0x24, 0x96, 0x1b,
- 0x3e, 0x0e, 0x97, 0x34,
- 0x95, 0x44, 0x94, 0x0b,
- 0x93, 0x54, 0xbc, 0x6e,
- 0xef, 0xf8, 0x68, 0x08,
- 0x8e, 0x5b, 0x09, 0x74,
- 0xe2, 0xa4, 0x00, 0x0a,
- 0x81, 0x01, 0x80, 0x75,
- 0x82, 0xb1, 0x9c, 0x0e,
- 0x80, 0x85, 0x91, 0xbd,
- 0xa1, 0x0b, 0x9c, 0x04,
- 0x01, 0x01, 0xea, 0xe5,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x60, 0x14, 0x0c, 0x19,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x94, 0x75, 0xf4, 0x1d,
- 0xe0, 0x18, 0x0c, 0x29,
- 0x92, 0xf5, 0xf0, 0x2d,
- 0xe6, 0x86, 0x50, 0x2a,
- 0xe5, 0x00, 0x11, 0x0a,
- 0x19, 0x21, 0x92, 0x55,
- 0x76, 0xd8, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xec,
- 0x64, 0x30, 0x00, 0x70,
- 0xe0, 0x04, 0x02, 0x06,
- 0x81, 0x91, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0x60, 0xfe, 0x95,
- 0x81, 0xb1, 0x64, 0x90,
- 0x81, 0x11, 0x01, 0x95,
- 0xe5, 0x00, 0x02, 0x8a,
- 0x41, 0x24, 0x80, 0xe5,
- 0x56, 0x22, 0x82, 0x11,
- 0xd1, 0x1d, 0xfa, 0xac,
- 0x00, 0xb4, 0xfe, 0x15,
- 0xd8, 0xb7, 0x61, 0xd0,
- 0x98, 0x71, 0x0f, 0x0e,
- 0x81, 0xa1, 0x48, 0x61,
- 0x81, 0x01, 0x03, 0xd5,
- 0x40, 0x96, 0x18, 0x24,
- 0xa1, 0x2b, 0xe0, 0x08,
- 0x0f, 0x14, 0x84, 0x85,
- 0xe1, 0x84, 0x00, 0x24,
- 0x81, 0x31, 0x16, 0x03,
- 0x6f, 0xec, 0x50, 0x08,
- 0xf2, 0xa4, 0x42, 0x12,
- 0x67, 0xfd, 0x00, 0x8a,
- 0x41, 0xf6, 0xc0, 0xff,
- 0xa1, 0x1b, 0x0f, 0xfc,
- 0xcf, 0xfc, 0x41, 0xf6,
- 0x81, 0x01, 0x1c, 0x0c,
- 0x84, 0x71, 0x02, 0xa1,
- 0xd1, 0xad, 0x88, 0x61,
- 0x15, 0x0a, 0x80, 0xc5,
- 0x80, 0x75, 0xe4, 0xfc,
- 0xf6, 0xe5, 0xa1, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x86, 0x6b, 0x04, 0x88,
- 0x60, 0x10, 0x02, 0x19,
- 0x00, 0xa9, 0x81, 0x91,
- 0x06, 0x0e, 0x60, 0x10,
- 0xc0, 0x00, 0x72, 0xc0,
- 0x88, 0xbb, 0x1d, 0x9e,
- 0x42, 0x96, 0x7e, 0x1e,
- 0xc0, 0x01, 0x67, 0xb9,
- 0x8b, 0x1e, 0x80, 0x04,
- 0x11, 0x0e, 0x8d, 0x1e,
- 0x63, 0x21, 0x41, 0x56,
- 0x15, 0x0e, 0xc0, 0x01,
- 0x6e, 0xa1, 0x00, 0x06,
- 0x1b, 0x0e, 0xc0, 0x01,
- 0x8f, 0x1e, 0x84, 0x0b,
- 0x19, 0x1e, 0x93, 0x1e,
- 0x97, 0x3e, 0x8c, 0x1b,
- 0xe8, 0x00, 0x48, 0xc8,
- 0x6c, 0x04, 0x00, 0xa0,
- 0xe0, 0x08, 0x42, 0xc6,
- 0x74, 0x1c, 0x01, 0x0a,
- 0x09, 0x0e, 0x81, 0x01,
- 0x80, 0x88, 0x00, 0xa4,
- 0x04, 0x50, 0x02, 0xf0,
- 0xe0, 0x10, 0x10, 0x1a,
- 0x1c, 0x00, 0x02, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x00, 0x10, 0x5e, 0x05,
- 0x09, 0x04, 0xb1, 0x8b,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x08, 0x42, 0xc6,
- 0x42, 0xc6, 0xa1, 0x0b,
- 0xe5, 0xad, 0x00, 0x08,
- 0x8a, 0x95, 0xfc, 0x1e,
- 0xa1, 0x0b, 0xfc, 0x04,
- 0x7e, 0x14, 0x8a, 0x35,
- 0x0e, 0x0b, 0x90, 0x7b,
- 0x49, 0x98, 0x96, 0x2b,
- 0x18, 0xb1, 0xe8, 0x00,
- 0x04, 0x06, 0x81, 0x11,
- 0x96, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x72, 0xc8,
- 0xe6, 0x9e, 0x4e, 0x7a,
- 0x00, 0x06, 0x83, 0x75,
- 0xe7, 0xad, 0x61, 0x00,
- 0x84, 0x15, 0x9d, 0x0e,
- 0x00, 0xf0, 0x18, 0x34,
- 0x1a, 0x44, 0xe4, 0xe0,
- 0xe1, 0xec, 0x0b, 0x76,
- 0x90, 0x1b, 0x3e, 0x0e,
- 0xfe, 0x24, 0x89, 0x04,
- 0x92, 0x0b, 0x3c, 0x0e,
- 0xe8, 0x00, 0x40, 0xc8,
- 0x6d, 0x0c, 0x9d, 0x04,
- 0x93, 0x7b, 0x82, 0x91,
- 0x7c, 0x04, 0xfa, 0x35,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x61, 0x06, 0x4e, 0x0a,
- 0xe0, 0x88, 0x12, 0x24,
- 0x60, 0x06, 0x50, 0x0a,
- 0x0f, 0x44, 0x88, 0xcb,
- 0x4e, 0x9a, 0x86, 0x6b,
- 0x81, 0x11, 0x66, 0x9e,
- 0xe6, 0xa2, 0x50, 0x9a,
- 0x8e, 0x63, 0x0d, 0x34,
- 0x40, 0x2a, 0x10, 0xc3,
- 0x10, 0x1e, 0xe6, 0x8a,
- 0xf0, 0xa4, 0x4e, 0x62,
- 0x65, 0x0e, 0x44, 0x3a,
- 0xf0, 0xa4, 0x50, 0xc2,
- 0xe5, 0x8e, 0x46, 0x3a,
- 0x8f, 0xad, 0x81, 0xc5,
- 0x46, 0xaa, 0x56, 0xaa,
- 0xc4, 0x10, 0x14, 0xa0,
- 0xd0, 0xa4, 0x56, 0xb2,
- 0x42, 0x12, 0x7e, 0x35,
- 0x88, 0xc1, 0xd0, 0xac,
- 0x52, 0xca, 0x91, 0xcd,
- 0x54, 0x60, 0x46, 0xb2,
- 0xfc, 0x15, 0xdc, 0x00,
- 0xe1, 0x84, 0x18, 0x04,
- 0x42, 0x5a, 0x02, 0xc3,
- 0x40, 0xca, 0xe6, 0x96,
- 0x0c, 0x0c, 0xe0, 0x02,
- 0x81, 0x35, 0xf0, 0x7c,
- 0xc1, 0xc3, 0x8b, 0x45,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x48, 0x0a, 0x08, 0x6b,
- 0x40, 0x0a, 0xe5, 0x06,
- 0x0a, 0x24, 0x65, 0x86,
- 0x02, 0x44, 0xe1, 0x84,
- 0xe8, 0x47, 0x61, 0xb0,
- 0x18, 0x34, 0x68, 0x07,
- 0x20, 0x1f, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x34,
- 0x40, 0x42, 0xa0, 0x5f,
- 0x41, 0xb8, 0xf0, 0x94,
- 0x42, 0x12, 0x6f, 0xec,
- 0x04, 0x06, 0xf2, 0xb0,
- 0x40, 0x40, 0x60, 0x01,
- 0x84, 0x03, 0xff, 0x31,
- 0x81, 0x31, 0x07, 0x0b,
- 0x72, 0x8c, 0x42, 0x12,
- 0x9f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x40, 0x0a, 0xdf, 0xfc,
- 0x02, 0x04, 0xf0, 0x0a,
- 0x84, 0x13, 0xe1, 0x84,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x14, 0x44, 0x01,
- 0x08, 0x3c, 0x81, 0x31,
- 0x0a, 0x3c, 0xaf, 0x41,
- 0xfc, 0x00, 0x06, 0x14,
- 0x60, 0x18, 0x44, 0x01,
- 0xe4, 0x1c, 0x00, 0x30,
- 0x60, 0x1c, 0x44, 0x01,
- 0xec, 0x04, 0x00, 0x30,
- 0x60, 0x20, 0x44, 0x01,
- 0x44, 0x41, 0xc2, 0x17,
- 0x83, 0x01, 0x60, 0x10,
- 0xe0, 0x24, 0x44, 0x11,
- 0xe0, 0x28, 0x44, 0x11,
- 0xe0, 0x2c, 0x44, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x04, 0x2e, 0x00, 0x38,
- 0xa1, 0x3b, 0xff, 0xfc,
- 0x82, 0x08, 0x84, 0x45,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x71, 0x80, 0x48, 0x22,
- 0x26, 0x23, 0x90, 0x01,
- 0x40, 0x00, 0x90, 0x31,
- 0x40, 0x01, 0x73, 0xc1,
- 0x73, 0xc1, 0x46, 0x30,
- 0x06, 0x23, 0xc0, 0x01,
- 0x81, 0x35, 0x88, 0x03,
- 0xff, 0xfc, 0x00, 0x2e,
- 0x86, 0x0e, 0x84, 0x2e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x86, 0x7b, 0x09, 0x0e,
- 0x61, 0x84, 0x00, 0x14,
- 0xe0, 0xac, 0x06, 0x74,
- 0x88, 0x6b, 0x20, 0x23,
- 0x84, 0x13, 0x86, 0x23,
- 0xe1, 0x0e, 0x40, 0x1a,
- 0xe1, 0x0e, 0x42, 0x2a,
- 0xe1, 0xac, 0x04, 0x04,
- 0x61, 0x1e, 0x56, 0x2a,
- 0xe1, 0xac, 0x04, 0x14,
- 0xe1, 0x1e, 0x50, 0x2a,
- 0xe4, 0x04, 0x04, 0xb0,
- 0x61, 0x1e, 0x54, 0x2a,
- 0xe0, 0x80, 0x04, 0x06,
- 0x06, 0x84, 0x22, 0x23,
- 0x06, 0x23, 0xe0, 0xac,
- 0xf1, 0x84, 0x42, 0x02,
- 0x04, 0xb4, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xe0, 0xac,
- 0x3e, 0x0e, 0xa4, 0x03,
- 0x85, 0xb5, 0x90, 0x9b,
- 0x82, 0x35, 0x91, 0x9b,
- 0xe0, 0x2c, 0x52, 0x1a,
- 0xa0, 0x10, 0x1e, 0x05,
- 0xa0, 0x0c, 0x1e, 0x15,
- 0xa0, 0x00, 0x01, 0x68,
- 0xe0, 0x20, 0x52, 0x1a,
- 0xa0, 0x00, 0x00, 0x88,
- 0x52, 0x1a, 0x09, 0x04,
- 0x00, 0xf8, 0xe0, 0x2c,
- 0xc0, 0x00, 0x20, 0x01,
- 0x80, 0x10, 0x1e, 0x05,
- 0x80, 0x08, 0x1e, 0x15,
- 0x17, 0x9b, 0x80, 0xc5,
- 0x80, 0xb5, 0x81, 0x01,
- 0xbe, 0x14, 0x89, 0x04,
- 0xe8, 0x00, 0x4b, 0x08,
- 0x60, 0x88, 0x02, 0x94,
- 0x0c, 0x25, 0x82, 0x91,
- 0x8c, 0x13, 0x7c, 0x04,
- 0xe1, 0x1e, 0x52, 0x9a,
- 0x84, 0x2e, 0x80, 0x23,
- 0xf4, 0xb5, 0x95, 0x9b,
- 0xa8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x84, 0x7b, 0x02, 0x8b,
- 0x86, 0x6b, 0x00, 0x9b,
- 0x00, 0x06, 0x1c, 0x14,
- 0xe0, 0x24, 0xe0, 0x80,
- 0x43, 0x38, 0xa4, 0x34,
- 0xa0, 0x44, 0xe8, 0x00,
- 0x9e, 0x14, 0x98, 0x0e,
- 0x88, 0x0b, 0x60, 0x24,
- 0x42, 0xb8, 0xa4, 0x34,
- 0x9a, 0x0e, 0xe8, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x60, 0x24, 0x0e, 0x19,
- 0x10, 0x49, 0x83, 0x21,
- 0x86, 0x6b, 0x60, 0x24,
- 0x60, 0x28, 0x0e, 0x59,
- 0x1c, 0x04, 0x80, 0x9b,
- 0x22, 0x34, 0xa3, 0x2f,
- 0xe0, 0x90, 0x02, 0x44,
- 0x68, 0x2c, 0x48, 0x88,
- 0xe8, 0x94, 0x14, 0x24,
- 0x9c, 0x24, 0xa4, 0x14,
- 0x22, 0x34, 0x98, 0x0e,
- 0x04, 0x0b, 0xcf, 0x17,
- 0x47, 0xd8, 0x94, 0x2b,
- 0x1a, 0x0e, 0xe8, 0x2c,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x40, 0x3a, 0x00, 0x6b,
- 0x02, 0x7b, 0xe5, 0x0a,
- 0xe5, 0x8a, 0x42, 0x3a,
- 0x00, 0x00, 0x01, 0x81,
- 0xc0, 0x01, 0x67, 0xd1,
- 0x72, 0xa0, 0x42, 0x12,
- 0xe0, 0x3c, 0x44, 0x86,
- 0x6f, 0xe8, 0x71, 0x48,
- 0x7f, 0x21, 0x81, 0x31,
- 0x85, 0x0b, 0x81, 0x31,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x42, 0x7a, 0xdf, 0xfc,
- 0x44, 0x7a, 0xe5, 0x02,
- 0x00, 0x64, 0x65, 0x82,
- 0x82, 0x03, 0xe0, 0x9c,
- 0x72, 0xa0, 0x42, 0x22,
- 0xe0, 0xa0, 0x04, 0x64,
- 0xef, 0xe8, 0x6f, 0xe8,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0xc5, 0x0d, 0xc0, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0xa1, 0x1b, 0x00, 0x3f,
- 0x1f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x0c, 0xc0, 0x3f,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xa1, 0x1b, 0x00, 0x5b,
- 0x60, 0x08, 0x40, 0x96,
- 0x64, 0x00, 0x18, 0x50,
- 0x00, 0x06, 0xc0, 0x80,
- 0x07, 0x0a, 0x40, 0x00,
- 0x40, 0xc6, 0xe6, 0x40,
- 0x19, 0x0a, 0x40, 0x00,
- 0xc0, 0xff, 0x67, 0xfc,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x5c, 0x08, 0xa1, 0x0b,
- 0x18, 0x14, 0xda, 0x00,
- 0xa1, 0x5d, 0x61, 0xfc,
- 0xe0, 0x57, 0x02, 0xc3,
- 0xd6, 0x37, 0x03, 0xc7,
- 0xd1, 0x80, 0x18, 0xc4,
- 0x42, 0xca, 0x8a, 0xc3,
- 0x84, 0x13, 0xe0, 0x86,
- 0xe0, 0x00, 0x02, 0x12,
- 0xe1, 0x0e, 0x42, 0x1a,
- 0xdd, 0x93, 0x90, 0x1e,
- 0x65, 0x06, 0x44, 0x0a,
- 0x42, 0x0a, 0x81, 0x31,
- 0x00, 0x20, 0xe5, 0x86,
- 0xc0, 0x04, 0x64, 0x01,
- 0xf2, 0x8c, 0x42, 0x12,
- 0x5c, 0x08, 0xee, 0x1d,
- 0x41, 0xfe, 0x5a, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0xd7, 0x07, 0x6a, 0x17,
- 0xa2, 0x0f, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0x61, 0x7e, 0x3e,
- 0x88, 0xbb, 0x09, 0x2e,
- 0xe0, 0x34, 0x04, 0x09,
- 0x8d, 0x6e, 0xfc, 0x1e,
- 0xe8, 0x0d, 0x3e, 0x0e,
- 0x60, 0x24, 0x02, 0xa9,
- 0xe0, 0x00, 0x40, 0xc6,
- 0x15, 0x0a, 0x98, 0x15,
- 0x96, 0xb5, 0xe6, 0x40,
- 0x89, 0x04, 0xfc, 0x14,
- 0x75, 0x18, 0xfe, 0x34,
- 0x04, 0x10, 0x6f, 0xfc,
- 0xa1, 0x0b, 0xe4, 0x30,
- 0x7c, 0x04, 0x94, 0x95,
- 0x89, 0x14, 0x96, 0x3b,
- 0x72, 0xd8, 0xfe, 0x24,
- 0x00, 0xb0, 0xef, 0xfc,
- 0x81, 0x11, 0x64, 0x20,
- 0x55, 0x1d, 0x81, 0x75,
- 0x16, 0x25, 0x81, 0x21,
- 0x82, 0x11, 0x40, 0x04,
- 0x02, 0x0a, 0xc1, 0x2e,
- 0xfe, 0x15, 0xe2, 0x40,
- 0x89, 0x11, 0x7e, 0x04,
- 0xb0, 0x01, 0x01, 0x75,
- 0x78, 0x10, 0x40, 0x65,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc1, 0x6e,
- 0x09, 0x74, 0xfe, 0x55,
- 0x7e, 0x84, 0x90, 0xb1,
- 0xbc, 0xbe, 0x81, 0x01,
- 0xc0, 0x71, 0x7c, 0x94,
- 0xb0, 0x81, 0x05, 0xb5,
- 0x8a, 0x75, 0xa1, 0x0b,
- 0x90, 0x6b, 0x0b, 0x6e,
- 0x89, 0x84, 0xfe, 0x14,
- 0xf8, 0x10, 0x0e, 0x25,
- 0xa0, 0x04, 0x86, 0x14,
- 0x73, 0xd8, 0xa4, 0x34,
- 0x22, 0x24, 0xef, 0xfc,
- 0x1c, 0x04, 0x80, 0xbb,
- 0xe4, 0x60, 0x08, 0xf0,
- 0x60, 0x10, 0x12, 0x15,
- 0x76, 0x98, 0x94, 0x3b,
- 0x8c, 0x8b, 0x6f, 0xfc,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x78, 0x10, 0x50, 0xb5,
- 0x8d, 0x24, 0x94, 0x3b,
- 0x89, 0x04, 0xa0, 0x2e,
- 0x00, 0x14, 0xbc, 0x44,
- 0x68, 0x78, 0x96, 0x0b,
- 0x0b, 0x64, 0xef, 0xfc,
- 0x88, 0x81, 0x88, 0x71,
- 0xbe, 0x14, 0x82, 0x61,
- 0xf4, 0xb5, 0xc3, 0x6d,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x80, 0x6b, 0x06, 0x4a,
- 0x04, 0xc9, 0x84, 0x0a,
- 0x4c, 0x45, 0xe0, 0xc0,
- 0x02, 0x49, 0xed, 0xac,
- 0x4c, 0x05, 0xe0, 0x20,
- 0xc4, 0x0a, 0xed, 0xa8,
- 0xee, 0x24, 0x4c, 0x45,
- 0xe0, 0xcc, 0x04, 0x49,
- 0xed, 0xb0, 0x4c, 0x05,
- 0xe0, 0xc8, 0x04, 0x09,
- 0xe0, 0xc4, 0x04, 0x79,
- 0xed, 0xc0, 0x4c, 0x45,
- 0xe0, 0xd0, 0x04, 0x41,
- 0xed, 0xbc, 0x4c, 0x05,
- 0xe0, 0x2c, 0x04, 0x05,
- 0xed, 0xb4, 0x4c, 0xc5,
- 0xed, 0xb8, 0x4c, 0x75,
- 0xe0, 0xd4, 0x04, 0xc1,
- 0xe0, 0xd8, 0x04, 0x71,
- 0xed, 0xc4, 0x4c, 0x45,
- 0xe0, 0xe0, 0x04, 0x49,
- 0xee, 0x28, 0x4c, 0x05,
- 0xe0, 0xdc, 0x04, 0x01,
- 0xed, 0xc8, 0x4c, 0xc5,
- 0xed, 0xcc, 0x4c, 0x75,
- 0xed, 0xd4, 0x4c, 0x45,
- 0xe0, 0xf0, 0x04, 0x49,
- 0xe0, 0xe4, 0x04, 0xc9,
- 0xe0, 0xec, 0x04, 0x79,
- 0xed, 0xd0, 0x4c, 0x05,
- 0xe0, 0xe8, 0x04, 0x09,
- 0xed, 0xe4, 0x4c, 0x45,
- 0xed, 0xd8, 0x4c, 0xc5,
- 0xed, 0xe0, 0x4c, 0x75,
- 0x8a, 0xc4, 0x88, 0x44,
- 0xca, 0x84, 0xc8, 0x74,
- 0xe0, 0xf8, 0x04, 0x91,
- 0xe0, 0xfc, 0x04, 0xa1,
- 0x6d, 0xdc, 0x4c, 0x05,
- 0x4c, 0xc5, 0x81, 0x01,
- 0x4c, 0x75, 0xed, 0xf0,
- 0x4c, 0x85, 0xed, 0xf4,
- 0x4c, 0x95, 0xed, 0xf8,
- 0x4c, 0xa5, 0xee, 0x48,
- 0x4c, 0x05, 0xee, 0x4c,
- 0x4c, 0x45, 0xed, 0xe8,
- 0x06, 0x45, 0xed, 0xec,
- 0x04, 0xc5, 0xe0, 0x34,
- 0x04, 0x75, 0xe0, 0x10,
- 0x4c, 0x45, 0xe0, 0x14,
- 0x06, 0x45, 0xee, 0x50,
- 0x04, 0x85, 0xe0, 0x38,
- 0x04, 0x95, 0xe0, 0x18,
- 0x04, 0xa5, 0xe0, 0x1c,
- 0x4c, 0xc5, 0xe0, 0x20,
- 0x4c, 0x75, 0xee, 0x70,
- 0x4c, 0x95, 0xee, 0x74,
- 0x4c, 0xa5, 0xee, 0x7c,
- 0x83, 0xa1, 0x6e, 0x80,
- 0xee, 0x54, 0x4c, 0x45,
- 0xee, 0x78, 0x4c, 0x85,
- 0x04, 0xc5, 0x8c, 0x44,
- 0xa1, 0x94, 0xe0, 0x24,
- 0xee, 0x84, 0x4c, 0x45,
- 0xa4, 0x88, 0x8e, 0x44,
- 0x4c, 0x45, 0x9b, 0x74,
- 0xcc, 0x44, 0xee, 0x88,
- 0x4c, 0x45, 0xa7, 0xb4,
- 0xce, 0x44, 0xee, 0x8c,
- 0xee, 0x90, 0x4c, 0x45,
- 0xe0, 0x10, 0x06, 0x45,
- 0xee, 0x94, 0x4c, 0x45,
- 0xe0, 0x14, 0x06, 0x45,
- 0xee, 0x98, 0x4c, 0x45,
- 0xe0, 0x18, 0x06, 0x45,
- 0xee, 0x9c, 0x4c, 0x45,
- 0xe0, 0x1c, 0x06, 0x45,
- 0xee, 0xa0, 0x4c, 0x45,
- 0xe0, 0x20, 0x06, 0x45,
- 0xee, 0xa4, 0x4c, 0x45,
- 0xe0, 0x24, 0x06, 0x45,
- 0xee, 0xa8, 0x4c, 0x45,
- 0xe0, 0x28, 0x06, 0x45,
- 0xee, 0xac, 0x4c, 0x45,
- 0xe0, 0x2c, 0x06, 0x45,
- 0xee, 0xb0, 0x4c, 0x45,
- 0xe0, 0x30, 0x06, 0x35,
- 0xee, 0xb8, 0x4c, 0xc5,
- 0x4c, 0x35, 0x99, 0xc4,
- 0x97, 0x34, 0xee, 0xb4,
- 0x6d, 0x88, 0x4c, 0xc5,
- 0x7f, 0xfc, 0x59, 0xe6,
- 0x9f, 0x44, 0xc0, 0x20,
- 0xed, 0x84, 0x4c, 0x35,
- 0x4c, 0x85, 0xc8, 0x34,
- 0x9d, 0x84, 0xed, 0x80,
- 0x6d, 0x8c, 0x4c, 0x45,
- 0x67, 0xfc, 0x04, 0x30,
- 0x58, 0x2d, 0xc0, 0xff,
- 0xe0, 0x08, 0x18, 0x06,
- 0x01, 0x7c, 0x18, 0x34,
- 0x23, 0x44, 0xff, 0x21,
- 0x81, 0xc0, 0x18, 0xc4,
- 0x6d, 0x94, 0x4c, 0x75,
- 0x90, 0xb0, 0x46, 0x32,
- 0x18, 0x34, 0x25, 0x34,
- 0x4c, 0x85, 0x81, 0x40,
- 0x0e, 0x60, 0x6d, 0x90,
- 0xc0, 0x0d, 0x66, 0x00,
- 0xee, 0x34, 0x4c, 0x55,
- 0xee, 0x04, 0x4c, 0x25,
- 0x95, 0x34, 0xfc, 0x3e,
- 0x6d, 0xa4, 0x4c, 0xc5,
- 0xff, 0xf4, 0x59, 0xce,
- 0x6d, 0x9c, 0x4c, 0x45,
- 0xff, 0xf8, 0x08, 0x8e,
- 0x0c, 0x85, 0x99, 0x4b,
- 0x50, 0x82, 0xcd, 0x9c,
- 0x08, 0x40, 0x51, 0x90,
- 0x50, 0xa1, 0xcc, 0x04,
- 0xfc, 0xf5, 0xc0, 0x00,
- 0x6e, 0x3c, 0x4c, 0x05,
- 0x67, 0x00, 0x00, 0x60,
- 0x4c, 0x05, 0xc0, 0x06,
- 0x00, 0x60, 0x6d, 0x98,
- 0xc0, 0x02, 0x65, 0x00,
- 0x6e, 0x20, 0x4c, 0x35,
- 0xe0, 0x80, 0x06, 0x8a,
- 0x66, 0x01, 0x06, 0x60,
- 0x50, 0xc6, 0x40, 0x04,
- 0x4c, 0x65, 0xe0, 0x00,
- 0x4c, 0x05, 0xed, 0xa0,
- 0x4c, 0x35, 0xee, 0x2c,
- 0x4c, 0x25, 0xee, 0x30,
- 0x88, 0x75, 0xee, 0x14,
- 0xed, 0xf8, 0x0c, 0x35,
- 0xee, 0x28, 0x0c, 0x45,
- 0x86, 0xb5, 0x87, 0x4d,
- 0xed, 0xb4, 0x0c, 0x25,
- 0xe4, 0x08, 0x00, 0x20,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x61, 0x08, 0x18, 0x04,
- 0x58, 0x02, 0xa1, 0x01,
- 0xa9, 0xcd, 0xf1, 0xb0,
- 0xbe, 0xbe, 0x82, 0xd5,
- 0xed, 0xc4, 0x0c, 0xc5,
- 0xed, 0xc8, 0x0c, 0xb5,
- 0x80, 0xf5, 0x96, 0xcd,
- 0xee, 0x7c, 0x0c, 0xc5,
- 0xee, 0x80, 0x0c, 0xb5,
- 0x80, 0xc5, 0x96, 0xcd,
- 0x98, 0xf1, 0x10, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0xc5, 0xdd, 0x93,
- 0xaa, 0xcd, 0xed, 0xcc,
- 0x20, 0x41, 0xfe, 0x15,
- 0xa6, 0x43, 0x98, 0x33,
- 0xfc, 0x75, 0xa9, 0x4d,
- 0xed, 0xd0, 0x0c, 0x35,
- 0xfa, 0xf5, 0xac, 0x3d,
- 0xe4, 0x04, 0x06, 0x20,
- 0xe1, 0xfc, 0x08, 0x34,
- 0x46, 0x02, 0x06, 0x43,
- 0x83, 0x47, 0xf1, 0xb0,
- 0xf8, 0xb5, 0x89, 0x3d,
- 0xed, 0xb8, 0x0c, 0x45,
- 0xee, 0x24, 0x0c, 0xc5,
- 0x98, 0x43, 0x86, 0x43,
- 0xf6, 0xb5, 0x85, 0x4d,
- 0x6d, 0xd8, 0x0c, 0x45,
- 0x51, 0xf6, 0x91, 0x31,
- 0xa2, 0x4d, 0xe0, 0x0c,
- 0x3e, 0xb4, 0x82, 0xf5,
- 0x09, 0x06, 0xa1, 0x4b,
- 0x18, 0x86, 0x00, 0x00,
- 0x86, 0x05, 0x80, 0x00,
- 0x49, 0xf6, 0x23, 0x4b,
- 0x11, 0xc1, 0xe0, 0x0c,
- 0x84, 0x65, 0x89, 0x21,
- 0x3e, 0xb4, 0x83, 0x85,
- 0x49, 0xf6, 0xa5, 0x4b,
- 0x59, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x49, 0xf6,
- 0xe0, 0x0c, 0x59, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x58, 0x4c, 0x45,
- 0xee, 0x5c, 0x4c, 0xc5,
- 0xee, 0x60, 0x4c, 0x25,
- 0xed, 0xe0, 0x0c, 0x45,
- 0x82, 0x35, 0xa2, 0x4d,
- 0x84, 0xc5, 0xa1, 0x4b,
- 0x41, 0xf6, 0x23, 0x4b,
- 0x04, 0x65, 0xe0, 0x0c,
- 0x83, 0x75, 0x89, 0x21,
- 0x41, 0xf6, 0xa5, 0x4b,
- 0x47, 0xf6, 0x00, 0x0c,
- 0x82, 0x45, 0x80, 0x0c,
- 0x82, 0xf5, 0xa7, 0x4b,
- 0x60, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x45, 0xf6, 0x01, 0x45,
- 0x89, 0x21, 0xe0, 0x0c,
- 0xee, 0x64, 0x4c, 0x05,
- 0xee, 0x68, 0x4c, 0x35,
- 0xee, 0x6c, 0x4c, 0x25,
- 0x4c, 0x55, 0xc6, 0x0a,
- 0x40, 0x02, 0xee, 0x34,
- 0x4c, 0x05, 0xfa, 0x14,
- 0x8e, 0x0b, 0x6e, 0x34,
- 0xe8, 0x0c, 0x54, 0x48,
- 0x68, 0x0c, 0x46, 0xe8,
- 0x53, 0xb8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x68, 0x04,
- 0x68, 0x08, 0x72, 0x28,
- 0x0c, 0x05, 0x8e, 0x0b,
- 0x0c, 0x15, 0xee, 0x38,
- 0x4c, 0xa5, 0xee, 0x20,
- 0x4c, 0x05, 0xee, 0x18,
- 0xbe, 0x0d, 0x6e, 0x3c,
- 0x6e, 0x1c, 0x4c, 0xa5,
- 0x90, 0x84, 0x40, 0x02,
- 0x0e, 0x3c, 0x4c, 0x05,
- 0x00, 0x00, 0x82, 0x03,
- 0x81, 0x11, 0x6c, 0x04,
- 0xee, 0x40, 0x4c, 0x05,
- 0x6e, 0x44, 0x4c, 0x05,
- 0xbe, 0x1e, 0x81, 0x01,
- 0xbe, 0x04, 0x8f, 0x55,
- 0xe3, 0x1c, 0x01, 0x0a,
- 0xa1, 0xab, 0xd6, 0xd5,
- 0x0c, 0x05, 0x84, 0xd5,
- 0xa7, 0x0b, 0xee, 0x1c,
- 0xa5, 0x0b, 0x82, 0x25,
- 0xa3, 0x0b, 0x82, 0x65,
- 0x4a, 0xf8, 0x82, 0x95,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x6c, 0x18, 0x81, 0x85,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x55, 0x18, 0x81, 0x45,
- 0x8e, 0x0b, 0x68, 0x00,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x80, 0xf5, 0xa3, 0xab,
- 0x8e, 0x0b, 0x7c, 0x14,
- 0xfc, 0x38, 0x42, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x8a, 0x35, 0xa5, 0xab,
- 0x6e, 0x08, 0x0c, 0x15,
- 0x0c, 0x05, 0x87, 0x21,
- 0x84, 0x11, 0xee, 0x40,
- 0x4c, 0x15, 0x83, 0x0d,
- 0x40, 0x10, 0x4e, 0x40,
- 0x0c, 0x15, 0xdc, 0x00,
- 0x01, 0x0a, 0x6e, 0x28,
- 0x01, 0x16, 0xe0, 0x40,
- 0x4c, 0x05, 0x80, 0x00,
- 0x0c, 0x05, 0x8e, 0x40,
- 0x82, 0x0d, 0x6e, 0x20,
- 0x84, 0x04, 0x02, 0x10,
- 0x8e, 0x40, 0x4c, 0x15,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0xee, 0x3c, 0x0c, 0x15,
- 0xec, 0x38, 0x00, 0x00,
- 0x4c, 0x05, 0x80, 0x1d,
- 0x8e, 0x0b, 0x4e, 0x3c,
- 0xfc, 0x38, 0x56, 0x08,
- 0xee, 0x18, 0x0c, 0xa5,
- 0x88, 0x15, 0xa7, 0xab,
- 0x6e, 0x40, 0x0c, 0x05,
- 0x0c, 0x15, 0x87, 0x21,
- 0x01, 0x0a, 0xee, 0x08,
- 0x01, 0x16, 0xe0, 0x40,
- 0x84, 0x11, 0x00, 0x00,
- 0x0e, 0x40, 0x4c, 0x05,
- 0x0c, 0x05, 0x83, 0x0d,
- 0x4c, 0x15, 0xee, 0x20,
- 0x0c, 0x15, 0xce, 0x40,
- 0x40, 0x0a, 0xee, 0x3c,
- 0x00, 0x00, 0xe6, 0x8a,
- 0x80, 0x1d, 0xec, 0x18,
- 0x4e, 0x3c, 0x4c, 0x05,
- 0x50, 0x38, 0x8e, 0x0b,
- 0x0c, 0xa5, 0xe8, 0x08,
- 0x3e, 0x04, 0xee, 0x18,
- 0x82, 0x01, 0xaf, 0xab,
- 0x00, 0x0c, 0xbe, 0x0e,
- 0xa1, 0x0b, 0xe2, 0x00,
- 0x0c, 0x05, 0xe2, 0x65,
- 0x81, 0x11, 0x6e, 0x04,
- 0x26, 0x06, 0x82, 0x01,
- 0xfa, 0x80, 0x00, 0x04,
- 0x0c, 0x25, 0x83, 0x95,
- 0x00, 0x00, 0x6d, 0x9c,
- 0x0c, 0x45, 0xec, 0x04,
- 0x02, 0x23, 0xee, 0x20,
- 0x04, 0x33, 0x84, 0x11,
- 0x04, 0x53, 0xe0, 0x30,
- 0x58, 0x3a, 0xe0, 0x60,
- 0x46, 0x5a, 0xe1, 0x92,
- 0x44, 0xc3, 0xe1, 0x92,
- 0x46, 0x8a, 0xe0, 0x30,
- 0x46, 0x32, 0xe8, 0x30,
- 0x44, 0x33, 0xd0, 0x90,
- 0xa1, 0x0b, 0xe0, 0x60,
- 0x59, 0x95, 0xf8, 0xf5,
- 0xc1, 0xc3, 0x81, 0x81,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x54, 0x8e, 0x2d, 0x84,
- 0xc0, 0x10, 0x64, 0x11,
- 0x13, 0xae, 0xaf, 0x94,
- 0x63, 0xd1, 0x14, 0x4e,
- 0x91, 0xae, 0xc0, 0x10,
- 0x8d, 0x8e, 0x8f, 0x9e,
- 0xa1, 0xc4, 0xab, 0xa4,
- 0xa9, 0x74, 0xa5, 0x64,
- 0xa3, 0x84, 0xa7, 0x94,
- 0x89, 0x7e, 0x8b, 0xae,
- 0xfc, 0x6e, 0xfe, 0x9e,
- 0xbc, 0xce, 0xbe, 0x8e,
- 0xef, 0xfc, 0x57, 0x68,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xa1, 0x0d, 0xe0, 0x88,
- 0x0c, 0x15, 0x80, 0xb5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xa5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x0c, 0x15, 0x8b, 0xc5,
- 0x0c, 0x25, 0xe1, 0x40,
- 0x0c, 0x75, 0xe0, 0xa8,
- 0x46, 0x22, 0xe0, 0x18,
- 0x87, 0x0b, 0xf0, 0x84,
- 0x0c, 0x35, 0x82, 0x55,
- 0xa1, 0x3b, 0xe0, 0x7c,
- 0x0c, 0x35, 0x80, 0xd5,
- 0x46, 0x0a, 0xe0, 0x74,
- 0x92, 0x95, 0xe0, 0x80,
- 0xe1, 0xd0, 0x0c, 0x19,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x03, 0x21, 0x82, 0x25,
- 0x63, 0x38, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe8, 0x08,
- 0x4c, 0x05, 0xe0, 0xa8,
- 0x0c, 0x15, 0xe0, 0x88,
- 0x87, 0x51, 0x60, 0xc4,
- 0xe0, 0x34, 0x0c, 0x35,
- 0xe0, 0xa0, 0x0c, 0x45,
- 0xe0, 0xbc, 0x4c, 0x15,
- 0x48, 0x4a, 0x82, 0x33,
- 0x4a, 0x32, 0x66, 0x96,
- 0x09, 0x5d, 0xf1, 0x88,
- 0x4c, 0x55, 0x85, 0x51,
- 0x48, 0x42, 0x60, 0x98,
- 0x4c, 0x55, 0x90, 0x88,
- 0x06, 0x40, 0x60, 0x9c,
- 0x48, 0x32, 0x8c, 0x04,
- 0xc4, 0x2b, 0x71, 0x88,
- 0x18, 0x24, 0x44, 0x47,
- 0x0e, 0x55, 0xe0, 0x88,
- 0x98, 0x73, 0x7c, 0x10,
- 0xe0, 0xac, 0x0c, 0x45,
- 0x08, 0x25, 0xc4, 0x57,
- 0x0a, 0x34, 0xfc, 0x14,
- 0x8e, 0x53, 0xe0, 0x88,
- 0x00, 0x00, 0x82, 0x3d,
- 0x4c, 0x05, 0x84, 0x08,
- 0x82, 0xa5, 0x80, 0xc0,
- 0x06, 0x30, 0x57, 0xc4,
- 0xc4, 0xc7, 0xec, 0x04,
- 0xfc, 0x30, 0x08, 0xc5,
- 0xfc, 0x75, 0x84, 0xcd,
- 0x60, 0xbc, 0x4c, 0x35,
- 0xfd, 0xc5, 0x98, 0x2b,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x0c, 0x25, 0xdd, 0x93,
- 0x06, 0x14, 0x60, 0x84,
- 0x0c, 0x45, 0xe0, 0x88,
- 0x86, 0x73, 0x60, 0x78,
- 0x82, 0x3b, 0x01, 0x51,
- 0x4c, 0x25, 0x82, 0x21,
- 0x82, 0x43, 0x60, 0x84,
- 0x0e, 0xc5, 0x83, 0x45,
- 0xdd, 0x84, 0xf8, 0x10,
- 0xe0, 0x20, 0x0c, 0x95,
- 0xc4, 0x87, 0xc4, 0xc7,
- 0xfc, 0x30, 0x12, 0xc5,
- 0xfc, 0x20, 0x12, 0x85,
- 0xf1, 0xb0, 0x58, 0x82,
- 0x4a, 0xc2, 0x0a, 0xcd,
- 0x46, 0x10, 0xfa, 0x14,
- 0x82, 0x11, 0x5c, 0x00,
- 0xfa, 0x85, 0x88, 0x1d,
- 0x0c, 0x55, 0x98, 0x14,
- 0x0c, 0x45, 0xe0, 0x3c,
- 0x02, 0x10, 0xe0, 0x1c,
- 0x03, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0x48, 0x33, 0x86, 0x53,
- 0x48, 0x53, 0xe0, 0x30,
- 0xda, 0x85, 0xe0, 0x60,
- 0x82, 0x01, 0x03, 0x11,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xe0, 0x9c, 0x4c, 0x15,
- 0xe0, 0xbc, 0x4c, 0x05,
- 0xc1, 0xc3, 0xf9, 0x25,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x0c, 0x15, 0x80, 0x6b,
- 0xa1, 0x1d, 0xe0, 0x8c,
- 0x0c, 0x05, 0x82, 0x35,
- 0x80, 0x1d, 0xe0, 0x88,
- 0x0c, 0x05, 0x80, 0xa5,
- 0x83, 0x0d, 0xe0, 0xbc,
- 0x8f, 0x01, 0x80, 0xe5,
- 0xe0, 0x98, 0x4c, 0x05,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x0c, 0x55, 0xdd, 0x93,
- 0x0c, 0x25, 0xe1, 0x44,
- 0x0c, 0xc5, 0xe0, 0xa8,
- 0x0c, 0x35, 0xe0, 0x18,
- 0x0c, 0x4b, 0xe0, 0xb4,
- 0x44, 0x52, 0x60, 0x48,
- 0x0c, 0x2b, 0xf1, 0x88,
- 0x85, 0x1b, 0x60, 0x50,
- 0xe0, 0xc8, 0x0c, 0x85,
- 0xe0, 0xcc, 0x0c, 0x75,
- 0x0c, 0x95, 0x82, 0x75,
- 0xa1, 0x9b, 0xe0, 0x80,
- 0x0c, 0x95, 0x80, 0xf5,
- 0x52, 0x0a, 0xe0, 0x74,
- 0x0f, 0xb8, 0xe0, 0x80,
- 0x0c, 0x55, 0xc0, 0x00,
- 0x54, 0x86, 0x60, 0x70,
- 0x52, 0x02, 0xe0, 0x3c,
- 0xaa, 0xa3, 0xf1, 0x84,
- 0x96, 0x45, 0x94, 0x9d,
- 0x60, 0x94, 0x0c, 0x55,
- 0x95, 0x5b, 0xfd, 0xa1,
- 0x0c, 0x55, 0x94, 0xa5,
- 0x14, 0x50, 0xe0, 0x34,
- 0x16, 0xa4, 0xe4, 0x04,
- 0x96, 0xa3, 0xe1, 0xfc,
- 0x8a, 0xa3, 0x83, 0xa7,
- 0x92, 0x45, 0x95, 0x9d,
- 0x70, 0x84, 0x52, 0x02,
- 0x02, 0x91, 0xc6, 0x37,
- 0x14, 0x94, 0xa0, 0x31,
- 0xcb, 0x37, 0x61, 0xfc,
- 0xf9, 0xa1, 0x14, 0x93,
- 0x0c, 0xa5, 0xc2, 0x97,
- 0x94, 0x9f, 0x60, 0x10,
- 0x18, 0x95, 0x92, 0xc3,
- 0xb2, 0xc4, 0xf8, 0x0c,
- 0x14, 0xa5, 0xc4, 0x97,
- 0xc4, 0xc7, 0x7c, 0x24,
- 0x64, 0x10, 0x16, 0xa0,
- 0xc7, 0xb7, 0x86, 0xa3,
- 0x66, 0x92, 0x48, 0xba,
- 0x7f, 0xfc, 0x57, 0x8e,
- 0x08, 0x40, 0xc3, 0xff,
- 0xc9, 0x47, 0xe5, 0x00,
- 0x60, 0x20, 0x0c, 0xb5,
- 0x88, 0xa3, 0x96, 0x4f,
- 0xf0, 0x0a, 0x48, 0xaa,
- 0xfc, 0x24, 0x16, 0x95,
- 0xfc, 0x30, 0x16, 0xc5,
- 0xe6, 0x8a, 0x44, 0x4a,
- 0x04, 0x20, 0xa6, 0x93,
- 0x98, 0x93, 0x66, 0x00,
- 0x84, 0x9d, 0xd1, 0x27,
- 0x0c, 0x25, 0x84, 0xa5,
- 0x98, 0x34, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x45,
- 0x4c, 0x25, 0x82, 0x21,
- 0x06, 0x30, 0x60, 0x84,
- 0x07, 0x2d, 0xec, 0x04,
- 0x04, 0x43, 0xc2, 0x27,
- 0xf1, 0x94, 0x46, 0x02,
- 0xe0, 0x30, 0x48, 0x33,
- 0xe0, 0x60, 0x48, 0x03,
- 0x0c, 0x05, 0xde, 0x65,
- 0xff, 0x91, 0x61, 0x34,
- 0x60, 0x94, 0x4c, 0x95,
- 0x73, 0x58, 0x8c, 0x2b,
- 0x0c, 0x35, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x8c,
- 0x48, 0x32, 0xe0, 0x88,
- 0x86, 0x1b, 0x71, 0x80,
- 0x61, 0x3c, 0x4c, 0x45,
- 0x42, 0x40, 0x85, 0x4d,
- 0xab, 0x0d, 0x1c, 0x00,
- 0xe1, 0x3c, 0x4c, 0x15,
- 0x0c, 0x09, 0x82, 0xd5,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x00, 0x26, 0xe0, 0x90,
- 0x4c, 0x05, 0xc0, 0x00,
- 0x4c, 0x05, 0xc0, 0x98,
- 0x00, 0x30, 0x40, 0x9c,
- 0x94, 0x35, 0xcc, 0x10,
- 0x60, 0x34, 0x0c, 0x05,
- 0xf1, 0x88, 0x48, 0x32,
- 0x86, 0xe5, 0x88, 0x0d,
- 0xe4, 0x04, 0x02, 0x00,
- 0x06, 0x14, 0xa8, 0x13,
- 0x0c, 0x35, 0xe1, 0xfc,
- 0x86, 0x13, 0x60, 0x84,
- 0x0c, 0x15, 0x83, 0x17,
- 0xa2, 0x23, 0x60, 0x1c,
- 0x84, 0x03, 0x02, 0x31,
- 0x60, 0x84, 0x4c, 0x35,
- 0x4c, 0x25, 0xc2, 0x37,
- 0x86, 0x13, 0x60, 0x88,
- 0x60, 0x30, 0x42, 0x23,
- 0x4c, 0x05, 0x8f, 0x21,
- 0x42, 0x03, 0xe0, 0x8c,
- 0x4c, 0x25, 0xe0, 0x60,
- 0xe7, 0x55, 0xe0, 0x98,
- 0x60, 0x38, 0x0c, 0x05,
- 0xf1, 0x88, 0x4a, 0x12,
- 0xe0, 0xa4, 0x0c, 0x45,
- 0x89, 0x5d, 0x80, 0x43,
- 0x30, 0x23, 0x8a, 0x45,
- 0xf0, 0x9c, 0x40, 0x32,
- 0x60, 0x88, 0x4c, 0x25,
- 0x4c, 0x05, 0x8c, 0x1b,
- 0x68, 0xb8, 0xe0, 0x8c,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x1c,
- 0x4c, 0x05, 0xe0, 0x88,
- 0x82, 0x11, 0x60, 0x8c,
- 0x60, 0x84, 0x4c, 0x15,
- 0x02, 0x23, 0xc2, 0x17,
- 0x44, 0x03, 0x8f, 0x11,
- 0x8c, 0x0b, 0x60, 0x60,
- 0xe0, 0x30, 0x44, 0x33,
- 0xe0, 0x98, 0x4c, 0x15,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x08, 0x10, 0xa8,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x15, 0xfd, 0x11,
- 0xe1, 0x35, 0xe0, 0x94,
- 0x60, 0xa0, 0x0c, 0x05,
- 0x0c, 0x35, 0x87, 0x21,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x40, 0x0a, 0xe0, 0x48,
- 0x4c, 0x25, 0xe6, 0x8a,
- 0x46, 0x12, 0x60, 0x98,
- 0x00, 0x00, 0xf1, 0x8c,
- 0xa8, 0x13, 0x6c, 0x18,
- 0x60, 0xbc, 0x4c, 0x35,
- 0x4c, 0x25, 0x80, 0x3d,
- 0x4c, 0x95, 0xe0, 0x9c,
- 0x4c, 0x15, 0xe0, 0x94,
- 0x4c, 0x05, 0xe0, 0xc0,
- 0xdd, 0x75, 0xc0, 0xbc,
- 0x60, 0x78, 0x0c, 0x05,
- 0x44, 0x52, 0x81, 0x31,
- 0x00, 0x54, 0x71, 0x80,
- 0x00, 0xc3, 0xe0, 0x88,
- 0x83, 0x55, 0x8a, 0x0b,
- 0x18, 0x75, 0xf3, 0x44,
- 0x0c, 0x85, 0xf8, 0x0c,
- 0xc4, 0x47, 0xe0, 0x20,
- 0x10, 0x45, 0xc4, 0x77,
- 0x10, 0x75, 0xfc, 0x10,
- 0x48, 0x72, 0xfc, 0x1c,
- 0x06, 0x4d, 0xf1, 0x90,
- 0xfa, 0x0c, 0x46, 0x42,
- 0x5c, 0x00, 0x40, 0x50,
- 0xec, 0x04, 0x0a, 0x50,
- 0xfa, 0x65, 0x85, 0x5d,
- 0xe0, 0x84, 0x0c, 0x25,
- 0x0c, 0x45, 0x98, 0x34,
- 0x0c, 0x55, 0xe0, 0x3c,
- 0x82, 0x21, 0x60, 0x1c,
- 0x60, 0x84, 0x4c, 0x25,
- 0xec, 0x04, 0x06, 0x30,
- 0xc2, 0x27, 0x07, 0x2d,
- 0x46, 0x02, 0x04, 0x53,
- 0x4a, 0x33, 0xf1, 0x90,
- 0x4a, 0x03, 0xe0, 0x30,
- 0x2a, 0xe8, 0xe0, 0x60,
- 0x85, 0x01, 0x9f, 0xfc,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x60, 0x9c, 0x4c, 0x05,
- 0xec, 0x04, 0x00, 0x10,
- 0xc1, 0xc3, 0xf5, 0x05,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x87, 0x81, 0x00, 0x6b,
- 0xe0, 0x90, 0x0c, 0x05,
- 0xe0, 0x18, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x60, 0x98, 0x4c, 0x85,
- 0xac, 0xd5, 0xa1, 0x0d,
- 0xe0, 0x8c, 0x0c, 0x25,
- 0xac, 0x45, 0x85, 0x0d,
- 0x60, 0x20, 0x0c, 0x55,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x25,
- 0xf0, 0x88, 0x46, 0x12,
- 0xf8, 0x10, 0x06, 0x45,
- 0xf8, 0x08, 0x06, 0xc5,
- 0x78, 0x18, 0x06, 0x35,
- 0x0a, 0x25, 0xc4, 0x27,
- 0xc4, 0x47, 0x7c, 0x08,
- 0x7c, 0x10, 0x0a, 0x45,
- 0x0a, 0xc5, 0xc4, 0xc7,
- 0xc4, 0x37, 0x7c, 0x30,
- 0xfc, 0x0c, 0x0a, 0x35,
- 0xa6, 0xc3, 0xa8, 0x23,
- 0x90, 0x65, 0x84, 0xcd,
- 0xe0, 0x34, 0x0c, 0x25,
- 0x06, 0x24, 0x84, 0x21,
- 0xfd, 0x37, 0xe1, 0x7c,
- 0x85, 0x27, 0x86, 0x23,
- 0x4c, 0x05, 0xa4, 0x03,
- 0x04, 0x04, 0x60, 0x90,
- 0x02, 0x45, 0xe0, 0x88,
- 0x46, 0x12, 0x7c, 0x08,
- 0x8e, 0x34, 0xf0, 0x88,
- 0xc4, 0x47, 0x9a, 0x24,
- 0x04, 0x35, 0xc4, 0x37,
- 0x04, 0x45, 0xfc, 0x0c,
- 0x48, 0x32, 0xfc, 0x10,
- 0x89, 0x31, 0x71, 0x90,
- 0x0a, 0x00, 0x85, 0x45,
- 0x18, 0x04, 0x6c, 0x04,
- 0x02, 0xc5, 0xe0, 0x88,
- 0x12, 0x54, 0x7c, 0x30,
- 0x02, 0x95, 0xe0, 0x88,
- 0xc4, 0xc7, 0xfc, 0x24,
- 0x7c, 0x30, 0x04, 0xc5,
- 0x04, 0x95, 0xc4, 0x97,
- 0xb2, 0xc3, 0xfc, 0x24,
- 0x82, 0xf5, 0xa3, 0xcd,
- 0xe4, 0x08, 0x12, 0x40,
- 0xe1, 0x7c, 0x14, 0x94,
- 0x94, 0x93, 0xfd, 0xa7,
- 0x93, 0xcd, 0x85, 0x97,
- 0x00, 0x90, 0x4c, 0x55,
- 0x9c, 0x00, 0x40, 0x50,
- 0x9c, 0x00, 0x48, 0xc0,
- 0xec, 0x04, 0x06, 0x30,
- 0xf6, 0x95, 0xa1, 0x3b,
- 0x8c, 0x1b, 0x03, 0x21,
- 0xe8, 0x04, 0x7d, 0x28,
- 0x61, 0x3c, 0x0c, 0x45,
- 0x0c, 0x35, 0xff, 0xc1,
- 0x12, 0x60, 0x60, 0x34,
- 0x0c, 0x15, 0xe6, 0x20,
- 0x0c, 0x25, 0xe0, 0x94,
- 0x4a, 0x42, 0xe0, 0x88,
- 0x40, 0x52, 0xf1, 0x8c,
- 0x99, 0x1b, 0x7b, 0x00,
- 0xfa, 0x00, 0x44, 0x22,
- 0xe0, 0x90, 0x4c, 0x25,
- 0x0c, 0x15, 0xb0, 0x45,
- 0x98, 0x1d, 0xe0, 0x84,
- 0x0c, 0x05, 0xae, 0x05,
- 0x14, 0x14, 0x60, 0x1c,
- 0x0c, 0xc5, 0xe0, 0x84,
- 0x80, 0xa3, 0xe0, 0xa4,
- 0xe0, 0x30, 0x14, 0x53,
- 0xf1, 0xb0, 0x56, 0x52,
- 0x0f, 0x38, 0x97, 0x2d,
- 0x02, 0x11, 0x80, 0x00,
- 0x4c, 0x15, 0x84, 0x33,
- 0x08, 0x14, 0x60, 0x84,
- 0x08, 0x03, 0xe0, 0x84,
- 0x0c, 0xa5, 0x91, 0x11,
- 0x4c, 0x15, 0xe0, 0x50,
- 0x8c, 0x1b, 0x60, 0x50,
- 0xe0, 0x30, 0x40, 0x23,
- 0x60, 0x60, 0x40, 0x33,
- 0xfb, 0x00, 0x00, 0x34,
- 0xe8, 0x08, 0x55, 0xe8,
- 0x0c, 0x15, 0x98, 0x24,
- 0x0c, 0x35, 0xe0, 0x84,
- 0x4c, 0xa5, 0xe0, 0x1c,
- 0x04, 0x20, 0x60, 0x50,
- 0x05, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x04, 0x14,
- 0x46, 0x03, 0x84, 0x33,
- 0xa0, 0xa5, 0xe0, 0x60,
- 0x0c, 0x25, 0xa5, 0x35,
- 0xff, 0x11, 0x60, 0x94,
- 0x86, 0xb5, 0x83, 0x2b,
- 0x61, 0x3c, 0x0c, 0x25,
- 0x0c, 0x05, 0x82, 0x71,
- 0x0a, 0x74, 0x60, 0x34,
- 0x98, 0x44, 0xe0, 0x84,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0x60, 0x8c, 0x0c, 0x05,
- 0x4c, 0x25, 0xa0, 0x23,
- 0x08, 0x40, 0x60, 0x90,
- 0x0a, 0x33, 0xec, 0x04,
- 0x4c, 0x25, 0x89, 0x7d,
- 0x4c, 0x75, 0xe0, 0x94,
- 0x46, 0x23, 0xe0, 0x84,
- 0x46, 0x03, 0xe0, 0x30,
- 0x98, 0x65, 0xe0, 0x60,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x4c, 0x25,
- 0xf1, 0x80, 0x48, 0x22,
- 0x8e, 0x25, 0x86, 0x4d,
- 0x60, 0x34, 0x0c, 0x35,
- 0xec, 0x04, 0x04, 0x20,
- 0x60, 0xbc, 0x4c, 0x25,
- 0x4c, 0x45, 0x85, 0x41,
- 0x4c, 0x45, 0xe0, 0x98,
- 0x80, 0x33, 0x60, 0x9c,
- 0x60, 0x94, 0x4c, 0x15,
- 0xec, 0x0c, 0x06, 0x30,
- 0x60, 0xc0, 0x4c, 0x35,
- 0x92, 0x15, 0x86, 0x2d,
- 0x60, 0x3c, 0x0c, 0x15,
- 0x0c, 0x25, 0x82, 0x71,
- 0x06, 0x74, 0x60, 0x1c,
- 0x4c, 0x75, 0xe0, 0x84,
- 0x80, 0x13, 0xe0, 0x84,
- 0x60, 0x8c, 0x4c, 0x15,
- 0x44, 0x03, 0x86, 0x23,
- 0x44, 0x13, 0xe0, 0x30,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x8a, 0xe5, 0xe0, 0x84,
- 0x7b, 0x00, 0x00, 0x14,
- 0x4f, 0x38, 0x8c, 0x1b,
- 0x0c, 0x15, 0xe8, 0x08,
- 0x0c, 0x25, 0xe0, 0x84,
- 0xc2, 0x17, 0xe0, 0x1c,
- 0x44, 0x03, 0x82, 0x23,
- 0x85, 0x15, 0xe0, 0x60,
- 0x86, 0xf5, 0xa1, 0x7d,
- 0x60, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x04, 0x74,
- 0xe0, 0x40, 0x0c, 0x35,
- 0x04, 0x23, 0x82, 0x23,
- 0x46, 0x3a, 0xe0, 0x30,
- 0xa0, 0x23, 0xe0, 0xa2,
- 0x82, 0xa5, 0x86, 0x2d,
- 0x02, 0x09, 0x8e, 0x13,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x42, 0x01,
- 0xe0, 0x88, 0x0c, 0x05,
- 0xe0, 0x1c, 0x0c, 0x15,
- 0xe0, 0x84, 0x0c, 0x75,
- 0x8e, 0x13, 0xc2, 0x77,
- 0xe0, 0x30, 0x42, 0x03,
- 0x4c, 0x05, 0x8f, 0x01,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf2, 0xfc,
- 0xe0, 0xa4, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xf1, 0x80, 0x40, 0x52,
- 0x81, 0x2d, 0x02, 0x11,
- 0xe0, 0x84, 0x4c, 0x15,
- 0x98, 0x44, 0x94, 0x25,
- 0xe0, 0x1c, 0x0c, 0x35,
- 0xe0, 0x8c, 0x0c, 0x05,
- 0xec, 0x04, 0x18, 0x40,
- 0x18, 0x14, 0x19, 0x1d,
- 0x86, 0xc3, 0xe0, 0x84,
- 0xe0, 0x30, 0x58, 0x53,
- 0xe0, 0x60, 0x58, 0x03,
- 0x0c, 0x09, 0xf8, 0x05,
- 0x0c, 0x55, 0xe1, 0xd0,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x02, 0xa5, 0xe0, 0x84,
- 0xf0, 0x88, 0x40, 0x52,
- 0x68, 0x08, 0x49, 0xe8,
- 0x0c, 0x15, 0x8c, 0x1b,
- 0x0c, 0x25, 0xe0, 0x84,
- 0x0c, 0x35, 0xe0, 0x90,
- 0x98, 0x44, 0xe0, 0x1c,
- 0x08, 0x40, 0x02, 0x11,
- 0x0a, 0x14, 0xec, 0x04,
- 0x89, 0x1d, 0x60, 0x84,
- 0x60, 0x84, 0x4c, 0x15,
- 0x46, 0x03, 0x8a, 0x33,
- 0x87, 0x01, 0x60, 0x60,
- 0x60, 0x30, 0x46, 0x23,
- 0x80, 0x00, 0x00, 0x76,
- 0xe0, 0x98, 0x4c, 0x05,
- 0x8b, 0xa5, 0xee, 0xa5,
- 0x60, 0x60, 0x14, 0xa3,
- 0x48, 0xa2, 0x86, 0xc3,
- 0xa4, 0x43, 0xfb, 0x10,
- 0x8e, 0x05, 0x98, 0x4d,
- 0x82, 0x11, 0x18, 0x44,
- 0x60, 0x84, 0x4c, 0x15,
- 0x08, 0x40, 0x84, 0x33,
- 0x09, 0x1d, 0xec, 0x04,
- 0xe0, 0x84, 0x08, 0x14,
- 0x40, 0x23, 0x88, 0x03,
- 0x40, 0x33, 0xe0, 0x30,
- 0xe8, 0x25, 0xe0, 0x60,
- 0x0c, 0x35, 0x87, 0xf5,
- 0x08, 0x14, 0x60, 0x1c,
- 0x0c, 0x05, 0xe0, 0x84,
- 0x88, 0x33, 0xe0, 0x8c,
- 0xe0, 0x30, 0x46, 0x23,
- 0xe0, 0x60, 0x46, 0x03,
- 0xe1, 0xd0, 0x0c, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x00, 0x04, 0x82, 0xe5,
- 0x8c, 0x1b, 0x7b, 0x00,
- 0xe8, 0x08, 0x45, 0x48,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0x44, 0x03, 0x86, 0x23,
- 0x98, 0x04, 0xe0, 0x60,
- 0xe0, 0x98, 0x4c, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0xde, 0x65, 0x81, 0x1d,
- 0x0c, 0x35, 0x83, 0xb5,
- 0xa4, 0x53, 0x60, 0x40,
- 0xe0, 0xa2, 0x46, 0x3a,
- 0x82, 0xa5, 0x86, 0x5d,
- 0x00, 0x19, 0x82, 0x03,
- 0x82, 0x11, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x40, 0x11,
- 0xe0, 0x90, 0x0c, 0x25,
- 0xe0, 0x1c, 0x0c, 0x05,
- 0xe0, 0x84, 0x0c, 0x15,
- 0xe0, 0x84, 0x06, 0x14,
- 0x40, 0x23, 0x86, 0x03,
- 0x4c, 0x85, 0xe0, 0x30,
- 0xa4, 0x04, 0xe0, 0x98,
- 0xe0, 0xa4, 0x0c, 0x35,
- 0xe0, 0x90, 0x0c, 0x25,
- 0x86, 0x2d, 0x80, 0x33,
- 0x0c, 0x35, 0x86, 0xc5,
- 0x80, 0x33, 0xe0, 0x34,
- 0x90, 0xa5, 0x87, 0x2d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe4, 0x04, 0x08, 0x10,
- 0x60, 0x3c, 0x0c, 0x35,
- 0xe0, 0x84, 0x02, 0x44,
- 0xe0, 0x84, 0x4c, 0x45,
- 0x44, 0x03, 0x82, 0x23,
- 0x42, 0x32, 0x60, 0x30,
- 0x44, 0x13, 0xf0, 0x80,
- 0x0c, 0x09, 0xe0, 0x60,
- 0x40, 0x0a, 0xe1, 0xd0,
- 0x30, 0xf8, 0xe0, 0x84,
- 0xe7, 0xb5, 0xdf, 0xfc,
- 0x86, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x0c, 0x25,
- 0xe0, 0x84, 0x06, 0x14,
- 0xe0, 0x40, 0x0c, 0x45,
- 0x06, 0x33, 0x84, 0x33,
- 0x48, 0x4a, 0xe0, 0x30,
- 0xa0, 0x33, 0xe0, 0xa2,
- 0x82, 0x85, 0x88, 0x3d,
- 0x04, 0x09, 0x82, 0x23,
- 0x82, 0x01, 0xe1, 0xe0,
- 0xe1, 0xe0, 0x44, 0x01,
- 0x0c, 0x25, 0xa4, 0x04,
- 0x0c, 0x15, 0xe0, 0x1c,
- 0x06, 0x14, 0xe0, 0x84,
- 0x86, 0x23, 0xe0, 0x84,
- 0xe0, 0x30, 0x44, 0x03,
- 0x8f, 0x01, 0x02, 0x71,
- 0x60, 0x98, 0x4c, 0x05,
- 0x31, 0x88, 0x8f, 0x1b,
- 0x8c, 0x0b, 0xdf, 0xfc,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x04, 0x27, 0x08,
- 0xe0, 0xfc, 0x0c, 0x05,
- 0xe1, 0x00, 0x0c, 0x15,
- 0xe0, 0x94, 0x4c, 0x25,
- 0x60, 0x98, 0x4c, 0x85,
- 0xf1, 0x80, 0x40, 0x22,
- 0x60, 0xbc, 0x4c, 0x05,
- 0x4c, 0x25, 0xa2, 0x23,
- 0xe1, 0x25, 0xe0, 0xc0,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0x24,
- 0x60, 0x20, 0x00, 0x15,
- 0x00, 0x45, 0x81, 0x71,
- 0x88, 0x34, 0xe0, 0xa0,
- 0xc8, 0xc4, 0x8a, 0x54,
- 0x00, 0x35, 0xca, 0x24,
- 0x86, 0x53, 0x60, 0x18,
- 0x58, 0x52, 0x98, 0x53,
- 0x82, 0x5b, 0x70, 0x88,
- 0x04, 0x40, 0x55, 0xce,
- 0x81, 0xd5, 0xec, 0x10,
- 0x82, 0x71, 0x02, 0x84,
- 0x7c, 0x18, 0x10, 0x85,
- 0xf0, 0x98, 0x52, 0x82,
- 0x60, 0x10, 0x12, 0x95,
- 0xb0, 0xc3, 0x88, 0x61,
- 0xd5, 0xce, 0x92, 0xc3,
- 0xfc, 0x75, 0x85, 0x7d,
- 0x60, 0x88, 0x18, 0x44,
- 0xec, 0x04, 0x08, 0x40,
- 0x70, 0xb0, 0x4a, 0x12,
- 0x0a, 0x50, 0x98, 0x33,
- 0x18, 0xc0, 0x6c, 0x30,
- 0x81, 0xf5, 0xec, 0x40,
- 0x82, 0x21, 0x4d, 0x74,
- 0x02, 0x85, 0x82, 0x64,
- 0xc4, 0x77, 0xfc, 0x30,
- 0x7c, 0x30, 0x0c, 0x95,
- 0x0c, 0x65, 0x88, 0xc1,
- 0xb2, 0x83, 0xfc, 0x1c,
- 0xd5, 0x8e, 0x8c, 0x83,
- 0xfc, 0x35, 0x89, 0x2d,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x75,
- 0x00, 0x35, 0xff, 0x61,
- 0x81, 0x11, 0x60, 0xc0,
- 0x60, 0x18, 0x00, 0x25,
- 0x40, 0x15, 0x81, 0x81,
- 0x40, 0x65, 0xe0, 0x7c,
- 0x00, 0x15, 0xe0, 0x88,
- 0x00, 0xc5, 0xe0, 0xb4,
- 0x40, 0x65, 0xe0, 0xa8,
- 0x25, 0x3e, 0xe1, 0x40,
- 0xe0, 0x88, 0x06, 0x74,
- 0x60, 0xd8, 0x00, 0x35,
- 0x00, 0x45, 0x86, 0x23,
- 0x16, 0x20, 0x60, 0x6c,
- 0x4a, 0xca, 0xec, 0x40,
- 0x81, 0x21, 0x66, 0x86,
- 0x46, 0x86, 0x21, 0x3e,
- 0x28, 0x33, 0xe0, 0x3c,
- 0x1b, 0x3e, 0xa0, 0x51,
- 0xe4, 0x40, 0x06, 0x10,
- 0x08, 0x10, 0x0b, 0x37,
- 0x7c, 0x3e, 0xe4, 0x10,
- 0xe4, 0x08, 0x06, 0x10,
- 0xcb, 0x57, 0x02, 0x11,
- 0x85, 0x37, 0x07, 0x47,
- 0x83, 0x17, 0x19, 0x5e,
- 0x81, 0x51, 0x3e, 0x4e,
- 0x81, 0x41, 0x09, 0x3e,
- 0x00, 0x15, 0x95, 0x1e,
- 0x93, 0x1e, 0xe0, 0xdc,
- 0xe0, 0xe0, 0x00, 0x15,
- 0x00, 0x15, 0xfe, 0x1e,
- 0x8d, 0x1e, 0xe0, 0x28,
- 0xe0, 0x2c, 0x00, 0x15,
- 0x00, 0x15, 0x91, 0x1e,
- 0x8f, 0xce, 0xe0, 0x24,
- 0x1d, 0x1e, 0xa3, 0x7e,
- 0xe0, 0x84, 0x02, 0xc4,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x8e, 0xc3, 0x2b, 0x1e,
- 0x81, 0x11, 0x3c, 0xce,
- 0x1a, 0x38, 0x97, 0x1e,
- 0x0a, 0xa0, 0xe0, 0x00,
- 0x0b, 0x0a, 0xe4, 0x04,
- 0x1a, 0x48, 0xe7, 0x20,
- 0x16, 0x15, 0xc0, 0x00,
- 0xa2, 0x4d, 0x60, 0x10,
- 0x5e, 0x45, 0xad, 0x6e,
- 0x5e, 0x25, 0xc0, 0x5c,
- 0x98, 0xf5, 0xc0, 0x4c,
- 0xc4, 0x17, 0x27, 0xbe,
- 0x60, 0xac, 0x00, 0x35,
- 0x19, 0x74, 0x8c, 0xbb,
- 0x06, 0xc5, 0x8e, 0x6b,
- 0xab, 0x34, 0xfc, 0x04,
- 0x04, 0xcd, 0xae, 0xc3,
- 0x2b, 0x3e, 0x88, 0x33,
- 0x9c, 0x00, 0x58, 0x20,
- 0x4e, 0x60, 0x0e, 0x05,
- 0x29, 0x8e, 0x9c, 0x00,
- 0xaf, 0x4e, 0x98, 0x8b,
- 0xe0, 0xb0, 0x00, 0x35,
- 0x8b, 0xc4, 0x8f, 0x44,
- 0xfc, 0x04, 0x06, 0x15,
- 0x60, 0x84, 0x06, 0x14,
- 0x88, 0x33, 0x8e, 0x13,
- 0xe0, 0x32, 0x46, 0x3a,
- 0x46, 0x3a, 0x9d, 0xc4,
- 0x90, 0xcb, 0x66, 0xb2,
- 0xe5, 0x00, 0x06, 0x30,
- 0x46, 0x3a, 0xcf, 0x37,
- 0x0d, 0x34, 0xe6, 0x92,
- 0x42, 0x1a, 0x86, 0x13,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8e,
- 0xd1, 0x17, 0xe6, 0x00,
- 0x1e, 0x45, 0x82, 0xcd,
- 0x58, 0x20, 0x00, 0x5c,
- 0x1e, 0x85, 0x9c, 0x00,
- 0x1e, 0x75, 0x80, 0x50,
- 0x82, 0x65, 0x80, 0x44,
- 0x96, 0x6b, 0x2f, 0x44,
- 0xe0, 0x88, 0x40, 0x95,
- 0xa1, 0x4b, 0xa9, 0x84,
- 0x81, 0x11, 0x80, 0xc5,
- 0x81, 0xe5, 0xab, 0x1e,
- 0x96, 0x6b, 0x01, 0xe5,
- 0x83, 0x41, 0x3c, 0x14,
- 0xe1, 0x40, 0x40, 0x95,
- 0x94, 0x13, 0xa5, 0x24,
- 0x7b, 0x08, 0x44, 0x12,
- 0xa5, 0x2e, 0x81, 0x11,
- 0xa3, 0x74, 0xab, 0x1e,
- 0xab, 0x24, 0x9b, 0x14,
- 0x82, 0x2d, 0xa7, 0xb4,
- 0xc0, 0x00, 0x13, 0xf8,
- 0x12, 0x78, 0xa3, 0x4d,
- 0x4c, 0x80, 0x40, 0x00,
- 0x27, 0xce, 0xdc, 0x00,
- 0x16, 0x15, 0x83, 0x21,
- 0xaf, 0x2e, 0xe0, 0x10,
- 0x60, 0x20, 0x16, 0x25,
- 0xe0, 0x88, 0x08, 0x14,
- 0xe0, 0x20, 0x00, 0x35,
- 0xe0, 0x10, 0x00, 0x15,
- 0xc4, 0x27, 0x21, 0xc4,
- 0xfc, 0x10, 0x06, 0x65,
- 0xfc, 0x08, 0x06, 0x25,
- 0x7c, 0x10, 0x02, 0x45,
- 0x10, 0x05, 0x99, 0xad,
- 0x93, 0xc4, 0x8c, 0x23,
- 0x9e, 0x65, 0x99, 0xad,
- 0x83, 0xad, 0xfe, 0x14,
- 0xee, 0x34, 0xaa, 0x85,
- 0xfc, 0xc4, 0x82, 0x14,
- 0x02, 0x15, 0xc4, 0x37,
- 0x42, 0xc2, 0xfc, 0x0c,
- 0x18, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x8c,
- 0xc2, 0x67, 0xf1, 0xb0,
- 0x1e, 0x95, 0x90, 0x6d,
- 0x4c, 0x80, 0x00, 0x58,
- 0x0f, 0xb8, 0x9c, 0x00,
- 0x29, 0x8e, 0x80, 0x00,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x40, 0xc4,
- 0xb3, 0x11, 0x1f, 0x1e,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x18, 0x25, 0x9d, 0x14,
- 0x10, 0x20, 0x7c, 0x0c,
- 0x1f, 0x34, 0xe4, 0x08,
- 0x4e, 0x7a, 0xc5, 0x87,
- 0x82, 0xcb, 0x66, 0x86,
- 0xad, 0x11, 0x08, 0x83,
- 0x48, 0x3a, 0x10, 0x71,
- 0x49, 0x77, 0xe6, 0x86,
- 0xe0, 0x98, 0x02, 0x24,
- 0x06, 0x06, 0x0e, 0x83,
- 0x02, 0x83, 0xe0, 0x04,
- 0x10, 0x43, 0x83, 0x11,
- 0x13, 0xe5, 0x8f, 0x81,
- 0x1f, 0x5e, 0x83, 0x71,
- 0x16, 0x15, 0x80, 0x5b,
- 0x16, 0x65, 0xf8, 0x30,
- 0x16, 0x75, 0xf8, 0x20,
- 0x29, 0x8e, 0xf8, 0x10,
- 0x2c, 0x84, 0xc4, 0x17,
- 0x06, 0xc5, 0xc4, 0x67,
- 0xc4, 0x77, 0x7c, 0x04,
- 0xfc, 0x18, 0x06, 0x65,
- 0x7c, 0x1c, 0x06, 0x75,
- 0x06, 0x35, 0xc4, 0x87,
- 0x29, 0x04, 0xfc, 0x20,
- 0x8e, 0x63, 0x98, 0x63,
- 0x86, 0x63, 0x15, 0x34,
- 0x7a, 0x18, 0x46, 0x32,
- 0xe0, 0x84, 0x0c, 0x24,
- 0x80, 0x6d, 0xa6, 0x63,
- 0x1d, 0x84, 0x92, 0x45,
- 0xe4, 0x10, 0x0e, 0x40,
- 0xc7, 0x77, 0x0a, 0x0b,
- 0x84, 0x43, 0x42, 0xc4,
- 0x66, 0xa2, 0x4e, 0x7a,
- 0x9f, 0x54, 0xc4, 0x47,
- 0x7c, 0x04, 0x18, 0x15,
- 0x45, 0x77, 0x84, 0x71,
- 0x08, 0x73, 0x90, 0xcb,
- 0x02, 0x73, 0x91, 0x81,
- 0x48, 0x72, 0x90, 0x11,
- 0x04, 0x14, 0x70, 0x8c,
- 0x06, 0x06, 0xe1, 0x90,
- 0x89, 0x11, 0x60, 0x08,
- 0x87, 0x71, 0x0b, 0xf5,
- 0xf8, 0x10, 0x16, 0x75,
- 0xc4, 0x77, 0xac, 0xc4,
- 0x7c, 0x1c, 0x06, 0x65,
- 0x06, 0x35, 0xc4, 0xc7,
- 0x89, 0xc4, 0xfc, 0x30,
- 0x46, 0xc2, 0x8c, 0x33,
- 0x4c, 0x22, 0xfa, 0x0c,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x9e, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x02, 0x15, 0xe4, 0x10,
- 0xc7, 0xc7, 0x7c, 0x1c,
- 0x84, 0x43, 0x1d, 0x74,
- 0x02, 0x43, 0x91, 0x81,
- 0x44, 0xca, 0x88, 0x11,
- 0x86, 0x43, 0x66, 0x9e,
- 0x8e, 0xcb, 0x44, 0x47,
- 0x06, 0x06, 0x04, 0x21,
- 0x45, 0x27, 0xe0, 0x08,
- 0x04, 0x43, 0x85, 0x71,
- 0xe1, 0x8c, 0x04, 0x14,
- 0x85, 0x11, 0x07, 0x35,
- 0x8a, 0x0b, 0x00, 0x6b,
- 0xa3, 0x74, 0xad, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x8d, 0x55, 0x9f, 0x54,
- 0xc4, 0x77, 0xac, 0x74,
- 0xfc, 0x1c, 0x06, 0x15,
- 0x42, 0x32, 0xbe, 0x34,
- 0x06, 0x14, 0xfa, 0x04,
- 0x4c, 0x22, 0xe0, 0x84,
- 0xc2, 0x67, 0xf1, 0x8c,
- 0x92, 0xe5, 0x90, 0x6d,
- 0x18, 0x40, 0x29, 0x8e,
- 0x00, 0x35, 0xe4, 0x10,
- 0xc7, 0xc7, 0x60, 0x14,
- 0x84, 0x43, 0x1d, 0x84,
- 0x7c, 0x1c, 0x06, 0x35,
- 0x58, 0xca, 0x87, 0x71,
- 0x10, 0xc1, 0xe6, 0xa2,
- 0x49, 0xc7, 0x86, 0x13,
- 0x18, 0x43, 0x84, 0x31,
- 0x10, 0xcb, 0xc4, 0x17,
- 0x04, 0x34, 0x82, 0x43,
- 0x8f, 0x81, 0x61, 0x88,
- 0x60, 0x04, 0x06, 0x06,
- 0x44, 0x2a, 0x89, 0x11,
- 0x82, 0x23, 0xe6, 0xb2,
- 0x11, 0x24, 0xef, 0x2f,
- 0x42, 0x4a, 0x84, 0x43,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x86, 0x13, 0xe6, 0x8a,
- 0x82, 0x6d, 0xf1, 0x1f,
- 0x80, 0x50, 0x1e, 0x65,
- 0x80, 0x58, 0x1e, 0x95,
- 0x80, 0x44, 0x1e, 0x75,
- 0xaf, 0x44, 0x88, 0xc5,
- 0xe0, 0x88, 0x40, 0x95,
- 0x23, 0x74, 0x97, 0x14,
- 0xa7, 0xc4, 0xa3, 0x4b,
- 0x97, 0x1e, 0x82, 0x11,
- 0x00, 0x15, 0x84, 0x95,
- 0x8e, 0xa3, 0x60, 0xf0,
- 0x60, 0xa0, 0x00, 0x25,
- 0x85, 0x41, 0x87, 0x31,
- 0x44, 0x2a, 0x94, 0x13,
- 0x06, 0x10, 0x66, 0x8e,
- 0x85, 0x3d, 0xe4, 0x10,
- 0x40, 0x48, 0x5e, 0x15,
- 0x40, 0x15, 0x83, 0x11,
- 0x81, 0xb5, 0xe0, 0x7c,
- 0x81, 0x95, 0xad, 0x94,
- 0x90, 0x6b, 0x2d, 0x94,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x81, 0x35, 0xa3, 0x74,
- 0xa7, 0xc4, 0xaf, 0x44,
- 0x88, 0xb1, 0x0c, 0x8b,
- 0x92, 0x6b, 0x18, 0x2b,
- 0x8a, 0xab, 0x25, 0x14,
- 0xf0, 0xa8, 0x52, 0x72,
- 0x25, 0xa8, 0x82, 0x9d,
- 0xa1, 0x6d, 0x9f, 0xfc,
- 0x97, 0x24, 0x82, 0x15,
- 0xe0, 0xf0, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x88, 0x40, 0x65,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xed, 0x80, 0x1e, 0xf0,
- 0xff, 0x31, 0x01, 0x21,
- 0x60, 0x80, 0x40, 0x25,
- 0xe0, 0x3c, 0x4a, 0x86,
- 0x60, 0x6c, 0x00, 0x25,
- 0x00, 0x15, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0xb4,
- 0x60, 0x8c, 0x40, 0x35,
- 0x40, 0x35, 0x81, 0x91,
- 0xa4, 0x53, 0x61, 0x44,
- 0x60, 0xc0, 0x00, 0x35,
- 0xe4, 0x40, 0x04, 0x10,
- 0x60, 0xa8, 0x00, 0xc5,
- 0x00, 0x45, 0x8b, 0x27,
- 0xa9, 0x3e, 0xe0, 0xbc,
- 0xe0, 0x18, 0x00, 0xa5,
- 0x04, 0x10, 0x09, 0x2e,
- 0x07, 0x27, 0xe4, 0x10,
- 0xe6, 0x86, 0x46, 0xca,
- 0x44, 0x42, 0x7e, 0x2e,
- 0x44, 0x27, 0xf1, 0xb0,
- 0x50, 0xa2, 0xa0, 0x31,
- 0x04, 0x10, 0x70, 0x88,
- 0x02, 0x11, 0xe4, 0x08,
- 0x05, 0x27, 0xcb, 0x37,
- 0x1f, 0x3e, 0x83, 0x17,
- 0xe0, 0x88, 0x06, 0x44,
- 0x86, 0xa3, 0x21, 0x5e,
- 0x81, 0x31, 0x0f, 0x2e,
- 0x00, 0x15, 0x9b, 0x1e,
- 0xa5, 0x1e, 0xe0, 0xe4,
- 0xe0, 0xe8, 0x00, 0x15,
- 0x00, 0x15, 0x99, 0x1e,
- 0x8d, 0x1e, 0xe0, 0xec,
- 0xe0, 0x28, 0x00, 0x15,
- 0x00, 0x15, 0x93, 0x1e,
- 0x97, 0x1e, 0xe0, 0x2c,
- 0xe0, 0x24, 0x00, 0x15,
- 0x23, 0x1e, 0x95, 0xce,
- 0xe0, 0x84, 0x02, 0xc4,
- 0xb8, 0x1b, 0x11, 0x1e,
- 0xff, 0x11, 0x7c, 0x1e,
- 0x81, 0x11, 0x0b, 0x1e,
- 0x81, 0xc1, 0x1d, 0x1e,
- 0x0d, 0x0a, 0xb1, 0xa5,
- 0x18, 0xb8, 0xe3, 0x1c,
- 0xa2, 0xcd, 0xc0, 0x00,
- 0x5c, 0x00, 0x4e, 0x30,
- 0xdc, 0x00, 0x46, 0xc0,
- 0x2d, 0xae, 0x96, 0x55,
- 0x20, 0x24, 0x8c, 0xab,
- 0x00, 0x15, 0x88, 0x6b,
- 0x98, 0xb3, 0x60, 0xac,
- 0xc4, 0x27, 0x9f, 0x44,
- 0xfc, 0x08, 0x02, 0x15,
- 0xf1, 0x90, 0x4e, 0x12,
- 0x0c, 0x05, 0x86, 0x7d,
- 0x9c, 0x00, 0x4e, 0x30,
- 0x8e, 0x9b, 0x2f, 0x9e,
- 0xe0, 0xb0, 0x00, 0x55,
- 0x91, 0x74, 0x95, 0x14,
- 0xfc, 0x08, 0x0a, 0x25,
- 0x60, 0x84, 0x0a, 0x24,
- 0x82, 0x53, 0x88, 0x23,
- 0xe0, 0x1e, 0x4a, 0x5a,
- 0x4a, 0x5a, 0xa3, 0x74,
- 0x92, 0x7b, 0x66, 0x9e,
- 0xe5, 0x00, 0x0a, 0x50,
- 0x4a, 0x5a, 0xcf, 0x57,
- 0x93, 0x14, 0xe6, 0x86,
- 0x44, 0x2a, 0x8a, 0x23,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x86,
- 0xd1, 0x27, 0xe6, 0x00,
- 0x1e, 0x95, 0x84, 0x7d,
- 0x4e, 0x30, 0x00, 0x5c,
- 0x82, 0x05, 0x9c, 0x00,
- 0xa1, 0xcb, 0x0c, 0x4b,
- 0xe0, 0x8c, 0x40, 0x45,
- 0x01, 0xe5, 0x80, 0xa5,
- 0x01, 0xd5, 0x81, 0xb1,
- 0x7c, 0x24, 0x8c, 0x4b,
- 0x40, 0x45, 0x81, 0xb1,
- 0x83, 0xc1, 0x61, 0x44,
- 0x88, 0x23, 0xa9, 0x14,
- 0xfa, 0x04, 0x42, 0x22,
- 0xaf, 0x94, 0xa9, 0x1e,
- 0x94, 0x6b, 0x21, 0x14,
- 0x82, 0xbd, 0xad, 0xa4,
- 0xc0, 0x00, 0x13, 0x48,
- 0x83, 0x31, 0x23, 0xcd,
- 0x5c, 0x00, 0x46, 0xc0,
- 0xdc, 0x00, 0x4a, 0x90,
- 0xc0, 0x00, 0x11, 0xb8,
- 0xad, 0xbe, 0xab, 0x7e,
- 0xf8, 0x10, 0x14, 0x25,
- 0xe0, 0x20, 0x00, 0x55,
- 0xf8, 0x20, 0x14, 0xc5,
- 0xc4, 0x27, 0x25, 0x14,
- 0xfc, 0x08, 0x0a, 0xb5,
- 0x60, 0x10, 0x00, 0x25,
- 0x0a, 0x75, 0xc4, 0xc7,
- 0x83, 0x6d, 0x7c, 0x30,
- 0xfc, 0x30, 0x04, 0xc5,
- 0x8e, 0xb3, 0x0e, 0x65,
- 0x83, 0x6d, 0x99, 0x14,
- 0x8d, 0x14, 0x9c, 0x25,
- 0x83, 0x6d, 0xa8, 0x74,
- 0x02, 0x14, 0xa6, 0x85,
- 0x89, 0x24, 0xc4, 0x77,
- 0xfc, 0x1c, 0x02, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x8c, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0x80, 0x00, 0x0f, 0xa8,
- 0x12, 0xc0, 0x2f, 0x9e,
- 0x27, 0x8e, 0xe4, 0x10,
- 0xc0, 0x14, 0xc7, 0x97,
- 0xb3, 0x11, 0x3e, 0x1e,
- 0xe6, 0x86, 0x50, 0xba,
- 0x3e, 0xb4, 0xa3, 0x14,
- 0xc5, 0x87, 0x84, 0x81,
- 0x66, 0x86, 0x52, 0x9a,
- 0x16, 0xb5, 0x98, 0x83,
- 0xad, 0xc1, 0x7c, 0x1c,
- 0x58, 0x2a, 0x10, 0x91,
- 0x49, 0x97, 0xe6, 0xb2,
- 0xe0, 0x04, 0x0e, 0x06,
- 0x04, 0xb4, 0x12, 0x83,
- 0x04, 0x83, 0xe0, 0x98,
- 0x10, 0xc3, 0x83, 0x91,
- 0x13, 0x45, 0x8f, 0x81,
- 0xa7, 0x8e, 0x83, 0x21,
- 0x14, 0x75, 0xa8, 0x24,
- 0x14, 0x85, 0xe0, 0x10,
- 0x2f, 0x9e, 0xe0, 0x20,
- 0x14, 0x95, 0xc4, 0x27,
- 0xc4, 0x77, 0x60, 0x30,
- 0x7c, 0x08, 0x0a, 0x15,
- 0x0a, 0x75, 0xc4, 0x87,
- 0x0a, 0x85, 0xfc, 0x1c,
- 0xc4, 0x97, 0x7c, 0x20,
- 0xfc, 0x24, 0x0a, 0x55,
- 0x82, 0x73, 0x1b, 0x14,
- 0x90, 0x73, 0x2f, 0x94,
- 0x0a, 0xb4, 0x0a, 0x73,
- 0x4e, 0x12, 0xe0, 0x84,
- 0xae, 0x53, 0xfa, 0x1c,
- 0x90, 0xe5, 0x92, 0x5d,
- 0x10, 0xc0, 0x23, 0x94,
- 0x42, 0x14, 0xe4, 0x10,
- 0x96, 0xc3, 0xc7, 0x87,
- 0x66, 0xa6, 0x50, 0x8a,
- 0x02, 0x15, 0xc4, 0xc7,
- 0x84, 0x81, 0xfc, 0x08,
- 0x98, 0x83, 0xc5, 0x87,
- 0x90, 0x11, 0x02, 0x83,
- 0x70, 0x9c, 0x58, 0x82,
- 0xe1, 0x90, 0x16, 0x14,
- 0x91, 0x81, 0x12, 0x1b,
- 0x0e, 0x06, 0x0b, 0x95,
- 0xa7, 0x8e, 0xe0, 0x08,
- 0x14, 0x15, 0xa8, 0x84,
- 0xc4, 0x87, 0xe0, 0x10,
- 0x7c, 0x20, 0x0a, 0x75,
- 0x0a, 0x15, 0xc4, 0x17,
- 0x8f, 0x54, 0xfc, 0x04,
- 0x4e, 0x52, 0x8e, 0x13,
- 0x4a, 0xb2, 0xfa, 0x04,
- 0xc2, 0x57, 0xf1, 0x9c,
- 0x86, 0x65, 0x92, 0x5d,
- 0x85, 0x91, 0x2f, 0x9e,
- 0x7c, 0x20, 0x04, 0x15,
- 0xe4, 0x10, 0x04, 0xc0,
- 0xc7, 0x27, 0x23, 0x84,
- 0x02, 0xc3, 0x96, 0xc3,
- 0x44, 0x2a, 0x88, 0x11,
- 0x8e, 0xc3, 0x66, 0xa2,
- 0x16, 0x14, 0x44, 0xc7,
- 0x04, 0x21, 0xe1, 0x8c,
- 0x45, 0x27, 0x90, 0x1b,
- 0x04, 0xc3, 0x91, 0x81,
- 0xe0, 0x08, 0x0e, 0x06,
- 0x85, 0x21, 0x05, 0xd5,
- 0x92, 0x5b, 0x0d, 0x05,
- 0xc4, 0x77, 0x7e, 0x24,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xfa, 0x04, 0x44, 0x22,
- 0xe0, 0x84, 0x02, 0x24,
- 0xf1, 0x84, 0x4a, 0xb2,
- 0x92, 0x5d, 0xc2, 0x57,
- 0xaf, 0x9e, 0x98, 0x05,
- 0x10, 0xc0, 0x27, 0x8e,
- 0x00, 0x15, 0xe4, 0x10,
- 0xc7, 0x87, 0x60, 0x14,
- 0x96, 0xc3, 0x23, 0x94,
- 0x7c, 0x1c, 0x02, 0x15,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xe6, 0xa6, 0x50, 0x8a,
- 0x82, 0x23, 0x10, 0x81,
- 0x84, 0x11, 0x49, 0x87,
- 0xc4, 0x27, 0x10, 0xc3,
- 0x61, 0x88, 0x16, 0x14,
- 0x12, 0x1b, 0x84, 0xc3,
- 0x07, 0x21, 0x8f, 0x81,
- 0x42, 0xba, 0x89, 0x91,
- 0x92, 0x13, 0xe6, 0x86,
- 0xe5, 0x1f, 0x17, 0x24,
- 0x42, 0xca, 0x82, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x8e, 0x13, 0xe6, 0x8a,
- 0x82, 0x5d, 0xf1, 0x1f,
- 0x80, 0x5c, 0x1e, 0x55,
- 0x40, 0x45, 0x88, 0xc5,
- 0xa3, 0x3b, 0x60, 0x8c,
- 0x88, 0x2b, 0x1d, 0x14,
- 0x48, 0x20, 0x27, 0x84,
- 0xad, 0xb4, 0xdc, 0x00,
- 0x82, 0x11, 0x2b, 0x74,
- 0x86, 0x95, 0x9d, 0x1e,
- 0x60, 0xf4, 0x00, 0x15,
- 0x98, 0x4b, 0x84, 0xcb,
- 0x71, 0x84, 0x46, 0x22,
- 0x02, 0x30, 0xff, 0x21,
- 0x29, 0x24, 0xec, 0x40,
- 0x95, 0x14, 0x84, 0x1d,
- 0x5c, 0x00, 0x44, 0x30,
- 0x1e, 0x25, 0x83, 0x3d,
- 0x83, 0x11, 0x40, 0x50,
- 0x60, 0x80, 0x40, 0x15,
- 0x8b, 0x4e, 0x85, 0x31,
- 0x81, 0x45, 0xa9, 0x2e,
- 0xad, 0xb4, 0xa7, 0x84,
- 0x06, 0xcb, 0xab, 0x74,
- 0x08, 0x40, 0x82, 0x61,
- 0x10, 0x80, 0x6c, 0x04,
- 0x14, 0xa0, 0xec, 0x10,
- 0x8a, 0x9b, 0x6c, 0x10,
- 0x8e, 0x3b, 0x01, 0x45,
- 0x92, 0x5b, 0x7f, 0x35,
- 0x83, 0x4d, 0xa9, 0x14,
- 0x9f, 0xfc, 0x27, 0x58,
- 0xa1, 0x3d, 0x8b, 0x34,
- 0x9d, 0x24, 0x82, 0x15,
- 0xe0, 0xf4, 0x00, 0x15,
- 0x83, 0x2d, 0x82, 0x21,
- 0xc0, 0x8c, 0x40, 0x35,
- 0x1e, 0xf0, 0x01, 0x11,
- 0x40, 0x15, 0xe5, 0x80,
- 0x0c, 0x0c, 0xe0, 0x98,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x60, 0xbc, 0x00, 0x85,
- 0x40, 0x15, 0xff, 0x11,
- 0x00, 0x15, 0xe0, 0x90,
- 0x91, 0x1e, 0xe0, 0xc0,
- 0xe0, 0x30, 0x00, 0x15,
- 0xe0, 0x18, 0x00, 0xb5,
- 0x00, 0x15, 0x8d, 0x1e,
- 0x8b, 0x1e, 0xe0, 0x24,
- 0xe0, 0x64, 0x00, 0x15,
- 0x89, 0xbe, 0xfe, 0x8e,
- 0x81, 0x11, 0x0f, 0x1e,
- 0x81, 0x11, 0x13, 0x1e,
- 0x81, 0x11, 0x3e, 0x1e,
- 0xad, 0xb5, 0xfc, 0x1e,
- 0xe3, 0x1c, 0x05, 0x0a,
- 0xc0, 0x00, 0x16, 0xe8,
- 0x60, 0x20, 0x00, 0x75,
- 0xe0, 0x88, 0x06, 0xa4,
- 0x7c, 0x0c, 0x16, 0x85,
- 0x8f, 0x14, 0x82, 0x21,
- 0x0e, 0x95, 0xc4, 0x87,
- 0xa1, 0x1b, 0x7c, 0x20,
- 0x96, 0xc5, 0x93, 0x2e,
- 0xb4, 0x13, 0xfe, 0x14,
- 0x96, 0x45, 0xb0, 0x1d,
- 0x60, 0xb4, 0x00, 0x15,
- 0x06, 0x55, 0x96, 0x33,
- 0x06, 0x25, 0xfa, 0x10,
- 0xc4, 0x57, 0xe0, 0x20,
- 0x7c, 0x14, 0x0e, 0x45,
- 0x0e, 0xc5, 0xc4, 0x27,
- 0x04, 0x10, 0x7c, 0x08,
- 0x87, 0x27, 0xe4, 0x10,
- 0xfa, 0x10, 0x44, 0x22,
- 0x60, 0x10, 0x00, 0x95,
- 0x08, 0x24, 0x92, 0xc3,
- 0x4c, 0xc2, 0xe0, 0x84,
- 0x12, 0x85, 0xf1, 0x90,
- 0xa3, 0x6d, 0x7c, 0x20,
- 0xa4, 0xb5, 0xbc, 0x8e,
- 0x60, 0x14, 0x00, 0x45,
- 0x8b, 0x94, 0xc2, 0x67,
- 0x7c, 0x14, 0x08, 0x45,
- 0xe4, 0x10, 0x0a, 0x80,
- 0x98, 0x83, 0x47, 0x57,
- 0xe6, 0xa6, 0x4a, 0x5a,
- 0x64, 0x08, 0x16, 0x40,
- 0x45, 0xb7, 0x88, 0x23,
- 0x56, 0xba, 0x90, 0x51,
- 0xc9, 0x57, 0x66, 0xa6,
- 0xc4, 0x27, 0x0a, 0x83,
- 0x84, 0x83, 0x08, 0xb1,
- 0xc7, 0xb7, 0x0d, 0x44,
- 0x44, 0x8a, 0x96, 0x83,
- 0x44, 0x2a, 0xf0, 0x0a,
- 0x04, 0x20, 0xe6, 0x92,
- 0xcf, 0x27, 0xe5, 0x00,
- 0x1e, 0xb5, 0x84, 0x6d,
- 0x9a, 0xe5, 0x80, 0x10,
- 0x84, 0x6d, 0xfc, 0x24,
- 0xc0, 0x90, 0x40, 0xa5,
- 0x89, 0xb4, 0xbe, 0x24,
- 0xc0, 0x08, 0x5e, 0x65,
- 0x98, 0xb5, 0xa1, 0x2b,
- 0xe0, 0xf8, 0x00, 0x25,
- 0x44, 0xa2, 0x91, 0x44,
- 0x48, 0x22, 0xf1, 0x88,
- 0x83, 0x21, 0x7a, 0x10,
- 0xbe, 0x2e, 0x91, 0x4e,
- 0x00, 0x65, 0x8b, 0xa5,
- 0x42, 0xb2, 0x60, 0xb4,
- 0x02, 0x45, 0xf0, 0x8c,
- 0x00, 0xb5, 0xfa, 0x10,
- 0x06, 0x60, 0xe0, 0x14,
- 0x44, 0x47, 0xe4, 0x10,
- 0x0e, 0x25, 0x87, 0x37,
- 0x16, 0xc5, 0xfc, 0x10,
- 0x4a, 0x32, 0xfc, 0x20,
- 0x04, 0x94, 0x7a, 0x08,
- 0x06, 0x54, 0xe0, 0x84,
- 0x46, 0x22, 0xe0, 0x84,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0xc0, 0x10, 0x1e, 0xb5,
- 0x16, 0x45, 0xa2, 0x55,
- 0x50, 0xc2, 0x7c, 0x10,
- 0x3c, 0xce, 0xf0, 0xa4,
- 0xe4, 0x08, 0x16, 0xc0,
- 0xc5, 0xb7, 0x0b, 0xc4,
- 0x84, 0x41, 0x08, 0x83,
- 0x8a, 0x83, 0x45, 0x47,
- 0x66, 0xb2, 0x56, 0xba,
- 0x48, 0x4a, 0xc4, 0x87,
- 0xc2, 0x37, 0x66, 0xb2,
- 0x88, 0xb1, 0x0d, 0x54,
- 0xc7, 0xb7, 0x08, 0x41,
- 0x96, 0x43, 0xc7, 0x47,
- 0x48, 0x4a, 0x90, 0x43,
- 0x48, 0x4a, 0xf0, 0x0a,
- 0x08, 0x40, 0xe6, 0x96,
- 0xcf, 0x47, 0xe5, 0x00,
- 0x1e, 0xb5, 0x88, 0x3d,
- 0x1e, 0xc5, 0x80, 0x10,
- 0x98, 0x65, 0x80, 0x00,
- 0x89, 0xb4, 0xfc, 0x44,
- 0x40, 0xa5, 0x88, 0x3d,
- 0x5e, 0x35, 0xc0, 0x90,
- 0xbe, 0x34, 0xc0, 0x08,
- 0xa1, 0x3b, 0xbc, 0xc4,
- 0x00, 0x35, 0x96, 0x15,
- 0x91, 0x44, 0xe0, 0xf8,
- 0xf1, 0x8c, 0x46, 0xa2,
- 0x7a, 0x10, 0x48, 0x32,
- 0x91, 0x4e, 0x83, 0x31,
- 0x89, 0xd5, 0xbe, 0x3e,
- 0x10, 0xa0, 0x0c, 0x34,
- 0x04, 0x84, 0xec, 0x04,
- 0xa0, 0x11, 0x60, 0x88,
- 0x7c, 0x08, 0x16, 0x65,
- 0x02, 0x24, 0x8b, 0x17,
- 0x0e, 0x45, 0xc4, 0x37,
- 0xc4, 0x67, 0xfc, 0x0c,
- 0xfc, 0x18, 0x04, 0x25,
- 0xfa, 0x08, 0x46, 0x12,
- 0xe0, 0x88, 0x02, 0x34,
- 0xa2, 0xa5, 0x89, 0x1d,
- 0xe0, 0x8c, 0x02, 0x34,
- 0xf1, 0x84, 0x42, 0xc2,
- 0xa0, 0xf5, 0xa3, 0x1d,
- 0xb3, 0x41, 0x40, 0x24,
- 0x66, 0x92, 0x48, 0xca,
- 0x8b, 0xc4, 0xc2, 0x17,
- 0x7c, 0x18, 0x04, 0x25,
- 0x3c, 0x64, 0x84, 0x41,
- 0x0a, 0x60, 0xc5, 0x47,
- 0x8c, 0x43, 0x64, 0x10,
- 0xad, 0x61, 0x47, 0x57,
- 0xe6, 0xb2, 0x4a, 0x5a,
- 0x66, 0xb2, 0x58, 0x2a,
- 0x10, 0x51, 0xcc, 0x27,
- 0xe6, 0x9a, 0x46, 0x3a,
- 0x82, 0xc1, 0x49, 0x57,
- 0xc3, 0xc7, 0x0a, 0x43,
- 0x86, 0x43, 0x0d, 0x34,
- 0x98, 0x43, 0x84, 0x43,
- 0xf0, 0x0a, 0x44, 0x4a,
- 0xe6, 0x8e, 0x44, 0x2a,
- 0xe5, 0x00, 0x04, 0x20,
- 0x84, 0x1d, 0xcf, 0x27,
- 0xfc, 0x24, 0x96, 0xc5,
- 0x40, 0xa5, 0x84, 0x1d,
- 0x5e, 0x15, 0xc0, 0x90,
- 0x89, 0xb5, 0xc0, 0x08,
- 0x10, 0xa0, 0x02, 0x44,
- 0x04, 0x54, 0xec, 0x04,
- 0xe0, 0x88, 0x06, 0x84,
- 0x7c, 0x0c, 0x16, 0x35,
- 0x8b, 0x67, 0xa0, 0x61,
- 0x02, 0x34, 0xc4, 0x57,
- 0x08, 0x35, 0xe0, 0x88,
- 0x0e, 0x45, 0xfc, 0x04,
- 0x4c, 0x62, 0xfc, 0x14,
- 0x06, 0x64, 0xfa, 0x0c,
- 0x89, 0x3d, 0xe0, 0x88,
- 0x06, 0x64, 0x90, 0x05,
- 0x46, 0x22, 0xe0, 0x8c,
- 0xa3, 0x3d, 0xf1, 0x8c,
- 0x40, 0x24, 0x8e, 0x55,
- 0xe4, 0x08, 0x08, 0xc0,
- 0xc5, 0x47, 0x0b, 0x74,
- 0xc4, 0xc7, 0x39, 0x51,
- 0x7c, 0x04, 0x04, 0x15,
- 0x48, 0x4a, 0x9b, 0x21,
- 0xc2, 0x37, 0x66, 0x9e,
- 0xe6, 0x8a, 0x44, 0x9a,
- 0x4a, 0x6a, 0x08, 0x41,
- 0x04, 0xc3, 0xe6, 0x96,
- 0xe6, 0x9e, 0x44, 0x1a,
- 0xcc, 0x17, 0x47, 0x47,
- 0x82, 0x21, 0x08, 0xc3,
- 0xc3, 0x27, 0x0a, 0xc3,
- 0x0d, 0x24, 0x82, 0xc3,
- 0x42, 0xca, 0x84, 0xc3,
- 0x42, 0x1a, 0xf0, 0x0a,
- 0x02, 0x10, 0xe6, 0x8a,
- 0xcf, 0x17, 0xe5, 0x00,
- 0x84, 0x65, 0x82, 0x3d,
- 0x82, 0x3d, 0xfc, 0x14,
- 0xc0, 0x90, 0x40, 0xa5,
- 0xc0, 0x08, 0x5e, 0x35,
- 0xa1, 0x1b, 0xbe, 0x14,
- 0x00, 0x15, 0x82, 0x55,
- 0x11, 0x14, 0xe0, 0xf8,
- 0x42, 0xa2, 0xa2, 0xa3,
- 0x11, 0x1e, 0xfa, 0x04,
- 0xbe, 0x1e, 0x83, 0x11,
- 0x90, 0xab, 0x11, 0x14,
- 0x83, 0xad, 0x93, 0x24,
- 0x9f, 0xfc, 0x29, 0x28,
- 0xd0, 0xf1, 0x01, 0x11,
- 0xe0, 0x98, 0x40, 0x15,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0xac, 0x00, 0x15,
- 0x00, 0x25, 0x81, 0x41,
- 0x81, 0x51, 0x60, 0xa0,
- 0x81, 0x85, 0x84, 0x34,
- 0x06, 0xcd, 0xc5, 0xc4,
- 0xfb, 0x30, 0x46, 0x32,
- 0x1c, 0x00, 0x48, 0x50,
- 0x85, 0x5d, 0x82, 0x51,
- 0x40, 0x45, 0xfe, 0x15,
- 0xdd, 0x93, 0xe0, 0xb8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x18, 0x02, 0x65,
- 0x8e, 0x35, 0xa3, 0x2b,
- 0xe0, 0x4c, 0x02, 0x55,
- 0x94, 0x65, 0x81, 0x5d,
- 0x08, 0x04, 0x06, 0xc4,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x88, 0x63, 0x7c, 0x10,
- 0x6c, 0x04, 0x0e, 0x00,
- 0x80, 0x4b, 0x83, 0x81,
- 0xe0, 0x88, 0x06, 0x24,
- 0xfc, 0x0c, 0x18, 0x35,
- 0x86, 0xab, 0x03, 0xf5,
- 0xf8, 0x04, 0x0c, 0x95,
- 0x18, 0x95, 0xc4, 0x97,
- 0x95, 0x9d, 0xfc, 0x24,
- 0x87, 0x9d, 0x82, 0xa5,
- 0x02, 0xa5, 0x82, 0x65,
- 0x16, 0xa4, 0xe0, 0xb4,
- 0xf7, 0xb7, 0xe1, 0x7c,
- 0x8e, 0xbb, 0x16, 0xa3,
- 0x94, 0x9d, 0x8b, 0xa7,
- 0xa3, 0x8b, 0x80, 0x95,
- 0x88, 0xbb, 0x82, 0x75,
- 0x0c, 0x60, 0x02, 0x81,
- 0x0e, 0x70, 0xec, 0x10,
- 0x92, 0xab, 0x6c, 0x04,
- 0x8a, 0x8d, 0x96, 0x4b,
- 0x98, 0x54, 0xf8, 0x45,
- 0x18, 0x55, 0xc4, 0x57,
- 0x81, 0xc5, 0xfc, 0x14,
- 0x04, 0x04, 0x06, 0x34,
- 0x0c, 0x25, 0xe0, 0x88,
- 0x08, 0x24, 0xfc, 0x08,
- 0x06, 0x55, 0xe0, 0x88,
- 0x80, 0x4b, 0x7c, 0x10,
- 0x02, 0xc5, 0x8a, 0x3b,
- 0xc4, 0x27, 0x60, 0x20,
- 0xe3, 0x40, 0x02, 0x19,
- 0xfc, 0x08, 0x18, 0x25,
- 0xe6, 0x86, 0x46, 0x3a,
- 0xe6, 0x86, 0x42, 0x5a,
- 0x86, 0x53, 0x04, 0x21,
- 0x82, 0x23, 0x85, 0x27,
- 0x48, 0x00, 0x85, 0x5d,
- 0x88, 0x0b, 0xdc, 0x00,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x80, 0x1e, 0xf0,
- 0xe0, 0x84, 0x00, 0x15,
- 0xb0, 0xf5, 0xa1, 0x1d,
- 0x60, 0x1c, 0x00, 0x25,
- 0xe0, 0x84, 0x12, 0x14,
- 0x12, 0x73, 0x84, 0x93,
- 0xa1, 0x7d, 0xe0, 0x30,
- 0x00, 0x45, 0xae, 0xd5,
- 0x87, 0x51, 0x60, 0xa0,
- 0xe0, 0x60, 0x12, 0x33,
- 0xe6, 0x96, 0x50, 0x4a,
- 0xac, 0xa5, 0x91, 0x3d,
- 0xac, 0x75, 0xa1, 0x3d,
- 0xac, 0x25, 0x91, 0x7d,
- 0x0c, 0x70, 0x09, 0x2e,
- 0x00, 0x45, 0xe4, 0x0c,
- 0x00, 0xa5, 0xe0, 0xb4,
- 0xa0, 0x41, 0xe0, 0xd4,
- 0x61, 0x7c, 0x0a, 0x44,
- 0xfa, 0x80, 0x04, 0xa4,
- 0xf7, 0x57, 0x0f, 0x2e,
- 0x04, 0xa4, 0x0a, 0x43,
- 0x0b, 0x47, 0xe1, 0xa0,
- 0x0d, 0x4e, 0xe1, 0xa7,
- 0xe0, 0x88, 0x08, 0x64,
- 0x60, 0x18, 0x00, 0x55,
- 0xfa, 0x80, 0x16, 0x24,
- 0xfe, 0x2e, 0xfc, 0xae,
- 0x54, 0x52, 0x0b, 0x5e,
- 0x01, 0x51, 0xf0, 0x90,
- 0x81, 0xc5, 0x81, 0x41,
- 0x82, 0x61, 0x69, 0x24,
- 0xe0, 0x20, 0x00, 0xc5,
- 0x18, 0x25, 0xc4, 0x27,
- 0x84, 0x21, 0xfc, 0x08,
- 0x48, 0x22, 0x85, 0x27,
- 0x86, 0x6d, 0xfa, 0x10,
- 0x0f, 0xc4, 0xfc, 0x85,
- 0x12, 0x23, 0xa0, 0x1d,
- 0x8e, 0xc3, 0xc0, 0x2c,
- 0xf0, 0xac, 0x4e, 0xc2,
- 0x5b, 0x1c, 0x4e, 0x22,
- 0x9c, 0xf5, 0xa3, 0xcd,
- 0x89, 0x2d, 0x8d, 0x24,
- 0x04, 0xb0, 0x9c, 0x85,
- 0xfa, 0x2d, 0xec, 0x04,
- 0x91, 0x7d, 0x9c, 0x15,
- 0x0d, 0x24, 0x9a, 0xc5,
- 0xe1, 0x84, 0x06, 0xb4,
- 0x0c, 0xc0, 0x0b, 0xa4,
- 0x3e, 0x1e, 0xe4, 0x04,
- 0xe0, 0x88, 0x02, 0x64,
- 0xa8, 0x23, 0x0f, 0x1e,
- 0x82, 0xa3, 0x44, 0x27,
- 0x81, 0x91, 0x26, 0x23,
- 0x60, 0xae, 0x46, 0x2a,
- 0xe0, 0x88, 0x04, 0x44,
- 0x8c, 0x8b, 0x01, 0xb1,
- 0x03, 0x15, 0xa6, 0xcb,
- 0x69, 0x24, 0xa4, 0xc3,
- 0x82, 0x14, 0x82, 0x81,
- 0x02, 0x15, 0xc4, 0x27,
- 0xc4, 0x17, 0xfc, 0x08,
- 0xa6, 0xc3, 0x18, 0x13,
- 0x60, 0x00, 0x04, 0x12,
- 0xe8, 0x00, 0x02, 0x12,
- 0xa2, 0x93, 0x04, 0xb3,
- 0xfc, 0x05, 0x8e, 0x8d,
- 0x18, 0x90, 0x0b, 0x84,
- 0x0f, 0x14, 0xe4, 0x08,
- 0xe4, 0x08, 0x06, 0xb0,
- 0x03, 0x25, 0x89, 0x94,
- 0x61, 0x14, 0x82, 0x83,
- 0xc0, 0x24, 0x82, 0x61,
- 0x04, 0x15, 0xc4, 0x17,
- 0x00, 0x25, 0xfc, 0x04,
- 0x44, 0x2a, 0xe0, 0x24,
- 0x8a, 0x13, 0x66, 0x86,
- 0xe5, 0x00, 0x04, 0x20,
- 0x4a, 0x12, 0xcf, 0x27,
- 0x8e, 0x6d, 0xf0, 0x88,
- 0xfe, 0x14, 0xfa, 0xe5,
- 0xf4, 0x20, 0x02, 0x8a,
- 0x0c, 0x34, 0x88, 0xd5,
- 0x85, 0xc7, 0x61, 0x08,
- 0xf1, 0xb0, 0x46, 0x62,
- 0x86, 0xe5, 0xa0, 0x3d,
- 0x60, 0xd0, 0x00, 0x05,
- 0x7c, 0x24, 0x8c, 0xc3,
- 0x42, 0xca, 0x8a, 0xc3,
- 0xd1, 0x07, 0xf0, 0x0a,
- 0xfa, 0x80, 0x00, 0x04,
- 0xe6, 0x92, 0x40, 0x0a,
- 0xe6, 0x8a, 0x42, 0x1a,
- 0x05, 0x07, 0x84, 0x01,
- 0xe6, 0x00, 0x02, 0x10,
- 0x91, 0x17, 0x06, 0x03,
- 0x82, 0x0d, 0x3e, 0x04,
- 0xd0, 0xa4, 0x40, 0x02,
- 0xc1, 0xe0, 0x00, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0xc1, 0xe0, 0x40, 0x11,
- 0x0c, 0x0c, 0xc0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0xa8, 0x00, 0x15,
- 0x00, 0x75, 0x81, 0x41,
- 0x00, 0x25, 0xe0, 0xac,
- 0x00, 0xa5, 0xe0, 0xb0,
- 0xa3, 0x1d, 0x60, 0xa0,
- 0x88, 0x4e, 0x9c, 0x4e,
- 0x83, 0x13, 0x84, 0x35,
- 0x8d, 0xf3, 0x83, 0x33,
- 0x9c, 0xc4, 0x82, 0x54,
- 0xfc, 0x10, 0x0a, 0x55,
- 0x9c, 0x5e, 0x98, 0x53,
- 0x88, 0xc4, 0xc0, 0x54,
- 0x7c, 0x10, 0x0a, 0x55,
- 0x98, 0x53, 0x88, 0x41,
- 0x02, 0x54, 0x88, 0x5e,
- 0xf1, 0x84, 0x48, 0xa2,
- 0x18, 0x70, 0x23, 0x4d,
- 0x4c, 0x70, 0xe4, 0x10,
- 0x08, 0x55, 0xdc, 0x00,
- 0xdc, 0x00, 0x50, 0x50,
- 0x60, 0x88, 0x06, 0x44,
- 0x7c, 0x3e, 0x8e, 0x6b,
- 0xe0, 0x88, 0x16, 0x14,
- 0xfe, 0x0c, 0x0c, 0x95,
- 0x82, 0xa1, 0x7e, 0xae,
- 0xa2, 0xa3, 0x09, 0x13,
- 0x8a, 0xab, 0x3e, 0xae,
- 0x89, 0x73, 0x83, 0x33,
- 0x7c, 0x2c, 0x14, 0xa5,
- 0xcd, 0x84, 0x94, 0x3b,
- 0x14, 0x93, 0xb0, 0x93,
- 0xf1, 0x9e, 0x86, 0xab,
- 0xbe, 0xc4, 0xfc, 0x84,
- 0x02, 0x54, 0xfe, 0xa4,
- 0xc4, 0xc7, 0x8a, 0x83,
- 0x0e, 0xa0, 0x8e, 0xc3,
- 0x48, 0x9a, 0xec, 0x04,
- 0x00, 0xd8, 0xe0, 0x1c,
- 0x0e, 0x10, 0xa0, 0x00,
- 0x8f, 0x13, 0xec, 0x04,
- 0x87, 0x73, 0x83, 0x33,
- 0xe1, 0x74, 0xd9, 0x34,
- 0xae, 0x33, 0xd5, 0x94,
- 0xf1, 0x3e, 0x92, 0x33,
- 0x18, 0x20, 0x40, 0x54,
- 0x88, 0x75, 0xe4, 0x10,
- 0x60, 0x88, 0x0e, 0x44,
- 0x0c, 0x85, 0x84, 0x6b,
- 0x06, 0xa0, 0x7e, 0x1c,
- 0x09, 0x13, 0xe4, 0x04,
- 0xf1, 0x84, 0x48, 0x32,
- 0x06, 0x14, 0x07, 0x33,
- 0x30, 0xac, 0xe0, 0x88,
- 0x8a, 0x9b, 0x68, 0x00,
- 0x7c, 0x0c, 0x12, 0x95,
- 0xe9, 0xb4, 0x92, 0xab,
- 0x12, 0x83, 0xb6, 0x83,
- 0xf1, 0x8e, 0x94, 0x9b,
- 0x46, 0x52, 0x40, 0x54,
- 0xc4, 0x47, 0xf0, 0x9c,
- 0x20, 0x01, 0x00, 0xa8,
- 0x58, 0x22, 0x40, 0x00,
- 0x83, 0x05, 0xf0, 0x90,
- 0x8a, 0x3b, 0x04, 0x6b,
- 0xa0, 0x00, 0x00, 0xd8,
- 0xec, 0x04, 0x00, 0x10,
- 0x83, 0x33, 0x81, 0x13,
- 0xd9, 0x04, 0x87, 0x73,
- 0xd5, 0x24, 0xcd, 0x14,
- 0x84, 0x03, 0xa2, 0x03,
- 0xa0, 0xf1, 0xf1, 0x0e,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x60, 0xa0, 0x02, 0x35,
- 0x02, 0x25, 0x87, 0x41,
- 0x46, 0x3a, 0xe0, 0x50,
- 0x48, 0x22, 0xe6, 0x92,
- 0x06, 0x30, 0xf0, 0x80,
- 0x87, 0x4d, 0xec, 0x04,
- 0x02, 0x35, 0x8a, 0xa5,
- 0x08, 0x04, 0x60, 0x18,
- 0x83, 0xc1, 0xe0, 0x88,
- 0xfc, 0x10, 0x06, 0x55,
- 0xc4, 0x57, 0x86, 0x44,
- 0xfc, 0x14, 0x08, 0x55,
- 0x0c, 0x00, 0x83, 0xf5,
- 0x0e, 0x04, 0x64, 0x04,
- 0x06, 0x75, 0xe0, 0x88,
- 0x10, 0x64, 0x7c, 0x1c,
- 0x06, 0x85, 0xe0, 0x88,
- 0xc4, 0x77, 0xfc, 0x20,
- 0x7c, 0x1c, 0x08, 0x95,
- 0x08, 0x75, 0xc4, 0x87,
- 0x93, 0x7d, 0xfc, 0x20,
- 0x8b, 0x7d, 0x82, 0x05,
- 0x02, 0x85, 0x80, 0xc5,
- 0xca, 0x77, 0x60, 0xb4,
- 0x80, 0x95, 0x90, 0x7d,
- 0x80, 0x6b, 0x23, 0xcb,
- 0x02, 0xc1, 0x80, 0xb5,
- 0x84, 0xcd, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xf8, 0x25,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0x60, 0xa0, 0x00, 0x55,
- 0x00, 0x45, 0x81, 0x31,
- 0x02, 0x54, 0xe0, 0x18,
- 0x04, 0x54, 0x60, 0x88,
- 0x81, 0xc5, 0xe0, 0x8c,
- 0x4a, 0x42, 0x08, 0xcb,
- 0x71, 0x3e, 0xf0, 0x84,
- 0x94, 0x3e, 0x84, 0x43,
- 0x82, 0x31, 0x10, 0x3e,
- 0x60, 0xa0, 0x00, 0x55,
- 0x8b, 0x3d, 0x98, 0x4b,
- 0xdd, 0x93, 0xfc, 0x95,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xa0, 0x1e, 0xf0,
- 0x81, 0x31, 0x2d, 0x0d,
- 0x04, 0x55, 0xac, 0x35,
- 0x04, 0x45, 0xe1, 0x04,
- 0x04, 0xa5, 0xe1, 0x08,
- 0x13, 0x5e, 0xe1, 0x0c,
- 0xf1, 0x94, 0x56, 0x12,
- 0x4a, 0x12, 0x11, 0x4e,
- 0x04, 0x95, 0xf1, 0x90,
- 0x40, 0x12, 0x61, 0x10,
- 0x04, 0x85, 0xf1, 0xa8,
- 0x58, 0x52, 0x61, 0x14,
- 0x04, 0x45, 0xf9, 0xac,
- 0x4c, 0xc2, 0x61, 0x18,
- 0x0f, 0x1e, 0xf9, 0x80,
- 0xf1, 0xa4, 0x4e, 0x12,
- 0x58, 0x12, 0x0d, 0x7e,
- 0x2c, 0x7f, 0xf1, 0xa0,
- 0xf1, 0x90, 0x48, 0x12,
- 0xb8, 0x7f, 0x0b, 0xce,
- 0xa1, 0x7d, 0xa8, 0x7f,
- 0x7c, 0x4e, 0xa2, 0x75,
- 0xe0, 0x88, 0x02, 0xb4,
- 0xc4, 0x57, 0x09, 0xae,
- 0xfe, 0x8e, 0xbe, 0x9e,
- 0xe0, 0x18, 0x04, 0x95,
- 0xe1, 0x1c, 0x04, 0x85,
- 0xe0, 0xb4, 0x04, 0xa5,
- 0xfc, 0x14, 0x12, 0x75,
- 0xfc, 0x04, 0x12, 0x15,
- 0xe0, 0x20, 0x04, 0x55,
- 0xc4, 0x17, 0xc4, 0x77,
- 0xfc, 0x04, 0x0a, 0x45,
- 0xfc, 0x1c, 0x0a, 0x15,
- 0xe1, 0x20, 0x04, 0x75,
- 0xe6, 0xa2, 0x50, 0x4a,
- 0xf1, 0x90, 0x48, 0x12,
- 0x66, 0x9e, 0x4e, 0x4a,
- 0x90, 0x7d, 0xb4, 0x83,
- 0x04, 0x45, 0x98, 0xe5,
- 0x0c, 0x04, 0x61, 0x24,
- 0x12, 0x35, 0xe0, 0x88,
- 0x93, 0x04, 0xfc, 0x18,
- 0x0a, 0x35, 0xc4, 0x37,
- 0x42, 0x32, 0xfc, 0x0c,
- 0x42, 0x1a, 0xf1, 0x84,
- 0x92, 0x4b, 0x66, 0x92,
- 0x8c, 0x25, 0x8e, 0x1d,
- 0xc4, 0xb7, 0x8d, 0xb4,
- 0xfc, 0x2c, 0x08, 0x05,
- 0x0a, 0x65, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x46, 0x62, 0xe1, 0x28,
- 0x46, 0x3a, 0xf1, 0x8c,
- 0x91, 0x04, 0xe6, 0x82,
- 0x88, 0x25, 0x82, 0x3d,
- 0xc4, 0xa7, 0x8b, 0xa4,
- 0xfc, 0x28, 0x08, 0x05,
- 0x0a, 0x95, 0xc4, 0x07,
- 0x04, 0x05, 0xfc, 0x00,
- 0x42, 0x92, 0xe1, 0x2c,
- 0x42, 0x1a, 0xf1, 0x98,
- 0x89, 0x04, 0xe6, 0x82,
- 0x84, 0x25, 0x86, 0x1d,
- 0x04, 0x35, 0xfc, 0x04,
- 0xc4, 0x07, 0xe1, 0x30,
- 0xfc, 0x00, 0x08, 0x05,
- 0x0a, 0x05, 0xc4, 0x07,
- 0xb2, 0x03, 0xfc, 0x00,
- 0xe6, 0x8e, 0x40, 0x0a,
- 0x82, 0x0d, 0x7e, 0x04,
- 0x80, 0x04, 0x1e, 0x05,
- 0x88, 0x75, 0xa9, 0x0d,
- 0xe0, 0x74, 0x04, 0x15,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x8f, 0xc4, 0x86, 0xc5,
- 0xaf, 0xcd, 0xa0, 0xc3,
- 0xc4, 0xc7, 0x86, 0x55,
- 0x18, 0x15, 0x88, 0xc3,
- 0x18, 0x25, 0xf8, 0x18,
- 0xf0, 0x34, 0xf8, 0x08,
- 0x0a, 0x15, 0xc4, 0x17,
- 0xc4, 0x27, 0x7c, 0x04,
- 0x7c, 0x08, 0x0a, 0x25,
- 0x0a, 0x35, 0xc4, 0x37,
- 0xa4, 0x13, 0xfc, 0x0c,
- 0x84, 0x1d, 0xa6, 0x23,
- 0x8c, 0x10, 0x00, 0x00,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x06, 0x0b, 0x80, 0x3b,
- 0x0c, 0x0c, 0xd0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x7b, 0x0b, 0x2e,
- 0x02, 0x40, 0x09, 0x0e,
- 0x00, 0x08, 0xe4, 0xc0,
- 0xe7, 0x00, 0x04, 0x40,
- 0x66, 0x40, 0x0a, 0x40,
- 0x01, 0xf5, 0x99, 0xc1,
- 0x42, 0x65, 0x81, 0x61,
- 0x18, 0xc0, 0x78, 0x30,
- 0xc5, 0x6e, 0xec, 0x04,
- 0x42, 0x65, 0xd5, 0x6c,
- 0x4a, 0x63, 0xe0, 0x2c,
- 0xc9, 0x66, 0xe0, 0x2c,
- 0xe0, 0x2c, 0x44, 0x61,
- 0xfc, 0x55, 0xa1, 0xcb,
- 0x60, 0x88, 0x02, 0x04,
- 0x7c, 0x0e, 0xc2, 0x07,
- 0xe7, 0x00, 0x00, 0x40,
- 0x00, 0x40, 0x3e, 0x0e,
- 0x7e, 0x1e, 0xe6, 0x40,
- 0xe4, 0xc0, 0x12, 0x30,
- 0x64, 0xc0, 0x14, 0x40,
- 0xe6, 0x40, 0x0c, 0x30,
- 0x81, 0x81, 0x11, 0x0e,
- 0x12, 0x05, 0x8d, 0x45,
- 0x99, 0x21, 0x78, 0x30,
- 0x43, 0x38, 0x9c, 0x1a,
- 0x1c, 0x1a, 0xe8, 0x1c,
- 0x7f, 0xfd, 0x57, 0xfe,
- 0x40, 0x02, 0xcf, 0xff,
- 0x99, 0x21, 0x7b, 0xac,
- 0xf8, 0x30, 0x54, 0x05,
- 0x42, 0x78, 0xe5, 0x04,
- 0x69, 0x0e, 0xe8, 0x1c,
- 0x8f, 0x9e, 0x99, 0x21,
- 0xe0, 0x2c, 0x12, 0x05,
- 0x41, 0xf8, 0x9c, 0x1a,
- 0x59, 0x3a, 0xe8, 0x1c,
- 0xfb, 0xac, 0x40, 0x02,
- 0x99, 0x21, 0x1e, 0x1a,
- 0x54, 0x05, 0x8d, 0xae,
- 0x86, 0x0b, 0x60, 0x2c,
- 0xe8, 0x1c, 0x41, 0x48,
- 0x99, 0x21, 0x11, 0xb4,
- 0x0c, 0x03, 0xed, 0x0c,
- 0x9e, 0x1a, 0xe0, 0x5c,
- 0xe8, 0x1c, 0x42, 0xa8,
- 0x60, 0x2c, 0x0c, 0x03,
- 0x1e, 0x1a, 0x80, 0xab,
- 0x42, 0x38, 0x99, 0x21,
- 0x0c, 0x03, 0xe8, 0x1c,
- 0x80, 0x9b, 0x60, 0x8c,
- 0x99, 0x21, 0x1e, 0x1a,
- 0xe8, 0x1c, 0x41, 0xc8,
- 0x89, 0x34, 0xfc, 0x24,
- 0x42, 0x22, 0xfe, 0x44,
- 0xb4, 0x23, 0x71, 0xa4,
- 0x92, 0x23, 0x00, 0x13,
- 0x40, 0x2a, 0x8e, 0x38,
- 0x44, 0x1a, 0xe0, 0x92,
- 0x11, 0x44, 0xe0, 0x92,
- 0x02, 0x02, 0xa1, 0x3b,
- 0x92, 0x0b, 0x60, 0x00,
- 0x60, 0x00, 0x06, 0x22,
- 0xeb, 0xfc, 0x04, 0x12,
- 0x02, 0x32, 0x3e, 0x34,
- 0x00, 0x06, 0xeb, 0xfc,
- 0xa1, 0x9d, 0x40, 0x00,
- 0x9c, 0x00, 0x40, 0x90,
- 0x60, 0x30, 0x48, 0x03,
- 0x0c, 0x26, 0x90, 0x33,
- 0x46, 0x11, 0x82, 0x81,
- 0x8f, 0x94, 0xe0, 0x30,
- 0x91, 0xbe, 0x8d, 0xa4,
- 0x82, 0x08, 0x8b, 0x04,
- 0xe6, 0x55, 0x81, 0x8d,
- 0xc8, 0xf1, 0x01, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x84, 0x00, 0x44,
- 0x7c, 0x00, 0x0a, 0x03,
- 0xf0, 0x80, 0x58, 0x52,
- 0xe0, 0x90, 0x18, 0xc3,
- 0xfd, 0x01, 0x20, 0xc3,
- 0x80, 0xcd, 0x3c, 0x04,
- 0x97, 0x80, 0x18, 0xc4,
- 0x44, 0x04, 0x18, 0xc0,
- 0x86, 0x15, 0xa3, 0x1d,
- 0xe6, 0x8a, 0x44, 0xca,
- 0xe5, 0x0e, 0x58, 0x2a,
- 0x65, 0x8e, 0x44, 0x2a,
- 0x18, 0xc0, 0x81, 0x31,
- 0xc1, 0x00, 0x64, 0x01,
- 0x72, 0x8c, 0x44, 0x22,
- 0xde, 0x27, 0xe3, 0xc7,
- 0x02, 0xcd, 0xa4, 0xcf,
- 0x80, 0xf5, 0x93, 0x11,
- 0x0a, 0x29, 0x88, 0x53,
- 0xe2, 0x2d, 0xe1, 0xe0,
- 0x8b, 0x11, 0x80, 0x55,
- 0x40, 0x11, 0x88, 0x03,
- 0xdd, 0x93, 0xe3, 0x90,
- 0x18, 0x24, 0x42, 0x5a,
- 0x98, 0x33, 0xe0, 0x88,
- 0xe0, 0x30, 0x06, 0x35,
- 0xc3, 0x5d, 0xc6, 0x57,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0x94, 0x4a, 0x12,
- 0x82, 0x15, 0xcb, 0x3d,
- 0xe0, 0x10, 0x00, 0x0b,
- 0x82, 0x03, 0xc6, 0x07,
- 0x5c, 0x08, 0xc0, 0x3d,
- 0x04, 0x43, 0x9a, 0x00,
- 0x48, 0x01, 0x85, 0x01,
- 0xdd, 0x93, 0xe3, 0x90,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x30, 0x1e, 0xf0,
- 0x1e, 0x25, 0x9b, 0x2e,
- 0xb7, 0xc4, 0xe0, 0x88,
- 0x99, 0x41, 0x1d, 0x4e,
- 0x1e, 0x25, 0x95, 0x2e,
- 0x0c, 0xc0, 0x60, 0x84,
- 0xb5, 0xb4, 0xe7, 0x90,
- 0x1e, 0x25, 0x97, 0x2e,
- 0x99, 0x2e, 0xe0, 0x80,
- 0xa3, 0x2e, 0xbf, 0x24,
- 0x91, 0x2e, 0xbd, 0x24,
- 0x93, 0x2e, 0xbb, 0x24,
- 0x0f, 0x2e, 0xb9, 0x24,
- 0x81, 0x45, 0x81, 0x21,
- 0x08, 0x40, 0x59, 0x26,
- 0xa1, 0x4b, 0xec, 0x04,
- 0x1f, 0x1e, 0xfe, 0x95,
- 0xe5, 0x80, 0x0a, 0x50,
- 0x60, 0x00, 0x4f, 0x06,
- 0xe0, 0x08, 0x11, 0x06,
- 0x81, 0x91, 0x21, 0x3e,
- 0x16, 0x15, 0x87, 0xd5,
- 0x02, 0x0a, 0xfc, 0x1c,
- 0xc7, 0xff, 0x63, 0xfd,
- 0x48, 0xc2, 0x8c, 0x65,
- 0x8d, 0x11, 0x70, 0xa4,
- 0xe3, 0x90, 0x48, 0x11,
- 0xa1, 0x1b, 0x80, 0x1a,
- 0x94, 0x24, 0x80, 0xe5,
- 0x02, 0x86, 0xc3, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x82, 0x1a, 0xc3, 0x90,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x70, 0x9c, 0x44, 0xc2,
- 0x04, 0x25, 0xce, 0x17,
- 0xc2, 0x2d, 0xe0, 0x30,
- 0xc0, 0x00, 0x02, 0x36,
- 0xc3, 0x90, 0x48, 0x11,
- 0xc0, 0x1a, 0xa5, 0x5e,
- 0x82, 0x05, 0xa1, 0x1b,
- 0xfc, 0x20, 0x18, 0x2b,
- 0x02, 0x36, 0xc2, 0x2d,
- 0x48, 0x11, 0xc0, 0x00,
- 0x23, 0x14, 0xc3, 0x90,
- 0x16, 0x3b, 0x92, 0x2b,
- 0x00, 0x6b, 0x98, 0x4b,
- 0x78, 0x78, 0x98, 0xab,
- 0x21, 0x34, 0xef, 0xfc,
- 0x25, 0x54, 0x94, 0xcb,
- 0x02, 0x91, 0x8c, 0x0b,
- 0x08, 0x71, 0x88, 0x51,
- 0x8e, 0x18, 0x84, 0x81,
- 0xf0, 0x55, 0x83, 0x9d,
- 0x02, 0x29, 0x9f, 0x14,
- 0x04, 0x0a, 0xe0, 0x34,
- 0x84, 0x85, 0xe3, 0xfc,
- 0x98, 0x5b, 0x15, 0x24,
- 0x0d, 0x2e, 0x9d, 0x44,
- 0x8b, 0x2e, 0x89, 0x21,
- 0x89, 0x2e, 0x97, 0x24,
- 0xfe, 0x2e, 0x8f, 0x24,
- 0xfc, 0x2e, 0x99, 0x24,
- 0xbe, 0x2e, 0x91, 0x24,
- 0xbc, 0x2e, 0x93, 0x24,
- 0x40, 0x98, 0x9b, 0x24,
- 0x01, 0x01, 0xe8, 0x00,
- 0xe5, 0x30, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x00, 0x1e, 0xf0,
- 0x84, 0x8b, 0x7c, 0x0e,
- 0x95, 0x5e, 0xbb, 0x04,
- 0x11, 0x0e, 0xfe, 0x4e,
- 0xb7, 0x04, 0xa3, 0x0b,
- 0xb3, 0x04, 0xbe, 0x0e,
- 0xb1, 0x04, 0x8b, 0x0e,
- 0x8e, 0x28, 0x89, 0x0e,
- 0x86, 0x75, 0x97, 0x2e,
- 0x81, 0x71, 0x03, 0x65,
- 0x8e, 0x03, 0x95, 0x04,
- 0xe3, 0x90, 0x00, 0x09,
- 0x82, 0xd5, 0xad, 0x0b,
- 0x8e, 0x4b, 0x7c, 0x04,
- 0x8b, 0x34, 0x89, 0x24,
- 0xe0, 0x20, 0x00, 0x13,
- 0xfe, 0x54, 0x95, 0x04,
- 0xbe, 0x04, 0xbc, 0x0e,
- 0xef, 0xfc, 0x70, 0x68,
- 0x82, 0x71, 0x97, 0x24,
- 0xfa, 0x75, 0x8f, 0x2b,
- 0xe0, 0x00, 0x39, 0x98,
- 0xe0, 0x30, 0x02, 0x09,
- 0xb5, 0xb4, 0x95, 0x14,
- 0xa1, 0x0b, 0x1f, 0x0e,
- 0x02, 0x10, 0x15, 0x01,
- 0x1d, 0x0e, 0xe7, 0x90,
- 0xc0, 0x00, 0x00, 0x46,
- 0xc0, 0x38, 0x5e, 0x05,
- 0x9b, 0x0e, 0xbd, 0x04,
- 0x81, 0xa5, 0xb9, 0x04,
- 0x04, 0x20, 0x04, 0x38,
- 0xad, 0x3b, 0xec, 0x04,
- 0x80, 0x38, 0x1e, 0x35,
- 0x00, 0x00, 0x42, 0x31,
- 0xa1, 0x2b, 0x82, 0x11,
- 0x09, 0x94, 0xfc, 0xd5,
- 0xe2, 0x00, 0x00, 0x2a,
- 0x81, 0xa1, 0x0b, 0x74,
- 0x60, 0x08, 0x0d, 0x06,
- 0x40, 0x0a, 0x81, 0x31,
- 0x96, 0x2b, 0x66, 0xa6,
- 0x40, 0x09, 0x0c, 0x06,
- 0x42, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe5, 0x1e,
- 0x02, 0x10, 0xe5, 0x9e,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0xa8, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x17,
- 0x81, 0x11, 0x22, 0x0f,
- 0xef, 0xd8, 0x53, 0x28,
- 0x66, 0xa6, 0x44, 0x6a,
- 0x64, 0x00, 0x00, 0x00,
- 0x42, 0x12, 0xc1, 0x00,
- 0xe3, 0x07, 0x72, 0xa8,
- 0x65, 0x1e, 0x46, 0x2a,
- 0x44, 0x2a, 0xde, 0x17,
- 0x4c, 0x02, 0x65, 0x9e,
- 0x06, 0x30, 0xf9, 0x84,
- 0x40, 0x08, 0x64, 0x01,
- 0x40, 0x22, 0x81, 0x11,
- 0xd9, 0x37, 0x72, 0xa8,
- 0x96, 0x2b, 0x68, 0x07,
- 0x81, 0x31, 0x26, 0x0f,
- 0xef, 0xd8, 0x51, 0x68,
- 0x00, 0x00, 0x17, 0x34,
- 0xc1, 0x00, 0x64, 0x01,
- 0x42, 0x12, 0x1b, 0x44,
- 0x5e, 0x17, 0xf2, 0xa8,
- 0x04, 0x34, 0xe3, 0x07,
- 0xa2, 0x0f, 0x60, 0x88,
- 0xa6, 0x1b, 0x08, 0x23,
- 0x64, 0x01, 0x06, 0x40,
- 0x04, 0x20, 0x40, 0x09,
- 0xc0, 0x09, 0x64, 0x01,
- 0x60, 0x08, 0x48, 0x86,
- 0x11, 0xb4, 0x81, 0x51,
- 0x85, 0x25, 0x81, 0xc1,
- 0xa9, 0xbb, 0x15, 0xa4,
- 0xfc, 0x10, 0x14, 0x73,
- 0x14, 0x95, 0x8c, 0x7e,
- 0x46, 0x95, 0xfc, 0x14,
- 0x52, 0xa2, 0x60, 0xc0,
- 0x12, 0xa9, 0xf1, 0xb0,
- 0x46, 0xa5, 0xe3, 0x90,
- 0x82, 0x95, 0xe1, 0x80,
- 0x88, 0x7e, 0x8c, 0x73,
- 0x0e, 0x75, 0x95, 0x74,
- 0x44, 0x75, 0xfc, 0x14,
- 0x12, 0x79, 0xe0, 0xc0,
- 0x44, 0x75, 0xe3, 0x90,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x41, 0x6c, 0x04,
- 0x88, 0x31, 0x08, 0x21,
- 0x99, 0x1b, 0x88, 0x51,
- 0x1f, 0x24, 0xf6, 0xd5,
- 0x1b, 0x44, 0x81, 0x51,
- 0x91, 0xb4, 0x81, 0xc1,
- 0x60, 0x88, 0x06, 0x24,
- 0x19, 0x3e, 0xa4, 0x1b,
- 0x0f, 0x3e, 0x88, 0x33,
- 0xe5, 0xe0, 0x04, 0x80,
- 0x65, 0x81, 0x06, 0x30,
- 0x08, 0x40, 0x40, 0x09,
- 0xc0, 0x0a, 0x67, 0x81,
- 0x08, 0x62, 0x85, 0x15,
- 0xf0, 0x94, 0x52, 0x42,
- 0x52, 0x65, 0xa9, 0xbb,
- 0x10, 0x75, 0xf9, 0x80,
- 0x52, 0x75, 0xfc, 0x14,
- 0x4e, 0x82, 0x78, 0xc0,
- 0x0e, 0xa9, 0xf1, 0xb0,
- 0xa4, 0xae, 0xe2, 0x40,
- 0x00, 0x63, 0x82, 0xb5,
- 0xf0, 0x94, 0x52, 0x32,
- 0x10, 0x65, 0xa4, 0x6e,
- 0x52, 0x65, 0xfc, 0x14,
- 0x0e, 0x69, 0xe0, 0xc0,
- 0x52, 0x65, 0xe2, 0x40,
- 0x18, 0xc0, 0xe1, 0x80,
- 0x84, 0x21, 0x6c, 0x04,
- 0x99, 0x1b, 0x88, 0x51,
- 0x11, 0x04, 0xf6, 0xf5,
- 0x17, 0x54, 0xff, 0x81,
- 0x9f, 0x14, 0x81, 0x41,
- 0x00, 0x4a, 0x1b, 0x34,
- 0x00, 0x0c, 0xe0, 0x0c,
- 0x04, 0x54, 0xe2, 0x00,
- 0x00, 0x14, 0x68, 0x80,
- 0x42, 0x0a, 0xe8, 0x80,
- 0x81, 0x35, 0xe6, 0x8a,
- 0x82, 0x41, 0x4d, 0x8e,
- 0xfe, 0xb5, 0x83, 0x4d,
- 0x0e, 0x04, 0x1b, 0x14,
- 0x81, 0x41, 0xe0, 0x88,
- 0x65, 0x81, 0x06, 0x10,
- 0x93, 0x3e, 0xc0, 0x09,
- 0x1b, 0xc4, 0x85, 0x95,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x82, 0x9b, 0x13, 0x64,
- 0x8a, 0xc3, 0x9f, 0xa4,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x91, 0x14, 0xf4, 0xf5,
- 0x0a, 0x48, 0xa9, 0x1b,
- 0x03, 0x68, 0xc0, 0x00,
- 0xc0, 0x00, 0x40, 0x01,
- 0x66, 0x96, 0x42, 0x0a,
- 0x9b, 0x34, 0x81, 0x41,
- 0x05, 0xb5, 0xc4, 0x17,
- 0x1b, 0x54, 0x86, 0x13,
- 0xf0, 0x94, 0x46, 0x42,
- 0xc4, 0x37, 0x13, 0x64,
- 0x82, 0x9b, 0x1f, 0xa4,
- 0x0a, 0x30, 0x8a, 0x33,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0x30,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0x3b, 0x94, 0x34,
- 0x0c, 0x35, 0x82, 0xe5,
- 0xa1, 0x3b, 0xe1, 0x80,
- 0xb0, 0x34, 0x82, 0x65,
- 0xb6, 0x33, 0x98, 0xb4,
- 0xf0, 0x80, 0x16, 0x34,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xd5, 0x8b, 0x4b,
- 0x1b, 0x14, 0x87, 0x45,
- 0x99, 0x34, 0x81, 0x41,
- 0x06, 0x10, 0x86, 0x13,
- 0xc0, 0x09, 0x65, 0x81,
- 0x85, 0x95, 0x93, 0x3e,
- 0x0a, 0x44, 0x1b, 0xc4,
- 0x13, 0x64, 0xe0, 0x88,
- 0x9f, 0xa4, 0x82, 0x9b,
- 0x0a, 0xc0, 0x8a, 0xc3,
- 0x40, 0x0a, 0x66, 0x01,
- 0x64, 0x01, 0x18, 0xc0,
- 0x83, 0x65, 0xc0, 0x09,
- 0xa1, 0xbb, 0x94, 0xb4,
- 0x0c, 0xb5, 0x82, 0xe5,
- 0xa1, 0xbb, 0xe1, 0x80,
- 0xb0, 0xb4, 0x82, 0x65,
- 0xa6, 0xb3, 0x98, 0x34,
- 0xf0, 0x80, 0x16, 0xb4,
- 0x60, 0x81, 0x17, 0x0a,
- 0x52, 0xb5, 0xc0, 0x03,
- 0x14, 0xa0, 0x80, 0x00,
- 0x88, 0x91, 0x6c, 0x04,
- 0xa1, 0xab, 0x88, 0x61,
- 0x17, 0x54, 0xfa, 0x55,
- 0x8e, 0x13, 0x82, 0x41,
- 0xf4, 0xf5, 0x8b, 0x4b,
- 0x42, 0x0a, 0x9f, 0x34,
- 0x99, 0x44, 0xe6, 0x96,
- 0x86, 0x13, 0x1b, 0x34,
- 0x06, 0x13, 0xc4, 0x17,
- 0x06, 0x30, 0x88, 0x33,
- 0x40, 0x09, 0x65, 0x81,
- 0x93, 0x3e, 0x81, 0x41,
- 0x1b, 0xc4, 0x85, 0x95,
- 0x13, 0x64, 0x88, 0x53,
- 0x1f, 0xa4, 0xc4, 0x57,
- 0x8a, 0xc3, 0x82, 0x9b,
- 0x66, 0x01, 0x0a, 0xc0,
- 0x18, 0xc0, 0x40, 0x0a,
- 0xc0, 0x09, 0x64, 0x01,
- 0x94, 0xb4, 0x83, 0x65,
- 0x82, 0xe5, 0xa1, 0xbb,
- 0xe1, 0x80, 0x0c, 0xb5,
- 0x82, 0x65, 0xa1, 0xbb,
- 0x98, 0x34, 0xb0, 0xb4,
- 0x16, 0xb4, 0xa6, 0xb3,
- 0x17, 0x0a, 0xf0, 0x80,
- 0xc0, 0x03, 0x60, 0x81,
- 0x80, 0x00, 0x52, 0xb5,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x88, 0x61, 0x88, 0x91,
- 0xfa, 0x55, 0xa1, 0xab,
- 0x82, 0x41, 0x17, 0x54,
- 0x8b, 0x4b, 0x8e, 0x13,
- 0x1b, 0x94, 0xf4, 0xf5,
- 0x8d, 0x05, 0x81, 0x41,
- 0x66, 0x82, 0x42, 0x4a,
- 0x7f, 0xfc, 0x55, 0xfe,
- 0x13, 0x9e, 0xdf, 0xff,
- 0x0d, 0x1e, 0x92, 0x3b,
- 0x59, 0xfe, 0xff, 0x51,
- 0x5f, 0xff, 0x7f, 0xfd,
- 0x03, 0x85, 0xff, 0x61,
- 0x8c, 0x14, 0x81, 0x91,
- 0x84, 0x05, 0x91, 0x1b,
- 0x4a, 0x60, 0x95, 0x1d,
- 0x58, 0xa0, 0x5c, 0x00,
- 0x02, 0x75, 0xdc, 0x00,
- 0xdc, 0x00, 0x4c, 0x90,
- 0x92, 0xbb, 0x19, 0x1d,
- 0x1c, 0x00, 0x56, 0x50,
- 0xfb, 0x30, 0x58, 0x12,
- 0x94, 0x1b, 0x96, 0x5b,
- 0x88, 0x31, 0x02, 0x91,
- 0x81, 0x9d, 0x82, 0xab,
- 0x13, 0x94, 0xfa, 0x35,
- 0x8c, 0x85, 0x91, 0x5b,
- 0xf1, 0xa8, 0x42, 0xc2,
- 0xe1, 0xdc, 0x03, 0x0a,
- 0x58, 0xa0, 0x08, 0x55,
- 0x1b, 0x94, 0xdc, 0x00,
- 0xe0, 0x88, 0x02, 0x44,
- 0x60, 0x88, 0x06, 0x64,
- 0xe0, 0x88, 0x16, 0x54,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x0c, 0x12, 0x35,
- 0xe9, 0xc0, 0x02, 0x15,
- 0xfc, 0x2c, 0x12, 0x95,
- 0xf1, 0x8c, 0x46, 0x12,
- 0x06, 0x34, 0x32, 0x13,
- 0x13, 0x94, 0xf0, 0x80,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4a, 0x60, 0x87, 0x1d,
- 0x58, 0xa0, 0x1c, 0x00,
- 0x8a, 0x6b, 0x9c, 0x00,
- 0x81, 0x31, 0x12, 0x1b,
- 0x45, 0x8e, 0x81, 0x35,
- 0x81, 0x3d, 0x82, 0x31,
- 0x8d, 0x14, 0xfe, 0xb5,
- 0x82, 0x63, 0x1b, 0x14,
- 0x82, 0x63, 0xc4, 0x67,
- 0x02, 0x41, 0x98, 0xce,
- 0x85, 0x4d, 0x8e, 0x93,
- 0x1b, 0x34, 0xe8, 0x15,
- 0x8d, 0x35, 0x81, 0x91,
- 0x43, 0xfe, 0x13, 0x9e,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0xff, 0x41, 0x06, 0xbb,
- 0x7f, 0xfd, 0x4b, 0xfe,
- 0xff, 0xc1, 0x5f, 0xff,
- 0x81, 0x91, 0x03, 0x85,
- 0x91, 0xab, 0xac, 0xa4,
- 0x83, 0xad, 0x84, 0x05,
- 0x5c, 0x00, 0x48, 0xc0,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x58, 0x90, 0x02, 0x75,
- 0x0b, 0xad, 0xdc, 0x00,
- 0x4c, 0x40, 0x92, 0x6b,
- 0x4a, 0xa2, 0x1c, 0x00,
- 0x8c, 0x4b, 0xfb, 0x14,
- 0x02, 0x91, 0x82, 0xab,
- 0x94, 0x1b, 0x8e, 0xb3,
- 0xfa, 0x35, 0x85, 0x9d,
- 0x91, 0x4b, 0x13, 0x94,
- 0x4c, 0x52, 0x8e, 0x45,
- 0x0d, 0x0a, 0xf1, 0x84,
- 0x08, 0x55, 0xe1, 0xdc,
- 0xdc, 0x00, 0x4a, 0x10,
- 0x0c, 0x94, 0x1b, 0xa4,
- 0x12, 0xc4, 0xe0, 0x88,
- 0x16, 0x44, 0x60, 0x88,
- 0x14, 0x63, 0xe0, 0x88,
- 0x67, 0x01, 0x14, 0xa0,
- 0x14, 0x95, 0xc0, 0x09,
- 0x0c, 0x65, 0xfc, 0x24,
- 0x14, 0xa5, 0xea, 0x20,
- 0x52, 0x62, 0xfc, 0x2c,
- 0x34, 0x63, 0xf1, 0xa4,
- 0xf0, 0x80, 0x12, 0x94,
- 0xf0, 0x80, 0x0c, 0x64,
- 0x93, 0x6d, 0x13, 0x94,
- 0x1c, 0x00, 0x48, 0xc0,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x01, 0x11, 0x88, 0xcb,
- 0x85, 0x6d, 0x81, 0x61,
- 0x50, 0x84, 0x48, 0x32,
- 0xc4, 0x04, 0x0c, 0x60,
- 0x40, 0x00, 0x48, 0x85,
- 0xd0, 0x9c, 0x42, 0x12,
- 0x42, 0xca, 0xfc, 0xf5,
- 0x9b, 0x44, 0xe6, 0x82,
- 0xc4, 0x17, 0x92, 0x13,
- 0x84, 0x5e, 0x88, 0x13,
- 0x88, 0x31, 0x02, 0x91,
- 0xe6, 0xb5, 0x81, 0x9d,
- 0x02, 0x2a, 0x91, 0x14,
- 0x0c, 0x28, 0xe0, 0x10,
- 0xc0, 0x00, 0x40, 0x01,
- 0xff, 0x31, 0x1b, 0x64,
- 0x81, 0xc1, 0x7f, 0x41,
- 0x13, 0x6e, 0x8b, 0x75,
- 0x7f, 0xb1, 0x8c, 0x5b,
- 0x03, 0x45, 0xff, 0x61,
- 0x8a, 0x9b, 0x81, 0x11,
- 0xfe, 0x1c, 0x12, 0xa5,
- 0x19, 0xa4, 0x91, 0xab,
- 0xdc, 0x00, 0x46, 0xa0,
- 0xdc, 0x00, 0x56, 0x10,
- 0xfc, 0x28, 0x0a, 0x55,
- 0x48, 0x50, 0x91, 0x5b,
- 0x4c, 0x10, 0x5c, 0x00,
- 0x02, 0x11, 0xdc, 0x00,
- 0x85, 0x1d, 0x92, 0x5b,
- 0x91, 0xbb, 0x80, 0xa5,
- 0x91, 0x6b, 0xfa, 0x65,
- 0x91, 0xbb, 0xfa, 0x25,
- 0x91, 0x6b, 0x8c, 0x85,
- 0x42, 0x32, 0x8c, 0x45,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0x95, 0xe1, 0xdc,
- 0x02, 0xc4, 0x1b, 0x94,
- 0x0a, 0xb4, 0xe0, 0x88,
- 0x14, 0x64, 0x60, 0x88,
- 0x12, 0x13, 0xe0, 0x88,
- 0x67, 0x01, 0x12, 0x90,
- 0x12, 0x55, 0xc0, 0x09,
- 0x02, 0x15, 0xfc, 0x14,
- 0x12, 0x95, 0xea, 0x20,
- 0x4a, 0x12, 0xfc, 0x28,
- 0x32, 0x13, 0xf1, 0x94,
- 0xf0, 0x80, 0x0a, 0x54,
- 0xf0, 0x80, 0x02, 0x14,
- 0x80, 0x95, 0x83, 0x5d,
- 0x89, 0x3d, 0x81, 0x85,
- 0x9f, 0x14, 0x80, 0xc5,
- 0xe6, 0x82, 0x4a, 0x6a,
- 0x98, 0x13, 0x01, 0x55,
- 0x66, 0x82, 0x42, 0xba,
- 0x1b, 0x54, 0x98, 0x5b,
- 0xc4, 0x17, 0x8a, 0x13,
- 0x84, 0x8e, 0x8a, 0x13,
- 0x82, 0xc1, 0x13, 0x64,
- 0x9f, 0x54, 0x88, 0x61,
- 0x8b, 0xcb, 0x97, 0x14,
- 0x42, 0x0a, 0xe8, 0xf5,
- 0x81, 0x51, 0x66, 0x86,
- 0xc4, 0x17, 0x9b, 0x24,
- 0x54, 0x22, 0x0b, 0x85,
- 0x19, 0x2e, 0xf0, 0x84,
- 0x14, 0x1b, 0x84, 0xbb,
- 0x7f, 0xc1, 0xff, 0x21,
- 0x81, 0xe5, 0x81, 0x61,
- 0x91, 0x9b, 0xed, 0x94,
- 0x46, 0x90, 0x45, 0x94,
- 0x44, 0x60, 0xdc, 0x00,
- 0x91, 0x9b, 0xdc, 0x00,
- 0x5c, 0x00, 0x58, 0x60,
- 0xdc, 0x00, 0x48, 0x90,
- 0x81, 0x6d, 0x82, 0x61,
- 0x91, 0x2b, 0x80, 0xa5,
- 0x91, 0xcb, 0xfc, 0x05,
- 0x91, 0x2b, 0xfa, 0xc5,
- 0x91, 0xcb, 0x8c, 0xc5,
- 0x42, 0x32, 0x8c, 0x85,
- 0x02, 0x14, 0xf1, 0x90,
- 0x03, 0x0a, 0xf0, 0x80,
- 0x86, 0xd5, 0xe1, 0xdc,
- 0x02, 0x54, 0x1b, 0x94,
- 0x14, 0xbb, 0xe0, 0x88,
- 0xe0, 0x88, 0x0c, 0x24,
- 0xe0, 0x88, 0x14, 0xc4,
- 0x12, 0x90, 0x12, 0x13,
- 0xc0, 0x0a, 0x64, 0x81,
- 0xfc, 0x18, 0x12, 0x65,
- 0xe9, 0xc0, 0x02, 0x15,
- 0x7c, 0x28, 0x12, 0x95,
- 0x4c, 0x12, 0x96, 0xab,
- 0x32, 0x13, 0xf1, 0x98,
- 0xf0, 0x80, 0x0c, 0x64,
- 0xf0, 0x80, 0x02, 0x14,
- 0x4c, 0xca, 0x01, 0x55,
- 0x46, 0xca, 0xe0, 0x04,
- 0x17, 0x14, 0xe0, 0x10,
- 0xdc, 0x00, 0x58, 0x20,
- 0x02, 0x06, 0x9b, 0x24,
- 0x8a, 0x13, 0xc0, 0x00,
- 0xe6, 0x82, 0x42, 0x1a,
- 0xc4, 0x17, 0x98, 0x13,
- 0x84, 0x8e, 0x84, 0x13,
- 0x82, 0x51, 0x19, 0x24,
- 0x8e, 0x23, 0x8e, 0xa3,
- 0x83, 0x5b, 0x97, 0x14,
- 0x97, 0x24, 0xea, 0x35,
- 0x9b, 0xb4, 0x9f, 0x14,
- 0xe6, 0x8a, 0x40, 0x0a,
- 0x00, 0x13, 0x8f, 0x34,
- 0x1d, 0x94, 0xc4, 0x07,
- 0x4c, 0xb2, 0xc4, 0x17,
- 0x80, 0xb3, 0x70, 0x84,
- 0x81, 0x11, 0x09, 0x15,
- 0x82, 0xab, 0x15, 0x04,
- 0x86, 0x2b, 0x0f, 0x3e,
- 0x8c, 0x4b, 0x16, 0x3b,
- 0x82, 0x03, 0x1b, 0x14,
- 0x67, 0x90, 0x00, 0x00,
- 0x81, 0x65, 0x81, 0x51,
- 0x88, 0x41, 0x02, 0x51,
- 0x88, 0x21, 0x08, 0x31,
- 0x9f, 0xc4, 0x88, 0x11,
- 0x88, 0x45, 0x99, 0x5d,
- 0x93, 0xcb, 0x80, 0xc8,
- 0x84, 0xc4, 0xfc, 0xd5,
- 0x84, 0x15, 0x91, 0xcb,
- 0x5f, 0xfd, 0x3f, 0x28,
- 0x88, 0xc4, 0xc3, 0xff,
- 0x80, 0xf5, 0x91, 0xcb,
- 0x91, 0xcb, 0x8c, 0xc4,
- 0x90, 0xc4, 0x80, 0x95,
- 0xf8, 0xe5, 0x91, 0xcb,
- 0x80, 0x16, 0x89, 0x11,
- 0x7c, 0x04, 0x81, 0xd5,
- 0x89, 0x24, 0x94, 0x4b,
- 0x00, 0x13, 0x8b, 0x34,
- 0x95, 0x04, 0xe0, 0x20,
- 0xbc, 0x0e, 0xfe, 0x54,
- 0x77, 0x58, 0xbe, 0x04,
- 0x1b, 0x04, 0xef, 0xf8,
- 0x0f, 0x34, 0x94, 0x1b,
- 0x17, 0x24, 0x82, 0x11,
- 0x0e, 0x03, 0x8e, 0x63,
- 0x1b, 0x0e, 0x8e, 0xb3,
- 0x85, 0x1b, 0x8e, 0x33,
- 0x1e, 0xf0, 0xf0, 0x15,
- 0x0c, 0x0c, 0xe5, 0x00,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0xab,
- 0x60, 0x94, 0x00, 0x34,
- 0xe1, 0x84, 0x02, 0xa4,
- 0x82, 0x03, 0x25, 0xc4,
- 0x60, 0x2a, 0x40, 0x0a,
- 0x29, 0x84, 0xa1, 0x71,
- 0x42, 0x02, 0x81, 0x61,
- 0x40, 0xc2, 0x7b, 0xb0,
- 0xa2, 0x73, 0xfa, 0x80,
- 0xf3, 0x98, 0x42, 0x62,
- 0x40, 0x12, 0x80, 0x73,
- 0xcb, 0x77, 0x72, 0x98,
- 0xe0, 0xec, 0x02, 0x04,
- 0x0e, 0x04, 0x2e, 0x1f,
- 0x0b, 0x1e, 0xe1, 0x94,
- 0xfa, 0x90, 0x40, 0x22,
- 0x44, 0x42, 0x2e, 0x1f,
- 0x21, 0x1b, 0xfb, 0x88,
- 0xef, 0xfc, 0x43, 0xf6,
- 0xa4, 0x03, 0x20, 0x1c,
- 0x73, 0x98, 0x42, 0x62,
- 0x80, 0x08, 0x4c, 0x96,
- 0x80, 0x00, 0x10, 0x18,
- 0x48, 0xaa, 0x9f, 0x24,
- 0x89, 0x7e, 0xe6, 0xaa,
- 0x06, 0x44, 0x06, 0x23,
- 0x3e, 0x5e, 0xe1, 0x84,
- 0x06, 0x23, 0xca, 0x27,
- 0x44, 0x2a, 0x82, 0x3b,
- 0x84, 0xc3, 0xe0, 0x12,
- 0xf2, 0x98, 0x44, 0x62,
- 0x4e, 0x22, 0xa0, 0xc1,
- 0xcb, 0xc7, 0x72, 0x98,
- 0x60, 0xec, 0x16, 0x74,
- 0x38, 0xbf, 0xcb, 0x77,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x56, 0xca, 0xc0, 0x3f,
- 0x80, 0x2b, 0x64, 0x08,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0xe1, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x57, 0xfe,
- 0x0e, 0x06, 0x40, 0x3f,
- 0x57, 0x58, 0xc0, 0x00,
- 0x04, 0x04, 0xef, 0xd4,
- 0xd0, 0x17, 0x61, 0xe0,
- 0x45, 0xfe, 0x24, 0x1f,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xff, 0xa1, 0x50, 0x07,
- 0x42, 0xca, 0x7c, 0x9e,
- 0x7e, 0x8e, 0xe4, 0x08,
- 0xe0, 0x08, 0x42, 0x1a,
- 0x40, 0x6a, 0x0b, 0x94,
- 0x09, 0x84, 0xe0, 0x28,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0x6d, 0x80, 0x42, 0x0a,
- 0x41, 0xfe, 0x92, 0x2b,
- 0x43, 0xfe, 0x5f, 0xfc,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x6f, 0xd4, 0x4b, 0xe8,
- 0x12, 0x2b, 0x90, 0x3b,
- 0x4b, 0x98, 0x90, 0x3b,
- 0x02, 0x3b, 0xef, 0xd4,
- 0x23, 0xa4, 0x80, 0x2b,
- 0xe0, 0x28, 0x44, 0x6a,
- 0x06, 0xca, 0x21, 0x84,
- 0x1d, 0x94, 0xe5, 0xfc,
- 0xe1, 0xfc, 0x06, 0x1a,
- 0x65, 0x80, 0x42, 0x0a,
- 0x42, 0x1a, 0x96, 0x0b,
- 0x8e, 0x1b, 0x61, 0x88,
- 0xed, 0x80, 0x42, 0x0a,
- 0x5f, 0xfc, 0x45, 0xfe,
- 0xc0, 0x04, 0x47, 0xf6,
- 0xef, 0xd4, 0x53, 0x68,
- 0x47, 0xfe, 0x3e, 0x24,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x89, 0xb4, 0xa7, 0x74,
- 0x44, 0x62, 0x84, 0x93,
- 0x7e, 0x84, 0xf2, 0x98,
- 0x44, 0x22, 0x90, 0x93,
- 0x7c, 0x94, 0xf2, 0x98,
- 0x44, 0x22, 0x92, 0xa3,
- 0x54, 0xca, 0x72, 0x98,
- 0x04, 0x1a, 0xe4, 0x0c,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x04, 0x06, 0xe1, 0x80,
- 0x55, 0xfe, 0x40, 0x00,
- 0xc0, 0x3f, 0x1f, 0xfc,
- 0x61, 0xe0, 0x06, 0xa4,
- 0x50, 0xa7, 0xd0, 0x27,
- 0x14, 0x03, 0xa6, 0x2f,
- 0x42, 0x12, 0xff, 0xa1,
- 0x45, 0xfe, 0x72, 0x88,
- 0xdf, 0xff, 0x7f, 0xfc,
- 0x64, 0x08, 0x42, 0xca,
- 0x42, 0x1a, 0x84, 0x71,
- 0xc7, 0x77, 0x60, 0x08,
- 0xe0, 0x28, 0x40, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0xa1, 0x1b, 0xdf, 0xfc,
- 0x0b, 0x24, 0x82, 0x45,
- 0x45, 0xf8, 0x96, 0x3b,
- 0x01, 0x31, 0xef, 0xd4,
- 0x4f, 0x18, 0x8e, 0x2b,
- 0x81, 0x95, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4e, 0xc8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x45, 0x28,
- 0x43, 0xfe, 0xa1, 0x1d,
- 0x5f, 0xff, 0x1f, 0xfd,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x44, 0x68,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x01, 0x31, 0xc5, 0x17,
- 0x4d, 0x38, 0x8e, 0x2b,
- 0x81, 0xe5, 0xef, 0xd4,
- 0x8e, 0x2b, 0x01, 0x31,
- 0xef, 0xd4, 0x4c, 0xe8,
- 0x96, 0x3b, 0x0b, 0x24,
- 0xef, 0xd4, 0x43, 0x48,
- 0x60, 0xf8, 0x04, 0x14,
- 0x24, 0x0f, 0xc5, 0x07,
- 0x21, 0x1d, 0xc5, 0x17,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x04, 0x14, 0xc7, 0xff,
- 0xff, 0x31, 0x01, 0x88,
- 0x01, 0x88, 0x00, 0x04,
- 0x80, 0xf8, 0x02, 0x14,
- 0x19, 0x84, 0x46, 0x02,
- 0x46, 0x5a, 0xa1, 0x2b,
- 0x40, 0x9a, 0x60, 0x28,
- 0x40, 0x0a, 0xe5, 0x26,
- 0x47, 0xfe, 0xe1, 0x84,
- 0x04, 0x06, 0x5f, 0xfc,
- 0x00, 0x33, 0xc0, 0x00,
- 0xe5, 0xa6, 0x40, 0x9a,
- 0x40, 0x22, 0x95, 0x3b,
- 0x47, 0xfe, 0x72, 0x80,
- 0xa1, 0x0b, 0x9f, 0xfc,
- 0xdf, 0xfc, 0x47, 0xfe,
- 0xf0, 0x0a, 0x40, 0x3a,
- 0x0c, 0x0b, 0xa0, 0x0c,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x81, 0x41, 0x01, 0xb5,
- 0x82, 0x41, 0x49, 0x54,
- 0x98, 0x5d, 0xc5, 0xc4,
- 0x80, 0x00, 0x0a, 0x06,
- 0xd1, 0xb0, 0x4a, 0x52,
- 0x81, 0x4d, 0xcd, 0x5e,
- 0x5d, 0x93, 0xfc, 0xd5,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x67, 0x90, 0x0a, 0x30,
- 0xe6, 0xa0, 0x18, 0x30,
- 0x81, 0x61, 0x0f, 0x4e,
- 0x48, 0x06, 0x08, 0x8b,
- 0x03, 0xa5, 0xe0, 0x24,
- 0x20, 0x66, 0x80, 0x9b,
- 0x18, 0xa3, 0xa5, 0x1b,
- 0x16, 0x0e, 0x40, 0x00,
- 0x14, 0x78, 0xd0, 0x00,
- 0x00, 0x01, 0x16, 0x06,
- 0x06, 0xa5, 0x90, 0x00,
- 0xf2, 0x7d, 0x00, 0x00,
- 0x48, 0x4a, 0x80, 0xb5,
- 0x54, 0xa2, 0xe4, 0x9c,
- 0x65, 0xae, 0x90, 0xac,
- 0x08, 0x31, 0x82, 0x61,
- 0x04, 0xc1, 0x82, 0x51,
- 0x8a, 0xa8, 0x82, 0x81,
- 0xf8, 0xd5, 0x95, 0x6d,
- 0x88, 0xd5, 0xe5, 0xad,
- 0x82, 0x41, 0x8f, 0x44,
- 0x88, 0x5b, 0x03, 0x31,
- 0x81, 0xc1, 0x03, 0xb5,
- 0x78, 0x04, 0x0a, 0x69,
- 0x94, 0x78, 0xa5, 0x1b,
- 0xe0, 0x88, 0x10, 0x64,
- 0x7c, 0x20, 0x00, 0x85,
- 0xe0, 0x88, 0x12, 0x74,
- 0xfc, 0x24, 0x00, 0x95,
- 0x93, 0x8d, 0x80, 0x95,
- 0x81, 0x75, 0x80, 0x95,
- 0x80, 0xa5, 0x92, 0x8d,
- 0x78, 0x04, 0x4a, 0x71,
- 0x94, 0x66, 0x83, 0xc1,
- 0x82, 0x31, 0x0a, 0xa8,
- 0x0c, 0xa4, 0x82, 0x51,
- 0x8d, 0x3d, 0xfa, 0x80,
- 0xa3, 0xcd, 0xf8, 0x95,
- 0x81, 0x01, 0xf6, 0xc5,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x90, 0x1e, 0xf0,
- 0xe0, 0x84, 0x1e, 0x75,
- 0xa7, 0x4e, 0x9d, 0x5e,
- 0xaf, 0x2e, 0xa1, 0x3e,
- 0x9e, 0x14, 0xa9, 0x1e,
- 0xe0, 0x20, 0x0e, 0x05,
- 0xe0, 0x8c, 0x1e, 0x85,
- 0xe0, 0x88, 0x1e, 0x65,
- 0xe0, 0x80, 0x1e, 0xa5,
- 0x82, 0x0b, 0x25, 0x0e,
- 0x47, 0xf8, 0xad, 0x1e,
- 0x1f, 0x0e, 0xe8, 0x14,
- 0x0e, 0x05, 0x83, 0xc1,
- 0x4c, 0x05, 0xe0, 0x18,
- 0x0e, 0x09, 0xeb, 0x54,
- 0xdc, 0x34, 0xe0, 0x58,
- 0x00, 0x60, 0x31, 0x0e,
- 0xc0, 0x0b, 0x65, 0x41,
- 0x9e, 0x48, 0xab, 0x0e,
- 0xe0, 0x20, 0x0e, 0x1b,
- 0x5c, 0x58, 0x9c, 0x28,
- 0x4c, 0x35, 0xa9, 0xcf,
- 0x4c, 0x21, 0xeb, 0x50,
- 0xc0, 0x02, 0x6d, 0x69,
- 0x04, 0xc4, 0x1e, 0x04,
- 0x4c, 0x13, 0xe8, 0x94,
- 0xc0, 0x01, 0x66, 0xb1,
- 0x6d, 0x6d, 0x4c, 0x41,
- 0x4c, 0x51, 0xc0, 0x02,
- 0xc0, 0x02, 0x6d, 0x71,
- 0xe8, 0x14, 0x4b, 0x28,
- 0x60, 0x18, 0x0e, 0x05,
- 0x0e, 0x29, 0x80, 0x9b,
- 0x90, 0xbb, 0x60, 0x4c,
- 0xf0, 0x14, 0x56, 0x05,
- 0xe0, 0x48, 0x0e, 0x09,
- 0x14, 0x19, 0x9b, 0xae,
- 0x81, 0xa1, 0x60, 0x34,
- 0xe0, 0x90, 0x0e, 0x39,
- 0xe0, 0x94, 0x0e, 0x49,
- 0x78, 0x18, 0x56, 0x01,
- 0xe7, 0xf4, 0x03, 0x0a,
- 0x78, 0x10, 0x56, 0x31,
- 0x00, 0x10, 0x81, 0x01,
- 0x02, 0x70, 0x04, 0x04,
- 0x56, 0x41, 0xe4, 0x60,
- 0x90, 0x4b, 0x78, 0x0c,
- 0xf8, 0x14, 0x56, 0x21,
- 0xe0, 0x1c, 0x0e, 0x35,
- 0x50, 0x01, 0xa3, 0x1e,
- 0x99, 0x01, 0x60, 0x48,
- 0x50, 0xa1, 0xac, 0x06,
- 0x50, 0xa1, 0xe0, 0x54,
- 0xab, 0x04, 0xe0, 0x58,
- 0xb1, 0x24, 0xad, 0x14,
- 0xef, 0xe0, 0x74, 0x68,
- 0x8d, 0x51, 0x21, 0x0b,
- 0x2f, 0xc4, 0x90, 0xa5,
- 0xb1, 0x14, 0x80, 0xab,
- 0x64, 0x01, 0x00, 0x60,
- 0x04, 0x70, 0x40, 0x09,
- 0x01, 0x65, 0xe4, 0xa0,
- 0x49, 0x44, 0x82, 0x3b,
- 0xec, 0x04, 0x06, 0x30,
- 0xa1, 0x3b, 0xc1, 0x4e,
- 0x1e, 0x05, 0xfe, 0x75,
- 0xa1, 0xab, 0x60, 0x90,
- 0x9d, 0x0e, 0x96, 0xd5,
- 0xe0, 0xa4, 0x18, 0x09,
- 0x12, 0xc5, 0xa1, 0x0b,
- 0x84, 0x60, 0x12, 0x80,
- 0x64, 0x60, 0x12, 0x80,
- 0xe4, 0x80, 0x02, 0xc0,
- 0x64, 0xe0, 0x04, 0xc0,
- 0xe5, 0xf0, 0x06, 0xc0,
- 0x64, 0x01, 0x00, 0x60,
- 0x08, 0x60, 0x40, 0x09,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0x01, 0x0a, 0x60,
- 0x18, 0x60, 0x40, 0x04,
- 0xc0, 0x06, 0x67, 0x01,
- 0x8d, 0xbe, 0x8f, 0x9e,
- 0x89, 0x5e, 0x8b, 0xce,
- 0xfc, 0x6e, 0xfe, 0x4e,
- 0xb1, 0x04, 0xbe, 0x0e,
- 0xa5, 0x54, 0xa7, 0x44,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xef, 0xe8, 0x72, 0x08,
- 0x80, 0xab, 0x31, 0x14,
- 0xa1, 0xab, 0x2f, 0xc4,
- 0x05, 0xe5, 0x88, 0xa5,
- 0xaf, 0xc4, 0x95, 0x51,
- 0xe0, 0x70, 0x18, 0x09,
- 0xee, 0x45, 0xa1, 0x0b,
- 0xe0, 0x74, 0x18, 0x09,
- 0x96, 0xf5, 0xa3, 0x0b,
- 0xa1, 0x14, 0xa3, 0x04,
- 0x00, 0x34, 0x9d, 0x24,
- 0xe4, 0x40, 0x00, 0xc0,
- 0xa0, 0x11, 0x46, 0x54,
- 0xfc, 0x2e, 0xfe, 0x6e,
- 0x3c, 0x1e, 0xbe, 0x0e,
- 0x29, 0x04, 0x92, 0x1b,
- 0x9f, 0x24, 0x98, 0x9b,
- 0x65, 0xb8, 0xb1, 0x44,
- 0x21, 0x0b, 0xef, 0xd8,
- 0x90, 0x85, 0x8f, 0x51,
- 0x92, 0xcb, 0x00, 0xab,
- 0x00, 0xc0, 0xf3, 0xd5,
- 0x96, 0x2b, 0x66, 0xf0,
- 0x6f, 0xe4, 0x43, 0xc8,
- 0x80, 0xab, 0x92, 0x3b,
- 0x82, 0x65, 0xa1, 0xab,
- 0x9d, 0x04, 0x97, 0x51,
- 0x1e, 0xf0, 0x00, 0xae,
- 0x02, 0x5e, 0xe5, 0x90,
- 0x0c, 0x0c, 0x94, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x02, 0x80, 0x27, 0x04,
- 0x04, 0x60, 0xe6, 0x70,
- 0x40, 0x09, 0x64, 0x01,
- 0x92, 0x4b, 0x96, 0x3b,
- 0xe0, 0x2c, 0x00, 0x59,
- 0xfe, 0x1e, 0xaf, 0x04,
- 0x31, 0x14, 0xa7, 0x1e,
- 0xfc, 0x6e, 0xa0, 0x01,
- 0x99, 0x2e, 0xbe, 0x2e,
- 0x8e, 0x1b, 0x3c, 0x1e,
- 0xa3, 0x24, 0x97, 0x0e,
- 0xef, 0xe0, 0x48, 0x08,
- 0x80, 0xab, 0x1d, 0x04,
- 0x99, 0x51, 0x21, 0xab,
- 0x23, 0x9e, 0xf6, 0x95,
- 0x64, 0xd1, 0x0e, 0x80,
- 0x2b, 0x04, 0xc0, 0x02,
- 0x2d, 0x14, 0x96, 0x2b,
- 0xa7, 0x34, 0x8e, 0x4b,
- 0xef, 0xe0, 0x6d, 0x48,
- 0xa1, 0xab, 0x80, 0xab,
- 0x79, 0xc5, 0x8a, 0xa5,
- 0x12, 0x09, 0x9d, 0x51,
- 0x92, 0xcb, 0x60, 0x70,
- 0xd6, 0x05, 0xa1, 0x0b,
- 0x60, 0x58, 0x0e, 0x09,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x02,
- 0x40, 0x04, 0x66, 0x01,
- 0x67, 0x01, 0x08, 0x60,
- 0x5b, 0x78, 0xc0, 0x06,
- 0x8c, 0x1b, 0x68, 0x10,
- 0x91, 0x51, 0x21, 0x0b,
- 0xaf, 0xc4, 0xd0, 0xb5,
- 0x18, 0x09, 0xb1, 0x14,
- 0xa1, 0x0b, 0xe0, 0x70,
- 0x02, 0x0b, 0xd0, 0x45,
- 0xe4, 0xa0, 0x04, 0x70,
- 0x64, 0x01, 0x06, 0x60,
- 0x8c, 0x1b, 0x40, 0x09,
- 0xef, 0xfc, 0x65, 0xe8,
- 0x80, 0xab, 0x31, 0x14,
- 0x93, 0x51, 0x2f, 0xc4,
- 0x2d, 0x7e, 0xe9, 0x15,
- 0x66, 0x31, 0x04, 0x80,
- 0xa5, 0x74, 0xc0, 0x01,
- 0xfc, 0x2e, 0x99, 0x94,
- 0x00, 0x70, 0x2b, 0x2e,
- 0x3e, 0x9e, 0xe4, 0x40,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x96, 0x2b, 0x77, 0x17,
- 0x82, 0x03, 0x23, 0x34,
- 0x0a, 0x04, 0x2f, 0x04,
- 0x15, 0x5e, 0xe1, 0x14,
- 0x31, 0x04, 0x8e, 0x4b,
- 0xe7, 0x00, 0x02, 0x00,
- 0xa9, 0x04, 0xbc, 0x0e,
- 0xe8, 0x04, 0x48, 0x08,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0a, 0xf6, 0x60, 0x35,
- 0x2f, 0x04, 0xc0, 0x00,
- 0xad, 0x24, 0x96, 0x3b,
- 0x00, 0x09, 0xa1, 0x14,
- 0x8f, 0x2e, 0xe3, 0x04,
- 0xb0, 0x11, 0x2b, 0x24,
- 0x8d, 0x2e, 0xa3, 0x44,
- 0x8b, 0x6e, 0xb1, 0x24,
- 0xfe, 0x2e, 0x89, 0x9e,
- 0x9f, 0x64, 0x95, 0x24,
- 0x3e, 0x7e, 0xfc, 0x2e,
- 0xbc, 0x0e, 0x8c, 0x5b,
- 0x97, 0x24, 0xa9, 0x04,
- 0xef, 0xe0, 0x4b, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0x46, 0x58, 0x75,
- 0x2f, 0x04, 0xc0, 0x00,
- 0x21, 0x74, 0x8c, 0x2b,
- 0xab, 0x64, 0x96, 0x3b,
- 0x00, 0x00, 0x2d, 0x94,
- 0x02, 0x70, 0xe7, 0x10,
- 0x8c, 0x4b, 0xe4, 0x40,
- 0x6f, 0xe0, 0x58, 0xe8,
- 0x00, 0xab, 0x92, 0x5b,
- 0x21, 0xab, 0x8e, 0x2b,
- 0x52, 0xd5, 0x92, 0x7b,
- 0xc0, 0x00, 0x0b, 0xc6,
- 0x08, 0x80, 0x2f, 0x04,
- 0xc0, 0x03, 0x64, 0x91,
- 0x64, 0x70, 0x02, 0x20,
- 0x16, 0x2b, 0x84, 0x9b,
- 0x25, 0x4e, 0x8e, 0x3b,
- 0xe7, 0x20, 0x00, 0x00,
- 0xef, 0xf4, 0x78, 0x28,
- 0xa1, 0xab, 0x80, 0xab,
- 0x0b, 0xd6, 0x4e, 0x75,
- 0x12, 0x0b, 0xc0, 0x00,
- 0x25, 0x34, 0x96, 0x1b,
- 0x4c, 0xb8, 0x8e, 0x2b,
- 0x80, 0xab, 0xe8, 0x04,
- 0x4c, 0x15, 0xa1, 0xab,
- 0xc0, 0x00, 0x0b, 0xe6,
- 0x12, 0x15, 0xaf, 0x74,
- 0x12, 0x2b, 0xe0, 0x10,
- 0xa9, 0x94, 0xe0, 0x3c,
- 0x0e, 0x0b, 0xb1, 0x44,
- 0x0e, 0x39, 0xe1, 0x88,
- 0x91, 0x9e, 0xe3, 0x20,
- 0x8d, 0x2e, 0x8f, 0x4e,
- 0x9f, 0x14, 0x8b, 0x1e,
- 0x00, 0x70, 0x09, 0x0e,
- 0xa3, 0x44, 0xe7, 0x30,
- 0x9b, 0x14, 0xfe, 0x1e,
- 0xa5, 0x34, 0xfc, 0x3e,
- 0x04, 0x10, 0x27, 0x54,
- 0x3e, 0x3e, 0xe4, 0x40,
- 0xbc, 0x6e, 0x96, 0x3b,
- 0xef, 0xf8, 0x43, 0xa8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x5f, 0xfc, 0x30, 0xb8,
- 0xc0, 0x00, 0x0b, 0xf6,
- 0x63, 0x80, 0x0e, 0x19,
- 0x64, 0x50, 0x08, 0x80,
- 0x12, 0x0b, 0xc0, 0x04,
- 0xa5, 0x34, 0x96, 0x2b,
- 0xef, 0xfc, 0x5c, 0x68,
- 0x4a, 0x06, 0x00, 0xab,
- 0xdf, 0xa5, 0xe0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xab, 0x19, 0x14,
- 0x84, 0x9b, 0x15, 0x74,
- 0x86, 0x6b, 0x3e, 0x5e,
- 0x88, 0xbb, 0x7c, 0x1e,
- 0x60, 0x40, 0x12, 0x89,
- 0x47, 0xf8, 0x94, 0x1b,
- 0x8e, 0x3b, 0x68, 0x00,
- 0xe0, 0x44, 0x12, 0x09,
- 0x82, 0xe5, 0xa6, 0x0d,
- 0x86, 0x65, 0xa9, 0x0b,
- 0x8c, 0x25, 0xad, 0x0b,
- 0xaf, 0x0b, 0x7c, 0xb4,
- 0x10, 0x0b, 0x9a, 0x15,
- 0x61, 0xf8, 0x8e, 0x1b,
- 0xa3, 0x0d, 0xef, 0xd8,
- 0x8d, 0x15, 0x8c, 0x25,
- 0x8e, 0x45, 0xa5, 0x0b,
- 0xa7, 0x0b, 0x7c, 0xb4,
- 0x02, 0x60, 0x96, 0x95,
- 0x90, 0x0b, 0x64, 0x20,
- 0x6f, 0xdc, 0x41, 0x08,
- 0xa3, 0x0d, 0x8e, 0x2b,
- 0x8b, 0x35, 0x82, 0x25,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xd8, 0x60, 0xa8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x92, 0x95,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x61, 0xa8,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x69, 0xb8, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x92, 0x1b, 0x14, 0x0b,
- 0x6f, 0xd8, 0x6d, 0x68,
- 0x87, 0xb5, 0x8c, 0x2b,
- 0x64, 0x20, 0x02, 0x60,
- 0x7e, 0xf8, 0x90, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xd8,
- 0xa3, 0x0d, 0x7c, 0xb4,
- 0x3e, 0x64, 0x8c, 0x55,
- 0x8e, 0x1b, 0x90, 0x0b,
- 0x6f, 0xd8, 0x60, 0x08,
- 0x10, 0x0b, 0x8c, 0x2b,
- 0x6a, 0x78, 0x8e, 0x1b,
- 0x8c, 0x2b, 0x6f, 0xd8,
- 0x0e, 0x09, 0x85, 0x65,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x84, 0xe5, 0xa1, 0x0b,
- 0x67, 0xfd, 0x0e, 0x15,
- 0x97, 0x04, 0xc0, 0x01,
- 0x6f, 0xc9, 0x0e, 0x29,
- 0x0e, 0x39, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x60, 0x09, 0x0e, 0x4b,
- 0xc2, 0x1e, 0xc0, 0x03,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x58, 0x56, 0x21,
- 0xe0, 0x5c, 0x56, 0x31,
- 0xe0, 0x30, 0x56, 0x43,
- 0x6f, 0xd8, 0x5b, 0x48,
- 0x7c, 0xb4, 0x8e, 0x0b,
- 0x80, 0xb5, 0xa3, 0x0d,
- 0x8e, 0x0b, 0x3e, 0x14,
- 0xef, 0xd8, 0x63, 0x48,
- 0x98, 0xf1, 0x01, 0x01,
- 0x40, 0x16, 0x2c, 0x0e,
- 0x2e, 0x0e, 0xe0, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x84, 0x6b, 0x02, 0x8b,
- 0x86, 0x7b, 0x60, 0x28,
- 0xa0, 0x08, 0xa2, 0x18,
- 0xe8, 0x10, 0x62, 0x68,
- 0x60, 0x58, 0x10, 0x19,
- 0xa2, 0x04, 0x80, 0x2b,
- 0x66, 0x78, 0xe0, 0x34,
- 0xc8, 0x17, 0x68, 0x10,
- 0xe0, 0x44, 0x0c, 0x19,
- 0x9c, 0x55, 0xa5, 0x1b,
- 0x4e, 0x05, 0xe0, 0x14,
- 0xc0, 0x01, 0x67, 0xdd,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0x98, 0x34, 0x9a, 0x24,
- 0x67, 0xe1, 0x4e, 0x15,
- 0x0c, 0x19, 0xc0, 0x01,
- 0x4e, 0x03, 0xe0, 0x38,
- 0xc0, 0x02, 0x6f, 0xe1,
- 0xe0, 0x54, 0x0c, 0x09,
- 0x67, 0xe9, 0x4e, 0x25,
- 0x4e, 0x35, 0xc0, 0x01,
- 0xc0, 0x01, 0x67, 0xed,
- 0x6f, 0xc9, 0x4e, 0x11,
- 0xa1, 0x0b, 0x40, 0x05,
- 0x60, 0x3c, 0x0c, 0x19,
- 0x0c, 0x29, 0x81, 0x01,
- 0x0c, 0x39, 0xe0, 0x40,
- 0x4e, 0x11, 0xe0, 0x48,
- 0xc0, 0x05, 0x6f, 0xcd,
- 0x6f, 0xd1, 0x4e, 0x01,
- 0x4e, 0x21, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd5,
- 0x6f, 0xd9, 0x4e, 0x31,
- 0xb0, 0xa5, 0xc0, 0x05,
- 0x60, 0x51, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x01,
- 0xc0, 0x03, 0x64, 0x91,
- 0xe0, 0x88, 0x04, 0x04,
- 0x7c, 0x08, 0x02, 0x35,
- 0xf0, 0x88, 0x48, 0x12,
- 0x4e, 0x35, 0x84, 0x63,
- 0x40, 0x01, 0x67, 0xf9,
- 0xe0, 0x84, 0x06, 0x04,
- 0x60, 0x60, 0x08, 0x45,
- 0x06, 0x5b, 0x82, 0x33,
- 0x80, 0x13, 0x61, 0x20,
- 0x68, 0x01, 0x4e, 0x45,
- 0x83, 0x41, 0x40, 0x01,
- 0x60, 0x09, 0x4e, 0x53,
- 0x0c, 0x25, 0xc0, 0x03,
- 0x06, 0x3b, 0xe1, 0xbc,
- 0x4e, 0x41, 0xe1, 0x50,
- 0xc0, 0x05, 0x6f, 0xd1,
- 0x67, 0xfd, 0x4e, 0x25,
- 0x4e, 0x33, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x0d,
- 0xe3, 0x00, 0x02, 0x09,
- 0x60, 0x21, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x30,
- 0xc0, 0x06, 0x60, 0x25,
- 0xe3, 0x60, 0x02, 0x09,
- 0x60, 0x29, 0x4e, 0x01,
- 0x02, 0x09, 0xc0, 0x06,
- 0x4e, 0x01, 0xe3, 0x90,
- 0xc0, 0x06, 0x60, 0x2d,
- 0x0c, 0x29, 0x91, 0x45,
- 0x06, 0x70, 0x60, 0x40,
- 0xe0, 0x14, 0xe4, 0x70,
- 0xe0, 0x10, 0x4e, 0x05,
- 0x08, 0x24, 0x1a, 0x04,
- 0x4e, 0x15, 0xe0, 0x88,
- 0x86, 0x43, 0x60, 0x14,
- 0x60, 0x3c, 0x0e, 0x59,
- 0xe0, 0x84, 0x10, 0x24,
- 0x8c, 0x0b, 0x10, 0x0e,
- 0x70, 0x15, 0x00, 0x15,
- 0x86, 0x83, 0x40, 0x02,
- 0x60, 0x54, 0x0c, 0xc9,
- 0x44, 0x5a, 0x84, 0x33,
- 0x48, 0x15, 0xe6, 0x8a,
- 0x00, 0x1b, 0xe1, 0x00,
- 0xc0, 0x04, 0x78, 0x11,
- 0x78, 0x19, 0x00, 0x49,
- 0x50, 0x13, 0xc0, 0x08,
- 0x42, 0x52, 0x64, 0x00,
- 0x46, 0x41, 0xfb, 0xb0,
- 0x58, 0x72, 0x6a, 0x00,
- 0x00, 0x49, 0xf0, 0x88,
- 0xc0, 0x08, 0x78, 0x15,
- 0xec, 0x00, 0x46, 0x11,
- 0xeb, 0x00, 0x46, 0x41,
- 0x78, 0x11, 0x00, 0x49,
- 0x46, 0x41, 0xc0, 0x08,
- 0x08, 0x24, 0x6d, 0x00,
- 0x00, 0x59, 0xe0, 0x84,
- 0x40, 0x08, 0x78, 0x09,
- 0x0e, 0x43, 0xc4, 0x27,
- 0x04, 0x70, 0x84, 0x73,
- 0x40, 0x07, 0x67, 0x71,
- 0x67, 0x71, 0x08, 0x40,
- 0x46, 0x51, 0xc0, 0x11,
- 0x06, 0xc0, 0x6e, 0x00,
- 0xc0, 0x13, 0x67, 0x70,
- 0x81, 0x51, 0x07, 0x65,
- 0x7c, 0x14, 0x00, 0xc9,
- 0x64, 0x90, 0x10, 0x60,
- 0x0e, 0xc4, 0xc0, 0x03,
- 0x10, 0x95, 0xe0, 0x88,
- 0x54, 0x82, 0x7c, 0x1c,
- 0x8c, 0x73, 0xf0, 0x9c,
- 0x78, 0x01, 0x44, 0x95,
- 0x12, 0xc4, 0x40, 0x02,
- 0x14, 0xa5, 0xe0, 0x84,
- 0x90, 0x93, 0x60, 0x60,
- 0x61, 0x20, 0x12, 0xbb,
- 0x44, 0xa5, 0x98, 0x83,
- 0x48, 0xb3, 0xe4, 0x00,
- 0xc0, 0x02, 0x78, 0x01,
- 0xe1, 0xbc, 0x0e, 0x75,
- 0xe1, 0x50, 0x12, 0x9b,
- 0x4e, 0x32, 0x49, 0x7e,
- 0x51, 0x9c, 0xf0, 0x94,
- 0x10, 0xc9, 0x82, 0x51,
- 0x9c, 0xc6, 0xe3, 0x00,
- 0xe3, 0x30, 0x10, 0xc9,
- 0xe4, 0x00, 0x4e, 0xc1,
- 0xe3, 0x60, 0x10, 0xc9,
- 0xe8, 0x00, 0x4e, 0xc1,
- 0xe3, 0x90, 0x10, 0xc9,
- 0xec, 0x00, 0x4e, 0xc1,
- 0xf2, 0x75, 0x83, 0x5d,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x84, 0xbb, 0x0b, 0x1e,
- 0x80, 0xab, 0x2b, 0x14,
- 0x81, 0x81, 0x3c, 0x5e,
- 0x86, 0x6b, 0x3e, 0x4e,
- 0x8d, 0x1e, 0xae, 0x04,
- 0xaf, 0x74, 0xa5, 0x14,
- 0xfe, 0x1e, 0xa7, 0x94,
- 0x4f, 0xb8, 0x8f, 0x8e,
- 0x16, 0x39, 0xe8, 0x10,
- 0x98, 0x1a, 0xe0, 0x94,
- 0xa5, 0x3b, 0x9a, 0x2a,
- 0xe0, 0x10, 0x52, 0x13,
- 0xe0, 0x14, 0x52, 0x23,
- 0x09, 0x0e, 0x8a, 0x55,
- 0x74, 0x01, 0x00, 0x0e,
- 0xbe, 0x7e, 0xc0, 0x07,
- 0x83, 0x01, 0x26, 0x0e,
- 0x85, 0x01, 0x7c, 0x0e,
- 0x2d, 0x64, 0xa1, 0x8c,
- 0xfa, 0x80, 0x02, 0x04,
- 0x94, 0x0b, 0x29, 0x74,
- 0x8d, 0x34, 0xfe, 0x24,
- 0xe8, 0x00, 0x4d, 0x28,
- 0x60, 0x94, 0x16, 0x19,
- 0x12, 0x2b, 0x94, 0x0b,
- 0x49, 0x98, 0x8c, 0x3b,
- 0x0b, 0x64, 0xe8, 0x00,
- 0x16, 0x29, 0x94, 0x0b,
- 0x8e, 0x4b, 0x60, 0x90,
- 0xe0, 0x94, 0x16, 0x19,
- 0x68, 0x00, 0x4e, 0x88,
- 0x8d, 0x14, 0x8c, 0x3b,
- 0x89, 0x04, 0xbe, 0x74,
- 0x8f, 0x05, 0xfc, 0x94,
- 0x16, 0x19, 0xa3, 0x34,
- 0xcc, 0x28, 0xe0, 0x90,
- 0x82, 0x95, 0xc5, 0x1d,
- 0xc5, 0x1d, 0xce, 0x28,
- 0x00, 0x14, 0x1e, 0x65,
- 0x80, 0x00, 0x12, 0x26,
- 0x00, 0x18, 0x1e, 0x15,
- 0x80, 0x00, 0x50, 0xc6,
- 0x09, 0x0e, 0x96, 0xe5,
- 0xf0, 0x84, 0x40, 0x32,
- 0x60, 0x20, 0x00, 0x19,
- 0xe4, 0x70, 0x04, 0xf0,
- 0xe1, 0x20, 0x00, 0x09,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x80, 0x02, 0xf0,
- 0x60, 0x84, 0x5e, 0x01,
- 0x59, 0x78, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x00, 0x8b, 0x80, 0xe5,
- 0x8b, 0x64, 0x87, 0x91,
- 0x89, 0x04, 0x8d, 0x14,
- 0x0f, 0x04, 0x89, 0x55,
- 0xe4, 0x70, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x04,
- 0x0c, 0x13, 0xc4, 0x07,
- 0x02, 0x1b, 0x80, 0x63,
- 0x0c, 0x05, 0xe2, 0x48,
- 0x52, 0x13, 0xe0, 0x24,
- 0x02, 0xf0, 0x60, 0x28,
- 0xa6, 0x0e, 0xe4, 0x80,
- 0x57, 0xb8, 0xbe, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x8b, 0x11, 0x21, 0x0b,
- 0x88, 0xf5, 0xfc, 0x1e,
- 0x04, 0xf0, 0x0f, 0x04,
- 0xfe, 0x14, 0xe4, 0x70,
- 0x02, 0x15, 0xc4, 0x07,
- 0x8c, 0x03, 0x60, 0x10,
- 0xe0, 0x24, 0x00, 0x05,
- 0x02, 0xf0, 0x02, 0x03,
- 0xe6, 0x0e, 0xe4, 0x80,
- 0x56, 0x58, 0xbc, 0x64,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x84, 0x75, 0xa1, 0x0b,
- 0x8c, 0x1b, 0x0f, 0x04,
- 0x04, 0xf0, 0x21, 0x64,
- 0xc2, 0x07, 0xe4, 0x70,
- 0x02, 0xf0, 0x02, 0x03,
- 0x00, 0x0b, 0xe4, 0x80,
- 0x52, 0x03, 0xe0, 0x18,
- 0x8c, 0x0b, 0x60, 0x3c,
- 0xe8, 0x00, 0x55, 0x28,
- 0x84, 0x65, 0xa1, 0x0b,
- 0x80, 0x8b, 0x0b, 0x64,
- 0x8b, 0x91, 0x0d, 0x14,
- 0x02, 0x1b, 0x89, 0x04,
- 0x44, 0x18, 0xe1, 0xa8,
- 0x4c, 0x03, 0xef, 0xe0,
- 0x90, 0x0b, 0x60, 0x18,
- 0xc8, 0xf1, 0x1c, 0x8e,
- 0x0c, 0x0c, 0x9e, 0x9e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xbe, 0x7e, 0x8f, 0x04,
- 0x80, 0x63, 0xc2, 0x07,
- 0xe0, 0x18, 0x0c, 0x0b,
- 0xe0, 0x38, 0x52, 0x03,
- 0xe0, 0x94, 0x16, 0x09,
- 0xc1, 0xc3, 0xeb, 0xb5,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x3b, 0x06, 0x6b,
- 0x44, 0x06, 0x02, 0x7b,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x57, 0xb8, 0x86, 0x1b,
- 0xa6, 0x7d, 0xef, 0xd0,
- 0xa9, 0x7b, 0x82, 0x25,
- 0xad, 0x7b, 0x80, 0xa5,
- 0xaf, 0x7b, 0x82, 0x25,
- 0x01, 0x85, 0x86, 0x95,
- 0xa5, 0x7b, 0x81, 0x01,
- 0xa7, 0x7b, 0x82, 0x85,
- 0x81, 0x01, 0x84, 0xd5,
- 0x4c, 0x03, 0xda, 0x0e,
- 0x02, 0x06, 0x60, 0x28,
- 0x4c, 0x13, 0xe1, 0x00,
- 0x81, 0xd5, 0xe0, 0x38,
- 0xda, 0x0e, 0x81, 0x01,
- 0xe0, 0x28, 0x4c, 0x03,
- 0x60, 0x30, 0x4c, 0x03,
- 0xe1, 0x00, 0x00, 0x06,
- 0xe0, 0x38, 0x4c, 0x03,
- 0xe0, 0x3c, 0x4c, 0x03,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0x44, 0x46, 0x02, 0x8b,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x54, 0x98, 0x8e, 0x1b,
- 0xad, 0x8b, 0xef, 0xd0,
- 0xe0, 0x0c, 0x10, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x80, 0x00, 0x00, 0x06,
- 0x80, 0x70, 0x4c, 0x01,
- 0xa5, 0x8b, 0x82, 0xe5,
- 0x01, 0x21, 0x82, 0xb5,
- 0xe4, 0x80, 0x00, 0x60,
- 0x60, 0x70, 0x4c, 0x21,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x0c, 0x0c, 0x99, 0x21,
- 0x13, 0x18, 0xf2, 0x0c,
- 0x0c, 0x0c, 0xff, 0xd0,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x8c, 0x35, 0xa5, 0x1b,
- 0x6f, 0xd1, 0x06, 0x09,
- 0x06, 0x19, 0xc0, 0x05,
- 0xc0, 0x05, 0x6f, 0xd9,
- 0x6f, 0xc9, 0x06, 0x29,
- 0x06, 0x59, 0xc0, 0x05,
- 0x40, 0x05, 0x6f, 0xcd,
- 0x48, 0x11, 0xa1, 0x0b,
- 0x48, 0x21, 0xe0, 0x34,
- 0x48, 0x51, 0xe0, 0x20,
- 0x48, 0x01, 0xe0, 0x24,
- 0x9a, 0xc5, 0xe0, 0x30,
- 0x67, 0xf9, 0x06, 0x05,
- 0x06, 0x1b, 0xc0, 0x01,
- 0xc0, 0x03, 0x60, 0x09,
- 0x60, 0x2d, 0x06, 0x29,
- 0x48, 0x05, 0xc0, 0x06,
- 0x48, 0x13, 0xe0, 0x10,
- 0x06, 0x05, 0xe0, 0xe0,
- 0xc0, 0x01, 0x68, 0x01,
- 0x60, 0x0d, 0x06, 0x1b,
- 0x48, 0x21, 0xc0, 0x03,
- 0x48, 0x05, 0xe2, 0x80,
- 0x48, 0x13, 0xe0, 0x40,
- 0x8b, 0x45, 0xe1, 0x10,
- 0x60, 0x3c, 0x06, 0x59,
- 0xf0, 0x88, 0x40, 0x32,
- 0x6e, 0x70, 0x00, 0x19,
- 0xe6, 0x80, 0x18, 0x40,
- 0x81, 0x71, 0x01, 0x61,
- 0xe0, 0x34, 0x48, 0x11,
- 0xea, 0x70, 0x00, 0x19,
- 0xe0, 0x20, 0x48, 0x11,
- 0xeb, 0x70, 0x00, 0x19,
- 0xe0, 0x24, 0x48, 0x11,
- 0xe6, 0x8a, 0x42, 0x5a,
- 0xec, 0x70, 0x00, 0x09,
- 0x60, 0x84, 0x04, 0x14,
- 0xe0, 0x88, 0x0a, 0x14,
- 0x10, 0x02, 0x86, 0x23,
- 0x00, 0x10, 0x6c, 0x30,
- 0xc0, 0x16, 0x67, 0x70,
- 0x67, 0x71, 0x02, 0x20,
- 0x04, 0x50, 0x40, 0x0f,
- 0xc0, 0x0b, 0x67, 0x71,
- 0x60, 0x30, 0x48, 0x81,
- 0xe5, 0x00, 0x0a, 0x40,
- 0x02, 0x9b, 0x85, 0x35,
- 0x50, 0x32, 0x7c, 0x18,
- 0x10, 0x85, 0xf0, 0x88,
- 0x40, 0x04, 0x78, 0x01,
- 0xf0, 0x98, 0x54, 0xc2,
- 0x78, 0x60, 0x54, 0x93,
- 0xf0, 0x98, 0x52, 0x12,
- 0x78, 0x30, 0x4a, 0x85,
- 0x06, 0x85, 0x84, 0x61,
- 0x88, 0x21, 0x7c, 0x08,
- 0xe4, 0x00, 0x12, 0x9b,
- 0x50, 0x32, 0x55, 0x8e,
- 0x54, 0x93, 0xf0, 0x9c,
- 0x52, 0xc2, 0x78, 0x30,
- 0x10, 0x89, 0xf0, 0x9c,
- 0x82, 0x71, 0x7c, 0x00,
- 0x08, 0x89, 0xa4, 0x86,
- 0x10, 0x84, 0xe0, 0x30,
- 0x91, 0x7d, 0xfa, 0x80,
- 0x0c, 0x4c, 0xf6, 0x75,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x8c, 0x04, 0x0c,
- 0x60, 0x38, 0x46, 0x11,
- 0x46, 0x21, 0x81, 0x51,
- 0x04, 0x30, 0x60, 0x3c,
- 0xc0, 0x01, 0x64, 0x70,
- 0x60, 0x18, 0x46, 0x53,
- 0x64, 0x70, 0x18, 0x30,
- 0x0c, 0x30, 0xc0, 0x02,
- 0x40, 0x02, 0x66, 0x71,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x81, 0x71, 0x03, 0x25,
- 0x79, 0x00, 0x44, 0x55,
- 0xf0, 0x9c, 0x50, 0x62,
- 0xf1, 0x5c, 0xc9, 0x5e,
- 0x63, 0x00, 0x50, 0x71,
- 0xa0, 0x56, 0x82, 0x71,
- 0xe1, 0x00, 0x50, 0x51,
- 0xe2, 0x00, 0x50, 0x51,
- 0xe4, 0x00, 0x50, 0x11,
- 0xe1, 0x00, 0x0e, 0x0a,
- 0x04, 0x30, 0xfa, 0xd5,
- 0x40, 0x16, 0x67, 0x71,
- 0xe0, 0x10, 0x18, 0x06,
- 0x49, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x18, 0xc0,
- 0xfe, 0x95, 0xa1, 0xcb,
- 0x67, 0xf1, 0x46, 0x55,
- 0x04, 0x06, 0x40, 0x01,
- 0x46, 0x55, 0xef, 0xf0,
- 0xc0, 0x01, 0x67, 0xed,
- 0x67, 0xe9, 0x46, 0x55,
- 0x46, 0x11, 0xc0, 0x01,
- 0x40, 0x05, 0x6f, 0xd9,
- 0x46, 0x23, 0x88, 0x1b,
- 0xc0, 0x02, 0x6f, 0xe9,
- 0x60, 0x2d, 0x46, 0x51,
- 0x0c, 0x0c, 0xc0, 0x06,
- 0x24, 0x38, 0xf0, 0x8c,
- 0xc1, 0xc3, 0xff, 0xd4,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0xe0, 0x18, 0x00, 0x79,
- 0xe0, 0x28, 0x00, 0x39,
- 0xe0, 0x20, 0x00, 0xc9,
- 0x08, 0x70, 0x06, 0x68,
- 0x4a, 0x3a, 0xec, 0x04,
- 0x00, 0x49, 0xe6, 0x92,
- 0x00, 0x89, 0xe0, 0x14,
- 0x52, 0x52, 0x60, 0x1c,
- 0x00, 0x59, 0xf0, 0xb0,
- 0x81, 0x01, 0x60, 0x24,
- 0xd2, 0x6d, 0x04, 0x18,
- 0x40, 0xc6, 0x08, 0x0e,
- 0x8e, 0x55, 0xe0, 0x00,
- 0xec, 0x04, 0x12, 0x40,
- 0xe6, 0xa6, 0x52, 0x5a,
- 0xd2, 0x1d, 0x90, 0x93,
- 0xd9, 0x6d, 0x8c, 0x75,
- 0xd1, 0x1d, 0x8c, 0x35,
- 0xa1, 0x3b, 0x8a, 0xf5,
- 0xa1, 0x5b, 0x8a, 0xa5,
- 0x52, 0xc2, 0x8a, 0x65,
- 0x12, 0x8a, 0xf9, 0xa0,
- 0x88, 0xd5, 0xf0, 0x00,
- 0x88, 0x95, 0xf0, 0x7d,
- 0x88, 0x55, 0xf4, 0x4d,
- 0xec, 0x08, 0x12, 0x40,
- 0xf4, 0xf4, 0x13, 0x0a,
- 0xe5, 0x7d, 0x86, 0xb5,
- 0x4e, 0x32, 0x86, 0x75,
- 0xa2, 0x7f, 0xf9, 0x94,
- 0x0e, 0x8a, 0xac, 0x7f,
- 0x84, 0x95, 0xf0, 0x00,
- 0x4e, 0x1a, 0xb0, 0x13,
- 0xa1, 0x7b, 0xe1, 0x16,
- 0xb8, 0x63, 0x82, 0xf5,
- 0xe1, 0x0e, 0x58, 0x6a,
- 0x82, 0x55, 0xa1, 0xcb,
- 0xe0, 0x0e, 0x40, 0x6a,
- 0xe0, 0x16, 0x42, 0x1a,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x08, 0x0e, 0x82, 0x03,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x80, 0xab, 0x3d, 0x04,
- 0x81, 0x91, 0x25, 0x5e,
- 0x84, 0x8b, 0x15, 0x4e,
- 0x16, 0x30, 0x13, 0x0e,
- 0x3b, 0x04, 0xe5, 0x20,
- 0xe0, 0x08, 0x0d, 0x06,
- 0x81, 0x71, 0x21, 0x1e,
- 0xa3, 0x0e, 0xa9, 0x9e,
- 0x27, 0x0e, 0xb9, 0x04,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1b, 0x0e, 0xc0, 0x02,
- 0x66, 0x01, 0x00, 0xa0,
- 0x19, 0x0e, 0xc0, 0x04,
- 0x67, 0x01, 0x00, 0xa0,
- 0x17, 0x0e, 0xc0, 0x06,
- 0x64, 0x01, 0x00, 0xa0,
- 0x1f, 0x0e, 0xc0, 0x09,
- 0x65, 0x01, 0x00, 0xa0,
- 0x1d, 0x0e, 0xc0, 0x0b,
- 0x8d, 0x85, 0x81, 0x01,
- 0x98, 0x55, 0xa1, 0x0b,
- 0x78, 0x90, 0x16, 0x03,
- 0xac, 0x12, 0x94, 0x5b,
- 0xa7, 0x34, 0xa5, 0x24,
- 0x72, 0xf8, 0xa3, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa1, 0x34, 0x94, 0xf5,
- 0x16, 0x03, 0x9d, 0x44,
- 0xac, 0x12, 0xf8, 0x90,
- 0xe0, 0x30, 0x16, 0x23,
- 0x8b, 0x4e, 0x8c, 0x38,
- 0xa7, 0x54, 0x9f, 0x44,
- 0x97, 0x44, 0x89, 0x4e,
- 0x99, 0x44, 0xfe, 0x4e,
- 0x9b, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x74, 0x38, 0xa5, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0x93, 0x44, 0x8e, 0xf5,
- 0x16, 0x03, 0xa1, 0x34,
- 0x2c, 0x12, 0xf8, 0x90,
- 0xf0, 0xa4, 0x4a, 0x42,
- 0x60, 0x30, 0x16, 0x23,
- 0x8e, 0x38, 0x8c, 0x43,
- 0xe0, 0x51, 0x0f, 0x5e,
- 0x09, 0x4e, 0x8b, 0x5e,
- 0xe5, 0x40, 0x08, 0xf0,
- 0x9d, 0x44, 0xfe, 0x4e,
- 0xa7, 0x54, 0x91, 0x5e,
- 0x9f, 0x44, 0xfc, 0x4e,
- 0xbc, 0xae, 0xbe, 0x4e,
- 0x79, 0x78, 0x95, 0x44,
- 0xa1, 0x0b, 0xef, 0xdc,
- 0xa9, 0x04, 0x88, 0x35,
- 0x11, 0x04, 0x8f, 0xc4,
- 0x00, 0x34, 0xa3, 0x0b,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x58, 0x35,
- 0xc0, 0x60, 0x58, 0x35,
- 0xa1, 0x44, 0x84, 0xb5,
- 0x16, 0x03, 0x93, 0x24,
- 0x50, 0x58, 0xf8, 0x90,
- 0xe5, 0x80, 0x08, 0xc0,
- 0x04, 0x23, 0xac, 0x12,
- 0x89, 0x4e, 0xfc, 0x18,
- 0xfe, 0xce, 0xa7, 0x44,
- 0xbe, 0x4e, 0xfc, 0xae,
- 0x3c, 0x4e, 0x95, 0x44,
- 0x6b, 0xd8, 0x83, 0x41,
- 0x02, 0x71, 0xef, 0xd8,
- 0x04, 0xb1, 0x88, 0x91,
- 0xa2, 0x18, 0x84, 0x61,
- 0xe4, 0xf5, 0x83, 0x7d,
- 0xe5, 0x50, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x84, 0xab, 0x06, 0xb8,
- 0x60, 0x10, 0x00, 0x23,
- 0x02, 0x14, 0x99, 0x41,
- 0x00, 0x0b, 0x81, 0x51,
- 0x3e, 0x0e, 0xe0, 0x14,
- 0xe7, 0x60, 0x00, 0x30,
- 0x41, 0x56, 0x81, 0x45,
- 0xec, 0x04, 0x08, 0x40,
- 0xfe, 0x95, 0xa1, 0x4b,
- 0x6c, 0x04, 0x00, 0x10,
- 0x7f, 0xfc, 0x49, 0xee,
- 0x3e, 0x04, 0xcf, 0xff,
- 0xe4, 0x10, 0x41, 0x4a,
- 0xe0, 0x04, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xec, 0x04, 0x00, 0x00,
- 0x6f, 0xf9, 0x01, 0x5a,
- 0x40, 0xc6, 0x40, 0x0f,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x17, 0x5a, 0xed, 0x80,
- 0x42, 0x0a, 0xe4, 0x30,
- 0x00, 0x06, 0xed, 0x80,
- 0xbc, 0x0e, 0xc0, 0x00,
- 0x80, 0x00, 0x13, 0xc8,
- 0x60, 0x0a, 0x40, 0x2e,
- 0xe7, 0x60, 0x12, 0x30,
- 0xe6, 0xa0, 0x10, 0x30,
- 0xe5, 0x02, 0x44, 0x1a,
- 0xe5, 0x82, 0x48, 0x1a,
- 0x02, 0x24, 0x09, 0x2e,
- 0x7e, 0x4e, 0xe1, 0x84,
- 0xe0, 0xfc, 0x00, 0x44,
- 0xc3, 0x47, 0x20, 0x1f,
- 0x8b, 0x4e, 0xfc, 0x1e,
- 0x20, 0x12, 0xa5, 0x35,
- 0xa8, 0x34, 0x81, 0x01,
- 0x40, 0x1a, 0xa0, 0x1d,
- 0x42, 0x3a, 0xc6, 0x86,
- 0x40, 0x3a, 0xe5, 0x82,
- 0x04, 0x14, 0xe5, 0x02,
- 0x06, 0x20, 0xf6, 0x80,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x00, 0x5b, 0xe4, 0x7c,
- 0xfb, 0x8c, 0x48, 0x22,
- 0x6c, 0x7c, 0x06, 0x42,
- 0x9c, 0x00, 0x4a, 0x10,
- 0x68, 0x8c, 0x18, 0x54,
- 0x4a, 0x00, 0x81, 0x51,
- 0x0c, 0x34, 0x1c, 0x00,
- 0x0e, 0x54, 0xec, 0x00,
- 0xa6, 0x43, 0x6f, 0x8c,
- 0x78, 0x9c, 0x4c, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xac, 0xcf, 0x0b, 0x64,
- 0x68, 0x90, 0x08, 0xc4,
- 0x48, 0x3b, 0xa7, 0x5f,
- 0x4d, 0x4a, 0xca, 0xcb,
- 0x4c, 0x1a, 0xe4, 0x0c,
- 0x8c, 0x3b, 0x60, 0x0c,
- 0x42, 0x0a, 0x7c, 0x64,
- 0x4d, 0x6a, 0xe5, 0x80,
- 0x42, 0x1a, 0xe4, 0x30,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x40, 0x52, 0xed, 0x80,
- 0x4e, 0x20, 0x50, 0x98,
- 0x08, 0xf5, 0xdc, 0x00,
- 0xd2, 0x8c, 0x42, 0x42,
- 0x08, 0x65, 0xa1, 0x2b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x6c, 0x04, 0x0e, 0x20,
- 0x0f, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0x02, 0x20, 0x1c, 0x00,
- 0x44, 0x72, 0xec, 0x84,
- 0x00, 0x06, 0x7b, 0x84,
- 0x02, 0x22, 0xc0, 0x00,
- 0x08, 0x04, 0xec, 0x7c,
- 0x0a, 0x14, 0x6f, 0x84,
- 0x22, 0x23, 0xec, 0x00,
- 0x23, 0x3f, 0xa3, 0x0f,
- 0xf8, 0x90, 0x48, 0x52,
- 0xa8, 0x3f, 0x0b, 0x14,
- 0x6c, 0x04, 0x04, 0x22,
- 0xa5, 0x3f, 0x8c, 0x03,
- 0xf2, 0x84, 0x42, 0x32,
- 0xfe, 0x34, 0x89, 0x24,
- 0xef, 0xcc, 0x47, 0x28,
- 0x00, 0x70, 0x00, 0x2b,
- 0x08, 0x70, 0xe4, 0x2c,
- 0x01, 0x0a, 0x6c, 0x54,
- 0x03, 0x31, 0xe4, 0x7c,
- 0xfb, 0x90, 0x48, 0x02,
- 0x00, 0x00, 0x06, 0x06,
- 0xe4, 0x80, 0x00, 0xca,
- 0x62, 0x00, 0x00, 0x0c,
- 0xec, 0x7c, 0x0a, 0x42,
- 0x6f, 0x94, 0x18, 0x04,
- 0xec, 0x00, 0x0c, 0x54,
- 0xab, 0x3f, 0x2a, 0x43,
- 0x78, 0xb0, 0x58, 0x62,
- 0xec, 0x04, 0x08, 0x42,
- 0xab, 0x0f, 0x38, 0x3f,
- 0x44, 0xaa, 0x29, 0x3f,
- 0x47, 0x1d, 0xe4, 0x00,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xe0, 0x0c, 0x42, 0x1a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xa1, 0x1b, 0x9e, 0xc5,
- 0xbe, 0x44, 0x8e, 0xf5,
- 0xf6, 0x80, 0x00, 0x24,
- 0xf6, 0x80, 0x02, 0x44,
- 0x02, 0x8a, 0x80, 0x13,
- 0x90, 0x75, 0xe4, 0x80,
- 0x64, 0x74, 0x0f, 0x0a,
- 0x9c, 0x15, 0x83, 0x41,
- 0xbd, 0x11, 0x3e, 0x04,
- 0x40, 0x2a, 0xae, 0x13,
- 0x04, 0x44, 0x66, 0x82,
- 0x02, 0x70, 0xe8, 0x84,
- 0x04, 0x20, 0x64, 0x08,
- 0xa3, 0x2f, 0xec, 0x04,
- 0xf8, 0x08, 0x46, 0x02,
- 0x98, 0xd5, 0x85, 0x3b,
- 0x6c, 0x80, 0x06, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x46, 0x12, 0x01, 0x21,
- 0x04, 0x16, 0xfb, 0x8c,
- 0x02, 0xca, 0x40, 0x00,
- 0x08, 0x0c, 0xe4, 0x80,
- 0x02, 0x32, 0x62, 0x00,
- 0x0a, 0x44, 0xec, 0x7c,
- 0x18, 0x14, 0x6f, 0x84,
- 0x22, 0x33, 0xec, 0x00,
- 0x4a, 0xc2, 0xa3, 0x2f,
- 0xa3, 0x4f, 0x78, 0x94,
- 0x06, 0x32, 0x2a, 0x2f,
- 0x27, 0x2f, 0xec, 0x04,
- 0x81, 0x11, 0x88, 0x03,
- 0x42, 0x22, 0x07, 0x55,
- 0x04, 0x0b, 0xf2, 0x84,
- 0xbe, 0x24, 0x81, 0x31,
- 0xef, 0xcc, 0x49, 0x68,
- 0x64, 0x08, 0x06, 0x70,
- 0x07, 0x0a, 0x81, 0x21,
- 0x01, 0xe5, 0xe4, 0x7c,
- 0xc0, 0x00, 0x04, 0x16,
- 0x64, 0x08, 0x06, 0x70,
- 0xe5, 0x12, 0x40, 0x2a,
- 0x65, 0x92, 0x42, 0x2a,
- 0xe4, 0x7c, 0x07, 0x0a,
- 0x04, 0x06, 0x83, 0x21,
- 0x08, 0x70, 0x80, 0x00,
- 0x06, 0xca, 0x6c, 0x78,
- 0x0a, 0x0c, 0xe4, 0x80,
- 0x48, 0x32, 0x62, 0x00,
- 0x06, 0x42, 0xfb, 0x90,
- 0x18, 0x54, 0xec, 0x7c,
- 0x0c, 0x34, 0x6f, 0x8c,
- 0x26, 0x43, 0xec, 0x00,
- 0x58, 0x62, 0xa7, 0x2f,
- 0xa7, 0x5f, 0x78, 0xb0,
- 0x08, 0x42, 0x38, 0x2f,
- 0x29, 0x2f, 0xec, 0x04,
- 0x42, 0x12, 0x8a, 0x03,
- 0x4c, 0x78, 0xf2, 0x88,
- 0x04, 0x70, 0x6f, 0xcc,
- 0x00, 0x8a, 0xe4, 0x0c,
- 0x41, 0xf6, 0xe7, 0xfc,
- 0xa1, 0x1b, 0x00, 0x0c,
- 0xc0, 0x0c, 0x41, 0xf6,
- 0x16, 0xb0, 0xa4, 0x06,
- 0x82, 0x91, 0x6c, 0x04,
- 0x84, 0x81, 0x08, 0xa1,
- 0x02, 0x44, 0x81, 0x95,
- 0x86, 0x71, 0x68, 0x84,
- 0xef, 0x0f, 0x82, 0x03,
- 0x00, 0x02, 0x7f, 0x45,
- 0xa1, 0xbb, 0xef, 0xfc,
- 0xdf, 0xfc, 0x2d, 0xd8,
- 0xb0, 0xf1, 0x3c, 0x04,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x80, 0xcb, 0x06, 0x1d,
- 0x7a, 0x0c, 0x4c, 0x12,
- 0xfb, 0x04, 0x42, 0x32,
- 0x1c, 0x00, 0x58, 0x20,
- 0xf1, 0x84, 0x46, 0x62,
- 0x1c, 0x00, 0x44, 0x00,
- 0x67, 0x0f, 0xff, 0x01,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x69, 0x8c, 0x0e, 0xc4,
- 0xf8, 0x98, 0x40, 0x02,
- 0x84, 0x03, 0xae, 0x0f,
- 0x79, 0x08, 0x4c, 0x02,
- 0xf9, 0x30, 0x4e, 0x02,
- 0xa1, 0x6d, 0x8e, 0x6f,
- 0x04, 0x04, 0x84, 0xf5,
- 0xbf, 0x61, 0x70, 0x80,
- 0x46, 0x62, 0x63, 0x2f,
- 0x42, 0x29, 0xf1, 0x8c,
- 0x04, 0x24, 0xa7, 0xcf,
- 0x06, 0xc4, 0x76, 0x80,
- 0x04, 0x20, 0xfc, 0x7c,
- 0x42, 0x22, 0xec, 0x04,
- 0x22, 0x63, 0xf1, 0x84,
- 0x6d, 0x3f, 0xa3, 0x0f,
- 0x03, 0x35, 0x84, 0x1b,
- 0xa3, 0x1d, 0x86, 0x03,
- 0x41, 0xfc, 0x04, 0x24,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x02, 0x75, 0xdf, 0xff,
- 0xd0, 0x88, 0x40, 0x02,
- 0x60, 0x01, 0x06, 0x06,
- 0xc3, 0x07, 0x60, 0x00,
- 0x02, 0x10, 0x06, 0x2f,
- 0xa4, 0x0f, 0xec, 0x04,
- 0x94, 0x1e, 0x90, 0x0e,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x88, 0x9b, 0x1d, 0x34,
- 0x82, 0x6b, 0x00, 0xcb,
- 0x50, 0x22, 0x06, 0x2d,
- 0x58, 0x90, 0xfa, 0x0c,
- 0x52, 0x00, 0x1c, 0x00,
- 0x21, 0x04, 0x9c, 0x00,
- 0xfb, 0x08, 0x46, 0x32,
- 0x71, 0x8c, 0x54, 0x82,
- 0x9c, 0x00, 0x4c, 0x50,
- 0x4a, 0x10, 0x7e, 0xce,
- 0x0d, 0x0e, 0x9c, 0x00,
- 0x1f, 0x04, 0x8c, 0x1b,
- 0x09, 0x5e, 0x94, 0x2b,
- 0x0b, 0x0e, 0x86, 0x8b,
- 0x43, 0x78, 0x98, 0x0b,
- 0x00, 0x7b, 0xef, 0xcc,
- 0x7f, 0x01, 0x82, 0xbb,
- 0x7c, 0xae, 0xff, 0x11,
- 0x42, 0xf8, 0x94, 0x2b,
- 0x09, 0xa4, 0xef, 0xcc,
- 0xe1, 0x7c, 0x04, 0x64,
- 0x78, 0x88, 0x40, 0x02,
- 0xf8, 0x88, 0x42, 0x12,
- 0xb6, 0x1f, 0x2e, 0x0f,
- 0x56, 0x02, 0x3e, 0x6e,
- 0x4e, 0x12, 0xf0, 0xa4,
- 0x40, 0x72, 0xf2, 0xa8,
- 0x42, 0x72, 0x79, 0x28,
- 0x82, 0x0f, 0xf9, 0x18,
- 0x98, 0x35, 0xa1, 0x0d,
- 0xe1, 0x7c, 0x02, 0x74,
- 0xf0, 0x84, 0x40, 0xb2,
- 0x72, 0x84, 0x44, 0x72,
- 0x44, 0x1f, 0xc2, 0x0f,
- 0x40, 0xf8, 0x90, 0x2b,
- 0x21, 0x1b, 0xef, 0xcc,
- 0x00, 0x14, 0xbf, 0xc1,
- 0x81, 0x11, 0x56, 0x80,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0xec, 0x04, 0x0c, 0x00,
- 0x44, 0x62, 0x7c, 0x84,
- 0x00, 0x20, 0xf1, 0xa0,
- 0x05, 0x0a, 0x6c, 0x80,
- 0x48, 0x22, 0xe4, 0x7c,
- 0x42, 0xb0, 0x7b, 0x80,
- 0x00, 0x42, 0x9c, 0x00,
- 0x56, 0x70, 0x6c, 0x7c,
- 0x06, 0x14, 0x9c, 0x00,
- 0x0a, 0x04, 0x6f, 0x80,
- 0x46, 0x52, 0xec, 0x00,
- 0xa1, 0xbf, 0x78, 0x8c,
- 0x4e, 0xb2, 0x7e, 0xb4,
- 0x47, 0xf6, 0xf9, 0x8c,
- 0xb0, 0xc3, 0x60, 0x00,
- 0x71, 0xa0, 0x4a, 0x32,
- 0x0b, 0x0a, 0xa0, 0x43,
- 0x58, 0x52, 0x64, 0x7c,
- 0x1e, 0xb5, 0xfb, 0xb0,
- 0x96, 0x5b, 0x00, 0x04,
- 0x6c, 0x04, 0x10, 0x42,
- 0xec, 0x7c, 0x08, 0xc2,
- 0x40, 0x00, 0x0a, 0x06,
- 0xec, 0x00, 0x14, 0x44,
- 0x6f, 0x90, 0x12, 0x54,
- 0x10, 0x14, 0xb1, 0x7f,
- 0x40, 0xa2, 0x68, 0x80,
- 0x02, 0xb4, 0xf8, 0xa4,
- 0xa8, 0xc3, 0x68, 0x90,
- 0x00, 0xc2, 0x20, 0x1f,
- 0x21, 0x1f, 0xec, 0x04,
- 0xe8, 0x90, 0x00, 0x54,
- 0x7c, 0x7c, 0x02, 0x14,
- 0xf1, 0x88, 0x44, 0x32,
- 0xef, 0xc8, 0x7b, 0xe8,
- 0x03, 0xd5, 0x90, 0x03,
- 0xf2, 0x9c, 0x42, 0x12,
- 0xff, 0x01, 0x23, 0x8d,
- 0x02, 0x06, 0x82, 0xf5,
- 0x60, 0x00, 0x60, 0x01,
- 0xe0, 0xfc, 0x00, 0x74,
- 0xc3, 0x77, 0x43, 0xb7,
- 0xb6, 0x0f, 0x02, 0xaf,
- 0x79, 0xa8, 0x42, 0x72,
- 0xec, 0x04, 0x0c, 0x80,
- 0x7f, 0xa7, 0x81, 0xa5,
- 0x7f, 0xfd, 0x43, 0xfe,
- 0x01, 0x21, 0xdf, 0xff,
- 0x42, 0x22, 0x94, 0x03,
- 0x90, 0x6b, 0x72, 0x84,
- 0x88, 0x0e, 0x8b, 0x24,
- 0x0d, 0x04, 0x8a, 0x1e,
- 0x80, 0x6e, 0xb8, 0xf1,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x76, 0x80, 0x14, 0x24,
- 0xe0, 0x00, 0x48, 0xc6,
- 0xb4, 0x43, 0x19, 0x51,
- 0x09, 0x0a, 0x34, 0x53,
- 0x4a, 0x42, 0xe4, 0x7c,
- 0x81, 0xc1, 0x7b, 0x94,
- 0x6c, 0x7c, 0x08, 0x52,
- 0x9c, 0x00, 0x58, 0x00,
- 0x00, 0x00, 0x00, 0x06,
- 0xe4, 0xb0, 0x12, 0x10,
- 0x6f, 0x90, 0x02, 0xc4,
- 0xec, 0x00, 0x16, 0x44,
- 0x78, 0x84, 0x42, 0xb2,
- 0x28, 0x53, 0xa9, 0x0f,
- 0x02, 0x52, 0xa2, 0x0f,
- 0x86, 0xa3, 0x6c, 0x04,
- 0x68, 0x84, 0x02, 0x04,
- 0xe8, 0x90, 0x00, 0xc4,
- 0x6f, 0xc8, 0x5b, 0x08,
- 0x81, 0x81, 0x81, 0x31,
- 0xff, 0x21, 0x34, 0x93,
- 0x84, 0x9d, 0x1e, 0x1e,
- 0x82, 0x85, 0x9c, 0x0e,
- 0x12, 0x8a, 0x18, 0x9e,
- 0x8a, 0x55, 0xe0, 0xfc,
- 0x6f, 0xc8, 0x74, 0x28,
- 0xec, 0xf8, 0x04, 0x90,
- 0x51, 0xe6, 0x05, 0x25,
- 0x32, 0x2b, 0xe0, 0x00,
- 0x05, 0x0a, 0x80, 0x3b,
- 0x46, 0x10, 0xe4, 0x7c,
- 0xc1, 0x11, 0x1c, 0x00,
- 0x42, 0x22, 0xb2, 0x13,
- 0x04, 0x12, 0xfb, 0x84,
- 0x08, 0x34, 0xec, 0x7c,
- 0x81, 0x31, 0x68, 0x88,
- 0x1c, 0x00, 0x46, 0x00,
- 0xec, 0x00, 0x0a, 0x24,
- 0x6f, 0x88, 0x00, 0x34,
- 0x40, 0x52, 0xa4, 0x13,
- 0x20, 0x4f, 0xf8, 0x80,
- 0xec, 0x04, 0x00, 0x12,
- 0x68, 0x80, 0x02, 0x44,
- 0xe8, 0x88, 0x00, 0x34,
- 0x9e, 0x1e, 0x9c, 0x0e,
- 0x0c, 0x4c, 0x98, 0x8e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x88, 0x7b, 0x52, 0xc4,
- 0xf0, 0x14, 0x0e, 0x65,
- 0xe6, 0x82, 0x52, 0x1a,
- 0x60, 0x90, 0x58, 0x0a,
- 0x04, 0x16, 0x83, 0xc1,
- 0xa1, 0x6b, 0x40, 0x00,
- 0x44, 0xc2, 0x0d, 0xb4,
- 0x12, 0x24, 0x91, 0x88,
- 0x42, 0x3a, 0xa3, 0x2b,
- 0x8f, 0xa4, 0xe6, 0x86,
- 0x08, 0x24, 0x11, 0x84,
- 0x19, 0xc4, 0x9b, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x10, 0x90, 0x4e, 0x72,
- 0xe0, 0x88, 0x08, 0x14,
- 0x0a, 0x70, 0x14, 0x7e,
- 0x2c, 0x5e, 0xe4, 0x10,
- 0x17, 0x64, 0x90, 0x71,
- 0xf0, 0x90, 0x4a, 0x72,
- 0x14, 0x90, 0x28, 0x5e,
- 0x0a, 0x94, 0xe4, 0x0c,
- 0x12, 0xa4, 0x60, 0x88,
- 0x7d, 0x97, 0xe1, 0x7c,
- 0xf0, 0x94, 0x56, 0x72,
- 0xf9, 0x71, 0x12, 0xa3,
- 0x70, 0x84, 0x52, 0xb2,
- 0x20, 0x9e, 0x8e, 0xaf,
- 0x10, 0x34, 0x94, 0xb3,
- 0x12, 0x04, 0x60, 0x88,
- 0x54, 0xb2, 0xe0, 0x88,
- 0x50, 0xb2, 0x70, 0xa0,
- 0x18, 0xae, 0xf0, 0xa4,
- 0x30, 0x3e, 0x90, 0x33,
- 0xe0, 0xe0, 0x44, 0x0a,
- 0x02, 0x06, 0x13, 0x34,
- 0x95, 0x24, 0xc0, 0x00,
- 0xc0, 0x00, 0x46, 0x15,
- 0x86, 0x01, 0x82, 0x95,
- 0xe1, 0x7c, 0x18, 0x04,
- 0x98, 0x03, 0xfd, 0xc7,
- 0x80, 0x83, 0x8e, 0x0f,
- 0x8a, 0x83, 0x10, 0x43,
- 0x90, 0x13, 0x0c, 0x4e,
- 0x0c, 0x0c, 0x88, 0x1e,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x88, 0xab, 0x02, 0x7b,
- 0x61, 0x7c, 0x10, 0x74,
- 0x10, 0x03, 0x86, 0x6b,
- 0x52, 0x72, 0x84, 0xbb,
- 0x50, 0x9f, 0xf2, 0xa0,
- 0x10, 0x0b, 0xc0, 0x8f,
- 0x6c, 0x78, 0x92, 0x1b,
- 0xa1, 0x1b, 0xef, 0xc8,
- 0xd6, 0x80, 0x00, 0x14,
- 0x9c, 0x04, 0x40, 0x00,
- 0x96, 0x80, 0x00, 0x04,
- 0x84, 0x80, 0x00, 0x00,
- 0x60, 0x80, 0x01, 0x0a,
- 0xec, 0x84, 0x02, 0x00,
- 0x82, 0x55, 0xa8, 0x1e,
- 0x41, 0xfe, 0x7f, 0x77,
- 0xdf, 0xff, 0x7f, 0xfd,
- 0x81, 0x01, 0x00, 0x73,
- 0xa8, 0x0e, 0x98, 0x7e,
- 0x56, 0x1b, 0x85, 0x15,
- 0x82, 0x03, 0x90, 0x2b,
- 0x6c, 0x80, 0x02, 0x00,
- 0xe4, 0x7c, 0x01, 0x0a,
- 0x7b, 0x84, 0x40, 0x02,
- 0xc0, 0x00, 0x04, 0x06,
- 0x6c, 0x7c, 0x02, 0x02,
- 0x9c, 0x00, 0x50, 0x90,
- 0x6f, 0x84, 0x04, 0x24,
- 0xec, 0x00, 0x06, 0x14,
- 0x44, 0x32, 0x22, 0x03,
- 0x23, 0x8f, 0xf8, 0x88,
- 0xec, 0x04, 0x00, 0x02,
- 0xa1, 0x7d, 0x24, 0x8f,
- 0xe8, 0x80, 0x00, 0x84,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0c, 0x4c, 0x98, 0x0e,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x7b, 0x0a, 0x6b,
- 0x61, 0x7c, 0x02, 0x64,
- 0xe1, 0x7c, 0x06, 0x74,
- 0x81, 0xa1, 0x02, 0x43,
- 0x58, 0x62, 0x11, 0xb4,
- 0x06, 0x03, 0xf2, 0x84,
- 0xf9, 0x04, 0x50, 0xc2,
- 0x72, 0x8c, 0x4a, 0x72,
- 0x58, 0x42, 0xc6, 0x0f,
- 0xc6, 0x5f, 0x79, 0x04,
- 0xe5, 0xb2, 0x42, 0x0a,
- 0xe5, 0x32, 0x46, 0x5a,
- 0xe5, 0xb2, 0x48, 0x5a,
- 0x42, 0x8a, 0x02, 0x33,
- 0x48, 0x42, 0xe5, 0x02,
- 0x52, 0x8a, 0x72, 0xa8,
- 0x06, 0x13, 0xe5, 0x82,
- 0xe5, 0x22, 0x46, 0x5a,
- 0x72, 0xa4, 0x48, 0x42,
- 0xe5, 0xa2, 0x4a, 0x5a,
- 0x70, 0x8c, 0x50, 0x42,
- 0xe5, 0x32, 0x40, 0x0a,
- 0xf2, 0xa8, 0x48, 0x52,
- 0xf9, 0x90, 0x46, 0x82,
- 0x8e, 0x85, 0xa1, 0x3b,
- 0x06, 0x44, 0x0f, 0x2e,
- 0x4a, 0x82, 0xe1, 0x7c,
- 0x58, 0x42, 0xf0, 0x8c,
- 0x07, 0xcb, 0xf2, 0x8c,
- 0x06, 0xc4, 0xc6, 0xcf,
- 0x90, 0xcb, 0x56, 0x80,
- 0x99, 0x0c, 0x4a, 0x52,
- 0x96, 0x80, 0x06, 0x54,
- 0x84, 0x80, 0x06, 0x30,
- 0xec, 0x04, 0x0a, 0x30,
- 0xe4, 0x7c, 0x0b, 0x0a,
- 0x1c, 0x00, 0x58, 0x40,
- 0xec, 0x84, 0x08, 0x30,
- 0x7b, 0x90, 0x4a, 0x52,
- 0xc0, 0x00, 0x10, 0x06,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6f, 0x90, 0x12, 0x84,
- 0xec, 0x00, 0x14, 0x44,
- 0x52, 0xa2, 0x29, 0xcf,
- 0x28, 0x53, 0xf8, 0xa4,
- 0x12, 0x16, 0xb2, 0xcf,
- 0x0a, 0x52, 0x60, 0x04,
- 0x26, 0x93, 0xec, 0x04,
- 0xe8, 0x94, 0x14, 0xc4,
- 0x92, 0x2b, 0x29, 0x8f,
- 0xef, 0xc8, 0x62, 0x48,
- 0xb4, 0x1f, 0x0f, 0x24,
- 0x81, 0xa1, 0x30, 0x0f,
- 0x01, 0xe5, 0x84, 0xb3,
- 0xa1, 0x1d, 0xb2, 0xb3,
- 0x56, 0xb2, 0x02, 0x65,
- 0x04, 0xb3, 0x90, 0x88,
- 0xe0, 0xfc, 0x06, 0x14,
- 0xc3, 0x17, 0x43, 0x07,
- 0x16, 0xb0, 0x26, 0x0f,
- 0x21, 0xbd, 0xec, 0x04,
- 0xe0, 0x00, 0x04, 0xb2,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x41, 0xfe, 0x5f, 0xff,
- 0x04, 0x8a, 0xdf, 0xfc,
- 0xff, 0x81, 0x60, 0xfc,
- 0x60, 0x38, 0x80, 0xf5,
- 0x04, 0x20, 0x6f, 0xc8,
- 0x45, 0xe6, 0xec, 0xf8,
- 0x4e, 0x6f, 0xe0, 0x00,
- 0xf1, 0x80, 0x48, 0xa2,
- 0x90, 0x6d, 0x13, 0x54,
- 0x40, 0x40, 0x15, 0x44,
- 0x46, 0xa2, 0x9c, 0x00,
- 0x42, 0x30, 0xf3, 0x84,
- 0x96, 0x1e, 0x9c, 0x00,
- 0x90, 0x2e, 0x94, 0x0e,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x11, 0x58, 0x04,
- 0x6b, 0xc8, 0x04, 0xf6,
- 0x58, 0x18, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xc8,
- 0xc2, 0x17, 0x61, 0xfc,
- 0x7c, 0x7c, 0x00, 0x04,
- 0x84, 0x03, 0xa2, 0x2f,
- 0x7c, 0x7c, 0x02, 0x04,
- 0x00, 0x13, 0xff, 0x07,
- 0x70, 0x01, 0x00, 0x0e,
- 0x41, 0x1d, 0xcf, 0xff,
- 0xe1, 0xc0, 0x00, 0x14,
- 0x00, 0x00, 0x58, 0x1e,
- 0x80, 0x3f, 0x0f, 0xfd,
- 0x45, 0xf6, 0x5c, 0x14,
- 0x40, 0x22, 0xc3, 0xfc,
- 0x00, 0x9a, 0xd1, 0x80,
- 0xc0, 0x3f, 0x63, 0x4d,
- 0x20, 0x01, 0x00, 0xf8,
- 0xdd, 0x17, 0x40, 0x00,
- 0x6d, 0x8d, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x3e,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x14, 0x43, 0x06,
- 0x00, 0x9a, 0x8f, 0xa5,
- 0xc0, 0x3f, 0x61, 0xc9,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x3c, 0x6f, 0x2d,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x86, 0x66, 0x86,
- 0x8d, 0x95, 0xe0, 0x30,
- 0x61, 0xbd, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x3e,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x75, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x38,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe0, 0x80, 0x03, 0x86,
- 0x00, 0x9a, 0x8b, 0x85,
- 0xc0, 0x3c, 0x60, 0x71,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x30, 0x6d, 0xf5,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x03, 0x86, 0x66, 0x86,
- 0x89, 0x75, 0xe1, 0x28,
- 0x61, 0xc9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x37,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6f, 0x29, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x24,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe2, 0x54, 0x03, 0x06,
- 0x00, 0x9a, 0x87, 0x65,
- 0xc0, 0x2f, 0x61, 0x49,
- 0x20, 0x01, 0x00, 0xe8,
- 0x00, 0x00, 0xc0, 0x00,
- 0xc0, 0x16, 0x6f, 0xc9,
- 0x66, 0x82, 0x40, 0x1a,
- 0x40, 0x0a, 0x87, 0x11,
- 0x02, 0x06, 0x66, 0x86,
- 0x85, 0x55, 0xe4, 0x10,
- 0x63, 0xf9, 0x00, 0x9a,
- 0x00, 0xe8, 0xc0, 0x22,
- 0xc0, 0x00, 0x20, 0x01,
- 0x6d, 0x59, 0x00, 0x00,
- 0x40, 0x1a, 0xc0, 0x0a,
- 0x87, 0x11, 0x66, 0x82,
- 0x66, 0x86, 0x40, 0x0a,
- 0xe6, 0x28, 0x42, 0x06,
- 0x07, 0x21, 0x83, 0x45,
- 0x62, 0xd9, 0x00, 0x9a,
- 0x42, 0x1a, 0xc0, 0x12,
- 0x40, 0x0a, 0xe6, 0x8a,
- 0x40, 0x00, 0x26, 0x87,
- 0x29, 0x59, 0x43, 0x06,
- 0x00, 0x00, 0xc0, 0x00,
- 0x80, 0x02, 0x2d, 0xb9,
- 0x26, 0x86, 0x40, 0x0a,
- 0xa8, 0x24, 0x02, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0xd1, 0x80, 0x00, 0x04,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0xe0, 0x30, 0x02, 0x29,
- 0xe0, 0x90, 0x44, 0x0a,
- 0xc0, 0x00, 0x00, 0x06,
- 0xc0, 0x00, 0x42, 0x05,
- 0x84, 0x24, 0x80, 0xf5,
- 0x04, 0x16, 0xa1, 0x2b,
- 0x40, 0x22, 0x80, 0x00,
- 0x44, 0x2a, 0x91, 0x80,
- 0xe4, 0x50, 0x0c, 0x10,
- 0x81, 0x71, 0x23, 0x0b,
- 0xc4, 0x27, 0x81, 0x11,
- 0x90, 0x88, 0x4c, 0x62,
- 0x6f, 0xc8, 0x6c, 0x08,
- 0x98, 0x7e, 0x8c, 0x0b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0x6c, 0x61, 0x1e, 0xf0,
- 0x13, 0x3e, 0xc0, 0x01,
- 0x0e, 0x09, 0x80, 0x7b,
- 0x81, 0x21, 0x60, 0x4c,
- 0x60, 0xbc, 0x5e, 0x25,
- 0x5e, 0x25, 0x88, 0x6b,
- 0x81, 0xa1, 0x60, 0xb4,
- 0x0a, 0xf0, 0x1d, 0x0e,
- 0xc0, 0x01, 0x64, 0x51,
- 0x5e, 0x25, 0xdc, 0x34,
- 0x5e, 0x25, 0xe0, 0xac,
- 0x5e, 0x25, 0xe0, 0x9c,
- 0xa1, 0x3b, 0x60, 0x8c,
- 0x06, 0x34, 0x3f, 0x2e,
- 0x5e, 0x25, 0xc1, 0x54,
- 0x5e, 0x25, 0xe1, 0x04,
- 0x5e, 0x25, 0xe1, 0x00,
- 0x5e, 0x25, 0xe0, 0xfc,
- 0x5e, 0x25, 0xe0, 0xf8,
- 0x5e, 0x25, 0xe0, 0xf4,
- 0x5e, 0x25, 0xe0, 0xf0,
- 0x5e, 0x25, 0xe0, 0xec,
- 0x5e, 0x25, 0xe0, 0xe8,
- 0x5e, 0x25, 0xe0, 0xe4,
- 0x5e, 0x25, 0xe0, 0xe0,
- 0x5e, 0x25, 0xe0, 0xdc,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x5e, 0x25, 0xe0, 0xd4,
- 0x5e, 0x25, 0xe0, 0xd0,
- 0x5e, 0x25, 0xe0, 0xcc,
- 0x5e, 0x25, 0xe0, 0xc8,
- 0x5e, 0x25, 0xe0, 0xc4,
- 0x5e, 0x25, 0xe0, 0xc0,
- 0x5e, 0x25, 0xe0, 0xb8,
- 0x5e, 0x25, 0xe0, 0xb0,
- 0x5e, 0x25, 0xe0, 0xa8,
- 0x5e, 0x25, 0xe0, 0xa4,
- 0x5e, 0x25, 0xe0, 0x98,
- 0x5e, 0x25, 0xe0, 0x94,
- 0x5e, 0x25, 0xe0, 0x88,
- 0xbd, 0x2e, 0xe0, 0x84,
- 0x44, 0x3a, 0xbb, 0x2e,
- 0x87, 0x31, 0x46, 0x8e,
- 0x80, 0x0c, 0x0e, 0x25,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x04, 0x24, 0x97, 0x1e,
- 0xa3, 0x2d, 0x81, 0x38,
- 0xc4, 0x00, 0x04, 0x06,
- 0x81, 0x21, 0x19, 0x2e,
- 0x93, 0x14, 0x98, 0x2e,
- 0x60, 0x20, 0x42, 0x31,
- 0x04, 0x2e, 0x81, 0x31,
- 0xe7, 0xc0, 0x02, 0xf0,
- 0x04, 0xf0, 0x0d, 0x1e,
- 0x0b, 0x2e, 0xe7, 0xd0,
- 0xe7, 0xe0, 0x02, 0xf0,
- 0x04, 0xf0, 0x09, 0x1e,
- 0x7e, 0x2e, 0xe7, 0xf0,
- 0x64, 0x01, 0x02, 0xf0,
- 0x7c, 0x1e, 0xc0, 0x01,
- 0x64, 0x11, 0x04, 0xf0,
- 0x3e, 0x2e, 0xc0, 0x01,
- 0x64, 0x31, 0x02, 0xf0,
- 0x3c, 0x1e, 0xc0, 0x01,
- 0x91, 0x0e, 0x83, 0x21,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x55, 0x88,
- 0xe1, 0x14, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc0, 0x00, 0x3c, 0x58,
- 0xe1, 0x0c, 0x1e, 0x05,
- 0xa1, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x00, 0xb6,
- 0x80, 0x00, 0x4c, 0x05,
- 0x80, 0x00, 0x3b, 0xb8,
- 0x67, 0x60, 0x00, 0xf0,
- 0x64, 0x40, 0x0a, 0xf0,
- 0x0d, 0x0e, 0xc0, 0x01,
- 0xe7, 0x70, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe7, 0x80,
- 0xe7, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe7, 0xa0,
- 0xe7, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0xc0, 0x01, 0x64, 0x21,
- 0x81, 0x21, 0x3c, 0x0e,
- 0x81, 0x31, 0x11, 0x04,
- 0x97, 0x44, 0x9d, 0x14,
- 0xef, 0xfc, 0x52, 0x48,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xab, 0x0b, 0x80, 0x04,
- 0xe0, 0x08, 0x00, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0xc1, 0x14, 0x1e, 0x05,
- 0xc0, 0x00, 0x00, 0x05,
- 0xc0, 0x00, 0x34, 0x28,
- 0x61, 0x08, 0x1e, 0x05,
- 0xe5, 0x80, 0x08, 0xf0,
- 0x61, 0x0c, 0x1e, 0x15,
- 0xe5, 0x70, 0x0a, 0xf0,
- 0x80, 0x04, 0x81, 0x31,
- 0x81, 0x11, 0x04, 0x24,
- 0xef, 0xfc, 0x4a, 0x68,
- 0x06, 0xf0, 0x33, 0x14,
- 0xb1, 0x04, 0xe5, 0x30,
- 0x7c, 0x3e, 0xaf, 0x24,
- 0xe5, 0x40, 0x06, 0xf0,
- 0x80, 0x4b, 0x3e, 0x3e,
- 0x82, 0x5b, 0x3c, 0x2e,
- 0xef, 0xfc, 0x5a, 0x28,
- 0x81, 0x61, 0x1b, 0x7e,
- 0x2f, 0xb8, 0x91, 0x54,
- 0x0e, 0x09, 0xe0, 0x00,
- 0x81, 0x11, 0x60, 0x40,
- 0xe0, 0x9c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x15,
- 0x40, 0x00, 0x3d, 0x1e,
- 0x1e, 0x05, 0xf3, 0xf8,
- 0xad, 0x0b, 0x60, 0xf4,
- 0xe0, 0x98, 0x5e, 0x15,
- 0xe0, 0x94, 0x5e, 0x15,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x84, 0x5e, 0x15,
- 0xbb, 0x1e, 0xbf, 0x1e,
- 0x88, 0xf5, 0x95, 0x6e,
- 0x60, 0xf0, 0x1e, 0x35,
- 0xe7, 0x10, 0x0c, 0xf0,
- 0x18, 0xf0, 0x00, 0x44,
- 0xab, 0x14, 0xe6, 0xc0,
- 0x7c, 0x6e, 0x8c, 0x30,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0xa9, 0x04, 0xbe, 0xce,
- 0xbc, 0x3e, 0xa7, 0x24,
- 0xef, 0xfc, 0x57, 0x28,
- 0x60, 0xb4, 0x1e, 0x15,
- 0xe7, 0x00, 0x06, 0xf0,
- 0x60, 0xb0, 0x1e, 0x05,
- 0x1e, 0x25, 0x8c, 0x4b,
- 0x51, 0xb8, 0xe0, 0xc4,
- 0x1e, 0x25, 0xef, 0xfc,
- 0x1e, 0x35, 0xe0, 0xdc,
- 0x1e, 0x05, 0xe0, 0xd8,
- 0x1e, 0x15, 0xe0, 0xc0,
- 0x81, 0x95, 0xe0, 0xc4,
- 0xe0, 0xf0, 0x1e, 0x15,
- 0xe0, 0xdc, 0x1e, 0x25,
- 0xe0, 0xd8, 0x1e, 0x35,
- 0x84, 0x10, 0x80, 0x04,
- 0x08, 0xf0, 0x08, 0x24,
- 0x0c, 0x30, 0xe5, 0xc0,
- 0xe5, 0xb0, 0x0a, 0xf0,
- 0xef, 0xf8, 0x73, 0x48,
- 0x81, 0x91, 0x01, 0x81,
- 0x0e, 0x09, 0xa9, 0xd5,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0x75,
- 0x0c, 0xf0, 0x60, 0xf8,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x60, 0xfc,
- 0xab, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x29, 0x04,
- 0xa7, 0x24, 0xe1, 0x7c,
- 0x52, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x4d, 0x88,
- 0xe0, 0xe4, 0x1e, 0x25,
- 0xe0, 0xe0, 0x1e, 0x35,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0x1e, 0x05, 0x81, 0xd5,
- 0x1e, 0x15, 0xe0, 0xfc,
- 0x1e, 0x25, 0xe0, 0xf8,
- 0x1e, 0x35, 0xe0, 0xe4,
- 0x00, 0x05, 0xe0, 0xe0,
- 0x02, 0x11, 0xfc, 0x20,
- 0x04, 0x25, 0xfc, 0x24,
- 0x08, 0xf0, 0x7c, 0x20,
- 0x06, 0x31, 0xe7, 0x50,
- 0x0a, 0xf0, 0x7c, 0x24,
- 0x6e, 0xb8, 0xe7, 0x40,
- 0x1e, 0x25, 0xef, 0xf8,
- 0xa3, 0x2d, 0xe0, 0xd4,
- 0xdc, 0x04, 0x80, 0x95,
- 0x82, 0xc5, 0xa1, 0x0b,
- 0x60, 0xd0, 0x1e, 0x15,
- 0x08, 0xf0, 0x84, 0x0b,
- 0x0a, 0xf0, 0x67, 0x50,
- 0x19, 0x24, 0xe7, 0x40,
- 0x6d, 0x98, 0x9d, 0x31,
- 0x1e, 0x25, 0xef, 0xf8,
- 0x1e, 0x35, 0xe0, 0xd4,
- 0x08, 0xf0, 0x60, 0xd0,
- 0x0a, 0xf0, 0xe6, 0xa0,
- 0x83, 0x01, 0x66, 0x90,
- 0x6f, 0xf8, 0x7d, 0xe8,
- 0x0e, 0x09, 0x81, 0x11,
- 0x40, 0x00, 0xe0, 0x40,
- 0xad, 0x0b, 0xf3, 0xf8,
- 0x1e, 0x35, 0x8a, 0xf5,
- 0x0c, 0xf0, 0x61, 0x00,
- 0x1e, 0x05, 0xe7, 0x10,
- 0x18, 0xf0, 0x61, 0x04,
- 0xb3, 0x14, 0xe6, 0xc0,
- 0xfc, 0x24, 0x06, 0x31,
- 0xfc, 0x20, 0x00, 0x45,
- 0xbe, 0xce, 0xfc, 0x6e,
- 0x0a, 0x44, 0x31, 0x04,
- 0xaf, 0x24, 0xe1, 0x7c,
- 0x4c, 0xb8, 0xbc, 0x3e,
- 0x1e, 0x15, 0xef, 0xfc,
- 0x06, 0xf0, 0x60, 0xb4,
- 0x1e, 0x05, 0xe7, 0x00,
- 0x8c, 0x4b, 0x60, 0xb0,
- 0xe0, 0xc4, 0x1e, 0x25,
- 0xef, 0xfc, 0x47, 0x48,
- 0xe0, 0xec, 0x1e, 0x15,
- 0xe0, 0xe8, 0x1e, 0x25,
- 0xe0, 0xc0, 0x1e, 0x05,
- 0xfc, 0x20, 0x02, 0x45,
- 0xe0, 0xc4, 0x1e, 0x15,
- 0xfc, 0x24, 0x04, 0x31,
- 0x1e, 0x05, 0x83, 0x15,
- 0x1e, 0x35, 0xe1, 0x04,
- 0x1e, 0x15, 0xe0, 0xe8,
- 0x1e, 0x25, 0xe0, 0xec,
- 0x00, 0x05, 0xe1, 0x00,
- 0x02, 0x45, 0xfc, 0x20,
- 0x04, 0x11, 0xfc, 0x20,
- 0x06, 0x31, 0xfc, 0x24,
- 0x28, 0x2b, 0xfc, 0x24,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x6f, 0xf8, 0x68, 0x48,
- 0xe7, 0x20, 0x0a, 0xf0,
- 0xa5, 0x8e, 0xa3, 0x9e,
- 0xa1, 0x0b, 0xdc, 0x04,
- 0x17, 0x14, 0x84, 0x25,
- 0x53, 0x38, 0x8e, 0x0b,
- 0x1e, 0x05, 0xef, 0xfc,
- 0x80, 0x2b, 0x60, 0xcc,
- 0x60, 0xc8, 0x1e, 0x15,
- 0xe7, 0x30, 0x08, 0xf0,
- 0x67, 0x20, 0x0a, 0xf0,
- 0x66, 0xd8, 0x9d, 0x31,
- 0x1e, 0x65, 0xef, 0xf8,
- 0x12, 0xf0, 0x60, 0xcc,
- 0x1e, 0x35, 0xe7, 0x40,
- 0x0e, 0xf0, 0x60, 0xc8,
- 0xfc, 0x9e, 0xe6, 0xe0,
- 0x0a, 0x64, 0x3e, 0x7e,
- 0x1e, 0x15, 0xe1, 0x7c,
- 0x8c, 0x4b, 0x60, 0xac,
- 0xe0, 0xa8, 0x1e, 0x05,
- 0xe0, 0xa4, 0x1e, 0x25,
- 0xbc, 0x3e, 0x9f, 0x3e,
- 0x46, 0xf8, 0xa1, 0x5e,
- 0x1e, 0xb5, 0xef, 0xfc,
- 0x1e, 0x85, 0xe0, 0xbc,
- 0x1e, 0xa5, 0xe0, 0xb8,
- 0x96, 0x1b, 0xe0, 0xd0,
- 0x6d, 0x38, 0x90, 0x0b,
- 0x94, 0x2b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x67, 0x05, 0x00, 0xea,
- 0x42, 0x0a, 0xc9, 0x27,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0xa5, 0xed, 0x80,
- 0x72, 0x7d, 0x10, 0x06,
- 0x81, 0x01, 0x40, 0x02,
- 0x60, 0xb8, 0x5e, 0x85,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x81, 0xb1, 0x60, 0xbc,
- 0xe0, 0xd0, 0x5e, 0x05,
- 0x60, 0x9c, 0x1e, 0x15,
- 0xe6, 0x50, 0x06, 0xf0,
- 0x06, 0xf0, 0x7c, 0x3e,
- 0x3e, 0x3e, 0xe6, 0x60,
- 0x1e, 0x05, 0x90, 0x4b,
- 0x96, 0x5b, 0x60, 0x98,
- 0xe0, 0x94, 0x1e, 0x25,
- 0x66, 0xb8, 0xbc, 0xae,
- 0x1f, 0x34, 0xef, 0xf8,
- 0xfc, 0x9e, 0x8c, 0x4b,
- 0x1e, 0x15, 0xbe, 0x7e,
- 0x1e, 0x05, 0xe0, 0xbc,
- 0x1e, 0x25, 0xe0, 0xb8,
- 0xbc, 0x3e, 0xe0, 0xd0,
- 0x42, 0xb8, 0xa1, 0x54,
- 0x1e, 0x35, 0xef, 0xfc,
- 0x18, 0xf0, 0x60, 0xd0,
- 0x7c, 0xce, 0xe6, 0x10,
- 0xe6, 0x20, 0x18, 0xf0,
- 0x1e, 0x15, 0xbe, 0xce,
- 0x1e, 0x05, 0xe0, 0x8c,
- 0x1e, 0x25, 0xe0, 0x88,
- 0x1e, 0x55, 0xe0, 0x84,
- 0x1e, 0x45, 0xe0, 0xbc,
- 0xbc, 0x3e, 0xe0, 0xb8,
- 0xef, 0xf8, 0x64, 0x88,
- 0x60, 0xa4, 0x1e, 0x35,
- 0xe5, 0xd0, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe5, 0xe0,
- 0xbd, 0x04, 0xbf, 0x14,
- 0x1e, 0x55, 0xbb, 0x24,
- 0x1e, 0x45, 0xe0, 0xac,
- 0xbc, 0x3e, 0xe0, 0xa8,
- 0xef, 0xf8, 0x63, 0x68,
- 0xa5, 0x84, 0xa3, 0x94,
- 0x82, 0x91, 0x9b, 0x74,
- 0x9d, 0x04, 0x88, 0x81,
- 0x2b, 0x28, 0x93, 0x0b,
- 0x39, 0x44, 0xdf, 0xfc,
- 0xe5, 0xd0, 0x0c, 0xf0,
- 0x0e, 0xf0, 0x37, 0x34,
- 0xfc, 0x6e, 0xe5, 0xe0,
- 0x0a, 0x44, 0x3e, 0x7e,
- 0xbf, 0x14, 0xe1, 0x7c,
- 0xbb, 0x24, 0xbd, 0x04,
- 0x7e, 0xb8, 0xbc, 0x3e,
- 0x7c, 0x6e, 0xef, 0xf8,
- 0x3e, 0x7e, 0x81, 0x31,
- 0x3f, 0x14, 0x83, 0x41,
- 0xbd, 0x04, 0x81, 0x51,
- 0xbc, 0x3e, 0xbb, 0x24,
- 0xef, 0xf8, 0x61, 0x28,
- 0x81, 0x51, 0x39, 0x04,
- 0xbb, 0x94, 0xb7, 0x14,
- 0x3d, 0x44, 0xbf, 0x34,
- 0xe9, 0x84, 0x04, 0x04,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x37, 0x6e, 0xbe, 0x61,
- 0xf1, 0x84, 0x42, 0x62,
- 0x6c, 0x80, 0x04, 0x10,
- 0xe4, 0x7c, 0x03, 0x0a,
- 0x7b, 0x88, 0x50, 0x12,
- 0x9c, 0x00, 0x4a, 0x00,
- 0x6c, 0x7c, 0x0e, 0x82,
- 0x81, 0x7c, 0x00, 0x04,
- 0x6f, 0x9c, 0x02, 0x54,
- 0xec, 0x00, 0x04, 0x74,
- 0x54, 0x22, 0x0c, 0x9d,
- 0x16, 0x04, 0xf8, 0x84,
- 0xae, 0x83, 0x68, 0x9c,
- 0x82, 0xa5, 0xa5, 0x5e,
- 0x71, 0x98, 0x44, 0x92,
- 0x62, 0x38, 0x88, 0x0b,
- 0x86, 0x1b, 0x6f, 0xc4,
- 0x82, 0x3b, 0x00, 0x4b,
- 0x8c, 0x9b, 0x3d, 0x4e,
- 0xbb, 0x6e, 0xbf, 0x3e,
- 0xb4, 0xbf, 0x37, 0x9d,
- 0x14, 0x82, 0x02, 0xf5,
- 0x04, 0x90, 0xec, 0x04,
- 0x88, 0x0b, 0x6c, 0x28,
- 0x6f, 0xc4, 0x61, 0x28,
- 0x00, 0x4b, 0x86, 0x1b,
- 0x3d, 0x4e, 0x95, 0x91,
- 0xbf, 0x3e, 0x82, 0x3b,
- 0x25, 0x24, 0xbb, 0x9e,
- 0xf9, 0x8c, 0x40, 0x42,
- 0x02, 0xb4, 0x21, 0x0b,
- 0x02, 0x35, 0xe8, 0xa8,
- 0xe8, 0x9c, 0x00, 0x24,
- 0x83, 0x41, 0x01, 0x21,
- 0x83, 0x21, 0x3f, 0x2e,
- 0x81, 0x31, 0x3d, 0x2e,
- 0x6f, 0xc4, 0x45, 0xa8,
- 0x3f, 0x1e, 0x88, 0x2b,
- 0x1e, 0x15, 0xb2, 0x63,
- 0x0e, 0xf0, 0x60, 0x9c,
- 0x1e, 0x35, 0xe6, 0x60,
- 0x1e, 0x25, 0xe0, 0x98,
- 0x3b, 0x6e, 0xe0, 0x94,
- 0xe6, 0x50, 0x0c, 0xf0,
- 0x86, 0x0b, 0x3d, 0x0e,
- 0x86, 0x4b, 0x7c, 0x6e,
- 0x82, 0x5b, 0x3e, 0x7e,
- 0x77, 0x58, 0xbc, 0x2e,
- 0xbb, 0x34, 0xef, 0xf8,
- 0xbe, 0x7e, 0xfc, 0x6e,
- 0xe0, 0x9c, 0x1e, 0x15,
- 0xe0, 0x98, 0x1e, 0x05,
- 0xe0, 0x94, 0x1e, 0x25,
- 0xbd, 0x44, 0xbf, 0x54,
- 0x76, 0x78, 0xbc, 0x3e,
- 0x1e, 0x35, 0xef, 0xf8,
- 0x81, 0x71, 0x60, 0x98,
- 0xe0, 0x9c, 0x1e, 0x55,
- 0xe0, 0x8c, 0x1e, 0x15,
- 0x60, 0x94, 0x1e, 0x35,
- 0xf1, 0x8c, 0x48, 0x72,
- 0x73, 0x94, 0x4a, 0x72,
- 0xe6, 0x10, 0x18, 0xf0,
- 0x18, 0xf0, 0x7c, 0xce,
- 0xbe, 0xce, 0xe6, 0x20,
- 0xe0, 0x88, 0x1e, 0x05,
- 0xe0, 0x84, 0x1e, 0x25,
- 0x57, 0xf8, 0xbc, 0x3e,
- 0x1e, 0x65, 0xef, 0xf8,
- 0xff, 0x01, 0x60, 0x8c,
- 0xe0, 0x84, 0x1e, 0x85,
- 0x1e, 0x95, 0x80, 0x6d,
- 0x0c, 0x06, 0x40, 0x88,
- 0x5e, 0x75, 0x80, 0x00,
- 0x8c, 0x1b, 0x00, 0x8c,
- 0x00, 0x88, 0x5e, 0x75,
- 0x12, 0x06, 0x90, 0x2b,
- 0x5a, 0x78, 0x80, 0x00,
- 0x92, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x02, 0xca,
- 0xe0, 0x00, 0x02, 0x1a,
- 0x64, 0x01, 0x00, 0xea,
- 0x42, 0x0a, 0xc1, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x82, 0x25, 0xed, 0x80,
- 0x60, 0x8c, 0x5e, 0x75,
- 0x5e, 0x05, 0xff, 0x01,
- 0x81, 0xa1, 0x60, 0x88,
- 0xff, 0x01, 0x03, 0x05,
- 0xe0, 0x44, 0x10, 0x8a,
- 0x04, 0x80, 0x82, 0xf5,
- 0x92, 0x0b, 0x6c, 0x40,
- 0x6f, 0xc4, 0x58, 0x88,
- 0x81, 0xa1, 0x8c, 0x1b,
- 0xe0, 0x8c, 0x5e, 0x15,
- 0xe0, 0x88, 0x5e, 0x05,
- 0x91, 0x54, 0x9b, 0x74,
- 0x21, 0x01, 0x85, 0x55,
- 0x30, 0x03, 0xe1, 0x11,
- 0x44, 0x02, 0xb0, 0x13,
- 0x01, 0x0a, 0x7b, 0x84,
- 0x12, 0x1b, 0xe4, 0x7c,
- 0xec, 0x7c, 0x00, 0x22,
- 0x40, 0x00, 0x02, 0x06,
- 0x9c, 0x00, 0x52, 0x60,
- 0x6f, 0x80, 0x06, 0x14,
- 0xec, 0x00, 0x08, 0x04,
- 0xa1, 0x9f, 0x20, 0x23,
- 0x46, 0x42, 0x11, 0x54,
- 0x26, 0x9f, 0xf8, 0x8c,
- 0xec, 0x04, 0x04, 0x22,
- 0x00, 0x14, 0x1b, 0x74,
- 0x25, 0x9f, 0xe8, 0x80,
- 0x5e, 0x05, 0x81, 0xa1,
- 0x5e, 0x95, 0xe0, 0x88,
- 0x95, 0x64, 0xe0, 0x8c,
- 0x1e, 0x25, 0x93, 0x34,
- 0x1e, 0x45, 0xe1, 0x04,
- 0x02, 0x64, 0x60, 0xf8,
- 0x1e, 0x35, 0xe0, 0x88,
- 0x86, 0x13, 0x61, 0x00,
- 0x82, 0x61, 0x46, 0x0e,
- 0x1e, 0x15, 0x9d, 0xc4,
- 0x00, 0xc4, 0xe0, 0xfc,
- 0x98, 0x33, 0x60, 0x88,
- 0x80, 0x13, 0x00, 0x23,
- 0x61, 0x04, 0x5e, 0x25,
- 0x1e, 0x25, 0x98, 0x43,
- 0x5e, 0x35, 0xe0, 0xf4,
- 0x1e, 0x35, 0xe1, 0x00,
- 0x5e, 0x15, 0xe0, 0xf0,
- 0x88, 0x21, 0x60, 0xfc,
- 0xe0, 0xec, 0x1e, 0x15,
- 0x60, 0xf4, 0x5e, 0x25,
- 0x1e, 0x25, 0x82, 0x31,
- 0x5e, 0x45, 0xe0, 0xe4,
- 0x80, 0x13, 0x60, 0xf8,
- 0xe0, 0xe8, 0x1e, 0x45,
- 0x60, 0xdc, 0x1e, 0x05,
- 0x5e, 0x35, 0x80, 0x23,
- 0x1e, 0x35, 0xe0, 0xf0,
- 0x98, 0x43, 0x60, 0xe0,
- 0x60, 0xec, 0x5e, 0x15,
- 0x1e, 0x15, 0x88, 0x01,
- 0x5e, 0x25, 0xe0, 0xd8,
- 0x98, 0x33, 0x60, 0xe4,
- 0x60, 0xe8, 0x5e, 0x45,
- 0x5e, 0x35, 0xa1, 0x21,
- 0x82, 0x11, 0x60, 0xe0,
- 0xe0, 0x84, 0x5e, 0x25,
- 0xe0, 0xdc, 0x5e, 0x05,
- 0xe0, 0xd8, 0x5e, 0x15,
- 0x10, 0x68, 0x8b, 0x6b,
- 0x13, 0x04, 0xdf, 0xfc,
- 0x01, 0xb5, 0x81, 0x11,
- 0x41, 0x24, 0x98, 0x01,
- 0xec, 0x04, 0x0a, 0x50,
- 0x45, 0x4a, 0x9e, 0x34,
- 0x04, 0x0c, 0xe4, 0x0c,
- 0x84, 0x13, 0xe2, 0x00,
- 0xfc, 0xd5, 0xa1, 0x5b,
- 0xe0, 0x58, 0x0e, 0x09,
- 0x1e, 0x05, 0x93, 0x34,
- 0x81, 0x1d, 0x61, 0x14,
- 0xe2, 0x00, 0x04, 0x0c,
- 0x8e, 0xae, 0x8c, 0x2e,
- 0x46, 0x11, 0x80, 0x04,
- 0x89, 0x11, 0x60, 0x24,
- 0xa5, 0x0b, 0x93, 0x24,
- 0xc0, 0x00, 0x02, 0x66,
- 0xe0, 0x20, 0x44, 0x11,
- 0xa5, 0x0b, 0x17, 0x34,
- 0x93, 0x14, 0x86, 0x45,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xce, 0x14, 0x80, 0xe5,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x00, 0x30, 0x0e, 0x25,
- 0x0e, 0x19, 0x84, 0x30,
- 0xad, 0x1b, 0xe0, 0x40,
- 0x40, 0x0c, 0x06, 0x15,
- 0xc4, 0x30, 0x00, 0x30,
- 0xab, 0x0b, 0x8a, 0xf5,
- 0x80, 0x0c, 0x06, 0x05,
- 0x9c, 0x94, 0x00, 0x04,
- 0x80, 0x0c, 0x46, 0x05,
- 0xe1, 0x10, 0x1e, 0x05,
- 0xa5, 0x1b, 0x80, 0x14,
- 0x0e, 0x19, 0x82, 0x75,
- 0x04, 0x10, 0xe0, 0x40,
- 0xa1, 0x1b, 0x6c, 0x18,
- 0xe4, 0x08, 0x04, 0xda,
- 0xed, 0x80, 0x42, 0x0a,
- 0xce, 0x14, 0x88, 0xf5,
- 0xe0, 0x44, 0x0e, 0x29,
- 0xf0, 0xc0, 0x42, 0x10,
- 0x44, 0x10, 0x29, 0x2b,
- 0xce, 0x2e, 0xfc, 0x04,
- 0x80, 0x04, 0x80, 0xf5,
- 0x42, 0x10, 0xa5, 0x0b,
- 0x46, 0x15, 0x9c, 0x0c,
- 0xce, 0x14, 0x80, 0x0c,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x00, 0x30, 0x82, 0x05,
- 0x89, 0x21, 0x64, 0x30,
- 0x91, 0x21, 0x81, 0x25,
- 0x80, 0x1e, 0xa4, 0x1f,
- 0xe0, 0x50, 0x0e, 0x09,
- 0x42, 0x01, 0x93, 0x14,
- 0x1e, 0xf0, 0xe0, 0x28,
- 0xc0, 0x01, 0x64, 0x61,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xa3, 0x1b, 0xdd, 0x93,
- 0x93, 0x14, 0xfa, 0x35,
- 0xa3, 0x1b, 0x84, 0x14,
- 0xfd, 0x45, 0xf4, 0xa5,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0xf0, 0x1e, 0xf0,
- 0x82, 0x9b, 0x23, 0x3e,
- 0xe0, 0x98, 0x1e, 0x35,
- 0xa5, 0x0e, 0xab, 0x4e,
- 0x06, 0x19, 0xa7, 0x3e,
- 0x1e, 0xb5, 0xe0, 0x90,
- 0x00, 0x89, 0xe0, 0xa8,
- 0x80, 0x13, 0xe0, 0x48,
- 0x60, 0x70, 0x02, 0x61,
- 0xac, 0x1e, 0x81, 0x11,
- 0xe0, 0x10, 0x56, 0x15,
- 0xe0, 0x4c, 0x00, 0x19,
- 0xa9, 0x1e, 0xe6, 0x24,
- 0x60, 0x50, 0x00, 0xa9,
- 0xe0, 0x80, 0x44, 0x0a,
- 0x97, 0x5e, 0xce, 0x78,
- 0x24, 0x14, 0x82, 0xe5,
- 0xe0, 0x84, 0x44, 0x1a,
- 0x02, 0x0c, 0xa1, 0x1b,
- 0xa4, 0x1e, 0xe2, 0x00,
- 0xa0, 0x00, 0x00, 0x78,
- 0x92, 0x1b, 0x01, 0x01,
- 0xef, 0xf8, 0x74, 0xe8,
- 0x44, 0x0a, 0xe6, 0x24,
- 0x00, 0x16, 0xe0, 0x88,
- 0x42, 0x90, 0x40, 0x00,
- 0x74, 0x58, 0xdc, 0x00,
- 0x00, 0xf0, 0xcf, 0xf8,
- 0x0a, 0xf0, 0x65, 0x60,
- 0x0d, 0x0e, 0xe5, 0xd0,
- 0xe5, 0x90, 0x00, 0xf0,
- 0x00, 0xf0, 0x0b, 0x0e,
- 0x09, 0x0e, 0xe5, 0x70,
- 0xe5, 0xa0, 0x00, 0xf0,
- 0x00, 0xf0, 0x7e, 0x0e,
- 0x7c, 0x0e, 0xe5, 0x80,
- 0xe5, 0xb0, 0x00, 0xf0,
- 0x00, 0xf0, 0x3e, 0x0e,
- 0x3c, 0x0e, 0xe5, 0xc0,
- 0x29, 0x14, 0x83, 0x21,
- 0x0c, 0x3b, 0x94, 0x0b,
- 0x52, 0x78, 0x92, 0x4b,
- 0x66, 0x04, 0xef, 0xf8,
- 0xe1, 0x31, 0x81, 0x11,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0xc0, 0x74, 0x1e, 0x05,
- 0xc0, 0x00, 0x40, 0x15,
- 0x12, 0x05, 0xa7, 0x44,
- 0x08, 0x19, 0xc0, 0x0c,
- 0x86, 0x0f, 0xe0, 0x94,
- 0x25, 0x54, 0xe6, 0x0e,
- 0xfc, 0x10, 0x44, 0x10,
- 0x1f, 0xe8, 0xab, 0x2b,
- 0x15, 0x9e, 0xc0, 0x00,
- 0x1c, 0x08, 0xa1, 0x6d,
- 0xbb, 0x04, 0xc0, 0x00,
- 0xa5, 0x0b, 0x80, 0x04,
- 0x80, 0x00, 0x1f, 0x58,
- 0x60, 0xa0, 0x1e, 0x05,
- 0x14, 0x70, 0xc8, 0x77,
- 0x00, 0x25, 0xe4, 0x40,
- 0x94, 0x04, 0xe0, 0x10,
- 0xff, 0x01, 0x00, 0x23,
- 0x00, 0x24, 0x80, 0x2d,
- 0x52, 0x0a, 0xc1, 0xac,
- 0x82, 0x15, 0xc1, 0x2a,
- 0xd7, 0x07, 0xa4, 0x0b,
- 0x40, 0x0a, 0xa0, 0x0b,
- 0x12, 0x00, 0xe1, 0xaa,
- 0x0a, 0x09, 0xec, 0x04,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x44, 0x20, 0xe0, 0x94,
- 0x40, 0x07, 0x13, 0xfd,
- 0xc0, 0xc0, 0x06, 0x94,
- 0x40, 0x28, 0x1e, 0x25,
- 0xd9, 0x88, 0x46, 0x32,
- 0x40, 0x08, 0x44, 0x35,
- 0x0a, 0x19, 0xab, 0x1b,
- 0x08, 0x25, 0x80, 0x68,
- 0xab, 0x34, 0xe0, 0x18,
- 0x52, 0x92, 0x23, 0x14,
- 0x0c, 0x24, 0x90, 0x84,
- 0x84, 0x18, 0xe1, 0x20,
- 0xa7, 0x1b, 0x52, 0x18,
- 0x06, 0x29, 0x82, 0x15,
- 0x85, 0x1b, 0xe0, 0x2c,
- 0x06, 0x29, 0x84, 0x15,
- 0x81, 0x75, 0xe0, 0x28,
- 0xe0, 0x24, 0x06, 0x29,
- 0x82, 0x35, 0x85, 0x1b,
- 0xe0, 0x20, 0x06, 0x29,
- 0x82, 0x11, 0x02, 0x21,
- 0x4c, 0x2a, 0x9f, 0x1e,
- 0x81, 0x35, 0xe6, 0x9a,
- 0x9f, 0x1e, 0x83, 0x11,
- 0x88, 0x25, 0xa1, 0x6b,
- 0x02, 0x64, 0x1f, 0x24,
- 0x83, 0x2d, 0xe0, 0x84,
- 0x08, 0x15, 0x86, 0x85,
- 0x40, 0x0a, 0x60, 0x20,
- 0x9d, 0x6e, 0xe0, 0x88,
- 0xe6, 0xa2, 0x46, 0x1a,
- 0x84, 0xd5, 0x9b, 0x3e,
- 0x40, 0x3a, 0x9f, 0x24,
- 0x81, 0x31, 0x66, 0xa2,
- 0x60, 0x0a, 0x44, 0x2e,
- 0xe1, 0x7c, 0x02, 0x04,
- 0x77, 0x58, 0x93, 0x2e,
- 0x04, 0x14, 0xef, 0xc0,
- 0xa1, 0x2b, 0xe1, 0x94,
- 0x0c, 0x24, 0x8e, 0x25,
- 0x87, 0xe5, 0xf6, 0x80,
- 0xac, 0x0e, 0x89, 0x01,
- 0x1f, 0x04, 0xb1, 0x55,
- 0xe1, 0x94, 0x02, 0x34,
- 0x76, 0x80, 0x02, 0x14,
- 0xe0, 0x00, 0x44, 0x06,
- 0x8e, 0xbb, 0x1f, 0x74,
- 0x76, 0x80, 0x00, 0x04,
- 0xe5, 0xe0, 0x0a, 0xf0,
- 0x00, 0x10, 0x20, 0x23,
- 0x19, 0x2e, 0xec, 0x18,
- 0x33, 0x44, 0x80, 0x2d,
- 0x91, 0x88, 0x42, 0x02,
- 0x08, 0x84, 0x00, 0x34,
- 0x84, 0x14, 0x02, 0x10,
- 0x51, 0x80, 0x42, 0x22,
- 0xc0, 0x00, 0x04, 0x56,
- 0x00, 0x34, 0x2d, 0x34,
- 0x40, 0x0a, 0xc9, 0x04,
- 0x42, 0x22, 0x66, 0x9e,
- 0xbd, 0x1e, 0xd1, 0x84,
- 0x8c, 0x30, 0x90, 0x24,
- 0xe0, 0x9a, 0x40, 0x0a,
- 0xef, 0xf4, 0x6f, 0xc8,
- 0xad, 0x14, 0xbd, 0x04,
- 0x40, 0x7e, 0x84, 0x06,
- 0x93, 0x0e, 0xe0, 0x1e,
- 0x04, 0x04, 0x8d, 0xa5,
- 0x06, 0x14, 0x61, 0x94,
- 0xa6, 0x2f, 0xe0, 0xec,
- 0xf6, 0x80, 0x0c, 0x24,
- 0x04, 0x60, 0xc0, 0x61,
- 0x80, 0x4b, 0x6c, 0x14,
- 0x64, 0x7c, 0x05, 0x0a,
- 0x48, 0x10, 0x8e, 0xbb,
- 0x02, 0x60, 0x1c, 0x00,
- 0x1d, 0x74, 0xec, 0x94,
- 0xfb, 0x84, 0x42, 0x22,
- 0xec, 0x7c, 0x06, 0x12,
- 0x68, 0x8c, 0x0a, 0x44,
- 0x48, 0x00, 0x81, 0x41,
- 0x18, 0x34, 0x1c, 0x00,
- 0x00, 0x44, 0xec, 0x00,
- 0x44, 0x7a, 0x6f, 0x8c,
- 0x40, 0xc2, 0xe6, 0xaa,
- 0xa6, 0x13, 0x78, 0x80,
- 0x00, 0x12, 0x20, 0x5f,
- 0x02, 0x54, 0xec, 0x04,
- 0x00, 0x44, 0x68, 0x80,
- 0x44, 0x2a, 0xe8, 0x8c,
- 0x81, 0x31, 0x66, 0x9e,
- 0xef, 0xc0, 0x67, 0x28,
- 0x80, 0x2b, 0x27, 0x04,
- 0xab, 0x2e, 0xc0, 0x08,
- 0x4e, 0x62, 0xa3, 0x1e,
- 0x84, 0x0b, 0x71, 0x80,
- 0x6f, 0xc0, 0x75, 0xe8,
- 0x1d, 0x64, 0x8e, 0x2b,
- 0x00, 0x14, 0xa1, 0x1b,
- 0x00, 0x04, 0xd6, 0x80,
- 0x00, 0x00, 0x96, 0x80,
- 0xae, 0x03, 0x84, 0x80,
- 0xe0, 0x80, 0x01, 0x0a,
- 0xc0, 0x54, 0x1e, 0x05,
- 0x42, 0x16, 0x82, 0x95,
- 0x2b, 0x04, 0xe0, 0x00,
- 0xf1, 0x80, 0x44, 0x12,
- 0xa3, 0x14, 0xa1, 0x2e,
- 0xef, 0xc0, 0x74, 0x68,
- 0xa2, 0x73, 0xa1, 0x14,
- 0x0a, 0xf0, 0x33, 0x44,
- 0xad, 0x14, 0xe5, 0xe0,
- 0x90, 0x24, 0xbd, 0x7e,
- 0x8e, 0x1b, 0x04, 0x30,
- 0xef, 0xf4, 0x69, 0x68,
- 0x46, 0x06, 0x1f, 0x24,
- 0xbd, 0x04, 0xe0, 0x00,
- 0x04, 0x24, 0xad, 0x14,
- 0xa4, 0x33, 0xf6, 0x80,
- 0x99, 0x3e, 0x84, 0x06,
- 0x60, 0x9c, 0x1e, 0x05,
- 0x25, 0x54, 0x9e, 0xb1,
- 0xa7, 0x44, 0x81, 0xc1,
- 0x40, 0x6a, 0xab, 0x0e,
- 0x92, 0x6b, 0x66, 0x9a,
- 0x93, 0xb5, 0x91, 0x0e,
- 0xf0, 0x84, 0x44, 0x92,
- 0x04, 0x0c, 0xd5, 0x2d,
- 0x0a, 0x29, 0xe2, 0x00,
- 0xa4, 0x0f, 0x60, 0x64,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x44, 0x4a, 0x80, 0x85,
- 0x86, 0x65, 0xe0, 0x90,
- 0xe1, 0x7c, 0x06, 0x64,
- 0x06, 0x63, 0x96, 0x3f,
- 0x95, 0x6d, 0x94, 0x3b,
- 0x40, 0x00, 0x06, 0x06,
- 0xe0, 0x8c, 0x44, 0x0a,
- 0x40, 0x54, 0x1e, 0x35,
- 0x04, 0x64, 0xa6, 0x63,
- 0x44, 0x22, 0xe0, 0x88,
- 0x04, 0x20, 0xd0, 0x8c,
- 0xc0, 0x09, 0x04, 0x01,
- 0x90, 0x90, 0x44, 0x22,
- 0x84, 0xa0, 0x04, 0x20,
- 0x84, 0x73, 0x88, 0x24,
- 0x82, 0x11, 0x02, 0x61,
- 0xf4, 0xb5, 0x83, 0x8b,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0x0a, 0x09, 0x80, 0xc5,
- 0x40, 0x4a, 0xe0, 0x64,
- 0x98, 0xa5, 0xe0, 0x90,
- 0x00, 0x74, 0x1b, 0x14,
- 0x19, 0x34, 0xe0, 0x94,
- 0xe0, 0x88, 0x0a, 0xc4,
- 0xa2, 0x03, 0xb7, 0x44,
- 0xf0, 0x80, 0x04, 0x04,
- 0xe1, 0x94, 0x02, 0x24,
- 0xf6, 0x80, 0x02, 0x14,
- 0xec, 0x18, 0x02, 0x10,
- 0x42, 0x12, 0x82, 0x3d,
- 0x04, 0x24, 0x91, 0x8c,
- 0x02, 0x10, 0x08, 0x84,
- 0x42, 0x32, 0x84, 0x14,
- 0x06, 0x56, 0x51, 0x84,
- 0x04, 0x24, 0xc0, 0x00,
- 0x42, 0x32, 0x49, 0x04,
- 0x1f, 0x34, 0xd1, 0x84,
- 0x9d, 0x04, 0xa1, 0x0d,
- 0x44, 0x2a, 0xbd, 0x1e,
- 0xb1, 0x34, 0xe6, 0x8e,
- 0xe0, 0x82, 0x40, 0x2a,
- 0x7c, 0x14, 0x08, 0x25,
- 0x06, 0x31, 0x8a, 0x43,
- 0x21, 0x5e, 0xfc, 0x30,
- 0xd1, 0x80, 0x00, 0x04,
- 0x0a, 0xf0, 0x23, 0xce,
- 0x61, 0x78, 0xe5, 0xe0,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xb1, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0xe0, 0x64, 0x0a, 0x09,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x93, 0x04, 0x88, 0x85,
- 0xb5, 0x44, 0xa1, 0x24,
- 0xe6, 0x9e, 0x40, 0x0a,
- 0x84, 0x7b, 0x2f, 0x34,
- 0xf6, 0x80, 0x02, 0x04,
- 0xa4, 0x1d, 0x11, 0x54,
- 0x80, 0x00, 0x02, 0x06,
- 0xcc, 0x08, 0x02, 0x10,
- 0xa3, 0x0f, 0x3d, 0x1e,
- 0x7c, 0x1c, 0x08, 0x25,
- 0x40, 0x0a, 0x8e, 0x43,
- 0x0a, 0xf0, 0x60, 0x16,
- 0x06, 0x31, 0xe5, 0xe0,
- 0x5e, 0xf8, 0xfc, 0x30,
- 0xa3, 0xc4, 0xef, 0xf4,
- 0xbd, 0x14, 0xaf, 0x04,
- 0x80, 0x16, 0x98, 0x03,
- 0xa7, 0x44, 0xa5, 0x54,
- 0x90, 0x93, 0x02, 0xc1,
- 0x81, 0xcb, 0xa9, 0x04,
- 0x40, 0x00, 0x0e, 0x06,
- 0xc0, 0x00, 0x02, 0x06,
- 0x00, 0x06, 0x62, 0x55,
- 0x97, 0x14, 0xc0, 0x00,
- 0x0a, 0x49, 0xb9, 0x34,
- 0x84, 0x08, 0xe0, 0x54,
- 0x8c, 0x24, 0x86, 0x18,
- 0xe6, 0x82, 0x40, 0x1a,
- 0xe4, 0x04, 0x02, 0x20,
- 0xe6, 0x92, 0x48, 0x0a,
- 0x89, 0x1b, 0x8c, 0x1e,
- 0x3b, 0x04, 0x80, 0xd5,
- 0x80, 0x1e, 0x85, 0x11,
- 0x83, 0x65, 0x95, 0x34,
- 0xa1, 0x2d, 0x15, 0x34,
- 0xa1, 0x0b, 0x84, 0x75,
- 0x0a, 0x29, 0x84, 0x25,
- 0x04, 0x24, 0xe0, 0x40,
- 0x04, 0x0a, 0xfc, 0x00,
- 0x82, 0x55, 0xf0, 0x18,
- 0xe1, 0x82, 0x40, 0x1a,
- 0x1e, 0x05, 0xa1, 0x0b,
- 0x02, 0x56, 0x00, 0x74,
- 0x40, 0x15, 0x80, 0x00,
- 0x0a, 0x09, 0x80, 0x00,
- 0x40, 0x0a, 0xe0, 0x64,
- 0x82, 0x85, 0xe0, 0x80,
- 0x80, 0x14, 0xbb, 0x04,
- 0x06, 0x15, 0xa5, 0x1b,
- 0x42, 0x10, 0x80, 0x0c,
- 0x46, 0x15, 0x9c, 0x10,
- 0x83, 0x11, 0x00, 0x0c,
- 0x1e, 0xf0, 0x80, 0x1e,
- 0x0c, 0x0c, 0xe5, 0xf0,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x60, 0x50, 0x00, 0x19,
- 0x00, 0x29, 0x82, 0x6b,
- 0x81, 0xc1, 0x60, 0x4c,
- 0x0a, 0x10, 0x90, 0xce,
- 0x0e, 0x14, 0x64, 0x0c,
- 0x00, 0x59, 0xe0, 0x88,
- 0x52, 0x50, 0x60, 0x64,
- 0xc0, 0x01, 0x73, 0xf0,
- 0x66, 0x86, 0x50, 0x2a,
- 0x48, 0xc5, 0x92, 0x73,
- 0x12, 0x80, 0xe0, 0x10,
- 0xc4, 0x87, 0x64, 0x0c,
- 0x73, 0xf1, 0x52, 0x90,
- 0x90, 0x73, 0x41, 0xff,
- 0x60, 0x84, 0x4a, 0x0a,
- 0x10, 0x06, 0x92, 0x73,
- 0x40, 0x40, 0x00, 0x01,
- 0x4c, 0x85, 0x90, 0x71,
- 0x52, 0x92, 0x40, 0x04,
- 0x4e, 0x72, 0x90, 0xa0,
- 0x10, 0x06, 0x10, 0xa4,
- 0x4c, 0xc5, 0x80, 0x00,
- 0x12, 0x74, 0x00, 0x04,
- 0x4a, 0x0a, 0xe1, 0x88,
- 0xb2, 0x8f, 0x60, 0x80,
- 0x0e, 0x74, 0x1a, 0x8e,
- 0x10, 0x84, 0x80, 0x84,
- 0xa8, 0x71, 0x1c, 0xc4,
- 0x00, 0x04, 0x4c, 0x85,
- 0xdc, 0xc0, 0x10, 0x84,
- 0x40, 0x04, 0x4c, 0x85,
- 0x60, 0x44, 0x0e, 0x8a,
- 0x08, 0xa5, 0xc0, 0x18,
- 0x80, 0x00, 0x00, 0x66,
- 0xe0, 0x40, 0x00, 0x79,
- 0x86, 0xd5, 0xee, 0x7d,
- 0xe0, 0x0c, 0x10, 0x36,
- 0xe4, 0x9c, 0x50, 0x4a,
- 0x00, 0x89, 0x86, 0x35,
- 0xf3, 0x8d, 0xe0, 0x48,
- 0x00, 0x76, 0x04, 0xc5,
- 0x06, 0x89, 0x80, 0x00,
- 0xfc, 0x8d, 0xe0, 0x2c,
- 0x06, 0x89, 0x82, 0xb5,
- 0xfc, 0x8d, 0xe0, 0x24,
- 0x06, 0x89, 0x82, 0x35,
- 0xfc, 0x8d, 0xe0, 0x28,
- 0x06, 0x39, 0x80, 0xb5,
- 0xff, 0x3d, 0xe0, 0x20,
- 0x01, 0x35, 0x82, 0x15,
- 0x93, 0x01, 0x91, 0x01,
- 0x0c, 0x0c, 0x90, 0x0e,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x60, 0x44, 0x00, 0x09,
- 0x18, 0xce, 0xe0, 0x27,
- 0x4c, 0x25, 0xa2, 0x2f,
- 0x2b, 0x0b, 0xe0, 0x10,
- 0xfe, 0xac, 0x01, 0xf6,
- 0x81, 0x01, 0x58, 0x0e,
- 0x00, 0x00, 0x01, 0x06,
- 0x5a, 0x0e, 0xad, 0x7b,
- 0xdc, 0x94, 0x00, 0x04,
- 0x40, 0x0c, 0x4c, 0x05,
- 0xe0, 0x80, 0x4a, 0x4a,
- 0x40, 0x00, 0x00, 0x06,
- 0xdc, 0x00, 0x42, 0x60,
- 0xcf, 0xf8, 0x48, 0x88,
- 0x8c, 0x1b, 0x03, 0x01,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xf8, 0x08, 0x28,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x9b, 0x00, 0x6b,
- 0x0e, 0x60, 0x3e, 0x2e,
- 0x08, 0x8b, 0xec, 0x04,
- 0x3c, 0x9e, 0x86, 0xab,
- 0x01, 0x21, 0x81, 0x01,
- 0x01, 0x41, 0x89, 0x31,
- 0x56, 0x98, 0x8e, 0x1b,
- 0x8c, 0x5b, 0x6f, 0xcc,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x81, 0x01, 0x3e, 0xae,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x11, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x55, 0xc8,
- 0x80, 0xa5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x81, 0x01, 0x3e, 0x8e,
- 0x81, 0x21, 0x3c, 0x9e,
- 0x81, 0x41, 0x21, 0x31,
- 0x8c, 0x5b, 0x0e, 0x1b,
- 0xef, 0xcc, 0x54, 0xc8,
- 0x0c, 0x0c, 0x90, 0xf1,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x86, 0x05, 0xa1, 0x1b,
- 0x88, 0x0d, 0xff, 0x41,
- 0xc1, 0xac, 0x08, 0x04,
- 0xc1, 0x06, 0x48, 0x4a,
- 0xd1, 0x90, 0x48, 0x12,
- 0x17, 0x80, 0x08, 0x04,
- 0x73, 0xfc, 0x40, 0x00,
- 0x08, 0x44, 0xc0, 0x07,
- 0x08, 0x40, 0x81, 0x2c,
- 0x42, 0x4a, 0x84, 0x04,
- 0x88, 0x16, 0xe1, 0x86,
- 0x81, 0x01, 0x0c, 0x0e,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xe0, 0x08, 0x40, 0x96,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0xe0, 0x1e, 0xf0,
- 0x88, 0x6b, 0x00, 0xbb,
- 0x60, 0x18, 0x16, 0x89,
- 0x06, 0x7b, 0x84, 0x4b,
- 0x04, 0xf0, 0x82, 0xab,
- 0x06, 0xf0, 0x64, 0xd0,
- 0x09, 0x4e, 0xe4, 0xa0,
- 0x7d, 0x38, 0x88, 0x0b,
- 0x90, 0x1b, 0x6f, 0xfc,
- 0x64, 0xc0, 0x04, 0xf0,
- 0xe4, 0x90, 0x06, 0xf0,
- 0x90, 0x1b, 0x14, 0x0b,
- 0xef, 0xfc, 0x7c, 0xa8,
- 0x64, 0xb0, 0x04, 0xf0,
- 0xe4, 0x80, 0x06, 0xf0,
- 0x8e, 0x0b, 0x0b, 0x7e,
- 0x6f, 0xfc, 0x7c, 0x28,
- 0x1e, 0x09, 0x90, 0x1b,
- 0x98, 0xb1, 0x60, 0xd0,
- 0x60, 0xc0, 0x1e, 0x39,
- 0xe0, 0x84, 0x04, 0x84,
- 0x60, 0xb0, 0x1e, 0x59,
- 0x42, 0x07, 0x96, 0x23,
- 0xec, 0x08, 0x04, 0x20,
- 0x70, 0x80, 0x42, 0xb2,
- 0x00, 0x10, 0xc2, 0x37,
- 0x4e, 0xb2, 0x6c, 0x08,
- 0x57, 0x0d, 0xf0, 0x8c,
- 0x42, 0x57, 0x84, 0x9b,
- 0x9c, 0x00, 0x52, 0x00,
- 0x6c, 0x08, 0x00, 0x70,
- 0xf0, 0x94, 0x46, 0xb2,
- 0x84, 0x5b, 0x57, 0x0d,
- 0x1c, 0x00, 0x4a, 0x00,
- 0xec, 0x08, 0x00, 0x30,
- 0x84, 0xcb, 0x57, 0x0d,
- 0x58, 0x00, 0x15, 0x04,
- 0xfc, 0x0e, 0x9c, 0x00,
- 0x0b, 0x04, 0x89, 0x04,
- 0x13, 0x04, 0x81, 0xab,
- 0xe0, 0x00, 0x54, 0x1a,
- 0xed, 0x84, 0x40, 0x0a,
- 0x91, 0x04, 0xbe, 0x0e,
- 0x81, 0x01, 0x3c, 0x0e,
- 0x91, 0x95, 0xfe, 0x0e,
- 0x8a, 0xab, 0x0f, 0x8e,
- 0x8e, 0x5b, 0x04, 0x8a,
- 0xa4, 0x0a, 0x8d, 0x9e,
- 0x89, 0x94, 0xfc, 0x74,
- 0x40, 0x0a, 0xb0, 0x03,
- 0x0f, 0x2a, 0x66, 0x9e,
- 0xc0, 0x08, 0x64, 0x00,
- 0x52, 0x1a, 0x8b, 0x74,
- 0x0e, 0x00, 0x60, 0x1c,
- 0xc0, 0x04, 0x64, 0x00,
- 0x40, 0x0d, 0x41, 0x26,
- 0xd7, 0x77, 0x40, 0x00,
- 0x40, 0x0d, 0x5e, 0x05,
- 0x8c, 0x9b, 0x40, 0x00,
- 0x20, 0x00, 0x01, 0x88,
- 0xa0, 0x00, 0x0c, 0x06,
- 0xb0, 0x0a, 0x8c, 0x6a,
- 0xac, 0x03, 0xbc, 0x44,
- 0x66, 0x92, 0x40, 0x0a,
- 0x64, 0x00, 0x09, 0x1a,
- 0x49, 0x26, 0xc0, 0x08,
- 0xc0, 0x00, 0x20, 0x0d,
- 0x20, 0x0d, 0x5e, 0x45,
- 0x00, 0x00, 0x40, 0x00,
- 0xc0, 0x04, 0x64, 0x01,
- 0x80, 0x63, 0xd7, 0x07,
- 0x06, 0x25, 0x8e, 0x83,
- 0x80, 0x00, 0x0e, 0x06,
- 0x82, 0x4b, 0x14, 0x7a,
- 0xbe, 0x14, 0xa8, 0x0a,
- 0x40, 0x0a, 0xae, 0x03,
- 0x03, 0x1a, 0x66, 0x86,
- 0xc0, 0x08, 0x64, 0x00,
- 0x20, 0x0d, 0x43, 0x26,
- 0x5e, 0x15, 0xc0, 0x00,
- 0x40, 0x00, 0x20, 0x0d,
- 0x64, 0x01, 0x00, 0x00,
- 0x57, 0x07, 0xc0, 0x04,
- 0x80, 0x73, 0x88, 0x1b,
- 0x7b, 0x80, 0x00, 0x64,
- 0xfb, 0x80, 0x0c, 0x84,
- 0x7a, 0x80, 0x4c, 0x62,
- 0xe4, 0x08, 0x00, 0x10,
- 0x7b, 0x80, 0x02, 0x74,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x7a, 0x98, 0x42, 0x12,
- 0x59, 0x1c, 0x92, 0x6b,
- 0x42, 0x00, 0x96, 0x1b,
- 0x00, 0x50, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0x7b, 0x64, 0x08,
- 0x4e, 0x00, 0x0d, 0x44,
- 0x00, 0x30, 0xbc, 0x00,
- 0x96, 0x3b, 0x64, 0x08,
- 0x64, 0x08, 0x41, 0x1a,
- 0x46, 0x00, 0x96, 0x9b,
- 0x00, 0x40, 0x3c, 0x00,
- 0x0f, 0x84, 0xe4, 0x08,
- 0xe4, 0x08, 0x41, 0x1a,
- 0x3c, 0x00, 0x52, 0x00,
- 0xe4, 0x08, 0x00, 0xa0,
- 0x64, 0x08, 0x41, 0x1a,
- 0x4a, 0x00, 0x96, 0x5b,
- 0x00, 0xc0, 0x3c, 0x00,
- 0x41, 0x1a, 0xe4, 0x08,
- 0x96, 0xcb, 0x64, 0x08,
- 0x3c, 0x00, 0x58, 0x00,
- 0xec, 0x04, 0x10, 0x80,
- 0xe0, 0x00, 0x10, 0x1a,
- 0x3f, 0xfd, 0x37, 0x68,
- 0x7e, 0x04, 0xc3, 0xff,
- 0x0c, 0x0c, 0xf0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0x71, 0x88, 0x44, 0x12,
- 0xe1, 0xf5, 0x82, 0x33,
- 0x84, 0x01, 0xc2, 0x07,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe1, 0xcc, 0x08, 0x24,
- 0x60, 0xb8, 0x02, 0x04,
- 0x06, 0x24, 0xda, 0x07,
- 0xa0, 0x4f, 0x61, 0xc8,
- 0x79, 0x84, 0x44, 0x32,
- 0xfc, 0x7c, 0x00, 0x44,
- 0x60, 0x10, 0x02, 0x06,
- 0x75, 0x98, 0x81, 0x31,
- 0x08, 0x4c, 0xef, 0xbc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x80, 0x2b, 0x04, 0x6b,
- 0x4e, 0x96, 0x21, 0x2b,
- 0x82, 0xc5, 0xe0, 0x08,
- 0x60, 0xc8, 0x00, 0x14,
- 0xe1, 0x84, 0x06, 0x24,
- 0xdd, 0x17, 0x06, 0x03,
- 0x81, 0x31, 0x01, 0x71,
- 0x6f, 0xbc, 0x74, 0x48,
- 0xf2, 0x9c, 0x42, 0x12,
- 0x8e, 0x0b, 0x98, 0x0e,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe5, 0x06, 0x44, 0x0a,
- 0x65, 0x86, 0x40, 0x0a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc2, 0x00, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xdc, 0x07, 0xe5, 0x27,
- 0xa4, 0x0f, 0x5d, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x82, 0x2b, 0x42, 0x07,
- 0x81, 0x11, 0x04, 0x01,
- 0x7a, 0x80, 0x00, 0x04,
- 0x7b, 0x98, 0x81, 0x31,
- 0x04, 0x04, 0xef, 0xbc,
- 0xa2, 0x2f, 0xe1, 0xa0,
- 0x41, 0xfe, 0xa1, 0x2b,
- 0x00, 0x04, 0xdf, 0xfc,
- 0x08, 0x4c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x7a, 0x08,
- 0x02, 0x64, 0x84, 0x6b,
- 0x82, 0x03, 0xe1, 0x84,
- 0xe0, 0x1a, 0x40, 0x0a,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x69, 0x29, 0x43, 0x86,
- 0x44, 0x1a, 0xc0, 0x01,
- 0x40, 0x1a, 0xe5, 0x02,
- 0x81, 0x11, 0x65, 0x82,
- 0x64, 0x01, 0x04, 0x20,
- 0x40, 0x02, 0xc2, 0x00,
- 0xe5, 0x27, 0x72, 0x84,
- 0x5d, 0x93, 0xdc, 0x07,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x04, 0x34, 0x83, 0x31,
- 0xa3, 0x3f, 0x68, 0x88,
- 0x42, 0x2a, 0x82, 0x21,
- 0x80, 0x13, 0xe6, 0x8e,
- 0x00, 0x14, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x84, 0x7b, 0x06, 0x6b,
- 0xef, 0xfc, 0x77, 0x28,
- 0x84, 0x61, 0xc2, 0x67,
- 0xfa, 0x80, 0x02, 0x64,
- 0xe6, 0x9e, 0x42, 0x1a,
- 0xe5, 0x02, 0x44, 0x1a,
- 0x65, 0x82, 0x40, 0x1a,
- 0x04, 0x20, 0x81, 0x11,
- 0xc0, 0x08, 0x64, 0x01,
- 0x72, 0x84, 0x40, 0x02,
- 0xe8, 0x07, 0xd9, 0x27,
- 0x0c, 0x4c, 0xa4, 0x0f,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x81, 0x11, 0x21, 0x0b,
- 0x00, 0x00, 0x84, 0x65,
- 0x04, 0x0e, 0x6c, 0x04,
- 0x46, 0x02, 0xff, 0xf0,
- 0xa1, 0x3b, 0xf8, 0x08,
- 0x41, 0x84, 0x00, 0x04,
- 0xc4, 0x04, 0x02, 0x10,
- 0x02, 0x14, 0xfe, 0x35,
- 0x00, 0x04, 0x7b, 0x80,
- 0xd0, 0x17, 0xfa, 0x80,
- 0x5d, 0x93, 0xa0, 0x1f,
- 0xfb, 0x80, 0x00, 0x14,
- 0x7a, 0x80, 0x02, 0x04,
- 0xa1, 0x1f, 0xd1, 0x07,
- 0x00, 0x10, 0x5d, 0x93,
- 0xc1, 0xc3, 0xe4, 0x04,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe5, 0x02, 0x48, 0x2a,
- 0xe5, 0x82, 0x4a, 0x2a,
- 0x65, 0x06, 0x40, 0x3a,
- 0x42, 0x3a, 0x88, 0x2b,
- 0x8a, 0x3b, 0x65, 0x86,
- 0xef, 0xbc, 0x73, 0x88,
- 0x60, 0x01, 0x04, 0x06,
- 0x81, 0x31, 0x42, 0x00,
- 0x42, 0x12, 0x84, 0x03,
- 0xf9, 0x07, 0x72, 0x8c,
- 0x60, 0x90, 0x04, 0x14,
- 0x24, 0x0f, 0xf9, 0x17,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x41, 0xfe, 0xa1, 0x1b,
- 0x08, 0x4c, 0xdf, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x21, 0x1b,
- 0x81, 0x71, 0x0a, 0x45,
- 0x88, 0xe5, 0xa1, 0x2b,
- 0x7e, 0x81, 0x06, 0x0e,
- 0x48, 0x1a, 0x40, 0x00,
- 0x4a, 0x0a, 0xe5, 0x0a,
- 0x40, 0x0a, 0xe5, 0x0e,
- 0x46, 0x1a, 0xe5, 0x8e,
- 0x18, 0x54, 0x65, 0x8a,
- 0x56, 0x07, 0xe1, 0xd4,
- 0xe1, 0x84, 0x02, 0x44,
- 0x00, 0x34, 0x20, 0xcf,
- 0x56, 0x57, 0xe0, 0xfc,
- 0x04, 0x34, 0xa0, 0x1f,
- 0x40, 0x12, 0x61, 0x84,
- 0x42, 0x22, 0xf0, 0x94,
- 0x88, 0x2b, 0x72, 0xb0,
- 0xef, 0xbc, 0x66, 0x68,
- 0x85, 0x0b, 0xff, 0x21,
- 0x1f, 0xfc, 0x41, 0xfe,
- 0x01, 0x65, 0xa1, 0x1b,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0x4e, 0x96, 0x01, 0x01,
- 0x18, 0x0e, 0xe0, 0x08,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x7f, 0xfd, 0x47, 0xfe,
- 0x86, 0x0d, 0xc0, 0x3f,
- 0x00, 0x00, 0x06, 0x02,
- 0x08, 0x3e, 0xa1, 0x1b,
- 0x80, 0x00, 0x02, 0x06,
- 0x40, 0x9c, 0x06, 0x34,
- 0xc1, 0x84, 0x08, 0x14,
- 0x50, 0x90, 0x46, 0x32,
- 0x42, 0x3a, 0x81, 0x01,
- 0x40, 0x96, 0x40, 0x06,
- 0x88, 0x1e, 0x80, 0x08,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8a, 0x25, 0xa1, 0x2b,
- 0x0a, 0x02, 0x06, 0x13,
- 0x06, 0x14, 0xe0, 0x00,
- 0x03, 0x0a, 0x7a, 0x80,
- 0x08, 0x30, 0xf4, 0x7c,
- 0x81, 0x11, 0x6c, 0x80,
- 0x7b, 0x90, 0x46, 0x32,
- 0x00, 0x32, 0x81, 0x41,
- 0x48, 0x50, 0x6c, 0x7c,
- 0x0a, 0x06, 0x9c, 0x00,
- 0x18, 0x44, 0x00, 0x00,
- 0x0c, 0x04, 0xef, 0x80,
- 0xa0, 0x33, 0x6c, 0x00,
- 0x78, 0xb0, 0x58, 0x62,
- 0x21, 0x4f, 0xa1, 0x5f,
- 0xe1, 0x84, 0x00, 0x24,
- 0x06, 0x32, 0x38, 0x5f,
- 0x27, 0x5f, 0xec, 0x04,
- 0x42, 0x52, 0x88, 0x03,
- 0x81, 0x31, 0x72, 0x84,
- 0xef, 0xbc, 0x61, 0x28,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xa1, 0x2b, 0x00, 0x3b,
- 0xe5, 0x06, 0x40, 0x3a,
- 0xe5, 0x86, 0x42, 0x3a,
- 0x06, 0x20, 0x82, 0x65,
- 0x83, 0x41, 0x6c, 0x04,
- 0x81, 0x31, 0x27, 0x4f,
- 0x6f, 0x38, 0x88, 0x03,
- 0x42, 0x12, 0x6f, 0xbc,
- 0xff, 0x21, 0xf2, 0x8c,
- 0x41, 0xfe, 0x85, 0x0b,
- 0xa1, 0x1b, 0x1f, 0xfc,
- 0xdf, 0xfc, 0x41, 0xfe,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x00, 0x04, 0x4c,
- 0xa3, 0x2d, 0x00, 0x3b,
- 0xe4, 0x06, 0x40, 0x3a,
- 0xe4, 0x86, 0x42, 0x3a,
- 0x08, 0x20, 0x86, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x90, 0x08, 0x34,
- 0x21, 0x1d, 0x81, 0xc1,
- 0xe1, 0x7c, 0x0a, 0x44,
- 0x71, 0x90, 0x4c, 0xc2,
- 0xe8, 0x88, 0x04, 0x34,
- 0x73, 0x94, 0x58, 0xc2,
- 0xdc, 0x00, 0x48, 0x60,
- 0x5c, 0x00, 0x4a, 0xc0,
- 0x42, 0x52, 0x88, 0x03,
- 0x06, 0x24, 0x72, 0x84,
- 0x50, 0x78, 0xe1, 0x7c,
- 0x03, 0x4a, 0xef, 0xbc,
- 0x02, 0x1a, 0xe0, 0x00,
- 0x00, 0xea, 0xe0, 0x00,
- 0x42, 0x0a, 0xe0, 0x00,
- 0x42, 0x1a, 0xe5, 0x80,
- 0x42, 0x0a, 0xe1, 0x88,
- 0x80, 0xf5, 0xed, 0x80,
- 0x7f, 0xfd, 0x41, 0xfe,
- 0x0c, 0x4c, 0xdf, 0xff,
- 0xdd, 0x93, 0xf6, 0x00,
- 0x06, 0x06, 0x7f, 0x21,
- 0xe0, 0x00, 0x60, 0x01,
- 0xe0, 0x08, 0x43, 0x4a,
- 0xe0, 0x08, 0x42, 0x1a,
- 0xe4, 0x0c, 0x41, 0x6a,
- 0xe5, 0x80, 0x42, 0x0a,
- 0xe1, 0x88, 0x42, 0x1a,
- 0xed, 0x80, 0x42, 0x0a,
- 0x00, 0x01, 0x00, 0x06,
- 0x0c, 0x4c, 0xe0, 0x00,
- 0xdd, 0x93, 0xf6, 0x00,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x86, 0x6b, 0x04, 0x4b,
- 0x70, 0x90, 0x08, 0x09,
- 0x08, 0x29, 0x81, 0x51,
- 0x12, 0x10, 0x78, 0x8c,
- 0x08, 0x39, 0xe6, 0x00,
- 0x14, 0x10, 0x78, 0x84,
- 0x18, 0x06, 0xe4, 0xc0,
- 0xff, 0xf8, 0x57, 0xce,
- 0x4e, 0x46, 0x1a, 0x26,
- 0x58, 0x56, 0xe0, 0x00,
- 0xda, 0x36, 0x81, 0x81,
- 0x89, 0xa5, 0x8f, 0x4e,
- 0xf0, 0xa0, 0x40, 0x42,
- 0xe0, 0x40, 0x00, 0x19,
- 0x8a, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x60, 0x00, 0x19,
- 0x8a, 0x25, 0xa1, 0x1b,
- 0xa1, 0x1b, 0xa4, 0x1a,
- 0x08, 0x19, 0x88, 0xc5,
- 0x44, 0x62, 0x7c, 0x20,
- 0x44, 0x11, 0xf0, 0xa0,
- 0x00, 0x19, 0xe0, 0x10,
- 0x44, 0x11, 0xe0, 0x20,
- 0x00, 0x19, 0xe0, 0x30,
- 0x44, 0x11, 0xe0, 0x40,
- 0x00, 0x09, 0xe0, 0x50,
- 0x44, 0x01, 0xe0, 0x60,
- 0xa4, 0x2a, 0xe0, 0x70,
- 0xaa, 0x14, 0xa8, 0x04,
- 0xe1, 0x84, 0x06, 0x24,
- 0x81, 0x31, 0x06, 0x03,
- 0x6f, 0xbc, 0x56, 0x28,
- 0xf2, 0x94, 0x42, 0x12,
- 0x42, 0x62, 0x0f, 0x44,
- 0x04, 0x0e, 0xf0, 0x9c,
- 0x12, 0x0b, 0x81, 0x51,
- 0x81, 0xf5, 0xf8, 0x20,
- 0xf0, 0xa0, 0x40, 0x62,
- 0xe0, 0x10, 0x40, 0x51,
- 0xe0, 0x30, 0x40, 0x51,
- 0xe0, 0x50, 0x40, 0x51,
- 0x60, 0x70, 0x40, 0x51,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x81, 0x01, 0x00, 0x5e,
- 0x71, 0xac, 0x42, 0x62,
- 0x04, 0x0c, 0x82, 0x81,
- 0xec, 0x08, 0x16, 0xb0,
- 0x88, 0x71, 0x04, 0x91,
- 0xb1, 0x8b, 0x90, 0xa1,
- 0x81, 0x01, 0xec, 0xd5,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x06, 0x00, 0x06, 0x28,
- 0x60, 0x01, 0xe6, 0x00,
- 0xe6, 0x10, 0x08, 0x10,
- 0x65, 0x10, 0x0a, 0x10,
- 0x59, 0xc6, 0xf8, 0x11,
- 0x81, 0x61, 0x60, 0x00,
- 0x02, 0x79, 0x83, 0xf5,
- 0xa1, 0x7b, 0xf8, 0x20,
- 0x84, 0x78, 0x84, 0xa5,
- 0x84, 0x45, 0xa1, 0x7b,
- 0x80, 0x84, 0x94, 0x74,
- 0x06, 0xab, 0x82, 0x94,
- 0x10, 0x7a, 0xf8, 0x20,
- 0x0c, 0xba, 0x8e, 0x83,
- 0xf2, 0x98, 0x52, 0x92,
- 0x00, 0x8e, 0x82, 0x9e,
- 0x46, 0xa3, 0x8e, 0xa3,
- 0x82, 0xb1, 0x78, 0x20,
- 0x02, 0xc1, 0x8c, 0xbc,
- 0x04, 0x41, 0x84, 0x31,
- 0x08, 0x51, 0x90, 0x01,
- 0x0e, 0xc0, 0x82, 0x11,
- 0x85, 0x7d, 0xec, 0xf0,
- 0x0c, 0x0c, 0xf6, 0xf5,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x84, 0x6b, 0x06, 0x28,
- 0x83, 0x81, 0x44, 0x38,
- 0x80, 0x7b, 0x46, 0x08,
- 0x91, 0x11, 0x25, 0x8f,
- 0x6f, 0xfc, 0x5c, 0xe8,
- 0xe8, 0x8c, 0x12, 0x84,
- 0x14, 0x04, 0x1c, 0x14,
- 0x1e, 0x34, 0xe0, 0x90,
- 0x02, 0x0b, 0x90, 0x2b,
- 0x64, 0x18, 0x94, 0x1b,
- 0x1c, 0x14, 0xef, 0xfc,
- 0x98, 0x0e, 0x92, 0x2b,
- 0x02, 0x0b, 0x9e, 0x34,
- 0x63, 0x98, 0x94, 0x1b,
- 0x9c, 0x24, 0xef, 0xfc,
- 0x0e, 0x1b, 0x9a, 0x0e,
- 0x1e, 0x34, 0xe0, 0x10,
- 0x63, 0x18, 0x84, 0x0b,
- 0x92, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xd8, 0x0e,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x88, 0x7b, 0x44, 0x48,
- 0x81, 0x01, 0x00, 0x9b,
- 0x84, 0x6b, 0x0a, 0x8b,
- 0x86, 0x0b, 0x0b, 0x0e,
- 0x90, 0x2b, 0x0e, 0x1b,
- 0x68, 0x00, 0x43, 0x48,
- 0xab, 0x9b, 0x88, 0x3b,
- 0xa5, 0x9b, 0x84, 0x05,
- 0x0c, 0x60, 0x02, 0xe5,
- 0xa7, 0x9b, 0x84, 0x10,
- 0xa9, 0x9b, 0x82, 0x45,
- 0x40, 0x80, 0x02, 0x25,
- 0xa3, 0x9b, 0x9c, 0x00,
- 0x08, 0x61, 0x86, 0x75,
- 0x81, 0x25, 0x8e, 0x0b,
- 0x0d, 0x14, 0x90, 0x61,
- 0xe4, 0x50, 0x06, 0xf0,
- 0x62, 0x98, 0x98, 0x24,
- 0x0b, 0x14, 0xef, 0xfc,
- 0xe0, 0x00, 0x00, 0x1a,
- 0x61, 0x9c, 0x4e, 0x0a,
- 0x0f, 0x24, 0x81, 0x01,
- 0x20, 0x01, 0x02, 0x06,
- 0x02, 0x06, 0xc0, 0x00,
- 0x88, 0x1e, 0xc0, 0x00,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x40, 0xc6, 0xdd, 0x93,
- 0x4e, 0x0a, 0x60, 0x08,
- 0x4e, 0x1a, 0xe9, 0x9c,
- 0x81, 0x11, 0x61, 0x9c,
- 0xc1, 0xc3, 0xfd, 0xf5,
- 0x84, 0x03, 0xa7, 0x2f,
- 0x5c, 0x08, 0xc3, 0x0d,
- 0x00, 0x06, 0x1a, 0x00,
- 0x5d, 0x93, 0x80, 0x00,
- 0xf1, 0x80, 0x40, 0x12,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x64, 0x61, 0x00, 0x00,
- 0x81, 0x41, 0x40, 0x03,
- 0xfc, 0x1e, 0xbe, 0x0e,
- 0x06, 0x08, 0x8b, 0xf5,
- 0x01, 0xb1, 0x81, 0xa1,
- 0x81, 0x4d, 0x81, 0x71,
- 0x7e, 0x4e, 0x92, 0x65,
- 0x02, 0x09, 0x88, 0x13,
- 0x81, 0xa1, 0x60, 0xb0,
- 0x60, 0xf0, 0x02, 0x39,
- 0x02, 0x49, 0x81, 0xb1,
- 0x81, 0x61, 0x60, 0x90,
- 0x60, 0xd0, 0x02, 0x29,
- 0x42, 0x0a, 0x9d, 0x11,
- 0x80, 0x33, 0x66, 0x86,
- 0x81, 0x71, 0x3e, 0x54,
- 0x88, 0x23, 0x08, 0x13,
- 0xc4, 0x17, 0x09, 0x4e,
- 0x81, 0x41, 0x02, 0x53,
- 0x18, 0x85, 0x83, 0x25,
- 0xc0, 0x01, 0x78, 0x31,
- 0x10, 0xa3, 0xf1, 0x94,
- 0x48, 0x42, 0x81, 0x81,
- 0x92, 0xb3, 0xf2, 0xa0,
- 0x72, 0xa0, 0x4c, 0x62,
- 0x82, 0x11, 0x82, 0x71,
- 0xfc, 0x55, 0x85, 0x1d,
- 0xf0, 0x51, 0x02, 0x01,
- 0x1e, 0x15, 0x87, 0x0d,
- 0x58, 0x50, 0x40, 0x10,
- 0xfc, 0xf5, 0xdc, 0x00,
- 0x84, 0xd5, 0xe5, 0x7d,
- 0x61, 0x84, 0x10, 0x74,
- 0x40, 0x82, 0x81, 0x91,
- 0x81, 0x31, 0x70, 0xa8,
- 0x72, 0xa4, 0x42, 0x42,
- 0x44, 0x18, 0x8e, 0x2b,
- 0x00, 0xab, 0xef, 0xbc,
- 0xf0, 0xac, 0x40, 0x82,
- 0x72, 0xa4, 0x42, 0x62,
- 0x43, 0x98, 0x81, 0x31,
- 0x8e, 0x2b, 0x6f, 0xbc,
- 0xfc, 0x14, 0x80, 0xbb,
- 0x00, 0x44, 0xfe, 0x44,
- 0x06, 0x10, 0x60, 0x88,
- 0x04, 0x44, 0xe5, 0x10,
- 0x86, 0x03, 0x60, 0x84,
- 0x82, 0x41, 0x04, 0x33,
- 0x40, 0xb5, 0x80, 0xae,
- 0x46, 0x73, 0xe0, 0x20,
- 0x84, 0x08, 0xe0, 0x80,
- 0xe8, 0x15, 0x81, 0x4d,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x81, 0xc1, 0x30, 0x01,
- 0x82, 0x7b, 0x7c, 0x0e,
- 0x0c, 0x70, 0x0d, 0xce,
- 0x0b, 0xce, 0xe4, 0xf0,
- 0x89, 0xce, 0x81, 0xa1,
- 0xfc, 0x94, 0xfe, 0xce,
- 0x1e, 0x08, 0x89, 0x55,
- 0x8d, 0xce, 0x81, 0x11,
- 0x01, 0xad, 0xfe, 0xce,
- 0x89, 0xce, 0x81, 0x01,
- 0x8c, 0x05, 0x8b, 0xce,
- 0x70, 0xa8, 0x56, 0x62,
- 0xf0, 0xa8, 0x50, 0x92,
- 0x78, 0xe0, 0x16, 0x09,
- 0xe4, 0x30, 0x04, 0xf0,
- 0x78, 0xa0, 0x16, 0x19,
- 0xe4, 0x60, 0x0a, 0xf0,
- 0xf8, 0x20, 0x10, 0x39,
- 0xe0, 0x20, 0x10, 0x49,
- 0x9b, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x43, 0x08,
- 0x78, 0xc0, 0x16, 0x09,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x78, 0x80, 0x16, 0x19,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0xfc, 0x28, 0x12, 0x39,
- 0xe0, 0x40, 0x10, 0x49,
- 0x93, 0x21, 0x3c, 0x2e,
- 0xe8, 0x00, 0x42, 0x08,
- 0x81, 0xc1, 0x7e, 0x04,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xa1, 0x1b, 0x8b, 0x14,
- 0x7e, 0xce, 0x80, 0xb5,
- 0x0b, 0xce, 0x81, 0x11,
- 0x0d, 0x24, 0x81, 0x01,
- 0xf0, 0xa8, 0x48, 0x62,
- 0x82, 0xa1, 0x09, 0x34,
- 0xf8, 0x20, 0x48, 0x01,
- 0xf8, 0x60, 0x48, 0x21,
- 0xf8, 0x40, 0x48, 0x31,
- 0x9c, 0x08, 0x90, 0x16,
- 0xee, 0x55, 0x81, 0xad,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x58, 0x12, 0x00, 0x33,
- 0x14, 0x3e, 0xf0, 0x80,
- 0xf0, 0x90, 0x40, 0x32,
- 0x00, 0x00, 0x19, 0x0d,
- 0x00, 0x1b, 0xec, 0x04,
- 0x02, 0xc0, 0x81, 0x51,
- 0x3c, 0x14, 0x8c, 0x04,
- 0xfb, 0x04, 0x44, 0x22,
- 0x82, 0x35, 0x84, 0x3d,
- 0x88, 0x5b, 0x04, 0x0d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xd1, 0x8c, 0x40, 0x02,
- 0xd0, 0x88, 0x4a, 0x02,
- 0xdd, 0x93, 0x84, 0x5e,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x8b, 0x0a, 0x6b,
- 0x84, 0x7b, 0x11, 0x94,
- 0x8c, 0x1b, 0x08, 0x0b,
- 0x6f, 0xfc, 0x69, 0x88,
- 0x01, 0x01, 0x90, 0x2b,
- 0x85, 0x65, 0x91, 0xa1,
- 0x88, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0x12, 0x45, 0x81, 0x31,
- 0x90, 0x2b, 0x60, 0x40,
- 0xe0, 0x60, 0x12, 0x55,
- 0xbe, 0x9e, 0x9c, 0x08,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x84, 0x35, 0xa1, 0x0b,
- 0x60, 0x80, 0x12, 0x15,
- 0xe4, 0x80, 0x04, 0x90,
- 0x60, 0x40, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9e, 0x08, 0xe0, 0x60,
- 0x90, 0x2b, 0x3e, 0x2e,
- 0x8c, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x69, 0xe8,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x55,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x20, 0x1e, 0xf0,
- 0x82, 0x7b, 0x15, 0x84,
- 0x84, 0x6b, 0x17, 0x94,
- 0x8e, 0x2b, 0x13, 0x04,
- 0x6f, 0xfc, 0x65, 0xc8,
- 0x01, 0x01, 0x90, 0x1b,
- 0xe0, 0x08, 0x14, 0xc6,
- 0xa1, 0x0b, 0x85, 0x75,
- 0x12, 0x15, 0x88, 0x55,
- 0x81, 0x31, 0x68, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x8e, 0x2b,
- 0x98, 0x08, 0xe6, 0x90,
- 0x3c, 0x1e, 0xbe, 0x9e,
- 0x67, 0x38, 0x90, 0x1b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x12, 0x15, 0x84, 0x55,
- 0x04, 0x90, 0x68, 0xc0,
- 0xc0, 0x02, 0x64, 0xc0,
- 0x64, 0x60, 0x12, 0x45,
- 0x12, 0x55, 0x81, 0x31,
- 0x9a, 0x08, 0xe6, 0x90,
- 0x8e, 0x2b, 0x3e, 0x2e,
- 0x90, 0x1b, 0x3c, 0x1e,
- 0xef, 0xfc, 0x66, 0x08,
- 0x6c, 0x04, 0x14, 0xa0,
- 0xa1, 0xab, 0x88, 0x91,
- 0x90, 0xf1, 0xf6, 0x35,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x80, 0x9b, 0x15, 0x84,
- 0x84, 0x7b, 0x0a, 0x6b,
- 0x00, 0x80, 0x82, 0xab,
- 0x08, 0x80, 0x64, 0x50,
- 0x3c, 0x0e, 0xe4, 0x10,
- 0xe4, 0x40, 0x0a, 0x80,
- 0xef, 0xfc, 0x77, 0x68,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x67, 0xa0, 0x02, 0x80,
- 0xe7, 0x60, 0x00, 0x80,
- 0x04, 0x80, 0x7e, 0x1e,
- 0x7c, 0x2e, 0xe7, 0x90,
- 0x3e, 0x0e, 0x94, 0x1b,
- 0x7a, 0x38, 0x8e, 0x2b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0xa0, 0xf1, 0x80, 0xa5,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x17, 0x44, 0xdd, 0x93,
- 0x0e, 0x1b, 0x92, 0x0b,
- 0x10, 0x3b, 0x8c, 0x2b,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0x81, 0x15, 0xf2, 0x3c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x86, 0x8b, 0x08, 0x6b,
- 0x84, 0x7b, 0x02, 0x0b,
- 0x6f, 0xfc, 0x6d, 0x88,
- 0x10, 0x0b, 0x8c, 0x1b,
- 0x66, 0x38, 0x8c, 0x1b,
- 0x10, 0x09, 0xef, 0xfc,
- 0x00, 0x00, 0xe3, 0x58,
- 0xe2, 0x0d, 0xec, 0x0c,
- 0x1c, 0x00, 0x40, 0x70,
- 0x9c, 0x00, 0x42, 0x60,
- 0x8f, 0xfc, 0x5a, 0xe8,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x62, 0x01, 0x02, 0x5b,
- 0x81, 0xc1, 0x40, 0x01,
- 0x0c, 0xc4, 0x85, 0x95,
- 0x0e, 0x64, 0xfb, 0x80,
- 0x82, 0x63, 0x60, 0x84,
- 0x60, 0x01, 0x0c, 0x89,
- 0x82, 0x73, 0x40, 0x02,
- 0xe8, 0x00, 0x0e, 0x7b,
- 0x06, 0xa5, 0xc4, 0x87,
- 0xc4, 0x77, 0x7c, 0x20,
- 0xfc, 0x1c, 0x00, 0x95,
- 0x50, 0x82, 0xd3, 0xad,
- 0x50, 0x95, 0xd0, 0x8c,
- 0x04, 0x89, 0xc0, 0x00,
- 0xa1, 0x8b, 0xe0, 0x30,
- 0x0c, 0x60, 0x82, 0xc5,
- 0x40, 0x08, 0x64, 0x01,
- 0x98, 0x68, 0x80, 0x73,
- 0xc4, 0x67, 0x9c, 0x74,
- 0x7c, 0x18, 0x08, 0x85,
- 0x88, 0x63, 0xcf, 0x77,
- 0x98, 0x8e, 0x8e, 0x83,
- 0x58, 0x8a, 0x82, 0xc1,
- 0xf4, 0xd5, 0xec, 0x14,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x81, 0xc1, 0x0f, 0x4e,
- 0x81, 0x61, 0x0d, 0x3e,
- 0x64, 0x09, 0x00, 0x39,
- 0x87, 0x45, 0xc0, 0x02,
- 0x60, 0x34, 0x02, 0x99,
- 0xfa, 0x80, 0x0e, 0xc4,
- 0x60, 0x30, 0x02, 0xb9,
- 0x04, 0x85, 0xc4, 0x77,
- 0xa1, 0xbb, 0xfc, 0x1c,
- 0xe5, 0xa6, 0x54, 0x8a,
- 0x65, 0x26, 0x50, 0x8a,
- 0xf0, 0x9c, 0x52, 0x22,
- 0xd1, 0x87, 0xf0, 0xa7,
- 0x56, 0x82, 0x0f, 0x84,
- 0x8e, 0x83, 0xf9, 0xa8,
- 0x8d, 0xa4, 0xa0, 0xbe,
- 0x8e, 0xa3, 0x02, 0xc5,
- 0xc6, 0x5a, 0xa8, 0x64,
- 0xe5, 0x16, 0x48, 0x6a,
- 0xe5, 0x96, 0x4a, 0x6a,
- 0xee, 0x57, 0xd3, 0x47,
- 0xf9, 0x94, 0x4c, 0x42,
- 0xa0, 0xbe, 0x8c, 0xb3,
- 0x80, 0x73, 0x24, 0x44,
- 0x4e, 0x45, 0x82, 0xc1,
- 0xa8, 0x44, 0xe9, 0x04,
- 0xe9, 0x44, 0x4e, 0x45,
- 0x4e, 0x65, 0xa0, 0x44,
- 0x4e, 0x45, 0xe9, 0xc4,
- 0x58, 0x8a, 0xe9, 0x84,
- 0xf2, 0x75, 0xf4, 0x0c,
- 0x0c, 0xcc, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x81, 0x41, 0x19, 0x31,
- 0x18, 0x54, 0x83, 0x95,
- 0x4c, 0x12, 0x60, 0x84,
- 0x02, 0xc3, 0xf0, 0x94,
- 0x18, 0x5b, 0x82, 0x41,
- 0x0c, 0xc9, 0xe8, 0x00,
- 0xc0, 0x02, 0x60, 0x01,
- 0xe0, 0x88, 0x0c, 0x54,
- 0x7c, 0x18, 0x00, 0x65,
- 0x04, 0xc5, 0xc4, 0xc7,
- 0xd9, 0x6d, 0xfc, 0x30,
- 0xd0, 0x80, 0x4a, 0x52,
- 0x0c, 0x01, 0x4a, 0x31,
- 0x02, 0xcb, 0xc0, 0x04,
- 0x40, 0x01, 0x62, 0x01,
- 0xfb, 0x80, 0x0a, 0x44,
- 0xf8, 0x55, 0xd9, 0x5d,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x00,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xef, 0x10, 0x1e, 0xf0,
- 0x84, 0x8b, 0x02, 0x6b,
- 0x64, 0x09, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x02,
- 0x65, 0x10, 0x02, 0xf0,
- 0xe6, 0x10, 0x04, 0xf0,
- 0x81, 0x31, 0x01, 0x65,
- 0x00, 0x00, 0x49, 0x3e,
- 0xc5, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x66, 0x10, 0x12, 0xf0,
- 0xe5, 0x10, 0x14, 0xf0,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x92, 0x3b, 0x10, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x16, 0xf0, 0x94, 0x4b,
- 0x8c, 0x0b, 0x64, 0x10,
- 0x92, 0x2b, 0x10, 0x1b,
- 0x96, 0x4b, 0x14, 0x3b,
- 0xef, 0xfc, 0x76, 0xc8,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0x6f, 0xfc, 0x7a, 0xc8,
- 0x01, 0x01, 0x96, 0x2b,
- 0xe7, 0x10, 0x1e, 0xf0,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xff, 0x01, 0x00, 0x24,
- 0x83, 0x2d, 0x84, 0x14,
- 0x00, 0x00, 0x00, 0x06,
- 0x5d, 0x93, 0x82, 0x2d,
- 0xc0, 0x00, 0x00, 0x16,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x82, 0x9b, 0x7e, 0x2e,
- 0x02, 0x06, 0x3e, 0x0e,
- 0x09, 0x21, 0xe0, 0x10,
- 0x68, 0xf1, 0x06, 0x4e,
- 0x4e, 0xf8, 0xc0, 0x10,
- 0x92, 0x0b, 0x6f, 0xbc,
- 0x81, 0x11, 0x01, 0x01,
- 0x81, 0x01, 0x09, 0x0e,
- 0x83, 0x81, 0x11, 0x1e,
- 0x81, 0xa1, 0x0f, 0x1e,
- 0x81, 0x31, 0x7c, 0x0e,
- 0x0d, 0x3e, 0x91, 0xa5,
- 0xe0, 0x88, 0x00, 0x74,
- 0x12, 0x05, 0x8b, 0x1e,
- 0x4c, 0x78, 0xfc, 0x00,
- 0x0c, 0x74, 0xe8, 0x00,
- 0x01, 0x0a, 0x60, 0x84,
- 0xc0, 0x01, 0x64, 0x00,
- 0x4c, 0x03, 0x92, 0x63,
- 0x00, 0x04, 0x68, 0x00,
- 0x1e, 0x15, 0x80, 0x84,
- 0x40, 0x02, 0x80, 0x04,
- 0x00, 0xb3, 0x90, 0x84,
- 0x00, 0x01, 0x0c, 0x01,
- 0xc0, 0x0c, 0x41, 0x26,
- 0xc0, 0x08, 0x5e, 0x05,
- 0x47, 0xfc, 0x57, 0xf6,
- 0xfb, 0xfc, 0x10, 0x0a,
- 0x7e, 0xa4, 0x86, 0xc5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x64, 0x70, 0x06, 0xf0,
- 0x14, 0x19, 0x96, 0x0b,
- 0x47, 0xb8, 0xe0, 0x28,
- 0x14, 0x09, 0xe8, 0x00,
- 0x80, 0x8b, 0x60, 0x2c,
- 0xa1, 0x0b, 0x28, 0x02,
- 0x40, 0x0e, 0x82, 0x45,
- 0x42, 0x06, 0x60, 0x2e,
- 0x40, 0x0a, 0xe0, 0xf8,
- 0xaa, 0x12, 0xe0, 0x86,
- 0xfa, 0x04, 0x40, 0x02,
- 0x81, 0x11, 0x09, 0x0e,
- 0x81, 0xa1, 0x09, 0x05,
- 0x00, 0x8a, 0x8b, 0x04,
- 0x14, 0xa0, 0xf4, 0x3c,
- 0x02, 0xf6, 0x04, 0x04,
- 0x0c, 0xe5, 0x80, 0x00,
- 0x80, 0x00, 0x10, 0x06,
- 0x89, 0x14, 0x8f, 0x04,
- 0xf1, 0x80, 0x40, 0xb2,
- 0xf0, 0x80, 0x00, 0x04,
- 0x82, 0xc5, 0x83, 0x0d,
- 0x04, 0xf0, 0x7e, 0x04,
- 0x06, 0xf0, 0xe4, 0x80,
- 0x00, 0x19, 0xe4, 0x70,
- 0x96, 0x0b, 0x60, 0x28,
- 0xe8, 0x00, 0x44, 0x28,
- 0x81, 0x81, 0x02, 0xa1,
- 0x0b, 0x04, 0x83, 0xf5,
- 0xe4, 0x80, 0x04, 0xf0,
- 0x06, 0xf0, 0x7e, 0xa4,
- 0x82, 0x01, 0xe4, 0x70,
- 0xe0, 0x28, 0x14, 0x19,
- 0x96, 0x0b, 0x0b, 0x0e,
- 0xe8, 0x00, 0x43, 0xc8,
- 0x60, 0x2c, 0x14, 0x09,
- 0x28, 0x02, 0x80, 0x8b,
- 0x82, 0x45, 0xa1, 0x0b,
- 0x60, 0x2e, 0x40, 0x0e,
- 0xe0, 0xf8, 0x42, 0x06,
- 0xe0, 0x86, 0x40, 0x0a,
- 0x40, 0x02, 0xaa, 0x12,
- 0x09, 0x0e, 0xfa, 0x04,
- 0x8b, 0x14, 0x81, 0xa1,
- 0x92, 0x73, 0x0d, 0x34,
- 0x4e, 0x11, 0x8f, 0x04,
- 0xc0, 0x02, 0x60, 0x01,
- 0x6c, 0x00, 0x4c, 0xa3,
- 0x4c, 0x03, 0x82, 0x31,
- 0xc0, 0x01, 0x64, 0x09,
- 0x62, 0x01, 0x12, 0x0b,
- 0x0e, 0x34, 0x40, 0x01,
- 0xc1, 0x7d, 0xfb, 0x80,
- 0x00, 0x10, 0xdc, 0x35,
- 0x52, 0x01, 0xe4, 0x04,
- 0xc0, 0x02, 0x64, 0x09,
- 0xc8, 0xf1, 0x7c, 0x04,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x0a, 0x44, 0x88, 0x44,
- 0xaa, 0x43, 0xe9, 0x04,
- 0x81, 0x01, 0x00, 0x43,
- 0xc3, 0x4f, 0x08, 0x4e,
- 0xdd, 0x93, 0x8c, 0x4e,
- 0xa3, 0x0f, 0x0c, 0x0e,
- 0x81, 0x01, 0x08, 0x0e,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x3c, 0x02, 0x09,
- 0xa1, 0x0b, 0x80, 0x3b,
- 0x40, 0x96, 0x06, 0x65,
- 0x48, 0x3a, 0x80, 0x08,
- 0x40, 0x3a, 0xe0, 0x02,
- 0x08, 0x44, 0xe1, 0x02,
- 0x82, 0x43, 0xfa, 0x80,
- 0xec, 0x70, 0x08, 0x49,
- 0x81, 0x01, 0x49, 0x0d,
- 0x86, 0x13, 0x82, 0xa5,
- 0x6b, 0x71, 0x02, 0x19,
- 0xf4, 0x1d, 0xc0, 0x05,
- 0x46, 0x06, 0x80, 0xf5,
- 0x46, 0x4a, 0xe0, 0x64,
- 0x83, 0x11, 0x64, 0x84,
- 0x81, 0x11, 0x80, 0x45,
- 0xdd, 0x93, 0x88, 0x16,
- 0x00, 0x04, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfa, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x7b,
- 0x67, 0x71, 0x10, 0x70,
- 0x12, 0x70, 0x40, 0x11,
- 0xc0, 0x03, 0x67, 0x71,
- 0x81, 0xa1, 0x3e, 0xbe,
- 0x81, 0x01, 0x01, 0x61,
- 0x00, 0xa4, 0x85, 0x25,
- 0x04, 0xf0, 0x7b, 0x80,
- 0x7c, 0x58, 0xe4, 0x20,
- 0x8e, 0x1b, 0x6f, 0xfc,
- 0xa1, 0x1b, 0x91, 0x18,
- 0x1f, 0xfd, 0x43, 0xfe,
- 0x56, 0x15, 0x9f, 0xff,
- 0x82, 0xe5, 0x80, 0x00,
- 0x45, 0xfe, 0x20, 0x1a,
- 0xcf, 0xff, 0x7f, 0xfd,
- 0xfb, 0x80, 0x0c, 0x64,
- 0xe0, 0x17, 0x82, 0x61,
- 0xac, 0x1e, 0xb4, 0x1f,
- 0xc4, 0x1d, 0xa4, 0x14,
- 0xc0, 0x00, 0x40, 0xc6,
- 0x88, 0xb1, 0x02, 0xa1,
- 0x88, 0x91, 0x04, 0x81,
- 0x60, 0x01, 0x14, 0x0a,
- 0xf6, 0x95, 0xc0, 0x01,
- 0x98, 0xf1, 0x3e, 0x14,
- 0x62, 0x01, 0x42, 0x63,
- 0x0c, 0x0c, 0xc0, 0x01,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x81, 0x01, 0x5d, 0x93,
- 0x60, 0x38, 0x00, 0x19,
- 0xa1, 0x1b, 0x81, 0x21,
- 0x00, 0x00, 0x02, 0x16,
- 0x80, 0x08, 0x40, 0x96,
- 0xcc, 0x2a, 0x86, 0x25,
- 0xe0, 0x28, 0x06, 0x09,
- 0x7c, 0xc0, 0x08, 0x24,
- 0x48, 0x4a, 0xe2, 0x27,
- 0x02, 0x10, 0x66, 0x86,
- 0x01, 0x0a, 0xec, 0x04,
- 0x40, 0xc6, 0x64, 0x40,
- 0x44, 0x2a, 0xe0, 0x00,
- 0x08, 0x06, 0x60, 0x12,
- 0x00, 0x06, 0xf0, 0x00,
- 0x42, 0x2a, 0x80, 0x00,
- 0x42, 0x42, 0xe6, 0x86,
- 0xce, 0x2c, 0xf1, 0x84,
- 0xe0, 0x10, 0x46, 0x13,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x80, 0x8b, 0x06, 0x6b,
- 0x60, 0x38, 0x0c, 0x09,
- 0x21, 0x0b, 0x84, 0x7b,
- 0x86, 0x95, 0x81, 0x01,
- 0x8e, 0x1b, 0x10, 0x0b,
- 0xef, 0xfc, 0x78, 0xe8,
- 0x40, 0x96, 0x00, 0xab,
- 0x14, 0x0a, 0xe0, 0x08,
- 0x84, 0x45, 0xe2, 0xa4,
- 0x67, 0x71, 0x12, 0x80,
- 0x8e, 0x1b, 0x40, 0x03,
- 0x8c, 0x2b, 0x12, 0x0b,
- 0xef, 0xfc, 0x69, 0x48,
- 0x41, 0x26, 0x00, 0x8b,
- 0xa1, 0x8b, 0xe0, 0x0c,
- 0x9c, 0x00, 0x50, 0xa0,
- 0xe3, 0xc8, 0x10, 0x0a,
- 0x0c, 0x0c, 0x80, 0x95,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x8e, 0x1b, 0x12, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xa1, 0x0b, 0x8c, 0x2b,
- 0xdc, 0x00, 0x50, 0x00,
- 0x0c, 0x0c, 0x90, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe1, 0x00, 0x1e, 0x06,
- 0x61, 0x9c, 0x00, 0x46,
- 0x66, 0x38, 0x83, 0x11,
- 0xc1, 0xc3, 0xef, 0xb8,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x73, 0xd8, 0x81, 0x11,
- 0x81, 0x81, 0x6f, 0xbc,
- 0x60, 0x00, 0x42, 0x76,
- 0x62, 0x98, 0x8c, 0x0b,
- 0x7e, 0xd8, 0xe8, 0x24,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x01, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x44,
- 0x40, 0x46, 0x00, 0x86,
- 0x0c, 0x2b, 0xef, 0xdc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xf5, 0x42, 0x20,
- 0x44, 0x4a, 0x40, 0xff,
- 0x4c, 0x13, 0xe0, 0x98,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x70, 0x00, 0x39,
- 0xf3, 0xec, 0x44, 0x30,
- 0xf8, 0x70, 0x40, 0x21,
- 0x4c, 0x81, 0x84, 0x45,
- 0x40, 0x2b, 0x6c, 0x21,
- 0x73, 0xf9, 0x42, 0x10,
- 0x4c, 0x13, 0xc0, 0xff,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xf8, 0x20, 0x40, 0x81,
- 0xf8, 0x10, 0x00, 0x19,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xf8, 0x10, 0x40, 0x11,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf8, 0x30, 0x00, 0x19,
- 0x40, 0x11, 0xc8, 0x19,
- 0x40, 0x81, 0xf8, 0x30,
- 0x00, 0x09, 0xe0, 0x30,
- 0x40, 0x0a, 0xf8, 0x30,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x43, 0xf6, 0x1c, 0x04,
- 0xff, 0xc0, 0x6f, 0xfd,
- 0x02, 0x0e, 0x02, 0x0f,
- 0x40, 0x00, 0xf0, 0x00,
- 0xc3, 0x00, 0x7c, 0x01,
- 0x9c, 0x04, 0x9c, 0x0e,
- 0x9c, 0x0e, 0x82, 0x0f,
- 0x6e, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x38, 0x63, 0x11,
- 0x41, 0xc6, 0xa3, 0x0b,
- 0x00, 0x20, 0x12, 0xfd,
- 0x00, 0x01, 0x02, 0x06,
- 0x4c, 0x81, 0xbf, 0xc1,
- 0x80, 0x38, 0x03, 0x11,
- 0x80, 0x00, 0x40, 0x15,
- 0x68, 0x00, 0x5f, 0xa8,
- 0x42, 0x86, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x24, 0x5b, 0x08,
- 0xef, 0xfc, 0x76, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x8b, 0x11, 0x00, 0x6b,
- 0xe8, 0x28, 0x56, 0x88,
- 0x61, 0x24, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x06,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x16, 0x81, 0x11,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x08, 0xef, 0xdc,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x0c, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x13, 0x7d,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x5c, 0xa8,
- 0xe8, 0x00, 0x5c, 0x08,
- 0x61, 0x44, 0x40, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x44,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0xec, 0x04, 0x02, 0x00,
- 0x84, 0x95, 0xe7, 0x1d,
- 0xec, 0x2c, 0x02, 0x00,
- 0x84, 0xb5, 0xe7, 0x1d,
- 0xec, 0x10, 0x02, 0x00,
- 0x84, 0xd5, 0xe5, 0x1d,
- 0x86, 0x25, 0xad, 0x0b,
- 0x86, 0x65, 0xb3, 0x0b,
- 0x86, 0xb5, 0xb5, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x20, 0x58, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x58,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x40, 0x35, 0x48,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x08, 0x38, 0xf2, 0x00,
- 0x8c, 0x0b, 0xe0, 0x54,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x4c, 0x10, 0xc8,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0xb5, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x85, 0x75, 0xf2, 0x00,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x81, 0x11, 0x01, 0x01,
- 0x68, 0x20, 0x7d, 0xa8,
- 0x03, 0x46, 0x81, 0x61,
- 0x83, 0x31, 0x61, 0x4c,
- 0x08, 0x36, 0x84, 0x24,
- 0xe1, 0x14, 0x44, 0xc6,
- 0x90, 0x36, 0x88, 0x44,
- 0x08, 0x66, 0x88, 0x24,
- 0x84, 0x14, 0x87, 0x21,
- 0x83, 0x11, 0x04, 0x26,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x20, 0x3c, 0x68,
- 0x61, 0x14, 0x40, 0xc6,
- 0x80, 0x04, 0x83, 0x11,
- 0xc1, 0x83, 0x80, 0x16,
- 0xdd, 0x93, 0xc7, 0x13,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x40, 0x96, 0xb3, 0x0b,
- 0x4c, 0x01, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0x40, 0x66, 0x82, 0x25,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x40, 0xf8, 0xe8, 0x50,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0xd1, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x15,
- 0x6c, 0x79, 0x0c, 0x19,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0x01, 0xe6, 0x86,
- 0x67, 0xf9, 0x00, 0x8a,
- 0x41, 0xd6, 0xc0, 0x03,
- 0x0e, 0x66, 0x00, 0x3c,
- 0x00, 0x04, 0x80, 0x04,
- 0xa1, 0x7b, 0x5a, 0x80,
- 0x66, 0x31, 0x4c, 0x03,
- 0x82, 0x45, 0xc0, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x68, 0x0c, 0x70, 0x48,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x47, 0xb8, 0x98, 0x75,
- 0x8c, 0x0b, 0x68, 0x44,
- 0x6c, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2b,
- 0x88, 0x55, 0xb3, 0x0b,
- 0x92, 0xd5, 0xa1, 0x7b,
- 0x68, 0x3c, 0x72, 0xc8,
- 0x00, 0x7b, 0x8c, 0x0b,
- 0xe1, 0x34, 0x41, 0x06,
- 0x02, 0x96, 0x00, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x0e, 0x00, 0x16,
- 0x0c, 0x19, 0xff, 0xf8,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xe3, 0xf0, 0x02, 0x0a,
- 0xc4, 0x04, 0x00, 0x10,
- 0x6c, 0xfd, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xe8, 0x04, 0x4b, 0xe8,
- 0x8c, 0x15, 0xa1, 0x7b,
- 0x21, 0x7b, 0x87, 0x85,
- 0xe0, 0x00, 0x40, 0x66,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8a, 0x15, 0xc0, 0x2b,
- 0x61, 0x4c, 0x55, 0x46,
- 0x66, 0xe0, 0x10, 0x60,
- 0x28, 0x04, 0xc0, 0xa3,
- 0x67, 0x61, 0x12, 0x60,
- 0x02, 0x60, 0xc0, 0x9f,
- 0x40, 0x54, 0x65, 0xc1,
- 0x65, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x54,
- 0x40, 0x54, 0x66, 0xd1,
- 0x5e, 0xd8, 0x90, 0x4b,
- 0x92, 0x5b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x28, 0x04, 0x82, 0xf5,
- 0x66, 0x31, 0x02, 0x60,
- 0x08, 0x60, 0xc0, 0xad,
- 0x40, 0xa1, 0x64, 0x71,
- 0x61, 0x78, 0x90, 0x2b,
- 0x92, 0x3b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x38, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x0c,
- 0x80, 0x55, 0xa1, 0x0b,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0x28, 0x04, 0xdd, 0x93,
- 0x64, 0x81, 0x04, 0x60,
- 0x06, 0x60, 0xc0, 0x99,
- 0x40, 0xa2, 0x65, 0x21,
- 0x50, 0xd8, 0x90, 0x1b,
- 0x73, 0x95, 0xef, 0xf8,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0x64, 0x51, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x03,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x87, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x64, 0x39, 0x00, 0x8a,
- 0x80, 0xf5, 0xc0, 0x02,
- 0x61, 0x18, 0x01, 0x46,
- 0x80, 0x04, 0x85, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x18, 0x03, 0x46,
- 0x64, 0x18, 0x01, 0x4a,
- 0x84, 0x14, 0xc0, 0x01,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xdd, 0x93, 0x84, 0x06,
- 0x66, 0x61, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x66, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x86, 0xc5, 0x80, 0x00,
- 0x64, 0x99, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x03,
- 0x04, 0x56, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x84, 0x85, 0x80, 0x00,
- 0x66, 0xc9, 0x02, 0x8a,
- 0x03, 0x06, 0xc0, 0x02,
- 0x04, 0x46, 0x01, 0x04,
- 0x02, 0x15, 0x80, 0x00,
- 0x82, 0x45, 0x80, 0x00,
- 0x64, 0x95, 0x03, 0x0a,
- 0x03, 0x06, 0x40, 0x02,
- 0x04, 0x14, 0xe1, 0x04,
- 0x04, 0x26, 0x87, 0x21,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x04, 0x03, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x79, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x03, 0x0a, 0xc4, 0x17,
- 0xc0, 0x0f, 0x66, 0x81,
- 0x02, 0x8a, 0x86, 0xf5,
- 0xc0, 0x0f, 0x64, 0xf5,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x06,
- 0x80, 0x00, 0x02, 0x15,
- 0x02, 0x8a, 0x84, 0x85,
- 0xc0, 0x0c, 0x66, 0xcd,
- 0x01, 0x04, 0x02, 0xc6,
- 0x80, 0x00, 0x04, 0x16,
- 0x80, 0x00, 0x02, 0x15,
- 0x03, 0x0a, 0x82, 0x45,
- 0x40, 0x0a, 0x64, 0xa1,
- 0xe1, 0x04, 0x02, 0xc6,
- 0x85, 0x21, 0x04, 0x14,
- 0x80, 0x00, 0x04, 0x36,
- 0x02, 0xc6, 0x84, 0x26,
- 0x84, 0x14, 0xe1, 0x04,
- 0x40, 0x11, 0x84, 0x18,
- 0xc0, 0x2b, 0x65, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x05, 0x86,
- 0x88, 0x28, 0x88, 0x24,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x09, 0x0e, 0x0d,
- 0xc1, 0x18, 0x05, 0x46,
- 0xc0, 0x00, 0x04, 0x25,
- 0x81, 0xb0, 0x02, 0x14,
- 0x40, 0x00, 0x04, 0x29,
- 0x84, 0x04, 0x02, 0x10,
- 0xc4, 0x04, 0x04, 0x20,
- 0xc0, 0x0a, 0x42, 0x1a,
- 0x6e, 0x01, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xe1, 0x24, 0x01, 0x46,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x06, 0x04, 0x26,
- 0x84, 0x14, 0xe1, 0x14,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x94,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x24, 0x01, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x26, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x18, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0x25, 0x1b, 0xc0, 0x0b,
- 0xe1, 0x24, 0x03, 0x46,
- 0x82, 0x45, 0x84, 0x24,
- 0x42, 0x4a, 0x88, 0x18,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x0c, 0x0c, 0x83, 0x11,
- 0x23, 0xf8, 0xf2, 0xfc,
- 0x3e, 0x0e, 0xe0, 0x20,
- 0x88, 0x18, 0x8c, 0x0b,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x86, 0x08, 0x16,
- 0x75, 0x78, 0xe0, 0x0c,
- 0x81, 0x21, 0x68, 0x50,
- 0x61, 0x44, 0x10, 0xc6,
- 0xe1, 0x48, 0x53, 0x86,
- 0xff, 0xa1, 0x20, 0x04,
- 0xe1, 0x24, 0x57, 0x46,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x4e, 0x00,
- 0x80, 0xc5, 0xa1, 0x7b,
- 0x6f, 0xa9, 0x0c, 0x05,
- 0xa5, 0x0b, 0xc0, 0x0b,
- 0xa4, 0x04, 0x82, 0xd5,
- 0x94, 0x0d, 0x80, 0x00,
- 0x0c, 0x29, 0x84, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x02, 0x96,
- 0x68, 0x0c, 0x59, 0x28,
- 0x81, 0x95, 0x8c, 0x0b,
- 0x80, 0x08, 0xa0, 0x04,
- 0x01, 0x55, 0xc7, 0x07,
- 0xf0, 0x04, 0x4e, 0x00,
- 0xef, 0xfc, 0x52, 0xe8,
- 0x80, 0x04, 0xac, 0x04,
- 0xf8, 0x35, 0xa1, 0x0b,
- 0x83, 0x11, 0x3e, 0x04,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x20, 0x28,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x00, 0x36, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0x78, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x20,
- 0x3e, 0x0e, 0x81, 0x81,
- 0xe1, 0x24, 0x01, 0xc6,
- 0x55, 0x46, 0x00, 0x04,
- 0x80, 0x86, 0xe1, 0x24,
- 0x80, 0x64, 0xa8, 0x04,
- 0x8e, 0x0b, 0x00, 0x14,
- 0xe8, 0x20, 0x74, 0xa8,
- 0x43, 0xa6, 0x03, 0x91,
- 0x03, 0x21, 0xe0, 0x0c,
- 0x70, 0x38, 0x8e, 0x0b,
- 0x41, 0x86, 0xe8, 0x50,
- 0x80, 0x14, 0xe1, 0x14,
- 0x03, 0x46, 0x04, 0x8c,
- 0x84, 0x14, 0xe1, 0x24,
- 0xc4, 0x29, 0x84, 0x28,
- 0x43, 0x46, 0x04, 0x26,
- 0x04, 0x14, 0xe1, 0x18,
- 0x84, 0xb8, 0x83, 0x21,
- 0x02, 0xc6, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x24,
- 0x02, 0x86, 0x04, 0x96,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x00, 0x9c,
- 0xe8, 0x50, 0x6e, 0x88,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0xa9, 0x11,
- 0x8e, 0x0b, 0x00, 0x96,
- 0xe8, 0x20, 0x72, 0x08,
- 0x60, 0x0c, 0x02, 0x86,
- 0x6d, 0xb8, 0x81, 0x21,
- 0x8e, 0x0b, 0x68, 0x50,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0x52, 0x00, 0xc7, 0x07,
- 0x12, 0x0a, 0xf0, 0x04,
- 0x80, 0xc5, 0xfb, 0xfc,
- 0x6f, 0xa9, 0x0e, 0x05,
- 0xa3, 0x0b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x86, 0xb5,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x02, 0xa6,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0xe8, 0x0c, 0x50, 0xa8,
- 0x00, 0xc6, 0x81, 0x85,
- 0x80, 0x04, 0xe1, 0x44,
- 0xc7, 0x07, 0x80, 0x08,
- 0xf0, 0x04, 0x52, 0x00,
- 0x80, 0x04, 0xa8, 0x04,
- 0xf4, 0x45, 0x81, 0x6b,
- 0x8e, 0x0b, 0x2b, 0x11,
- 0xe8, 0x20, 0x6e, 0x08,
- 0x00, 0x14, 0xa8, 0x04,
- 0x6d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xc6, 0xe8, 0x20,
- 0x80, 0x04, 0xe1, 0x24,
- 0x41, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x18,
- 0x00, 0xc6, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x24,
- 0x01, 0x46, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x24,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xbe, 0x04, 0x83, 0x11,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x20, 0x16, 0x08,
- 0x70, 0x01, 0x00, 0x06,
- 0x02, 0x06, 0x40, 0x20,
- 0xff, 0xc0, 0x60, 0x01,
- 0xdd, 0x93, 0x80, 0x1e,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x81, 0x01, 0x04, 0x6b,
- 0x68, 0x20, 0x55, 0x08,
- 0x43, 0x86, 0x81, 0x11,
- 0x49, 0xc6, 0x61, 0x48,
- 0x04, 0x24, 0xe1, 0x48,
- 0x70, 0x01, 0x02, 0x06,
- 0x04, 0x34, 0xc0, 0x20,
- 0x88, 0x58, 0xa1, 0x8b,
- 0x08, 0x48, 0x90, 0x24,
- 0x60, 0x01, 0x04, 0x06,
- 0x0c, 0xc9, 0xff, 0xc0,
- 0x40, 0x2b, 0x6c, 0x19,
- 0xa6, 0x5f, 0x84, 0x3f,
- 0x60, 0xc7, 0xd0, 0x47,
- 0x46, 0x52, 0xa8, 0x5f,
- 0x0c, 0x49, 0xf9, 0xb0,
- 0xc0, 0x2c, 0x0c, 0xfd,
- 0xc0, 0xe0, 0x08, 0x44,
- 0x44, 0x22, 0x00, 0xb5,
- 0xa1, 0x7b, 0xd0, 0x90,
- 0x49, 0xfe, 0x80, 0xc5,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0xa4, 0x3f, 0x88, 0x3f,
- 0x83, 0x11, 0x04, 0x3e,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x20, 0x12, 0x08,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x50, 0x06, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0xa0,
- 0x40, 0x2d, 0x67, 0xcd,
- 0x20, 0x9e, 0x81, 0x91,
- 0xe1, 0x4c, 0x05, 0xc6,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xc0, 0x00, 0x00, 0x16,
- 0x0c, 0xf5, 0x4c, 0x01,
- 0x40, 0x06, 0x40, 0x2c,
- 0x80, 0x04, 0xe1, 0x4c,
- 0x88, 0x04, 0x80, 0x74,
- 0xe1, 0xe0, 0x16, 0x74,
- 0xe0, 0xe0, 0x14, 0xb4,
- 0xfc, 0xc0, 0x02, 0xa4,
- 0x00, 0x74, 0x00, 0x1e,
- 0x08, 0x14, 0xe1, 0xc0,
- 0xfc, 0xc4, 0x04, 0xa4,
- 0xf0, 0x10, 0x00, 0x0a,
- 0x94, 0x05, 0x84, 0x2e,
- 0xf0, 0x08, 0x00, 0x0a,
- 0x00, 0x0a, 0x98, 0x85,
- 0xaa, 0x65, 0xf0, 0x0c,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x40, 0x00, 0x13, 0x68,
- 0xc1, 0x4c, 0x17, 0xc6,
- 0x02, 0x56, 0x04, 0xab,
- 0x6e, 0xd8, 0xe0, 0x10,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x61, 0x98, 0x05, 0x46,
- 0xfb, 0x80, 0x00, 0x74,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x02, 0x06, 0x40, 0x20,
- 0xc0, 0x20, 0x73, 0x01,
- 0x40, 0x12, 0x20, 0x43,
- 0x20, 0x14, 0xf1, 0x80,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x84,
- 0xd5, 0x8e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x1f, 0x15, 0xf6, 0x15,
- 0x02, 0x56, 0x94, 0x2b,
- 0x8c, 0x0b, 0x60, 0x80,
- 0x68, 0x20, 0x6a, 0xa8,
- 0x0c, 0x0b, 0x84, 0x7b,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x17, 0xc6,
- 0x40, 0x00, 0xac, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xef, 0xf8, 0x7c, 0x08,
- 0x8e, 0x2b, 0x1b, 0xa5,
- 0x02, 0x56, 0x3e, 0x2e,
- 0x69, 0x38, 0xe0, 0x20,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x7b, 0x80, 0x00, 0x74,
- 0x72, 0xfc, 0x43, 0xc6,
- 0x40, 0x12, 0xc0, 0x20,
- 0x02, 0x46, 0x71, 0x80,
- 0xc0, 0x20, 0x72, 0xc0,
- 0x04, 0x10, 0x00, 0x34,
- 0x09, 0x91, 0xe4, 0x00,
- 0x17, 0xc6, 0x88, 0x11,
- 0x08, 0x3e, 0xe1, 0x4c,
- 0xe1, 0x98, 0x05, 0x46,
- 0x08, 0xca, 0x85, 0xa5,
- 0xec, 0x08, 0x0a, 0x40,
- 0x0a, 0x34, 0x77, 0x5d,
- 0x4a, 0x50, 0xe1, 0x90,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x80, 0x00, 0x08, 0x16,
- 0x66, 0x96, 0x48, 0x4a,
- 0x20, 0x74, 0xe1, 0x37,
- 0x46, 0xc0, 0x86, 0xc3,
- 0x41, 0xff, 0x73, 0xf1,
- 0xe1, 0x88, 0x0a, 0x44,
- 0x8a, 0xcb, 0x08, 0x01,
- 0x82, 0x7b, 0x0e, 0x33,
- 0x4d, 0xa4, 0x81, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xa1, 0xcb, 0xdd, 0xae,
- 0x00, 0x34, 0xfe, 0x75,
- 0xfb, 0x80, 0x18, 0x94,
- 0x88, 0xc3, 0x44, 0x57,
- 0x12, 0xc0, 0x0a, 0x13,
- 0xc5, 0x3e, 0xe4, 0x10,
- 0xf0, 0x3c, 0x48, 0x30,
- 0xf4, 0x95, 0xbf, 0x4b,
- 0x91, 0xf5, 0xbe, 0x24,
- 0x60, 0x40, 0x02, 0x56,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x4c, 0x91, 0xe8, 0x20,
- 0x40, 0x38, 0x64, 0xc5,
- 0x4a, 0x58, 0x8c, 0x0b,
- 0x45, 0xd8, 0xe8, 0x00,
- 0x0c, 0x0b, 0xef, 0xfc,
- 0x40, 0x15, 0x6e, 0x09,
- 0xff, 0xfc, 0x03, 0xee,
- 0xe8, 0x00, 0x0e, 0x0a,
- 0x42, 0x00, 0x82, 0x0f,
- 0x40, 0x00, 0x7c, 0x04,
- 0x4c, 0x13, 0xfd, 0x04,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x98, 0x03, 0x86,
- 0x4c, 0x03, 0x84, 0x9e,
- 0x40, 0x15, 0x6e, 0x09,
- 0xfb, 0x80, 0x00, 0x74,
- 0x62, 0xe5, 0x4c, 0xb1,
- 0x17, 0xc6, 0x40, 0x15,
- 0x8e, 0x05, 0xe1, 0x4c,
- 0x72, 0xfd, 0x49, 0xc6,
- 0x05, 0x46, 0x40, 0x20,
- 0x02, 0x06, 0xe1, 0x98,
- 0x40, 0x20, 0x73, 0x01,
- 0x20, 0x14, 0xa0, 0x43,
- 0xf1, 0x80, 0x40, 0x12,
- 0x85, 0x55, 0x88, 0x2a,
- 0x6c, 0x08, 0x0a, 0x40,
- 0x77, 0x5d, 0x80, 0x7b,
- 0xe1, 0x90, 0x0a, 0x34,
- 0x73, 0xfd, 0x4a, 0x50,
- 0x08, 0x16, 0x40, 0x0f,
- 0x48, 0x4a, 0x80, 0x00,
- 0xe1, 0x37, 0x66, 0x96,
- 0x4a, 0x30, 0x84, 0x33,
- 0x41, 0xff, 0x73, 0xf1,
- 0x06, 0x00, 0xc5, 0x47,
- 0x82, 0x53, 0x64, 0x10,
- 0x88, 0xcb, 0x01, 0x65,
- 0x18, 0xc0, 0x5d, 0x94,
- 0xd5, 0x9e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0xcb,
- 0xe0, 0x88, 0x0a, 0x44,
- 0x70, 0x94, 0x48, 0x02,
- 0xf0, 0x94, 0x40, 0x32,
- 0x48, 0x30, 0x90, 0x34,
- 0xbf, 0x4b, 0xf0, 0x3c,
- 0x0c, 0x19, 0xf6, 0x15,
- 0x40, 0x15, 0x62, 0x65,
- 0xe1, 0x4c, 0x00, 0x46,
- 0x88, 0x19, 0x80, 0x04,
- 0x44, 0x20, 0x80, 0x28,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x0c, 0x09, 0x80, 0x26,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x6c, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x45, 0x88,
- 0x00, 0x60, 0x20, 0x44,
- 0xc0, 0x54, 0x65, 0x01,
- 0x7b, 0x80, 0x04, 0x04,
- 0x19, 0x11, 0x81, 0x01,
- 0x72, 0xc1, 0x06, 0x46,
- 0x4f, 0x58, 0xc0, 0x20,
- 0x2c, 0x14, 0xe8, 0x00,
- 0x00, 0x2e, 0x9f, 0x21,
- 0x7c, 0x51, 0x4e, 0xa0,
- 0x84, 0x7e, 0xc3, 0x00,
- 0xef, 0xf8, 0x6d, 0xe8,
- 0xa9, 0x91, 0x0e, 0x2b,
- 0x60, 0x01, 0x02, 0x06,
- 0x00, 0x94, 0x7f, 0xc0,
- 0x2c, 0x24, 0xfb, 0x80,
- 0xa0, 0x1f, 0x84, 0x1f,
- 0x7c, 0x01, 0x40, 0x10,
- 0x88, 0x0e, 0xc3, 0x00,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x80, 0x95, 0xe0, 0x98,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0x8c, 0x0b, 0xdd, 0x93,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0xa5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0x86, 0x00, 0x6b,
- 0x80, 0x14, 0xe1, 0x48,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xbc,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0x7c, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0xef, 0xf8, 0x7a, 0x68,
- 0x83, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x22, 0x78, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0x08, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x61, 0x45, 0x00, 0x29,
- 0x0a, 0x00, 0x40, 0x15,
- 0xc0, 0xd9, 0x65, 0xc1,
- 0x62, 0x11, 0x00, 0x39,
- 0x91, 0xc1, 0x40, 0x15,
- 0x81, 0x71, 0x01, 0x61,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x1d, 0x00, 0x19,
- 0x40, 0x21, 0xc0, 0x15,
- 0x40, 0x15, 0x63, 0x09,
- 0x40, 0x31, 0x81, 0x21,
- 0xc0, 0x15, 0x63, 0x0d,
- 0x06, 0x10, 0x07, 0xc5,
- 0x0c, 0x4a, 0xe4, 0x40,
- 0x0c, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x0e, 0x06, 0x04, 0x10,
- 0x94, 0x84, 0x80, 0x00,
- 0x50, 0x0a, 0x51, 0x84,
- 0x82, 0x25, 0xe4, 0x9c,
- 0x6c, 0x34, 0x12, 0x80,
- 0x12, 0xda, 0xa1, 0x8b,
- 0x42, 0x0a, 0xe4, 0x08,
- 0x80, 0x95, 0xed, 0x80,
- 0x82, 0x61, 0x02, 0x71,
- 0xbf, 0x8b, 0x85, 0x05,
- 0xa1, 0x6b, 0x88, 0x25,
- 0x00, 0x95, 0x82, 0x45,
- 0xc0, 0x0d, 0x69, 0x6d,
- 0x12, 0xc0, 0x93, 0x6b,
- 0x40, 0x93, 0x84, 0x20,
- 0x80, 0x16, 0x0b, 0xe1,
- 0xf0, 0x3c, 0x52, 0x80,
- 0x02, 0xa5, 0xb9, 0x9b,
- 0x9b, 0x80, 0x18, 0xc4,
- 0xa1, 0x9b, 0x49, 0x87,
- 0x73, 0xfd, 0x50, 0x80,
- 0x18, 0xc4, 0x40, 0x0f,
- 0x50, 0x8a, 0xfb, 0x80,
- 0x90, 0xc3, 0xc6, 0xa6,
- 0x88, 0xc1, 0x7d, 0x05,
- 0xe5, 0xfc, 0x0d, 0x0a,
- 0x40, 0x23, 0xf0, 0xa5,
- 0x40, 0x0a, 0x68, 0x95,
- 0xfb, 0x80, 0x08, 0xc4,
- 0x68, 0x89, 0x40, 0x13,
- 0x88, 0x33, 0x40, 0x0a,
- 0x6f, 0xf1, 0x06, 0x8a,
- 0x0a, 0x34, 0x40, 0x2b,
- 0x00, 0x49, 0xfb, 0x80,
- 0x00, 0x2d, 0x07, 0xcd,
- 0x40, 0x13, 0x88, 0x11,
- 0x40, 0x0a, 0x68, 0x8d,
- 0xec, 0x04, 0x02, 0x30,
- 0x68, 0x91, 0x40, 0x33,
- 0x06, 0x06, 0x40, 0x0a,
- 0xc0, 0x20, 0x70, 0x01,
- 0x68, 0x85, 0x40, 0x13,
- 0x02, 0x14, 0x40, 0x0a,
- 0x48, 0x40, 0xfb, 0x80,
- 0xa6, 0x1f, 0x1c, 0x20,
- 0x07, 0xcd, 0x40, 0x41,
- 0x00, 0x45, 0x80, 0x2d,
- 0xc0, 0x0d, 0x69, 0x69,
- 0x64, 0xf9, 0x40, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x89, 0x41, 0x09, 0x5b,
- 0x0e, 0x09, 0x00, 0x2b,
- 0x40, 0x43, 0xc0, 0x15,
- 0xc0, 0x0a, 0x68, 0x81,
- 0x12, 0xfd, 0x44, 0x20,
- 0x40, 0x23, 0xc0, 0xff,
- 0x40, 0x15, 0x0e, 0x09,
- 0xe1, 0x40, 0x04, 0x46,
- 0x00, 0x86, 0x08, 0x24,
- 0x88, 0x1e, 0xe1, 0x40,
- 0x80, 0x1e, 0x80, 0x04,
- 0xf0, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x98, 0x0b, 0x46,
- 0xe0, 0x90, 0x0c, 0x14,
- 0x4e, 0x00, 0x14, 0xca,
- 0x0c, 0x64, 0xf0, 0x3c,
- 0xa1, 0x0b, 0x7b, 0x80,
- 0x00, 0x16, 0x2e, 0x6f,
- 0x58, 0x22, 0x80, 0x00,
- 0x40, 0x1a, 0x71, 0xb0,
- 0x04, 0xc4, 0xe6, 0x82,
- 0x02, 0xc4, 0x60, 0xc0,
- 0x24, 0x6f, 0xfb, 0x80,
- 0x49, 0x6e, 0x86, 0x2b,
- 0x94, 0x5a, 0xc5, 0x07,
- 0x02, 0x00, 0x02, 0x53,
- 0x4a, 0x50, 0xe4, 0x04,
- 0xc1, 0xff, 0x73, 0xf1,
- 0x8a, 0x43, 0x01, 0x65,
- 0x00, 0x00, 0x51, 0x54,
- 0xc9, 0x5e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x0b,
- 0x40, 0x32, 0xc4, 0x17,
- 0x0c, 0x0c, 0xf0, 0x84,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x36, 0x6e, 0x01,
- 0x40, 0x60, 0xa3, 0x0b,
- 0x4f, 0x78, 0x9c, 0x00,
- 0x41, 0x06, 0x88, 0x00,
- 0x02, 0x96, 0x61, 0x34,
- 0x00, 0x04, 0xe0, 0x04,
- 0xe1, 0xa0, 0x50, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x71, 0x40, 0x2b,
- 0x00, 0x16, 0xa0, 0x7e,
- 0x0c, 0x0b, 0x81, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x67, 0xb8, 0x81, 0x01,
- 0x7e, 0x0e, 0xe8, 0x1c,
- 0xe1, 0x48, 0x41, 0x86,
- 0x41, 0xc6, 0x00, 0x14,
- 0xfc, 0x1e, 0xe1, 0x48,
- 0x80, 0x04, 0x84, 0x18,
- 0x0c, 0x29, 0x80, 0x08,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x68, 0x89, 0x0c, 0x0b,
- 0x06, 0x04, 0x40, 0x0a,
- 0x02, 0x29, 0xe0, 0xa0,
- 0x3e, 0x3e, 0xa6, 0x1f,
- 0x24, 0x1f, 0xf0, 0x27,
- 0x4c, 0x15, 0xc5, 0x07,
- 0x40, 0x02, 0x68, 0x01,
- 0x64, 0x31, 0x06, 0x60,
- 0x83, 0x11, 0xc0, 0x28,
- 0x46, 0x75, 0xc1, 0x1d,
- 0x02, 0x10, 0x58, 0x04,
- 0x7e, 0x75, 0xc4, 0x04,
- 0xc4, 0x10, 0x06, 0x30,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x08, 0x60, 0x40, 0x1c,
- 0xc0, 0xd9, 0x66, 0x01,
- 0x65, 0xc1, 0x0a, 0x60,
- 0x81, 0xb1, 0x40, 0xd9,
- 0xbc, 0x0e, 0x81, 0xa1,
- 0xf8, 0x04, 0x46, 0x05,
- 0x09, 0x0e, 0xa0, 0x04,
- 0xe1, 0x98, 0x01, 0x46,
- 0x81, 0x01, 0x00, 0x9a,
- 0x14, 0x4a, 0x8b, 0x85,
- 0x14, 0x1a, 0xe0, 0x00,
- 0x40, 0x0a, 0xf8, 0x7c,
- 0x0a, 0x50, 0xe1, 0x84,
- 0x16, 0x06, 0x04, 0x10,
- 0x94, 0x14, 0x80, 0x00,
- 0x42, 0x0a, 0x51, 0x14,
- 0x90, 0xe5, 0xe4, 0xac,
- 0x84, 0x25, 0xa1, 0xab,
- 0x69, 0x6d, 0x0c, 0x25,
- 0x85, 0xab, 0xc0, 0x0d,
- 0x08, 0x91, 0x0c, 0x0b,
- 0x40, 0x00, 0x80, 0x0a,
- 0x80, 0xff, 0x13, 0xf1,
- 0x90, 0x98, 0x40, 0x02,
- 0x06, 0x00, 0x0e, 0xa5,
- 0x80, 0x28, 0x04, 0x01,
- 0xec, 0x34, 0x04, 0x10,
- 0x80, 0xb5, 0xe4, 0x2d,
- 0xbf, 0x1b, 0x4d, 0x1e,
- 0x87, 0x25, 0x8a, 0xd5,
- 0x8a, 0x65, 0xa1, 0x1b,
- 0x70, 0x3c, 0x58, 0x10,
- 0xe1, 0xc0, 0x04, 0x14,
- 0xb9, 0xcb, 0x0c, 0x1e,
- 0x84, 0x8b, 0x01, 0x71,
- 0x49, 0x17, 0x82, 0x45,
- 0x4e, 0x10, 0xa1, 0xcb,
- 0x40, 0x0f, 0x73, 0xfd,
- 0x4e, 0x7a, 0x80, 0x8b,
- 0xc5, 0x77, 0xc6, 0xb2,
- 0x92, 0x23, 0x09, 0x14,
- 0x73, 0xf1, 0x40, 0x20,
- 0x88, 0x31, 0x41, 0xff,
- 0x02, 0x03, 0x86, 0x2b,
- 0x81, 0xa5, 0x8e, 0x1b,
- 0x02, 0x10, 0x21, 0x8b,
- 0x00, 0xc5, 0xec, 0x04,
- 0x88, 0x01, 0x00, 0x00,
- 0x00, 0x00, 0x44, 0xc5,
- 0xa1, 0x1b, 0x88, 0x21,
- 0x44, 0x77, 0xfc, 0xd5,
- 0x8e, 0x33, 0x90, 0x0b,
- 0x82, 0xa1, 0x02, 0xb1,
- 0xe5, 0xfc, 0x15, 0x0a,
- 0x9d, 0x01, 0xe8, 0xe5,
- 0x9f, 0x01, 0x0c, 0x0e,
- 0xbc, 0x04, 0x8e, 0x0e,
- 0xfc, 0x04, 0xcc, 0x0e,
- 0x0c, 0x19, 0x80, 0x08,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf0, 0x17, 0xbe, 0x24,
- 0xa2, 0x0f, 0xa4, 0x0f,
- 0x68, 0x01, 0x4c, 0x05,
- 0x8c, 0x0b, 0x40, 0x02,
- 0xe8, 0x10, 0x4a, 0xc8,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x80, 0x18, 0x82, 0x65,
- 0x42, 0x10, 0x80, 0x28,
- 0x44, 0x20, 0xf0, 0x80,
- 0xa2, 0x2f, 0xf3, 0x7c,
- 0xf8, 0x80, 0x42, 0x20,
- 0x7e, 0x04, 0x80, 0x16,
- 0x5b, 0xb8, 0x83, 0x11,
- 0x01, 0x86, 0xe8, 0x1c,
- 0x80, 0x04, 0xe1, 0x98,
- 0x0c, 0x0b, 0xa3, 0x0b,
- 0x80, 0x15, 0x0e, 0x09,
- 0x9c, 0xa4, 0x00, 0x04,
- 0x0e, 0x09, 0x4c, 0x03,
- 0x80, 0x85, 0x80, 0x15,
- 0x68, 0x00, 0x49, 0xc8,
- 0x03, 0x01, 0x8c, 0x0b,
- 0x45, 0x18, 0x81, 0x11,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0x1c, 0x38, 0xf2, 0x7c,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x63, 0x09, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x15,
- 0x00, 0xc9, 0x91, 0x15,
- 0x40, 0x36, 0x6e, 0x09,
- 0xfa, 0x80, 0x08, 0x24,
- 0x63, 0x0d, 0x00, 0x69,
- 0x46, 0x02, 0x40, 0x15,
- 0x06, 0x59, 0xf0, 0x90,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x58, 0x6a, 0xa1, 0xcb,
- 0x0c, 0x30, 0x66, 0x92,
- 0xc0, 0xdb, 0x66, 0x10,
- 0x6e, 0x11, 0x46, 0x51,
- 0x86, 0x45, 0xc0, 0x36,
- 0x7a, 0x80, 0x0e, 0xc4,
- 0x12, 0x84, 0x81, 0x81,
- 0xcb, 0x9d, 0xfa, 0x80,
- 0x54, 0x92, 0x84, 0x05,
- 0x56, 0x02, 0xf0, 0x9c,
- 0x16, 0xb9, 0xf0, 0xa8,
- 0xc0, 0x1a, 0x6e, 0x41,
- 0x7c, 0x85, 0xb9, 0xbb,
- 0x84, 0x04, 0x10, 0x80,
- 0x94, 0xcb, 0x32, 0x53,
- 0x81, 0x45, 0x98, 0x56,
- 0x81, 0x71, 0x0b, 0x9b,
- 0x0a, 0x8a, 0x80, 0xa5,
- 0x83, 0x71, 0x74, 0x08,
- 0x18, 0x76, 0x80, 0x75,
- 0x18, 0xc4, 0x8e, 0x5b,
- 0x0c, 0x00, 0x7a, 0x80,
- 0xc0, 0x58, 0x66, 0x40,
- 0x60, 0x88, 0x0e, 0xc4,
- 0xe0, 0x88, 0x12, 0x44,
- 0x7c, 0x1c, 0x0c, 0x85,
- 0x66, 0x10, 0x14, 0x00,
- 0x14, 0x93, 0xc0, 0xdb,
- 0x0a, 0x0a, 0x8c, 0x73,
- 0x82, 0x21, 0x7b, 0xfc,
- 0xe0, 0x40, 0x52, 0x85,
- 0xe8, 0x00, 0x0e, 0x85,
- 0x62, 0x40, 0x52, 0x85,
- 0xe0, 0x84, 0x10, 0xc4,
- 0x64, 0x00, 0x0e, 0x75,
- 0x18, 0x63, 0x8c, 0x83,
- 0xd0, 0x80, 0x58, 0xc2,
- 0x61, 0x40, 0x52, 0x75,
- 0xe0, 0x84, 0x12, 0x44,
- 0x68, 0x01, 0x10, 0x7b,
- 0x94, 0x93, 0x40, 0x01,
- 0x52, 0x73, 0x88, 0xa3,
- 0x10, 0x7b, 0xe6, 0x80,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xe7, 0x80, 0x52, 0x73,
- 0x60, 0x01, 0x0c, 0x79,
- 0x54, 0x71, 0xc0, 0x04,
- 0xc0, 0x01, 0x61, 0x01,
- 0x64, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0xc0, 0x01, 0x62, 0x01,
- 0x68, 0x01, 0x0c, 0x49,
- 0x54, 0x41, 0xc0, 0x04,
- 0x40, 0x01, 0x63, 0x01,
- 0x18, 0x49, 0x81, 0x41,
- 0xc0, 0x1a, 0x0e, 0x41,
- 0x62, 0x11, 0x46, 0x41,
- 0x44, 0x8a, 0xc0, 0x38,
- 0xde, 0xd5, 0xf4, 0x04,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x1c, 0x50, 0xc8,
- 0x0c, 0x1b, 0x81, 0x11,
- 0x40, 0x0a, 0x68, 0x91,
- 0x00, 0x60, 0x80, 0x7b,
- 0x40, 0x28, 0x64, 0x01,
- 0x70, 0x01, 0x04, 0x06,
- 0x88, 0x11, 0xc0, 0x20,
- 0xc5, 0x17, 0x01, 0x65,
- 0x02, 0x10, 0x41, 0x34,
- 0xc9, 0x3e, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x1b,
- 0x61, 0x48, 0x41, 0x86,
- 0x80, 0x04, 0x8c, 0x2b,
- 0xe0, 0x19, 0x80, 0x18,
- 0x83, 0x01, 0x00, 0x16,
- 0x6f, 0xf8, 0x79, 0x88,
- 0x50, 0xd8, 0x81, 0x11,
- 0x7d, 0x18, 0xef, 0xf8,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x61, 0x8d, 0x0c, 0x0b,
- 0x83, 0x11, 0x40, 0x1c,
- 0x4c, 0x03, 0x82, 0x01,
- 0x40, 0x1c, 0x61, 0x8d,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x0d, 0xb8, 0xf2, 0x84,
- 0xc1, 0xc3, 0xe0, 0x1c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x43, 0x86, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x48,
- 0xe0, 0x98, 0x06, 0x04,
- 0xf1, 0x00, 0x46, 0x30,
- 0x44, 0x20, 0x84, 0x28,
- 0x26, 0x2f, 0xf2, 0xfc,
- 0xe1, 0x98, 0x07, 0x86,
- 0x0c, 0x0e, 0x84, 0x26,
- 0x0c, 0x1b, 0x82, 0x09,
- 0x40, 0x15, 0x6e, 0x09,
- 0x42, 0x10, 0xd0, 0x07,
- 0xc0, 0xfe, 0x73, 0xfd,
- 0x4c, 0x13, 0xa0, 0x1f,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xef, 0xf8, 0x4d, 0xc8,
- 0x81, 0x11, 0x01, 0x01,
- 0x0c, 0x0c, 0x8c, 0x2b,
- 0x35, 0xd8, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xe1, 0x00, 0x01, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xc7, 0x13, 0xc1, 0x83,
- 0x00, 0x0c, 0xdd, 0x93,
- 0xc0, 0x00, 0x61, 0x01,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x82, 0x8b, 0x04, 0x7b,
- 0x65, 0x39, 0x4c, 0x01,
- 0x04, 0x60, 0x40, 0x2c,
- 0xc0, 0xb1, 0x65, 0x41,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x42, 0x88,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xe8, 0x00, 0x4e, 0x28,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x68, 0x48, 0x59, 0x88,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x45, 0x76, 0x01, 0x11,
- 0x09, 0x31, 0xe0, 0x00,
- 0x5d, 0x58, 0x8c, 0x0b,
- 0xa3, 0x8b, 0xe8, 0x48,
- 0xa1, 0x0b, 0xfc, 0xb5,
- 0x0c, 0x0b, 0xfc, 0x75,
- 0x52, 0x38, 0x8e, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x01, 0x11, 0xfa, 0xb5,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xb1, 0x45,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0xc0, 0x1e, 0xf0,
- 0x60, 0x04, 0x46, 0x86,
- 0x40, 0x31, 0xa5, 0x1b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x0e, 0x06,
- 0xa1, 0x81, 0x0e, 0xa5,
- 0xaa, 0x35, 0xa3, 0x1b,
- 0x60, 0x0c, 0x41, 0xe6,
- 0xe0, 0x0c, 0x59, 0xe6,
- 0x01, 0xa6, 0x17, 0x0e,
- 0x11, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0x26,
- 0x01, 0x86, 0x0f, 0x0e,
- 0x15, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x00, 0x06,
- 0xa1, 0x01, 0x0b, 0x0e,
- 0x00, 0x06, 0x09, 0x0e,
- 0x7e, 0x0e, 0xe0, 0x04,
- 0x7c, 0x0e, 0xa1, 0x01,
- 0xe0, 0x04, 0x01, 0x86,
- 0x01, 0x86, 0x0d, 0x0e,
- 0x3e, 0x0e, 0xe0, 0x04,
- 0xe0, 0x04, 0x01, 0xa6,
- 0x49, 0xf6, 0x3c, 0x0e,
- 0x4b, 0xa6, 0xe0, 0x0c,
- 0x03, 0xa6, 0x60, 0x0c,
- 0x07, 0x06, 0xe0, 0x0c,
- 0x11, 0x06, 0x60, 0x04,
- 0x0d, 0xa6, 0xe0, 0x04,
- 0x13, 0xa6, 0x60, 0x04,
- 0x0f, 0xa6, 0xe0, 0x0c,
- 0x55, 0xa6, 0x60, 0x0c,
- 0x13, 0xce, 0xe0, 0x0c,
- 0xe0, 0x0c, 0x41, 0xe6,
- 0x57, 0xf6, 0x05, 0x95,
- 0x00, 0x06, 0xe0, 0x0c,
- 0x89, 0x11, 0x60, 0x08,
- 0x91, 0x01, 0x13, 0x0e,
- 0x40, 0x06, 0x17, 0x0e,
- 0x0d, 0x0e, 0xe0, 0x00,
- 0x15, 0x0e, 0x85, 0x01,
- 0x0b, 0x0e, 0x83, 0x01,
- 0x09, 0x0e, 0x81, 0x01,
- 0x7e, 0x0e, 0xa1, 0x01,
- 0x7c, 0x0e, 0x83, 0x01,
- 0x0f, 0x0e, 0x81, 0x01,
- 0x11, 0x0e, 0x85, 0x01,
- 0x3e, 0x0e, 0x81, 0x01,
- 0xe0, 0x00, 0x40, 0x06,
- 0x81, 0x31, 0x3c, 0x0e,
- 0x81, 0x91, 0x01, 0x61,
- 0x14, 0x06, 0x01, 0x51,
- 0x01, 0x01, 0xe0, 0x04,
- 0x16, 0x06, 0x81, 0x41,
- 0x81, 0xc1, 0xe0, 0x08,
- 0x8b, 0xc4, 0x88, 0xc6,
- 0x89, 0xc4, 0x8a, 0xc6,
- 0xfe, 0xc4, 0xc8, 0xc6,
- 0xfc, 0xc4, 0xca, 0xc6,
- 0xe0, 0x18, 0x44, 0x81,
- 0xe0, 0x14, 0x44, 0x31,
- 0xe0, 0x10, 0x44, 0xc1,
- 0xe0, 0x1c, 0x44, 0x31,
- 0xe0, 0x20, 0x44, 0x31,
- 0x44, 0x31, 0x95, 0x34,
- 0x8f, 0x34, 0xe0, 0x24,
- 0xe0, 0x28, 0x44, 0x31,
- 0x44, 0x31, 0x8d, 0x34,
- 0x91, 0x34, 0xe0, 0x2c,
- 0xe0, 0x30, 0x44, 0x31,
- 0x44, 0x31, 0xbe, 0x34,
- 0xbc, 0x34, 0xe0, 0x34,
- 0xe0, 0x3c, 0x44, 0x61,
- 0xe0, 0x40, 0x44, 0x61,
- 0xe0, 0x38, 0x44, 0x31,
- 0xe0, 0x48, 0x44, 0x91,
- 0xe0, 0x4c, 0x44, 0x71,
- 0xe0, 0x44, 0x44, 0x11,
- 0xe0, 0x50, 0x44, 0x11,
- 0xe0, 0x58, 0x44, 0xa1,
- 0xe0, 0x54, 0x44, 0x51,
- 0xe0, 0x5c, 0x44, 0x51,
- 0xe0, 0x60, 0x44, 0x51,
- 0xe0, 0x68, 0x44, 0x01,
- 0x44, 0x01, 0x93, 0x04,
- 0x97, 0x04, 0xe0, 0x6c,
- 0xe0, 0x78, 0x44, 0xb1,
- 0xe0, 0x74, 0x44, 0x41,
- 0xe0, 0x64, 0x44, 0x01,
- 0xe0, 0x70, 0x44, 0x01,
- 0xe0, 0x7c, 0x44, 0x41,
- 0xe0, 0xf1, 0x01, 0x01,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x90, 0x1e, 0xf0,
- 0x80, 0x6b, 0x25, 0x1b,
- 0x81, 0x01, 0x04, 0x25,
- 0x92, 0x95, 0xa3, 0x1b,
- 0x65, 0x41, 0x02, 0x60,
- 0x8c, 0x0b, 0x40, 0xb1,
- 0xe8, 0x48, 0x62, 0xe8,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x4c, 0x01, 0x83, 0x01,
- 0xc0, 0x2c, 0x65, 0x39,
- 0x42, 0x86, 0x87, 0xe5,
- 0x04, 0x06, 0x60, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x60, 0x11, 0x02, 0x06,
- 0x3e, 0x1e, 0xc4, 0x00,
- 0x09, 0x1c, 0x83, 0x11,
- 0x15, 0x16, 0xa1, 0x11,
- 0xe0, 0x00, 0x42, 0x06,
- 0x85, 0x71, 0x1f, 0x16,
- 0x89, 0x11, 0x25, 0x16,
- 0x31, 0x16, 0xab, 0x16,
- 0xaf, 0x26, 0x91, 0x11,
- 0x04, 0x06, 0x35, 0x26,
- 0x97, 0x06, 0xe0, 0x08,
- 0x9b, 0x76, 0x99, 0x06,
- 0xa1, 0x76, 0x9d, 0x06,
- 0xa7, 0x06, 0xa3, 0x06,
- 0xad, 0x06, 0xa9, 0x06,
- 0xb7, 0x06, 0xb3, 0x06,
- 0xbb, 0x16, 0xb9, 0x06,
- 0x60, 0x80, 0x5e, 0x11,
- 0xe4, 0x10, 0x02, 0xf0,
- 0xbf, 0x26, 0xbd, 0x06,
- 0xe0, 0x84, 0x5e, 0x01,
- 0x60, 0x8c, 0x5e, 0x01,
- 0x5e, 0x21, 0x8c, 0x0b,
- 0x5e, 0xf8, 0xe0, 0x88,
- 0xa1, 0x0b, 0xe8, 0x48,
- 0x4c, 0x71, 0x80, 0xb5,
- 0xc0, 0x2c, 0x65, 0x39,
- 0xc8, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfe, 0x7c, 0x04, 0xcc,
- 0x80, 0x6b, 0x02, 0x7b,
- 0x64, 0x90, 0x02, 0xf0,
- 0xe4, 0x80, 0x04, 0xf0,
- 0xe8, 0x10, 0x49, 0x68,
- 0x60, 0x90, 0x1e, 0x89,
- 0xe0, 0x04, 0x0e, 0x2a,
- 0xe0, 0x80, 0x1e, 0x79,
- 0x40, 0x01, 0x01, 0x88,
- 0x04, 0x60, 0xc0, 0x00,
- 0x40, 0xb1, 0x65, 0xc1,
- 0x01, 0x55, 0x99, 0x31,
- 0x49, 0x16, 0x81, 0x11,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x65, 0xf1, 0x04, 0x60,
- 0x9d, 0x31, 0x40, 0xb1,
- 0x49, 0x1c, 0x81, 0x45,
- 0xec, 0x04, 0x06, 0x30,
- 0xfe, 0x95, 0xa1, 0x3b,
- 0x15, 0xc6, 0x01, 0x91,
- 0x07, 0x85, 0xea, 0xf0,
- 0xa1, 0x0b, 0x81, 0xb1,
- 0x40, 0x62, 0x8e, 0x15,
- 0x04, 0x74, 0x70, 0xa8,
- 0x00, 0x9c, 0xfa, 0x80,
- 0xe0, 0x90, 0x00, 0x84,
- 0x79, 0x9c, 0x42, 0x02,
- 0xf0, 0xac, 0x40, 0x62,
- 0x6e, 0xf1, 0x40, 0x11,
- 0x43, 0xf6, 0x40, 0x2b,
- 0x80, 0x00, 0x40, 0x0d,
- 0x60, 0x31, 0x40, 0x91,
- 0x40, 0x11, 0xc0, 0x2c,
- 0x80, 0x2c, 0x42, 0xb1,
- 0x43, 0xf1, 0x40, 0x11,
- 0x02, 0xb4, 0x00, 0x2c,
- 0x40, 0x91, 0xfa, 0x80,
- 0x00, 0x2c, 0x41, 0x71,
- 0x4f, 0x58, 0x8c, 0x0b,
- 0x1e, 0x89, 0xe8, 0x00,
- 0x00, 0x80, 0x60, 0x90,
- 0x02, 0x04, 0xe4, 0x04,
- 0x82, 0xb1, 0x7a, 0x80,
- 0x04, 0x80, 0x84, 0xa1,
- 0x43, 0x4a, 0xe4, 0x24,
- 0x02, 0x0c, 0xe4, 0x08,
- 0x50, 0x00, 0x62, 0x00,
- 0x02, 0x73, 0xdc, 0x00,
- 0x17, 0x0a, 0x81, 0x01,
- 0xf2, 0x05, 0xe5, 0x3c,
- 0xf6, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xee, 0x50, 0x1e, 0xf0,
- 0xa1, 0x1b, 0x00, 0x6b,
- 0x65, 0x39, 0x0c, 0x09,
- 0x84, 0x8b, 0x40, 0x2c,
- 0x42, 0x66, 0x8a, 0x25,
- 0xa5, 0x0b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x81, 0x91, 0x40, 0x2b,
- 0x81, 0xb1, 0x02, 0xc5,
- 0x8c, 0x0b, 0x05, 0x11,
- 0xef, 0xfc, 0x72, 0x68,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0xc0, 0x00, 0x0b, 0xa8,
- 0x68, 0x04, 0x54, 0x48,
- 0x80, 0xbb, 0x8c, 0x0b,
- 0xe4, 0x40, 0x10, 0x8a,
- 0xa1, 0xbb, 0xa2, 0x75,
- 0x0c, 0x29, 0xa2, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x04, 0x63, 0xe8,
- 0x56, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x9e, 0xd5, 0x81, 0x81,
- 0x23, 0x0b, 0x95, 0x25,
- 0xe0, 0x04, 0x40, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x82, 0x05, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xfc, 0x70, 0x08,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x00, 0xc6, 0xa4, 0x95,
- 0x02, 0xf0, 0x60, 0x08,
- 0x01, 0x55, 0xe4, 0x20,
- 0x45, 0xb6, 0x81, 0xb1,
- 0xec, 0x04, 0x00, 0x00,
- 0xfe, 0x95, 0xa1, 0x0b,
- 0x10, 0x60, 0x01, 0x01,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x15, 0x06, 0x3c, 0x0e,
- 0x89, 0x55, 0xe0, 0x04,
- 0x78, 0x81, 0x10, 0x09,
- 0x95, 0x11, 0x40, 0x01,
- 0x61, 0x90, 0x12, 0x04,
- 0x42, 0x9a, 0x9e, 0x09,
- 0x82, 0x03, 0xe6, 0x86,
- 0xe6, 0x30, 0x01, 0x0a,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xb7, 0x1b, 0x84, 0x14,
- 0x0c, 0x29, 0x82, 0xf5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x03, 0x36,
- 0x68, 0x04, 0x5f, 0xa8,
- 0x0f, 0x36, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xe0, 0x08, 0x00, 0xc6,
- 0xa1, 0xbb, 0x88, 0x05,
- 0x4e, 0xb0, 0x06, 0xd5,
- 0x20, 0x18, 0xdc, 0x00,
- 0xe4, 0x20, 0x04, 0xf0,
- 0x61, 0x40, 0x14, 0x0a,
- 0x88, 0x16, 0x80, 0x23,
- 0x00, 0x04, 0x5e, 0x95,
- 0x80, 0x00, 0x0e, 0x06,
- 0x80, 0x00, 0x5e, 0x95,
- 0x3e, 0x04, 0x82, 0xc5,
- 0x00, 0x04, 0x81, 0x71,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbe, 0x0e, 0xfb, 0x80,
- 0x00, 0x04, 0xbc, 0x04,
- 0x40, 0x92, 0xfa, 0x80,
- 0xbc, 0x0e, 0xfa, 0x80,
- 0x6c, 0x04, 0x14, 0xa0,
- 0x8e, 0xbb, 0x82, 0x81,
- 0xee, 0x75, 0xa1, 0xab,
- 0x8c, 0xf5, 0xa1, 0xbb,
- 0x00, 0x04, 0xbc, 0x04,
- 0xc4, 0x07, 0xfa, 0x80,
- 0x0e, 0x00, 0x3e, 0x04,
- 0x12, 0x04, 0xe4, 0x10,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0x68, 0x00, 0x54, 0xa8,
- 0x03, 0xd5, 0xc4, 0x97,
- 0xa1, 0xbb, 0x80, 0xbb,
- 0x40, 0xf6, 0x88, 0xd5,
- 0x40, 0x00, 0x61, 0xa1,
- 0x81, 0xb5, 0x81, 0x11,
- 0x60, 0x80, 0x42, 0x0a,
- 0x10, 0x29, 0x90, 0x2b,
- 0x06, 0xf0, 0x5c, 0x00,
- 0x02, 0x33, 0xe4, 0x20,
- 0x8c, 0x26, 0x82, 0x11,
- 0xe2, 0x30, 0x02, 0x0a,
- 0x0c, 0x0b, 0xfc, 0x95,
- 0x4b, 0x58, 0x90, 0x1b,
- 0x00, 0xbb, 0xe8, 0x04,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x82, 0x75, 0xa1, 0xbb,
- 0x7a, 0x80, 0x02, 0x94,
- 0xfa, 0x80, 0x04, 0x74,
- 0x64, 0x20, 0x06, 0xf0,
- 0x49, 0x98, 0x8c, 0x0b,
- 0x80, 0xbb, 0xe8, 0x48,
- 0x1e, 0xf0, 0x16, 0x0b,
- 0x0c, 0x0c, 0xe6, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x82, 0x8b, 0x00, 0x9b,
- 0x0c, 0x90, 0x7c, 0x2e,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xf0, 0xa0, 0x54, 0x62,
- 0xe2, 0x80, 0x14, 0x19,
- 0xe8, 0x00, 0x4c, 0x88,
- 0x80, 0x7b, 0x42, 0x87,
- 0x67, 0xc0, 0x00, 0xa0,
- 0x3c, 0x6e, 0x90, 0x63,
- 0x65, 0x45, 0x12, 0x90,
- 0x3e, 0x0e, 0xc0, 0xb1,
- 0x01, 0xa1, 0x81, 0xb1,
- 0x05, 0x55, 0x81, 0x81,
- 0xfc, 0x24, 0x81, 0x61,
- 0xf8, 0x04, 0x12, 0x09,
- 0x44, 0x0a, 0xa4, 0x18,
- 0xd0, 0x07, 0xe0, 0x80,
- 0x48, 0x00, 0x4d, 0x08,
- 0x0e, 0x0f, 0xa2, 0x0f,
- 0xfb, 0x80, 0x02, 0x64,
- 0x82, 0x45, 0x83, 0x0b,
- 0x10, 0x84, 0x03, 0x11,
- 0x14, 0xa4, 0xfa, 0x80,
- 0xb7, 0x1f, 0x7b, 0x80,
- 0x82, 0x81, 0x22, 0xaf,
- 0x3f, 0xbb, 0x80, 0x6b,
- 0x1e, 0x05, 0x82, 0xb1,
- 0x84, 0x91, 0x00, 0x04,
- 0x80, 0x00, 0x40, 0x81,
- 0x80, 0x00, 0x1e, 0x05,
- 0x80, 0x00, 0x40, 0xa3,
- 0xe0, 0x40, 0x16, 0x0a,
- 0x01, 0x01, 0xf6, 0x75,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xe5, 0x7c, 0x03, 0x0a,
- 0x04, 0x14, 0x82, 0xb5,
- 0x8e, 0x19, 0x61, 0x8c,
- 0x00, 0x09, 0x84, 0x03,
- 0xc0, 0x2c, 0x65, 0xc1,
- 0xe4, 0x84, 0x40, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0x5d, 0x93, 0xdd, 0x93,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x64, 0x71, 0x00, 0x00,
- 0x04, 0x14, 0x40, 0xaf,
- 0x00, 0x0b, 0xe0, 0x84,
- 0x80, 0x13, 0x7c, 0x08,
- 0xe5, 0x00, 0x02, 0x19,
- 0x68, 0x4c, 0x68, 0x28,
- 0xd0, 0x07, 0x82, 0x11,
- 0xf2, 0x00, 0x08, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0x9b, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0xab, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0x9b, 0x88, 0x25,
- 0xa1, 0xab, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x50, 0x68,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x45, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe0, 0x2a, 0x40, 0x0a,
- 0xe0, 0x26, 0x42, 0x1a,
- 0xe6, 0xa2, 0x40, 0x0a,
- 0xe0, 0x26, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x6c, 0x59, 0x00, 0x19,
- 0x82, 0xab, 0x40, 0x2b,
- 0x88, 0x7b, 0x0a, 0x6b,
- 0x84, 0x9b, 0x06, 0x8b,
- 0x81, 0x11, 0x23, 0x1b,
- 0xa1, 0xab, 0x86, 0xe5,
- 0xa1, 0x9b, 0x80, 0xa5,
- 0xa1, 0x8b, 0x80, 0x65,
- 0x00, 0x29, 0x82, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x68, 0x04, 0x4d, 0x28,
- 0xe0, 0x08, 0x56, 0x96,
- 0x84, 0x05, 0xa3, 0x0b,
- 0xe0, 0x22, 0x40, 0x7a,
- 0xe1, 0x22, 0x42, 0x7a,
- 0xe1, 0x26, 0x40, 0x0a,
- 0xe1, 0x2a, 0x42, 0x1a,
- 0xe6, 0xaa, 0x40, 0x0a,
- 0x02, 0x02, 0x82, 0x03,
- 0x18, 0x16, 0xef, 0xfc,
- 0x96, 0x0b, 0x81, 0xb1,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x90, 0x04, 0x14,
- 0x44, 0x2a, 0xa9, 0x31,
- 0x06, 0x14, 0x66, 0x8e,
- 0x8e, 0x39, 0xe1, 0x84,
- 0x81, 0x21, 0x04, 0x03,
- 0x81, 0x31, 0x06, 0x03,
- 0x00, 0x00, 0x01, 0xe5,
- 0xc0, 0x9c, 0x67, 0x81,
- 0x70, 0x14, 0x00, 0x49,
- 0xe0, 0x80, 0x42, 0x0a,
- 0xc1, 0x90, 0x08, 0x44,
- 0x25, 0x4f, 0x9e, 0x49,
- 0xa8, 0x3f, 0x88, 0x21,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x5d, 0x93, 0xfc, 0x95,
- 0xfb, 0x80, 0x00, 0x34,
- 0x9f, 0x21, 0x01, 0x11,
- 0x81, 0x31, 0x03, 0x95,
- 0x68, 0x84, 0x08, 0x24,
- 0xfb, 0x80, 0x06, 0x34,
- 0xe3, 0x4f, 0x80, 0x4f,
- 0x61, 0x8c, 0x0a, 0x44,
- 0xe1, 0x84, 0x18, 0x44,
- 0x84, 0xc9, 0x02, 0x59,
- 0x18, 0x44, 0x38, 0x5f,
- 0x46, 0x47, 0xe0, 0x84,
- 0x38, 0x5f, 0x88, 0xc9,
- 0xa8, 0x5f, 0x90, 0x49,
- 0x88, 0x11, 0x23, 0x5f,
- 0x02, 0x0a, 0xaa, 0x3f,
- 0xf8, 0xf5, 0xe0, 0x40,
- 0x00, 0x34, 0x5d, 0x93,
- 0xc1, 0xc3, 0xfb, 0x80,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x70, 0x1e, 0xf0,
- 0x9d, 0x81, 0x00, 0xab,
- 0x81, 0x91, 0x1e, 0x0b,
- 0x9d, 0x11, 0x01, 0x55,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x00, 0xa0, 0xfe, 0x95,
- 0x40, 0xb1, 0x65, 0xf1,
- 0x81, 0x45, 0x9d, 0x11,
- 0x02, 0x10, 0x41, 0x9c,
- 0xa1, 0x1b, 0xec, 0x04,
- 0x85, 0xc5, 0xfe, 0x95,
- 0x70, 0xa4, 0x4c, 0xa2,
- 0xfa, 0x80, 0x0e, 0x94,
- 0x6e, 0xf1, 0x0c, 0xb9,
- 0x94, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x71, 0x08,
- 0x00, 0x0a, 0x8e, 0x1b,
- 0x86, 0xb5, 0xf0, 0x04,
- 0x6c, 0xe9, 0x14, 0x09,
- 0x0c, 0x19, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfa, 0x80, 0x02, 0x14,
- 0x84, 0x35, 0x83, 0x0b,
- 0x73, 0xc0, 0x40, 0xb0,
- 0x47, 0x07, 0x9e, 0x1b,
- 0x02, 0x2b, 0x9e, 0xb9,
- 0x83, 0x31, 0x7c, 0x00,
- 0x80, 0x13, 0x37, 0x3f,
- 0xa6, 0x2f, 0x94, 0x0b,
- 0x8e, 0x1b, 0x04, 0x2c,
- 0xe8, 0x00, 0x42, 0x48,
- 0x12, 0x0a, 0x82, 0x91,
- 0xf4, 0x75, 0xe1, 0x40,
- 0x64, 0x8d, 0x00, 0xe6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x9d, 0x21, 0x01, 0x65,
- 0x04, 0x20, 0x45, 0x3a,
- 0xc1, 0x3c, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x2b,
- 0x64, 0x8d, 0x40, 0xa6,
- 0x9e, 0x1b, 0x40, 0x20,
- 0x45, 0x2a, 0x81, 0x55,
- 0xec, 0x04, 0x10, 0x80,
- 0xa1, 0x8b, 0xc1, 0x2c,
- 0x77, 0x58, 0xfe, 0x75,
- 0x94, 0x0b, 0x68, 0x44,
- 0x0c, 0x0c, 0xb8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x83, 0x31, 0x00, 0x13,
- 0x6e, 0xf1, 0x02, 0x19,
- 0x04, 0x14, 0xc0, 0x2b,
- 0x9e, 0x19, 0x61, 0x8c,
- 0xa3, 0x3f, 0x3c, 0x29,
- 0x00, 0x2b, 0x84, 0x03,
- 0xc0, 0x16, 0x62, 0xf9,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x62, 0xf9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xd0, 0x1e, 0xf0,
- 0x02, 0xf0, 0x00, 0x9b,
- 0x5c, 0x18, 0xe4, 0xc0,
- 0x04, 0xf0, 0x68, 0x0c,
- 0x12, 0x39, 0xe4, 0xb0,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x12, 0x09,
- 0x12, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x4d, 0x12, 0x89,
- 0x12, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x39,
- 0x40, 0x3a, 0x8d, 0x3e,
- 0x12, 0x39, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x66, 0x86, 0x54, 0x8a,
- 0xe1, 0x88, 0x02, 0x04,
- 0x52, 0x01, 0x91, 0x01,
- 0x40, 0x26, 0x64, 0x81,
- 0x0f, 0x2e, 0xc5, 0xa7,
- 0x52, 0x21, 0x92, 0x0b,
- 0xc0, 0x26, 0x64, 0x91,
- 0x52, 0x31, 0x89, 0x3e,
- 0xc0, 0x26, 0x64, 0xb1,
- 0x12, 0xb9, 0x8b, 0x1e,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x12, 0x69,
- 0x52, 0x11, 0xc0, 0x2b,
- 0x40, 0x26, 0x64, 0xd1,
- 0xe4, 0xa0, 0x02, 0xf0,
- 0x64, 0xf1, 0x52, 0xa1,
- 0x67, 0xd8, 0xc0, 0x26,
- 0x80, 0x7b, 0xe8, 0x0c,
- 0xa6, 0x55, 0xa1, 0x7b,
- 0x06, 0x64, 0x45, 0xb7,
- 0x7c, 0xbe, 0xe1, 0x88,
- 0x80, 0x65, 0xa1, 0xbb,
- 0x82, 0xf5, 0xa1, 0x3b,
- 0x6c, 0x1d, 0x12, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x12, 0x0b, 0xe0, 0x08,
- 0x7a, 0x78, 0x86, 0x6b,
- 0x4e, 0x96, 0x68, 0x00,
- 0x23, 0x0b, 0xe0, 0x08,
- 0xa0, 0x85, 0x8c, 0x3b,
- 0xc5, 0x87, 0x0d, 0x04,
- 0x4b, 0xf6, 0x7c, 0x14,
- 0x48, 0x8a, 0xe0, 0x0c,
- 0x81, 0xb1, 0x60, 0x0e,
- 0x44, 0x0a, 0xc5, 0x07,
- 0x8f, 0x04, 0xe0, 0x06,
- 0xbe, 0x2e, 0x8b, 0x14,
- 0x02, 0x03, 0xbc, 0x4e,
- 0xe6, 0x8a, 0x42, 0x4a,
- 0x00, 0x00, 0x09, 0x24,
- 0xfe, 0x0e, 0xec, 0x04,
- 0x00, 0xa0, 0x84, 0xa3,
- 0x81, 0xa1, 0x6c, 0x04,
- 0x52, 0x11, 0x8d, 0x0e,
- 0xc0, 0x2c, 0x65, 0x3d,
- 0x4c, 0x92, 0x8b, 0xe5,
- 0x0c, 0x09, 0xf0, 0xac,
- 0xc0, 0x2b, 0x6e, 0xf1,
- 0x62, 0xb1, 0x4c, 0x51,
- 0x4c, 0x51, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xf0, 0x3c, 0x42, 0x00,
- 0x92, 0xd5, 0xc5, 0x1d,
- 0xc8, 0x1d, 0x8d, 0x44,
- 0x7e, 0x14, 0x92, 0x75,
- 0xc2, 0x0d, 0xc9, 0x07,
- 0x8f, 0x14, 0x90, 0xf5,
- 0x90, 0x95, 0xc3, 0x0d,
- 0x61, 0x8c, 0x00, 0xb4,
- 0xf0, 0x1c, 0x44, 0xb0,
- 0x83, 0x41, 0x3e, 0x09,
- 0x04, 0x44, 0x12, 0x03,
- 0x00, 0x19, 0xe8, 0x88,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x08, 0xa4, 0x86, 0x8b,
- 0x0a, 0xf0, 0x7a, 0x80,
- 0x7c, 0x14, 0xe4, 0x90,
- 0xf9, 0x88, 0x58, 0x12,
- 0x04, 0x34, 0x0b, 0x34,
- 0x40, 0xc1, 0xfa, 0x80,
- 0x40, 0x2c, 0x65, 0xc1,
- 0x02, 0x14, 0x92, 0x0b,
- 0x62, 0xd8, 0xfa, 0x80,
- 0x06, 0x34, 0x6f, 0xfc,
- 0x80, 0x7b, 0xfa, 0x80,
- 0x8a, 0x15, 0xa1, 0x7b,
- 0x0a, 0xf0, 0x3e, 0x04,
- 0x1e, 0x49, 0xe4, 0x80,
- 0x1e, 0x39, 0xe0, 0x90,
- 0x3c, 0x04, 0xe0, 0xa0,
- 0xfa, 0x80, 0x02, 0x04,
- 0x63, 0xf1, 0x4c, 0x41,
- 0x04, 0x04, 0xc0, 0x2c,
- 0x92, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x64, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x1e, 0x09, 0x84, 0x75,
- 0x82, 0xa1, 0x60, 0x80,
- 0x4b, 0xf6, 0x10, 0x3b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0xc0, 0x2c, 0x62, 0xb1,
- 0x82, 0xb1, 0x89, 0x24,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0x40, 0x98, 0xe8, 0x25,
- 0x92, 0x0b, 0x68, 0x00,
- 0x0e, 0x0b, 0x80, 0x7b,
- 0x0c, 0x0c, 0xe8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x81, 0x00, 0x6b,
- 0x6c, 0x59, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x02, 0xf0, 0x8a, 0x85,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x0c, 0x5d, 0x88,
- 0x88, 0xd5, 0xa1, 0x0b,
- 0x6f, 0xdc, 0x40, 0x06,
- 0x80, 0x08, 0x81, 0x91,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x04, 0xf1, 0x00, 0x60,
- 0x00, 0x60, 0xc0, 0xad,
- 0x80, 0xad, 0x04, 0xf9,
- 0x03, 0x15, 0x80, 0x0a,
- 0xfb, 0x80, 0x0e, 0x04,
- 0x7a, 0x80, 0x02, 0x84,
- 0xe4, 0x10, 0x08, 0xf0,
- 0x8c, 0x0b, 0x01, 0x21,
- 0x68, 0x00, 0x42, 0x88,
- 0x7c, 0x0a, 0x8e, 0x3b,
- 0xfb, 0x80, 0x12, 0x94,
- 0x80, 0x93, 0x82, 0x81,
- 0xc1, 0x8d, 0xfc, 0x04,
- 0x4c, 0x93, 0xfc, 0x15,
- 0xc0, 0x16, 0x62, 0x99,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x1c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x82, 0xf5, 0xfc, 0x1d,
- 0x02, 0x14, 0x83, 0x31,
- 0x82, 0x11, 0xfa, 0x80,
- 0xf4, 0x38, 0x03, 0x0a,
- 0x08, 0x14, 0x82, 0x15,
- 0x08, 0x34, 0xfa, 0x80,
- 0x80, 0x4f, 0xe8, 0x90,
- 0xfc, 0x85, 0xa1, 0x4b,
- 0x81, 0x01, 0x08, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xf8, 0x00, 0x10, 0xfc,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x80, 0x5b, 0x02, 0x9b,
- 0x63, 0xfc, 0x12, 0x0a,
- 0xfc, 0x2e, 0x81, 0x01,
- 0x90, 0x0c, 0xbe, 0x4e,
- 0x80, 0x00, 0x0b, 0x98,
- 0x10, 0x50, 0x49, 0x37,
- 0xc0, 0xb0, 0x66, 0xb1,
- 0x0e, 0x50, 0x3c, 0x3e,
- 0xc0, 0xb0, 0x64, 0x31,
- 0x81, 0xa1, 0x01, 0xb1,
- 0x81, 0x61, 0x7e, 0x5e,
- 0x0e, 0x09, 0x85, 0x85,
- 0x93, 0x0b, 0xe3, 0xc0,
- 0xfc, 0x04, 0x88, 0x35,
- 0x80, 0xf5, 0xa3, 0x0b,
- 0x6c, 0xe9, 0x0a, 0x09,
- 0xa0, 0x18, 0xc0, 0x2c,
- 0x86, 0x15, 0x83, 0x0b,
- 0x7a, 0x80, 0x02, 0xb4,
- 0x55, 0x78, 0x8a, 0x0b,
- 0x00, 0x0a, 0xef, 0xfc,
- 0x1e, 0x55, 0xf0, 0x04,
- 0x82, 0xd5, 0xc0, 0x0c,
- 0x02, 0xa4, 0x1c, 0x08,
- 0x04, 0xf0, 0xe0, 0x88,
- 0x82, 0xa1, 0x64, 0x50,
- 0x82, 0x23, 0x7e, 0x54,
- 0x80, 0x63, 0x70, 0xad,
- 0x80, 0x45, 0x88, 0xbe,
- 0x02, 0xb1, 0x81, 0x95,
- 0x82, 0x71, 0x82, 0x81,
- 0xe5, 0x3c, 0x17, 0x0a,
- 0xa1, 0xab, 0xf4, 0xe5,
- 0x0a, 0x8b, 0x9e, 0xe5,
- 0xc0, 0x15, 0x6a, 0x7d,
- 0xc9, 0x87, 0xbc, 0x14,
- 0xfb, 0x80, 0x00, 0x14,
- 0x6a, 0x81, 0x0a, 0x0b,
- 0xd1, 0x0d, 0x40, 0x15,
- 0x9c, 0x00, 0x50, 0x10,
- 0xfb, 0x80, 0x02, 0x84,
- 0xc0, 0x1d, 0xc9, 0x07,
- 0xdc, 0x00, 0x50, 0x00,
- 0xec, 0x18, 0x51, 0x0a,
- 0x3e, 0x14, 0x84, 0x65,
- 0xe0, 0x90, 0x00, 0x64,
- 0x00, 0xf0, 0x04, 0x0c,
- 0x01, 0x95, 0xe4, 0x50,
- 0x41, 0x24, 0x9f, 0x11,
- 0xec, 0x04, 0x14, 0xa0,
- 0x44, 0x11, 0x8a, 0x23,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xfe, 0x15, 0xa1, 0xab,
- 0x81, 0x31, 0x8b, 0x75,
- 0x00, 0x34, 0x85, 0x05,
- 0x02, 0xf0, 0x60, 0x88,
- 0x02, 0x15, 0xe4, 0x50,
- 0x00, 0x14, 0xfc, 0x00,
- 0x8a, 0x03, 0xe0, 0x84,
- 0x6e, 0x39, 0x00, 0x2b,
- 0x81, 0x01, 0x40, 0x15,
- 0x82, 0x85, 0xa1, 0x2b,
- 0x44, 0x4a, 0x81, 0x01,
- 0x44, 0x20, 0xe0, 0x80,
- 0x40, 0xff, 0x13, 0xf9,
- 0xc4, 0x04, 0x00, 0x00,
- 0x04, 0x24, 0x7e, 0x35,
- 0x0a, 0x13, 0xc1, 0x84,
- 0x42, 0x01, 0x82, 0x31,
- 0xc0, 0x2c, 0x61, 0x71,
- 0xf8, 0x15, 0x95, 0x3b,
- 0x94, 0x7b, 0x21, 0x06,
- 0x83, 0x23, 0xa1, 0x43,
- 0x4e, 0x8a, 0xab, 0xe3,
- 0x8a, 0x25, 0xec, 0x20,
- 0x64, 0x50, 0x12, 0xf0,
- 0x82, 0xb1, 0xff, 0xb1,
- 0x88, 0x45, 0xd5, 0xbd,
- 0x00, 0x50, 0x24, 0x64,
- 0xc0, 0xaf, 0x64, 0x71,
- 0xe4, 0x40, 0x04, 0xf0,
- 0x60, 0x84, 0x02, 0x64,
- 0x00, 0x0b, 0x80, 0x63,
- 0x0c, 0x19, 0xfc, 0x04,
- 0x73, 0xd8, 0xe5, 0x00,
- 0x21, 0x08, 0xef, 0xfc,
- 0x0c, 0x19, 0x88, 0x91,
- 0x83, 0x0b, 0xe5, 0x00,
- 0x05, 0x01, 0x02, 0x60,
- 0x0e, 0x74, 0x40, 0x01,
- 0x42, 0x01, 0xdb, 0x80,
- 0x0e, 0x70, 0x40, 0x00,
- 0x7e, 0x54, 0xc4, 0x04,
- 0xec, 0x20, 0x4e, 0x8a,
- 0xc1, 0xc3, 0xf6, 0xb5,
- 0xc8, 0x77, 0x3e, 0x04,
- 0x01, 0x01, 0x80, 0x7c,
- 0x18, 0xfc, 0xf8, 0xf1,
- 0x0c, 0x0c, 0xf0, 0x00,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x46, 0x02, 0x6b,
- 0x04, 0x14, 0xe1, 0x28,
- 0x84, 0x34, 0x83, 0x21,
- 0x65, 0x75, 0x00, 0x19,
- 0x00, 0x45, 0xc0, 0x1b,
- 0xc0, 0x06, 0x6d, 0x49,
- 0x65, 0x79, 0x00, 0x09,
- 0x82, 0x31, 0x40, 0x1b,
- 0xa1, 0x11, 0x23, 0x2f,
- 0x88, 0x0b, 0x21, 0x2f,
- 0xef, 0xe8, 0x75, 0x48,
- 0x81, 0x01, 0x18, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x88, 0x7b, 0x00, 0x8b,
- 0x65, 0x0d, 0x10, 0x09,
- 0x82, 0x6b, 0x40, 0x2b,
- 0x60, 0x88, 0x02, 0x74,
- 0x10, 0x13, 0x84, 0xab,
- 0x23, 0x0b, 0x81, 0x21,
- 0x42, 0x25, 0x86, 0x9b,
- 0xc0, 0x0b, 0x61, 0xa5,
- 0xa7, 0x0b, 0x82, 0x25,
- 0x10, 0x0b, 0x8c, 0x75,
- 0x40, 0x15, 0x6a, 0x79,
- 0x91, 0x0c, 0x81, 0xb1,
- 0x3e, 0x5e, 0x85, 0x05,
- 0x66, 0x91, 0x00, 0x10,
- 0x7c, 0x0e, 0xc0, 0xb1,
- 0x42, 0xb8, 0x90, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x02, 0xf0, 0x49, 0x07,
- 0x3c, 0x1e, 0xe4, 0x40,
- 0xfb, 0x80, 0x16, 0x04,
- 0x64, 0x30, 0x0a, 0xf0,
- 0x0c, 0x1b, 0x90, 0x0b,
- 0x12, 0x3b, 0x94, 0x2b,
- 0x43, 0xb8, 0x96, 0x4b,
- 0x7e, 0x14, 0xe8, 0x00,
- 0xfc, 0x24, 0xa1, 0x0b,
- 0x84, 0x35, 0x88, 0x1e,
- 0xbe, 0x54, 0x91, 0x0a,
- 0xfb, 0x80, 0x06, 0x04,
- 0x04, 0x16, 0x97, 0x3b,
- 0x40, 0x80, 0x40, 0x00,
- 0x42, 0x70, 0xdc, 0x00,
- 0x48, 0x50, 0x5c, 0x00,
- 0x6c, 0xd8, 0xdc, 0x00,
- 0x81, 0x01, 0xcf, 0xfc,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x81, 0x81, 0x01, 0x91,
- 0x40, 0x72, 0x83, 0x25,
- 0x00, 0x09, 0xf0, 0xa4,
- 0xc0, 0x2c, 0x63, 0xf1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x8d, 0x0b, 0x82, 0x25,
- 0x02, 0x94, 0x80, 0xf5,
- 0x8e, 0x0b, 0x7a, 0x80,
- 0xef, 0xfc, 0x44, 0x88,
- 0x82, 0x91, 0x80, 0x83,
- 0xe1, 0x40, 0x12, 0x0a,
- 0x90, 0x0b, 0xfa, 0xb5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x40, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0x19, 0x14, 0x82, 0xbb,
- 0x08, 0x8b, 0x8a, 0x7b,
- 0x00, 0x08, 0x86, 0x9b,
- 0x7e, 0x1e, 0x84, 0xab,
- 0x64, 0xf8, 0x91, 0x11,
- 0x00, 0x2b, 0xef, 0xe8,
- 0xe4, 0x40, 0x00, 0xf0,
- 0x0a, 0x84, 0x3e, 0x0e,
- 0x3c, 0x7e, 0xe0, 0x90,
- 0x64, 0xe1, 0x06, 0x60,
- 0x16, 0x0b, 0xc0, 0xad,
- 0x4d, 0xf8, 0x94, 0x1b,
- 0x92, 0x4b, 0x6f, 0xb4,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0x58, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x68, 0x00,
- 0x81, 0x01, 0x23, 0x0b,
- 0x09, 0x04, 0x80, 0xe5,
- 0xc9, 0x07, 0x81, 0x71,
- 0x6f, 0xfd, 0x00, 0x02,
- 0x7e, 0x14, 0xc0, 0xff,
- 0x04, 0x0c, 0xa8, 0xf1,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x0e, 0x00, 0x02, 0x6b,
- 0xc0, 0xb0, 0x65, 0x71,
- 0x64, 0x71, 0x10, 0x00,
- 0x81, 0x01, 0x40, 0xaf,
- 0x60, 0x04, 0x13, 0x06,
- 0x83, 0x75, 0x9d, 0xa1,
- 0x78, 0x81, 0x0e, 0x19,
- 0x44, 0x10, 0xc0, 0x01,
- 0xc9, 0x17, 0x70, 0x3c,
- 0xe6, 0xaa, 0x44, 0x2a,
- 0x8d, 0x2b, 0x82, 0x23,
- 0x80, 0x00, 0x0e, 0x19,
- 0x80, 0x00, 0x10, 0x0b,
- 0x08, 0x48, 0x67, 0x28,
- 0x84, 0x04, 0x02, 0x10,
- 0x6c, 0x04, 0x12, 0x90,
- 0x84, 0x81, 0x82, 0x71,
- 0xfa, 0x35, 0xa1, 0x9b,
- 0x0c, 0x0c, 0xd0, 0x07,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x5d, 0xf8, 0xe2, 0x80,
- 0x43, 0xf6, 0xe8, 0x48,
- 0x05, 0x86, 0x60, 0x0c,
- 0x7b, 0x98, 0xe0, 0x10,
- 0x8c, 0x0b, 0x6f, 0xa8,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0x3e, 0x38, 0xf2, 0x00,
- 0xc1, 0xc3, 0xe0, 0x40,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x40, 0x96, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x06, 0x82, 0x7b,
- 0x8c, 0x0b, 0x62, 0x80,
- 0xe8, 0x48, 0x5c, 0x08,
- 0xe4, 0x40, 0x0e, 0x8a,
- 0x0c, 0x29, 0x82, 0xd5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x00, 0x42, 0xb6,
- 0x68, 0x00, 0x4d, 0xa8,
- 0x50, 0xb6, 0x8c, 0x0b,
- 0x23, 0x0b, 0xe0, 0x00,
- 0x8c, 0x85, 0x81, 0x71,
- 0x61, 0x88, 0x00, 0x74,
- 0x06, 0x09, 0x91, 0x91,
- 0x04, 0x94, 0x83, 0x11,
- 0xa1, 0x1f, 0x69, 0x80,
- 0x40, 0x22, 0xc8, 0x27,
- 0x81, 0x11, 0x79, 0x84,
- 0x44, 0x12, 0x81, 0xa5,
- 0x04, 0x4a, 0xf9, 0x1c,
- 0x44, 0x62, 0xf8, 0x0c,
- 0x82, 0x11, 0x50, 0x84,
- 0xc0, 0x00, 0x44, 0x01,
- 0xe0, 0x40, 0x02, 0x0a,
- 0x01, 0x11, 0xfc, 0xb5,
- 0x0c, 0x0b, 0x9f, 0x21,
- 0x67, 0xb8, 0x8c, 0x3b,
- 0x80, 0x8b, 0xe8, 0x40,
- 0x84, 0x55, 0xa1, 0x8b,
- 0x6a, 0xa9, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x2b,
- 0x00, 0x60, 0x84, 0x35,
- 0x40, 0x8b, 0x66, 0xb1,
- 0xe0, 0x10, 0x02, 0x06,
- 0x41, 0x1e, 0x81, 0x45,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x95, 0xa1, 0x9b,
- 0x90, 0x0b, 0x81, 0x81,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0x0c, 0x0b, 0xdd, 0x93,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x1c, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x3c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x00, 0x4c, 0x46,
- 0xe0, 0x04, 0x45, 0x36,
- 0x40, 0x21, 0x98, 0x14,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x98, 0x14,
- 0xf3, 0xf8, 0x44, 0x20,
- 0x43, 0x46, 0x04, 0x26,
- 0x62, 0x58, 0xe0, 0x1c,
- 0x83, 0x21, 0x68, 0x44,
- 0x80, 0x18, 0x98, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x0c, 0x0c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x41, 0x86, 0x00, 0x3b,
- 0x00, 0x04, 0xe1, 0x48,
- 0xe0, 0x04, 0x09, 0x46,
- 0x6c, 0x1d, 0x46, 0x41,
- 0x80, 0x48, 0xc0, 0x2b,
- 0xfc, 0x9c, 0x08, 0x44,
- 0x41, 0xc6, 0x00, 0x46,
- 0x80, 0x04, 0xe1, 0x48,
- 0x83, 0x01, 0x00, 0x16,
- 0x6c, 0x25, 0x46, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x6f, 0xf0, 0x78, 0xa8,
- 0x08, 0x0c, 0x86, 0x2b,
- 0x0f, 0xd8, 0xf2, 0x80,
- 0xc1, 0xc3, 0xff, 0xf0,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x14, 0x4d, 0x48,
- 0x81, 0x81, 0x81, 0x11,
- 0x68, 0x28, 0x6f, 0xc8,
- 0x12, 0x86, 0x80, 0x7b,
- 0xa4, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xbc,
- 0xe8, 0x30, 0x72, 0xc8,
- 0x95, 0x11, 0x03, 0xa1,
- 0x8c, 0x0b, 0x03, 0x21,
- 0xe8, 0x44, 0x5e, 0x28,
- 0xe1, 0x10, 0x41, 0x46,
- 0x84, 0x86, 0x80, 0x14,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0x00, 0x16, 0xe0, 0x19,
- 0x79, 0xb8, 0x8c, 0x0b,
- 0x00, 0xc6, 0xef, 0xfc,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x18, 0x41, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x14, 0x41, 0x06,
- 0x80, 0x18, 0x80, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0x41, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x14,
- 0x00, 0x86, 0x83, 0x11,
- 0xe1, 0x14, 0x41, 0x86,
- 0x00, 0x8c, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x06,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x00, 0x86, 0x80, 0x04,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0x08, 0x78, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x81, 0x61, 0x02, 0xab,
- 0x80, 0x7b, 0x21, 0xab,
- 0x41, 0x9c, 0x0c, 0xa4,
- 0xe0, 0x04, 0x01, 0x16,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x84, 0x9b, 0x40, 0x2b,
- 0x50, 0x04, 0x4c, 0x60,
- 0x47, 0x38, 0x81, 0x01,
- 0x81, 0x11, 0x68, 0x14,
- 0x42, 0x56, 0x00, 0x8b,
- 0x5c, 0xf8, 0xe0, 0x00,
- 0x8e, 0x0b, 0x68, 0x14,
- 0x01, 0x06, 0x21, 0x6b,
- 0x4e, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x01, 0x26, 0x88, 0xa5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x76, 0x48,
- 0x41, 0xc6, 0x92, 0x2b,
- 0x40, 0x20, 0x72, 0xfd,
- 0x60, 0x01, 0x02, 0x06,
- 0x80, 0x04, 0xff, 0xc0,
- 0x02, 0x06, 0x02, 0x0f,
- 0xc0, 0x20, 0x72, 0xc1,
- 0xfc, 0xc4, 0x00, 0x04,
- 0x01, 0xc6, 0x04, 0x0e,
- 0x80, 0x04, 0xe1, 0x98,
- 0x84, 0x75, 0xa3, 0x0b,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8e, 0x0b, 0x40, 0x20,
- 0xef, 0xec, 0x76, 0xe8,
- 0x01, 0x36, 0x81, 0xf5,
- 0x94, 0x1b, 0x60, 0x04,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x8e, 0x0b, 0x40, 0x2b,
- 0x6f, 0xfc, 0x74, 0x08,
- 0x81, 0x95, 0x92, 0x2b,
- 0x68, 0x00, 0x41, 0x68,
- 0x42, 0x96, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x60, 0x00,
- 0xe8, 0x14, 0x59, 0x08,
- 0x60, 0x00, 0x42, 0x66,
- 0x58, 0xb8, 0x8e, 0x0b,
- 0x03, 0x11, 0xe8, 0x14,
- 0x42, 0x58, 0x90, 0x0b,
- 0x8c, 0x0b, 0xe8, 0x14,
- 0xf2, 0x3c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x72, 0xf9, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xff,
- 0x40, 0x15, 0x6e, 0x09,
- 0x4c, 0x01, 0x81, 0x01,
- 0xc0, 0x2b, 0x64, 0xd5,
- 0xe8, 0x00, 0x7d, 0x68,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xe8, 0x18, 0x5e, 0x48,
- 0x68, 0x00, 0x7c, 0x88,
- 0x47, 0xf8, 0x8c, 0x0b,
- 0xa1, 0x7b, 0xe8, 0x0c,
- 0x49, 0xf8, 0x86, 0x25,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x68, 0x00, 0x41, 0x88,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xf0, 0x69, 0x28,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0a, 0x78, 0xf2, 0x84,
- 0x0c, 0x0c, 0xe0, 0x0c,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x63, 0x49, 0x00, 0x19,
- 0x06, 0x56, 0x40, 0x2d,
- 0xc0, 0x01, 0x60, 0x01,
- 0x64, 0x01, 0x40, 0x35,
- 0x83, 0x31, 0x40, 0x05,
- 0x68, 0x15, 0x40, 0x33,
- 0x81, 0x21, 0x40, 0x0a,
- 0x65, 0x45, 0x40, 0x31,
- 0x07, 0x06, 0x40, 0x22,
- 0x40, 0x31, 0xe0, 0x08,
- 0x40, 0x1b, 0x65, 0x6d,
- 0x40, 0x31, 0xe0, 0x19,
- 0x40, 0x22, 0x65, 0x4d,
- 0x40, 0x31, 0xa1, 0x41,
- 0x40, 0x28, 0x64, 0x89,
- 0x40, 0x11, 0xaf, 0x31,
- 0x40, 0x2d, 0x63, 0x49,
- 0x60, 0x11, 0x02, 0x26,
- 0x40, 0x31, 0xc0, 0xc0,
- 0x40, 0x28, 0x64, 0x91,
- 0xe0, 0x0c, 0x47, 0xf6,
- 0x63, 0x29, 0x40, 0x15,
- 0x91, 0x11, 0x40, 0x0b,
- 0x67, 0xc9, 0x40, 0x31,
- 0x06, 0x06, 0x40, 0x2d,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x13, 0x69, 0x85,
- 0xe0, 0x8c, 0x06, 0x06,
- 0x68, 0x11, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x0a,
- 0x40, 0x27, 0x63, 0x15,
- 0xe0, 0x10, 0x03, 0x86,
- 0x69, 0x91, 0x40, 0x13,
- 0x43, 0x86, 0x40, 0x13,
- 0x40, 0x33, 0xe0, 0x00,
- 0x40, 0x13, 0x69, 0x95,
- 0xe0, 0x00, 0x46, 0x86,
- 0x63, 0x31, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x27,
- 0x63, 0x35, 0x40, 0x31,
- 0x00, 0x3b, 0xc0, 0x27,
- 0xc0, 0x0a, 0x69, 0x31,
- 0x6c, 0x61, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x22,
- 0x6c, 0x65, 0x40, 0x11,
- 0x9d, 0x11, 0x40, 0x22,
- 0x6f, 0xb1, 0x40, 0x11,
- 0x02, 0x34, 0x40, 0x22,
- 0x40, 0x21, 0xfc, 0xa8,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x68, 0x09, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x0d,
- 0x61, 0x1d, 0x40, 0x25,
- 0x95, 0x21, 0x40, 0x0a,
- 0x65, 0x65, 0x40, 0x41,
- 0x40, 0x43, 0xc0, 0x1b,
- 0xc0, 0x14, 0x62, 0x41,
- 0x64, 0x8d, 0x40, 0x21,
- 0x40, 0x43, 0xc0, 0x28,
- 0xc0, 0x13, 0x69, 0x81,
- 0x63, 0x11, 0x40, 0x41,
- 0x40, 0x21, 0xc0, 0x27,
- 0xc0, 0x22, 0x6f, 0xb5,
- 0x69, 0x31, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x0a,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0x60, 0x0c, 0x14, 0x86,
- 0x63, 0xc0, 0x04, 0x0e,
- 0x40, 0xa3, 0xc0, 0xbb,
- 0x40, 0x15, 0x6d, 0xb5,
- 0xef, 0xfc, 0x55, 0xf6,
- 0x6d, 0xc1, 0x40, 0xa3,
- 0x55, 0xf6, 0x40, 0x15,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xe0, 0x7c, 0x07, 0x06,
- 0x63, 0x69, 0x40, 0xa1,
- 0x55, 0xf6, 0x40, 0x2d,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x64, 0x59, 0x40, 0x25,
- 0x05, 0x06, 0x40, 0x05,
- 0x40, 0xa5, 0xe0, 0x08,
- 0x40, 0x0b, 0x64, 0xe1,
- 0xe0, 0x04, 0x57, 0xc6,
- 0x64, 0xe5, 0x40, 0xa5,
- 0xbd, 0xa1, 0x40, 0x0b,
- 0x6e, 0x25, 0x40, 0x21,
- 0x83, 0x21, 0x40, 0x29,
- 0x6e, 0x81, 0x40, 0xb1,
- 0xb7, 0xb1, 0x40, 0x2c,
- 0x63, 0xa9, 0x40, 0xa1,
- 0x14, 0x56, 0x40, 0x2d,
- 0xc0, 0x20, 0x70, 0x01,
- 0x6a, 0xe1, 0x40, 0x33,
- 0x12, 0x06, 0x40, 0x15,
- 0x40, 0x33, 0xe0, 0x08,
- 0x40, 0x1c, 0x62, 0x6d,
- 0xe0, 0x00, 0x46, 0x86,
- 0x60, 0x24, 0x0d, 0x86,
- 0xe0, 0x5c, 0x11, 0xc6,
- 0x6e, 0x89, 0x40, 0xb1,
- 0xab, 0xb1, 0x40, 0x2c,
- 0x62, 0x25, 0x40, 0x33,
- 0x46, 0xc6, 0x40, 0x1c,
- 0x40, 0x21, 0xe0, 0x00,
- 0x40, 0x2b, 0x65, 0x11,
- 0x40, 0x21, 0xa3, 0x51,
- 0x40, 0x2b, 0x65, 0xd1,
- 0xe0, 0x40, 0x0e, 0x06,
- 0x66, 0x81, 0x40, 0x21,
- 0x81, 0x11, 0x40, 0x2b,
- 0x66, 0x85, 0x40, 0x21,
- 0x91, 0xc1, 0x40, 0x2b,
- 0x6b, 0x8d, 0x40, 0x21,
- 0x85, 0x41, 0x40, 0x2b,
- 0x6b, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x61,
- 0x6e, 0x5d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x61,
- 0x6e, 0x91, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x99,
- 0x63, 0x31, 0x40, 0x21,
- 0x40, 0xa5, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x64, 0xed,
- 0x64, 0xf1, 0x40, 0xa5,
- 0x8d, 0xa1, 0x40, 0x0b,
- 0x68, 0x1d, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x69, 0xd9,
- 0x69, 0xdd, 0x40, 0x21,
- 0x40, 0x21, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x7d,
- 0x64, 0xd5, 0x40, 0x21,
- 0xa9, 0x21, 0x40, 0x38,
- 0x6b, 0x1d, 0x40, 0x63,
- 0x0c, 0x06, 0x40, 0x15,
- 0x40, 0x83, 0xf9, 0x00,
- 0x40, 0x15, 0x6d, 0xb1,
- 0xe0, 0xcc, 0x10, 0xd6,
- 0x6e, 0x95, 0x40, 0xb1,
- 0x16, 0xc6, 0x40, 0x2c,
- 0x40, 0xa1, 0xe0, 0x0c,
- 0x40, 0x2d, 0x63, 0xd1,
- 0x72, 0xbd, 0x55, 0xf6,
- 0x40, 0x23, 0xc0, 0x20,
- 0x40, 0x1c, 0x62, 0x11,
- 0xe0, 0x10, 0x44, 0xc6,
- 0x62, 0x29, 0x40, 0x33,
- 0x07, 0x06, 0x40, 0x1c,
- 0x40, 0x91, 0xe0, 0x18,
- 0xc0, 0x29, 0x6e, 0x21,
- 0x6e, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x29,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0x40, 0x51, 0xb5, 0x91,
- 0x40, 0x2b, 0x65, 0xc9,
- 0xef, 0xf0, 0x4b, 0x86,
- 0x6d, 0x95, 0x40, 0x65,
- 0x0c, 0x0e, 0x40, 0x0a,
- 0x40, 0x83, 0xff, 0xc0,
- 0x40, 0x15, 0x6d, 0xb9,
- 0xe0, 0x00, 0x50, 0x66,
- 0x63, 0x49, 0x40, 0xb1,
- 0x17, 0x86, 0x40, 0x2d,
- 0x40, 0x23, 0xe0, 0x60,
- 0x40, 0x1c, 0x62, 0x15,
- 0x40, 0x33, 0xa1, 0x21,
- 0x40, 0x1c, 0x62, 0x2d,
- 0xe0, 0xf8, 0x46, 0x06,
- 0x63, 0x29, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x39,
- 0x63, 0xd9, 0x40, 0x91,
- 0x40, 0x91, 0xc0, 0x2d,
- 0x40, 0x2d, 0x64, 0x09,
- 0x60, 0x01, 0x12, 0x06,
- 0x40, 0xa5, 0xc0, 0x20,
- 0xc0, 0x0b, 0x64, 0xf9,
- 0x64, 0xfd, 0x40, 0xa5,
- 0x14, 0x66, 0x40, 0x0b,
- 0xc0, 0x20, 0x68, 0x01,
- 0x6b, 0x19, 0x40, 0x53,
- 0x99, 0x51, 0x40, 0x15,
- 0x6d, 0x99, 0x40, 0x65,
- 0x89, 0x61, 0x40, 0x0a,
- 0x6d, 0x9d, 0x40, 0x75,
- 0x8b, 0x71, 0x40, 0x0a,
- 0x6b, 0x95, 0x40, 0x81,
- 0x8f, 0x81, 0x40, 0x2b,
- 0x69, 0xa9, 0x40, 0xb3,
- 0x87, 0xb1, 0x40, 0x16,
- 0x62, 0x31, 0x40, 0x33,
- 0x46, 0x46, 0x40, 0x1c,
- 0x40, 0x95, 0xe0, 0xf8,
- 0xc0, 0x0b, 0x65, 0x05,
- 0x65, 0x09, 0x40, 0x95,
- 0xb9, 0x91, 0x40, 0x0b,
- 0x65, 0x11, 0x40, 0xa5,
- 0x40, 0xa5, 0xc0, 0x0b,
- 0x40, 0x0b, 0x65, 0x15,
- 0x40, 0x23, 0x93, 0xa1,
- 0xc0, 0x1c, 0x62, 0x21,
- 0x62, 0x41, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0x40, 0x1c, 0x62, 0x45,
- 0xe0, 0x18, 0x04, 0x06,
- 0x62, 0x05, 0x40, 0x11,
- 0x40, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x65, 0x31,
- 0x65, 0xcd, 0x40, 0xc1,
- 0x40, 0x51, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x66, 0x41,
- 0x6a, 0xa1, 0x40, 0x71,
- 0x40, 0x61, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6a, 0xa5,
- 0x6b, 0x89, 0x40, 0x61,
- 0x40, 0x81, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x6e, 0x59, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x6e, 0x69, 0x40, 0x61,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x6e, 0x8d, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6e, 0xa5,
- 0x63, 0x25, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x35,
- 0x63, 0x41, 0x40, 0x41,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x63, 0x59, 0x40, 0xb1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x5d,
- 0x63, 0x61, 0x40, 0x61,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x63, 0x6d, 0x40, 0x11,
- 0x40, 0xb1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x71,
- 0x63, 0xa1, 0x40, 0x71,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xa5,
- 0x63, 0xd5, 0x40, 0x71,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x40, 0x71,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x40, 0x71,
- 0x40, 0x91, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x39,
- 0x64, 0x61, 0x40, 0xa1,
- 0x40, 0x71, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0x64, 0x69, 0x40, 0x91,
- 0x40, 0x81, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x65, 0x31,
- 0x65, 0x35, 0x40, 0x81,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x68, 0x11,
- 0x6a, 0x31, 0x40, 0x41,
- 0x40, 0xc1, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x6a, 0x39, 0x40, 0xb1,
- 0x40, 0x61, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x6a, 0x71,
- 0x64, 0xd1, 0x40, 0x11,
- 0x40, 0x13, 0xc0, 0x38,
- 0xc0, 0x1c, 0x62, 0x19,
- 0x62, 0x1d, 0x40, 0x53,
- 0x40, 0x33, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x35,
- 0x62, 0x39, 0x40, 0x13,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x3d,
- 0x62, 0x49, 0x40, 0x23,
- 0x40, 0x23, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x4d,
- 0x62, 0x51, 0x40, 0x23,
- 0x40, 0x13, 0xc0, 0x1c,
- 0xc0, 0x1c, 0x62, 0x55,
- 0xf0, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x4c, 0x44, 0x46,
- 0xe4, 0x50, 0x0a, 0x00,
- 0x91, 0xc1, 0x0a, 0x14,
- 0x0c, 0x86, 0x48, 0x34,
- 0xc0, 0x00, 0x61, 0x95,
- 0x4e, 0x86, 0x08, 0x44,
- 0xc0, 0x00, 0x61, 0x95,
- 0xe6, 0x86, 0x44, 0x3a,
- 0x61, 0x90, 0x06, 0x44,
- 0xe4, 0x10, 0x08, 0x00,
- 0x55, 0x8a, 0x83, 0x55,
- 0xec, 0x04, 0x18, 0xc0,
- 0xc9, 0x87, 0xd1, 0x92,
- 0x66, 0xa2, 0x50, 0x2a,
- 0xe1, 0xf4, 0x14, 0x94,
- 0x50, 0x8a, 0x86, 0xa9,
- 0x94, 0x93, 0x60, 0x0e,
- 0xfb, 0x00, 0x12, 0x94,
- 0x50, 0x8a, 0x85, 0x97,
- 0xd9, 0x9e, 0xe6, 0x86,
- 0xa1, 0xcb, 0xdd, 0x8e,
- 0x00, 0x12, 0xfa, 0x75,
- 0x61, 0x99, 0x04, 0x86,
- 0x02, 0x02, 0xc0, 0x00,
- 0x61, 0x99, 0x06, 0xc6,
- 0x88, 0x1e, 0xc0, 0x00,
- 0x0c, 0x4c, 0x8c, 0x0e,
- 0xdd, 0x93, 0xf0, 0x3c,
- 0x04, 0xc6, 0x00, 0x02,
- 0xc0, 0x00, 0x61, 0x99,
- 0x84, 0x0d, 0x88, 0x24,
- 0x5a, 0x00, 0x5c, 0x08,
- 0xc0, 0x00, 0x00, 0x06,
- 0x61, 0x95, 0x04, 0x86,
- 0x88, 0x34, 0xc0, 0x00,
- 0x44, 0x86, 0x87, 0x0d,
- 0xc0, 0x00, 0x01, 0x95,
- 0xc0, 0x00, 0x04, 0x25,
- 0x04, 0x35, 0x8e, 0xb5,
- 0x87, 0x0d, 0xe0, 0x1c,
- 0x01, 0x99, 0x04, 0x46,
- 0x04, 0x25, 0x80, 0x00,
- 0x8c, 0x85, 0x80, 0x00,
- 0x83, 0x31, 0x01, 0xa5,
- 0xfa, 0x80, 0x08, 0x34,
- 0x08, 0x45, 0xc4, 0x47,
- 0x80, 0x4d, 0xfc, 0x08,
- 0x82, 0x31, 0x80, 0xb5,
- 0xf4, 0x18, 0x07, 0x0a,
- 0x06, 0x30, 0xfc, 0xc5,
- 0x0a, 0x34, 0xec, 0x04,
- 0x08, 0x50, 0xfa, 0x80,
- 0xc4, 0x57, 0x64, 0x04,
- 0x7c, 0x08, 0x0a, 0x35,
- 0x08, 0x25, 0xc4, 0x47,
- 0xa6, 0x23, 0xfc, 0x08,
- 0x06, 0x05, 0xa1, 0x2b,
- 0x80, 0x00, 0x04, 0x06,
- 0x61, 0x95, 0x58, 0x86,
- 0x46, 0x02, 0x40, 0x00,
- 0x0a, 0x55, 0xf1, 0x8c,
- 0x08, 0x45, 0xfc, 0x30,
- 0xaa, 0x43, 0xfc, 0x30,
- 0xe1, 0x7c, 0x18, 0x44,
- 0x98, 0x43, 0xf5, 0xc7,
- 0x46, 0x3a, 0x8d, 0x47,
- 0x44, 0x3a, 0xe6, 0x92,
- 0xcc, 0x27, 0xe0, 0x8a,
- 0x04, 0x14, 0x8a, 0x23,
- 0x61, 0x99, 0x06, 0x86,
- 0x8c, 0x34, 0xc0, 0x00,
- 0xfa, 0x00, 0x40, 0x32,
- 0xe6, 0x82, 0x40, 0x0a,
- 0xe0, 0x82, 0x40, 0x2a,
- 0xe4, 0x00, 0x42, 0xca,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x82, 0x8b, 0x7c, 0x2e,
- 0x86, 0x6b, 0x62, 0x18,
- 0x75, 0xb8, 0xbe, 0x1e,
- 0x60, 0x08, 0xef, 0xfc,
- 0x81, 0xa1, 0x91, 0x81,
- 0xe1, 0x00, 0x00, 0x0a,
- 0x10, 0x46, 0x09, 0x15,
- 0x7c, 0x14, 0xc0, 0x00,
- 0x00, 0x04, 0x96, 0x03,
- 0x80, 0x13, 0xfa, 0x80,
- 0xec, 0x00, 0x02, 0x19,
- 0x88, 0x85, 0xc3, 0xad,
- 0x40, 0x0a, 0xbe, 0x14,
- 0x94, 0x03, 0xe6, 0x86,
- 0xfa, 0x80, 0x0e, 0x04,
- 0x60, 0x84, 0x00, 0x74,
- 0xe0, 0x88, 0x02, 0x74,
- 0x7c, 0x04, 0x0c, 0x15,
- 0x00, 0x03, 0x8c, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0x61, 0x9c, 0x04, 0x14,
- 0xe4, 0x30, 0x02, 0xf0,
- 0xc5, 0x07, 0x7e, 0x2e,
- 0x00, 0xf0, 0x11, 0x0c,
- 0x76, 0x98, 0xe4, 0x40,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x50, 0x98, 0x4e, 0x72,
- 0xc0, 0x00, 0x00, 0xe6,
- 0x0c, 0x01, 0x4e, 0x01,
- 0x82, 0x91, 0xc0, 0x04,
- 0xfa, 0x80, 0x00, 0x94,
- 0xf4, 0x15, 0xd1, 0x0d,
- 0x82, 0x11, 0xbc, 0x14,
- 0xfa, 0x80, 0x00, 0x14,
- 0x56, 0x0a, 0xd1, 0x0d,
- 0x12, 0x06, 0x46, 0xa2,
- 0x5e, 0x15, 0xc0, 0x00,
- 0xfc, 0x35, 0xc0, 0x00,
- 0xbe, 0x04, 0x82, 0xa1,
- 0x7c, 0x75, 0x81, 0xab,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0xe4, 0x5d, 0xc2, 0x58,
- 0x40, 0x08, 0x98, 0x95,
- 0x8f, 0x5e, 0x81, 0x41,
- 0x61, 0x00, 0x00, 0x0a,
- 0x0b, 0x95, 0x91, 0x01,
- 0xc0, 0x00, 0x00, 0x46,
- 0x10, 0x74, 0x98, 0x73,
- 0x4e, 0x12, 0xfa, 0x80,
- 0x0e, 0x99, 0xf0, 0xa0,
- 0xd3, 0x4d, 0xec, 0x00,
- 0x50, 0x8a, 0x8e, 0x85,
- 0x88, 0x83, 0xe6, 0x96,
- 0xfa, 0x80, 0x10, 0x84,
- 0xf0, 0xa0, 0x54, 0x22,
- 0x6c, 0x01, 0x14, 0xb9,
- 0xbd, 0xbb, 0xc0, 0x04,
- 0x21, 0x4b, 0x8c, 0x15,
- 0x64, 0x01, 0x0e, 0x70,
- 0x8a, 0x15, 0xc0, 0x03,
- 0x88, 0xd5, 0xa5, 0x9b,
- 0x64, 0x04, 0x12, 0x80,
- 0x64, 0x00, 0x14, 0xa0,
- 0x56, 0x22, 0xc0, 0x13,
- 0x06, 0x84, 0x70, 0xa4,
- 0x16, 0xb9, 0xe0, 0x84,
- 0x40, 0x04, 0x6c, 0x01,
- 0x84, 0x83, 0xc4, 0x87,
- 0x16, 0x94, 0x28, 0xb6,
- 0x14, 0x20, 0xe0, 0x84,
- 0x40, 0x0e, 0x64, 0x01,
- 0x14, 0x5b, 0xc4, 0x97,
- 0x86, 0xa3, 0x7c, 0x2c,
- 0x04, 0x55, 0xa8, 0x5c,
- 0x20, 0x5e, 0xfc, 0x24,
- 0x64, 0x01, 0x0a, 0x20,
- 0x0a, 0x8b, 0xc0, 0x0c,
- 0x86, 0x53, 0x7c, 0x2c,
- 0x8f, 0x54, 0x94, 0x8c,
- 0x06, 0x90, 0x9c, 0x98,
- 0x9c, 0x36, 0xec, 0x04,
- 0x0e, 0x64, 0x82, 0x61,
- 0xc1, 0x7d, 0xfa, 0x80,
- 0x8d, 0x34, 0xee, 0x15,
- 0x18, 0x34, 0x82, 0x31,
- 0xc1, 0xcd, 0xfa, 0x80,
- 0x46, 0x82, 0x58, 0xca,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xc0, 0x18, 0x5e, 0x35,
- 0x82, 0x41, 0xfc, 0x35,
- 0x7c, 0x95, 0x8b, 0x4b,
- 0xc0, 0x00, 0x06, 0x06,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x14, 0x42, 0x46,
- 0x84, 0x18, 0x84, 0x14,
- 0x6b, 0xf1, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0xe1, 0x4c, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x00, 0x00, 0x4a,
- 0xe2, 0x00, 0x00, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x4c, 0x00, 0x06,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x83, 0x31, 0x00, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0x88, 0x3e, 0x80, 0x16,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x48, 0x41, 0x86,
- 0xe1, 0x98, 0x05, 0xc6,
- 0x81, 0x31, 0x00, 0x04,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0xdd, 0x93, 0x88, 0x3e,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x04,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x08,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xf4,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x9c, 0x10,
- 0xdd, 0x93, 0x80, 0x00,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x00, 0x80, 0x04,
- 0x41, 0xc6, 0xa1, 0x0d,
- 0x00, 0x05, 0x81, 0x48,
- 0x00, 0x19, 0x80, 0x00,
- 0x42, 0x10, 0x80, 0x00,
- 0x40, 0x11, 0x93, 0xec,
- 0xdd, 0x93, 0x80, 0x00,
- 0xfa, 0xfc, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x68, 0x0c, 0x7b, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x61, 0x34, 0x56, 0x86,
- 0x2c, 0x04, 0x80, 0x7b,
- 0xe1, 0x4c, 0x13, 0x06,
- 0x83, 0x21, 0x03, 0xa1,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x0c, 0x15, 0x80, 0x86,
- 0xc0, 0x0b, 0x69, 0xf9,
- 0x40, 0x86, 0xa1, 0x1b,
- 0x00, 0x15, 0x8f, 0xdc,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xe8, 0x40, 0x4d, 0xc8,
- 0x83, 0x11, 0x2c, 0x04,
- 0x40, 0x46, 0x00, 0xa6,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa4, 0x04, 0x80, 0xa6,
- 0xa4, 0x04, 0x80, 0x86,
- 0xa4, 0x04, 0x80, 0xa6,
- 0x8c, 0x0b, 0x00, 0x86,
- 0xe8, 0x10, 0x67, 0xa8,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xe8, 0x0c, 0x78, 0xc8,
- 0x67, 0xcd, 0x0c, 0x09,
- 0xa4, 0x09, 0xc0, 0x2d,
- 0x82, 0x75, 0xa5, 0x0b,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x8c, 0x0b, 0x80, 0xd5,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xe0, 0x2c, 0x12, 0x28,
- 0xf2, 0xfc, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xed, 0x50, 0x1e, 0xf0,
- 0x97, 0x11, 0x00, 0x6b,
- 0xe8, 0x10, 0x4d, 0x28,
- 0xef, 0xdc, 0x42, 0x46,
- 0x40, 0x00, 0x84, 0x08,
- 0x84, 0x06, 0xf3, 0xf8,
- 0x62, 0x65, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x15,
- 0x22, 0x58, 0xe0, 0x8c,
- 0x0c, 0x09, 0x80, 0x00,
- 0xc0, 0x2d, 0x6b, 0x85,
- 0x21, 0xf8, 0xa1, 0x0b,
- 0x06, 0x60, 0x80, 0x00,
- 0x40, 0xb6, 0x67, 0xa1,
- 0xe0, 0x04, 0x00, 0x06,
- 0x64, 0x50, 0x04, 0xf0,
- 0x81, 0x45, 0x81, 0x11,
- 0x00, 0x00, 0x49, 0x16,
- 0xa1, 0x0b, 0xec, 0x04,
- 0x19, 0x21, 0xfe, 0x95,
- 0x3e, 0x3e, 0x81, 0x51,
- 0x1b, 0x48, 0x81, 0x01,
- 0x00, 0x0a, 0xe0, 0x00,
- 0x1b, 0x48, 0xf0, 0x00,
- 0x52, 0x5a, 0xc0, 0x00,
- 0x86, 0x93, 0xe6, 0x8a,
- 0xe0, 0x20, 0x12, 0xa9,
- 0x12, 0x49, 0xa1, 0xab,
- 0x15, 0xf8, 0x80, 0x28,
- 0x12, 0xb9, 0x80, 0x00,
- 0xb1, 0xab, 0x60, 0x2c,
- 0xe0, 0x28, 0x12, 0x49,
- 0xe1, 0x84, 0x00, 0xb4,
- 0x40, 0x40, 0x7c, 0x0e,
- 0x89, 0x0e, 0xf0, 0xfc,
- 0xac, 0x05, 0xfe, 0x4e,
- 0x1e, 0x05, 0xb3, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x49, 0x90, 0x98,
- 0x80, 0x15, 0x0f, 0x41,
- 0x80, 0x00, 0x0b, 0xa8,
- 0x8e, 0xe5, 0xb5, 0xab,
- 0x1e, 0x05, 0xb7, 0xab,
- 0x40, 0x02, 0x80, 0x10,
- 0x00, 0x41, 0x90, 0x98,
- 0x80, 0x15, 0x0e, 0x41,
- 0x0c, 0x09, 0xaa, 0xc5,
- 0x40, 0x15, 0x62, 0x11,
- 0x89, 0xc4, 0xb9, 0xab,
- 0xe6, 0x82, 0x40, 0xca,
- 0x9a, 0x80, 0x00, 0x04,
- 0x90, 0x98, 0x40, 0x02,
- 0x0e, 0x41, 0x00, 0x49,
- 0xa6, 0xe5, 0x80, 0x1a,
- 0xa4, 0x25, 0xbb, 0xab,
- 0x8a, 0x45, 0xbd, 0xab,
- 0x81, 0x41, 0x3f, 0xab,
- 0x14, 0x0a, 0xa6, 0x05,
- 0x0c, 0x45, 0xe0, 0x40,
- 0x80, 0x0d, 0x08, 0x59,
- 0x14, 0x0a, 0xa2, 0x85,
- 0x0c, 0x45, 0xe0, 0x44,
- 0x80, 0x0d, 0x08, 0x5d,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x0c, 0x49, 0xe0, 0x48,
- 0x80, 0x36, 0x01, 0x85,
- 0x14, 0x0a, 0xa0, 0xc5,
- 0x86, 0x85, 0xe0, 0x4c,
- 0xe0, 0x50, 0x14, 0x0a,
- 0x89, 0x04, 0x88, 0x15,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0xe5, 0x00, 0x45,
- 0x8f, 0x35, 0xc0, 0x0d,
- 0xc2, 0x07, 0x89, 0x04,
- 0x00, 0x4b, 0x8c, 0x03,
- 0xc0, 0x0a, 0x6d, 0xa1,
- 0x89, 0x04, 0x8f, 0x25,
- 0x00, 0x41, 0x8c, 0x03,
- 0xc0, 0x15, 0x6e, 0x41,
- 0x6d, 0x41, 0x00, 0x01,
- 0x0d, 0x35, 0xc0, 0x15,
- 0x89, 0x04, 0xa0, 0x43,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x68, 0x65, 0x00, 0x45,
- 0x8b, 0xb5, 0xc0, 0x0d,
- 0x08, 0x04, 0x09, 0x24,
- 0x3c, 0x5e, 0xfa, 0x80,
- 0x8c, 0x23, 0x89, 0x01,
- 0x6f, 0x41, 0x04, 0x39,
- 0x81, 0x21, 0x40, 0x15,
- 0x0e, 0x24, 0x85, 0x45,
- 0x88, 0x73, 0xfa, 0x80,
- 0x0e, 0x70, 0x8c, 0x73,
- 0xc0, 0x6b, 0x66, 0x41,
- 0x11, 0x0a, 0x98, 0x8b,
- 0x06, 0x35, 0xf4, 0x1c,
- 0xc4, 0x04, 0x04, 0x20,
- 0x70, 0x10, 0x00, 0x0a,
- 0xe4, 0x04, 0x18, 0x80,
- 0x1c, 0x58, 0xfc, 0xd5,
- 0xfa, 0x80, 0x10, 0x84,
- 0x10, 0x89, 0x8c, 0x83,
- 0xc0, 0x2e, 0x67, 0xc1,
- 0xfa, 0x80, 0x0a, 0x54,
- 0xfa, 0x80, 0x10, 0x84,
- 0xfa, 0x35, 0x91, 0x5b,
- 0x93, 0xc1, 0x04, 0x0b,
- 0x89, 0x21, 0x7b, 0xf5,
- 0xf4, 0x0c, 0x44, 0x8a,
- 0x18, 0x06, 0x76, 0x75,
- 0x00, 0x0a, 0xc0, 0x00,
- 0x04, 0x04, 0x70, 0x10,
- 0xa2, 0x15, 0xfa, 0x80,
- 0xe0, 0x80, 0x56, 0x1a,
- 0xa0, 0x00, 0x08, 0x58,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0x44, 0xe4, 0x50,
- 0xbc, 0x54, 0x83, 0x21,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x5c, 0x10, 0x06, 0x29,
- 0xf0, 0x90, 0x40, 0x32,
- 0x44, 0x20, 0xbe, 0x34,
- 0x80, 0x26, 0xd0, 0x04,
- 0x89, 0x04, 0x95, 0x05,
- 0x8c, 0x03, 0xc4, 0x07,
- 0x64, 0xd1, 0x00, 0x45,
- 0x81, 0x75, 0xc0, 0x05,
- 0xc4, 0x07, 0x89, 0x04,
- 0x00, 0x45, 0x8c, 0x03,
- 0xc0, 0x05, 0x65, 0xd1,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x4b, 0xfc, 0x00,
- 0x80, 0x00, 0x08, 0xf8,
- 0xe0, 0x24, 0x12, 0x09,
- 0x84, 0x45, 0xab, 0x0b,
- 0x84, 0x65, 0xa3, 0x0b,
- 0x88, 0x65, 0xa5, 0x0b,
- 0x88, 0x85, 0xa7, 0x0b,
- 0x8a, 0x85, 0xa9, 0x0b,
- 0xa0, 0x15, 0xa1, 0x0b,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x90, 0x35,
- 0x82, 0x65, 0x80, 0x4d,
- 0xa4, 0x04, 0x87, 0xd5,
- 0x81, 0x4b, 0x03, 0x95,
- 0x81, 0x4d, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x95,
- 0x8c, 0x85, 0x80, 0x4d,
- 0x04, 0xf0, 0x7c, 0x04,
- 0x89, 0x44, 0xe4, 0x50,
- 0x60, 0x80, 0x40, 0x0a,
- 0x04, 0x09, 0x83, 0x01,
- 0x07, 0x35, 0xdc, 0x10,
- 0xd0, 0x04, 0x40, 0x00,
- 0x01, 0xe5, 0xa4, 0x04,
- 0xa6, 0x04, 0x80, 0x4d,
- 0x09, 0xc4, 0x80, 0x4d,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x65, 0xfc, 0x30,
- 0xa4, 0x04, 0x83, 0x15,
- 0x09, 0xc4, 0x81, 0x4b,
- 0xe4, 0x50, 0x00, 0xf0,
- 0x00, 0x29, 0xfc, 0x34,
- 0x82, 0x05, 0xfc, 0x30,
- 0x46, 0x4a, 0x7e, 0x44,
- 0x04, 0x06, 0xe0, 0x80,
- 0x01, 0x85, 0x80, 0x00,
- 0x7e, 0x44, 0x84, 0x3b,
- 0xe0, 0x80, 0x46, 0x0a,
- 0x46, 0x20, 0x83, 0x31,
- 0x98, 0x03, 0xd0, 0x04,
- 0xbe, 0x34, 0x80, 0x36,
- 0x7c, 0x04, 0x81, 0xd5,
- 0xe4, 0x50, 0x04, 0xf0,
- 0x40, 0x4a, 0x89, 0x44,
- 0x81, 0x01, 0x60, 0x80,
- 0xdc, 0x10, 0x04, 0x09,
- 0x88, 0x23, 0x7e, 0x44,
- 0x07, 0x15, 0x88, 0x06,
- 0xbc, 0x54, 0x99, 0x21,
- 0x56, 0x4a, 0x84, 0x55,
- 0x82, 0xe5, 0xe0, 0x80,
- 0x06, 0xf0, 0x7c, 0x04,
- 0x09, 0xc4, 0xe4, 0x50,
- 0xfe, 0x44, 0x81, 0x21,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x5c, 0x30, 0x06, 0x29,
- 0xf0, 0xb0, 0x40, 0x32,
- 0xfb, 0xe5, 0x80, 0x26,
- 0x01, 0x0a, 0x3e, 0x34,
- 0x84, 0xf5, 0xf4, 0x0c,
- 0x86, 0x85, 0xaf, 0xab,
- 0x8a, 0x85, 0xa5, 0xab,
- 0x8c, 0x25, 0xa7, 0xab,
- 0x8c, 0xc5, 0xa9, 0xab,
- 0x8e, 0x85, 0xab, 0xab,
- 0x90, 0x25, 0xad, 0xab,
- 0x82, 0x35, 0xa3, 0xab,
- 0xc2, 0x27, 0x88, 0x23,
- 0x04, 0x43, 0x8c, 0x23,
- 0x40, 0x0c, 0x6d, 0x21,
- 0xef, 0x55, 0x99, 0x21,
- 0xfe, 0x44, 0x99, 0x21,
- 0x72, 0x00, 0x40, 0x40,
- 0x09, 0x45, 0x82, 0x51,
- 0x08, 0x23, 0xcf, 0x07,
- 0x66, 0x41, 0x00, 0x60,
- 0x06, 0x24, 0xc0, 0x58,
- 0x80, 0x23, 0x60, 0x84,
- 0x64, 0x01, 0x04, 0x29,
- 0x86, 0x03, 0x40, 0x04,
- 0x6c, 0x01, 0x00, 0x43,
- 0xbe, 0x34, 0xc0, 0x01,
- 0x07, 0x05, 0xc8, 0x27,
- 0x88, 0x23, 0x84, 0x43,
- 0x8c, 0x23, 0xc4, 0x27,
- 0x68, 0x91, 0x04, 0x45,
- 0x85, 0x85, 0xc0, 0x05,
- 0xc4, 0x27, 0x88, 0x23,
- 0x04, 0x45, 0x8c, 0x23,
- 0xc0, 0x06, 0x60, 0x91,
- 0x88, 0x23, 0x85, 0x15,
- 0x8c, 0x23, 0xc2, 0x27,
- 0x69, 0x21, 0x04, 0x4b,
- 0x99, 0x21, 0x40, 0x0c,
- 0x88, 0x23, 0xe9, 0x65,
- 0x04, 0x49, 0x8c, 0x23,
- 0x40, 0x1a, 0x6a, 0x41,
- 0xe7, 0xf5, 0x99, 0x21,
- 0x00, 0x60, 0x08, 0x23,
- 0xc0, 0x58, 0x66, 0x41,
- 0x60, 0x84, 0x06, 0x24,
- 0x04, 0x29, 0x80, 0x23,
- 0x40, 0x04, 0x60, 0x01,
- 0x00, 0x43, 0x86, 0x03,
- 0xc0, 0x01, 0x6c, 0x01,
- 0xc8, 0x27, 0xbe, 0x34,
- 0x65, 0x75, 0xa4, 0x43,
- 0x0b, 0x0a, 0x99, 0x21,
- 0x24, 0xc8, 0xe4, 0xfc,
- 0x4c, 0x15, 0x9f, 0xfc,
- 0x40, 0x0b, 0x69, 0xed,
- 0x4c, 0x15, 0x81, 0x01,
- 0x40, 0x0b, 0x69, 0xe9,
- 0x85, 0xa5, 0x81, 0x21,
- 0x64, 0x50, 0x06, 0xf0,
- 0xec, 0x80, 0x08, 0x10,
- 0x7c, 0x04, 0x06, 0x39,
- 0xfb, 0x90, 0x4a, 0x12,
- 0x64, 0x7c, 0x03, 0x0a,
- 0xec, 0x7c, 0x08, 0x52,
- 0x6c, 0x00, 0x10, 0x44,
- 0x06, 0xcb, 0xa8, 0x53,
- 0x18, 0x06, 0x82, 0x11,
- 0x0e, 0xc4, 0x80, 0x00,
- 0x81, 0xc1, 0x68, 0x90,
- 0x9c, 0x00, 0x58, 0x30,
- 0x6f, 0x90, 0x06, 0xc4,
- 0x46, 0x82, 0xa9, 0xcf,
- 0xb8, 0x0f, 0x78, 0x8c,
- 0x06, 0x52, 0x26, 0x7f,
- 0x4c, 0x05, 0xec, 0x04,
- 0x40, 0x0b, 0x69, 0xe9,
- 0xae, 0x2f, 0xa7, 0x7f,
- 0x69, 0xed, 0x4c, 0x25,
- 0x02, 0x0a, 0xc0, 0x0b,
- 0xf4, 0xb5, 0xe1, 0x00,
- 0xa1, 0x0b, 0xa4, 0x0f,
- 0x0c, 0x09, 0x88, 0x05,
- 0xc0, 0x38, 0x64, 0xc5,
- 0x64, 0xc1, 0x0c, 0x19,
- 0x43, 0x0d, 0xc0, 0x38,
- 0x64, 0xc5, 0x00, 0x60,
- 0x86, 0xf5, 0xc0, 0xe1,
- 0xef, 0xdc, 0x42, 0x46,
- 0x88, 0x18, 0x82, 0x2b,
- 0x88, 0x16, 0xc2, 0x19,
- 0x6e, 0x0d, 0x0c, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0x80, 0x00, 0x02, 0x16,
- 0x03, 0x11, 0x4c, 0x11,
- 0x81, 0xf5, 0x80, 0x38,
- 0xc2, 0x09, 0x84, 0x08,
- 0x83, 0x25, 0x84, 0x06,
- 0xef, 0xdc, 0x40, 0x46,
- 0x84, 0x08, 0x80, 0x1b,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x00, 0x60, 0x04, 0x06,
- 0xc0, 0xe1, 0x64, 0xc5,
- 0x02, 0x0a, 0x80, 0x18,
- 0x02, 0x10, 0xe3, 0xfc,
- 0x40, 0x11, 0xc4, 0x04,
- 0x1e, 0xf0, 0xc0, 0x00,
- 0x0c, 0x0c, 0xe5, 0x50,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xef, 0xdc, 0x40, 0x46,
- 0x80, 0x28, 0x80, 0x18,
- 0x04, 0x19, 0xc2, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x80, 0x26, 0xa2, 0x2f,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xef, 0xdc, 0x02, 0x86,
- 0xe0, 0x70, 0x02, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x64, 0xd5, 0x00, 0x29,
- 0xa7, 0x2b, 0xc0, 0x2b,
- 0x80, 0x00, 0x02, 0x29,
- 0x9c, 0x20, 0x44, 0x20,
- 0x80, 0x00, 0x42, 0x21,
- 0xff, 0xfc, 0x14, 0x68,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x51, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x49, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x45, 0xe8,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x55, 0x00, 0x19,
- 0x00, 0x29, 0xc0, 0x2b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x84, 0x06, 0x14,
- 0x66, 0x86, 0x42, 0x2a,
- 0xfa, 0x80, 0x04, 0x34,
- 0x6c, 0x4d, 0x40, 0x31,
- 0x06, 0x0a, 0x40, 0x2b,
- 0x42, 0x1a, 0xf0, 0x00,
- 0x40, 0x11, 0xe0, 0x0a,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x81, 0x01, 0x80, 0xa5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x96,
- 0x6f, 0xf8, 0x43, 0x08,
- 0xe0, 0x08, 0x4c, 0x96,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x15, 0x61, 0x45,
- 0xec, 0x04, 0x02, 0x00,
- 0xf4, 0x1c, 0x03, 0x0a,
- 0x0c, 0x19, 0x82, 0xd5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xec, 0x04, 0x04, 0x10,
- 0xf4, 0x24, 0x05, 0x0a,
- 0x40, 0x0a, 0x80, 0xd5,
- 0x00, 0x8a, 0xe6, 0x86,
- 0x84, 0x35, 0xe5, 0x44,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0f, 0xf6, 0x40, 0x2b,
- 0x03, 0xf6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf8, 0x40, 0x48,
- 0x0d, 0x78, 0xa3, 0x0b,
- 0x0c, 0x19, 0x80, 0x00,
- 0xc0, 0x15, 0x61, 0x41,
- 0x61, 0x51, 0x0c, 0x09,
- 0x04, 0x14, 0x40, 0x15,
- 0x44, 0x0a, 0xfa, 0x80,
- 0x05, 0x0a, 0xe6, 0x8a,
- 0x82, 0x95, 0xe4, 0xa0,
- 0x61, 0x45, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xe6, 0x8a, 0x44, 0x3a,
- 0xe4, 0x84, 0x04, 0x8a,
- 0x0c, 0x29, 0x84, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x76,
- 0x60, 0x08, 0x42, 0x76,
- 0x7d, 0xf8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x80, 0x00, 0x0b, 0x28,
- 0x61, 0x41, 0x0c, 0x19,
- 0x0c, 0x09, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x04,
- 0x61, 0x49, 0x0c, 0x39,
- 0x42, 0x2a, 0xc0, 0x15,
- 0x86, 0x13, 0xe6, 0x86,
- 0xe4, 0xa0, 0x03, 0x0a,
- 0x0c, 0x19, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x45,
- 0x61, 0x55, 0x0c, 0x29,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x02, 0x8a, 0x86, 0x13,
- 0x84, 0x15, 0xe4, 0x84,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x76, 0x40, 0x2b,
- 0x42, 0x76, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x7b, 0x08,
- 0xa0, 0x65, 0xa3, 0x0b,
- 0x61, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x15,
- 0x86, 0xd5, 0xf0, 0x10,
- 0x61, 0x55, 0x0c, 0x09,
- 0xa9, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x86, 0x35,
- 0xc0, 0x15, 0x61, 0x41,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x45,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x06,
- 0x60, 0x08, 0x42, 0x06,
- 0x78, 0xd8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x98, 0x05,
- 0xc0, 0x15, 0x61, 0x49,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x84, 0x65,
- 0xc0, 0x15, 0x61, 0x4d,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x82, 0xa5,
- 0xc0, 0x15, 0x61, 0x51,
- 0xf8, 0x0c, 0x00, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x15, 0x61, 0x55,
- 0xf8, 0x0c, 0x00, 0x0a,
- 0x0c, 0x29, 0x82, 0xa5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x4e, 0x16,
- 0x60, 0x08, 0x42, 0x16,
- 0x76, 0x98, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xf4,
- 0x0c, 0x09, 0x8e, 0x85,
- 0xc0, 0x15, 0x61, 0x41,
- 0x88, 0xb5, 0xa3, 0x0b,
- 0x61, 0x45, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x15,
- 0x0c, 0x09, 0x88, 0x15,
- 0xc0, 0x15, 0x61, 0x51,
- 0xec, 0x10, 0x00, 0x00,
- 0xf4, 0x30, 0x01, 0x0a,
- 0x0c, 0x09, 0x82, 0x55,
- 0x40, 0x15, 0x61, 0x55,
- 0x00, 0x00, 0x81, 0x71,
- 0x00, 0x8a, 0xec, 0x10,
- 0x88, 0x35, 0xf4, 0x34,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x36, 0x40, 0x2b,
- 0x42, 0x36, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x74, 0x28,
- 0x03, 0x55, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x61, 0x51, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0xa9, 0x0b, 0x82, 0x05,
- 0x0c, 0x09, 0x84, 0x15,
- 0xc0, 0x15, 0x61, 0x55,
- 0xa9, 0x0b, 0x01, 0x65,
- 0x61, 0x55, 0x0c, 0x09,
- 0xb1, 0x0b, 0xc0, 0x15,
- 0x81, 0x71, 0x00, 0xd5,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x26, 0x40, 0x2b,
- 0x42, 0x26, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x71, 0xe8,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0xcc,
- 0x81, 0x01, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x99, 0x06, 0xc0, 0x16,
- 0x42, 0x4a, 0x91, 0x06,
- 0x42, 0x06, 0x60, 0x80,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x80, 0x00, 0x0c, 0x58,
- 0x6f, 0xfc, 0x6d, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0xc0, 0x00, 0x0b, 0xf8,
- 0x61, 0x41, 0x0c, 0x09,
- 0x04, 0xf0, 0x40, 0x15,
- 0x0c, 0x19, 0xe4, 0x20,
- 0xc0, 0x15, 0x61, 0x45,
- 0x66, 0x82, 0x40, 0x1a,
- 0xe4, 0x30, 0x02, 0xf0,
- 0x63, 0x09, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x15,
- 0xe8, 0x00, 0x4b, 0x88,
- 0x61, 0x49, 0x0c, 0x09,
- 0x99, 0x18, 0xc0, 0x15,
- 0x61, 0x4d, 0x0c, 0x29,
- 0x11, 0x38, 0xc0, 0x15,
- 0x0c, 0x09, 0xc5, 0x07,
- 0x40, 0x15, 0x61, 0x41,
- 0x4c, 0x11, 0x80, 0x13,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe1, 0x88, 0x08, 0x24,
- 0x61, 0x51, 0x0c, 0x19,
- 0x86, 0x43, 0x40, 0x15,
- 0x61, 0x55, 0x0c, 0x29,
- 0xa3, 0x0b, 0x40, 0x15,
- 0x61, 0x45, 0x0c, 0x39,
- 0x4c, 0x41, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x3d,
- 0x6c, 0x51, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x06, 0x0a, 0x80, 0x95,
- 0x9c, 0x45, 0xf0, 0x04,
- 0xf4, 0x0c, 0x07, 0x0a,
- 0x4c, 0x21, 0x84, 0x55,
- 0x40, 0x2b, 0x6c, 0x4d,
- 0x4c, 0x31, 0xea, 0x0d,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x63, 0x58, 0x8c, 0x25,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x9c, 0x55, 0xa1, 0x0b,
- 0x6c, 0x41, 0x0c, 0x09,
- 0x85, 0xe5, 0xc0, 0x2b,
- 0xf0, 0x10, 0x06, 0x0a,
- 0x68, 0x0d, 0x86, 0x15,
- 0x4c, 0x21, 0x89, 0x31,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x45, 0x4c, 0x31,
- 0x86, 0x85, 0xc0, 0x2b,
- 0x6f, 0xfc, 0x62, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x96, 0xb5,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0x86, 0x15, 0xab, 0x0b,
- 0x6f, 0xfc, 0x64, 0x48,
- 0xfd, 0x15, 0x8c, 0x0b,
- 0x6f, 0xfc, 0x64, 0x08,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x92, 0xf5,
- 0xc0, 0x15, 0x61, 0x41,
- 0xf4, 0x95, 0xe8, 0x0d,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x41, 0x4c, 0x01,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x00, 0x04,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0x40, 0x1a, 0xc0, 0x2b,
- 0x0c, 0x19, 0xe6, 0x82,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x51, 0x0c, 0x09,
- 0x00, 0x0a, 0x40, 0x2b,
- 0x04, 0x16, 0xe0, 0x40,
- 0x4c, 0x21, 0x80, 0x00,
- 0x80, 0x2c, 0x0c, 0x81,
- 0x6c, 0x49, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2b,
- 0x00, 0x2b, 0x0c, 0x6d,
- 0xfa, 0x80, 0x02, 0x14,
- 0x0c, 0x69, 0x4c, 0x01,
- 0x44, 0x3a, 0x80, 0x2b,
- 0x40, 0x1a, 0xe6, 0x8a,
- 0x40, 0x2a, 0xe6, 0x82,
- 0x4c, 0x01, 0xe0, 0x02,
- 0x40, 0x2c, 0x6c, 0x79,
- 0xfa, 0x80, 0x02, 0x04,
- 0x66, 0x31, 0x4c, 0x13,
- 0x44, 0x98, 0xc0, 0x16,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x82, 0x95, 0xa1, 0x0b,
- 0x6f, 0xf0, 0x64, 0xe8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x73, 0xb8, 0x80, 0xf5,
- 0x8c, 0x0b, 0x68, 0x24,
- 0x68, 0x30, 0x4f, 0x08,
- 0x21, 0x11, 0x8c, 0x0b,
- 0x4c, 0x11, 0x83, 0x21,
- 0xc0, 0x1b, 0x65, 0x61,
- 0x65, 0x41, 0x4c, 0x21,
- 0x0c, 0xcc, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x68, 0x11, 0x00, 0x49,
- 0x00, 0x39, 0xc0, 0x27,
- 0x40, 0x27, 0x68, 0x15,
- 0x08, 0x8a, 0x81, 0x01,
- 0x08, 0x44, 0xe5, 0x40,
- 0x00, 0x40, 0x81, 0x88,
- 0x06, 0x8a, 0x0c, 0x50,
- 0x04, 0x06, 0xe5, 0x00,
- 0x06, 0x34, 0x81, 0x01,
- 0x00, 0x34, 0x81, 0x88,
- 0x00, 0x00, 0x9a, 0x80,
- 0x88, 0x06, 0x8c, 0x40,
- 0xa1, 0x3b, 0x84, 0x38,
- 0xc4, 0x08, 0x06, 0x30,
- 0xc1, 0x88, 0x06, 0x34,
- 0xc0, 0x00, 0x42, 0x31,
- 0xc0, 0x00, 0x04, 0x09,
- 0xfb, 0xfc, 0x00, 0x0a,
- 0xda, 0x80, 0x00, 0x04,
- 0xc4, 0x08, 0x00, 0x00,
- 0xc1, 0x88, 0x00, 0x04,
- 0x40, 0x00, 0x44, 0x01,
- 0xdd, 0x93, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x40, 0xc8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x8b, 0x55, 0xf2, 0x00,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x44, 0x1a, 0xc0, 0x2b,
- 0xa1, 0x2b, 0xe5, 0x02,
- 0x0c, 0x39, 0x86, 0x05,
- 0xc0, 0x2b, 0x6c, 0x4d,
- 0x6c, 0x49, 0x0c, 0x49,
- 0x0c, 0x59, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0x6c, 0x41, 0x0c, 0xc9,
- 0x46, 0x4a, 0xc0, 0x2b,
- 0x48, 0xca, 0xe5, 0x0e,
- 0x46, 0x4a, 0xe5, 0x16,
- 0x44, 0x3a, 0xe5, 0x0e,
- 0x03, 0x65, 0xe0, 0x0a,
- 0xef, 0xfc, 0x04, 0x22,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x56, 0x40, 0x2b,
- 0x42, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf4, 0x5c, 0xc8,
- 0x88, 0x05, 0xa3, 0x0b,
- 0x6c, 0x51, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2b,
- 0x6c, 0x55, 0x0c, 0x09,
- 0x04, 0x24, 0xc0, 0x2b,
- 0xc2, 0x07, 0x7a, 0x80,
- 0x04, 0x22, 0x01, 0x71,
- 0x4c, 0x01, 0xed, 0x00,
- 0x40, 0x1b, 0x63, 0x05,
- 0x4c, 0x11, 0xc2, 0x17,
- 0x40, 0x1b, 0x63, 0x01,
- 0xe0, 0x04, 0x00, 0x06,
- 0x63, 0x09, 0x4c, 0x01,
- 0x4c, 0x21, 0xc0, 0x1b,
- 0xc0, 0x1b, 0x63, 0x0d,
- 0x63, 0x11, 0x4c, 0x71,
- 0x8e, 0x0b, 0xc0, 0x1b,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x6b,
- 0x63, 0x0d, 0x0c, 0x79,
- 0x02, 0xf0, 0x40, 0x1b,
- 0x0c, 0x99, 0xe4, 0x20,
- 0xc0, 0x2b, 0x6c, 0x51,
- 0x6c, 0x55, 0x0c, 0xa9,
- 0xfc, 0x0e, 0xc0, 0x2b,
- 0x3c, 0x06, 0x89, 0x06,
- 0x45, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xc0, 0x00, 0x10, 0x06,
- 0x00, 0x08, 0x1e, 0x85,
- 0x90, 0x95, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x74, 0xf8, 0x9e, 0x2b,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8e, 0x65, 0xa1, 0x8b,
- 0x6c, 0x3d, 0x0c, 0x39,
- 0x02, 0x90, 0x40, 0x2b,
- 0x3c, 0x48, 0xec, 0x04,
- 0xec, 0x04, 0x04, 0xa0,
- 0x6c, 0x39, 0x0c, 0x59,
- 0x81, 0xc1, 0x40, 0x2b,
- 0xa8, 0x33, 0x89, 0x08,
- 0x60, 0x8c, 0x08, 0x34,
- 0x64, 0x20, 0x06, 0x60,
- 0xa0, 0x53, 0xc0, 0x6d,
- 0xc6, 0x57, 0x05, 0x45,
- 0x12, 0x44, 0x02, 0xc1,
- 0x51, 0xcd, 0xfa, 0x80,
- 0xf0, 0x94, 0x54, 0x12,
- 0x79, 0x00, 0x46, 0xa1,
- 0xf0, 0xa4, 0x56, 0x22,
- 0x82, 0x25, 0x8c, 0xb6,
- 0x6c, 0x51, 0x0c, 0x99,
- 0x0a, 0x54, 0x40, 0x2b,
- 0xc2, 0x97, 0xfa, 0x80,
- 0x92, 0x53, 0x01, 0xd5,
- 0x6c, 0x55, 0x0c, 0x49,
- 0x81, 0xc1, 0x40, 0x2b,
- 0x6c, 0x39, 0x0c, 0x59,
- 0xc2, 0x47, 0xc0, 0x2b,
- 0x92, 0x43, 0x20, 0x53,
- 0x0e, 0x70, 0xc6, 0x57,
- 0x82, 0x31, 0x6c, 0x04,
- 0xf6, 0xb5, 0xa1, 0x7b,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x51, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x41,
- 0xc1, 0xc3, 0x87, 0x25,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x7b,
- 0x82, 0x6b, 0x7c, 0x0e,
- 0x02, 0xf0, 0x3e, 0x0e,
- 0x7e, 0x98, 0xe4, 0x20,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x84, 0x15, 0xa1, 0x0b,
- 0x64, 0x10, 0x02, 0xf0,
- 0x41, 0x18, 0x8e, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0xfc, 0x04, 0x82, 0x35,
- 0x40, 0x1a, 0xbe, 0x14,
- 0x00, 0x02, 0xe6, 0x82,
- 0x18, 0x0e, 0xef, 0xfc,
- 0x98, 0xf1, 0x81, 0x01,
- 0xf2, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x55, 0x00, 0x39,
- 0x82, 0x4b, 0x40, 0x2b,
- 0x6c, 0x4d, 0x00, 0x29,
- 0x00, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x45,
- 0xc1, 0xc3, 0x81, 0x25,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x85, 0xa1, 0x3b,
- 0xe5, 0x0a, 0x40, 0x1a,
- 0xe0, 0x0e, 0x40, 0x0a,
- 0xef, 0xfc, 0x00, 0x02,
- 0x81, 0x01, 0x10, 0x0e,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x00, 0x29, 0xdd, 0x93,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x42, 0x56,
- 0x6f, 0xf4, 0x4e, 0xe8,
- 0xe0, 0x08, 0x4c, 0x56,
- 0x0c, 0x06, 0xa3, 0x0b,
- 0x8c, 0x0b, 0xc0, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xc6, 0xc1, 0x83,
- 0x43, 0x26, 0x61, 0x48,
- 0x80, 0x04, 0xe0, 0x0c,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x48,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x9c,
- 0xef, 0xe4, 0x56, 0xa8,
- 0x6f, 0x9c, 0x62, 0x48,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x36,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x55, 0x18, 0x80, 0x16,
- 0x60, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x53, 0x98, 0x80, 0x16,
- 0x5f, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x76,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x52, 0x18, 0x80, 0x16,
- 0x5d, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0x96,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x50, 0x98, 0x80, 0x16,
- 0x5c, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xa6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4f, 0x18, 0x80, 0x16,
- 0x5a, 0xb8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xe6,
- 0x00, 0x16, 0x80, 0x04,
- 0x60, 0x11, 0x00, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0xe1, 0x48, 0x43, 0x86,
- 0x80, 0x18, 0x84, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4d, 0x98, 0x80, 0x16,
- 0x59, 0x38, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfa, 0x00, 0x00, 0x4c,
- 0xe2, 0xc0, 0x00, 0x2c,
- 0x61, 0x48, 0x41, 0xc6,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xfc, 0x9c, 0x02, 0x14,
- 0x4c, 0x38, 0x80, 0x16,
- 0x57, 0xd8, 0xef, 0xe4,
- 0x81, 0x01, 0x6f, 0x9c,
- 0xfe, 0x1c, 0x04, 0xcc,
- 0x6f, 0xf8, 0x46, 0x28,
- 0x80, 0x7b, 0x80, 0x6b,
- 0xe0, 0x00, 0x0e, 0x2a,
- 0x40, 0x01, 0x05, 0xf8,
- 0x05, 0x01, 0x80, 0x00,
- 0x4c, 0x01, 0x81, 0x91,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x94, 0x00, 0x06,
- 0x10, 0x60, 0x00, 0x9e,
- 0xc0, 0xaf, 0x64, 0x1d,
- 0xef, 0xe8, 0x7d, 0x68,
- 0x82, 0x65, 0xa1, 0x0b,
- 0xa0, 0x06, 0x87, 0x01,
- 0xef, 0xf8, 0x45, 0x28,
- 0xef, 0xf8, 0x45, 0x68,
- 0xef, 0xe4, 0x49, 0xe8,
- 0xef, 0xe8, 0x7d, 0x08,
- 0x45, 0x86, 0x01, 0x11,
- 0x6a, 0xd8, 0xee, 0x10,
- 0x8c, 0x0b, 0x6f, 0x9c,
- 0x6f, 0xdc, 0x00, 0x86,
- 0x6a, 0x78, 0x81, 0x11,
- 0x44, 0xc6, 0x6f, 0x9c,
- 0x00, 0x86, 0xe0, 0x00,
- 0x42, 0x86, 0x60, 0x0c,
- 0x4c, 0x15, 0xe0, 0x3c,
- 0x40, 0x0e, 0x60, 0xd9,
- 0x60, 0x01, 0x02, 0x06,
- 0x4c, 0x05, 0xc0, 0x7d,
- 0xc0, 0x0e, 0x60, 0xcd,
- 0x60, 0xd1, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x0e,
- 0x40, 0x0e, 0x60, 0xd5,
- 0x4c, 0x05, 0x8b, 0x01,
- 0x40, 0x0e, 0x60, 0xdd,
- 0x4c, 0x15, 0x83, 0x01,
- 0x40, 0x0a, 0x6d, 0x49,
- 0xe0, 0x50, 0x03, 0xe6,
- 0x6e, 0x91, 0x4c, 0x01,
- 0x00, 0x06, 0x40, 0x2c,
- 0x4c, 0x13, 0xe4, 0x00,
- 0x40, 0x16, 0x67, 0x39,
- 0xe0, 0x00, 0x42, 0x16,
- 0x67, 0x3d, 0x4c, 0x03,
- 0x00, 0x76, 0x40, 0x16,
- 0xc0, 0x20, 0x60, 0x09,
- 0x6e, 0x01, 0x4c, 0x13,
- 0x87, 0x11, 0x40, 0x15,
- 0x4c, 0x11, 0x80, 0x96,
- 0xc0, 0x38, 0x64, 0xc1,
- 0x00, 0x06, 0x83, 0x05,
- 0x10, 0x60, 0x61, 0x94,
- 0xc0, 0xaf, 0x64, 0x1c,
- 0x23, 0x1b, 0x80, 0x14,
- 0x4c, 0x11, 0x83, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x15,
- 0xef, 0xe4, 0x5a, 0xa8,
- 0x64, 0x60, 0x18, 0xf0,
- 0x60, 0x18, 0x8c, 0x0b,
- 0x8d, 0x04, 0xe8, 0x10,
- 0x82, 0x55, 0xa1, 0x0b,
- 0xa1, 0x9b, 0x8f, 0x94,
- 0x01, 0x46, 0x80, 0xe5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa3, 0x0b, 0x80, 0x04,
- 0x5e, 0xd8, 0x88, 0x95,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x10, 0xb6, 0x20, 0x28,
- 0x02, 0xb6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xf0, 0x78, 0x68,
- 0x68, 0x38, 0x4a, 0xc8,
- 0x51, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x7d, 0x38, 0xa1, 0x8b,
- 0x50, 0x00, 0x6f, 0xf4,
- 0x7d, 0x58, 0x9c, 0x00,
- 0x41, 0xd8, 0xef, 0xf4,
- 0x01, 0x01, 0xef, 0xe4,
- 0x6a, 0x18, 0x83, 0x11,
- 0x8c, 0x2b, 0x6f, 0xe4,
- 0x0c, 0xcc, 0x90, 0x0b,
- 0xdd, 0x93, 0xf6, 0x1c,
- 0x68, 0x0c, 0x7a, 0x48,
- 0x00, 0x8b, 0x8c, 0x0b,
- 0xa1, 0x8b, 0x8c, 0x0b,
- 0x48, 0x78, 0x80, 0x85,
- 0xfb, 0xf5, 0xef, 0xf4,
- 0xe8, 0x14, 0x64, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x7a, 0x18, 0xf6, 0x55,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0xe8, 0x00, 0x45, 0x88,
- 0x40, 0x01, 0x04, 0x48,
- 0x8c, 0x0b, 0x00, 0x00,
- 0xef, 0xf4, 0x47, 0x68,
- 0x6f, 0xf0, 0x7f, 0x08,
- 0x01, 0xc6, 0x8c, 0x0b,
- 0x42, 0x46, 0x6f, 0xdc,
- 0x42, 0x1e, 0xe0, 0x04,
- 0x02, 0x16, 0x83, 0x11,
- 0xe0, 0x1c, 0x43, 0x46,
- 0xf8, 0x08, 0x40, 0x15,
- 0xef, 0xe4, 0x66, 0xa8,
- 0x68, 0x00, 0x48, 0x28,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x97, 0x11, 0x61, 0x4c,
- 0xa3, 0x9b, 0x00, 0x04,
- 0x81, 0x81, 0x01, 0x91,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x4c,
- 0x80, 0x16, 0x9d, 0x11,
- 0x74, 0x58, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x02, 0x0e, 0x80, 0x8b,
- 0x40, 0x10, 0x60, 0x01,
- 0xe5, 0x40, 0x00, 0x06,
- 0x02, 0x2b, 0x81, 0x85,
- 0xec, 0x04, 0x00, 0x00,
- 0x02, 0x33, 0xc9, 0x34,
- 0xc6, 0x9f, 0x84, 0x1b,
- 0xfe, 0x15, 0xa1, 0x0b,
- 0x72, 0xfd, 0x41, 0xc6,
- 0x00, 0x9e, 0xc0, 0x20,
- 0x44, 0x18, 0x8c, 0x0b,
- 0xa1, 0x8b, 0xe8, 0x38,
- 0x81, 0x35, 0xe4, 0xb5,
- 0xe8, 0x38, 0x43, 0xc8,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0x6f, 0xe8, 0x6f, 0x08,
- 0x80, 0x8b, 0x8e, 0x2b,
- 0xe2, 0x55, 0xa1, 0x8b,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x0b, 0x03, 0x31,
- 0xe8, 0x34, 0x4d, 0xe8,
- 0x80, 0x8b, 0x71, 0x35,
- 0x61, 0x20, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0x01, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x40, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x20,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x24,
- 0xdd, 0x93, 0x80, 0x16,
- 0x62, 0x65, 0x00, 0x09,
- 0x02, 0x46, 0x40, 0x15,
- 0x04, 0x14, 0xe1, 0x4c,
- 0x88, 0x09, 0x81, 0x31,
- 0x44, 0x20, 0x84, 0x28,
- 0x20, 0x2f, 0xf3, 0xec,
- 0xe1, 0x34, 0x40, 0x86,
- 0x83, 0x11, 0x04, 0x26,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x01, 0x06,
- 0x88, 0x36, 0x80, 0x24,
- 0x88, 0x16, 0x80, 0x24,
- 0x00, 0x36, 0x80, 0x04,
- 0xe1, 0x34, 0x40, 0x06,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x4c, 0x00, 0x86,
- 0x43, 0x06, 0x00, 0x04,
- 0x80, 0x16, 0xe0, 0x00,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x68, 0x05, 0x00, 0x1b,
- 0x00, 0x2b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0x01,
- 0x68, 0x15, 0x00, 0x3b,
- 0x00, 0x4b, 0xc0, 0x0a,
- 0x40, 0x0a, 0x68, 0x09,
- 0x00, 0x2b, 0xe0, 0x17,
- 0x40, 0x0a, 0x68, 0x0d,
- 0x00, 0x5b, 0xa4, 0x1f,
- 0x40, 0x0a, 0x68, 0x11,
- 0x80, 0x1e, 0xe0, 0x37,
- 0x28, 0x2f, 0xe0, 0x27,
- 0x82, 0x2e, 0xaa, 0x3f,
- 0xdd, 0x93, 0xc0, 0x3e,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0xa0, 0x55, 0xa8,
- 0x01, 0x06, 0x81, 0x11,
- 0x4f, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x44, 0x06,
- 0x88, 0x44, 0x9c, 0x34,
- 0x00, 0x1c, 0xc2, 0x19,
- 0x46, 0x01, 0xa1, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x10, 0x16, 0x83, 0x11,
- 0x88, 0x04, 0x83, 0x11,
- 0x41, 0xf6, 0x00, 0x66,
- 0x54, 0x18, 0xe0, 0x3c,
- 0x7b, 0xd8, 0xef, 0xa0,
- 0x1c, 0x04, 0xe8, 0x14,
- 0x4d, 0x18, 0x81, 0x11,
- 0xa8, 0xf1, 0xe8, 0x08,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x06, 0xc1, 0x83,
- 0x45, 0x06, 0x61, 0x98,
- 0x00, 0x1a, 0xe1, 0x4c,
- 0xe1, 0x38, 0x46, 0x86,
- 0x8c, 0x54, 0x88, 0x44,
- 0x00, 0x1c, 0xc4, 0x19,
- 0x48, 0x01, 0xa3, 0x01,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x16, 0x83, 0x11,
- 0x8c, 0x04, 0x81, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x67, 0xcd, 0x00, 0x19,
- 0xc8, 0x19, 0xc0, 0x2d,
- 0x67, 0xcd, 0x40, 0x11,
- 0x83, 0x11, 0x40, 0x2d,
- 0xe8, 0x08, 0x49, 0x88,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x4e, 0x48,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa5, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x85, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x47, 0x08,
- 0xe1, 0x38, 0x4f, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x45,
- 0x45, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x38,
- 0xc8, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x98, 0x04, 0x80, 0x16,
- 0xe8, 0x34, 0x75, 0x68,
- 0x02, 0x26, 0x18, 0x04,
- 0x45, 0x18, 0xe0, 0x10,
- 0x9c, 0x04, 0xe8, 0x08,
- 0x40, 0x0a, 0x80, 0x08,
- 0x84, 0xc5, 0xe0, 0x84,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x38, 0x45, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0x80, 0x1c, 0xd0, 0x19,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x26,
- 0x43, 0x78, 0x98, 0x04,
- 0x41, 0xf6, 0xe8, 0x08,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x49, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x47, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa7, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x87, 0x11, 0x40, 0x2b,
- 0xe8, 0x08, 0x40, 0xa8,
- 0xe1, 0x3c, 0x0e, 0x46,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x84, 0xe5,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0xe0, 0x19, 0x88, 0x34,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc2, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x02, 0x36, 0x00, 0x16,
- 0x98, 0x04, 0xe0, 0x10,
- 0xe8, 0x04, 0x7e, 0xe8,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0x05,
- 0x04, 0x06, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x94,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x20, 0x02, 0x36,
- 0x7d, 0x38, 0x98, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x40, 0x0a, 0x80, 0x08,
- 0x8a, 0x05, 0xe0, 0x88,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0x06,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0x98, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0x8c, 0x06, 0xc8, 0x09,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x38,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x00, 0x1b, 0x98, 0x04,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x02, 0x14,
- 0x6e, 0x09, 0x40, 0x13,
- 0x02, 0x36, 0x40, 0x15,
- 0x7a, 0x98, 0xe0, 0x40,
- 0x4c, 0x38, 0xe8, 0x04,
- 0x41, 0xf6, 0xef, 0xe0,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0xa0, 0x40, 0xc8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x7e, 0xe8,
- 0x61, 0x4c, 0x4d, 0x06,
- 0x98, 0x04, 0xa9, 0x11,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x89, 0x11, 0x40, 0x2b,
- 0xe8, 0x04, 0x77, 0xa8,
- 0xe1, 0x3c, 0x0f, 0x06,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x80, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0x9c,
- 0xc2, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x10, 0x02, 0x46,
- 0x75, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0x96,
- 0xe8, 0x04, 0x4c, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa0,
- 0xc4, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf4,
- 0xe0, 0x0c, 0x42, 0xa6,
- 0x4a, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x20, 0x02, 0x46,
- 0xe8, 0x04, 0x73, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa4,
- 0xc8, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xec,
- 0xe0, 0x0c, 0x42, 0xb6,
- 0x48, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x40, 0x02, 0x46,
- 0xe8, 0x04, 0x71, 0x88,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x8c, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xa8,
- 0xd0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xdc,
- 0xe0, 0x80, 0x02, 0x46,
- 0x6f, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xc6,
- 0xe8, 0x04, 0x46, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xa5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xac,
- 0xe0, 0x09, 0x8c, 0x08,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x00, 0x02, 0x46,
- 0x6d, 0xd8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xd6,
- 0xe8, 0x04, 0x44, 0x68,
- 0x80, 0x18, 0x9c, 0x04,
- 0xe0, 0x94, 0x42, 0x0a,
- 0x01, 0x06, 0x86, 0xc5,
- 0x04, 0xc6, 0x61, 0x98,
- 0x80, 0x1a, 0xe1, 0x3c,
- 0x02, 0x14, 0x88, 0x34,
- 0x80, 0x1c, 0xfc, 0xb0,
- 0x00, 0x04, 0x8c, 0x08,
- 0x8c, 0x06, 0xfc, 0x94,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0x7c, 0x42, 0x10,
- 0x02, 0x46, 0x00, 0x16,
- 0x98, 0x04, 0xe2, 0x00,
- 0xe8, 0x04, 0x6b, 0xc8,
- 0x42, 0xe6, 0x18, 0x04,
- 0x42, 0x58, 0xe0, 0x0c,
- 0x9c, 0x04, 0xe8, 0x04,
- 0x42, 0x0a, 0x80, 0x18,
- 0x86, 0xc5, 0xe0, 0x98,
- 0x61, 0x98, 0x01, 0x06,
- 0xe1, 0x3c, 0x04, 0xc6,
- 0x88, 0x34, 0x80, 0x1a,
- 0xfc, 0xb4, 0x02, 0x14,
- 0x8c, 0x08, 0x80, 0x1c,
- 0xfc, 0x98, 0x00, 0x04,
- 0x88, 0x04, 0x8c, 0x06,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf2, 0xfc,
- 0xe4, 0x00, 0x02, 0x46,
- 0x69, 0xb8, 0x98, 0x04,
- 0x18, 0x04, 0xe8, 0x04,
- 0xe0, 0x0c, 0x42, 0xf6,
- 0xe8, 0x04, 0x40, 0x48,
- 0x00, 0x00, 0x9c, 0x04,
- 0x82, 0x0d, 0xff, 0x11,
- 0x00, 0xc6, 0x86, 0xb5,
- 0x80, 0x14, 0xe1, 0x3c,
- 0x04, 0x24, 0x84, 0x28,
- 0x84, 0x26, 0xfc, 0x9c,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x03, 0x06, 0x00, 0x16,
- 0x84, 0x2a, 0xe1, 0x98,
- 0x04, 0x24, 0x98, 0x04,
- 0x04, 0x2c, 0xfc, 0xb8,
- 0xe8, 0x00, 0x02, 0x46,
- 0xe8, 0x04, 0x67, 0xa8,
- 0x43, 0x06, 0x18, 0x04,
- 0x7f, 0x98, 0xe0, 0x0c,
- 0x41, 0xf6, 0xe8, 0x00,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x6d, 0xa8,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x6b, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0x03, 0x06, 0x61, 0x4c,
- 0x1c, 0x04, 0xe1, 0x98,
- 0xe1, 0x3c, 0x46, 0x46,
- 0xab, 0x41, 0x04, 0x2a,
- 0x40, 0x41, 0x8c, 0x54,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x7c, 0xbc, 0x00, 0x24,
- 0x04, 0x0c, 0x83, 0x21,
- 0x94, 0x26, 0x8b, 0x11,
- 0x80, 0x66, 0x8c, 0x04,
- 0x63, 0x98, 0x9c, 0x04,
- 0x9c, 0x04, 0xe8, 0x04,
- 0xef, 0xe0, 0x71, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x69, 0xb8, 0x83, 0x11,
- 0xa8, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x84, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x8c, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x01, 0x61, 0xc1, 0x83,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x9c, 0x67, 0xc8,
- 0x4f, 0x06, 0x81, 0x11,
- 0xad, 0x01, 0x61, 0x4c,
- 0x83, 0x81, 0x1c, 0x14,
- 0x6c, 0x1d, 0x42, 0x01,
- 0x83, 0x01, 0x40, 0x2b,
- 0xef, 0xe4, 0x72, 0x88,
- 0xe1, 0x3c, 0x41, 0xc6,
- 0x04, 0x86, 0x80, 0x14,
- 0x80, 0x04, 0x8d, 0x11,
- 0x9c, 0x04, 0x80, 0x66,
- 0xe8, 0x04, 0x5f, 0xc8,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x66, 0x18, 0x83, 0x11,
- 0xa0, 0xf1, 0xef, 0x9c,
- 0xf0, 0x04, 0x1f, 0x0c,
- 0xf6, 0x8c, 0x0f, 0xfc,
- 0xfd, 0x64, 0xbc, 0xf4,
- 0xc1, 0xc3, 0xc1, 0x53,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x41, 0xf6, 0xc1, 0x83,
- 0x81, 0x11, 0x60, 0x3c,
- 0x6f, 0x9c, 0x64, 0x28,
- 0x4f, 0x06, 0x81, 0x61,
- 0xaf, 0x01, 0x61, 0x4c,
- 0x42, 0x01, 0x9c, 0x14,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6e, 0xf8, 0x81, 0x01,
- 0x1c, 0x04, 0xef, 0xe4,
- 0x5c, 0x98, 0x8f, 0x11,
- 0x00, 0x86, 0xe8, 0x04,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf8, 0xc0, 0x02, 0x0a,
- 0x80, 0x18, 0x80, 0xe5,
- 0xf0, 0xc0, 0x42, 0x10,
- 0xe0, 0x80, 0x02, 0x0a,
- 0x9c, 0x14, 0x82, 0xb5,
- 0x6c, 0x15, 0x02, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x00, 0x19, 0xe0, 0x84,
- 0x80, 0x18, 0xc0, 0x70,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x9c, 0x04, 0x80, 0x16,
- 0x6c, 0x15, 0x00, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x84, 0x45, 0xe0, 0x84,
- 0x68, 0x04, 0x5a, 0x88,
- 0xe0, 0x10, 0x02, 0x76,
- 0x68, 0xd8, 0x9c, 0x04,
- 0x9c, 0x04, 0xef, 0xe4,
- 0x6e, 0x09, 0x00, 0x1b,
- 0x42, 0x10, 0xc0, 0x15,
- 0xc0, 0xfd, 0x73, 0xfd,
- 0x6e, 0x09, 0x40, 0x13,
- 0x01, 0x46, 0xc0, 0x15,
- 0x83, 0x11, 0x61, 0x40,
- 0x00, 0x16, 0x80, 0x04,
- 0x00, 0x66, 0x83, 0x11,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0xef, 0x9c, 0x5f, 0x88,
- 0x1f, 0x0c, 0xa8, 0xf1,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x80, 0x03, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x41, 0x06,
- 0xe1, 0x40, 0x42, 0xc6,
- 0xb1, 0x31, 0x00, 0x04,
- 0x83, 0x41, 0x04, 0x24,
- 0x6c, 0x1d, 0x40, 0x31,
- 0x08, 0x46, 0xc0, 0x2b,
- 0x84, 0x14, 0x81, 0x21,
- 0x91, 0x11, 0x04, 0x26,
- 0xe8, 0x04, 0x55, 0xa8,
- 0x1f, 0x0c, 0x98, 0xf1,
- 0x0b, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x80,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x5e, 0x65,
- 0xec, 0x10, 0x0c, 0xf0,
- 0x74, 0x1c, 0x5e, 0x60,
- 0xbc, 0x6e, 0x88, 0x61,
- 0xfe, 0x84, 0x07, 0xfc,
- 0xf8, 0x04, 0x17, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x81, 0x93, 0x81, 0x83,
- 0x00, 0x1c, 0xc1, 0x83,
- 0x40, 0x00, 0xe2, 0xc0,
- 0x02, 0x06, 0x7f, 0x00,
- 0x84, 0x0e, 0xe1, 0x9c,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x61, 0x4c, 0x4f, 0x06,
- 0xe1, 0x34, 0x42, 0xc6,
- 0xb3, 0x21, 0x1c, 0x04,
- 0x4d, 0xc6, 0x04, 0x14,
- 0x40, 0x21, 0xe1, 0x98,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x18, 0x16, 0x84, 0x18,
- 0x52, 0x78, 0x93, 0x11,
- 0x98, 0x08, 0xe8, 0x04,
- 0x82, 0xe5, 0xa7, 0x0b,
- 0x84, 0xa5, 0xa3, 0x0b,
- 0x86, 0x65, 0xa5, 0x0b,
- 0x88, 0x55, 0xa1, 0x0b,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x98, 0xe0, 0x10,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x85, 0xc1, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x51, 0x18, 0xe0, 0x80,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x83, 0x05, 0xc7, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x98, 0xe0, 0x20,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x85, 0xc3, 0x13,
- 0x02, 0x96, 0x1c, 0x04,
- 0x50, 0x18, 0xe0, 0x40,
- 0xc1, 0x83, 0xe8, 0x04,
- 0x81, 0x01, 0xc5, 0x13,
- 0x00, 0x46, 0x98, 0x06,
- 0x83, 0x11, 0x61, 0x44,
- 0x81, 0x21, 0x00, 0x04,
- 0x80, 0x16, 0xa8, 0xf1,
- 0x1f, 0x0c, 0x80, 0x26,
- 0x0f, 0xfc, 0xf0, 0x04,
- 0xbc, 0xf4, 0xf6, 0x84,
- 0xc1, 0x53, 0xfd, 0x64,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x00, 0x5e, 0xe8,
- 0xa1, 0x0b, 0x80, 0x6b,
- 0xc0, 0x00, 0x1d, 0x48,
- 0x63, 0x29, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xdd,
- 0x63, 0x21, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x25,
- 0x61, 0x84, 0x08, 0x34,
- 0x54, 0x78, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x1b, 0xf8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0x39,
- 0x6c, 0xe5, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x53, 0x28,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x1a, 0xa8,
- 0x63, 0x49, 0x0c, 0x39,
- 0x01, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6c, 0xed,
- 0x63, 0x41, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x45,
- 0x61, 0x84, 0x08, 0x34,
- 0x51, 0xd8, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x19, 0x58, 0xa1, 0x0b,
- 0x0c, 0x3b, 0xc0, 0x00,
- 0x40, 0x16, 0x69, 0xa9,
- 0x6c, 0xf9, 0x01, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x50, 0x88,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x18, 0x08,
- 0x63, 0x71, 0x0c, 0x39,
- 0x41, 0xce, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x09,
- 0x63, 0x61, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0x65,
- 0x61, 0x84, 0x08, 0x34,
- 0x4f, 0x38, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x16, 0xb8, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x63, 0xa9,
- 0x6d, 0x31, 0x40, 0x0e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4d, 0xe8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x15, 0x68,
- 0x63, 0xd9, 0x0c, 0x39,
- 0x40, 0x0e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x39,
- 0x63, 0xd1, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x63, 0xd5,
- 0x61, 0x84, 0x08, 0x34,
- 0x4c, 0x98, 0x82, 0x39,
- 0x82, 0x49, 0x6f, 0x9c,
- 0x14, 0x18, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x09,
- 0x6d, 0x41, 0x01, 0x4e,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x4b, 0x48,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x12, 0xc8,
- 0x64, 0x39, 0x0c, 0x39,
- 0x40, 0x4e, 0x40, 0x2d,
- 0xc0, 0x10, 0x6d, 0x4d,
- 0x64, 0x31, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x35,
- 0x4a, 0x18, 0x82, 0x39,
- 0x86, 0x4b, 0x6f, 0x9c,
- 0x11, 0x98, 0xa1, 0x0b,
- 0x0c, 0x39, 0xc0, 0x00,
- 0x40, 0x2d, 0x64, 0x69,
- 0x6d, 0x55, 0x00, 0xce,
- 0x0c, 0x19, 0xc0, 0x10,
- 0xc0, 0x2d, 0x64, 0x61,
- 0x64, 0x65, 0x0c, 0x29,
- 0x08, 0x34, 0xc0, 0x2d,
- 0x82, 0x39, 0x61, 0x84,
- 0x6f, 0x9c, 0x48, 0xc8,
- 0xa1, 0x0b, 0x82, 0x49,
- 0xc0, 0x00, 0x10, 0x48,
- 0x6f, 0x9c, 0x4f, 0x48,
- 0x41, 0xf6, 0x81, 0x01,
- 0x83, 0x11, 0x60, 0x3c,
- 0xef, 0x9c, 0x47, 0x88,
- 0x63, 0x29, 0x0c, 0x09,
- 0x03, 0xc6, 0x40, 0x2d,
- 0x84, 0x14, 0xe1, 0x38,
- 0x82, 0x09, 0xc7, 0x07,
- 0x42, 0x46, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x38,
- 0xc0, 0x2d, 0x63, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x38, 0x40, 0xc6,
- 0x0c, 0x29, 0x80, 0x14,
- 0xc0, 0x2d, 0x63, 0x49,
- 0xc9, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x04, 0x84, 0x36,
- 0x63, 0x49, 0x0c, 0x19,
- 0x80, 0x28, 0xc0, 0x2d,
- 0x84, 0x19, 0xc9, 0x17,
- 0xf3, 0xf4, 0x44, 0x20,
- 0x00, 0x26, 0xa2, 0x2f,
- 0xe1, 0x38, 0x41, 0xc6,
- 0x0c, 0x2b, 0x80, 0x14,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x27, 0x84, 0x38,
- 0x46, 0x30, 0x82, 0x29,
- 0xa4, 0x3f, 0xf3, 0xf8,
- 0x80, 0x14, 0x84, 0x36,
- 0x69, 0xa9, 0x0c, 0x2b,
- 0x84, 0x38, 0xc0, 0x16,
- 0x84, 0x29, 0xcb, 0x27,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x84, 0x36, 0xa4, 0x3f,
- 0x0c, 0x1b, 0x80, 0x04,
- 0xc0, 0x16, 0x69, 0xa9,
- 0xcb, 0x17, 0x80, 0x28,
- 0x44, 0x20, 0x88, 0x19,
- 0xa2, 0x2f, 0xf3, 0xec,
- 0x00, 0x86, 0x00, 0x26,
- 0x0c, 0x19, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x3c, 0x01, 0x46,
- 0x64, 0xe1, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x01, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xe5,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x03, 0xc6,
- 0x63, 0xa9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xa9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x3c, 0x40, 0xc6,
- 0x64, 0xed, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x3c,
- 0xc0, 0x0b, 0x64, 0xf1,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x3c, 0x43, 0x46,
- 0x63, 0xd9, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x43, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x2d, 0x63, 0xd9,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x00, 0x46,
- 0x64, 0xf9, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x00, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x64, 0xfd,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x02, 0xc6,
- 0x64, 0x09, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x03, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x09,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x01, 0xc6,
- 0x65, 0x05, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x40, 0x06, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x09,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x42, 0x46,
- 0x64, 0x39, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x42, 0x86, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x40,
- 0xc0, 0x2d, 0x64, 0x39,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x40, 0x41, 0x46,
- 0x65, 0x11, 0x0c, 0x15,
- 0x80, 0x04, 0xc0, 0x0b,
- 0x41, 0x86, 0x00, 0x1e,
- 0x0c, 0x15, 0xe1, 0x40,
- 0xc0, 0x0b, 0x65, 0x15,
- 0x00, 0x1e, 0x80, 0x04,
- 0xe1, 0x40, 0x43, 0xc6,
- 0x64, 0x69, 0x0c, 0x09,
- 0x84, 0x14, 0xc0, 0x2d,
- 0x82, 0x09, 0xc5, 0x07,
- 0x02, 0x06, 0x04, 0x06,
- 0x0c, 0x09, 0xe1, 0x44,
- 0xc0, 0x2d, 0x64, 0x69,
- 0xc7, 0x07, 0x84, 0x14,
- 0x04, 0x06, 0x82, 0x09,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x84, 0x55, 0xbf, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0xa6, 0x40, 0x2b,
- 0x02, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xec, 0x48, 0x08,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x63, 0x21,
- 0x63, 0x25, 0x0c, 0x19,
- 0x7a, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x94, 0x35,
- 0xc0, 0x2d, 0x63, 0x31,
- 0x63, 0x35, 0x0c, 0x19,
- 0x7a, 0x38, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x90, 0xf5,
- 0xc0, 0x2d, 0x63, 0x41,
- 0x63, 0x45, 0x0c, 0x19,
- 0x79, 0x98, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8e, 0xb5,
- 0xc0, 0x2d, 0x63, 0x59,
- 0x63, 0x5d, 0x0c, 0x19,
- 0x78, 0xf8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8c, 0x75,
- 0xc0, 0x2d, 0x63, 0x61,
- 0x63, 0x65, 0x0c, 0x19,
- 0x78, 0x58, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x8a, 0x35,
- 0xc0, 0x2d, 0x63, 0xa1,
- 0x63, 0xa5, 0x0c, 0x19,
- 0x77, 0xb8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x86, 0xf5,
- 0xc0, 0x2d, 0x63, 0xd1,
- 0x63, 0xd5, 0x0c, 0x19,
- 0x77, 0x18, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x84, 0xb5,
- 0xc0, 0x2d, 0x64, 0x01,
- 0x64, 0x05, 0x0c, 0x19,
- 0x76, 0x78, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x09, 0x82, 0x75,
- 0xc0, 0x2d, 0x64, 0x31,
- 0x64, 0x35, 0x0c, 0x19,
- 0x75, 0xd8, 0xc0, 0x2d,
- 0xa1, 0x0b, 0xef, 0x98,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x64, 0x61, 0x0c, 0x09,
- 0x0c, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2d, 0x64, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0x98, 0x34, 0xe8,
- 0xfa, 0x80, 0x00, 0x0c,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x40, 0x38, 0xc0, 0x2b,
- 0xa3, 0x0b, 0xef, 0xec,
- 0x41, 0xf6, 0x82, 0x55,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x98, 0x6f, 0x08,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xff, 0xd8, 0x39, 0xe8,
- 0xf2, 0x80, 0x08, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0c, 0x0b, 0x80, 0x6b,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x29, 0x82, 0x35,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x3e, 0x38, 0xf2, 0x0c,
- 0x4e, 0x46, 0xff, 0xe8,
- 0x0e, 0x09, 0xef, 0xdc,
- 0xc2, 0x09, 0xf8, 0x10,
- 0xf8, 0x10, 0x4e, 0x01,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x42, 0x36, 0x8c, 0xf5,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x5b, 0x88,
- 0x60, 0x04, 0x42, 0x46,
- 0x57, 0x38, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x81, 0x81, 0x1c, 0x08,
- 0xf3, 0xf8, 0x40, 0x00,
- 0x9c, 0x08, 0x9c, 0x06,
- 0xf3, 0xf4, 0x40, 0x00,
- 0x4e, 0x81, 0x9c, 0x06,
- 0x0c, 0x0b, 0xe0, 0x30,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0xfd, 0x40, 0x00,
- 0x4c, 0x03, 0xc0, 0xfd,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0xf8, 0x8c, 0x0b,
- 0x75, 0xf8, 0xe8, 0x20,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe0, 0x00, 0x42, 0x46,
- 0x00, 0x86, 0x80, 0x04,
- 0xe1, 0x44, 0x01, 0x86,
- 0x00, 0x86, 0x80, 0x04,
- 0x58, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xe8, 0x00,
- 0x34, 0x78, 0xf2, 0x0c,
- 0x42, 0x56, 0xff, 0xd8,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xe8, 0x00, 0x58, 0x28,
- 0x6e, 0x09, 0x0c, 0x0b,
- 0x02, 0x06, 0x40, 0x15,
- 0xff, 0xc0, 0x60, 0x01,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4c, 0x03,
- 0x41, 0xc6, 0x40, 0x15,
- 0xc0, 0x20, 0x72, 0xfd,
- 0x02, 0x0f, 0x80, 0x04,
- 0x72, 0xc1, 0x02, 0x06,
- 0x00, 0x04, 0xc0, 0x20,
- 0x04, 0x0e, 0xfc, 0xc4,
- 0x72, 0xc1, 0x02, 0x06,
- 0x8c, 0x0b, 0xc0, 0x20,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xff, 0xd8, 0x32, 0xe8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x82, 0x25, 0xa1, 0x1b,
- 0x6f, 0x98, 0x66, 0xc8,
- 0x40, 0x06, 0x83, 0x11,
- 0x0c, 0x0c, 0xfa, 0x02,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x7a, 0x02, 0x4c, 0x06,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x98, 0x66, 0x08,
- 0x8c, 0x0b, 0x81, 0x11,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x12, 0x06, 0x00, 0x6b,
- 0x14, 0xc6, 0xe0, 0x08,
- 0x57, 0x46, 0x61, 0x14,
- 0x10, 0x86, 0xe1, 0x10,
- 0x81, 0x01, 0x61, 0x3c,
- 0x81, 0x71, 0x09, 0x95,
- 0x6c, 0x1d, 0x4c, 0x91,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x00, 0x44, 0x88,
- 0x14, 0x15, 0xa1, 0x0b,
- 0x02, 0x19, 0xc0, 0x00,
- 0x8e, 0x75, 0xc0, 0x00,
- 0x68, 0x00, 0x48, 0xc8,
- 0x28, 0x14, 0x8c, 0x0b,
- 0x84, 0x18, 0xa1, 0x0b,
- 0x42, 0x0a, 0x8c, 0x95,
- 0x8c, 0x25, 0xe0, 0x84,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x00, 0x4d, 0x08,
- 0xe0, 0xc8, 0x00, 0x0a,
- 0x62, 0x38, 0x8a, 0xb5,
- 0x2c, 0x04, 0xe8, 0x1c,
- 0x83, 0x21, 0x81, 0x11,
- 0x95, 0x11, 0x00, 0x16,
- 0x68, 0x30, 0x4d, 0x88,
- 0x2c, 0x04, 0x8c, 0x0b,
- 0x80, 0x16, 0x83, 0x11,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x16, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0xa0, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0xa0, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x00, 0x41, 0x26,
- 0xe8, 0x7d, 0x82, 0x71,
- 0x0c, 0x4c, 0xee, 0x05,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x7a, 0xc8,
- 0x0e, 0x16, 0x80, 0x6b,
- 0x42, 0xc6, 0x60, 0x08,
- 0x4c, 0x71, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x86,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0x65,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x7a, 0x08,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x02, 0x16, 0x40, 0x2b,
- 0x6e, 0x58, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4f, 0x48,
- 0x4f, 0x18, 0x81, 0x95,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xd5, 0xe0, 0x84,
- 0x8e, 0x0b, 0x81, 0x71,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x78, 0x58, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x26,
- 0x60, 0x08, 0x02, 0x26,
- 0x6c, 0x78, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x6f, 0xec, 0x76, 0x08,
- 0x00, 0x26, 0x80, 0x6b,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x45, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x30,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x24, 0x50, 0x46,
- 0xa0, 0x14, 0x80, 0x04,
- 0x84, 0x38, 0x80, 0x28,
- 0xe0, 0x80, 0x46, 0x4a,
- 0x44, 0x4a, 0x84, 0xa5,
- 0xfe, 0x25, 0xe0, 0x8c,
- 0xef, 0xec, 0x75, 0x48,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x69, 0x68,
- 0x80, 0x95, 0xa3, 0x0b,
- 0xe8, 0x30, 0x4a, 0x68,
- 0x4a, 0x38, 0x83, 0x75,
- 0xa0, 0x04, 0xe8, 0x30,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xe5, 0xe0, 0x84,
- 0xef, 0xec, 0x73, 0xc8,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xe8, 0x67, 0xe8,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x00, 0x86, 0x81, 0x71,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x80, 0x6b, 0x02, 0x7b,
- 0xef, 0xec, 0x70, 0xe8,
- 0x60, 0x08, 0x00, 0x36,
- 0xe0, 0x04, 0x42, 0x26,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x30, 0x40, 0x68,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x52, 0xc6, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x24,
- 0x80, 0x28, 0xa4, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0xa5, 0xe0, 0x80,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x70, 0x38, 0xfe, 0x25,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x10, 0x66,
- 0x60, 0x08, 0x02, 0x66,
- 0x64, 0x58, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0x45, 0x58, 0x80, 0x95,
- 0x81, 0xe5, 0xe8, 0x30,
- 0xe8, 0x30, 0x45, 0x28,
- 0x80, 0x08, 0xa4, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x10, 0x06, 0x00, 0xe5,
- 0x69, 0x7d, 0x80, 0x00,
- 0xe0, 0x00, 0x51, 0x26,
- 0x90, 0x0b, 0x80, 0xa5,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0x6e, 0x18, 0xdd, 0x93,
- 0x0c, 0x29, 0xef, 0xec,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0e, 0x76,
- 0x60, 0x08, 0x02, 0x76,
- 0x62, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xe8,
- 0xc0, 0x00, 0x0e, 0x06,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xe0, 0x6c, 0x02, 0x0a,
- 0x04, 0xcd, 0x00, 0x25,
- 0x9a, 0xa5, 0x80, 0x05,
- 0x00, 0x25, 0xa5, 0x1b,
- 0x80, 0x0b, 0x0a, 0x0d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x0d, 0x40, 0x25,
- 0x98, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xa7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x15,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x15, 0x40, 0x25,
- 0x96, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa9, 0x1b,
- 0x80, 0x0b, 0x0a, 0x11,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x11, 0x40, 0x25,
- 0x94, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xab, 0x1b,
- 0x80, 0x0b, 0x0a, 0x19,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x19, 0x40, 0x25,
- 0x92, 0x05, 0x80, 0x0b,
- 0x00, 0x25, 0xad, 0x1b,
- 0x80, 0x0b, 0x0a, 0x1d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x1d, 0x40, 0x25,
- 0x8e, 0xc5, 0x80, 0x0b,
- 0x00, 0x25, 0xaf, 0x1b,
- 0x80, 0x0b, 0x0a, 0x21,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x21, 0x40, 0x25,
- 0x8c, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xb1, 0x1b,
- 0x80, 0x0b, 0x0a, 0x25,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x25, 0x40, 0x25,
- 0x8a, 0x45, 0x80, 0x0b,
- 0x00, 0x25, 0xb3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x29,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x29, 0x40, 0x25,
- 0x88, 0x05, 0x80, 0x0b,
- 0x86, 0xc5, 0xb5, 0x1b,
- 0x00, 0x25, 0xb7, 0x1b,
- 0x80, 0x0b, 0x0a, 0x2d,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x2d, 0x40, 0x25,
- 0x84, 0x85, 0x80, 0x0b,
- 0x00, 0x25, 0xa3, 0x1b,
- 0x80, 0x0b, 0x0a, 0x09,
- 0x84, 0x04, 0x04, 0x20,
- 0x0a, 0x09, 0x40, 0x25,
- 0x82, 0x45, 0x80, 0x0b,
- 0xfc, 0x04, 0x44, 0x10,
- 0xe0, 0x74, 0x04, 0x0a,
- 0x83, 0x21, 0x80, 0xb5,
- 0x6a, 0x31, 0x40, 0x25,
- 0x00, 0x25, 0xc0, 0x0b,
- 0x40, 0x0b, 0x6a, 0x01,
- 0x64, 0x01, 0x06, 0x00,
- 0xc6, 0x27, 0xc0, 0xba,
- 0x44, 0x86, 0x04, 0x33,
- 0x46, 0x15, 0xe0, 0x00,
- 0x42, 0x06, 0xe0, 0x34,
- 0x46, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x38,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6a, 0x01,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0a, 0x05,
- 0x80, 0x00, 0x04, 0x06,
- 0x0a, 0x01, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0a, 0x05,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6b, 0x75, 0x00, 0x25,
- 0x06, 0x00, 0x40, 0x0b,
- 0xc0, 0xbb, 0x65, 0xd1,
- 0xe0, 0x00, 0x4a, 0x86,
- 0x86, 0x23, 0xc6, 0x27,
- 0x46, 0x06, 0xc8, 0x1e,
- 0x00, 0x45, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x98, 0x21, 0x4a, 0x3e,
- 0x4a, 0x4a, 0x82, 0x41,
- 0x40, 0x45, 0xe1, 0x16,
- 0xc0, 0x0b, 0x6b, 0x75,
- 0x00, 0x35, 0xa1, 0x5b,
- 0x00, 0x0b, 0x0b, 0x79,
- 0x80, 0x00, 0x08, 0x06,
- 0x0b, 0x75, 0x40, 0x45,
- 0x06, 0x30, 0x80, 0x0b,
- 0x40, 0x35, 0x84, 0x04,
- 0x00, 0x0b, 0x0b, 0x79,
- 0xf0, 0x24, 0x02, 0x0a,
- 0x02, 0x0a, 0x98, 0xa5,
- 0x88, 0xc5, 0xf0, 0x04,
- 0xf0, 0x08, 0x02, 0x0a,
- 0x02, 0x0a, 0x9a, 0x65,
- 0x8a, 0x85, 0xf0, 0x0c,
- 0xf0, 0x10, 0x02, 0x0a,
- 0x02, 0x0a, 0x9c, 0x25,
- 0x9e, 0x45, 0xf0, 0x14,
- 0xf0, 0x18, 0x02, 0x0a,
- 0x02, 0x0a, 0x8a, 0xe5,
- 0x8e, 0x05, 0xf0, 0x1c,
- 0xf0, 0x20, 0x02, 0x0a,
- 0x02, 0x0a, 0x90, 0x25,
- 0x5c, 0x08, 0xf0, 0x00,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6c, 0xbd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xbd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xe5,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xe9,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xc9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6c, 0xf1,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xd5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xfd,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xd9,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x01,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xdd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xdd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x05,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6c, 0xe1,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x09,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xc5,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xc5, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xed,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6c, 0xcd,
- 0x82, 0x11, 0x88, 0x24,
- 0x6c, 0xcd, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6c, 0xf5,
- 0x00, 0x35, 0xdd, 0x93,
- 0x40, 0x0b, 0x6c, 0xd1,
- 0x60, 0x15, 0x02, 0x0a,
- 0x82, 0x31, 0xc0, 0x08,
- 0x6c, 0xd1, 0x40, 0x35,
- 0x88, 0x34, 0xc0, 0x0b,
- 0x6c, 0xf9, 0x40, 0x35,
- 0x84, 0x45, 0xc0, 0x0b,
- 0x60, 0x15, 0x02, 0x0a,
- 0x5c, 0x08, 0xc0, 0x04,
- 0x00, 0x15, 0xda, 0x00,
- 0xc0, 0x0b, 0x6d, 0x0d,
- 0x82, 0x11, 0x88, 0x24,
- 0x6d, 0x0d, 0x40, 0x15,
- 0x40, 0x25, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6d, 0x15,
- 0x00, 0x15, 0xdd, 0x93,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x82, 0x11,
- 0xc0, 0x0b, 0x6d, 0x11,
- 0x40, 0x15, 0x88, 0x14,
- 0xc0, 0x0b, 0x6d, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6d, 0x1d, 0x00, 0x35,
- 0x08, 0x00, 0x40, 0x0b,
- 0xc0, 0xbd, 0x64, 0x71,
- 0x6d, 0x25, 0x00, 0x25,
- 0xc6, 0x37, 0xc0, 0x0b,
- 0x86, 0x43, 0x02, 0x21,
- 0x6d, 0x25, 0x40, 0x25,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x42, 0x06, 0xd2, 0x1e,
- 0x48, 0x15, 0xfc, 0x06,
- 0x00, 0x15, 0xe0, 0x10,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x44, 0x1a, 0x82, 0x11,
- 0x40, 0x15, 0xe1, 0x0a,
- 0xc0, 0x0b, 0x6d, 0x1d,
- 0x00, 0x15, 0xa1, 0x2b,
- 0x00, 0x0b, 0x0d, 0x21,
- 0x80, 0x00, 0x04, 0x06,
- 0x0d, 0x1d, 0x40, 0x25,
- 0x02, 0x10, 0x80, 0x0b,
- 0x40, 0x15, 0x84, 0x04,
- 0x80, 0x0b, 0x0d, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0b, 0x6f, 0xa5,
- 0x8a, 0xa5, 0xa1, 0x0b,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0xa9, 0x21, 0x40, 0x0b,
- 0x66, 0x8a, 0x44, 0x0a,
- 0xe0, 0x88, 0x06, 0x04,
- 0xf0, 0x8c, 0x4e, 0x62,
- 0x00, 0x20, 0x8c, 0x23,
- 0x40, 0xbd, 0x67, 0xc1,
- 0x6a, 0x38, 0xa9, 0x21,
- 0x40, 0x06, 0xef, 0x90,
- 0x4e, 0x05, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6d, 0xc9,
- 0x6d, 0xe9, 0x0c, 0x05,
- 0x82, 0x01, 0xc0, 0x0b,
- 0x6d, 0xe9, 0x4c, 0x05,
- 0x00, 0x4a, 0x40, 0x0b,
- 0x0c, 0x05, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0d, 0xed,
- 0xc0, 0x00, 0x02, 0x06,
- 0x0d, 0xe9, 0x4c, 0x15,
- 0x00, 0x00, 0xc0, 0x0b,
- 0x4c, 0x05, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0d, 0xed,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6e, 0xb1, 0x00, 0x25,
- 0x86, 0x3a, 0xc0, 0x0b,
- 0xf0, 0x08, 0x02, 0x4b,
- 0x18, 0x24, 0x06, 0x5a,
- 0x04, 0x1a, 0xe0, 0x8c,
- 0x00, 0xc3, 0xc4, 0x27,
- 0x58, 0x53, 0x80, 0x23,
- 0xc0, 0x17, 0x6d, 0x7d,
- 0x6d, 0x79, 0x58, 0x13,
- 0x58, 0x33, 0xc0, 0x17,
- 0xc0, 0x17, 0x6d, 0x75,
- 0x6d, 0x71, 0x58, 0x43,
- 0x42, 0x06, 0xc0, 0x17,
- 0x44, 0x15, 0xfc, 0x06,
- 0xc0, 0x0b, 0x6e, 0x91,
- 0x6e, 0xb1, 0x00, 0x15,
- 0x82, 0x11, 0xc0, 0x0b,
- 0x6e, 0xb1, 0x40, 0x15,
- 0x02, 0x4a, 0x40, 0x0b,
- 0x00, 0x15, 0xf8, 0x1c,
- 0x40, 0x0b, 0x0e, 0xb5,
- 0xc0, 0x00, 0x04, 0x06,
- 0x0e, 0xb1, 0x40, 0x25,
- 0x02, 0x10, 0xc0, 0x0b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x0e, 0xb5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6f, 0xa5, 0x00, 0x25,
- 0xa1, 0x2b, 0xc0, 0x0b,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x6f, 0x19, 0x00, 0x25,
- 0xc6, 0x34, 0xc0, 0x0b,
- 0x60, 0x90, 0x08, 0x24,
- 0x00, 0x43, 0xc4, 0x27,
- 0x48, 0x35, 0x80, 0x23,
- 0xc0, 0x0b, 0x6f, 0x2d,
- 0x48, 0x35, 0xc4, 0x34,
- 0xc0, 0x0b, 0x6f, 0x29,
- 0x48, 0x35, 0x86, 0x34,
- 0xc0, 0x0b, 0x6f, 0x25,
- 0x48, 0x15, 0x84, 0x14,
- 0xc0, 0x0b, 0x6f, 0x21,
- 0xfc, 0x06, 0x42, 0x06,
- 0x6e, 0xf9, 0x44, 0x15,
- 0x00, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x6f, 0x19,
- 0x40, 0x15, 0x82, 0x11,
- 0x40, 0x0b, 0x6f, 0x19,
- 0xf8, 0x1c, 0x02, 0x4a,
- 0x0f, 0x1d, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x0b,
- 0x40, 0x25, 0xc0, 0x00,
- 0xc0, 0x0b, 0x0f, 0x19,
- 0xc4, 0x04, 0x02, 0x10,
- 0x0f, 0x1d, 0x40, 0x15,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x61, 0x4c, 0x4d, 0x06,
- 0xe1, 0x98, 0x03, 0x46,
- 0x81, 0x21, 0x18, 0x04,
- 0x6e, 0x10, 0x47, 0x86,
- 0xe1, 0x00, 0x0a, 0xc6,
- 0x03, 0x86, 0x04, 0x0c,
- 0x04, 0x2e, 0xe1, 0x98,
- 0xe1, 0x98, 0x03, 0xc6,
- 0x02, 0x86, 0x04, 0x2e,
- 0x40, 0x25, 0xe1, 0xa4,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x00, 0x00, 0x46,
- 0x04, 0x86, 0x00, 0x1e,
- 0x08, 0x3e, 0xe1, 0x00,
- 0x66, 0xa1, 0x08, 0x10,
- 0x02, 0x10, 0xc0, 0xbf,
- 0x40, 0xb9, 0x67, 0xf1,
- 0xe1, 0x00, 0x05, 0x06,
- 0x94, 0x4e, 0x98, 0x04,
- 0x76, 0xf8, 0x88, 0x1e,
- 0x18, 0x04, 0xef, 0xf0,
- 0x40, 0x71, 0xb5, 0x71,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xf4, 0x4e, 0xa8,
- 0x42, 0xc6, 0x18, 0x04,
- 0x84, 0x0e, 0xe1, 0x98,
- 0xe8, 0x2c, 0x49, 0xa8,
- 0x45, 0x86, 0x18, 0x14,
- 0x88, 0x0e, 0xe1, 0x98,
- 0x68, 0x2c, 0x49, 0x88,
- 0x42, 0x86, 0x82, 0x0b,
- 0x04, 0x0e, 0xe1, 0x98,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x94, 0x66, 0x08,
- 0x00, 0x1c, 0x81, 0x11,
- 0x50, 0x06, 0xe2, 0xc0,
- 0xc0, 0x00, 0x61, 0x99,
- 0x00, 0x46, 0x20, 0x0e,
- 0x56, 0x18, 0xe1, 0x9c,
- 0xa0, 0x04, 0xef, 0x94,
- 0xe3, 0x40, 0x00, 0x1c,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x64, 0xd8, 0x83, 0x11,
- 0x83, 0x81, 0x6f, 0x94,
- 0x43, 0x86, 0x18, 0x04,
- 0xc4, 0x80, 0x60, 0x15,
- 0x69, 0xfd, 0x40, 0x15,
- 0x03, 0x96, 0x40, 0x0b,
- 0xd9, 0x84, 0x63, 0x09,
- 0x6c, 0x1d, 0x40, 0x71,
- 0x40, 0x15, 0xc0, 0x2b,
- 0xc0, 0x0b, 0x6f, 0xa1,
- 0x6f, 0xa5, 0x40, 0x85,
- 0x40, 0x58, 0xc0, 0x0b,
- 0x98, 0x04, 0xe8, 0x00,
- 0xc1, 0xc3, 0xff, 0xd5,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x7b,
- 0x62, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x94,
- 0x09, 0x01, 0x81, 0x61,
- 0x4e, 0x01, 0xb7, 0x11,
- 0x40, 0x2b, 0x6c, 0x19,
- 0x4e, 0x11, 0x8e, 0x0b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x51, 0x18, 0x83, 0x11,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0e, 0x19, 0x82, 0xe5,
- 0xc0, 0x2b, 0x64, 0xc5,
- 0x8a, 0xf5, 0xa7, 0x1b,
- 0xef, 0xdc, 0x02, 0x86,
- 0x42, 0x0a, 0x84, 0x18,
- 0x8a, 0x25, 0xe0, 0x80,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x11, 0x88, 0xc5,
- 0x4f, 0x98, 0x8e, 0x0b,
- 0x5f, 0x78, 0xef, 0xfc,
- 0xa1, 0x0b, 0xe8, 0x08,
- 0x5f, 0x98, 0x80, 0xb5,
- 0x8e, 0x0b, 0x68, 0x08,
- 0x0e, 0x0b, 0x80, 0x6b,
- 0x40, 0x15, 0x6e, 0x09,
- 0x40, 0x00, 0x83, 0x11,
- 0xc0, 0xff, 0x72, 0xfd,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x5f, 0x18, 0xe0, 0x3c,
- 0xa1, 0x6b, 0xef, 0x94,
- 0x07, 0x11, 0xa4, 0xd5,
- 0x4d, 0xd8, 0x8e, 0x0b,
- 0x72, 0xf8, 0xef, 0xfc,
- 0x8e, 0x0b, 0x6f, 0xd4,
- 0x80, 0x6b, 0x11, 0xe5,
- 0x8e, 0x0b, 0x09, 0x11,
- 0xef, 0xfc, 0x4d, 0x48,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x10, 0x86, 0x92, 0xd5,
- 0xa0, 0x08, 0xef, 0xdc,
- 0xf8, 0xc0, 0x00, 0x0a,
- 0xa0, 0x08, 0x80, 0xe5,
- 0xf0, 0xc0, 0x40, 0x00,
- 0xe0, 0x80, 0x00, 0x0a,
- 0x0e, 0x0b, 0x90, 0x55,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x8e, 0x05,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x8c, 0x75, 0xa7, 0x0b,
- 0x40, 0x4a, 0xa0, 0x08,
- 0x8a, 0xe5, 0xe0, 0x8c,
- 0x8e, 0x0b, 0x1b, 0x11,
- 0xef, 0xfc, 0x4b, 0x08,
- 0x6f, 0xd8, 0x54, 0xc8,
- 0x1d, 0x11, 0x8e, 0x0b,
- 0x4a, 0x98, 0x8e, 0x0b,
- 0x7c, 0x18, 0xef, 0xfc,
- 0x8e, 0x0b, 0x68, 0x18,
- 0x64, 0xcd, 0x0e, 0x05,
- 0xe2, 0x14, 0xc0, 0x05,
- 0x86, 0xe5, 0xc2, 0x0d,
- 0xc8, 0x09, 0xa0, 0x08,
- 0x8e, 0x0b, 0x20, 0x06,
- 0xe8, 0x18, 0x7f, 0x28,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x83, 0x11, 0x40, 0x15,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x41, 0xf6, 0x40, 0x15,
- 0x59, 0xb8, 0xe0, 0x3c,
- 0x0b, 0x11, 0xef, 0x94,
- 0x48, 0x98, 0x8e, 0x0b,
- 0x41, 0x38, 0xef, 0xfc,
- 0x81, 0x55, 0xe8, 0x0c,
- 0x8e, 0x0b, 0x1f, 0x11,
- 0xef, 0xfc, 0x48, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x58, 0xb8, 0x83, 0x11,
- 0x0e, 0x09, 0xef, 0x94,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x11, 0x11, 0x8a, 0x85,
- 0x47, 0x38, 0x8e, 0x0b,
- 0x0e, 0x05, 0xef, 0xfc,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x40, 0x06, 0x85, 0x05,
- 0x4e, 0x05, 0xfc, 0x06,
- 0x40, 0x0e, 0x60, 0xfd,
- 0x6f, 0x58, 0x8e, 0x0b,
- 0x56, 0xb8, 0xe8, 0x08,
- 0x8e, 0x0b, 0x68, 0x08,
- 0xfc, 0x06, 0x40, 0x06,
- 0x60, 0xf9, 0x0e, 0x25,
- 0x0e, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0x61, 0x01, 0x4e, 0x05,
- 0x82, 0x21, 0xc0, 0x0e,
- 0x60, 0xf9, 0x4e, 0x25,
- 0x00, 0x10, 0x40, 0x0e,
- 0x4e, 0x05, 0xec, 0x04,
- 0xc0, 0x0e, 0x60, 0xf5,
- 0xf8, 0x15, 0xa1, 0x0b,
- 0xc3, 0x13, 0xc1, 0x83,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x55, 0x58, 0x83, 0x11,
- 0x00, 0x64, 0xef, 0x94,
- 0x0c, 0x0c, 0xfa, 0x80,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x6c, 0x19, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2b,
- 0x6e, 0x0d, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x36,
- 0xda, 0x00, 0x5c, 0x08,
- 0x63, 0x11, 0x00, 0x19,
- 0xa3, 0x1b, 0xc0, 0x38,
- 0x00, 0x2b, 0x82, 0xf5,
- 0x40, 0x15, 0x6e, 0x09,
- 0xe1, 0x4c, 0x03, 0xc6,
- 0x44, 0x20, 0x84, 0x14,
- 0xc0, 0xff, 0x72, 0xf1,
- 0x6e, 0x09, 0x40, 0x23,
- 0x1e, 0xf8, 0xc0, 0x15,
- 0xdd, 0x93, 0xff, 0xd4,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x83, 0x21, 0x83, 0x71,
- 0xc4, 0x19, 0x80, 0x18,
- 0x41, 0x06, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x28,
- 0x00, 0x76, 0x85, 0x11,
- 0xe1, 0x28, 0x40, 0x06,
- 0x00, 0x76, 0x80, 0x04,
- 0x7c, 0xd8, 0x8c, 0x0b,
- 0x40, 0x46, 0xe8, 0x28,
- 0xbd, 0x11, 0x61, 0x28,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x76,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x28, 0x3c, 0x28,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x86, 0x00, 0x8b,
- 0x00, 0x04, 0xe1, 0x28,
- 0x03, 0x11, 0x82, 0x7b,
- 0x56, 0x72, 0x86, 0x6b,
- 0x15, 0x46, 0x70, 0x88,
- 0x80, 0x16, 0xe1, 0x34,
- 0x40, 0x86, 0x8d, 0x25,
- 0x83, 0x11, 0x61, 0x28,
- 0x81, 0x21, 0x00, 0x04,
- 0x41, 0xc6, 0x00, 0x76,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x7a, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa1, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa5, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa5, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5e, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x8c, 0xd5, 0xa1, 0x0b,
- 0x61, 0x2c, 0x00, 0x86,
- 0x00, 0x04, 0x81, 0x11,
- 0x80, 0x04, 0x81, 0x21,
- 0x41, 0xc6, 0x18, 0x0e,
- 0x80, 0x04, 0xe1, 0x28,
- 0x02, 0x06, 0x00, 0x16,
- 0x77, 0x58, 0xe0, 0x10,
- 0x90, 0x0b, 0x68, 0x28,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x2c, 0x02, 0x46,
- 0x84, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0xa8, 0x24,
- 0xa3, 0x4b, 0x84, 0x48,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xa7, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x95, 0xa7, 0x3b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0xc6, 0x40, 0x2b,
- 0x5b, 0x38, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xe4,
- 0xe0, 0x08, 0x12, 0xc6,
- 0x80, 0xd5, 0xa1, 0x0b,
- 0x82, 0x71, 0x08, 0x61,
- 0xe6, 0xc5, 0xd6, 0x7d,
- 0x92, 0x0b, 0x81, 0x91,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x61, 0x28, 0x42, 0x46,
- 0x04, 0x14, 0x81, 0x61,
- 0x04, 0x66, 0x83, 0x21,
- 0x73, 0xf8, 0x83, 0x11,
- 0x40, 0x06, 0xe8, 0x28,
- 0x80, 0x04, 0xe1, 0x28,
- 0x41, 0x06, 0x00, 0x66,
- 0x80, 0x04, 0xe1, 0x14,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x18, 0x00, 0x15,
- 0xe0, 0x50, 0x00, 0x25,
- 0x61, 0x27, 0xe0, 0x17,
- 0x70, 0x01, 0x42, 0x10,
- 0x40, 0x25, 0xc3, 0x00,
- 0xc0, 0x09, 0x6e, 0x09,
- 0xe0, 0x50, 0x00, 0x25,
- 0xfb, 0x80, 0x04, 0x24,
- 0x04, 0x06, 0x24, 0x1f,
- 0xc3, 0xc0, 0x60, 0x01,
- 0x6e, 0x0d, 0x40, 0x15,
- 0x00, 0x15, 0xc0, 0x09,
- 0xed, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x41, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xdd, 0x17, 0xe0, 0x54,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x68, 0x45, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe0, 0x58,
- 0xc0, 0x38, 0x63, 0x15,
- 0xe0, 0x58, 0x00, 0x15,
- 0x04, 0x06, 0x04, 0x1f,
- 0xc3, 0x00, 0x60, 0x01,
- 0x81, 0x21, 0x05, 0x1b,
- 0x80, 0x00, 0x02, 0x26,
- 0x03, 0x15, 0x40, 0x11,
- 0x02, 0x00, 0x00, 0x38,
- 0x83, 0x95, 0xe5, 0x70,
- 0x88, 0x21, 0x04, 0x34,
- 0xc6, 0x3b, 0xf1, 0x37,
- 0x62, 0x11, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xe1, 0x37,
- 0x62, 0x15, 0x42, 0x31,
- 0x84, 0x34, 0xc0, 0x27,
- 0xc6, 0x3b, 0xd1, 0x37,
- 0x62, 0x19, 0x42, 0x31,
- 0xc5, 0x34, 0xc0, 0x27,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x27, 0x62, 0x0d,
- 0x60, 0x61, 0x04, 0x8a,
- 0xf8, 0xb5, 0xc0, 0x01,
- 0x65, 0xd1, 0x02, 0x00,
- 0x81, 0x21, 0x40, 0x01,
- 0x46, 0x3b, 0x83, 0x75,
- 0x42, 0x31, 0x88, 0x21,
- 0xc0, 0x26, 0x6d, 0x71,
- 0xe1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x75,
- 0xd1, 0x37, 0x84, 0x34,
- 0x42, 0x31, 0xc6, 0x3b,
- 0xc0, 0x26, 0x6d, 0x79,
- 0xc6, 0x3b, 0xc5, 0x34,
- 0x6d, 0x6d, 0x42, 0x31,
- 0x04, 0x34, 0xc0, 0x26,
- 0xe0, 0x40, 0x04, 0x8a,
- 0xf1, 0x37, 0x78, 0xf5,
- 0x68, 0x01, 0x40, 0x31,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x84,
- 0x68, 0x05, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x88,
- 0x68, 0x11, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xe1, 0x17, 0xe1, 0x88,
- 0x68, 0x15, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xff, 0x17, 0xe1, 0x8c,
- 0x67, 0xf1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe1, 0x8c,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x67, 0xe1, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe9, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x47, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xed, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xe1, 0x17, 0xe1, 0x8c,
- 0x9e, 0x19, 0x45, 0x27,
- 0xa4, 0x1f, 0xa0, 0x29,
- 0x67, 0xe9, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x00, 0x25, 0xe1, 0x8c,
- 0xd1, 0x17, 0xe1, 0x8c,
- 0x44, 0x20, 0x3e, 0x19,
- 0x24, 0x1f, 0xf0, 0x80,
- 0xe0, 0x04, 0x04, 0x06,
- 0x67, 0xe5, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x15, 0xe1, 0x90,
- 0xc0, 0x0a, 0x6e, 0xe9,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x40, 0x13, 0xe1, 0x17,
- 0xc0, 0x13, 0x6c, 0x29,
- 0xe1, 0xfc, 0x00, 0x15,
- 0x6c, 0x2d, 0x40, 0x13,
- 0x00, 0x15, 0xc0, 0x13,
- 0xd1, 0x17, 0xe2, 0x00,
- 0x68, 0x65, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0x40, 0x11, 0xe2, 0x00,
- 0xc0, 0x27, 0x68, 0x69,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xf1, 0x17,
- 0xc0, 0x27, 0x68, 0x6d,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xe1, 0x17,
- 0xc0, 0x27, 0x68, 0x71,
- 0xe2, 0x04, 0x00, 0x15,
- 0x40, 0x11, 0xd1, 0x17,
- 0xc0, 0x27, 0x68, 0x75,
- 0xe2, 0x04, 0x00, 0x15,
- 0x68, 0x79, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x27,
- 0xf1, 0x17, 0xe2, 0x08,
- 0x68, 0x7d, 0x40, 0x11,
- 0x02, 0x00, 0x40, 0x27,
- 0xc0, 0x02, 0x64, 0x31,
- 0x45, 0x34, 0x81, 0x75,
- 0xec, 0x04, 0x04, 0x20,
- 0x6c, 0x29, 0x42, 0x35,
- 0xa1, 0x2b, 0xc0, 0x09,
- 0x02, 0x00, 0xfe, 0x35,
- 0x40, 0x03, 0x64, 0x31,
- 0x81, 0xb5, 0x81, 0x21,
- 0x84, 0x21, 0x04, 0x34,
- 0x42, 0x33, 0xe1, 0x37,
- 0xc0, 0x13, 0x68, 0x59,
- 0x42, 0x33, 0xc5, 0x34,
- 0xc0, 0x13, 0x68, 0x55,
- 0xe5, 0x00, 0x04, 0x8a,
- 0x02, 0x00, 0xfc, 0x95,
- 0x40, 0x03, 0x67, 0x31,
- 0x81, 0x75, 0x89, 0x21,
- 0x04, 0x20, 0x45, 0x34,
- 0x42, 0x35, 0xec, 0x04,
- 0xc0, 0x0a, 0x6b, 0x1d,
- 0xfe, 0x35, 0xa1, 0x2b,
- 0x67, 0x71, 0x00, 0x00,
- 0x93, 0x11, 0x40, 0x03,
- 0x41, 0x24, 0x81, 0x75,
- 0xec, 0x04, 0x02, 0x10,
- 0x60, 0x3d, 0x40, 0x25,
- 0xa1, 0x1b, 0xc0, 0x05,
- 0x5d, 0x93, 0xfe, 0x35,
- 0xc1, 0xc3, 0x81, 0x01,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xef, 0x4c, 0x02, 0x29,
- 0x80, 0xb5, 0xa1, 0x2b,
- 0xef, 0x3c, 0x02, 0x29,
- 0x96, 0x25, 0xa1, 0x2b,
- 0xf9, 0x31, 0x01, 0x21,
- 0x81, 0x51, 0x07, 0x41,
- 0x58, 0x52, 0x83, 0x85,
- 0x4c, 0x52, 0x78, 0x0c,
- 0x82, 0xc3, 0xf8, 0x90,
- 0xfc, 0x18, 0x18, 0xc9,
- 0x91, 0xc1, 0x58, 0x2f,
- 0x44, 0x0a, 0x81, 0xb5,
- 0xc2, 0x27, 0x60, 0x9c,
- 0x73, 0xf9, 0x44, 0x20,
- 0x18, 0xc0, 0x40, 0x01,
- 0x44, 0x20, 0xec, 0x04,
- 0xa1, 0xcb, 0xd8, 0x74,
- 0x82, 0x51, 0xfc, 0xb5,
- 0xe1, 0x40, 0x0a, 0x0a,
- 0x07, 0x06, 0xf8, 0xf5,
- 0x04, 0x0a, 0x61, 0x38,
- 0x0c, 0x34, 0xfb, 0xfc,
- 0x9f, 0xf8, 0x05, 0x9e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x02, 0x39, 0x8c, 0x2e,
- 0x87, 0x2b, 0xef, 0x4c,
- 0x07, 0x46, 0x80, 0xf5,
- 0x8c, 0x34, 0xe1, 0x34,
- 0xaf, 0x3b, 0x8c, 0x34,
- 0x02, 0x19, 0x86, 0xf5,
- 0x83, 0x2b, 0xef, 0x3c,
- 0x03, 0x46, 0x80, 0xf5,
- 0x84, 0x14, 0xe1, 0x34,
- 0xaf, 0x1b, 0x84, 0x14,
- 0x02, 0x46, 0x84, 0xb5,
- 0x0c, 0xe6, 0x61, 0x94,
- 0x86, 0x38, 0xe0, 0x08,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x84, 0x66, 0xc0, 0x2b,
- 0xf3, 0xf0, 0x46, 0x30,
- 0x06, 0x36, 0xc4, 0x39,
- 0xe0, 0x08, 0x02, 0xe6,
- 0xef, 0xe0, 0x7f, 0xe8,
- 0x82, 0x55, 0xa1, 0x0b,
- 0x00, 0x56, 0x81, 0x85,
- 0x80, 0x18, 0xe1, 0x94,
- 0xf3, 0xf0, 0x42, 0x10,
- 0x80, 0x16, 0xc2, 0x19,
- 0x8c, 0x0b, 0x81, 0x61,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x4c, 0x38, 0xe2, 0x80,
- 0x5a, 0x98, 0xe8, 0x2c,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x45, 0xf6, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x0c,
- 0x5c, 0x38, 0x8c, 0x3b,
- 0xa1, 0x0b, 0xef, 0xfc,
- 0x63, 0x78, 0x82, 0xd5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x78, 0x08,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x6f, 0xfc, 0x64, 0x88,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xb9, 0x11, 0x00, 0x6b,
- 0x68, 0x2c, 0x4a, 0x08,
- 0xe4, 0x10, 0x0e, 0x60,
- 0x81, 0x21, 0x29, 0x11,
- 0x8e, 0x3b, 0x0c, 0x0b,
- 0xef, 0xfc, 0x5a, 0x28,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x61, 0x58, 0x80, 0xc5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0xe0, 0x00, 0x1e, 0x08,
- 0x64, 0x20, 0x10, 0x60,
- 0x09, 0x21, 0x85, 0x11,
- 0x59, 0x38, 0x8c, 0x0b,
- 0x90, 0x3b, 0x6f, 0xfc,
- 0x8c, 0x0b, 0x00, 0x7b,
- 0xef, 0xfc, 0x60, 0x68,
- 0x1d, 0x18, 0xa1, 0x7b,
- 0x20, 0x14, 0xc0, 0x00,
- 0xe1, 0x08, 0x0e, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xd1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x14,
- 0xfa, 0x80, 0x04, 0x24,
- 0xa1, 0x39, 0x1f, 0x29,
- 0x68, 0x00, 0x5c, 0x68,
- 0x1c, 0x04, 0x89, 0x11,
- 0xe1, 0x14, 0x03, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x1a, 0xe8,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x1a, 0x78, 0xa9, 0x0b,
- 0x5a, 0x14, 0x80, 0x00,
- 0xe1, 0x44, 0x4f, 0x06,
- 0x04, 0x14, 0x9c, 0x04,
- 0xf1, 0x17, 0x61, 0xc0,
- 0x7a, 0x80, 0x06, 0x24,
- 0xf8, 0x7c, 0x44, 0x10,
- 0x78, 0x80, 0x46, 0x30,
- 0x5a, 0x58, 0x8b, 0x11,
- 0x1c, 0x04, 0xe8, 0x00,
- 0xe1, 0x48, 0x42, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x18, 0xe8,
- 0x4f, 0x46, 0x5a, 0x14,
- 0x9c, 0x04, 0xe1, 0x44,
- 0x61, 0xa0, 0x04, 0x14,
- 0xfa, 0x80, 0x02, 0x14,
- 0x7a, 0x80, 0x04, 0x24,
- 0xf8, 0x80, 0x46, 0x10,
- 0x8b, 0x11, 0x3f, 0x29,
- 0xe8, 0x00, 0x58, 0xc8,
- 0x43, 0x06, 0x1c, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x17, 0x58, 0x83, 0x0b,
- 0x0c, 0x45, 0xc0, 0x00,
- 0x02, 0x86, 0x60, 0x10,
- 0x84, 0x04, 0xe1, 0x48,
- 0xe1, 0xe0, 0x04, 0x44,
- 0x44, 0x20, 0x00, 0x38,
- 0xc4, 0x3d, 0xfb, 0xfc,
- 0xe1, 0x47, 0x80, 0xd5,
- 0xfa, 0x80, 0x04, 0x44,
- 0x80, 0x65, 0xc5, 0x3d,
- 0x84, 0x04, 0x80, 0x26,
- 0x03, 0x86, 0x00, 0x08,
- 0x84, 0x14, 0xe1, 0x48,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x15, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb8, 0x40, 0x0a,
- 0x02, 0x46, 0x84, 0x85,
- 0xd5, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xcb, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x14, 0x48,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x02, 0x06, 0x84, 0x85,
- 0xd1, 0x07, 0x61, 0x48,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc7, 0x17, 0x84, 0x18,
- 0x83, 0x0b, 0x86, 0x19,
- 0xc0, 0x00, 0x12, 0xe8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0xb0, 0x40, 0x0a,
- 0x43, 0xc6, 0x84, 0x45,
- 0x8e, 0x09, 0x61, 0x44,
- 0x88, 0x06, 0x84, 0x24,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x48,
- 0x84, 0x18, 0x84, 0x14,
- 0x83, 0x0b, 0x8e, 0x19,
- 0xc0, 0x00, 0x11, 0xa8,
- 0xe0, 0x10, 0x0c, 0x05,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x42, 0x06, 0x84, 0x05,
- 0xc7, 0x07, 0x61, 0x08,
- 0x86, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x14, 0x03, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x10, 0x68,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf8, 0x40, 0x0a,
- 0x02, 0xc6, 0x84, 0x45,
- 0xf1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0f, 0x28,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x03, 0x06, 0x84, 0x45,
- 0xe9, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x46,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0d, 0xe8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xf0, 0x40, 0x0a,
- 0x03, 0x46, 0x84, 0x45,
- 0xe1, 0x07, 0x61, 0x48,
- 0x9e, 0x09, 0x04, 0x24,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x48, 0x42, 0x86,
- 0x84, 0x14, 0x80, 0x08,
- 0x83, 0x0b, 0x84, 0x18,
- 0xc0, 0x00, 0x0c, 0xa8,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xb4, 0x40, 0x0a,
- 0x43, 0x86, 0x86, 0x25,
- 0xc9, 0x07, 0x61, 0x00,
- 0x84, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf4,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0x84, 0x18, 0xc3, 0x07,
- 0xc0, 0x1f, 0xcd, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xaa, 0xc5,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x05, 0xe0, 0xb0,
- 0x61, 0x00, 0x43, 0x86,
- 0x04, 0x24, 0xc9, 0x07,
- 0x88, 0x38, 0x82, 0x09,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0xc0, 0x1f, 0xcb, 0x17,
- 0xe0, 0x80, 0x42, 0x4a,
- 0x0c, 0x05, 0xa4, 0x85,
- 0x40, 0x0a, 0xe0, 0x14,
- 0x86, 0x25, 0xe0, 0xac,
- 0x61, 0x00, 0x43, 0x46,
- 0x04, 0x24, 0xc5, 0x07,
- 0x88, 0x38, 0x84, 0x09,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0xc3, 0x07, 0x84, 0x14,
- 0xc7, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x9e, 0x25, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa8, 0x40, 0x0a,
- 0x43, 0x46, 0x86, 0x05,
- 0xc5, 0x07, 0x61, 0x00,
- 0x82, 0x09, 0x04, 0x24,
- 0x46, 0x30, 0x88, 0x38,
- 0xa0, 0x3f, 0xf3, 0xf8,
- 0x04, 0x04, 0x88, 0x36,
- 0xe1, 0x14, 0x03, 0xc6,
- 0x84, 0x14, 0x80, 0x08,
- 0xc5, 0x17, 0x84, 0x18,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x96, 0xe5, 0xe0, 0x80,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa4, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0xc5,
- 0x84, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf4, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x4a, 0xc0, 0x1f,
- 0x90, 0xe5, 0xe0, 0x84,
- 0xe0, 0x14, 0x0c, 0x05,
- 0xe0, 0xa0, 0x40, 0x0a,
- 0x43, 0x06, 0x84, 0x85,
- 0x82, 0x09, 0x61, 0x00,
- 0x88, 0x38, 0x84, 0x24,
- 0xf3, 0xf8, 0x46, 0x30,
- 0x88, 0x36, 0xa0, 0x3f,
- 0x03, 0xc6, 0x04, 0x04,
- 0x80, 0x08, 0xe1, 0x14,
- 0x84, 0x18, 0x84, 0x14,
- 0x42, 0x0a, 0xc0, 0x1f,
- 0x8a, 0xf5, 0xe0, 0x80,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0xf4, 0x40, 0x0a,
- 0x02, 0x46, 0x86, 0x05,
- 0xeb, 0x07, 0x61, 0x04,
- 0x87, 0x31, 0x04, 0x14,
- 0x78, 0x8c, 0x46, 0x02,
- 0x84, 0x28, 0x86, 0x09,
- 0xf3, 0xf0, 0x44, 0x20,
- 0x04, 0x26, 0xa6, 0x2f,
- 0xe1, 0x14, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x86, 0x19, 0xcb, 0x17,
- 0x84, 0xb5, 0x81, 0x1b,
- 0xe0, 0x18, 0x0c, 0x05,
- 0xe0, 0x07, 0x1a, 0x14,
- 0x70, 0x01, 0x40, 0x00,
- 0x81, 0x71, 0x43, 0x00,
- 0x61, 0xc0, 0x04, 0x14,
- 0xfb, 0x80, 0x02, 0x14,
- 0x6e, 0x09, 0x4c, 0x25,
- 0xa2, 0x0f, 0x40, 0x09,
- 0x6e, 0x0d, 0x4c, 0x05,
- 0x81, 0xb5, 0xc0, 0x09,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x4e, 0x66, 0x40, 0x2b,
- 0x42, 0x66, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xe0, 0x5d, 0x68,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0x69, 0x84, 0x08, 0x24,
- 0xe9, 0x84, 0x0a, 0x34,
- 0x18, 0x44, 0x00, 0x48,
- 0xb8, 0x5f, 0xe0, 0x84,
- 0x04, 0x25, 0xa7, 0x5b,
- 0xe9, 0x84, 0x02, 0x44,
- 0x86, 0x25, 0xa3, 0x5b,
- 0x86, 0xa5, 0xa5, 0x5b,
- 0x5c, 0x08, 0xa1, 0x5b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xa1, 0x1b, 0x80, 0x65,
- 0xa1, 0x1b, 0x84, 0x85,
- 0x81, 0x85, 0x86, 0x35,
- 0x82, 0xe5, 0xa1, 0x1b,
- 0x5c, 0x08, 0xa3, 0x1b,
- 0xc4, 0x4d, 0xda, 0x00,
- 0xc7, 0x4d, 0x82, 0x55,
- 0x9a, 0x00, 0x5c, 0x08,
- 0xdd, 0x93, 0x80, 0x36,
- 0x82, 0x05, 0xc4, 0x4d,
- 0x80, 0xd5, 0xa1, 0x1b,
- 0xdd, 0x93, 0x80, 0x26,
- 0x80, 0x16, 0x81, 0x11,
- 0xc7, 0x4d, 0xdd, 0x93,
- 0xa3, 0x1b, 0x80, 0x65,
- 0xdd, 0x93, 0xfc, 0x45,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x98, 0x6b, 0x00, 0x8b,
- 0xef, 0xf8, 0x75, 0xc8,
- 0x67, 0xc1, 0x0e, 0x80,
- 0x43, 0x46, 0x40, 0xae,
- 0x01, 0x21, 0xe0, 0x0c,
- 0x77, 0x58, 0x90, 0x0b,
- 0x8e, 0x3b, 0x6f, 0xf8,
- 0xa1, 0x0b, 0x81, 0x91,
- 0x1c, 0x14, 0x82, 0x35,
- 0x7f, 0xfd, 0x45, 0xfe,
- 0x43, 0x4a, 0xc0, 0x3f,
- 0x12, 0x0c, 0xe4, 0x08,
- 0x98, 0x0e, 0xe2, 0x00,
- 0x0c, 0x4c, 0x9a, 0x9e,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x61, 0x98, 0x4f, 0x06,
- 0x1c, 0x6e, 0x80, 0x6b,
- 0xe1, 0x00, 0x02, 0x06,
- 0xe8, 0x28, 0x65, 0x08,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xe8, 0x00, 0x40, 0x88,
- 0x8c, 0x0b, 0x1c, 0x14,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x87, 0x65,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0x60, 0x08, 0x40, 0x26,
- 0x65, 0x50, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0x89,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x60,
- 0x09, 0x21, 0xc0, 0x11,
- 0x6a, 0x98, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x21,
- 0x65, 0x01, 0x02, 0x70,
- 0x29, 0x21, 0xc0, 0x89,
- 0x69, 0xf8, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0x71,
- 0x65, 0x61, 0x02, 0x70,
- 0x21, 0x21, 0xc0, 0x89,
- 0x69, 0x58, 0x81, 0x31,
- 0x00, 0x60, 0xe8, 0x18,
- 0x40, 0x11, 0x64, 0xb1,
- 0x65, 0xa1, 0x02, 0x70,
- 0x45, 0x06, 0xc0, 0x89,
- 0x89, 0x31, 0x60, 0x18,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x18, 0x28, 0x88,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0xf0, 0x1e, 0xf0,
- 0x82, 0xbb, 0x00, 0x6b,
- 0x6e, 0x05, 0x0c, 0x09,
- 0xa3, 0x0b, 0xc0, 0x36,
- 0x16, 0x09, 0x96, 0x75,
- 0xc0, 0x04, 0x64, 0xa1,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x09, 0x94, 0xa5,
- 0x40, 0x38, 0x63, 0x21,
- 0xe1, 0x9c, 0x4e, 0x0a,
- 0x00, 0x1a, 0x81, 0x81,
- 0x0b, 0x38, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x56,
- 0x4c, 0x01, 0x96, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0xb1, 0x12, 0x60,
- 0x14, 0x60, 0xc0, 0xbf,
- 0x40, 0xc0, 0x65, 0x21,
- 0x64, 0x11, 0x00, 0xb0,
- 0x02, 0xb0, 0xc0, 0x11,
- 0x40, 0x14, 0x64, 0x61,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x60, 0xc0, 0xae,
- 0x40, 0xae, 0x65, 0xa1,
- 0x65, 0xe1, 0x18, 0x70,
- 0x09, 0xbe, 0xc0, 0x1f,
- 0x64, 0xc1, 0x06, 0x60,
- 0x7e, 0xce, 0xc0, 0xad,
- 0x65, 0x21, 0x08, 0x60,
- 0x7c, 0x2e, 0xc0, 0xad,
- 0x65, 0x41, 0x0a, 0x60,
- 0x3e, 0x1e, 0xc0, 0x54,
- 0x3c, 0x0e, 0x94, 0x1b,
- 0x55, 0x38, 0x92, 0x0b,
- 0x8e, 0x2b, 0x6f, 0xc4,
- 0x63, 0x21, 0x0c, 0x09,
- 0x4e, 0x0a, 0x40, 0x38,
- 0x00, 0x1a, 0xe1, 0x9c,
- 0x07, 0xb8, 0xe0, 0x00,
- 0xc0, 0x00, 0x20, 0x01,
- 0x60, 0x0c, 0x00, 0x66,
- 0x65, 0x60, 0x06, 0x60,
- 0x4c, 0x01, 0xc0, 0xd8,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x14, 0x1b, 0x92, 0x0b,
- 0x4d, 0x98, 0x8e, 0x2b,
- 0x96, 0x4b, 0x6f, 0xc0,
- 0x4e, 0x0a, 0x0d, 0xa5,
- 0x40, 0x46, 0xe1, 0x9c,
- 0x43, 0x46, 0x60, 0x08,
- 0x4c, 0x01, 0xe1, 0x4c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x04, 0xb0,
- 0x18, 0x60, 0xc0, 0x11,
- 0x40, 0xae, 0x65, 0xa1,
- 0x64, 0x01, 0x10, 0xb0,
- 0x0e, 0x60, 0xc0, 0x10,
- 0x40, 0x9f, 0x67, 0x61,
- 0x66, 0x11, 0x08, 0x60,
- 0x14, 0xb0, 0xc0, 0xad,
- 0x40, 0x13, 0x65, 0xb1,
- 0x67, 0x91, 0x12, 0xb0,
- 0x17, 0xbe, 0xc0, 0x10,
- 0x66, 0x21, 0x16, 0x60,
- 0x04, 0x04, 0xc0, 0xae,
- 0x66, 0xd1, 0x02, 0x60,
- 0x0f, 0xbe, 0xc0, 0x54,
- 0x64, 0x51, 0x06, 0x60,
- 0x19, 0xbe, 0xc0, 0x9e,
- 0x0d, 0x9e, 0x8e, 0xbb,
- 0x66, 0x71, 0x0a, 0x60,
- 0x8b, 0x8e, 0xc0, 0xa2,
- 0xfe, 0xce, 0x89, 0xae,
- 0x18, 0x60, 0x13, 0xce,
- 0xc0, 0xa3, 0x64, 0xa1,
- 0x08, 0x60, 0x7c, 0x4e,
- 0xc0, 0x6c, 0x67, 0x01,
- 0x96, 0x4b, 0x3e, 0x4e,
- 0xbc, 0xce, 0x9b, 0x8e,
- 0x9d, 0x2e, 0x95, 0x1e,
- 0xef, 0xb8, 0x49, 0x88,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x40, 0x56, 0x88, 0x75,
- 0x0a, 0x60, 0x60, 0x08,
- 0xc0, 0xa1, 0x64, 0x70,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x41, 0x46, 0x40, 0x2b,
- 0x17, 0x34, 0xe1, 0x4c,
- 0x99, 0x24, 0x96, 0x4b,
- 0x02, 0x30, 0x80, 0x04,
- 0x40, 0x14, 0x64, 0x61,
- 0x65, 0xe1, 0x0e, 0x30,
- 0x89, 0x2e, 0xc0, 0x1f,
- 0xfc, 0x1e, 0xfe, 0x7e,
- 0x9b, 0x24, 0x9d, 0x14,
- 0x86, 0x1b, 0x3e, 0x1e,
- 0x92, 0x3b, 0x3c, 0xae,
- 0xef, 0xb4, 0x4e, 0xe8,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0xa1, 0x8b, 0x8a, 0x45,
- 0x6e, 0x89, 0x0c, 0x05,
- 0x10, 0x56, 0x40, 0x0a,
- 0x0c, 0x15, 0xc0, 0x0c,
- 0xc0, 0x0a, 0x6e, 0x8d,
- 0x6e, 0x91, 0x0c, 0x25,
- 0x0c, 0x35, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x6e, 0x95,
- 0x69, 0x3d, 0x4c, 0x03,
- 0x40, 0x60, 0x40, 0x0a,
- 0x4c, 0x13, 0xdc, 0x00,
- 0x40, 0x0a, 0x69, 0x41,
- 0xc0, 0x0c, 0x02, 0x56,
- 0x69, 0x45, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x49,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x44, 0x78, 0xc0, 0x2b,
- 0x10, 0x0b, 0xcf, 0xe0,
- 0x0c, 0x0c, 0xf8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x60, 0x08, 0x42, 0x66,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x02, 0x60, 0x40, 0x2b,
- 0xc0, 0xb6, 0x67, 0x01,
- 0x0a, 0x60, 0x19, 0x24,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x9b, 0x34, 0x80, 0x04,
- 0x8e, 0x2b, 0x7c, 0x2e,
- 0x95, 0x14, 0xbe, 0x1e,
- 0xbc, 0x1e, 0x93, 0x44,
- 0x69, 0x58, 0x9d, 0x14,
- 0x17, 0xb4, 0xef, 0xb4,
- 0xa1, 0x8b, 0x80, 0x8b,
- 0x9f, 0xfc, 0x30, 0x18,
- 0x4e, 0x0a, 0x77, 0xa5,
- 0xc1, 0xc3, 0xe9, 0x9c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x8b,
- 0x00, 0x8e, 0xe1, 0x98,
- 0xe1, 0x00, 0x02, 0x06,
- 0x68, 0x28, 0x4f, 0x28,
- 0x01, 0x91, 0x90, 0x0b,
- 0xe6, 0xd4, 0x54, 0x06,
- 0x83, 0x61, 0x17, 0xb1,
- 0x81, 0x71, 0x09, 0xc5,
- 0x6e, 0x19, 0x10, 0x1b,
- 0x00, 0x64, 0x40, 0x15,
- 0x80, 0x1f, 0xe8, 0xa4,
- 0x90, 0x05, 0xa1, 0x1b,
- 0xe1, 0x34, 0x43, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x80, 0xa5, 0xa1, 0x2b,
- 0x80, 0x1f, 0x84, 0x18,
- 0x8c, 0xc5, 0xa1, 0x1b,
- 0xf0, 0xa4, 0x4c, 0x82,
- 0x68, 0x81, 0x0c, 0x09,
- 0x00, 0x0a, 0xc0, 0x1b,
- 0x41, 0x06, 0x63, 0xfc,
- 0x80, 0x14, 0xe1, 0x98,
- 0x04, 0x94, 0x80, 0xe5,
- 0x90, 0x0b, 0x7a, 0x80,
- 0xe8, 0x00, 0x43, 0x28,
- 0x68, 0x18, 0x81, 0x45,
- 0x90, 0x0b, 0x6f, 0xfc,
- 0x68, 0x81, 0x0c, 0x09,
- 0x06, 0x06, 0x40, 0x1b,
- 0x0c, 0x14, 0xe1, 0x38,
- 0xec, 0x04, 0x04, 0xb0,
- 0x00, 0x0a, 0x83, 0x61,
- 0x10, 0x05, 0xe3, 0xfc,
- 0x10, 0x09, 0xdc, 0x28,
- 0x00, 0x27, 0x07, 0xe5,
- 0x50, 0x05, 0xa1, 0x7b,
- 0xc0, 0x0a, 0x6e, 0x69,
- 0x82, 0x55, 0x84, 0x2c,
- 0xe1, 0x98, 0x41, 0x06,
- 0x90, 0x0b, 0x00, 0x14,
- 0xef, 0xfc, 0x69, 0x88,
- 0x61, 0x38, 0x06, 0x06,
- 0x8c, 0x04, 0x80, 0x7b,
- 0x02, 0x91, 0x80, 0xbc,
- 0x84, 0xb1, 0x88, 0xa1,
- 0xe0, 0x40, 0x12, 0x0a,
- 0x8e, 0x0b, 0xec, 0x95,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x80, 0x8b, 0x02, 0x7b,
- 0x60, 0x08, 0x40, 0x36,
- 0x50, 0x01, 0x84, 0x6b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x00, 0x70,
- 0x02, 0x80, 0xc0, 0x11,
- 0x40, 0x6d, 0x65, 0x71,
- 0x4f, 0xb8, 0x89, 0x21,
- 0x81, 0x31, 0x68, 0x18,
- 0x64, 0x21, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6d, 0x65, 0x21,
- 0x81, 0x31, 0x29, 0x21,
- 0xe8, 0x18, 0x4f, 0x08,
- 0x60, 0x88, 0x00, 0x64,
- 0x65, 0x80, 0x02, 0x80,
- 0x02, 0x25, 0xc0, 0x6d,
- 0x82, 0x03, 0x7c, 0x00,
- 0x89, 0x31, 0x0c, 0x13,
- 0x61, 0x1d, 0x4e, 0x25,
- 0x00, 0x25, 0xc0, 0x01,
- 0x4e, 0x25, 0xe0, 0x40,
- 0x40, 0x01, 0x61, 0x21,
- 0xe0, 0x18, 0x45, 0x06,
- 0xe0, 0x80, 0x00, 0x05,
- 0x61, 0x25, 0x4e, 0x05,
- 0x02, 0x09, 0xc0, 0x01,
- 0x4e, 0x01, 0xe3, 0x00,
- 0xc0, 0x04, 0x64, 0xa1,
- 0x63, 0x40, 0x02, 0x09,
- 0xe0, 0x18, 0x43, 0x06,
- 0xe6, 0x86, 0x42, 0x6a,
- 0x64, 0xa5, 0x4e, 0x01,
- 0x82, 0x83, 0x40, 0x04,
- 0x64, 0xb1, 0x00, 0x70,
- 0x02, 0x80, 0x40, 0x11,
- 0xc0, 0x6e, 0x65, 0x01,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xe0, 0x18, 0x0b, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x15, 0xc6, 0x00, 0x6b,
- 0x10, 0x60, 0xe1, 0xa0,
- 0x40, 0x54, 0x66, 0xd1,
- 0x65, 0x41, 0x12, 0x60,
- 0x28, 0x6e, 0xc0, 0x54,
- 0x67, 0x61, 0x0e, 0x60,
- 0x10, 0x0b, 0xc0, 0xae,
- 0x0c, 0x2b, 0x92, 0x1b,
- 0x6a, 0x38, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x28, 0x24, 0x84, 0x55,
- 0x12, 0x1b, 0x90, 0x0b,
- 0x6c, 0x18, 0x8e, 0x3b,
- 0xa1, 0x0b, 0xef, 0xcc,
- 0x00, 0x00, 0x14, 0x25,
- 0x9c, 0x00, 0x40, 0x80,
- 0x1c, 0x00, 0x42, 0x90,
- 0x9c, 0x00, 0x46, 0x70,
- 0x8f, 0xcc, 0x68, 0xe8,
- 0x6e, 0x89, 0x0c, 0x15,
- 0xa1, 0x0b, 0x40, 0x0a,
- 0x6e, 0x8d, 0x0c, 0x25,
- 0x0e, 0x06, 0x40, 0x0a,
- 0x0c, 0x35, 0x80, 0x00,
- 0xc0, 0x0a, 0x6e, 0x91,
- 0x6e, 0x95, 0x0c, 0x45,
- 0x4c, 0x13, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x3d,
- 0x69, 0x41, 0x4c, 0x23,
- 0x4c, 0x33, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x69, 0x45,
- 0x69, 0x49, 0x4c, 0x43,
- 0x82, 0x65, 0xc0, 0x0a,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x0e, 0x56, 0x40, 0x2b,
- 0x02, 0x56, 0xe0, 0x0c,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xdc, 0x71, 0xe8,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x61, 0x41, 0x00, 0x19,
- 0x15, 0xc6, 0x40, 0x15,
- 0x00, 0x29, 0xe0, 0x10,
- 0x40, 0x15, 0x61, 0x45,
- 0x42, 0x2a, 0x81, 0xb1,
- 0x00, 0x29, 0xe6, 0x86,
- 0xc0, 0x15, 0x62, 0x11,
- 0xfa, 0x80, 0x02, 0x14,
- 0x04, 0x00, 0x0b, 0x2e,
- 0xc0, 0x66, 0x66, 0x49,
- 0x04, 0x00, 0x7e, 0x2e,
- 0xc0, 0x58, 0x66, 0x51,
- 0x04, 0x00, 0x7c, 0x2e,
- 0xc0, 0x6b, 0x66, 0x45,
- 0x97, 0xc5, 0xbe, 0x2e,
- 0xf0, 0x8c, 0x44, 0x02,
- 0x6f, 0x41, 0x04, 0x79,
- 0xe5, 0x7d, 0xc0, 0x15,
- 0x8b, 0x24, 0x82, 0xd5,
- 0xe6, 0x8a, 0x48, 0x3a,
- 0xf0, 0x90, 0x44, 0x02,
- 0x6e, 0x41, 0x04, 0x29,
- 0xf0, 0x2d, 0xc0, 0x1a,
- 0x54, 0x4a, 0x80, 0xd5,
- 0x80, 0x75, 0xe4, 0x88,
- 0x82, 0xb1, 0x15, 0x75,
- 0x69, 0x91, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x2b,
- 0x40, 0x88, 0x04, 0x44,
- 0xc0, 0x00, 0x0a, 0x16,
- 0xd0, 0x80, 0x44, 0x22,
- 0x08, 0x91, 0x04, 0x95,
- 0x86, 0xb5, 0xc0, 0x05,
- 0x60, 0x84, 0x04, 0x44,
- 0x80, 0x23, 0x83, 0x51,
- 0x6d, 0x21, 0x04, 0x63,
- 0x04, 0x54, 0xc0, 0x0c,
- 0xcf, 0x2d, 0xfa, 0x80,
- 0x80, 0x88, 0x08, 0x44,
- 0x90, 0x80, 0x48, 0x42,
- 0x08, 0x91, 0x08, 0x95,
- 0x88, 0x05, 0x80, 0x05,
- 0x82, 0x51, 0x08, 0x23,
- 0x80, 0x23, 0xc2, 0x27,
- 0x6d, 0x21, 0x04, 0x23,
- 0x8d, 0x2d, 0xc0, 0x0c,
- 0xfb, 0x55, 0xfa, 0xa5,
- 0xfa, 0x80, 0x04, 0x54,
- 0x08, 0x44, 0xcf, 0x2d,
- 0x48, 0x42, 0x80, 0x84,
- 0x08, 0x6b, 0x90, 0x80,
- 0x80, 0x0c, 0x0d, 0x21,
- 0x08, 0x23, 0x82, 0x65,
- 0xc4, 0x27, 0x82, 0x51,
- 0x04, 0x25, 0x80, 0x23,
- 0xc0, 0x05, 0x68, 0x91,
- 0xfa, 0xa5, 0xd2, 0x2d,
- 0x0b, 0x24, 0xf9, 0x05,
- 0xfc, 0xc4, 0xd5, 0x97,
- 0x4a, 0x2a, 0x89, 0x9e,
- 0xfe, 0x24, 0xe6, 0x8e,
- 0x60, 0x84, 0x06, 0x54,
- 0xe0, 0x88, 0x08, 0x54,
- 0x98, 0x43, 0x3e, 0xc4,
- 0x04, 0x64, 0x04, 0x33,
- 0xfb, 0x27, 0xfb, 0x00,
- 0x98, 0x53, 0x06, 0x29,
- 0x10, 0x64, 0x84, 0x63,
- 0x83, 0x61, 0x7b, 0x00,
- 0x85, 0x87, 0x09, 0xc5,
- 0xf0, 0x2d, 0x94, 0x28,
- 0x54, 0x4a, 0x80, 0x95,
- 0x90, 0x25, 0xe4, 0x88,
- 0x18, 0x24, 0x8c, 0x22,
- 0x86, 0xc9, 0xe1, 0xf4,
- 0x04, 0x24, 0x98, 0x23,
- 0x85, 0x27, 0xfb, 0x00,
- 0x58, 0x22, 0x10, 0x24,
- 0x12, 0xc0, 0xf1, 0xa0,
- 0x13, 0x0a, 0xed, 0xb0,
- 0xc0, 0x04, 0x64, 0x75,
- 0xd5, 0x27, 0x02, 0xe5,
- 0x6d, 0x40, 0x18, 0xc0,
- 0xe0, 0x04, 0x52, 0x46,
- 0x60, 0xa6, 0x58, 0xca,
- 0x89, 0x94, 0x82, 0x21,
- 0xec, 0x08, 0x18, 0xc0,
- 0xe0, 0x0a, 0x44, 0x9a,
- 0x09, 0x94, 0x83, 0xd5,
- 0x19, 0x0a, 0x82, 0x21,
- 0xc0, 0x02, 0x60, 0x45,
- 0x60, 0x0a, 0x44, 0x9a,
- 0xc0, 0x00, 0x13, 0xe6,
- 0x40, 0x26, 0x58, 0xca,
- 0xc0, 0x04, 0x13, 0x06,
- 0x58, 0x92, 0x02, 0xf5,
- 0x9f, 0x91, 0xd1, 0xb0,
- 0x66, 0xa6, 0x58, 0xca,
- 0xe0, 0x04, 0x52, 0x46,
- 0x6e, 0xc1, 0x18, 0xc0,
- 0x58, 0xca, 0xc0, 0x04,
- 0x18, 0xc0, 0xe0, 0xa6,
- 0xd8, 0x2d, 0xec, 0x14,
- 0xc0, 0x00, 0x04, 0xd6,
- 0xc0, 0x00, 0x4a, 0x21,
- 0x84, 0x31, 0x02, 0x61,
- 0x82, 0x51, 0x08, 0x41,
- 0xec, 0xb5, 0xcf, 0x6d,
- 0x06, 0xb4, 0xeb, 0xa5,
- 0xc3, 0x3d, 0xfa, 0x80,
- 0x01, 0x01, 0xd0, 0x55,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x00, 0x19, 0x94, 0x15,
- 0xc0, 0x38, 0x64, 0xd1,
- 0x92, 0x75, 0xa1, 0x1b,
- 0x61, 0x41, 0x00, 0x19,
- 0x81, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x89, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x44, 0x2a,
- 0x62, 0x11, 0x00, 0x19,
- 0x07, 0x95, 0xc0, 0x15,
- 0xfa, 0x80, 0x04, 0x24,
- 0x70, 0xb0, 0x4a, 0x02,
- 0xe6, 0x86, 0x58, 0xca,
- 0x67, 0x41, 0x0a, 0x50,
- 0x81, 0x61, 0x40, 0x57,
- 0x98, 0x83, 0x85, 0x85,
- 0xf0, 0xa0, 0x4e, 0x02,
- 0x6e, 0x41, 0x0e, 0x99,
- 0xab, 0x9b, 0xc0, 0x1a,
- 0xc2, 0x87, 0x86, 0xf5,
- 0x10, 0x83, 0x80, 0x83,
- 0xc0, 0x0c, 0x6d, 0x21,
- 0xe1, 0xf4, 0x12, 0x84,
- 0x00, 0x93, 0x86, 0x99,
- 0x40, 0x1c, 0x62, 0x6d,
- 0x10, 0x84, 0x92, 0x83,
- 0x85, 0x87, 0xfb, 0x00,
- 0x82, 0xd5, 0x92, 0x8d,
- 0x6a, 0x41, 0x0e, 0x89,
- 0x00, 0x99, 0xc0, 0x1a,
- 0xc0, 0x38, 0x64, 0xd5,
- 0xd2, 0x8d, 0xc3, 0x87,
- 0x06, 0x41, 0x0e, 0x70,
- 0x4e, 0x41, 0x80, 0x6b,
- 0x82, 0x61, 0x80, 0x00,
- 0x10, 0x64, 0x14, 0x78,
- 0xcf, 0x8d, 0xfa, 0x80,
- 0x82, 0x31, 0xf4, 0xb5,
- 0xfa, 0x80, 0x18, 0x34,
- 0xf0, 0xf5, 0xc5, 0xcd,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x61, 0x41, 0x00, 0x19,
- 0xfb, 0x31, 0x40, 0x15,
- 0x61, 0x45, 0x00, 0x29,
- 0x81, 0x41, 0x40, 0x15,
- 0xe6, 0x86, 0x42, 0x2a,
- 0x62, 0x11, 0x00, 0x29,
- 0x09, 0xf5, 0xc0, 0x15,
- 0xfa, 0x80, 0x02, 0x14,
- 0x66, 0x8a, 0x4a, 0x7a,
- 0x66, 0x40, 0x0c, 0x00,
- 0x58, 0x62, 0xc0, 0x58,
- 0x18, 0xc9, 0xf0, 0x94,
- 0xc0, 0x04, 0x6c, 0x01,
- 0x18, 0x06, 0x2b, 0xcb,
- 0x86, 0x75, 0xe0, 0x80,
- 0x0e, 0x79, 0x80, 0x73,
- 0xc0, 0x15, 0x6f, 0x41,
- 0x84, 0xa5, 0xa1, 0x7b,
- 0xe0, 0x84, 0x18, 0x54,
- 0x81, 0xc1, 0x18, 0x63,
- 0x6c, 0x01, 0x0c, 0x63,
- 0x87, 0x6d, 0xc0, 0x01,
- 0x0c, 0xc4, 0x80, 0xc5,
- 0x8c, 0xc3, 0xe1, 0xfc,
- 0x83, 0xc7, 0x01, 0xf5,
- 0x60, 0x0d, 0x0d, 0x0a,
- 0x59, 0xf6, 0x40, 0x20,
- 0x82, 0xc5, 0xe0, 0x7c,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xf9, 0x67,
- 0x18, 0xc0, 0x89, 0xc7,
- 0x00, 0x53, 0xe5, 0xc8,
- 0x4a, 0xc1, 0x82, 0x41,
- 0xc0, 0x1a, 0x62, 0x41,
- 0x18, 0x64, 0x83, 0x85,
- 0x0d, 0x0a, 0x61, 0xf4,
- 0xc0, 0x03, 0x60, 0x7c,
- 0x8c, 0xc3, 0x86, 0xc9,
- 0xfb, 0x00, 0x18, 0xc4,
- 0x85, 0xc7, 0x76, 0xe5,
- 0x61, 0x7d, 0x0d, 0x0a,
- 0xf8, 0xb5, 0xc0, 0x09,
- 0xe1, 0x7c, 0x0c, 0xc4,
- 0x8c, 0xc3, 0xfb, 0x67,
- 0x7d, 0x65, 0x87, 0xc7,
- 0xe5, 0x30, 0x18, 0xc0,
- 0xfa, 0x80, 0x0e, 0x44,
- 0xec, 0x35, 0xc3, 0x7d,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x04,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x51, 0x06, 0x00, 0x6b,
- 0x20, 0x6e, 0xe1, 0x98,
- 0x67, 0x01, 0x12, 0x60,
- 0x03, 0x15, 0xc0, 0x94,
- 0x0c, 0x0b, 0x81, 0x71,
- 0xc0, 0x16, 0x66, 0x35,
- 0x60, 0x80, 0x40, 0x4a,
- 0xe0, 0x10, 0x00, 0x06,
- 0x5c, 0x00, 0x40, 0x60,
- 0xdc, 0x00, 0x42, 0x70,
- 0xcf, 0xdc, 0x42, 0xa8,
- 0x82, 0x71, 0x65, 0x0e,
- 0xe2, 0x30, 0x0e, 0x0a,
- 0x20, 0x14, 0xfa, 0xf5,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x81, 0x15, 0xf2, 0x9c,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x00, 0x06, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x64, 0x81, 0x0e, 0x60,
- 0x18, 0x60, 0x40, 0x99,
- 0xc0, 0x8b, 0x64, 0x61,
- 0x04, 0x60, 0x3e, 0x7e,
- 0xc0, 0xae, 0x66, 0xa1,
- 0x06, 0x60, 0x00, 0x04,
- 0xc0, 0x9f, 0x67, 0x61,
- 0x65, 0x21, 0x08, 0x60,
- 0x0a, 0x60, 0x40, 0xa2,
- 0xc0, 0xa3, 0x66, 0xe1,
- 0x62, 0x18, 0xbc, 0xce,
- 0xa1, 0x0b, 0xef, 0xc8,
- 0x0e, 0x06, 0x02, 0xa5,
- 0x0c, 0x29, 0x80, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x0c, 0x0e, 0x56,
- 0x60, 0x0c, 0x02, 0x56,
- 0x52, 0x18, 0x8c, 0x0b,
- 0x0e, 0x0b, 0xef, 0xdc,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x00, 0x06,
- 0x80, 0x08, 0x80, 0x04,
- 0x82, 0x09, 0x5d, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xf0, 0x59, 0x28,
- 0x81, 0x71, 0x81, 0x11,
- 0x60, 0x04, 0x47, 0xc6,
- 0x10, 0x05, 0x80, 0x6b,
- 0x40, 0x09, 0x6e, 0x0d,
- 0x65, 0x61, 0x04, 0x80,
- 0x10, 0x15, 0xc0, 0xad,
- 0xc0, 0x0a, 0x6d, 0x49,
- 0x6c, 0x1d, 0x50, 0x31,
- 0x5c, 0x58, 0xc0, 0x2b,
- 0x80, 0x9b, 0xef, 0xc4,
- 0x82, 0xc5, 0xa1, 0x9b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x90, 0x0b, 0x40, 0x2b,
- 0x6f, 0xdc, 0x4f, 0x28,
- 0x03, 0x11, 0x92, 0x1b,
- 0x57, 0x18, 0x8c, 0x0b,
- 0x15, 0x75, 0xef, 0xf0,
- 0x7c, 0x6e, 0x92, 0x7b,
- 0xe1, 0x04, 0x01, 0x46,
- 0x6d, 0x59, 0x10, 0x15,
- 0x80, 0x04, 0xc0, 0x0a,
- 0x10, 0x05, 0x80, 0x1e,
- 0xc0, 0x0a, 0x6d, 0x59,
- 0x6e, 0x0d, 0x10, 0x15,
- 0x5b, 0xf8, 0xc0, 0x09,
- 0x00, 0x00, 0xef, 0xc4,
- 0xc0, 0x80, 0x64, 0x01,
- 0xe1, 0xc0, 0x12, 0x04,
- 0x6f, 0xcc, 0x64, 0x88,
- 0x10, 0x0b, 0x92, 0x0b,
- 0x6b, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x65, 0xd8, 0x92, 0x1b,
- 0x10, 0x0b, 0xef, 0xcc,
- 0x68, 0x98, 0x92, 0x1b,
- 0x01, 0x46, 0xef, 0xcc,
- 0x02, 0x86, 0x61, 0x18,
- 0x80, 0x04, 0xe1, 0x18,
- 0x84, 0x24, 0x80, 0x08,
- 0x04, 0x04, 0x88, 0x06,
- 0xe1, 0x04, 0x03, 0x86,
- 0x10, 0x2b, 0x80, 0x08,
- 0xc0, 0x16, 0x67, 0x39,
- 0x50, 0x01, 0x84, 0x14,
- 0x40, 0x2b, 0x65, 0x7d,
- 0xe1, 0x04, 0x01, 0xc6,
- 0x83, 0x21, 0x04, 0x2c,
- 0x67, 0x3d, 0x10, 0x1b,
- 0x80, 0x04, 0xc0, 0x16,
- 0x41, 0xc6, 0x00, 0x1c,
- 0x80, 0x04, 0xe1, 0x00,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x04,
- 0xd0, 0x19, 0x80, 0x18,
- 0x90, 0x0b, 0x00, 0x16,
- 0x60, 0xcd, 0x10, 0x15,
- 0x63, 0xf8, 0xc0, 0x0e,
- 0x10, 0x09, 0xe8, 0x20,
- 0x40, 0x38, 0x63, 0x15,
- 0xe1, 0x04, 0x14, 0x06,
- 0xa5, 0x0b, 0x83, 0x21,
- 0x0e, 0x91, 0x10, 0x19,
- 0x41, 0x06, 0x40, 0x2c,
- 0x00, 0x05, 0xc1, 0x10,
- 0x40, 0x11, 0xc0, 0x00,
- 0x89, 0x11, 0x40, 0x00,
- 0x00, 0x16, 0xa8, 0x04,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd1,
- 0xe8, 0x20, 0x62, 0x68,
- 0x8f, 0x61, 0x28, 0x04,
- 0x00, 0x66, 0x83, 0x21,
- 0x10, 0x15, 0x90, 0x0b,
- 0xc0, 0x0e, 0x60, 0xd5,
- 0xe8, 0x20, 0x61, 0xc8,
- 0x16, 0x76, 0x28, 0x04,
- 0x00, 0xb6, 0xe0, 0x04,
- 0x4c, 0x58, 0x90, 0x0b,
- 0x50, 0x75, 0xe8, 0x00,
- 0x40, 0x0e, 0x60, 0xed,
- 0x50, 0x75, 0xa1, 0x0b,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0x60, 0xf1, 0x50, 0x75,
- 0x88, 0x85, 0xc0, 0x0e,
- 0x03, 0x46, 0xfc, 0x64,
- 0x01, 0x86, 0xe1, 0x18,
- 0x83, 0xa1, 0x61, 0x18,
- 0x80, 0xa6, 0x80, 0x04,
- 0x80, 0x08, 0x84, 0x04,
- 0x40, 0x9a, 0x82, 0x01,
- 0x50, 0x03, 0xe0, 0x02,
- 0xc0, 0x15, 0x6e, 0x01,
- 0xef, 0xe0, 0x4d, 0x68,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0xa6, 0x80, 0x04,
- 0xe8, 0x20, 0x66, 0x08,
- 0xef, 0xcc, 0x4f, 0x08,
- 0x8c, 0x0b, 0x03, 0x11,
- 0xef, 0xf0, 0x4c, 0xa8,
- 0x98, 0xf1, 0x0e, 0x0b,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x10, 0x15, 0xdd, 0x93,
- 0xc0, 0x0e, 0x60, 0xe5,
- 0x60, 0xdd, 0x10, 0x05,
- 0x82, 0x11, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x15,
- 0xa1, 0x0b, 0x40, 0x0e,
- 0x50, 0x15, 0x83, 0x11,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x60, 0xf1, 0x50, 0x15,
- 0x96, 0x85, 0xc0, 0x0e,
- 0x83, 0x91, 0x3e, 0x9e,
- 0xa8, 0x04, 0x89, 0x05,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xec,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf2, 0xfc, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf4,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x83, 0x21, 0x00, 0x26,
- 0x60, 0xd1, 0x10, 0x15,
- 0x90, 0x0b, 0x40, 0x0e,
- 0xe8, 0x20, 0x5b, 0x48,
- 0x83, 0x21, 0x28, 0x04,
- 0x90, 0x0b, 0x00, 0x66,
- 0x60, 0xd5, 0x10, 0x15,
- 0x5a, 0xb8, 0xc0, 0x0e,
- 0xa8, 0x04, 0xe8, 0x20,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xe8, 0x00, 0x45, 0x68,
- 0x90, 0x15, 0xa1, 0x0b,
- 0x60, 0xe5, 0x10, 0x05,
- 0x82, 0x91, 0x40, 0x0e,
- 0x60, 0xed, 0x10, 0x15,
- 0x82, 0x01, 0xc0, 0x0e,
- 0x60, 0xe5, 0x50, 0x05,
- 0x82, 0x11, 0x40, 0x0e,
- 0x60, 0xdd, 0x10, 0x05,
- 0x50, 0x15, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xed,
- 0x89, 0x21, 0x02, 0x01,
- 0xee, 0xd5, 0xc1, 0x9d,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x02, 0x36, 0x40, 0x2b,
- 0x7e, 0x18, 0xe0, 0x08,
- 0x90, 0x0b, 0x6f, 0xd8,
- 0xe0, 0x08, 0x0e, 0x36,
- 0x83, 0x11, 0x00, 0xab,
- 0x45, 0xd8, 0xfc, 0x04,
- 0x21, 0xab, 0xef, 0xf0,
- 0x3e, 0x94, 0x80, 0x6b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x10, 0x29, 0xef, 0x15,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x02, 0x36,
- 0x6f, 0xd8, 0x7c, 0xc8,
- 0x0e, 0x36, 0x90, 0x0b,
- 0x00, 0xab, 0xe0, 0x08,
- 0xfc, 0x04, 0x83, 0x11,
- 0xef, 0xf0, 0x44, 0x88,
- 0x80, 0x6b, 0x21, 0xab,
- 0x0e, 0x06, 0x6b, 0xf5,
- 0x10, 0x05, 0x80, 0x00,
- 0x40, 0x0e, 0x61, 0x05,
- 0xe1, 0x18, 0x03, 0x46,
- 0x60, 0xe1, 0x50, 0x95,
- 0x50, 0x95, 0xc0, 0x0e,
- 0xc0, 0x0e, 0x60, 0xe9,
- 0xd3, 0x0d, 0x7c, 0x64,
- 0x01, 0x05, 0x50, 0x95,
- 0xbe, 0x94, 0xc0, 0x0e,
- 0xc1, 0xc3, 0xe9, 0xd5,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x60, 0xd9, 0x00, 0x15,
- 0x81, 0x21, 0x40, 0x0e,
- 0x68, 0x20, 0x54, 0xa8,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x00, 0xc5, 0xe0, 0x90,
- 0x80, 0x00, 0x0c, 0x16,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x8c, 0x0b, 0xfc, 0xe5,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xf0, 0x40, 0xc8,
- 0x81, 0x81, 0x81, 0x11,
- 0x01, 0x86, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x12, 0x86, 0x40, 0x2b,
- 0x80, 0x86, 0xe1, 0x3c,
- 0x6e, 0x0d, 0x0c, 0x05,
- 0xa4, 0x14, 0xc0, 0x09,
- 0x82, 0x01, 0xd9, 0x07,
- 0x6e, 0x01, 0x4c, 0x03,
- 0x84, 0x08, 0xc0, 0x15,
- 0xf3, 0x7c, 0x40, 0x00,
- 0x00, 0x06, 0x04, 0x06,
- 0x80, 0x14, 0xe1, 0x04,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xec,
- 0x84, 0x28, 0x80, 0x14,
- 0xf2, 0xfc, 0x44, 0x20,
- 0x80, 0x14, 0x84, 0x26,
- 0x44, 0x20, 0x84, 0x28,
- 0x84, 0x26, 0xf3, 0xf4,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x41, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x00,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe1, 0x04, 0x00, 0x46,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x7d, 0xb8, 0x80, 0x16,
- 0xa4, 0x04, 0xef, 0xdc,
- 0x02, 0x14, 0x80, 0x18,
- 0x80, 0x16, 0xfc, 0x94,
- 0xef, 0xc8, 0x7e, 0x68,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xec, 0x7c, 0x08,
- 0xe1, 0x18, 0x00, 0xc6,
- 0x80, 0x86, 0x80, 0x04,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x43, 0x26, 0x00, 0x6b,
- 0x0c, 0x01, 0xe0, 0x04,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x0c, 0x09, 0xe0, 0x84,
- 0xc0, 0x2b, 0x05, 0xa9,
- 0x43, 0x06, 0x8c, 0x95,
- 0x84, 0x18, 0xef, 0xdc,
- 0x80, 0xb5, 0xa3, 0x1b,
- 0x66, 0xe9, 0x0c, 0x09,
- 0x85, 0xb5, 0xc0, 0x26,
- 0xf7, 0x00, 0x00, 0x8a,
- 0x0c, 0x19, 0x80, 0xd5,
- 0xc0, 0x26, 0x66, 0xed,
- 0xfc, 0xa5, 0xa1, 0x1b,
- 0xe0, 0x98, 0x40, 0x4a,
- 0x0c, 0x19, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x82, 0x0d, 0xff, 0x11,
- 0x0c, 0x19, 0x82, 0x15,
- 0xc0, 0x26, 0x66, 0xed,
- 0x04, 0x65, 0xa1, 0x1b,
- 0x80, 0x00, 0x40, 0x46,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x09,
- 0x02, 0x60, 0x00, 0x2b,
- 0x80, 0xad, 0x05, 0xb1,
- 0x04, 0x41, 0x02, 0x60,
- 0x84, 0x18, 0xc0, 0x9e,
- 0x08, 0x45, 0x0c, 0x09,
- 0x82, 0x03, 0xc0, 0x27,
- 0xe1, 0x00, 0x42, 0x86,
- 0x84, 0x06, 0x84, 0x14,
- 0xa1, 0x0b, 0x84, 0x08,
- 0x84, 0x08, 0x80, 0xa5,
- 0xe5, 0x04, 0x00, 0x8a,
- 0x40, 0x46, 0x80, 0x95,
- 0x84, 0x06, 0xe0, 0x00,
- 0x61, 0x00, 0x4e, 0x46,
- 0x9c, 0x04, 0x83, 0x21,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x9c, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0x47, 0x98, 0x87, 0x11,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x83, 0x21, 0x1c, 0x04,
- 0xc4, 0x19, 0x80, 0x18,
- 0x99, 0x11, 0x00, 0x16,
- 0x68, 0x20, 0x47, 0x08,
- 0x9c, 0x04, 0x8c, 0x0b,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x4c, 0x80, 0x16,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xe1, 0x04, 0x41, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x46, 0x00, 0x7b,
- 0x45, 0x98, 0xe0, 0x04,
- 0x81, 0x21, 0x68, 0x20,
- 0x00, 0xc6, 0x81, 0x61,
- 0x03, 0x86, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x00,
- 0x80, 0x28, 0x84, 0x14,
- 0x46, 0x4a, 0x84, 0x38,
- 0x84, 0x25, 0xe0, 0x98,
- 0xe0, 0x8c, 0x44, 0x4a,
- 0x0e, 0x29, 0xfe, 0x25,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0c, 0x86,
- 0x60, 0x08, 0x02, 0x86,
- 0x69, 0x98, 0x8e, 0x0b,
- 0xa3, 0x0b, 0xef, 0xd8,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xe8, 0x20, 0x4a, 0x88,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x01, 0x61,
- 0x57, 0xd8, 0xe0, 0x3c,
- 0x81, 0x11, 0x6f, 0x88,
- 0xe1, 0x44, 0x41, 0xc6,
- 0x80, 0x66, 0x80, 0x04,
- 0xef, 0xdc, 0x6e, 0xa8,
- 0xef, 0xdc, 0x71, 0x48,
- 0xef, 0xdc, 0x73, 0x28,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x56, 0xd8, 0x83, 0x11,
- 0x0c, 0x0c, 0xef, 0x88,
- 0x33, 0x58, 0xf2, 0x00,
- 0xc1, 0xc3, 0xff, 0xc8,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xc6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6d, 0x49, 0x0c, 0x05,
- 0x4c, 0x05, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x85,
- 0x66, 0x85, 0x0c, 0x05,
- 0x77, 0x78, 0xc0, 0x0b,
- 0x00, 0x04, 0xef, 0xc0,
- 0x4c, 0x05, 0xfb, 0x80,
- 0xc0, 0x0b, 0x66, 0x89,
- 0x65, 0x39, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x35,
- 0x65, 0x3d, 0x0c, 0x09,
- 0x4c, 0x01, 0xc0, 0x2b,
- 0xc0, 0x2d, 0x6a, 0x39,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xd6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x05, 0x91, 0x11,
- 0xc0, 0x08, 0x69, 0x59,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2b, 0x65, 0xcd,
- 0xef, 0xc0, 0x72, 0xa8,
- 0x6a, 0x05, 0x4c, 0x01,
- 0x0c, 0x05, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x63, 0x7d,
- 0x66, 0x7d, 0x4c, 0x05,
- 0x0c, 0x0c, 0xc0, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0xc4, 0x17, 0x00, 0x6b,
- 0x60, 0x08, 0x40, 0xe6,
- 0x4c, 0x01, 0x8c, 0x13,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x02, 0x05, 0x84, 0x7b,
- 0xc0, 0x06, 0x6d, 0x61,
- 0x66, 0x79, 0x4c, 0x05,
- 0x0c, 0x09, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6e, 0x31,
- 0x6d, 0x0d, 0x0c, 0x09,
- 0xa3, 0x0b, 0x40, 0x2c,
- 0x40, 0x4a, 0x84, 0x15,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x00, 0xad, 0x05, 0x4d,
- 0x05, 0xa1, 0x02, 0x60,
- 0x00, 0x60, 0x80, 0xb3,
- 0x40, 0xad, 0x05, 0x49,
- 0x05, 0x91, 0x02, 0x60,
- 0x81, 0xc5, 0xc0, 0xb3,
- 0x60, 0x8c, 0x40, 0x4a,
- 0x65, 0xc0, 0x02, 0x60,
- 0x00, 0x60, 0xc0, 0xb3,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x08, 0xc0, 0xad,
- 0x91, 0x11, 0x04, 0x84,
- 0xef, 0xc0, 0x6e, 0x68,
- 0x6a, 0x05, 0x4c, 0x01,
- 0xa3, 0x7b, 0x40, 0x2d,
- 0x03, 0x89, 0x0c, 0x85,
- 0x4c, 0x85, 0x80, 0x0b,
- 0xc0, 0x0b, 0x66, 0x7d,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x48, 0xf6,
- 0x40, 0x41, 0x82, 0x31,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x66, 0x71, 0x00, 0x45,
- 0xa1, 0x4b, 0xc0, 0x0b,
- 0x06, 0x71, 0x00, 0x45,
- 0x46, 0x3a, 0xc0, 0x0b,
- 0x40, 0x35, 0xc0, 0x12,
- 0xc0, 0x0b, 0x66, 0x69,
- 0x66, 0x69, 0x00, 0x35,
- 0x00, 0x45, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x6d,
- 0xe1, 0x92, 0x46, 0x3a,
- 0x66, 0x69, 0x40, 0x35,
- 0x40, 0x21, 0xc0, 0x0b,
- 0xc0, 0x2d, 0x69, 0xd1,
- 0x69, 0xd5, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x2d,
- 0x60, 0x08, 0x43, 0x06,
- 0x40, 0x11, 0x89, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x6a, 0x71, 0x40, 0x21,
- 0x00, 0x19, 0xc0, 0x2d,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x40, 0x15, 0xd6, 0x17,
- 0xc0, 0x0b, 0x66, 0x91,
- 0x6d, 0x51, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x06,
- 0xc0, 0x0b, 0x66, 0x95,
- 0x69, 0xd1, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x2d,
- 0x03, 0x11, 0x84, 0xd5,
- 0x40, 0x11, 0x81, 0x21,
- 0xc0, 0x2d, 0x6a, 0x75,
- 0x65, 0xf5, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0x99,
- 0x65, 0xf9, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x0b, 0x66, 0xa1,
- 0x66, 0xb1, 0x40, 0x25,
- 0xdd, 0x93, 0xc0, 0x0b,
- 0x68, 0x15, 0x00, 0x19,
- 0x81, 0x21, 0x40, 0x2d,
- 0x6a, 0x75, 0x40, 0x11,
- 0x00, 0x15, 0xc0, 0x2d,
- 0xc0, 0x0b, 0x65, 0xfd,
- 0x66, 0x99, 0x40, 0x15,
- 0x02, 0x00, 0x40, 0x0b,
- 0xc0, 0xb6, 0x66, 0xc1,
- 0x68, 0x15, 0x00, 0x39,
- 0x87, 0x2d, 0xc0, 0x2d,
- 0x9a, 0x00, 0x5c, 0x08,
- 0x78, 0xa8, 0x02, 0x35,
- 0x02, 0x45, 0x82, 0x21,
- 0x00, 0x55, 0xf8, 0x98,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x42, 0x45, 0x86, 0x43,
- 0x02, 0x35, 0xf8, 0x10,
- 0xc2, 0x37, 0xf8, 0x10,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x66, 0x69,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xf8, 0x10, 0x42, 0x35,
- 0xf8, 0x10, 0x02, 0x35,
- 0x42, 0x35, 0xc3, 0x37,
- 0x02, 0x35, 0xf8, 0x10,
- 0x02, 0x45, 0xf8, 0x88,
- 0x00, 0x55, 0xf8, 0x78,
- 0xc0, 0x0b, 0x66, 0x69,
- 0xe6, 0x92, 0x48, 0x5a,
- 0x84, 0x4e, 0x86, 0x43,
- 0xc2, 0x37, 0x84, 0x34,
- 0x84, 0x34, 0x84, 0x3e,
- 0x69, 0xd5, 0x00, 0x49,
- 0xc2, 0x47, 0xc0, 0x2d,
- 0x08, 0x4b, 0x80, 0x43,
- 0xc0, 0x14, 0x65, 0x51,
- 0xe0, 0x92, 0x46, 0x3a,
- 0x84, 0x34, 0x84, 0x3e,
- 0xc5, 0x3e, 0x83, 0x37,
- 0xc1, 0xc3, 0xf7, 0x85,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x69, 0x45,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x22, 0x65, 0x49,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x66, 0x7d, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x6a, 0x05, 0x00, 0x19,
- 0x40, 0x11, 0xc0, 0x2d,
- 0xc0, 0x1b, 0x65, 0x69,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x28, 0x02, 0x25,
- 0xe0, 0x2c, 0x02, 0x15,
- 0x69, 0x5d, 0x40, 0x25,
- 0x45, 0xf6, 0x40, 0x08,
- 0x40, 0x15, 0xe0, 0x2c,
- 0xc0, 0x08, 0x69, 0x61,
- 0x62, 0xc9, 0x40, 0x23,
- 0xdd, 0x93, 0xc0, 0x11,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x80, 0x8b, 0x04, 0x6b,
- 0x60, 0x88, 0x00, 0x64,
- 0x52, 0x82, 0x82, 0x7b,
- 0x43, 0x36, 0x70, 0x80,
- 0x50, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x66, 0x81, 0x00, 0x90,
- 0x02, 0x70, 0xc0, 0x6d,
- 0x89, 0x21, 0x64, 0xa0,
- 0x68, 0x10, 0x64, 0x88,
- 0x00, 0x90, 0x81, 0x31,
- 0x40, 0x6d, 0x67, 0x81,
- 0xe4, 0xb0, 0x02, 0x70,
- 0x81, 0x31, 0x09, 0x21,
- 0xe8, 0x10, 0x63, 0xe8,
- 0x60, 0x18, 0x41, 0x06,
- 0xe4, 0xc0, 0x02, 0x70,
- 0x66, 0x82, 0x40, 0x6a,
- 0xe0, 0x24, 0x04, 0x06,
- 0x80, 0x83, 0x85, 0x31,
- 0x65, 0x01, 0x00, 0x80,
- 0x0c, 0x0c, 0xc0, 0x6e,
- 0x22, 0xd8, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6c, 0xfd, 0x0e, 0x39,
- 0x43, 0xf6, 0x40, 0x2c,
- 0x6e, 0xb8, 0xe0, 0x0c,
- 0x85, 0x21, 0x6f, 0xfc,
- 0x6f, 0xfc, 0x70, 0xc8,
- 0x67, 0xf8, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xa6,
- 0x65, 0xe0, 0x02, 0x70,
- 0x4e, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x70, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x60,
- 0x62, 0x18, 0x8c, 0x3b,
- 0x00, 0x8b, 0xef, 0x94,
- 0xe0, 0x08, 0x41, 0x26,
- 0x6c, 0x1d, 0x4e, 0x01,
- 0x00, 0x70, 0x40, 0x2b,
- 0xc0, 0x89, 0x65, 0xa1,
- 0x64, 0xc0, 0x02, 0x60,
- 0xe0, 0x24, 0x04, 0x06,
- 0x68, 0x10, 0x5f, 0x88,
- 0x90, 0x0b, 0x85, 0x31,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x86, 0x6b, 0x00, 0x8b,
- 0x70, 0x88, 0x52, 0x82,
- 0x12, 0x19, 0x82, 0x7b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x39, 0x83, 0x21,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0xef, 0xfc, 0x6a, 0xc8,
- 0x6f, 0xfc, 0x6c, 0xe8,
- 0x12, 0x19, 0x90, 0x0b,
- 0x40, 0x1b, 0x68, 0x81,
- 0x65, 0xd8, 0x90, 0x0b,
- 0x8c, 0x2b, 0x6f, 0xfc,
- 0x60, 0x08, 0x40, 0xb6,
- 0x65, 0xe0, 0x02, 0x80,
- 0x50, 0x01, 0xc0, 0xb6,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x4c, 0x41, 0x46,
- 0x04, 0x80, 0x00, 0x04,
- 0xc0, 0xb6, 0x66, 0x41,
- 0x64, 0xa0, 0x08, 0x70,
- 0x5d, 0xf8, 0x8e, 0x3b,
- 0x12, 0x29, 0xef, 0x94,
- 0x40, 0x1b, 0x68, 0x81,
- 0x10, 0x0b, 0x80, 0x6b,
- 0x76, 0x18, 0x8e, 0x1b,
- 0x8c, 0x0b, 0xef, 0xfc,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x03, 0x06,
- 0x05, 0x46, 0x00, 0x04,
- 0x07, 0x86, 0xe1, 0x30,
- 0x09, 0xc6, 0x61, 0x30,
- 0x4a, 0x06, 0xe1, 0x30,
- 0x58, 0x46, 0x61, 0x30,
- 0x80, 0x04, 0xe1, 0x30,
- 0x84, 0x14, 0x84, 0x14,
- 0x00, 0x13, 0x88, 0x24,
- 0xe1, 0x30, 0x40, 0x86,
- 0x8c, 0x34, 0x88, 0x24,
- 0x8c, 0x34, 0x84, 0x13,
- 0x86, 0x13, 0x90, 0x44,
- 0x94, 0x54, 0x90, 0x44,
- 0x94, 0x54, 0x88, 0x13,
- 0x8a, 0x13, 0xb0, 0xc4,
- 0x80, 0x04, 0xb0, 0xc4,
- 0x80, 0x04, 0x98, 0x13,
- 0x82, 0x03, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe1, 0x24, 0x45, 0x46,
- 0x6e, 0x09, 0x0c, 0x15,
- 0x80, 0x08, 0xc0, 0x09,
- 0xc5, 0x07, 0x88, 0x24,
- 0x44, 0x00, 0x08, 0x34,
- 0x4d, 0xb8, 0xf0, 0x0c,
- 0x8c, 0x0b, 0x68, 0x20,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0x81, 0x21, 0x40, 0x2c,
- 0x64, 0xb5, 0x4c, 0x05,
- 0x4c, 0x21, 0xc0, 0x05,
- 0xc0, 0x15, 0x62, 0xe1,
- 0x62, 0xe9, 0x4c, 0x21,
- 0x4c, 0x11, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0xed,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x5d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x65, 0x7d, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x08, 0x69, 0x45,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4e, 0x68,
- 0x65, 0x49, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x28,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x14, 0x80, 0x04,
- 0x4c, 0x05, 0x82, 0x01,
- 0xc0, 0x06, 0x6d, 0x4d,
- 0x91, 0x11, 0x04, 0x08,
- 0xef, 0xc0, 0x4c, 0xe8,
- 0x6d, 0x01, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x5d, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x1b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0xc6, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x34,
- 0x80, 0x04, 0x8b, 0x31,
- 0x65, 0x49, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x22,
- 0xc0, 0x22, 0x65, 0x59,
- 0x69, 0x5d, 0x4c, 0x05,
- 0x59, 0xf8, 0xc0, 0x08,
- 0x4c, 0x05, 0xef, 0xc0,
- 0x40, 0x08, 0x69, 0x61,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x65, 0x91, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x22,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x68, 0x20, 0x6d, 0xc8,
- 0x42, 0x78, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x81, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x6d,
- 0xc0, 0x20, 0x63, 0x41,
- 0x60, 0x04, 0x04, 0x06,
- 0x4f, 0x18, 0x81, 0x31,
- 0x0e, 0x60, 0xe8, 0x10,
- 0x40, 0x6d, 0x67, 0x81,
- 0x81, 0xf5, 0xa1, 0x81,
- 0x78, 0x40, 0x0e, 0x05,
- 0x0c, 0x29, 0x8b, 0x31,
- 0xc0, 0x1b, 0x65, 0x69,
- 0x65, 0x79, 0x0c, 0x19,
- 0x57, 0x18, 0xc0, 0x1b,
- 0x5d, 0x0e, 0xef, 0xc0,
- 0xec, 0x04, 0x10, 0x80,
- 0xfc, 0x35, 0xa1, 0x8b,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x45, 0xb8, 0xe0, 0x04,
- 0x0e, 0x60, 0xe8, 0x20,
- 0x40, 0x6e, 0x64, 0x81,
- 0x01, 0x95, 0xa1, 0x81,
- 0x5d, 0x18, 0x8c, 0x9b,
- 0x5e, 0x78, 0x8c, 0x0b,
- 0x65, 0x0e, 0xef, 0xd4,
- 0xec, 0x04, 0x10, 0x80,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x65, 0x81, 0x00, 0x60,
- 0x04, 0x06, 0x40, 0x6d,
- 0x01, 0x31, 0xe0, 0x04,
- 0x0c, 0x0c, 0x8c, 0x1b,
- 0x0b, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0xa1, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x89,
- 0xc0, 0x20, 0x63, 0x1d,
- 0x60, 0x24, 0x04, 0x06,
- 0x0a, 0xb8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0x65, 0x01, 0x00, 0x00,
- 0x02, 0x06, 0x40, 0x6e,
- 0xc0, 0x20, 0x61, 0x01,
- 0x62, 0x40, 0x04, 0x06,
- 0x09, 0xf8, 0x87, 0x31,
- 0xc1, 0xc3, 0xe0, 0x10,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0x6d, 0x91, 0x1e, 0xf0,
- 0x00, 0x6b, 0xc0, 0x04,
- 0xe1, 0x30, 0x41, 0x46,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x42, 0xc6, 0x40, 0x22,
- 0x0c, 0x39, 0xe1, 0x30,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x4c, 0x41, 0x85, 0x41,
- 0x40, 0x22, 0x6c, 0x69,
- 0x00, 0x04, 0x81, 0x71,
- 0x4c, 0x21, 0x82, 0x21,
- 0x40, 0x22, 0x6c, 0x6d,
- 0x4c, 0x31, 0x82, 0x31,
- 0x40, 0x22, 0x6f, 0xbd,
- 0x64, 0xd1, 0x04, 0xf0,
- 0x04, 0x14, 0xc0, 0x02,
- 0xe4, 0x10, 0x06, 0xf0,
- 0x95, 0x51, 0x1d, 0x41,
- 0x81, 0x81, 0x01, 0xc1,
- 0x12, 0xc4, 0x83, 0x65,
- 0x82, 0xc1, 0x7a, 0x80,
- 0xe1, 0x12, 0x52, 0x9a,
- 0x66, 0x96, 0x54, 0x9a,
- 0x12, 0x0c, 0xbb, 0x9b,
- 0x10, 0xa3, 0xe2, 0x00,
- 0x14, 0xa4, 0x92, 0x83,
- 0xc4, 0xa7, 0xfa, 0x80,
- 0xfc, 0x28, 0x00, 0xb5,
- 0x02, 0xa5, 0xc9, 0xbe,
- 0xcd, 0xae, 0xfc, 0x28,
- 0xe2, 0x30, 0x18, 0x0a,
- 0x00, 0x60, 0xfa, 0x35,
- 0x40, 0x90, 0x65, 0x81,
- 0x64, 0xd1, 0x02, 0xf0,
- 0x45, 0x06, 0xc0, 0x02,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x45, 0x28,
- 0x66, 0x41, 0x00, 0x60,
- 0x02, 0xf0, 0x40, 0x92,
- 0x45, 0x06, 0xe4, 0x10,
- 0x81, 0x31, 0x60, 0x20,
- 0xe8, 0x10, 0x44, 0x88,
- 0x61, 0x30, 0x00, 0xc6,
- 0xe1, 0x30, 0x02, 0x46,
- 0x04, 0xc6, 0x00, 0x04,
- 0x04, 0x14, 0xe1, 0x38,
- 0x66, 0x31, 0x06, 0x60,
- 0x08, 0x24, 0xc0, 0x8b,
- 0x83, 0x65, 0x81, 0x41,
- 0x70, 0x0c, 0x4a, 0x40,
- 0x18, 0x54, 0x82, 0x41,
- 0xa7, 0x5b, 0x60, 0x84,
- 0x62, 0x00, 0x0a, 0x0c,
- 0x18, 0xc4, 0x8e, 0xc3,
- 0x8a, 0x73, 0x7a, 0x80,
- 0xc4, 0xc7, 0x08, 0xce,
- 0xfc, 0x30, 0x00, 0x65,
- 0xf8, 0x20, 0x46, 0x65,
- 0xfc, 0x30, 0x02, 0xc5,
- 0xb1, 0x4b, 0xcd, 0xce,
- 0x1e, 0xf0, 0xfa, 0x55,
- 0xc0, 0x04, 0x65, 0x91,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6c, 0xad, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0xe1, 0x18, 0x42, 0x06,
- 0x84, 0x18, 0x84, 0x14,
- 0x6f, 0xfd, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0x21,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x85, 0x00, 0x15,
- 0x40, 0x15, 0xc0, 0x0b,
- 0xc0, 0x08, 0x6b, 0xf5,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x8b,
- 0x6f, 0xe8, 0x72, 0x88,
- 0x81, 0x61, 0x81, 0x11,
- 0x00, 0x06, 0x00, 0x7b,
- 0x00, 0x04, 0xe1, 0x10,
- 0xe0, 0x04, 0x43, 0x16,
- 0x6c, 0x1d, 0x50, 0x11,
- 0x83, 0x91, 0x40, 0x2b,
- 0x00, 0x46, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x08,
- 0xc2, 0x19, 0x80, 0x18,
- 0x7c, 0x98, 0x80, 0x16,
- 0x7c, 0xf8, 0xef, 0xf8,
- 0x90, 0x0b, 0x6f, 0xf8,
- 0x82, 0xe5, 0xa1, 0x0b,
- 0x6c, 0x1d, 0x10, 0x29,
- 0x0c, 0x86, 0x40, 0x2b,
- 0x02, 0x86, 0xe0, 0x08,
- 0x90, 0x0b, 0x60, 0x08,
- 0xef, 0xd4, 0x67, 0xa8,
- 0x0b, 0x45, 0xa3, 0x0b,
- 0xc0, 0x00, 0x0c, 0x06,
- 0xef, 0xd8, 0x6e, 0x88,
- 0x6f, 0xf8, 0x74, 0x08,
- 0x45, 0x58, 0x90, 0x0b,
- 0x90, 0x0b, 0x68, 0x00,
- 0x61, 0x14, 0x41, 0x06,
- 0xe0, 0x04, 0x45, 0x66,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe1, 0x04, 0x40, 0x86,
- 0x43, 0x56, 0x00, 0x04,
- 0x00, 0x96, 0xe0, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x50, 0x11, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x96,
- 0x80, 0x04, 0xe1, 0x18,
- 0x01, 0x06, 0x00, 0x96,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x5d,
- 0x50, 0x21, 0x80, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0xc6, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x0c,
- 0xc0, 0x2c, 0x6e, 0x65,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x40, 0x86,
- 0x6e, 0x61, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x40, 0x46, 0x00, 0x16,
- 0x10, 0x19, 0xe1, 0x08,
- 0xc0, 0x2c, 0x6e, 0x69,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x44, 0x41, 0x86,
- 0x6e, 0x59, 0x10, 0x19,
- 0x80, 0x04, 0xc0, 0x2c,
- 0x41, 0x76, 0x00, 0x16,
- 0x50, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xfc, 0x41, 0xf6,
- 0x68, 0x00, 0x49, 0x08,
- 0x03, 0x11, 0x81, 0x11,
- 0x6a, 0x58, 0x8e, 0x0b,
- 0x8c, 0x0b, 0xef, 0xe8,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x81, 0x00, 0x29,
- 0x03, 0x46, 0x40, 0x2c,
- 0x84, 0x14, 0xe1, 0x10,
- 0x03, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x85,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x42, 0xc6,
- 0x6e, 0x89, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x42, 0x06, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0x51,
- 0x04, 0x26, 0x84, 0x14,
- 0xe1, 0x10, 0x05, 0xc6,
- 0x6b, 0xad, 0x00, 0x19,
- 0x88, 0x24, 0xc0, 0x2b,
- 0xf0, 0xfc, 0x42, 0x10,
- 0x43, 0xc6, 0x08, 0x16,
- 0x00, 0x29, 0xe1, 0x10,
- 0xc0, 0x2c, 0x6e, 0xa1,
- 0x84, 0x26, 0x84, 0x14,
- 0x63, 0x15, 0x00, 0x19,
- 0xa5, 0x1b, 0xc0, 0x38,
- 0x0e, 0xa5, 0x00, 0x29,
- 0x02, 0x46, 0x40, 0x2c,
- 0x02, 0x15, 0xc1, 0x14,
- 0x04, 0x16, 0xc0, 0x00,
- 0x43, 0x06, 0x80, 0x00,
- 0x02, 0x15, 0x81, 0x10,
- 0x04, 0x26, 0x80, 0x00,
- 0xe1, 0x14, 0x02, 0x06,
- 0x6e, 0x55, 0x00, 0x29,
- 0x84, 0x14, 0xc0, 0x2c,
- 0x02, 0x86, 0x04, 0x26,
- 0x00, 0x29, 0xe1, 0x14,
- 0xc0, 0x2c, 0x6e, 0x8d,
- 0x84, 0x26, 0x84, 0x14,
- 0x6e, 0xa9, 0x00, 0x19,
- 0x21, 0x1b, 0xc0, 0x2c,
- 0xe1, 0x10, 0x43, 0x86,
- 0x84, 0x25, 0x84, 0x24,
- 0x08, 0x16, 0x81, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x03, 0x06, 0x84, 0xe5,
- 0x83, 0x21, 0x61, 0x10,
- 0x83, 0x75, 0x84, 0x14,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x10, 0x45, 0x46,
- 0x88, 0x16, 0x88, 0x24,
- 0x63, 0x15, 0x00, 0x29,
- 0xa5, 0x2b, 0xc0, 0x38,
- 0x41, 0x10, 0x03, 0x06,
- 0xc0, 0x00, 0x04, 0x06,
- 0xc0, 0x00, 0x02, 0x15,
- 0x05, 0x06, 0x80, 0xd5,
- 0x88, 0x24, 0xe1, 0x14,
- 0x81, 0x25, 0x88, 0x16,
- 0x00, 0x09, 0x84, 0x26,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xe1, 0x10, 0x02, 0x46,
- 0x84, 0x06, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x1c, 0x04, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x05, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x44, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x1c, 0x45, 0xc6,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x06,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x46,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x20, 0x04, 0x86,
- 0x08, 0x16, 0x88, 0x24,
- 0xe1, 0x14, 0x43, 0x86,
- 0x84, 0x0c, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x24, 0x01, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x14, 0xe1, 0x18,
- 0xe0, 0x08, 0x04, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x21,
- 0x81, 0x21, 0x40, 0x2b,
- 0x11, 0xc6, 0x03, 0x71,
- 0x04, 0x26, 0xe1, 0x24,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x04, 0x26, 0x84, 0x14,
- 0x80, 0x04, 0x85, 0x11,
- 0xa0, 0x04, 0x80, 0x76,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x18, 0x52, 0x48,
- 0x02, 0x76, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x0c, 0x80, 0x76,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x04, 0x3b,
- 0x86, 0x1b, 0x01, 0x21,
- 0x68, 0x18, 0x6c, 0x48,
- 0x00, 0x06, 0x81, 0x61,
- 0x43, 0x46, 0x61, 0x28,
- 0x00, 0x04, 0xe1, 0x2c,
- 0xe1, 0x44, 0x04, 0xc6,
- 0x81, 0x31, 0x04, 0x14,
- 0x80, 0xc8, 0x88, 0x24,
- 0x84, 0x48, 0x84, 0x58,
- 0x50, 0x0a, 0x88, 0x88,
- 0x04, 0x05, 0xe0, 0x8c,
- 0x80, 0x08, 0x0d, 0x56,
- 0xc7, 0x57, 0x45, 0xc7,
- 0xc4, 0x47, 0x02, 0xc9,
- 0xa6, 0xcf, 0x04, 0x59,
- 0xaa, 0xcf, 0x08, 0x49,
- 0x46, 0xc2, 0xa8, 0xcf,
- 0x87, 0x7b, 0xf8, 0x1c,
- 0x70, 0xf8, 0xfa, 0x75,
- 0x8c, 0x0b, 0xe8, 0x18,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x02, 0x86, 0x02, 0x2b,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xf9, 0x95, 0x8f, 0x11,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x00, 0x46, 0x00, 0x7b,
- 0x4e, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x79, 0x98, 0x82, 0x6b,
- 0x8e, 0x0b, 0x6f, 0xfc,
- 0x60, 0x08, 0x00, 0x86,
- 0x4e, 0x01, 0x8f, 0x11,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x2b, 0x8e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0x25,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x61, 0x38, 0x11, 0x46,
- 0x20, 0x04, 0x80, 0x6b,
- 0x70, 0x01, 0x02, 0x56,
- 0x0e, 0x86, 0xf7, 0xab,
- 0x12, 0x46, 0x61, 0x3c,
- 0x03, 0x21, 0xe1, 0x14,
- 0x80, 0x1e, 0x8b, 0xa1,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xf4, 0x42, 0x10,
- 0x89, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x66, 0x18, 0x8b, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x14, 0x16, 0xc6,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x0a,
- 0xa6, 0x05, 0x99, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa3, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0xa4, 0x65,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9b, 0x01, 0x60, 0x84,
- 0xa5, 0x1b, 0xa2, 0x65,
- 0x0b, 0x11, 0xa2, 0x25,
- 0x64, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x9e, 0x85, 0x9f, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa7, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x9c, 0xe5,
- 0x83, 0x21, 0x8b, 0x11,
- 0x8c, 0x0b, 0x00, 0xa6,
- 0xe8, 0x18, 0x63, 0x08,
- 0x80, 0x08, 0xac, 0x04,
- 0x60, 0x80, 0x40, 0x4a,
- 0x9a, 0x45, 0xa1, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xa9, 0x1b, 0xc0, 0x0b,
- 0x01, 0xc6, 0x98, 0xa5,
- 0x80, 0x04, 0xe1, 0x00,
- 0x40, 0x0a, 0x80, 0x08,
- 0xa3, 0x01, 0x60, 0x84,
- 0x2b, 0x1b, 0x96, 0xa5,
- 0xe1, 0x00, 0x15, 0xc6,
- 0x0b, 0x11, 0x96, 0x25,
- 0x61, 0x58, 0x83, 0x21,
- 0x8c, 0x0b, 0x68, 0x18,
- 0xe1, 0x10, 0x40, 0x46,
- 0x80, 0x08, 0x80, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x92, 0x85, 0xa5, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xaf, 0x1b, 0xc0, 0x0b,
- 0x24, 0x04, 0x90, 0xe5,
- 0x83, 0x21, 0x85, 0x11,
- 0x8b, 0x11, 0x00, 0x16,
- 0x68, 0x18, 0x60, 0x08,
- 0xac, 0x04, 0x8c, 0x0b,
- 0x40, 0x4a, 0x80, 0x08,
- 0xa7, 0x01, 0x60, 0x80,
- 0x0c, 0x15, 0x8e, 0x25,
- 0x40, 0x0b, 0x6f, 0xa9,
- 0xe1, 0x10, 0x44, 0x46,
- 0x8c, 0x45, 0xb1, 0x1b,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x84, 0x40, 0x0a,
- 0x8a, 0x85, 0xa9, 0x01,
- 0x8a, 0x45, 0xb3, 0x1b,
- 0x61, 0x00, 0x41, 0x06,
- 0x80, 0x04, 0x85, 0x11,
- 0x88, 0x04, 0x80, 0x16,
- 0x40, 0x4a, 0x80, 0x08,
- 0x9d, 0x01, 0x60, 0x90,
- 0x0c, 0x15, 0x86, 0xe5,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x86, 0x45, 0xad, 0x1b,
- 0x81, 0xb1, 0x24, 0x04,
- 0x83, 0x21, 0x0b, 0x11,
- 0xe1, 0x10, 0x54, 0x46,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x10,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xe8, 0x18, 0x5c, 0xc8,
- 0x80, 0x08, 0xa8, 0x04,
- 0x60, 0x90, 0x40, 0x4a,
- 0x80, 0xc5, 0x97, 0x01,
- 0x6f, 0xa9, 0x0c, 0x15,
- 0xb5, 0x1b, 0xc0, 0x0b,
- 0x20, 0x14, 0x82, 0x95,
- 0x70, 0x01, 0x04, 0x76,
- 0x06, 0x04, 0xf7, 0xab,
- 0x80, 0xbb, 0x7a, 0x80,
- 0x4c, 0x35, 0x84, 0x2e,
- 0xc0, 0x0b, 0x6f, 0xa9,
- 0x61, 0x10, 0x41, 0x06,
- 0x00, 0x04, 0x83, 0x11,
- 0x00, 0x16, 0x83, 0x21,
- 0xe1, 0x00, 0x41, 0x06,
- 0x81, 0x11, 0x00, 0x04,
- 0x91, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xa4, 0x04,
- 0x5a, 0x58, 0x8d, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x02, 0x66, 0x20, 0x04,
- 0xf7, 0xab, 0x70, 0x01,
- 0x9c, 0x04, 0x80, 0x1e,
- 0xc4, 0x19, 0x80, 0x18,
- 0x9c, 0x14, 0x80, 0x16,
- 0x44, 0x00, 0x84, 0x08,
- 0x00, 0xb4, 0x7c, 0x40,
- 0x84, 0x26, 0xfa, 0x80,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x61, 0x38, 0x53, 0x06,
- 0x24, 0x04, 0x80, 0x6b,
- 0xe0, 0x04, 0x02, 0x06,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x54, 0xc6, 0x40, 0x2b,
- 0x51, 0x06, 0xe1, 0x38,
- 0x80, 0x18, 0xe1, 0x34,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xa8, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0xe0, 0x04, 0x02, 0x16,
- 0x4c, 0x11, 0xa0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x18, 0x7b, 0x68,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x0a, 0x82, 0x45,
- 0x82, 0xe5, 0xe0, 0x88,
- 0x6d, 0x21, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0x25, 0xe0, 0x88,
- 0x61, 0x38, 0x00, 0x46,
- 0x80, 0x04, 0x89, 0x11,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf8, 0x1c, 0x00, 0x4a,
- 0x01, 0x75, 0x80, 0x95,
- 0xe9, 0x9c, 0x4e, 0x0a,
- 0x6d, 0x11, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x0e, 0x1a,
- 0x20, 0x01, 0x02, 0x58,
- 0x40, 0x0a, 0xc0, 0x00,
- 0x40, 0x0a, 0xe9, 0x9c,
- 0x86, 0xc5, 0xe9, 0x9c,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x0c, 0x09, 0x88, 0x65,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x86, 0xd5, 0xa1, 0x0b,
- 0x02, 0x26, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe1, 0x10, 0x16, 0x46,
- 0xa3, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x64, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6e, 0x9d,
- 0xac, 0x14, 0x80, 0x7b,
- 0xa1, 0x7b, 0x84, 0x06,
- 0x00, 0x06, 0x80, 0xe5,
- 0x87, 0x11, 0x61, 0x38,
- 0x80, 0x1c, 0x80, 0x04,
- 0x40, 0x46, 0x9b, 0x95,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x04, 0x87, 0x11,
- 0x0c, 0x09, 0x80, 0x1c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8e, 0x75,
- 0xc0, 0x2c, 0x6d, 0x11,
- 0x28, 0xc5, 0xa1, 0x0b,
- 0x80, 0x00, 0x0e, 0x06,
- 0x02, 0x66, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xa1, 0x21, 0xa1, 0xb1,
- 0x00, 0x60, 0x00, 0x16,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x41, 0x38, 0xe4, 0x10,
- 0xec, 0x04, 0x04, 0x20,
- 0xa1, 0x2b, 0xc5, 0x36,
- 0x65, 0x38, 0xfe, 0x75,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x43, 0x28,
- 0x00, 0x60, 0x00, 0x7b,
- 0xc0, 0x6e, 0x64, 0x81,
- 0x02, 0xf0, 0x01, 0x75,
- 0x45, 0x28, 0xe4, 0x10,
- 0xec, 0x04, 0x16, 0xb0,
- 0xa1, 0xbb, 0xc1, 0x26,
- 0x0c, 0x09, 0xfe, 0x75,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x9c, 0xd5, 0xa5, 0x0b,
- 0x68, 0x00, 0x74, 0x48,
- 0x0f, 0x25, 0x8c, 0x0b,
- 0x20, 0x04, 0x80, 0x7b,
- 0xe0, 0x04, 0x02, 0x46,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x85, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x28,
- 0x80, 0x7b, 0x8c, 0x1b,
- 0x8c, 0x05, 0xa1, 0x7b,
- 0x61, 0x38, 0x00, 0x06,
- 0x80, 0x14, 0x89, 0x21,
- 0x03, 0x36, 0x04, 0x2c,
- 0x00, 0x04, 0xe0, 0x08,
- 0x4c, 0x11, 0x8b, 0x21,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8b, 0x05, 0x80, 0x2c,
- 0x02, 0x36, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x00, 0x46, 0x00, 0x16,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0x16, 0x83, 0x11,
- 0x44, 0x58, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x1c,
- 0x40, 0x2d, 0x67, 0xc9,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x70, 0x98, 0x80, 0xb5,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x00, 0x06, 0x80, 0x7b,
- 0xa1, 0x7b, 0x61, 0x38,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x15, 0x80, 0x1c,
- 0x6b, 0x18, 0xef, 0x95,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x82, 0x75, 0xe0, 0x80,
- 0x6f, 0xf8, 0x75, 0xa8,
- 0x6b, 0x58, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6e, 0x88,
- 0x81, 0x85, 0x8c, 0x0b,
- 0x6f, 0xf8, 0x57, 0xc8,
- 0x0c, 0x0b, 0x8c, 0x0b,
- 0x59, 0x38, 0x8c, 0x1b,
- 0x16, 0x06, 0xef, 0xf8,
- 0x89, 0x11, 0x61, 0x38,
- 0x00, 0x1c, 0xac, 0x04,
- 0xe0, 0x08, 0x01, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xef, 0xf0, 0x52, 0x48,
- 0x80, 0x7b, 0x2c, 0x04,
- 0x8b, 0x11, 0x21, 0x7b,
- 0x11, 0xe8, 0x80, 0x1c,
- 0x28, 0x04, 0x80, 0x00,
- 0x80, 0x18, 0xa1, 0x7b,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0x80, 0x16, 0xc2, 0x19,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x92, 0xc5, 0x80, 0x16,
- 0xa1, 0x7b, 0x24, 0x04,
- 0xc2, 0x19, 0x80, 0x18,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xf8,
- 0x80, 0x18, 0xa8, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x8a, 0x95, 0x80, 0x16,
- 0x6f, 0xf8, 0x63, 0xc8,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0xb6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0xef, 0xfc, 0x51, 0xe8,
- 0x61, 0x3c, 0x10, 0x86,
- 0x20, 0x04, 0x83, 0x91,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xf8,
- 0x40, 0x18, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x18,
- 0x61, 0x10, 0x41, 0x46,
- 0x80, 0x14, 0x81, 0x21,
- 0x80, 0x04, 0x84, 0x26,
- 0xa0, 0x04, 0x80, 0x96,
- 0xe0, 0x19, 0x80, 0x18,
- 0x00, 0x06, 0x80, 0x16,
- 0x42, 0xe6, 0x61, 0x38,
- 0x00, 0x04, 0xe0, 0x00,
- 0x00, 0x1c, 0xa8, 0xf1,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0xf1, 0xfc, 0x42, 0x10,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0x0c, 0x09, 0xdd, 0x93,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x88, 0x40, 0x0a,
- 0x0c, 0x19, 0x8c, 0x25,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x20, 0x04, 0x8a, 0x65,
- 0xe0, 0x04, 0x02, 0x76,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0xe1, 0x38, 0x00, 0x46,
- 0x87, 0x11, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x7b, 0xa8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x81, 0x71, 0x40, 0x2d,
- 0x80, 0xb5, 0xa7, 0x0b,
- 0x68, 0x00, 0x65, 0x28,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x6f, 0xfc, 0x4c, 0x68,
- 0x77, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe0, 0x35, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x86, 0x45, 0xe0, 0x8c,
- 0x02, 0x86, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xe8, 0x00, 0x79, 0xc8,
- 0x67, 0xc9, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2d,
- 0x80, 0xb5, 0xa9, 0x0b,
- 0x68, 0x00, 0x62, 0xa8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xd8, 0xb5, 0xa1, 0x7b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x90,
- 0x6f, 0xd4, 0x6f, 0x48,
- 0x20, 0x04, 0x8c, 0x0b,
- 0xe0, 0x04, 0x02, 0x96,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x00, 0x16, 0xc0, 0x2b,
- 0x7b, 0xf8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xc4,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x60, 0x88, 0x40, 0x0a,
- 0xd2, 0x65, 0x81, 0x71,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0xd0, 0xa5, 0xe0, 0x88,
- 0x02, 0xa6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x04,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x80, 0x16,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x70, 0xf8, 0x84, 0x25,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x70, 0x48,
- 0x6f, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x6f, 0x68,
- 0x79, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x4d, 0xd8, 0x83, 0x35,
- 0x8c, 0x0b, 0x68, 0x1c,
- 0x6f, 0xf8, 0x62, 0x88,
- 0x01, 0x95, 0x8c, 0x0b,
- 0x01, 0x31, 0x81, 0x01,
- 0x0c, 0x1b, 0x8c, 0x0b,
- 0x50, 0x58, 0x8e, 0x2b,
- 0x82, 0x71, 0xef, 0xf8,
- 0xe0, 0x40, 0x0e, 0x0a,
- 0x21, 0x0b, 0xfc, 0xf5,
- 0x31, 0x38, 0x80, 0x7b,
- 0x7c, 0x38, 0xdf, 0xfc,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x81, 0x71, 0x40, 0x16,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x9f, 0xfc, 0x30, 0x88,
- 0x6f, 0xf8, 0x58, 0x28,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x62, 0xf8, 0x8e, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x6f, 0xf8, 0x59, 0x68,
- 0x5c, 0xf8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x0c, 0x09, 0x87, 0x65,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x15, 0xa3, 0x0b,
- 0x68, 0x00, 0x5a, 0xe8,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x2d, 0xa8, 0xa1, 0x7b,
- 0x20, 0x04, 0xdf, 0xfc,
- 0xe0, 0x04, 0x02, 0x56,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x16, 0xc0, 0x2b,
- 0x6c, 0x81, 0x0c, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xc5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xff, 0xfc, 0x21, 0x58,
- 0x40, 0xc6, 0xa1, 0x0b,
- 0x02, 0x06, 0x01, 0x04,
- 0x00, 0x05, 0x80, 0x00,
- 0x40, 0x11, 0x80, 0x00,
- 0x20, 0xa8, 0x80, 0x00,
- 0x42, 0x18, 0xff, 0xfc,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x43, 0xb6, 0x20, 0x04,
- 0x4c, 0x11, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x83, 0x11, 0x00, 0x16,
- 0x68, 0x00, 0x7b, 0x48,
- 0x57, 0x35, 0x8c, 0x0b,
- 0xc1, 0xc3, 0x80, 0x7b,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x04, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xe1, 0x3c,
- 0xc0, 0x38, 0x63, 0x15,
- 0x0c, 0x19, 0xa5, 0x0b,
- 0x40, 0x2c, 0x0e, 0x99,
- 0xc1, 0x14, 0x01, 0x06,
- 0xc0, 0x00, 0x00, 0x05,
- 0x80, 0x00, 0x02, 0x06,
- 0x81, 0x10, 0x01, 0x06,
- 0x80, 0x00, 0x00, 0x05,
- 0x41, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x14,
- 0xe0, 0x19, 0x80, 0x18,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xdc,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x10,
- 0xc2, 0x19, 0x80, 0x18,
- 0x8c, 0x0b, 0x00, 0x16,
- 0xef, 0xe4, 0x5a, 0x48,
- 0x81, 0x01, 0x3e, 0x0e,
- 0x50, 0x86, 0x3c, 0x0e,
- 0x03, 0x91, 0xe1, 0x24,
- 0xe1, 0x24, 0x4e, 0x46,
- 0x61, 0x24, 0x54, 0xc6,
- 0xa1, 0x85, 0x81, 0x01,
- 0x00, 0x06, 0x7c, 0x0e,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xef, 0xd4, 0x59, 0x88,
- 0x60, 0x08, 0x00, 0x16,
- 0xe0, 0x10, 0x42, 0xc6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x81, 0x21, 0x40, 0x2b,
- 0x68, 0x14, 0x69, 0x08,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x80, 0x04, 0xe1, 0x44,
- 0x81, 0x65, 0x80, 0xb8,
- 0xef, 0xd4, 0x59, 0x68,
- 0x63, 0x29, 0x4c, 0x91,
- 0xa0, 0x04, 0xc0, 0x38,
- 0x40, 0x0a, 0x80, 0x08,
- 0x80, 0xc5, 0xe0, 0x80,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfa, 0xe5, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x45, 0xfa, 0x55,
- 0xe8, 0x14, 0x6d, 0xe8,
- 0x80, 0x08, 0xa0, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0xef, 0xd4, 0x57, 0x28,
- 0x63, 0x29, 0x4c, 0x91,
- 0x55, 0xf8, 0xc0, 0x38,
- 0x55, 0xb8, 0xef, 0xc0,
- 0x00, 0x26, 0xef, 0xd4,
- 0x42, 0x86, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x3c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x65, 0x38, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x55, 0x98, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x6a, 0x68,
- 0x80, 0x08, 0x9c, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x82, 0x85, 0xa1, 0x0b,
- 0xef, 0xd4, 0x53, 0xa8,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xd0, 0x19,
- 0x63, 0x29, 0x4c, 0x91,
- 0x00, 0x86, 0xc0, 0x38,
- 0x80, 0x04, 0xe1, 0x3c,
- 0xd0, 0x19, 0x80, 0x18,
- 0x51, 0xb8, 0x80, 0x16,
- 0x0c, 0x09, 0xef, 0xc0,
- 0xc0, 0x2c, 0x6e, 0xa9,
- 0x01, 0x06, 0xa3, 0x0b,
- 0x00, 0x05, 0x81, 0x10,
- 0x40, 0x91, 0x80, 0x00,
- 0x9e, 0x25, 0x80, 0x00,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x50, 0x58, 0x9a, 0xa5,
- 0x00, 0x36, 0xef, 0xd4,
- 0x42, 0x26, 0x60, 0x08,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5f, 0xd8, 0x81, 0x21,
- 0x8c, 0x0b, 0x68, 0x14,
- 0xe1, 0x44, 0x00, 0xc6,
- 0x80, 0xb8, 0x80, 0x04,
- 0x50, 0x38, 0x81, 0x65,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x56, 0x0a, 0x82, 0x45,
- 0xfc, 0x85, 0xe0, 0x8c,
- 0x63, 0x29, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0xfd, 0x95, 0xfa, 0xf5,
- 0xe8, 0x14, 0x65, 0x08,
- 0x80, 0x08, 0xa8, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x38, 0x63, 0x29,
- 0x92, 0x25, 0xa1, 0x0b,
- 0xe9, 0x0d, 0xfc, 0x04,
- 0x4d, 0x38, 0x90, 0x25,
- 0x00, 0xc6, 0xef, 0xc0,
- 0x57, 0x46, 0x61, 0x10,
- 0x00, 0x04, 0xe1, 0x10,
- 0x80, 0x18, 0x83, 0x21,
- 0xf3, 0xf8, 0x42, 0x10,
- 0x81, 0x11, 0x00, 0x16,
- 0x00, 0x16, 0xac, 0x04,
- 0x5c, 0x38, 0x95, 0x11,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x43, 0x46, 0x2c, 0x04,
- 0x04, 0x86, 0xe1, 0x10,
- 0x00, 0x96, 0xe1, 0x3c,
- 0xe1, 0x14, 0x00, 0xc6,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x84, 0x40, 0x4a,
- 0x40, 0x00, 0x02, 0x05,
- 0xc0, 0x00, 0x02, 0x06,
- 0xc0, 0x00, 0x40, 0x11,
- 0x80, 0x18, 0x88, 0x04,
- 0xf3, 0xdc, 0x42, 0x10,
- 0x88, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x00, 0x16, 0xf3, 0xbc,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0x00, 0x16, 0xc2, 0x19,
- 0xe0, 0x0c, 0x41, 0xf6,
- 0xfc, 0x04, 0xbe, 0x0e,
- 0xe8, 0x0d, 0x82, 0x01,
- 0x9f, 0xfc, 0x2f, 0x88,
- 0xbc, 0x0e, 0xbe, 0x04,
- 0x4a, 0x18, 0x81, 0x85,
- 0x4c, 0x91, 0xef, 0xd4,
- 0xc0, 0x38, 0x63, 0x29,
- 0xef, 0xc0, 0x48, 0xe8,
- 0x63, 0x15, 0x0c, 0x09,
- 0x4f, 0x06, 0x40, 0x38,
- 0xa5, 0x0b, 0xe1, 0x14,
- 0x70, 0xb8, 0x82, 0x15,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x4c, 0x01, 0xbc, 0x0e,
- 0xc0, 0x38, 0x63, 0x29,
- 0xe1, 0x3c, 0x00, 0x86,
- 0x80, 0x18, 0x80, 0x04,
- 0x80, 0x16, 0xe0, 0x19,
- 0x80, 0x18, 0x9c, 0x04,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x3c, 0x04, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x08, 0x09, 0x80, 0x4b,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x8c, 0x40, 0x0a,
- 0x08, 0x0b, 0x96, 0xd5,
- 0x40, 0x16, 0x6b, 0xe1,
- 0x66, 0x81, 0x12, 0x40,
- 0x14, 0x40, 0xc0, 0xb5,
- 0x40, 0xb5, 0x65, 0x41,
- 0xbc, 0x4e, 0x81, 0x71,
- 0x73, 0xf1, 0x40, 0x00,
- 0x88, 0x03, 0xc0, 0xff,
- 0x64, 0x01, 0x10, 0x00,
- 0x00, 0x40, 0x40, 0x28,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x00, 0x40, 0x7c, 0x0e,
- 0xc0, 0x9c, 0x67, 0x41,
- 0x87, 0xb5, 0xbe, 0x0e,
- 0x7c, 0x04, 0xa8, 0x0a,
- 0x73, 0xf1, 0x4c, 0x00,
- 0x28, 0xba, 0xc0, 0xff,
- 0x81, 0x6b, 0x88, 0x63,
- 0x6d, 0x98, 0x80, 0xf5,
- 0x88, 0x0b, 0x68, 0x10,
- 0xa1, 0x0b, 0x3c, 0x44,
- 0xbe, 0x04, 0x8c, 0x15,
- 0x80, 0xf5, 0x81, 0x6b,
- 0x68, 0x10, 0x6b, 0x28,
- 0x3c, 0x44, 0x88, 0x0b,
- 0x88, 0xf5, 0xa1, 0x0b,
- 0xa1, 0x0b, 0xa4, 0x0a,
- 0x24, 0x0a, 0x86, 0xa5,
- 0xa4, 0x1a, 0xe0, 0xb7,
- 0x21, 0x0b, 0x9e, 0x09,
- 0x73, 0xc1, 0x44, 0x10,
- 0x20, 0xbf, 0xc0, 0xff,
- 0x00, 0x16, 0xc9, 0x17,
- 0xa4, 0xbf, 0x00, 0x00,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x45, 0x07, 0xe1, 0xbe,
- 0x01, 0x65, 0x90, 0x2b,
- 0x59, 0x34, 0x80, 0x1b,
- 0xec, 0x04, 0x02, 0x10,
- 0xa1, 0x1b, 0xc9, 0x3e,
- 0xc4, 0x07, 0xfe, 0x75,
- 0x04, 0x91, 0x80, 0x83,
- 0x82, 0x71, 0x84, 0xa1,
- 0xe4, 0x9c, 0x0f, 0x0a,
- 0x81, 0x01, 0xf0, 0x85,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x6c, 0x1d, 0x08, 0x29,
- 0x40, 0x00, 0x40, 0x2b,
- 0x48, 0x01, 0xf3, 0xf4,
- 0x40, 0x2d, 0x67, 0xcd,
- 0xe0, 0x0c, 0x0e, 0x36,
- 0x60, 0x0c, 0x02, 0x36,
- 0x75, 0x38, 0x88, 0x0b,
- 0x23, 0x0b, 0xef, 0xcc,
- 0x0e, 0x06, 0x98, 0xf1,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x40, 0xc6, 0x8a, 0xe5,
- 0x85, 0x31, 0x61, 0x04,
- 0x83, 0x41, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0x86,
- 0x63, 0x7d, 0x0c, 0x15,
- 0x79, 0x78, 0xc0, 0x0b,
- 0x82, 0x2b, 0x68, 0x14,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2d,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x6f, 0xf8, 0x5e, 0x08,
- 0x48, 0x18, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x68, 0x14,
- 0x79, 0x41, 0x02, 0x06,
- 0x8c, 0x0b, 0x5d, 0xcd,
- 0xef, 0xf8, 0x62, 0xc8,
- 0x0c, 0x0b, 0x81, 0x55,
- 0x64, 0x38, 0x8e, 0x1b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x46, 0x38, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x14,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x65, 0x3d, 0x4c, 0x01,
- 0x90, 0x0b, 0xc0, 0x22,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x81, 0x00, 0x09,
- 0x02, 0x00, 0xc0, 0x2c,
- 0xe5, 0x1d, 0xec, 0x04,
- 0x40, 0xc6, 0x82, 0xa5,
- 0x83, 0x11, 0x61, 0x04,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x01, 0x86,
- 0x02, 0x06, 0x00, 0x04,
- 0x80, 0x1e, 0xe8, 0x00,
- 0xa1, 0x0b, 0xdd, 0x93,
- 0xda, 0x00, 0x5c, 0x08,
- 0x61, 0x04, 0x40, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x6d, 0x39, 0x0e, 0x09,
- 0x81, 0x81, 0x40, 0x2c,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0e, 0x09, 0x9c, 0xe5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0x6d, 0x41, 0x4e, 0x81,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x40, 0x70, 0xe0, 0x80,
- 0x5e, 0x38, 0xdc, 0x00,
- 0x14, 0x06, 0xc8, 0x00,
- 0x91, 0xb1, 0x61, 0x38,
- 0x0e, 0x09, 0x8b, 0xf5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x12, 0x06, 0x04, 0x75,
- 0x02, 0x06, 0xc0, 0x00,
- 0x5d, 0xcd, 0x79, 0x41,
- 0x5d, 0xb8, 0x8e, 0x0b,
- 0x01, 0xd5, 0xef, 0xf8,
- 0x03, 0x31, 0x80, 0x8b,
- 0x0c, 0x1b, 0x8e, 0x0b,
- 0x62, 0x18, 0x92, 0x2b,
- 0x00, 0x8b, 0xef, 0xf4,
- 0x12, 0x0a, 0x82, 0x91,
- 0xfc, 0xd5, 0xe0, 0x40,
- 0x6d, 0x41, 0x0e, 0x09,
- 0xa1, 0x0b, 0xc0, 0x2c,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x66,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x40, 0xb3, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x01, 0x11, 0x8a, 0xf5,
- 0x51, 0x78, 0x8e, 0x0b,
- 0x0e, 0x09, 0xe8, 0x00,
- 0x40, 0x2c, 0x6d, 0x41,
- 0xa1, 0x0b, 0x80, 0x8b,
- 0x00, 0x00, 0x14, 0x05,
- 0x80, 0x00, 0x02, 0x76,
- 0x80, 0x00, 0x40, 0x13,
- 0x0d, 0x41, 0x0e, 0x09,
- 0x00, 0x0a, 0x80, 0x2c,
- 0x14, 0x05, 0xf0, 0x04,
- 0x02, 0x96, 0x00, 0x00,
- 0x40, 0x13, 0x80, 0x00,
- 0xa1, 0x8b, 0x00, 0x00,
- 0x0e, 0x1b, 0x82, 0x95,
- 0x40, 0x16, 0x66, 0x35,
- 0x0e, 0x29, 0x8e, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x6f, 0xc8, 0x41, 0x88,
- 0x80, 0x8b, 0x82, 0x19,
- 0x6d, 0x41, 0x0e, 0x09,
- 0x82, 0x01, 0xc0, 0x2c,
- 0x6d, 0x41, 0x4e, 0x01,
- 0x0e, 0x09, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x41,
- 0x6d, 0x11, 0x0e, 0x19,
- 0xc3, 0x0d, 0xc0, 0x2c,
- 0x90, 0x0b, 0xe6, 0x75,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x81, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x63, 0x85, 0x00, 0x25,
- 0x81, 0x41, 0x40, 0x0b,
- 0xe0, 0x14, 0x2c, 0x48,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x60, 0x80, 0x40, 0x0a,
- 0x82, 0x85, 0x81, 0x01,
- 0x68, 0x00, 0x56, 0x88,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x40, 0x60, 0xab, 0x1b,
- 0x68, 0x38, 0x9c, 0x00,
- 0x0c, 0x19, 0x8f, 0xfc,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0xe0, 0x84, 0x42, 0x0a,
- 0x62, 0x58, 0x82, 0x85,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x67, 0xc9, 0x0c, 0x19,
- 0xb1, 0x1b, 0xc0, 0x2d,
- 0x9c, 0x00, 0x40, 0x60,
- 0x8f, 0xfc, 0x67, 0x28,
- 0x6d, 0x51, 0x0c, 0x19,
- 0x42, 0x0a, 0xc0, 0x2c,
- 0x82, 0xa5, 0xe0, 0x88,
- 0x68, 0x00, 0x56, 0x28,
- 0x0c, 0x19, 0x8c, 0x0b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x80, 0xb5, 0xb3, 0x1b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xcb, 0xf5, 0xf2, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2d, 0x65, 0x35,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x0d, 0x11, 0x8c, 0x85,
- 0x79, 0x41, 0x04, 0x06,
- 0x4e, 0xb8, 0xdd, 0xcd,
- 0x8c, 0x0b, 0x6f, 0xf8,
- 0x80, 0x85, 0xa1, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0x6b, 0xd8, 0xdd, 0x93,
- 0x8c, 0x0b, 0x6f, 0xf4,
- 0x6a, 0xad, 0x0c, 0x09,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x1e, 0x79, 0xa3, 0x0b,
- 0x9c, 0x00, 0x40, 0x60,
- 0x08, 0x10, 0x6b, 0xa8,
- 0x9a, 0x80, 0x02, 0x74,
- 0x6d, 0x51, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x84, 0x25, 0xe0, 0x8c,
- 0x61, 0x34, 0x41, 0x06,
- 0xe0, 0x08, 0x45, 0xa6,
- 0x02, 0x74, 0x00, 0x04,
- 0x4c, 0x21, 0xfa, 0x80,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x8c, 0x0b, 0x00, 0x26,
- 0xe8, 0x00, 0x4d, 0x68,
- 0xf4, 0xf5, 0xa1, 0x0b,
- 0x04, 0x06, 0x0f, 0x11,
- 0xdd, 0xcd, 0x79, 0x41,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x0b, 0x58, 0xf2, 0x84,
- 0xc1, 0xc3, 0xff, 0xf8,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x81, 0x01, 0x00, 0x6b,
- 0x6f, 0xe0, 0x65, 0x68,
- 0x00, 0x7b, 0x81, 0x11,
- 0xe1, 0x48, 0x41, 0x86,
- 0x80, 0x08, 0x80, 0x04,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0xc5,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x0c, 0x09, 0x8c, 0x05,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xe0, 0x90, 0x40, 0x4a,
- 0x0c, 0x09, 0x80, 0xc5,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x88, 0xb5, 0xa1, 0x0b,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x4a, 0x78, 0x83, 0x11,
- 0x42, 0x06, 0xef, 0x7c,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x79, 0x48,
- 0x61, 0x38, 0x01, 0x06,
- 0xe0, 0x0c, 0x43, 0xf6,
- 0x0c, 0x29, 0x80, 0x04,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0xe0, 0x88, 0x44, 0x4a,
- 0xc0, 0x00, 0x40, 0x15,
- 0x42, 0x16, 0xfe, 0x35,
- 0x8c, 0x0b, 0x60, 0x00,
- 0xef, 0xe0, 0x78, 0x28,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2d,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x8e, 0x0b, 0x03, 0x11,
- 0xef, 0xe0, 0x61, 0x48,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x80, 0x6b, 0x3e, 0x1e,
- 0x65, 0x0d, 0x0c, 0x09,
- 0x81, 0x11, 0x40, 0x2b,
- 0x81, 0xa1, 0x0b, 0x1e,
- 0x00, 0x2a, 0x91, 0x1c,
- 0x81, 0x01, 0x60, 0x04,
- 0x00, 0x98, 0xfe, 0x0e,
- 0xc0, 0x00, 0x40, 0x01,
- 0x64, 0x50, 0x02, 0xf0,
- 0x77, 0x98, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xc8,
- 0x60, 0x48, 0x02, 0x06,
- 0x64, 0x98, 0x8c, 0x0b,
- 0x00, 0x60, 0xe8, 0x14,
- 0x40, 0x09, 0x64, 0x01,
- 0x61, 0x01, 0x12, 0x06,
- 0x7c, 0x0e, 0xc0, 0x20,
- 0xe6, 0xe4, 0x10, 0x06,
- 0x81, 0x71, 0x09, 0x15,
- 0x6e, 0x19, 0x0c, 0x0b,
- 0x40, 0x0a, 0xc0, 0x15,
- 0x8c, 0x65, 0xe4, 0x9c,
- 0xf0, 0x9c, 0x40, 0x62,
- 0x68, 0x81, 0x00, 0xb9,
- 0x16, 0x0a, 0xc0, 0x1b,
- 0x8a, 0x65, 0xe3, 0xfc,
- 0x40, 0x01, 0x01, 0x78,
- 0xbe, 0x04, 0xc0, 0x00,
- 0x04, 0x06, 0xa1, 0x0b,
- 0x06, 0x16, 0x00, 0x24,
- 0x40, 0x60, 0x80, 0x00,
- 0x42, 0x90, 0x1c, 0x00,
- 0x42, 0x62, 0x9c, 0x00,
- 0x45, 0x06, 0x50, 0xa0,
- 0x06, 0x46, 0xc0, 0x18,
- 0x40, 0x60, 0x40, 0x00,
- 0x68, 0xf8, 0xdc, 0x00,
- 0x0b, 0x34, 0xe8, 0x04,
- 0xe4, 0x40, 0x0a, 0xf0,
- 0x8c, 0x1b, 0x0c, 0x0b,
- 0x96, 0x4b, 0x7c, 0x24,
- 0xef, 0xc8, 0x75, 0x88,
- 0xa1, 0xab, 0x80, 0xab,
- 0x7e, 0x14, 0x84, 0xb5,
- 0x91, 0x0a, 0x81, 0xa1,
- 0xfb, 0x80, 0x02, 0x14,
- 0xfe, 0x0e, 0x82, 0x03,
- 0x12, 0x90, 0x02, 0x71,
- 0xc0, 0x02, 0x65, 0x01,
- 0x66, 0xc1, 0x10, 0x80,
- 0xfe, 0x7d, 0xc0, 0x01,
- 0xfe, 0x04, 0xf0, 0x05,
- 0x62, 0x99, 0x4c, 0x03,
- 0x14, 0x0b, 0xc0, 0x16,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf6, 0x7c,
- 0xe1, 0x10, 0x00, 0xc6,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x80, 0x7b, 0x02, 0x6b,
- 0xef, 0xec, 0x79, 0x88,
- 0x82, 0xb5, 0xa1, 0x0b,
- 0x66, 0x35, 0x0e, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x80, 0xe5, 0xe0, 0x80,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x10, 0x16, 0xe8,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x63, 0x89, 0x00, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x04, 0x10, 0x83, 0x41,
- 0x15, 0x38, 0xec, 0x28,
- 0xc1, 0xc3, 0xe0, 0x14,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x82, 0x35, 0xad, 0x0b,
- 0x6f, 0xfc, 0x51, 0xc8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x09, 0x82, 0xb5,
- 0xc0, 0x2d, 0x67, 0xc9,
- 0x70, 0x1c, 0x00, 0x0a,
- 0x80, 0xd5, 0x81, 0x01,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x10, 0xd8, 0xf2, 0x00,
- 0x0c, 0x0c, 0xff, 0xfc,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x8c, 0xc5, 0xe0, 0x90,
- 0x6f, 0xec, 0x55, 0xc8,
- 0x5a, 0xb8, 0x8c, 0x0b,
- 0x8c, 0x0b, 0x6f, 0xec,
- 0x6f, 0xec, 0x68, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0x40, 0x38, 0x64, 0xb5,
- 0xa1, 0x0b, 0x80, 0x7b,
- 0x04, 0x21, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0xe1,
- 0x80, 0x54, 0x07, 0x01,
- 0x07, 0x41, 0x04, 0x60,
- 0x06, 0x60, 0x00, 0x54,
- 0x80, 0x58, 0x06, 0x41,
- 0x8f, 0xd0, 0x42, 0xa8,
- 0x64, 0xb9, 0x0c, 0x09,
- 0xa1, 0x0b, 0xc0, 0x38,
- 0x07, 0x01, 0x00, 0x60,
- 0x02, 0x60, 0x00, 0x54,
- 0x80, 0x54, 0x07, 0x41,
- 0x0f, 0xd0, 0x47, 0x88,
- 0x06, 0x40, 0x04, 0x60,
- 0x0c, 0x09, 0x80, 0x58,
- 0xc0, 0x38, 0x63, 0x21,
- 0x80, 0xc5, 0xa1, 0x0b,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x2b, 0xb8, 0xf2, 0x84,
- 0x8e, 0x0b, 0xff, 0xec,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x0a, 0x86, 0x00, 0x6b,
- 0x0c, 0x09, 0xef, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x0c, 0x2b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x6c, 0xed, 0x0c, 0x79,
- 0x40, 0x4a, 0x40, 0x2c,
- 0x0c, 0x89, 0xe0, 0x80,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x6c, 0xf1, 0x0c, 0x49,
- 0x42, 0x10, 0x40, 0x2c,
- 0x02, 0x14, 0xdc, 0x20,
- 0x40, 0x0a, 0x1c, 0x0c,
- 0x06, 0x60, 0xe0, 0x90,
- 0xc0, 0xb3, 0x05, 0x31,
- 0x05, 0x35, 0x06, 0x60,
- 0x8c, 0x38, 0x80, 0xb3,
- 0x6d, 0x11, 0x4c, 0x31,
- 0x46, 0x10, 0x40, 0x2c,
- 0x4c, 0x31, 0xfc, 0x10,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x4a, 0x0a, 0x94, 0x58,
- 0x04, 0x24, 0xe0, 0x84,
- 0x04, 0x24, 0xc0, 0x84,
- 0x85, 0x4b, 0xfa, 0x80,
- 0xdc, 0x10, 0x02, 0x34,
- 0x1c, 0x50, 0x42, 0x10,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x6d, 0x15, 0x4c, 0x11,
- 0x40, 0x10, 0x40, 0x2c,
- 0x4c, 0x01, 0x93, 0xf0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x54, 0x78, 0x80, 0x85,
- 0x8c, 0x0b, 0x68, 0x04,
- 0x63, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2d,
- 0x0c, 0x09, 0xe0, 0x80,
- 0xc0, 0x2c, 0x0d, 0x15,
- 0xd3, 0xf8, 0x40, 0x00,
- 0x0d, 0x15, 0x4c, 0x01,
- 0x10, 0x0a, 0x40, 0x2c,
- 0x84, 0x65, 0xff, 0xfc,
- 0x7a, 0x80, 0x00, 0x84,
- 0xfa, 0x80, 0x02, 0x74,
- 0x0c, 0x09, 0x81, 0x1b,
- 0x00, 0x2c, 0x0d, 0x15,
- 0x80, 0x00, 0x02, 0x06,
- 0x0d, 0x11, 0x4c, 0x11,
- 0x40, 0x00, 0x80, 0x2c,
- 0x4c, 0x01, 0x93, 0xe0,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x0c,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x68, 0x00, 0x43, 0x08,
- 0x48, 0x98, 0x80, 0x6b,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0x6c, 0x11, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0xef, 0xdc, 0x40, 0x06,
- 0x40, 0x0a, 0x80, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0x4f, 0xb8, 0x82, 0xb5,
- 0x8c, 0x0b, 0x6f, 0xfc,
- 0x68, 0x04, 0x6b, 0x08,
- 0x81, 0x45, 0x8c, 0x0b,
- 0x6f, 0xd4, 0x4e, 0xa8,
- 0xa1, 0x0b, 0x8c, 0x0b,
- 0x57, 0x58, 0x82, 0x55,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x80, 0xb5, 0xa1, 0x0b,
- 0x68, 0x00, 0x44, 0xe8,
- 0x81, 0x01, 0x8c, 0x0b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6c, 0x21, 0x00, 0x19,
- 0x45, 0xc6, 0x40, 0x2b,
- 0x40, 0x21, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x42, 0x26, 0xa3, 0x1b,
- 0x40, 0x11, 0x80, 0x00,
- 0x80, 0x2b, 0x0c, 0x1d,
- 0xa7, 0x1b, 0x8a, 0x45,
- 0xa5, 0x1b, 0x82, 0x05,
- 0x80, 0x00, 0x42, 0x36,
- 0x0c, 0x1d, 0x40, 0x11,
- 0x85, 0x15, 0x80, 0x2b,
- 0xe0, 0x00, 0x42, 0x46,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x02, 0x86, 0x40, 0x2b,
- 0x84, 0x28, 0xef, 0xdc,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x40, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xe5,
- 0xf0, 0xc0, 0x44, 0x20,
- 0xe0, 0x80, 0x04, 0x0a,
- 0x84, 0x28, 0x80, 0xb5,
- 0xf3, 0xdc, 0x44, 0x20,
- 0x00, 0x29, 0x84, 0x26,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x0a,
- 0xc0, 0x00, 0x04, 0x16,
- 0xc0, 0xa0, 0x42, 0x21,
- 0x6e, 0x09, 0x00, 0x1b,
- 0xc4, 0x19, 0xc0, 0x15,
- 0x6e, 0x09, 0x40, 0x13,
- 0x00, 0x86, 0x40, 0x15,
- 0x80, 0x18, 0xef, 0xdc,
- 0xf3, 0xf8, 0x42, 0x10,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x81, 0x01, 0x00, 0x7b,
- 0x6f, 0xe0, 0x42, 0x68,
- 0x81, 0x81, 0x81, 0x11,
- 0x6c, 0x21, 0x0e, 0x09,
- 0x80, 0x6b, 0x40, 0x2b,
- 0xe0, 0x08, 0x43, 0xd6,
- 0x6c, 0x1d, 0x4e, 0x11,
- 0xa5, 0x0b, 0xc0, 0x2b,
- 0xa7, 0x0b, 0x88, 0x45,
- 0x0e, 0x0b, 0xa2, 0x75,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x73, 0x75, 0x40, 0x00,
- 0x00, 0x04, 0xc0, 0xff,
- 0x4e, 0x03, 0xfc, 0x94,
- 0x40, 0x15, 0x6e, 0x09,
- 0x60, 0x98, 0x8e, 0x0b,
- 0x48, 0x38, 0xef, 0xbc,
- 0x8e, 0x0b, 0x68, 0x00,
- 0x64, 0xd5, 0x0e, 0x09,
- 0xa7, 0x0b, 0xc0, 0x2b,
- 0xa5, 0x0b, 0x86, 0x05,
- 0x00, 0x86, 0x08, 0xc5,
- 0xa3, 0x0b, 0x8f, 0xdc,
- 0x03, 0xd5, 0x88, 0xf5,
- 0xef, 0xdc, 0x00, 0x86,
- 0x6e, 0x09, 0x0e, 0x0b,
- 0x40, 0x00, 0xc0, 0x15,
- 0xc0, 0xff, 0x73, 0x71,
- 0xfc, 0x94, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x0c, 0x0c, 0xc0, 0x15,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0xef, 0xdc, 0x00, 0x86,
- 0x42, 0x4a, 0x80, 0x18,
- 0x80, 0xe5, 0xe0, 0x8c,
- 0x6c, 0x15, 0x0e, 0x19,
- 0x42, 0x0a, 0xc0, 0x2b,
- 0x80, 0xa5, 0xe0, 0x84,
- 0x01, 0x55, 0x80, 0x08,
- 0xfc, 0x08, 0x00, 0x04,
- 0xc8, 0x09, 0x80, 0x08,
- 0xef, 0xdc, 0x02, 0x86,
- 0x4f, 0x98, 0x84, 0x06,
- 0x8e, 0x0b, 0x6f, 0xe4,
- 0xef, 0xdc, 0x12, 0x86,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xb5, 0xe0, 0x80,
- 0x40, 0x0a, 0xa4, 0x08,
- 0x82, 0xf5, 0xe0, 0x88,
- 0x8e, 0x0b, 0x3d, 0x11,
- 0xef, 0xe0, 0x52, 0x68,
- 0x68, 0x00, 0x49, 0x68,
- 0x87, 0x25, 0x8e, 0x0b,
- 0x8e, 0x0b, 0x3f, 0x11,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xff, 0xe0, 0x11, 0xc8,
- 0x6e, 0x09, 0x0e, 0x05,
- 0x02, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0xe0, 0x02, 0x40, 0x1a,
- 0x64, 0xcd, 0x0e, 0x15,
- 0x04, 0x04, 0xc0, 0x05,
- 0xd0, 0x17, 0xe1, 0x84,
- 0xc2, 0x0d, 0x84, 0x13,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x02, 0x40, 0x1a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x04, 0x0e, 0x84, 0x14,
- 0x0e, 0x0b, 0x95, 0x11,
- 0xc0, 0x15, 0x6e, 0x09,
- 0xfc, 0x98, 0x00, 0x04,
- 0x6e, 0x09, 0x4e, 0x03,
- 0x8e, 0x0b, 0x40, 0x15,
- 0xef, 0xe0, 0x4f, 0x88,
- 0x60, 0x3c, 0x41, 0xf6,
- 0x60, 0x18, 0x83, 0x11,
- 0x47, 0xd8, 0xef, 0x78,
- 0x52, 0x81, 0xef, 0xf0,
- 0x03, 0x11, 0xe0, 0xa0,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0x38, 0x78, 0xf2, 0x9c,
- 0xc1, 0xc3, 0xff, 0xdc,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x01, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x24,
- 0xe0, 0x08, 0x43, 0xe6,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x45, 0x46, 0x40, 0x2b,
- 0x0c, 0x15, 0xe1, 0x24,
- 0xc0, 0x09, 0x6e, 0x09,
- 0x88, 0x24, 0x80, 0x08,
- 0x08, 0x34, 0xc5, 0x07,
- 0xf0, 0x0c, 0x44, 0x00,
- 0x68, 0x10, 0x79, 0xa8,
- 0x02, 0x86, 0x8c, 0x0b,
- 0x48, 0x86, 0x6f, 0xdc,
- 0x86, 0x0e, 0xe0, 0x3c,
- 0xc4, 0x24, 0x86, 0x04,
- 0x68, 0xb1, 0x0c, 0x3b,
- 0x48, 0x0a, 0xc0, 0x0a,
- 0x00, 0x0e, 0x66, 0x92,
- 0xc3, 0xd0, 0x64, 0x00,
- 0x60, 0x0e, 0x40, 0x0a,
- 0x88, 0x23, 0xc9, 0x47,
- 0x40, 0x02, 0xc5, 0x0d,
- 0x02, 0x09, 0x91, 0x88,
- 0x40, 0x00, 0xc0, 0x00,
- 0x42, 0x01, 0xdc, 0x04,
- 0x00, 0x06, 0x40, 0x00,
- 0x4c, 0x05, 0xc0, 0x00,
- 0xc0, 0x05, 0x64, 0xcd,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x09, 0x00, 0x15,
- 0x04, 0x06, 0x40, 0x09,
- 0xc0, 0xfa, 0x60, 0x01,
- 0x64, 0xcd, 0x00, 0x05,
- 0x42, 0x2a, 0xc0, 0x05,
- 0xd0, 0x07, 0xe0, 0x06,
- 0xe1, 0x84, 0x04, 0x14,
- 0xc0, 0x1d, 0x84, 0x03,
- 0xc0, 0x00, 0x00, 0x46,
- 0x00, 0x06, 0x40, 0x0a,
- 0xe1, 0x4c, 0x03, 0x86,
- 0x84, 0x0e, 0x84, 0x14,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x48, 0x58, 0xb7, 0x11,
- 0x8c, 0x0b, 0x6f, 0xe0,
- 0x64, 0xcd, 0x0c, 0x15,
- 0x02, 0x8a, 0xc0, 0x05,
- 0x80, 0xf5, 0xe5, 0x94,
- 0x8c, 0x0b, 0x01, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0xc8,
- 0x8c, 0x0b, 0x3b, 0x11,
- 0xef, 0xe0, 0x47, 0x48,
- 0x60, 0x04, 0x42, 0x46,
- 0x8c, 0x0b, 0x81, 0x21,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xe0, 0x10, 0x06, 0x08,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x38,
- 0x00, 0xbc, 0x83, 0xb1,
- 0xe1, 0x94, 0x00, 0x46,
- 0xa1, 0xab, 0x80, 0xa8,
- 0x0c, 0x29, 0x82, 0x65,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x67, 0x38, 0x8c, 0x0b,
- 0x94, 0x1b, 0x6f, 0xc8,
- 0x0e, 0x08, 0xa1, 0x0b,
- 0x0e, 0x60, 0xc0, 0x00,
- 0x40, 0xb3, 0x64, 0x51,
- 0x60, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xe0,
- 0x67, 0xcd, 0x0c, 0x09,
- 0x02, 0x04, 0xc0, 0x2d,
- 0x42, 0x0a, 0xe1, 0x90,
- 0x82, 0x19, 0x60, 0x80,
- 0x06, 0x31, 0x4c, 0x13,
- 0x40, 0x0a, 0x40, 0x16,
- 0x86, 0x25, 0xe0, 0x84,
- 0x6c, 0x11, 0x0c, 0x19,
- 0x42, 0x4a, 0xc0, 0x2b,
- 0x84, 0x65, 0xe0, 0x94,
- 0x61, 0x38, 0x03, 0x06,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x40, 0x4a, 0x84, 0x14,
- 0x42, 0x25, 0xe0, 0x88,
- 0x0c, 0x09, 0xc0, 0x00,
- 0xc0, 0x2d, 0x07, 0xcd,
- 0x40, 0x00, 0xfe, 0x35,
- 0x4c, 0x01, 0xf3, 0xec,
- 0xc0, 0x2d, 0x67, 0xcd,
- 0x64, 0xd1, 0x00, 0x60,
- 0x10, 0x60, 0x40, 0xb3,
- 0xc0, 0xaf, 0x64, 0x11,
- 0x81, 0xa1, 0x0f, 0x0e,
- 0x81, 0x91, 0x13, 0xa5,
- 0xfb, 0xfc, 0x16, 0x0a,
- 0x13, 0x11, 0xa6, 0x05,
- 0x41, 0x78, 0x8c, 0x0b,
- 0x12, 0x0a, 0xef, 0xe0,
- 0x41, 0x06, 0x7b, 0xfc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x41, 0x26, 0x9c, 0xa5,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x5d, 0xd8, 0x8c, 0x0b,
- 0x0f, 0x14, 0xe8, 0x00,
- 0x63, 0x38, 0x8c, 0x0b,
- 0x19, 0x11, 0xef, 0xe0,
- 0x7f, 0xf8, 0x8c, 0x0b,
- 0x41, 0x66, 0xef, 0xdc,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x6f, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x00,
- 0x98, 0xf5, 0xa1, 0xab,
- 0xe0, 0x00, 0x41, 0x36,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xe8, 0x10, 0x59, 0x68,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x46, 0x96, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4a, 0x78, 0x8c, 0x0b,
- 0x80, 0xab, 0xe8, 0x14,
- 0x94, 0x35, 0xa1, 0xab,
- 0x6d, 0x09, 0x0c, 0x09,
- 0x0c, 0x1b, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6c, 0x04, 0x04, 0x00,
- 0xe0, 0x00, 0x41, 0x56,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x9e, 0x29, 0x40, 0x2b,
- 0x8c, 0x0b, 0x02, 0x19,
- 0xef, 0xc0, 0x77, 0xe8,
- 0xa1, 0xab, 0x80, 0xab,
- 0x41, 0x76, 0x8e, 0x95,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x54, 0xf8, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xfc,
- 0x8c, 0x35, 0xa1, 0xab,
- 0x61, 0x38, 0x00, 0x06,
- 0xe0, 0x00, 0x43, 0x86,
- 0x4c, 0x11, 0x80, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x1c, 0x85, 0x11,
- 0x5e, 0x38, 0x8c, 0x0b,
- 0x80, 0xab, 0xef, 0xf4,
- 0x88, 0x35, 0xa1, 0xab,
- 0x6c, 0x71, 0x0c, 0x09,
- 0x43, 0x96, 0x40, 0x2c,
- 0x4c, 0x11, 0xe0, 0x00,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0xe3, 0xfc, 0x00, 0x0a,
- 0x0c, 0x19, 0x80, 0xe5,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x16, 0x06, 0x81, 0x1b,
- 0x01, 0xf5, 0x80, 0x00,
- 0x41, 0x16, 0x81, 0xa1,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x42, 0x38, 0x8c, 0x0b,
- 0x00, 0xab, 0xe8, 0x00,
- 0xa1, 0xab, 0x83, 0x91,
- 0x83, 0x91, 0xe4, 0x25,
- 0x8e, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x54, 0x68,
- 0x90, 0x1b, 0x0c, 0x0b,
- 0xef, 0xe0, 0x57, 0xa8,
- 0xd8, 0xe5, 0xa1, 0xab,
- 0x6c, 0x91, 0x0c, 0x09,
- 0x21, 0x0b, 0xc0, 0x2c,
- 0xe0, 0x00, 0x41, 0xa6,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x40, 0x60, 0x40, 0x2b,
- 0x53, 0xd8, 0x9c, 0x00,
- 0x94, 0x0b, 0x8f, 0xc8,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x0c,
- 0xec, 0x50, 0x1e, 0xf0,
- 0x03, 0x06, 0x00, 0x6b,
- 0x0c, 0x0b, 0xe0, 0x08,
- 0xc0, 0x15, 0x6e, 0x09,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0x11, 0x40, 0x2b,
- 0x6d, 0x09, 0x4c, 0x11,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x81, 0x01, 0x60, 0x94,
- 0x0d, 0x0d, 0x0c, 0x19,
- 0x4c, 0x03, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x71,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x42, 0x10, 0xc0, 0x2c,
- 0x4c, 0x11, 0xdc, 0x40,
- 0xc0, 0x2c, 0x0d, 0x0d,
- 0x69, 0x65, 0x0c, 0x15,
- 0x0c, 0x29, 0xc0, 0x0d,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x00, 0x02, 0x1a,
- 0xa0, 0x00, 0x00, 0x38,
- 0x44, 0x20, 0x80, 0xc5,
- 0x4c, 0x21, 0xf3, 0xdc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x44, 0x20, 0x40, 0x16,
- 0x4c, 0x01, 0xf3, 0xe0,
- 0x40, 0x2c, 0x6c, 0xed,
- 0x4c, 0x21, 0xc2, 0x29,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x0c, 0x45, 0xf6,
- 0x6c, 0xf1, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x03, 0xe0, 0x94,
- 0x40, 0x16, 0x06, 0x81,
- 0xe0, 0x88, 0x42, 0x0a,
- 0x0c, 0xf9, 0x4c, 0x21,
- 0x42, 0x0a, 0x40, 0x2c,
- 0x4c, 0x01, 0xe0, 0x8c,
- 0x40, 0x2c, 0x0c, 0xfd,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x03, 0x35, 0x4c, 0x05,
- 0x42, 0x0a, 0x40, 0x0b,
- 0x4c, 0x21, 0xe0, 0x9c,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x68, 0x58, 0x80, 0xe5,
- 0x8c, 0x0b, 0x6f, 0xf0,
- 0x66, 0x35, 0x0c, 0x1b,
- 0x42, 0x0a, 0xc0, 0x16,
- 0x86, 0x25, 0xe0, 0xa0,
- 0x67, 0xf1, 0x0c, 0x59,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x67, 0xed, 0x0c, 0x49,
- 0x0c, 0x39, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xe5, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe1,
- 0xe8, 0x04, 0x41, 0x88,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9e, 0xf5,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xa4, 0x42, 0x0a,
- 0x03, 0x11, 0x82, 0x85,
- 0x4e, 0x78, 0x81, 0x21,
- 0x8c, 0x0b, 0x6f, 0xc0,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x1b, 0x9c, 0x35,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0xb8, 0x42, 0x0a,
- 0x7b, 0xf8, 0x80, 0xe5,
- 0x8c, 0x0b, 0x68, 0x0c,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x09, 0x98, 0xb5,
- 0xc0, 0x2d, 0x63, 0x11,
- 0xe0, 0x80, 0x40, 0x0a,
- 0xdc, 0x00, 0x40, 0x60,
- 0xcf, 0xec, 0x67, 0xc8,
- 0x65, 0x51, 0x0c, 0x09,
- 0x43, 0x46, 0x40, 0x2b,
- 0x04, 0x14, 0xe1, 0x04,
- 0x00, 0x00, 0x85, 0x51,
- 0x8e, 0x09, 0xec, 0x04,
- 0x0c, 0x09, 0x84, 0x06,
- 0xc0, 0x38, 0x63, 0x2d,
- 0x40, 0x06, 0x21, 0x0b,
- 0x4c, 0x01, 0xe0, 0x08,
- 0xc0, 0x2b, 0x6c, 0x1d,
- 0x0c, 0x09, 0x82, 0xf5,
- 0xc0, 0x38, 0x63, 0x15,
- 0x02, 0x45, 0xa5, 0x0b,
- 0x80, 0x00, 0x0a, 0x86,
- 0x00, 0xc5, 0xa3, 0x0b,
- 0x80, 0x00, 0x0a, 0x66,
- 0x0a, 0x46, 0xa1, 0x0b,
- 0x02, 0x60, 0x80, 0x00,
- 0x40, 0x54, 0x65, 0x41,
- 0x64, 0x11, 0x04, 0x60,
- 0x08, 0x60, 0xc0, 0x9e,
- 0x40, 0xa2, 0x66, 0x71,
- 0xe4, 0x30, 0x00, 0xf0,
- 0x06, 0xf0, 0x21, 0x56,
- 0x7f, 0x58, 0xe4, 0x10,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x1d, 0x0c, 0x29,
- 0x02, 0x06, 0x40, 0x2b,
- 0x84, 0xb5, 0xc0, 0x04,
- 0x60, 0x08, 0x44, 0x16,
- 0x64, 0x50, 0x00, 0x60,
- 0x4c, 0x21, 0xc0, 0x9e,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0xa1, 0x02, 0x60,
- 0x78, 0x18, 0xc0, 0xa3,
- 0xa1, 0x0b, 0xef, 0x80,
- 0x0c, 0x29, 0x86, 0x05,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x02, 0x16,
- 0x6e, 0x8d, 0x4c, 0x15,
- 0x0e, 0x56, 0x40, 0x0a,
- 0x4c, 0x05, 0xe0, 0x0c,
- 0x40, 0x0a, 0x6e, 0x89,
- 0xe0, 0x0c, 0x02, 0x56,
- 0x6f, 0xc8, 0x49, 0x48,
- 0x0e, 0x0b, 0x8c, 0x0b,
- 0x0c, 0x0c, 0xa8, 0xf1,
- 0xdd, 0x93, 0xf2, 0x04,
- 0x69, 0x65, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0d,
- 0x0c, 0x09, 0x80, 0xe5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x40, 0x4a,
- 0x41, 0x46, 0x84, 0xe5,
- 0x4b, 0xe6, 0x61, 0x4c,
- 0x00, 0x04, 0xe0, 0x0c,
- 0x66, 0xd1, 0x06, 0x60,
- 0x0c, 0x29, 0xc0, 0x54,
- 0x40, 0x15, 0x63, 0x0d,
- 0x66, 0xe1, 0x08, 0x60,
- 0x0c, 0x19, 0xc0, 0xa3,
- 0xc0, 0x15, 0x63, 0x09,
- 0x6c, 0x1d, 0x4c, 0x51,
- 0x62, 0x78, 0xc0, 0x2b,
- 0x0c, 0x09, 0xef, 0xa0,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0x60, 0x94, 0x40, 0x4a,
- 0xe0, 0x0c, 0x00, 0x46,
- 0x6c, 0x1d, 0x4c, 0x01,
- 0x86, 0x45, 0xc0, 0x2b,
- 0x66, 0xb1, 0x00, 0x60,
- 0x02, 0x60, 0x40, 0xbf,
- 0xc0, 0xc0, 0x65, 0x21,
- 0x64, 0xc1, 0x04, 0x60,
- 0x06, 0x60, 0x40, 0xad,
- 0xc0, 0xad, 0x65, 0x21,
- 0x6f, 0xac, 0x72, 0x88,
- 0x66, 0x20, 0x08, 0x60,
- 0x00, 0x60, 0xc0, 0xae,
- 0x40, 0xd8, 0x65, 0x61,
- 0x70, 0x78, 0x81, 0x11,
- 0x04, 0xc6, 0x6f, 0x70,
- 0x77, 0x65, 0xe0, 0x10,
- 0xc1, 0xc3, 0x81, 0x71,
- 0xf8, 0x7c, 0x04, 0xcc,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x03, 0x16, 0x40, 0x2c,
- 0x40, 0x11, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6c, 0x79, 0x00, 0x19,
- 0x00, 0x79, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0x75,
- 0xfc, 0x00, 0x10, 0xc4,
- 0x6d, 0x0d, 0x40, 0x81,
- 0x00, 0xab, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x31,
- 0x00, 0x19, 0x8d, 0x1e,
- 0xc0, 0x2c, 0x6d, 0x09,
- 0x63, 0x15, 0x00, 0xb5,
- 0x00, 0x69, 0xc0, 0x0b,
- 0xc0, 0x2c, 0x6c, 0xf9,
- 0x00, 0x19, 0x8f, 0x1e,
- 0xc0, 0x2c, 0x6c, 0xf5,
- 0x66, 0x35, 0x00, 0x5b,
- 0x00, 0x99, 0xc0, 0x16,
- 0xc0, 0x2c, 0x6c, 0xf1,
- 0xf8, 0x60, 0x08, 0x29,
- 0xe0, 0x84, 0x44, 0x0a,
- 0x0f, 0x1b, 0x86, 0x55,
- 0x06, 0x10, 0x83, 0x31,
- 0x02, 0x0a, 0x44, 0x04,
- 0x06, 0x16, 0xe3, 0xfc,
- 0x12, 0x0a, 0x00, 0x00,
- 0x40, 0x31, 0xe3, 0xfc,
- 0x40, 0x2c, 0x6c, 0xf5,
- 0x80, 0x85, 0x83, 0x21,
- 0x04, 0x90, 0x95, 0x9b,
- 0x40, 0x21, 0xc4, 0x04,
- 0x40, 0x2c, 0x6c, 0xf1,
- 0x82, 0xcf, 0xf1, 0x11,
- 0xc4, 0xc9, 0x07, 0x65,
- 0x63, 0xfc, 0x02, 0x0a,
- 0x16, 0x54, 0x96, 0x4b,
- 0x83, 0x21, 0x61, 0xb4,
- 0x83, 0x31, 0x02, 0x45,
- 0xe0, 0x84, 0x06, 0x74,
- 0xfa, 0x80, 0x06, 0x34,
- 0x83, 0x31, 0x07, 0x1b,
- 0xc4, 0x04, 0x06, 0x10,
- 0x6c, 0xf5, 0x40, 0x31,
- 0x12, 0x0a, 0x40, 0x2c,
- 0x80, 0xe5, 0xe3, 0xfc,
- 0x02, 0xa4, 0xc2, 0xa7,
- 0x83, 0x9b, 0xfa, 0x80,
- 0xc4, 0x04, 0x04, 0x90,
- 0x6c, 0xf1, 0x40, 0x21,
- 0x56, 0x0a, 0x40, 0x2c,
- 0x80, 0xa5, 0xe0, 0x80,
- 0xfa, 0x80, 0x02, 0x34,
- 0x80, 0xf5, 0xce, 0x1d,
- 0xe0, 0x80, 0x56, 0x4a,
- 0x46, 0x4a, 0x80, 0xe5,
- 0x80, 0x85, 0xe0, 0x80,
- 0x58, 0x80, 0x01, 0x55,
- 0x58, 0xc0, 0xfc, 0x18,
- 0x08, 0xbb, 0xf3, 0xe0,
- 0xef, 0xdc, 0x48, 0x06,
- 0x6d, 0x0d, 0x40, 0xc1,
- 0x58, 0x0a, 0x40, 0x2c,
- 0x82, 0xc5, 0xe0, 0x84,
- 0xfa, 0x80, 0x02, 0x64,
- 0x83, 0x11, 0x0f, 0x1b,
- 0x44, 0x04, 0x02, 0x60,
- 0xf3, 0xfc, 0x0c, 0x0a,
- 0x80, 0x00, 0x02, 0x16,
- 0x6c, 0xf9, 0x40, 0x11,
- 0x00, 0x29, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6c, 0xfd,
- 0xff, 0xf8, 0x02, 0x0e,
- 0xff, 0xf8, 0x0c, 0x0e,
- 0xe3, 0xfc, 0x04, 0x0a,
- 0x44, 0x04, 0x02, 0x20,
- 0xe0, 0xb4, 0x4a, 0x0a,
- 0x6c, 0xfd, 0x40, 0x11,
- 0x88, 0x55, 0xc0, 0x2c,
- 0x42, 0xc2, 0x91, 0x11,
- 0x18, 0xc4, 0x78, 0x84,
- 0x22, 0xcf, 0xfc, 0x0c,
- 0x40, 0xc1, 0xa1, 0x1b,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x8d, 0x14, 0x90, 0x15,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x80, 0xe5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x84, 0xf5, 0x83, 0x2b,
- 0x6c, 0xed, 0x00, 0x19,
- 0x83, 0x21, 0x40, 0x2c,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0xc0, 0x2c,
- 0x88, 0xd5, 0xe3, 0xf0,
- 0x8d, 0x14, 0x85, 0x75,
- 0x02, 0x0a, 0x8f, 0x34,
- 0x82, 0xa5, 0xfb, 0xfc,
- 0x7a, 0x80, 0x02, 0x14,
- 0xfa, 0x80, 0x04, 0x34,
- 0x80, 0xe5, 0x83, 0x2b,
- 0xe4, 0x04, 0x02, 0x30,
- 0x6d, 0x09, 0x40, 0x11,
- 0x83, 0x95, 0xc0, 0x2c,
- 0x6c, 0xed, 0x00, 0x19,
- 0x91, 0x21, 0x40, 0x2c,
- 0x78, 0x88, 0x44, 0xc2,
- 0xfc, 0x0c, 0x18, 0xc4,
- 0x83, 0x21, 0x24, 0xcf,
- 0x6d, 0x09, 0x40, 0x21,
- 0x02, 0x0a, 0x40, 0x2c,
- 0x40, 0xc1, 0xe3, 0xf0,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x0c, 0x10, 0x80, 0x65,
- 0x40, 0x61, 0xe4, 0x04,
- 0xc0, 0x2c, 0x6c, 0xed,
- 0x6c, 0xed, 0x00, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0x42, 0xc0, 0x82, 0xc5,
- 0x40, 0x11, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0x42, 0x10, 0x90, 0x18,
- 0x90, 0x16, 0xf3, 0xf8,
- 0x6d, 0x0d, 0x00, 0xc9,
- 0x83, 0x15, 0xc0, 0x2c,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x19, 0x82, 0x25,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x42, 0x4a,
- 0x58, 0xc0, 0x00, 0xb5,
- 0x58, 0xc0, 0xdc, 0x40,
- 0x40, 0xc1, 0xf3, 0xbc,
- 0xc0, 0x2c, 0x6d, 0x0d,
- 0xe0, 0x8c, 0x58, 0x4a,
- 0x00, 0x15, 0x84, 0x05,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x82, 0x65, 0xa1, 0x1b,
- 0x63, 0x35, 0x00, 0x25,
- 0x83, 0x11, 0x40, 0x0b,
- 0x02, 0x20, 0x97, 0x2b,
- 0x40, 0x15, 0xc4, 0x04,
- 0xc0, 0x0b, 0x63, 0x35,
- 0xf0, 0x7c, 0x0c, 0xcc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x68, 0x0c, 0x46, 0x88,
- 0x0e, 0x01, 0x80, 0x7b,
- 0x40, 0x2c, 0x6d, 0x01,
- 0x00, 0x8a, 0x81, 0x61,
- 0x82, 0xd5, 0xe1, 0xb8,
- 0x6c, 0x1d, 0x0e, 0x29,
- 0x0c, 0x46, 0x40, 0x2b,
- 0x02, 0x46, 0xe0, 0x0c,
- 0x8e, 0x0b, 0x60, 0x0c,
- 0xef, 0xc4, 0x70, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x04, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2c, 0x6c, 0xfd,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0x6c, 0x6d, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2c,
- 0x82, 0x65, 0xe0, 0x8c,
- 0x63, 0x35, 0x0c, 0x05,
- 0xa1, 0x0b, 0xc0, 0x0b,
- 0x0c, 0x15, 0x82, 0x65,
- 0xc0, 0x0b, 0x63, 0x15,
- 0x80, 0xd5, 0x83, 0x0b,
- 0x6d, 0x15, 0x0c, 0x09,
- 0x05, 0x55, 0xc0, 0x2c,
- 0x0c, 0x09, 0xc6, 0x09,
- 0xc0, 0x2c, 0x6c, 0x6d,
- 0xe0, 0x90, 0x40, 0x0a,
- 0x0c, 0x09, 0x86, 0x25,
- 0xc0, 0x2c, 0x6c, 0x89,
- 0x84, 0x85, 0xa1, 0x0b,
- 0x68, 0x0c, 0x42, 0x48,
- 0x0c, 0x11, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x6c, 0x89, 0x0c, 0x29,
- 0x0c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xf1, 0x88, 0x46, 0x12,
- 0x82, 0xf5, 0x87, 0x0d,
- 0x84, 0x0d, 0x82, 0x23,
- 0x0c, 0x09, 0x82, 0x95,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xf3, 0xf0, 0x40, 0x00,
- 0x6d, 0x15, 0x4c, 0x01,
- 0x0c, 0x0c, 0xc0, 0x2c,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6d, 0x15, 0x0c, 0x19,
- 0x4c, 0x01, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x6d, 0x05,
- 0x4c, 0x11, 0xc6, 0x19,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0xc1, 0xc3, 0xff, 0x35,
- 0x82, 0xc5, 0xa9, 0x3b,
- 0x02, 0xa5, 0xa3, 0x3b,
- 0x81, 0x88, 0x04, 0x24,
- 0x84, 0x85, 0xa5, 0x3b,
- 0x84, 0x85, 0xa7, 0x3b,
- 0x5c, 0x08, 0xa1, 0x3b,
- 0x0f, 0xd8, 0xda, 0x00,
- 0x89, 0x75, 0xff, 0x70,
- 0x5c, 0x08, 0xa1, 0x2b,
- 0x45, 0x34, 0x9a, 0x00,
- 0xec, 0x04, 0x04, 0x20,
- 0x7b, 0xfd, 0x46, 0x30,
- 0xc1, 0x3e, 0xdf, 0xff,
- 0x81, 0x31, 0xff, 0x65,
- 0x83, 0x31, 0x81, 0x45,
- 0xdd, 0x93, 0x81, 0x25,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x4b, 0xfe, 0x01, 0x41,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x04, 0x84, 0x85, 0x95,
- 0x06, 0x74, 0xa3, 0x3b,
- 0xc4, 0xc4, 0x88, 0x41,
- 0xa0, 0x11, 0x46, 0x64,
- 0x1b, 0xfd, 0x50, 0x80,
- 0x4e, 0x70, 0x9f, 0xff,
- 0x1f, 0xff, 0x1b, 0xfd,
- 0x12, 0x74, 0x8a, 0x8f,
- 0x58, 0xc0, 0x60, 0xe0,
- 0x9f, 0xff, 0x1b, 0xfc,
- 0x1b, 0xfd, 0x4c, 0x60,
- 0xb0, 0x9f, 0x1f, 0xff,
- 0x10, 0xc4, 0x51, 0x77,
- 0x61, 0xc7, 0xe0, 0xc0,
- 0xfb, 0x80, 0x0e, 0x74,
- 0x18, 0xc4, 0x50, 0x67,
- 0x2e, 0x8f, 0xfa, 0x80,
- 0x40, 0x95, 0xb8, 0x6f,
- 0x40, 0x85, 0xf8, 0x08,
- 0x40, 0x65, 0xf8, 0x04,
- 0xc5, 0x4d, 0xf0, 0x0c,
- 0x0c, 0x0c, 0xf4, 0xf5,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x90, 0x01, 0x45, 0x27,
- 0x49, 0xfe, 0x01, 0x31,
- 0xc0, 0x3f, 0x7f, 0xfd,
- 0x7f, 0xf1, 0x0a, 0x0e,
- 0x18, 0x0e, 0x40, 0x3f,
- 0xc0, 0x3f, 0x70, 0x01,
- 0x02, 0x65, 0x83, 0xd5,
- 0x86, 0x31, 0x70, 0x0c,
- 0xf8, 0x08, 0x02, 0x75,
- 0xf8, 0x04, 0x02, 0x85,
- 0x78, 0x10, 0x52, 0x62,
- 0x40, 0x95, 0xf1, 0x67,
- 0x12, 0x74, 0x78, 0x08,
- 0x0a, 0x9f, 0xe0, 0xa0,
- 0x2c, 0x9f, 0xe1, 0x77,
- 0xe0, 0xc0, 0x0c, 0x84,
- 0x78, 0x04, 0x40, 0x95,
- 0x2e, 0x6f, 0x98, 0x6f,
- 0x40, 0x65, 0xd1, 0x87,
- 0x40, 0x85, 0xf0, 0x10,
- 0xc5, 0x3d, 0xf8, 0x0c,
- 0x0c, 0x0c, 0xf8, 0x75,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x18, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0xbe, 0x3e, 0xe0, 0x10,
- 0xc5, 0x27, 0x7c, 0x3e,
- 0xa7, 0x2b, 0x7e, 0x3e,
- 0x66, 0x8a, 0x46, 0x4a,
- 0x0a, 0x26, 0x83, 0x41,
- 0x18, 0x06, 0x00, 0x00,
- 0x82, 0x65, 0x80, 0x00,
- 0x81, 0x51, 0x25, 0x2b,
- 0x81, 0x41, 0x03, 0xc1,
- 0xa3, 0x2b, 0x80, 0xc5,
- 0x01, 0x51, 0x80, 0xf5,
- 0x81, 0x41, 0x81, 0xc1,
- 0xfc, 0xce, 0xbe, 0x5e,
- 0xc0, 0x08, 0xfe, 0x4e,
- 0x00, 0x34, 0x00, 0x13,
- 0x01, 0xb5, 0xfa, 0x80,
- 0x48, 0x4a, 0x81, 0x31,
- 0x0a, 0xf0, 0x61, 0x0a,
- 0x82, 0x31, 0xe4, 0x10,
- 0x0a, 0x45, 0xc4, 0x47,
- 0xc5, 0x46, 0xfc, 0x10,
- 0xfa, 0x80, 0x08, 0x34,
- 0xfc, 0x95, 0xc1, 0x4d,
- 0xa0, 0xf1, 0x01, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x60, 0x1c, 0x00, 0x29,
- 0x00, 0x49, 0x81, 0x31,
- 0x85, 0x51, 0x60, 0x14,
- 0x7c, 0x3e, 0xbe, 0x3e,
- 0x27, 0x2b, 0xc5, 0x27,
- 0xe6, 0x8a, 0x48, 0x4a,
- 0x18, 0x16, 0x7e, 0x3e,
- 0x82, 0x05, 0x80, 0x00,
- 0x81, 0xc1, 0x25, 0x2b,
- 0xa3, 0x2b, 0x80, 0xa5,
- 0x01, 0x51, 0x80, 0xd5,
- 0xbe, 0x5e, 0x81, 0xc1,
- 0xfe, 0xce, 0xfc, 0x3e,
- 0x81, 0x31, 0x42, 0x08,
- 0x00, 0x44, 0x00, 0x13,
- 0x81, 0xa5, 0xfa, 0x80,
- 0x61, 0x0a, 0x48, 0x4a,
- 0xe4, 0x10, 0x0a, 0xf0,
- 0xc4, 0x47, 0x82, 0x31,
- 0xfc, 0x10, 0x0a, 0x45,
- 0x08, 0x34, 0xc5, 0x46,
- 0xc1, 0x4d, 0xfa, 0x80,
- 0x01, 0x01, 0xfc, 0x95,
- 0xdd, 0x93, 0xa0, 0xf1,
- 0xf8, 0x1c, 0x04, 0x0c,
- 0x61, 0x0c, 0x07, 0xc6,
- 0xe1, 0x0c, 0x49, 0x06,
- 0x46, 0x06, 0x0c, 0xc4,
- 0x0c, 0x64, 0xe1, 0x0c,
- 0xe1, 0x0c, 0x46, 0x86,
- 0x4f, 0x86, 0x10, 0x54,
- 0x0c, 0x44, 0xe1, 0x0c,
- 0x1c, 0x34, 0x8b, 0x81,
- 0xe4, 0x60, 0x0e, 0x00,
- 0x1c, 0x98, 0x81, 0x75,
- 0xec, 0x04, 0x10, 0x80,
- 0xdd, 0x98, 0xf1, 0x96,
- 0xa1, 0x8b, 0xd9, 0x96,
- 0x18, 0x00, 0xfe, 0x35,
- 0x89, 0x61, 0x64, 0x74,
- 0x71, 0x78, 0x81, 0x55,
- 0xec, 0x04, 0x0c, 0x60,
- 0xa1, 0x6b, 0xd5, 0x76,
- 0x1d, 0x51, 0xfe, 0x75,
- 0x81, 0x55, 0x80, 0xcb,
- 0x0a, 0x50, 0x71, 0x68,
- 0xd1, 0x66, 0xec, 0x04,
- 0xfe, 0x75, 0xa1, 0x5b,
- 0x95, 0x41, 0x1c, 0x01,
- 0x41, 0x58, 0x81, 0x55,
- 0xec, 0x04, 0x08, 0x40,
- 0xa1, 0x4b, 0xcd, 0x56,
- 0x00, 0x20, 0xfe, 0x75,
- 0x83, 0x31, 0x6c, 0x04,
- 0x68, 0x80, 0x00, 0x34,
- 0x08, 0x00, 0x81, 0xc1,
- 0x00, 0x34, 0x6c, 0x04,
- 0x0a, 0x00, 0xe8, 0x88,
- 0x81, 0x01, 0x6c, 0x04,
- 0x81, 0x61, 0x03, 0x45,
- 0x0e, 0x54, 0xe9, 0x2d,
- 0x00, 0x04, 0x48, 0xb0,
- 0x82, 0x55, 0xdb, 0x80,
- 0xe8, 0xb0, 0x0e, 0x44,
- 0x00, 0x60, 0x00, 0x73,
- 0x00, 0x34, 0xe4, 0x30,
- 0x0e, 0x74, 0x68, 0x80,
- 0x0e, 0x03, 0xfb, 0x80,
- 0x86, 0xc1, 0x82, 0x61,
- 0xfa, 0xb5, 0x8d, 0x1b,
- 0x61, 0x04, 0x42, 0x06,
- 0x6b, 0xfc, 0x01, 0x0a,
- 0x04, 0x14, 0xc0, 0xff,
- 0xdb, 0x80, 0x00, 0x04,
- 0x04, 0x01, 0x00, 0x00,
- 0x04, 0x0c, 0xc0, 0x80,
- 0x0c, 0x0c, 0x81, 0x01,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x42, 0x16, 0x00, 0x6b,
- 0x62, 0x98, 0xe0, 0x00,
- 0x0c, 0x09, 0xe8, 0x0c,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xe1, 0x0c, 0x42, 0x46,
- 0x0e, 0x60, 0x04, 0x14,
- 0xc0, 0xaf, 0x64, 0x31,
- 0x00, 0x0c, 0xa9, 0x0b,
- 0x04, 0x06, 0xe2, 0x00,
- 0x71, 0x58, 0x8e, 0x0b,
- 0x8c, 0x1b, 0x6f, 0xfc,
- 0x64, 0x38, 0x02, 0x60,
- 0x74, 0x78, 0x8e, 0x0b,
- 0x0c, 0x19, 0xef, 0xfc,
- 0x40, 0x2b, 0x6c, 0x39,
- 0xe4, 0x60, 0x00, 0x60,
- 0x6c, 0x41, 0x0c, 0x29,
- 0x81, 0x31, 0x40, 0x2b,
- 0x0c, 0x49, 0x81, 0x85,
- 0xa1, 0x4b, 0xfc, 0x04,
- 0x41, 0x16, 0x80, 0x75,
- 0x82, 0x11, 0x82, 0x31,
- 0xfe, 0x15, 0xc5, 0x3d,
- 0x6c, 0x3d, 0x0c, 0x09,
- 0x02, 0x60, 0x40, 0x2b,
- 0x0c, 0x39, 0xe4, 0x74,
- 0x40, 0x2b, 0x6c, 0x45,
- 0x44, 0x62, 0x81, 0x41,
- 0x01, 0x95, 0xf0, 0x80,
- 0x88, 0x58, 0x9c, 0x21,
- 0x80, 0x75, 0xa1, 0x5b,
- 0x82, 0x41, 0x45, 0x06,
- 0x82, 0x21, 0x02, 0x01,
- 0xfe, 0x15, 0xc7, 0x4d,
- 0x6c, 0x45, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6c, 0x41, 0x0c, 0x19,
- 0x74, 0x78, 0xc0, 0x2b,
- 0x42, 0x98, 0xef, 0xfc,
- 0x8c, 0x0b, 0x68, 0x10,
- 0x0c, 0x4c, 0x81, 0x01,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfe, 0x7c, 0x04, 0x0c,
- 0xed, 0x40, 0x1e, 0xf0,
- 0x40, 0x16, 0x00, 0x6b,
- 0x08, 0x9b, 0xe0, 0x04,
- 0x4c, 0x01, 0x86, 0xab,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x01, 0x01, 0x84, 0xbb,
- 0x5e, 0xb1, 0x82, 0x8b,
- 0x8a, 0x7b, 0x61, 0x30,
- 0x61, 0x20, 0x5e, 0xa1,
- 0xe2, 0x80, 0x02, 0x06,
- 0xe1, 0x10, 0x5e, 0x91,
- 0x9f, 0x0e, 0xa1, 0x0e,
- 0x5e, 0x01, 0x9d, 0x0e,
- 0x5e, 0x01, 0xe0, 0xd0,
- 0x5e, 0x01, 0xe0, 0xc0,
- 0x8c, 0x0b, 0x60, 0xb0,
- 0xe8, 0x0c, 0x5b, 0x68,
- 0x9f, 0x21, 0x01, 0x11,
- 0x8c, 0x3b, 0x0c, 0x0b,
- 0xe8, 0x04, 0x69, 0xa8,
- 0x60, 0x90, 0x00, 0x84,
- 0xe1, 0x8c, 0x02, 0x84,
- 0x40, 0x00, 0x0d, 0x8e,
- 0x4e, 0x09, 0xf1, 0xc0,
- 0xe0, 0x04, 0x0e, 0x6a,
- 0x71, 0x84, 0x50, 0x02,
- 0x93, 0x7e, 0x8f, 0x01,
- 0x00, 0xb8, 0x95, 0x8e,
- 0x80, 0x00, 0x40, 0x01,
- 0xfa, 0x80, 0x00, 0x84,
- 0x15, 0x0e, 0x90, 0x01,
- 0x5e, 0x01, 0x91, 0x01,
- 0x9f, 0x01, 0x60, 0xb0,
- 0x40, 0xa2, 0x0f, 0x0e,
- 0xb2, 0x0f, 0xf9, 0xac,
- 0x9a, 0xa5, 0xa1, 0x0b,
- 0x4f, 0x76, 0x1e, 0x89,
- 0x11, 0x8e, 0xe0, 0x00,
- 0xf0, 0xac, 0x50, 0xa2,
- 0x92, 0x83, 0x07, 0x65,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x4a, 0x58, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0x5e, 0xb1, 0xa1, 0x0b,
- 0x5e, 0xa1, 0xc1, 0x30,
- 0x5e, 0x91, 0xc1, 0x20,
- 0x15, 0x48, 0xc1, 0x10,
- 0x16, 0x0a, 0xc0, 0x00,
- 0x81, 0x01, 0x70, 0x00,
- 0x44, 0x04, 0x00, 0xb0,
- 0xf0, 0x00, 0x16, 0x4a,
- 0x62, 0x00, 0x02, 0x0c,
- 0xf0, 0x00, 0x14, 0x4a,
- 0x62, 0x00, 0x04, 0x0c,
- 0x14, 0x1a, 0x82, 0x83,
- 0x81, 0x11, 0x70, 0x00,
- 0x24, 0x05, 0x02, 0xa0,
- 0x84, 0x83, 0x40, 0x00,
- 0x70, 0x00, 0x12, 0x4a,
- 0x06, 0x0c, 0x81, 0x21,
- 0x12, 0x1a, 0x62, 0x00,
- 0x04, 0x90, 0xf0, 0x00,
- 0x40, 0x00, 0x24, 0x05,
- 0x04, 0x9b, 0x86, 0x83,
- 0x80, 0xbb, 0x82, 0xab,
- 0xf2, 0x65, 0xe8, 0x8d,
- 0x5e, 0xb1, 0x93, 0x04,
- 0x5e, 0xa1, 0xe1, 0x30,
- 0x11, 0x04, 0xe1, 0x20,
- 0x5e, 0x91, 0xa3, 0x0b,
- 0x5e, 0x07, 0xe1, 0x10,
- 0x15, 0x04, 0xe0, 0x3c,
- 0xe4, 0x20, 0x0e, 0x00,
- 0x1e, 0x75, 0x89, 0x7e,
- 0x16, 0x0a, 0x40, 0x20,
- 0x10, 0x74, 0xfb, 0xfc,
- 0xb0, 0x03, 0xfa, 0x80,
- 0x44, 0x00, 0x0c, 0x25,
- 0x15, 0x04, 0xf0, 0x7c,
- 0xe0, 0x80, 0x50, 0x0a,
- 0xa1, 0x2b, 0x88, 0x75,
- 0xa0, 0x01, 0x88, 0x85,
- 0x60, 0xd0, 0x5e, 0x01,
- 0xf3, 0xc0, 0x42, 0x00,
- 0x65, 0xc4, 0x02, 0x8a,
- 0x02, 0x80, 0x8e, 0x0b,
- 0x00, 0x80, 0x04, 0x3c,
- 0x5e, 0x11, 0x8c, 0x04,
- 0x83, 0x85, 0x80, 0xd0,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x43, 0x76, 0x40, 0x2b,
- 0x44, 0x18, 0xe0, 0x00,
- 0x8c, 0x0b, 0x6f, 0xc4,
- 0xe0, 0x00, 0x4f, 0x76,
- 0x0f, 0x48, 0xa1, 0x0b,
- 0x9b, 0xa1, 0xc0, 0x00,
- 0xe1, 0x20, 0x5e, 0xa1,
- 0xa1, 0x2b, 0xf1, 0x45,
- 0x84, 0x40, 0x00, 0x00,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x16, 0xf0, 0x65, 0x00,
- 0x3e, 0x0e, 0xe4, 0xd0,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x04, 0xf0, 0x0b, 0x2e,
- 0x3c, 0xbe, 0xe5, 0x30,
- 0xe4, 0xb0, 0x0a, 0xf0,
- 0x8c, 0x0b, 0x01, 0x11,
- 0x68, 0x00, 0x4d, 0xe8,
- 0x1e, 0xa9, 0x8c, 0x3b,
- 0x14, 0x0a, 0x60, 0xc0,
- 0x86, 0x05, 0xfb, 0xfc,
- 0xe0, 0x80, 0x4e, 0x0a,
- 0x44, 0x3c, 0x02, 0x70,
- 0xcc, 0x04, 0x00, 0x70,
- 0xc0, 0xd0, 0x5e, 0x11,
- 0x8b, 0x04, 0x82, 0xb5,
- 0xe0, 0x40, 0x00, 0x0a,
- 0xc0, 0x28, 0x1e, 0x05,
- 0xc4, 0x40, 0x00, 0x00,
- 0x80, 0x28, 0x1e, 0x05,
- 0x60, 0xd0, 0x5e, 0x01,
- 0x5e, 0x01, 0x8e, 0x0b,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xf0,
- 0x3e, 0x0e, 0xe5, 0x20,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x03, 0x11, 0xe4, 0xb0,
- 0x4b, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x60, 0xc0, 0x1e, 0x99,
- 0xfb, 0xfc, 0x12, 0x0a,
- 0x50, 0x4a, 0x86, 0xa5,
- 0x0e, 0x70, 0xe0, 0x80,
- 0x5e, 0x71, 0xcc, 0x04,
- 0x84, 0x95, 0xc0, 0xd0,
- 0xa1, 0x0b, 0x8b, 0x04,
- 0x80, 0x28, 0x1e, 0x05,
- 0x80, 0xd0, 0x5e, 0x01,
- 0x95, 0x04, 0x82, 0xa5,
- 0x5e, 0x01, 0xa0, 0x01,
- 0x42, 0x00, 0x60, 0xd0,
- 0x02, 0x8a, 0xf3, 0xc0,
- 0x0e, 0x80, 0xe5, 0xc4,
- 0x5e, 0x71, 0x8c, 0x08,
- 0x5e, 0x71, 0x80, 0xd0,
- 0x00, 0xf0, 0xe0, 0xc0,
- 0x04, 0xf0, 0x64, 0xe0,
- 0x3e, 0x0e, 0xe5, 0x10,
- 0xe4, 0xc0, 0x08, 0xf0,
- 0x0a, 0xf0, 0x3c, 0xbe,
- 0x05, 0x11, 0xe4, 0xb0,
- 0x48, 0x38, 0x8c, 0x0b,
- 0x8c, 0x3b, 0x68, 0x00,
- 0x80, 0x7b, 0x85, 0x81,
- 0x96, 0xd5, 0xa1, 0x7b,
- 0x8c, 0x3b, 0x13, 0x14,
- 0x1e, 0x19, 0x8f, 0x04,
- 0xa1, 0x1b, 0x60, 0xc0,
- 0x40, 0x10, 0x1e, 0x25,
- 0xfa, 0x80, 0x00, 0x04,
- 0xfb, 0x80, 0x40, 0xa2,
- 0x7b, 0x80, 0x40, 0x92,
- 0xfa, 0x80, 0x02, 0x14,
- 0x40, 0x20, 0x5e, 0x25,
- 0xfb, 0x80, 0x42, 0x12,
- 0x04, 0x04, 0x91, 0x04,
- 0x8c, 0x0b, 0x7a, 0x80,
- 0xe8, 0x04, 0x56, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x0b, 0x90, 0x35,
- 0x4c, 0xd8, 0x8c, 0x1b,
- 0x1e, 0x07, 0xe8, 0x00,
- 0x40, 0xc6, 0x60, 0x3c,
- 0x00, 0x04, 0xe1, 0x08,
- 0x01, 0x21, 0x85, 0x11,
- 0x02, 0x06, 0x81, 0x71,
- 0x00, 0x16, 0xc0, 0x00,
- 0xe1, 0x08, 0x41, 0x06,
- 0x02, 0x2c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0x46,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x08, 0x41, 0x86,
- 0x02, 0x0c, 0x80, 0x04,
- 0x00, 0x26, 0xe2, 0x00,
- 0xe1, 0x08, 0x41, 0xc6,
- 0x00, 0x16, 0x80, 0x04,
- 0xe1, 0x0c, 0x00, 0x06,
- 0x83, 0x11, 0x00, 0x04,
- 0x00, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x00, 0x86, 0x00, 0x86,
- 0x80, 0x04, 0xe1, 0x0c,
- 0x8d, 0x34, 0x80, 0x26,
- 0x9f, 0x14, 0xa1, 0x04,
- 0x4c, 0x31, 0x9d, 0x24,
- 0xc0, 0x27, 0x67, 0xe1,
- 0x67, 0xe5, 0x4c, 0x01,
- 0x4c, 0x11, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xe9,
- 0x67, 0xed, 0x4c, 0x21,
- 0x4c, 0x71, 0xc0, 0x27,
- 0x40, 0x27, 0x67, 0xf5,
- 0x13, 0x04, 0xa9, 0x31,
- 0x9f, 0x24, 0x8b, 0x41,
- 0x1d, 0x04, 0xa1, 0x14,
- 0x46, 0x16, 0xa1, 0x0b,
- 0x08, 0xf6, 0x40, 0x00,
- 0x44, 0x2a, 0xc0, 0x00,
- 0xd0, 0x17, 0x66, 0x8e,
- 0xe6, 0x92, 0x40, 0x0a,
- 0x80, 0x23, 0x82, 0x23,
- 0x69, 0x59, 0x4c, 0x25,
- 0x0e, 0x0b, 0xc0, 0x08,
- 0xe5, 0x40, 0x1e, 0xf0,
- 0xf6, 0x7c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x93, 0x34, 0x8f, 0x3e,
- 0x8b, 0x75, 0x91, 0x64,
- 0x94, 0x88, 0x90, 0x98,
- 0x94, 0xf5, 0xd1, 0x9d,
- 0x50, 0x02, 0x18, 0xa8,
- 0x10, 0x79, 0xf0, 0xa4,
- 0x40, 0x27, 0x63, 0x41,
- 0x56, 0xa2, 0x83, 0xc1,
- 0x10, 0xb4, 0xf1, 0xa4,
- 0x4e, 0x70, 0x61, 0x90,
- 0x16, 0x84, 0xfb, 0xfc,
- 0x16, 0xc4, 0xfa, 0x80,
- 0x96, 0x7f, 0xe8, 0xac,
- 0x86, 0x75, 0xa1, 0x7b,
- 0x10, 0x8a, 0x0f, 0xc4,
- 0x0e, 0xb6, 0xf4, 0x10,
- 0x16, 0x16, 0x00, 0x00,
- 0x4e, 0x72, 0x80, 0x00,
- 0x0e, 0x74, 0x91, 0xa0,
- 0x18, 0x79, 0x9a, 0x80,
- 0x16, 0xb4, 0x7c, 0x24,
- 0x98, 0x93, 0x88, 0x9c,
- 0xa4, 0x76, 0xb6, 0x7f,
- 0x0e, 0x70, 0x88, 0x78,
- 0x88, 0x76, 0xec, 0x04,
- 0x82, 0x71, 0x8c, 0x74,
- 0x98, 0xa8, 0x8c, 0x7e,
- 0x7a, 0x80, 0x12, 0xa4,
- 0xec, 0x04, 0x0e, 0x10,
- 0x64, 0x80, 0x14, 0x90,
- 0x98, 0xa6, 0xe5, 0x7d,
- 0xa1, 0x1b, 0x84, 0x55,
- 0x14, 0x8a, 0x86, 0x55,
- 0x84, 0xf5, 0xf6, 0x00,
- 0x0e, 0x90, 0x4a, 0xa7,
- 0x50, 0xa0, 0xed, 0x44,
- 0xb0, 0x73, 0xf0, 0x80,
- 0x90, 0x78, 0x98, 0x76,
- 0xec, 0x04, 0x0e, 0x70,
- 0x81, 0xb5, 0x90, 0x76,
- 0xf3, 0xfc, 0x15, 0x0a,
- 0x0e, 0x90, 0x82, 0x15,
- 0x98, 0x76, 0xed, 0x88,
- 0x0e, 0x70, 0x90, 0x78,
- 0x90, 0x76, 0xec, 0x08,
- 0xa1, 0x8b, 0x88, 0x88,
- 0x81, 0xc5, 0xea, 0x15,
- 0x6c, 0x1d, 0x00, 0x29,
- 0x43, 0x66, 0x40, 0x2b,
- 0x6d, 0xb8, 0xe0, 0x08,
- 0x4d, 0x66, 0x6f, 0xc0,
- 0xa1, 0x0b, 0xe0, 0x08,
- 0x81, 0x61, 0x80, 0x55,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x40, 0x1e, 0xf0,
- 0x66, 0xb1, 0x04, 0x00,
- 0x91, 0x31, 0x40, 0x8b,
- 0x81, 0x41, 0x01, 0x55,
- 0x06, 0x30, 0x49, 0x4e,
- 0xa1, 0x3b, 0xec, 0x04,
- 0x01, 0x21, 0xfe, 0x95,
- 0x01, 0x51, 0x81, 0x31,
- 0x8b, 0x95, 0x81, 0x41,
- 0x10, 0x44, 0x7c, 0x2e,
- 0x7e, 0x1e, 0xfa, 0x80,
- 0xf4, 0x08, 0x08, 0x8a,
- 0x88, 0x81, 0x04, 0x28,
- 0x81, 0x91, 0x3e, 0x4e,
- 0x0c, 0x24, 0x88, 0xab,
- 0x0e, 0x24, 0x61, 0x94,
- 0x04, 0x69, 0xe1, 0x9c,
- 0xe1, 0x84, 0x18, 0x24,
- 0x0e, 0x24, 0x2e, 0x6f,
- 0x08, 0x79, 0xe1, 0x8c,
- 0x2e, 0x6f, 0x90, 0xc9,
- 0x38, 0x6f, 0x9e, 0x29,
- 0x48, 0x67, 0xa9, 0xc1,
- 0x80, 0x00, 0x58, 0x16,
- 0x8b, 0x61, 0x2c, 0x2f,
- 0x00, 0x00, 0x0c, 0xf6,
- 0xfa, 0x80, 0x0e, 0x24,
- 0x4e, 0x0a, 0x85, 0x75,
- 0x86, 0x65, 0xe4, 0xa4,
- 0x7a, 0x80, 0x08, 0xa4,
- 0xf0, 0x00, 0x06, 0x5a,
- 0x70, 0x00, 0x06, 0x0a,
- 0x04, 0x1c, 0x98, 0xbb,
- 0x02, 0x54, 0x62, 0x00,
- 0x44, 0x47, 0xfa, 0x80,
- 0xdc, 0x00, 0x56, 0x60,
- 0x44, 0x02, 0x05, 0x1b,
- 0x04, 0x15, 0xf0, 0x90,
- 0x40, 0x08, 0x6b, 0xad,
- 0x80, 0x10, 0x16, 0x06,
- 0x44, 0x15, 0x96, 0x13,
- 0xc0, 0x08, 0x6b, 0xad,
- 0x60, 0x0c, 0x12, 0x1a,
- 0x0a, 0x0a, 0x82, 0x91,
- 0x54, 0x80, 0x7b, 0xfc,
- 0x0a, 0x0c, 0xbc, 0x00,
- 0xb1, 0x9b, 0xe2, 0x00,
- 0x7c, 0x24, 0xf6, 0x35,
- 0xbe, 0x44, 0x83, 0x39,
- 0x7c, 0x0c, 0x04, 0x0a,
- 0x02, 0x0c, 0x82, 0x21,
- 0x7e, 0x14, 0xe2, 0x00,
- 0x82, 0x11, 0x82, 0x43,
- 0xf4, 0x3c, 0x05, 0x0a,
- 0x01, 0x01, 0xe8, 0xc5,
- 0x0c, 0x0c, 0xa0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0xfa, 0x7c, 0x04, 0x0c,
- 0xec, 0x30, 0x1e, 0xf0,
- 0x40, 0x56, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7c, 0x0e, 0x81, 0x01,
- 0x71, 0x78, 0x8c, 0x0b,
- 0x0c, 0x09, 0xe8, 0x00,
- 0xc0, 0x2b, 0x65, 0xf9,
- 0xe0, 0x80, 0x40, 0x0a,
- 0x05, 0x01, 0x00, 0x60,
- 0x02, 0x06, 0x40, 0x9b,
- 0x4f, 0xf8, 0xc0, 0x00,
- 0x04, 0x06, 0x4f, 0x6c,
- 0x0c, 0x09, 0xc0, 0x18,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x88, 0xf5, 0xab, 0x0b,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x00, 0xc0, 0x2c,
- 0xc2, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x8c, 0x0b, 0x40, 0x2c,
- 0xef, 0xf4, 0x7a, 0xc8,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x80, 0x7b, 0x40, 0x2c,
- 0x43, 0x06, 0x21, 0x7b,
- 0x83, 0x21, 0xef, 0xdc,
- 0x40, 0x00, 0x04, 0x26,
- 0xc4, 0x09, 0xf3, 0xf0,
- 0x6d, 0x21, 0x4c, 0x01,
- 0x82, 0x65, 0xc0, 0x2c,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x61, 0xa8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0xc0, 0x00, 0x0c, 0x38,
- 0x81, 0x11, 0x01, 0x71,
- 0x81, 0xa1, 0x13, 0x55,
- 0x12, 0xb4, 0x3e, 0x34,
- 0xd0, 0x9d, 0xfa, 0x80,
- 0x00, 0x4a, 0x9c, 0x35,
- 0x9a, 0xc5, 0xfb, 0xfc,
- 0x70, 0x00, 0x06, 0x0a,
- 0x01, 0x11, 0x96, 0x0b,
- 0x84, 0x05, 0x81, 0x21,
- 0xf0, 0x04, 0x06, 0x0a,
- 0x00, 0x00, 0x00, 0x06,
- 0x9c, 0x00, 0x42, 0xb0,
- 0x04, 0x06, 0x02, 0x25,
- 0x06, 0x0a, 0x80, 0x00,
- 0x82, 0xb5, 0xf0, 0x08,
- 0x81, 0x11, 0x01, 0x01,
- 0x4c, 0x01, 0x96, 0x2b,
- 0xc0, 0x27, 0x67, 0xe5,
- 0x67, 0xe9, 0x4c, 0x11,
- 0x4c, 0x21, 0xc0, 0x27,
- 0xc0, 0x27, 0x67, 0xed,
- 0x80, 0xf5, 0xa1, 0x7b,
- 0x6f, 0xf4, 0x76, 0x48,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0x82, 0x45, 0xa1, 0x7b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0x6f, 0xc0, 0x5d, 0xe8,
- 0xa1, 0x0b, 0x8e, 0x1b,
- 0x02, 0xf0, 0xa0, 0xf5,
- 0x8c, 0x0b, 0x64, 0x20,
- 0xe8, 0x00, 0x4e, 0x88,
- 0x80, 0x7b, 0x7c, 0x04,
- 0x65, 0xf9, 0x0c, 0x19,
- 0x44, 0x86, 0x40, 0x2b,
- 0x40, 0x0a, 0xe0, 0x3c,
- 0x42, 0x0a, 0xe0, 0x0a,
- 0xcf, 0x07, 0xe0, 0x80,
- 0x84, 0x05, 0xfc, 0x0e,
- 0x7a, 0x80, 0x02, 0xa4,
- 0x65, 0x00, 0x04, 0x60,
- 0x06, 0x14, 0xc0, 0x9b,
- 0x04, 0x33, 0xe0, 0x88,
- 0x8c, 0x0e, 0x82, 0x23,
- 0xe4, 0x00, 0x44, 0xb1,
- 0x44, 0x11, 0xbc, 0x14,
- 0x0c, 0x1b, 0xe5, 0x00,
- 0x40, 0x15, 0x6a, 0xf9,
- 0xc3, 0x0d, 0x82, 0xa1,
- 0xd1, 0x9d, 0x86, 0x25,
- 0x07, 0xf5, 0x0c, 0x09,
- 0x16, 0xb0, 0x40, 0x27,
- 0xe6, 0x75, 0xc4, 0x04,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x88, 0x55, 0xe0, 0x0c,
- 0x41, 0x56, 0x03, 0xc5,
- 0xbc, 0x14, 0xe0, 0x00,
- 0x16, 0x0a, 0x83, 0xd5,
- 0x43, 0xf6, 0x70, 0x14,
- 0x86, 0x15, 0xe0, 0x0c,
- 0x02, 0x0a, 0xbc, 0x14,
- 0x84, 0x95, 0xf0, 0x0c,
- 0x6a, 0xf5, 0x0c, 0x1b,
- 0xc1, 0x1d, 0xc0, 0x15,
- 0x0c, 0x1b, 0x82, 0x05,
- 0xc0, 0x15, 0x6a, 0xf1,
- 0x43, 0xf6, 0x43, 0x0d,
- 0x82, 0x15, 0xe0, 0x0c,
- 0xe0, 0x00, 0x41, 0x46,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x43, 0xf6, 0x40, 0x27,
- 0x03, 0x0a, 0xe0, 0x0c,
- 0x86, 0xd5, 0xf4, 0x0c,
- 0x67, 0xf5, 0x0c, 0x09,
- 0x00, 0x4a, 0xc0, 0x27,
- 0x86, 0x05, 0xfb, 0xfc,
- 0x67, 0xe1, 0x0c, 0x29,
- 0x8c, 0x0b, 0x40, 0x27,
- 0x82, 0x11, 0x3e, 0x1e,
- 0x02, 0x14, 0x3c, 0x1e,
- 0x41, 0xd8, 0xfa, 0x80,
- 0x80, 0x8b, 0xe8, 0x00,
- 0x16, 0x56, 0xeb, 0x8d,
- 0x00, 0x06, 0x00, 0x00,
- 0xd4, 0x65, 0x80, 0x00,
- 0xe0, 0x00, 0x41, 0x36,
- 0x67, 0xf5, 0x4c, 0x01,
- 0x4c, 0xa1, 0xc0, 0x27,
- 0x40, 0x26, 0x6c, 0xf1,
- 0x73, 0xd8, 0x8c, 0x0b,
- 0x41, 0x06, 0xef, 0xb4,
- 0x81, 0x11, 0x6f, 0xdc,
- 0x0e, 0x0b, 0x80, 0x16,
- 0x0c, 0x0c, 0x98, 0xf1,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0xf8, 0x1c, 0x04, 0xcc,
- 0x67, 0xf1, 0x00, 0x59,
- 0xa7, 0x1b, 0x40, 0x27,
- 0x18, 0x24, 0x01, 0x31,
- 0x15, 0x3c, 0xe1, 0x8c,
- 0x05, 0x41, 0x8f, 0x61,
- 0x80, 0x04, 0x0f, 0x56,
- 0x02, 0x16, 0x04, 0x85,
- 0x25, 0x1b, 0x80, 0x00,
- 0xe0, 0x08, 0x4e, 0xa6,
- 0x00, 0x00, 0x02, 0x06,
- 0x80, 0x00, 0x10, 0x06,
- 0x23, 0x1b, 0x82, 0x65,
- 0x02, 0x95, 0x81, 0x41,
- 0x03, 0x56, 0x81, 0x11,
- 0x83, 0x41, 0x60, 0x04,
- 0x81, 0x11, 0x29, 0x16,
- 0x12, 0xf0, 0x83, 0x81,
- 0xb0, 0x9f, 0xe4, 0x50,
- 0x38, 0x63, 0xa4, 0x76,
- 0xfb, 0xfc, 0x0a, 0x4a,
- 0x70, 0x1c, 0x58, 0x20,
- 0x0a, 0x64, 0x81, 0x21,
- 0xff, 0x61, 0x7a, 0x80,
- 0x00, 0x00, 0x04, 0x86,
- 0xe8, 0xb0, 0x18, 0x64,
- 0x08, 0x44, 0x05, 0x55,
- 0x4c, 0x12, 0xfa, 0x80,
- 0x10, 0xf0, 0x70, 0x88,
- 0x00, 0x63, 0xe4, 0x50,
- 0x0c, 0x79, 0x8b, 0x1b,
- 0x40, 0x27, 0x63, 0x41,
- 0xe1, 0xfc, 0x0c, 0x14,
- 0x0c, 0x64, 0x82, 0x63,
- 0x4c, 0x12, 0xfc, 0x00,
- 0x10, 0x69, 0xf1, 0x98,
- 0x4e, 0x72, 0x7c, 0x18,
- 0x0c, 0x7f, 0x98, 0x30,
- 0xa1, 0x7b, 0x81, 0x61,
- 0x50, 0x04, 0x50, 0x70,
- 0xc1, 0x84, 0x0e, 0x74,
- 0x4c, 0x62, 0x7e, 0x75,
- 0x06, 0x34, 0xd0, 0xa0,
- 0x88, 0x13, 0x7a, 0x80,
- 0x8a, 0x1d, 0x8c, 0x33,
- 0x00, 0x34, 0xf6, 0xa5,
- 0x0c, 0xcc, 0xfa, 0x80,
- 0xdd, 0x93, 0xf0, 0x1c,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x82, 0x7b, 0x00, 0x6b,
- 0x6d, 0x59, 0x0c, 0x05,
- 0x91, 0x21, 0x40, 0x0a,
- 0x6e, 0x0d, 0x0c, 0x15,
- 0x5e, 0xb8, 0xc0, 0x09,
- 0x0c, 0x29, 0xef, 0xa8,
- 0x40, 0x2b, 0x65, 0x51,
- 0xe1, 0x18, 0x43, 0x46,
- 0x83, 0x51, 0x04, 0x14,
- 0x84, 0x18, 0x84, 0x48,
- 0x63, 0x7d, 0x0c, 0x35,
- 0x9e, 0x49, 0xc0, 0x0b,
- 0x8e, 0x19, 0xc9, 0x17,
- 0x02, 0x24, 0x23, 0x5f,
- 0x63, 0xf8, 0xe0, 0x90,
- 0x04, 0x54, 0x6f, 0xa8,
- 0x46, 0x78, 0xe8, 0x90,
- 0x80, 0x8b, 0x6f, 0xe8,
- 0x60, 0x10, 0x02, 0x06,
- 0x65, 0x98, 0x90, 0x2b,
- 0x8e, 0x3b, 0x6f, 0xa8,
- 0xa1, 0x7b, 0x80, 0x7b,
- 0x0c, 0x29, 0x82, 0xe5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x4b, 0xb8, 0x8c, 0x0b,
- 0x8e, 0x1b, 0x6f, 0xc0,
- 0x0e, 0x06, 0xa3, 0x0b,
- 0x8e, 0x0b, 0xc0, 0x00,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0x81, 0x01, 0xdd, 0x93,
- 0xf2, 0x0c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x64, 0xc1, 0x00, 0x39,
- 0x02, 0x16, 0x40, 0x2b,
- 0x40, 0x11, 0xe0, 0x0c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x19, 0x83, 0x41,
- 0xc0, 0x15, 0x62, 0x19,
- 0x66, 0x35, 0x00, 0x2b,
- 0x00, 0x59, 0xc0, 0x16,
- 0xc0, 0x2b, 0x65, 0x0d,
- 0x6c, 0x75, 0x40, 0x11,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2b, 0x6c, 0x11,
- 0x70, 0x05, 0x44, 0x20,
- 0x40, 0x31, 0xc0, 0x80,
- 0x40, 0x2c, 0x6c, 0x7d,
- 0x7e, 0xf9, 0x44, 0x20,
- 0x00, 0x39, 0xc0, 0x79,
- 0xc0, 0x2b, 0x65, 0x09,
- 0x60, 0x94, 0x42, 0x4a,
- 0x40, 0x11, 0x85, 0x11,
- 0xc0, 0x22, 0x65, 0x95,
- 0x6d, 0x31, 0x40, 0x11,
- 0x02, 0x06, 0x40, 0x2c,
- 0x40, 0x41, 0xc0, 0x00,
- 0xc0, 0x2c, 0x6c, 0x8d,
- 0x6c, 0x85, 0x40, 0x51,
- 0x40, 0x23, 0xc0, 0x2c,
- 0xc0, 0x16, 0x66, 0x35,
- 0x6d, 0x35, 0x40, 0x31,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x2c, 0x0c, 0x81,
- 0x0e, 0x19, 0x40, 0x13,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x2b, 0x0c, 0x59,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe0, 0x14, 0x02, 0x29,
- 0x66, 0x35, 0x00, 0x3b,
- 0x84, 0x44, 0xc0, 0x16,
- 0x06, 0x34, 0x82, 0x29,
- 0x40, 0x45, 0xfc, 0x00,
- 0x40, 0x0b, 0x63, 0x15,
- 0x40, 0x33, 0xa4, 0x3f,
- 0x40, 0x16, 0x66, 0x35,
- 0xef, 0xdc, 0x08, 0x86,
- 0x60, 0x24, 0x02, 0x29,
- 0xfc, 0x0c, 0x06, 0x34,
- 0xc2, 0x27, 0x90, 0x58,
- 0x4a, 0x50, 0x04, 0x29,
- 0xa4, 0x5f, 0xf3, 0xf4,
- 0x02, 0x29, 0x90, 0x56,
- 0xc6, 0x27, 0xe0, 0x28,
- 0xa6, 0x2f, 0x90, 0x29,
- 0x66, 0x35, 0x40, 0x23,
- 0x04, 0x24, 0x40, 0x16,
- 0x02, 0x39, 0xfc, 0x10,
- 0xc8, 0x37, 0xe0, 0x2c,
- 0xa4, 0x3f, 0xa0, 0x39,
- 0x66, 0x35, 0x40, 0x33,
- 0x46, 0x30, 0x40, 0x16,
- 0xc0, 0xff, 0x73, 0x7d,
- 0xe0, 0x30, 0x02, 0x29,
- 0x44, 0x20, 0xca, 0x27,
- 0x00, 0x29, 0xf0, 0x80,
- 0x40, 0x2b, 0x64, 0xc5,
- 0x40, 0x33, 0xa4, 0x3f,
- 0xc0, 0x16, 0x66, 0x35,
- 0xe0, 0x10, 0x02, 0x39,
- 0x40, 0x31, 0xa7, 0x2b,
- 0xc0, 0x2c, 0x6c, 0x71,
- 0x00, 0x29, 0x80, 0xf5,
- 0xc0, 0x2b, 0x6c, 0x11,
- 0xe0, 0x94, 0x44, 0x4a,
- 0x02, 0x29, 0x82, 0x65,
- 0x02, 0x39, 0xe0, 0x18,
- 0x40, 0x21, 0xe0, 0x20,
- 0xc0, 0x2c, 0x6c, 0x79,
- 0x66, 0x31, 0x40, 0x33,
- 0x02, 0x29, 0xc0, 0x16,
- 0x00, 0x39, 0xe0, 0x3c,
- 0xc0, 0x2c, 0x6d, 0x21,
- 0x6d, 0x39, 0x00, 0x59,
- 0x82, 0x29, 0xc0, 0x2c,
- 0xfc, 0x00, 0x06, 0x34,
- 0x60, 0x1c, 0x02, 0x29,
- 0x40, 0x31, 0xa4, 0x3f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xfc, 0x04, 0x06, 0x34,
- 0x60, 0x40, 0x02, 0x49,
- 0xf3, 0xf8, 0x4a, 0x50,
- 0x6c, 0x89, 0x40, 0x21,
- 0x04, 0x00, 0x40, 0x2c,
- 0xc0, 0x6e, 0x64, 0xc1,
- 0x84, 0x49, 0xc2, 0x47,
- 0x40, 0x41, 0xa6, 0x4f,
- 0x40, 0x2c, 0x6d, 0x21,
- 0xf3, 0xec, 0x48, 0x40,
- 0xe0, 0x44, 0x02, 0x39,
- 0xa6, 0x5f, 0x82, 0x39,
- 0x6d, 0x39, 0x40, 0x51,
- 0x02, 0x39, 0xc0, 0x2c,
- 0xc4, 0x37, 0xe0, 0x48,
- 0xa6, 0x4f, 0x88, 0x39,
- 0x6d, 0x21, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x4c,
- 0xc0, 0x2c, 0x6d, 0x15,
- 0x46, 0x30, 0xca, 0x37,
- 0x48, 0x40, 0x70, 0x80,
- 0xa6, 0x4f, 0xf3, 0x7c,
- 0x6d, 0x15, 0x40, 0x41,
- 0x02, 0x39, 0xc0, 0x2c,
- 0x00, 0x49, 0xe0, 0x50,
- 0xc0, 0x2c, 0x6d, 0x51,
- 0x08, 0x44, 0x82, 0x39,
- 0xa6, 0x4f, 0xfc, 0x00,
- 0x6d, 0x51, 0x40, 0x41,
- 0x08, 0x44, 0x40, 0x2c,
- 0x02, 0x39, 0xfc, 0x04,
- 0xc2, 0x37, 0xe0, 0x54,
- 0xa8, 0x3f, 0x84, 0x39,
- 0x6d, 0x51, 0x40, 0x31,
- 0x06, 0x34, 0x40, 0x2c,
- 0x02, 0x49, 0xfc, 0x08,
- 0xc4, 0x47, 0xe0, 0x58,
- 0xa8, 0x3f, 0x88, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x46, 0x30, 0x40, 0x2c,
- 0x02, 0x49, 0xf3, 0xdc,
- 0xc6, 0x47, 0xe0, 0x5c,
- 0xa8, 0x3f, 0x90, 0x49,
- 0x6d, 0x51, 0x40, 0x31,
- 0x9f, 0x31, 0x40, 0x2c,
- 0x02, 0x49, 0x81, 0x65,
- 0x06, 0x30, 0x60, 0x34,
- 0xc9, 0x46, 0xec, 0x04,
- 0xfe, 0x55, 0xa1, 0x3b,
- 0xe0, 0x38, 0x02, 0x29,
- 0x68, 0xfd, 0x40, 0x21,
- 0x02, 0x19, 0xc0, 0x1b,
- 0x40, 0x11, 0xe0, 0x34,
- 0xc0, 0x22, 0x6f, 0xb9,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x0c, 0x05, 0x80, 0x6b,
- 0xc0, 0x0a, 0x6d, 0x65,
- 0x62, 0x19, 0x0c, 0x19,
- 0x0c, 0x29, 0xc0, 0x15,
- 0xc0, 0x2b, 0x6c, 0x21,
- 0x65, 0xb9, 0x0c, 0x39,
- 0x3c, 0x0e, 0xc0, 0x2b,
- 0x11, 0x16, 0x81, 0x01,
- 0x0f, 0x36, 0x83, 0x11,
- 0x8b, 0x06, 0xa3, 0x2b,
- 0x82, 0x25, 0x8d, 0x16,
- 0x82, 0x85, 0xa7, 0x2b,
- 0x5e, 0x11, 0xa5, 0x2b,
- 0x04, 0x26, 0x00, 0x24,
- 0x80, 0x85, 0x80, 0x00,
- 0x45, 0xf6, 0x13, 0x06,
- 0x03, 0x45, 0xe0, 0x0c,
- 0x0c, 0x4b, 0x83, 0x31,
- 0x40, 0x15, 0x6e, 0x09,
- 0x0c, 0x25, 0xfd, 0x51,
- 0xc0, 0x0d, 0x69, 0x65,
- 0x21, 0x2b, 0xcb, 0x47,
- 0x06, 0x0c, 0x85, 0x21,
- 0xc8, 0x4b, 0x62, 0x00,
- 0x04, 0x16, 0x13, 0x36,
- 0x46, 0x42, 0xc0, 0x00,
- 0x0c, 0x49, 0xf9, 0x94,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0x8b, 0x21, 0x09, 0x26,
- 0x00, 0x16, 0x27, 0x06,
- 0xc0, 0x40, 0x70, 0x11,
- 0x82, 0x49, 0x0b, 0x0e,
- 0x8c, 0x0b, 0x15, 0x36,
- 0x99, 0x36, 0x97, 0x36,
- 0x9d, 0x26, 0x9b, 0x16,
- 0xa1, 0x16, 0x9f, 0x46,
- 0xa5, 0x16, 0xa3, 0x16,
- 0xef, 0xfc, 0x69, 0x68,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x6d, 0x88,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x70, 0x00, 0x02, 0x16,
- 0xe0, 0x04, 0x04, 0x06,
- 0x81, 0x01, 0x00, 0x6b,
- 0x83, 0x11, 0x3e, 0x1e,
- 0x8b, 0x21, 0x11, 0x26,
- 0x9b, 0x16, 0xbc, 0x0e,
- 0x9f, 0x06, 0x9d, 0x26,
- 0xa3, 0x06, 0xa1, 0x16,
- 0xa7, 0x06, 0xa5, 0x06,
- 0xab, 0x16, 0xa9, 0x16,
- 0xaf, 0x06, 0xad, 0x16,
- 0x8c, 0x0b, 0x13, 0x06,
- 0x97, 0x16, 0x95, 0x16,
- 0x66, 0xd8, 0x99, 0x16,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x6a, 0xf8, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x61, 0xd1, 0x0c, 0x19,
- 0x0c, 0x39, 0xc0, 0x15,
- 0xc0, 0x15, 0x62, 0x19,
- 0x6d, 0x65, 0x0c, 0x05,
- 0x89, 0x16, 0xc0, 0x0a,
- 0x65, 0xb9, 0x0c, 0x19,
- 0x11, 0x36, 0xc0, 0x2b,
- 0x3c, 0x0e, 0x87, 0x31,
- 0x8f, 0x16, 0x81, 0x01,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x1b, 0x36, 0xc0, 0x2b,
- 0x8b, 0x06, 0x8d, 0x31,
- 0x82, 0x19, 0x0d, 0x26,
- 0x02, 0x16, 0x1f, 0x16,
- 0xc0, 0x40, 0x70, 0x11,
- 0xa1, 0x26, 0x9d, 0x36,
- 0xa5, 0x26, 0xa3, 0x26,
- 0x13, 0x06, 0xa7, 0x06,
- 0x8b, 0x1e, 0x8c, 0x0b,
- 0x97, 0x26, 0x95, 0x26,
- 0x63, 0x38, 0x99, 0x26,
- 0x1e, 0x1b, 0xef, 0xfc,
- 0x67, 0x58, 0x8c, 0x0b,
- 0xb0, 0xf1, 0xef, 0xfc,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x83, 0x21, 0x00, 0x6b,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x81, 0x41, 0x40, 0x2b,
- 0x62, 0x19, 0x0c, 0x39,
- 0x0a, 0x16, 0x40, 0x15,
- 0xbc, 0x4e, 0xf0, 0x00,
- 0x61, 0x8c, 0x02, 0x04,
- 0x11, 0x36, 0x82, 0x09,
- 0xf8, 0x88, 0x42, 0x12,
- 0x8b, 0x31, 0x1f, 0x06,
- 0x8c, 0x0b, 0x3e, 0x5e,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa3, 0x46, 0xa1, 0x46,
- 0xa7, 0x16, 0xa5, 0x46,
- 0xab, 0x46, 0xa9, 0x26,
- 0xaf, 0x46, 0xad, 0x26,
- 0x95, 0x26, 0x93, 0x46,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x60, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x64, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x00, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x04, 0x16, 0x00, 0x6b,
- 0xc0, 0x04, 0x60, 0x11,
- 0x6c, 0x21, 0x0c, 0x09,
- 0xa1, 0x31, 0x40, 0x2b,
- 0x83, 0x21, 0x3e, 0x2e,
- 0x8b, 0x31, 0x11, 0x36,
- 0x60, 0x34, 0x00, 0x4a,
- 0x02, 0x0c, 0x81, 0x01,
- 0xbc, 0x0e, 0xe2, 0x00,
- 0x9d, 0x36, 0x9b, 0x26,
- 0xa1, 0x06, 0x9f, 0x06,
- 0xa5, 0x26, 0xa3, 0x06,
- 0xa9, 0x26, 0xa7, 0x16,
- 0x13, 0x06, 0xab, 0x06,
- 0xad, 0x26, 0x8c, 0x0b,
- 0x95, 0x26, 0xaf, 0x26,
- 0x99, 0x26, 0x97, 0x26,
- 0xef, 0xfc, 0x5d, 0x08,
- 0x8c, 0x0b, 0x1e, 0x1b,
- 0xef, 0xfc, 0x61, 0x28,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x0c, 0x04, 0x0c,
- 0x02, 0x06, 0x00, 0x6b,
- 0x74, 0x98, 0xe2, 0x80,
- 0x40, 0x46, 0xe8, 0x04,
- 0x0f, 0x86, 0x60, 0x04,
- 0x4c, 0x01, 0xe0, 0x10,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x81, 0x95, 0x8c, 0x8b,
- 0x63, 0x81, 0x10, 0x09,
- 0x40, 0xf8, 0xc0, 0x27,
- 0x61, 0x06, 0xe8, 0x00,
- 0xec, 0x04, 0x0e, 0x70,
- 0xfc, 0xf5, 0xa1, 0x7b,
- 0x45, 0x76, 0x01, 0x11,
- 0x0c, 0x0b, 0xe0, 0x00,
- 0x0c, 0x0c, 0x8c, 0x3b,
- 0xa9, 0x15, 0xf2, 0x0c,
- 0x61, 0x84, 0x04, 0x04,
- 0xe1, 0x8c, 0x02, 0x04,
- 0x70, 0x80, 0x44, 0x20,
- 0xf0, 0x3c, 0x48, 0x00,
- 0x60, 0x84, 0x06, 0x04,
- 0x28, 0x2f, 0xa0, 0x19,
- 0x46, 0x30, 0xc6, 0x07,
- 0xa2, 0x2f, 0x71, 0x00,
- 0x72, 0x00, 0x40, 0x00,
- 0x5d, 0x93, 0xa6, 0x2f,
- 0xc1, 0xc3, 0xa4, 0x0f,
- 0x60, 0x04, 0x48, 0x26,
- 0x64, 0x0c, 0x4b, 0x06,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x0d, 0x48, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0x81, 0x15, 0x85, 0x31,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x41, 0x06, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x14,
- 0x47, 0x86, 0x86, 0x7b,
- 0x52, 0x46, 0x60, 0x04,
- 0x4c, 0x31, 0xe1, 0x2c,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x00, 0x38, 0xad, 0x7b,
- 0xe0, 0x39, 0x81, 0xb1,
- 0x00, 0x06, 0x00, 0x36,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x47, 0x96,
- 0x6c, 0x1d, 0x4c, 0x31,
- 0x83, 0x31, 0x40, 0x2b,
- 0xa4, 0x04, 0x80, 0x36,
- 0x86, 0x85, 0x80, 0xb6,
- 0x8a, 0x05, 0xa3, 0x7b,
- 0x8c, 0xc5, 0xa5, 0x7b,
- 0x90, 0x25, 0xa7, 0x7b,
- 0x92, 0xe5, 0xa9, 0x7b,
- 0x84, 0x45, 0xab, 0x7b,
- 0x96, 0xb5, 0xa1, 0x7b,
- 0x61, 0x2c, 0x01, 0x06,
- 0x80, 0x04, 0x9f, 0x11,
- 0x01, 0x46, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x16,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf3, 0xe4,
- 0x01, 0x86, 0x8b, 0xa5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0xc6, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xfd, 0x80,
- 0x01, 0x06, 0x89, 0xc5,
- 0x9f, 0x11, 0x61, 0x2c,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0x46,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf3, 0xe4, 0x42, 0x10,
- 0x80, 0x16, 0xc4, 0x19,
- 0x01, 0x06, 0x87, 0xc5,
- 0x80, 0x04, 0xe1, 0x2c,
- 0x01, 0x46, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x2c,
- 0xa4, 0x04, 0x80, 0x26,
- 0xcc, 0x19, 0x80, 0x18,
- 0x85, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0x83, 0xf5, 0x80, 0x16,
- 0x61, 0x2c, 0x01, 0x86,
- 0xe0, 0x00, 0x43, 0x76,
- 0x00, 0xb6, 0x80, 0x04,
- 0xe1, 0x2c, 0x01, 0xc6,
- 0x80, 0x16, 0x80, 0x04,
- 0x80, 0x18, 0xa4, 0x04,
- 0xf2, 0x7c, 0x42, 0x10,
- 0xfc, 0x94, 0x02, 0x14,
- 0x81, 0xd5, 0x80, 0x16,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x59, 0x88,
- 0x9a, 0x85, 0xa3, 0x0b,
- 0xe1, 0x2c, 0x54, 0xc6,
- 0x80, 0x08, 0xa8, 0x04,
- 0x80, 0xf5, 0xa1, 0x0b,
- 0xe1, 0x34, 0x01, 0x46,
- 0x80, 0x04, 0x80, 0x04,
- 0x82, 0xb5, 0xb1, 0x0b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xa6, 0x40, 0x2b,
- 0x03, 0xa6, 0xe0, 0x08,
- 0x8c, 0x0b, 0x60, 0x08,
- 0xef, 0xbc, 0x58, 0x08,
- 0x94, 0x85, 0xa3, 0x0b,
- 0xe4, 0x7d, 0x24, 0x04,
- 0x88, 0xd5, 0x80, 0x18,
- 0x81, 0x21, 0x42, 0x19,
- 0x42, 0x86, 0x00, 0x16,
- 0x71, 0x98, 0xe0, 0x3c,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x61, 0x44, 0x00, 0xc6,
- 0xe1, 0x34, 0x05, 0x46,
- 0xa8, 0x14, 0x80, 0x04,
- 0x80, 0x38, 0x88, 0x24,
- 0x48, 0x0a, 0x84, 0x48,
- 0x80, 0x85, 0xe0, 0x80,
- 0xb5, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x8e, 0x15,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xb5, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x75,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x11, 0xb6,
- 0x03, 0xb6, 0x05, 0x75,
- 0x60, 0x19, 0xe0, 0x08,
- 0x00, 0x16, 0x81, 0x21,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x68, 0x00, 0x6f, 0x48,
- 0x00, 0xc6, 0x8c, 0x0b,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa8, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0xe0, 0x90, 0x48, 0x0a,
- 0x88, 0x44, 0x80, 0x85,
- 0x84, 0x75, 0xb3, 0x4b,
- 0xe0, 0x8c, 0x46, 0x0a,
- 0x88, 0x34, 0x80, 0x85,
- 0xfc, 0x75, 0xb3, 0x3b,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x11, 0xc6, 0x40, 0x2b,
- 0x03, 0xc6, 0xe0, 0x08,
- 0x52, 0xf8, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xbc,
- 0x80, 0x45, 0xa3, 0x0b,
- 0x73, 0xd8, 0x81, 0x81,
- 0x24, 0x04, 0xe8, 0x00,
- 0xe0, 0x08, 0x02, 0xf6,
- 0x41, 0x06, 0x00, 0xb6,
- 0x80, 0x04, 0xe1, 0x14,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x80, 0x18, 0xc0, 0x2b,
- 0xf3, 0xbc, 0x42, 0x10,
- 0x00, 0x06, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x18,
- 0x90, 0x0b, 0x00, 0xb6,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x04, 0x48, 0x56,
- 0x64, 0x20, 0x0b, 0x86,
- 0x40, 0x41, 0xc0, 0x20,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x64, 0x11, 0x08, 0x06,
- 0x81, 0x35, 0xc0, 0x20,
- 0xd1, 0xc6, 0xcd, 0xc8,
- 0xfe, 0xb5, 0x8b, 0x4b,
- 0xdb, 0x75, 0x8d, 0x31,
- 0x64, 0x31, 0x49, 0x06,
- 0x4b, 0xc6, 0x40, 0x20,
- 0xc0, 0x20, 0x64, 0x39,
- 0xcd, 0xc8, 0x81, 0x35,
- 0x8b, 0x4b, 0xd1, 0xc6,
- 0x8b, 0x31, 0xfe, 0xb5,
- 0xc1, 0xc3, 0xd9, 0xa5,
- 0xe0, 0x04, 0x44, 0x76,
- 0x6c, 0x1d, 0x40, 0x21,
- 0x41, 0xc6, 0x40, 0x2b,
- 0xc0, 0x20, 0x64, 0x39,
- 0x05, 0xc6, 0x01, 0x65,
- 0xc0, 0x20, 0x64, 0x3d,
- 0xc1, 0x36, 0xc5, 0x38,
- 0xfe, 0xb5, 0x85, 0x0b,
- 0x81, 0x01, 0x5d, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x81, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x6b, 0x08,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0x9a, 0x66, 0xf1,
- 0x64, 0x0d, 0x51, 0x06,
- 0xa1, 0x91, 0x40, 0x20,
- 0xe1, 0x08, 0x81, 0x75,
- 0xef, 0xfc, 0x67, 0xc8,
- 0x12, 0x90, 0x5d, 0x06,
- 0xa1, 0x9b, 0xec, 0x04,
- 0x8c, 0x0b, 0xfe, 0x35,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x11, 0x00, 0x7b,
- 0x87, 0x31, 0x01, 0x21,
- 0xef, 0xfc, 0x69, 0x28,
- 0x0e, 0x70, 0x00, 0x6b,
- 0xc0, 0xb3, 0x66, 0xb1,
- 0x64, 0x21, 0x11, 0x86,
- 0x13, 0x86, 0x40, 0x20,
- 0x81, 0x75, 0xe0, 0x10,
- 0x65, 0xd8, 0xe1, 0x08,
- 0x5d, 0x06, 0xef, 0xfc,
- 0xec, 0x04, 0x12, 0x90,
- 0xfe, 0x35, 0xa1, 0x9b,
- 0x0c, 0x4c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x1c,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x46, 0x00, 0x6b,
- 0x00, 0x04, 0xe1, 0x18,
- 0xe0, 0x04, 0x42, 0x36,
- 0x6c, 0x1d, 0x4c, 0x11,
- 0x83, 0xb1, 0x40, 0x2b,
- 0x61, 0x30, 0x55, 0xc6,
- 0x00, 0xb6, 0x81, 0x91,
- 0xe1, 0x34, 0x10, 0xc6,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x34, 0x00, 0x06,
- 0x84, 0x28, 0x80, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x80, 0x04, 0x84, 0x26,
- 0x9e, 0x19, 0x80, 0x18,
- 0xff, 0x40, 0x42, 0x10,
- 0x00, 0x86, 0x00, 0x16,
- 0x80, 0x04, 0xe1, 0x34,
- 0xa0, 0x04, 0x80, 0x96,
- 0xa1, 0x0b, 0x80, 0x08,
- 0x01, 0x46, 0x80, 0xf5,
- 0x80, 0x04, 0xe1, 0x34,
- 0xbb, 0x0b, 0x80, 0x04,
- 0x0c, 0x29, 0x82, 0xb5,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xa6,
- 0x60, 0x08, 0x03, 0xa6,
- 0x46, 0xb8, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x28, 0x04, 0x8a, 0x45,
- 0xe0, 0x3c, 0x42, 0x86,
- 0x00, 0xb6, 0x81, 0x21,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x00, 0xc6, 0xe8, 0x00,
- 0x05, 0x46, 0x61, 0x44,
- 0x80, 0x04, 0xe1, 0x34,
- 0x88, 0x24, 0xa0, 0x14,
- 0x84, 0x48, 0x80, 0x38,
- 0x80, 0x85, 0xa1, 0x4b,
- 0xbd, 0x4b, 0x88, 0x44,
- 0x46, 0x0a, 0x84, 0x75,
- 0x80, 0x85, 0xe0, 0x8c,
- 0xbd, 0x3b, 0x88, 0x34,
- 0x0c, 0x29, 0xfc, 0x95,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x08, 0x0f, 0xc6,
- 0x60, 0x08, 0x03, 0xc6,
- 0x44, 0x38, 0x8c, 0x0b,
- 0xa3, 0x0b, 0xef, 0xbc,
- 0x81, 0x71, 0x80, 0x45,
- 0xe8, 0x00, 0x65, 0x28,
- 0x00, 0x96, 0xa8, 0x04,
- 0xe1, 0x18, 0x00, 0x46,
- 0x00, 0x96, 0x80, 0x04,
- 0x0c, 0x4c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x7c,
- 0x00, 0x25, 0xa1, 0x1b,
- 0x00, 0x0b, 0x05, 0x21,
- 0x81, 0x2c, 0x43, 0xc6,
- 0x80, 0x00, 0x02, 0x15,
- 0x80, 0x00, 0x42, 0x25,
- 0xa3, 0x1b, 0x80, 0xc5,
- 0xa5, 0x1b, 0x80, 0x85,
- 0x83, 0x65, 0x82, 0x25,
- 0x65, 0x31, 0x00, 0x25,
- 0x02, 0x06, 0x40, 0x0b,
- 0x84, 0x14, 0xe1, 0x30,
- 0x00, 0x25, 0x84, 0x2e,
- 0x40, 0x0b, 0x65, 0x21,
- 0xe1, 0x2c, 0x43, 0xc6,
- 0x04, 0x2e, 0x84, 0x14,
- 0xe1, 0x30, 0x02, 0x06,
- 0x65, 0x31, 0x00, 0x05,
- 0x84, 0x14, 0xc0, 0x0b,
- 0xdd, 0x93, 0x84, 0x0e,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x18, 0x04, 0x46,
- 0x08, 0x34, 0xa5, 0x1b,
- 0x8c, 0x46, 0x81, 0x41,
- 0xa3, 0x1b, 0x88, 0x25,
- 0x43, 0x06, 0x10, 0x25,
- 0xa1, 0x1b, 0x81, 0x2c,
- 0x00, 0x39, 0x9a, 0x35,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x4b, 0xb6, 0x04, 0x14,
- 0x89, 0xc1, 0xe0, 0x0c,
- 0x84, 0x48, 0x82, 0x39,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x87, 0x31, 0x26, 0x4f,
- 0x43, 0x76, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x0c,
- 0x40, 0x2d, 0x65, 0x31,
- 0x65, 0x31, 0x00, 0x00,
- 0x07, 0xd5, 0xc0, 0xb5,
- 0x00, 0x49, 0xc2, 0x47,
- 0x40, 0x2d, 0x65, 0x31,
- 0xe1, 0x2c, 0x43, 0x06,
- 0x82, 0x49, 0x84, 0x34,
- 0x4a, 0x50, 0x8c, 0x58,
- 0xa8, 0x5f, 0xf3, 0xf8,
- 0x84, 0x34, 0x8c, 0x56,
- 0x65, 0x31, 0x00, 0x49,
- 0x8c, 0x58, 0xc0, 0x2d,
- 0x88, 0x49, 0xc2, 0x47,
- 0xf3, 0xec, 0x4a, 0x50,
- 0x8c, 0x56, 0xa8, 0x5f,
- 0x00, 0x49, 0x84, 0x34,
- 0xc0, 0x2d, 0x65, 0x31,
- 0xc2, 0x47, 0x8c, 0x58,
- 0x4a, 0x50, 0x90, 0x49,
- 0xa8, 0x5f, 0xf3, 0xdc,
- 0x04, 0x14, 0x8c, 0x56,
- 0xe0, 0x08, 0x4b, 0xf6,
- 0x65, 0x35, 0x00, 0x39,
- 0x18, 0x06, 0x40, 0x2d,
- 0x84, 0x48, 0xe0, 0x04,
- 0xa0, 0x39, 0xc8, 0x37,
- 0xf3, 0xbc, 0x48, 0x40,
- 0x8f, 0x31, 0x26, 0x4f,
- 0x43, 0xf6, 0x04, 0x46,
- 0x00, 0x49, 0xe0, 0x04,
- 0x40, 0x2d, 0x65, 0x35,
- 0x65, 0x35, 0x00, 0x00,
- 0xca, 0x47, 0xc0, 0xb5,
- 0x61, 0x2c, 0x4d, 0x06,
- 0x18, 0x74, 0x98, 0x4f,
- 0xfa, 0x80, 0x06, 0x34,
- 0x8a, 0x8f, 0x9c, 0x88,
- 0x9c, 0x86, 0xa8, 0x8f,
- 0x80, 0x08, 0x98, 0x44,
- 0xc5, 0x07, 0x90, 0x58,
- 0x27, 0x0f, 0x82, 0x09,
- 0xa0, 0x5f, 0x82, 0x5f,
- 0x08, 0x04, 0x90, 0x56,
- 0x80, 0x16, 0x83, 0x11,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x0c, 0x04, 0x4c,
- 0x61, 0x88, 0x04, 0x14,
- 0xe1, 0x98, 0x47, 0x86,
- 0x86, 0x19, 0x0c, 0x54,
- 0x60, 0x90, 0x08, 0x24,
- 0x64, 0xb0, 0x06, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x0a, 0x43, 0xc4, 0x47,
- 0x81, 0xd5, 0x81, 0x51,
- 0x18, 0xc0, 0x5d, 0x84,
- 0x4c, 0x85, 0xec, 0x04,
- 0xa1, 0xcb, 0xf0, 0x10,
- 0x20, 0x31, 0xfe, 0x55,
- 0x08, 0x40, 0x82, 0x51,
- 0xc0, 0x01, 0x64, 0x01,
- 0x18, 0x46, 0xa5, 0x5b,
- 0x4c, 0x40, 0x40, 0x00,
- 0x7c, 0x95, 0xdc, 0x00,
- 0xdc, 0x00, 0x4e, 0x30,
- 0x61, 0x98, 0x46, 0x86,
- 0xe0, 0x00, 0x4b, 0x86,
- 0x65, 0x16, 0x44, 0x2a,
- 0x64, 0x00, 0x00, 0x00,
- 0x0c, 0x34, 0xc0, 0x8c,
- 0xe0, 0x0c, 0x48, 0x06,
- 0x81, 0x51, 0x03, 0x35,
- 0x65, 0x12, 0x4c, 0x5a,
- 0xf0, 0xb0, 0x4e, 0x12,
- 0x00, 0x65, 0x84, 0x63,
- 0x8c, 0x73, 0x7c, 0x30,
- 0x88, 0xc1, 0x44, 0x77,
- 0x9c, 0x6e, 0x86, 0x73,
- 0xe0, 0xe0, 0x18, 0x0a,
- 0x70, 0x01, 0xfc, 0x55,
- 0xb5, 0x5b, 0x82, 0x51,
- 0x18, 0x06, 0x7e, 0x55,
- 0x81, 0x01, 0xc0, 0x00,
- 0xf0, 0x0c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x3c, 0x04, 0x4c,
- 0x61, 0x88, 0x06, 0x14,
- 0xe0, 0x08, 0x0b, 0x06,
- 0x93, 0x21, 0x06, 0x19,
- 0x66, 0x96, 0x4a, 0x3a,
- 0xe0, 0x90, 0x08, 0x34,
- 0x66, 0x8a, 0x58, 0x1a,
- 0x65, 0xb0, 0x0c, 0x00,
- 0xa2, 0x4f, 0xc0, 0x8b,
- 0x81, 0xc1, 0x18, 0x53,
- 0x0e, 0x60, 0x83, 0x75,
- 0x89, 0x81, 0x64, 0x40,
- 0x8a, 0xab, 0x08, 0x9b,
- 0x59, 0xae, 0x81, 0x85,
- 0xec, 0x04, 0x10, 0x80,
- 0x60, 0x1c, 0x4c, 0x95,
- 0x88, 0x91, 0xc8, 0xa1,
- 0xfe, 0x15, 0xa1, 0x8b,
- 0x0a, 0x50, 0x02, 0xc1,
- 0xc0, 0x02, 0x65, 0x01,
- 0x65, 0x00, 0x08, 0x40,
- 0xa5, 0xcb, 0x8e, 0x6b,
- 0x4b, 0x86, 0xfa, 0x35,
- 0x08, 0x00, 0x60, 0x00,
- 0xc0, 0x90, 0x65, 0x80,
- 0x65, 0x16, 0x46, 0x3a,
- 0xe0, 0x0c, 0x40, 0x06,
- 0x81, 0x51, 0x03, 0x55,
- 0x65, 0x02, 0x4e, 0x5a,
- 0xf0, 0x98, 0x50, 0x12,
- 0x70, 0x98, 0x52, 0x42,
- 0x86, 0x73, 0x88, 0x61,
- 0x4e, 0x8a, 0x8e, 0x83,
- 0xa4, 0x7e, 0xe6, 0x8a,
- 0xe2, 0x30, 0x52, 0x85,
- 0xe0, 0xe0, 0x0c, 0x0a,
- 0x02, 0x51, 0xfc, 0x15,
- 0xb5, 0x5b, 0x98, 0x4b,
- 0x44, 0xe0, 0x18, 0x40,
- 0xc0, 0x00, 0x0c, 0x06,
- 0x81, 0x01, 0xfc, 0xd5,
- 0xf0, 0x3c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6f, 0xfc, 0x44, 0x68,
- 0x8c, 0x0b, 0x80, 0x6b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xff, 0xf0, 0x05, 0xe8,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x28, 0x65, 0x41,
- 0x00, 0x00, 0x5d, 0x93,
- 0xc0, 0x2b, 0x66, 0x11,
- 0x61, 0x08, 0x03, 0x86,
- 0x84, 0x14, 0x9d, 0x21,
- 0x03, 0x06, 0x04, 0x26,
- 0x04, 0x24, 0xe1, 0x08,
- 0x08, 0x16, 0x83, 0x11,
- 0xe1, 0x14, 0x45, 0x06,
- 0x88, 0x38, 0x88, 0x24,
- 0x08, 0x36, 0xc8, 0x39,
- 0x60, 0x01, 0x06, 0x06,
- 0x00, 0x25, 0xc0, 0x40,
- 0xc0, 0x0a, 0x6e, 0xf1,
- 0xa1, 0x21, 0x47, 0x2d,
- 0x08, 0x05, 0x00, 0x29,
- 0x01, 0x46, 0x00, 0x27,
- 0x80, 0x04, 0xe1, 0x28,
- 0x01, 0x06, 0x00, 0x26,
- 0x80, 0x04, 0xe1, 0x28,
- 0xdd, 0x93, 0x80, 0x16,
- 0xe1, 0x28, 0x03, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0x87, 0x2b, 0x84, 0x38,
- 0x02, 0x20, 0xfe, 0xb5,
- 0x40, 0x11, 0xed, 0x5c,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x60, 0x08, 0x43, 0x56,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x39, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x22,
- 0x60, 0x08, 0x43, 0x66,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x31,
- 0x65, 0x59, 0x40, 0x11,
- 0xdd, 0x93, 0xc0, 0x1b,
- 0x60, 0x08, 0x43, 0x96,
- 0xe1, 0x28, 0x05, 0x86,
- 0x6c, 0x1d, 0x40, 0x11,
- 0x88, 0x14, 0xc0, 0x2b,
- 0x84, 0x38, 0x84, 0x28,
- 0xfe, 0xb5, 0x87, 0x2b,
- 0xed, 0x5c, 0x02, 0x20,
- 0x6d, 0x01, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x2c,
- 0xc0, 0x15, 0x61, 0x35,
- 0x62, 0xf1, 0x40, 0x11,
- 0x40, 0x11, 0xc0, 0x15,
- 0xc0, 0x1b, 0x65, 0x5d,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0x06, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x00, 0xc6, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x6e, 0x01, 0x00, 0x0b,
- 0x07, 0xc6, 0x40, 0x15,
- 0x0c, 0x34, 0xe1, 0x44,
- 0x87, 0x21, 0xa1, 0x2b,
- 0xe6, 0x86, 0x40, 0x0a,
- 0x01, 0x86, 0x0c, 0x0e,
- 0x80, 0x14, 0xe1, 0x44,
- 0x5c, 0x08, 0x84, 0x26,
- 0x80, 0x04, 0x9a, 0x00,
- 0x42, 0x4a, 0x80, 0x18,
- 0xfe, 0xa5, 0xe0, 0x8c,
- 0x80, 0x16, 0x81, 0x11,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xf8, 0x00, 0x04, 0x4c,
- 0x61, 0x38, 0x4b, 0xc6,
- 0x14, 0x34, 0x85, 0x61,
- 0x8c, 0x48, 0xa1, 0x2b,
- 0xf3, 0xec, 0x48, 0x40,
- 0x48, 0x46, 0x0c, 0x46,
- 0x10, 0xc4, 0xe1, 0x44,
- 0xb0, 0x36, 0x81, 0x31,
- 0xb0, 0x66, 0x90, 0xc4,
- 0x30, 0x36, 0x90, 0xc4,
- 0xe1, 0x44, 0x58, 0x86,
- 0x6e, 0x01, 0x00, 0x0b,
- 0xb0, 0xc4, 0xc0, 0x15,
- 0x66, 0x86, 0x40, 0x0a,
- 0xb0, 0x0e, 0x87, 0x11,
- 0x00, 0x16, 0x90, 0x04,
- 0xe1, 0x3c, 0x00, 0x06,
- 0x84, 0xc8, 0x80, 0x14,
- 0x84, 0xc6, 0xc8, 0xc9,
- 0x80, 0x18, 0x80, 0x04,
- 0xf3, 0xec, 0x42, 0x10,
- 0x94, 0x04, 0x80, 0x16,
- 0xc8, 0x19, 0x80, 0x18,
- 0x80, 0xe5, 0x80, 0x16,
- 0x80, 0x18, 0x90, 0x04,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x80, 0x36, 0xfe, 0xa5,
- 0xf0, 0x00, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x44, 0x00, 0xc6,
- 0x80, 0x04, 0x81, 0x11,
- 0xdd, 0x93, 0x80, 0x16,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x43, 0xe6, 0x02, 0x9b,
- 0x08, 0x6b, 0xe0, 0x04,
- 0x40, 0x11, 0x86, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x41, 0xb8, 0x84, 0x8b,
- 0x42, 0x06, 0xe8, 0x00,
- 0xc2, 0x67, 0x61, 0x18,
- 0x84, 0x69, 0x04, 0x14,
- 0x42, 0x46, 0x04, 0x96,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x86, 0x04, 0x86,
- 0x84, 0x14, 0xe1, 0x18,
- 0x42, 0x06, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x10,
- 0x44, 0x20, 0x84, 0x28,
- 0xac, 0x2f, 0xf3, 0xf4,
- 0x0c, 0x0c, 0x84, 0x26,
- 0x83, 0xf5, 0xf2, 0x9c,
- 0x61, 0x14, 0x41, 0x06,
- 0xe1, 0x14, 0x47, 0x86,
- 0x81, 0x41, 0x00, 0x14,
- 0x84, 0x18, 0x84, 0x28,
- 0xcb, 0x27, 0x8c, 0x34,
- 0x82, 0x19, 0x04, 0x29,
- 0xa4, 0x1f, 0x0c, 0x5a,
- 0x80, 0x34, 0x8c, 0x4c,
- 0x8c, 0x48, 0xe0, 0x57,
- 0xf3, 0xf8, 0x48, 0x40,
- 0x00, 0x34, 0x8c, 0x46,
- 0xf9, 0x84, 0x40, 0x52,
- 0x42, 0x40, 0x8c, 0x48,
- 0x8c, 0x16, 0xf2, 0xfc,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0x61, 0x14, 0x43, 0x86,
- 0xe1, 0xc0, 0x04, 0x04,
- 0x48, 0x00, 0x04, 0x14,
- 0xca, 0x07, 0xf0, 0x04,
- 0xf1, 0x00, 0x40, 0x00,
- 0x43, 0x06, 0x04, 0x2c,
- 0x84, 0x24, 0xe1, 0x14,
- 0x46, 0x30, 0x88, 0x38,
- 0xa8, 0x3f, 0xf3, 0xf8,
- 0x84, 0x14, 0x88, 0x36,
- 0x44, 0x20, 0x84, 0x28,
- 0xa0, 0x2f, 0xf2, 0xfc,
- 0xdd, 0x93, 0x84, 0x26,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x41, 0xf6, 0x00, 0x9b,
- 0x06, 0x6b, 0xe0, 0x04,
- 0x52, 0x01, 0x84, 0x7b,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x7b, 0xd8, 0x82, 0x8b,
- 0x12, 0x29, 0xef, 0xfc,
- 0x40, 0x2c, 0x6e, 0x95,
- 0xe1, 0x1c, 0x02, 0x46,
- 0xc8, 0x87, 0x04, 0x14,
- 0x71, 0xc0, 0x48, 0x80,
- 0x04, 0x26, 0x9e, 0x79,
- 0xe1, 0x18, 0x43, 0x46,
- 0x88, 0x38, 0x84, 0x24,
- 0xf2, 0x3c, 0x46, 0x30,
- 0x88, 0x36, 0xa8, 0x3f,
- 0x84, 0x28, 0x84, 0x14,
- 0xf3, 0xc0, 0x44, 0x20,
- 0x04, 0x26, 0xae, 0x2f,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x84, 0x66, 0x84, 0x14,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xf7, 0xa5,
- 0xfa, 0x84, 0x04, 0x0c,
- 0x82, 0x6b, 0x00, 0x7b,
- 0x65, 0x35, 0x0e, 0x39,
- 0x0e, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x3d, 0x0e, 0x19,
- 0x7c, 0x58, 0xc0, 0x2b,
- 0x0e, 0x0b, 0xef, 0xfc,
- 0x66, 0xb8, 0x8c, 0x1b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x84,
- 0x8c, 0x1b, 0x0e, 0x0b,
- 0xf2, 0x84, 0x0c, 0x0c,
- 0xe0, 0x00, 0x27, 0xe8,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x41, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x04,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0xe0, 0x04, 0x43, 0xa6,
- 0x6f, 0xfc, 0x7d, 0x88,
- 0x80, 0x7b, 0x8c, 0x0b,
- 0xa4, 0xd5, 0xa1, 0x7b,
- 0x65, 0x3d, 0x0c, 0x29,
- 0x0c, 0x19, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0x39,
- 0x65, 0x35, 0x0c, 0x09,
- 0x64, 0xb8, 0xc0, 0x2b,
- 0x00, 0x8b, 0xef, 0xa0,
- 0xe1, 0x04, 0x01, 0x46,
- 0x90, 0x2b, 0x00, 0x04,
- 0x0c, 0xa5, 0x80, 0x94,
- 0xc0, 0x09, 0x6e, 0x0d,
- 0x65, 0x41, 0x0c, 0x39,
- 0x92, 0x0b, 0xc0, 0x2b,
- 0x6f, 0xa0, 0x64, 0x88,
- 0x4c, 0x05, 0x94, 0x1b,
- 0x40, 0x0b, 0x63, 0x6d,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x49,
- 0x63, 0xd8, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x63, 0x65, 0x4c, 0x05,
- 0x92, 0x0b, 0x40, 0x0b,
- 0x65, 0x45, 0x0c, 0x39,
- 0x94, 0x1b, 0x40, 0x2b,
- 0x6f, 0xa0, 0x63, 0x28,
- 0x4c, 0x05, 0x90, 0x2b,
- 0x40, 0x0b, 0x63, 0x71,
- 0x0c, 0x39, 0x92, 0x0b,
- 0x40, 0x2b, 0x65, 0x4d,
- 0x62, 0x78, 0x94, 0x1b,
- 0x90, 0x2b, 0x6f, 0xa0,
- 0x6d, 0x59, 0x0c, 0x15,
- 0x91, 0x21, 0x40, 0x0a,
- 0x63, 0x69, 0x4c, 0x05,
- 0x02, 0x0b, 0xc0, 0x0b,
- 0x5e, 0xf8, 0x94, 0x1b,
- 0x4c, 0x05, 0xef, 0xa0,
- 0x40, 0x06, 0x6d, 0x49,
- 0xe1, 0x1c, 0x02, 0x86,
- 0x4c, 0x05, 0x84, 0x14,
- 0xc0, 0x08, 0x69, 0x41,
- 0x6b, 0x1d, 0x4c, 0x05,
- 0x4c, 0x05, 0xc0, 0x08,
- 0xc0, 0x08, 0x6b, 0xf1,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x1b, 0x65, 0x71,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x65, 0x51,
- 0x4c, 0x01, 0x84, 0x08,
- 0xc0, 0x22, 0x6c, 0xa1,
- 0x43, 0x46, 0x04, 0x08,
- 0x84, 0x14, 0xe1, 0x18,
- 0x6f, 0xf1, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x1b, 0x65, 0x75,
- 0x9e, 0x09, 0x84, 0x08,
- 0x65, 0x55, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x4c, 0x01, 0x9e, 0x09,
- 0xc0, 0x22, 0x6c, 0xa5,
- 0x9e, 0x09, 0x84, 0x08,
- 0x6f, 0xf5, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x79, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x1b,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x65, 0x59, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6c, 0xa9, 0x4c, 0x01,
- 0x84, 0x08, 0xc0, 0x22,
- 0x8e, 0x09, 0xc9, 0x07,
- 0x6f, 0xf9, 0x4c, 0x01,
- 0x40, 0x78, 0xc0, 0x22,
- 0x8c, 0x0b, 0x68, 0x00,
- 0x0c, 0x0c, 0x8e, 0x0b,
- 0xdd, 0x93, 0xf2, 0x3c,
- 0x68, 0xb1, 0x00, 0x1b,
- 0x06, 0x0e, 0x40, 0x0a,
- 0xc3, 0xd0, 0x64, 0x01,
- 0xe1, 0x84, 0x04, 0x14,
- 0x6c, 0x79, 0x00, 0x39,
- 0x86, 0x23, 0x40, 0x2c,
- 0xe0, 0x06, 0x42, 0x2a,
- 0xe1, 0x84, 0x04, 0x34,
- 0x42, 0x2a, 0x82, 0x23,
- 0x00, 0x2b, 0xe0, 0x0e,
- 0xc0, 0x0a, 0x68, 0xb5,
- 0x02, 0x06, 0xc4, 0x1d,
- 0x42, 0x12, 0x80, 0x00,
- 0x40, 0x15, 0xd1, 0x88,
- 0xc0, 0x0b, 0x63, 0x75,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x9c, 0x04, 0x0c,
- 0x0c, 0x19, 0x80, 0x6b,
- 0xc0, 0x2b, 0x64, 0xc1,
- 0x65, 0x51, 0x0c, 0x99,
- 0x0c, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x65, 0xc9,
- 0xec, 0x04, 0x00, 0x10,
- 0xc7, 0x97, 0x65, 0x0d,
- 0x81, 0x01, 0x02, 0x15,
- 0x0c, 0x09, 0xa7, 0x1b,
- 0xc0, 0x2c, 0x0e, 0x31,
- 0x83, 0x01, 0x80, 0xb5,
- 0x6e, 0x31, 0x4c, 0x01,
- 0x0c, 0x09, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0xf0, 0x04, 0x00, 0x0a,
- 0x8e, 0x93, 0x02, 0x75,
- 0xe0, 0x8c, 0x40, 0x4a,
- 0x05, 0x4d, 0x00, 0x60,
- 0x01, 0xc5, 0x80, 0xad,
- 0x05, 0x49, 0x00, 0x60,
- 0x40, 0x4a, 0xc0, 0xad,
- 0x00, 0x60, 0xe0, 0x8c,
- 0x80, 0xad, 0x05, 0x45,
- 0x05, 0x41, 0x00, 0x60,
- 0x80, 0x88, 0xc0, 0xad,
- 0x6f, 0xa0, 0x4e, 0x08,
- 0x02, 0x94, 0x90, 0x0b,
- 0x81, 0x41, 0x7a, 0x80,
- 0x61, 0x02, 0x46, 0x1a,
- 0x10, 0x1b, 0x8c, 0x0b,
- 0x64, 0xb8, 0x8e, 0x2b,
- 0x0c, 0x09, 0xef, 0xfc,
- 0xc0, 0x2b, 0x65, 0x51,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0xc8, 0x07, 0xc0, 0x2b,
- 0x6a, 0xa9, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x0d,
- 0xc0, 0x11, 0x62, 0x99,
- 0x66, 0x49, 0x4c, 0x03,
- 0x4c, 0x03, 0xc0, 0x11,
- 0x40, 0x11, 0x67, 0xf1,
- 0x52, 0x18, 0x8c, 0x0b,
- 0xa1, 0x0b, 0xe8, 0x00,
- 0x0c, 0x0c, 0x80, 0x85,
- 0xdd, 0x93, 0xf2, 0x9c,
- 0x6c, 0x1d, 0x0c, 0x19,
- 0x8c, 0x0b, 0x40, 0x2b,
- 0xf2, 0x9c, 0x0c, 0x0c,
- 0xc1, 0xc3, 0x9f, 0x85,
- 0xf8, 0x04, 0x04, 0x0c,
- 0x6e, 0x31, 0x00, 0x19,
- 0x00, 0x19, 0xc0, 0x2c,
- 0x40, 0x2c, 0x6d, 0x0d,
- 0x82, 0x45, 0xa1, 0x1b,
- 0xe0, 0x8c, 0x42, 0x4a,
- 0x05, 0xa1, 0x04, 0x00,
- 0x01, 0xc5, 0x80, 0xb3,
- 0x05, 0x91, 0x04, 0x00,
- 0x42, 0x4a, 0xc0, 0xb3,
- 0x04, 0x00, 0xe0, 0x8c,
- 0x80, 0xb3, 0x05, 0xc1,
- 0x05, 0xb1, 0x04, 0x00,
- 0x00, 0x69, 0xc0, 0xb3,
- 0xc0, 0x2b, 0x64, 0xcd,
- 0x00, 0x5b, 0x88, 0x24,
- 0xc0, 0x15, 0x6a, 0xd1,
- 0x6a, 0xe1, 0x00, 0x4b,
- 0xa3, 0x6b, 0x40, 0x15,
- 0x68, 0xc9, 0x00, 0xcb,
- 0x00, 0x3b, 0xc0, 0x0a,
- 0xc0, 0x0a, 0x68, 0xcd,
- 0x04, 0x61, 0x00, 0x65,
- 0x84, 0xc5, 0x80, 0x05,
- 0x00, 0x65, 0xa5, 0x6b,
- 0x80, 0x05, 0x04, 0x5d,
- 0x00, 0x75, 0x84, 0x25,
- 0x40, 0x0b, 0x63, 0x75,
- 0x02, 0x85, 0xa7, 0x6b,
- 0x9c, 0x00, 0x4c, 0x70,
- 0x64, 0x5d, 0x00, 0x65,
- 0xcc, 0x7d, 0xc0, 0x05,
- 0x04, 0x61, 0x00, 0x65,
- 0x4c, 0x62, 0x80, 0x05,
- 0x42, 0x4a, 0x9a, 0x9c,
- 0xd8, 0xc7, 0x60, 0x8c,
- 0x02, 0x64, 0x02, 0xe5,
- 0x58, 0x57, 0xe0, 0xb0,
- 0x4a, 0x5a, 0xd8, 0x47,
- 0x48, 0x4a, 0xe0, 0x0a,
- 0x40, 0x55, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x79,
- 0x63, 0x7d, 0x40, 0x45,
- 0x48, 0x1a, 0xc0, 0x0b,
- 0xd8, 0x1d, 0x60, 0x0a,
- 0x42, 0x12, 0x58, 0x37,
- 0x40, 0x45, 0xd1, 0xb0,
- 0x40, 0x0b, 0x63, 0x81,
- 0x48, 0x1a, 0x81, 0x41,
- 0x42, 0x3a, 0xc0, 0x0a,
- 0x40, 0x45, 0xe0, 0x0a,
- 0xc0, 0x0b, 0x63, 0x85,
- 0x63, 0x89, 0x40, 0x15,
- 0x81, 0x01, 0x40, 0x0b,
- 0xf0, 0x04, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x3c, 0x04, 0x0c,
- 0x00, 0xb6, 0x00, 0x8b,
- 0x50, 0x01, 0xe0, 0x08,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x06, 0x7b, 0x88, 0xab,
- 0x4e, 0x18, 0x84, 0x9b,
- 0x82, 0x0b, 0x6f, 0xa0,
- 0x6f, 0xa0, 0x4f, 0x68,
- 0x21, 0x0b, 0x80, 0x6b,
- 0x02, 0x06, 0xff, 0x11,
- 0xa3, 0xab, 0x00, 0x00,
- 0x82, 0x03, 0x02, 0xe5,
- 0x82, 0x95, 0xd3, 0x0d,
- 0x84, 0xa5, 0xa3, 0x7b,
- 0x50, 0x95, 0xa1, 0x7b,
- 0xc0, 0x0b, 0x05, 0x21,
- 0x50, 0x95, 0x84, 0x15,
- 0xc0, 0x0b, 0x65, 0x21,
- 0xa3, 0x7b, 0x83, 0x35,
- 0xa1, 0x7b, 0x82, 0xc5,
- 0x05, 0x21, 0x50, 0x05,
- 0x82, 0x35, 0xc0, 0x0b,
- 0x65, 0x21, 0x50, 0x05,
- 0x81, 0x85, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x95,
- 0x81, 0x45, 0xc0, 0x0b,
- 0x65, 0x31, 0x50, 0x05,
- 0x10, 0x0b, 0xc0, 0x0b,
- 0x73, 0x18, 0x8e, 0x1b,
- 0x5a, 0x18, 0xef, 0xf8,
- 0x0e, 0x64, 0x6f, 0xfc,
- 0x43, 0x86, 0xe1, 0xa0,
- 0x84, 0x14, 0xe1, 0x18,
- 0x43, 0xc6, 0x04, 0x76,
- 0x84, 0x14, 0xe1, 0x18,
- 0x0c, 0x0c, 0x84, 0x66,
- 0x1b, 0x18, 0xf2, 0x3c,
- 0xc1, 0xc3, 0xff, 0xfc,
- 0xfa, 0x04, 0x04, 0x4c,
- 0x86, 0x6b, 0x42, 0x27,
- 0x04, 0x24, 0x84, 0x21,
- 0x06, 0x24, 0xfa, 0x80,
- 0x82, 0x33, 0xe1, 0x84,
- 0x60, 0x0a, 0x4e, 0x3a,
- 0x00, 0x29, 0xc6, 0x2d,
- 0x40, 0x2b, 0x0c, 0x1d,
- 0xc0, 0x08, 0x42, 0x96,
- 0xcf, 0xb4, 0x73, 0xe8,
- 0x60, 0x01, 0x00, 0x06,
- 0x81, 0x31, 0x7d, 0x09,
- 0xe0, 0x1e, 0x40, 0x0a,
- 0xe5, 0x1a, 0x42, 0x0a,
- 0xe5, 0x9a, 0x44, 0x0a,
- 0x64, 0x81, 0x00, 0x10,
- 0x42, 0x22, 0xc7, 0xa1,
- 0x04, 0x0e, 0x72, 0x8c,
- 0xc0, 0x03, 0x74, 0x24,
- 0x6f, 0x5c, 0x74, 0x88,
- 0x0c, 0x4c, 0x81, 0x31,
- 0xdd, 0x93, 0xf2, 0x04,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x6c, 0x01, 0x0c, 0x12,
- 0x81, 0x11, 0x40, 0x28,
- 0x6f, 0x60, 0x5d, 0xa8,
- 0x8c, 0x0b, 0x8c, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x06, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0x86,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x66,
- 0xe0, 0x08, 0x0d, 0x66,
- 0xef, 0xb4, 0x70, 0x48,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x42, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x18,
- 0xe1, 0x24, 0x47, 0xc6,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x76,
- 0xe0, 0x08, 0x0d, 0x76,
- 0xef, 0xb4, 0x6e, 0x88,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0xc6, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x8e, 0x39, 0xc9, 0x37,
- 0x82, 0x45, 0x87, 0x1b,
- 0x60, 0x08, 0x03, 0x86,
- 0xe0, 0x08, 0x0d, 0x86,
- 0xef, 0xb4, 0x6c, 0xa8,
- 0x0c, 0x06, 0xa1, 0x0b,
- 0x8c, 0x0b, 0x80, 0x00,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x02, 0x86, 0x02, 0x2b,
- 0x04, 0x14, 0xe1, 0x28,
- 0xe1, 0x18, 0x47, 0x46,
- 0x84, 0x18, 0x81, 0x61,
- 0x8c, 0x38, 0x8c, 0x34,
- 0x87, 0x1b, 0x9e, 0x39,
- 0x03, 0x96, 0x82, 0x45,
- 0x0d, 0x96, 0x60, 0x08,
- 0x6a, 0xd8, 0xe0, 0x08,
- 0xa1, 0x0b, 0xef, 0xb4,
- 0x80, 0x00, 0x0c, 0x06,
- 0x0c, 0x0c, 0x8c, 0x0b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0x6c, 0x80, 0x04, 0x12,
- 0x81, 0x31, 0x81, 0x11,
- 0x48, 0x00, 0xc5, 0x3d,
- 0x00, 0x04, 0x50, 0x04,
- 0x42, 0x12, 0xc1, 0x84,
- 0x06, 0x30, 0x50, 0x90,
- 0xfc, 0xf5, 0xc4, 0x04,
- 0x82, 0x0b, 0x5d, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x0c, 0x09, 0x80, 0x6b,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x05, 0xa9, 0x0c, 0x19,
- 0x40, 0x86, 0x40, 0x2b,
- 0x00, 0x05, 0xc1, 0x00,
- 0x40, 0x11, 0xc0, 0x00,
- 0x84, 0x95, 0xc0, 0x00,
- 0x6d, 0x21, 0x0c, 0x09,
- 0x40, 0x0a, 0xc0, 0x2c,
- 0x82, 0xc5, 0xe0, 0x80,
- 0x63, 0x79, 0x0c, 0x15,
- 0x85, 0x31, 0x40, 0x0b,
- 0x8c, 0x0b, 0x03, 0x41,
- 0x6f, 0xfc, 0x6d, 0xa8,
- 0x8c, 0x0b, 0x82, 0x2b,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0x81, 0x01, 0x81, 0x65,
- 0xf2, 0x00, 0x0c, 0x0c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x7c, 0x04, 0x4c,
- 0x00, 0x86, 0x00, 0x6b,
- 0x80, 0x04, 0xe1, 0x3c,
- 0x42, 0x10, 0x80, 0x18,
- 0x80, 0x16, 0xf1, 0xfc,
- 0x65, 0xb5, 0x0c, 0x09,
- 0x40, 0x4a, 0xc0, 0x2b,
- 0x00, 0x04, 0x60, 0x98,
- 0x80, 0xc5, 0xfa, 0x00,
- 0x6c, 0xfd, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x2c,
- 0xff, 0x11, 0x82, 0x85,
- 0x82, 0x35, 0x82, 0x0d,
- 0x66, 0xed, 0x0c, 0x19,
- 0xa1, 0x1b, 0xc0, 0x26,
- 0x02, 0x60, 0x02, 0x85,
- 0x80, 0x99, 0x06, 0xe5,
- 0xe0, 0x94, 0x40, 0x0a,
- 0x04, 0x45, 0x02, 0x60,
- 0x02, 0x60, 0xc0, 0x9e,
- 0x80, 0xad, 0x05, 0xa9,
- 0x53, 0xf6, 0x04, 0x18,
- 0x0c, 0x39, 0xe0, 0x00,
- 0xc0, 0x2b, 0x65, 0xad,
- 0x70, 0x84, 0x44, 0x32,
- 0x05, 0x0a, 0xa6, 0x13,
- 0x16, 0x12, 0x64, 0xfc,
- 0x12, 0x24, 0xe0, 0x00,
- 0x40, 0x0a, 0x1a, 0x80,
- 0x00, 0x60, 0xe0, 0x90,
- 0x40, 0x99, 0x06, 0xf1,
- 0xc0, 0x00, 0x02, 0x06,
- 0x4f, 0x60, 0x4e, 0x68,
- 0xc0, 0x18, 0x04, 0x06,
- 0x15, 0x86, 0x0f, 0xbe,
- 0x01, 0x01, 0xe1, 0x00,
- 0x89, 0x75, 0x81, 0x71,
- 0x61, 0x00, 0x40, 0x86,
- 0xe0, 0x08, 0x42, 0x06,
- 0x83, 0x21, 0x00, 0x04,
- 0x8c, 0x0b, 0x00, 0xb6,
- 0xef, 0xf8, 0x7b, 0xe8,
- 0x60, 0x3c, 0x42, 0x86,
- 0x52, 0x78, 0x8c, 0x0b,
- 0x00, 0x7b, 0xef, 0xe0,
- 0x75, 0xb8, 0x8c, 0x0b,
- 0x0c, 0x09, 0xef, 0xf8,
- 0x40, 0x2c, 0x6d, 0x01,
- 0xf0, 0xa0, 0x44, 0x62,
- 0xa1, 0x7b, 0x28, 0x14,
- 0x6b, 0xf1, 0x44, 0x01,
- 0x84, 0x08, 0xc0, 0x26,
- 0x41, 0xf6, 0x82, 0x65,
- 0x81, 0x11, 0x60, 0x3c,
- 0xef, 0x64, 0x4f, 0x28,
- 0x60, 0x0c, 0x43, 0x06,
- 0x60, 0x78, 0x8c, 0x0b,
- 0x59, 0x38, 0xef, 0xc8,
- 0x0c, 0x19, 0xef, 0xdc,
- 0xc0, 0x2b, 0x65, 0xb5,
- 0xe0, 0x90, 0x42, 0x0a,
- 0x02, 0x84, 0x82, 0x65,
- 0x04, 0x60, 0x60, 0x88,
- 0xc0, 0x99, 0x66, 0xf0,
- 0x90, 0x23, 0x04, 0x13,
- 0x44, 0xb1, 0x84, 0x0e,
- 0x0c, 0x15, 0xe4, 0x00,
- 0xc0, 0x0a, 0x6d, 0x61,
- 0x02, 0x06, 0xc2, 0x0d,
- 0x4c, 0x11, 0xc0, 0x00,
- 0xc0, 0x26, 0x06, 0xed,
- 0x82, 0xb1, 0x80, 0xd5,
- 0xfa, 0x80, 0x10, 0xb4,
- 0xec, 0xe5, 0xd2, 0x8d,
- 0x65, 0xb5, 0x0c, 0x19,
- 0x82, 0x91, 0x40, 0x2b,
- 0xe0, 0x90, 0x42, 0x0a,
- 0xc0, 0x1c, 0x1e, 0x25,
- 0xd1, 0x88, 0x44, 0x82,
- 0x06, 0xe1, 0x4c, 0x21,
- 0x93, 0x8b, 0x40, 0x26,
- 0x0c, 0x09, 0x84, 0xf5,
- 0x40, 0x26, 0x66, 0xe5,
- 0xe1, 0x00, 0x42, 0x86,
- 0x83, 0x21, 0x04, 0x14,
- 0x66, 0xed, 0x4c, 0x21,
- 0x04, 0x06, 0xc0, 0x26,
- 0xe0, 0x3c, 0x41, 0xf6,
- 0x6f, 0x64, 0x4a, 0xe8,
- 0x43, 0x06, 0x81, 0x11,
- 0x8c, 0x0b, 0x60, 0x0c,
- 0xef, 0xc8, 0x5c, 0x28,
- 0x42, 0x0a, 0x85, 0x95,
- 0x44, 0x86, 0x60, 0x94,
- 0x08, 0x24, 0xe1, 0x00,
- 0x04, 0x41, 0x02, 0x60,
- 0x4c, 0xb1, 0xc0, 0x9e,
- 0x40, 0x26, 0x66, 0xe5,
- 0x05, 0xb1, 0x02, 0x60,
- 0x84, 0x18, 0x80, 0xad,
- 0x02, 0x12, 0x90, 0x13,
- 0x88, 0x16, 0xec, 0xfc,
- 0x6c, 0x6d, 0x0c, 0x29,
- 0x4c, 0x11, 0xc0, 0x2c,
- 0xc0, 0x26, 0x66, 0xe9,
- 0x69, 0xb5, 0x4c, 0x05,
- 0x44, 0x0a, 0xc0, 0x09,
- 0x82, 0x45, 0xe0, 0x90,
- 0x6f, 0xf8, 0x6d, 0xe8,
- 0x0c, 0x09, 0x8c, 0x0b,
- 0xc0, 0x2c, 0x6d, 0x01,
- 0x6d, 0x05, 0x4c, 0x01,
- 0x40, 0x46, 0xc0, 0x2c,
- 0x80, 0x14, 0xe1, 0x00,
- 0x44, 0x20, 0x84, 0x28,
- 0x04, 0x26, 0xf3, 0xec,
- 0xe1, 0x3c, 0x02, 0x86,
- 0x84, 0x28, 0x84, 0x14,
- 0xfc, 0x9c, 0x04, 0x24,
- 0x80, 0x04, 0x84, 0x26,
- 0xc8, 0x19, 0x80, 0x18,
- 0x8e, 0x0b, 0x00, 0x16,
- 0xf2, 0x7c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xfa, 0x00, 0x04, 0x0c,
- 0x40, 0xa6, 0x00, 0x6b,
- 0x4c, 0x01, 0xe0, 0x00,
- 0x40, 0x2b, 0x6c, 0x1d,
- 0x69, 0x58, 0x8c, 0x0b,
- 0x6e, 0x38, 0xef, 0xf4,
- 0x8c, 0x0b, 0x6f, 0xe8,
- 0x0c, 0x19, 0xa1, 0x0b,
- 0x80, 0x2c, 0x0d, 0x15,
- 0x93, 0x7c, 0x42, 0x10,
- 0x0d, 0x15, 0x4c, 0x11,
- 0x81, 0x11, 0x00, 0x2c,
- 0x6c, 0x21, 0x4c, 0x11,
- 0x0c, 0x0c, 0xc0, 0x2b,
- 0xdd, 0x93, 0xf2, 0x00,
- 0xfa, 0x1c, 0x04, 0x4c,
- 0x81, 0x71, 0x00, 0x6b,
- 0x66, 0x35, 0x0c, 0x0b,
- 0x43, 0xf6, 0x40, 0x16,
- 0x4c, 0x73, 0xef, 0xfc,
- 0xc0, 0x16, 0x66, 0x71,
- 0xe0, 0x80, 0x40, 0x4a,
- 0x0c, 0x19, 0x98, 0x85,
- 0xc0, 0x2b, 0x6c, 0x49,
- 0x6c, 0x51, 0x0c, 0x89,
- 0x0c, 0x29, 0xc0, 0x2b,
- 0xc0, 0x2b, 0x6c, 0x55,
- 0x6c, 0x4d, 0x0c, 0x39,
- 0xc5, 0x17, 0x40, 0x2b,
- 0xc5, 0x27, 0xc5, 0x87,
- 0x48, 0x2a, 0x45, 0x37,
- 0x4a, 0x3a, 0xe6, 0xa2,
- 0x06, 0x44, 0xe6, 0x86,
- 0x08, 0x54, 0xfa, 0x80,
- 0x89, 0x3b, 0xfa, 0x80,
- 0x80, 0x00, 0x00, 0x16,
- 0x88, 0x8c, 0x00, 0x04,
- 0x02, 0x00, 0x10, 0xc5,
- 0x0c, 0x39, 0x8c, 0x04,
- 0x40, 0x2c, 0x6d, 0x09,
- 0xe0, 0x84, 0x40, 0x0a,
- 0x66, 0x86, 0x44, 0x2a,
- 0xfa, 0x80, 0x08, 0x14,
- 0x81, 0x51, 0x01, 0x11,
- 0x6c, 0x04, 0x00, 0x30,
- 0x40, 0x02, 0x83, 0x31,
- 0x00, 0x09, 0xd0, 0x98,
- 0xc0, 0x2c, 0x0c, 0xa1,
- 0x6c, 0xe9, 0x4c, 0x01,
- 0x83, 0x05, 0xc0, 0x2c,
- 0x84, 0x25, 0xa1, 0x8b,
- 0x7a, 0x80, 0x18, 0x84,
- 0xe8, 0x94, 0x12, 0x34,
- 0x60, 0x32, 0x58, 0x4a,
- 0xfb, 0x80, 0x02, 0x14,
- 0x4c, 0x13, 0xb2, 0x1f,
- 0xc0, 0x16, 0x66, 0x71,
- 0x85, 0x5d, 0x98, 0x53,
- 0x83, 0x45, 0xfc, 0x15,
- 0x6c, 0x1d, 0x0c, 0x29,
- 0x42, 0x96, 0x40, 0x2b,
- 0x4f, 0x78, 0xe0, 0x08,
- 0x8c, 0x0b, 0x6f, 0xb4,
- 0xe0, 0x08, 0x4e, 0x96,
- 0x66, 0x71, 0x0c, 0x1b,
- 0xa3, 0x0b, 0x40, 0x16,
- 0x6c, 0xe9, 0x0c, 0x09,
- 0x0e, 0x06, 0x40, 0x2c,
- 0x00, 0x04, 0xc0, 0x00,
- 0x02, 0x14, 0x7a, 0x80,
- 0x40, 0x0a, 0xfb, 0x80,
- 0xa1, 0x1f, 0xe6, 0xa2,
- 0x66, 0x71, 0x4c, 0x13,
- 0x8e, 0x0b, 0x40, 0x16,
- 0xf2, 0x1c, 0x0c, 0x4c,
- 0xc1, 0xc3, 0xdd, 0x93,
- 0xe1, 0x04, 0x42, 0x06,
- 0x84, 0x1a, 0x84, 0x14,
- 0x6e, 0x19, 0x40, 0x13,
- 0xdd, 0x93, 0xc0, 0x15,
- 0xf8, 0x7c, 0x04, 0x0c,
- 0xec, 0x60, 0x1e, 0xf0,
- 0x6c, 0x41, 0x00, 0x69,
- 0x9f, 0x71, 0x40, 0x2b,
- 0x6c, 0x49, 0x00, 0x39,
- 0x81, 0x81, 0x40, 0x2b,
- 0x6c, 0x51, 0x00, 0x49,
- 0x81, 0x91, 0x40, 0x2b,
- 0x42, 0x3a, 0xaf, 0x76,
- 0x42, 0x1a, 0xe6, 0x9a,
- 0xbe, 0x1e, 0xe0, 0x12,
- 0x6c, 0x4d, 0x00, 0x19,
- 0x3c, 0x1e, 0xc0, 0x2b,
- 0x60, 0x31, 0x02, 0x0e,
- 0x7c, 0x1e, 0xc2, 0x41,
- 0xe0, 0x40, 0x02, 0x16,
- 0x8f, 0x11, 0x0d, 0x1c,
- 0x95, 0x11, 0x1d, 0x16,
- 0x85, 0x11, 0x1f, 0x16,
- 0x8b, 0x11, 0x21, 0x16,
- 0x91, 0x11, 0x23, 0x16,
- 0x97, 0x11, 0x25, 0x16,
- 0x99, 0x11, 0x27, 0x16,
- 0x9b, 0x11, 0x29, 0x16,
- 0x9d, 0x11, 0x2b, 0x16,
- 0x81, 0x11, 0x2d, 0x16,
- 0x6c, 0x55, 0x00, 0xc9,
- 0x83, 0x65, 0xc0, 0x2b,
- 0x64, 0x20, 0x0a, 0xf0,
- 0x0a, 0x29, 0x82, 0xb1,
- 0x80, 0x23, 0xfc, 0x08,
- 0x68, 0x81, 0x44, 0x81,
- 0x82, 0x81, 0x40, 0x1b,
- 0x6c, 0x41, 0x00, 0x69,
- 0x0a, 0x64, 0xc0, 0x2b,
- 0x04, 0xb4, 0x7a, 0x80,
- 0x94, 0x53, 0xfa, 0x80,
- 0xfa, 0xb5, 0xcb, 0x2d,
- 0x00, 0x29, 0x82, 0x91,
- 0x40, 0x2b, 0x6c, 0x45,
- 0xfa, 0x80, 0x14, 0x94,
- 0x04, 0x94, 0xc5, 0xad,
- 0x54, 0x20, 0xc0, 0x88,
- 0xc0, 0x03, 0x13, 0xf1,
- 0x56, 0xa0, 0x7a, 0xb5,
- 0x00, 0x29, 0xdc, 0x00,
- 0x40, 0x2c, 0x6c, 0x81,
- 0xfa, 0x80, 0x18, 0xc4,
- 0xe0, 0x12, 0x46, 0x3a,
- 0xa3, 0x2b, 0x3c, 0x24,
- 0xdf, 0xfc, 0x4f, 0xee,
- 0x68, 0xbd, 0x40, 0x71,
- 0x3e, 0x24, 0xc0, 0x1b,
- 0xfa, 0x80, 0x0a, 0x24,
- 0x60, 0x32, 0x48, 0x5a,
- 0x64, 0x80, 0x0a, 0x00,
- 0x07, 0x45, 0xc0, 0x6e,
- 0xfa, 0x80, 0x04, 0x24,
- 0x6e, 0x19, 0x00, 0xcb,
- 0x58, 0x0a, 0xc0, 0x15,
- 0x59, 0xe6, 0xe4, 0x84,
- 0x4c, 0x50, 0x00, 0x0c,
- 0x88, 0xa5, 0x9c, 0x00,
- 0x6c, 0x79, 0x00, 0xc9,
- 0xe5, 0xcd, 0xc0, 0x2c,
- 0x94, 0xc8, 0x88, 0x35,
- 0x6c, 0x41, 0x00, 0x69,
- 0x00, 0x79, 0xc0, 0x2b,
- 0xc0, 0x2c, 0x6c, 0xe9,
- 0xe0, 0x1a, 0x50, 0xca,
- 0xe0, 0x0e, 0x52, 0x7a,
- 0xe1, 0x1a, 0x58, 0xca,
- 0xe6, 0x92, 0x50, 0x8a,
- 0xe1, 0x0e, 0x4c, 0x7a,
- 0x58, 0xca, 0x10, 0x93,
- 0x0e, 0x94, 0xe6, 0x8e,
- 0x50, 0x02, 0x7a, 0x80,
- 0x4e, 0x7a, 0xf0, 0x84,
- 0x8c, 0xc3, 0x66, 0x8a,
- 0x64, 0x81, 0x0c, 0x80,
- 0x8e, 0xc3, 0xc0, 0x6e,
- 0x02, 0x11, 0x98, 0xc6,
- 0x02, 0x0a, 0x82, 0x51,
- 0xf2, 0xb5, 0xe0, 0x40,
- 0x0c, 0x0c, 0xb0, 0xf1,
- 0xdd, 0x93, 0xf0, 0x7c,
- 0x00, 0x00, 0x10, 0x14,
- 0x00, 0x43, 0x4a, 0xb0,
- 0x00, 0x00, 0x09, 0x2c,
- 0x00, 0x00, 0x1a, 0x24,
- 0x00, 0x43, 0x54, 0xc0,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x19, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xe0,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x00,
- 0x00, 0x80, 0x02, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x11,
- 0x00, 0x80, 0x02, 0x12,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x16,
- 0x00, 0x80, 0x02, 0x17,
- 0x00, 0x80, 0x02, 0x18,
- 0x00, 0x80, 0x02, 0x19,
- 0x00, 0x80, 0x02, 0x1a,
- 0x00, 0x80, 0x02, 0x1b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x1d,
- 0x00, 0x80, 0x02, 0x1e,
- 0x00, 0x80, 0x02, 0x20,
- 0x00, 0x80, 0x02, 0x24,
- 0x00, 0x80, 0x02, 0x26,
- 0x00, 0x80, 0x02, 0x2c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x2f,
- 0x00, 0x80, 0x02, 0x46,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x4c,
- 0x00, 0x80, 0x02, 0x4d,
- 0x00, 0x80, 0x02, 0x4e,
- 0x00, 0x80, 0x02, 0x51,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x53,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x57,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x59,
- 0x00, 0x80, 0x02, 0x5a,
- 0x00, 0x80, 0x02, 0x5f,
- 0x00, 0x80, 0x02, 0x60,
- 0x00, 0x80, 0x02, 0x61,
- 0x00, 0x80, 0x02, 0x62,
- 0x00, 0x80, 0x02, 0x63,
- 0x00, 0x80, 0x02, 0x64,
- 0x00, 0x80, 0x02, 0x65,
- 0x00, 0x80, 0x02, 0x66,
- 0x00, 0x80, 0x02, 0x67,
- 0x00, 0x80, 0x02, 0x68,
- 0x00, 0x80, 0x02, 0x73,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x78,
- 0x00, 0x80, 0x02, 0x7c,
- 0x00, 0x80, 0x02, 0x81,
- 0x00, 0x80, 0x02, 0x86,
- 0x00, 0x80, 0x02, 0x87,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x95,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xa3,
- 0x00, 0x80, 0x02, 0xa8,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xaa,
- 0x00, 0x80, 0x02, 0xab,
- 0x00, 0x80, 0x02, 0xac,
- 0x00, 0x80, 0x02, 0xad,
- 0x00, 0x80, 0x02, 0xae,
- 0x00, 0x80, 0x02, 0xb1,
- 0x00, 0x80, 0x02, 0xb2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x02, 0xb6,
- 0x00, 0x80, 0x02, 0xb7,
- 0x00, 0x80, 0x02, 0xb8,
- 0x00, 0x80, 0x02, 0xb9,
- 0x00, 0x80, 0x02, 0xba,
- 0x00, 0x80, 0x02, 0xbb,
- 0x00, 0x80, 0x02, 0xbc,
- 0x00, 0x80, 0x02, 0xbd,
- 0x00, 0x80, 0x02, 0xbe,
- 0x00, 0x80, 0x02, 0xbf,
- 0x00, 0x80, 0x02, 0xc2,
- 0x00, 0x80, 0x02, 0xc3,
- 0x00, 0x80, 0x02, 0xc4,
- 0x00, 0x80, 0x02, 0xc5,
- 0x00, 0x80, 0x40, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x02,
- 0x00, 0x80, 0x40, 0x03,
- 0x00, 0x80, 0x40, 0x04,
- 0x00, 0x80, 0x40, 0x06,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x09,
- 0x00, 0x80, 0x40, 0x0a,
- 0x00, 0x80, 0x40, 0x0b,
- 0x00, 0x80, 0x40, 0x0c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x0e,
- 0x00, 0x80, 0x40, 0x0f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x13,
- 0x00, 0x80, 0x40, 0x14,
- 0x00, 0x80, 0x40, 0x15,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x19,
- 0x00, 0x80, 0x40, 0x1e,
- 0x00, 0x80, 0x40, 0x1f,
- 0x00, 0x80, 0x40, 0x20,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x24,
- 0x00, 0x80, 0x40, 0x25,
- 0x00, 0x80, 0x40, 0x3c,
- 0x00, 0x80, 0x40, 0x3d,
- 0x00, 0x80, 0x40, 0x3e,
- 0x00, 0x80, 0x40, 0x3f,
- 0x00, 0x80, 0x40, 0x40,
- 0x00, 0x80, 0x40, 0x41,
- 0x00, 0x80, 0x40, 0x42,
- 0x00, 0x80, 0x40, 0x43,
- 0x00, 0x80, 0x40, 0x44,
- 0x00, 0x80, 0x40, 0x45,
- 0x00, 0x80, 0x40, 0x46,
- 0x00, 0x80, 0x40, 0x47,
- 0x00, 0x80, 0x40, 0x48,
- 0x00, 0x80, 0x40, 0x49,
- 0x00, 0x80, 0x40, 0x4a,
- 0x00, 0x80, 0x40, 0x4b,
- 0x00, 0x80, 0x40, 0x4c,
- 0x00, 0x80, 0x40, 0x4d,
- 0x00, 0x80, 0x40, 0x4e,
- 0x00, 0x80, 0x40, 0x4f,
- 0x00, 0x80, 0x40, 0x50,
- 0x00, 0x80, 0x40, 0x51,
- 0x00, 0x80, 0x40, 0x52,
- 0x00, 0x80, 0x40, 0x53,
- 0x00, 0x80, 0x40, 0x54,
- 0x00, 0x80, 0x40, 0x55,
- 0x00, 0x80, 0x40, 0x56,
- 0x00, 0x80, 0x40, 0x57,
- 0x00, 0x80, 0x40, 0x58,
- 0x00, 0x80, 0x40, 0x59,
- 0x00, 0x80, 0x40, 0x5a,
- 0x00, 0x80, 0x40, 0x5b,
- 0x00, 0x80, 0x40, 0x5c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x5e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x60,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x69,
- 0x00, 0x80, 0x40, 0x6a,
- 0x00, 0x80, 0x40, 0x6b,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x74,
- 0x00, 0x80, 0x40, 0x78,
- 0x00, 0x80, 0x40, 0x79,
- 0x00, 0x80, 0x40, 0x7a,
- 0x00, 0x80, 0x40, 0x7c,
- 0x00, 0x80, 0x40, 0x84,
- 0x00, 0x80, 0x40, 0x85,
- 0x00, 0x80, 0x40, 0x88,
- 0x00, 0x80, 0x40, 0x89,
- 0x00, 0x80, 0x40, 0x8e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x90,
- 0x00, 0x80, 0x40, 0x91,
- 0x00, 0x80, 0x40, 0x99,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0x9f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa1,
- 0x00, 0x80, 0x40, 0xa2,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xa8,
- 0x00, 0x80, 0x40, 0xb0,
- 0x00, 0x80, 0x40, 0xb6,
- 0x00, 0x80, 0x40, 0xd0,
- 0x00, 0x80, 0x40, 0xd1,
- 0x00, 0x80, 0x40, 0xd4,
- 0x00, 0x80, 0x40, 0xd5,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x40, 0xdf,
- 0x00, 0x80, 0x43, 0xdc,
- 0x00, 0x80, 0x43, 0xdd,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x43, 0xe4,
- 0x00, 0x80, 0x44, 0x04,
- 0x00, 0x80, 0x44, 0x28,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x44, 0x48,
- 0x00, 0x80, 0x44, 0x4c,
- 0x00, 0x80, 0x44, 0x50,
- 0x00, 0x80, 0x44, 0x54,
- 0x00, 0x80, 0x44, 0x58,
- 0x00, 0x80, 0x44, 0x5c,
- 0x00, 0x80, 0x44, 0x60,
- 0x00, 0x80, 0x44, 0x64,
- 0x00, 0x80, 0x44, 0x68,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x46, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xc8,
- 0x00, 0x80, 0x48, 0xc9,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x48, 0xcb,
- 0x00, 0x80, 0x48, 0xcc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x49, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x34, 0x3c,
- 0x00, 0x80, 0x80, 0x00,
- 0x00, 0x80, 0x80, 0x01,
- 0x00, 0x80, 0x80, 0x02,
- 0x00, 0x80, 0x80, 0x06,
- 0x00, 0x80, 0x80, 0x07,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x09,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x0e,
- 0x00, 0x80, 0x80, 0x10,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x14,
- 0x00, 0x80, 0x80, 0x18,
- 0x00, 0x80, 0x80, 0x1c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x2d,
- 0x00, 0x80, 0x80, 0x2e,
- 0x00, 0x80, 0x80, 0x31,
- 0x00, 0x80, 0x80, 0x32,
- 0x00, 0x80, 0x80, 0x35,
- 0x00, 0x80, 0x80, 0x36,
- 0x00, 0x80, 0x80, 0x37,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x39,
- 0x00, 0x80, 0x80, 0x3a,
- 0x00, 0x80, 0x80, 0x3b,
- 0x00, 0x80, 0x80, 0x3c,
- 0x00, 0x80, 0x80, 0x3d,
- 0x00, 0x80, 0x80, 0x3e,
- 0x00, 0x80, 0x80, 0x40,
- 0x00, 0x80, 0x80, 0x44,
- 0x00, 0x80, 0x80, 0x48,
- 0x00, 0x80, 0x80, 0x49,
- 0x00, 0x80, 0x80, 0x4a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x4c,
- 0x00, 0x80, 0x80, 0x50,
- 0x00, 0x80, 0x80, 0x54,
- 0x00, 0x80, 0x80, 0x55,
- 0x00, 0x80, 0x80, 0x56,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x58,
- 0x00, 0x80, 0x80, 0x5c,
- 0x00, 0x80, 0x80, 0x60,
- 0x00, 0x80, 0x80, 0x61,
- 0x00, 0x80, 0x80, 0x62,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x64,
- 0x00, 0x80, 0x80, 0x68,
- 0x00, 0x80, 0x80, 0x6c,
- 0x00, 0x80, 0x80, 0x6d,
- 0x00, 0x80, 0x80, 0x6e,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x70,
- 0x00, 0x80, 0x80, 0x74,
- 0x00, 0x80, 0x80, 0x78,
- 0x00, 0x80, 0x80, 0x79,
- 0x00, 0x80, 0x80, 0x7a,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x7c,
- 0x00, 0x80, 0x80, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x88,
- 0x00, 0x80, 0x80, 0x8c,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x80, 0x94,
- 0x00, 0x80, 0x80, 0x98,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x00, 0x80,
- 0x00, 0x80, 0x00, 0x81,
- 0x00, 0x80, 0x00, 0x82,
- 0x00, 0x80, 0x00, 0x83,
- 0x00, 0x80, 0x00, 0x84,
- 0x00, 0x80, 0x00, 0x85,
- 0x00, 0x80, 0x00, 0x86,
- 0x00, 0x80, 0x00, 0x87,
- 0x00, 0x80, 0x00, 0x88,
- 0x00, 0x80, 0x00, 0x89,
- 0x00, 0x80, 0x00, 0x8a,
- 0x00, 0x80, 0x00, 0x8b,
- 0x00, 0x80, 0x00, 0x8c,
- 0x00, 0x80, 0x00, 0x8d,
- 0x00, 0x80, 0x00, 0x8e,
- 0x00, 0x80, 0x00, 0x8f,
- 0x00, 0x80, 0x00, 0x90,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x80, 0x01, 0x01,
- 0x00, 0x80, 0x01, 0x02,
- 0x00, 0x80, 0x01, 0x03,
- 0x00, 0x80, 0x01, 0x04,
- 0x00, 0x80, 0x01, 0x05,
- 0x00, 0x80, 0x01, 0x06,
- 0x00, 0x80, 0x01, 0x07,
- 0x00, 0x80, 0x01, 0x0a,
- 0x00, 0x80, 0x01, 0x0c,
- 0x00, 0x81, 0x2c, 0x00,
- 0x00, 0x81, 0x2f, 0xfc,
- 0x00, 0x00, 0x0d, 0x00,
- 0x00, 0x00, 0x00, 0x64,
- 0x00, 0x00, 0xbb, 0x80,
- 0x00, 0x00, 0x1a, 0x48,
- 0x00, 0x00, 0xfb, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x17, 0xec,
- 0x00, 0x00, 0x18, 0x54,
- 0x00, 0x00, 0x18, 0xbc,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x1a, 0x3f,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
-
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default configuration.
- */
-
-const uint8_t VL53L5CX_DEFAULT_CONFIGURATION[] = {
- 0x54, 0x50, 0x00, 0x80,
- 0x00, 0x04, 0x04, 0x04,
- 0x00, 0x00, 0x08, 0x08,
- 0xAD, 0x30, 0x00, 0x80,
- 0x02, 0x01, 0x03, 0x03,
- 0x00, 0x00, 0x03, 0x00,
- 0xAD, 0x38, 0x01, 0x00,
- 0x01, 0xE0, 0x01, 0x40,
- 0x00, 0x40, 0x00, 0x40,
- 0x01, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x00, 0x01,
- 0x54, 0x58, 0x00, 0x40,
- 0x04, 0x1A, 0x01, 0x00,
- 0x54, 0x5C, 0x01, 0x40,
- 0x00, 0x00, 0x27, 0x10,
- 0x00, 0x00, 0x0F, 0xA0,
- 0x0F, 0xA0, 0x03, 0xE8,
- 0x02, 0x80, 0x1F, 0x40,
- 0x00, 0x00, 0x05, 0x00,
- 0x54, 0x70, 0x00, 0x80,
- 0x03, 0x20, 0x03, 0x20,
- 0x00, 0x00, 0x00, 0x08,
- 0x54, 0x78, 0x01, 0x00,
- 0x01, 0x13, 0x00, 0x29,
- 0x00, 0x33, 0x00, 0x00,
- 0x02, 0x00, 0x00, 0x01,
- 0x04, 0x01, 0x08, VL53L5CX_FW_NBTAR_RANGING,
- 0x54, 0x88, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x0C, 0x00,
- 0xAD, 0x48, 0x01, 0x00,
- 0x01, 0xF4, 0x00, 0x00,
- 0x03, 0x06, 0x00, 0x10,
- 0x08, 0x07, 0x08, 0x07,
- 0x00, 0x00, 0x00, 0x08,
- 0xAD, 0x60, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x1F, 0x01, 0xF4,
- 0x00, 0x00, 0x1D, 0x0A,
- 0xAD, 0x70, 0x00, 0x80,
- 0x08, 0x00, 0x1F, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAD, 0x78, 0x00, 0x80,
- 0x00, 0xA0, 0x03, 0x20,
- 0x00, 0x01, 0x01, 0x90,
- 0xAD, 0x80, 0x00, 0x40,
- 0x00, 0x00, 0x28, 0x00,
- 0xAD, 0x84, 0x00, 0x80,
- 0x00, 0x00, 0x32, 0x00,
- 0x03, 0x20, 0x00, 0x00,
- 0xAD, 0x8C, 0x00, 0x80,
- 0x02, 0x58, 0xFF, 0x38,
- 0x00, 0x00, 0x00, 0x0C,
- 0xAD, 0x94, 0x01, 0x00,
- 0x00, 0x01, 0x90, 0x00,
- 0xFF, 0xFF, 0xFC, 0x00,
- 0x00, 0x00, 0x04, 0x00,
- 0x00, 0x00, 0x01, 0x01,
- 0xAD, 0xA4, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x00, 0x40, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x06,
- 0xAD, 0xB0, 0x00, 0xC0,
- 0x04, 0x80, 0x06, 0x1A,
- 0x19, 0x00, 0x05, 0x80,
- 0x00, 0x00, 0x01, 0x90,
- 0xAD, 0xBC, 0x04, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x12, 0x00, 0x25,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x05,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x00, 0x00, 0x5A,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x09,
- 0x0B, 0x0C, 0x0B, 0x0B,
- 0x03, 0x03, 0x11, 0x05,
- 0x01, 0x01, 0x01, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x0D, 0x00, 0x00,
- 0xAE, 0x00, 0x01, 0x04,
- 0x00, 0x00, 0x00, 0x04,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x0A,
- 0x00, 0x00, 0x00, 0x0C,
- 0x00, 0x00, 0x00, 0x0D,
- 0x00, 0x00, 0x00, 0x0E,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x10,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x06,
- 0x00, 0x00, 0x05, 0x0A,
- 0x02, 0x00, 0x0C, 0x08,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0x40, 0x00, 0x40,
- 0x00, 0x00, 0x01, 0xFF,
- 0xAE, 0x44, 0x00, 0x40,
- 0x00, 0x10, 0x04, 0x01,
- 0xAE, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x10, 0x00,
- 0xAE, 0x4C, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x01,
- 0xAE, 0x50, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x14,
- 0x04, 0x00, 0x28, 0x00,
- 0x03, 0x20, 0x6C, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x25, 0x80,
- 0xAE, 0x64, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x02,
- 0xAE, 0xD8, 0x01, 0x00,
- 0x00, 0xC8, 0x05, 0xDC,
- 0x00, 0x00, 0x0C, 0xCD,
- 0x01, 0x04, 0x00, 0x00,
- 0x00, 0x00, 0x26, 0x01,
- 0xB5, 0x50, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xA0, 0x02, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xF0, 0x00, 0x40,
- 0x00, 0xFF, 0x00, 0x00,
- 0xB3, 0x9C, 0x01, 0x00,
- 0x34, 0x9B, 0x04, 0x35,
- 0x02, 0x1B, 0x08, 0x7C,
- 0x80, 0x01, 0x12, 0x01,
- 0x00, 0x00, 0x08, 0x00,
- 0xB6, 0xC0, 0x00, 0xC0,
- 0x00, 0x00, 0x60, 0x00,
- 0x00, 0x00, 0x20, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xA8, 0x00, 0x40,
- 0x00, 0x00, 0x04, 0x05,
- 0xAE, 0xAC, 0x00, 0x80,
- 0x01, 0x00, 0x01, 0x00,
- 0x00, 0x02, 0x00, 0x00,
- 0xAE, 0xB4, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xB8, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC0, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xAE, 0xC8, 0x00, 0x81,
- 0x08, 0x01, 0x01, 0x08,
- 0x00, 0x00, 0x00, 0x08,
- 0xAE, 0xD0, 0x00, 0x81,
- 0x01, 0x08, 0x08, 0x08,
- 0x00, 0x00, 0x00, 0x01,
- 0xB5, 0xF4, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB5, 0xFC, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x04, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x08, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x18, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x28, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x38, 0x00, 0x44,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x48, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x58, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xB6, 0x68, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x00, 0x01, 0x03, 0xc8
-};
-
-/**
- * @brief This buffer contains the VL53L5CX default Xtalk data.
- */
-
-const uint8_t VL53L5CX_DEFAULT_XTALK[] = {
- 0x9f, 0xd8, 0x00, 0xc0,
- 0x03, 0x20, 0x09, 0x60,
- 0x0b, 0x08, 0x08, 0x17,
- 0x08, 0x08, 0x08, 0x03,
- 0x9f, 0xe4, 0x01, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x01, 0xe0, 0x00, 0x20,
- 0x00, 0x00, 0x00, 0x20,
- 0x9f, 0xf8, 0x00, 0x40,
- 0x17, 0x17, 0x17, 0x17,
- 0x9f, 0xfc, 0x04, 0x04,
- 0x00, 0x00, 0x46, 0xa4,
- 0x00, 0x00, 0x37, 0x66,
- 0x00, 0x00, 0x26, 0x60,
- 0x00, 0x00, 0x1c, 0xbc,
- 0x00, 0x00, 0x17, 0x73,
- 0x00, 0x00, 0x11, 0x25,
- 0x00, 0x00, 0x11, 0x07,
- 0x00, 0x00, 0x0e, 0x63,
- 0x00, 0x00, 0x8b, 0x4c,
- 0x00, 0x00, 0x60, 0xa2,
- 0x00, 0x00, 0x3d, 0xc0,
- 0x00, 0x00, 0x26, 0xaa,
- 0x00, 0x00, 0x1b, 0xc2,
- 0x00, 0x00, 0x18, 0x04,
- 0x00, 0x00, 0x14, 0x97,
- 0x00, 0x00, 0x10, 0xed,
- 0x00, 0x01, 0x28, 0x1b,
- 0x00, 0x00, 0x93, 0xf0,
- 0x00, 0x00, 0x57, 0x61,
- 0x00, 0x00, 0x30, 0x2b,
- 0x00, 0x00, 0x20, 0xaa,
- 0x00, 0x00, 0x1a, 0xb6,
- 0x00, 0x00, 0x15, 0xc3,
- 0x00, 0x00, 0x16, 0x0e,
- 0x00, 0x01, 0x7f, 0xbb,
- 0x00, 0x00, 0xad, 0x58,
- 0x00, 0x00, 0x71, 0xaf,
- 0x00, 0x00, 0x36, 0xd9,
- 0x00, 0x00, 0x22, 0xfb,
- 0x00, 0x00, 0x1c, 0x96,
- 0x00, 0x00, 0x18, 0x83,
- 0x00, 0x00, 0x17, 0x96,
- 0x00, 0x01, 0x90, 0x00,
- 0x00, 0x00, 0x97, 0xd6,
- 0x00, 0x00, 0x66, 0x3b,
- 0x00, 0x00, 0x33, 0x0a,
- 0x00, 0x00, 0x20, 0xcd,
- 0x00, 0x00, 0x19, 0x38,
- 0x00, 0x00, 0x16, 0xa5,
- 0x00, 0x00, 0x14, 0xbb,
- 0x00, 0x00, 0xaf, 0xcf,
- 0x00, 0x00, 0x65, 0x7d,
- 0x00, 0x00, 0x3d, 0x93,
- 0x00, 0x00, 0x29, 0xd1,
- 0x00, 0x00, 0x19, 0x4e,
- 0x00, 0x00, 0x15, 0xba,
- 0x00, 0x00, 0x11, 0xc6,
- 0x00, 0x00, 0x12, 0x7f,
- 0x00, 0x00, 0x73, 0x1d,
- 0x00, 0x00, 0x42, 0x2c,
- 0x00, 0x00, 0x2e, 0x82,
- 0x00, 0x00, 0x1e, 0x80,
- 0x00, 0x00, 0x18, 0x1c,
- 0x00, 0x00, 0x13, 0x2d,
- 0x00, 0x00, 0x0f, 0xc6,
- 0x00, 0x00, 0x0f, 0x85,
- 0x00, 0x00, 0x4f, 0x04,
- 0x00, 0x00, 0x33, 0xe9,
- 0x00, 0x00, 0x1f, 0x06,
- 0x00, 0x00, 0x18, 0x40,
- 0x00, 0x00, 0x13, 0x2c,
- 0x00, 0x00, 0x12, 0x97,
- 0x00, 0x00, 0x0e, 0x01,
- 0x00, 0x00, 0x0d, 0xac,
- 0xa0, 0xfc, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x0c, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x80,
- 0x00, 0x00, 0x00, 0x03,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa1, 0x1c, 0x00, 0xc0,
- 0x00, 0x00, 0x70, 0xeb,
- 0x0c, 0x80, 0x01, 0xe0,
- 0x00, 0x00, 0x00, 0x26,
- 0xa1, 0x28, 0x09, 0x02,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x01, 0x00, 0x00,
- 0x00, 0x36, 0x00, 0x03,
- 0x01, 0xd9, 0x01, 0x43,
- 0x02, 0x33, 0x02, 0x17,
- 0x02, 0x4b, 0x02, 0x41,
- 0x01, 0x17, 0x02, 0x22,
- 0x00, 0x27, 0x00, 0x5d,
- 0x00, 0x05, 0x00, 0x11,
- 0x00, 0x00, 0x00, 0x01,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x48, 0x00, 0x40,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x4c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x54, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x5c, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x64, 0x00, 0x81,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x6c, 0x00, 0x84,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0xa2, 0x8c, 0x00, 0x82,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x05, 0x01, 0x03, 0x04
-};
-
-/**
- * @brief This buffer is used to get NVM data.
- */
-
-const uint8_t VL53L5CX_GET_NVM_CMD[] = {
- 0x54, 0x00, 0x00, 0x40,
- 0x9E, 0x14, 0x00, 0xC0,
- 0x9E, 0x20, 0x01, 0x40,
- 0x9E, 0x34, 0x00, 0x40,
- 0x9E, 0x38, 0x04, 0x04,
- 0x9F, 0x38, 0x04, 0x02,
- 0x9F, 0xB8, 0x01, 0x00,
- 0x9F, 0xC8, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x02, 0x02, 0x00, 0x24
-};
-
-#endif /* VL53L5CX_BUFFERS_H_ */
-
diff --git a/Pi_Pico_Files/.micropico b/Pi_Pico_Files/.micropico
deleted file mode 100644
index 3de3977cb2a768a0d4248c9520b5401f0f4426be..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/.micropico
+++ /dev/null
@@ -1,3 +0,0 @@
-{
- "info": "This file is just used to identify a project folder."
-}
\ No newline at end of file
diff --git a/Pi_Pico_Files/.vscode/extensions.json b/Pi_Pico_Files/.vscode/extensions.json
deleted file mode 100644
index fbc7999bbe803093efd867260620174531a6d7c3..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/.vscode/extensions.json
+++ /dev/null
@@ -1,8 +0,0 @@
-{
- "recommendations": [
- "ms-python.python",
- "visualstudioexptteam.vscodeintellicode",
- "ms-python.vscode-pylance",
- "paulober.pico-w-go"
- ]
-}
\ No newline at end of file
diff --git a/Pi_Pico_Files/.vscode/settings.json b/Pi_Pico_Files/.vscode/settings.json
deleted file mode 100644
index 03be7827b5bc8bbf004d61fb6252dac9e91fb768..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/.vscode/settings.json
+++ /dev/null
@@ -1,15 +0,0 @@
-{
- "python.languageServer": "Pylance",
- "python.analysis.typeCheckingMode": "basic",
- "python.analysis.diagnosticSeverityOverrides": {
- "reportMissingModuleSource": "none"
- },
- "python.terminal.activateEnvironment": false,
- "micropico.openOnStart": true,
- "python.analysis.typeshedPaths": [
- "~/.micropico-stubs/included"
- ],
- "python.analysis.extraPaths": [
- "~/.micropico-stubs/included"
- ]
-}
\ No newline at end of file
diff --git a/Pi_Pico_Files/basic.py b/Pi_Pico_Files/basic.py
deleted file mode 100644
index 668dc7e6d866a187d9f4a92d49b8fbb918e2f10e..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/basic.py
+++ /dev/null
@@ -1,62 +0,0 @@
-from machine import I2C, Pin
-
-from vl53l5cx.mp import VL53L5CXMP
-
-import ujson
-
-data={}
-
-squares = [
- 'A1', 'A2', 'A3', 'A4', 'A5', 'A6', 'A7', 'A8',
- 'B1', 'B2', 'B3', 'B4', 'B5', 'B6', 'B7', 'B8',
- 'C1', 'C2', 'C3', 'C4', 'C5', 'C6', 'C7', 'C8',
- 'D1', 'D2', 'D3', 'D4', 'D5', 'D6', 'D7', 'D8',
- 'E1', 'E2', 'E3', 'E4', 'E5', 'E6', 'E7', 'E8',
- 'F1', 'F2', 'F3', 'F4', 'F5', 'F6', 'F7', 'F8',
- 'G1', 'G2', 'G3', 'G4', 'G5', 'G6', 'G7', 'G8',
- 'H1', 'H2', 'H3', 'H4', 'H5', 'H6', 'H7', 'H8'
-]
-
-scl_pin, sda_pin, lpn_pin, _ = (9, 8, 12, 13)
-i2c = I2C(0, scl=Pin(scl_pin, Pin.OUT), sda=Pin(sda_pin), freq=1_000_000)
-
-tof = VL53L5CXMP(i2c, lpn=Pin(lpn_pin, Pin.OUT, value=1))
-
-from vl53l5cx import DATA_TARGET_STATUS, DATA_DISTANCE_MM
-from vl53l5cx import STATUS_VALID, RESOLUTION_4X4, RESOLUTION_8X8
-
-
-def main():
- tof.reset()
-
- if not tof.is_alive():
- raise ValueError("VL53L5CX not detected")
-
- tof.init()
-
- tof.resolution = RESOLUTION_8X8
-
- tof.ranging_freq = 1
-
- tof.start_ranging({DATA_DISTANCE_MM, DATA_TARGET_STATUS})
-
- while True:
- if tof.check_data_ready():
- results = tof.get_ranging_data()
- distance = results.distance_mm
- status = results.target_status
-
- for i, d in enumerate(distance):
- if status[i] == STATUS_VALID:
- data[i] = d
- else:
- data[i] = "xxxx"
-
- for j in range(len(data)):
- data[squares[j]] = data.pop(j)
-
- json_data = ujson.dumps(data)
- print(json_data)
- data.clear()
-
-main()
\ No newline at end of file
diff --git a/Pi_Pico_Files/blink.py b/Pi_Pico_Files/blink.py
deleted file mode 100644
index 1c9e6fa18387433fbfc56d357583944c0183d0b2..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/blink.py
+++ /dev/null
@@ -1,14 +0,0 @@
-from machine import Pin
-from utime import sleep
-
-pin = Pin("LED", Pin.OUT)
-
-print("LED starts flashing...")
-while True:
- try:
- pin.toggle()
- sleep(1) # sleep 1sec
- except KeyboardInterrupt:
- break
-pin.off()
-print("Finished.")
diff --git a/Pi_Pico_Files/json_test.py b/Pi_Pico_Files/json_test.py
deleted file mode 100644
index 1684bdcb4e2187e7af2fc5a77687dbdf85922c69..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/json_test.py
+++ /dev/null
@@ -1,15 +0,0 @@
-import ujson
-
-# Create a Python dictionary
-data = {
- "name": "Alice",
- "age": 30,
- "is_student": False,
- "courses": ["Math", "Science", "History"]
-}
-
-# Convert the dictionary to a JSON-formatted string
-json_data = ujson.dumps(data)
-
-# Print the JSON data
-print(json_data)
\ No newline at end of file
diff --git a/Pi_Pico_Files/lib/ujson.cpython-310-x86_64-linux-gnu.so b/Pi_Pico_Files/lib/ujson.cpython-310-x86_64-linux-gnu.so
deleted file mode 100644
index 67b698299cb85ff630cf806f42aa3842e96b94cf..0000000000000000000000000000000000000000
Binary files a/Pi_Pico_Files/lib/ujson.cpython-310-x86_64-linux-gnu.so and /dev/null differ
diff --git a/Pi_Pico_Files/lib/vl53l5cx/__init__.py b/Pi_Pico_Files/lib/vl53l5cx/__init__.py
deleted file mode 100644
index d76076b0eae3e3e38d4311177fa03a7ca88181ee..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/lib/vl53l5cx/__init__.py
+++ /dev/null
@@ -1,774 +0,0 @@
-# Copyright (c) 2021 Mark Grosen <mark@grosen.org>
-#
-# SPDX-License-Identifier: MIT
-
-import struct
-from time import sleep
-
-from ._config_file import ConfigDataFile as ConfigData
-# from ._config_bytes import ConfigDataBytes as ConfigData
-
-
-NB_TARGET_PER_ZONE = 1
-
-# set_ranging_mode
-RANGING_MODE_AUTONOMOUS = 3
-RANGING_MODE_CONTINUOUS = 1
-
-# set_power
-POWER_MODE_SLEEP = 0
-POWER_MODE_WAKEUP = 1
-
-# set_target_order
-TARGET_ORDER_CLOSEST = 1
-TARGET_ORDER_STRONGEST = 2
-
-# set_resolution
-RESOLUTION_4X4 = 16
-RESOLUTION_8X8 = 64
-
-# start_ranging
-# values are used as bit offsets so don't change
-DATA_AMBIENT_PER_SPAD = 0
-DATA_NB_SPADS_ENABLED = 1
-DATA_NB_TARGET_DETECTED = 2
-DATA_SIGNAL_PER_SPAD = 3
-DATA_RANGE_SIGMA_MM = 4
-DATA_DISTANCE_MM = 5
-DATA_REFLECTANCE = 6
-DATA_TARGET_STATUS = 7
-DATA_MOTION_INDICATOR = 8
-
-# target status results
-STATUS_NOT_UPDATED = 0
-STATUS_RATE_TOO_LOW_SPAD = 1
-STATUS_TARGET_PHASE = 2
-STATUS_SIGMA_TOO_HIGH = 3
-STATUS_FAILED = 4
-STATUS_VALID = 5
-STATUS_NO_WRAP = 6
-STATUS_RATE_FAILED = 7
-STATUS_RATE_TOO_LOW = 8
-STATUS_VALID_LARGE_PULSE = 9
-STATUS_NO_PREV_TARGET = 10
-STATUS_MEASUREMENT_FAILED = 11
-STATUS_BLURRED = 12
-STATUS_INCONSISTENT = 13
-STATUS_NO_TARGETS = 255
-
-_OFFSET_BUFFER_SIZE = 488
-_UI_CMD_STATUS = 0x2C00
-_UI_CMD_START = 0x2C04
-_UI_CMD_END = 0x2FFF
-_DCI_PIPE_CONTROL = 0xCF78
-_DCI_SINGLE_RANGE = 0xCD5C
-_DCI_DSS_CONFIG = 0xAD38
-_DCI_ZONE_CONFIG = 0x5450
-_DCI_FREQ_HZ = 0x5458
-_DCI_TARGET_ORDER = 0xAE64
-_DCI_OUTPUT_LIST = 0xCD78
-_DCI_OUTPUT_CONFIG = 0xCD60
-_DCI_OUTPUT_ENABLES = 0xCD68
-_DCI_INT_TIME = 0x545C
-_DCI_RANGING_MODE = 0xAD30
-_DCI_SHARPENER = 0xAED8
-
-_START_BH = 0x0000000D
-_METADATA_BH = 0x54B400C0
-_COMMONDATA_BH = 0x54C00040
-_AMBIENT_RATE_BH = 0x54D00104
-_SPAD_COUNT_BH = 0x55D00404
-_NB_TARGET_DETECTED_BH = 0xCF7C0401
-_SIGNAL_RATE_BH = 0xCFBC0404
-_RANGE_SIGMA_MM_BH = 0xD2BC0402
-_DISTANCE_BH = 0xD33C0402
-_REFLECTANCE_BH = 0xD43C0401
-_TARGET_STATUS_BH = 0xD47C0401
-_MOTION_DETECT_BH = 0xCC5008C0
-
-_COMMONDATA_IDX = 0x54C0
-_METADATA_IDX = 0x54B4
-_AMBIENT_RATE_IDX = 0x54D0
-_SPAD_COUNT_IDX = 0x55D0
-_MOTION_DETECT_IDX = 0xCC50
-_NB_TARGET_DETECTED_IDX = 0xCF7C
-_SIGNAL_RATE_IDX = 0xCFBC
-_RANGE_SIGMA_MM_IDX = 0xD2BC
-_DISTANCE_IDX = 0xD33C
-_REFLECTANCE_EST_PC_IDX = 0xD43C
-_TARGET_STATUS_IDX = 0xD47C
-
-
-class Results:
- def __init__(self):
- self.ambient_per_spad = None
- self.distance_mm = None
- self.nb_spads_enabled = None
- self.nb_target_detected = None
- self.target_status = None
- self.reflectance = None
- self.motion_indicator = None
- self.range_sigma_mm = None
- self.signal_per_spad = None
-
-
-class VL53L5CX:
- def __init__(self, i2c, addr=0x29, lpn=None):
- self.i2c = i2c
- self.addr = addr
- self._ntpz = NB_TARGET_PER_ZONE # make option?
- self._lpn = lpn
- self._b1 = bytearray(1)
- self._streamcount = 255
- self._data_read_size = 0
- self.config_data = ConfigData()
-
- def _poll_for_answer(self, size, pos, reg16, mask, val):
- timeout = 0
- while True:
- data = self._rd_multi(reg16, size)
- if data and ((data[pos] & mask) == val):
- status = 0
- break
- if timeout >= 200:
- # print("\npoll timeout")
- status = -1 if len(data) < 3 else data[2]
- break
- elif size >= 4 and data[2] >= 0x7f:
- status = -2
- break
- else:
- timeout = timeout + 1
-
- sleep(0.01)
- if status:
- raise ValueError("poll_for_answer failed")
- return status
-
- @staticmethod
- def _swap_buffer(data):
- for i in range(0, len(data), 4):
- data[i], data[i+1], data[i+2], data[i+3] = data[i+3], data[i+2], \
- data[i+1], data[i]
-
- def _send_offset_data(self, offset_data, resolution):
- buf = bytearray(offset_data)
- if resolution == 16:
- buf[0x10:0x10+8] = bytes([0x0F, 0x04, 0x04, 0x00, 0x08, 0x10,
- 0x10, 0x07])
- self._swap_buffer(buf)
-
- # MP does not support * unpack
- signal_grid = [0] * 64
- for i, w in enumerate(struct.unpack("64I", buf[0x3C:0x3C+256])):
- signal_grid[i] = w
- range_grid = [0] * 64
- for i, w in enumerate(struct.unpack("64h", buf[0x140:0x140+128])):
- range_grid[i] = w
-
- for j in range(4):
- for i in range(4):
- signal_grid[i+(4*j)] = int((signal_grid[(2*i)+(16*j)] +
- signal_grid[(2*i)+(16*j)+1] +
- signal_grid[(2*i)+(16*j)+8] +
- signal_grid[(2*i)+(16*j)+9])/4)
- range_grid[i+(4*j)] = int((range_grid[(2*i)+(16*j)] +
- range_grid[(2*i)+(16*j)+1] +
- range_grid[(2*i)+(16*j)+8] +
- range_grid[(2*i)+(16*j)+9])/4)
-
- for i in range(48):
- signal_grid[0x10 + i] = 0
- range_grid[0x10 + i] = 0
-
- buf[0x3C:0x3C+256] = struct.pack("64I", *signal_grid)
- buf[0x140:0x140+128] = struct.pack("64h", *range_grid)
- self._swap_buffer(buf)
-
- x = buf[8:-4]
- x.extend(bytes([0x00, 0x00, 0x00, 0x0F, 0x03, 0x01, 0x01, 0xE4]))
-
- self._wr_multi(0x2E18, x)
- return not self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0xFF, 0x03)
-
- def _send_xtalk_data(self, resolution):
- if resolution == RESOLUTION_4X4:
- xtalk_data = self.config_data.xtalk4x4_data
- else:
- xtalk_data = self.config_data.xtalk_data
-
- self._wr_multi(0x2CF8, xtalk_data)
- return not self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0xFF, 0x03)
-
- def _dci_read_data(self, data, index):
- data_size = len(data)
- cmd = bytearray(12)
-
- cmd[0] = index >> 8
- cmd[1] = index & 0xFF
- cmd[2] = (data_size & 0xFF0) >> 4
- cmd[3] = (data_size & 0xF) << 4
- cmd[7] = 0x0F
- cmd[9] = 0x02
- cmd[11] = 0x08
- self._wr_multi(_UI_CMD_END - 11, cmd)
- self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0xFF, 0x03)
-
- buf = self._rd_multi(_UI_CMD_START, data_size + 12)
- for i in range(0, data_size, 4):
- data[i] = buf[4 + i + 3]
- data[i + 1] = buf[4 + i + 2]
- data[i + 2] = buf[4 + i + 1]
- data[i + 3] = buf[4 + i + 0]
-
- # self._dump_data("read", index, data)
-
- return True
-
- def _dci_replace_data(self, data, index, new_data, pos):
- self._dci_read_data(data, index)
- for i in range(len(new_data)):
- data[pos + i] = new_data[i]
- self._dci_write_data(data, index)
- return True
-
- def _dci_write_data(self, data, index):
- data_size = len(data)
- buf = bytearray(data_size + 12)
-
- # header
- buf[0] = index >> 8
- buf[1] = index & 0xFF
- buf[2] = (data_size & 0xFF0) >> 4
- buf[3] = (data_size & 0x0F) << 4
-
- # data
- for i in range(0, data_size, 4):
- buf[4 + i] = data[i + 3]
- buf[4 + i + 1] = data[i + 2]
- buf[4 + i + 2] = data[i + 1]
- buf[4 + i + 3] = data[i + 0]
-
- for i, b in enumerate([0x00, 0x00, 0x00, 0x0f, 0x05, 0x01,
- (data_size + 8) >> 8,
- (data_size + 8) & 0xFF], 4 + data_size):
- buf[i] = b
-
- address = _UI_CMD_END - (data_size + 12) + 1
-
- # self._dump_data("write", index, buf)
-
- self._wr_multi(address, buf)
- return not self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0XFF, 0x03)
-
- @staticmethod
- def _header(word):
- # type - 4, size - 12, idx - 16
- return (word & 0xF), (word & 0xFFF0) >> 4, (word >> 16)
-
- @staticmethod
- def _ambient_per_spad(raw):
- data = []
- fmt = ">{}I".format(len(raw) // 4)
- for v in struct.unpack(fmt, raw):
- data.append(v // 2048)
-
- return data
-
- @staticmethod
- def _distance_mm(raw):
- data = []
- fmt = ">{}h".format(len(raw) // 2)
- for v in struct.unpack(fmt, raw):
- data.append(0 if v < 0 else v >> 2)
-
- return data
-
- @staticmethod
- def _nb_spads_enabled(raw):
- fmt = ">{}I".format(len(raw) // 4)
- return [v for v in struct.unpack(fmt, raw)]
-
- @staticmethod
- def _nb_target_detected(raw):
- return raw
-
- @staticmethod
- def _target_status(raw):
- return raw
-
- @staticmethod
- def _reflectance(raw):
- return raw
-
- @staticmethod
- def _motion_indicator(raw):
- return struct.unpack(">IIBBBB32I", raw)
-
- @staticmethod
- def _range_sigma_mm(raw):
- data = []
- fmt = ">{}H".format(len(raw) // 2)
- for r in struct.unpack(fmt, raw):
- data.append(r / 128)
-
- return data
-
- @staticmethod
- def _signal_per_spad(raw):
- data = []
- fmt = ">{}I".format(len(raw) // 4)
- for r in struct.unpack(fmt, raw):
- data.append(r / 2048)
-
- return data
-
- def is_alive(self):
- self._wr_byte(0x7FFF, 0)
- buf = self._rd_multi(0, 2)
- self._wr_byte(0x7FFF, 2)
-
- return (buf[0] == 0xF0) and (buf[1] == 0x02)
-
- def init(self):
- # SW reboot sequence
- self._wr_byte(0x7fff, 0x00)
- self._wr_byte(0x0009, 0x04)
- self._wr_byte(0x000F, 0x40)
- self._wr_byte(0x000A, 0x03)
- self._rd_byte(0x7FFF)
-
- self._wr_byte(0x000C, 0x01)
- self._wr_byte(0x0101, 0x00)
- self._wr_byte(0x0102, 0x00)
- self._wr_byte(0x010A, 0x01)
- self._wr_byte(0x4002, 0x01)
- self._wr_byte(0x4002, 0x00)
- self._wr_byte(0x010A, 0x03)
- self._wr_byte(0x0103, 0x01)
- self._wr_byte(0x000C, 0x00)
- self._wr_byte(0x000F, 0x43)
- sleep(0.001)
-
- self._wr_byte(0x000F, 0x40)
- self._wr_byte(0x000A, 0x01)
- sleep(0.1)
-
- # Wait for sensor booted (several ms required to get sensor ready )
- self._wr_byte(0x7fff, 0x00)
- if self._poll_for_answer(1, 0, 0x06, 0xff, 1):
- return -1
-
- self._wr_byte(0x000E, 0x01)
- self._wr_byte(0x7fff, 0x02)
-
- # Enable FW access
- self._wr_byte(0x03, 0x0D)
- self._wr_byte(0x7fff, 0x01)
- if self._poll_for_answer(1, 0, 0x21, 0x10, 0x10):
- return -2
- self._wr_byte(0x7fff, 0x00)
-
- # Enable host access to GO1
- self._wr_byte(0x0C, 0x01)
-
- # Power ON status
- self._wr_byte(0x7fff, 0x00)
- self._wr_byte(0x101, 0x00)
- self._wr_byte(0x102, 0x00)
- self._wr_byte(0x010A, 0x01)
- self._wr_byte(0x4002, 0x01)
- self._wr_byte(0x4002, 0x00)
- self._wr_byte(0x010A, 0x03)
- self._wr_byte(0x103, 0x01)
- self._wr_byte(0x400F, 0x00)
- self._wr_byte(0x21A, 0x43)
- self._wr_byte(0x21A, 0x03)
- self._wr_byte(0x21A, 0x01)
- self._wr_byte(0x21A, 0x00)
- self._wr_byte(0x219, 0x00)
- self._wr_byte(0x21B, 0x00)
-
- # Wake up MCU
- self._wr_byte(0x7fff, 0x00)
- self._wr_byte(0x0C, 0x00)
- self._wr_byte(0x7fff, 0x01)
- self._wr_byte(0x20, 0x07)
- self._wr_byte(0x20, 0x06)
-
- fw = self.config_data.fw_data(0x1000)
- for page, size in enumerate([0x8000, 0x8000, 0x5000], start=9):
- self._wr_byte(0x7fff, page)
- for sub in range(0, size, 0x1000):
- self._wr_multi(sub, next(fw))
-
- self._wr_byte(0x7fff, 0x01)
-
- # Check if FW correctly downloaded
- self._wr_byte(0x7fff, 0x02)
- self._wr_byte(0x03, 0x0D)
- self._wr_byte(0x7fff, 0x01)
- if self._poll_for_answer(1, 0, 0x21, 0x10, 0x10):
- return -3
- self._wr_byte(0x7fff, 0x00)
- self._wr_byte(0x0C, 0x01)
-
- # Reset MCU and wait boot
- self._wr_byte(0x7FFF, 0x00)
- self._wr_byte(0x114, 0x00)
- self._wr_byte(0x115, 0x00)
- self._wr_byte(0x116, 0x42)
- self._wr_byte(0x117, 0x00)
- self._wr_byte(0x0B, 0x00)
- self._wr_byte(0x0C, 0x00)
- self._wr_byte(0x0B, 0x01)
- if self._poll_for_answer(1, 0, 0x06, 0xff, 0x00):
- return -4
-
- self._wr_byte(0x7fff, 0x02)
-
- # Get offset NVM data and store them into the offset buffer
- nvm_cmd = bytes([
- 0x54, 0x00, 0x00, 0x40,
- 0x9E, 0x14, 0x00, 0xC0,
- 0x9E, 0x20, 0x01, 0x40,
- 0x9E, 0x34, 0x00, 0x40,
- 0x9E, 0x38, 0x04, 0x04,
- 0x9F, 0x38, 0x04, 0x02,
- 0x9F, 0xB8, 0x01, 0x00,
- 0x9F, 0xC8, 0x01, 0x00,
- 0x00, 0x00, 0x00, 0x0F,
- 0x02, 0x02, 0x00, 0x24
- ])
-
- self._wr_multi(0x2fd8, nvm_cmd)
- if self._poll_for_answer(4, 0, 0x2C00, 0xff, 2):
- return -5
-
- self._offset_data = self._rd_multi(0x2C04, 492)
- if not self._send_offset_data(self._offset_data, RESOLUTION_4X4):
- return -6
-
- if not self._send_xtalk_data(RESOLUTION_4X4):
- return -7
-
- self._wr_multi(0x2C34, self.config_data.default_config_data)
- if self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0xFF, 0x03):
- return -8
-
- PIPE_CTRL = bytes([self._ntpz, 0x00, 0x01, 0x00])
- if not self._dci_write_data(PIPE_CTRL, _DCI_PIPE_CONTROL):
- return -9
-
- SINGLE_RANGE = b'\x01\x00\x00\x00'
- if not self._dci_write_data(SINGLE_RANGE, _DCI_SINGLE_RANGE):
- return -10
-
- return 0
-
- def start_ranging(self, enables):
- resolution = self.resolution
- self._data_read_size = 0
- self._streamcount = 255
-
- output_bh_enable = [
- 0x00000007,
- 0x00000000,
- 0x00000000,
- 0xC0000000
- ]
-
- output = [
- _START_BH,
- _METADATA_BH,
- _COMMONDATA_BH,
- _AMBIENT_RATE_BH,
- _SPAD_COUNT_BH,
- _NB_TARGET_DETECTED_BH,
- _SIGNAL_RATE_BH,
- _RANGE_SIGMA_MM_BH,
- _DISTANCE_BH,
- _REFLECTANCE_BH,
- _TARGET_STATUS_BH,
- _MOTION_DETECT_BH
- ]
-
- # always-on data contribute 3 sizes
- self._data_read_size += (0 + 4) + (4 + 0xc) + (4 + 0x4)
-
- for e in enables:
- btype, size, idx = self._header(output[e + 3])
- if (btype > 0) and (btype < 0xd):
- if (idx >= 0x54d0) and (idx < (0x54d0 + 960)):
- size = resolution
- else:
- size = resolution * self._ntpz
- self._data_read_size += (size * btype) + 4
- output[e + 3] = (idx << 16) | (size << 4) | btype
- else:
- self._data_read_size += size + 4
-
- output_bh_enable[0] |= 1 << (e + 3)
-
- # header and footer
- self._data_read_size += 20
-
- self._dci_write_data(struct.pack("<12I", *output), _DCI_OUTPUT_LIST)
-
- self._dci_write_data(struct.pack("<II", self._data_read_size,
- len(output) + 1),
- _DCI_OUTPUT_CONFIG)
-
- self._dci_write_data(struct.pack("<IIII", *output_bh_enable),
- _DCI_OUTPUT_ENABLES)
-
- # start xshut bypass (interrupt mode)
- self._wr_byte(0x7FFF, 0)
- self._wr_byte(0x09, 0x05)
- self._wr_byte(0x7FFF, 0x2)
-
- # start ranging session
- self._wr_multi(_UI_CMD_END - 3, b'\x00\x03\x00\x00')
- return not self._poll_for_answer(4, 1, _UI_CMD_STATUS, 0xFF, 0x03)
-
- def check_data_ready(self):
- status = False
-
- buf = self._rd_multi(0, 4)
- if ((buf[0] != self._streamcount) and (buf[0] != 255) and
- (buf[1] == 0x5) and ((buf[2] & 0x5) == 0x5) and
- ((buf[3] & 0x10) == 0x10)):
-
- self._streamcount = buf[0]
- status = True
-
- return status
-
- def get_ranging_data(self):
- results = Results()
-
- buf = self._rd_multi(0, self._data_read_size)
- self._streamcount = buf[0]
-
- offset = 16 # skip header
- while offset < len(buf):
- bh = struct.unpack(">I", buf[offset:offset+4])[0]
- btype, size, idx = self._header(bh)
- # print(offset, hex(btype), hex(size), hex(idx))
- # if idx not in self._results:
- # # print("skipping {} values".format(len(buf) - offset))
- # break
-
- if btype > 1 and btype < 0xD:
- msize = btype * size
- else:
- msize = size
-
- offset += 4
- raw = buf[offset:offset+msize]
-
- if idx == _AMBIENT_RATE_IDX:
- results.ambient_per_spad = self._ambient_per_spad(raw)
- elif idx == _SPAD_COUNT_IDX:
- results.nb_spads_enabled = self._nb_spads_enabled(raw)
- elif idx == _MOTION_DETECT_IDX:
- results.motion_indicator = self._motion_indicator(raw)
- elif idx == _NB_TARGET_DETECTED_IDX:
- results.nb_target_detected = self._nb_target_detected(raw)
- elif idx == _SIGNAL_RATE_IDX:
- results.signal_per_spad = self._signal_per_spad(raw)
- elif idx == _RANGE_SIGMA_MM_IDX:
- results.range_sigma_mm = self._range_sigma_mm(raw)
- elif idx == _DISTANCE_IDX:
- results.distance_mm = self._distance_mm(raw)
- elif idx == _REFLECTANCE_EST_PC_IDX:
- results.reflectance = self._reflectance(raw)
- elif idx == _TARGET_STATUS_IDX:
- results.target_status = self._target_status(raw)
- # ignore other data types from sensor
-
- offset += msize
-
- return results
-
- def stop_ranging(self):
- buf = self._rd_multi(0x2FFC, 4)
- auto_stop_flag = struct.unpack("<I", buf)
- if auto_stop_flag != 0x4FF:
- self._wr_byte(0x7FFF, 0x00)
- self._wr_byte(0x15, 0x16)
- self._wr_byte(0x14, 0x01)
-
- timeout = 1000
- while timeout:
- flag = self._rd_byte(0x6)
- if (flag & 0x80):
- break
- sleep(0.010)
- timeout -= 10
-
- if timeout == 0:
- raise ValueError("failed to stop MCU")
-
- # undo MCU stop
- self._wr_byte(0x7FFF, 0x00)
- self._wr_byte(0x14, 0x00)
- self._wr_byte(0x15, 0x00)
-
- # stop xshut bypass
- self._wr_byte(0x09, 0x04)
- self._wr_byte(0x7FFF, 0x02)
-
- @property
- def integration_time_ms(self):
- buf = bytearray(20)
- self._dci_read_data(buf, _DCI_INT_TIME)
- return struct.unpack("<I", buf[0:4])[0] / 1000
-
- @integration_time_ms.setter
- def integration_time_ms(self, itime):
- if (itime < 2) or (itime > 1000):
- raise ValueError("invalid integration time (2 < it < 1000)")
-
- buf = bytearray(20)
- self._dci_replace_data(buf, _DCI_INT_TIME,
- struct.pack("I", itime * 1000), 0)
-
- @property
- def resolution(self):
- buf = bytearray(8)
- self._dci_read_data(buf, _DCI_ZONE_CONFIG)
- return buf[0] * buf[1]
-
- @resolution.setter
- def resolution(self, resolution):
- if (resolution != RESOLUTION_8X8) and (resolution != RESOLUTION_4X4):
- raise ValueError("invalid resolution")
-
- buf = bytearray(16)
- self._dci_read_data(buf, _DCI_DSS_CONFIG)
-
- if resolution == RESOLUTION_8X8:
- buf[0x04] = 16
- buf[0x06] = 16
- buf[0x09] = 1
- else:
- buf[0x04] = 64
- buf[0x06] = 64
- buf[0x09] = 4
-
- self._dci_write_data(buf, _DCI_DSS_CONFIG)
-
- buf = bytearray(8)
- self._dci_read_data(buf, _DCI_ZONE_CONFIG)
-
- if resolution == RESOLUTION_8X8:
- buf[0x00] = 8
- buf[0x01] = 8
- buf[0x04] = 4
- buf[0x05] = 4
- else:
- buf[0x00] = 4
- buf[0x01] = 4
- buf[0x04] = 8
- buf[0x05] = 8
-
- self._dci_write_data(buf, _DCI_ZONE_CONFIG)
-
- self._send_offset_data(self._offset_data, resolution)
- self._send_xtalk_data(resolution)
-
- @property
- def ranging_freq(self):
- buf = bytearray(4)
- self._dci_read_data(buf, _DCI_FREQ_HZ)
- return buf[1]
-
- @ranging_freq.setter
- def ranging_freq(self, freq):
- buf = bytearray(4)
- self._b1[0] = freq
- return self._dci_replace_data(buf, _DCI_FREQ_HZ, self._b1, 1)
-
- @property
- def target_order(self):
- buf = bytearray(4)
- self._dci_read_data(buf, _DCI_TARGET_ORDER)
- return buf[0]
-
- @target_order.setter
- def target_order(self, order):
- buf = bytearray(4)
- self._b1[0] = order
- return self._dci_replace_data(buf, _DCI_TARGET_ORDER, self._b1, 0)
-
- @property
- def ranging_mode(self):
- buf = bytearray(8)
- self._dci_read_data(buf, _DCI_RANGING_MODE)
- if buf[1] == 1:
- mode = RANGING_MODE_CONTINUOUS
- else:
- mode = RANGING_MODE_AUTONOMOUS
-
- return mode
-
- @ranging_mode.setter
- def ranging_mode(self, mode):
- buf = bytearray(8)
- self._dci_read_data(buf, _DCI_RANGING_MODE)
- if mode == RANGING_MODE_CONTINUOUS:
- buf[1] = 0x1
- buf[3] = 0x3
- single_range = 0
- elif mode == RANGING_MODE_AUTONOMOUS:
- buf[1] = 0x3
- buf[3] = 0x2
- single_range = 1
- else:
- raise ValueError("invalid ranging mode")
-
- self._dci_write_data(buf, _DCI_RANGING_MODE)
- self._dci_write_data(struct.pack(">I", single_range),
- _DCI_SINGLE_RANGE)
-
- @property
- def power_mode(self):
- self._wr_byte(0x7FFF, 0x0)
- raw = self._rd_byte(0x9)
- self._wr_byte(0x7FFF, 0x2)
-
- if raw == 4:
- mode = POWER_MODE_WAKEUP
- elif raw == 2:
- mode = POWER_MODE_SLEEP
- else:
- mode = -1
-
- return mode
-
- @power_mode.setter
- def power_mode(self, mode):
- if self.power_mode != mode and mode in [POWER_MODE_SLEEP, POWER_MODE_WAKEUP]:
- self._wr_byte(0x7FFF, 0)
- if mode == POWER_MODE_WAKEUP:
- self._wr_byte(0x9, 0x4)
- self._poll_for_answer(1, 0, 0x6, 0x01, 1)
- elif mode == POWER_MODE_SLEEP:
- self._wr_byte(0x09, 0x02)
- self._poll_for_answer(1, 0, 0x06, 0x01, 0)
- self._wr_byte(0x7FFF, 0x02)
-
- @property
- def sharpener_percent(self):
- buf = bytearray(16)
- self._dci_read_data(buf, _DCI_SHARPENER)
- return (buf[0xD] * 100) // 255
-
- @sharpener_percent.setter
- def sharpener_percent(self, value):
- if (value < 0) or (value > 100):
- raise ValueError("invalid sharpener percent")
-
- self._b1[0] = (value * 255) // 100
- self._dci_replace_data(bytearray(16), _DCI_SHARPENER, self._b1, 0xD)
diff --git a/Pi_Pico_Files/lib/vl53l5cx/_config_file.py b/Pi_Pico_Files/lib/vl53l5cx/_config_file.py
deleted file mode 100644
index dee212e5c4206b5999610ddf8fa77cd0d5e3fb5f..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/lib/vl53l5cx/_config_file.py
+++ /dev/null
@@ -1,64 +0,0 @@
-# Copyright (c) 2021 Mark Grosen <mark@grosen.org>
-#
-# SPDX-License-Identifier: MIT
-
-import sys
-from os import stat
-
-
-def _find_file(name, req_size):
- file = None
- size_on_disk = 0
- for d in sys.path:
- file = d + "/" + name
- try:
- size_on_disk = stat(file)[6]
- break
- except:
- file = None
-
- if file:
- if size_on_disk != req_size:
- raise ValueError("firmware file size incorrect")
- else:
- raise ValueError("could not find file: " + name)
-
- return file
-
-
-class ConfigDataFile:
- _FW_SIZE = 0x15000
- _DEFAULT_CONFIG_OFFSET = _FW_SIZE
- _DEFAULT_CONFIG_SIZE = 972
- _XTALK_OFFSET = _FW_SIZE + _DEFAULT_CONFIG_SIZE
- _XTALK_SIZE = 776
- _XTALK4X4_OFFSET = _FW_SIZE + _DEFAULT_CONFIG_SIZE + _XTALK_SIZE
- _XTALK4X4_SIZE = 776
-
- def __init__(self, name="vl53l5cx/vl_fw_config.bin"):
- self._file_name = _find_file(name, 88540)
-
- def _read_offset_data(self, offset, size):
- with open(self._file_name, "rb") as fw_file:
- fw_file.seek(offset)
- return fw_file.read(size)
-
- @property
- def default_config_data(self):
- return self._read_offset_data(self._DEFAULT_CONFIG_OFFSET,
- self._DEFAULT_CONFIG_SIZE)
-
- @property
- def xtalk_data(self):
- return self._read_offset_data(self._XTALK_OFFSET,
- self._XTALK_SIZE)
-
- @property
- def xtalk4x4_data(self):
- return self._read_offset_data(self._XTALK4X4_OFFSET,
- self._XTALK4X4_SIZE)
-
- def fw_data(self, chunk_size=0x1000):
- with open(self._file_name, "rb") as fw_file:
- for _ in range(0, 0x15000, chunk_size):
- yield fw_file.read(chunk_size)
diff --git a/Pi_Pico_Files/lib/vl53l5cx/mp.py b/Pi_Pico_Files/lib/vl53l5cx/mp.py
deleted file mode 100644
index 0620c06211f0f64ec198f7d5efb8eac7620a1d2b..0000000000000000000000000000000000000000
--- a/Pi_Pico_Files/lib/vl53l5cx/mp.py
+++ /dev/null
@@ -1,32 +0,0 @@
-# Copyright (c) 2021 Mark Grosen <mark@grosen.org>
-#
-# SPDX-License-Identifier: MIT
-
-from time import sleep_ms
-
-from . import VL53L5CX
-
-
-class VL53L5CXMP(VL53L5CX):
- def _rd_byte(self, reg16):
- self.i2c.readfrom_mem_into(self.addr, reg16, self._b1, addrsize=16)
- return self._b1[0]
-
- def _rd_multi(self, reg16, size):
- return self.i2c.readfrom_mem(self.addr, reg16, size, addrsize=16)
-
- def _wr_byte(self, reg16, val):
- self._b1[0] = val
- self.i2c.writeto_mem(self.addr, reg16, self._b1, addrsize=16)
-
- def _wr_multi(self, reg16, buf):
- self.i2c.writeto_mem(self.addr, reg16, buf, addrsize=16)
-
- def reset(self):
- if not self._lpn:
- raise ValueError("no LPN pin provided")
-
- self._lpn.value(0)
- sleep_ms(100)
- self._lpn.value(1)
- sleep_ms(100)
diff --git a/Pi_Pico_Files/lib/vl53l5cx/vl_fw_config.bin b/Pi_Pico_Files/lib/vl53l5cx/vl_fw_config.bin
deleted file mode 100644
index 47c60201b264a8ce9ca4b5fd47e918622e97c0de..0000000000000000000000000000000000000000
Binary files a/Pi_Pico_Files/lib/vl53l5cx/vl_fw_config.bin and /dev/null differ
diff --git a/images/3D-Print_with_heat_inserts.jpeg b/images/3D-Print_with_heat_inserts.jpeg
new file mode 100644
index 0000000000000000000000000000000000000000..c784a98b21df0bd4a9abd6f51949f457229e4be9
Binary files /dev/null and b/images/3D-Print_with_heat_inserts.jpeg differ
diff --git a/images/perfboard_with_shift_register_unsoldered.jpeg b/images/perfboard_with_shift_register_unsoldered.jpeg
new file mode 100644
index 0000000000000000000000000000000000000000..d95c7c91bfd235e0279362735263f6606603a86a
Binary files /dev/null and b/images/perfboard_with_shift_register_unsoldered.jpeg differ
diff --git a/images/perfboard_with_shift_register_unsoldered_closeup.jpeg b/images/perfboard_with_shift_register_unsoldered_closeup.jpeg
new file mode 100644
index 0000000000000000000000000000000000000000..e51733b9b02c7b2229ba8d6a5d406a5035674bfb
Binary files /dev/null and b/images/perfboard_with_shift_register_unsoldered_closeup.jpeg differ